1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconstm1;
114 REAL_VALUE_TYPE dconstm2;
115 REAL_VALUE_TYPE dconsthalf;
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
136 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
137 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
138 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
139 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
141 /* This is used to implement __builtin_return_address for some machines.
142 See for instance the MIPS port. */
143 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
145 /* We make one copy of (const_int C) where C is in
146 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
147 to save space during the compilation and simplify comparisons of
150 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
152 /* A hash table storing CONST_INTs whose absolute value is greater
153 than MAX_SAVED_CONST_INT. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
156 htab_t const_int_htab;
158 /* A hash table storing memory attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
160 htab_t mem_attrs_htab;
162 /* A hash table storing register attribute structures. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
164 htab_t reg_attrs_htab;
166 /* A hash table storing all CONST_DOUBLEs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
168 htab_t const_double_htab;
170 #define first_insn (cfun->emit->x_first_insn)
171 #define last_insn (cfun->emit->x_last_insn)
172 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
173 #define last_linenum (cfun->emit->x_last_linenum)
174 #define last_filename (cfun->emit->x_last_filename)
175 #define first_label_num (cfun->emit->x_first_label_num)
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
182 static void unshare_all_rtl_1 PARAMS ((rtx));
183 static void unshare_all_decls PARAMS ((tree));
184 static void reset_used_decls PARAMS ((tree));
185 static void mark_label_nuses PARAMS ((rtx));
186 static hashval_t const_int_htab_hash PARAMS ((const void *));
187 static int const_int_htab_eq PARAMS ((const void *,
189 static hashval_t const_double_htab_hash PARAMS ((const void *));
190 static int const_double_htab_eq PARAMS ((const void *,
192 static rtx lookup_const_double PARAMS ((rtx));
193 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
194 static int mem_attrs_htab_eq PARAMS ((const void *,
196 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
199 static hashval_t reg_attrs_htab_hash PARAMS ((const void *));
200 static int reg_attrs_htab_eq PARAMS ((const void *,
202 static reg_attrs *get_reg_attrs PARAMS ((tree, int));
203 static tree component_ref_for_mem_expr PARAMS ((tree));
204 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
205 static rtx gen_complex_constant_part PARAMS ((enum machine_mode,
208 /* Probability of the conditional branch currently proceeded by try_split.
209 Set to -1 otherwise. */
210 int split_branch_probability = -1;
212 /* Returns a hash code for X (which is a really a CONST_INT). */
215 const_int_htab_hash (x)
218 return (hashval_t) INTVAL ((struct rtx_def *) x);
221 /* Returns nonzero if the value represented by X (which is really a
222 CONST_INT) is the same as that given by Y (which is really a
226 const_int_htab_eq (x, y)
230 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
233 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
235 const_double_htab_hash (x)
241 if (GET_MODE (value) == VOIDmode)
242 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
245 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
246 /* MODE is used in the comparison, so it should be in the hash. */
247 h ^= GET_MODE (value);
252 /* Returns nonzero if the value represented by X (really a ...)
253 is the same as that represented by Y (really a ...) */
255 const_double_htab_eq (x, y)
259 rtx a = (rtx)x, b = (rtx)y;
261 if (GET_MODE (a) != GET_MODE (b))
263 if (GET_MODE (a) == VOIDmode)
264 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
265 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
267 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
268 CONST_DOUBLE_REAL_VALUE (b));
271 /* Returns a hash code for X (which is a really a mem_attrs *). */
274 mem_attrs_htab_hash (x)
277 mem_attrs *p = (mem_attrs *) x;
279 return (p->alias ^ (p->align * 1000)
280 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
281 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
285 /* Returns nonzero if the value represented by X (which is really a
286 mem_attrs *) is the same as that given by Y (which is also really a
290 mem_attrs_htab_eq (x, y)
294 mem_attrs *p = (mem_attrs *) x;
295 mem_attrs *q = (mem_attrs *) y;
297 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
298 && p->size == q->size && p->align == q->align);
301 /* Allocate a new mem_attrs structure and insert it into the hash table if
302 one identical to it is not already in the table. We are doing this for
306 get_mem_attrs (alias, expr, offset, size, align, mode)
312 enum machine_mode mode;
317 /* If everything is the default, we can just return zero.
318 This must match what the corresponding MEM_* macros return when the
319 field is not present. */
320 if (alias == 0 && expr == 0 && offset == 0
322 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
323 && (STRICT_ALIGNMENT && mode != BLKmode
324 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
329 attrs.offset = offset;
333 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
336 *slot = ggc_alloc (sizeof (mem_attrs));
337 memcpy (*slot, &attrs, sizeof (mem_attrs));
343 /* Returns a hash code for X (which is a really a reg_attrs *). */
346 reg_attrs_htab_hash (x)
349 reg_attrs *p = (reg_attrs *) x;
351 return ((p->offset * 1000) ^ (long) p->decl);
354 /* Returns nonzero if the value represented by X (which is really a
355 reg_attrs *) is the same as that given by Y (which is also really a
359 reg_attrs_htab_eq (x, y)
363 reg_attrs *p = (reg_attrs *) x;
364 reg_attrs *q = (reg_attrs *) y;
366 return (p->decl == q->decl && p->offset == q->offset);
368 /* Allocate a new reg_attrs structure and insert it into the hash table if
369 one identical to it is not already in the table. We are doing this for
373 get_reg_attrs (decl, offset)
380 /* If everything is the default, we can just return zero. */
381 if (decl == 0 && offset == 0)
385 attrs.offset = offset;
387 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
390 *slot = ggc_alloc (sizeof (reg_attrs));
391 memcpy (*slot, &attrs, sizeof (reg_attrs));
397 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
398 don't attempt to share with the various global pieces of rtl (such as
399 frame_pointer_rtx). */
402 gen_raw_REG (mode, regno)
403 enum machine_mode mode;
406 rtx x = gen_rtx_raw_REG (mode, regno);
407 ORIGINAL_REGNO (x) = regno;
411 /* There are some RTL codes that require special attention; the generation
412 functions do the raw handling. If you add to this list, modify
413 special_rtx in gengenrtl.c as well. */
416 gen_rtx_CONST_INT (mode, arg)
417 enum machine_mode mode ATTRIBUTE_UNUSED;
422 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
423 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
425 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
426 if (const_true_rtx && arg == STORE_FLAG_VALUE)
427 return const_true_rtx;
430 /* Look up the CONST_INT in the hash table. */
431 slot = htab_find_slot_with_hash (const_int_htab, &arg,
432 (hashval_t) arg, INSERT);
434 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
440 gen_int_mode (c, mode)
442 enum machine_mode mode;
444 return GEN_INT (trunc_int_for_mode (c, mode));
447 /* CONST_DOUBLEs might be created from pairs of integers, or from
448 REAL_VALUE_TYPEs. Also, their length is known only at run time,
449 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
451 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
452 hash table. If so, return its counterpart; otherwise add it
453 to the hash table and return it. */
455 lookup_const_double (real)
458 void **slot = htab_find_slot (const_double_htab, real, INSERT);
465 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
466 VALUE in mode MODE. */
468 const_double_from_real_value (value, mode)
469 REAL_VALUE_TYPE value;
470 enum machine_mode mode;
472 rtx real = rtx_alloc (CONST_DOUBLE);
473 PUT_MODE (real, mode);
475 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
477 return lookup_const_double (real);
480 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
481 of ints: I0 is the low-order word and I1 is the high-order word.
482 Do not use this routine for non-integer modes; convert to
483 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
486 immed_double_const (i0, i1, mode)
487 HOST_WIDE_INT i0, i1;
488 enum machine_mode mode;
493 if (mode != VOIDmode)
496 if (GET_MODE_CLASS (mode) != MODE_INT
497 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
498 /* We can get a 0 for an error mark. */
499 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
500 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
503 /* We clear out all bits that don't belong in MODE, unless they and
504 our sign bit are all one. So we get either a reasonable negative
505 value or a reasonable unsigned value for this mode. */
506 width = GET_MODE_BITSIZE (mode);
507 if (width < HOST_BITS_PER_WIDE_INT
508 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
509 != ((HOST_WIDE_INT) (-1) << (width - 1))))
510 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
511 else if (width == HOST_BITS_PER_WIDE_INT
512 && ! (i1 == ~0 && i0 < 0))
514 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
515 /* We cannot represent this value as a constant. */
518 /* If this would be an entire word for the target, but is not for
519 the host, then sign-extend on the host so that the number will
520 look the same way on the host that it would on the target.
522 For example, when building a 64 bit alpha hosted 32 bit sparc
523 targeted compiler, then we want the 32 bit unsigned value -1 to be
524 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
525 The latter confuses the sparc backend. */
527 if (width < HOST_BITS_PER_WIDE_INT
528 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
529 i0 |= ((HOST_WIDE_INT) (-1) << width);
531 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
534 ??? Strictly speaking, this is wrong if we create a CONST_INT for
535 a large unsigned constant with the size of MODE being
536 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
537 in a wider mode. In that case we will mis-interpret it as a
540 Unfortunately, the only alternative is to make a CONST_DOUBLE for
541 any constant in any mode if it is an unsigned constant larger
542 than the maximum signed integer in an int on the host. However,
543 doing this will break everyone that always expects to see a
544 CONST_INT for SImode and smaller.
546 We have always been making CONST_INTs in this case, so nothing
547 new is being broken. */
549 if (width <= HOST_BITS_PER_WIDE_INT)
550 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
553 /* If this integer fits in one word, return a CONST_INT. */
554 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
557 /* We use VOIDmode for integers. */
558 value = rtx_alloc (CONST_DOUBLE);
559 PUT_MODE (value, VOIDmode);
561 CONST_DOUBLE_LOW (value) = i0;
562 CONST_DOUBLE_HIGH (value) = i1;
564 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
565 XWINT (value, i) = 0;
567 return lookup_const_double (value);
571 gen_rtx_REG (mode, regno)
572 enum machine_mode mode;
575 /* In case the MD file explicitly references the frame pointer, have
576 all such references point to the same frame pointer. This is
577 used during frame pointer elimination to distinguish the explicit
578 references to these registers from pseudos that happened to be
581 If we have eliminated the frame pointer or arg pointer, we will
582 be using it as a normal register, for example as a spill
583 register. In such cases, we might be accessing it in a mode that
584 is not Pmode and therefore cannot use the pre-allocated rtx.
586 Also don't do this when we are making new REGs in reload, since
587 we don't want to get confused with the real pointers. */
589 if (mode == Pmode && !reload_in_progress)
591 if (regno == FRAME_POINTER_REGNUM
592 && (!reload_completed || frame_pointer_needed))
593 return frame_pointer_rtx;
594 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
595 if (regno == HARD_FRAME_POINTER_REGNUM
596 && (!reload_completed || frame_pointer_needed))
597 return hard_frame_pointer_rtx;
599 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
600 if (regno == ARG_POINTER_REGNUM)
601 return arg_pointer_rtx;
603 #ifdef RETURN_ADDRESS_POINTER_REGNUM
604 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
605 return return_address_pointer_rtx;
607 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
608 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
609 return pic_offset_table_rtx;
610 if (regno == STACK_POINTER_REGNUM)
611 return stack_pointer_rtx;
615 /* If the per-function register table has been set up, try to re-use
616 an existing entry in that table to avoid useless generation of RTL.
618 This code is disabled for now until we can fix the various backends
619 which depend on having non-shared hard registers in some cases. Long
620 term we want to re-enable this code as it can significantly cut down
621 on the amount of useless RTL that gets generated.
623 We'll also need to fix some code that runs after reload that wants to
624 set ORIGINAL_REGNO. */
629 && regno < FIRST_PSEUDO_REGISTER
630 && reg_raw_mode[regno] == mode)
631 return regno_reg_rtx[regno];
634 return gen_raw_REG (mode, regno);
638 gen_rtx_MEM (mode, addr)
639 enum machine_mode mode;
642 rtx rt = gen_rtx_raw_MEM (mode, addr);
644 /* This field is not cleared by the mere allocation of the rtx, so
652 gen_rtx_SUBREG (mode, reg, offset)
653 enum machine_mode mode;
657 /* This is the most common failure type.
658 Catch it early so we can see who does it. */
659 if ((offset % GET_MODE_SIZE (mode)) != 0)
662 /* This check isn't usable right now because combine will
663 throw arbitrary crap like a CALL into a SUBREG in
664 gen_lowpart_for_combine so we must just eat it. */
666 /* Check for this too. */
667 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
670 return gen_rtx_raw_SUBREG (mode, reg, offset);
673 /* Generate a SUBREG representing the least-significant part of REG if MODE
674 is smaller than mode of REG, otherwise paradoxical SUBREG. */
677 gen_lowpart_SUBREG (mode, reg)
678 enum machine_mode mode;
681 enum machine_mode inmode;
683 inmode = GET_MODE (reg);
684 if (inmode == VOIDmode)
686 return gen_rtx_SUBREG (mode, reg,
687 subreg_lowpart_offset (mode, inmode));
690 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
692 ** This routine generates an RTX of the size specified by
693 ** <code>, which is an RTX code. The RTX structure is initialized
694 ** from the arguments <element1> through <elementn>, which are
695 ** interpreted according to the specific RTX type's format. The
696 ** special machine mode associated with the rtx (if any) is specified
699 ** gen_rtx can be invoked in a way which resembles the lisp-like
700 ** rtx it will generate. For example, the following rtx structure:
702 ** (plus:QI (mem:QI (reg:SI 1))
703 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
705 ** ...would be generated by the following C code:
707 ** gen_rtx (PLUS, QImode,
708 ** gen_rtx (MEM, QImode,
709 ** gen_rtx (REG, SImode, 1)),
710 ** gen_rtx (MEM, QImode,
711 ** gen_rtx (PLUS, SImode,
712 ** gen_rtx (REG, SImode, 2),
713 ** gen_rtx (REG, SImode, 3)))),
718 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
720 int i; /* Array indices... */
721 const char *fmt; /* Current rtx's format... */
722 rtx rt_val; /* RTX to return to caller... */
730 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
735 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
736 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
738 rt_val = immed_double_const (arg0, arg1, mode);
743 rt_val = gen_rtx_REG (mode, va_arg (p, int));
747 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
751 rt_val = rtx_alloc (code); /* Allocate the storage space. */
752 rt_val->mode = mode; /* Store the machine mode... */
754 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
755 for (i = 0; i < GET_RTX_LENGTH (code); i++)
759 case '0': /* Field with unknown use. Zero it. */
760 X0EXP (rt_val, i) = NULL_RTX;
763 case 'i': /* An integer? */
764 XINT (rt_val, i) = va_arg (p, int);
767 case 'w': /* A wide integer? */
768 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
771 case 's': /* A string? */
772 XSTR (rt_val, i) = va_arg (p, char *);
775 case 'e': /* An expression? */
776 case 'u': /* An insn? Same except when printing. */
777 XEXP (rt_val, i) = va_arg (p, rtx);
780 case 'E': /* An RTX vector? */
781 XVEC (rt_val, i) = va_arg (p, rtvec);
784 case 'b': /* A bitmap? */
785 XBITMAP (rt_val, i) = va_arg (p, bitmap);
788 case 't': /* A tree? */
789 XTREE (rt_val, i) = va_arg (p, tree);
803 /* gen_rtvec (n, [rt1, ..., rtn])
805 ** This routine creates an rtvec and stores within it the
806 ** pointers to rtx's which are its arguments.
811 gen_rtvec (int n, ...)
820 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
822 vector = (rtx *) alloca (n * sizeof (rtx));
824 for (i = 0; i < n; i++)
825 vector[i] = va_arg (p, rtx);
827 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
831 return gen_rtvec_v (save_n, vector);
835 gen_rtvec_v (n, argp)
843 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
845 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
847 for (i = 0; i < n; i++)
848 rt_val->elem[i] = *argp++;
853 /* Generate a REG rtx for a new pseudo register of mode MODE.
854 This pseudo is assigned the next sequential register number. */
858 enum machine_mode mode;
860 struct function *f = cfun;
863 /* Don't let anything called after initial flow analysis create new
868 if (generating_concat_p
869 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
870 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
872 /* For complex modes, don't make a single pseudo.
873 Instead, make a CONCAT of two pseudos.
874 This allows noncontiguous allocation of the real and imaginary parts,
875 which makes much better code. Besides, allocating DCmode
876 pseudos overstrains reload on some machines like the 386. */
877 rtx realpart, imagpart;
878 enum machine_mode partmode = GET_MODE_INNER (mode);
880 realpart = gen_reg_rtx (partmode);
881 imagpart = gen_reg_rtx (partmode);
882 return gen_rtx_CONCAT (mode, realpart, imagpart);
885 /* Make sure regno_pointer_align, and regno_reg_rtx are large
886 enough to have an element for this pseudo reg number. */
888 if (reg_rtx_no == f->emit->regno_pointer_align_length)
890 int old_size = f->emit->regno_pointer_align_length;
894 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
895 memset (new + old_size, 0, old_size);
896 f->emit->regno_pointer_align = (unsigned char *) new;
898 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
899 old_size * 2 * sizeof (rtx));
900 memset (new1 + old_size, 0, old_size * sizeof (rtx));
901 regno_reg_rtx = new1;
903 f->emit->regno_pointer_align_length = old_size * 2;
906 val = gen_raw_REG (mode, reg_rtx_no);
907 regno_reg_rtx[reg_rtx_no++] = val;
911 /* Generate an register with same attributes as REG,
912 but offsetted by OFFSET. */
915 gen_rtx_REG_offset (reg, mode, regno, offset)
916 enum machine_mode mode;
921 rtx new = gen_rtx_REG (mode, regno);
922 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
923 REG_OFFSET (reg) + offset);
927 /* Set the decl for MEM to DECL. */
930 set_reg_attrs_from_mem (reg, mem)
934 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
936 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
939 /* Set the register attributes for registers contained in PARM_RTX.
940 Use needed values from memory attributes of MEM. */
943 set_reg_attrs_for_parm (parm_rtx, mem)
947 if (GET_CODE (parm_rtx) == REG)
948 set_reg_attrs_from_mem (parm_rtx, mem);
949 else if (GET_CODE (parm_rtx) == PARALLEL)
951 /* Check for a NULL entry in the first slot, used to indicate that the
952 parameter goes both on the stack and in registers. */
953 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
954 for (; i < XVECLEN (parm_rtx, 0); i++)
956 rtx x = XVECEXP (parm_rtx, 0, i);
957 if (GET_CODE (XEXP (x, 0)) == REG)
958 REG_ATTRS (XEXP (x, 0))
959 = get_reg_attrs (MEM_EXPR (mem),
960 INTVAL (XEXP (x, 1)));
965 /* Assign the RTX X to declaration T. */
971 DECL_CHECK (t)->decl.rtl = x;
975 /* For register, we maitain the reverse information too. */
976 if (GET_CODE (x) == REG)
977 REG_ATTRS (x) = get_reg_attrs (t, 0);
978 else if (GET_CODE (x) == SUBREG)
979 REG_ATTRS (SUBREG_REG (x))
980 = get_reg_attrs (t, -SUBREG_BYTE (x));
981 if (GET_CODE (x) == CONCAT)
983 if (REG_P (XEXP (x, 0)))
984 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
985 if (REG_P (XEXP (x, 1)))
986 REG_ATTRS (XEXP (x, 1))
987 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
989 if (GET_CODE (x) == PARALLEL)
992 for (i = 0; i < XVECLEN (x, 0); i++)
994 rtx y = XVECEXP (x, 0, i);
995 if (REG_P (XEXP (y, 0)))
996 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1001 /* Identify REG (which may be a CONCAT) as a user register. */
1007 if (GET_CODE (reg) == CONCAT)
1009 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1010 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1012 else if (GET_CODE (reg) == REG)
1013 REG_USERVAR_P (reg) = 1;
1018 /* Identify REG as a probable pointer register and show its alignment
1019 as ALIGN, if nonzero. */
1022 mark_reg_pointer (reg, align)
1026 if (! REG_POINTER (reg))
1028 REG_POINTER (reg) = 1;
1031 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1033 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1034 /* We can no-longer be sure just how aligned this pointer is */
1035 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1038 /* Return 1 plus largest pseudo reg number used in the current function. */
1046 /* Return 1 + the largest label number used so far in the current function. */
1051 if (last_label_num && label_num == base_label_num)
1052 return last_label_num;
1056 /* Return first label number used in this function (if any were used). */
1059 get_first_label_num ()
1061 return first_label_num;
1064 /* Return the final regno of X, which is a SUBREG of a hard
1067 subreg_hard_regno (x, check_mode)
1071 enum machine_mode mode = GET_MODE (x);
1072 unsigned int byte_offset, base_regno, final_regno;
1073 rtx reg = SUBREG_REG (x);
1075 /* This is where we attempt to catch illegal subregs
1076 created by the compiler. */
1077 if (GET_CODE (x) != SUBREG
1078 || GET_CODE (reg) != REG)
1080 base_regno = REGNO (reg);
1081 if (base_regno >= FIRST_PSEUDO_REGISTER)
1083 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1085 #ifdef ENABLE_CHECKING
1086 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1087 SUBREG_BYTE (x), mode))
1090 /* Catch non-congruent offsets too. */
1091 byte_offset = SUBREG_BYTE (x);
1092 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1095 final_regno = subreg_regno (x);
1100 /* Return a value representing some low-order bits of X, where the number
1101 of low-order bits is given by MODE. Note that no conversion is done
1102 between floating-point and fixed-point values, rather, the bit
1103 representation is returned.
1105 This function handles the cases in common between gen_lowpart, below,
1106 and two variants in cse.c and combine.c. These are the cases that can
1107 be safely handled at all points in the compilation.
1109 If this is not a case we can handle, return 0. */
1112 gen_lowpart_common (mode, x)
1113 enum machine_mode mode;
1116 int msize = GET_MODE_SIZE (mode);
1117 int xsize = GET_MODE_SIZE (GET_MODE (x));
1120 if (GET_MODE (x) == mode)
1123 /* MODE must occupy no more words than the mode of X. */
1124 if (GET_MODE (x) != VOIDmode
1125 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1126 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
1129 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1130 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1131 && GET_MODE (x) != VOIDmode && msize > xsize)
1134 offset = subreg_lowpart_offset (mode, GET_MODE (x));
1136 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1137 && (GET_MODE_CLASS (mode) == MODE_INT
1138 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1140 /* If we are getting the low-order part of something that has been
1141 sign- or zero-extended, we can either just use the object being
1142 extended or make a narrower extension. If we want an even smaller
1143 piece than the size of the object being extended, call ourselves
1146 This case is used mostly by combine and cse. */
1148 if (GET_MODE (XEXP (x, 0)) == mode)
1150 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1151 return gen_lowpart_common (mode, XEXP (x, 0));
1152 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
1153 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1155 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1156 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR)
1157 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
1158 else if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
1159 return simplify_gen_subreg (mode, x, int_mode_for_mode (mode), offset);
1160 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
1161 from the low-order part of the constant. */
1162 else if ((GET_MODE_CLASS (mode) == MODE_INT
1163 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1164 && GET_MODE (x) == VOIDmode
1165 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
1167 /* If MODE is twice the host word size, X is already the desired
1168 representation. Otherwise, if MODE is wider than a word, we can't
1169 do this. If MODE is exactly a word, return just one CONST_INT. */
1171 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
1173 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
1175 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
1176 return (GET_CODE (x) == CONST_INT ? x
1177 : GEN_INT (CONST_DOUBLE_LOW (x)));
1180 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1181 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
1182 : CONST_DOUBLE_LOW (x));
1184 /* Sign extend to HOST_WIDE_INT. */
1185 val = trunc_int_for_mode (val, mode);
1187 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
1192 /* The floating-point emulator can handle all conversions between
1193 FP and integer operands. This simplifies reload because it
1194 doesn't have to deal with constructs like (subreg:DI
1195 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1196 /* Single-precision floats are always 32-bits and double-precision
1197 floats are always 64-bits. */
1199 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1200 && GET_MODE_BITSIZE (mode) == 32
1201 && GET_CODE (x) == CONST_INT)
1204 long i = INTVAL (x);
1206 real_from_target (&r, &i, mode);
1207 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1209 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1210 && GET_MODE_BITSIZE (mode) == 64
1211 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1212 && GET_MODE (x) == VOIDmode)
1215 HOST_WIDE_INT low, high;
1218 if (GET_CODE (x) == CONST_INT)
1221 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1225 low = CONST_DOUBLE_LOW (x);
1226 high = CONST_DOUBLE_HIGH (x);
1229 if (HOST_BITS_PER_WIDE_INT > 32)
1230 high = low >> 31 >> 1;
1232 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1234 if (WORDS_BIG_ENDIAN)
1235 i[0] = high, i[1] = low;
1237 i[0] = low, i[1] = high;
1239 real_from_target (&r, i, mode);
1240 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1242 else if ((GET_MODE_CLASS (mode) == MODE_INT
1243 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1244 && GET_CODE (x) == CONST_DOUBLE
1245 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1248 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1249 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1251 /* Convert 'r' into an array of four 32-bit words in target word
1253 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1254 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1257 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1260 i[3 - 3 * endian] = 0;
1263 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1264 i[2 - 2 * endian] = 0;
1265 i[3 - 2 * endian] = 0;
1268 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1269 i[3 - 3 * endian] = 0;
1272 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1277 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1279 #if HOST_BITS_PER_WIDE_INT == 32
1280 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1282 if (HOST_BITS_PER_WIDE_INT != 64)
1285 return immed_double_const ((((unsigned long) i[3 * endian])
1286 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1287 (((unsigned long) i[2 - endian])
1288 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1292 /* If MODE is a condition code and X is a CONST_INT, the value of X
1293 must already have been "recognized" by the back-end, and we can
1294 assume that it is valid for this mode. */
1295 else if (GET_MODE_CLASS (mode) == MODE_CC
1296 && GET_CODE (x) == CONST_INT)
1299 /* Otherwise, we can't do this. */
1303 /* Return the constant real or imaginary part (which has mode MODE)
1304 of a complex value X. The IMAGPART_P argument determines whether
1305 the real or complex component should be returned. This function
1306 returns NULL_RTX if the component isn't a constant. */
1309 gen_complex_constant_part (mode, x, imagpart_p)
1310 enum machine_mode mode;
1316 if (GET_CODE (x) == MEM
1317 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1319 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1320 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1322 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1323 if (TREE_CODE (part) == REAL_CST
1324 || TREE_CODE (part) == INTEGER_CST)
1325 return expand_expr (part, NULL_RTX, mode, 0);
1331 /* Return the real part (which has mode MODE) of a complex value X.
1332 This always comes at the low address in memory. */
1335 gen_realpart (mode, x)
1336 enum machine_mode mode;
1341 /* Handle complex constants. */
1342 part = gen_complex_constant_part (mode, x, 0);
1343 if (part != NULL_RTX)
1346 if (WORDS_BIG_ENDIAN
1347 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1349 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1351 ("can't access real part of complex value in hard register");
1352 else if (WORDS_BIG_ENDIAN)
1353 return gen_highpart (mode, x);
1355 return gen_lowpart (mode, x);
1358 /* Return the imaginary part (which has mode MODE) of a complex value X.
1359 This always comes at the high address in memory. */
1362 gen_imagpart (mode, x)
1363 enum machine_mode mode;
1368 /* Handle complex constants. */
1369 part = gen_complex_constant_part (mode, x, 1);
1370 if (part != NULL_RTX)
1373 if (WORDS_BIG_ENDIAN)
1374 return gen_lowpart (mode, x);
1375 else if (! WORDS_BIG_ENDIAN
1376 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1378 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1380 ("can't access imaginary part of complex value in hard register");
1382 return gen_highpart (mode, x);
1385 /* Return 1 iff X, assumed to be a SUBREG,
1386 refers to the real part of the complex value in its containing reg.
1387 Complex values are always stored with the real part in the first word,
1388 regardless of WORDS_BIG_ENDIAN. */
1391 subreg_realpart_p (x)
1394 if (GET_CODE (x) != SUBREG)
1397 return ((unsigned int) SUBREG_BYTE (x)
1398 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1401 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1402 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1403 least-significant part of X.
1404 MODE specifies how big a part of X to return;
1405 it usually should not be larger than a word.
1406 If X is a MEM whose address is a QUEUED, the value may be so also. */
1409 gen_lowpart (mode, x)
1410 enum machine_mode mode;
1413 rtx result = gen_lowpart_common (mode, x);
1417 else if (GET_CODE (x) == REG)
1419 /* Must be a hard reg that's not valid in MODE. */
1420 result = gen_lowpart_common (mode, copy_to_reg (x));
1425 else if (GET_CODE (x) == MEM)
1427 /* The only additional case we can do is MEM. */
1430 /* The following exposes the use of "x" to CSE. */
1431 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1432 && SCALAR_INT_MODE_P (GET_MODE (x))
1433 && ! no_new_pseudos)
1434 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1436 if (WORDS_BIG_ENDIAN)
1437 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1438 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1440 if (BYTES_BIG_ENDIAN)
1441 /* Adjust the address so that the address-after-the-data
1443 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1444 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1446 return adjust_address (x, mode, offset);
1448 else if (GET_CODE (x) == ADDRESSOF)
1449 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1454 /* Like `gen_lowpart', but refer to the most significant part.
1455 This is used to access the imaginary part of a complex number. */
1458 gen_highpart (mode, x)
1459 enum machine_mode mode;
1462 unsigned int msize = GET_MODE_SIZE (mode);
1465 /* This case loses if X is a subreg. To catch bugs early,
1466 complain if an invalid MODE is used even in other cases. */
1467 if (msize > UNITS_PER_WORD
1468 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1471 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1472 subreg_highpart_offset (mode, GET_MODE (x)));
1474 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1475 the target if we have a MEM. gen_highpart must return a valid operand,
1476 emitting code if necessary to do so. */
1477 if (result != NULL_RTX && GET_CODE (result) == MEM)
1478 result = validize_mem (result);
1485 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1486 be VOIDmode constant. */
1488 gen_highpart_mode (outermode, innermode, exp)
1489 enum machine_mode outermode, innermode;
1492 if (GET_MODE (exp) != VOIDmode)
1494 if (GET_MODE (exp) != innermode)
1496 return gen_highpart (outermode, exp);
1498 return simplify_gen_subreg (outermode, exp, innermode,
1499 subreg_highpart_offset (outermode, innermode));
1502 /* Return offset in bytes to get OUTERMODE low part
1503 of the value in mode INNERMODE stored in memory in target format. */
1506 subreg_lowpart_offset (outermode, innermode)
1507 enum machine_mode outermode, innermode;
1509 unsigned int offset = 0;
1510 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1514 if (WORDS_BIG_ENDIAN)
1515 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1516 if (BYTES_BIG_ENDIAN)
1517 offset += difference % UNITS_PER_WORD;
1523 /* Return offset in bytes to get OUTERMODE high part
1524 of the value in mode INNERMODE stored in memory in target format. */
1526 subreg_highpart_offset (outermode, innermode)
1527 enum machine_mode outermode, innermode;
1529 unsigned int offset = 0;
1530 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1532 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1537 if (! WORDS_BIG_ENDIAN)
1538 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1539 if (! BYTES_BIG_ENDIAN)
1540 offset += difference % UNITS_PER_WORD;
1546 /* Return 1 iff X, assumed to be a SUBREG,
1547 refers to the least significant part of its containing reg.
1548 If X is not a SUBREG, always return 1 (it is its own low part!). */
1551 subreg_lowpart_p (x)
1554 if (GET_CODE (x) != SUBREG)
1556 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1559 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1560 == SUBREG_BYTE (x));
1564 /* Helper routine for all the constant cases of operand_subword.
1565 Some places invoke this directly. */
1568 constant_subword (op, offset, mode)
1571 enum machine_mode mode;
1573 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1576 /* If OP is already an integer word, return it. */
1577 if (GET_MODE_CLASS (mode) == MODE_INT
1578 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1581 /* The output is some bits, the width of the target machine's word.
1582 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1584 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1585 && GET_MODE_CLASS (mode) == MODE_FLOAT
1586 && GET_MODE_BITSIZE (mode) == 64
1587 && GET_CODE (op) == CONST_DOUBLE)
1592 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1593 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1595 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1596 which the words are written depends on the word endianness.
1597 ??? This is a potential portability problem and should
1598 be fixed at some point.
1600 We must exercise caution with the sign bit. By definition there
1601 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1602 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1603 So we explicitly mask and sign-extend as necessary. */
1604 if (BITS_PER_WORD == 32)
1607 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1608 return GEN_INT (val);
1610 #if HOST_BITS_PER_WIDE_INT >= 64
1611 else if (BITS_PER_WORD >= 64 && offset == 0)
1613 val = k[! WORDS_BIG_ENDIAN];
1614 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1615 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1616 return GEN_INT (val);
1619 else if (BITS_PER_WORD == 16)
1621 val = k[offset >> 1];
1622 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1624 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1625 return GEN_INT (val);
1630 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1631 && GET_MODE_CLASS (mode) == MODE_FLOAT
1632 && GET_MODE_BITSIZE (mode) > 64
1633 && GET_CODE (op) == CONST_DOUBLE)
1638 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1639 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1641 if (BITS_PER_WORD == 32)
1644 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1645 return GEN_INT (val);
1647 #if HOST_BITS_PER_WIDE_INT >= 64
1648 else if (BITS_PER_WORD >= 64 && offset <= 1)
1650 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1651 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1652 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1653 return GEN_INT (val);
1660 /* Single word float is a little harder, since single- and double-word
1661 values often do not have the same high-order bits. We have already
1662 verified that we want the only defined word of the single-word value. */
1663 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1664 && GET_MODE_BITSIZE (mode) == 32
1665 && GET_CODE (op) == CONST_DOUBLE)
1670 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1671 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1673 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1675 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1677 if (BITS_PER_WORD == 16)
1679 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1681 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1684 return GEN_INT (val);
1687 /* The only remaining cases that we can handle are integers.
1688 Convert to proper endianness now since these cases need it.
1689 At this point, offset == 0 means the low-order word.
1691 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1692 in general. However, if OP is (const_int 0), we can just return
1695 if (op == const0_rtx)
1698 if (GET_MODE_CLASS (mode) != MODE_INT
1699 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1700 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1703 if (WORDS_BIG_ENDIAN)
1704 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1706 /* Find out which word on the host machine this value is in and get
1707 it from the constant. */
1708 val = (offset / size_ratio == 0
1709 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1710 : (GET_CODE (op) == CONST_INT
1711 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1713 /* Get the value we want into the low bits of val. */
1714 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1715 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1717 val = trunc_int_for_mode (val, word_mode);
1719 return GEN_INT (val);
1722 /* Return subword OFFSET of operand OP.
1723 The word number, OFFSET, is interpreted as the word number starting
1724 at the low-order address. OFFSET 0 is the low-order word if not
1725 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1727 If we cannot extract the required word, we return zero. Otherwise,
1728 an rtx corresponding to the requested word will be returned.
1730 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1731 reload has completed, a valid address will always be returned. After
1732 reload, if a valid address cannot be returned, we return zero.
1734 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1735 it is the responsibility of the caller.
1737 MODE is the mode of OP in case it is a CONST_INT.
1739 ??? This is still rather broken for some cases. The problem for the
1740 moment is that all callers of this thing provide no 'goal mode' to
1741 tell us to work with. This exists because all callers were written
1742 in a word based SUBREG world.
1743 Now use of this function can be deprecated by simplify_subreg in most
1748 operand_subword (op, offset, validate_address, mode)
1750 unsigned int offset;
1751 int validate_address;
1752 enum machine_mode mode;
1754 if (mode == VOIDmode)
1755 mode = GET_MODE (op);
1757 if (mode == VOIDmode)
1760 /* If OP is narrower than a word, fail. */
1762 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1765 /* If we want a word outside OP, return zero. */
1767 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1770 /* Form a new MEM at the requested address. */
1771 if (GET_CODE (op) == MEM)
1773 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1775 if (! validate_address)
1778 else if (reload_completed)
1780 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1784 return replace_equiv_address (new, XEXP (new, 0));
1787 /* Rest can be handled by simplify_subreg. */
1788 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1791 /* Similar to `operand_subword', but never return 0. If we can't extract
1792 the required subword, put OP into a register and try again. If that fails,
1793 abort. We always validate the address in this case.
1795 MODE is the mode of OP, in case it is CONST_INT. */
1798 operand_subword_force (op, offset, mode)
1800 unsigned int offset;
1801 enum machine_mode mode;
1803 rtx result = operand_subword (op, offset, 1, mode);
1808 if (mode != BLKmode && mode != VOIDmode)
1810 /* If this is a register which can not be accessed by words, copy it
1811 to a pseudo register. */
1812 if (GET_CODE (op) == REG)
1813 op = copy_to_reg (op);
1815 op = force_reg (mode, op);
1818 result = operand_subword (op, offset, 1, mode);
1825 /* Given a compare instruction, swap the operands.
1826 A test instruction is changed into a compare of 0 against the operand. */
1829 reverse_comparison (insn)
1832 rtx body = PATTERN (insn);
1835 if (GET_CODE (body) == SET)
1836 comp = SET_SRC (body);
1838 comp = SET_SRC (XVECEXP (body, 0, 0));
1840 if (GET_CODE (comp) == COMPARE)
1842 rtx op0 = XEXP (comp, 0);
1843 rtx op1 = XEXP (comp, 1);
1844 XEXP (comp, 0) = op1;
1845 XEXP (comp, 1) = op0;
1849 rtx new = gen_rtx_COMPARE (VOIDmode,
1850 CONST0_RTX (GET_MODE (comp)), comp);
1851 if (GET_CODE (body) == SET)
1852 SET_SRC (body) = new;
1854 SET_SRC (XVECEXP (body, 0, 0)) = new;
1858 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1859 or (2) a component ref of something variable. Represent the later with
1860 a NULL expression. */
1863 component_ref_for_mem_expr (ref)
1866 tree inner = TREE_OPERAND (ref, 0);
1868 if (TREE_CODE (inner) == COMPONENT_REF)
1869 inner = component_ref_for_mem_expr (inner);
1872 tree placeholder_ptr = 0;
1874 /* Now remove any conversions: they don't change what the underlying
1875 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1876 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1877 || TREE_CODE (inner) == NON_LVALUE_EXPR
1878 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1879 || TREE_CODE (inner) == SAVE_EXPR
1880 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1881 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1882 inner = find_placeholder (inner, &placeholder_ptr);
1884 inner = TREE_OPERAND (inner, 0);
1886 if (! DECL_P (inner))
1890 if (inner == TREE_OPERAND (ref, 0))
1893 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1894 TREE_OPERAND (ref, 1));
1897 /* Given REF, a MEM, and T, either the type of X or the expression
1898 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1899 if we are making a new object of this type. BITPOS is nonzero if
1900 there is an offset outstanding on T that will be applied later. */
1903 set_mem_attributes_minus_bitpos (ref, t, objectp, bitpos)
1907 HOST_WIDE_INT bitpos;
1909 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1910 tree expr = MEM_EXPR (ref);
1911 rtx offset = MEM_OFFSET (ref);
1912 rtx size = MEM_SIZE (ref);
1913 unsigned int align = MEM_ALIGN (ref);
1914 HOST_WIDE_INT apply_bitpos = 0;
1917 /* It can happen that type_for_mode was given a mode for which there
1918 is no language-level type. In which case it returns NULL, which
1923 type = TYPE_P (t) ? t : TREE_TYPE (t);
1925 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1926 wrong answer, as it assumes that DECL_RTL already has the right alias
1927 info. Callers should not set DECL_RTL until after the call to
1928 set_mem_attributes. */
1929 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1932 /* Get the alias set from the expression or type (perhaps using a
1933 front-end routine) and use it. */
1934 alias = get_alias_set (t);
1936 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1937 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1938 RTX_UNCHANGING_P (ref)
1939 |= ((lang_hooks.honor_readonly
1940 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1941 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1943 /* If we are making an object of this type, or if this is a DECL, we know
1944 that it is a scalar if the type is not an aggregate. */
1945 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1946 MEM_SCALAR_P (ref) = 1;
1948 /* We can set the alignment from the type if we are making an object,
1949 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1950 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1951 align = MAX (align, TYPE_ALIGN (type));
1953 /* If the size is known, we can set that. */
1954 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1955 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1957 /* If T is not a type, we may be able to deduce some more information about
1961 maybe_set_unchanging (ref, t);
1962 if (TREE_THIS_VOLATILE (t))
1963 MEM_VOLATILE_P (ref) = 1;
1965 /* Now remove any conversions: they don't change what the underlying
1966 object is. Likewise for SAVE_EXPR. */
1967 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1968 || TREE_CODE (t) == NON_LVALUE_EXPR
1969 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1970 || TREE_CODE (t) == SAVE_EXPR)
1971 t = TREE_OPERAND (t, 0);
1973 /* If this expression can't be addressed (e.g., it contains a reference
1974 to a non-addressable field), show we don't change its alias set. */
1975 if (! can_address_p (t))
1976 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1978 /* If this is a decl, set the attributes of the MEM from it. */
1982 offset = const0_rtx;
1983 apply_bitpos = bitpos;
1984 size = (DECL_SIZE_UNIT (t)
1985 && host_integerp (DECL_SIZE_UNIT (t), 1)
1986 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1987 align = DECL_ALIGN (t);
1990 /* If this is a constant, we know the alignment. */
1991 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1993 align = TYPE_ALIGN (type);
1994 #ifdef CONSTANT_ALIGNMENT
1995 align = CONSTANT_ALIGNMENT (t, align);
1999 /* If this is a field reference and not a bit-field, record it. */
2000 /* ??? There is some information that can be gleened from bit-fields,
2001 such as the word offset in the structure that might be modified.
2002 But skip it for now. */
2003 else if (TREE_CODE (t) == COMPONENT_REF
2004 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
2006 expr = component_ref_for_mem_expr (t);
2007 offset = const0_rtx;
2008 apply_bitpos = bitpos;
2009 /* ??? Any reason the field size would be different than
2010 the size we got from the type? */
2013 /* If this is an array reference, look for an outer field reference. */
2014 else if (TREE_CODE (t) == ARRAY_REF)
2016 tree off_tree = size_zero_node;
2020 tree index = TREE_OPERAND (t, 1);
2021 tree array = TREE_OPERAND (t, 0);
2022 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
2023 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
2024 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
2026 /* We assume all arrays have sizes that are a multiple of a byte.
2027 First subtract the lower bound, if any, in the type of the
2028 index, then convert to sizetype and multiply by the size of the
2030 if (low_bound != 0 && ! integer_zerop (low_bound))
2031 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
2034 /* If the index has a self-referential type, pass it to a
2035 WITH_RECORD_EXPR; if the component size is, pass our
2036 component to one. */
2037 if (CONTAINS_PLACEHOLDER_P (index))
2038 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t);
2039 if (CONTAINS_PLACEHOLDER_P (unit_size))
2040 unit_size = build (WITH_RECORD_EXPR, sizetype,
2044 = fold (build (PLUS_EXPR, sizetype,
2045 fold (build (MULT_EXPR, sizetype,
2049 t = TREE_OPERAND (t, 0);
2051 while (TREE_CODE (t) == ARRAY_REF);
2057 if (host_integerp (off_tree, 1))
2059 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
2060 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
2061 align = DECL_ALIGN (t);
2062 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
2064 offset = GEN_INT (ioff);
2065 apply_bitpos = bitpos;
2068 else if (TREE_CODE (t) == COMPONENT_REF)
2070 expr = component_ref_for_mem_expr (t);
2071 if (host_integerp (off_tree, 1))
2073 offset = GEN_INT (tree_low_cst (off_tree, 1));
2074 apply_bitpos = bitpos;
2076 /* ??? Any reason the field size would be different than
2077 the size we got from the type? */
2079 else if (flag_argument_noalias > 1
2080 && TREE_CODE (t) == INDIRECT_REF
2081 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2088 /* If this is a Fortran indirect argument reference, record the
2090 else if (flag_argument_noalias > 1
2091 && TREE_CODE (t) == INDIRECT_REF
2092 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
2099 /* If we modified OFFSET based on T, then subtract the outstanding
2100 bit position offset. Similarly, increase the size of the accessed
2101 object to contain the negative offset. */
2104 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
2106 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
2109 /* Now set the attributes we computed above. */
2111 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
2113 /* If this is already known to be a scalar or aggregate, we are done. */
2114 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
2117 /* If it is a reference into an aggregate, this is part of an aggregate.
2118 Otherwise we don't know. */
2119 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
2120 || TREE_CODE (t) == ARRAY_RANGE_REF
2121 || TREE_CODE (t) == BIT_FIELD_REF)
2122 MEM_IN_STRUCT_P (ref) = 1;
2126 set_mem_attributes (ref, t, objectp)
2131 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2134 /* Set the decl for MEM to DECL. */
2137 set_mem_attrs_from_reg (mem, reg)
2142 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
2143 GEN_INT (REG_OFFSET (reg)),
2144 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2147 /* Set the alias set of MEM to SET. */
2150 set_mem_alias_set (mem, set)
2154 #ifdef ENABLE_CHECKING
2155 /* If the new and old alias sets don't conflict, something is wrong. */
2156 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
2160 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
2161 MEM_SIZE (mem), MEM_ALIGN (mem),
2165 /* Set the alignment of MEM to ALIGN bits. */
2168 set_mem_align (mem, align)
2172 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2173 MEM_OFFSET (mem), MEM_SIZE (mem), align,
2177 /* Set the expr for MEM to EXPR. */
2180 set_mem_expr (mem, expr)
2185 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
2186 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
2189 /* Set the offset of MEM to OFFSET. */
2192 set_mem_offset (mem, offset)
2195 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2196 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
2200 /* Set the size of MEM to SIZE. */
2203 set_mem_size (mem, size)
2206 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
2207 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
2211 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2212 and its address changed to ADDR. (VOIDmode means don't change the mode.
2213 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2214 returned memory location is required to be valid. The memory
2215 attributes are not changed. */
2218 change_address_1 (memref, mode, addr, validate)
2220 enum machine_mode mode;
2226 if (GET_CODE (memref) != MEM)
2228 if (mode == VOIDmode)
2229 mode = GET_MODE (memref);
2231 addr = XEXP (memref, 0);
2235 if (reload_in_progress || reload_completed)
2237 if (! memory_address_p (mode, addr))
2241 addr = memory_address (mode, addr);
2244 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2247 new = gen_rtx_MEM (mode, addr);
2248 MEM_COPY_ATTRIBUTES (new, memref);
2252 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2253 way we are changing MEMREF, so we only preserve the alias set. */
2256 change_address (memref, mode, addr)
2258 enum machine_mode mode;
2261 rtx new = change_address_1 (memref, mode, addr, 1);
2262 enum machine_mode mmode = GET_MODE (new);
2265 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
2266 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
2267 (mmode == BLKmode ? BITS_PER_UNIT
2268 : GET_MODE_ALIGNMENT (mmode)),
2274 /* Return a memory reference like MEMREF, but with its mode changed
2275 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2276 nonzero, the memory address is forced to be valid.
2277 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2278 and caller is responsible for adjusting MEMREF base register. */
2281 adjust_address_1 (memref, mode, offset, validate, adjust)
2283 enum machine_mode mode;
2284 HOST_WIDE_INT offset;
2285 int validate, adjust;
2287 rtx addr = XEXP (memref, 0);
2289 rtx memoffset = MEM_OFFSET (memref);
2291 unsigned int memalign = MEM_ALIGN (memref);
2293 /* ??? Prefer to create garbage instead of creating shared rtl.
2294 This may happen even if offset is nonzero -- consider
2295 (plus (plus reg reg) const_int) -- so do this always. */
2296 addr = copy_rtx (addr);
2300 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2301 object, we can merge it into the LO_SUM. */
2302 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2304 && (unsigned HOST_WIDE_INT) offset
2305 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2306 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
2307 plus_constant (XEXP (addr, 1), offset));
2309 addr = plus_constant (addr, offset);
2312 new = change_address_1 (memref, mode, addr, validate);
2314 /* Compute the new values of the memory attributes due to this adjustment.
2315 We add the offsets and update the alignment. */
2317 memoffset = GEN_INT (offset + INTVAL (memoffset));
2319 /* Compute the new alignment by taking the MIN of the alignment and the
2320 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2325 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2327 /* We can compute the size in a number of ways. */
2328 if (GET_MODE (new) != BLKmode)
2329 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2330 else if (MEM_SIZE (memref))
2331 size = plus_constant (MEM_SIZE (memref), -offset);
2333 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2334 memoffset, size, memalign, GET_MODE (new));
2336 /* At some point, we should validate that this offset is within the object,
2337 if all the appropriate values are known. */
2341 /* Return a memory reference like MEMREF, but with its mode changed
2342 to MODE and its address changed to ADDR, which is assumed to be
2343 MEMREF offseted by OFFSET bytes. If VALIDATE is
2344 nonzero, the memory address is forced to be valid. */
2347 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2349 enum machine_mode mode;
2351 HOST_WIDE_INT offset;
2354 memref = change_address_1 (memref, VOIDmode, addr, validate);
2355 return adjust_address_1 (memref, mode, offset, validate, 0);
2358 /* Return a memory reference like MEMREF, but whose address is changed by
2359 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2360 known to be in OFFSET (possibly 1). */
2363 offset_address (memref, offset, pow2)
2366 unsigned HOST_WIDE_INT pow2;
2368 rtx new, addr = XEXP (memref, 0);
2370 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2372 /* At this point we don't know _why_ the address is invalid. It
2373 could have secondary memory refereces, multiplies or anything.
2375 However, if we did go and rearrange things, we can wind up not
2376 being able to recognize the magic around pic_offset_table_rtx.
2377 This stuff is fragile, and is yet another example of why it is
2378 bad to expose PIC machinery too early. */
2379 if (! memory_address_p (GET_MODE (memref), new)
2380 && GET_CODE (addr) == PLUS
2381 && XEXP (addr, 0) == pic_offset_table_rtx)
2383 addr = force_reg (GET_MODE (addr), addr);
2384 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2387 update_temp_slot_address (XEXP (memref, 0), new);
2388 new = change_address_1 (memref, VOIDmode, new, 1);
2390 /* Update the alignment to reflect the offset. Reset the offset, which
2393 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2394 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2399 /* Return a memory reference like MEMREF, but with its address changed to
2400 ADDR. The caller is asserting that the actual piece of memory pointed
2401 to is the same, just the form of the address is being changed, such as
2402 by putting something into a register. */
2405 replace_equiv_address (memref, addr)
2409 /* change_address_1 copies the memory attribute structure without change
2410 and that's exactly what we want here. */
2411 update_temp_slot_address (XEXP (memref, 0), addr);
2412 return change_address_1 (memref, VOIDmode, addr, 1);
2415 /* Likewise, but the reference is not required to be valid. */
2418 replace_equiv_address_nv (memref, addr)
2422 return change_address_1 (memref, VOIDmode, addr, 0);
2425 /* Return a memory reference like MEMREF, but with its mode widened to
2426 MODE and offset by OFFSET. This would be used by targets that e.g.
2427 cannot issue QImode memory operations and have to use SImode memory
2428 operations plus masking logic. */
2431 widen_memory_access (memref, mode, offset)
2433 enum machine_mode mode;
2434 HOST_WIDE_INT offset;
2436 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2437 tree expr = MEM_EXPR (new);
2438 rtx memoffset = MEM_OFFSET (new);
2439 unsigned int size = GET_MODE_SIZE (mode);
2441 /* If we don't know what offset we were at within the expression, then
2442 we can't know if we've overstepped the bounds. */
2448 if (TREE_CODE (expr) == COMPONENT_REF)
2450 tree field = TREE_OPERAND (expr, 1);
2452 if (! DECL_SIZE_UNIT (field))
2458 /* Is the field at least as large as the access? If so, ok,
2459 otherwise strip back to the containing structure. */
2460 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2461 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2462 && INTVAL (memoffset) >= 0)
2465 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2471 expr = TREE_OPERAND (expr, 0);
2472 memoffset = (GEN_INT (INTVAL (memoffset)
2473 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2474 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2477 /* Similarly for the decl. */
2478 else if (DECL_P (expr)
2479 && DECL_SIZE_UNIT (expr)
2480 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2481 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2482 && (! memoffset || INTVAL (memoffset) >= 0))
2486 /* The widened memory access overflows the expression, which means
2487 that it could alias another expression. Zap it. */
2494 memoffset = NULL_RTX;
2496 /* The widened memory may alias other stuff, so zap the alias set. */
2497 /* ??? Maybe use get_alias_set on any remaining expression. */
2499 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2500 MEM_ALIGN (new), mode);
2505 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2510 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2511 NULL, label_num++, NULL);
2514 /* For procedure integration. */
2516 /* Install new pointers to the first and last insns in the chain.
2517 Also, set cur_insn_uid to one higher than the last in use.
2518 Used for an inline-procedure after copying the insn chain. */
2521 set_new_first_and_last_insn (first, last)
2530 for (insn = first; insn; insn = NEXT_INSN (insn))
2531 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2536 /* Set the range of label numbers found in the current function.
2537 This is used when belatedly compiling an inline function. */
2540 set_new_first_and_last_label_num (first, last)
2543 base_label_num = label_num;
2544 first_label_num = first;
2545 last_label_num = last;
2548 /* Set the last label number found in the current function.
2549 This is used when belatedly compiling an inline function. */
2552 set_new_last_label_num (last)
2555 base_label_num = label_num;
2556 last_label_num = last;
2559 /* Restore all variables describing the current status from the structure *P.
2560 This is used after a nested function. */
2563 restore_emit_status (p)
2564 struct function *p ATTRIBUTE_UNUSED;
2569 /* Go through all the RTL insn bodies and copy any invalid shared
2570 structure. This routine should only be called once. */
2573 unshare_all_rtl (fndecl, insn)
2579 /* Make sure that virtual parameters are not shared. */
2580 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2581 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2583 /* Make sure that virtual stack slots are not shared. */
2584 unshare_all_decls (DECL_INITIAL (fndecl));
2586 /* Unshare just about everything else. */
2587 unshare_all_rtl_1 (insn);
2589 /* Make sure the addresses of stack slots found outside the insn chain
2590 (such as, in DECL_RTL of a variable) are not shared
2591 with the insn chain.
2593 This special care is necessary when the stack slot MEM does not
2594 actually appear in the insn chain. If it does appear, its address
2595 is unshared from all else at that point. */
2596 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2599 /* Go through all the RTL insn bodies and copy any invalid shared
2600 structure, again. This is a fairly expensive thing to do so it
2601 should be done sparingly. */
2604 unshare_all_rtl_again (insn)
2610 for (p = insn; p; p = NEXT_INSN (p))
2613 reset_used_flags (PATTERN (p));
2614 reset_used_flags (REG_NOTES (p));
2615 reset_used_flags (LOG_LINKS (p));
2618 /* Make sure that virtual stack slots are not shared. */
2619 reset_used_decls (DECL_INITIAL (cfun->decl));
2621 /* Make sure that virtual parameters are not shared. */
2622 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2623 reset_used_flags (DECL_RTL (decl));
2625 reset_used_flags (stack_slot_list);
2627 unshare_all_rtl (cfun->decl, insn);
2630 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2631 Assumes the mark bits are cleared at entry. */
2634 unshare_all_rtl_1 (insn)
2637 for (; insn; insn = NEXT_INSN (insn))
2640 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2641 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2642 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2646 /* Go through all virtual stack slots of a function and copy any
2647 shared structure. */
2649 unshare_all_decls (blk)
2654 /* Copy shared decls. */
2655 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2656 if (DECL_RTL_SET_P (t))
2657 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2659 /* Now process sub-blocks. */
2660 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2661 unshare_all_decls (t);
2664 /* Go through all virtual stack slots of a function and mark them as
2667 reset_used_decls (blk)
2673 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2674 if (DECL_RTL_SET_P (t))
2675 reset_used_flags (DECL_RTL (t));
2677 /* Now process sub-blocks. */
2678 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2679 reset_used_decls (t);
2682 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2683 placed in the result directly, rather than being copied. MAY_SHARE is
2684 either a MEM of an EXPR_LIST of MEMs. */
2687 copy_most_rtx (orig, may_share)
2694 const char *format_ptr;
2696 if (orig == may_share
2697 || (GET_CODE (may_share) == EXPR_LIST
2698 && in_expr_list_p (may_share, orig)))
2701 code = GET_CODE (orig);
2719 copy = rtx_alloc (code);
2720 PUT_MODE (copy, GET_MODE (orig));
2721 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2722 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2723 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2724 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2725 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2727 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2729 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2731 switch (*format_ptr++)
2734 XEXP (copy, i) = XEXP (orig, i);
2735 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2736 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2740 XEXP (copy, i) = XEXP (orig, i);
2745 XVEC (copy, i) = XVEC (orig, i);
2746 if (XVEC (orig, i) != NULL)
2748 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2749 for (j = 0; j < XVECLEN (copy, i); j++)
2750 XVECEXP (copy, i, j)
2751 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2756 XWINT (copy, i) = XWINT (orig, i);
2761 XINT (copy, i) = XINT (orig, i);
2765 XTREE (copy, i) = XTREE (orig, i);
2770 XSTR (copy, i) = XSTR (orig, i);
2774 /* Copy this through the wide int field; that's safest. */
2775 X0WINT (copy, i) = X0WINT (orig, i);
2785 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2786 Recursively does the same for subexpressions. */
2789 copy_rtx_if_shared (orig)
2795 const char *format_ptr;
2801 code = GET_CODE (x);
2803 /* These types may be freely shared. */
2817 /* SCRATCH must be shared because they represent distinct values. */
2821 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2822 a LABEL_REF, it isn't sharable. */
2823 if (GET_CODE (XEXP (x, 0)) == PLUS
2824 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2825 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2834 /* The chain of insns is not being copied. */
2838 /* A MEM is allowed to be shared if its address is constant.
2840 We used to allow sharing of MEMs which referenced
2841 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2842 that can lose. instantiate_virtual_regs will not unshare
2843 the MEMs, and combine may change the structure of the address
2844 because it looks safe and profitable in one context, but
2845 in some other context it creates unrecognizable RTL. */
2846 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2855 /* This rtx may not be shared. If it has already been seen,
2856 replace it with a copy of itself. */
2858 if (RTX_FLAG (x, used))
2862 copy = rtx_alloc (code);
2864 (sizeof (*copy) - sizeof (copy->fld)
2865 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2869 RTX_FLAG (x, used) = 1;
2871 /* Now scan the subexpressions recursively.
2872 We can store any replaced subexpressions directly into X
2873 since we know X is not shared! Any vectors in X
2874 must be copied if X was copied. */
2876 format_ptr = GET_RTX_FORMAT (code);
2878 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2880 switch (*format_ptr++)
2883 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2887 if (XVEC (x, i) != NULL)
2890 int len = XVECLEN (x, i);
2892 if (copied && len > 0)
2893 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2894 for (j = 0; j < len; j++)
2895 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2903 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2904 to look for shared sub-parts. */
2907 reset_used_flags (x)
2912 const char *format_ptr;
2917 code = GET_CODE (x);
2919 /* These types may be freely shared so we needn't do any resetting
2941 /* The chain of insns is not being copied. */
2948 RTX_FLAG (x, used) = 0;
2950 format_ptr = GET_RTX_FORMAT (code);
2951 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2953 switch (*format_ptr++)
2956 reset_used_flags (XEXP (x, i));
2960 for (j = 0; j < XVECLEN (x, i); j++)
2961 reset_used_flags (XVECEXP (x, i, j));
2967 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2968 Return X or the rtx for the pseudo reg the value of X was copied into.
2969 OTHER must be valid as a SET_DEST. */
2972 make_safe_from (x, other)
2976 switch (GET_CODE (other))
2979 other = SUBREG_REG (other);
2981 case STRICT_LOW_PART:
2984 other = XEXP (other, 0);
2990 if ((GET_CODE (other) == MEM
2992 && GET_CODE (x) != REG
2993 && GET_CODE (x) != SUBREG)
2994 || (GET_CODE (other) == REG
2995 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2996 || reg_mentioned_p (other, x))))
2998 rtx temp = gen_reg_rtx (GET_MODE (x));
2999 emit_move_insn (temp, x);
3005 /* Emission of insns (adding them to the doubly-linked list). */
3007 /* Return the first insn of the current sequence or current function. */
3015 /* Specify a new insn as the first in the chain. */
3018 set_first_insn (insn)
3021 if (PREV_INSN (insn) != 0)
3026 /* Return the last insn emitted in current sequence or current function. */
3034 /* Specify a new insn as the last in the chain. */
3037 set_last_insn (insn)
3040 if (NEXT_INSN (insn) != 0)
3045 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3048 get_last_insn_anywhere ()
3050 struct sequence_stack *stack;
3053 for (stack = seq_stack; stack; stack = stack->next)
3054 if (stack->last != 0)
3059 /* Return the first nonnote insn emitted in current sequence or current
3060 function. This routine looks inside SEQUENCEs. */
3063 get_first_nonnote_insn ()
3065 rtx insn = first_insn;
3069 insn = next_insn (insn);
3070 if (insn == 0 || GET_CODE (insn) != NOTE)
3077 /* Return the last nonnote insn emitted in current sequence or current
3078 function. This routine looks inside SEQUENCEs. */
3081 get_last_nonnote_insn ()
3083 rtx insn = last_insn;
3087 insn = previous_insn (insn);
3088 if (insn == 0 || GET_CODE (insn) != NOTE)
3095 /* Return a number larger than any instruction's uid in this function. */
3100 return cur_insn_uid;
3103 /* Renumber instructions so that no instruction UIDs are wasted. */
3106 renumber_insns (stream)
3111 /* If we're not supposed to renumber instructions, don't. */
3112 if (!flag_renumber_insns)
3115 /* If there aren't that many instructions, then it's not really
3116 worth renumbering them. */
3117 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
3122 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3125 fprintf (stream, "Renumbering insn %d to %d\n",
3126 INSN_UID (insn), cur_insn_uid);
3127 INSN_UID (insn) = cur_insn_uid++;
3131 /* Return the next insn. If it is a SEQUENCE, return the first insn
3140 insn = NEXT_INSN (insn);
3141 if (insn && GET_CODE (insn) == INSN
3142 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3143 insn = XVECEXP (PATTERN (insn), 0, 0);
3149 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3153 previous_insn (insn)
3158 insn = PREV_INSN (insn);
3159 if (insn && GET_CODE (insn) == INSN
3160 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3161 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3167 /* Return the next insn after INSN that is not a NOTE. This routine does not
3168 look inside SEQUENCEs. */
3171 next_nonnote_insn (insn)
3176 insn = NEXT_INSN (insn);
3177 if (insn == 0 || GET_CODE (insn) != NOTE)
3184 /* Return the previous insn before INSN that is not a NOTE. This routine does
3185 not look inside SEQUENCEs. */
3188 prev_nonnote_insn (insn)
3193 insn = PREV_INSN (insn);
3194 if (insn == 0 || GET_CODE (insn) != NOTE)
3201 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3202 or 0, if there is none. This routine does not look inside
3206 next_real_insn (insn)
3211 insn = NEXT_INSN (insn);
3212 if (insn == 0 || GET_CODE (insn) == INSN
3213 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3220 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3221 or 0, if there is none. This routine does not look inside
3225 prev_real_insn (insn)
3230 insn = PREV_INSN (insn);
3231 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3232 || GET_CODE (insn) == JUMP_INSN)
3239 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3240 This routine does not look inside SEQUENCEs. */
3247 for (insn = get_last_insn ();
3248 insn && GET_CODE (insn) != CALL_INSN;
3249 insn = PREV_INSN (insn))
3255 /* Find the next insn after INSN that really does something. This routine
3256 does not look inside SEQUENCEs. Until reload has completed, this is the
3257 same as next_real_insn. */
3260 active_insn_p (insn)
3263 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3264 || (GET_CODE (insn) == INSN
3265 && (! reload_completed
3266 || (GET_CODE (PATTERN (insn)) != USE
3267 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3271 next_active_insn (insn)
3276 insn = NEXT_INSN (insn);
3277 if (insn == 0 || active_insn_p (insn))
3284 /* Find the last insn before INSN that really does something. This routine
3285 does not look inside SEQUENCEs. Until reload has completed, this is the
3286 same as prev_real_insn. */
3289 prev_active_insn (insn)
3294 insn = PREV_INSN (insn);
3295 if (insn == 0 || active_insn_p (insn))
3302 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3310 insn = NEXT_INSN (insn);
3311 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3318 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3326 insn = PREV_INSN (insn);
3327 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3335 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3336 and REG_CC_USER notes so we can find it. */
3339 link_cc0_insns (insn)
3342 rtx user = next_nonnote_insn (insn);
3344 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3345 user = XVECEXP (PATTERN (user), 0, 0);
3347 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3349 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3352 /* Return the next insn that uses CC0 after INSN, which is assumed to
3353 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3354 applied to the result of this function should yield INSN).
3356 Normally, this is simply the next insn. However, if a REG_CC_USER note
3357 is present, it contains the insn that uses CC0.
3359 Return 0 if we can't find the insn. */
3362 next_cc0_user (insn)
3365 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3368 return XEXP (note, 0);
3370 insn = next_nonnote_insn (insn);
3371 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3372 insn = XVECEXP (PATTERN (insn), 0, 0);
3374 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3380 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3381 note, it is the previous insn. */
3384 prev_cc0_setter (insn)
3387 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3390 return XEXP (note, 0);
3392 insn = prev_nonnote_insn (insn);
3393 if (! sets_cc0_p (PATTERN (insn)))
3400 /* Increment the label uses for all labels present in rtx. */
3403 mark_label_nuses (x)
3410 code = GET_CODE (x);
3411 if (code == LABEL_REF)
3412 LABEL_NUSES (XEXP (x, 0))++;
3414 fmt = GET_RTX_FORMAT (code);
3415 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3418 mark_label_nuses (XEXP (x, i));
3419 else if (fmt[i] == 'E')
3420 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3421 mark_label_nuses (XVECEXP (x, i, j));
3426 /* Try splitting insns that can be split for better scheduling.
3427 PAT is the pattern which might split.
3428 TRIAL is the insn providing PAT.
3429 LAST is nonzero if we should return the last insn of the sequence produced.
3431 If this routine succeeds in splitting, it returns the first or last
3432 replacement insn depending on the value of LAST. Otherwise, it
3433 returns TRIAL. If the insn to be returned can be split, it will be. */
3436 try_split (pat, trial, last)
3440 rtx before = PREV_INSN (trial);
3441 rtx after = NEXT_INSN (trial);
3442 int has_barrier = 0;
3446 rtx insn_last, insn;
3449 if (any_condjump_p (trial)
3450 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3451 split_branch_probability = INTVAL (XEXP (note, 0));
3452 probability = split_branch_probability;
3454 seq = split_insns (pat, trial);
3456 split_branch_probability = -1;
3458 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3459 We may need to handle this specially. */
3460 if (after && GET_CODE (after) == BARRIER)
3463 after = NEXT_INSN (after);
3469 /* Avoid infinite loop if any insn of the result matches
3470 the original pattern. */
3474 if (INSN_P (insn_last)
3475 && rtx_equal_p (PATTERN (insn_last), pat))
3477 if (!NEXT_INSN (insn_last))
3479 insn_last = NEXT_INSN (insn_last);
3483 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3485 if (GET_CODE (insn) == JUMP_INSN)
3487 mark_jump_label (PATTERN (insn), insn, 0);
3489 if (probability != -1
3490 && any_condjump_p (insn)
3491 && !find_reg_note (insn, REG_BR_PROB, 0))
3493 /* We can preserve the REG_BR_PROB notes only if exactly
3494 one jump is created, otherwise the machine description
3495 is responsible for this step using
3496 split_branch_probability variable. */
3500 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3501 GEN_INT (probability),
3507 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3508 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3509 if (GET_CODE (trial) == CALL_INSN)
3511 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3512 if (GET_CODE (insn) == CALL_INSN)
3514 CALL_INSN_FUNCTION_USAGE (insn)
3515 = CALL_INSN_FUNCTION_USAGE (trial);
3516 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3520 /* Copy notes, particularly those related to the CFG. */
3521 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3523 switch (REG_NOTE_KIND (note))
3527 while (insn != NULL_RTX)
3529 if (GET_CODE (insn) == CALL_INSN
3530 || (flag_non_call_exceptions
3531 && may_trap_p (PATTERN (insn))))
3533 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3536 insn = PREV_INSN (insn);
3542 case REG_ALWAYS_RETURN:
3544 while (insn != NULL_RTX)
3546 if (GET_CODE (insn) == CALL_INSN)
3548 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3551 insn = PREV_INSN (insn);
3555 case REG_NON_LOCAL_GOTO:
3557 while (insn != NULL_RTX)
3559 if (GET_CODE (insn) == JUMP_INSN)
3561 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3564 insn = PREV_INSN (insn);
3573 /* If there are LABELS inside the split insns increment the
3574 usage count so we don't delete the label. */
3575 if (GET_CODE (trial) == INSN)
3578 while (insn != NULL_RTX)
3580 if (GET_CODE (insn) == INSN)
3581 mark_label_nuses (PATTERN (insn));
3583 insn = PREV_INSN (insn);
3587 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3589 delete_insn (trial);
3591 emit_barrier_after (tem);
3593 /* Recursively call try_split for each new insn created; by the
3594 time control returns here that insn will be fully split, so
3595 set LAST and continue from the insn after the one returned.
3596 We can't use next_active_insn here since AFTER may be a note.
3597 Ignore deleted insns, which can be occur if not optimizing. */
3598 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3599 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3600 tem = try_split (PATTERN (tem), tem, 1);
3602 /* Return either the first or the last insn, depending on which was
3605 ? (after ? PREV_INSN (after) : last_insn)
3606 : NEXT_INSN (before);
3609 /* Make and return an INSN rtx, initializing all its slots.
3610 Store PATTERN in the pattern slots. */
3613 make_insn_raw (pattern)
3618 insn = rtx_alloc (INSN);
3620 INSN_UID (insn) = cur_insn_uid++;
3621 PATTERN (insn) = pattern;
3622 INSN_CODE (insn) = -1;
3623 LOG_LINKS (insn) = NULL;
3624 REG_NOTES (insn) = NULL;
3625 INSN_LOCATOR (insn) = 0;
3626 BLOCK_FOR_INSN (insn) = NULL;
3628 #ifdef ENABLE_RTL_CHECKING
3631 && (returnjump_p (insn)
3632 || (GET_CODE (insn) == SET
3633 && SET_DEST (insn) == pc_rtx)))
3635 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3643 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3646 make_jump_insn_raw (pattern)
3651 insn = rtx_alloc (JUMP_INSN);
3652 INSN_UID (insn) = cur_insn_uid++;
3654 PATTERN (insn) = pattern;
3655 INSN_CODE (insn) = -1;
3656 LOG_LINKS (insn) = NULL;
3657 REG_NOTES (insn) = NULL;
3658 JUMP_LABEL (insn) = NULL;
3659 INSN_LOCATOR (insn) = 0;
3660 BLOCK_FOR_INSN (insn) = NULL;
3665 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3668 make_call_insn_raw (pattern)
3673 insn = rtx_alloc (CALL_INSN);
3674 INSN_UID (insn) = cur_insn_uid++;
3676 PATTERN (insn) = pattern;
3677 INSN_CODE (insn) = -1;
3678 LOG_LINKS (insn) = NULL;
3679 REG_NOTES (insn) = NULL;
3680 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3681 INSN_LOCATOR (insn) = 0;
3682 BLOCK_FOR_INSN (insn) = NULL;
3687 /* Add INSN to the end of the doubly-linked list.
3688 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3694 PREV_INSN (insn) = last_insn;
3695 NEXT_INSN (insn) = 0;
3697 if (NULL != last_insn)
3698 NEXT_INSN (last_insn) = insn;
3700 if (NULL == first_insn)
3706 /* Add INSN into the doubly-linked list after insn AFTER. This and
3707 the next should be the only functions called to insert an insn once
3708 delay slots have been filled since only they know how to update a
3712 add_insn_after (insn, after)
3715 rtx next = NEXT_INSN (after);
3718 if (optimize && INSN_DELETED_P (after))
3721 NEXT_INSN (insn) = next;
3722 PREV_INSN (insn) = after;
3726 PREV_INSN (next) = insn;
3727 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3728 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3730 else if (last_insn == after)
3734 struct sequence_stack *stack = seq_stack;
3735 /* Scan all pending sequences too. */
3736 for (; stack; stack = stack->next)
3737 if (after == stack->last)
3747 if (GET_CODE (after) != BARRIER
3748 && GET_CODE (insn) != BARRIER
3749 && (bb = BLOCK_FOR_INSN (after)))
3751 set_block_for_insn (insn, bb);
3753 bb->flags |= BB_DIRTY;
3754 /* Should not happen as first in the BB is always
3755 either NOTE or LABEL. */
3756 if (bb->end == after
3757 /* Avoid clobbering of structure when creating new BB. */
3758 && GET_CODE (insn) != BARRIER
3759 && (GET_CODE (insn) != NOTE
3760 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3764 NEXT_INSN (after) = insn;
3765 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3767 rtx sequence = PATTERN (after);
3768 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3772 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3773 the previous should be the only functions called to insert an insn once
3774 delay slots have been filled since only they know how to update a
3778 add_insn_before (insn, before)
3781 rtx prev = PREV_INSN (before);
3784 if (optimize && INSN_DELETED_P (before))
3787 PREV_INSN (insn) = prev;
3788 NEXT_INSN (insn) = before;
3792 NEXT_INSN (prev) = insn;
3793 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3795 rtx sequence = PATTERN (prev);
3796 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3799 else if (first_insn == before)
3803 struct sequence_stack *stack = seq_stack;
3804 /* Scan all pending sequences too. */
3805 for (; stack; stack = stack->next)
3806 if (before == stack->first)
3808 stack->first = insn;
3816 if (GET_CODE (before) != BARRIER
3817 && GET_CODE (insn) != BARRIER
3818 && (bb = BLOCK_FOR_INSN (before)))
3820 set_block_for_insn (insn, bb);
3822 bb->flags |= BB_DIRTY;
3823 /* Should not happen as first in the BB is always
3824 either NOTE or LABEl. */
3825 if (bb->head == insn
3826 /* Avoid clobbering of structure when creating new BB. */
3827 && GET_CODE (insn) != BARRIER
3828 && (GET_CODE (insn) != NOTE
3829 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3833 PREV_INSN (before) = insn;
3834 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3835 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3838 /* Remove an insn from its doubly-linked list. This function knows how
3839 to handle sequences. */
3844 rtx next = NEXT_INSN (insn);
3845 rtx prev = PREV_INSN (insn);
3850 NEXT_INSN (prev) = next;
3851 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3853 rtx sequence = PATTERN (prev);
3854 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3857 else if (first_insn == insn)
3861 struct sequence_stack *stack = seq_stack;
3862 /* Scan all pending sequences too. */
3863 for (; stack; stack = stack->next)
3864 if (insn == stack->first)
3866 stack->first = next;
3876 PREV_INSN (next) = prev;
3877 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3878 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3880 else if (last_insn == insn)
3884 struct sequence_stack *stack = seq_stack;
3885 /* Scan all pending sequences too. */
3886 for (; stack; stack = stack->next)
3887 if (insn == stack->last)
3896 if (GET_CODE (insn) != BARRIER
3897 && (bb = BLOCK_FOR_INSN (insn)))
3900 bb->flags |= BB_DIRTY;
3901 if (bb->head == insn)
3903 /* Never ever delete the basic block note without deleting whole
3905 if (GET_CODE (insn) == NOTE)
3909 if (bb->end == insn)
3914 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3917 add_function_usage_to (call_insn, call_fusage)
3918 rtx call_insn, call_fusage;
3920 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3923 /* Put the register usage information on the CALL. If there is already
3924 some usage information, put ours at the end. */
3925 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3929 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3930 link = XEXP (link, 1))
3933 XEXP (link, 1) = call_fusage;
3936 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3939 /* Delete all insns made since FROM.
3940 FROM becomes the new last instruction. */
3943 delete_insns_since (from)
3949 NEXT_INSN (from) = 0;
3953 /* This function is deprecated, please use sequences instead.
3955 Move a consecutive bunch of insns to a different place in the chain.
3956 The insns to be moved are those between FROM and TO.
3957 They are moved to a new position after the insn AFTER.
3958 AFTER must not be FROM or TO or any insn in between.
3960 This function does not know about SEQUENCEs and hence should not be
3961 called after delay-slot filling has been done. */
3964 reorder_insns_nobb (from, to, after)
3965 rtx from, to, after;
3967 /* Splice this bunch out of where it is now. */
3968 if (PREV_INSN (from))
3969 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3971 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3972 if (last_insn == to)
3973 last_insn = PREV_INSN (from);
3974 if (first_insn == from)
3975 first_insn = NEXT_INSN (to);
3977 /* Make the new neighbors point to it and it to them. */
3978 if (NEXT_INSN (after))
3979 PREV_INSN (NEXT_INSN (after)) = to;
3981 NEXT_INSN (to) = NEXT_INSN (after);
3982 PREV_INSN (from) = after;
3983 NEXT_INSN (after) = from;
3984 if (after == last_insn)
3988 /* Same as function above, but take care to update BB boundaries. */
3990 reorder_insns (from, to, after)
3991 rtx from, to, after;
3993 rtx prev = PREV_INSN (from);
3994 basic_block bb, bb2;
3996 reorder_insns_nobb (from, to, after);
3998 if (GET_CODE (after) != BARRIER
3999 && (bb = BLOCK_FOR_INSN (after)))
4002 bb->flags |= BB_DIRTY;
4004 if (GET_CODE (from) != BARRIER
4005 && (bb2 = BLOCK_FOR_INSN (from)))
4009 bb2->flags |= BB_DIRTY;
4012 if (bb->end == after)
4015 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4016 set_block_for_insn (x, bb);
4020 /* Return the line note insn preceding INSN. */
4023 find_line_note (insn)
4026 if (no_line_numbers)
4029 for (; insn; insn = PREV_INSN (insn))
4030 if (GET_CODE (insn) == NOTE
4031 && NOTE_LINE_NUMBER (insn) >= 0)
4037 /* Like reorder_insns, but inserts line notes to preserve the line numbers
4038 of the moved insns when debugging. This may insert a note between AFTER
4039 and FROM, and another one after TO. */
4042 reorder_insns_with_line_notes (from, to, after)
4043 rtx from, to, after;
4045 rtx from_line = find_line_note (from);
4046 rtx after_line = find_line_note (after);
4048 reorder_insns (from, to, after);
4050 if (from_line == after_line)
4054 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4055 NOTE_LINE_NUMBER (from_line),
4058 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4059 NOTE_LINE_NUMBER (after_line),
4063 /* Remove unnecessary notes from the instruction stream. */
4066 remove_unnecessary_notes ()
4068 rtx block_stack = NULL_RTX;
4069 rtx eh_stack = NULL_RTX;
4074 /* We must not remove the first instruction in the function because
4075 the compiler depends on the first instruction being a note. */
4076 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
4078 /* Remember what's next. */
4079 next = NEXT_INSN (insn);
4081 /* We're only interested in notes. */
4082 if (GET_CODE (insn) != NOTE)
4085 switch (NOTE_LINE_NUMBER (insn))
4087 case NOTE_INSN_DELETED:
4088 case NOTE_INSN_LOOP_END_TOP_COND:
4092 case NOTE_INSN_EH_REGION_BEG:
4093 eh_stack = alloc_INSN_LIST (insn, eh_stack);
4096 case NOTE_INSN_EH_REGION_END:
4097 /* Too many end notes. */
4098 if (eh_stack == NULL_RTX)
4100 /* Mismatched nesting. */
4101 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
4104 eh_stack = XEXP (eh_stack, 1);
4105 free_INSN_LIST_node (tmp);
4108 case NOTE_INSN_BLOCK_BEG:
4109 /* By now, all notes indicating lexical blocks should have
4110 NOTE_BLOCK filled in. */
4111 if (NOTE_BLOCK (insn) == NULL_TREE)
4113 block_stack = alloc_INSN_LIST (insn, block_stack);
4116 case NOTE_INSN_BLOCK_END:
4117 /* Too many end notes. */
4118 if (block_stack == NULL_RTX)
4120 /* Mismatched nesting. */
4121 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
4124 block_stack = XEXP (block_stack, 1);
4125 free_INSN_LIST_node (tmp);
4127 /* Scan back to see if there are any non-note instructions
4128 between INSN and the beginning of this block. If not,
4129 then there is no PC range in the generated code that will
4130 actually be in this block, so there's no point in
4131 remembering the existence of the block. */
4132 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
4134 /* This block contains a real instruction. Note that we
4135 don't include labels; if the only thing in the block
4136 is a label, then there are still no PC values that
4137 lie within the block. */
4141 /* We're only interested in NOTEs. */
4142 if (GET_CODE (tmp) != NOTE)
4145 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
4147 /* We just verified that this BLOCK matches us with
4148 the block_stack check above. Never delete the
4149 BLOCK for the outermost scope of the function; we
4150 can refer to names from that scope even if the
4151 block notes are messed up. */
4152 if (! is_body_block (NOTE_BLOCK (insn))
4153 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
4160 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
4161 /* There's a nested block. We need to leave the
4162 current block in place since otherwise the debugger
4163 wouldn't be able to show symbols from our block in
4164 the nested block. */
4170 /* Too many begin notes. */
4171 if (block_stack || eh_stack)
4176 /* Emit insn(s) of given code and pattern
4177 at a specified place within the doubly-linked list.
4179 All of the emit_foo global entry points accept an object
4180 X which is either an insn list or a PATTERN of a single
4183 There are thus a few canonical ways to generate code and
4184 emit it at a specific place in the instruction stream. For
4185 example, consider the instruction named SPOT and the fact that
4186 we would like to emit some instructions before SPOT. We might
4190 ... emit the new instructions ...
4191 insns_head = get_insns ();
4194 emit_insn_before (insns_head, SPOT);
4196 It used to be common to generate SEQUENCE rtl instead, but that
4197 is a relic of the past which no longer occurs. The reason is that
4198 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4199 generated would almost certainly die right after it was created. */
4201 /* Make X be output before the instruction BEFORE. */
4204 emit_insn_before (x, before)
4210 #ifdef ENABLE_RTL_CHECKING
4211 if (before == NULL_RTX)
4218 switch (GET_CODE (x))
4229 rtx next = NEXT_INSN (insn);
4230 add_insn_before (insn, before);
4236 #ifdef ENABLE_RTL_CHECKING
4243 last = make_insn_raw (x);
4244 add_insn_before (last, before);
4251 /* Make an instruction with body X and code JUMP_INSN
4252 and output it before the instruction BEFORE. */
4255 emit_jump_insn_before (x, before)
4258 rtx insn, last = NULL_RTX;
4260 #ifdef ENABLE_RTL_CHECKING
4261 if (before == NULL_RTX)
4265 switch (GET_CODE (x))
4276 rtx next = NEXT_INSN (insn);
4277 add_insn_before (insn, before);
4283 #ifdef ENABLE_RTL_CHECKING
4290 last = make_jump_insn_raw (x);
4291 add_insn_before (last, before);
4298 /* Make an instruction with body X and code CALL_INSN
4299 and output it before the instruction BEFORE. */
4302 emit_call_insn_before (x, before)
4305 rtx last = NULL_RTX, insn;
4307 #ifdef ENABLE_RTL_CHECKING
4308 if (before == NULL_RTX)
4312 switch (GET_CODE (x))
4323 rtx next = NEXT_INSN (insn);
4324 add_insn_before (insn, before);
4330 #ifdef ENABLE_RTL_CHECKING
4337 last = make_call_insn_raw (x);
4338 add_insn_before (last, before);
4345 /* Make an insn of code BARRIER
4346 and output it before the insn BEFORE. */
4349 emit_barrier_before (before)
4352 rtx insn = rtx_alloc (BARRIER);
4354 INSN_UID (insn) = cur_insn_uid++;
4356 add_insn_before (insn, before);
4360 /* Emit the label LABEL before the insn BEFORE. */
4363 emit_label_before (label, before)
4366 /* This can be called twice for the same label as a result of the
4367 confusion that follows a syntax error! So make it harmless. */
4368 if (INSN_UID (label) == 0)
4370 INSN_UID (label) = cur_insn_uid++;
4371 add_insn_before (label, before);
4377 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4380 emit_note_before (subtype, before)
4384 rtx note = rtx_alloc (NOTE);
4385 INSN_UID (note) = cur_insn_uid++;
4386 NOTE_SOURCE_FILE (note) = 0;
4387 NOTE_LINE_NUMBER (note) = subtype;
4388 BLOCK_FOR_INSN (note) = NULL;
4390 add_insn_before (note, before);
4394 /* Helper for emit_insn_after, handles lists of instructions
4397 static rtx emit_insn_after_1 PARAMS ((rtx, rtx));
4400 emit_insn_after_1 (first, after)
4407 if (GET_CODE (after) != BARRIER
4408 && (bb = BLOCK_FOR_INSN (after)))
4410 bb->flags |= BB_DIRTY;
4411 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4412 if (GET_CODE (last) != BARRIER)
4413 set_block_for_insn (last, bb);
4414 if (GET_CODE (last) != BARRIER)
4415 set_block_for_insn (last, bb);
4416 if (bb->end == after)
4420 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4423 after_after = NEXT_INSN (after);
4425 NEXT_INSN (after) = first;
4426 PREV_INSN (first) = after;
4427 NEXT_INSN (last) = after_after;
4429 PREV_INSN (after_after) = last;
4431 if (after == last_insn)
4436 /* Make X be output after the insn AFTER. */
4439 emit_insn_after (x, after)
4444 #ifdef ENABLE_RTL_CHECKING
4445 if (after == NULL_RTX)
4452 switch (GET_CODE (x))
4460 last = emit_insn_after_1 (x, after);
4463 #ifdef ENABLE_RTL_CHECKING
4470 last = make_insn_raw (x);
4471 add_insn_after (last, after);
4478 /* Similar to emit_insn_after, except that line notes are to be inserted so
4479 as to act as if this insn were at FROM. */
4482 emit_insn_after_with_line_notes (x, after, from)
4485 rtx from_line = find_line_note (from);
4486 rtx after_line = find_line_note (after);
4487 rtx insn = emit_insn_after (x, after);
4490 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
4491 NOTE_LINE_NUMBER (from_line),
4495 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
4496 NOTE_LINE_NUMBER (after_line),
4500 /* Make an insn of code JUMP_INSN with body X
4501 and output it after the insn AFTER. */
4504 emit_jump_insn_after (x, after)
4509 #ifdef ENABLE_RTL_CHECKING
4510 if (after == NULL_RTX)
4514 switch (GET_CODE (x))
4522 last = emit_insn_after_1 (x, after);
4525 #ifdef ENABLE_RTL_CHECKING
4532 last = make_jump_insn_raw (x);
4533 add_insn_after (last, after);
4540 /* Make an instruction with body X and code CALL_INSN
4541 and output it after the instruction AFTER. */
4544 emit_call_insn_after (x, after)
4549 #ifdef ENABLE_RTL_CHECKING
4550 if (after == NULL_RTX)
4554 switch (GET_CODE (x))
4562 last = emit_insn_after_1 (x, after);
4565 #ifdef ENABLE_RTL_CHECKING
4572 last = make_call_insn_raw (x);
4573 add_insn_after (last, after);
4580 /* Make an insn of code BARRIER
4581 and output it after the insn AFTER. */
4584 emit_barrier_after (after)
4587 rtx insn = rtx_alloc (BARRIER);
4589 INSN_UID (insn) = cur_insn_uid++;
4591 add_insn_after (insn, after);
4595 /* Emit the label LABEL after the insn AFTER. */
4598 emit_label_after (label, after)
4601 /* This can be called twice for the same label
4602 as a result of the confusion that follows a syntax error!
4603 So make it harmless. */
4604 if (INSN_UID (label) == 0)
4606 INSN_UID (label) = cur_insn_uid++;
4607 add_insn_after (label, after);
4613 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4616 emit_note_after (subtype, after)
4620 rtx note = rtx_alloc (NOTE);
4621 INSN_UID (note) = cur_insn_uid++;
4622 NOTE_SOURCE_FILE (note) = 0;
4623 NOTE_LINE_NUMBER (note) = subtype;
4624 BLOCK_FOR_INSN (note) = NULL;
4625 add_insn_after (note, after);
4629 /* Emit a line note for FILE and LINE after the insn AFTER. */
4632 emit_line_note_after (file, line, after)
4639 if (no_line_numbers && line > 0)
4645 note = rtx_alloc (NOTE);
4646 INSN_UID (note) = cur_insn_uid++;
4647 NOTE_SOURCE_FILE (note) = file;
4648 NOTE_LINE_NUMBER (note) = line;
4649 BLOCK_FOR_INSN (note) = NULL;
4650 add_insn_after (note, after);
4654 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4656 emit_insn_after_setloc (pattern, after, loc)
4660 rtx last = emit_insn_after (pattern, after);
4662 after = NEXT_INSN (after);
4665 if (active_insn_p (after))
4666 INSN_LOCATOR (after) = loc;
4669 after = NEXT_INSN (after);
4674 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4676 emit_jump_insn_after_setloc (pattern, after, loc)
4680 rtx last = emit_jump_insn_after (pattern, after);
4682 after = NEXT_INSN (after);
4685 if (active_insn_p (after))
4686 INSN_LOCATOR (after) = loc;
4689 after = NEXT_INSN (after);
4694 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4696 emit_call_insn_after_setloc (pattern, after, loc)
4700 rtx last = emit_call_insn_after (pattern, after);
4702 after = NEXT_INSN (after);
4705 if (active_insn_p (after))
4706 INSN_LOCATOR (after) = loc;
4709 after = NEXT_INSN (after);
4714 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4716 emit_insn_before_setloc (pattern, before, loc)
4717 rtx pattern, before;
4720 rtx first = PREV_INSN (before);
4721 rtx last = emit_insn_before (pattern, before);
4723 first = NEXT_INSN (first);
4726 if (active_insn_p (first))
4727 INSN_LOCATOR (first) = loc;
4730 first = NEXT_INSN (first);
4735 /* Take X and emit it at the end of the doubly-linked
4738 Returns the last insn emitted. */
4744 rtx last = last_insn;
4750 switch (GET_CODE (x))
4761 rtx next = NEXT_INSN (insn);
4768 #ifdef ENABLE_RTL_CHECKING
4775 last = make_insn_raw (x);
4783 /* Make an insn of code JUMP_INSN with pattern X
4784 and add it to the end of the doubly-linked list. */
4790 rtx last = NULL_RTX, insn;
4792 switch (GET_CODE (x))
4803 rtx next = NEXT_INSN (insn);
4810 #ifdef ENABLE_RTL_CHECKING
4817 last = make_jump_insn_raw (x);
4825 /* Make an insn of code CALL_INSN with pattern X
4826 and add it to the end of the doubly-linked list. */
4834 switch (GET_CODE (x))
4842 insn = emit_insn (x);
4845 #ifdef ENABLE_RTL_CHECKING
4852 insn = make_call_insn_raw (x);
4860 /* Add the label LABEL to the end of the doubly-linked list. */
4866 /* This can be called twice for the same label
4867 as a result of the confusion that follows a syntax error!
4868 So make it harmless. */
4869 if (INSN_UID (label) == 0)
4871 INSN_UID (label) = cur_insn_uid++;
4877 /* Make an insn of code BARRIER
4878 and add it to the end of the doubly-linked list. */
4883 rtx barrier = rtx_alloc (BARRIER);
4884 INSN_UID (barrier) = cur_insn_uid++;
4889 /* Make an insn of code NOTE
4890 with data-fields specified by FILE and LINE
4891 and add it to the end of the doubly-linked list,
4892 but only if line-numbers are desired for debugging info. */
4895 emit_line_note (file, line)
4899 set_file_and_line_for_stmt (file, line);
4902 if (no_line_numbers)
4906 return emit_note (file, line);
4909 /* Make an insn of code NOTE
4910 with data-fields specified by FILE and LINE
4911 and add it to the end of the doubly-linked list.
4912 If it is a line-number NOTE, omit it if it matches the previous one. */
4915 emit_note (file, line)
4923 if (file && last_filename && !strcmp (file, last_filename)
4924 && line == last_linenum)
4926 last_filename = file;
4927 last_linenum = line;
4930 if (no_line_numbers && line > 0)
4936 note = rtx_alloc (NOTE);
4937 INSN_UID (note) = cur_insn_uid++;
4938 NOTE_SOURCE_FILE (note) = file;
4939 NOTE_LINE_NUMBER (note) = line;
4940 BLOCK_FOR_INSN (note) = NULL;
4945 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4948 emit_line_note_force (file, line)
4953 return emit_line_note (file, line);
4956 /* Cause next statement to emit a line note even if the line number
4957 has not changed. This is used at the beginning of a function. */
4960 force_next_line_note ()
4965 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4966 note of this type already exists, remove it first. */
4969 set_unique_reg_note (insn, kind, datum)
4974 rtx note = find_reg_note (insn, kind, NULL_RTX);
4980 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4981 has multiple sets (some callers assume single_set
4982 means the insn only has one set, when in fact it
4983 means the insn only has one * useful * set). */
4984 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4991 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4992 It serves no useful purpose and breaks eliminate_regs. */
4993 if (GET_CODE (datum) == ASM_OPERANDS)
5003 XEXP (note, 0) = datum;
5007 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
5008 return REG_NOTES (insn);
5011 /* Return an indication of which type of insn should have X as a body.
5012 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5018 if (GET_CODE (x) == CODE_LABEL)
5020 if (GET_CODE (x) == CALL)
5022 if (GET_CODE (x) == RETURN)
5024 if (GET_CODE (x) == SET)
5026 if (SET_DEST (x) == pc_rtx)
5028 else if (GET_CODE (SET_SRC (x)) == CALL)
5033 if (GET_CODE (x) == PARALLEL)
5036 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5037 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5039 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5040 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5042 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5043 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5049 /* Emit the rtl pattern X as an appropriate kind of insn.
5050 If X is a label, it is simply added into the insn chain. */
5056 enum rtx_code code = classify_insn (x);
5058 if (code == CODE_LABEL)
5059 return emit_label (x);
5060 else if (code == INSN)
5061 return emit_insn (x);
5062 else if (code == JUMP_INSN)
5064 rtx insn = emit_jump_insn (x);
5065 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5066 return emit_barrier ();
5069 else if (code == CALL_INSN)
5070 return emit_call_insn (x);
5075 /* Space for free sequence stack entries. */
5076 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
5078 /* Begin emitting insns to a sequence which can be packaged in an
5079 RTL_EXPR. If this sequence will contain something that might cause
5080 the compiler to pop arguments to function calls (because those
5081 pops have previously been deferred; see INHIBIT_DEFER_POP for more
5082 details), use do_pending_stack_adjust before calling this function.
5083 That will ensure that the deferred pops are not accidentally
5084 emitted in the middle of this sequence. */
5089 struct sequence_stack *tem;
5091 if (free_sequence_stack != NULL)
5093 tem = free_sequence_stack;
5094 free_sequence_stack = tem->next;
5097 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
5099 tem->next = seq_stack;
5100 tem->first = first_insn;
5101 tem->last = last_insn;
5102 tem->sequence_rtl_expr = seq_rtl_expr;
5110 /* Similarly, but indicate that this sequence will be placed in T, an
5111 RTL_EXPR. See the documentation for start_sequence for more
5112 information about how to use this function. */
5115 start_sequence_for_rtl_expr (t)
5123 /* Set up the insn chain starting with FIRST as the current sequence,
5124 saving the previously current one. See the documentation for
5125 start_sequence for more information about how to use this function. */
5128 push_to_sequence (first)
5135 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5141 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5144 push_to_full_sequence (first, last)
5150 /* We really should have the end of the insn chain here. */
5151 if (last && NEXT_INSN (last))
5155 /* Set up the outer-level insn chain
5156 as the current sequence, saving the previously current one. */
5159 push_topmost_sequence ()
5161 struct sequence_stack *stack, *top = NULL;
5165 for (stack = seq_stack; stack; stack = stack->next)
5168 first_insn = top->first;
5169 last_insn = top->last;
5170 seq_rtl_expr = top->sequence_rtl_expr;
5173 /* After emitting to the outer-level insn chain, update the outer-level
5174 insn chain, and restore the previous saved state. */
5177 pop_topmost_sequence ()
5179 struct sequence_stack *stack, *top = NULL;
5181 for (stack = seq_stack; stack; stack = stack->next)
5184 top->first = first_insn;
5185 top->last = last_insn;
5186 /* ??? Why don't we save seq_rtl_expr here? */
5191 /* After emitting to a sequence, restore previous saved state.
5193 To get the contents of the sequence just made, you must call
5194 `get_insns' *before* calling here.
5196 If the compiler might have deferred popping arguments while
5197 generating this sequence, and this sequence will not be immediately
5198 inserted into the instruction stream, use do_pending_stack_adjust
5199 before calling get_insns. That will ensure that the deferred
5200 pops are inserted into this sequence, and not into some random
5201 location in the instruction stream. See INHIBIT_DEFER_POP for more
5202 information about deferred popping of arguments. */
5207 struct sequence_stack *tem = seq_stack;
5209 first_insn = tem->first;
5210 last_insn = tem->last;
5211 seq_rtl_expr = tem->sequence_rtl_expr;
5212 seq_stack = tem->next;
5214 memset (tem, 0, sizeof (*tem));
5215 tem->next = free_sequence_stack;
5216 free_sequence_stack = tem;
5219 /* This works like end_sequence, but records the old sequence in FIRST
5223 end_full_sequence (first, last)
5226 *first = first_insn;
5231 /* Return 1 if currently emitting into a sequence. */
5236 return seq_stack != 0;
5239 /* Put the various virtual registers into REGNO_REG_RTX. */
5242 init_virtual_regs (es)
5243 struct emit_status *es;
5245 rtx *ptr = es->x_regno_reg_rtx;
5246 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5247 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5248 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5249 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5250 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5254 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5255 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5256 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5257 static int copy_insn_n_scratches;
5259 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5260 copied an ASM_OPERANDS.
5261 In that case, it is the original input-operand vector. */
5262 static rtvec orig_asm_operands_vector;
5264 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5265 copied an ASM_OPERANDS.
5266 In that case, it is the copied input-operand vector. */
5267 static rtvec copy_asm_operands_vector;
5269 /* Likewise for the constraints vector. */
5270 static rtvec orig_asm_constraints_vector;
5271 static rtvec copy_asm_constraints_vector;
5273 /* Recursively create a new copy of an rtx for copy_insn.
5274 This function differs from copy_rtx in that it handles SCRATCHes and
5275 ASM_OPERANDs properly.
5276 Normally, this function is not used directly; use copy_insn as front end.
5277 However, you could first copy an insn pattern with copy_insn and then use
5278 this function afterwards to properly copy any REG_NOTEs containing
5288 const char *format_ptr;
5290 code = GET_CODE (orig);
5307 for (i = 0; i < copy_insn_n_scratches; i++)
5308 if (copy_insn_scratch_in[i] == orig)
5309 return copy_insn_scratch_out[i];
5313 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5314 a LABEL_REF, it isn't sharable. */
5315 if (GET_CODE (XEXP (orig, 0)) == PLUS
5316 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5317 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5321 /* A MEM with a constant address is not sharable. The problem is that
5322 the constant address may need to be reloaded. If the mem is shared,
5323 then reloading one copy of this mem will cause all copies to appear
5324 to have been reloaded. */
5330 copy = rtx_alloc (code);
5332 /* Copy the various flags, and other information. We assume that
5333 all fields need copying, and then clear the fields that should
5334 not be copied. That is the sensible default behavior, and forces
5335 us to explicitly document why we are *not* copying a flag. */
5336 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
5338 /* We do not copy the USED flag, which is used as a mark bit during
5339 walks over the RTL. */
5340 RTX_FLAG (copy, used) = 0;
5342 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5343 if (GET_RTX_CLASS (code) == 'i')
5345 RTX_FLAG (copy, jump) = 0;
5346 RTX_FLAG (copy, call) = 0;
5347 RTX_FLAG (copy, frame_related) = 0;
5350 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5352 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5354 copy->fld[i] = orig->fld[i];
5355 switch (*format_ptr++)
5358 if (XEXP (orig, i) != NULL)
5359 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5364 if (XVEC (orig, i) == orig_asm_constraints_vector)
5365 XVEC (copy, i) = copy_asm_constraints_vector;
5366 else if (XVEC (orig, i) == orig_asm_operands_vector)
5367 XVEC (copy, i) = copy_asm_operands_vector;
5368 else if (XVEC (orig, i) != NULL)
5370 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5371 for (j = 0; j < XVECLEN (copy, i); j++)
5372 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5383 /* These are left unchanged. */
5391 if (code == SCRATCH)
5393 i = copy_insn_n_scratches++;
5394 if (i >= MAX_RECOG_OPERANDS)
5396 copy_insn_scratch_in[i] = orig;
5397 copy_insn_scratch_out[i] = copy;
5399 else if (code == ASM_OPERANDS)
5401 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5402 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5403 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5404 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5410 /* Create a new copy of an rtx.
5411 This function differs from copy_rtx in that it handles SCRATCHes and
5412 ASM_OPERANDs properly.
5413 INSN doesn't really have to be a full INSN; it could be just the
5419 copy_insn_n_scratches = 0;
5420 orig_asm_operands_vector = 0;
5421 orig_asm_constraints_vector = 0;
5422 copy_asm_operands_vector = 0;
5423 copy_asm_constraints_vector = 0;
5424 return copy_insn_1 (insn);
5427 /* Initialize data structures and variables in this file
5428 before generating rtl for each function. */
5433 struct function *f = cfun;
5435 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
5438 seq_rtl_expr = NULL;
5440 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5443 first_label_num = label_num;
5447 /* Init the tables that describe all the pseudo regs. */
5449 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5451 f->emit->regno_pointer_align
5452 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
5453 * sizeof (unsigned char));
5456 = (rtx *) ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5458 /* Put copies of all the hard registers into regno_reg_rtx. */
5459 memcpy (regno_reg_rtx,
5460 static_regno_reg_rtx,
5461 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5463 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5464 init_virtual_regs (f->emit);
5466 /* Indicate that the virtual registers and stack locations are
5468 REG_POINTER (stack_pointer_rtx) = 1;
5469 REG_POINTER (frame_pointer_rtx) = 1;
5470 REG_POINTER (hard_frame_pointer_rtx) = 1;
5471 REG_POINTER (arg_pointer_rtx) = 1;
5473 REG_POINTER (virtual_incoming_args_rtx) = 1;
5474 REG_POINTER (virtual_stack_vars_rtx) = 1;
5475 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5476 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5477 REG_POINTER (virtual_cfa_rtx) = 1;
5479 #ifdef STACK_BOUNDARY
5480 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5481 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5482 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5483 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5485 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5486 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5487 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5488 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5489 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5492 #ifdef INIT_EXPANDERS
5497 /* Generate the constant 0. */
5500 gen_const_vector_0 (mode)
5501 enum machine_mode mode;
5506 enum machine_mode inner;
5508 units = GET_MODE_NUNITS (mode);
5509 inner = GET_MODE_INNER (mode);
5511 v = rtvec_alloc (units);
5513 /* We need to call this function after we to set CONST0_RTX first. */
5514 if (!CONST0_RTX (inner))
5517 for (i = 0; i < units; ++i)
5518 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5520 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5524 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5525 all elements are zero. */
5527 gen_rtx_CONST_VECTOR (mode, v)
5528 enum machine_mode mode;
5531 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5534 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5535 if (RTVEC_ELT (v, i) != inner_zero)
5536 return gen_rtx_raw_CONST_VECTOR (mode, v);
5537 return CONST0_RTX (mode);
5540 /* Create some permanent unique rtl objects shared between all functions.
5541 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5544 init_emit_once (line_numbers)
5548 enum machine_mode mode;
5549 enum machine_mode double_mode;
5551 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5553 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5554 const_int_htab_eq, NULL);
5556 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5557 const_double_htab_eq, NULL);
5559 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5560 mem_attrs_htab_eq, NULL);
5561 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5562 reg_attrs_htab_eq, NULL);
5564 no_line_numbers = ! line_numbers;
5566 /* Compute the word and byte modes. */
5568 byte_mode = VOIDmode;
5569 word_mode = VOIDmode;
5570 double_mode = VOIDmode;
5572 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5573 mode = GET_MODE_WIDER_MODE (mode))
5575 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5576 && byte_mode == VOIDmode)
5579 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5580 && word_mode == VOIDmode)
5584 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5585 mode = GET_MODE_WIDER_MODE (mode))
5587 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5588 && double_mode == VOIDmode)
5592 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5594 /* Assign register numbers to the globally defined register rtx.
5595 This must be done at runtime because the register number field
5596 is in a union and some compilers can't initialize unions. */
5598 pc_rtx = gen_rtx (PC, VOIDmode);
5599 cc0_rtx = gen_rtx (CC0, VOIDmode);
5600 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5601 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5602 if (hard_frame_pointer_rtx == 0)
5603 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5604 HARD_FRAME_POINTER_REGNUM);
5605 if (arg_pointer_rtx == 0)
5606 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5607 virtual_incoming_args_rtx =
5608 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5609 virtual_stack_vars_rtx =
5610 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5611 virtual_stack_dynamic_rtx =
5612 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5613 virtual_outgoing_args_rtx =
5614 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5615 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5617 /* Initialize RTL for commonly used hard registers. These are
5618 copied into regno_reg_rtx as we begin to compile each function. */
5619 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5620 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5622 #ifdef INIT_EXPANDERS
5623 /* This is to initialize {init|mark|free}_machine_status before the first
5624 call to push_function_context_to. This is needed by the Chill front
5625 end which calls push_function_context_to before the first call to
5626 init_function_start. */
5630 /* Create the unique rtx's for certain rtx codes and operand values. */
5632 /* Don't use gen_rtx here since gen_rtx in this case
5633 tries to use these variables. */
5634 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5635 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5636 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5638 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5639 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5640 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5642 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5644 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5645 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5646 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5647 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5648 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5650 dconsthalf = dconst1;
5653 for (i = 0; i <= 2; i++)
5655 REAL_VALUE_TYPE *r =
5656 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5658 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5659 mode = GET_MODE_WIDER_MODE (mode))
5660 const_tiny_rtx[i][(int) mode] =
5661 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5663 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5665 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5666 mode = GET_MODE_WIDER_MODE (mode))
5667 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5669 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5671 mode = GET_MODE_WIDER_MODE (mode))
5672 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5675 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5677 mode = GET_MODE_WIDER_MODE (mode))
5678 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5680 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5682 mode = GET_MODE_WIDER_MODE (mode))
5683 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5685 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5686 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5687 const_tiny_rtx[0][i] = const0_rtx;
5689 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5690 if (STORE_FLAG_VALUE == 1)
5691 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5693 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5694 return_address_pointer_rtx
5695 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5699 struct_value_rtx = STRUCT_VALUE;
5701 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5704 #ifdef STRUCT_VALUE_INCOMING
5705 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5707 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5708 struct_value_incoming_rtx
5709 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5711 struct_value_incoming_rtx = struct_value_rtx;
5715 #ifdef STATIC_CHAIN_REGNUM
5716 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5718 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5719 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5720 static_chain_incoming_rtx
5721 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5724 static_chain_incoming_rtx = static_chain_rtx;
5728 static_chain_rtx = STATIC_CHAIN;
5730 #ifdef STATIC_CHAIN_INCOMING
5731 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5733 static_chain_incoming_rtx = static_chain_rtx;
5737 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5738 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5741 /* Query and clear/ restore no_line_numbers. This is used by the
5742 switch / case handling in stmt.c to give proper line numbers in
5743 warnings about unreachable code. */
5746 force_line_numbers ()
5748 int old = no_line_numbers;
5750 no_line_numbers = 0;
5752 force_next_line_note ();
5757 restore_line_number_status (old_value)
5760 no_line_numbers = old_value;
5763 /* Produce exact duplicate of insn INSN after AFTER.
5764 Care updating of libcall regions if present. */
5767 emit_copy_of_insn_after (insn, after)
5771 rtx note1, note2, link;
5773 switch (GET_CODE (insn))
5776 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5780 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5784 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5785 if (CALL_INSN_FUNCTION_USAGE (insn))
5786 CALL_INSN_FUNCTION_USAGE (new)
5787 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5788 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5789 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5796 /* Update LABEL_NUSES. */
5797 mark_jump_label (PATTERN (new), new, 0);
5799 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5801 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5803 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5804 if (REG_NOTE_KIND (link) != REG_LABEL)
5806 if (GET_CODE (link) == EXPR_LIST)
5808 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5813 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5818 /* Fix the libcall sequences. */
5819 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5822 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5824 XEXP (note1, 0) = p;
5825 XEXP (note2, 0) = new;
5827 INSN_CODE (new) = INSN_CODE (insn);
5831 #include "gt-emit-rtl.h"