1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
63 /* Commonly used modes. */
65 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
66 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
67 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
68 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
70 /* Datastructures maintained for currently processed function in RTL form. */
72 struct rtl_data x_rtl;
74 /* Indexed by pseudo register number, gives the rtx for that pseudo.
75 Allocated in parallel with regno_pointer_align.
76 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
77 with length attribute nested in top level structures. */
81 /* This is *not* reset after each function. It gives each CODE_LABEL
82 in the entire compilation a unique label number. */
84 static GTY(()) int label_num = 1;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these are unique; no other rtx-object will be equal to any
91 rtx global_rtl[GR_MAX];
93 /* Commonly used RTL for hard registers. These objects are not necessarily
94 unique, so we allocate them separately from global_rtl. They are
95 initialized once per compilation unit, then copied into regno_reg_rtx
96 at the beginning of each function. */
97 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
99 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
100 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
101 record a copy of const[012]_rtx. */
103 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
107 REAL_VALUE_TYPE dconst0;
108 REAL_VALUE_TYPE dconst1;
109 REAL_VALUE_TYPE dconst2;
110 REAL_VALUE_TYPE dconstm1;
111 REAL_VALUE_TYPE dconsthalf;
113 /* Record fixed-point constant 0 and 1. */
114 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
115 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
117 /* All references to the following fixed hard registers go through
118 these unique rtl objects. On machines where the frame-pointer and
119 arg-pointer are the same register, they use the same unique object.
121 After register allocation, other rtl objects which used to be pseudo-regs
122 may be clobbered to refer to the frame-pointer register.
123 But references that were originally to the frame-pointer can be
124 distinguished from the others because they contain frame_pointer_rtx.
126 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
127 tricky: until register elimination has taken place hard_frame_pointer_rtx
128 should be used if it is being set, and frame_pointer_rtx otherwise. After
129 register elimination hard_frame_pointer_rtx should always be used.
130 On machines where the two registers are same (most) then these are the
133 In an inline procedure, the stack and frame pointer rtxs may not be
134 used for anything else. */
135 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
137 /* This is used to implement __builtin_return_address for some machines.
138 See for instance the MIPS port. */
139 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
141 /* We make one copy of (const_int C) where C is in
142 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
143 to save space during the compilation and simplify comparisons of
146 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
148 /* A hash table storing CONST_INTs whose absolute value is greater
149 than MAX_SAVED_CONST_INT. */
151 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
152 htab_t const_int_htab;
154 /* A hash table storing memory attribute structures. */
155 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
156 htab_t mem_attrs_htab;
158 /* A hash table storing register attribute structures. */
159 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
160 htab_t reg_attrs_htab;
162 /* A hash table storing all CONST_DOUBLEs. */
163 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
164 htab_t const_double_htab;
166 /* A hash table storing all CONST_FIXEDs. */
167 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
168 htab_t const_fixed_htab;
170 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
171 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
172 #define last_location (crtl->emit.x_last_location)
173 #define first_label_num (crtl->emit.x_first_label_num)
175 static rtx make_call_insn_raw (rtx);
176 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
177 static void set_used_decls (tree);
178 static void mark_label_nuses (rtx);
179 static hashval_t const_int_htab_hash (const void *);
180 static int const_int_htab_eq (const void *, const void *);
181 static hashval_t const_double_htab_hash (const void *);
182 static int const_double_htab_eq (const void *, const void *);
183 static rtx lookup_const_double (rtx);
184 static hashval_t const_fixed_htab_hash (const void *);
185 static int const_fixed_htab_eq (const void *, const void *);
186 static rtx lookup_const_fixed (rtx);
187 static hashval_t mem_attrs_htab_hash (const void *);
188 static int mem_attrs_htab_eq (const void *, const void *);
189 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
190 addr_space_t, enum machine_mode);
191 static hashval_t reg_attrs_htab_hash (const void *);
192 static int reg_attrs_htab_eq (const void *, const void *);
193 static reg_attrs *get_reg_attrs (tree, int);
194 static rtx gen_const_vector (enum machine_mode, int);
195 static void copy_rtx_if_shared_1 (rtx *orig);
197 /* Probability of the conditional branch currently proceeded by try_split.
198 Set to -1 otherwise. */
199 int split_branch_probability = -1;
201 /* Returns a hash code for X (which is a really a CONST_INT). */
204 const_int_htab_hash (const void *x)
206 return (hashval_t) INTVAL ((const_rtx) x);
209 /* Returns nonzero if the value represented by X (which is really a
210 CONST_INT) is the same as that given by Y (which is really a
214 const_int_htab_eq (const void *x, const void *y)
216 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
219 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
221 const_double_htab_hash (const void *x)
223 const_rtx const value = (const_rtx) x;
226 if (GET_MODE (value) == VOIDmode)
227 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
230 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
231 /* MODE is used in the comparison, so it should be in the hash. */
232 h ^= GET_MODE (value);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...) */
240 const_double_htab_eq (const void *x, const void *y)
242 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
244 if (GET_MODE (a) != GET_MODE (b))
246 if (GET_MODE (a) == VOIDmode)
247 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
248 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
250 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
251 CONST_DOUBLE_REAL_VALUE (b));
254 /* Returns a hash code for X (which is really a CONST_FIXED). */
257 const_fixed_htab_hash (const void *x)
259 const_rtx const value = (const_rtx) x;
262 h = fixed_hash (CONST_FIXED_VALUE (value));
263 /* MODE is used in the comparison, so it should be in the hash. */
264 h ^= GET_MODE (value);
268 /* Returns nonzero if the value represented by X (really a ...)
269 is the same as that represented by Y (really a ...). */
272 const_fixed_htab_eq (const void *x, const void *y)
274 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
276 if (GET_MODE (a) != GET_MODE (b))
278 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
281 /* Returns a hash code for X (which is a really a mem_attrs *). */
284 mem_attrs_htab_hash (const void *x)
286 const mem_attrs *const p = (const mem_attrs *) x;
288 return (p->alias ^ (p->align * 1000)
289 ^ (p->addrspace * 4000)
290 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
291 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
292 ^ (size_t) iterative_hash_expr (p->expr, 0));
295 /* Returns nonzero if the value represented by X (which is really a
296 mem_attrs *) is the same as that given by Y (which is also really a
300 mem_attrs_htab_eq (const void *x, const void *y)
302 const mem_attrs *const p = (const mem_attrs *) x;
303 const mem_attrs *const q = (const mem_attrs *) y;
305 return (p->alias == q->alias && p->offset == q->offset
306 && p->size == q->size && p->align == q->align
307 && p->addrspace == q->addrspace
308 && (p->expr == q->expr
309 || (p->expr != NULL_TREE && q->expr != NULL_TREE
310 && operand_equal_p (p->expr, q->expr, 0))));
313 /* Allocate a new mem_attrs structure and insert it into the hash table if
314 one identical to it is not already in the table. We are doing this for
318 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
319 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
324 /* If everything is the default, we can just return zero.
325 This must match what the corresponding MEM_* macros return when the
326 field is not present. */
327 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
329 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
330 && (STRICT_ALIGNMENT && mode != BLKmode
331 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
336 attrs.offset = offset;
339 attrs.addrspace = addrspace;
341 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
344 *slot = ggc_alloc (sizeof (mem_attrs));
345 memcpy (*slot, &attrs, sizeof (mem_attrs));
348 return (mem_attrs *) *slot;
351 /* Returns a hash code for X (which is a really a reg_attrs *). */
354 reg_attrs_htab_hash (const void *x)
356 const reg_attrs *const p = (const reg_attrs *) x;
358 return ((p->offset * 1000) ^ (long) p->decl);
361 /* Returns nonzero if the value represented by X (which is really a
362 reg_attrs *) is the same as that given by Y (which is also really a
366 reg_attrs_htab_eq (const void *x, const void *y)
368 const reg_attrs *const p = (const reg_attrs *) x;
369 const reg_attrs *const q = (const reg_attrs *) y;
371 return (p->decl == q->decl && p->offset == q->offset);
373 /* Allocate a new reg_attrs structure and insert it into the hash table if
374 one identical to it is not already in the table. We are doing this for
378 get_reg_attrs (tree decl, int offset)
383 /* If everything is the default, we can just return zero. */
384 if (decl == 0 && offset == 0)
388 attrs.offset = offset;
390 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
393 *slot = ggc_alloc (sizeof (reg_attrs));
394 memcpy (*slot, &attrs, sizeof (reg_attrs));
397 return (reg_attrs *) *slot;
402 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
408 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
409 MEM_VOLATILE_P (x) = true;
415 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
416 don't attempt to share with the various global pieces of rtl (such as
417 frame_pointer_rtx). */
420 gen_raw_REG (enum machine_mode mode, int regno)
422 rtx x = gen_rtx_raw_REG (mode, regno);
423 ORIGINAL_REGNO (x) = regno;
427 /* There are some RTL codes that require special attention; the generation
428 functions do the raw handling. If you add to this list, modify
429 special_rtx in gengenrtl.c as well. */
432 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
436 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
437 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
439 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
440 if (const_true_rtx && arg == STORE_FLAG_VALUE)
441 return const_true_rtx;
444 /* Look up the CONST_INT in the hash table. */
445 slot = htab_find_slot_with_hash (const_int_htab, &arg,
446 (hashval_t) arg, INSERT);
448 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
454 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
456 return GEN_INT (trunc_int_for_mode (c, mode));
459 /* CONST_DOUBLEs might be created from pairs of integers, or from
460 REAL_VALUE_TYPEs. Also, their length is known only at run time,
461 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
463 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
464 hash table. If so, return its counterpart; otherwise add it
465 to the hash table and return it. */
467 lookup_const_double (rtx real)
469 void **slot = htab_find_slot (const_double_htab, real, INSERT);
476 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
477 VALUE in mode MODE. */
479 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
481 rtx real = rtx_alloc (CONST_DOUBLE);
482 PUT_MODE (real, mode);
486 return lookup_const_double (real);
489 /* Determine whether FIXED, a CONST_FIXED, already exists in the
490 hash table. If so, return its counterpart; otherwise add it
491 to the hash table and return it. */
494 lookup_const_fixed (rtx fixed)
496 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
503 /* Return a CONST_FIXED rtx for a fixed-point value specified by
504 VALUE in mode MODE. */
507 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
509 rtx fixed = rtx_alloc (CONST_FIXED);
510 PUT_MODE (fixed, mode);
514 return lookup_const_fixed (fixed);
517 /* Constructs double_int from rtx CST. */
520 rtx_to_double_int (const_rtx cst)
524 if (CONST_INT_P (cst))
525 r = shwi_to_double_int (INTVAL (cst));
526 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
528 r.low = CONST_DOUBLE_LOW (cst);
529 r.high = CONST_DOUBLE_HIGH (cst);
538 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
542 immed_double_int_const (double_int i, enum machine_mode mode)
544 return immed_double_const (i.low, i.high, mode);
547 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
548 of ints: I0 is the low-order word and I1 is the high-order word.
549 Do not use this routine for non-integer modes; convert to
550 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
553 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
558 /* There are the following cases (note that there are no modes with
559 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
561 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
563 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
564 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
565 from copies of the sign bit, and sign of i0 and i1 are the same), then
566 we return a CONST_INT for i0.
567 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
568 if (mode != VOIDmode)
570 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
571 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
572 /* We can get a 0 for an error mark. */
573 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
574 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
576 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
577 return gen_int_mode (i0, mode);
579 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
582 /* If this integer fits in one word, return a CONST_INT. */
583 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
586 /* We use VOIDmode for integers. */
587 value = rtx_alloc (CONST_DOUBLE);
588 PUT_MODE (value, VOIDmode);
590 CONST_DOUBLE_LOW (value) = i0;
591 CONST_DOUBLE_HIGH (value) = i1;
593 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
594 XWINT (value, i) = 0;
596 return lookup_const_double (value);
600 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
602 /* In case the MD file explicitly references the frame pointer, have
603 all such references point to the same frame pointer. This is
604 used during frame pointer elimination to distinguish the explicit
605 references to these registers from pseudos that happened to be
608 If we have eliminated the frame pointer or arg pointer, we will
609 be using it as a normal register, for example as a spill
610 register. In such cases, we might be accessing it in a mode that
611 is not Pmode and therefore cannot use the pre-allocated rtx.
613 Also don't do this when we are making new REGs in reload, since
614 we don't want to get confused with the real pointers. */
616 if (mode == Pmode && !reload_in_progress)
618 if (regno == FRAME_POINTER_REGNUM
619 && (!reload_completed || frame_pointer_needed))
620 return frame_pointer_rtx;
621 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
622 if (regno == HARD_FRAME_POINTER_REGNUM
623 && (!reload_completed || frame_pointer_needed))
624 return hard_frame_pointer_rtx;
626 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
627 if (regno == ARG_POINTER_REGNUM)
628 return arg_pointer_rtx;
630 #ifdef RETURN_ADDRESS_POINTER_REGNUM
631 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
632 return return_address_pointer_rtx;
634 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
635 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
636 return pic_offset_table_rtx;
637 if (regno == STACK_POINTER_REGNUM)
638 return stack_pointer_rtx;
642 /* If the per-function register table has been set up, try to re-use
643 an existing entry in that table to avoid useless generation of RTL.
645 This code is disabled for now until we can fix the various backends
646 which depend on having non-shared hard registers in some cases. Long
647 term we want to re-enable this code as it can significantly cut down
648 on the amount of useless RTL that gets generated.
650 We'll also need to fix some code that runs after reload that wants to
651 set ORIGINAL_REGNO. */
656 && regno < FIRST_PSEUDO_REGISTER
657 && reg_raw_mode[regno] == mode)
658 return regno_reg_rtx[regno];
661 return gen_raw_REG (mode, regno);
665 gen_rtx_MEM (enum machine_mode mode, rtx addr)
667 rtx rt = gen_rtx_raw_MEM (mode, addr);
669 /* This field is not cleared by the mere allocation of the rtx, so
676 /* Generate a memory referring to non-trapping constant memory. */
679 gen_const_mem (enum machine_mode mode, rtx addr)
681 rtx mem = gen_rtx_MEM (mode, addr);
682 MEM_READONLY_P (mem) = 1;
683 MEM_NOTRAP_P (mem) = 1;
687 /* Generate a MEM referring to fixed portions of the frame, e.g., register
691 gen_frame_mem (enum machine_mode mode, rtx addr)
693 rtx mem = gen_rtx_MEM (mode, addr);
694 MEM_NOTRAP_P (mem) = 1;
695 set_mem_alias_set (mem, get_frame_alias_set ());
699 /* Generate a MEM referring to a temporary use of the stack, not part
700 of the fixed stack frame. For example, something which is pushed
701 by a target splitter. */
703 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
705 rtx mem = gen_rtx_MEM (mode, addr);
706 MEM_NOTRAP_P (mem) = 1;
707 if (!cfun->calls_alloca)
708 set_mem_alias_set (mem, get_frame_alias_set ());
712 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
713 this construct would be valid, and false otherwise. */
716 validate_subreg (enum machine_mode omode, enum machine_mode imode,
717 const_rtx reg, unsigned int offset)
719 unsigned int isize = GET_MODE_SIZE (imode);
720 unsigned int osize = GET_MODE_SIZE (omode);
722 /* All subregs must be aligned. */
723 if (offset % osize != 0)
726 /* The subreg offset cannot be outside the inner object. */
730 /* ??? This should not be here. Temporarily continue to allow word_mode
731 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
732 Generally, backends are doing something sketchy but it'll take time to
734 if (omode == word_mode)
736 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
737 is the culprit here, and not the backends. */
738 else if (osize >= UNITS_PER_WORD && isize >= osize)
740 /* Allow component subregs of complex and vector. Though given the below
741 extraction rules, it's not always clear what that means. */
742 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
743 && GET_MODE_INNER (imode) == omode)
745 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
746 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
747 represent this. It's questionable if this ought to be represented at
748 all -- why can't this all be hidden in post-reload splitters that make
749 arbitrarily mode changes to the registers themselves. */
750 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
752 /* Subregs involving floating point modes are not allowed to
753 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
754 (subreg:SI (reg:DF) 0) isn't. */
755 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
761 /* Paradoxical subregs must have offset zero. */
765 /* This is a normal subreg. Verify that the offset is representable. */
767 /* For hard registers, we already have most of these rules collected in
768 subreg_offset_representable_p. */
769 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
771 unsigned int regno = REGNO (reg);
773 #ifdef CANNOT_CHANGE_MODE_CLASS
774 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
775 && GET_MODE_INNER (imode) == omode)
777 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
781 return subreg_offset_representable_p (regno, imode, offset, omode);
784 /* For pseudo registers, we want most of the same checks. Namely:
785 If the register no larger than a word, the subreg must be lowpart.
786 If the register is larger than a word, the subreg must be the lowpart
787 of a subword. A subreg does *not* perform arbitrary bit extraction.
788 Given that we've already checked mode/offset alignment, we only have
789 to check subword subregs here. */
790 if (osize < UNITS_PER_WORD)
792 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
793 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
794 if (offset % UNITS_PER_WORD != low_off)
801 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
803 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
804 return gen_rtx_raw_SUBREG (mode, reg, offset);
807 /* Generate a SUBREG representing the least-significant part of REG if MODE
808 is smaller than mode of REG, otherwise paradoxical SUBREG. */
811 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
813 enum machine_mode inmode;
815 inmode = GET_MODE (reg);
816 if (inmode == VOIDmode)
818 return gen_rtx_SUBREG (mode, reg,
819 subreg_lowpart_offset (mode, inmode));
823 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
826 gen_rtvec (int n, ...)
834 /* Don't allocate an empty rtvec... */
838 rt_val = rtvec_alloc (n);
840 for (i = 0; i < n; i++)
841 rt_val->elem[i] = va_arg (p, rtx);
848 gen_rtvec_v (int n, rtx *argp)
853 /* Don't allocate an empty rtvec... */
857 rt_val = rtvec_alloc (n);
859 for (i = 0; i < n; i++)
860 rt_val->elem[i] = *argp++;
865 /* Return the number of bytes between the start of an OUTER_MODE
866 in-memory value and the start of an INNER_MODE in-memory value,
867 given that the former is a lowpart of the latter. It may be a
868 paradoxical lowpart, in which case the offset will be negative
869 on big-endian targets. */
872 byte_lowpart_offset (enum machine_mode outer_mode,
873 enum machine_mode inner_mode)
875 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
876 return subreg_lowpart_offset (outer_mode, inner_mode);
878 return -subreg_lowpart_offset (inner_mode, outer_mode);
881 /* Generate a REG rtx for a new pseudo register of mode MODE.
882 This pseudo is assigned the next sequential register number. */
885 gen_reg_rtx (enum machine_mode mode)
888 unsigned int align = GET_MODE_ALIGNMENT (mode);
890 gcc_assert (can_create_pseudo_p ());
892 /* If a virtual register with bigger mode alignment is generated,
893 increase stack alignment estimation because it might be spilled
895 if (SUPPORTS_STACK_ALIGNMENT
896 && crtl->stack_alignment_estimated < align
897 && !crtl->stack_realign_processed)
899 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
900 if (crtl->stack_alignment_estimated < min_align)
901 crtl->stack_alignment_estimated = min_align;
904 if (generating_concat_p
905 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
906 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
908 /* For complex modes, don't make a single pseudo.
909 Instead, make a CONCAT of two pseudos.
910 This allows noncontiguous allocation of the real and imaginary parts,
911 which makes much better code. Besides, allocating DCmode
912 pseudos overstrains reload on some machines like the 386. */
913 rtx realpart, imagpart;
914 enum machine_mode partmode = GET_MODE_INNER (mode);
916 realpart = gen_reg_rtx (partmode);
917 imagpart = gen_reg_rtx (partmode);
918 return gen_rtx_CONCAT (mode, realpart, imagpart);
921 /* Make sure regno_pointer_align, and regno_reg_rtx are large
922 enough to have an element for this pseudo reg number. */
924 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
926 int old_size = crtl->emit.regno_pointer_align_length;
930 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
931 memset (tmp + old_size, 0, old_size);
932 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
934 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
935 memset (new1 + old_size, 0, old_size * sizeof (rtx));
936 regno_reg_rtx = new1;
938 crtl->emit.regno_pointer_align_length = old_size * 2;
941 val = gen_raw_REG (mode, reg_rtx_no);
942 regno_reg_rtx[reg_rtx_no++] = val;
946 /* Update NEW with the same attributes as REG, but with OFFSET added
947 to the REG_OFFSET. */
950 update_reg_offset (rtx new_rtx, rtx reg, int offset)
952 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
953 REG_OFFSET (reg) + offset);
956 /* Generate a register with same attributes as REG, but with OFFSET
957 added to the REG_OFFSET. */
960 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
963 rtx new_rtx = gen_rtx_REG (mode, regno);
965 update_reg_offset (new_rtx, reg, offset);
969 /* Generate a new pseudo-register with the same attributes as REG, but
970 with OFFSET added to the REG_OFFSET. */
973 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
975 rtx new_rtx = gen_reg_rtx (mode);
977 update_reg_offset (new_rtx, reg, offset);
981 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
982 new register is a (possibly paradoxical) lowpart of the old one. */
985 adjust_reg_mode (rtx reg, enum machine_mode mode)
987 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
988 PUT_MODE (reg, mode);
991 /* Copy REG's attributes from X, if X has any attributes. If REG and X
992 have different modes, REG is a (possibly paradoxical) lowpart of X. */
995 set_reg_attrs_from_value (rtx reg, rtx x)
999 /* Hard registers can be reused for multiple purposes within the same
1000 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1001 on them is wrong. */
1002 if (HARD_REGISTER_P (reg))
1005 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1008 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
1010 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
1011 if (MEM_POINTER (x))
1012 mark_reg_pointer (reg, 0);
1017 update_reg_offset (reg, x, offset);
1018 if (REG_POINTER (x))
1019 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1023 /* Generate a REG rtx for a new pseudo register, copying the mode
1024 and attributes from X. */
1027 gen_reg_rtx_and_attrs (rtx x)
1029 rtx reg = gen_reg_rtx (GET_MODE (x));
1030 set_reg_attrs_from_value (reg, x);
1034 /* Set the register attributes for registers contained in PARM_RTX.
1035 Use needed values from memory attributes of MEM. */
1038 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1040 if (REG_P (parm_rtx))
1041 set_reg_attrs_from_value (parm_rtx, mem);
1042 else if (GET_CODE (parm_rtx) == PARALLEL)
1044 /* Check for a NULL entry in the first slot, used to indicate that the
1045 parameter goes both on the stack and in registers. */
1046 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1047 for (; i < XVECLEN (parm_rtx, 0); i++)
1049 rtx x = XVECEXP (parm_rtx, 0, i);
1050 if (REG_P (XEXP (x, 0)))
1051 REG_ATTRS (XEXP (x, 0))
1052 = get_reg_attrs (MEM_EXPR (mem),
1053 INTVAL (XEXP (x, 1)));
1058 /* Set the REG_ATTRS for registers in value X, given that X represents
1062 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1064 if (GET_CODE (x) == SUBREG)
1066 gcc_assert (subreg_lowpart_p (x));
1071 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1073 if (GET_CODE (x) == CONCAT)
1075 if (REG_P (XEXP (x, 0)))
1076 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1077 if (REG_P (XEXP (x, 1)))
1078 REG_ATTRS (XEXP (x, 1))
1079 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1081 if (GET_CODE (x) == PARALLEL)
1085 /* Check for a NULL entry, used to indicate that the parameter goes
1086 both on the stack and in registers. */
1087 if (XEXP (XVECEXP (x, 0, 0), 0))
1092 for (i = start; i < XVECLEN (x, 0); i++)
1094 rtx y = XVECEXP (x, 0, i);
1095 if (REG_P (XEXP (y, 0)))
1096 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1101 /* Assign the RTX X to declaration T. */
1104 set_decl_rtl (tree t, rtx x)
1106 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1108 set_reg_attrs_for_decl_rtl (t, x);
1111 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1112 if the ABI requires the parameter to be passed by reference. */
1115 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1117 DECL_INCOMING_RTL (t) = x;
1118 if (x && !by_reference_p)
1119 set_reg_attrs_for_decl_rtl (t, x);
1122 /* Identify REG (which may be a CONCAT) as a user register. */
1125 mark_user_reg (rtx reg)
1127 if (GET_CODE (reg) == CONCAT)
1129 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1130 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1134 gcc_assert (REG_P (reg));
1135 REG_USERVAR_P (reg) = 1;
1139 /* Identify REG as a probable pointer register and show its alignment
1140 as ALIGN, if nonzero. */
1143 mark_reg_pointer (rtx reg, int align)
1145 if (! REG_POINTER (reg))
1147 REG_POINTER (reg) = 1;
1150 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1152 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1153 /* We can no-longer be sure just how aligned this pointer is. */
1154 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1157 /* Return 1 plus largest pseudo reg number used in the current function. */
1165 /* Return 1 + the largest label number used so far in the current function. */
1168 max_label_num (void)
1173 /* Return first label number used in this function (if any were used). */
1176 get_first_label_num (void)
1178 return first_label_num;
1181 /* If the rtx for label was created during the expansion of a nested
1182 function, then first_label_num won't include this label number.
1183 Fix this now so that array indices work later. */
1186 maybe_set_first_label_num (rtx x)
1188 if (CODE_LABEL_NUMBER (x) < first_label_num)
1189 first_label_num = CODE_LABEL_NUMBER (x);
1192 /* Return a value representing some low-order bits of X, where the number
1193 of low-order bits is given by MODE. Note that no conversion is done
1194 between floating-point and fixed-point values, rather, the bit
1195 representation is returned.
1197 This function handles the cases in common between gen_lowpart, below,
1198 and two variants in cse.c and combine.c. These are the cases that can
1199 be safely handled at all points in the compilation.
1201 If this is not a case we can handle, return 0. */
1204 gen_lowpart_common (enum machine_mode mode, rtx x)
1206 int msize = GET_MODE_SIZE (mode);
1209 enum machine_mode innermode;
1211 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1212 so we have to make one up. Yuk. */
1213 innermode = GET_MODE (x);
1215 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1216 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1217 else if (innermode == VOIDmode)
1218 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1220 xsize = GET_MODE_SIZE (innermode);
1222 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1224 if (innermode == mode)
1227 /* MODE must occupy no more words than the mode of X. */
1228 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1229 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1232 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1233 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1236 offset = subreg_lowpart_offset (mode, innermode);
1238 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1239 && (GET_MODE_CLASS (mode) == MODE_INT
1240 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1242 /* If we are getting the low-order part of something that has been
1243 sign- or zero-extended, we can either just use the object being
1244 extended or make a narrower extension. If we want an even smaller
1245 piece than the size of the object being extended, call ourselves
1248 This case is used mostly by combine and cse. */
1250 if (GET_MODE (XEXP (x, 0)) == mode)
1252 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1253 return gen_lowpart_common (mode, XEXP (x, 0));
1254 else if (msize < xsize)
1255 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1257 else if (GET_CODE (x) == SUBREG || REG_P (x)
1258 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1259 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1260 return simplify_gen_subreg (mode, x, innermode, offset);
1262 /* Otherwise, we can't do this. */
1267 gen_highpart (enum machine_mode mode, rtx x)
1269 unsigned int msize = GET_MODE_SIZE (mode);
1272 /* This case loses if X is a subreg. To catch bugs early,
1273 complain if an invalid MODE is used even in other cases. */
1274 gcc_assert (msize <= UNITS_PER_WORD
1275 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1277 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1278 subreg_highpart_offset (mode, GET_MODE (x)));
1279 gcc_assert (result);
1281 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1282 the target if we have a MEM. gen_highpart must return a valid operand,
1283 emitting code if necessary to do so. */
1286 result = validize_mem (result);
1287 gcc_assert (result);
1293 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1294 be VOIDmode constant. */
1296 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1298 if (GET_MODE (exp) != VOIDmode)
1300 gcc_assert (GET_MODE (exp) == innermode);
1301 return gen_highpart (outermode, exp);
1303 return simplify_gen_subreg (outermode, exp, innermode,
1304 subreg_highpart_offset (outermode, innermode));
1307 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1310 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1312 unsigned int offset = 0;
1313 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1317 if (WORDS_BIG_ENDIAN)
1318 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1319 if (BYTES_BIG_ENDIAN)
1320 offset += difference % UNITS_PER_WORD;
1326 /* Return offset in bytes to get OUTERMODE high part
1327 of the value in mode INNERMODE stored in memory in target format. */
1329 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1331 unsigned int offset = 0;
1332 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1334 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1338 if (! WORDS_BIG_ENDIAN)
1339 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1340 if (! BYTES_BIG_ENDIAN)
1341 offset += difference % UNITS_PER_WORD;
1347 /* Return 1 iff X, assumed to be a SUBREG,
1348 refers to the least significant part of its containing reg.
1349 If X is not a SUBREG, always return 1 (it is its own low part!). */
1352 subreg_lowpart_p (const_rtx x)
1354 if (GET_CODE (x) != SUBREG)
1356 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1359 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1360 == SUBREG_BYTE (x));
1363 /* Return subword OFFSET of operand OP.
1364 The word number, OFFSET, is interpreted as the word number starting
1365 at the low-order address. OFFSET 0 is the low-order word if not
1366 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1368 If we cannot extract the required word, we return zero. Otherwise,
1369 an rtx corresponding to the requested word will be returned.
1371 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1372 reload has completed, a valid address will always be returned. After
1373 reload, if a valid address cannot be returned, we return zero.
1375 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1376 it is the responsibility of the caller.
1378 MODE is the mode of OP in case it is a CONST_INT.
1380 ??? This is still rather broken for some cases. The problem for the
1381 moment is that all callers of this thing provide no 'goal mode' to
1382 tell us to work with. This exists because all callers were written
1383 in a word based SUBREG world.
1384 Now use of this function can be deprecated by simplify_subreg in most
1389 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1391 if (mode == VOIDmode)
1392 mode = GET_MODE (op);
1394 gcc_assert (mode != VOIDmode);
1396 /* If OP is narrower than a word, fail. */
1398 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1401 /* If we want a word outside OP, return zero. */
1403 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1406 /* Form a new MEM at the requested address. */
1409 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1411 if (! validate_address)
1414 else if (reload_completed)
1416 if (! strict_memory_address_addr_space_p (word_mode,
1418 MEM_ADDR_SPACE (op)))
1422 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1425 /* Rest can be handled by simplify_subreg. */
1426 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1429 /* Similar to `operand_subword', but never return 0. If we can't
1430 extract the required subword, put OP into a register and try again.
1431 The second attempt must succeed. We always validate the address in
1434 MODE is the mode of OP, in case it is CONST_INT. */
1437 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1439 rtx result = operand_subword (op, offset, 1, mode);
1444 if (mode != BLKmode && mode != VOIDmode)
1446 /* If this is a register which can not be accessed by words, copy it
1447 to a pseudo register. */
1449 op = copy_to_reg (op);
1451 op = force_reg (mode, op);
1454 result = operand_subword (op, offset, 1, mode);
1455 gcc_assert (result);
1460 /* Returns 1 if both MEM_EXPR can be considered equal
1464 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1469 if (! expr1 || ! expr2)
1472 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1475 return operand_equal_p (expr1, expr2, 0);
1478 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1479 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1483 get_mem_align_offset (rtx mem, unsigned int align)
1486 unsigned HOST_WIDE_INT offset;
1488 /* This function can't use
1489 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1490 || !CONST_INT_P (MEM_OFFSET (mem))
1491 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1495 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1497 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1498 for <variable>. get_inner_reference doesn't handle it and
1499 even if it did, the alignment in that case needs to be determined
1500 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1501 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1502 isn't sufficiently aligned, the object it is in might be. */
1503 gcc_assert (MEM_P (mem));
1504 expr = MEM_EXPR (mem);
1505 if (expr == NULL_TREE
1506 || MEM_OFFSET (mem) == NULL_RTX
1507 || !CONST_INT_P (MEM_OFFSET (mem)))
1510 offset = INTVAL (MEM_OFFSET (mem));
1513 if (DECL_ALIGN (expr) < align)
1516 else if (INDIRECT_REF_P (expr))
1518 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1521 else if (TREE_CODE (expr) == COMPONENT_REF)
1525 tree inner = TREE_OPERAND (expr, 0);
1526 tree field = TREE_OPERAND (expr, 1);
1527 tree byte_offset = component_ref_field_offset (expr);
1528 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1531 || !host_integerp (byte_offset, 1)
1532 || !host_integerp (bit_offset, 1))
1535 offset += tree_low_cst (byte_offset, 1);
1536 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1538 if (inner == NULL_TREE)
1540 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1541 < (unsigned int) align)
1545 else if (DECL_P (inner))
1547 if (DECL_ALIGN (inner) < align)
1551 else if (TREE_CODE (inner) != COMPONENT_REF)
1559 return offset & ((align / BITS_PER_UNIT) - 1);
1562 /* Given REF (a MEM) and T, either the type of X or the expression
1563 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1564 if we are making a new object of this type. BITPOS is nonzero if
1565 there is an offset outstanding on T that will be applied later. */
1568 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1569 HOST_WIDE_INT bitpos)
1571 alias_set_type alias = MEM_ALIAS_SET (ref);
1572 tree expr = MEM_EXPR (ref);
1573 rtx offset = MEM_OFFSET (ref);
1574 rtx size = MEM_SIZE (ref);
1575 unsigned int align = MEM_ALIGN (ref);
1576 HOST_WIDE_INT apply_bitpos = 0;
1579 /* It can happen that type_for_mode was given a mode for which there
1580 is no language-level type. In which case it returns NULL, which
1585 type = TYPE_P (t) ? t : TREE_TYPE (t);
1586 if (type == error_mark_node)
1589 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1590 wrong answer, as it assumes that DECL_RTL already has the right alias
1591 info. Callers should not set DECL_RTL until after the call to
1592 set_mem_attributes. */
1593 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1595 /* Get the alias set from the expression or type (perhaps using a
1596 front-end routine) and use it. */
1597 alias = get_alias_set (t);
1599 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1600 MEM_IN_STRUCT_P (ref)
1601 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1602 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1604 /* If we are making an object of this type, or if this is a DECL, we know
1605 that it is a scalar if the type is not an aggregate. */
1606 if ((objectp || DECL_P (t))
1607 && ! AGGREGATE_TYPE_P (type)
1608 && TREE_CODE (type) != COMPLEX_TYPE)
1609 MEM_SCALAR_P (ref) = 1;
1611 /* We can set the alignment from the type if we are making an object,
1612 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1613 if (objectp || TREE_CODE (t) == INDIRECT_REF
1614 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1615 || TYPE_ALIGN_OK (type))
1616 align = MAX (align, TYPE_ALIGN (type));
1618 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1620 if (integer_zerop (TREE_OPERAND (t, 1)))
1621 /* We don't know anything about the alignment. */
1622 align = BITS_PER_UNIT;
1624 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1627 /* If the size is known, we can set that. */
1628 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1629 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1631 /* If T is not a type, we may be able to deduce some more information about
1636 bool align_computed = false;
1638 if (TREE_THIS_VOLATILE (t))
1639 MEM_VOLATILE_P (ref) = 1;
1641 /* Now remove any conversions: they don't change what the underlying
1642 object is. Likewise for SAVE_EXPR. */
1643 while (CONVERT_EXPR_P (t)
1644 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1645 || TREE_CODE (t) == SAVE_EXPR)
1646 t = TREE_OPERAND (t, 0);
1648 /* We may look through structure-like accesses for the purposes of
1649 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1651 while (TREE_CODE (base) == COMPONENT_REF
1652 || TREE_CODE (base) == REALPART_EXPR
1653 || TREE_CODE (base) == IMAGPART_EXPR
1654 || TREE_CODE (base) == BIT_FIELD_REF)
1655 base = TREE_OPERAND (base, 0);
1659 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1660 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1662 MEM_NOTRAP_P (ref) = 1;
1665 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1667 base = get_base_address (base);
1668 if (base && DECL_P (base)
1669 && TREE_READONLY (base)
1670 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1672 tree base_type = TREE_TYPE (base);
1673 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1674 || DECL_ARTIFICIAL (base));
1675 MEM_READONLY_P (ref) = 1;
1678 /* If this expression uses it's parent's alias set, mark it such
1679 that we won't change it. */
1680 if (component_uses_parent_alias_set (t))
1681 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1683 /* If this is a decl, set the attributes of the MEM from it. */
1687 offset = const0_rtx;
1688 apply_bitpos = bitpos;
1689 size = (DECL_SIZE_UNIT (t)
1690 && host_integerp (DECL_SIZE_UNIT (t), 1)
1691 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1692 align = DECL_ALIGN (t);
1693 align_computed = true;
1696 /* If this is a constant, we know the alignment. */
1697 else if (CONSTANT_CLASS_P (t))
1699 align = TYPE_ALIGN (type);
1700 #ifdef CONSTANT_ALIGNMENT
1701 align = CONSTANT_ALIGNMENT (t, align);
1703 align_computed = true;
1706 /* If this is a field reference and not a bit-field, record it. */
1707 /* ??? There is some information that can be gleaned from bit-fields,
1708 such as the word offset in the structure that might be modified.
1709 But skip it for now. */
1710 else if (TREE_CODE (t) == COMPONENT_REF
1711 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1714 offset = const0_rtx;
1715 apply_bitpos = bitpos;
1716 /* ??? Any reason the field size would be different than
1717 the size we got from the type? */
1720 /* If this is an array reference, look for an outer field reference. */
1721 else if (TREE_CODE (t) == ARRAY_REF)
1723 tree off_tree = size_zero_node;
1724 /* We can't modify t, because we use it at the end of the
1730 tree index = TREE_OPERAND (t2, 1);
1731 tree low_bound = array_ref_low_bound (t2);
1732 tree unit_size = array_ref_element_size (t2);
1734 /* We assume all arrays have sizes that are a multiple of a byte.
1735 First subtract the lower bound, if any, in the type of the
1736 index, then convert to sizetype and multiply by the size of
1737 the array element. */
1738 if (! integer_zerop (low_bound))
1739 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1742 off_tree = size_binop (PLUS_EXPR,
1743 size_binop (MULT_EXPR,
1744 fold_convert (sizetype,
1748 t2 = TREE_OPERAND (t2, 0);
1750 while (TREE_CODE (t2) == ARRAY_REF);
1756 if (host_integerp (off_tree, 1))
1758 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1759 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1760 align = DECL_ALIGN (t2);
1761 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1763 align_computed = true;
1764 offset = GEN_INT (ioff);
1765 apply_bitpos = bitpos;
1768 else if (TREE_CODE (t2) == COMPONENT_REF)
1772 if (host_integerp (off_tree, 1))
1774 offset = GEN_INT (tree_low_cst (off_tree, 1));
1775 apply_bitpos = bitpos;
1777 /* ??? Any reason the field size would be different than
1778 the size we got from the type? */
1781 /* If this is an indirect reference, record it. */
1782 else if (TREE_CODE (t) == INDIRECT_REF
1783 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1786 offset = const0_rtx;
1787 apply_bitpos = bitpos;
1791 /* If this is an indirect reference, record it. */
1792 else if (TREE_CODE (t) == INDIRECT_REF
1793 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1796 offset = const0_rtx;
1797 apply_bitpos = bitpos;
1800 if (!align_computed && !INDIRECT_REF_P (t))
1802 unsigned int obj_align
1803 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1804 align = MAX (align, obj_align);
1808 /* If we modified OFFSET based on T, then subtract the outstanding
1809 bit position offset. Similarly, increase the size of the accessed
1810 object to contain the negative offset. */
1813 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1815 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1818 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1820 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1821 we're overlapping. */
1826 /* Now set the attributes we computed above. */
1828 = get_mem_attrs (alias, expr, offset, size, align,
1829 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1831 /* If this is already known to be a scalar or aggregate, we are done. */
1832 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1835 /* If it is a reference into an aggregate, this is part of an aggregate.
1836 Otherwise we don't know. */
1837 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1838 || TREE_CODE (t) == ARRAY_RANGE_REF
1839 || TREE_CODE (t) == BIT_FIELD_REF)
1840 MEM_IN_STRUCT_P (ref) = 1;
1844 set_mem_attributes (rtx ref, tree t, int objectp)
1846 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1849 /* Set the alias set of MEM to SET. */
1852 set_mem_alias_set (rtx mem, alias_set_type set)
1854 #ifdef ENABLE_CHECKING
1855 /* If the new and old alias sets don't conflict, something is wrong. */
1856 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1859 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1860 MEM_SIZE (mem), MEM_ALIGN (mem),
1861 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1864 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1867 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1869 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1870 MEM_OFFSET (mem), MEM_SIZE (mem),
1871 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1874 /* Set the alignment of MEM to ALIGN bits. */
1877 set_mem_align (rtx mem, unsigned int align)
1879 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1880 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1881 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1884 /* Set the expr for MEM to EXPR. */
1887 set_mem_expr (rtx mem, tree expr)
1890 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1891 MEM_SIZE (mem), MEM_ALIGN (mem),
1892 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1895 /* Set the offset of MEM to OFFSET. */
1898 set_mem_offset (rtx mem, rtx offset)
1900 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1901 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1902 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1905 /* Set the size of MEM to SIZE. */
1908 set_mem_size (rtx mem, rtx size)
1910 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1911 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1912 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1915 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1916 and its address changed to ADDR. (VOIDmode means don't change the mode.
1917 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1918 returned memory location is required to be valid. The memory
1919 attributes are not changed. */
1922 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1927 gcc_assert (MEM_P (memref));
1928 as = MEM_ADDR_SPACE (memref);
1929 if (mode == VOIDmode)
1930 mode = GET_MODE (memref);
1932 addr = XEXP (memref, 0);
1933 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1934 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1939 if (reload_in_progress || reload_completed)
1940 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1942 addr = memory_address_addr_space (mode, addr, as);
1945 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1948 new_rtx = gen_rtx_MEM (mode, addr);
1949 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1953 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1954 way we are changing MEMREF, so we only preserve the alias set. */
1957 change_address (rtx memref, enum machine_mode mode, rtx addr)
1959 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1960 enum machine_mode mmode = GET_MODE (new_rtx);
1963 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1964 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1966 /* If there are no changes, just return the original memory reference. */
1967 if (new_rtx == memref)
1969 if (MEM_ATTRS (memref) == 0
1970 || (MEM_EXPR (memref) == NULL
1971 && MEM_OFFSET (memref) == NULL
1972 && MEM_SIZE (memref) == size
1973 && MEM_ALIGN (memref) == align))
1976 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1977 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1981 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1982 MEM_ADDR_SPACE (memref), mmode);
1987 /* Return a memory reference like MEMREF, but with its mode changed
1988 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1989 nonzero, the memory address is forced to be valid.
1990 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1991 and caller is responsible for adjusting MEMREF base register. */
1994 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1995 int validate, int adjust)
1997 rtx addr = XEXP (memref, 0);
1999 rtx memoffset = MEM_OFFSET (memref);
2001 unsigned int memalign = MEM_ALIGN (memref);
2002 addr_space_t as = MEM_ADDR_SPACE (memref);
2003 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2006 /* If there are no changes, just return the original memory reference. */
2007 if (mode == GET_MODE (memref) && !offset
2008 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2011 /* ??? Prefer to create garbage instead of creating shared rtl.
2012 This may happen even if offset is nonzero -- consider
2013 (plus (plus reg reg) const_int) -- so do this always. */
2014 addr = copy_rtx (addr);
2016 /* Convert a possibly large offset to a signed value within the
2017 range of the target address space. */
2018 pbits = GET_MODE_BITSIZE (address_mode);
2019 if (HOST_BITS_PER_WIDE_INT > pbits)
2021 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2022 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2028 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2029 object, we can merge it into the LO_SUM. */
2030 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2032 && (unsigned HOST_WIDE_INT) offset
2033 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2034 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2035 plus_constant (XEXP (addr, 1), offset));
2037 addr = plus_constant (addr, offset);
2040 new_rtx = change_address_1 (memref, mode, addr, validate);
2042 /* If the address is a REG, change_address_1 rightfully returns memref,
2043 but this would destroy memref's MEM_ATTRS. */
2044 if (new_rtx == memref && offset != 0)
2045 new_rtx = copy_rtx (new_rtx);
2047 /* Compute the new values of the memory attributes due to this adjustment.
2048 We add the offsets and update the alignment. */
2050 memoffset = GEN_INT (offset + INTVAL (memoffset));
2052 /* Compute the new alignment by taking the MIN of the alignment and the
2053 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2058 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2060 /* We can compute the size in a number of ways. */
2061 if (GET_MODE (new_rtx) != BLKmode)
2062 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2063 else if (MEM_SIZE (memref))
2064 size = plus_constant (MEM_SIZE (memref), -offset);
2066 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2067 memoffset, size, memalign, as,
2068 GET_MODE (new_rtx));
2070 /* At some point, we should validate that this offset is within the object,
2071 if all the appropriate values are known. */
2075 /* Return a memory reference like MEMREF, but with its mode changed
2076 to MODE and its address changed to ADDR, which is assumed to be
2077 MEMREF offset by OFFSET bytes. If VALIDATE is
2078 nonzero, the memory address is forced to be valid. */
2081 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2082 HOST_WIDE_INT offset, int validate)
2084 memref = change_address_1 (memref, VOIDmode, addr, validate);
2085 return adjust_address_1 (memref, mode, offset, validate, 0);
2088 /* Return a memory reference like MEMREF, but whose address is changed by
2089 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2090 known to be in OFFSET (possibly 1). */
2093 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2095 rtx new_rtx, addr = XEXP (memref, 0);
2096 addr_space_t as = MEM_ADDR_SPACE (memref);
2097 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2099 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2101 /* At this point we don't know _why_ the address is invalid. It
2102 could have secondary memory references, multiplies or anything.
2104 However, if we did go and rearrange things, we can wind up not
2105 being able to recognize the magic around pic_offset_table_rtx.
2106 This stuff is fragile, and is yet another example of why it is
2107 bad to expose PIC machinery too early. */
2108 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2109 && GET_CODE (addr) == PLUS
2110 && XEXP (addr, 0) == pic_offset_table_rtx)
2112 addr = force_reg (GET_MODE (addr), addr);
2113 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2116 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2117 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2119 /* If there are no changes, just return the original memory reference. */
2120 if (new_rtx == memref)
2123 /* Update the alignment to reflect the offset. Reset the offset, which
2126 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2127 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2128 as, GET_MODE (new_rtx));
2132 /* Return a memory reference like MEMREF, but with its address changed to
2133 ADDR. The caller is asserting that the actual piece of memory pointed
2134 to is the same, just the form of the address is being changed, such as
2135 by putting something into a register. */
2138 replace_equiv_address (rtx memref, rtx addr)
2140 /* change_address_1 copies the memory attribute structure without change
2141 and that's exactly what we want here. */
2142 update_temp_slot_address (XEXP (memref, 0), addr);
2143 return change_address_1 (memref, VOIDmode, addr, 1);
2146 /* Likewise, but the reference is not required to be valid. */
2149 replace_equiv_address_nv (rtx memref, rtx addr)
2151 return change_address_1 (memref, VOIDmode, addr, 0);
2154 /* Return a memory reference like MEMREF, but with its mode widened to
2155 MODE and offset by OFFSET. This would be used by targets that e.g.
2156 cannot issue QImode memory operations and have to use SImode memory
2157 operations plus masking logic. */
2160 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2162 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2163 tree expr = MEM_EXPR (new_rtx);
2164 rtx memoffset = MEM_OFFSET (new_rtx);
2165 unsigned int size = GET_MODE_SIZE (mode);
2167 /* If there are no changes, just return the original memory reference. */
2168 if (new_rtx == memref)
2171 /* If we don't know what offset we were at within the expression, then
2172 we can't know if we've overstepped the bounds. */
2178 if (TREE_CODE (expr) == COMPONENT_REF)
2180 tree field = TREE_OPERAND (expr, 1);
2181 tree offset = component_ref_field_offset (expr);
2183 if (! DECL_SIZE_UNIT (field))
2189 /* Is the field at least as large as the access? If so, ok,
2190 otherwise strip back to the containing structure. */
2191 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2192 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2193 && INTVAL (memoffset) >= 0)
2196 if (! host_integerp (offset, 1))
2202 expr = TREE_OPERAND (expr, 0);
2204 = (GEN_INT (INTVAL (memoffset)
2205 + tree_low_cst (offset, 1)
2206 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2209 /* Similarly for the decl. */
2210 else if (DECL_P (expr)
2211 && DECL_SIZE_UNIT (expr)
2212 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2213 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2214 && (! memoffset || INTVAL (memoffset) >= 0))
2218 /* The widened memory access overflows the expression, which means
2219 that it could alias another expression. Zap it. */
2226 memoffset = NULL_RTX;
2228 /* The widened memory may alias other stuff, so zap the alias set. */
2229 /* ??? Maybe use get_alias_set on any remaining expression. */
2231 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2232 MEM_ALIGN (new_rtx),
2233 MEM_ADDR_SPACE (new_rtx), mode);
2238 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2239 static GTY(()) tree spill_slot_decl;
2242 get_spill_slot_decl (bool force_build_p)
2244 tree d = spill_slot_decl;
2247 if (d || !force_build_p)
2250 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2251 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2252 DECL_ARTIFICIAL (d) = 1;
2253 DECL_IGNORED_P (d) = 1;
2255 TREE_THIS_NOTRAP (d) = 1;
2256 spill_slot_decl = d;
2258 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2259 MEM_NOTRAP_P (rd) = 1;
2260 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2261 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2262 SET_DECL_RTL (d, rd);
2267 /* Given MEM, a result from assign_stack_local, fill in the memory
2268 attributes as appropriate for a register allocator spill slot.
2269 These slots are not aliasable by other memory. We arrange for
2270 them all to use a single MEM_EXPR, so that the aliasing code can
2271 work properly in the case of shared spill slots. */
2274 set_mem_attrs_for_spill (rtx mem)
2276 alias_set_type alias;
2280 expr = get_spill_slot_decl (true);
2281 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2283 /* We expect the incoming memory to be of the form:
2284 (mem:MODE (plus (reg sfp) (const_int offset)))
2285 with perhaps the plus missing for offset = 0. */
2286 addr = XEXP (mem, 0);
2287 offset = const0_rtx;
2288 if (GET_CODE (addr) == PLUS
2289 && CONST_INT_P (XEXP (addr, 1)))
2290 offset = XEXP (addr, 1);
2292 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2293 MEM_SIZE (mem), MEM_ALIGN (mem),
2294 ADDR_SPACE_GENERIC, GET_MODE (mem));
2295 MEM_NOTRAP_P (mem) = 1;
2298 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2301 gen_label_rtx (void)
2303 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2304 NULL, label_num++, NULL);
2307 /* For procedure integration. */
2309 /* Install new pointers to the first and last insns in the chain.
2310 Also, set cur_insn_uid to one higher than the last in use.
2311 Used for an inline-procedure after copying the insn chain. */
2314 set_new_first_and_last_insn (rtx first, rtx last)
2318 set_first_insn (first);
2319 set_last_insn (last);
2322 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2324 int debug_count = 0;
2326 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2327 cur_debug_insn_uid = 0;
2329 for (insn = first; insn; insn = NEXT_INSN (insn))
2330 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2331 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2334 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2335 if (DEBUG_INSN_P (insn))
2340 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2342 cur_debug_insn_uid++;
2345 for (insn = first; insn; insn = NEXT_INSN (insn))
2346 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2351 /* Go through all the RTL insn bodies and copy any invalid shared
2352 structure. This routine should only be called once. */
2355 unshare_all_rtl_1 (rtx insn)
2357 /* Unshare just about everything else. */
2358 unshare_all_rtl_in_chain (insn);
2360 /* Make sure the addresses of stack slots found outside the insn chain
2361 (such as, in DECL_RTL of a variable) are not shared
2362 with the insn chain.
2364 This special care is necessary when the stack slot MEM does not
2365 actually appear in the insn chain. If it does appear, its address
2366 is unshared from all else at that point. */
2367 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2370 /* Go through all the RTL insn bodies and copy any invalid shared
2371 structure, again. This is a fairly expensive thing to do so it
2372 should be done sparingly. */
2375 unshare_all_rtl_again (rtx insn)
2380 for (p = insn; p; p = NEXT_INSN (p))
2383 reset_used_flags (PATTERN (p));
2384 reset_used_flags (REG_NOTES (p));
2387 /* Make sure that virtual stack slots are not shared. */
2388 set_used_decls (DECL_INITIAL (cfun->decl));
2390 /* Make sure that virtual parameters are not shared. */
2391 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2392 set_used_flags (DECL_RTL (decl));
2394 reset_used_flags (stack_slot_list);
2396 unshare_all_rtl_1 (insn);
2400 unshare_all_rtl (void)
2402 unshare_all_rtl_1 (get_insns ());
2406 struct rtl_opt_pass pass_unshare_all_rtl =
2410 "unshare", /* name */
2412 unshare_all_rtl, /* execute */
2415 0, /* static_pass_number */
2416 TV_NONE, /* tv_id */
2417 0, /* properties_required */
2418 0, /* properties_provided */
2419 0, /* properties_destroyed */
2420 0, /* todo_flags_start */
2421 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2426 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2427 Recursively does the same for subexpressions. */
2430 verify_rtx_sharing (rtx orig, rtx insn)
2435 const char *format_ptr;
2440 code = GET_CODE (x);
2442 /* These types may be freely shared. */
2460 /* SCRATCH must be shared because they represent distinct values. */
2462 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2467 if (shared_const_p (orig))
2472 /* A MEM is allowed to be shared if its address is constant. */
2473 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2474 || reload_completed || reload_in_progress)
2483 /* This rtx may not be shared. If it has already been seen,
2484 replace it with a copy of itself. */
2485 #ifdef ENABLE_CHECKING
2486 if (RTX_FLAG (x, used))
2488 error ("invalid rtl sharing found in the insn");
2490 error ("shared rtx");
2492 internal_error ("internal consistency failure");
2495 gcc_assert (!RTX_FLAG (x, used));
2497 RTX_FLAG (x, used) = 1;
2499 /* Now scan the subexpressions recursively. */
2501 format_ptr = GET_RTX_FORMAT (code);
2503 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2505 switch (*format_ptr++)
2508 verify_rtx_sharing (XEXP (x, i), insn);
2512 if (XVEC (x, i) != NULL)
2515 int len = XVECLEN (x, i);
2517 for (j = 0; j < len; j++)
2519 /* We allow sharing of ASM_OPERANDS inside single
2521 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2522 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2524 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2526 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2535 /* Go through all the RTL insn bodies and check that there is no unexpected
2536 sharing in between the subexpressions. */
2539 verify_rtl_sharing (void)
2543 for (p = get_insns (); p; p = NEXT_INSN (p))
2546 reset_used_flags (PATTERN (p));
2547 reset_used_flags (REG_NOTES (p));
2548 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2551 rtx q, sequence = PATTERN (p);
2553 for (i = 0; i < XVECLEN (sequence, 0); i++)
2555 q = XVECEXP (sequence, 0, i);
2556 gcc_assert (INSN_P (q));
2557 reset_used_flags (PATTERN (q));
2558 reset_used_flags (REG_NOTES (q));
2563 for (p = get_insns (); p; p = NEXT_INSN (p))
2566 verify_rtx_sharing (PATTERN (p), p);
2567 verify_rtx_sharing (REG_NOTES (p), p);
2571 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2572 Assumes the mark bits are cleared at entry. */
2575 unshare_all_rtl_in_chain (rtx insn)
2577 for (; insn; insn = NEXT_INSN (insn))
2580 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2581 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2585 /* Go through all virtual stack slots of a function and mark them as
2586 shared. We never replace the DECL_RTLs themselves with a copy,
2587 but expressions mentioned into a DECL_RTL cannot be shared with
2588 expressions in the instruction stream.
2590 Note that reload may convert pseudo registers into memories in-place.
2591 Pseudo registers are always shared, but MEMs never are. Thus if we
2592 reset the used flags on MEMs in the instruction stream, we must set
2593 them again on MEMs that appear in DECL_RTLs. */
2596 set_used_decls (tree blk)
2601 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2602 if (DECL_RTL_SET_P (t))
2603 set_used_flags (DECL_RTL (t));
2605 /* Now process sub-blocks. */
2606 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2610 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2611 Recursively does the same for subexpressions. Uses
2612 copy_rtx_if_shared_1 to reduce stack space. */
2615 copy_rtx_if_shared (rtx orig)
2617 copy_rtx_if_shared_1 (&orig);
2621 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2622 use. Recursively does the same for subexpressions. */
2625 copy_rtx_if_shared_1 (rtx *orig1)
2631 const char *format_ptr;
2635 /* Repeat is used to turn tail-recursion into iteration. */
2642 code = GET_CODE (x);
2644 /* These types may be freely shared. */
2661 /* SCRATCH must be shared because they represent distinct values. */
2664 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2669 if (shared_const_p (x))
2679 /* The chain of insns is not being copied. */
2686 /* This rtx may not be shared. If it has already been seen,
2687 replace it with a copy of itself. */
2689 if (RTX_FLAG (x, used))
2691 x = shallow_copy_rtx (x);
2694 RTX_FLAG (x, used) = 1;
2696 /* Now scan the subexpressions recursively.
2697 We can store any replaced subexpressions directly into X
2698 since we know X is not shared! Any vectors in X
2699 must be copied if X was copied. */
2701 format_ptr = GET_RTX_FORMAT (code);
2702 length = GET_RTX_LENGTH (code);
2705 for (i = 0; i < length; i++)
2707 switch (*format_ptr++)
2711 copy_rtx_if_shared_1 (last_ptr);
2712 last_ptr = &XEXP (x, i);
2716 if (XVEC (x, i) != NULL)
2719 int len = XVECLEN (x, i);
2721 /* Copy the vector iff I copied the rtx and the length
2723 if (copied && len > 0)
2724 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2726 /* Call recursively on all inside the vector. */
2727 for (j = 0; j < len; j++)
2730 copy_rtx_if_shared_1 (last_ptr);
2731 last_ptr = &XVECEXP (x, i, j);
2746 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2747 to look for shared sub-parts. */
2750 reset_used_flags (rtx x)
2754 const char *format_ptr;
2757 /* Repeat is used to turn tail-recursion into iteration. */
2762 code = GET_CODE (x);
2764 /* These types may be freely shared so we needn't do any resetting
2789 /* The chain of insns is not being copied. */
2796 RTX_FLAG (x, used) = 0;
2798 format_ptr = GET_RTX_FORMAT (code);
2799 length = GET_RTX_LENGTH (code);
2801 for (i = 0; i < length; i++)
2803 switch (*format_ptr++)
2811 reset_used_flags (XEXP (x, i));
2815 for (j = 0; j < XVECLEN (x, i); j++)
2816 reset_used_flags (XVECEXP (x, i, j));
2822 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2823 to look for shared sub-parts. */
2826 set_used_flags (rtx x)
2830 const char *format_ptr;
2835 code = GET_CODE (x);
2837 /* These types may be freely shared so we needn't do any resetting
2862 /* The chain of insns is not being copied. */
2869 RTX_FLAG (x, used) = 1;
2871 format_ptr = GET_RTX_FORMAT (code);
2872 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2874 switch (*format_ptr++)
2877 set_used_flags (XEXP (x, i));
2881 for (j = 0; j < XVECLEN (x, i); j++)
2882 set_used_flags (XVECEXP (x, i, j));
2888 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2889 Return X or the rtx for the pseudo reg the value of X was copied into.
2890 OTHER must be valid as a SET_DEST. */
2893 make_safe_from (rtx x, rtx other)
2896 switch (GET_CODE (other))
2899 other = SUBREG_REG (other);
2901 case STRICT_LOW_PART:
2904 other = XEXP (other, 0);
2913 && GET_CODE (x) != SUBREG)
2915 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2916 || reg_mentioned_p (other, x))))
2918 rtx temp = gen_reg_rtx (GET_MODE (x));
2919 emit_move_insn (temp, x);
2925 /* Emission of insns (adding them to the doubly-linked list). */
2927 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2930 get_last_insn_anywhere (void)
2932 struct sequence_stack *stack;
2933 if (get_last_insn ())
2934 return get_last_insn ();
2935 for (stack = seq_stack; stack; stack = stack->next)
2936 if (stack->last != 0)
2941 /* Return the first nonnote insn emitted in current sequence or current
2942 function. This routine looks inside SEQUENCEs. */
2945 get_first_nonnote_insn (void)
2947 rtx insn = get_insns ();
2952 for (insn = next_insn (insn);
2953 insn && NOTE_P (insn);
2954 insn = next_insn (insn))
2958 if (NONJUMP_INSN_P (insn)
2959 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2960 insn = XVECEXP (PATTERN (insn), 0, 0);
2967 /* Return the last nonnote insn emitted in current sequence or current
2968 function. This routine looks inside SEQUENCEs. */
2971 get_last_nonnote_insn (void)
2973 rtx insn = get_last_insn ();
2978 for (insn = previous_insn (insn);
2979 insn && NOTE_P (insn);
2980 insn = previous_insn (insn))
2984 if (NONJUMP_INSN_P (insn)
2985 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2986 insn = XVECEXP (PATTERN (insn), 0,
2987 XVECLEN (PATTERN (insn), 0) - 1);
2994 /* Return the number of actual (non-debug) insns emitted in this
2998 get_max_insn_count (void)
3000 int n = cur_insn_uid;
3002 /* The table size must be stable across -g, to avoid codegen
3003 differences due to debug insns, and not be affected by
3004 -fmin-insn-uid, to avoid excessive table size and to simplify
3005 debugging of -fcompare-debug failures. */
3006 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3007 n -= cur_debug_insn_uid;
3009 n -= MIN_NONDEBUG_INSN_UID;
3015 /* Return the next insn. If it is a SEQUENCE, return the first insn
3019 next_insn (rtx insn)
3023 insn = NEXT_INSN (insn);
3024 if (insn && NONJUMP_INSN_P (insn)
3025 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3026 insn = XVECEXP (PATTERN (insn), 0, 0);
3032 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3036 previous_insn (rtx insn)
3040 insn = PREV_INSN (insn);
3041 if (insn && NONJUMP_INSN_P (insn)
3042 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3043 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3049 /* Return the next insn after INSN that is not a NOTE. This routine does not
3050 look inside SEQUENCEs. */
3053 next_nonnote_insn (rtx insn)
3057 insn = NEXT_INSN (insn);
3058 if (insn == 0 || !NOTE_P (insn))
3065 /* Return the next insn after INSN that is not a NOTE, but stop the
3066 search before we enter another basic block. This routine does not
3067 look inside SEQUENCEs. */
3070 next_nonnote_insn_bb (rtx insn)
3074 insn = NEXT_INSN (insn);
3075 if (insn == 0 || !NOTE_P (insn))
3077 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3084 /* Return the previous insn before INSN that is not a NOTE. This routine does
3085 not look inside SEQUENCEs. */
3088 prev_nonnote_insn (rtx insn)
3092 insn = PREV_INSN (insn);
3093 if (insn == 0 || !NOTE_P (insn))
3100 /* Return the previous insn before INSN that is not a NOTE, but stop
3101 the search before we enter another basic block. This routine does
3102 not look inside SEQUENCEs. */
3105 prev_nonnote_insn_bb (rtx insn)
3109 insn = PREV_INSN (insn);
3110 if (insn == 0 || !NOTE_P (insn))
3112 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3119 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3120 routine does not look inside SEQUENCEs. */
3123 next_nondebug_insn (rtx insn)
3127 insn = NEXT_INSN (insn);
3128 if (insn == 0 || !DEBUG_INSN_P (insn))
3135 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3136 This routine does not look inside SEQUENCEs. */
3139 prev_nondebug_insn (rtx insn)
3143 insn = PREV_INSN (insn);
3144 if (insn == 0 || !DEBUG_INSN_P (insn))
3151 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3152 or 0, if there is none. This routine does not look inside
3156 next_real_insn (rtx insn)
3160 insn = NEXT_INSN (insn);
3161 if (insn == 0 || INSN_P (insn))
3168 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3169 or 0, if there is none. This routine does not look inside
3173 prev_real_insn (rtx insn)
3177 insn = PREV_INSN (insn);
3178 if (insn == 0 || INSN_P (insn))
3185 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3186 This routine does not look inside SEQUENCEs. */
3189 last_call_insn (void)
3193 for (insn = get_last_insn ();
3194 insn && !CALL_P (insn);
3195 insn = PREV_INSN (insn))
3201 /* Find the next insn after INSN that really does something. This routine
3202 does not look inside SEQUENCEs. After reload this also skips over
3203 standalone USE and CLOBBER insn. */
3206 active_insn_p (const_rtx insn)
3208 return (CALL_P (insn) || JUMP_P (insn)
3209 || (NONJUMP_INSN_P (insn)
3210 && (! reload_completed
3211 || (GET_CODE (PATTERN (insn)) != USE
3212 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3216 next_active_insn (rtx insn)
3220 insn = NEXT_INSN (insn);
3221 if (insn == 0 || active_insn_p (insn))
3228 /* Find the last insn before INSN that really does something. This routine
3229 does not look inside SEQUENCEs. After reload this also skips over
3230 standalone USE and CLOBBER insn. */
3233 prev_active_insn (rtx insn)
3237 insn = PREV_INSN (insn);
3238 if (insn == 0 || active_insn_p (insn))
3245 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3248 next_label (rtx insn)
3252 insn = NEXT_INSN (insn);
3253 if (insn == 0 || LABEL_P (insn))
3260 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3263 prev_label (rtx insn)
3267 insn = PREV_INSN (insn);
3268 if (insn == 0 || LABEL_P (insn))
3275 /* Return the last label to mark the same position as LABEL. Return null
3276 if LABEL itself is null. */
3279 skip_consecutive_labels (rtx label)
3283 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3291 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3292 and REG_CC_USER notes so we can find it. */
3295 link_cc0_insns (rtx insn)
3297 rtx user = next_nonnote_insn (insn);
3299 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3300 user = XVECEXP (PATTERN (user), 0, 0);
3302 add_reg_note (user, REG_CC_SETTER, insn);
3303 add_reg_note (insn, REG_CC_USER, user);
3306 /* Return the next insn that uses CC0 after INSN, which is assumed to
3307 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3308 applied to the result of this function should yield INSN).
3310 Normally, this is simply the next insn. However, if a REG_CC_USER note
3311 is present, it contains the insn that uses CC0.
3313 Return 0 if we can't find the insn. */
3316 next_cc0_user (rtx insn)
3318 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3321 return XEXP (note, 0);
3323 insn = next_nonnote_insn (insn);
3324 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3325 insn = XVECEXP (PATTERN (insn), 0, 0);
3327 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3333 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3334 note, it is the previous insn. */
3337 prev_cc0_setter (rtx insn)
3339 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3342 return XEXP (note, 0);
3344 insn = prev_nonnote_insn (insn);
3345 gcc_assert (sets_cc0_p (PATTERN (insn)));
3352 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3355 find_auto_inc (rtx *xp, void *data)
3358 rtx reg = (rtx) data;
3360 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3363 switch (GET_CODE (x))
3371 if (rtx_equal_p (reg, XEXP (x, 0)))
3382 /* Increment the label uses for all labels present in rtx. */
3385 mark_label_nuses (rtx x)
3391 code = GET_CODE (x);
3392 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3393 LABEL_NUSES (XEXP (x, 0))++;
3395 fmt = GET_RTX_FORMAT (code);
3396 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3399 mark_label_nuses (XEXP (x, i));
3400 else if (fmt[i] == 'E')
3401 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3402 mark_label_nuses (XVECEXP (x, i, j));
3407 /* Try splitting insns that can be split for better scheduling.
3408 PAT is the pattern which might split.
3409 TRIAL is the insn providing PAT.
3410 LAST is nonzero if we should return the last insn of the sequence produced.
3412 If this routine succeeds in splitting, it returns the first or last
3413 replacement insn depending on the value of LAST. Otherwise, it
3414 returns TRIAL. If the insn to be returned can be split, it will be. */
3417 try_split (rtx pat, rtx trial, int last)
3419 rtx before = PREV_INSN (trial);
3420 rtx after = NEXT_INSN (trial);
3421 int has_barrier = 0;
3424 rtx insn_last, insn;
3427 /* We're not good at redistributing frame information. */
3428 if (RTX_FRAME_RELATED_P (trial))
3431 if (any_condjump_p (trial)
3432 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3433 split_branch_probability = INTVAL (XEXP (note, 0));
3434 probability = split_branch_probability;
3436 seq = split_insns (pat, trial);
3438 split_branch_probability = -1;
3440 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3441 We may need to handle this specially. */
3442 if (after && BARRIER_P (after))
3445 after = NEXT_INSN (after);
3451 /* Avoid infinite loop if any insn of the result matches
3452 the original pattern. */
3456 if (INSN_P (insn_last)
3457 && rtx_equal_p (PATTERN (insn_last), pat))
3459 if (!NEXT_INSN (insn_last))
3461 insn_last = NEXT_INSN (insn_last);
3464 /* We will be adding the new sequence to the function. The splitters
3465 may have introduced invalid RTL sharing, so unshare the sequence now. */
3466 unshare_all_rtl_in_chain (seq);
3469 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3473 mark_jump_label (PATTERN (insn), insn, 0);
3475 if (probability != -1
3476 && any_condjump_p (insn)
3477 && !find_reg_note (insn, REG_BR_PROB, 0))
3479 /* We can preserve the REG_BR_PROB notes only if exactly
3480 one jump is created, otherwise the machine description
3481 is responsible for this step using
3482 split_branch_probability variable. */
3483 gcc_assert (njumps == 1);
3484 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3489 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3490 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3493 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3496 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3499 *p = CALL_INSN_FUNCTION_USAGE (trial);
3500 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3502 /* Update the debug information for the CALL_INSN. */
3503 if (flag_enable_icf_debug)
3504 (*debug_hooks->copy_call_info) (trial, insn);
3508 /* Copy notes, particularly those related to the CFG. */
3509 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3511 switch (REG_NOTE_KIND (note))
3514 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3519 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3522 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3526 case REG_NON_LOCAL_GOTO:
3527 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3530 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3536 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3538 rtx reg = XEXP (note, 0);
3539 if (!FIND_REG_INC_NOTE (insn, reg)
3540 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3541 add_reg_note (insn, REG_INC, reg);
3551 /* If there are LABELS inside the split insns increment the
3552 usage count so we don't delete the label. */
3556 while (insn != NULL_RTX)
3558 /* JUMP_P insns have already been "marked" above. */
3559 if (NONJUMP_INSN_P (insn))
3560 mark_label_nuses (PATTERN (insn));
3562 insn = PREV_INSN (insn);
3566 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3568 delete_insn (trial);
3570 emit_barrier_after (tem);
3572 /* Recursively call try_split for each new insn created; by the
3573 time control returns here that insn will be fully split, so
3574 set LAST and continue from the insn after the one returned.
3575 We can't use next_active_insn here since AFTER may be a note.
3576 Ignore deleted insns, which can be occur if not optimizing. */
3577 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3578 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3579 tem = try_split (PATTERN (tem), tem, 1);
3581 /* Return either the first or the last insn, depending on which was
3584 ? (after ? PREV_INSN (after) : get_last_insn ())
3585 : NEXT_INSN (before);
3588 /* Make and return an INSN rtx, initializing all its slots.
3589 Store PATTERN in the pattern slots. */
3592 make_insn_raw (rtx pattern)
3596 insn = rtx_alloc (INSN);
3598 INSN_UID (insn) = cur_insn_uid++;
3599 PATTERN (insn) = pattern;
3600 INSN_CODE (insn) = -1;
3601 REG_NOTES (insn) = NULL;
3602 INSN_LOCATOR (insn) = curr_insn_locator ();
3603 BLOCK_FOR_INSN (insn) = NULL;
3605 #ifdef ENABLE_RTL_CHECKING
3608 && (returnjump_p (insn)
3609 || (GET_CODE (insn) == SET
3610 && SET_DEST (insn) == pc_rtx)))
3612 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3620 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3623 make_debug_insn_raw (rtx pattern)
3627 insn = rtx_alloc (DEBUG_INSN);
3628 INSN_UID (insn) = cur_debug_insn_uid++;
3629 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3630 INSN_UID (insn) = cur_insn_uid++;
3632 PATTERN (insn) = pattern;
3633 INSN_CODE (insn) = -1;
3634 REG_NOTES (insn) = NULL;
3635 INSN_LOCATOR (insn) = curr_insn_locator ();
3636 BLOCK_FOR_INSN (insn) = NULL;
3641 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3644 make_jump_insn_raw (rtx pattern)
3648 insn = rtx_alloc (JUMP_INSN);
3649 INSN_UID (insn) = cur_insn_uid++;
3651 PATTERN (insn) = pattern;
3652 INSN_CODE (insn) = -1;
3653 REG_NOTES (insn) = NULL;
3654 JUMP_LABEL (insn) = NULL;
3655 INSN_LOCATOR (insn) = curr_insn_locator ();
3656 BLOCK_FOR_INSN (insn) = NULL;
3661 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3664 make_call_insn_raw (rtx pattern)
3668 insn = rtx_alloc (CALL_INSN);
3669 INSN_UID (insn) = cur_insn_uid++;
3671 PATTERN (insn) = pattern;
3672 INSN_CODE (insn) = -1;
3673 REG_NOTES (insn) = NULL;
3674 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3675 INSN_LOCATOR (insn) = curr_insn_locator ();
3676 BLOCK_FOR_INSN (insn) = NULL;
3681 /* Add INSN to the end of the doubly-linked list.
3682 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3687 PREV_INSN (insn) = get_last_insn();
3688 NEXT_INSN (insn) = 0;
3690 if (NULL != get_last_insn())
3691 NEXT_INSN (get_last_insn ()) = insn;
3693 if (NULL == get_insns ())
3694 set_first_insn (insn);
3696 set_last_insn (insn);
3699 /* Add INSN into the doubly-linked list after insn AFTER. This and
3700 the next should be the only functions called to insert an insn once
3701 delay slots have been filled since only they know how to update a
3705 add_insn_after (rtx insn, rtx after, basic_block bb)
3707 rtx next = NEXT_INSN (after);
3709 gcc_assert (!optimize || !INSN_DELETED_P (after));
3711 NEXT_INSN (insn) = next;
3712 PREV_INSN (insn) = after;
3716 PREV_INSN (next) = insn;
3717 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3718 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3720 else if (get_last_insn () == after)
3721 set_last_insn (insn);
3724 struct sequence_stack *stack = seq_stack;
3725 /* Scan all pending sequences too. */
3726 for (; stack; stack = stack->next)
3727 if (after == stack->last)
3736 if (!BARRIER_P (after)
3737 && !BARRIER_P (insn)
3738 && (bb = BLOCK_FOR_INSN (after)))
3740 set_block_for_insn (insn, bb);
3742 df_insn_rescan (insn);
3743 /* Should not happen as first in the BB is always
3744 either NOTE or LABEL. */
3745 if (BB_END (bb) == after
3746 /* Avoid clobbering of structure when creating new BB. */
3747 && !BARRIER_P (insn)
3748 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3752 NEXT_INSN (after) = insn;
3753 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3755 rtx sequence = PATTERN (after);
3756 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3760 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3761 the previous should be the only functions called to insert an insn
3762 once delay slots have been filled since only they know how to
3763 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3767 add_insn_before (rtx insn, rtx before, basic_block bb)
3769 rtx prev = PREV_INSN (before);
3771 gcc_assert (!optimize || !INSN_DELETED_P (before));
3773 PREV_INSN (insn) = prev;
3774 NEXT_INSN (insn) = before;
3778 NEXT_INSN (prev) = insn;
3779 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3781 rtx sequence = PATTERN (prev);
3782 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3785 else if (get_insns () == before)
3786 set_first_insn (insn);
3789 struct sequence_stack *stack = seq_stack;
3790 /* Scan all pending sequences too. */
3791 for (; stack; stack = stack->next)
3792 if (before == stack->first)
3794 stack->first = insn;
3802 && !BARRIER_P (before)
3803 && !BARRIER_P (insn))
3804 bb = BLOCK_FOR_INSN (before);
3808 set_block_for_insn (insn, bb);
3810 df_insn_rescan (insn);
3811 /* Should not happen as first in the BB is always either NOTE or
3813 gcc_assert (BB_HEAD (bb) != insn
3814 /* Avoid clobbering of structure when creating new BB. */
3816 || NOTE_INSN_BASIC_BLOCK_P (insn));
3819 PREV_INSN (before) = insn;
3820 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3821 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3825 /* Replace insn with an deleted instruction note. */
3828 set_insn_deleted (rtx insn)
3830 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3831 PUT_CODE (insn, NOTE);
3832 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3836 /* Remove an insn from its doubly-linked list. This function knows how
3837 to handle sequences. */
3839 remove_insn (rtx insn)
3841 rtx next = NEXT_INSN (insn);
3842 rtx prev = PREV_INSN (insn);
3845 /* Later in the code, the block will be marked dirty. */
3846 df_insn_delete (NULL, INSN_UID (insn));
3850 NEXT_INSN (prev) = next;
3851 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3853 rtx sequence = PATTERN (prev);
3854 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3857 else if (get_insns () == insn)
3860 PREV_INSN (next) = NULL;
3861 set_first_insn (next);
3865 struct sequence_stack *stack = seq_stack;
3866 /* Scan all pending sequences too. */
3867 for (; stack; stack = stack->next)
3868 if (insn == stack->first)
3870 stack->first = next;
3879 PREV_INSN (next) = prev;
3880 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3881 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3883 else if (get_last_insn () == insn)
3884 set_last_insn (prev);
3887 struct sequence_stack *stack = seq_stack;
3888 /* Scan all pending sequences too. */
3889 for (; stack; stack = stack->next)
3890 if (insn == stack->last)
3898 if (!BARRIER_P (insn)
3899 && (bb = BLOCK_FOR_INSN (insn)))
3902 df_set_bb_dirty (bb);
3903 if (BB_HEAD (bb) == insn)
3905 /* Never ever delete the basic block note without deleting whole
3907 gcc_assert (!NOTE_P (insn));
3908 BB_HEAD (bb) = next;
3910 if (BB_END (bb) == insn)
3915 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3918 add_function_usage_to (rtx call_insn, rtx call_fusage)
3920 gcc_assert (call_insn && CALL_P (call_insn));
3922 /* Put the register usage information on the CALL. If there is already
3923 some usage information, put ours at the end. */
3924 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3928 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3929 link = XEXP (link, 1))
3932 XEXP (link, 1) = call_fusage;
3935 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3938 /* Delete all insns made since FROM.
3939 FROM becomes the new last instruction. */
3942 delete_insns_since (rtx from)
3947 NEXT_INSN (from) = 0;
3948 set_last_insn (from);
3951 /* This function is deprecated, please use sequences instead.
3953 Move a consecutive bunch of insns to a different place in the chain.
3954 The insns to be moved are those between FROM and TO.
3955 They are moved to a new position after the insn AFTER.
3956 AFTER must not be FROM or TO or any insn in between.
3958 This function does not know about SEQUENCEs and hence should not be
3959 called after delay-slot filling has been done. */
3962 reorder_insns_nobb (rtx from, rtx to, rtx after)
3964 /* Splice this bunch out of where it is now. */
3965 if (PREV_INSN (from))
3966 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3968 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3969 if (get_last_insn () == to)
3970 set_last_insn (PREV_INSN (from));
3971 if (get_insns () == from)
3972 set_first_insn (NEXT_INSN (to));
3974 /* Make the new neighbors point to it and it to them. */
3975 if (NEXT_INSN (after))
3976 PREV_INSN (NEXT_INSN (after)) = to;
3978 NEXT_INSN (to) = NEXT_INSN (after);
3979 PREV_INSN (from) = after;
3980 NEXT_INSN (after) = from;
3981 if (after == get_last_insn())
3985 /* Same as function above, but take care to update BB boundaries. */
3987 reorder_insns (rtx from, rtx to, rtx after)
3989 rtx prev = PREV_INSN (from);
3990 basic_block bb, bb2;
3992 reorder_insns_nobb (from, to, after);
3994 if (!BARRIER_P (after)
3995 && (bb = BLOCK_FOR_INSN (after)))
3998 df_set_bb_dirty (bb);
4000 if (!BARRIER_P (from)
4001 && (bb2 = BLOCK_FOR_INSN (from)))
4003 if (BB_END (bb2) == to)
4004 BB_END (bb2) = prev;
4005 df_set_bb_dirty (bb2);
4008 if (BB_END (bb) == after)
4011 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4013 df_insn_change_bb (x, bb);
4018 /* Emit insn(s) of given code and pattern
4019 at a specified place within the doubly-linked list.
4021 All of the emit_foo global entry points accept an object
4022 X which is either an insn list or a PATTERN of a single
4025 There are thus a few canonical ways to generate code and
4026 emit it at a specific place in the instruction stream. For
4027 example, consider the instruction named SPOT and the fact that
4028 we would like to emit some instructions before SPOT. We might
4032 ... emit the new instructions ...
4033 insns_head = get_insns ();
4036 emit_insn_before (insns_head, SPOT);
4038 It used to be common to generate SEQUENCE rtl instead, but that
4039 is a relic of the past which no longer occurs. The reason is that
4040 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4041 generated would almost certainly die right after it was created. */
4043 /* Make X be output before the instruction BEFORE. */
4046 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4051 gcc_assert (before);
4056 switch (GET_CODE (x))
4068 rtx next = NEXT_INSN (insn);
4069 add_insn_before (insn, before, bb);
4075 #ifdef ENABLE_RTL_CHECKING
4082 last = make_insn_raw (x);
4083 add_insn_before (last, before, bb);
4090 /* Make an instruction with body X and code JUMP_INSN
4091 and output it before the instruction BEFORE. */
4094 emit_jump_insn_before_noloc (rtx x, rtx before)
4096 rtx insn, last = NULL_RTX;
4098 gcc_assert (before);
4100 switch (GET_CODE (x))
4112 rtx next = NEXT_INSN (insn);
4113 add_insn_before (insn, before, NULL);
4119 #ifdef ENABLE_RTL_CHECKING
4126 last = make_jump_insn_raw (x);
4127 add_insn_before (last, before, NULL);
4134 /* Make an instruction with body X and code CALL_INSN
4135 and output it before the instruction BEFORE. */
4138 emit_call_insn_before_noloc (rtx x, rtx before)
4140 rtx last = NULL_RTX, insn;
4142 gcc_assert (before);
4144 switch (GET_CODE (x))
4156 rtx next = NEXT_INSN (insn);
4157 add_insn_before (insn, before, NULL);
4163 #ifdef ENABLE_RTL_CHECKING
4170 last = make_call_insn_raw (x);
4171 add_insn_before (last, before, NULL);
4178 /* Make an instruction with body X and code DEBUG_INSN
4179 and output it before the instruction BEFORE. */
4182 emit_debug_insn_before_noloc (rtx x, rtx before)
4184 rtx last = NULL_RTX, insn;
4186 gcc_assert (before);
4188 switch (GET_CODE (x))
4200 rtx next = NEXT_INSN (insn);
4201 add_insn_before (insn, before, NULL);
4207 #ifdef ENABLE_RTL_CHECKING
4214 last = make_debug_insn_raw (x);
4215 add_insn_before (last, before, NULL);
4222 /* Make an insn of code BARRIER
4223 and output it before the insn BEFORE. */
4226 emit_barrier_before (rtx before)
4228 rtx insn = rtx_alloc (BARRIER);
4230 INSN_UID (insn) = cur_insn_uid++;
4232 add_insn_before (insn, before, NULL);
4236 /* Emit the label LABEL before the insn BEFORE. */
4239 emit_label_before (rtx label, rtx before)
4241 /* This can be called twice for the same label as a result of the
4242 confusion that follows a syntax error! So make it harmless. */
4243 if (INSN_UID (label) == 0)
4245 INSN_UID (label) = cur_insn_uid++;
4246 add_insn_before (label, before, NULL);
4252 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4255 emit_note_before (enum insn_note subtype, rtx before)
4257 rtx note = rtx_alloc (NOTE);
4258 INSN_UID (note) = cur_insn_uid++;
4259 NOTE_KIND (note) = subtype;
4260 BLOCK_FOR_INSN (note) = NULL;
4261 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4263 add_insn_before (note, before, NULL);
4267 /* Helper for emit_insn_after, handles lists of instructions
4271 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4275 if (!bb && !BARRIER_P (after))
4276 bb = BLOCK_FOR_INSN (after);
4280 df_set_bb_dirty (bb);
4281 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4282 if (!BARRIER_P (last))
4284 set_block_for_insn (last, bb);
4285 df_insn_rescan (last);
4287 if (!BARRIER_P (last))
4289 set_block_for_insn (last, bb);
4290 df_insn_rescan (last);
4292 if (BB_END (bb) == after)
4296 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4299 after_after = NEXT_INSN (after);
4301 NEXT_INSN (after) = first;
4302 PREV_INSN (first) = after;
4303 NEXT_INSN (last) = after_after;
4305 PREV_INSN (after_after) = last;
4307 if (after == get_last_insn())
4308 set_last_insn (last);
4313 /* Make X be output after the insn AFTER and set the BB of insn. If
4314 BB is NULL, an attempt is made to infer the BB from AFTER. */
4317 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4326 switch (GET_CODE (x))
4335 last = emit_insn_after_1 (x, after, bb);
4338 #ifdef ENABLE_RTL_CHECKING
4345 last = make_insn_raw (x);
4346 add_insn_after (last, after, bb);
4354 /* Make an insn of code JUMP_INSN with body X
4355 and output it after the insn AFTER. */
4358 emit_jump_insn_after_noloc (rtx x, rtx after)
4364 switch (GET_CODE (x))
4373 last = emit_insn_after_1 (x, after, NULL);
4376 #ifdef ENABLE_RTL_CHECKING
4383 last = make_jump_insn_raw (x);
4384 add_insn_after (last, after, NULL);
4391 /* Make an instruction with body X and code CALL_INSN
4392 and output it after the instruction AFTER. */
4395 emit_call_insn_after_noloc (rtx x, rtx after)
4401 switch (GET_CODE (x))
4410 last = emit_insn_after_1 (x, after, NULL);
4413 #ifdef ENABLE_RTL_CHECKING
4420 last = make_call_insn_raw (x);
4421 add_insn_after (last, after, NULL);
4428 /* Make an instruction with body X and code CALL_INSN
4429 and output it after the instruction AFTER. */
4432 emit_debug_insn_after_noloc (rtx x, rtx after)
4438 switch (GET_CODE (x))
4447 last = emit_insn_after_1 (x, after, NULL);
4450 #ifdef ENABLE_RTL_CHECKING
4457 last = make_debug_insn_raw (x);
4458 add_insn_after (last, after, NULL);
4465 /* Make an insn of code BARRIER
4466 and output it after the insn AFTER. */
4469 emit_barrier_after (rtx after)
4471 rtx insn = rtx_alloc (BARRIER);
4473 INSN_UID (insn) = cur_insn_uid++;
4475 add_insn_after (insn, after, NULL);
4479 /* Emit the label LABEL after the insn AFTER. */
4482 emit_label_after (rtx label, rtx after)
4484 /* This can be called twice for the same label
4485 as a result of the confusion that follows a syntax error!
4486 So make it harmless. */
4487 if (INSN_UID (label) == 0)
4489 INSN_UID (label) = cur_insn_uid++;
4490 add_insn_after (label, after, NULL);
4496 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4499 emit_note_after (enum insn_note subtype, rtx after)
4501 rtx note = rtx_alloc (NOTE);
4502 INSN_UID (note) = cur_insn_uid++;
4503 NOTE_KIND (note) = subtype;
4504 BLOCK_FOR_INSN (note) = NULL;
4505 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4506 add_insn_after (note, after, NULL);
4510 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4512 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4514 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4516 if (pattern == NULL_RTX || !loc)
4519 after = NEXT_INSN (after);
4522 if (active_insn_p (after) && !INSN_LOCATOR (after))
4523 INSN_LOCATOR (after) = loc;
4526 after = NEXT_INSN (after);
4531 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4533 emit_insn_after (rtx pattern, rtx after)
4537 while (DEBUG_INSN_P (prev))
4538 prev = PREV_INSN (prev);
4541 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4543 return emit_insn_after_noloc (pattern, after, NULL);
4546 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4548 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4550 rtx last = emit_jump_insn_after_noloc (pattern, after);
4552 if (pattern == NULL_RTX || !loc)
4555 after = NEXT_INSN (after);
4558 if (active_insn_p (after) && !INSN_LOCATOR (after))
4559 INSN_LOCATOR (after) = loc;
4562 after = NEXT_INSN (after);
4567 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4569 emit_jump_insn_after (rtx pattern, rtx after)
4573 while (DEBUG_INSN_P (prev))
4574 prev = PREV_INSN (prev);
4577 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4579 return emit_jump_insn_after_noloc (pattern, after);
4582 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4584 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4586 rtx last = emit_call_insn_after_noloc (pattern, after);
4588 if (pattern == NULL_RTX || !loc)
4591 after = NEXT_INSN (after);
4594 if (active_insn_p (after) && !INSN_LOCATOR (after))
4595 INSN_LOCATOR (after) = loc;
4598 after = NEXT_INSN (after);
4603 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4605 emit_call_insn_after (rtx pattern, rtx after)
4609 while (DEBUG_INSN_P (prev))
4610 prev = PREV_INSN (prev);
4613 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4615 return emit_call_insn_after_noloc (pattern, after);
4618 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4620 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4622 rtx last = emit_debug_insn_after_noloc (pattern, after);
4624 if (pattern == NULL_RTX || !loc)
4627 after = NEXT_INSN (after);
4630 if (active_insn_p (after) && !INSN_LOCATOR (after))
4631 INSN_LOCATOR (after) = loc;
4634 after = NEXT_INSN (after);
4639 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4641 emit_debug_insn_after (rtx pattern, rtx after)
4644 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4646 return emit_debug_insn_after_noloc (pattern, after);
4649 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4651 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4653 rtx first = PREV_INSN (before);
4654 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4656 if (pattern == NULL_RTX || !loc)
4660 first = get_insns ();
4662 first = NEXT_INSN (first);
4665 if (active_insn_p (first) && !INSN_LOCATOR (first))
4666 INSN_LOCATOR (first) = loc;
4669 first = NEXT_INSN (first);
4674 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4676 emit_insn_before (rtx pattern, rtx before)
4680 while (DEBUG_INSN_P (next))
4681 next = PREV_INSN (next);
4684 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4686 return emit_insn_before_noloc (pattern, before, NULL);
4689 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4691 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4693 rtx first = PREV_INSN (before);
4694 rtx last = emit_jump_insn_before_noloc (pattern, before);
4696 if (pattern == NULL_RTX)
4699 first = NEXT_INSN (first);
4702 if (active_insn_p (first) && !INSN_LOCATOR (first))
4703 INSN_LOCATOR (first) = loc;
4706 first = NEXT_INSN (first);
4711 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4713 emit_jump_insn_before (rtx pattern, rtx before)
4717 while (DEBUG_INSN_P (next))
4718 next = PREV_INSN (next);
4721 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4723 return emit_jump_insn_before_noloc (pattern, before);
4726 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4728 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4730 rtx first = PREV_INSN (before);
4731 rtx last = emit_call_insn_before_noloc (pattern, before);
4733 if (pattern == NULL_RTX)
4736 first = NEXT_INSN (first);
4739 if (active_insn_p (first) && !INSN_LOCATOR (first))
4740 INSN_LOCATOR (first) = loc;
4743 first = NEXT_INSN (first);
4748 /* like emit_call_insn_before_noloc,
4749 but set insn_locator according to before. */
4751 emit_call_insn_before (rtx pattern, rtx before)
4755 while (DEBUG_INSN_P (next))
4756 next = PREV_INSN (next);
4759 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4761 return emit_call_insn_before_noloc (pattern, before);
4764 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4766 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4768 rtx first = PREV_INSN (before);
4769 rtx last = emit_debug_insn_before_noloc (pattern, before);
4771 if (pattern == NULL_RTX)
4774 first = NEXT_INSN (first);
4777 if (active_insn_p (first) && !INSN_LOCATOR (first))
4778 INSN_LOCATOR (first) = loc;
4781 first = NEXT_INSN (first);
4786 /* like emit_debug_insn_before_noloc,
4787 but set insn_locator according to before. */
4789 emit_debug_insn_before (rtx pattern, rtx before)
4791 if (INSN_P (before))
4792 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4794 return emit_debug_insn_before_noloc (pattern, before);
4797 /* Take X and emit it at the end of the doubly-linked
4800 Returns the last insn emitted. */
4805 rtx last = get_last_insn();
4811 switch (GET_CODE (x))
4823 rtx next = NEXT_INSN (insn);
4830 #ifdef ENABLE_RTL_CHECKING
4837 last = make_insn_raw (x);
4845 /* Make an insn of code DEBUG_INSN with pattern X
4846 and add it to the end of the doubly-linked list. */
4849 emit_debug_insn (rtx x)
4851 rtx last = get_last_insn();
4857 switch (GET_CODE (x))
4869 rtx next = NEXT_INSN (insn);
4876 #ifdef ENABLE_RTL_CHECKING
4883 last = make_debug_insn_raw (x);
4891 /* Make an insn of code JUMP_INSN with pattern X
4892 and add it to the end of the doubly-linked list. */
4895 emit_jump_insn (rtx x)
4897 rtx last = NULL_RTX, insn;
4899 switch (GET_CODE (x))
4911 rtx next = NEXT_INSN (insn);
4918 #ifdef ENABLE_RTL_CHECKING
4925 last = make_jump_insn_raw (x);
4933 /* Make an insn of code CALL_INSN with pattern X
4934 and add it to the end of the doubly-linked list. */
4937 emit_call_insn (rtx x)
4941 switch (GET_CODE (x))
4950 insn = emit_insn (x);
4953 #ifdef ENABLE_RTL_CHECKING
4960 insn = make_call_insn_raw (x);
4968 /* Add the label LABEL to the end of the doubly-linked list. */
4971 emit_label (rtx label)
4973 /* This can be called twice for the same label
4974 as a result of the confusion that follows a syntax error!
4975 So make it harmless. */
4976 if (INSN_UID (label) == 0)
4978 INSN_UID (label) = cur_insn_uid++;
4984 /* Make an insn of code BARRIER
4985 and add it to the end of the doubly-linked list. */
4990 rtx barrier = rtx_alloc (BARRIER);
4991 INSN_UID (barrier) = cur_insn_uid++;
4996 /* Emit a copy of note ORIG. */
4999 emit_note_copy (rtx orig)
5003 note = rtx_alloc (NOTE);
5005 INSN_UID (note) = cur_insn_uid++;
5006 NOTE_DATA (note) = NOTE_DATA (orig);
5007 NOTE_KIND (note) = NOTE_KIND (orig);
5008 BLOCK_FOR_INSN (note) = NULL;
5014 /* Make an insn of code NOTE or type NOTE_NO
5015 and add it to the end of the doubly-linked list. */
5018 emit_note (enum insn_note kind)
5022 note = rtx_alloc (NOTE);
5023 INSN_UID (note) = cur_insn_uid++;
5024 NOTE_KIND (note) = kind;
5025 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5026 BLOCK_FOR_INSN (note) = NULL;
5031 /* Emit a clobber of lvalue X. */
5034 emit_clobber (rtx x)
5036 /* CONCATs should not appear in the insn stream. */
5037 if (GET_CODE (x) == CONCAT)
5039 emit_clobber (XEXP (x, 0));
5040 return emit_clobber (XEXP (x, 1));
5042 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5045 /* Return a sequence of insns to clobber lvalue X. */
5059 /* Emit a use of rvalue X. */
5064 /* CONCATs should not appear in the insn stream. */
5065 if (GET_CODE (x) == CONCAT)
5067 emit_use (XEXP (x, 0));
5068 return emit_use (XEXP (x, 1));
5070 return emit_insn (gen_rtx_USE (VOIDmode, x));
5073 /* Return a sequence of insns to use rvalue X. */
5087 /* Cause next statement to emit a line note even if the line number
5091 force_next_line_note (void)
5096 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5097 note of this type already exists, remove it first. */
5100 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5102 rtx note = find_reg_note (insn, kind, NULL_RTX);
5108 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5109 has multiple sets (some callers assume single_set
5110 means the insn only has one set, when in fact it
5111 means the insn only has one * useful * set). */
5112 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5118 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5119 It serves no useful purpose and breaks eliminate_regs. */
5120 if (GET_CODE (datum) == ASM_OPERANDS)
5125 XEXP (note, 0) = datum;
5126 df_notes_rescan (insn);
5134 XEXP (note, 0) = datum;
5140 add_reg_note (insn, kind, datum);
5146 df_notes_rescan (insn);
5152 return REG_NOTES (insn);
5155 /* Return an indication of which type of insn should have X as a body.
5156 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5158 static enum rtx_code
5159 classify_insn (rtx x)
5163 if (GET_CODE (x) == CALL)
5165 if (GET_CODE (x) == RETURN)
5167 if (GET_CODE (x) == SET)
5169 if (SET_DEST (x) == pc_rtx)
5171 else if (GET_CODE (SET_SRC (x)) == CALL)
5176 if (GET_CODE (x) == PARALLEL)
5179 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5180 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5182 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5183 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5185 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5186 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5192 /* Emit the rtl pattern X as an appropriate kind of insn.
5193 If X is a label, it is simply added into the insn chain. */
5198 enum rtx_code code = classify_insn (x);
5203 return emit_label (x);
5205 return emit_insn (x);
5208 rtx insn = emit_jump_insn (x);
5209 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5210 return emit_barrier ();
5214 return emit_call_insn (x);
5216 return emit_debug_insn (x);
5222 /* Space for free sequence stack entries. */
5223 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5225 /* Begin emitting insns to a sequence. If this sequence will contain
5226 something that might cause the compiler to pop arguments to function
5227 calls (because those pops have previously been deferred; see
5228 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5229 before calling this function. That will ensure that the deferred
5230 pops are not accidentally emitted in the middle of this sequence. */
5233 start_sequence (void)
5235 struct sequence_stack *tem;
5237 if (free_sequence_stack != NULL)
5239 tem = free_sequence_stack;
5240 free_sequence_stack = tem->next;
5243 tem = GGC_NEW (struct sequence_stack);
5245 tem->next = seq_stack;
5246 tem->first = get_insns ();
5247 tem->last = get_last_insn ();
5255 /* Set up the insn chain starting with FIRST as the current sequence,
5256 saving the previously current one. See the documentation for
5257 start_sequence for more information about how to use this function. */
5260 push_to_sequence (rtx first)
5266 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5268 set_first_insn (first);
5269 set_last_insn (last);
5272 /* Like push_to_sequence, but take the last insn as an argument to avoid
5273 looping through the list. */
5276 push_to_sequence2 (rtx first, rtx last)
5280 set_first_insn (first);
5281 set_last_insn (last);
5284 /* Set up the outer-level insn chain
5285 as the current sequence, saving the previously current one. */
5288 push_topmost_sequence (void)
5290 struct sequence_stack *stack, *top = NULL;
5294 for (stack = seq_stack; stack; stack = stack->next)
5297 set_first_insn (top->first);
5298 set_last_insn (top->last);
5301 /* After emitting to the outer-level insn chain, update the outer-level
5302 insn chain, and restore the previous saved state. */
5305 pop_topmost_sequence (void)
5307 struct sequence_stack *stack, *top = NULL;
5309 for (stack = seq_stack; stack; stack = stack->next)
5312 top->first = get_insns ();
5313 top->last = get_last_insn ();
5318 /* After emitting to a sequence, restore previous saved state.
5320 To get the contents of the sequence just made, you must call
5321 `get_insns' *before* calling here.
5323 If the compiler might have deferred popping arguments while
5324 generating this sequence, and this sequence will not be immediately
5325 inserted into the instruction stream, use do_pending_stack_adjust
5326 before calling get_insns. That will ensure that the deferred
5327 pops are inserted into this sequence, and not into some random
5328 location in the instruction stream. See INHIBIT_DEFER_POP for more
5329 information about deferred popping of arguments. */
5334 struct sequence_stack *tem = seq_stack;
5336 set_first_insn (tem->first);
5337 set_last_insn (tem->last);
5338 seq_stack = tem->next;
5340 memset (tem, 0, sizeof (*tem));
5341 tem->next = free_sequence_stack;
5342 free_sequence_stack = tem;
5345 /* Return 1 if currently emitting into a sequence. */
5348 in_sequence_p (void)
5350 return seq_stack != 0;
5353 /* Put the various virtual registers into REGNO_REG_RTX. */
5356 init_virtual_regs (void)
5358 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5359 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5360 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5361 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5362 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5366 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5367 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5368 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5369 static int copy_insn_n_scratches;
5371 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5372 copied an ASM_OPERANDS.
5373 In that case, it is the original input-operand vector. */
5374 static rtvec orig_asm_operands_vector;
5376 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5377 copied an ASM_OPERANDS.
5378 In that case, it is the copied input-operand vector. */
5379 static rtvec copy_asm_operands_vector;
5381 /* Likewise for the constraints vector. */
5382 static rtvec orig_asm_constraints_vector;
5383 static rtvec copy_asm_constraints_vector;
5385 /* Recursively create a new copy of an rtx for copy_insn.
5386 This function differs from copy_rtx in that it handles SCRATCHes and
5387 ASM_OPERANDs properly.
5388 Normally, this function is not used directly; use copy_insn as front end.
5389 However, you could first copy an insn pattern with copy_insn and then use
5390 this function afterwards to properly copy any REG_NOTEs containing
5394 copy_insn_1 (rtx orig)
5399 const char *format_ptr;
5404 code = GET_CODE (orig);
5419 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5424 for (i = 0; i < copy_insn_n_scratches; i++)
5425 if (copy_insn_scratch_in[i] == orig)
5426 return copy_insn_scratch_out[i];
5430 if (shared_const_p (orig))
5434 /* A MEM with a constant address is not sharable. The problem is that
5435 the constant address may need to be reloaded. If the mem is shared,
5436 then reloading one copy of this mem will cause all copies to appear
5437 to have been reloaded. */
5443 /* Copy the various flags, fields, and other information. We assume
5444 that all fields need copying, and then clear the fields that should
5445 not be copied. That is the sensible default behavior, and forces
5446 us to explicitly document why we are *not* copying a flag. */
5447 copy = shallow_copy_rtx (orig);
5449 /* We do not copy the USED flag, which is used as a mark bit during
5450 walks over the RTL. */
5451 RTX_FLAG (copy, used) = 0;
5453 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5456 RTX_FLAG (copy, jump) = 0;
5457 RTX_FLAG (copy, call) = 0;
5458 RTX_FLAG (copy, frame_related) = 0;
5461 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5463 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5464 switch (*format_ptr++)
5467 if (XEXP (orig, i) != NULL)
5468 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5473 if (XVEC (orig, i) == orig_asm_constraints_vector)
5474 XVEC (copy, i) = copy_asm_constraints_vector;
5475 else if (XVEC (orig, i) == orig_asm_operands_vector)
5476 XVEC (copy, i) = copy_asm_operands_vector;
5477 else if (XVEC (orig, i) != NULL)
5479 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5480 for (j = 0; j < XVECLEN (copy, i); j++)
5481 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5492 /* These are left unchanged. */
5499 if (code == SCRATCH)
5501 i = copy_insn_n_scratches++;
5502 gcc_assert (i < MAX_RECOG_OPERANDS);
5503 copy_insn_scratch_in[i] = orig;
5504 copy_insn_scratch_out[i] = copy;
5506 else if (code == ASM_OPERANDS)
5508 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5509 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5510 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5511 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5517 /* Create a new copy of an rtx.
5518 This function differs from copy_rtx in that it handles SCRATCHes and
5519 ASM_OPERANDs properly.
5520 INSN doesn't really have to be a full INSN; it could be just the
5523 copy_insn (rtx insn)
5525 copy_insn_n_scratches = 0;
5526 orig_asm_operands_vector = 0;
5527 orig_asm_constraints_vector = 0;
5528 copy_asm_operands_vector = 0;
5529 copy_asm_constraints_vector = 0;
5530 return copy_insn_1 (insn);
5533 /* Initialize data structures and variables in this file
5534 before generating rtl for each function. */
5539 set_first_insn (NULL);
5540 set_last_insn (NULL);
5541 if (MIN_NONDEBUG_INSN_UID)
5542 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5545 cur_debug_insn_uid = 1;
5546 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5547 last_location = UNKNOWN_LOCATION;
5548 first_label_num = label_num;
5551 /* Init the tables that describe all the pseudo regs. */
5553 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5555 crtl->emit.regno_pointer_align
5556 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5559 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5561 /* Put copies of all the hard registers into regno_reg_rtx. */
5562 memcpy (regno_reg_rtx,
5563 static_regno_reg_rtx,
5564 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5566 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5567 init_virtual_regs ();
5569 /* Indicate that the virtual registers and stack locations are
5571 REG_POINTER (stack_pointer_rtx) = 1;
5572 REG_POINTER (frame_pointer_rtx) = 1;
5573 REG_POINTER (hard_frame_pointer_rtx) = 1;
5574 REG_POINTER (arg_pointer_rtx) = 1;
5576 REG_POINTER (virtual_incoming_args_rtx) = 1;
5577 REG_POINTER (virtual_stack_vars_rtx) = 1;
5578 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5579 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5580 REG_POINTER (virtual_cfa_rtx) = 1;
5582 #ifdef STACK_BOUNDARY
5583 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5584 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5585 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5586 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5588 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5589 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5590 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5591 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5592 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5595 #ifdef INIT_EXPANDERS
5600 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5603 gen_const_vector (enum machine_mode mode, int constant)
5608 enum machine_mode inner;
5610 units = GET_MODE_NUNITS (mode);
5611 inner = GET_MODE_INNER (mode);
5613 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5615 v = rtvec_alloc (units);
5617 /* We need to call this function after we set the scalar const_tiny_rtx
5619 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5621 for (i = 0; i < units; ++i)
5622 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5624 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5628 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5629 all elements are zero, and the one vector when all elements are one. */
5631 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5633 enum machine_mode inner = GET_MODE_INNER (mode);
5634 int nunits = GET_MODE_NUNITS (mode);
5638 /* Check to see if all of the elements have the same value. */
5639 x = RTVEC_ELT (v, nunits - 1);
5640 for (i = nunits - 2; i >= 0; i--)
5641 if (RTVEC_ELT (v, i) != x)
5644 /* If the values are all the same, check to see if we can use one of the
5645 standard constant vectors. */
5648 if (x == CONST0_RTX (inner))
5649 return CONST0_RTX (mode);
5650 else if (x == CONST1_RTX (inner))
5651 return CONST1_RTX (mode);
5654 return gen_rtx_raw_CONST_VECTOR (mode, v);
5657 /* Initialise global register information required by all functions. */
5660 init_emit_regs (void)
5664 /* Reset register attributes */
5665 htab_empty (reg_attrs_htab);
5667 /* We need reg_raw_mode, so initialize the modes now. */
5668 init_reg_modes_target ();
5670 /* Assign register numbers to the globally defined register rtx. */
5671 pc_rtx = gen_rtx_PC (VOIDmode);
5672 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5673 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5674 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5675 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5676 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5677 virtual_incoming_args_rtx =
5678 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5679 virtual_stack_vars_rtx =
5680 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5681 virtual_stack_dynamic_rtx =
5682 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5683 virtual_outgoing_args_rtx =
5684 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5685 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5687 /* Initialize RTL for commonly used hard registers. These are
5688 copied into regno_reg_rtx as we begin to compile each function. */
5689 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5690 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5692 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5693 return_address_pointer_rtx
5694 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5697 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5698 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5700 pic_offset_table_rtx = NULL_RTX;
5703 /* Create some permanent unique rtl objects shared between all functions. */
5706 init_emit_once (void)
5709 enum machine_mode mode;
5710 enum machine_mode double_mode;
5712 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5714 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5715 const_int_htab_eq, NULL);
5717 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5718 const_double_htab_eq, NULL);
5720 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5721 const_fixed_htab_eq, NULL);
5723 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5724 mem_attrs_htab_eq, NULL);
5725 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5726 reg_attrs_htab_eq, NULL);
5728 /* Compute the word and byte modes. */
5730 byte_mode = VOIDmode;
5731 word_mode = VOIDmode;
5732 double_mode = VOIDmode;
5734 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5736 mode = GET_MODE_WIDER_MODE (mode))
5738 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5739 && byte_mode == VOIDmode)
5742 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5743 && word_mode == VOIDmode)
5747 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5749 mode = GET_MODE_WIDER_MODE (mode))
5751 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5752 && double_mode == VOIDmode)
5756 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5758 #ifdef INIT_EXPANDERS
5759 /* This is to initialize {init|mark|free}_machine_status before the first
5760 call to push_function_context_to. This is needed by the Chill front
5761 end which calls push_function_context_to before the first call to
5762 init_function_start. */
5766 /* Create the unique rtx's for certain rtx codes and operand values. */
5768 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5769 tries to use these variables. */
5770 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5771 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5772 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5774 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5775 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5776 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5778 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5780 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5781 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5782 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5787 dconsthalf = dconst1;
5788 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5790 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5792 const REAL_VALUE_TYPE *const r =
5793 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5795 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5797 mode = GET_MODE_WIDER_MODE (mode))
5798 const_tiny_rtx[i][(int) mode] =
5799 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5801 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5803 mode = GET_MODE_WIDER_MODE (mode))
5804 const_tiny_rtx[i][(int) mode] =
5805 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5807 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5809 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5811 mode = GET_MODE_WIDER_MODE (mode))
5812 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5814 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5816 mode = GET_MODE_WIDER_MODE (mode))
5817 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5820 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5822 mode = GET_MODE_WIDER_MODE (mode))
5824 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5825 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5828 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5830 mode = GET_MODE_WIDER_MODE (mode))
5832 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5833 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5836 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5838 mode = GET_MODE_WIDER_MODE (mode))
5840 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5841 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5844 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5846 mode = GET_MODE_WIDER_MODE (mode))
5848 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5849 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5852 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5854 mode = GET_MODE_WIDER_MODE (mode))
5856 FCONST0(mode).data.high = 0;
5857 FCONST0(mode).data.low = 0;
5858 FCONST0(mode).mode = mode;
5859 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5860 FCONST0 (mode), mode);
5863 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5865 mode = GET_MODE_WIDER_MODE (mode))
5867 FCONST0(mode).data.high = 0;
5868 FCONST0(mode).data.low = 0;
5869 FCONST0(mode).mode = mode;
5870 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5871 FCONST0 (mode), mode);
5874 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5876 mode = GET_MODE_WIDER_MODE (mode))
5878 FCONST0(mode).data.high = 0;
5879 FCONST0(mode).data.low = 0;
5880 FCONST0(mode).mode = mode;
5881 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5882 FCONST0 (mode), mode);
5884 /* We store the value 1. */
5885 FCONST1(mode).data.high = 0;
5886 FCONST1(mode).data.low = 0;
5887 FCONST1(mode).mode = mode;
5888 lshift_double (1, 0, GET_MODE_FBIT (mode),
5889 2 * HOST_BITS_PER_WIDE_INT,
5890 &FCONST1(mode).data.low,
5891 &FCONST1(mode).data.high,
5892 SIGNED_FIXED_POINT_MODE_P (mode));
5893 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5894 FCONST1 (mode), mode);
5897 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5899 mode = GET_MODE_WIDER_MODE (mode))
5901 FCONST0(mode).data.high = 0;
5902 FCONST0(mode).data.low = 0;
5903 FCONST0(mode).mode = mode;
5904 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5905 FCONST0 (mode), mode);
5907 /* We store the value 1. */
5908 FCONST1(mode).data.high = 0;
5909 FCONST1(mode).data.low = 0;
5910 FCONST1(mode).mode = mode;
5911 lshift_double (1, 0, GET_MODE_FBIT (mode),
5912 2 * HOST_BITS_PER_WIDE_INT,
5913 &FCONST1(mode).data.low,
5914 &FCONST1(mode).data.high,
5915 SIGNED_FIXED_POINT_MODE_P (mode));
5916 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5917 FCONST1 (mode), mode);
5920 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5922 mode = GET_MODE_WIDER_MODE (mode))
5924 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5927 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5929 mode = GET_MODE_WIDER_MODE (mode))
5931 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5934 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5936 mode = GET_MODE_WIDER_MODE (mode))
5938 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5939 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5942 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5944 mode = GET_MODE_WIDER_MODE (mode))
5946 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5947 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5950 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5951 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5952 const_tiny_rtx[0][i] = const0_rtx;
5954 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5955 if (STORE_FLAG_VALUE == 1)
5956 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5959 /* Produce exact duplicate of insn INSN after AFTER.
5960 Care updating of libcall regions if present. */
5963 emit_copy_of_insn_after (rtx insn, rtx after)
5967 switch (GET_CODE (insn))
5970 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5974 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5978 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5982 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5983 if (CALL_INSN_FUNCTION_USAGE (insn))
5984 CALL_INSN_FUNCTION_USAGE (new_rtx)
5985 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5986 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5987 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5988 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5989 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5990 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5997 /* Update LABEL_NUSES. */
5998 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6000 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
6002 /* If the old insn is frame related, then so is the new one. This is
6003 primarily needed for IA-64 unwind info which marks epilogue insns,
6004 which may be duplicated by the basic block reordering code. */
6005 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6007 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6008 will make them. REG_LABEL_TARGETs are created there too, but are
6009 supposed to be sticky, so we copy them. */
6010 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6011 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6013 if (GET_CODE (link) == EXPR_LIST)
6014 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6015 copy_insn_1 (XEXP (link, 0)));
6017 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6020 INSN_CODE (new_rtx) = INSN_CODE (insn);
6024 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6026 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6028 if (hard_reg_clobbers[mode][regno])
6029 return hard_reg_clobbers[mode][regno];
6031 return (hard_reg_clobbers[mode][regno] =
6032 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6035 #include "gt-emit-rtl.h"