1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
43 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
279 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
280 && ! reload_in_progress)
281 return frame_pointer_rtx;
282 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
283 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
284 && ! reload_in_progress)
285 return arg_pointer_rtx;
287 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
288 && ! reload_in_progress)
289 return stack_pointer_rtx;
292 rt_val = rtx_alloc (code);
294 REGNO (rt_val) = regno;
300 rt_val = rtx_alloc (code); /* Allocate the storage space. */
301 rt_val->mode = mode; /* Store the machine mode... */
303 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
304 for (i = 0; i < GET_RTX_LENGTH (code); i++)
308 case '0': /* Unused field. */
311 case 'i': /* An integer? */
312 XINT (rt_val, i) = va_arg (p, int);
315 case 'w': /* A wide integer? */
316 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
319 case 's': /* A string? */
320 XSTR (rt_val, i) = va_arg (p, char *);
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val, i) = va_arg (p, rtx);
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val, i) = va_arg (p, rtvec);
338 return rt_val; /* Return the new RTX... */
341 /* gen_rtvec (n, [rt1, ..., rtn])
343 ** This routine creates an rtvec and stores within it the
344 ** pointers to rtx's which are its arguments.
360 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
362 vector = (rtx *) alloca (n * sizeof (rtx));
363 for (i = 0; i < n; i++)
364 vector[i] = va_arg (p, rtx);
367 return gen_rtvec_v (n, vector);
371 gen_rtvec_v (n, argp)
376 register rtvec rt_val;
379 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
381 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
383 for (i = 0; i < n; i++)
384 rt_val->elem[i].rtx = *argp++;
389 /* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
394 enum machine_mode mode;
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
402 if (reload_in_progress || reload_completed)
405 /* Make sure regno_pointer_flag and regno_reg_rtx are large
406 enough to have an element for this pseudo reg number. */
408 if (reg_rtx_no == regno_pointer_flag_length)
412 (char *) oballoc (regno_pointer_flag_length * 2);
413 bzero (new, regno_pointer_flag_length * 2);
414 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
415 regno_pointer_flag = new;
417 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
418 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
419 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
420 regno_reg_rtx = new1;
422 regno_pointer_flag_length *= 2;
425 val = gen_rtx (REG, mode, reg_rtx_no);
426 regno_reg_rtx[reg_rtx_no++] = val;
430 /* Identify REG as a probable pointer register. */
433 mark_reg_pointer (reg)
436 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
439 /* Return 1 plus largest pseudo reg number used in the current function. */
447 /* Return 1 + the largest label number used so far in the current function. */
452 if (last_label_num && label_num == base_label_num)
453 return last_label_num;
457 /* Return first label number used in this function (if any were used). */
460 get_first_label_num ()
462 return first_label_num;
465 /* Return a value representing some low-order bits of X, where the number
466 of low-order bits is given by MODE. Note that no conversion is done
467 between floating-point and fixed-point values, rather, the bit
468 representation is returned.
470 This function handles the cases in common between gen_lowpart, below,
471 and two variants in cse.c and combine.c. These are the cases that can
472 be safely handled at all points in the compilation.
474 If this is not a case we can handle, return 0. */
477 gen_lowpart_common (mode, x)
478 enum machine_mode mode;
483 if (GET_MODE (x) == mode)
486 /* MODE must occupy no more words than the mode of X. */
487 if (GET_MODE (x) != VOIDmode
488 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
489 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
493 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
494 word = ((GET_MODE_SIZE (GET_MODE (x))
495 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
498 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
499 && (GET_MODE_CLASS (mode) == MODE_INT
500 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
502 /* If we are getting the low-order part of something that has been
503 sign- or zero-extended, we can either just use the object being
504 extended or make a narrower extension. If we want an even smaller
505 piece than the size of the object being extended, call ourselves
508 This case is used mostly by combine and cse. */
510 if (GET_MODE (XEXP (x, 0)) == mode)
512 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
513 return gen_lowpart_common (mode, XEXP (x, 0));
514 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
515 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
517 else if (GET_CODE (x) == SUBREG
518 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
519 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
520 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
522 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
523 else if (GET_CODE (x) == REG)
525 /* If the register is not valid for MODE, return 0. If we don't
526 do this, there is no way to fix up the resulting REG later. */
527 if (REGNO (x) < FIRST_PSEUDO_REGISTER
528 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
530 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
531 /* integrate.c can't handle parts of a return value register. */
532 && (! REG_FUNCTION_VALUE_P (x)
533 || ! rtx_equal_function_value_matters)
534 /* We want to keep the stack, frame, and arg pointers
536 && REGNO (x) != FRAME_POINTER_REGNUM
537 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
538 && REGNO (x) != ARG_POINTER_REGNUM
540 && REGNO (x) != STACK_POINTER_REGNUM)
541 return gen_rtx (REG, mode, REGNO (x) + word);
543 return gen_rtx (SUBREG, mode, x, word);
546 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
547 from the low-order part of the constant. */
548 else if ((GET_MODE_CLASS (mode) == MODE_INT
549 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
550 && GET_MODE (x) == VOIDmode
551 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
553 /* If MODE is twice the host word size, X is already the desired
554 representation. Otherwise, if MODE is wider than a word, we can't
555 do this. If MODE is exactly a word, return just one CONST_INT.
556 If MODE is smaller than a word, clear the bits that don't belong
557 in our mode, unless they and our sign bit are all one. So we get
558 either a reasonable negative value or a reasonable unsigned value
561 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
563 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
565 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
566 return (GET_CODE (x) == CONST_INT ? x
567 : GEN_INT (CONST_DOUBLE_LOW (x)));
570 /* MODE must be narrower than HOST_BITS_PER_INT. */
571 int width = GET_MODE_BITSIZE (mode);
572 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
573 : CONST_DOUBLE_LOW (x));
575 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
576 != ((HOST_WIDE_INT) (-1) << (width - 1))))
577 val &= ((HOST_WIDE_INT) 1 << width) - 1;
579 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
584 /* If X is an integral constant but we want it in floating-point, it
585 must be the case that we have a union of an integer and a floating-point
586 value. If the machine-parameters allow it, simulate that union here
587 and return the result. The two-word and single-word cases are
590 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
591 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
592 || flag_pretend_float)
593 && GET_MODE_CLASS (mode) == MODE_FLOAT
594 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
595 && GET_CODE (x) == CONST_INT
596 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
597 #ifdef REAL_ARITHMETIC
603 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
604 return immed_real_const_1 (r, mode);
608 union {HOST_WIDE_INT i; float d; } u;
611 return immed_real_const_1 (u.d, mode);
614 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
615 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
616 || flag_pretend_float)
617 && GET_MODE_CLASS (mode) == MODE_FLOAT
618 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
619 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
620 && GET_MODE (x) == VOIDmode
621 && (sizeof (double) * HOST_BITS_PER_CHAR
622 == 2 * HOST_BITS_PER_WIDE_INT))
623 #ifdef REAL_ARITHMETIC
627 HOST_WIDE_INT low, high;
629 if (GET_CODE (x) == CONST_INT)
630 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
632 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
634 /* TARGET_DOUBLE takes the addressing order of the target machine. */
635 #ifdef WORDS_BIG_ENDIAN
636 i[0] = high, i[1] = low;
638 i[0] = low, i[1] = high;
641 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
642 return immed_real_const_1 (r, mode);
646 union {HOST_WIDE_INT i[2]; double d; } u;
647 HOST_WIDE_INT low, high;
649 if (GET_CODE (x) == CONST_INT)
650 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
652 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
654 #ifdef HOST_WORDS_BIG_ENDIAN
655 u.i[0] = high, u.i[1] = low;
657 u.i[0] = low, u.i[1] = high;
660 return immed_real_const_1 (u.d, mode);
663 /* Similarly, if this is converting a floating-point value into a
664 single-word integer. Only do this is the host and target parameters are
667 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
668 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
669 || flag_pretend_float)
670 && (GET_MODE_CLASS (mode) == MODE_INT
671 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
672 && GET_CODE (x) == CONST_DOUBLE
673 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
674 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
675 return operand_subword (x, 0, 0, GET_MODE (x));
677 /* Similarly, if this is converting a floating-point value into a
678 two-word integer, we can do this one word at a time and make an
679 integer. Only do this is the host and target parameters are
682 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
683 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
684 || flag_pretend_float)
685 && (GET_MODE_CLASS (mode) == MODE_INT
686 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
687 && GET_CODE (x) == CONST_DOUBLE
688 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
689 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
691 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
692 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
694 if (lowpart && GET_CODE (lowpart) == CONST_INT
695 && highpart && GET_CODE (highpart) == CONST_INT)
696 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
699 /* Otherwise, we can't do this. */
703 /* Return the real part (which has mode MODE) of a complex value X.
704 This always comes at the low address in memory. */
707 gen_realpart (mode, x)
708 enum machine_mode mode;
711 if (WORDS_BIG_ENDIAN)
712 return gen_highpart (mode, x);
714 return gen_lowpart (mode, x);
717 /* Return the imaginary part (which has mode MODE) of a complex value X.
718 This always comes at the high address in memory. */
721 gen_imagpart (mode, x)
722 enum machine_mode mode;
725 if (WORDS_BIG_ENDIAN)
726 return gen_lowpart (mode, x);
728 return gen_highpart (mode, x);
731 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
732 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
733 least-significant part of X.
734 MODE specifies how big a part of X to return;
735 it usually should not be larger than a word.
736 If X is a MEM whose address is a QUEUED, the value may be so also. */
739 gen_lowpart (mode, x)
740 enum machine_mode mode;
743 rtx result = gen_lowpart_common (mode, x);
747 else if (GET_CODE (x) == MEM)
749 /* The only additional case we can do is MEM. */
750 register int offset = 0;
751 if (WORDS_BIG_ENDIAN)
752 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
753 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
755 if (BYTES_BIG_ENDIAN)
756 /* Adjust the address so that the address-after-the-data
758 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
759 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
761 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
767 /* Like `gen_lowpart', but refer to the most significant part.
768 This is used to access the imaginary part of a complex number. */
771 gen_highpart (mode, x)
772 enum machine_mode mode;
775 /* This case loses if X is a subreg. To catch bugs early,
776 complain if an invalid MODE is used even in other cases. */
777 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
778 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
780 if (GET_CODE (x) == CONST_DOUBLE
781 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
782 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
785 return gen_rtx (CONST_INT, VOIDmode,
786 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
787 else if (GET_CODE (x) == CONST_INT)
789 else if (GET_CODE (x) == MEM)
791 register int offset = 0;
792 #if !WORDS_BIG_ENDIAN
793 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
794 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
796 #if !BYTES_BIG_ENDIAN
797 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
798 offset -= (GET_MODE_SIZE (mode)
799 - MIN (UNITS_PER_WORD,
800 GET_MODE_SIZE (GET_MODE (x))));
802 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
804 else if (GET_CODE (x) == SUBREG)
806 /* The only time this should occur is when we are looking at a
807 multi-word item with a SUBREG whose mode is the same as that of the
808 item. It isn't clear what we would do if it wasn't. */
809 if (SUBREG_WORD (x) != 0)
811 return gen_highpart (mode, SUBREG_REG (x));
813 else if (GET_CODE (x) == REG)
817 #if !WORDS_BIG_ENDIAN
818 if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
819 word = ((GET_MODE_SIZE (GET_MODE (x))
820 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
823 if (REGNO (x) < FIRST_PSEUDO_REGISTER
824 /* We want to keep the stack, frame, and arg pointers special. */
825 && REGNO (x) != FRAME_POINTER_REGNUM
826 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
827 && REGNO (x) != ARG_POINTER_REGNUM
829 && REGNO (x) != STACK_POINTER_REGNUM)
830 return gen_rtx (REG, mode, REGNO (x) + word);
832 return gen_rtx (SUBREG, mode, x, word);
838 /* Return 1 iff X, assumed to be a SUBREG,
839 refers to the least significant part of its containing reg.
840 If X is not a SUBREG, always return 1 (it is its own low part!). */
846 if (GET_CODE (x) != SUBREG)
850 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
851 return (SUBREG_WORD (x)
852 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
853 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
856 return SUBREG_WORD (x) == 0;
859 /* Return subword I of operand OP.
860 The word number, I, is interpreted as the word number starting at the
861 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
862 otherwise it is the high-order word.
864 If we cannot extract the required word, we return zero. Otherwise, an
865 rtx corresponding to the requested word will be returned.
867 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
868 reload has completed, a valid address will always be returned. After
869 reload, if a valid address cannot be returned, we return zero.
871 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
872 it is the responsibility of the caller.
874 MODE is the mode of OP in case it is a CONST_INT. */
877 operand_subword (op, i, validate_address, mode)
880 int validate_address;
881 enum machine_mode mode;
884 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
886 if (mode == VOIDmode)
887 mode = GET_MODE (op);
889 if (mode == VOIDmode)
892 /* If OP is narrower than a word or if we want a word outside OP, fail. */
894 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
895 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
898 /* If OP is already an integer word, return it. */
899 if (GET_MODE_CLASS (mode) == MODE_INT
900 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
903 /* If OP is a REG or SUBREG, we can handle it very simply. */
904 if (GET_CODE (op) == REG)
906 /* If the register is not valid for MODE, return 0. If we don't
907 do this, there is no way to fix up the resulting REG later. */
908 if (REGNO (op) < FIRST_PSEUDO_REGISTER
909 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
911 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
912 || (REG_FUNCTION_VALUE_P (op)
913 && rtx_equal_function_value_matters)
914 /* We want to keep the stack, frame, and arg pointers
916 || REGNO (op) == FRAME_POINTER_REGNUM
917 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
918 || REGNO (op) == ARG_POINTER_REGNUM
920 || REGNO (op) == STACK_POINTER_REGNUM)
921 return gen_rtx (SUBREG, word_mode, op, i);
923 return gen_rtx (REG, word_mode, REGNO (op) + i);
925 else if (GET_CODE (op) == SUBREG)
926 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
928 /* Form a new MEM at the requested address. */
929 if (GET_CODE (op) == MEM)
931 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
934 if (validate_address)
936 if (reload_completed)
938 if (! strict_memory_address_p (word_mode, addr))
942 addr = memory_address (word_mode, addr);
945 new = gen_rtx (MEM, word_mode, addr);
947 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
948 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
949 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
954 /* The only remaining cases are when OP is a constant. If the host and
955 target floating formats are the same, handling two-word floating
956 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
957 are defined as returning 32 bit and 64-bit values, respectively,
958 and not values of BITS_PER_WORD and 2 * BITS_PER_WORD bits. */
959 #ifdef REAL_ARITHMETIC
960 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
961 && GET_MODE_CLASS (mode) == MODE_FLOAT
962 && GET_MODE_BITSIZE (mode) == 64
963 && GET_CODE (op) == CONST_DOUBLE)
968 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
969 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
971 /* We handle 32-bit and 64-bit host words here. Note that the order in
972 which the words are written depends on the word endianness.
974 ??? This is a potential portability problem and should
975 be fixed at some point. */
976 if (HOST_BITS_PER_WIDE_INT == 32)
977 return GEN_INT (k[i]);
978 else if (HOST_BITS_PER_WIDE_INT == 64 && i == 0)
979 return GEN_INT ((k[! WORDS_BIG_ENDIAN] << (HOST_BITS_PER_WIDE_INT / 2))
980 | k[WORDS_BIG_ENDIAN]);
984 #else /* no REAL_ARITHMETIC */
985 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
986 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
987 || flag_pretend_float)
988 && GET_MODE_CLASS (mode) == MODE_FLOAT
989 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
990 && GET_CODE (op) == CONST_DOUBLE)
992 /* The constant is stored in the host's word-ordering,
993 but we want to access it in the target's word-ordering. Some
994 compilers don't like a conditional inside macro args, so we have two
995 copies of the return. */
996 #ifdef HOST_WORDS_BIG_ENDIAN
997 return GEN_INT (i == WORDS_BIG_ENDIAN
998 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1000 return GEN_INT (i != WORDS_BIG_ENDIAN
1001 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1004 #endif /* no REAL_ARITHMETIC */
1006 /* Single word float is a little harder, since single- and double-word
1007 values often do not have the same high-order bits. We have already
1008 verified that we want the only defined word of the single-word value. */
1009 #ifdef REAL_ARITHMETIC
1010 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1011 && GET_MODE_CLASS (mode) == MODE_FLOAT
1012 && GET_MODE_BITSIZE (mode) == 32
1013 && GET_CODE (op) == CONST_DOUBLE)
1018 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1019 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1023 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1024 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1025 || flag_pretend_float)
1026 && GET_MODE_CLASS (mode) == MODE_FLOAT
1027 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1028 && GET_CODE (op) == CONST_DOUBLE)
1031 union {float f; HOST_WIDE_INT i; } u;
1033 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1036 return GEN_INT (u.i);
1038 #endif /* no REAL_ARITHMETIC */
1040 /* The only remaining cases that we can handle are integers.
1041 Convert to proper endianness now since these cases need it.
1042 At this point, i == 0 means the low-order word.
1044 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1045 in general. However, if OP is (const_int 0), we can just return
1048 if (op == const0_rtx)
1051 if (GET_MODE_CLASS (mode) != MODE_INT
1052 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1053 || BITS_PER_WORD > HOST_BITS_PER_INT)
1056 if (WORDS_BIG_ENDIAN)
1057 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1059 /* Find out which word on the host machine this value is in and get
1060 it from the constant. */
1061 val = (i / size_ratio == 0
1062 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1063 : (GET_CODE (op) == CONST_INT
1064 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1066 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1067 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1068 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1069 & (((HOST_WIDE_INT) 1
1070 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1072 return GEN_INT (val);
1075 /* Similar to `operand_subword', but never return 0. If we can't extract
1076 the required subword, put OP into a register and try again. If that fails,
1077 abort. We always validate the address in this case. It is not valid
1078 to call this function after reload; it is mostly meant for RTL
1081 MODE is the mode of OP, in case it is CONST_INT. */
1084 operand_subword_force (op, i, mode)
1087 enum machine_mode mode;
1089 rtx result = operand_subword (op, i, 1, mode);
1094 if (mode != BLKmode && mode != VOIDmode)
1095 op = force_reg (mode, op);
1097 result = operand_subword (op, i, 1, mode);
1104 /* Given a compare instruction, swap the operands.
1105 A test instruction is changed into a compare of 0 against the operand. */
1108 reverse_comparison (insn)
1111 rtx body = PATTERN (insn);
1114 if (GET_CODE (body) == SET)
1115 comp = SET_SRC (body);
1117 comp = SET_SRC (XVECEXP (body, 0, 0));
1119 if (GET_CODE (comp) == COMPARE)
1121 rtx op0 = XEXP (comp, 0);
1122 rtx op1 = XEXP (comp, 1);
1123 XEXP (comp, 0) = op1;
1124 XEXP (comp, 1) = op0;
1128 rtx new = gen_rtx (COMPARE, VOIDmode,
1129 CONST0_RTX (GET_MODE (comp)), comp);
1130 if (GET_CODE (body) == SET)
1131 SET_SRC (body) = new;
1133 SET_SRC (XVECEXP (body, 0, 0)) = new;
1137 /* Return a memory reference like MEMREF, but with its mode changed
1138 to MODE and its address changed to ADDR.
1139 (VOIDmode means don't change the mode.
1140 NULL for ADDR means don't change the address.) */
1143 change_address (memref, mode, addr)
1145 enum machine_mode mode;
1150 if (GET_CODE (memref) != MEM)
1152 if (mode == VOIDmode)
1153 mode = GET_MODE (memref);
1155 addr = XEXP (memref, 0);
1157 /* If reload is in progress or has completed, ADDR must be valid.
1158 Otherwise, we can call memory_address to make it valid. */
1159 if (reload_completed || reload_in_progress)
1161 if (! memory_address_p (mode, addr))
1165 addr = memory_address (mode, addr);
1167 new = gen_rtx (MEM, mode, addr);
1168 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1169 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1170 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1174 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1179 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0,
1180 label_num++, NULL_PTR);
1181 LABEL_NUSES (label) = 0;
1185 /* For procedure integration. */
1187 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1188 from a permanent obstack when the opportunity arises. */
1191 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1192 last_labelno, max_parm_regnum, max_regnum, args_size,
1193 pops_args, stack_slots, function_flags,
1194 outgoing_args_size, original_arg_vector,
1195 original_decl_initial)
1196 rtx first_insn, first_parm_insn;
1197 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1201 int outgoing_args_size;
1202 rtvec original_arg_vector;
1203 rtx original_decl_initial;
1205 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1206 cur_insn_uid++, NULL_RTX,
1207 first_insn, first_parm_insn,
1208 first_labelno, last_labelno,
1209 max_parm_regnum, max_regnum, args_size, pops_args,
1210 stack_slots, function_flags, outgoing_args_size,
1211 original_arg_vector, original_decl_initial);
1215 /* Install new pointers to the first and last insns in the chain.
1216 Used for an inline-procedure after copying the insn chain. */
1219 set_new_first_and_last_insn (first, last)
1226 /* Set the range of label numbers found in the current function.
1227 This is used when belatedly compiling an inline function. */
1230 set_new_first_and_last_label_num (first, last)
1233 base_label_num = label_num;
1234 first_label_num = first;
1235 last_label_num = last;
1238 /* Save all variables describing the current status into the structure *P.
1239 This is used before starting a nested function. */
1242 save_emit_status (p)
1245 p->reg_rtx_no = reg_rtx_no;
1246 p->first_label_num = first_label_num;
1247 p->first_insn = first_insn;
1248 p->last_insn = last_insn;
1249 p->sequence_stack = sequence_stack;
1250 p->cur_insn_uid = cur_insn_uid;
1251 p->last_linenum = last_linenum;
1252 p->last_filename = last_filename;
1253 p->regno_pointer_flag = regno_pointer_flag;
1254 p->regno_pointer_flag_length = regno_pointer_flag_length;
1255 p->regno_reg_rtx = regno_reg_rtx;
1258 /* Restore all variables describing the current status from the structure *P.
1259 This is used after a nested function. */
1262 restore_emit_status (p)
1267 reg_rtx_no = p->reg_rtx_no;
1268 first_label_num = p->first_label_num;
1270 first_insn = p->first_insn;
1271 last_insn = p->last_insn;
1272 sequence_stack = p->sequence_stack;
1273 cur_insn_uid = p->cur_insn_uid;
1274 last_linenum = p->last_linenum;
1275 last_filename = p->last_filename;
1276 regno_pointer_flag = p->regno_pointer_flag;
1277 regno_pointer_flag_length = p->regno_pointer_flag_length;
1278 regno_reg_rtx = p->regno_reg_rtx;
1280 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1281 sequence_element_free_list = 0;
1282 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1283 sequence_result[i] = 0;
1286 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1287 It does not work to do this twice, because the mark bits set here
1288 are not cleared afterwards. */
1291 unshare_all_rtl (insn)
1294 for (; insn; insn = NEXT_INSN (insn))
1295 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1296 || GET_CODE (insn) == CALL_INSN)
1298 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1299 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1300 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1303 /* Make sure the addresses of stack slots found outside the insn chain
1304 (such as, in DECL_RTL of a variable) are not shared
1305 with the insn chain.
1307 This special care is necessary when the stack slot MEM does not
1308 actually appear in the insn chain. If it does appear, its address
1309 is unshared from all else at that point. */
1311 copy_rtx_if_shared (stack_slot_list);
1314 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1315 Recursively does the same for subexpressions. */
1318 copy_rtx_if_shared (orig)
1321 register rtx x = orig;
1323 register enum rtx_code code;
1324 register char *format_ptr;
1330 code = GET_CODE (x);
1332 /* These types may be freely shared. */
1345 /* SCRATCH must be shared because they represent distinct values. */
1349 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1350 a LABEL_REF, it isn't sharable. */
1351 if (GET_CODE (XEXP (x, 0)) == PLUS
1352 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1353 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1363 /* The chain of insns is not being copied. */
1367 /* A MEM is allowed to be shared if its address is constant
1368 or is a constant plus one of the special registers. */
1369 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1370 || XEXP (x, 0) == virtual_stack_vars_rtx
1371 || XEXP (x, 0) == virtual_incoming_args_rtx)
1374 if (GET_CODE (XEXP (x, 0)) == PLUS
1375 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1376 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1377 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1379 /* This MEM can appear in more than one place,
1380 but its address better not be shared with anything else. */
1382 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1388 /* This rtx may not be shared. If it has already been seen,
1389 replace it with a copy of itself. */
1395 copy = rtx_alloc (code);
1396 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1397 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1403 /* Now scan the subexpressions recursively.
1404 We can store any replaced subexpressions directly into X
1405 since we know X is not shared! Any vectors in X
1406 must be copied if X was copied. */
1408 format_ptr = GET_RTX_FORMAT (code);
1410 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1412 switch (*format_ptr++)
1415 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1419 if (XVEC (x, i) != NULL)
1422 int len = XVECLEN (x, i);
1424 if (copied && len > 0)
1425 XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0));
1426 for (j = 0; j < len; j++)
1427 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1435 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1436 to look for shared sub-parts. */
1439 reset_used_flags (x)
1443 register enum rtx_code code;
1444 register char *format_ptr;
1450 code = GET_CODE (x);
1452 /* These types may be freely shared so we needn't do any reseting
1473 /* The chain of insns is not being copied. */
1479 format_ptr = GET_RTX_FORMAT (code);
1480 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1482 switch (*format_ptr++)
1485 reset_used_flags (XEXP (x, i));
1489 for (j = 0; j < XVECLEN (x, i); j++)
1490 reset_used_flags (XVECEXP (x, i, j));
1496 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1497 Return X or the rtx for the pseudo reg the value of X was copied into.
1498 OTHER must be valid as a SET_DEST. */
1501 make_safe_from (x, other)
1505 switch (GET_CODE (other))
1508 other = SUBREG_REG (other);
1510 case STRICT_LOW_PART:
1513 other = XEXP (other, 0);
1519 if ((GET_CODE (other) == MEM
1521 && GET_CODE (x) != REG
1522 && GET_CODE (x) != SUBREG)
1523 || (GET_CODE (other) == REG
1524 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1525 || reg_mentioned_p (other, x))))
1527 rtx temp = gen_reg_rtx (GET_MODE (x));
1528 emit_move_insn (temp, x);
1534 /* Emission of insns (adding them to the doubly-linked list). */
1536 /* Return the first insn of the current sequence or current function. */
1544 /* Return the last insn emitted in current sequence or current function. */
1552 /* Specify a new insn as the last in the chain. */
1555 set_last_insn (insn)
1558 if (NEXT_INSN (insn) != 0)
1563 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1566 get_last_insn_anywhere ()
1568 struct sequence_stack *stack;
1571 for (stack = sequence_stack; stack; stack = stack->next)
1572 if (stack->last != 0)
1577 /* Return a number larger than any instruction's uid in this function. */
1582 return cur_insn_uid;
1585 /* Return the next insn. If it is a SEQUENCE, return the first insn
1594 insn = NEXT_INSN (insn);
1595 if (insn && GET_CODE (insn) == INSN
1596 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1597 insn = XVECEXP (PATTERN (insn), 0, 0);
1603 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1607 previous_insn (insn)
1612 insn = PREV_INSN (insn);
1613 if (insn && GET_CODE (insn) == INSN
1614 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1615 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1621 /* Return the next insn after INSN that is not a NOTE. This routine does not
1622 look inside SEQUENCEs. */
1625 next_nonnote_insn (insn)
1630 insn = NEXT_INSN (insn);
1631 if (insn == 0 || GET_CODE (insn) != NOTE)
1638 /* Return the previous insn before INSN that is not a NOTE. This routine does
1639 not look inside SEQUENCEs. */
1642 prev_nonnote_insn (insn)
1647 insn = PREV_INSN (insn);
1648 if (insn == 0 || GET_CODE (insn) != NOTE)
1655 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1656 or 0, if there is none. This routine does not look inside
1660 next_real_insn (insn)
1665 insn = NEXT_INSN (insn);
1666 if (insn == 0 || GET_CODE (insn) == INSN
1667 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1674 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1675 or 0, if there is none. This routine does not look inside
1679 prev_real_insn (insn)
1684 insn = PREV_INSN (insn);
1685 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1686 || GET_CODE (insn) == JUMP_INSN)
1693 /* Find the next insn after INSN that really does something. This routine
1694 does not look inside SEQUENCEs. Until reload has completed, this is the
1695 same as next_real_insn. */
1698 next_active_insn (insn)
1703 insn = NEXT_INSN (insn);
1705 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1706 || (GET_CODE (insn) == INSN
1707 && (! reload_completed
1708 || (GET_CODE (PATTERN (insn)) != USE
1709 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1716 /* Find the last insn before INSN that really does something. This routine
1717 does not look inside SEQUENCEs. Until reload has completed, this is the
1718 same as prev_real_insn. */
1721 prev_active_insn (insn)
1726 insn = PREV_INSN (insn);
1728 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1729 || (GET_CODE (insn) == INSN
1730 && (! reload_completed
1731 || (GET_CODE (PATTERN (insn)) != USE
1732 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1739 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1747 insn = NEXT_INSN (insn);
1748 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1755 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1763 insn = PREV_INSN (insn);
1764 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1772 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1773 and REG_CC_USER notes so we can find it. */
1776 link_cc0_insns (insn)
1779 rtx user = next_nonnote_insn (insn);
1781 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1782 user = XVECEXP (PATTERN (user), 0, 0);
1784 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1786 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1789 /* Return the next insn that uses CC0 after INSN, which is assumed to
1790 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1791 applied to the result of this function should yield INSN).
1793 Normally, this is simply the next insn. However, if a REG_CC_USER note
1794 is present, it contains the insn that uses CC0.
1796 Return 0 if we can't find the insn. */
1799 next_cc0_user (insn)
1802 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1805 return XEXP (note, 0);
1807 insn = next_nonnote_insn (insn);
1808 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1809 insn = XVECEXP (PATTERN (insn), 0, 0);
1811 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1812 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1818 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1819 note, it is the previous insn. */
1822 prev_cc0_setter (insn)
1825 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1829 return XEXP (note, 0);
1831 insn = prev_nonnote_insn (insn);
1832 if (! sets_cc0_p (PATTERN (insn)))
1839 /* Try splitting insns that can be split for better scheduling.
1840 PAT is the pattern which might split.
1841 TRIAL is the insn providing PAT.
1842 BACKWARDS is non-zero if we are scanning insns from last to first.
1844 If this routine succeeds in splitting, it returns the first or last
1845 replacement insn depending on the value of BACKWARDS. Otherwise, it
1846 returns TRIAL. If the insn to be returned can be split, it will be. */
1849 try_split (pat, trial, backwards)
1853 rtx before = PREV_INSN (trial);
1854 rtx after = NEXT_INSN (trial);
1855 rtx seq = split_insns (pat, trial);
1856 int has_barrier = 0;
1859 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1860 We may need to handle this specially. */
1861 if (after && GET_CODE (after) == BARRIER)
1864 after = NEXT_INSN (after);
1869 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1870 The latter case will normally arise only when being done so that
1871 it, in turn, will be split (SFmode on the 29k is an example). */
1872 if (GET_CODE (seq) == SEQUENCE)
1874 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1875 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1876 increment the usage count so we don't delete the label. */
1879 if (GET_CODE (trial) == JUMP_INSN)
1880 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1881 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1883 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1885 if (JUMP_LABEL (trial))
1886 LABEL_NUSES (JUMP_LABEL (trial))++;
1889 tem = emit_insn_after (seq, before);
1891 delete_insn (trial);
1893 emit_barrier_after (tem);
1895 /* Avoid infinite loop if the result matches the original pattern. */
1896 else if (rtx_equal_p (seq, pat))
1900 PATTERN (trial) = seq;
1901 INSN_CODE (trial) = -1;
1904 /* Set TEM to the insn we should return. */
1905 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1906 return try_split (PATTERN (tem), tem, backwards);
1912 /* Make and return an INSN rtx, initializing all its slots.
1913 Store PATTERN in the pattern slots. */
1916 make_insn_raw (pattern)
1921 insn = rtx_alloc (INSN);
1922 INSN_UID (insn) = cur_insn_uid++;
1924 PATTERN (insn) = pattern;
1925 INSN_CODE (insn) = -1;
1926 LOG_LINKS (insn) = NULL;
1927 REG_NOTES (insn) = NULL;
1932 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1935 make_jump_insn_raw (pattern)
1940 insn = rtx_alloc (JUMP_INSN);
1941 INSN_UID (insn) = cur_insn_uid++;
1943 PATTERN (insn) = pattern;
1944 INSN_CODE (insn) = -1;
1945 LOG_LINKS (insn) = NULL;
1946 REG_NOTES (insn) = NULL;
1947 JUMP_LABEL (insn) = NULL;
1952 /* Add INSN to the end of the doubly-linked list.
1953 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1959 PREV_INSN (insn) = last_insn;
1960 NEXT_INSN (insn) = 0;
1962 if (NULL != last_insn)
1963 NEXT_INSN (last_insn) = insn;
1965 if (NULL == first_insn)
1971 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1972 only function called to insert an insn once delay slots have been filled
1973 since only it knows how to update a SEQUENCE. */
1976 add_insn_after (insn, after)
1979 rtx next = NEXT_INSN (after);
1981 NEXT_INSN (insn) = next;
1982 PREV_INSN (insn) = after;
1986 PREV_INSN (next) = insn;
1987 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1988 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1990 else if (last_insn == after)
1994 struct sequence_stack *stack = sequence_stack;
1995 /* Scan all pending sequences too. */
1996 for (; stack; stack = stack->next)
1997 if (after == stack->last)
2001 NEXT_INSN (after) = insn;
2002 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2004 rtx sequence = PATTERN (after);
2005 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2009 /* Delete all insns made since FROM.
2010 FROM becomes the new last instruction. */
2013 delete_insns_since (from)
2019 NEXT_INSN (from) = 0;
2023 /* Move a consecutive bunch of insns to a different place in the chain.
2024 The insns to be moved are those between FROM and TO.
2025 They are moved to a new position after the insn AFTER.
2026 AFTER must not be FROM or TO or any insn in between.
2028 This function does not know about SEQUENCEs and hence should not be
2029 called after delay-slot filling has been done. */
2032 reorder_insns (from, to, after)
2033 rtx from, to, after;
2035 /* Splice this bunch out of where it is now. */
2036 if (PREV_INSN (from))
2037 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2039 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2040 if (last_insn == to)
2041 last_insn = PREV_INSN (from);
2042 if (first_insn == from)
2043 first_insn = NEXT_INSN (to);
2045 /* Make the new neighbors point to it and it to them. */
2046 if (NEXT_INSN (after))
2047 PREV_INSN (NEXT_INSN (after)) = to;
2049 NEXT_INSN (to) = NEXT_INSN (after);
2050 PREV_INSN (from) = after;
2051 NEXT_INSN (after) = from;
2052 if (after == last_insn)
2056 /* Return the line note insn preceding INSN. */
2059 find_line_note (insn)
2062 if (no_line_numbers)
2065 for (; insn; insn = PREV_INSN (insn))
2066 if (GET_CODE (insn) == NOTE
2067 && NOTE_LINE_NUMBER (insn) >= 0)
2073 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2074 of the moved insns when debugging. This may insert a note between AFTER
2075 and FROM, and another one after TO. */
2078 reorder_insns_with_line_notes (from, to, after)
2079 rtx from, to, after;
2081 rtx from_line = find_line_note (from);
2082 rtx after_line = find_line_note (after);
2084 reorder_insns (from, to, after);
2086 if (from_line == after_line)
2090 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2091 NOTE_LINE_NUMBER (from_line),
2094 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2095 NOTE_LINE_NUMBER (after_line),
2099 /* Emit an insn of given code and pattern
2100 at a specified place within the doubly-linked list. */
2102 /* Make an instruction with body PATTERN
2103 and output it before the instruction BEFORE. */
2106 emit_insn_before (pattern, before)
2107 register rtx pattern, before;
2109 register rtx insn = before;
2111 if (GET_CODE (pattern) == SEQUENCE)
2115 for (i = 0; i < XVECLEN (pattern, 0); i++)
2117 insn = XVECEXP (pattern, 0, i);
2118 add_insn_after (insn, PREV_INSN (before));
2120 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2121 sequence_result[XVECLEN (pattern, 0)] = pattern;
2125 insn = make_insn_raw (pattern);
2126 add_insn_after (insn, PREV_INSN (before));
2132 /* Make an instruction with body PATTERN and code JUMP_INSN
2133 and output it before the instruction BEFORE. */
2136 emit_jump_insn_before (pattern, before)
2137 register rtx pattern, before;
2141 if (GET_CODE (pattern) == SEQUENCE)
2142 insn = emit_insn_before (pattern, before);
2145 insn = make_jump_insn_raw (pattern);
2146 add_insn_after (insn, PREV_INSN (before));
2152 /* Make an instruction with body PATTERN and code CALL_INSN
2153 and output it before the instruction BEFORE. */
2156 emit_call_insn_before (pattern, before)
2157 register rtx pattern, before;
2159 rtx insn = emit_insn_before (pattern, before);
2160 PUT_CODE (insn, CALL_INSN);
2164 /* Make an insn of code BARRIER
2165 and output it before the insn AFTER. */
2168 emit_barrier_before (before)
2169 register rtx before;
2171 register rtx insn = rtx_alloc (BARRIER);
2173 INSN_UID (insn) = cur_insn_uid++;
2175 add_insn_after (insn, PREV_INSN (before));
2179 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2182 emit_note_before (subtype, before)
2186 register rtx note = rtx_alloc (NOTE);
2187 INSN_UID (note) = cur_insn_uid++;
2188 NOTE_SOURCE_FILE (note) = 0;
2189 NOTE_LINE_NUMBER (note) = subtype;
2191 add_insn_after (note, PREV_INSN (before));
2195 /* Make an insn of code INSN with body PATTERN
2196 and output it after the insn AFTER. */
2199 emit_insn_after (pattern, after)
2200 register rtx pattern, after;
2202 register rtx insn = after;
2204 if (GET_CODE (pattern) == SEQUENCE)
2208 for (i = 0; i < XVECLEN (pattern, 0); i++)
2210 insn = XVECEXP (pattern, 0, i);
2211 add_insn_after (insn, after);
2214 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2215 sequence_result[XVECLEN (pattern, 0)] = pattern;
2219 insn = make_insn_raw (pattern);
2220 add_insn_after (insn, after);
2226 /* Similar to emit_insn_after, except that line notes are to be inserted so
2227 as to act as if this insn were at FROM. */
2230 emit_insn_after_with_line_notes (pattern, after, from)
2231 rtx pattern, after, from;
2233 rtx from_line = find_line_note (from);
2234 rtx after_line = find_line_note (after);
2235 rtx insn = emit_insn_after (pattern, after);
2238 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2239 NOTE_LINE_NUMBER (from_line),
2243 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2244 NOTE_LINE_NUMBER (after_line),
2248 /* Make an insn of code JUMP_INSN with body PATTERN
2249 and output it after the insn AFTER. */
2252 emit_jump_insn_after (pattern, after)
2253 register rtx pattern, after;
2257 if (GET_CODE (pattern) == SEQUENCE)
2258 insn = emit_insn_after (pattern, after);
2261 insn = make_jump_insn_raw (pattern);
2262 add_insn_after (insn, after);
2268 /* Make an insn of code BARRIER
2269 and output it after the insn AFTER. */
2272 emit_barrier_after (after)
2275 register rtx insn = rtx_alloc (BARRIER);
2277 INSN_UID (insn) = cur_insn_uid++;
2279 add_insn_after (insn, after);
2283 /* Emit the label LABEL after the insn AFTER. */
2286 emit_label_after (label, after)
2289 /* This can be called twice for the same label
2290 as a result of the confusion that follows a syntax error!
2291 So make it harmless. */
2292 if (INSN_UID (label) == 0)
2294 INSN_UID (label) = cur_insn_uid++;
2295 add_insn_after (label, after);
2301 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2304 emit_note_after (subtype, after)
2308 register rtx note = rtx_alloc (NOTE);
2309 INSN_UID (note) = cur_insn_uid++;
2310 NOTE_SOURCE_FILE (note) = 0;
2311 NOTE_LINE_NUMBER (note) = subtype;
2312 add_insn_after (note, after);
2316 /* Emit a line note for FILE and LINE after the insn AFTER. */
2319 emit_line_note_after (file, line, after)
2326 if (no_line_numbers && line > 0)
2332 note = rtx_alloc (NOTE);
2333 INSN_UID (note) = cur_insn_uid++;
2334 NOTE_SOURCE_FILE (note) = file;
2335 NOTE_LINE_NUMBER (note) = line;
2336 add_insn_after (note, after);
2340 /* Make an insn of code INSN with pattern PATTERN
2341 and add it to the end of the doubly-linked list.
2342 If PATTERN is a SEQUENCE, take the elements of it
2343 and emit an insn for each element.
2345 Returns the last insn emitted. */
2351 rtx insn = last_insn;
2353 if (GET_CODE (pattern) == SEQUENCE)
2357 for (i = 0; i < XVECLEN (pattern, 0); i++)
2359 insn = XVECEXP (pattern, 0, i);
2362 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2363 sequence_result[XVECLEN (pattern, 0)] = pattern;
2367 insn = make_insn_raw (pattern);
2374 /* Emit the insns in a chain starting with INSN.
2375 Return the last insn emitted. */
2385 rtx next = NEXT_INSN (insn);
2394 /* Emit the insns in a chain starting with INSN and place them in front of
2395 the insn BEFORE. Return the last insn emitted. */
2398 emit_insns_before (insn, before)
2406 rtx next = NEXT_INSN (insn);
2407 add_insn_after (insn, PREV_INSN (before));
2415 /* Emit the insns in a chain starting with FIRST and place them in back of
2416 the insn AFTER. Return the last insn emitted. */
2419 emit_insns_after (first, after)
2424 register rtx after_after;
2432 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2435 after_after = NEXT_INSN (after);
2437 NEXT_INSN (after) = first;
2438 PREV_INSN (first) = after;
2439 NEXT_INSN (last) = after_after;
2441 PREV_INSN (after_after) = last;
2443 if (after == last_insn)
2448 /* Make an insn of code JUMP_INSN with pattern PATTERN
2449 and add it to the end of the doubly-linked list. */
2452 emit_jump_insn (pattern)
2455 if (GET_CODE (pattern) == SEQUENCE)
2456 return emit_insn (pattern);
2459 register rtx insn = make_jump_insn_raw (pattern);
2465 /* Make an insn of code CALL_INSN with pattern PATTERN
2466 and add it to the end of the doubly-linked list. */
2469 emit_call_insn (pattern)
2472 if (GET_CODE (pattern) == SEQUENCE)
2473 return emit_insn (pattern);
2476 register rtx insn = make_insn_raw (pattern);
2478 PUT_CODE (insn, CALL_INSN);
2483 /* Add the label LABEL to the end of the doubly-linked list. */
2489 /* This can be called twice for the same label
2490 as a result of the confusion that follows a syntax error!
2491 So make it harmless. */
2492 if (INSN_UID (label) == 0)
2494 INSN_UID (label) = cur_insn_uid++;
2500 /* Make an insn of code BARRIER
2501 and add it to the end of the doubly-linked list. */
2506 register rtx barrier = rtx_alloc (BARRIER);
2507 INSN_UID (barrier) = cur_insn_uid++;
2512 /* Make an insn of code NOTE
2513 with data-fields specified by FILE and LINE
2514 and add it to the end of the doubly-linked list,
2515 but only if line-numbers are desired for debugging info. */
2518 emit_line_note (file, line)
2522 emit_filename = file;
2526 if (no_line_numbers)
2530 return emit_note (file, line);
2533 /* Make an insn of code NOTE
2534 with data-fields specified by FILE and LINE
2535 and add it to the end of the doubly-linked list.
2536 If it is a line-number NOTE, omit it if it matches the previous one. */
2539 emit_note (file, line)
2547 if (file && last_filename && !strcmp (file, last_filename)
2548 && line == last_linenum)
2550 last_filename = file;
2551 last_linenum = line;
2554 if (no_line_numbers && line > 0)
2560 note = rtx_alloc (NOTE);
2561 INSN_UID (note) = cur_insn_uid++;
2562 NOTE_SOURCE_FILE (note) = file;
2563 NOTE_LINE_NUMBER (note) = line;
2568 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2571 emit_line_note_force (file, line)
2576 return emit_line_note (file, line);
2579 /* Cause next statement to emit a line note even if the line number
2580 has not changed. This is used at the beginning of a function. */
2583 force_next_line_note ()
2588 /* Return an indication of which type of insn should have X as a body.
2589 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2595 if (GET_CODE (x) == CODE_LABEL)
2597 if (GET_CODE (x) == CALL)
2599 if (GET_CODE (x) == RETURN)
2601 if (GET_CODE (x) == SET)
2603 if (SET_DEST (x) == pc_rtx)
2605 else if (GET_CODE (SET_SRC (x)) == CALL)
2610 if (GET_CODE (x) == PARALLEL)
2613 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2614 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2616 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2617 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2619 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2620 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2626 /* Emit the rtl pattern X as an appropriate kind of insn.
2627 If X is a label, it is simply added into the insn chain. */
2633 enum rtx_code code = classify_insn (x);
2635 if (code == CODE_LABEL)
2636 return emit_label (x);
2637 else if (code == INSN)
2638 return emit_insn (x);
2639 else if (code == JUMP_INSN)
2641 register rtx insn = emit_jump_insn (x);
2642 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2643 return emit_barrier ();
2646 else if (code == CALL_INSN)
2647 return emit_call_insn (x);
2652 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2657 struct sequence_stack *tem;
2659 if (sequence_element_free_list)
2661 /* Reuse a previously-saved struct sequence_stack. */
2662 tem = sequence_element_free_list;
2663 sequence_element_free_list = tem->next;
2666 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2668 tem->next = sequence_stack;
2669 tem->first = first_insn;
2670 tem->last = last_insn;
2672 sequence_stack = tem;
2678 /* Set up the insn chain starting with FIRST
2679 as the current sequence, saving the previously current one. */
2682 push_to_sequence (first)
2689 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2695 /* Set up the outer-level insn chain
2696 as the current sequence, saving the previously current one. */
2699 push_topmost_sequence ()
2701 struct sequence_stack *stack, *top;
2705 for (stack = sequence_stack; stack; stack = stack->next)
2708 first_insn = top->first;
2709 last_insn = top->last;
2712 /* After emitting to the outer-level insn chain, update the outer-level
2713 insn chain, and restore the previous saved state. */
2716 pop_topmost_sequence ()
2718 struct sequence_stack *stack, *top;
2720 for (stack = sequence_stack; stack; stack = stack->next)
2723 top->first = first_insn;
2724 top->last = last_insn;
2729 /* After emitting to a sequence, restore previous saved state.
2731 To get the contents of the sequence just made,
2732 you must call `gen_sequence' *before* calling here. */
2737 struct sequence_stack *tem = sequence_stack;
2739 first_insn = tem->first;
2740 last_insn = tem->last;
2741 sequence_stack = tem->next;
2743 tem->next = sequence_element_free_list;
2744 sequence_element_free_list = tem;
2747 /* Return 1 if currently emitting into a sequence. */
2752 return sequence_stack != 0;
2755 /* Generate a SEQUENCE rtx containing the insns already emitted
2756 to the current sequence.
2758 This is how the gen_... function from a DEFINE_EXPAND
2759 constructs the SEQUENCE that it returns. */
2770 /* Count the insns in the chain. */
2772 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2775 /* If only one insn, return its pattern rather than a SEQUENCE.
2776 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2777 the case of an empty list.) */
2779 && (GET_CODE (first_insn) == INSN
2780 || GET_CODE (first_insn) == JUMP_INSN
2781 || GET_CODE (first_insn) == CALL_INSN))
2782 return PATTERN (first_insn);
2784 /* Put them in a vector. See if we already have a SEQUENCE of the
2785 appropriate length around. */
2786 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2787 sequence_result[len] = 0;
2790 /* Ensure that this rtl goes in saveable_obstack, since we may be
2792 push_obstacks_nochange ();
2793 rtl_in_saveable_obstack ();
2794 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2798 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2799 XVECEXP (result, 0, i) = tem;
2804 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2805 according to the chain of insns starting with FIRST.
2807 Also set cur_insn_uid to exceed the largest uid in that chain.
2809 This is used when an inline function's rtl is saved
2810 and passed to rest_of_compilation later. */
2812 static void restore_reg_data_1 ();
2815 restore_reg_data (first)
2820 register int max_uid = 0;
2822 for (insn = first; insn; insn = NEXT_INSN (insn))
2824 if (INSN_UID (insn) >= max_uid)
2825 max_uid = INSN_UID (insn);
2827 switch (GET_CODE (insn))
2837 restore_reg_data_1 (PATTERN (insn));
2842 /* Don't duplicate the uids already in use. */
2843 cur_insn_uid = max_uid + 1;
2845 /* If any regs are missing, make them up.
2847 ??? word_mode is not necessarily the right mode. Most likely these REGs
2848 are never used. At some point this should be checked. */
2850 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2851 if (regno_reg_rtx[i] == 0)
2852 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2856 restore_reg_data_1 (orig)
2859 register rtx x = orig;
2861 register enum rtx_code code;
2862 register char *format_ptr;
2864 code = GET_CODE (x);
2879 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2881 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2882 enough to have an element for this pseudo reg number. */
2883 if (REGNO (x) >= reg_rtx_no)
2885 reg_rtx_no = REGNO (x);
2887 if (reg_rtx_no >= regno_pointer_flag_length)
2889 int newlen = MAX (regno_pointer_flag_length * 2,
2892 char *new = (char *) oballoc (newlen);
2893 bzero (new, newlen);
2894 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2896 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2897 bzero (new1, newlen * sizeof (rtx));
2898 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2900 regno_pointer_flag = new;
2901 regno_reg_rtx = new1;
2902 regno_pointer_flag_length = newlen;
2906 regno_reg_rtx[REGNO (x)] = x;
2911 if (GET_CODE (XEXP (x, 0)) == REG)
2912 mark_reg_pointer (XEXP (x, 0));
2913 restore_reg_data_1 (XEXP (x, 0));
2917 /* Now scan the subexpressions recursively. */
2919 format_ptr = GET_RTX_FORMAT (code);
2921 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2923 switch (*format_ptr++)
2926 restore_reg_data_1 (XEXP (x, i));
2930 if (XVEC (x, i) != NULL)
2934 for (j = 0; j < XVECLEN (x, i); j++)
2935 restore_reg_data_1 (XVECEXP (x, i, j));
2942 /* Initialize data structures and variables in this file
2943 before generating rtl for each function. */
2953 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2956 first_label_num = label_num;
2958 sequence_stack = NULL;
2960 /* Clear the start_sequence/gen_sequence cache. */
2961 sequence_element_free_list = 0;
2962 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2963 sequence_result[i] = 0;
2965 /* Init the tables that describe all the pseudo regs. */
2967 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2970 = (char *) oballoc (regno_pointer_flag_length);
2971 bzero (regno_pointer_flag, regno_pointer_flag_length);
2974 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2975 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2977 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2978 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2979 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2980 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2981 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
2983 /* Indicate that the virtual registers and stack locations are
2985 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
2986 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
2987 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
2989 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
2990 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
2991 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
2992 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
2994 #ifdef INIT_EXPANDERS
2999 /* Create some permanent unique rtl objects shared between all functions.
3000 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3003 init_emit_once (line_numbers)
3007 enum machine_mode mode;
3009 no_line_numbers = ! line_numbers;
3011 sequence_stack = NULL;
3013 /* Create the unique rtx's for certain rtx codes and operand values. */
3015 pc_rtx = gen_rtx (PC, VOIDmode);
3016 cc0_rtx = gen_rtx (CC0, VOIDmode);
3018 /* Don't use gen_rtx here since gen_rtx in this case
3019 tries to use these variables. */
3020 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3022 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3023 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3024 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3027 /* These four calls obtain some of the rtx expressions made above. */
3028 const0_rtx = GEN_INT (0);
3029 const1_rtx = GEN_INT (1);
3030 const2_rtx = GEN_INT (2);
3031 constm1_rtx = GEN_INT (-1);
3033 /* This will usually be one of the above constants, but may be a new rtx. */
3034 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3036 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3037 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3038 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3039 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3041 for (i = 0; i <= 2; i++)
3043 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3044 mode = GET_MODE_WIDER_MODE (mode))
3046 rtx tem = rtx_alloc (CONST_DOUBLE);
3047 union real_extract u;
3049 bzero (&u, sizeof u); /* Zero any holes in a structure. */
3050 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3052 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
3053 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3054 PUT_MODE (tem, mode);
3056 const_tiny_rtx[i][(int) mode] = tem;
3059 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3061 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3062 mode = GET_MODE_WIDER_MODE (mode))
3063 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3065 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3067 mode = GET_MODE_WIDER_MODE (mode))
3068 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3071 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3072 mode = GET_MODE_WIDER_MODE (mode))
3073 const_tiny_rtx[0][(int) mode] = const0_rtx;
3075 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3076 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3078 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3079 arg_pointer_rtx = frame_pointer_rtx;
3080 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3081 arg_pointer_rtx = stack_pointer_rtx;
3083 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3085 /* Create the virtual registers. Do so here since the following objects
3086 might reference them. */
3088 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3089 VIRTUAL_INCOMING_ARGS_REGNUM);
3090 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3091 VIRTUAL_STACK_VARS_REGNUM);
3092 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3093 VIRTUAL_STACK_DYNAMIC_REGNUM);
3094 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3095 VIRTUAL_OUTGOING_ARGS_REGNUM);
3098 struct_value_rtx = STRUCT_VALUE;
3100 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3103 #ifdef STRUCT_VALUE_INCOMING
3104 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3106 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3107 struct_value_incoming_rtx
3108 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3110 struct_value_incoming_rtx = struct_value_rtx;
3114 #ifdef STATIC_CHAIN_REGNUM
3115 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3117 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3118 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3119 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3122 static_chain_incoming_rtx = static_chain_rtx;
3126 static_chain_rtx = STATIC_CHAIN;
3128 #ifdef STATIC_CHAIN_INCOMING
3129 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3131 static_chain_incoming_rtx = static_chain_rtx;
3135 #ifdef PIC_OFFSET_TABLE_REGNUM
3136 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);