1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
51 #include "hard-reg-set.h"
52 #include "insn-config.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
65 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
66 After rtl generation, it is 1 plus the largest register number used. */
68 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
70 /* This is *not* reset after each function. It gives each CODE_LABEL
71 in the entire compilation a unique label number. */
73 static int label_num = 1;
75 /* Lowest label number in current function. */
77 static int first_label_num;
79 /* Highest label number in current function.
80 Zero means use the value of label_num instead.
81 This is nonzero only when belatedly compiling an inline function. */
83 static int last_label_num;
85 /* Value label_num had when set_new_first_and_last_label_number was called.
86 If label_num has not changed since then, last_label_num is valid. */
88 static int base_label_num;
90 /* Nonzero means do not generate NOTEs for source line numbers. */
92 static int no_line_numbers;
94 /* Commonly used rtx's, so that we only need space for one copy.
95 These are initialized once for the entire compilation.
96 All of these except perhaps the floating-point CONST_DOUBLEs
97 are unique; no other rtx-object will be equal to any of these. */
99 struct _global_rtl global_rtl =
101 {PC, VOIDmode}, /* pc_rtx */
102 {CC0, VOIDmode}, /* cc0_rtx */
103 {REG}, /* stack_pointer_rtx */
104 {REG}, /* frame_pointer_rtx */
105 {REG}, /* hard_frame_pointer_rtx */
106 {REG}, /* arg_pointer_rtx */
107 {REG}, /* virtual_incoming_args_rtx */
108 {REG}, /* virtual_stack_vars_rtx */
109 {REG}, /* virtual_stack_dynamic_rtx */
110 {REG}, /* virtual_outgoing_args_rtx */
113 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
114 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
115 record a copy of const[012]_rtx. */
117 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
121 REAL_VALUE_TYPE dconst0;
122 REAL_VALUE_TYPE dconst1;
123 REAL_VALUE_TYPE dconst2;
124 REAL_VALUE_TYPE dconstm1;
126 /* All references to the following fixed hard registers go through
127 these unique rtl objects. On machines where the frame-pointer and
128 arg-pointer are the same register, they use the same unique object.
130 After register allocation, other rtl objects which used to be pseudo-regs
131 may be clobbered to refer to the frame-pointer register.
132 But references that were originally to the frame-pointer can be
133 distinguished from the others because they contain frame_pointer_rtx.
135 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
136 tricky: until register elimination has taken place hard_frame_pointer_rtx
137 should be used if it is being set, and frame_pointer_rtx otherwise. After
138 register elimination hard_frame_pointer_rtx should always be used.
139 On machines where the two registers are same (most) then these are the
142 In an inline procedure, the stack and frame pointer rtxs may not be
143 used for anything else. */
144 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
145 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
146 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
147 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
148 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
150 /* This is used to implement __builtin_return_address for some machines.
151 See for instance the MIPS port. */
152 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
154 /* We make one copy of (const_int C) where C is in
155 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
156 to save space during the compilation and simplify comparisons of
159 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
161 /* The ends of the doubly-linked chain of rtl for the current function.
162 Both are reset to null at the start of rtl generation for the function.
164 start_sequence saves both of these on `sequence_stack' along with
165 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
167 static rtx first_insn = NULL;
168 static rtx last_insn = NULL;
170 /* RTL_EXPR within which the current sequence will be placed. Use to
171 prevent reuse of any temporaries within the sequence until after the
172 RTL_EXPR is emitted. */
174 tree sequence_rtl_expr = NULL;
176 /* INSN_UID for next insn emitted.
177 Reset to 1 for each function compiled. */
179 static int cur_insn_uid = 1;
181 /* Line number and source file of the last line-number NOTE emitted.
182 This is used to avoid generating duplicates. */
184 static int last_linenum = 0;
185 static char *last_filename = 0;
187 /* A vector indexed by pseudo reg number. The allocated length
188 of this vector is regno_pointer_flag_length. Since this
189 vector is needed during the expansion phase when the total
190 number of registers in the function is not yet known,
191 it is copied and made bigger when necessary. */
193 char *regno_pointer_flag;
194 int regno_pointer_flag_length;
196 /* Indexed by pseudo register number, if nonzero gives the known alignment
197 for that pseudo (if regno_pointer_flag is set).
198 Allocated in parallel with regno_pointer_flag. */
199 char *regno_pointer_align;
201 /* Indexed by pseudo register number, gives the rtx for that pseudo.
202 Allocated in parallel with regno_pointer_flag. */
206 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
207 Each element describes one pending sequence.
208 The main insn-chain is saved in the last element of the chain,
209 unless the chain is empty. */
211 struct sequence_stack *sequence_stack;
213 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
214 shortly thrown away. We use two mechanisms to prevent this waste:
216 First, we keep a list of the expressions used to represent the sequence
217 stack in sequence_element_free_list.
219 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
220 rtvec for use by gen_sequence. One entry for each size is sufficient
221 because most cases are calls to gen_sequence followed by immediately
222 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
223 destructive on the insn in it anyway and hence can't be redone.
225 We do not bother to save this cached data over nested function calls.
226 Instead, we just reinitialize them. */
228 #define SEQUENCE_RESULT_SIZE 5
230 static struct sequence_stack *sequence_element_free_list;
231 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
233 /* During RTL generation, we also keep a list of free INSN rtl codes. */
234 static rtx free_insn;
236 extern int rtx_equal_function_value_matters;
238 /* Filename and line number of last line-number note,
239 whether we actually emitted it or not. */
240 extern char *emit_filename;
241 extern int emit_lineno;
243 static rtx make_jump_insn_raw PROTO((rtx));
244 static rtx make_call_insn_raw PROTO((rtx));
245 static rtx find_line_note PROTO((rtx));
248 gen_rtx_CONST_INT (mode, arg)
249 enum machine_mode mode;
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
256 if (const_true_rtx && arg == STORE_FLAG_VALUE)
257 return const_true_rtx;
260 return gen_rtx_raw_CONST_INT (mode, arg);
264 gen_rtx_REG (mode, regno)
265 enum machine_mode mode;
268 /* In case the MD file explicitly references the frame pointer, have
269 all such references point to the same frame pointer. This is
270 used during frame pointer elimination to distinguish the explicit
271 references to these registers from pseudos that happened to be
274 If we have eliminated the frame pointer or arg pointer, we will
275 be using it as a normal register, for example as a spill
276 register. In such cases, we might be accessing it in a mode that
277 is not Pmode and therefore cannot use the pre-allocated rtx.
279 Also don't do this when we are making new REGs in reload, since
280 we don't want to get confused with the real pointers. */
282 if (mode == Pmode && !reload_in_progress)
284 if (regno == FRAME_POINTER_REGNUM)
285 return frame_pointer_rtx;
286 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
287 if (regno == HARD_FRAME_POINTER_REGNUM)
288 return hard_frame_pointer_rtx;
290 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
291 if (regno == ARG_POINTER_REGNUM)
292 return arg_pointer_rtx;
294 #ifdef RETURN_ADDRESS_POINTER_REGNUM
295 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
296 return return_address_pointer_rtx;
298 if (regno == STACK_POINTER_REGNUM)
299 return stack_pointer_rtx;
302 return gen_rtx_raw_REG (mode, regno);
306 gen_rtx_MEM (mode, addr)
307 enum machine_mode mode;
310 rtx rt = gen_rtx_raw_MEM (mode, addr);
312 /* This field is not cleared by the mere allocation of the rtx, so
314 MEM_ALIAS_SET (rt) = 0;
319 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
321 ** This routine generates an RTX of the size specified by
322 ** <code>, which is an RTX code. The RTX structure is initialized
323 ** from the arguments <element1> through <elementn>, which are
324 ** interpreted according to the specific RTX type's format. The
325 ** special machine mode associated with the rtx (if any) is specified
328 ** gen_rtx can be invoked in a way which resembles the lisp-like
329 ** rtx it will generate. For example, the following rtx structure:
331 ** (plus:QI (mem:QI (reg:SI 1))
332 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
334 ** ...would be generated by the following C code:
336 ** gen_rtx (PLUS, QImode,
337 ** gen_rtx (MEM, QImode,
338 ** gen_rtx (REG, SImode, 1)),
339 ** gen_rtx (MEM, QImode,
340 ** gen_rtx (PLUS, SImode,
341 ** gen_rtx (REG, SImode, 2),
342 ** gen_rtx (REG, SImode, 3)))),
347 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
351 enum machine_mode mode;
354 register int i; /* Array indices... */
355 register char *fmt; /* Current rtx's format... */
356 register rtx rt_val; /* RTX to return to caller... */
361 code = va_arg (p, enum rtx_code);
362 mode = va_arg (p, enum machine_mode);
365 if (code == CONST_INT)
366 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
367 else if (code == REG)
368 rt_val = gen_rtx_REG (mode, va_arg (p, int));
369 else if (code == MEM)
370 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
373 rt_val = rtx_alloc (code); /* Allocate the storage space. */
374 rt_val->mode = mode; /* Store the machine mode... */
376 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
377 for (i = 0; i < GET_RTX_LENGTH (code); i++)
381 case '0': /* Unused field. */
384 case 'i': /* An integer? */
385 XINT (rt_val, i) = va_arg (p, int);
388 case 'w': /* A wide integer? */
389 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
392 case 's': /* A string? */
393 XSTR (rt_val, i) = va_arg (p, char *);
396 case 'e': /* An expression? */
397 case 'u': /* An insn? Same except when printing. */
398 XEXP (rt_val, i) = va_arg (p, rtx);
401 case 'E': /* An RTX vector? */
402 XVEC (rt_val, i) = va_arg (p, rtvec);
405 case 'b': /* A bitmap? */
406 XBITMAP (rt_val, i) = va_arg (p, bitmap);
409 case 't': /* A tree? */
410 XTREE (rt_val, i) = va_arg (p, tree);
419 return rt_val; /* Return the new RTX... */
422 /* gen_rtvec (n, [rt1, ..., rtn])
424 ** This routine creates an rtvec and stores within it the
425 ** pointers to rtx's which are its arguments.
430 gen_rtvec VPROTO((int n, ...))
446 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
448 vector = (rtx *) alloca (n * sizeof (rtx));
450 for (i = 0; i < n; i++)
451 vector[i] = va_arg (p, rtx);
454 return gen_rtvec_v (n, vector);
458 gen_rtvec_v (n, argp)
463 register rtvec rt_val;
466 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
468 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
470 for (i = 0; i < n; i++)
471 rt_val->elem[i].rtx = *argp++;
477 gen_rtvec_vv (n, argp)
482 register rtvec rt_val;
485 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
487 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
489 for (i = 0; i < n; i++)
490 rt_val->elem[i].rtx = (argp++)->rtx;
495 /* Generate a REG rtx for a new pseudo register of mode MODE.
496 This pseudo is assigned the next sequential register number. */
500 enum machine_mode mode;
504 /* Don't let anything called by or after reload create new registers
505 (actually, registers can't be created after flow, but this is a good
508 if (reload_in_progress || reload_completed)
511 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
512 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
514 /* For complex modes, don't make a single pseudo.
515 Instead, make a CONCAT of two pseudos.
516 This allows noncontiguous allocation of the real and imaginary parts,
517 which makes much better code. Besides, allocating DCmode
518 pseudos overstrains reload on some machines like the 386. */
519 rtx realpart, imagpart;
520 int size = GET_MODE_UNIT_SIZE (mode);
521 enum machine_mode partmode
522 = mode_for_size (size * BITS_PER_UNIT,
523 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
524 ? MODE_FLOAT : MODE_INT),
527 realpart = gen_reg_rtx (partmode);
528 imagpart = gen_reg_rtx (partmode);
529 return gen_rtx_CONCAT (mode, realpart, imagpart);
532 /* Make sure regno_pointer_flag and regno_reg_rtx are large
533 enough to have an element for this pseudo reg number. */
535 if (reg_rtx_no == regno_pointer_flag_length)
539 (char *) savealloc (regno_pointer_flag_length * 2);
540 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
541 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
542 regno_pointer_flag = new;
544 new = (char *) savealloc (regno_pointer_flag_length * 2);
545 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
546 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
547 regno_pointer_align = new;
549 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
550 bcopy ((char *) regno_reg_rtx, (char *) new1,
551 regno_pointer_flag_length * sizeof (rtx));
552 bzero ((char *) &new1[regno_pointer_flag_length],
553 regno_pointer_flag_length * sizeof (rtx));
554 regno_reg_rtx = new1;
556 regno_pointer_flag_length *= 2;
559 val = gen_rtx_raw_REG (mode, reg_rtx_no);
560 regno_reg_rtx[reg_rtx_no++] = val;
564 /* Identify REG (which may be a CONCAT) as a user register. */
570 if (GET_CODE (reg) == CONCAT)
572 REG_USERVAR_P (XEXP (reg, 0)) = 1;
573 REG_USERVAR_P (XEXP (reg, 1)) = 1;
575 else if (GET_CODE (reg) == REG)
576 REG_USERVAR_P (reg) = 1;
581 /* Identify REG as a probable pointer register and show its alignment
582 as ALIGN, if nonzero. */
585 mark_reg_pointer (reg, align)
589 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
592 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
595 /* Return 1 plus largest pseudo reg number used in the current function. */
603 /* Return 1 + the largest label number used so far in the current function. */
608 if (last_label_num && label_num == base_label_num)
609 return last_label_num;
613 /* Return first label number used in this function (if any were used). */
616 get_first_label_num ()
618 return first_label_num;
621 /* Return a value representing some low-order bits of X, where the number
622 of low-order bits is given by MODE. Note that no conversion is done
623 between floating-point and fixed-point values, rather, the bit
624 representation is returned.
626 This function handles the cases in common between gen_lowpart, below,
627 and two variants in cse.c and combine.c. These are the cases that can
628 be safely handled at all points in the compilation.
630 If this is not a case we can handle, return 0. */
633 gen_lowpart_common (mode, x)
634 enum machine_mode mode;
639 if (GET_MODE (x) == mode)
642 /* MODE must occupy no more words than the mode of X. */
643 if (GET_MODE (x) != VOIDmode
644 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
645 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
649 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
650 word = ((GET_MODE_SIZE (GET_MODE (x))
651 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
654 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
655 && (GET_MODE_CLASS (mode) == MODE_INT
656 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
658 /* If we are getting the low-order part of something that has been
659 sign- or zero-extended, we can either just use the object being
660 extended or make a narrower extension. If we want an even smaller
661 piece than the size of the object being extended, call ourselves
664 This case is used mostly by combine and cse. */
666 if (GET_MODE (XEXP (x, 0)) == mode)
668 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
669 return gen_lowpart_common (mode, XEXP (x, 0));
670 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
671 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
673 else if (GET_CODE (x) == SUBREG
674 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
675 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
676 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
678 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
679 else if (GET_CODE (x) == REG)
681 /* Let the backend decide how many registers to skip. This is needed
682 in particular for Sparc64 where fp regs are smaller than a word. */
683 /* ??? Note that subregs are now ambiguous, in that those against
684 pseudos are sized by the Word Size, while those against hard
685 regs are sized by the underlying register size. Better would be
686 to always interpret the subreg offset parameter as bytes or bits. */
688 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
689 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
690 - HARD_REGNO_NREGS (REGNO (x), mode));
692 /* If the register is not valid for MODE, return 0. If we don't
693 do this, there is no way to fix up the resulting REG later.
694 But we do do this if the current REG is not valid for its
695 mode. This latter is a kludge, but is required due to the
696 way that parameters are passed on some machines, most
698 if (REGNO (x) < FIRST_PSEUDO_REGISTER
699 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
700 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
702 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
703 /* integrate.c can't handle parts of a return value register. */
704 && (! REG_FUNCTION_VALUE_P (x)
705 || ! rtx_equal_function_value_matters)
706 #ifdef CLASS_CANNOT_CHANGE_SIZE
707 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
708 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
709 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
710 && (TEST_HARD_REG_BIT
711 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
714 /* We want to keep the stack, frame, and arg pointers
716 && x != frame_pointer_rtx
717 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
718 && x != arg_pointer_rtx
720 && x != stack_pointer_rtx)
721 return gen_rtx_REG (mode, REGNO (x) + word);
723 return gen_rtx_SUBREG (mode, x, word);
725 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
726 from the low-order part of the constant. */
727 else if ((GET_MODE_CLASS (mode) == MODE_INT
728 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
729 && GET_MODE (x) == VOIDmode
730 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
732 /* If MODE is twice the host word size, X is already the desired
733 representation. Otherwise, if MODE is wider than a word, we can't
734 do this. If MODE is exactly a word, return just one CONST_INT.
735 If MODE is smaller than a word, clear the bits that don't belong
736 in our mode, unless they and our sign bit are all one. So we get
737 either a reasonable negative value or a reasonable unsigned value
740 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
742 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
744 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
745 return (GET_CODE (x) == CONST_INT ? x
746 : GEN_INT (CONST_DOUBLE_LOW (x)));
749 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
750 int width = GET_MODE_BITSIZE (mode);
751 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
752 : CONST_DOUBLE_LOW (x));
754 /* Sign extend to HOST_WIDE_INT. */
755 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
757 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
762 /* If X is an integral constant but we want it in floating-point, it
763 must be the case that we have a union of an integer and a floating-point
764 value. If the machine-parameters allow it, simulate that union here
765 and return the result. The two-word and single-word cases are
768 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
769 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
770 || flag_pretend_float)
771 && GET_MODE_CLASS (mode) == MODE_FLOAT
772 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
773 && GET_CODE (x) == CONST_INT
774 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
775 #ifdef REAL_ARITHMETIC
781 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
782 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
786 union {HOST_WIDE_INT i; float d; } u;
789 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
792 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
793 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
794 || flag_pretend_float)
795 && GET_MODE_CLASS (mode) == MODE_FLOAT
796 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
797 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
798 && GET_MODE (x) == VOIDmode
799 && (sizeof (double) * HOST_BITS_PER_CHAR
800 == 2 * HOST_BITS_PER_WIDE_INT))
801 #ifdef REAL_ARITHMETIC
805 HOST_WIDE_INT low, high;
807 if (GET_CODE (x) == CONST_INT)
808 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
810 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
812 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
814 if (WORDS_BIG_ENDIAN)
815 i[0] = high, i[1] = low;
817 i[0] = low, i[1] = high;
819 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
820 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
824 union {HOST_WIDE_INT i[2]; double d; } u;
825 HOST_WIDE_INT low, high;
827 if (GET_CODE (x) == CONST_INT)
828 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
830 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
832 #ifdef HOST_WORDS_BIG_ENDIAN
833 u.i[0] = high, u.i[1] = low;
835 u.i[0] = low, u.i[1] = high;
838 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
842 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
843 same as sizeof (double) or when sizeof (float) is larger than the
844 size of a word on the target machine. */
845 #ifdef REAL_ARITHMETIC
846 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
852 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
853 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
857 /* Similarly, if this is converting a floating-point value into a
858 single-word integer. Only do this is the host and target parameters are
861 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
862 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
863 || flag_pretend_float)
864 && (GET_MODE_CLASS (mode) == MODE_INT
865 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
866 && GET_CODE (x) == CONST_DOUBLE
867 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
868 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
869 return operand_subword (x, word, 0, GET_MODE (x));
871 /* Similarly, if this is converting a floating-point value into a
872 two-word integer, we can do this one word at a time and make an
873 integer. Only do this is the host and target parameters are
876 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
877 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
878 || flag_pretend_float)
879 && (GET_MODE_CLASS (mode) == MODE_INT
880 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
881 && GET_CODE (x) == CONST_DOUBLE
882 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
883 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
886 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
888 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
890 if (lowpart && GET_CODE (lowpart) == CONST_INT
891 && highpart && GET_CODE (highpart) == CONST_INT)
892 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
895 /* Otherwise, we can't do this. */
899 /* Return the real part (which has mode MODE) of a complex value X.
900 This always comes at the low address in memory. */
903 gen_realpart (mode, x)
904 enum machine_mode mode;
907 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
909 else if (WORDS_BIG_ENDIAN)
910 return gen_highpart (mode, x);
912 return gen_lowpart (mode, x);
915 /* Return the imaginary part (which has mode MODE) of a complex value X.
916 This always comes at the high address in memory. */
919 gen_imagpart (mode, x)
920 enum machine_mode mode;
923 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
925 else if (WORDS_BIG_ENDIAN)
926 return gen_lowpart (mode, x);
928 return gen_highpart (mode, x);
931 /* Return 1 iff X, assumed to be a SUBREG,
932 refers to the real part of the complex value in its containing reg.
933 Complex values are always stored with the real part in the first word,
934 regardless of WORDS_BIG_ENDIAN. */
937 subreg_realpart_p (x)
940 if (GET_CODE (x) != SUBREG)
943 return SUBREG_WORD (x) == 0;
946 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
947 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
948 least-significant part of X.
949 MODE specifies how big a part of X to return;
950 it usually should not be larger than a word.
951 If X is a MEM whose address is a QUEUED, the value may be so also. */
954 gen_lowpart (mode, x)
955 enum machine_mode mode;
958 rtx result = gen_lowpart_common (mode, x);
962 else if (GET_CODE (x) == REG)
964 /* Must be a hard reg that's not valid in MODE. */
965 result = gen_lowpart_common (mode, copy_to_reg (x));
970 else if (GET_CODE (x) == MEM)
972 /* The only additional case we can do is MEM. */
973 register int offset = 0;
974 if (WORDS_BIG_ENDIAN)
975 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
976 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
978 if (BYTES_BIG_ENDIAN)
979 /* Adjust the address so that the address-after-the-data
981 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
982 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
984 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
986 else if (GET_CODE (x) == ADDRESSOF)
987 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
992 /* Like `gen_lowpart', but refer to the most significant part.
993 This is used to access the imaginary part of a complex number. */
996 gen_highpart (mode, x)
997 enum machine_mode mode;
1000 /* This case loses if X is a subreg. To catch bugs early,
1001 complain if an invalid MODE is used even in other cases. */
1002 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1003 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1005 if (GET_CODE (x) == CONST_DOUBLE
1006 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1007 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1010 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1011 else if (GET_CODE (x) == CONST_INT)
1013 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1015 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1017 else if (GET_CODE (x) == MEM)
1019 register int offset = 0;
1020 if (! WORDS_BIG_ENDIAN)
1021 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1022 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1024 if (! BYTES_BIG_ENDIAN
1025 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1026 offset -= (GET_MODE_SIZE (mode)
1027 - MIN (UNITS_PER_WORD,
1028 GET_MODE_SIZE (GET_MODE (x))));
1030 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1032 else if (GET_CODE (x) == SUBREG)
1034 /* The only time this should occur is when we are looking at a
1035 multi-word item with a SUBREG whose mode is the same as that of the
1036 item. It isn't clear what we would do if it wasn't. */
1037 if (SUBREG_WORD (x) != 0)
1039 return gen_highpart (mode, SUBREG_REG (x));
1041 else if (GET_CODE (x) == REG)
1045 /* Let the backend decide how many registers to skip. This is needed
1046 in particular for sparc64 where fp regs are smaller than a word. */
1047 /* ??? Note that subregs are now ambiguous, in that those against
1048 pseudos are sized by the word size, while those against hard
1049 regs are sized by the underlying register size. Better would be
1050 to always interpret the subreg offset parameter as bytes or bits. */
1052 if (WORDS_BIG_ENDIAN)
1054 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1055 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1056 - HARD_REGNO_NREGS (REGNO (x), mode));
1058 word = ((GET_MODE_SIZE (GET_MODE (x))
1059 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1062 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1063 /* integrate.c can't handle parts of a return value register. */
1064 && (! REG_FUNCTION_VALUE_P (x)
1065 || ! rtx_equal_function_value_matters)
1066 /* We want to keep the stack, frame, and arg pointers special. */
1067 && x != frame_pointer_rtx
1068 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1069 && x != arg_pointer_rtx
1071 && x != stack_pointer_rtx)
1072 return gen_rtx_REG (mode, REGNO (x) + word);
1074 return gen_rtx_SUBREG (mode, x, word);
1080 /* Return 1 iff X, assumed to be a SUBREG,
1081 refers to the least significant part of its containing reg.
1082 If X is not a SUBREG, always return 1 (it is its own low part!). */
1085 subreg_lowpart_p (x)
1088 if (GET_CODE (x) != SUBREG)
1090 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1093 if (WORDS_BIG_ENDIAN
1094 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1095 return (SUBREG_WORD (x)
1096 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1097 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1100 return SUBREG_WORD (x) == 0;
1103 /* Return subword I of operand OP.
1104 The word number, I, is interpreted as the word number starting at the
1105 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1106 otherwise it is the high-order word.
1108 If we cannot extract the required word, we return zero. Otherwise, an
1109 rtx corresponding to the requested word will be returned.
1111 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1112 reload has completed, a valid address will always be returned. After
1113 reload, if a valid address cannot be returned, we return zero.
1115 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1116 it is the responsibility of the caller.
1118 MODE is the mode of OP in case it is a CONST_INT. */
1121 operand_subword (op, i, validate_address, mode)
1124 int validate_address;
1125 enum machine_mode mode;
1128 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1129 int bits_per_word = BITS_PER_WORD;
1131 if (mode == VOIDmode)
1132 mode = GET_MODE (op);
1134 if (mode == VOIDmode)
1137 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1139 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1140 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1143 /* If OP is already an integer word, return it. */
1144 if (GET_MODE_CLASS (mode) == MODE_INT
1145 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1148 /* If OP is a REG or SUBREG, we can handle it very simply. */
1149 if (GET_CODE (op) == REG)
1151 /* If the register is not valid for MODE, return 0. If we don't
1152 do this, there is no way to fix up the resulting REG later. */
1153 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1154 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1156 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1157 || (REG_FUNCTION_VALUE_P (op)
1158 && rtx_equal_function_value_matters)
1159 /* We want to keep the stack, frame, and arg pointers
1161 || op == frame_pointer_rtx
1162 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1163 || op == arg_pointer_rtx
1165 || op == stack_pointer_rtx)
1166 return gen_rtx_SUBREG (word_mode, op, i);
1168 return gen_rtx_REG (word_mode, REGNO (op) + i);
1170 else if (GET_CODE (op) == SUBREG)
1171 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1172 else if (GET_CODE (op) == CONCAT)
1174 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1176 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1177 return operand_subword (XEXP (op, 1), i - partwords,
1178 validate_address, mode);
1181 /* Form a new MEM at the requested address. */
1182 if (GET_CODE (op) == MEM)
1184 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1187 if (validate_address)
1189 if (reload_completed)
1191 if (! strict_memory_address_p (word_mode, addr))
1195 addr = memory_address (word_mode, addr);
1198 new = gen_rtx_MEM (word_mode, addr);
1200 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1201 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1202 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1207 /* The only remaining cases are when OP is a constant. If the host and
1208 target floating formats are the same, handling two-word floating
1209 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1210 are defined as returning one or two 32 bit values, respectively,
1211 and not values of BITS_PER_WORD bits. */
1212 #ifdef REAL_ARITHMETIC
1213 /* The output is some bits, the width of the target machine's word.
1214 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1216 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1217 && GET_MODE_CLASS (mode) == MODE_FLOAT
1218 && GET_MODE_BITSIZE (mode) == 64
1219 && GET_CODE (op) == CONST_DOUBLE)
1224 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1225 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1227 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1228 which the words are written depends on the word endianness.
1230 ??? This is a potential portability problem and should
1231 be fixed at some point. */
1232 if (BITS_PER_WORD == 32)
1233 return GEN_INT ((HOST_WIDE_INT) k[i]);
1234 #if HOST_BITS_PER_WIDE_INT > 32
1235 else if (BITS_PER_WORD >= 64 && i == 0)
1236 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1237 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1239 else if (BITS_PER_WORD == 16)
1243 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1246 return GEN_INT ((HOST_WIDE_INT) value);
1251 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1252 && GET_MODE_CLASS (mode) == MODE_FLOAT
1253 && GET_MODE_BITSIZE (mode) > 64
1254 && GET_CODE (op) == CONST_DOUBLE)
1259 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1260 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1262 if (BITS_PER_WORD == 32)
1263 return GEN_INT ((HOST_WIDE_INT) k[i]);
1265 #else /* no REAL_ARITHMETIC */
1266 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1267 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1268 || flag_pretend_float)
1269 && GET_MODE_CLASS (mode) == MODE_FLOAT
1270 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1271 && GET_CODE (op) == CONST_DOUBLE)
1273 /* The constant is stored in the host's word-ordering,
1274 but we want to access it in the target's word-ordering. Some
1275 compilers don't like a conditional inside macro args, so we have two
1276 copies of the return. */
1277 #ifdef HOST_WORDS_BIG_ENDIAN
1278 return GEN_INT (i == WORDS_BIG_ENDIAN
1279 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1281 return GEN_INT (i != WORDS_BIG_ENDIAN
1282 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1285 #endif /* no REAL_ARITHMETIC */
1287 /* Single word float is a little harder, since single- and double-word
1288 values often do not have the same high-order bits. We have already
1289 verified that we want the only defined word of the single-word value. */
1290 #ifdef REAL_ARITHMETIC
1291 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1292 && GET_MODE_BITSIZE (mode) == 32
1293 && GET_CODE (op) == CONST_DOUBLE)
1298 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1299 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1301 if (BITS_PER_WORD == 16)
1303 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1307 return GEN_INT ((HOST_WIDE_INT) l);
1310 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1311 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1312 || flag_pretend_float)
1313 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1314 && GET_MODE_CLASS (mode) == MODE_FLOAT
1315 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1316 && GET_CODE (op) == CONST_DOUBLE)
1319 union {float f; HOST_WIDE_INT i; } u;
1321 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1324 return GEN_INT (u.i);
1326 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1327 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1328 || flag_pretend_float)
1329 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1330 && GET_MODE_CLASS (mode) == MODE_FLOAT
1331 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1332 && GET_CODE (op) == CONST_DOUBLE)
1335 union {double d; HOST_WIDE_INT i; } u;
1337 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1340 return GEN_INT (u.i);
1342 #endif /* no REAL_ARITHMETIC */
1344 /* The only remaining cases that we can handle are integers.
1345 Convert to proper endianness now since these cases need it.
1346 At this point, i == 0 means the low-order word.
1348 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1349 in general. However, if OP is (const_int 0), we can just return
1352 if (op == const0_rtx)
1355 if (GET_MODE_CLASS (mode) != MODE_INT
1356 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1357 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1360 if (WORDS_BIG_ENDIAN)
1361 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1363 /* Find out which word on the host machine this value is in and get
1364 it from the constant. */
1365 val = (i / size_ratio == 0
1366 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1367 : (GET_CODE (op) == CONST_INT
1368 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1370 /* Get the value we want into the low bits of val. */
1371 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1372 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1374 /* Clear the bits that don't belong in our mode, unless they and our sign
1375 bit are all one. So we get either a reasonable negative value or a
1376 reasonable unsigned value for this mode. */
1377 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1378 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1379 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1380 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1382 /* If this would be an entire word for the target, but is not for
1383 the host, then sign-extend on the host so that the number will look
1384 the same way on the host that it would on the target.
1386 For example, when building a 64 bit alpha hosted 32 bit sparc
1387 targeted compiler, then we want the 32 bit unsigned value -1 to be
1388 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1389 The later confuses the sparc backend. */
1391 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1392 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1393 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1395 return GEN_INT (val);
1398 /* Similar to `operand_subword', but never return 0. If we can't extract
1399 the required subword, put OP into a register and try again. If that fails,
1400 abort. We always validate the address in this case. It is not valid
1401 to call this function after reload; it is mostly meant for RTL
1404 MODE is the mode of OP, in case it is CONST_INT. */
1407 operand_subword_force (op, i, mode)
1410 enum machine_mode mode;
1412 rtx result = operand_subword (op, i, 1, mode);
1417 if (mode != BLKmode && mode != VOIDmode)
1419 /* If this is a register which can not be accessed by words, copy it
1420 to a pseudo register. */
1421 if (GET_CODE (op) == REG)
1422 op = copy_to_reg (op);
1424 op = force_reg (mode, op);
1427 result = operand_subword (op, i, 1, mode);
1434 /* Given a compare instruction, swap the operands.
1435 A test instruction is changed into a compare of 0 against the operand. */
1438 reverse_comparison (insn)
1441 rtx body = PATTERN (insn);
1444 if (GET_CODE (body) == SET)
1445 comp = SET_SRC (body);
1447 comp = SET_SRC (XVECEXP (body, 0, 0));
1449 if (GET_CODE (comp) == COMPARE)
1451 rtx op0 = XEXP (comp, 0);
1452 rtx op1 = XEXP (comp, 1);
1453 XEXP (comp, 0) = op1;
1454 XEXP (comp, 1) = op0;
1458 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1459 if (GET_CODE (body) == SET)
1460 SET_SRC (body) = new;
1462 SET_SRC (XVECEXP (body, 0, 0)) = new;
1466 /* Return a memory reference like MEMREF, but with its mode changed
1467 to MODE and its address changed to ADDR.
1468 (VOIDmode means don't change the mode.
1469 NULL for ADDR means don't change the address.) */
1472 change_address (memref, mode, addr)
1474 enum machine_mode mode;
1479 if (GET_CODE (memref) != MEM)
1481 if (mode == VOIDmode)
1482 mode = GET_MODE (memref);
1484 addr = XEXP (memref, 0);
1486 /* If reload is in progress or has completed, ADDR must be valid.
1487 Otherwise, we can call memory_address to make it valid. */
1488 if (reload_completed || reload_in_progress)
1490 if (! memory_address_p (mode, addr))
1494 addr = memory_address (mode, addr);
1496 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1499 new = gen_rtx_MEM (mode, addr);
1500 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1501 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1502 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1506 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1513 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1514 NULL_RTX, label_num++, NULL_PTR);
1516 LABEL_NUSES (label) = 0;
1520 /* For procedure integration. */
1522 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1523 from a permanent obstack when the opportunity arises. */
1526 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1527 last_labelno, max_parm_regnum, max_regnum, args_size,
1528 pops_args, stack_slots, forced_labels, function_flags,
1529 outgoing_args_size, original_arg_vector,
1530 original_decl_initial, regno_rtx, regno_flag,
1531 regno_align, parm_reg_stack_loc)
1532 rtx first_insn, first_parm_insn;
1533 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1538 int outgoing_args_size;
1539 rtvec original_arg_vector;
1540 rtx original_decl_initial;
1544 rtvec parm_reg_stack_loc;
1546 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1547 cur_insn_uid++, NULL_RTX,
1548 first_insn, first_parm_insn,
1549 first_labelno, last_labelno,
1550 max_parm_regnum, max_regnum, args_size,
1551 pops_args, stack_slots, forced_labels,
1552 function_flags, outgoing_args_size,
1553 original_arg_vector,
1554 original_decl_initial,
1555 regno_rtx, regno_flag, regno_align,
1556 parm_reg_stack_loc);
1560 /* Install new pointers to the first and last insns in the chain.
1561 Also, set cur_insn_uid to one higher than the last in use.
1562 Used for an inline-procedure after copying the insn chain. */
1565 set_new_first_and_last_insn (first, last)
1574 for (insn = first; insn; insn = NEXT_INSN (insn))
1575 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1580 /* Set the range of label numbers found in the current function.
1581 This is used when belatedly compiling an inline function. */
1584 set_new_first_and_last_label_num (first, last)
1587 base_label_num = label_num;
1588 first_label_num = first;
1589 last_label_num = last;
1592 /* Save all variables describing the current status into the structure *P.
1593 This is used before starting a nested function. */
1596 save_emit_status (p)
1599 p->reg_rtx_no = reg_rtx_no;
1600 p->first_label_num = first_label_num;
1601 p->first_insn = first_insn;
1602 p->last_insn = last_insn;
1603 p->sequence_rtl_expr = sequence_rtl_expr;
1604 p->sequence_stack = sequence_stack;
1605 p->cur_insn_uid = cur_insn_uid;
1606 p->last_linenum = last_linenum;
1607 p->last_filename = last_filename;
1608 p->regno_pointer_flag = regno_pointer_flag;
1609 p->regno_pointer_align = regno_pointer_align;
1610 p->regno_pointer_flag_length = regno_pointer_flag_length;
1611 p->regno_reg_rtx = regno_reg_rtx;
1614 /* Restore all variables describing the current status from the structure *P.
1615 This is used after a nested function. */
1618 restore_emit_status (p)
1623 reg_rtx_no = p->reg_rtx_no;
1624 first_label_num = p->first_label_num;
1626 first_insn = p->first_insn;
1627 last_insn = p->last_insn;
1628 sequence_rtl_expr = p->sequence_rtl_expr;
1629 sequence_stack = p->sequence_stack;
1630 cur_insn_uid = p->cur_insn_uid;
1631 last_linenum = p->last_linenum;
1632 last_filename = p->last_filename;
1633 regno_pointer_flag = p->regno_pointer_flag;
1634 regno_pointer_align = p->regno_pointer_align;
1635 regno_pointer_flag_length = p->regno_pointer_flag_length;
1636 regno_reg_rtx = p->regno_reg_rtx;
1638 /* Clear our cache of rtx expressions for start_sequence and
1640 sequence_element_free_list = 0;
1641 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1642 sequence_result[i] = 0;
1647 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1648 It does not work to do this twice, because the mark bits set here
1649 are not cleared afterwards. */
1652 unshare_all_rtl (insn)
1655 for (; insn; insn = NEXT_INSN (insn))
1656 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1657 || GET_CODE (insn) == CALL_INSN)
1659 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1660 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1661 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1664 /* Make sure the addresses of stack slots found outside the insn chain
1665 (such as, in DECL_RTL of a variable) are not shared
1666 with the insn chain.
1668 This special care is necessary when the stack slot MEM does not
1669 actually appear in the insn chain. If it does appear, its address
1670 is unshared from all else at that point. */
1672 copy_rtx_if_shared (stack_slot_list);
1675 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1676 Recursively does the same for subexpressions. */
1679 copy_rtx_if_shared (orig)
1682 register rtx x = orig;
1684 register enum rtx_code code;
1685 register char *format_ptr;
1691 code = GET_CODE (x);
1693 /* These types may be freely shared. */
1706 /* SCRATCH must be shared because they represent distinct values. */
1710 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1711 a LABEL_REF, it isn't sharable. */
1712 if (GET_CODE (XEXP (x, 0)) == PLUS
1713 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1714 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1723 /* The chain of insns is not being copied. */
1727 /* A MEM is allowed to be shared if its address is constant
1728 or is a constant plus one of the special registers. */
1729 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1730 || XEXP (x, 0) == virtual_stack_vars_rtx
1731 || XEXP (x, 0) == virtual_incoming_args_rtx)
1734 if (GET_CODE (XEXP (x, 0)) == PLUS
1735 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1736 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1737 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1739 /* This MEM can appear in more than one place,
1740 but its address better not be shared with anything else. */
1742 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1752 /* This rtx may not be shared. If it has already been seen,
1753 replace it with a copy of itself. */
1759 copy = rtx_alloc (code);
1760 bcopy ((char *) x, (char *) copy,
1761 (sizeof (*copy) - sizeof (copy->fld)
1762 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1768 /* Now scan the subexpressions recursively.
1769 We can store any replaced subexpressions directly into X
1770 since we know X is not shared! Any vectors in X
1771 must be copied if X was copied. */
1773 format_ptr = GET_RTX_FORMAT (code);
1775 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1777 switch (*format_ptr++)
1780 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1784 if (XVEC (x, i) != NULL)
1787 int len = XVECLEN (x, i);
1789 if (copied && len > 0)
1790 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1791 for (j = 0; j < len; j++)
1792 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1800 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1801 to look for shared sub-parts. */
1804 reset_used_flags (x)
1808 register enum rtx_code code;
1809 register char *format_ptr;
1814 code = GET_CODE (x);
1816 /* These types may be freely shared so we needn't do any resetting
1837 /* The chain of insns is not being copied. */
1846 format_ptr = GET_RTX_FORMAT (code);
1847 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1849 switch (*format_ptr++)
1852 reset_used_flags (XEXP (x, i));
1856 for (j = 0; j < XVECLEN (x, i); j++)
1857 reset_used_flags (XVECEXP (x, i, j));
1863 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1864 Return X or the rtx for the pseudo reg the value of X was copied into.
1865 OTHER must be valid as a SET_DEST. */
1868 make_safe_from (x, other)
1872 switch (GET_CODE (other))
1875 other = SUBREG_REG (other);
1877 case STRICT_LOW_PART:
1880 other = XEXP (other, 0);
1886 if ((GET_CODE (other) == MEM
1888 && GET_CODE (x) != REG
1889 && GET_CODE (x) != SUBREG)
1890 || (GET_CODE (other) == REG
1891 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1892 || reg_mentioned_p (other, x))))
1894 rtx temp = gen_reg_rtx (GET_MODE (x));
1895 emit_move_insn (temp, x);
1901 /* Emission of insns (adding them to the doubly-linked list). */
1903 /* Return the first insn of the current sequence or current function. */
1911 /* Return the last insn emitted in current sequence or current function. */
1919 /* Specify a new insn as the last in the chain. */
1922 set_last_insn (insn)
1925 if (NEXT_INSN (insn) != 0)
1930 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1933 get_last_insn_anywhere ()
1935 struct sequence_stack *stack;
1938 for (stack = sequence_stack; stack; stack = stack->next)
1939 if (stack->last != 0)
1944 /* Return a number larger than any instruction's uid in this function. */
1949 return cur_insn_uid;
1952 /* Return the next insn. If it is a SEQUENCE, return the first insn
1961 insn = NEXT_INSN (insn);
1962 if (insn && GET_CODE (insn) == INSN
1963 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1964 insn = XVECEXP (PATTERN (insn), 0, 0);
1970 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1974 previous_insn (insn)
1979 insn = PREV_INSN (insn);
1980 if (insn && GET_CODE (insn) == INSN
1981 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1982 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1988 /* Return the next insn after INSN that is not a NOTE. This routine does not
1989 look inside SEQUENCEs. */
1992 next_nonnote_insn (insn)
1997 insn = NEXT_INSN (insn);
1998 if (insn == 0 || GET_CODE (insn) != NOTE)
2005 /* Return the previous insn before INSN that is not a NOTE. This routine does
2006 not look inside SEQUENCEs. */
2009 prev_nonnote_insn (insn)
2014 insn = PREV_INSN (insn);
2015 if (insn == 0 || GET_CODE (insn) != NOTE)
2022 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2023 or 0, if there is none. This routine does not look inside
2027 next_real_insn (insn)
2032 insn = NEXT_INSN (insn);
2033 if (insn == 0 || GET_CODE (insn) == INSN
2034 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2041 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2042 or 0, if there is none. This routine does not look inside
2046 prev_real_insn (insn)
2051 insn = PREV_INSN (insn);
2052 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2053 || GET_CODE (insn) == JUMP_INSN)
2060 /* Find the next insn after INSN that really does something. This routine
2061 does not look inside SEQUENCEs. Until reload has completed, this is the
2062 same as next_real_insn. */
2065 next_active_insn (insn)
2070 insn = NEXT_INSN (insn);
2072 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2073 || (GET_CODE (insn) == INSN
2074 && (! reload_completed
2075 || (GET_CODE (PATTERN (insn)) != USE
2076 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2083 /* Find the last insn before INSN that really does something. This routine
2084 does not look inside SEQUENCEs. Until reload has completed, this is the
2085 same as prev_real_insn. */
2088 prev_active_insn (insn)
2093 insn = PREV_INSN (insn);
2095 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2096 || (GET_CODE (insn) == INSN
2097 && (! reload_completed
2098 || (GET_CODE (PATTERN (insn)) != USE
2099 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2106 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2114 insn = NEXT_INSN (insn);
2115 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2122 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2130 insn = PREV_INSN (insn);
2131 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2139 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2140 and REG_CC_USER notes so we can find it. */
2143 link_cc0_insns (insn)
2146 rtx user = next_nonnote_insn (insn);
2148 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2149 user = XVECEXP (PATTERN (user), 0, 0);
2151 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2152 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2155 /* Return the next insn that uses CC0 after INSN, which is assumed to
2156 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2157 applied to the result of this function should yield INSN).
2159 Normally, this is simply the next insn. However, if a REG_CC_USER note
2160 is present, it contains the insn that uses CC0.
2162 Return 0 if we can't find the insn. */
2165 next_cc0_user (insn)
2168 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2171 return XEXP (note, 0);
2173 insn = next_nonnote_insn (insn);
2174 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2175 insn = XVECEXP (PATTERN (insn), 0, 0);
2177 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2178 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2184 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2185 note, it is the previous insn. */
2188 prev_cc0_setter (insn)
2191 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2194 return XEXP (note, 0);
2196 insn = prev_nonnote_insn (insn);
2197 if (! sets_cc0_p (PATTERN (insn)))
2204 /* Try splitting insns that can be split for better scheduling.
2205 PAT is the pattern which might split.
2206 TRIAL is the insn providing PAT.
2207 LAST is non-zero if we should return the last insn of the sequence produced.
2209 If this routine succeeds in splitting, it returns the first or last
2210 replacement insn depending on the value of LAST. Otherwise, it
2211 returns TRIAL. If the insn to be returned can be split, it will be. */
2214 try_split (pat, trial, last)
2218 rtx before = PREV_INSN (trial);
2219 rtx after = NEXT_INSN (trial);
2220 rtx seq = split_insns (pat, trial);
2221 int has_barrier = 0;
2224 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2225 We may need to handle this specially. */
2226 if (after && GET_CODE (after) == BARRIER)
2229 after = NEXT_INSN (after);
2234 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2235 The latter case will normally arise only when being done so that
2236 it, in turn, will be split (SFmode on the 29k is an example). */
2237 if (GET_CODE (seq) == SEQUENCE)
2239 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2240 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2241 increment the usage count so we don't delete the label. */
2244 if (GET_CODE (trial) == JUMP_INSN)
2245 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2246 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2248 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2250 if (JUMP_LABEL (trial))
2251 LABEL_NUSES (JUMP_LABEL (trial))++;
2254 tem = emit_insn_after (seq, before);
2256 delete_insn (trial);
2258 emit_barrier_after (tem);
2260 /* Recursively call try_split for each new insn created; by the
2261 time control returns here that insn will be fully split, so
2262 set LAST and continue from the insn after the one returned.
2263 We can't use next_active_insn here since AFTER may be a note.
2264 Ignore deleted insns, which can be occur if not optimizing. */
2265 for (tem = NEXT_INSN (before); tem != after;
2266 tem = NEXT_INSN (tem))
2267 if (! INSN_DELETED_P (tem))
2268 tem = try_split (PATTERN (tem), tem, 1);
2270 /* Avoid infinite loop if the result matches the original pattern. */
2271 else if (rtx_equal_p (seq, pat))
2275 PATTERN (trial) = seq;
2276 INSN_CODE (trial) = -1;
2277 try_split (seq, trial, last);
2280 /* Return either the first or the last insn, depending on which was
2282 return last ? prev_active_insn (after) : next_active_insn (before);
2288 /* Make and return an INSN rtx, initializing all its slots.
2289 Store PATTERN in the pattern slots. */
2292 make_insn_raw (pattern)
2297 /* If in RTL generation phase, see if FREE_INSN can be used. */
2298 if (free_insn != 0 && rtx_equal_function_value_matters)
2301 free_insn = NEXT_INSN (free_insn);
2302 PUT_CODE (insn, INSN);
2305 insn = rtx_alloc (INSN);
2307 INSN_UID (insn) = cur_insn_uid++;
2308 PATTERN (insn) = pattern;
2309 INSN_CODE (insn) = -1;
2310 LOG_LINKS (insn) = NULL;
2311 REG_NOTES (insn) = NULL;
2316 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2319 make_jump_insn_raw (pattern)
2324 insn = rtx_alloc (JUMP_INSN);
2325 INSN_UID (insn) = cur_insn_uid++;
2327 PATTERN (insn) = pattern;
2328 INSN_CODE (insn) = -1;
2329 LOG_LINKS (insn) = NULL;
2330 REG_NOTES (insn) = NULL;
2331 JUMP_LABEL (insn) = NULL;
2336 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2339 make_call_insn_raw (pattern)
2344 insn = rtx_alloc (CALL_INSN);
2345 INSN_UID (insn) = cur_insn_uid++;
2347 PATTERN (insn) = pattern;
2348 INSN_CODE (insn) = -1;
2349 LOG_LINKS (insn) = NULL;
2350 REG_NOTES (insn) = NULL;
2351 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2356 /* Add INSN to the end of the doubly-linked list.
2357 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2363 PREV_INSN (insn) = last_insn;
2364 NEXT_INSN (insn) = 0;
2366 if (NULL != last_insn)
2367 NEXT_INSN (last_insn) = insn;
2369 if (NULL == first_insn)
2375 /* Add INSN into the doubly-linked list after insn AFTER. This and
2376 the next should be the only functions called to insert an insn once
2377 delay slots have been filled since only they know how to update a
2381 add_insn_after (insn, after)
2384 rtx next = NEXT_INSN (after);
2386 if (optimize && INSN_DELETED_P (after))
2389 NEXT_INSN (insn) = next;
2390 PREV_INSN (insn) = after;
2394 PREV_INSN (next) = insn;
2395 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2396 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2398 else if (last_insn == after)
2402 struct sequence_stack *stack = sequence_stack;
2403 /* Scan all pending sequences too. */
2404 for (; stack; stack = stack->next)
2405 if (after == stack->last)
2415 NEXT_INSN (after) = insn;
2416 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2418 rtx sequence = PATTERN (after);
2419 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2423 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2424 the previous should be the only functions called to insert an insn once
2425 delay slots have been filled since only they know how to update a
2429 add_insn_before (insn, before)
2432 rtx prev = PREV_INSN (before);
2434 if (optimize && INSN_DELETED_P (before))
2437 PREV_INSN (insn) = prev;
2438 NEXT_INSN (insn) = before;
2442 NEXT_INSN (prev) = insn;
2443 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2445 rtx sequence = PATTERN (prev);
2446 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2449 else if (first_insn == before)
2453 struct sequence_stack *stack = sequence_stack;
2454 /* Scan all pending sequences too. */
2455 for (; stack; stack = stack->next)
2456 if (before == stack->first)
2458 stack->first = insn;
2466 PREV_INSN (before) = insn;
2467 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2468 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2471 /* Delete all insns made since FROM.
2472 FROM becomes the new last instruction. */
2475 delete_insns_since (from)
2481 NEXT_INSN (from) = 0;
2485 /* This function is deprecated, please use sequences instead.
2487 Move a consecutive bunch of insns to a different place in the chain.
2488 The insns to be moved are those between FROM and TO.
2489 They are moved to a new position after the insn AFTER.
2490 AFTER must not be FROM or TO or any insn in between.
2492 This function does not know about SEQUENCEs and hence should not be
2493 called after delay-slot filling has been done. */
2496 reorder_insns (from, to, after)
2497 rtx from, to, after;
2499 /* Splice this bunch out of where it is now. */
2500 if (PREV_INSN (from))
2501 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2503 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2504 if (last_insn == to)
2505 last_insn = PREV_INSN (from);
2506 if (first_insn == from)
2507 first_insn = NEXT_INSN (to);
2509 /* Make the new neighbors point to it and it to them. */
2510 if (NEXT_INSN (after))
2511 PREV_INSN (NEXT_INSN (after)) = to;
2513 NEXT_INSN (to) = NEXT_INSN (after);
2514 PREV_INSN (from) = after;
2515 NEXT_INSN (after) = from;
2516 if (after == last_insn)
2520 /* Return the line note insn preceding INSN. */
2523 find_line_note (insn)
2526 if (no_line_numbers)
2529 for (; insn; insn = PREV_INSN (insn))
2530 if (GET_CODE (insn) == NOTE
2531 && NOTE_LINE_NUMBER (insn) >= 0)
2537 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2538 of the moved insns when debugging. This may insert a note between AFTER
2539 and FROM, and another one after TO. */
2542 reorder_insns_with_line_notes (from, to, after)
2543 rtx from, to, after;
2545 rtx from_line = find_line_note (from);
2546 rtx after_line = find_line_note (after);
2548 reorder_insns (from, to, after);
2550 if (from_line == after_line)
2554 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2555 NOTE_LINE_NUMBER (from_line),
2558 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2559 NOTE_LINE_NUMBER (after_line),
2563 /* Emit an insn of given code and pattern
2564 at a specified place within the doubly-linked list. */
2566 /* Make an instruction with body PATTERN
2567 and output it before the instruction BEFORE. */
2570 emit_insn_before (pattern, before)
2571 register rtx pattern, before;
2573 register rtx insn = before;
2575 if (GET_CODE (pattern) == SEQUENCE)
2579 for (i = 0; i < XVECLEN (pattern, 0); i++)
2581 insn = XVECEXP (pattern, 0, i);
2582 add_insn_before (insn, before);
2584 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2585 sequence_result[XVECLEN (pattern, 0)] = pattern;
2589 insn = make_insn_raw (pattern);
2590 add_insn_before (insn, before);
2596 /* Make an instruction with body PATTERN and code JUMP_INSN
2597 and output it before the instruction BEFORE. */
2600 emit_jump_insn_before (pattern, before)
2601 register rtx pattern, before;
2605 if (GET_CODE (pattern) == SEQUENCE)
2606 insn = emit_insn_before (pattern, before);
2609 insn = make_jump_insn_raw (pattern);
2610 add_insn_before (insn, before);
2616 /* Make an instruction with body PATTERN and code CALL_INSN
2617 and output it before the instruction BEFORE. */
2620 emit_call_insn_before (pattern, before)
2621 register rtx pattern, before;
2625 if (GET_CODE (pattern) == SEQUENCE)
2626 insn = emit_insn_before (pattern, before);
2629 insn = make_call_insn_raw (pattern);
2630 add_insn_before (insn, before);
2631 PUT_CODE (insn, CALL_INSN);
2637 /* Make an insn of code BARRIER
2638 and output it before the insn AFTER. */
2641 emit_barrier_before (before)
2642 register rtx before;
2644 register rtx insn = rtx_alloc (BARRIER);
2646 INSN_UID (insn) = cur_insn_uid++;
2648 add_insn_before (insn, before);
2652 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2655 emit_note_before (subtype, before)
2659 register rtx note = rtx_alloc (NOTE);
2660 INSN_UID (note) = cur_insn_uid++;
2661 NOTE_SOURCE_FILE (note) = 0;
2662 NOTE_LINE_NUMBER (note) = subtype;
2664 add_insn_before (note, before);
2668 /* Make an insn of code INSN with body PATTERN
2669 and output it after the insn AFTER. */
2672 emit_insn_after (pattern, after)
2673 register rtx pattern, after;
2675 register rtx insn = after;
2677 if (GET_CODE (pattern) == SEQUENCE)
2681 for (i = 0; i < XVECLEN (pattern, 0); i++)
2683 insn = XVECEXP (pattern, 0, i);
2684 add_insn_after (insn, after);
2687 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2688 sequence_result[XVECLEN (pattern, 0)] = pattern;
2692 insn = make_insn_raw (pattern);
2693 add_insn_after (insn, after);
2699 /* Similar to emit_insn_after, except that line notes are to be inserted so
2700 as to act as if this insn were at FROM. */
2703 emit_insn_after_with_line_notes (pattern, after, from)
2704 rtx pattern, after, from;
2706 rtx from_line = find_line_note (from);
2707 rtx after_line = find_line_note (after);
2708 rtx insn = emit_insn_after (pattern, after);
2711 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2712 NOTE_LINE_NUMBER (from_line),
2716 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2717 NOTE_LINE_NUMBER (after_line),
2721 /* Make an insn of code JUMP_INSN with body PATTERN
2722 and output it after the insn AFTER. */
2725 emit_jump_insn_after (pattern, after)
2726 register rtx pattern, after;
2730 if (GET_CODE (pattern) == SEQUENCE)
2731 insn = emit_insn_after (pattern, after);
2734 insn = make_jump_insn_raw (pattern);
2735 add_insn_after (insn, after);
2741 /* Make an insn of code BARRIER
2742 and output it after the insn AFTER. */
2745 emit_barrier_after (after)
2748 register rtx insn = rtx_alloc (BARRIER);
2750 INSN_UID (insn) = cur_insn_uid++;
2752 add_insn_after (insn, after);
2756 /* Emit the label LABEL after the insn AFTER. */
2759 emit_label_after (label, after)
2762 /* This can be called twice for the same label
2763 as a result of the confusion that follows a syntax error!
2764 So make it harmless. */
2765 if (INSN_UID (label) == 0)
2767 INSN_UID (label) = cur_insn_uid++;
2768 add_insn_after (label, after);
2774 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2777 emit_note_after (subtype, after)
2781 register rtx note = rtx_alloc (NOTE);
2782 INSN_UID (note) = cur_insn_uid++;
2783 NOTE_SOURCE_FILE (note) = 0;
2784 NOTE_LINE_NUMBER (note) = subtype;
2785 add_insn_after (note, after);
2789 /* Emit a line note for FILE and LINE after the insn AFTER. */
2792 emit_line_note_after (file, line, after)
2799 if (no_line_numbers && line > 0)
2805 note = rtx_alloc (NOTE);
2806 INSN_UID (note) = cur_insn_uid++;
2807 NOTE_SOURCE_FILE (note) = file;
2808 NOTE_LINE_NUMBER (note) = line;
2809 add_insn_after (note, after);
2813 /* Make an insn of code INSN with pattern PATTERN
2814 and add it to the end of the doubly-linked list.
2815 If PATTERN is a SEQUENCE, take the elements of it
2816 and emit an insn for each element.
2818 Returns the last insn emitted. */
2824 rtx insn = last_insn;
2826 if (GET_CODE (pattern) == SEQUENCE)
2830 for (i = 0; i < XVECLEN (pattern, 0); i++)
2832 insn = XVECEXP (pattern, 0, i);
2835 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2836 sequence_result[XVECLEN (pattern, 0)] = pattern;
2840 insn = make_insn_raw (pattern);
2847 /* Emit the insns in a chain starting with INSN.
2848 Return the last insn emitted. */
2858 rtx next = NEXT_INSN (insn);
2867 /* Emit the insns in a chain starting with INSN and place them in front of
2868 the insn BEFORE. Return the last insn emitted. */
2871 emit_insns_before (insn, before)
2879 rtx next = NEXT_INSN (insn);
2880 add_insn_before (insn, before);
2888 /* Emit the insns in a chain starting with FIRST and place them in back of
2889 the insn AFTER. Return the last insn emitted. */
2892 emit_insns_after (first, after)
2897 register rtx after_after;
2905 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2908 after_after = NEXT_INSN (after);
2910 NEXT_INSN (after) = first;
2911 PREV_INSN (first) = after;
2912 NEXT_INSN (last) = after_after;
2914 PREV_INSN (after_after) = last;
2916 if (after == last_insn)
2921 /* Make an insn of code JUMP_INSN with pattern PATTERN
2922 and add it to the end of the doubly-linked list. */
2925 emit_jump_insn (pattern)
2928 if (GET_CODE (pattern) == SEQUENCE)
2929 return emit_insn (pattern);
2932 register rtx insn = make_jump_insn_raw (pattern);
2938 /* Make an insn of code CALL_INSN with pattern PATTERN
2939 and add it to the end of the doubly-linked list. */
2942 emit_call_insn (pattern)
2945 if (GET_CODE (pattern) == SEQUENCE)
2946 return emit_insn (pattern);
2949 register rtx insn = make_call_insn_raw (pattern);
2951 PUT_CODE (insn, CALL_INSN);
2956 /* Add the label LABEL to the end of the doubly-linked list. */
2962 /* This can be called twice for the same label
2963 as a result of the confusion that follows a syntax error!
2964 So make it harmless. */
2965 if (INSN_UID (label) == 0)
2967 INSN_UID (label) = cur_insn_uid++;
2973 /* Make an insn of code BARRIER
2974 and add it to the end of the doubly-linked list. */
2979 register rtx barrier = rtx_alloc (BARRIER);
2980 INSN_UID (barrier) = cur_insn_uid++;
2985 /* Make an insn of code NOTE
2986 with data-fields specified by FILE and LINE
2987 and add it to the end of the doubly-linked list,
2988 but only if line-numbers are desired for debugging info. */
2991 emit_line_note (file, line)
2995 emit_filename = file;
2999 if (no_line_numbers)
3003 return emit_note (file, line);
3006 /* Make an insn of code NOTE
3007 with data-fields specified by FILE and LINE
3008 and add it to the end of the doubly-linked list.
3009 If it is a line-number NOTE, omit it if it matches the previous one. */
3012 emit_note (file, line)
3020 if (file && last_filename && !strcmp (file, last_filename)
3021 && line == last_linenum)
3023 last_filename = file;
3024 last_linenum = line;
3027 if (no_line_numbers && line > 0)
3033 note = rtx_alloc (NOTE);
3034 INSN_UID (note) = cur_insn_uid++;
3035 NOTE_SOURCE_FILE (note) = file;
3036 NOTE_LINE_NUMBER (note) = line;
3041 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3044 emit_line_note_force (file, line)
3049 return emit_line_note (file, line);
3052 /* Cause next statement to emit a line note even if the line number
3053 has not changed. This is used at the beginning of a function. */
3056 force_next_line_note ()
3061 /* Return an indication of which type of insn should have X as a body.
3062 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3068 if (GET_CODE (x) == CODE_LABEL)
3070 if (GET_CODE (x) == CALL)
3072 if (GET_CODE (x) == RETURN)
3074 if (GET_CODE (x) == SET)
3076 if (SET_DEST (x) == pc_rtx)
3078 else if (GET_CODE (SET_SRC (x)) == CALL)
3083 if (GET_CODE (x) == PARALLEL)
3086 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3087 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3089 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3090 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3092 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3093 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3099 /* Emit the rtl pattern X as an appropriate kind of insn.
3100 If X is a label, it is simply added into the insn chain. */
3106 enum rtx_code code = classify_insn (x);
3108 if (code == CODE_LABEL)
3109 return emit_label (x);
3110 else if (code == INSN)
3111 return emit_insn (x);
3112 else if (code == JUMP_INSN)
3114 register rtx insn = emit_jump_insn (x);
3115 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3116 return emit_barrier ();
3119 else if (code == CALL_INSN)
3120 return emit_call_insn (x);
3125 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3130 struct sequence_stack *tem;
3132 if (sequence_element_free_list)
3134 /* Reuse a previously-saved struct sequence_stack. */
3135 tem = sequence_element_free_list;
3136 sequence_element_free_list = tem->next;
3139 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3141 tem->next = sequence_stack;
3142 tem->first = first_insn;
3143 tem->last = last_insn;
3144 tem->sequence_rtl_expr = sequence_rtl_expr;
3146 sequence_stack = tem;
3152 /* Similarly, but indicate that this sequence will be placed in
3156 start_sequence_for_rtl_expr (t)
3161 sequence_rtl_expr = t;
3164 /* Set up the insn chain starting with FIRST
3165 as the current sequence, saving the previously current one. */
3168 push_to_sequence (first)
3175 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3181 /* Set up the outer-level insn chain
3182 as the current sequence, saving the previously current one. */
3185 push_topmost_sequence ()
3187 struct sequence_stack *stack, *top = NULL;
3191 for (stack = sequence_stack; stack; stack = stack->next)
3194 first_insn = top->first;
3195 last_insn = top->last;
3196 sequence_rtl_expr = top->sequence_rtl_expr;
3199 /* After emitting to the outer-level insn chain, update the outer-level
3200 insn chain, and restore the previous saved state. */
3203 pop_topmost_sequence ()
3205 struct sequence_stack *stack, *top = NULL;
3207 for (stack = sequence_stack; stack; stack = stack->next)
3210 top->first = first_insn;
3211 top->last = last_insn;
3212 /* ??? Why don't we save sequence_rtl_expr here? */
3217 /* After emitting to a sequence, restore previous saved state.
3219 To get the contents of the sequence just made,
3220 you must call `gen_sequence' *before* calling here. */
3225 struct sequence_stack *tem = sequence_stack;
3227 first_insn = tem->first;
3228 last_insn = tem->last;
3229 sequence_rtl_expr = tem->sequence_rtl_expr;
3230 sequence_stack = tem->next;
3232 tem->next = sequence_element_free_list;
3233 sequence_element_free_list = tem;
3236 /* Return 1 if currently emitting into a sequence. */
3241 return sequence_stack != 0;
3244 /* Generate a SEQUENCE rtx containing the insns already emitted
3245 to the current sequence.
3247 This is how the gen_... function from a DEFINE_EXPAND
3248 constructs the SEQUENCE that it returns. */
3258 /* Count the insns in the chain. */
3260 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3263 /* If only one insn, return its pattern rather than a SEQUENCE.
3264 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3265 the case of an empty list.) */
3267 && ! RTX_FRAME_RELATED_P (first_insn)
3268 && (GET_CODE (first_insn) == INSN
3269 || GET_CODE (first_insn) == JUMP_INSN
3270 /* Don't discard the call usage field. */
3271 || (GET_CODE (first_insn) == CALL_INSN
3272 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3274 NEXT_INSN (first_insn) = free_insn;
3275 free_insn = first_insn;
3276 return PATTERN (first_insn);
3279 /* Put them in a vector. See if we already have a SEQUENCE of the
3280 appropriate length around. */
3281 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3282 sequence_result[len] = 0;
3285 /* Ensure that this rtl goes in saveable_obstack, since we may
3287 push_obstacks_nochange ();
3288 rtl_in_saveable_obstack ();
3289 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3293 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3294 XVECEXP (result, 0, i) = tem;
3299 /* Initialize data structures and variables in this file
3300 before generating rtl for each function. */
3309 sequence_rtl_expr = NULL;
3311 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3314 first_label_num = label_num;
3316 sequence_stack = NULL;
3318 /* Clear the start_sequence/gen_sequence cache. */
3319 sequence_element_free_list = 0;
3320 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3321 sequence_result[i] = 0;
3324 /* Init the tables that describe all the pseudo regs. */
3326 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3329 = (char *) savealloc (regno_pointer_flag_length);
3330 bzero (regno_pointer_flag, regno_pointer_flag_length);
3333 = (char *) savealloc (regno_pointer_flag_length);
3334 bzero (regno_pointer_align, regno_pointer_flag_length);
3337 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3338 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3340 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3341 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3342 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3343 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3344 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3346 /* Indicate that the virtual registers and stack locations are
3348 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3349 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3350 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3351 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3353 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3354 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3355 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3356 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3358 #ifdef STACK_BOUNDARY
3359 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3360 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3361 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3362 = STACK_BOUNDARY / BITS_PER_UNIT;
3363 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3365 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3366 = STACK_BOUNDARY / BITS_PER_UNIT;
3367 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3368 = STACK_BOUNDARY / BITS_PER_UNIT;
3369 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3370 = STACK_BOUNDARY / BITS_PER_UNIT;
3371 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3372 = STACK_BOUNDARY / BITS_PER_UNIT;
3375 #ifdef INIT_EXPANDERS
3380 /* Create some permanent unique rtl objects shared between all functions.
3381 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3384 init_emit_once (line_numbers)
3388 enum machine_mode mode;
3389 enum machine_mode double_mode;
3391 no_line_numbers = ! line_numbers;
3393 sequence_stack = NULL;
3395 /* Compute the word and byte modes. */
3397 byte_mode = VOIDmode;
3398 word_mode = VOIDmode;
3399 double_mode = VOIDmode;
3401 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3402 mode = GET_MODE_WIDER_MODE (mode))
3404 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3405 && byte_mode == VOIDmode)
3408 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3409 && word_mode == VOIDmode)
3413 #ifndef DOUBLE_TYPE_SIZE
3414 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3417 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3418 mode = GET_MODE_WIDER_MODE (mode))
3420 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3421 && double_mode == VOIDmode)
3425 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3427 /* Create the unique rtx's for certain rtx codes and operand values. */
3429 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3431 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3432 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3433 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3436 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3437 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3438 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3440 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3442 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3443 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3444 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3445 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3447 for (i = 0; i <= 2; i++)
3449 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3450 mode = GET_MODE_WIDER_MODE (mode))
3452 rtx tem = rtx_alloc (CONST_DOUBLE);
3453 union real_extract u;
3455 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3456 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3458 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3459 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3460 PUT_MODE (tem, mode);
3462 const_tiny_rtx[i][(int) mode] = tem;
3465 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3467 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3468 mode = GET_MODE_WIDER_MODE (mode))
3469 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3471 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3473 mode = GET_MODE_WIDER_MODE (mode))
3474 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3477 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3478 mode = GET_MODE_WIDER_MODE (mode))
3479 const_tiny_rtx[0][(int) mode] = const0_rtx;
3482 /* Assign register numbers to the globally defined register rtx.
3483 This must be done at runtime because the register number field
3484 is in a union and some compilers can't initialize unions. */
3486 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3487 PUT_MODE (stack_pointer_rtx, Pmode);
3488 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3489 PUT_MODE (frame_pointer_rtx, Pmode);
3490 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3491 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3492 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3494 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3495 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3496 PUT_MODE (arg_pointer_rtx, Pmode);
3499 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3500 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3501 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3502 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3503 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3504 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3505 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3506 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3508 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3509 return_address_pointer_rtx
3510 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3514 struct_value_rtx = STRUCT_VALUE;
3516 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3519 #ifdef STRUCT_VALUE_INCOMING
3520 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3522 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3523 struct_value_incoming_rtx
3524 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3526 struct_value_incoming_rtx = struct_value_rtx;
3530 #ifdef STATIC_CHAIN_REGNUM
3531 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3533 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3534 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3535 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3538 static_chain_incoming_rtx = static_chain_rtx;
3542 static_chain_rtx = STATIC_CHAIN;
3544 #ifdef STATIC_CHAIN_INCOMING
3545 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3547 static_chain_incoming_rtx = static_chain_rtx;
3551 #ifdef PIC_OFFSET_TABLE_REGNUM
3552 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3556 /* Query and clear/ restore no_line_numbers. This is used by the
3557 switch / case handling in stmt.c to give proper line numbers in
3558 warnings about unreachable code. */
3561 force_line_numbers ()
3563 int old = no_line_numbers;
3565 no_line_numbers = 0;
3567 force_next_line_note ();
3572 restore_line_number_status (old_value)
3575 no_line_numbers = old_value;