1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
43 #include "insn-config.h"
47 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
48 After rtl generation, it is 1 plus the largest register number used. */
50 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
52 /* This is *not* reset after each function. It gives each CODE_LABEL
53 in the entire compilation a unique label number. */
55 static int label_num = 1;
57 /* Lowest label number in current function. */
59 static int first_label_num;
61 /* Highest label number in current function.
62 Zero means use the value of label_num instead.
63 This is nonzero only when belatedly compiling an inline function. */
65 static int last_label_num;
67 /* Value label_num had when set_new_first_and_last_label_number was called.
68 If label_num has not changed since then, last_label_num is valid. */
70 static int base_label_num;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these except perhaps the floating-point CONST_DOUBLEs
79 are unique; no other rtx-object will be equal to any of these. */
81 rtx pc_rtx; /* (PC) */
82 rtx cc0_rtx; /* (CC0) */
83 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
84 rtx const0_rtx; /* (CONST_INT 0) */
85 rtx const1_rtx; /* (CONST_INT 1) */
86 rtx const2_rtx; /* (CONST_INT 2) */
87 rtx constm1_rtx; /* (CONST_INT -1) */
88 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
90 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
91 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
92 record a copy of const[012]_rtx. */
94 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
96 REAL_VALUE_TYPE dconst0;
97 REAL_VALUE_TYPE dconst1;
98 REAL_VALUE_TYPE dconst2;
99 REAL_VALUE_TYPE dconstm1;
101 /* All references to the following fixed hard registers go through
102 these unique rtl objects. On machines where the frame-pointer and
103 arg-pointer are the same register, they use the same unique object.
105 After register allocation, other rtl objects which used to be pseudo-regs
106 may be clobbered to refer to the frame-pointer register.
107 But references that were originally to the frame-pointer can be
108 distinguished from the others because they contain frame_pointer_rtx.
110 In an inline procedure, the stack and frame pointer rtxs may not be
111 used for anything else. */
112 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
113 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
114 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
115 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
116 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
117 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
118 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
119 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
121 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
122 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
123 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
124 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
126 /* We make one copy of (const_int C) where C is in
127 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
128 to save space during the compilation and simplify comparisons of
131 #define MAX_SAVED_CONST_INT 64
133 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
135 /* The ends of the doubly-linked chain of rtl for the current function.
136 Both are reset to null at the start of rtl generation for the function.
138 start_sequence saves both of these on `sequence_stack' and then
139 starts a new, nested sequence of insns. */
141 static rtx first_insn = NULL;
142 static rtx last_insn = NULL;
144 /* INSN_UID for next insn emitted.
145 Reset to 1 for each function compiled. */
147 static int cur_insn_uid = 1;
149 /* Line number and source file of the last line-number NOTE emitted.
150 This is used to avoid generating duplicates. */
152 static int last_linenum = 0;
153 static char *last_filename = 0;
155 /* A vector indexed by pseudo reg number. The allocated length
156 of this vector is regno_pointer_flag_length. Since this
157 vector is needed during the expansion phase when the total
158 number of registers in the function is not yet known,
159 it is copied and made bigger when necessary. */
161 char *regno_pointer_flag;
162 int regno_pointer_flag_length;
164 /* Indexed by pseudo register number, gives the rtx for that pseudo.
165 Allocated in parallel with regno_pointer_flag. */
169 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
170 Each element describes one pending sequence.
171 The main insn-chain is saved in the last element of the chain,
172 unless the chain is empty. */
174 struct sequence_stack *sequence_stack;
176 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
177 shortly thrown away. We use two mechanisms to prevent this waste:
179 First, we keep a list of the expressions used to represent the sequence
180 stack in sequence_element_free_list.
182 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
183 rtvec for use by gen_sequence. One entry for each size is sufficient
184 because most cases are calls to gen_sequence followed by immediately
185 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
186 destructive on the insn in it anyway and hence can't be redone.
188 We do not bother to save this cached data over nested function calls.
189 Instead, we just reinitialize them. */
191 #define SEQUENCE_RESULT_SIZE 5
193 static struct sequence_stack *sequence_element_free_list;
194 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
196 extern int rtx_equal_function_value_matters;
198 /* Filename and line number of last line-number note,
199 whether we actually emitted it or not. */
200 extern char *emit_filename;
201 extern int emit_lineno;
203 rtx change_address ();
206 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
208 ** This routine generates an RTX of the size specified by
209 ** <code>, which is an RTX code. The RTX structure is initialized
210 ** from the arguments <element1> through <elementn>, which are
211 ** interpreted according to the specific RTX type's format. The
212 ** special machine mode associated with the rtx (if any) is specified
215 ** gen_rtx can be invoked in a way which resembles the lisp-like
216 ** rtx it will generate. For example, the following rtx structure:
218 ** (plus:QI (mem:QI (reg:SI 1))
219 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
221 ** ...would be generated by the following C code:
223 ** gen_rtx (PLUS, QImode,
224 ** gen_rtx (MEM, QImode,
225 ** gen_rtx (REG, SImode, 1)),
226 ** gen_rtx (MEM, QImode,
227 ** gen_rtx (PLUS, SImode,
228 ** gen_rtx (REG, SImode, 2),
229 ** gen_rtx (REG, SImode, 3)))),
239 enum machine_mode mode;
240 register int i; /* Array indices... */
241 register char *fmt; /* Current rtx's format... */
242 register rtx rt_val; /* RTX to return to caller... */
245 code = va_arg (p, enum rtx_code);
246 mode = va_arg (p, enum machine_mode);
248 if (code == CONST_INT)
250 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
252 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
253 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
258 rt_val = rtx_alloc (code);
259 INTVAL (rt_val) = arg;
261 else if (code == REG)
263 int regno = va_arg (p, int);
265 /* In case the MD file explicitly references the frame pointer, have
266 all such references point to the same frame pointer. This is used
267 during frame pointer elimination to distinguish the explicit
268 references to these registers from pseudos that happened to be
271 If we have eliminated the frame pointer or arg pointer, we will
272 be using it as a normal register, for example as a spill register.
273 In such cases, we might be accessing it in a mode that is not
274 Pmode and therefore cannot use the pre-allocated rtx.
276 Also don't do this when we are making new REGs in reload,
277 since we don't want to get confused with the real pointers. */
279 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
280 && ! reload_in_progress)
281 return frame_pointer_rtx;
282 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
283 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
284 && ! reload_in_progress)
285 return arg_pointer_rtx;
287 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
288 && ! reload_in_progress)
289 return stack_pointer_rtx;
292 rt_val = rtx_alloc (code);
294 REGNO (rt_val) = regno;
300 rt_val = rtx_alloc (code); /* Allocate the storage space. */
301 rt_val->mode = mode; /* Store the machine mode... */
303 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
304 for (i = 0; i < GET_RTX_LENGTH (code); i++)
308 case '0': /* Unused field. */
311 case 'i': /* An integer? */
312 XINT (rt_val, i) = va_arg (p, int);
315 case 'w': /* A wide integer? */
316 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
319 case 's': /* A string? */
320 XSTR (rt_val, i) = va_arg (p, char *);
323 case 'e': /* An expression? */
324 case 'u': /* An insn? Same except when printing. */
325 XEXP (rt_val, i) = va_arg (p, rtx);
328 case 'E': /* An RTX vector? */
329 XVEC (rt_val, i) = va_arg (p, rtvec);
338 return rt_val; /* Return the new RTX... */
341 /* gen_rtvec (n, [rt1, ..., rtn])
343 ** This routine creates an rtvec and stores within it the
344 ** pointers to rtx's which are its arguments.
360 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
362 vector = (rtx *) alloca (n * sizeof (rtx));
363 for (i = 0; i < n; i++)
364 vector[i] = va_arg (p, rtx);
367 return gen_rtvec_v (n, vector);
371 gen_rtvec_v (n, argp)
376 register rtvec rt_val;
379 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
381 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
383 for (i = 0; i < n; i++)
384 rt_val->elem[i].rtx = *argp++;
389 /* Generate a REG rtx for a new pseudo register of mode MODE.
390 This pseudo is assigned the next sequential register number. */
394 enum machine_mode mode;
398 /* Don't let anything called by or after reload create new registers
399 (actually, registers can't be created after flow, but this is a good
402 if (reload_in_progress || reload_completed)
405 /* Make sure regno_pointer_flag and regno_reg_rtx are large
406 enough to have an element for this pseudo reg number. */
408 if (reg_rtx_no == regno_pointer_flag_length)
412 (char *) oballoc (regno_pointer_flag_length * 2);
413 bzero (new, regno_pointer_flag_length * 2);
414 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
415 regno_pointer_flag = new;
417 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
418 bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx));
419 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
420 regno_reg_rtx = new1;
422 regno_pointer_flag_length *= 2;
425 val = gen_rtx (REG, mode, reg_rtx_no);
426 regno_reg_rtx[reg_rtx_no++] = val;
430 /* Identify REG as a probable pointer register. */
433 mark_reg_pointer (reg)
436 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
439 /* Return 1 plus largest pseudo reg number used in the current function. */
447 /* Return 1 + the largest label number used so far in the current function. */
452 if (last_label_num && label_num == base_label_num)
453 return last_label_num;
457 /* Return first label number used in this function (if any were used). */
460 get_first_label_num ()
462 return first_label_num;
465 /* Return a value representing some low-order bits of X, where the number
466 of low-order bits is given by MODE. Note that no conversion is done
467 between floating-point and fixed-point values, rather, the bit
468 representation is returned.
470 This function handles the cases in common between gen_lowpart, below,
471 and two variants in cse.c and combine.c. These are the cases that can
472 be safely handled at all points in the compilation.
474 If this is not a case we can handle, return 0. */
477 gen_lowpart_common (mode, x)
478 enum machine_mode mode;
483 if (GET_MODE (x) == mode)
486 /* MODE must occupy no more words than the mode of X. */
487 if (GET_MODE (x) != VOIDmode
488 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
489 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
493 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
494 word = ((GET_MODE_SIZE (GET_MODE (x))
495 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
498 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
499 && (GET_MODE_CLASS (mode) == MODE_INT
500 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
502 /* If we are getting the low-order part of something that has been
503 sign- or zero-extended, we can either just use the object being
504 extended or make a narrower extension. If we want an even smaller
505 piece than the size of the object being extended, call ourselves
508 This case is used mostly by combine and cse. */
510 if (GET_MODE (XEXP (x, 0)) == mode)
512 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
513 return gen_lowpart_common (mode, XEXP (x, 0));
514 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
515 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
517 else if (GET_CODE (x) == SUBREG
518 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
519 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
520 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
522 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
523 else if (GET_CODE (x) == REG)
525 /* If the register is not valid for MODE, return 0. If we don't
526 do this, there is no way to fix up the resulting REG later. */
527 if (REGNO (x) < FIRST_PSEUDO_REGISTER
528 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode))
530 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
531 /* integrate.c can't handle parts of a return value register. */
532 && (! REG_FUNCTION_VALUE_P (x)
533 || ! rtx_equal_function_value_matters)
534 /* We want to keep the stack, frame, and arg pointers
536 && REGNO (x) != FRAME_POINTER_REGNUM
537 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
538 && REGNO (x) != ARG_POINTER_REGNUM
540 && REGNO (x) != STACK_POINTER_REGNUM)
541 return gen_rtx (REG, mode, REGNO (x) + word);
543 return gen_rtx (SUBREG, mode, x, word);
546 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
547 from the low-order part of the constant. */
548 else if ((GET_MODE_CLASS (mode) == MODE_INT
549 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
550 && GET_MODE (x) == VOIDmode
551 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
553 /* If MODE is twice the host word size, X is already the desired
554 representation. Otherwise, if MODE is wider than a word, we can't
555 do this. If MODE is exactly a word, return just one CONST_INT.
556 If MODE is smaller than a word, clear the bits that don't belong
557 in our mode, unless they and our sign bit are all one. So we get
558 either a reasonable negative value or a reasonable unsigned value
561 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
563 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
565 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
566 return (GET_CODE (x) == CONST_INT ? x
567 : GEN_INT (CONST_DOUBLE_LOW (x)));
570 /* MODE must be narrower than HOST_BITS_PER_INT. */
571 int width = GET_MODE_BITSIZE (mode);
572 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
573 : CONST_DOUBLE_LOW (x));
575 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
576 != ((HOST_WIDE_INT) (-1) << (width - 1))))
577 val &= ((HOST_WIDE_INT) 1 << width) - 1;
579 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
584 /* If X is an integral constant but we want it in floating-point, it
585 must be the case that we have a union of an integer and a floating-point
586 value. If the machine-parameters allow it, simulate that union here
587 and return the result. The two-word and single-word cases are
590 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
591 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
592 || flag_pretend_float)
593 && GET_MODE_CLASS (mode) == MODE_FLOAT
594 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
595 && GET_CODE (x) == CONST_INT
596 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
597 #ifdef REAL_ARITHMETIC
603 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
604 return immed_real_const_1 (r, mode);
608 union {HOST_WIDE_INT i; float d; } u;
611 return immed_real_const_1 (u.d, mode);
614 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
615 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
616 || flag_pretend_float)
617 && GET_MODE_CLASS (mode) == MODE_FLOAT
618 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
619 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
620 && GET_MODE (x) == VOIDmode
621 && (sizeof (double) * HOST_BITS_PER_CHAR
622 == 2 * HOST_BITS_PER_WIDE_INT))
623 #ifdef REAL_ARITHMETIC
627 HOST_WIDE_INT low, high;
629 if (GET_CODE (x) == CONST_INT)
630 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
632 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
634 /* TARGET_DOUBLE takes the addressing order of the target machine. */
635 #ifdef WORDS_BIG_ENDIAN
636 i[0] = high, i[1] = low;
638 i[0] = low, i[1] = high;
641 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
642 return immed_real_const_1 (r, mode);
646 union {HOST_WIDE_INT i[2]; double d; } u;
647 HOST_WIDE_INT low, high;
649 if (GET_CODE (x) == CONST_INT)
650 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
652 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
654 #ifdef HOST_WORDS_BIG_ENDIAN
655 u.i[0] = high, u.i[1] = low;
657 u.i[0] = low, u.i[1] = high;
660 return immed_real_const_1 (u.d, mode);
663 /* Similarly, if this is converting a floating-point value into a
664 single-word integer. Only do this is the host and target parameters are
667 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
668 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
669 || flag_pretend_float)
670 && (GET_MODE_CLASS (mode) == MODE_INT
671 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
672 && GET_CODE (x) == CONST_DOUBLE
673 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
674 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
675 return operand_subword (x, 0, 0, GET_MODE (x));
677 /* Similarly, if this is converting a floating-point value into a
678 two-word integer, we can do this one word at a time and make an
679 integer. Only do this is the host and target parameters are
682 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
683 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
684 || flag_pretend_float)
685 && (GET_MODE_CLASS (mode) == MODE_INT
686 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
687 && GET_CODE (x) == CONST_DOUBLE
688 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
689 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
691 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
692 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
694 if (lowpart && GET_CODE (lowpart) == CONST_INT
695 && highpart && GET_CODE (highpart) == CONST_INT)
696 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
699 /* Otherwise, we can't do this. */
703 /* Return the real part (which has mode MODE) of a complex value X.
704 This always comes at the low address in memory. */
707 gen_realpart (mode, x)
708 enum machine_mode mode;
711 if (WORDS_BIG_ENDIAN)
712 return gen_highpart (mode, x);
714 return gen_lowpart (mode, x);
717 /* Return the imaginary part (which has mode MODE) of a complex value X.
718 This always comes at the high address in memory. */
721 gen_imagpart (mode, x)
722 enum machine_mode mode;
725 if (WORDS_BIG_ENDIAN)
726 return gen_lowpart (mode, x);
728 return gen_highpart (mode, x);
731 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
732 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
733 least-significant part of X.
734 MODE specifies how big a part of X to return;
735 it usually should not be larger than a word.
736 If X is a MEM whose address is a QUEUED, the value may be so also. */
739 gen_lowpart (mode, x)
740 enum machine_mode mode;
743 rtx result = gen_lowpart_common (mode, x);
747 else if (GET_CODE (x) == MEM)
749 /* The only additional case we can do is MEM. */
750 register int offset = 0;
751 if (WORDS_BIG_ENDIAN)
752 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
753 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
755 if (BYTES_BIG_ENDIAN)
756 /* Adjust the address so that the address-after-the-data
758 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
759 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
761 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
767 /* Like `gen_lowpart', but refer to the most significant part.
768 This is used to access the imaginary part of a complex number. */
771 gen_highpart (mode, x)
772 enum machine_mode mode;
775 /* This case loses if X is a subreg. To catch bugs early,
776 complain if an invalid MODE is used even in other cases. */
777 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
778 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
780 if (GET_CODE (x) == CONST_DOUBLE
781 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
782 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
785 return gen_rtx (CONST_INT, VOIDmode,
786 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
787 else if (GET_CODE (x) == CONST_INT)
789 else if (GET_CODE (x) == MEM)
791 register int offset = 0;
792 #if !WORDS_BIG_ENDIAN
793 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
794 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
796 #if !BYTES_BIG_ENDIAN
797 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
798 offset -= (GET_MODE_SIZE (mode)
799 - MIN (UNITS_PER_WORD,
800 GET_MODE_SIZE (GET_MODE (x))));
802 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
804 else if (GET_CODE (x) == SUBREG)
806 /* The only time this should occur is when we are looking at a
807 multi-word item with a SUBREG whose mode is the same as that of the
808 item. It isn't clear what we would do if it wasn't. */
809 if (SUBREG_WORD (x) != 0)
811 return gen_highpart (mode, SUBREG_REG (x));
813 else if (GET_CODE (x) == REG)
817 #if !WORDS_BIG_ENDIAN
818 if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
819 word = ((GET_MODE_SIZE (GET_MODE (x))
820 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
823 if (REGNO (x) < FIRST_PSEUDO_REGISTER
824 /* We want to keep the stack, frame, and arg pointers special. */
825 && REGNO (x) != FRAME_POINTER_REGNUM
826 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
827 && REGNO (x) != ARG_POINTER_REGNUM
829 && REGNO (x) != STACK_POINTER_REGNUM)
830 return gen_rtx (REG, mode, REGNO (x) + word);
832 return gen_rtx (SUBREG, mode, x, word);
838 /* Return 1 iff X, assumed to be a SUBREG,
839 refers to the least significant part of its containing reg.
840 If X is not a SUBREG, always return 1 (it is its own low part!). */
846 if (GET_CODE (x) != SUBREG)
850 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
851 return (SUBREG_WORD (x)
852 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
853 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
856 return SUBREG_WORD (x) == 0;
859 /* Return subword I of operand OP.
860 The word number, I, is interpreted as the word number starting at the
861 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
862 otherwise it is the high-order word.
864 If we cannot extract the required word, we return zero. Otherwise, an
865 rtx corresponding to the requested word will be returned.
867 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
868 reload has completed, a valid address will always be returned. After
869 reload, if a valid address cannot be returned, we return zero.
871 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
872 it is the responsibility of the caller.
874 MODE is the mode of OP in case it is a CONST_INT. */
877 operand_subword (op, i, validate_address, mode)
880 int validate_address;
881 enum machine_mode mode;
884 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
886 if (mode == VOIDmode)
887 mode = GET_MODE (op);
889 if (mode == VOIDmode)
892 /* If OP is narrower than a word or if we want a word outside OP, fail. */
894 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
895 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
898 /* If OP is already an integer word, return it. */
899 if (GET_MODE_CLASS (mode) == MODE_INT
900 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
903 /* If OP is a REG or SUBREG, we can handle it very simply. */
904 if (GET_CODE (op) == REG)
906 /* If the register is not valid for MODE, return 0. If we don't
907 do this, there is no way to fix up the resulting REG later. */
908 if (REGNO (op) < FIRST_PSEUDO_REGISTER
909 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
911 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
912 || (REG_FUNCTION_VALUE_P (op)
913 && rtx_equal_function_value_matters)
914 /* We want to keep the stack, frame, and arg pointers
916 || REGNO (op) == FRAME_POINTER_REGNUM
917 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
918 || REGNO (op) == ARG_POINTER_REGNUM
920 || REGNO (op) == STACK_POINTER_REGNUM)
921 return gen_rtx (SUBREG, word_mode, op, i);
923 return gen_rtx (REG, word_mode, REGNO (op) + i);
925 else if (GET_CODE (op) == SUBREG)
926 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
928 /* Form a new MEM at the requested address. */
929 if (GET_CODE (op) == MEM)
931 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
934 if (validate_address)
936 if (reload_completed)
938 if (! strict_memory_address_p (word_mode, addr))
942 addr = memory_address (word_mode, addr);
945 new = gen_rtx (MEM, word_mode, addr);
947 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
948 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
949 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
954 /* The only remaining cases are when OP is a constant. If the host and
955 target floating formats are the same, handling two-word floating
956 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
957 are defined as returning 32 bit and 64-bit values, respectively,
958 and not values of BITS_PER_WORD and 2 * BITS_PER_WORD bits. */
959 #ifdef REAL_ARITHMETIC
960 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
961 && GET_MODE_CLASS (mode) == MODE_FLOAT
962 && GET_MODE_BITSIZE (mode) == 64
963 && GET_CODE (op) == CONST_DOUBLE)
968 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
969 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
971 /* We handle 32-bit and 64-bit host words here. Note that the order in
972 which the words are written depends on the word endianness.
974 ??? This is a potential portability problem and should
975 be fixed at some point. */
976 if (HOST_BITS_PER_WIDE_INT == 32)
977 return GEN_INT (k[i]);
978 else if (HOST_BITS_PER_WIDE_INT == 64 && i == 0)
979 return GEN_INT ((k[! WORDS_BIG_ENDIAN] << (HOST_BITS_PER_WIDE_INT / 2))
980 | k[WORDS_BIG_ENDIAN]);
984 #else /* no REAL_ARITHMETIC */
985 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
986 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
987 || flag_pretend_float)
988 && GET_MODE_CLASS (mode) == MODE_FLOAT
989 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
990 && GET_CODE (op) == CONST_DOUBLE)
992 /* The constant is stored in the host's word-ordering,
993 but we want to access it in the target's word-ordering. Some
994 compilers don't like a conditional inside macro args, so we have two
995 copies of the return. */
996 #ifdef HOST_WORDS_BIG_ENDIAN
997 return GEN_INT (i == WORDS_BIG_ENDIAN
998 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1000 return GEN_INT (i != WORDS_BIG_ENDIAN
1001 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1004 #endif /* no REAL_ARITHMETIC */
1006 /* Single word float is a little harder, since single- and double-word
1007 values often do not have the same high-order bits. We have already
1008 verified that we want the only defined word of the single-word value. */
1009 #ifdef REAL_ARITHMETIC
1010 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1011 && GET_MODE_CLASS (mode) == MODE_FLOAT
1012 && GET_MODE_BITSIZE (mode) == 32
1013 && GET_CODE (op) == CONST_DOUBLE)
1018 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1019 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1023 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1024 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1025 || flag_pretend_float)
1026 && GET_MODE_CLASS (mode) == MODE_FLOAT
1027 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1028 && GET_CODE (op) == CONST_DOUBLE)
1031 union {float f; HOST_WIDE_INT i; } u;
1033 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1036 return GEN_INT (u.i);
1038 #endif /* no REAL_ARITHMETIC */
1040 /* The only remaining cases that we can handle are integers.
1041 Convert to proper endianness now since these cases need it.
1042 At this point, i == 0 means the low-order word.
1044 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1045 in general. However, if OP is (const_int 0), we can just return
1048 if (op == const0_rtx)
1051 if (GET_MODE_CLASS (mode) != MODE_INT
1052 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1053 || BITS_PER_WORD > HOST_BITS_PER_INT)
1056 if (WORDS_BIG_ENDIAN)
1057 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1059 /* Find out which word on the host machine this value is in and get
1060 it from the constant. */
1061 val = (i / size_ratio == 0
1062 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1063 : (GET_CODE (op) == CONST_INT
1064 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1066 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1067 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1068 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1069 & (((HOST_WIDE_INT) 1
1070 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1072 return GEN_INT (val);
1075 /* Similar to `operand_subword', but never return 0. If we can't extract
1076 the required subword, put OP into a register and try again. If that fails,
1077 abort. We always validate the address in this case. It is not valid
1078 to call this function after reload; it is mostly meant for RTL
1081 MODE is the mode of OP, in case it is CONST_INT. */
1084 operand_subword_force (op, i, mode)
1087 enum machine_mode mode;
1089 rtx result = operand_subword (op, i, 1, mode);
1094 if (mode != BLKmode && mode != VOIDmode)
1095 op = force_reg (mode, op);
1097 result = operand_subword (op, i, 1, mode);
1104 /* Given a compare instruction, swap the operands.
1105 A test instruction is changed into a compare of 0 against the operand. */
1108 reverse_comparison (insn)
1111 rtx body = PATTERN (insn);
1114 if (GET_CODE (body) == SET)
1115 comp = SET_SRC (body);
1117 comp = SET_SRC (XVECEXP (body, 0, 0));
1119 if (GET_CODE (comp) == COMPARE)
1121 rtx op0 = XEXP (comp, 0);
1122 rtx op1 = XEXP (comp, 1);
1123 XEXP (comp, 0) = op1;
1124 XEXP (comp, 1) = op0;
1128 rtx new = gen_rtx (COMPARE, VOIDmode,
1129 CONST0_RTX (GET_MODE (comp)), comp);
1130 if (GET_CODE (body) == SET)
1131 SET_SRC (body) = new;
1133 SET_SRC (XVECEXP (body, 0, 0)) = new;
1137 /* Return a memory reference like MEMREF, but with its mode changed
1138 to MODE and its address changed to ADDR.
1139 (VOIDmode means don't change the mode.
1140 NULL for ADDR means don't change the address.) */
1143 change_address (memref, mode, addr)
1145 enum machine_mode mode;
1150 if (GET_CODE (memref) != MEM)
1152 if (mode == VOIDmode)
1153 mode = GET_MODE (memref);
1155 addr = XEXP (memref, 0);
1157 /* If reload is in progress or has completed, ADDR must be valid.
1158 Otherwise, we can call memory_address to make it valid. */
1159 if (reload_completed || reload_in_progress)
1161 if (! memory_address_p (mode, addr))
1165 addr = memory_address (mode, addr);
1167 new = gen_rtx (MEM, mode, addr);
1168 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1169 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1170 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1174 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1179 register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0,
1180 label_num++, NULL_PTR);
1181 LABEL_NUSES (label) = 0;
1185 /* For procedure integration. */
1187 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1188 from a permanent obstack when the opportunity arises. */
1191 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1192 last_labelno, max_parm_regnum, max_regnum, args_size,
1193 pops_args, stack_slots, function_flags,
1194 outgoing_args_size, original_arg_vector,
1195 original_decl_initial)
1196 rtx first_insn, first_parm_insn;
1197 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1201 int outgoing_args_size;
1202 rtvec original_arg_vector;
1203 rtx original_decl_initial;
1205 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1206 cur_insn_uid++, NULL_RTX,
1207 first_insn, first_parm_insn,
1208 first_labelno, last_labelno,
1209 max_parm_regnum, max_regnum, args_size, pops_args,
1210 stack_slots, function_flags, outgoing_args_size,
1211 original_arg_vector, original_decl_initial);
1215 /* Install new pointers to the first and last insns in the chain.
1216 Used for an inline-procedure after copying the insn chain. */
1219 set_new_first_and_last_insn (first, last)
1226 /* Set the range of label numbers found in the current function.
1227 This is used when belatedly compiling an inline function. */
1230 set_new_first_and_last_label_num (first, last)
1233 base_label_num = label_num;
1234 first_label_num = first;
1235 last_label_num = last;
1238 /* Save all variables describing the current status into the structure *P.
1239 This is used before starting a nested function. */
1242 save_emit_status (p)
1245 p->reg_rtx_no = reg_rtx_no;
1246 p->first_label_num = first_label_num;
1247 p->first_insn = first_insn;
1248 p->last_insn = last_insn;
1249 p->sequence_stack = sequence_stack;
1250 p->cur_insn_uid = cur_insn_uid;
1251 p->last_linenum = last_linenum;
1252 p->last_filename = last_filename;
1253 p->regno_pointer_flag = regno_pointer_flag;
1254 p->regno_pointer_flag_length = regno_pointer_flag_length;
1255 p->regno_reg_rtx = regno_reg_rtx;
1258 /* Restore all variables describing the current status from the structure *P.
1259 This is used after a nested function. */
1262 restore_emit_status (p)
1267 reg_rtx_no = p->reg_rtx_no;
1268 first_label_num = p->first_label_num;
1269 first_insn = p->first_insn;
1270 last_insn = p->last_insn;
1271 sequence_stack = p->sequence_stack;
1272 cur_insn_uid = p->cur_insn_uid;
1273 last_linenum = p->last_linenum;
1274 last_filename = p->last_filename;
1275 regno_pointer_flag = p->regno_pointer_flag;
1276 regno_pointer_flag_length = p->regno_pointer_flag_length;
1277 regno_reg_rtx = p->regno_reg_rtx;
1279 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1280 sequence_element_free_list = 0;
1281 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1282 sequence_result[i] = 0;
1285 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1286 It does not work to do this twice, because the mark bits set here
1287 are not cleared afterwards. */
1290 unshare_all_rtl (insn)
1293 for (; insn; insn = NEXT_INSN (insn))
1294 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1295 || GET_CODE (insn) == CALL_INSN)
1297 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1298 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1299 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1302 /* Make sure the addresses of stack slots found outside the insn chain
1303 (such as, in DECL_RTL of a variable) are not shared
1304 with the insn chain.
1306 This special care is necessary when the stack slot MEM does not
1307 actually appear in the insn chain. If it does appear, its address
1308 is unshared from all else at that point. */
1310 copy_rtx_if_shared (stack_slot_list);
1313 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1314 Recursively does the same for subexpressions. */
1317 copy_rtx_if_shared (orig)
1320 register rtx x = orig;
1322 register enum rtx_code code;
1323 register char *format_ptr;
1329 code = GET_CODE (x);
1331 /* These types may be freely shared. */
1344 /* SCRATCH must be shared because they represent distinct values. */
1348 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1349 a LABEL_REF, it isn't sharable. */
1350 if (GET_CODE (XEXP (x, 0)) == PLUS
1351 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1352 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1362 /* The chain of insns is not being copied. */
1366 /* A MEM is allowed to be shared if its address is constant
1367 or is a constant plus one of the special registers. */
1368 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1369 || XEXP (x, 0) == virtual_stack_vars_rtx
1370 || XEXP (x, 0) == virtual_incoming_args_rtx)
1373 if (GET_CODE (XEXP (x, 0)) == PLUS
1374 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1375 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1376 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1378 /* This MEM can appear in more than one place,
1379 but its address better not be shared with anything else. */
1381 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1387 /* This rtx may not be shared. If it has already been seen,
1388 replace it with a copy of itself. */
1394 copy = rtx_alloc (code);
1395 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1396 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1402 /* Now scan the subexpressions recursively.
1403 We can store any replaced subexpressions directly into X
1404 since we know X is not shared! Any vectors in X
1405 must be copied if X was copied. */
1407 format_ptr = GET_RTX_FORMAT (code);
1409 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1411 switch (*format_ptr++)
1414 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1418 if (XVEC (x, i) != NULL)
1421 int len = XVECLEN (x, i);
1423 if (copied && len > 0)
1424 XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0));
1425 for (j = 0; j < len; j++)
1426 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1434 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1435 to look for shared sub-parts. */
1438 reset_used_flags (x)
1442 register enum rtx_code code;
1443 register char *format_ptr;
1449 code = GET_CODE (x);
1451 /* These types may be freely shared so we needn't do any reseting
1472 /* The chain of insns is not being copied. */
1478 format_ptr = GET_RTX_FORMAT (code);
1479 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1481 switch (*format_ptr++)
1484 reset_used_flags (XEXP (x, i));
1488 for (j = 0; j < XVECLEN (x, i); j++)
1489 reset_used_flags (XVECEXP (x, i, j));
1495 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1496 Return X or the rtx for the pseudo reg the value of X was copied into.
1497 OTHER must be valid as a SET_DEST. */
1500 make_safe_from (x, other)
1504 switch (GET_CODE (other))
1507 other = SUBREG_REG (other);
1509 case STRICT_LOW_PART:
1512 other = XEXP (other, 0);
1518 if ((GET_CODE (other) == MEM
1520 && GET_CODE (x) != REG
1521 && GET_CODE (x) != SUBREG)
1522 || (GET_CODE (other) == REG
1523 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1524 || reg_mentioned_p (other, x))))
1526 rtx temp = gen_reg_rtx (GET_MODE (x));
1527 emit_move_insn (temp, x);
1533 /* Emission of insns (adding them to the doubly-linked list). */
1535 /* Return the first insn of the current sequence or current function. */
1543 /* Return the last insn emitted in current sequence or current function. */
1551 /* Specify a new insn as the last in the chain. */
1554 set_last_insn (insn)
1557 if (NEXT_INSN (insn) != 0)
1562 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1565 get_last_insn_anywhere ()
1567 struct sequence_stack *stack;
1570 for (stack = sequence_stack; stack; stack = stack->next)
1571 if (stack->last != 0)
1576 /* Return a number larger than any instruction's uid in this function. */
1581 return cur_insn_uid;
1584 /* Return the next insn. If it is a SEQUENCE, return the first insn
1593 insn = NEXT_INSN (insn);
1594 if (insn && GET_CODE (insn) == INSN
1595 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1596 insn = XVECEXP (PATTERN (insn), 0, 0);
1602 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1606 previous_insn (insn)
1611 insn = PREV_INSN (insn);
1612 if (insn && GET_CODE (insn) == INSN
1613 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1614 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1620 /* Return the next insn after INSN that is not a NOTE. This routine does not
1621 look inside SEQUENCEs. */
1624 next_nonnote_insn (insn)
1629 insn = NEXT_INSN (insn);
1630 if (insn == 0 || GET_CODE (insn) != NOTE)
1637 /* Return the previous insn before INSN that is not a NOTE. This routine does
1638 not look inside SEQUENCEs. */
1641 prev_nonnote_insn (insn)
1646 insn = PREV_INSN (insn);
1647 if (insn == 0 || GET_CODE (insn) != NOTE)
1654 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1655 or 0, if there is none. This routine does not look inside
1659 next_real_insn (insn)
1664 insn = NEXT_INSN (insn);
1665 if (insn == 0 || GET_CODE (insn) == INSN
1666 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1673 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1674 or 0, if there is none. This routine does not look inside
1678 prev_real_insn (insn)
1683 insn = PREV_INSN (insn);
1684 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1685 || GET_CODE (insn) == JUMP_INSN)
1692 /* Find the next insn after INSN that really does something. This routine
1693 does not look inside SEQUENCEs. Until reload has completed, this is the
1694 same as next_real_insn. */
1697 next_active_insn (insn)
1702 insn = NEXT_INSN (insn);
1704 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1705 || (GET_CODE (insn) == INSN
1706 && (! reload_completed
1707 || (GET_CODE (PATTERN (insn)) != USE
1708 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1715 /* Find the last insn before INSN that really does something. This routine
1716 does not look inside SEQUENCEs. Until reload has completed, this is the
1717 same as prev_real_insn. */
1720 prev_active_insn (insn)
1725 insn = PREV_INSN (insn);
1727 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1728 || (GET_CODE (insn) == INSN
1729 && (! reload_completed
1730 || (GET_CODE (PATTERN (insn)) != USE
1731 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1738 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1746 insn = NEXT_INSN (insn);
1747 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1754 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1762 insn = PREV_INSN (insn);
1763 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1771 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1772 and REG_CC_USER notes so we can find it. */
1775 link_cc0_insns (insn)
1778 rtx user = next_nonnote_insn (insn);
1780 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1781 user = XVECEXP (PATTERN (user), 0, 0);
1783 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1785 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1788 /* Return the next insn that uses CC0 after INSN, which is assumed to
1789 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1790 applied to the result of this function should yield INSN).
1792 Normally, this is simply the next insn. However, if a REG_CC_USER note
1793 is present, it contains the insn that uses CC0.
1795 Return 0 if we can't find the insn. */
1798 next_cc0_user (insn)
1801 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1804 return XEXP (note, 0);
1806 insn = next_nonnote_insn (insn);
1807 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1808 insn = XVECEXP (PATTERN (insn), 0, 0);
1810 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1811 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1817 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1818 note, it is the previous insn. */
1821 prev_cc0_setter (insn)
1824 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1828 return XEXP (note, 0);
1830 insn = prev_nonnote_insn (insn);
1831 if (! sets_cc0_p (PATTERN (insn)))
1838 /* Try splitting insns that can be split for better scheduling.
1839 PAT is the pattern which might split.
1840 TRIAL is the insn providing PAT.
1841 BACKWARDS is non-zero if we are scanning insns from last to first.
1843 If this routine succeeds in splitting, it returns the first or last
1844 replacement insn depending on the value of BACKWARDS. Otherwise, it
1845 returns TRIAL. If the insn to be returned can be split, it will be. */
1848 try_split (pat, trial, backwards)
1852 rtx before = PREV_INSN (trial);
1853 rtx after = NEXT_INSN (trial);
1854 rtx seq = split_insns (pat, trial);
1855 int has_barrier = 0;
1858 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1859 We may need to handle this specially. */
1860 if (after && GET_CODE (after) == BARRIER)
1863 after = NEXT_INSN (after);
1868 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1869 The latter case will normally arise only when being done so that
1870 it, in turn, will be split (SFmode on the 29k is an example). */
1871 if (GET_CODE (seq) == SEQUENCE)
1873 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
1874 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
1875 increment the usage count so we don't delete the label. */
1878 if (GET_CODE (trial) == JUMP_INSN)
1879 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
1880 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
1882 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
1884 if (JUMP_LABEL (trial))
1885 LABEL_NUSES (JUMP_LABEL (trial))++;
1888 tem = emit_insn_after (seq, before);
1890 delete_insn (trial);
1892 emit_barrier_after (tem);
1894 /* Avoid infinite loop if the result matches the original pattern. */
1895 else if (rtx_equal_p (seq, pat))
1899 PATTERN (trial) = seq;
1900 INSN_CODE (trial) = -1;
1903 /* Set TEM to the insn we should return. */
1904 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
1905 return try_split (PATTERN (tem), tem, backwards);
1911 /* Make and return an INSN rtx, initializing all its slots.
1912 Store PATTERN in the pattern slots. */
1915 make_insn_raw (pattern)
1920 insn = rtx_alloc (INSN);
1921 INSN_UID (insn) = cur_insn_uid++;
1923 PATTERN (insn) = pattern;
1924 INSN_CODE (insn) = -1;
1925 LOG_LINKS (insn) = NULL;
1926 REG_NOTES (insn) = NULL;
1931 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
1934 make_jump_insn_raw (pattern)
1939 insn = rtx_alloc (JUMP_INSN);
1940 INSN_UID (insn) = cur_insn_uid++;
1942 PATTERN (insn) = pattern;
1943 INSN_CODE (insn) = -1;
1944 LOG_LINKS (insn) = NULL;
1945 REG_NOTES (insn) = NULL;
1946 JUMP_LABEL (insn) = NULL;
1951 /* Add INSN to the end of the doubly-linked list.
1952 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
1958 PREV_INSN (insn) = last_insn;
1959 NEXT_INSN (insn) = 0;
1961 if (NULL != last_insn)
1962 NEXT_INSN (last_insn) = insn;
1964 if (NULL == first_insn)
1970 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
1971 only function called to insert an insn once delay slots have been filled
1972 since only it knows how to update a SEQUENCE. */
1975 add_insn_after (insn, after)
1978 rtx next = NEXT_INSN (after);
1980 NEXT_INSN (insn) = next;
1981 PREV_INSN (insn) = after;
1985 PREV_INSN (next) = insn;
1986 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
1987 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
1989 else if (last_insn == after)
1993 struct sequence_stack *stack = sequence_stack;
1994 /* Scan all pending sequences too. */
1995 for (; stack; stack = stack->next)
1996 if (after == stack->last)
2000 NEXT_INSN (after) = insn;
2001 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2003 rtx sequence = PATTERN (after);
2004 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2008 /* Delete all insns made since FROM.
2009 FROM becomes the new last instruction. */
2012 delete_insns_since (from)
2018 NEXT_INSN (from) = 0;
2022 /* Move a consecutive bunch of insns to a different place in the chain.
2023 The insns to be moved are those between FROM and TO.
2024 They are moved to a new position after the insn AFTER.
2025 AFTER must not be FROM or TO or any insn in between.
2027 This function does not know about SEQUENCEs and hence should not be
2028 called after delay-slot filling has been done. */
2031 reorder_insns (from, to, after)
2032 rtx from, to, after;
2034 /* Splice this bunch out of where it is now. */
2035 if (PREV_INSN (from))
2036 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2038 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2039 if (last_insn == to)
2040 last_insn = PREV_INSN (from);
2041 if (first_insn == from)
2042 first_insn = NEXT_INSN (to);
2044 /* Make the new neighbors point to it and it to them. */
2045 if (NEXT_INSN (after))
2046 PREV_INSN (NEXT_INSN (after)) = to;
2048 NEXT_INSN (to) = NEXT_INSN (after);
2049 PREV_INSN (from) = after;
2050 NEXT_INSN (after) = from;
2051 if (after == last_insn)
2055 /* Return the line note insn preceding INSN. */
2058 find_line_note (insn)
2061 if (no_line_numbers)
2064 for (; insn; insn = PREV_INSN (insn))
2065 if (GET_CODE (insn) == NOTE
2066 && NOTE_LINE_NUMBER (insn) >= 0)
2072 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2073 of the moved insns when debugging. This may insert a note between AFTER
2074 and FROM, and another one after TO. */
2077 reorder_insns_with_line_notes (from, to, after)
2078 rtx from, to, after;
2080 rtx from_line = find_line_note (from);
2081 rtx after_line = find_line_note (after);
2083 reorder_insns (from, to, after);
2085 if (from_line == after_line)
2089 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2090 NOTE_LINE_NUMBER (from_line),
2093 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2094 NOTE_LINE_NUMBER (after_line),
2098 /* Emit an insn of given code and pattern
2099 at a specified place within the doubly-linked list. */
2101 /* Make an instruction with body PATTERN
2102 and output it before the instruction BEFORE. */
2105 emit_insn_before (pattern, before)
2106 register rtx pattern, before;
2108 register rtx insn = before;
2110 if (GET_CODE (pattern) == SEQUENCE)
2114 for (i = 0; i < XVECLEN (pattern, 0); i++)
2116 insn = XVECEXP (pattern, 0, i);
2117 add_insn_after (insn, PREV_INSN (before));
2119 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2120 sequence_result[XVECLEN (pattern, 0)] = pattern;
2124 insn = make_insn_raw (pattern);
2125 add_insn_after (insn, PREV_INSN (before));
2131 /* Make an instruction with body PATTERN and code JUMP_INSN
2132 and output it before the instruction BEFORE. */
2135 emit_jump_insn_before (pattern, before)
2136 register rtx pattern, before;
2140 if (GET_CODE (pattern) == SEQUENCE)
2141 insn = emit_insn_before (pattern, before);
2144 insn = make_jump_insn_raw (pattern);
2145 add_insn_after (insn, PREV_INSN (before));
2151 /* Make an instruction with body PATTERN and code CALL_INSN
2152 and output it before the instruction BEFORE. */
2155 emit_call_insn_before (pattern, before)
2156 register rtx pattern, before;
2158 rtx insn = emit_insn_before (pattern, before);
2159 PUT_CODE (insn, CALL_INSN);
2163 /* Make an insn of code BARRIER
2164 and output it before the insn AFTER. */
2167 emit_barrier_before (before)
2168 register rtx before;
2170 register rtx insn = rtx_alloc (BARRIER);
2172 INSN_UID (insn) = cur_insn_uid++;
2174 add_insn_after (insn, PREV_INSN (before));
2178 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2181 emit_note_before (subtype, before)
2185 register rtx note = rtx_alloc (NOTE);
2186 INSN_UID (note) = cur_insn_uid++;
2187 NOTE_SOURCE_FILE (note) = 0;
2188 NOTE_LINE_NUMBER (note) = subtype;
2190 add_insn_after (note, PREV_INSN (before));
2194 /* Make an insn of code INSN with body PATTERN
2195 and output it after the insn AFTER. */
2198 emit_insn_after (pattern, after)
2199 register rtx pattern, after;
2201 register rtx insn = after;
2203 if (GET_CODE (pattern) == SEQUENCE)
2207 for (i = 0; i < XVECLEN (pattern, 0); i++)
2209 insn = XVECEXP (pattern, 0, i);
2210 add_insn_after (insn, after);
2213 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2214 sequence_result[XVECLEN (pattern, 0)] = pattern;
2218 insn = make_insn_raw (pattern);
2219 add_insn_after (insn, after);
2225 /* Similar to emit_insn_after, except that line notes are to be inserted so
2226 as to act as if this insn were at FROM. */
2229 emit_insn_after_with_line_notes (pattern, after, from)
2230 rtx pattern, after, from;
2232 rtx from_line = find_line_note (from);
2233 rtx after_line = find_line_note (after);
2234 rtx insn = emit_insn_after (pattern, after);
2237 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2238 NOTE_LINE_NUMBER (from_line),
2242 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2243 NOTE_LINE_NUMBER (after_line),
2247 /* Make an insn of code JUMP_INSN with body PATTERN
2248 and output it after the insn AFTER. */
2251 emit_jump_insn_after (pattern, after)
2252 register rtx pattern, after;
2256 if (GET_CODE (pattern) == SEQUENCE)
2257 insn = emit_insn_after (pattern, after);
2260 insn = make_jump_insn_raw (pattern);
2261 add_insn_after (insn, after);
2267 /* Make an insn of code BARRIER
2268 and output it after the insn AFTER. */
2271 emit_barrier_after (after)
2274 register rtx insn = rtx_alloc (BARRIER);
2276 INSN_UID (insn) = cur_insn_uid++;
2278 add_insn_after (insn, after);
2282 /* Emit the label LABEL after the insn AFTER. */
2285 emit_label_after (label, after)
2288 /* This can be called twice for the same label
2289 as a result of the confusion that follows a syntax error!
2290 So make it harmless. */
2291 if (INSN_UID (label) == 0)
2293 INSN_UID (label) = cur_insn_uid++;
2294 add_insn_after (label, after);
2300 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2303 emit_note_after (subtype, after)
2307 register rtx note = rtx_alloc (NOTE);
2308 INSN_UID (note) = cur_insn_uid++;
2309 NOTE_SOURCE_FILE (note) = 0;
2310 NOTE_LINE_NUMBER (note) = subtype;
2311 add_insn_after (note, after);
2315 /* Emit a line note for FILE and LINE after the insn AFTER. */
2318 emit_line_note_after (file, line, after)
2325 if (no_line_numbers && line > 0)
2331 note = rtx_alloc (NOTE);
2332 INSN_UID (note) = cur_insn_uid++;
2333 NOTE_SOURCE_FILE (note) = file;
2334 NOTE_LINE_NUMBER (note) = line;
2335 add_insn_after (note, after);
2339 /* Make an insn of code INSN with pattern PATTERN
2340 and add it to the end of the doubly-linked list.
2341 If PATTERN is a SEQUENCE, take the elements of it
2342 and emit an insn for each element.
2344 Returns the last insn emitted. */
2350 rtx insn = last_insn;
2352 if (GET_CODE (pattern) == SEQUENCE)
2356 for (i = 0; i < XVECLEN (pattern, 0); i++)
2358 insn = XVECEXP (pattern, 0, i);
2361 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2362 sequence_result[XVECLEN (pattern, 0)] = pattern;
2366 insn = make_insn_raw (pattern);
2373 /* Emit the insns in a chain starting with INSN.
2374 Return the last insn emitted. */
2384 rtx next = NEXT_INSN (insn);
2393 /* Emit the insns in a chain starting with INSN and place them in front of
2394 the insn BEFORE. Return the last insn emitted. */
2397 emit_insns_before (insn, before)
2405 rtx next = NEXT_INSN (insn);
2406 add_insn_after (insn, PREV_INSN (before));
2414 /* Emit the insns in a chain starting with FIRST and place them in back of
2415 the insn AFTER. Return the last insn emitted. */
2418 emit_insns_after (first, after)
2423 register rtx after_after;
2431 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2434 after_after = NEXT_INSN (after);
2436 NEXT_INSN (after) = first;
2437 PREV_INSN (first) = after;
2438 NEXT_INSN (last) = after_after;
2440 PREV_INSN (after_after) = last;
2442 if (after == last_insn)
2447 /* Make an insn of code JUMP_INSN with pattern PATTERN
2448 and add it to the end of the doubly-linked list. */
2451 emit_jump_insn (pattern)
2454 if (GET_CODE (pattern) == SEQUENCE)
2455 return emit_insn (pattern);
2458 register rtx insn = make_jump_insn_raw (pattern);
2464 /* Make an insn of code CALL_INSN with pattern PATTERN
2465 and add it to the end of the doubly-linked list. */
2468 emit_call_insn (pattern)
2471 if (GET_CODE (pattern) == SEQUENCE)
2472 return emit_insn (pattern);
2475 register rtx insn = make_insn_raw (pattern);
2477 PUT_CODE (insn, CALL_INSN);
2482 /* Add the label LABEL to the end of the doubly-linked list. */
2488 /* This can be called twice for the same label
2489 as a result of the confusion that follows a syntax error!
2490 So make it harmless. */
2491 if (INSN_UID (label) == 0)
2493 INSN_UID (label) = cur_insn_uid++;
2499 /* Make an insn of code BARRIER
2500 and add it to the end of the doubly-linked list. */
2505 register rtx barrier = rtx_alloc (BARRIER);
2506 INSN_UID (barrier) = cur_insn_uid++;
2511 /* Make an insn of code NOTE
2512 with data-fields specified by FILE and LINE
2513 and add it to the end of the doubly-linked list,
2514 but only if line-numbers are desired for debugging info. */
2517 emit_line_note (file, line)
2521 emit_filename = file;
2525 if (no_line_numbers)
2529 return emit_note (file, line);
2532 /* Make an insn of code NOTE
2533 with data-fields specified by FILE and LINE
2534 and add it to the end of the doubly-linked list.
2535 If it is a line-number NOTE, omit it if it matches the previous one. */
2538 emit_note (file, line)
2546 if (file && last_filename && !strcmp (file, last_filename)
2547 && line == last_linenum)
2549 last_filename = file;
2550 last_linenum = line;
2553 if (no_line_numbers && line > 0)
2559 note = rtx_alloc (NOTE);
2560 INSN_UID (note) = cur_insn_uid++;
2561 NOTE_SOURCE_FILE (note) = file;
2562 NOTE_LINE_NUMBER (note) = line;
2567 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2570 emit_line_note_force (file, line)
2575 return emit_line_note (file, line);
2578 /* Cause next statement to emit a line note even if the line number
2579 has not changed. This is used at the beginning of a function. */
2582 force_next_line_note ()
2587 /* Return an indication of which type of insn should have X as a body.
2588 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2594 if (GET_CODE (x) == CODE_LABEL)
2596 if (GET_CODE (x) == CALL)
2598 if (GET_CODE (x) == RETURN)
2600 if (GET_CODE (x) == SET)
2602 if (SET_DEST (x) == pc_rtx)
2604 else if (GET_CODE (SET_SRC (x)) == CALL)
2609 if (GET_CODE (x) == PARALLEL)
2612 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2613 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2615 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2616 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2618 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2619 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2625 /* Emit the rtl pattern X as an appropriate kind of insn.
2626 If X is a label, it is simply added into the insn chain. */
2632 enum rtx_code code = classify_insn (x);
2634 if (code == CODE_LABEL)
2635 return emit_label (x);
2636 else if (code == INSN)
2637 return emit_insn (x);
2638 else if (code == JUMP_INSN)
2640 register rtx insn = emit_jump_insn (x);
2641 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2642 return emit_barrier ();
2645 else if (code == CALL_INSN)
2646 return emit_call_insn (x);
2651 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2656 struct sequence_stack *tem;
2658 if (sequence_element_free_list)
2660 /* Reuse a previously-saved struct sequence_stack. */
2661 tem = sequence_element_free_list;
2662 sequence_element_free_list = tem->next;
2665 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2667 tem->next = sequence_stack;
2668 tem->first = first_insn;
2669 tem->last = last_insn;
2671 sequence_stack = tem;
2677 /* Set up the insn chain starting with FIRST
2678 as the current sequence, saving the previously current one. */
2681 push_to_sequence (first)
2688 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2694 /* Set up the outer-level insn chain
2695 as the current sequence, saving the previously current one. */
2698 push_topmost_sequence ()
2700 struct sequence_stack *stack, *top;
2704 for (stack = sequence_stack; stack; stack = stack->next)
2707 first_insn = top->first;
2708 last_insn = top->last;
2711 /* After emitting to the outer-level insn chain, update the outer-level
2712 insn chain, and restore the previous saved state. */
2715 pop_topmost_sequence ()
2717 struct sequence_stack *stack, *top;
2719 for (stack = sequence_stack; stack; stack = stack->next)
2722 top->first = first_insn;
2723 top->last = last_insn;
2728 /* After emitting to a sequence, restore previous saved state.
2730 To get the contents of the sequence just made,
2731 you must call `gen_sequence' *before* calling here. */
2736 struct sequence_stack *tem = sequence_stack;
2738 first_insn = tem->first;
2739 last_insn = tem->last;
2740 sequence_stack = tem->next;
2742 tem->next = sequence_element_free_list;
2743 sequence_element_free_list = tem;
2746 /* Return 1 if currently emitting into a sequence. */
2751 return sequence_stack != 0;
2754 /* Generate a SEQUENCE rtx containing the insns already emitted
2755 to the current sequence.
2757 This is how the gen_... function from a DEFINE_EXPAND
2758 constructs the SEQUENCE that it returns. */
2769 /* Count the insns in the chain. */
2771 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2774 /* If only one insn, return its pattern rather than a SEQUENCE.
2775 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2776 the case of an empty list.) */
2778 && (GET_CODE (first_insn) == INSN
2779 || GET_CODE (first_insn) == JUMP_INSN
2780 || GET_CODE (first_insn) == CALL_INSN))
2781 return PATTERN (first_insn);
2783 /* Put them in a vector. See if we already have a SEQUENCE of the
2784 appropriate length around. */
2785 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2786 sequence_result[len] = 0;
2789 /* Ensure that this rtl goes in saveable_obstack, since we may be
2791 push_obstacks_nochange ();
2792 rtl_in_saveable_obstack ();
2793 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2797 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2798 XVECEXP (result, 0, i) = tem;
2803 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2804 according to the chain of insns starting with FIRST.
2806 Also set cur_insn_uid to exceed the largest uid in that chain.
2808 This is used when an inline function's rtl is saved
2809 and passed to rest_of_compilation later. */
2811 static void restore_reg_data_1 ();
2814 restore_reg_data (first)
2819 register int max_uid = 0;
2821 for (insn = first; insn; insn = NEXT_INSN (insn))
2823 if (INSN_UID (insn) >= max_uid)
2824 max_uid = INSN_UID (insn);
2826 switch (GET_CODE (insn))
2836 restore_reg_data_1 (PATTERN (insn));
2841 /* Don't duplicate the uids already in use. */
2842 cur_insn_uid = max_uid + 1;
2844 /* If any regs are missing, make them up.
2846 ??? word_mode is not necessarily the right mode. Most likely these REGs
2847 are never used. At some point this should be checked. */
2849 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
2850 if (regno_reg_rtx[i] == 0)
2851 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
2855 restore_reg_data_1 (orig)
2858 register rtx x = orig;
2860 register enum rtx_code code;
2861 register char *format_ptr;
2863 code = GET_CODE (x);
2878 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
2880 /* Make sure regno_pointer_flag and regno_reg_rtx are large
2881 enough to have an element for this pseudo reg number. */
2882 if (REGNO (x) >= reg_rtx_no)
2884 reg_rtx_no = REGNO (x);
2886 if (reg_rtx_no >= regno_pointer_flag_length)
2888 int newlen = MAX (regno_pointer_flag_length * 2,
2891 char *new = (char *) oballoc (newlen);
2892 bzero (new, newlen);
2893 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
2895 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
2896 bzero (new1, newlen * sizeof (rtx));
2897 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
2899 regno_pointer_flag = new;
2900 regno_reg_rtx = new1;
2901 regno_pointer_flag_length = newlen;
2905 regno_reg_rtx[REGNO (x)] = x;
2910 if (GET_CODE (XEXP (x, 0)) == REG)
2911 mark_reg_pointer (XEXP (x, 0));
2912 restore_reg_data_1 (XEXP (x, 0));
2916 /* Now scan the subexpressions recursively. */
2918 format_ptr = GET_RTX_FORMAT (code);
2920 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2922 switch (*format_ptr++)
2925 restore_reg_data_1 (XEXP (x, i));
2929 if (XVEC (x, i) != NULL)
2933 for (j = 0; j < XVECLEN (x, i); j++)
2934 restore_reg_data_1 (XVECEXP (x, i, j));
2941 /* Initialize data structures and variables in this file
2942 before generating rtl for each function. */
2952 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
2955 first_label_num = label_num;
2957 sequence_stack = NULL;
2959 /* Clear the start_sequence/gen_sequence cache. */
2960 sequence_element_free_list = 0;
2961 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
2962 sequence_result[i] = 0;
2964 /* Init the tables that describe all the pseudo regs. */
2966 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
2969 = (char *) oballoc (regno_pointer_flag_length);
2970 bzero (regno_pointer_flag, regno_pointer_flag_length);
2973 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
2974 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
2976 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
2977 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
2978 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
2979 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
2980 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
2982 /* Indicate that the virtual registers and stack locations are
2984 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
2985 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
2986 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
2988 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
2989 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
2990 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
2991 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
2993 #ifdef INIT_EXPANDERS
2998 /* Create some permanent unique rtl objects shared between all functions.
2999 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3002 init_emit_once (line_numbers)
3006 enum machine_mode mode;
3008 no_line_numbers = ! line_numbers;
3010 sequence_stack = NULL;
3012 /* Create the unique rtx's for certain rtx codes and operand values. */
3014 pc_rtx = gen_rtx (PC, VOIDmode);
3015 cc0_rtx = gen_rtx (CC0, VOIDmode);
3017 /* Don't use gen_rtx here since gen_rtx in this case
3018 tries to use these variables. */
3019 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3021 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3022 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3023 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3026 /* These four calls obtain some of the rtx expressions made above. */
3027 const0_rtx = GEN_INT (0);
3028 const1_rtx = GEN_INT (1);
3029 const2_rtx = GEN_INT (2);
3030 constm1_rtx = GEN_INT (-1);
3032 /* This will usually be one of the above constants, but may be a new rtx. */
3033 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3035 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3036 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3037 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3038 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3040 for (i = 0; i <= 2; i++)
3042 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3043 mode = GET_MODE_WIDER_MODE (mode))
3045 rtx tem = rtx_alloc (CONST_DOUBLE);
3046 union real_extract u;
3048 bzero (&u, sizeof u); /* Zero any holes in a structure. */
3049 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3051 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
3052 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3053 PUT_MODE (tem, mode);
3055 const_tiny_rtx[i][(int) mode] = tem;
3058 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3060 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3061 mode = GET_MODE_WIDER_MODE (mode))
3062 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3064 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3066 mode = GET_MODE_WIDER_MODE (mode))
3067 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3070 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3071 mode = GET_MODE_WIDER_MODE (mode))
3072 const_tiny_rtx[0][(int) mode] = const0_rtx;
3074 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3075 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3077 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3078 arg_pointer_rtx = frame_pointer_rtx;
3079 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3080 arg_pointer_rtx = stack_pointer_rtx;
3082 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3084 /* Create the virtual registers. Do so here since the following objects
3085 might reference them. */
3087 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3088 VIRTUAL_INCOMING_ARGS_REGNUM);
3089 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3090 VIRTUAL_STACK_VARS_REGNUM);
3091 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3092 VIRTUAL_STACK_DYNAMIC_REGNUM);
3093 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3094 VIRTUAL_OUTGOING_ARGS_REGNUM);
3097 struct_value_rtx = STRUCT_VALUE;
3099 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3102 #ifdef STRUCT_VALUE_INCOMING
3103 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3105 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3106 struct_value_incoming_rtx
3107 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3109 struct_value_incoming_rtx = struct_value_rtx;
3113 #ifdef STATIC_CHAIN_REGNUM
3114 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3116 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3117 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3118 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3121 static_chain_incoming_rtx = static_chain_rtx;
3125 static_chain_rtx = STATIC_CHAIN;
3127 #ifdef STATIC_CHAIN_INCOMING
3128 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3130 static_chain_incoming_rtx = static_chain_rtx;
3134 #ifdef PIC_OFFSET_TABLE_REGNUM
3135 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);