1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
59 #include "tree-pass.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* A hash table storing CONST_INTs whose absolute value is greater
120 than MAX_SAVED_CONST_INT. */
122 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
123 htab_t const_int_htab;
125 /* A hash table storing memory attribute structures. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
127 htab_t mem_attrs_htab;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
131 htab_t reg_attrs_htab;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
135 htab_t const_double_htab;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
139 htab_t const_fixed_htab;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define last_location (crtl->emit.x_last_location)
144 #define first_label_num (crtl->emit.x_first_label_num)
146 static rtx make_call_insn_raw (rtx);
147 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
148 static void set_used_decls (tree);
149 static void mark_label_nuses (rtx);
150 static hashval_t const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx lookup_const_double (rtx);
155 static hashval_t const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx lookup_const_fixed (rtx);
158 static hashval_t mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
161 addr_space_t, enum machine_mode);
162 static hashval_t reg_attrs_htab_hash (const void *);
163 static int reg_attrs_htab_eq (const void *, const void *);
164 static reg_attrs *get_reg_attrs (tree, int);
165 static rtx gen_const_vector (enum machine_mode, int);
166 static void copy_rtx_if_shared_1 (rtx *orig);
168 /* Probability of the conditional branch currently proceeded by try_split.
169 Set to -1 otherwise. */
170 int split_branch_probability = -1;
172 /* Returns a hash code for X (which is a really a CONST_INT). */
175 const_int_htab_hash (const void *x)
177 return (hashval_t) INTVAL ((const_rtx) x);
180 /* Returns nonzero if the value represented by X (which is really a
181 CONST_INT) is the same as that given by Y (which is really a
185 const_int_htab_eq (const void *x, const void *y)
187 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
190 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
192 const_double_htab_hash (const void *x)
194 const_rtx const value = (const_rtx) x;
197 if (GET_MODE (value) == VOIDmode)
198 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
201 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
202 /* MODE is used in the comparison, so it should be in the hash. */
203 h ^= GET_MODE (value);
208 /* Returns nonzero if the value represented by X (really a ...)
209 is the same as that represented by Y (really a ...) */
211 const_double_htab_eq (const void *x, const void *y)
213 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
215 if (GET_MODE (a) != GET_MODE (b))
217 if (GET_MODE (a) == VOIDmode)
218 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
219 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
221 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
222 CONST_DOUBLE_REAL_VALUE (b));
225 /* Returns a hash code for X (which is really a CONST_FIXED). */
228 const_fixed_htab_hash (const void *x)
230 const_rtx const value = (const_rtx) x;
233 h = fixed_hash (CONST_FIXED_VALUE (value));
234 /* MODE is used in the comparison, so it should be in the hash. */
235 h ^= GET_MODE (value);
239 /* Returns nonzero if the value represented by X (really a ...)
240 is the same as that represented by Y (really a ...). */
243 const_fixed_htab_eq (const void *x, const void *y)
245 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
247 if (GET_MODE (a) != GET_MODE (b))
249 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
252 /* Returns a hash code for X (which is a really a mem_attrs *). */
255 mem_attrs_htab_hash (const void *x)
257 const mem_attrs *const p = (const mem_attrs *) x;
259 return (p->alias ^ (p->align * 1000)
260 ^ (p->addrspace * 4000)
261 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
262 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
263 ^ (size_t) iterative_hash_expr (p->expr, 0));
266 /* Returns nonzero if the value represented by X (which is really a
267 mem_attrs *) is the same as that given by Y (which is also really a
271 mem_attrs_htab_eq (const void *x, const void *y)
273 const mem_attrs *const p = (const mem_attrs *) x;
274 const mem_attrs *const q = (const mem_attrs *) y;
276 return (p->alias == q->alias && p->offset == q->offset
277 && p->size == q->size && p->align == q->align
278 && p->addrspace == q->addrspace
279 && (p->expr == q->expr
280 || (p->expr != NULL_TREE && q->expr != NULL_TREE
281 && operand_equal_p (p->expr, q->expr, 0))));
284 /* Allocate a new mem_attrs structure and insert it into the hash table if
285 one identical to it is not already in the table. We are doing this for
289 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
290 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
295 /* If everything is the default, we can just return zero.
296 This must match what the corresponding MEM_* macros return when the
297 field is not present. */
298 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
300 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
301 && (STRICT_ALIGNMENT && mode != BLKmode
302 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
307 attrs.offset = offset;
310 attrs.addrspace = addrspace;
312 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 *slot = ggc_alloc_mem_attrs ();
316 memcpy (*slot, &attrs, sizeof (mem_attrs));
319 return (mem_attrs *) *slot;
322 /* Returns a hash code for X (which is a really a reg_attrs *). */
325 reg_attrs_htab_hash (const void *x)
327 const reg_attrs *const p = (const reg_attrs *) x;
329 return ((p->offset * 1000) ^ (long) p->decl);
332 /* Returns nonzero if the value represented by X (which is really a
333 reg_attrs *) is the same as that given by Y (which is also really a
337 reg_attrs_htab_eq (const void *x, const void *y)
339 const reg_attrs *const p = (const reg_attrs *) x;
340 const reg_attrs *const q = (const reg_attrs *) y;
342 return (p->decl == q->decl && p->offset == q->offset);
344 /* Allocate a new reg_attrs structure and insert it into the hash table if
345 one identical to it is not already in the table. We are doing this for
349 get_reg_attrs (tree decl, int offset)
354 /* If everything is the default, we can just return zero. */
355 if (decl == 0 && offset == 0)
359 attrs.offset = offset;
361 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 *slot = ggc_alloc_reg_attrs ();
365 memcpy (*slot, &attrs, sizeof (reg_attrs));
368 return (reg_attrs *) *slot;
373 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
379 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
380 MEM_VOLATILE_P (x) = true;
386 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
387 don't attempt to share with the various global pieces of rtl (such as
388 frame_pointer_rtx). */
391 gen_raw_REG (enum machine_mode mode, int regno)
393 rtx x = gen_rtx_raw_REG (mode, regno);
394 ORIGINAL_REGNO (x) = regno;
398 /* There are some RTL codes that require special attention; the generation
399 functions do the raw handling. If you add to this list, modify
400 special_rtx in gengenrtl.c as well. */
403 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
407 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
408 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
410 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
411 if (const_true_rtx && arg == STORE_FLAG_VALUE)
412 return const_true_rtx;
415 /* Look up the CONST_INT in the hash table. */
416 slot = htab_find_slot_with_hash (const_int_htab, &arg,
417 (hashval_t) arg, INSERT);
419 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
425 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
427 return GEN_INT (trunc_int_for_mode (c, mode));
430 /* CONST_DOUBLEs might be created from pairs of integers, or from
431 REAL_VALUE_TYPEs. Also, their length is known only at run time,
432 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
434 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
435 hash table. If so, return its counterpart; otherwise add it
436 to the hash table and return it. */
438 lookup_const_double (rtx real)
440 void **slot = htab_find_slot (const_double_htab, real, INSERT);
447 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
448 VALUE in mode MODE. */
450 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
452 rtx real = rtx_alloc (CONST_DOUBLE);
453 PUT_MODE (real, mode);
457 return lookup_const_double (real);
460 /* Determine whether FIXED, a CONST_FIXED, already exists in the
461 hash table. If so, return its counterpart; otherwise add it
462 to the hash table and return it. */
465 lookup_const_fixed (rtx fixed)
467 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
474 /* Return a CONST_FIXED rtx for a fixed-point value specified by
475 VALUE in mode MODE. */
478 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
480 rtx fixed = rtx_alloc (CONST_FIXED);
481 PUT_MODE (fixed, mode);
485 return lookup_const_fixed (fixed);
488 /* Constructs double_int from rtx CST. */
491 rtx_to_double_int (const_rtx cst)
495 if (CONST_INT_P (cst))
496 r = shwi_to_double_int (INTVAL (cst));
497 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
499 r.low = CONST_DOUBLE_LOW (cst);
500 r.high = CONST_DOUBLE_HIGH (cst);
509 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
513 immed_double_int_const (double_int i, enum machine_mode mode)
515 return immed_double_const (i.low, i.high, mode);
518 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
519 of ints: I0 is the low-order word and I1 is the high-order word.
520 Do not use this routine for non-integer modes; convert to
521 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
524 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
529 /* There are the following cases (note that there are no modes with
530 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
532 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
534 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
535 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
536 from copies of the sign bit, and sign of i0 and i1 are the same), then
537 we return a CONST_INT for i0.
538 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
539 if (mode != VOIDmode)
541 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
542 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
543 /* We can get a 0 for an error mark. */
544 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
545 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
547 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
548 return gen_int_mode (i0, mode);
550 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
553 /* If this integer fits in one word, return a CONST_INT. */
554 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
557 /* We use VOIDmode for integers. */
558 value = rtx_alloc (CONST_DOUBLE);
559 PUT_MODE (value, VOIDmode);
561 CONST_DOUBLE_LOW (value) = i0;
562 CONST_DOUBLE_HIGH (value) = i1;
564 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
565 XWINT (value, i) = 0;
567 return lookup_const_double (value);
571 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
573 /* In case the MD file explicitly references the frame pointer, have
574 all such references point to the same frame pointer. This is
575 used during frame pointer elimination to distinguish the explicit
576 references to these registers from pseudos that happened to be
579 If we have eliminated the frame pointer or arg pointer, we will
580 be using it as a normal register, for example as a spill
581 register. In such cases, we might be accessing it in a mode that
582 is not Pmode and therefore cannot use the pre-allocated rtx.
584 Also don't do this when we are making new REGs in reload, since
585 we don't want to get confused with the real pointers. */
587 if (mode == Pmode && !reload_in_progress)
589 if (regno == FRAME_POINTER_REGNUM
590 && (!reload_completed || frame_pointer_needed))
591 return frame_pointer_rtx;
592 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
593 if (regno == HARD_FRAME_POINTER_REGNUM
594 && (!reload_completed || frame_pointer_needed))
595 return hard_frame_pointer_rtx;
597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
598 if (regno == ARG_POINTER_REGNUM)
599 return arg_pointer_rtx;
601 #ifdef RETURN_ADDRESS_POINTER_REGNUM
602 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
603 return return_address_pointer_rtx;
605 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
606 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
607 return pic_offset_table_rtx;
608 if (regno == STACK_POINTER_REGNUM)
609 return stack_pointer_rtx;
613 /* If the per-function register table has been set up, try to re-use
614 an existing entry in that table to avoid useless generation of RTL.
616 This code is disabled for now until we can fix the various backends
617 which depend on having non-shared hard registers in some cases. Long
618 term we want to re-enable this code as it can significantly cut down
619 on the amount of useless RTL that gets generated.
621 We'll also need to fix some code that runs after reload that wants to
622 set ORIGINAL_REGNO. */
627 && regno < FIRST_PSEUDO_REGISTER
628 && reg_raw_mode[regno] == mode)
629 return regno_reg_rtx[regno];
632 return gen_raw_REG (mode, regno);
636 gen_rtx_MEM (enum machine_mode mode, rtx addr)
638 rtx rt = gen_rtx_raw_MEM (mode, addr);
640 /* This field is not cleared by the mere allocation of the rtx, so
647 /* Generate a memory referring to non-trapping constant memory. */
650 gen_const_mem (enum machine_mode mode, rtx addr)
652 rtx mem = gen_rtx_MEM (mode, addr);
653 MEM_READONLY_P (mem) = 1;
654 MEM_NOTRAP_P (mem) = 1;
658 /* Generate a MEM referring to fixed portions of the frame, e.g., register
662 gen_frame_mem (enum machine_mode mode, rtx addr)
664 rtx mem = gen_rtx_MEM (mode, addr);
665 MEM_NOTRAP_P (mem) = 1;
666 set_mem_alias_set (mem, get_frame_alias_set ());
670 /* Generate a MEM referring to a temporary use of the stack, not part
671 of the fixed stack frame. For example, something which is pushed
672 by a target splitter. */
674 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
676 rtx mem = gen_rtx_MEM (mode, addr);
677 MEM_NOTRAP_P (mem) = 1;
678 if (!cfun->calls_alloca)
679 set_mem_alias_set (mem, get_frame_alias_set ());
683 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
684 this construct would be valid, and false otherwise. */
687 validate_subreg (enum machine_mode omode, enum machine_mode imode,
688 const_rtx reg, unsigned int offset)
690 unsigned int isize = GET_MODE_SIZE (imode);
691 unsigned int osize = GET_MODE_SIZE (omode);
693 /* All subregs must be aligned. */
694 if (offset % osize != 0)
697 /* The subreg offset cannot be outside the inner object. */
701 /* ??? This should not be here. Temporarily continue to allow word_mode
702 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
703 Generally, backends are doing something sketchy but it'll take time to
705 if (omode == word_mode)
707 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
708 is the culprit here, and not the backends. */
709 else if (osize >= UNITS_PER_WORD && isize >= osize)
711 /* Allow component subregs of complex and vector. Though given the below
712 extraction rules, it's not always clear what that means. */
713 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
714 && GET_MODE_INNER (imode) == omode)
716 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
717 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
718 represent this. It's questionable if this ought to be represented at
719 all -- why can't this all be hidden in post-reload splitters that make
720 arbitrarily mode changes to the registers themselves. */
721 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
723 /* Subregs involving floating point modes are not allowed to
724 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
725 (subreg:SI (reg:DF) 0) isn't. */
726 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
732 /* Paradoxical subregs must have offset zero. */
736 /* This is a normal subreg. Verify that the offset is representable. */
738 /* For hard registers, we already have most of these rules collected in
739 subreg_offset_representable_p. */
740 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
742 unsigned int regno = REGNO (reg);
744 #ifdef CANNOT_CHANGE_MODE_CLASS
745 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
746 && GET_MODE_INNER (imode) == omode)
748 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
752 return subreg_offset_representable_p (regno, imode, offset, omode);
755 /* For pseudo registers, we want most of the same checks. Namely:
756 If the register no larger than a word, the subreg must be lowpart.
757 If the register is larger than a word, the subreg must be the lowpart
758 of a subword. A subreg does *not* perform arbitrary bit extraction.
759 Given that we've already checked mode/offset alignment, we only have
760 to check subword subregs here. */
761 if (osize < UNITS_PER_WORD)
763 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
764 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
765 if (offset % UNITS_PER_WORD != low_off)
772 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
774 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
775 return gen_rtx_raw_SUBREG (mode, reg, offset);
778 /* Generate a SUBREG representing the least-significant part of REG if MODE
779 is smaller than mode of REG, otherwise paradoxical SUBREG. */
782 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
784 enum machine_mode inmode;
786 inmode = GET_MODE (reg);
787 if (inmode == VOIDmode)
789 return gen_rtx_SUBREG (mode, reg,
790 subreg_lowpart_offset (mode, inmode));
794 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
797 gen_rtvec (int n, ...)
805 /* Don't allocate an empty rtvec... */
809 rt_val = rtvec_alloc (n);
811 for (i = 0; i < n; i++)
812 rt_val->elem[i] = va_arg (p, rtx);
819 gen_rtvec_v (int n, rtx *argp)
824 /* Don't allocate an empty rtvec... */
828 rt_val = rtvec_alloc (n);
830 for (i = 0; i < n; i++)
831 rt_val->elem[i] = *argp++;
836 /* Return the number of bytes between the start of an OUTER_MODE
837 in-memory value and the start of an INNER_MODE in-memory value,
838 given that the former is a lowpart of the latter. It may be a
839 paradoxical lowpart, in which case the offset will be negative
840 on big-endian targets. */
843 byte_lowpart_offset (enum machine_mode outer_mode,
844 enum machine_mode inner_mode)
846 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
847 return subreg_lowpart_offset (outer_mode, inner_mode);
849 return -subreg_lowpart_offset (inner_mode, outer_mode);
852 /* Generate a REG rtx for a new pseudo register of mode MODE.
853 This pseudo is assigned the next sequential register number. */
856 gen_reg_rtx (enum machine_mode mode)
859 unsigned int align = GET_MODE_ALIGNMENT (mode);
861 gcc_assert (can_create_pseudo_p ());
863 /* If a virtual register with bigger mode alignment is generated,
864 increase stack alignment estimation because it might be spilled
866 if (SUPPORTS_STACK_ALIGNMENT
867 && crtl->stack_alignment_estimated < align
868 && !crtl->stack_realign_processed)
870 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
871 if (crtl->stack_alignment_estimated < min_align)
872 crtl->stack_alignment_estimated = min_align;
875 if (generating_concat_p
876 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
877 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
879 /* For complex modes, don't make a single pseudo.
880 Instead, make a CONCAT of two pseudos.
881 This allows noncontiguous allocation of the real and imaginary parts,
882 which makes much better code. Besides, allocating DCmode
883 pseudos overstrains reload on some machines like the 386. */
884 rtx realpart, imagpart;
885 enum machine_mode partmode = GET_MODE_INNER (mode);
887 realpart = gen_reg_rtx (partmode);
888 imagpart = gen_reg_rtx (partmode);
889 return gen_rtx_CONCAT (mode, realpart, imagpart);
892 /* Make sure regno_pointer_align, and regno_reg_rtx are large
893 enough to have an element for this pseudo reg number. */
895 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
897 int old_size = crtl->emit.regno_pointer_align_length;
901 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
902 memset (tmp + old_size, 0, old_size);
903 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
905 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
906 memset (new1 + old_size, 0, old_size * sizeof (rtx));
907 regno_reg_rtx = new1;
909 crtl->emit.regno_pointer_align_length = old_size * 2;
912 val = gen_raw_REG (mode, reg_rtx_no);
913 regno_reg_rtx[reg_rtx_no++] = val;
917 /* Update NEW with the same attributes as REG, but with OFFSET added
918 to the REG_OFFSET. */
921 update_reg_offset (rtx new_rtx, rtx reg, int offset)
923 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
924 REG_OFFSET (reg) + offset);
927 /* Generate a register with same attributes as REG, but with OFFSET
928 added to the REG_OFFSET. */
931 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
934 rtx new_rtx = gen_rtx_REG (mode, regno);
936 update_reg_offset (new_rtx, reg, offset);
940 /* Generate a new pseudo-register with the same attributes as REG, but
941 with OFFSET added to the REG_OFFSET. */
944 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
946 rtx new_rtx = gen_reg_rtx (mode);
948 update_reg_offset (new_rtx, reg, offset);
952 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
953 new register is a (possibly paradoxical) lowpart of the old one. */
956 adjust_reg_mode (rtx reg, enum machine_mode mode)
958 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
959 PUT_MODE (reg, mode);
962 /* Copy REG's attributes from X, if X has any attributes. If REG and X
963 have different modes, REG is a (possibly paradoxical) lowpart of X. */
966 set_reg_attrs_from_value (rtx reg, rtx x)
970 /* Hard registers can be reused for multiple purposes within the same
971 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
973 if (HARD_REGISTER_P (reg))
976 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
979 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
981 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
983 mark_reg_pointer (reg, 0);
988 update_reg_offset (reg, x, offset);
990 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
994 /* Generate a REG rtx for a new pseudo register, copying the mode
995 and attributes from X. */
998 gen_reg_rtx_and_attrs (rtx x)
1000 rtx reg = gen_reg_rtx (GET_MODE (x));
1001 set_reg_attrs_from_value (reg, x);
1005 /* Set the register attributes for registers contained in PARM_RTX.
1006 Use needed values from memory attributes of MEM. */
1009 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1011 if (REG_P (parm_rtx))
1012 set_reg_attrs_from_value (parm_rtx, mem);
1013 else if (GET_CODE (parm_rtx) == PARALLEL)
1015 /* Check for a NULL entry in the first slot, used to indicate that the
1016 parameter goes both on the stack and in registers. */
1017 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1018 for (; i < XVECLEN (parm_rtx, 0); i++)
1020 rtx x = XVECEXP (parm_rtx, 0, i);
1021 if (REG_P (XEXP (x, 0)))
1022 REG_ATTRS (XEXP (x, 0))
1023 = get_reg_attrs (MEM_EXPR (mem),
1024 INTVAL (XEXP (x, 1)));
1029 /* Set the REG_ATTRS for registers in value X, given that X represents
1033 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1035 if (GET_CODE (x) == SUBREG)
1037 gcc_assert (subreg_lowpart_p (x));
1042 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1044 if (GET_CODE (x) == CONCAT)
1046 if (REG_P (XEXP (x, 0)))
1047 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1048 if (REG_P (XEXP (x, 1)))
1049 REG_ATTRS (XEXP (x, 1))
1050 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1052 if (GET_CODE (x) == PARALLEL)
1056 /* Check for a NULL entry, used to indicate that the parameter goes
1057 both on the stack and in registers. */
1058 if (XEXP (XVECEXP (x, 0, 0), 0))
1063 for (i = start; i < XVECLEN (x, 0); i++)
1065 rtx y = XVECEXP (x, 0, i);
1066 if (REG_P (XEXP (y, 0)))
1067 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1072 /* Assign the RTX X to declaration T. */
1075 set_decl_rtl (tree t, rtx x)
1077 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1079 set_reg_attrs_for_decl_rtl (t, x);
1082 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1083 if the ABI requires the parameter to be passed by reference. */
1086 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1088 DECL_INCOMING_RTL (t) = x;
1089 if (x && !by_reference_p)
1090 set_reg_attrs_for_decl_rtl (t, x);
1093 /* Identify REG (which may be a CONCAT) as a user register. */
1096 mark_user_reg (rtx reg)
1098 if (GET_CODE (reg) == CONCAT)
1100 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1101 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1105 gcc_assert (REG_P (reg));
1106 REG_USERVAR_P (reg) = 1;
1110 /* Identify REG as a probable pointer register and show its alignment
1111 as ALIGN, if nonzero. */
1114 mark_reg_pointer (rtx reg, int align)
1116 if (! REG_POINTER (reg))
1118 REG_POINTER (reg) = 1;
1121 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1123 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1124 /* We can no-longer be sure just how aligned this pointer is. */
1125 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1128 /* Return 1 plus largest pseudo reg number used in the current function. */
1136 /* Return 1 + the largest label number used so far in the current function. */
1139 max_label_num (void)
1144 /* Return first label number used in this function (if any were used). */
1147 get_first_label_num (void)
1149 return first_label_num;
1152 /* If the rtx for label was created during the expansion of a nested
1153 function, then first_label_num won't include this label number.
1154 Fix this now so that array indices work later. */
1157 maybe_set_first_label_num (rtx x)
1159 if (CODE_LABEL_NUMBER (x) < first_label_num)
1160 first_label_num = CODE_LABEL_NUMBER (x);
1163 /* Return a value representing some low-order bits of X, where the number
1164 of low-order bits is given by MODE. Note that no conversion is done
1165 between floating-point and fixed-point values, rather, the bit
1166 representation is returned.
1168 This function handles the cases in common between gen_lowpart, below,
1169 and two variants in cse.c and combine.c. These are the cases that can
1170 be safely handled at all points in the compilation.
1172 If this is not a case we can handle, return 0. */
1175 gen_lowpart_common (enum machine_mode mode, rtx x)
1177 int msize = GET_MODE_SIZE (mode);
1180 enum machine_mode innermode;
1182 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1183 so we have to make one up. Yuk. */
1184 innermode = GET_MODE (x);
1186 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1187 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1188 else if (innermode == VOIDmode)
1189 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1191 xsize = GET_MODE_SIZE (innermode);
1193 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1195 if (innermode == mode)
1198 /* MODE must occupy no more words than the mode of X. */
1199 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1200 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1203 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1204 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1207 offset = subreg_lowpart_offset (mode, innermode);
1209 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1210 && (GET_MODE_CLASS (mode) == MODE_INT
1211 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1213 /* If we are getting the low-order part of something that has been
1214 sign- or zero-extended, we can either just use the object being
1215 extended or make a narrower extension. If we want an even smaller
1216 piece than the size of the object being extended, call ourselves
1219 This case is used mostly by combine and cse. */
1221 if (GET_MODE (XEXP (x, 0)) == mode)
1223 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1224 return gen_lowpart_common (mode, XEXP (x, 0));
1225 else if (msize < xsize)
1226 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1228 else if (GET_CODE (x) == SUBREG || REG_P (x)
1229 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1230 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1231 return simplify_gen_subreg (mode, x, innermode, offset);
1233 /* Otherwise, we can't do this. */
1238 gen_highpart (enum machine_mode mode, rtx x)
1240 unsigned int msize = GET_MODE_SIZE (mode);
1243 /* This case loses if X is a subreg. To catch bugs early,
1244 complain if an invalid MODE is used even in other cases. */
1245 gcc_assert (msize <= UNITS_PER_WORD
1246 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1248 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1249 subreg_highpart_offset (mode, GET_MODE (x)));
1250 gcc_assert (result);
1252 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1253 the target if we have a MEM. gen_highpart must return a valid operand,
1254 emitting code if necessary to do so. */
1257 result = validize_mem (result);
1258 gcc_assert (result);
1264 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1265 be VOIDmode constant. */
1267 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1269 if (GET_MODE (exp) != VOIDmode)
1271 gcc_assert (GET_MODE (exp) == innermode);
1272 return gen_highpart (outermode, exp);
1274 return simplify_gen_subreg (outermode, exp, innermode,
1275 subreg_highpart_offset (outermode, innermode));
1278 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1281 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1283 unsigned int offset = 0;
1284 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1288 if (WORDS_BIG_ENDIAN)
1289 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1290 if (BYTES_BIG_ENDIAN)
1291 offset += difference % UNITS_PER_WORD;
1297 /* Return offset in bytes to get OUTERMODE high part
1298 of the value in mode INNERMODE stored in memory in target format. */
1300 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1302 unsigned int offset = 0;
1303 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1305 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1309 if (! WORDS_BIG_ENDIAN)
1310 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1311 if (! BYTES_BIG_ENDIAN)
1312 offset += difference % UNITS_PER_WORD;
1318 /* Return 1 iff X, assumed to be a SUBREG,
1319 refers to the least significant part of its containing reg.
1320 If X is not a SUBREG, always return 1 (it is its own low part!). */
1323 subreg_lowpart_p (const_rtx x)
1325 if (GET_CODE (x) != SUBREG)
1327 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1330 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1331 == SUBREG_BYTE (x));
1334 /* Return subword OFFSET of operand OP.
1335 The word number, OFFSET, is interpreted as the word number starting
1336 at the low-order address. OFFSET 0 is the low-order word if not
1337 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1339 If we cannot extract the required word, we return zero. Otherwise,
1340 an rtx corresponding to the requested word will be returned.
1342 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1343 reload has completed, a valid address will always be returned. After
1344 reload, if a valid address cannot be returned, we return zero.
1346 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1347 it is the responsibility of the caller.
1349 MODE is the mode of OP in case it is a CONST_INT.
1351 ??? This is still rather broken for some cases. The problem for the
1352 moment is that all callers of this thing provide no 'goal mode' to
1353 tell us to work with. This exists because all callers were written
1354 in a word based SUBREG world.
1355 Now use of this function can be deprecated by simplify_subreg in most
1360 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1362 if (mode == VOIDmode)
1363 mode = GET_MODE (op);
1365 gcc_assert (mode != VOIDmode);
1367 /* If OP is narrower than a word, fail. */
1369 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1372 /* If we want a word outside OP, return zero. */
1374 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1377 /* Form a new MEM at the requested address. */
1380 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1382 if (! validate_address)
1385 else if (reload_completed)
1387 if (! strict_memory_address_addr_space_p (word_mode,
1389 MEM_ADDR_SPACE (op)))
1393 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1396 /* Rest can be handled by simplify_subreg. */
1397 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1400 /* Similar to `operand_subword', but never return 0. If we can't
1401 extract the required subword, put OP into a register and try again.
1402 The second attempt must succeed. We always validate the address in
1405 MODE is the mode of OP, in case it is CONST_INT. */
1408 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1410 rtx result = operand_subword (op, offset, 1, mode);
1415 if (mode != BLKmode && mode != VOIDmode)
1417 /* If this is a register which can not be accessed by words, copy it
1418 to a pseudo register. */
1420 op = copy_to_reg (op);
1422 op = force_reg (mode, op);
1425 result = operand_subword (op, offset, 1, mode);
1426 gcc_assert (result);
1431 /* Returns 1 if both MEM_EXPR can be considered equal
1435 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1440 if (! expr1 || ! expr2)
1443 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1446 return operand_equal_p (expr1, expr2, 0);
1449 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1450 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1454 get_mem_align_offset (rtx mem, unsigned int align)
1457 unsigned HOST_WIDE_INT offset;
1459 /* This function can't use
1460 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1461 || !CONST_INT_P (MEM_OFFSET (mem))
1462 || (MAX (MEM_ALIGN (mem),
1463 get_object_alignment (MEM_EXPR (mem), align))
1467 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1469 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1470 for <variable>. get_inner_reference doesn't handle it and
1471 even if it did, the alignment in that case needs to be determined
1472 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1473 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1474 isn't sufficiently aligned, the object it is in might be. */
1475 gcc_assert (MEM_P (mem));
1476 expr = MEM_EXPR (mem);
1477 if (expr == NULL_TREE
1478 || MEM_OFFSET (mem) == NULL_RTX
1479 || !CONST_INT_P (MEM_OFFSET (mem)))
1482 offset = INTVAL (MEM_OFFSET (mem));
1485 if (DECL_ALIGN (expr) < align)
1488 else if (INDIRECT_REF_P (expr))
1490 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1493 else if (TREE_CODE (expr) == COMPONENT_REF)
1497 tree inner = TREE_OPERAND (expr, 0);
1498 tree field = TREE_OPERAND (expr, 1);
1499 tree byte_offset = component_ref_field_offset (expr);
1500 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1503 || !host_integerp (byte_offset, 1)
1504 || !host_integerp (bit_offset, 1))
1507 offset += tree_low_cst (byte_offset, 1);
1508 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1510 if (inner == NULL_TREE)
1512 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1513 < (unsigned int) align)
1517 else if (DECL_P (inner))
1519 if (DECL_ALIGN (inner) < align)
1523 else if (TREE_CODE (inner) != COMPONENT_REF)
1531 return offset & ((align / BITS_PER_UNIT) - 1);
1534 /* Given REF (a MEM) and T, either the type of X or the expression
1535 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1536 if we are making a new object of this type. BITPOS is nonzero if
1537 there is an offset outstanding on T that will be applied later. */
1540 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1541 HOST_WIDE_INT bitpos)
1543 alias_set_type alias = MEM_ALIAS_SET (ref);
1544 tree expr = MEM_EXPR (ref);
1545 rtx offset = MEM_OFFSET (ref);
1546 rtx size = MEM_SIZE (ref);
1547 unsigned int align = MEM_ALIGN (ref);
1548 HOST_WIDE_INT apply_bitpos = 0;
1551 /* It can happen that type_for_mode was given a mode for which there
1552 is no language-level type. In which case it returns NULL, which
1557 type = TYPE_P (t) ? t : TREE_TYPE (t);
1558 if (type == error_mark_node)
1561 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1562 wrong answer, as it assumes that DECL_RTL already has the right alias
1563 info. Callers should not set DECL_RTL until after the call to
1564 set_mem_attributes. */
1565 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1567 /* Get the alias set from the expression or type (perhaps using a
1568 front-end routine) and use it. */
1569 alias = get_alias_set (t);
1571 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1572 MEM_IN_STRUCT_P (ref)
1573 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1574 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1576 /* If we are making an object of this type, or if this is a DECL, we know
1577 that it is a scalar if the type is not an aggregate. */
1578 if ((objectp || DECL_P (t))
1579 && ! AGGREGATE_TYPE_P (type)
1580 && TREE_CODE (type) != COMPLEX_TYPE)
1581 MEM_SCALAR_P (ref) = 1;
1583 /* We can set the alignment from the type if we are making an object,
1584 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1585 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1586 align = MAX (align, TYPE_ALIGN (type));
1588 else if (TREE_CODE (t) == MEM_REF)
1590 tree op0 = TREE_OPERAND (t, 0);
1591 if (TREE_CODE (op0) == ADDR_EXPR
1592 && (DECL_P (TREE_OPERAND (op0, 0))
1593 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1595 if (DECL_P (TREE_OPERAND (op0, 0)))
1596 align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1597 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1599 align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1600 #ifdef CONSTANT_ALIGNMENT
1601 align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0), align);
1604 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1606 unsigned HOST_WIDE_INT ioff
1607 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1608 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1609 align = MIN (aoff, align);
1613 /* ??? This isn't fully correct, we can't set the alignment from the
1614 type in all cases. */
1615 align = MAX (align, TYPE_ALIGN (type));
1618 else if (TREE_CODE (t) == TARGET_MEM_REF)
1619 /* ??? This isn't fully correct, we can't set the alignment from the
1620 type in all cases. */
1621 align = MAX (align, TYPE_ALIGN (type));
1623 /* If the size is known, we can set that. */
1624 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1625 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1627 /* If T is not a type, we may be able to deduce some more information about
1632 bool align_computed = false;
1634 if (TREE_THIS_VOLATILE (t))
1635 MEM_VOLATILE_P (ref) = 1;
1637 /* Now remove any conversions: they don't change what the underlying
1638 object is. Likewise for SAVE_EXPR. */
1639 while (CONVERT_EXPR_P (t)
1640 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1641 || TREE_CODE (t) == SAVE_EXPR)
1642 t = TREE_OPERAND (t, 0);
1644 /* We may look through structure-like accesses for the purposes of
1645 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1647 while (TREE_CODE (base) == COMPONENT_REF
1648 || TREE_CODE (base) == REALPART_EXPR
1649 || TREE_CODE (base) == IMAGPART_EXPR
1650 || TREE_CODE (base) == BIT_FIELD_REF)
1651 base = TREE_OPERAND (base, 0);
1653 if (TREE_CODE (base) == MEM_REF
1654 && TREE_CODE (TREE_OPERAND (base, 0)) == ADDR_EXPR)
1655 base = TREE_OPERAND (TREE_OPERAND (base, 0), 0);
1658 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1659 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1661 MEM_NOTRAP_P (ref) = 1;
1663 else if (TREE_CODE (base) == INDIRECT_REF
1664 || TREE_CODE (base) == MEM_REF
1665 || TREE_CODE (base) == TARGET_MEM_REF
1666 || TREE_CODE (base) == ARRAY_REF
1667 || TREE_CODE (base) == ARRAY_RANGE_REF)
1668 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1670 base = get_base_address (base);
1671 if (base && DECL_P (base)
1672 && TREE_READONLY (base)
1673 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1674 MEM_READONLY_P (ref) = 1;
1676 /* If this expression uses it's parent's alias set, mark it such
1677 that we won't change it. */
1678 if (component_uses_parent_alias_set (t))
1679 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1681 /* If this is a decl, set the attributes of the MEM from it. */
1685 offset = const0_rtx;
1686 apply_bitpos = bitpos;
1687 size = (DECL_SIZE_UNIT (t)
1688 && host_integerp (DECL_SIZE_UNIT (t), 1)
1689 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1690 align = DECL_ALIGN (t);
1691 align_computed = true;
1694 /* If this is a constant, we know the alignment. */
1695 else if (CONSTANT_CLASS_P (t))
1697 align = TYPE_ALIGN (type);
1698 #ifdef CONSTANT_ALIGNMENT
1699 align = CONSTANT_ALIGNMENT (t, align);
1701 align_computed = true;
1704 /* If this is a field reference and not a bit-field, record it. */
1705 /* ??? There is some information that can be gleaned from bit-fields,
1706 such as the word offset in the structure that might be modified.
1707 But skip it for now. */
1708 else if (TREE_CODE (t) == COMPONENT_REF
1709 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1712 offset = const0_rtx;
1713 apply_bitpos = bitpos;
1714 /* ??? Any reason the field size would be different than
1715 the size we got from the type? */
1718 /* If this is an array reference, look for an outer field reference. */
1719 else if (TREE_CODE (t) == ARRAY_REF)
1721 tree off_tree = size_zero_node;
1722 /* We can't modify t, because we use it at the end of the
1728 tree index = TREE_OPERAND (t2, 1);
1729 tree low_bound = array_ref_low_bound (t2);
1730 tree unit_size = array_ref_element_size (t2);
1732 /* We assume all arrays have sizes that are a multiple of a byte.
1733 First subtract the lower bound, if any, in the type of the
1734 index, then convert to sizetype and multiply by the size of
1735 the array element. */
1736 if (! integer_zerop (low_bound))
1737 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1740 off_tree = size_binop (PLUS_EXPR,
1741 size_binop (MULT_EXPR,
1742 fold_convert (sizetype,
1746 t2 = TREE_OPERAND (t2, 0);
1748 while (TREE_CODE (t2) == ARRAY_REF);
1754 if (host_integerp (off_tree, 1))
1756 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1757 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1758 align = DECL_ALIGN (t2);
1759 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1761 align_computed = true;
1762 offset = GEN_INT (ioff);
1763 apply_bitpos = bitpos;
1766 else if (TREE_CODE (t2) == COMPONENT_REF)
1770 if (host_integerp (off_tree, 1))
1772 offset = GEN_INT (tree_low_cst (off_tree, 1));
1773 apply_bitpos = bitpos;
1775 /* ??? Any reason the field size would be different than
1776 the size we got from the type? */
1779 /* If this is an indirect reference, record it. */
1780 else if (TREE_CODE (t) == MEM_REF)
1783 offset = const0_rtx;
1784 apply_bitpos = bitpos;
1788 /* If this is an indirect reference, record it. */
1789 else if (TREE_CODE (t) == MEM_REF
1790 || TREE_CODE (t) == TARGET_MEM_REF)
1793 offset = const0_rtx;
1794 apply_bitpos = bitpos;
1797 if (!align_computed && !INDIRECT_REF_P (t))
1799 unsigned int obj_align = get_object_alignment (t, BIGGEST_ALIGNMENT);
1800 align = MAX (align, obj_align);
1804 /* If we modified OFFSET based on T, then subtract the outstanding
1805 bit position offset. Similarly, increase the size of the accessed
1806 object to contain the negative offset. */
1809 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1811 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1814 /* Now set the attributes we computed above. */
1816 = get_mem_attrs (alias, expr, offset, size, align,
1817 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1819 /* If this is already known to be a scalar or aggregate, we are done. */
1820 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1823 /* If it is a reference into an aggregate, this is part of an aggregate.
1824 Otherwise we don't know. */
1825 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1826 || TREE_CODE (t) == ARRAY_RANGE_REF
1827 || TREE_CODE (t) == BIT_FIELD_REF)
1828 MEM_IN_STRUCT_P (ref) = 1;
1832 set_mem_attributes (rtx ref, tree t, int objectp)
1834 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1837 /* Set the alias set of MEM to SET. */
1840 set_mem_alias_set (rtx mem, alias_set_type set)
1842 /* If the new and old alias sets don't conflict, something is wrong. */
1843 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1845 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1846 MEM_SIZE (mem), MEM_ALIGN (mem),
1847 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1850 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1853 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1855 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1856 MEM_OFFSET (mem), MEM_SIZE (mem),
1857 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1860 /* Set the alignment of MEM to ALIGN bits. */
1863 set_mem_align (rtx mem, unsigned int align)
1865 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1866 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1867 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1870 /* Set the expr for MEM to EXPR. */
1873 set_mem_expr (rtx mem, tree expr)
1876 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1877 MEM_SIZE (mem), MEM_ALIGN (mem),
1878 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1881 /* Set the offset of MEM to OFFSET. */
1884 set_mem_offset (rtx mem, rtx offset)
1886 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1887 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1888 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1891 /* Set the size of MEM to SIZE. */
1894 set_mem_size (rtx mem, rtx size)
1896 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1897 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1898 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1901 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1902 and its address changed to ADDR. (VOIDmode means don't change the mode.
1903 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1904 returned memory location is required to be valid. The memory
1905 attributes are not changed. */
1908 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1913 gcc_assert (MEM_P (memref));
1914 as = MEM_ADDR_SPACE (memref);
1915 if (mode == VOIDmode)
1916 mode = GET_MODE (memref);
1918 addr = XEXP (memref, 0);
1919 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1920 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1925 if (reload_in_progress || reload_completed)
1926 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1928 addr = memory_address_addr_space (mode, addr, as);
1931 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1934 new_rtx = gen_rtx_MEM (mode, addr);
1935 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1939 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1940 way we are changing MEMREF, so we only preserve the alias set. */
1943 change_address (rtx memref, enum machine_mode mode, rtx addr)
1945 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1946 enum machine_mode mmode = GET_MODE (new_rtx);
1949 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1950 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1952 /* If there are no changes, just return the original memory reference. */
1953 if (new_rtx == memref)
1955 if (MEM_ATTRS (memref) == 0
1956 || (MEM_EXPR (memref) == NULL
1957 && MEM_OFFSET (memref) == NULL
1958 && MEM_SIZE (memref) == size
1959 && MEM_ALIGN (memref) == align))
1962 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1963 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1967 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1968 MEM_ADDR_SPACE (memref), mmode);
1973 /* Return a memory reference like MEMREF, but with its mode changed
1974 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1975 nonzero, the memory address is forced to be valid.
1976 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1977 and caller is responsible for adjusting MEMREF base register. */
1980 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1981 int validate, int adjust)
1983 rtx addr = XEXP (memref, 0);
1985 rtx memoffset = MEM_OFFSET (memref);
1987 unsigned int memalign = MEM_ALIGN (memref);
1988 addr_space_t as = MEM_ADDR_SPACE (memref);
1989 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
1992 /* If there are no changes, just return the original memory reference. */
1993 if (mode == GET_MODE (memref) && !offset
1994 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1997 /* ??? Prefer to create garbage instead of creating shared rtl.
1998 This may happen even if offset is nonzero -- consider
1999 (plus (plus reg reg) const_int) -- so do this always. */
2000 addr = copy_rtx (addr);
2002 /* Convert a possibly large offset to a signed value within the
2003 range of the target address space. */
2004 pbits = GET_MODE_BITSIZE (address_mode);
2005 if (HOST_BITS_PER_WIDE_INT > pbits)
2007 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2008 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2014 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2015 object, we can merge it into the LO_SUM. */
2016 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2018 && (unsigned HOST_WIDE_INT) offset
2019 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2020 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2021 plus_constant (XEXP (addr, 1), offset));
2023 addr = plus_constant (addr, offset);
2026 new_rtx = change_address_1 (memref, mode, addr, validate);
2028 /* If the address is a REG, change_address_1 rightfully returns memref,
2029 but this would destroy memref's MEM_ATTRS. */
2030 if (new_rtx == memref && offset != 0)
2031 new_rtx = copy_rtx (new_rtx);
2033 /* Compute the new values of the memory attributes due to this adjustment.
2034 We add the offsets and update the alignment. */
2036 memoffset = GEN_INT (offset + INTVAL (memoffset));
2038 /* Compute the new alignment by taking the MIN of the alignment and the
2039 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2044 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2046 /* We can compute the size in a number of ways. */
2047 if (GET_MODE (new_rtx) != BLKmode)
2048 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2049 else if (MEM_SIZE (memref))
2050 size = plus_constant (MEM_SIZE (memref), -offset);
2052 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2053 memoffset, size, memalign, as,
2054 GET_MODE (new_rtx));
2056 /* At some point, we should validate that this offset is within the object,
2057 if all the appropriate values are known. */
2061 /* Return a memory reference like MEMREF, but with its mode changed
2062 to MODE and its address changed to ADDR, which is assumed to be
2063 MEMREF offset by OFFSET bytes. If VALIDATE is
2064 nonzero, the memory address is forced to be valid. */
2067 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2068 HOST_WIDE_INT offset, int validate)
2070 memref = change_address_1 (memref, VOIDmode, addr, validate);
2071 return adjust_address_1 (memref, mode, offset, validate, 0);
2074 /* Return a memory reference like MEMREF, but whose address is changed by
2075 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2076 known to be in OFFSET (possibly 1). */
2079 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2081 rtx new_rtx, addr = XEXP (memref, 0);
2082 addr_space_t as = MEM_ADDR_SPACE (memref);
2083 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2085 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2087 /* At this point we don't know _why_ the address is invalid. It
2088 could have secondary memory references, multiplies or anything.
2090 However, if we did go and rearrange things, we can wind up not
2091 being able to recognize the magic around pic_offset_table_rtx.
2092 This stuff is fragile, and is yet another example of why it is
2093 bad to expose PIC machinery too early. */
2094 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2095 && GET_CODE (addr) == PLUS
2096 && XEXP (addr, 0) == pic_offset_table_rtx)
2098 addr = force_reg (GET_MODE (addr), addr);
2099 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2102 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2103 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2105 /* If there are no changes, just return the original memory reference. */
2106 if (new_rtx == memref)
2109 /* Update the alignment to reflect the offset. Reset the offset, which
2112 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2113 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2114 as, GET_MODE (new_rtx));
2118 /* Return a memory reference like MEMREF, but with its address changed to
2119 ADDR. The caller is asserting that the actual piece of memory pointed
2120 to is the same, just the form of the address is being changed, such as
2121 by putting something into a register. */
2124 replace_equiv_address (rtx memref, rtx addr)
2126 /* change_address_1 copies the memory attribute structure without change
2127 and that's exactly what we want here. */
2128 update_temp_slot_address (XEXP (memref, 0), addr);
2129 return change_address_1 (memref, VOIDmode, addr, 1);
2132 /* Likewise, but the reference is not required to be valid. */
2135 replace_equiv_address_nv (rtx memref, rtx addr)
2137 return change_address_1 (memref, VOIDmode, addr, 0);
2140 /* Return a memory reference like MEMREF, but with its mode widened to
2141 MODE and offset by OFFSET. This would be used by targets that e.g.
2142 cannot issue QImode memory operations and have to use SImode memory
2143 operations plus masking logic. */
2146 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2148 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2149 tree expr = MEM_EXPR (new_rtx);
2150 rtx memoffset = MEM_OFFSET (new_rtx);
2151 unsigned int size = GET_MODE_SIZE (mode);
2153 /* If there are no changes, just return the original memory reference. */
2154 if (new_rtx == memref)
2157 /* If we don't know what offset we were at within the expression, then
2158 we can't know if we've overstepped the bounds. */
2164 if (TREE_CODE (expr) == COMPONENT_REF)
2166 tree field = TREE_OPERAND (expr, 1);
2167 tree offset = component_ref_field_offset (expr);
2169 if (! DECL_SIZE_UNIT (field))
2175 /* Is the field at least as large as the access? If so, ok,
2176 otherwise strip back to the containing structure. */
2177 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2178 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2179 && INTVAL (memoffset) >= 0)
2182 if (! host_integerp (offset, 1))
2188 expr = TREE_OPERAND (expr, 0);
2190 = (GEN_INT (INTVAL (memoffset)
2191 + tree_low_cst (offset, 1)
2192 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2195 /* Similarly for the decl. */
2196 else if (DECL_P (expr)
2197 && DECL_SIZE_UNIT (expr)
2198 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2199 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2200 && (! memoffset || INTVAL (memoffset) >= 0))
2204 /* The widened memory access overflows the expression, which means
2205 that it could alias another expression. Zap it. */
2212 memoffset = NULL_RTX;
2214 /* The widened memory may alias other stuff, so zap the alias set. */
2215 /* ??? Maybe use get_alias_set on any remaining expression. */
2217 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2218 MEM_ALIGN (new_rtx),
2219 MEM_ADDR_SPACE (new_rtx), mode);
2224 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2225 static GTY(()) tree spill_slot_decl;
2228 get_spill_slot_decl (bool force_build_p)
2230 tree d = spill_slot_decl;
2233 if (d || !force_build_p)
2236 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2237 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2238 DECL_ARTIFICIAL (d) = 1;
2239 DECL_IGNORED_P (d) = 1;
2241 spill_slot_decl = d;
2243 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2244 MEM_NOTRAP_P (rd) = 1;
2245 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2246 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2247 SET_DECL_RTL (d, rd);
2252 /* Given MEM, a result from assign_stack_local, fill in the memory
2253 attributes as appropriate for a register allocator spill slot.
2254 These slots are not aliasable by other memory. We arrange for
2255 them all to use a single MEM_EXPR, so that the aliasing code can
2256 work properly in the case of shared spill slots. */
2259 set_mem_attrs_for_spill (rtx mem)
2261 alias_set_type alias;
2265 expr = get_spill_slot_decl (true);
2266 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2268 /* We expect the incoming memory to be of the form:
2269 (mem:MODE (plus (reg sfp) (const_int offset)))
2270 with perhaps the plus missing for offset = 0. */
2271 addr = XEXP (mem, 0);
2272 offset = const0_rtx;
2273 if (GET_CODE (addr) == PLUS
2274 && CONST_INT_P (XEXP (addr, 1)))
2275 offset = XEXP (addr, 1);
2277 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2278 MEM_SIZE (mem), MEM_ALIGN (mem),
2279 ADDR_SPACE_GENERIC, GET_MODE (mem));
2280 MEM_NOTRAP_P (mem) = 1;
2283 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2286 gen_label_rtx (void)
2288 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2289 NULL, label_num++, NULL);
2292 /* For procedure integration. */
2294 /* Install new pointers to the first and last insns in the chain.
2295 Also, set cur_insn_uid to one higher than the last in use.
2296 Used for an inline-procedure after copying the insn chain. */
2299 set_new_first_and_last_insn (rtx first, rtx last)
2303 set_first_insn (first);
2304 set_last_insn (last);
2307 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2309 int debug_count = 0;
2311 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2312 cur_debug_insn_uid = 0;
2314 for (insn = first; insn; insn = NEXT_INSN (insn))
2315 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2316 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2319 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2320 if (DEBUG_INSN_P (insn))
2325 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2327 cur_debug_insn_uid++;
2330 for (insn = first; insn; insn = NEXT_INSN (insn))
2331 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2336 /* Go through all the RTL insn bodies and copy any invalid shared
2337 structure. This routine should only be called once. */
2340 unshare_all_rtl_1 (rtx insn)
2342 /* Unshare just about everything else. */
2343 unshare_all_rtl_in_chain (insn);
2345 /* Make sure the addresses of stack slots found outside the insn chain
2346 (such as, in DECL_RTL of a variable) are not shared
2347 with the insn chain.
2349 This special care is necessary when the stack slot MEM does not
2350 actually appear in the insn chain. If it does appear, its address
2351 is unshared from all else at that point. */
2352 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2355 /* Go through all the RTL insn bodies and copy any invalid shared
2356 structure, again. This is a fairly expensive thing to do so it
2357 should be done sparingly. */
2360 unshare_all_rtl_again (rtx insn)
2365 for (p = insn; p; p = NEXT_INSN (p))
2368 reset_used_flags (PATTERN (p));
2369 reset_used_flags (REG_NOTES (p));
2372 /* Make sure that virtual stack slots are not shared. */
2373 set_used_decls (DECL_INITIAL (cfun->decl));
2375 /* Make sure that virtual parameters are not shared. */
2376 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2377 set_used_flags (DECL_RTL (decl));
2379 reset_used_flags (stack_slot_list);
2381 unshare_all_rtl_1 (insn);
2385 unshare_all_rtl (void)
2387 unshare_all_rtl_1 (get_insns ());
2391 struct rtl_opt_pass pass_unshare_all_rtl =
2395 "unshare", /* name */
2397 unshare_all_rtl, /* execute */
2400 0, /* static_pass_number */
2401 TV_NONE, /* tv_id */
2402 0, /* properties_required */
2403 0, /* properties_provided */
2404 0, /* properties_destroyed */
2405 0, /* todo_flags_start */
2406 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2411 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2412 Recursively does the same for subexpressions. */
2415 verify_rtx_sharing (rtx orig, rtx insn)
2420 const char *format_ptr;
2425 code = GET_CODE (x);
2427 /* These types may be freely shared. */
2445 /* SCRATCH must be shared because they represent distinct values. */
2447 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2452 if (shared_const_p (orig))
2457 /* A MEM is allowed to be shared if its address is constant. */
2458 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2459 || reload_completed || reload_in_progress)
2468 /* This rtx may not be shared. If it has already been seen,
2469 replace it with a copy of itself. */
2470 #ifdef ENABLE_CHECKING
2471 if (RTX_FLAG (x, used))
2473 error ("invalid rtl sharing found in the insn");
2475 error ("shared rtx");
2477 internal_error ("internal consistency failure");
2480 gcc_assert (!RTX_FLAG (x, used));
2482 RTX_FLAG (x, used) = 1;
2484 /* Now scan the subexpressions recursively. */
2486 format_ptr = GET_RTX_FORMAT (code);
2488 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2490 switch (*format_ptr++)
2493 verify_rtx_sharing (XEXP (x, i), insn);
2497 if (XVEC (x, i) != NULL)
2500 int len = XVECLEN (x, i);
2502 for (j = 0; j < len; j++)
2504 /* We allow sharing of ASM_OPERANDS inside single
2506 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2507 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2509 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2511 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2520 /* Go through all the RTL insn bodies and check that there is no unexpected
2521 sharing in between the subexpressions. */
2524 verify_rtl_sharing (void)
2528 for (p = get_insns (); p; p = NEXT_INSN (p))
2531 reset_used_flags (PATTERN (p));
2532 reset_used_flags (REG_NOTES (p));
2533 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2536 rtx q, sequence = PATTERN (p);
2538 for (i = 0; i < XVECLEN (sequence, 0); i++)
2540 q = XVECEXP (sequence, 0, i);
2541 gcc_assert (INSN_P (q));
2542 reset_used_flags (PATTERN (q));
2543 reset_used_flags (REG_NOTES (q));
2548 for (p = get_insns (); p; p = NEXT_INSN (p))
2551 verify_rtx_sharing (PATTERN (p), p);
2552 verify_rtx_sharing (REG_NOTES (p), p);
2556 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2557 Assumes the mark bits are cleared at entry. */
2560 unshare_all_rtl_in_chain (rtx insn)
2562 for (; insn; insn = NEXT_INSN (insn))
2565 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2566 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2570 /* Go through all virtual stack slots of a function and mark them as
2571 shared. We never replace the DECL_RTLs themselves with a copy,
2572 but expressions mentioned into a DECL_RTL cannot be shared with
2573 expressions in the instruction stream.
2575 Note that reload may convert pseudo registers into memories in-place.
2576 Pseudo registers are always shared, but MEMs never are. Thus if we
2577 reset the used flags on MEMs in the instruction stream, we must set
2578 them again on MEMs that appear in DECL_RTLs. */
2581 set_used_decls (tree blk)
2586 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2587 if (DECL_RTL_SET_P (t))
2588 set_used_flags (DECL_RTL (t));
2590 /* Now process sub-blocks. */
2591 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2595 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2596 Recursively does the same for subexpressions. Uses
2597 copy_rtx_if_shared_1 to reduce stack space. */
2600 copy_rtx_if_shared (rtx orig)
2602 copy_rtx_if_shared_1 (&orig);
2606 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2607 use. Recursively does the same for subexpressions. */
2610 copy_rtx_if_shared_1 (rtx *orig1)
2616 const char *format_ptr;
2620 /* Repeat is used to turn tail-recursion into iteration. */
2627 code = GET_CODE (x);
2629 /* These types may be freely shared. */
2646 /* SCRATCH must be shared because they represent distinct values. */
2649 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2654 if (shared_const_p (x))
2664 /* The chain of insns is not being copied. */
2671 /* This rtx may not be shared. If it has already been seen,
2672 replace it with a copy of itself. */
2674 if (RTX_FLAG (x, used))
2676 x = shallow_copy_rtx (x);
2679 RTX_FLAG (x, used) = 1;
2681 /* Now scan the subexpressions recursively.
2682 We can store any replaced subexpressions directly into X
2683 since we know X is not shared! Any vectors in X
2684 must be copied if X was copied. */
2686 format_ptr = GET_RTX_FORMAT (code);
2687 length = GET_RTX_LENGTH (code);
2690 for (i = 0; i < length; i++)
2692 switch (*format_ptr++)
2696 copy_rtx_if_shared_1 (last_ptr);
2697 last_ptr = &XEXP (x, i);
2701 if (XVEC (x, i) != NULL)
2704 int len = XVECLEN (x, i);
2706 /* Copy the vector iff I copied the rtx and the length
2708 if (copied && len > 0)
2709 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2711 /* Call recursively on all inside the vector. */
2712 for (j = 0; j < len; j++)
2715 copy_rtx_if_shared_1 (last_ptr);
2716 last_ptr = &XVECEXP (x, i, j);
2731 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2732 to look for shared sub-parts. */
2735 reset_used_flags (rtx x)
2739 const char *format_ptr;
2742 /* Repeat is used to turn tail-recursion into iteration. */
2747 code = GET_CODE (x);
2749 /* These types may be freely shared so we needn't do any resetting
2774 /* The chain of insns is not being copied. */
2781 RTX_FLAG (x, used) = 0;
2783 format_ptr = GET_RTX_FORMAT (code);
2784 length = GET_RTX_LENGTH (code);
2786 for (i = 0; i < length; i++)
2788 switch (*format_ptr++)
2796 reset_used_flags (XEXP (x, i));
2800 for (j = 0; j < XVECLEN (x, i); j++)
2801 reset_used_flags (XVECEXP (x, i, j));
2807 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2808 to look for shared sub-parts. */
2811 set_used_flags (rtx x)
2815 const char *format_ptr;
2820 code = GET_CODE (x);
2822 /* These types may be freely shared so we needn't do any resetting
2847 /* The chain of insns is not being copied. */
2854 RTX_FLAG (x, used) = 1;
2856 format_ptr = GET_RTX_FORMAT (code);
2857 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2859 switch (*format_ptr++)
2862 set_used_flags (XEXP (x, i));
2866 for (j = 0; j < XVECLEN (x, i); j++)
2867 set_used_flags (XVECEXP (x, i, j));
2873 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2874 Return X or the rtx for the pseudo reg the value of X was copied into.
2875 OTHER must be valid as a SET_DEST. */
2878 make_safe_from (rtx x, rtx other)
2881 switch (GET_CODE (other))
2884 other = SUBREG_REG (other);
2886 case STRICT_LOW_PART:
2889 other = XEXP (other, 0);
2898 && GET_CODE (x) != SUBREG)
2900 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2901 || reg_mentioned_p (other, x))))
2903 rtx temp = gen_reg_rtx (GET_MODE (x));
2904 emit_move_insn (temp, x);
2910 /* Emission of insns (adding them to the doubly-linked list). */
2912 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2915 get_last_insn_anywhere (void)
2917 struct sequence_stack *stack;
2918 if (get_last_insn ())
2919 return get_last_insn ();
2920 for (stack = seq_stack; stack; stack = stack->next)
2921 if (stack->last != 0)
2926 /* Return the first nonnote insn emitted in current sequence or current
2927 function. This routine looks inside SEQUENCEs. */
2930 get_first_nonnote_insn (void)
2932 rtx insn = get_insns ();
2937 for (insn = next_insn (insn);
2938 insn && NOTE_P (insn);
2939 insn = next_insn (insn))
2943 if (NONJUMP_INSN_P (insn)
2944 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2945 insn = XVECEXP (PATTERN (insn), 0, 0);
2952 /* Return the last nonnote insn emitted in current sequence or current
2953 function. This routine looks inside SEQUENCEs. */
2956 get_last_nonnote_insn (void)
2958 rtx insn = get_last_insn ();
2963 for (insn = previous_insn (insn);
2964 insn && NOTE_P (insn);
2965 insn = previous_insn (insn))
2969 if (NONJUMP_INSN_P (insn)
2970 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2971 insn = XVECEXP (PATTERN (insn), 0,
2972 XVECLEN (PATTERN (insn), 0) - 1);
2979 /* Return the number of actual (non-debug) insns emitted in this
2983 get_max_insn_count (void)
2985 int n = cur_insn_uid;
2987 /* The table size must be stable across -g, to avoid codegen
2988 differences due to debug insns, and not be affected by
2989 -fmin-insn-uid, to avoid excessive table size and to simplify
2990 debugging of -fcompare-debug failures. */
2991 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
2992 n -= cur_debug_insn_uid;
2994 n -= MIN_NONDEBUG_INSN_UID;
3000 /* Return the next insn. If it is a SEQUENCE, return the first insn
3004 next_insn (rtx insn)
3008 insn = NEXT_INSN (insn);
3009 if (insn && NONJUMP_INSN_P (insn)
3010 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3011 insn = XVECEXP (PATTERN (insn), 0, 0);
3017 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3021 previous_insn (rtx insn)
3025 insn = PREV_INSN (insn);
3026 if (insn && NONJUMP_INSN_P (insn)
3027 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3028 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3034 /* Return the next insn after INSN that is not a NOTE. This routine does not
3035 look inside SEQUENCEs. */
3038 next_nonnote_insn (rtx insn)
3042 insn = NEXT_INSN (insn);
3043 if (insn == 0 || !NOTE_P (insn))
3050 /* Return the next insn after INSN that is not a NOTE, but stop the
3051 search before we enter another basic block. This routine does not
3052 look inside SEQUENCEs. */
3055 next_nonnote_insn_bb (rtx insn)
3059 insn = NEXT_INSN (insn);
3060 if (insn == 0 || !NOTE_P (insn))
3062 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3069 /* Return the previous insn before INSN that is not a NOTE. This routine does
3070 not look inside SEQUENCEs. */
3073 prev_nonnote_insn (rtx insn)
3077 insn = PREV_INSN (insn);
3078 if (insn == 0 || !NOTE_P (insn))
3085 /* Return the previous insn before INSN that is not a NOTE, but stop
3086 the search before we enter another basic block. This routine does
3087 not look inside SEQUENCEs. */
3090 prev_nonnote_insn_bb (rtx insn)
3094 insn = PREV_INSN (insn);
3095 if (insn == 0 || !NOTE_P (insn))
3097 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3104 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3105 routine does not look inside SEQUENCEs. */
3108 next_nondebug_insn (rtx insn)
3112 insn = NEXT_INSN (insn);
3113 if (insn == 0 || !DEBUG_INSN_P (insn))
3120 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3121 This routine does not look inside SEQUENCEs. */
3124 prev_nondebug_insn (rtx insn)
3128 insn = PREV_INSN (insn);
3129 if (insn == 0 || !DEBUG_INSN_P (insn))
3136 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3137 This routine does not look inside SEQUENCEs. */
3140 next_nonnote_nondebug_insn (rtx insn)
3144 insn = NEXT_INSN (insn);
3145 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3152 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3153 This routine does not look inside SEQUENCEs. */
3156 prev_nonnote_nondebug_insn (rtx insn)
3160 insn = PREV_INSN (insn);
3161 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3168 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3169 or 0, if there is none. This routine does not look inside
3173 next_real_insn (rtx insn)
3177 insn = NEXT_INSN (insn);
3178 if (insn == 0 || INSN_P (insn))
3185 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3186 or 0, if there is none. This routine does not look inside
3190 prev_real_insn (rtx insn)
3194 insn = PREV_INSN (insn);
3195 if (insn == 0 || INSN_P (insn))
3202 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3203 This routine does not look inside SEQUENCEs. */
3206 last_call_insn (void)
3210 for (insn = get_last_insn ();
3211 insn && !CALL_P (insn);
3212 insn = PREV_INSN (insn))
3218 /* Find the next insn after INSN that really does something. This routine
3219 does not look inside SEQUENCEs. After reload this also skips over
3220 standalone USE and CLOBBER insn. */
3223 active_insn_p (const_rtx insn)
3225 return (CALL_P (insn) || JUMP_P (insn)
3226 || (NONJUMP_INSN_P (insn)
3227 && (! reload_completed
3228 || (GET_CODE (PATTERN (insn)) != USE
3229 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3233 next_active_insn (rtx insn)
3237 insn = NEXT_INSN (insn);
3238 if (insn == 0 || active_insn_p (insn))
3245 /* Find the last insn before INSN that really does something. This routine
3246 does not look inside SEQUENCEs. After reload this also skips over
3247 standalone USE and CLOBBER insn. */
3250 prev_active_insn (rtx insn)
3254 insn = PREV_INSN (insn);
3255 if (insn == 0 || active_insn_p (insn))
3262 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3265 next_label (rtx insn)
3269 insn = NEXT_INSN (insn);
3270 if (insn == 0 || LABEL_P (insn))
3277 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3280 prev_label (rtx insn)
3284 insn = PREV_INSN (insn);
3285 if (insn == 0 || LABEL_P (insn))
3292 /* Return the last label to mark the same position as LABEL. Return null
3293 if LABEL itself is null. */
3296 skip_consecutive_labels (rtx label)
3300 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3308 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3309 and REG_CC_USER notes so we can find it. */
3312 link_cc0_insns (rtx insn)
3314 rtx user = next_nonnote_insn (insn);
3316 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3317 user = XVECEXP (PATTERN (user), 0, 0);
3319 add_reg_note (user, REG_CC_SETTER, insn);
3320 add_reg_note (insn, REG_CC_USER, user);
3323 /* Return the next insn that uses CC0 after INSN, which is assumed to
3324 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3325 applied to the result of this function should yield INSN).
3327 Normally, this is simply the next insn. However, if a REG_CC_USER note
3328 is present, it contains the insn that uses CC0.
3330 Return 0 if we can't find the insn. */
3333 next_cc0_user (rtx insn)
3335 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3338 return XEXP (note, 0);
3340 insn = next_nonnote_insn (insn);
3341 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3342 insn = XVECEXP (PATTERN (insn), 0, 0);
3344 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3350 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3351 note, it is the previous insn. */
3354 prev_cc0_setter (rtx insn)
3356 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3359 return XEXP (note, 0);
3361 insn = prev_nonnote_insn (insn);
3362 gcc_assert (sets_cc0_p (PATTERN (insn)));
3369 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3372 find_auto_inc (rtx *xp, void *data)
3375 rtx reg = (rtx) data;
3377 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3380 switch (GET_CODE (x))
3388 if (rtx_equal_p (reg, XEXP (x, 0)))
3399 /* Increment the label uses for all labels present in rtx. */
3402 mark_label_nuses (rtx x)
3408 code = GET_CODE (x);
3409 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3410 LABEL_NUSES (XEXP (x, 0))++;
3412 fmt = GET_RTX_FORMAT (code);
3413 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3416 mark_label_nuses (XEXP (x, i));
3417 else if (fmt[i] == 'E')
3418 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3419 mark_label_nuses (XVECEXP (x, i, j));
3424 /* Try splitting insns that can be split for better scheduling.
3425 PAT is the pattern which might split.
3426 TRIAL is the insn providing PAT.
3427 LAST is nonzero if we should return the last insn of the sequence produced.
3429 If this routine succeeds in splitting, it returns the first or last
3430 replacement insn depending on the value of LAST. Otherwise, it
3431 returns TRIAL. If the insn to be returned can be split, it will be. */
3434 try_split (rtx pat, rtx trial, int last)
3436 rtx before = PREV_INSN (trial);
3437 rtx after = NEXT_INSN (trial);
3438 int has_barrier = 0;
3441 rtx insn_last, insn;
3444 /* We're not good at redistributing frame information. */
3445 if (RTX_FRAME_RELATED_P (trial))
3448 if (any_condjump_p (trial)
3449 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3450 split_branch_probability = INTVAL (XEXP (note, 0));
3451 probability = split_branch_probability;
3453 seq = split_insns (pat, trial);
3455 split_branch_probability = -1;
3457 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3458 We may need to handle this specially. */
3459 if (after && BARRIER_P (after))
3462 after = NEXT_INSN (after);
3468 /* Avoid infinite loop if any insn of the result matches
3469 the original pattern. */
3473 if (INSN_P (insn_last)
3474 && rtx_equal_p (PATTERN (insn_last), pat))
3476 if (!NEXT_INSN (insn_last))
3478 insn_last = NEXT_INSN (insn_last);
3481 /* We will be adding the new sequence to the function. The splitters
3482 may have introduced invalid RTL sharing, so unshare the sequence now. */
3483 unshare_all_rtl_in_chain (seq);
3486 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3490 mark_jump_label (PATTERN (insn), insn, 0);
3492 if (probability != -1
3493 && any_condjump_p (insn)
3494 && !find_reg_note (insn, REG_BR_PROB, 0))
3496 /* We can preserve the REG_BR_PROB notes only if exactly
3497 one jump is created, otherwise the machine description
3498 is responsible for this step using
3499 split_branch_probability variable. */
3500 gcc_assert (njumps == 1);
3501 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3506 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3507 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3510 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3513 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3516 *p = CALL_INSN_FUNCTION_USAGE (trial);
3517 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3519 /* Update the debug information for the CALL_INSN. */
3520 if (flag_enable_icf_debug)
3521 (*debug_hooks->copy_call_info) (trial, insn);
3525 /* Copy notes, particularly those related to the CFG. */
3526 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3528 switch (REG_NOTE_KIND (note))
3531 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3536 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3539 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3543 case REG_NON_LOCAL_GOTO:
3544 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3547 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3553 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3555 rtx reg = XEXP (note, 0);
3556 if (!FIND_REG_INC_NOTE (insn, reg)
3557 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3558 add_reg_note (insn, REG_INC, reg);
3568 /* If there are LABELS inside the split insns increment the
3569 usage count so we don't delete the label. */
3573 while (insn != NULL_RTX)
3575 /* JUMP_P insns have already been "marked" above. */
3576 if (NONJUMP_INSN_P (insn))
3577 mark_label_nuses (PATTERN (insn));
3579 insn = PREV_INSN (insn);
3583 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3585 delete_insn (trial);
3587 emit_barrier_after (tem);
3589 /* Recursively call try_split for each new insn created; by the
3590 time control returns here that insn will be fully split, so
3591 set LAST and continue from the insn after the one returned.
3592 We can't use next_active_insn here since AFTER may be a note.
3593 Ignore deleted insns, which can be occur if not optimizing. */
3594 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3595 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3596 tem = try_split (PATTERN (tem), tem, 1);
3598 /* Return either the first or the last insn, depending on which was
3601 ? (after ? PREV_INSN (after) : get_last_insn ())
3602 : NEXT_INSN (before);
3605 /* Make and return an INSN rtx, initializing all its slots.
3606 Store PATTERN in the pattern slots. */
3609 make_insn_raw (rtx pattern)
3613 insn = rtx_alloc (INSN);
3615 INSN_UID (insn) = cur_insn_uid++;
3616 PATTERN (insn) = pattern;
3617 INSN_CODE (insn) = -1;
3618 REG_NOTES (insn) = NULL;
3619 INSN_LOCATOR (insn) = curr_insn_locator ();
3620 BLOCK_FOR_INSN (insn) = NULL;
3622 #ifdef ENABLE_RTL_CHECKING
3625 && (returnjump_p (insn)
3626 || (GET_CODE (insn) == SET
3627 && SET_DEST (insn) == pc_rtx)))
3629 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3637 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3640 make_debug_insn_raw (rtx pattern)
3644 insn = rtx_alloc (DEBUG_INSN);
3645 INSN_UID (insn) = cur_debug_insn_uid++;
3646 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3647 INSN_UID (insn) = cur_insn_uid++;
3649 PATTERN (insn) = pattern;
3650 INSN_CODE (insn) = -1;
3651 REG_NOTES (insn) = NULL;
3652 INSN_LOCATOR (insn) = curr_insn_locator ();
3653 BLOCK_FOR_INSN (insn) = NULL;
3658 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3661 make_jump_insn_raw (rtx pattern)
3665 insn = rtx_alloc (JUMP_INSN);
3666 INSN_UID (insn) = cur_insn_uid++;
3668 PATTERN (insn) = pattern;
3669 INSN_CODE (insn) = -1;
3670 REG_NOTES (insn) = NULL;
3671 JUMP_LABEL (insn) = NULL;
3672 INSN_LOCATOR (insn) = curr_insn_locator ();
3673 BLOCK_FOR_INSN (insn) = NULL;
3678 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3681 make_call_insn_raw (rtx pattern)
3685 insn = rtx_alloc (CALL_INSN);
3686 INSN_UID (insn) = cur_insn_uid++;
3688 PATTERN (insn) = pattern;
3689 INSN_CODE (insn) = -1;
3690 REG_NOTES (insn) = NULL;
3691 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3692 INSN_LOCATOR (insn) = curr_insn_locator ();
3693 BLOCK_FOR_INSN (insn) = NULL;
3698 /* Add INSN to the end of the doubly-linked list.
3699 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3704 PREV_INSN (insn) = get_last_insn();
3705 NEXT_INSN (insn) = 0;
3707 if (NULL != get_last_insn())
3708 NEXT_INSN (get_last_insn ()) = insn;
3710 if (NULL == get_insns ())
3711 set_first_insn (insn);
3713 set_last_insn (insn);
3716 /* Add INSN into the doubly-linked list after insn AFTER. This and
3717 the next should be the only functions called to insert an insn once
3718 delay slots have been filled since only they know how to update a
3722 add_insn_after (rtx insn, rtx after, basic_block bb)
3724 rtx next = NEXT_INSN (after);
3726 gcc_assert (!optimize || !INSN_DELETED_P (after));
3728 NEXT_INSN (insn) = next;
3729 PREV_INSN (insn) = after;
3733 PREV_INSN (next) = insn;
3734 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3735 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3737 else if (get_last_insn () == after)
3738 set_last_insn (insn);
3741 struct sequence_stack *stack = seq_stack;
3742 /* Scan all pending sequences too. */
3743 for (; stack; stack = stack->next)
3744 if (after == stack->last)
3753 if (!BARRIER_P (after)
3754 && !BARRIER_P (insn)
3755 && (bb = BLOCK_FOR_INSN (after)))
3757 set_block_for_insn (insn, bb);
3759 df_insn_rescan (insn);
3760 /* Should not happen as first in the BB is always
3761 either NOTE or LABEL. */
3762 if (BB_END (bb) == after
3763 /* Avoid clobbering of structure when creating new BB. */
3764 && !BARRIER_P (insn)
3765 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3769 NEXT_INSN (after) = insn;
3770 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3772 rtx sequence = PATTERN (after);
3773 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3777 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3778 the previous should be the only functions called to insert an insn
3779 once delay slots have been filled since only they know how to
3780 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3784 add_insn_before (rtx insn, rtx before, basic_block bb)
3786 rtx prev = PREV_INSN (before);
3788 gcc_assert (!optimize || !INSN_DELETED_P (before));
3790 PREV_INSN (insn) = prev;
3791 NEXT_INSN (insn) = before;
3795 NEXT_INSN (prev) = insn;
3796 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3798 rtx sequence = PATTERN (prev);
3799 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3802 else if (get_insns () == before)
3803 set_first_insn (insn);
3806 struct sequence_stack *stack = seq_stack;
3807 /* Scan all pending sequences too. */
3808 for (; stack; stack = stack->next)
3809 if (before == stack->first)
3811 stack->first = insn;
3819 && !BARRIER_P (before)
3820 && !BARRIER_P (insn))
3821 bb = BLOCK_FOR_INSN (before);
3825 set_block_for_insn (insn, bb);
3827 df_insn_rescan (insn);
3828 /* Should not happen as first in the BB is always either NOTE or
3830 gcc_assert (BB_HEAD (bb) != insn
3831 /* Avoid clobbering of structure when creating new BB. */
3833 || NOTE_INSN_BASIC_BLOCK_P (insn));
3836 PREV_INSN (before) = insn;
3837 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3838 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3842 /* Replace insn with an deleted instruction note. */
3845 set_insn_deleted (rtx insn)
3847 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3848 PUT_CODE (insn, NOTE);
3849 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3853 /* Remove an insn from its doubly-linked list. This function knows how
3854 to handle sequences. */
3856 remove_insn (rtx insn)
3858 rtx next = NEXT_INSN (insn);
3859 rtx prev = PREV_INSN (insn);
3862 /* Later in the code, the block will be marked dirty. */
3863 df_insn_delete (NULL, INSN_UID (insn));
3867 NEXT_INSN (prev) = next;
3868 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3870 rtx sequence = PATTERN (prev);
3871 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3874 else if (get_insns () == insn)
3877 PREV_INSN (next) = NULL;
3878 set_first_insn (next);
3882 struct sequence_stack *stack = seq_stack;
3883 /* Scan all pending sequences too. */
3884 for (; stack; stack = stack->next)
3885 if (insn == stack->first)
3887 stack->first = next;
3896 PREV_INSN (next) = prev;
3897 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3898 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3900 else if (get_last_insn () == insn)
3901 set_last_insn (prev);
3904 struct sequence_stack *stack = seq_stack;
3905 /* Scan all pending sequences too. */
3906 for (; stack; stack = stack->next)
3907 if (insn == stack->last)
3915 if (!BARRIER_P (insn)
3916 && (bb = BLOCK_FOR_INSN (insn)))
3919 df_set_bb_dirty (bb);
3920 if (BB_HEAD (bb) == insn)
3922 /* Never ever delete the basic block note without deleting whole
3924 gcc_assert (!NOTE_P (insn));
3925 BB_HEAD (bb) = next;
3927 if (BB_END (bb) == insn)
3932 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3935 add_function_usage_to (rtx call_insn, rtx call_fusage)
3937 gcc_assert (call_insn && CALL_P (call_insn));
3939 /* Put the register usage information on the CALL. If there is already
3940 some usage information, put ours at the end. */
3941 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3945 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3946 link = XEXP (link, 1))
3949 XEXP (link, 1) = call_fusage;
3952 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3955 /* Delete all insns made since FROM.
3956 FROM becomes the new last instruction. */
3959 delete_insns_since (rtx from)
3964 NEXT_INSN (from) = 0;
3965 set_last_insn (from);
3968 /* This function is deprecated, please use sequences instead.
3970 Move a consecutive bunch of insns to a different place in the chain.
3971 The insns to be moved are those between FROM and TO.
3972 They are moved to a new position after the insn AFTER.
3973 AFTER must not be FROM or TO or any insn in between.
3975 This function does not know about SEQUENCEs and hence should not be
3976 called after delay-slot filling has been done. */
3979 reorder_insns_nobb (rtx from, rtx to, rtx after)
3981 #ifdef ENABLE_CHECKING
3983 for (x = from; x != to; x = NEXT_INSN (x))
3984 gcc_assert (after != x);
3985 gcc_assert (after != to);
3988 /* Splice this bunch out of where it is now. */
3989 if (PREV_INSN (from))
3990 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3992 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3993 if (get_last_insn () == to)
3994 set_last_insn (PREV_INSN (from));
3995 if (get_insns () == from)
3996 set_first_insn (NEXT_INSN (to));
3998 /* Make the new neighbors point to it and it to them. */
3999 if (NEXT_INSN (after))
4000 PREV_INSN (NEXT_INSN (after)) = to;
4002 NEXT_INSN (to) = NEXT_INSN (after);
4003 PREV_INSN (from) = after;
4004 NEXT_INSN (after) = from;
4005 if (after == get_last_insn())
4009 /* Same as function above, but take care to update BB boundaries. */
4011 reorder_insns (rtx from, rtx to, rtx after)
4013 rtx prev = PREV_INSN (from);
4014 basic_block bb, bb2;
4016 reorder_insns_nobb (from, to, after);
4018 if (!BARRIER_P (after)
4019 && (bb = BLOCK_FOR_INSN (after)))
4022 df_set_bb_dirty (bb);
4024 if (!BARRIER_P (from)
4025 && (bb2 = BLOCK_FOR_INSN (from)))
4027 if (BB_END (bb2) == to)
4028 BB_END (bb2) = prev;
4029 df_set_bb_dirty (bb2);
4032 if (BB_END (bb) == after)
4035 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4037 df_insn_change_bb (x, bb);
4042 /* Emit insn(s) of given code and pattern
4043 at a specified place within the doubly-linked list.
4045 All of the emit_foo global entry points accept an object
4046 X which is either an insn list or a PATTERN of a single
4049 There are thus a few canonical ways to generate code and
4050 emit it at a specific place in the instruction stream. For
4051 example, consider the instruction named SPOT and the fact that
4052 we would like to emit some instructions before SPOT. We might
4056 ... emit the new instructions ...
4057 insns_head = get_insns ();
4060 emit_insn_before (insns_head, SPOT);
4062 It used to be common to generate SEQUENCE rtl instead, but that
4063 is a relic of the past which no longer occurs. The reason is that
4064 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4065 generated would almost certainly die right after it was created. */
4067 /* Make X be output before the instruction BEFORE. */
4070 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4075 gcc_assert (before);
4080 switch (GET_CODE (x))
4092 rtx next = NEXT_INSN (insn);
4093 add_insn_before (insn, before, bb);
4099 #ifdef ENABLE_RTL_CHECKING
4106 last = make_insn_raw (x);
4107 add_insn_before (last, before, bb);
4114 /* Make an instruction with body X and code JUMP_INSN
4115 and output it before the instruction BEFORE. */
4118 emit_jump_insn_before_noloc (rtx x, rtx before)
4120 rtx insn, last = NULL_RTX;
4122 gcc_assert (before);
4124 switch (GET_CODE (x))
4136 rtx next = NEXT_INSN (insn);
4137 add_insn_before (insn, before, NULL);
4143 #ifdef ENABLE_RTL_CHECKING
4150 last = make_jump_insn_raw (x);
4151 add_insn_before (last, before, NULL);
4158 /* Make an instruction with body X and code CALL_INSN
4159 and output it before the instruction BEFORE. */
4162 emit_call_insn_before_noloc (rtx x, rtx before)
4164 rtx last = NULL_RTX, insn;
4166 gcc_assert (before);
4168 switch (GET_CODE (x))
4180 rtx next = NEXT_INSN (insn);
4181 add_insn_before (insn, before, NULL);
4187 #ifdef ENABLE_RTL_CHECKING
4194 last = make_call_insn_raw (x);
4195 add_insn_before (last, before, NULL);
4202 /* Make an instruction with body X and code DEBUG_INSN
4203 and output it before the instruction BEFORE. */
4206 emit_debug_insn_before_noloc (rtx x, rtx before)
4208 rtx last = NULL_RTX, insn;
4210 gcc_assert (before);
4212 switch (GET_CODE (x))
4224 rtx next = NEXT_INSN (insn);
4225 add_insn_before (insn, before, NULL);
4231 #ifdef ENABLE_RTL_CHECKING
4238 last = make_debug_insn_raw (x);
4239 add_insn_before (last, before, NULL);
4246 /* Make an insn of code BARRIER
4247 and output it before the insn BEFORE. */
4250 emit_barrier_before (rtx before)
4252 rtx insn = rtx_alloc (BARRIER);
4254 INSN_UID (insn) = cur_insn_uid++;
4256 add_insn_before (insn, before, NULL);
4260 /* Emit the label LABEL before the insn BEFORE. */
4263 emit_label_before (rtx label, rtx before)
4265 /* This can be called twice for the same label as a result of the
4266 confusion that follows a syntax error! So make it harmless. */
4267 if (INSN_UID (label) == 0)
4269 INSN_UID (label) = cur_insn_uid++;
4270 add_insn_before (label, before, NULL);
4276 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4279 emit_note_before (enum insn_note subtype, rtx before)
4281 rtx note = rtx_alloc (NOTE);
4282 INSN_UID (note) = cur_insn_uid++;
4283 NOTE_KIND (note) = subtype;
4284 BLOCK_FOR_INSN (note) = NULL;
4285 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4287 add_insn_before (note, before, NULL);
4291 /* Helper for emit_insn_after, handles lists of instructions
4295 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4299 if (!bb && !BARRIER_P (after))
4300 bb = BLOCK_FOR_INSN (after);
4304 df_set_bb_dirty (bb);
4305 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4306 if (!BARRIER_P (last))
4308 set_block_for_insn (last, bb);
4309 df_insn_rescan (last);
4311 if (!BARRIER_P (last))
4313 set_block_for_insn (last, bb);
4314 df_insn_rescan (last);
4316 if (BB_END (bb) == after)
4320 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4323 after_after = NEXT_INSN (after);
4325 NEXT_INSN (after) = first;
4326 PREV_INSN (first) = after;
4327 NEXT_INSN (last) = after_after;
4329 PREV_INSN (after_after) = last;
4331 if (after == get_last_insn())
4332 set_last_insn (last);
4337 /* Make X be output after the insn AFTER and set the BB of insn. If
4338 BB is NULL, an attempt is made to infer the BB from AFTER. */
4341 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4350 switch (GET_CODE (x))
4359 last = emit_insn_after_1 (x, after, bb);
4362 #ifdef ENABLE_RTL_CHECKING
4369 last = make_insn_raw (x);
4370 add_insn_after (last, after, bb);
4378 /* Make an insn of code JUMP_INSN with body X
4379 and output it after the insn AFTER. */
4382 emit_jump_insn_after_noloc (rtx x, rtx after)
4388 switch (GET_CODE (x))
4397 last = emit_insn_after_1 (x, after, NULL);
4400 #ifdef ENABLE_RTL_CHECKING
4407 last = make_jump_insn_raw (x);
4408 add_insn_after (last, after, NULL);
4415 /* Make an instruction with body X and code CALL_INSN
4416 and output it after the instruction AFTER. */
4419 emit_call_insn_after_noloc (rtx x, rtx after)
4425 switch (GET_CODE (x))
4434 last = emit_insn_after_1 (x, after, NULL);
4437 #ifdef ENABLE_RTL_CHECKING
4444 last = make_call_insn_raw (x);
4445 add_insn_after (last, after, NULL);
4452 /* Make an instruction with body X and code CALL_INSN
4453 and output it after the instruction AFTER. */
4456 emit_debug_insn_after_noloc (rtx x, rtx after)
4462 switch (GET_CODE (x))
4471 last = emit_insn_after_1 (x, after, NULL);
4474 #ifdef ENABLE_RTL_CHECKING
4481 last = make_debug_insn_raw (x);
4482 add_insn_after (last, after, NULL);
4489 /* Make an insn of code BARRIER
4490 and output it after the insn AFTER. */
4493 emit_barrier_after (rtx after)
4495 rtx insn = rtx_alloc (BARRIER);
4497 INSN_UID (insn) = cur_insn_uid++;
4499 add_insn_after (insn, after, NULL);
4503 /* Emit the label LABEL after the insn AFTER. */
4506 emit_label_after (rtx label, rtx after)
4508 /* This can be called twice for the same label
4509 as a result of the confusion that follows a syntax error!
4510 So make it harmless. */
4511 if (INSN_UID (label) == 0)
4513 INSN_UID (label) = cur_insn_uid++;
4514 add_insn_after (label, after, NULL);
4520 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4523 emit_note_after (enum insn_note subtype, rtx after)
4525 rtx note = rtx_alloc (NOTE);
4526 INSN_UID (note) = cur_insn_uid++;
4527 NOTE_KIND (note) = subtype;
4528 BLOCK_FOR_INSN (note) = NULL;
4529 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4530 add_insn_after (note, after, NULL);
4534 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4536 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4538 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4540 if (pattern == NULL_RTX || !loc)
4543 after = NEXT_INSN (after);
4546 if (active_insn_p (after) && !INSN_LOCATOR (after))
4547 INSN_LOCATOR (after) = loc;
4550 after = NEXT_INSN (after);
4555 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4557 emit_insn_after (rtx pattern, rtx after)
4561 while (DEBUG_INSN_P (prev))
4562 prev = PREV_INSN (prev);
4565 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4567 return emit_insn_after_noloc (pattern, after, NULL);
4570 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4572 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4574 rtx last = emit_jump_insn_after_noloc (pattern, after);
4576 if (pattern == NULL_RTX || !loc)
4579 after = NEXT_INSN (after);
4582 if (active_insn_p (after) && !INSN_LOCATOR (after))
4583 INSN_LOCATOR (after) = loc;
4586 after = NEXT_INSN (after);
4591 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4593 emit_jump_insn_after (rtx pattern, rtx after)
4597 while (DEBUG_INSN_P (prev))
4598 prev = PREV_INSN (prev);
4601 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4603 return emit_jump_insn_after_noloc (pattern, after);
4606 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4608 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4610 rtx last = emit_call_insn_after_noloc (pattern, after);
4612 if (pattern == NULL_RTX || !loc)
4615 after = NEXT_INSN (after);
4618 if (active_insn_p (after) && !INSN_LOCATOR (after))
4619 INSN_LOCATOR (after) = loc;
4622 after = NEXT_INSN (after);
4627 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4629 emit_call_insn_after (rtx pattern, rtx after)
4633 while (DEBUG_INSN_P (prev))
4634 prev = PREV_INSN (prev);
4637 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4639 return emit_call_insn_after_noloc (pattern, after);
4642 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4644 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4646 rtx last = emit_debug_insn_after_noloc (pattern, after);
4648 if (pattern == NULL_RTX || !loc)
4651 after = NEXT_INSN (after);
4654 if (active_insn_p (after) && !INSN_LOCATOR (after))
4655 INSN_LOCATOR (after) = loc;
4658 after = NEXT_INSN (after);
4663 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4665 emit_debug_insn_after (rtx pattern, rtx after)
4668 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4670 return emit_debug_insn_after_noloc (pattern, after);
4673 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4675 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4677 rtx first = PREV_INSN (before);
4678 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4680 if (pattern == NULL_RTX || !loc)
4684 first = get_insns ();
4686 first = NEXT_INSN (first);
4689 if (active_insn_p (first) && !INSN_LOCATOR (first))
4690 INSN_LOCATOR (first) = loc;
4693 first = NEXT_INSN (first);
4698 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4700 emit_insn_before (rtx pattern, rtx before)
4704 while (DEBUG_INSN_P (next))
4705 next = PREV_INSN (next);
4708 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4710 return emit_insn_before_noloc (pattern, before, NULL);
4713 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4715 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4717 rtx first = PREV_INSN (before);
4718 rtx last = emit_jump_insn_before_noloc (pattern, before);
4720 if (pattern == NULL_RTX)
4723 first = NEXT_INSN (first);
4726 if (active_insn_p (first) && !INSN_LOCATOR (first))
4727 INSN_LOCATOR (first) = loc;
4730 first = NEXT_INSN (first);
4735 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4737 emit_jump_insn_before (rtx pattern, rtx before)
4741 while (DEBUG_INSN_P (next))
4742 next = PREV_INSN (next);
4745 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4747 return emit_jump_insn_before_noloc (pattern, before);
4750 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4752 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4754 rtx first = PREV_INSN (before);
4755 rtx last = emit_call_insn_before_noloc (pattern, before);
4757 if (pattern == NULL_RTX)
4760 first = NEXT_INSN (first);
4763 if (active_insn_p (first) && !INSN_LOCATOR (first))
4764 INSN_LOCATOR (first) = loc;
4767 first = NEXT_INSN (first);
4772 /* like emit_call_insn_before_noloc,
4773 but set insn_locator according to before. */
4775 emit_call_insn_before (rtx pattern, rtx before)
4779 while (DEBUG_INSN_P (next))
4780 next = PREV_INSN (next);
4783 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4785 return emit_call_insn_before_noloc (pattern, before);
4788 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4790 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4792 rtx first = PREV_INSN (before);
4793 rtx last = emit_debug_insn_before_noloc (pattern, before);
4795 if (pattern == NULL_RTX)
4798 first = NEXT_INSN (first);
4801 if (active_insn_p (first) && !INSN_LOCATOR (first))
4802 INSN_LOCATOR (first) = loc;
4805 first = NEXT_INSN (first);
4810 /* like emit_debug_insn_before_noloc,
4811 but set insn_locator according to before. */
4813 emit_debug_insn_before (rtx pattern, rtx before)
4815 if (INSN_P (before))
4816 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4818 return emit_debug_insn_before_noloc (pattern, before);
4821 /* Take X and emit it at the end of the doubly-linked
4824 Returns the last insn emitted. */
4829 rtx last = get_last_insn();
4835 switch (GET_CODE (x))
4847 rtx next = NEXT_INSN (insn);
4854 #ifdef ENABLE_RTL_CHECKING
4861 last = make_insn_raw (x);
4869 /* Make an insn of code DEBUG_INSN with pattern X
4870 and add it to the end of the doubly-linked list. */
4873 emit_debug_insn (rtx x)
4875 rtx last = get_last_insn();
4881 switch (GET_CODE (x))
4893 rtx next = NEXT_INSN (insn);
4900 #ifdef ENABLE_RTL_CHECKING
4907 last = make_debug_insn_raw (x);
4915 /* Make an insn of code JUMP_INSN with pattern X
4916 and add it to the end of the doubly-linked list. */
4919 emit_jump_insn (rtx x)
4921 rtx last = NULL_RTX, insn;
4923 switch (GET_CODE (x))
4935 rtx next = NEXT_INSN (insn);
4942 #ifdef ENABLE_RTL_CHECKING
4949 last = make_jump_insn_raw (x);
4957 /* Make an insn of code CALL_INSN with pattern X
4958 and add it to the end of the doubly-linked list. */
4961 emit_call_insn (rtx x)
4965 switch (GET_CODE (x))
4974 insn = emit_insn (x);
4977 #ifdef ENABLE_RTL_CHECKING
4984 insn = make_call_insn_raw (x);
4992 /* Add the label LABEL to the end of the doubly-linked list. */
4995 emit_label (rtx label)
4997 /* This can be called twice for the same label
4998 as a result of the confusion that follows a syntax error!
4999 So make it harmless. */
5000 if (INSN_UID (label) == 0)
5002 INSN_UID (label) = cur_insn_uid++;
5008 /* Make an insn of code BARRIER
5009 and add it to the end of the doubly-linked list. */
5014 rtx barrier = rtx_alloc (BARRIER);
5015 INSN_UID (barrier) = cur_insn_uid++;
5020 /* Emit a copy of note ORIG. */
5023 emit_note_copy (rtx orig)
5027 note = rtx_alloc (NOTE);
5029 INSN_UID (note) = cur_insn_uid++;
5030 NOTE_DATA (note) = NOTE_DATA (orig);
5031 NOTE_KIND (note) = NOTE_KIND (orig);
5032 BLOCK_FOR_INSN (note) = NULL;
5038 /* Make an insn of code NOTE or type NOTE_NO
5039 and add it to the end of the doubly-linked list. */
5042 emit_note (enum insn_note kind)
5046 note = rtx_alloc (NOTE);
5047 INSN_UID (note) = cur_insn_uid++;
5048 NOTE_KIND (note) = kind;
5049 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5050 BLOCK_FOR_INSN (note) = NULL;
5055 /* Emit a clobber of lvalue X. */
5058 emit_clobber (rtx x)
5060 /* CONCATs should not appear in the insn stream. */
5061 if (GET_CODE (x) == CONCAT)
5063 emit_clobber (XEXP (x, 0));
5064 return emit_clobber (XEXP (x, 1));
5066 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5069 /* Return a sequence of insns to clobber lvalue X. */
5083 /* Emit a use of rvalue X. */
5088 /* CONCATs should not appear in the insn stream. */
5089 if (GET_CODE (x) == CONCAT)
5091 emit_use (XEXP (x, 0));
5092 return emit_use (XEXP (x, 1));
5094 return emit_insn (gen_rtx_USE (VOIDmode, x));
5097 /* Return a sequence of insns to use rvalue X. */
5111 /* Cause next statement to emit a line note even if the line number
5115 force_next_line_note (void)
5120 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5121 note of this type already exists, remove it first. */
5124 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5126 rtx note = find_reg_note (insn, kind, NULL_RTX);
5132 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5133 has multiple sets (some callers assume single_set
5134 means the insn only has one set, when in fact it
5135 means the insn only has one * useful * set). */
5136 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5142 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5143 It serves no useful purpose and breaks eliminate_regs. */
5144 if (GET_CODE (datum) == ASM_OPERANDS)
5149 XEXP (note, 0) = datum;
5150 df_notes_rescan (insn);
5158 XEXP (note, 0) = datum;
5164 add_reg_note (insn, kind, datum);
5170 df_notes_rescan (insn);
5176 return REG_NOTES (insn);
5179 /* Return an indication of which type of insn should have X as a body.
5180 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5182 static enum rtx_code
5183 classify_insn (rtx x)
5187 if (GET_CODE (x) == CALL)
5189 if (GET_CODE (x) == RETURN)
5191 if (GET_CODE (x) == SET)
5193 if (SET_DEST (x) == pc_rtx)
5195 else if (GET_CODE (SET_SRC (x)) == CALL)
5200 if (GET_CODE (x) == PARALLEL)
5203 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5204 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5206 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5207 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5209 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5210 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5216 /* Emit the rtl pattern X as an appropriate kind of insn.
5217 If X is a label, it is simply added into the insn chain. */
5222 enum rtx_code code = classify_insn (x);
5227 return emit_label (x);
5229 return emit_insn (x);
5232 rtx insn = emit_jump_insn (x);
5233 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5234 return emit_barrier ();
5238 return emit_call_insn (x);
5240 return emit_debug_insn (x);
5246 /* Space for free sequence stack entries. */
5247 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5249 /* Begin emitting insns to a sequence. If this sequence will contain
5250 something that might cause the compiler to pop arguments to function
5251 calls (because those pops have previously been deferred; see
5252 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5253 before calling this function. That will ensure that the deferred
5254 pops are not accidentally emitted in the middle of this sequence. */
5257 start_sequence (void)
5259 struct sequence_stack *tem;
5261 if (free_sequence_stack != NULL)
5263 tem = free_sequence_stack;
5264 free_sequence_stack = tem->next;
5267 tem = ggc_alloc_sequence_stack ();
5269 tem->next = seq_stack;
5270 tem->first = get_insns ();
5271 tem->last = get_last_insn ();
5279 /* Set up the insn chain starting with FIRST as the current sequence,
5280 saving the previously current one. See the documentation for
5281 start_sequence for more information about how to use this function. */
5284 push_to_sequence (rtx first)
5290 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5292 set_first_insn (first);
5293 set_last_insn (last);
5296 /* Like push_to_sequence, but take the last insn as an argument to avoid
5297 looping through the list. */
5300 push_to_sequence2 (rtx first, rtx last)
5304 set_first_insn (first);
5305 set_last_insn (last);
5308 /* Set up the outer-level insn chain
5309 as the current sequence, saving the previously current one. */
5312 push_topmost_sequence (void)
5314 struct sequence_stack *stack, *top = NULL;
5318 for (stack = seq_stack; stack; stack = stack->next)
5321 set_first_insn (top->first);
5322 set_last_insn (top->last);
5325 /* After emitting to the outer-level insn chain, update the outer-level
5326 insn chain, and restore the previous saved state. */
5329 pop_topmost_sequence (void)
5331 struct sequence_stack *stack, *top = NULL;
5333 for (stack = seq_stack; stack; stack = stack->next)
5336 top->first = get_insns ();
5337 top->last = get_last_insn ();
5342 /* After emitting to a sequence, restore previous saved state.
5344 To get the contents of the sequence just made, you must call
5345 `get_insns' *before* calling here.
5347 If the compiler might have deferred popping arguments while
5348 generating this sequence, and this sequence will not be immediately
5349 inserted into the instruction stream, use do_pending_stack_adjust
5350 before calling get_insns. That will ensure that the deferred
5351 pops are inserted into this sequence, and not into some random
5352 location in the instruction stream. See INHIBIT_DEFER_POP for more
5353 information about deferred popping of arguments. */
5358 struct sequence_stack *tem = seq_stack;
5360 set_first_insn (tem->first);
5361 set_last_insn (tem->last);
5362 seq_stack = tem->next;
5364 memset (tem, 0, sizeof (*tem));
5365 tem->next = free_sequence_stack;
5366 free_sequence_stack = tem;
5369 /* Return 1 if currently emitting into a sequence. */
5372 in_sequence_p (void)
5374 return seq_stack != 0;
5377 /* Put the various virtual registers into REGNO_REG_RTX. */
5380 init_virtual_regs (void)
5382 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5383 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5384 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5385 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5386 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5387 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5388 = virtual_preferred_stack_boundary_rtx;
5392 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5393 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5394 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5395 static int copy_insn_n_scratches;
5397 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5398 copied an ASM_OPERANDS.
5399 In that case, it is the original input-operand vector. */
5400 static rtvec orig_asm_operands_vector;
5402 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5403 copied an ASM_OPERANDS.
5404 In that case, it is the copied input-operand vector. */
5405 static rtvec copy_asm_operands_vector;
5407 /* Likewise for the constraints vector. */
5408 static rtvec orig_asm_constraints_vector;
5409 static rtvec copy_asm_constraints_vector;
5411 /* Recursively create a new copy of an rtx for copy_insn.
5412 This function differs from copy_rtx in that it handles SCRATCHes and
5413 ASM_OPERANDs properly.
5414 Normally, this function is not used directly; use copy_insn as front end.
5415 However, you could first copy an insn pattern with copy_insn and then use
5416 this function afterwards to properly copy any REG_NOTEs containing
5420 copy_insn_1 (rtx orig)
5425 const char *format_ptr;
5430 code = GET_CODE (orig);
5445 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5450 for (i = 0; i < copy_insn_n_scratches; i++)
5451 if (copy_insn_scratch_in[i] == orig)
5452 return copy_insn_scratch_out[i];
5456 if (shared_const_p (orig))
5460 /* A MEM with a constant address is not sharable. The problem is that
5461 the constant address may need to be reloaded. If the mem is shared,
5462 then reloading one copy of this mem will cause all copies to appear
5463 to have been reloaded. */
5469 /* Copy the various flags, fields, and other information. We assume
5470 that all fields need copying, and then clear the fields that should
5471 not be copied. That is the sensible default behavior, and forces
5472 us to explicitly document why we are *not* copying a flag. */
5473 copy = shallow_copy_rtx (orig);
5475 /* We do not copy the USED flag, which is used as a mark bit during
5476 walks over the RTL. */
5477 RTX_FLAG (copy, used) = 0;
5479 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5482 RTX_FLAG (copy, jump) = 0;
5483 RTX_FLAG (copy, call) = 0;
5484 RTX_FLAG (copy, frame_related) = 0;
5487 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5489 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5490 switch (*format_ptr++)
5493 if (XEXP (orig, i) != NULL)
5494 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5499 if (XVEC (orig, i) == orig_asm_constraints_vector)
5500 XVEC (copy, i) = copy_asm_constraints_vector;
5501 else if (XVEC (orig, i) == orig_asm_operands_vector)
5502 XVEC (copy, i) = copy_asm_operands_vector;
5503 else if (XVEC (orig, i) != NULL)
5505 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5506 for (j = 0; j < XVECLEN (copy, i); j++)
5507 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5518 /* These are left unchanged. */
5525 if (code == SCRATCH)
5527 i = copy_insn_n_scratches++;
5528 gcc_assert (i < MAX_RECOG_OPERANDS);
5529 copy_insn_scratch_in[i] = orig;
5530 copy_insn_scratch_out[i] = copy;
5532 else if (code == ASM_OPERANDS)
5534 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5535 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5536 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5537 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5543 /* Create a new copy of an rtx.
5544 This function differs from copy_rtx in that it handles SCRATCHes and
5545 ASM_OPERANDs properly.
5546 INSN doesn't really have to be a full INSN; it could be just the
5549 copy_insn (rtx insn)
5551 copy_insn_n_scratches = 0;
5552 orig_asm_operands_vector = 0;
5553 orig_asm_constraints_vector = 0;
5554 copy_asm_operands_vector = 0;
5555 copy_asm_constraints_vector = 0;
5556 return copy_insn_1 (insn);
5559 /* Initialize data structures and variables in this file
5560 before generating rtl for each function. */
5565 set_first_insn (NULL);
5566 set_last_insn (NULL);
5567 if (MIN_NONDEBUG_INSN_UID)
5568 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5571 cur_debug_insn_uid = 1;
5572 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5573 last_location = UNKNOWN_LOCATION;
5574 first_label_num = label_num;
5577 /* Init the tables that describe all the pseudo regs. */
5579 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5581 crtl->emit.regno_pointer_align
5582 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5584 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5586 /* Put copies of all the hard registers into regno_reg_rtx. */
5587 memcpy (regno_reg_rtx,
5588 initial_regno_reg_rtx,
5589 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5591 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5592 init_virtual_regs ();
5594 /* Indicate that the virtual registers and stack locations are
5596 REG_POINTER (stack_pointer_rtx) = 1;
5597 REG_POINTER (frame_pointer_rtx) = 1;
5598 REG_POINTER (hard_frame_pointer_rtx) = 1;
5599 REG_POINTER (arg_pointer_rtx) = 1;
5601 REG_POINTER (virtual_incoming_args_rtx) = 1;
5602 REG_POINTER (virtual_stack_vars_rtx) = 1;
5603 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5604 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5605 REG_POINTER (virtual_cfa_rtx) = 1;
5607 #ifdef STACK_BOUNDARY
5608 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5609 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5610 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5611 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5613 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5614 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5615 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5616 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5617 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5620 #ifdef INIT_EXPANDERS
5625 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5628 gen_const_vector (enum machine_mode mode, int constant)
5633 enum machine_mode inner;
5635 units = GET_MODE_NUNITS (mode);
5636 inner = GET_MODE_INNER (mode);
5638 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5640 v = rtvec_alloc (units);
5642 /* We need to call this function after we set the scalar const_tiny_rtx
5644 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5646 for (i = 0; i < units; ++i)
5647 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5649 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5653 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5654 all elements are zero, and the one vector when all elements are one. */
5656 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5658 enum machine_mode inner = GET_MODE_INNER (mode);
5659 int nunits = GET_MODE_NUNITS (mode);
5663 /* Check to see if all of the elements have the same value. */
5664 x = RTVEC_ELT (v, nunits - 1);
5665 for (i = nunits - 2; i >= 0; i--)
5666 if (RTVEC_ELT (v, i) != x)
5669 /* If the values are all the same, check to see if we can use one of the
5670 standard constant vectors. */
5673 if (x == CONST0_RTX (inner))
5674 return CONST0_RTX (mode);
5675 else if (x == CONST1_RTX (inner))
5676 return CONST1_RTX (mode);
5679 return gen_rtx_raw_CONST_VECTOR (mode, v);
5682 /* Initialise global register information required by all functions. */
5685 init_emit_regs (void)
5689 /* Reset register attributes */
5690 htab_empty (reg_attrs_htab);
5692 /* We need reg_raw_mode, so initialize the modes now. */
5693 init_reg_modes_target ();
5695 /* Assign register numbers to the globally defined register rtx. */
5696 pc_rtx = gen_rtx_PC (VOIDmode);
5697 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5698 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5699 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5700 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5701 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5702 virtual_incoming_args_rtx =
5703 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5704 virtual_stack_vars_rtx =
5705 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5706 virtual_stack_dynamic_rtx =
5707 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5708 virtual_outgoing_args_rtx =
5709 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5710 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5711 virtual_preferred_stack_boundary_rtx =
5712 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5714 /* Initialize RTL for commonly used hard registers. These are
5715 copied into regno_reg_rtx as we begin to compile each function. */
5716 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5717 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5719 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5720 return_address_pointer_rtx
5721 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5724 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5725 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5727 pic_offset_table_rtx = NULL_RTX;
5730 /* Create some permanent unique rtl objects shared between all functions. */
5733 init_emit_once (void)
5736 enum machine_mode mode;
5737 enum machine_mode double_mode;
5739 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5741 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5742 const_int_htab_eq, NULL);
5744 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5745 const_double_htab_eq, NULL);
5747 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5748 const_fixed_htab_eq, NULL);
5750 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5751 mem_attrs_htab_eq, NULL);
5752 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5753 reg_attrs_htab_eq, NULL);
5755 /* Compute the word and byte modes. */
5757 byte_mode = VOIDmode;
5758 word_mode = VOIDmode;
5759 double_mode = VOIDmode;
5761 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5763 mode = GET_MODE_WIDER_MODE (mode))
5765 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5766 && byte_mode == VOIDmode)
5769 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5770 && word_mode == VOIDmode)
5774 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5776 mode = GET_MODE_WIDER_MODE (mode))
5778 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5779 && double_mode == VOIDmode)
5783 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5785 #ifdef INIT_EXPANDERS
5786 /* This is to initialize {init|mark|free}_machine_status before the first
5787 call to push_function_context_to. This is needed by the Chill front
5788 end which calls push_function_context_to before the first call to
5789 init_function_start. */
5793 /* Create the unique rtx's for certain rtx codes and operand values. */
5795 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5796 tries to use these variables. */
5797 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5798 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5799 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5801 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5802 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5803 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5805 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5807 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5808 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5809 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5814 dconsthalf = dconst1;
5815 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5817 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5819 const REAL_VALUE_TYPE *const r =
5820 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5822 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5824 mode = GET_MODE_WIDER_MODE (mode))
5825 const_tiny_rtx[i][(int) mode] =
5826 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5828 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5830 mode = GET_MODE_WIDER_MODE (mode))
5831 const_tiny_rtx[i][(int) mode] =
5832 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5834 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5836 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5838 mode = GET_MODE_WIDER_MODE (mode))
5839 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5841 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5843 mode = GET_MODE_WIDER_MODE (mode))
5844 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5847 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5849 mode = GET_MODE_WIDER_MODE (mode))
5851 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5852 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5855 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5857 mode = GET_MODE_WIDER_MODE (mode))
5859 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5860 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5863 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5865 mode = GET_MODE_WIDER_MODE (mode))
5867 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5868 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5871 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5873 mode = GET_MODE_WIDER_MODE (mode))
5875 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5876 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5879 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5881 mode = GET_MODE_WIDER_MODE (mode))
5883 FCONST0(mode).data.high = 0;
5884 FCONST0(mode).data.low = 0;
5885 FCONST0(mode).mode = mode;
5886 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5887 FCONST0 (mode), mode);
5890 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5892 mode = GET_MODE_WIDER_MODE (mode))
5894 FCONST0(mode).data.high = 0;
5895 FCONST0(mode).data.low = 0;
5896 FCONST0(mode).mode = mode;
5897 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5898 FCONST0 (mode), mode);
5901 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5903 mode = GET_MODE_WIDER_MODE (mode))
5905 FCONST0(mode).data.high = 0;
5906 FCONST0(mode).data.low = 0;
5907 FCONST0(mode).mode = mode;
5908 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5909 FCONST0 (mode), mode);
5911 /* We store the value 1. */
5912 FCONST1(mode).data.high = 0;
5913 FCONST1(mode).data.low = 0;
5914 FCONST1(mode).mode = mode;
5915 lshift_double (1, 0, GET_MODE_FBIT (mode),
5916 2 * HOST_BITS_PER_WIDE_INT,
5917 &FCONST1(mode).data.low,
5918 &FCONST1(mode).data.high,
5919 SIGNED_FIXED_POINT_MODE_P (mode));
5920 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5921 FCONST1 (mode), mode);
5924 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5926 mode = GET_MODE_WIDER_MODE (mode))
5928 FCONST0(mode).data.high = 0;
5929 FCONST0(mode).data.low = 0;
5930 FCONST0(mode).mode = mode;
5931 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5932 FCONST0 (mode), mode);
5934 /* We store the value 1. */
5935 FCONST1(mode).data.high = 0;
5936 FCONST1(mode).data.low = 0;
5937 FCONST1(mode).mode = mode;
5938 lshift_double (1, 0, GET_MODE_FBIT (mode),
5939 2 * HOST_BITS_PER_WIDE_INT,
5940 &FCONST1(mode).data.low,
5941 &FCONST1(mode).data.high,
5942 SIGNED_FIXED_POINT_MODE_P (mode));
5943 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5944 FCONST1 (mode), mode);
5947 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5949 mode = GET_MODE_WIDER_MODE (mode))
5951 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5954 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5956 mode = GET_MODE_WIDER_MODE (mode))
5958 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5961 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5963 mode = GET_MODE_WIDER_MODE (mode))
5965 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5966 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5969 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5971 mode = GET_MODE_WIDER_MODE (mode))
5973 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5974 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5977 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5978 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5979 const_tiny_rtx[0][i] = const0_rtx;
5981 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5982 if (STORE_FLAG_VALUE == 1)
5983 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5986 /* Produce exact duplicate of insn INSN after AFTER.
5987 Care updating of libcall regions if present. */
5990 emit_copy_of_insn_after (rtx insn, rtx after)
5994 switch (GET_CODE (insn))
5997 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6001 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6005 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6009 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6010 if (CALL_INSN_FUNCTION_USAGE (insn))
6011 CALL_INSN_FUNCTION_USAGE (new_rtx)
6012 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6013 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6014 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6015 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6016 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6017 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6024 /* Update LABEL_NUSES. */
6025 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6027 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
6029 /* If the old insn is frame related, then so is the new one. This is
6030 primarily needed for IA-64 unwind info which marks epilogue insns,
6031 which may be duplicated by the basic block reordering code. */
6032 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6034 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6035 will make them. REG_LABEL_TARGETs are created there too, but are
6036 supposed to be sticky, so we copy them. */
6037 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6038 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6040 if (GET_CODE (link) == EXPR_LIST)
6041 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6042 copy_insn_1 (XEXP (link, 0)));
6044 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6047 INSN_CODE (new_rtx) = INSN_CODE (insn);
6051 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6053 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6055 if (hard_reg_clobbers[mode][regno])
6056 return hard_reg_clobbers[mode][regno];
6058 return (hard_reg_clobbers[mode][regno] =
6059 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6062 #include "gt-emit-rtl.h"