1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 /* This is where the pointer to the obstack being used for RTL is stored. */
174 extern struct obstack *rtl_obstack;
176 static rtx make_jump_insn_raw PARAMS ((rtx));
177 static rtx make_call_insn_raw PARAMS ((rtx));
178 static rtx find_line_note PARAMS ((rtx));
179 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
180 static void unshare_all_rtl_1 PARAMS ((rtx));
181 static void unshare_all_decls PARAMS ((tree));
182 static void reset_used_decls PARAMS ((tree));
183 static hashval_t const_int_htab_hash PARAMS ((const void *));
184 static int const_int_htab_eq PARAMS ((const void *,
186 static int rtx_htab_mark_1 PARAMS ((void **, void *));
187 static void rtx_htab_mark PARAMS ((void *));
190 /* Returns a hash code for X (which is a really a CONST_INT). */
193 const_int_htab_hash (x)
196 return (hashval_t) INTVAL ((const struct rtx_def *) x);
199 /* Returns non-zero if the value represented by X (which is really a
200 CONST_INT) is the same as that given by Y (which is really a
204 const_int_htab_eq (x, y)
208 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
211 /* Mark the hash-table element X (which is really a pointer to an
215 rtx_htab_mark_1 (x, data)
217 void *data ATTRIBUTE_UNUSED;
223 /* Mark all the elements of HTAB (which is really an htab_t full of
230 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
233 /* There are some RTL codes that require special attention; the generation
234 functions do the raw handling. If you add to this list, modify
235 special_rtx in gengenrtl.c as well. */
238 gen_rtx_CONST_INT (mode, arg)
239 enum machine_mode mode ATTRIBUTE_UNUSED;
244 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
245 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
247 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
248 if (const_true_rtx && arg == STORE_FLAG_VALUE)
249 return const_true_rtx;
252 /* Look up the CONST_INT in the hash table. */
253 slot = htab_find_slot_with_hash (const_int_htab, &arg,
254 (hashval_t) arg, INSERT);
259 push_obstacks_nochange ();
260 end_temporary_allocation ();
261 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
265 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
271 /* CONST_DOUBLEs needs special handling because their length is known
275 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
276 enum machine_mode mode;
278 HOST_WIDE_INT arg1, arg2;
280 rtx r = rtx_alloc (CONST_DOUBLE);
285 X0EXP (r, 1) = NULL_RTX;
289 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
296 gen_rtx_REG (mode, regno)
297 enum machine_mode mode;
300 /* In case the MD file explicitly references the frame pointer, have
301 all such references point to the same frame pointer. This is
302 used during frame pointer elimination to distinguish the explicit
303 references to these registers from pseudos that happened to be
306 If we have eliminated the frame pointer or arg pointer, we will
307 be using it as a normal register, for example as a spill
308 register. In such cases, we might be accessing it in a mode that
309 is not Pmode and therefore cannot use the pre-allocated rtx.
311 Also don't do this when we are making new REGs in reload, since
312 we don't want to get confused with the real pointers. */
314 if (mode == Pmode && !reload_in_progress)
316 if (regno == FRAME_POINTER_REGNUM)
317 return frame_pointer_rtx;
318 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
319 if (regno == HARD_FRAME_POINTER_REGNUM)
320 return hard_frame_pointer_rtx;
322 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
323 if (regno == ARG_POINTER_REGNUM)
324 return arg_pointer_rtx;
326 #ifdef RETURN_ADDRESS_POINTER_REGNUM
327 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
328 return return_address_pointer_rtx;
330 if (regno == STACK_POINTER_REGNUM)
331 return stack_pointer_rtx;
334 return gen_rtx_raw_REG (mode, regno);
338 gen_rtx_MEM (mode, addr)
339 enum machine_mode mode;
342 rtx rt = gen_rtx_raw_MEM (mode, addr);
344 /* This field is not cleared by the mere allocation of the rtx, so
346 MEM_ALIAS_SET (rt) = 0;
351 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
353 ** This routine generates an RTX of the size specified by
354 ** <code>, which is an RTX code. The RTX structure is initialized
355 ** from the arguments <element1> through <elementn>, which are
356 ** interpreted according to the specific RTX type's format. The
357 ** special machine mode associated with the rtx (if any) is specified
360 ** gen_rtx can be invoked in a way which resembles the lisp-like
361 ** rtx it will generate. For example, the following rtx structure:
363 ** (plus:QI (mem:QI (reg:SI 1))
364 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
366 ** ...would be generated by the following C code:
368 ** gen_rtx (PLUS, QImode,
369 ** gen_rtx (MEM, QImode,
370 ** gen_rtx (REG, SImode, 1)),
371 ** gen_rtx (MEM, QImode,
372 ** gen_rtx (PLUS, SImode,
373 ** gen_rtx (REG, SImode, 2),
374 ** gen_rtx (REG, SImode, 3)))),
379 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
381 #ifndef ANSI_PROTOTYPES
383 enum machine_mode mode;
386 register int i; /* Array indices... */
387 register const char *fmt; /* Current rtx's format... */
388 register rtx rt_val; /* RTX to return to caller... */
392 #ifndef ANSI_PROTOTYPES
393 code = va_arg (p, enum rtx_code);
394 mode = va_arg (p, enum machine_mode);
400 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
405 rtx arg0 = va_arg (p, rtx);
406 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
407 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
408 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
413 rt_val = gen_rtx_REG (mode, va_arg (p, int));
417 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
421 rt_val = rtx_alloc (code); /* Allocate the storage space. */
422 rt_val->mode = mode; /* Store the machine mode... */
424 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
425 for (i = 0; i < GET_RTX_LENGTH (code); i++)
429 case '0': /* Unused field. */
432 case 'i': /* An integer? */
433 XINT (rt_val, i) = va_arg (p, int);
436 case 'w': /* A wide integer? */
437 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
440 case 's': /* A string? */
441 XSTR (rt_val, i) = va_arg (p, char *);
444 case 'e': /* An expression? */
445 case 'u': /* An insn? Same except when printing. */
446 XEXP (rt_val, i) = va_arg (p, rtx);
449 case 'E': /* An RTX vector? */
450 XVEC (rt_val, i) = va_arg (p, rtvec);
453 case 'b': /* A bitmap? */
454 XBITMAP (rt_val, i) = va_arg (p, bitmap);
457 case 't': /* A tree? */
458 XTREE (rt_val, i) = va_arg (p, tree);
472 /* gen_rtvec (n, [rt1, ..., rtn])
474 ** This routine creates an rtvec and stores within it the
475 ** pointers to rtx's which are its arguments.
480 gen_rtvec VPARAMS ((int n, ...))
482 #ifndef ANSI_PROTOTYPES
491 #ifndef ANSI_PROTOTYPES
496 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
498 vector = (rtx *) alloca (n * sizeof (rtx));
500 for (i = 0; i < n; i++)
501 vector[i] = va_arg (p, rtx);
504 return gen_rtvec_v (n, vector);
508 gen_rtvec_v (n, argp)
513 register rtvec rt_val;
516 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
518 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
520 for (i = 0; i < n; i++)
521 rt_val->elem[i] = *argp++;
527 /* Generate a REG rtx for a new pseudo register of mode MODE.
528 This pseudo is assigned the next sequential register number. */
532 enum machine_mode mode;
534 struct function *f = cfun;
537 /* Don't let anything called after initial flow analysis create new
542 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
543 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
545 /* For complex modes, don't make a single pseudo.
546 Instead, make a CONCAT of two pseudos.
547 This allows noncontiguous allocation of the real and imaginary parts,
548 which makes much better code. Besides, allocating DCmode
549 pseudos overstrains reload on some machines like the 386. */
550 rtx realpart, imagpart;
551 int size = GET_MODE_UNIT_SIZE (mode);
552 enum machine_mode partmode
553 = mode_for_size (size * BITS_PER_UNIT,
554 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
555 ? MODE_FLOAT : MODE_INT),
558 realpart = gen_reg_rtx (partmode);
559 imagpart = gen_reg_rtx (partmode);
560 return gen_rtx_CONCAT (mode, realpart, imagpart);
563 /* Make sure regno_pointer_flag and regno_reg_rtx are large
564 enough to have an element for this pseudo reg number. */
566 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
568 int old_size = f->emit->regno_pointer_flag_length;
571 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
572 memset (new + old_size, 0, old_size);
573 f->emit->regno_pointer_flag = new;
575 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
576 memset (new + old_size, 0, old_size);
577 f->emit->regno_pointer_align = (unsigned char *) new;
579 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
580 old_size * 2 * sizeof (rtx));
581 memset (new1 + old_size, 0, old_size * sizeof (rtx));
582 regno_reg_rtx = new1;
584 f->emit->regno_pointer_flag_length = old_size * 2;
587 val = gen_rtx_raw_REG (mode, reg_rtx_no);
588 regno_reg_rtx[reg_rtx_no++] = val;
592 /* Identify REG (which may be a CONCAT) as a user register. */
598 if (GET_CODE (reg) == CONCAT)
600 REG_USERVAR_P (XEXP (reg, 0)) = 1;
601 REG_USERVAR_P (XEXP (reg, 1)) = 1;
603 else if (GET_CODE (reg) == REG)
604 REG_USERVAR_P (reg) = 1;
609 /* Identify REG as a probable pointer register and show its alignment
610 as ALIGN, if nonzero. */
613 mark_reg_pointer (reg, align)
617 if (! REGNO_POINTER_FLAG (REGNO (reg)))
619 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
622 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
624 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
625 /* We can no-longer be sure just how aligned this pointer is */
626 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
629 /* Return 1 plus largest pseudo reg number used in the current function. */
637 /* Return 1 + the largest label number used so far in the current function. */
642 if (last_label_num && label_num == base_label_num)
643 return last_label_num;
647 /* Return first label number used in this function (if any were used). */
650 get_first_label_num ()
652 return first_label_num;
655 /* Return a value representing some low-order bits of X, where the number
656 of low-order bits is given by MODE. Note that no conversion is done
657 between floating-point and fixed-point values, rather, the bit
658 representation is returned.
660 This function handles the cases in common between gen_lowpart, below,
661 and two variants in cse.c and combine.c. These are the cases that can
662 be safely handled at all points in the compilation.
664 If this is not a case we can handle, return 0. */
667 gen_lowpart_common (mode, x)
668 enum machine_mode mode;
673 if (GET_MODE (x) == mode)
676 /* MODE must occupy no more words than the mode of X. */
677 if (GET_MODE (x) != VOIDmode
678 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
679 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
683 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
684 word = ((GET_MODE_SIZE (GET_MODE (x))
685 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
688 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
689 && (GET_MODE_CLASS (mode) == MODE_INT
690 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
692 /* If we are getting the low-order part of something that has been
693 sign- or zero-extended, we can either just use the object being
694 extended or make a narrower extension. If we want an even smaller
695 piece than the size of the object being extended, call ourselves
698 This case is used mostly by combine and cse. */
700 if (GET_MODE (XEXP (x, 0)) == mode)
702 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
703 return gen_lowpart_common (mode, XEXP (x, 0));
704 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
705 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
707 else if (GET_CODE (x) == SUBREG
708 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
709 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
710 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
712 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
713 else if (GET_CODE (x) == REG)
715 /* Let the backend decide how many registers to skip. This is needed
716 in particular for Sparc64 where fp regs are smaller than a word. */
717 /* ??? Note that subregs are now ambiguous, in that those against
718 pseudos are sized by the Word Size, while those against hard
719 regs are sized by the underlying register size. Better would be
720 to always interpret the subreg offset parameter as bytes or bits. */
722 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
723 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
724 - HARD_REGNO_NREGS (REGNO (x), mode));
726 /* If the register is not valid for MODE, return 0. If we don't
727 do this, there is no way to fix up the resulting REG later.
728 But we do do this if the current REG is not valid for its
729 mode. This latter is a kludge, but is required due to the
730 way that parameters are passed on some machines, most
732 if (REGNO (x) < FIRST_PSEUDO_REGISTER
733 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
734 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
736 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
737 /* integrate.c can't handle parts of a return value register. */
738 && (! REG_FUNCTION_VALUE_P (x)
739 || ! rtx_equal_function_value_matters)
740 #ifdef CLASS_CANNOT_CHANGE_MODE
741 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
742 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
743 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
744 && (TEST_HARD_REG_BIT
745 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
748 /* We want to keep the stack, frame, and arg pointers
750 && x != frame_pointer_rtx
751 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
752 && x != arg_pointer_rtx
754 && x != stack_pointer_rtx)
755 return gen_rtx_REG (mode, REGNO (x) + word);
757 return gen_rtx_SUBREG (mode, x, word);
759 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
760 from the low-order part of the constant. */
761 else if ((GET_MODE_CLASS (mode) == MODE_INT
762 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
763 && GET_MODE (x) == VOIDmode
764 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
766 /* If MODE is twice the host word size, X is already the desired
767 representation. Otherwise, if MODE is wider than a word, we can't
768 do this. If MODE is exactly a word, return just one CONST_INT.
769 If MODE is smaller than a word, clear the bits that don't belong
770 in our mode, unless they and our sign bit are all one. So we get
771 either a reasonable negative value or a reasonable unsigned value
774 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
776 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
778 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
779 return (GET_CODE (x) == CONST_INT ? x
780 : GEN_INT (CONST_DOUBLE_LOW (x)));
783 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
784 int width = GET_MODE_BITSIZE (mode);
785 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
786 : CONST_DOUBLE_LOW (x));
788 /* Sign extend to HOST_WIDE_INT. */
789 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
791 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
796 /* If X is an integral constant but we want it in floating-point, it
797 must be the case that we have a union of an integer and a floating-point
798 value. If the machine-parameters allow it, simulate that union here
799 and return the result. The two-word and single-word cases are
802 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
803 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
804 || flag_pretend_float)
805 && GET_MODE_CLASS (mode) == MODE_FLOAT
806 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
807 && GET_CODE (x) == CONST_INT
808 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
809 #ifdef REAL_ARITHMETIC
815 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
816 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
820 union {HOST_WIDE_INT i; float d; } u;
823 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
826 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
827 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
828 || flag_pretend_float)
829 && GET_MODE_CLASS (mode) == MODE_FLOAT
830 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
831 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
832 && GET_MODE (x) == VOIDmode
833 && (sizeof (double) * HOST_BITS_PER_CHAR
834 == 2 * HOST_BITS_PER_WIDE_INT))
835 #ifdef REAL_ARITHMETIC
839 HOST_WIDE_INT low, high;
841 if (GET_CODE (x) == CONST_INT)
842 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
844 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
846 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
848 if (WORDS_BIG_ENDIAN)
849 i[0] = high, i[1] = low;
851 i[0] = low, i[1] = high;
853 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
854 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
858 union {HOST_WIDE_INT i[2]; double d; } u;
859 HOST_WIDE_INT low, high;
861 if (GET_CODE (x) == CONST_INT)
862 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
864 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
866 #ifdef HOST_WORDS_BIG_ENDIAN
867 u.i[0] = high, u.i[1] = low;
869 u.i[0] = low, u.i[1] = high;
872 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
876 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
877 same as sizeof (double) or when sizeof (float) is larger than the
878 size of a word on the target machine. */
879 #ifdef REAL_ARITHMETIC
880 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
886 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
887 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
889 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
890 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
891 || flag_pretend_float)
892 && GET_MODE_CLASS (mode) == MODE_FLOAT
893 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
894 && GET_CODE (x) == CONST_INT
895 && (sizeof (double) * HOST_BITS_PER_CHAR
896 == HOST_BITS_PER_WIDE_INT))
902 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
903 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
907 /* Similarly, if this is converting a floating-point value into a
908 single-word integer. Only do this is the host and target parameters are
911 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
912 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
913 || flag_pretend_float)
914 && (GET_MODE_CLASS (mode) == MODE_INT
915 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
916 && GET_CODE (x) == CONST_DOUBLE
917 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
918 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
919 return operand_subword (x, word, 0, GET_MODE (x));
921 /* Similarly, if this is converting a floating-point value into a
922 two-word integer, we can do this one word at a time and make an
923 integer. Only do this is the host and target parameters are
926 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
927 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
928 || flag_pretend_float)
929 && (GET_MODE_CLASS (mode) == MODE_INT
930 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
931 && GET_CODE (x) == CONST_DOUBLE
932 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
933 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
936 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
938 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
940 if (lowpart && GET_CODE (lowpart) == CONST_INT
941 && highpart && GET_CODE (highpart) == CONST_INT)
942 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
945 /* Otherwise, we can't do this. */
949 /* Return the real part (which has mode MODE) of a complex value X.
950 This always comes at the low address in memory. */
953 gen_realpart (mode, x)
954 enum machine_mode mode;
957 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
959 else if (WORDS_BIG_ENDIAN
960 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
962 && REGNO (x) < FIRST_PSEUDO_REGISTER)
963 fatal ("Unable to access real part of complex value in a hard register on this target");
964 else if (WORDS_BIG_ENDIAN)
965 return gen_highpart (mode, x);
967 return gen_lowpart (mode, x);
970 /* Return the imaginary part (which has mode MODE) of a complex value X.
971 This always comes at the high address in memory. */
974 gen_imagpart (mode, x)
975 enum machine_mode mode;
978 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
980 else if (WORDS_BIG_ENDIAN)
981 return gen_lowpart (mode, x);
982 else if (!WORDS_BIG_ENDIAN
983 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
985 && REGNO (x) < FIRST_PSEUDO_REGISTER)
986 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
988 return gen_highpart (mode, x);
991 /* Return 1 iff X, assumed to be a SUBREG,
992 refers to the real part of the complex value in its containing reg.
993 Complex values are always stored with the real part in the first word,
994 regardless of WORDS_BIG_ENDIAN. */
997 subreg_realpart_p (x)
1000 if (GET_CODE (x) != SUBREG)
1003 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1004 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1007 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1008 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1009 least-significant part of X.
1010 MODE specifies how big a part of X to return;
1011 it usually should not be larger than a word.
1012 If X is a MEM whose address is a QUEUED, the value may be so also. */
1015 gen_lowpart (mode, x)
1016 enum machine_mode mode;
1019 rtx result = gen_lowpart_common (mode, x);
1023 else if (GET_CODE (x) == REG)
1025 /* Must be a hard reg that's not valid in MODE. */
1026 result = gen_lowpart_common (mode, copy_to_reg (x));
1031 else if (GET_CODE (x) == MEM)
1033 /* The only additional case we can do is MEM. */
1034 register int offset = 0;
1035 if (WORDS_BIG_ENDIAN)
1036 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1037 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1039 if (BYTES_BIG_ENDIAN)
1040 /* Adjust the address so that the address-after-the-data
1042 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1043 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1045 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1047 else if (GET_CODE (x) == ADDRESSOF)
1048 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1053 /* Like `gen_lowpart', but refer to the most significant part.
1054 This is used to access the imaginary part of a complex number. */
1057 gen_highpart (mode, x)
1058 enum machine_mode mode;
1061 /* This case loses if X is a subreg. To catch bugs early,
1062 complain if an invalid MODE is used even in other cases. */
1063 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1064 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1066 if (GET_CODE (x) == CONST_DOUBLE
1067 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1068 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1071 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1072 else if (GET_CODE (x) == CONST_INT)
1074 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1076 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1078 else if (GET_CODE (x) == MEM)
1080 register int offset = 0;
1081 if (! WORDS_BIG_ENDIAN)
1082 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1083 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1085 if (! BYTES_BIG_ENDIAN
1086 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1087 offset -= (GET_MODE_SIZE (mode)
1088 - MIN (UNITS_PER_WORD,
1089 GET_MODE_SIZE (GET_MODE (x))));
1091 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1093 else if (GET_CODE (x) == SUBREG)
1095 /* The only time this should occur is when we are looking at a
1096 multi-word item with a SUBREG whose mode is the same as that of the
1097 item. It isn't clear what we would do if it wasn't. */
1098 if (SUBREG_WORD (x) != 0)
1100 return gen_highpart (mode, SUBREG_REG (x));
1102 else if (GET_CODE (x) == REG)
1106 /* Let the backend decide how many registers to skip. This is needed
1107 in particular for sparc64 where fp regs are smaller than a word. */
1108 /* ??? Note that subregs are now ambiguous, in that those against
1109 pseudos are sized by the word size, while those against hard
1110 regs are sized by the underlying register size. Better would be
1111 to always interpret the subreg offset parameter as bytes or bits. */
1113 if (WORDS_BIG_ENDIAN)
1115 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1116 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1117 - HARD_REGNO_NREGS (REGNO (x), mode));
1119 word = ((GET_MODE_SIZE (GET_MODE (x))
1120 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1123 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1124 /* integrate.c can't handle parts of a return value register. */
1125 && (! REG_FUNCTION_VALUE_P (x)
1126 || ! rtx_equal_function_value_matters)
1127 /* We want to keep the stack, frame, and arg pointers special. */
1128 && x != frame_pointer_rtx
1129 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1130 && x != arg_pointer_rtx
1132 && x != stack_pointer_rtx)
1133 return gen_rtx_REG (mode, REGNO (x) + word);
1135 return gen_rtx_SUBREG (mode, x, word);
1141 /* Return 1 iff X, assumed to be a SUBREG,
1142 refers to the least significant part of its containing reg.
1143 If X is not a SUBREG, always return 1 (it is its own low part!). */
1146 subreg_lowpart_p (x)
1149 if (GET_CODE (x) != SUBREG)
1151 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1154 if (WORDS_BIG_ENDIAN
1155 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1156 return (SUBREG_WORD (x)
1157 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1158 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1161 return SUBREG_WORD (x) == 0;
1164 /* Return subword I of operand OP.
1165 The word number, I, is interpreted as the word number starting at the
1166 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1167 otherwise it is the high-order word.
1169 If we cannot extract the required word, we return zero. Otherwise, an
1170 rtx corresponding to the requested word will be returned.
1172 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1173 reload has completed, a valid address will always be returned. After
1174 reload, if a valid address cannot be returned, we return zero.
1176 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1177 it is the responsibility of the caller.
1179 MODE is the mode of OP in case it is a CONST_INT. */
1182 operand_subword (op, i, validate_address, mode)
1185 int validate_address;
1186 enum machine_mode mode;
1189 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1191 if (mode == VOIDmode)
1192 mode = GET_MODE (op);
1194 if (mode == VOIDmode)
1197 /* If OP is narrower than a word, fail. */
1199 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1202 /* If we want a word outside OP, return zero. */
1204 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1207 /* If OP is already an integer word, return it. */
1208 if (GET_MODE_CLASS (mode) == MODE_INT
1209 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1212 /* If OP is a REG or SUBREG, we can handle it very simply. */
1213 if (GET_CODE (op) == REG)
1215 /* ??? There is a potential problem with this code. It does not
1216 properly handle extractions of a subword from a hard register
1217 that is larger than word_mode. Presumably the check for
1218 HARD_REGNO_MODE_OK catches these most of these cases. */
1220 /* If OP is a hard register, but OP + I is not a hard register,
1221 then extracting a subword is impossible.
1223 For example, consider if OP is the last hard register and it is
1224 larger than word_mode. If we wanted word N (for N > 0) because a
1225 part of that hard register was known to contain a useful value,
1226 then OP + I would refer to a pseudo, not the hard register we
1228 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1229 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1232 /* If the register is not valid for MODE, return 0. Note we
1233 have to check both OP and OP + I since they may refer to
1234 different parts of the register file.
1236 Consider if OP refers to the last 96bit FP register and we want
1237 subword 3 because that subword is known to contain a value we
1239 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1240 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1241 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1243 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1244 || (REG_FUNCTION_VALUE_P (op)
1245 && rtx_equal_function_value_matters)
1246 /* We want to keep the stack, frame, and arg pointers
1248 || op == frame_pointer_rtx
1249 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1250 || op == arg_pointer_rtx
1252 || op == stack_pointer_rtx)
1253 return gen_rtx_SUBREG (word_mode, op, i);
1255 return gen_rtx_REG (word_mode, REGNO (op) + i);
1257 else if (GET_CODE (op) == SUBREG)
1258 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1259 else if (GET_CODE (op) == CONCAT)
1261 unsigned int partwords
1262 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1265 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1266 return operand_subword (XEXP (op, 1), i - partwords,
1267 validate_address, mode);
1270 /* Form a new MEM at the requested address. */
1271 if (GET_CODE (op) == MEM)
1273 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1276 if (validate_address)
1278 if (reload_completed)
1280 if (! strict_memory_address_p (word_mode, addr))
1284 addr = memory_address (word_mode, addr);
1287 new = gen_rtx_MEM (word_mode, addr);
1288 MEM_COPY_ATTRIBUTES (new, op);
1292 /* The only remaining cases are when OP is a constant. If the host and
1293 target floating formats are the same, handling two-word floating
1294 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1295 are defined as returning one or two 32 bit values, respectively,
1296 and not values of BITS_PER_WORD bits. */
1297 #ifdef REAL_ARITHMETIC
1298 /* The output is some bits, the width of the target machine's word.
1299 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1301 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1302 && GET_MODE_CLASS (mode) == MODE_FLOAT
1303 && GET_MODE_BITSIZE (mode) == 64
1304 && GET_CODE (op) == CONST_DOUBLE)
1309 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1310 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1312 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1313 which the words are written depends on the word endianness.
1314 ??? This is a potential portability problem and should
1315 be fixed at some point.
1317 We must excercise caution with the sign bit. By definition there
1318 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1319 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1320 So we explicitly mask and sign-extend as necessary. */
1321 if (BITS_PER_WORD == 32)
1324 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1325 return GEN_INT (val);
1327 #if HOST_BITS_PER_WIDE_INT >= 64
1328 else if (BITS_PER_WORD >= 64 && i == 0)
1330 val = k[! WORDS_BIG_ENDIAN];
1331 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1332 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1333 return GEN_INT (val);
1336 else if (BITS_PER_WORD == 16)
1339 if ((i & 1) == !WORDS_BIG_ENDIAN)
1342 return GEN_INT (val);
1347 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1348 && GET_MODE_CLASS (mode) == MODE_FLOAT
1349 && GET_MODE_BITSIZE (mode) > 64
1350 && GET_CODE (op) == CONST_DOUBLE)
1355 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1356 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1358 if (BITS_PER_WORD == 32)
1361 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1362 return GEN_INT (val);
1364 #if HOST_BITS_PER_WIDE_INT >= 64
1365 else if (BITS_PER_WORD >= 64 && i <= 1)
1367 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1368 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1369 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1370 return GEN_INT (val);
1376 #else /* no REAL_ARITHMETIC */
1377 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1378 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1379 || flag_pretend_float)
1380 && GET_MODE_CLASS (mode) == MODE_FLOAT
1381 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1382 && GET_CODE (op) == CONST_DOUBLE)
1384 /* The constant is stored in the host's word-ordering,
1385 but we want to access it in the target's word-ordering. Some
1386 compilers don't like a conditional inside macro args, so we have two
1387 copies of the return. */
1388 #ifdef HOST_WORDS_BIG_ENDIAN
1389 return GEN_INT (i == WORDS_BIG_ENDIAN
1390 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1392 return GEN_INT (i != WORDS_BIG_ENDIAN
1393 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1396 #endif /* no REAL_ARITHMETIC */
1398 /* Single word float is a little harder, since single- and double-word
1399 values often do not have the same high-order bits. We have already
1400 verified that we want the only defined word of the single-word value. */
1401 #ifdef REAL_ARITHMETIC
1402 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1403 && GET_MODE_BITSIZE (mode) == 32
1404 && GET_CODE (op) == CONST_DOUBLE)
1409 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1410 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1412 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1414 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1416 if (BITS_PER_WORD == 16)
1418 if ((i & 1) == !WORDS_BIG_ENDIAN)
1423 return GEN_INT (val);
1426 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1427 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1428 || flag_pretend_float)
1429 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1430 && GET_MODE_CLASS (mode) == MODE_FLOAT
1431 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1432 && GET_CODE (op) == CONST_DOUBLE)
1435 union {float f; HOST_WIDE_INT i; } u;
1437 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1440 return GEN_INT (u.i);
1442 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1443 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1444 || flag_pretend_float)
1445 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1446 && GET_MODE_CLASS (mode) == MODE_FLOAT
1447 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1448 && GET_CODE (op) == CONST_DOUBLE)
1451 union {double d; HOST_WIDE_INT i; } u;
1453 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1456 return GEN_INT (u.i);
1458 #endif /* no REAL_ARITHMETIC */
1460 /* The only remaining cases that we can handle are integers.
1461 Convert to proper endianness now since these cases need it.
1462 At this point, i == 0 means the low-order word.
1464 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1465 in general. However, if OP is (const_int 0), we can just return
1468 if (op == const0_rtx)
1471 if (GET_MODE_CLASS (mode) != MODE_INT
1472 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1473 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1476 if (WORDS_BIG_ENDIAN)
1477 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1479 /* Find out which word on the host machine this value is in and get
1480 it from the constant. */
1481 val = (i / size_ratio == 0
1482 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1483 : (GET_CODE (op) == CONST_INT
1484 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1486 /* Get the value we want into the low bits of val. */
1487 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1488 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1490 val = trunc_int_for_mode (val, word_mode);
1492 return GEN_INT (val);
1495 /* Similar to `operand_subword', but never return 0. If we can't extract
1496 the required subword, put OP into a register and try again. If that fails,
1497 abort. We always validate the address in this case. It is not valid
1498 to call this function after reload; it is mostly meant for RTL
1501 MODE is the mode of OP, in case it is CONST_INT. */
1504 operand_subword_force (op, i, mode)
1507 enum machine_mode mode;
1509 rtx result = operand_subword (op, i, 1, mode);
1514 if (mode != BLKmode && mode != VOIDmode)
1516 /* If this is a register which can not be accessed by words, copy it
1517 to a pseudo register. */
1518 if (GET_CODE (op) == REG)
1519 op = copy_to_reg (op);
1521 op = force_reg (mode, op);
1524 result = operand_subword (op, i, 1, mode);
1531 /* Given a compare instruction, swap the operands.
1532 A test instruction is changed into a compare of 0 against the operand. */
1535 reverse_comparison (insn)
1538 rtx body = PATTERN (insn);
1541 if (GET_CODE (body) == SET)
1542 comp = SET_SRC (body);
1544 comp = SET_SRC (XVECEXP (body, 0, 0));
1546 if (GET_CODE (comp) == COMPARE)
1548 rtx op0 = XEXP (comp, 0);
1549 rtx op1 = XEXP (comp, 1);
1550 XEXP (comp, 0) = op1;
1551 XEXP (comp, 1) = op0;
1555 rtx new = gen_rtx_COMPARE (VOIDmode,
1556 CONST0_RTX (GET_MODE (comp)), comp);
1557 if (GET_CODE (body) == SET)
1558 SET_SRC (body) = new;
1560 SET_SRC (XVECEXP (body, 0, 0)) = new;
1564 /* Return a memory reference like MEMREF, but with its mode changed
1565 to MODE and its address changed to ADDR.
1566 (VOIDmode means don't change the mode.
1567 NULL for ADDR means don't change the address.) */
1570 change_address (memref, mode, addr)
1572 enum machine_mode mode;
1577 if (GET_CODE (memref) != MEM)
1579 if (mode == VOIDmode)
1580 mode = GET_MODE (memref);
1582 addr = XEXP (memref, 0);
1584 /* If reload is in progress or has completed, ADDR must be valid.
1585 Otherwise, we can call memory_address to make it valid. */
1586 if (reload_completed || reload_in_progress)
1588 if (! memory_address_p (mode, addr))
1592 addr = memory_address (mode, addr);
1594 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1597 new = gen_rtx_MEM (mode, addr);
1598 MEM_COPY_ATTRIBUTES (new, memref);
1602 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1609 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1610 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1612 LABEL_NUSES (label) = 0;
1613 LABEL_ALTERNATE_NAME (label) = NULL;
1617 /* For procedure integration. */
1619 /* Install new pointers to the first and last insns in the chain.
1620 Also, set cur_insn_uid to one higher than the last in use.
1621 Used for an inline-procedure after copying the insn chain. */
1624 set_new_first_and_last_insn (first, last)
1633 for (insn = first; insn; insn = NEXT_INSN (insn))
1634 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1639 /* Set the range of label numbers found in the current function.
1640 This is used when belatedly compiling an inline function. */
1643 set_new_first_and_last_label_num (first, last)
1646 base_label_num = label_num;
1647 first_label_num = first;
1648 last_label_num = last;
1651 /* Set the last label number found in the current function.
1652 This is used when belatedly compiling an inline function. */
1655 set_new_last_label_num (last)
1658 base_label_num = label_num;
1659 last_label_num = last;
1662 /* Restore all variables describing the current status from the structure *P.
1663 This is used after a nested function. */
1666 restore_emit_status (p)
1667 struct function *p ATTRIBUTE_UNUSED;
1670 clear_emit_caches ();
1673 /* Clear out all parts of the state in F that can safely be discarded
1674 after the function has been compiled, to let garbage collection
1675 reclaim the memory. */
1678 free_emit_status (f)
1681 free (f->emit->x_regno_reg_rtx);
1682 free (f->emit->regno_pointer_flag);
1683 free (f->emit->regno_pointer_align);
1688 /* Go through all the RTL insn bodies and copy any invalid shared
1689 structure. This routine should only be called once. */
1692 unshare_all_rtl (fndecl, insn)
1698 /* Make sure that virtual parameters are not shared. */
1699 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1700 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1702 /* Make sure that virtual stack slots are not shared. */
1703 unshare_all_decls (DECL_INITIAL (fndecl));
1705 /* Unshare just about everything else. */
1706 unshare_all_rtl_1 (insn);
1708 /* Make sure the addresses of stack slots found outside the insn chain
1709 (such as, in DECL_RTL of a variable) are not shared
1710 with the insn chain.
1712 This special care is necessary when the stack slot MEM does not
1713 actually appear in the insn chain. If it does appear, its address
1714 is unshared from all else at that point. */
1715 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1718 /* Go through all the RTL insn bodies and copy any invalid shared
1719 structure, again. This is a fairly expensive thing to do so it
1720 should be done sparingly. */
1723 unshare_all_rtl_again (insn)
1729 for (p = insn; p; p = NEXT_INSN (p))
1730 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
1732 reset_used_flags (PATTERN (p));
1733 reset_used_flags (REG_NOTES (p));
1734 reset_used_flags (LOG_LINKS (p));
1737 /* Make sure that virtual stack slots are not shared. */
1738 reset_used_decls (DECL_INITIAL (cfun->decl));
1740 /* Make sure that virtual parameters are not shared. */
1741 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1742 reset_used_flags (DECL_RTL (decl));
1744 reset_used_flags (stack_slot_list);
1746 unshare_all_rtl (cfun->decl, insn);
1749 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1750 Assumes the mark bits are cleared at entry. */
1753 unshare_all_rtl_1 (insn)
1756 for (; insn; insn = NEXT_INSN (insn))
1757 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1759 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1760 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1761 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1765 /* Go through all virtual stack slots of a function and copy any
1766 shared structure. */
1768 unshare_all_decls (blk)
1773 /* Copy shared decls. */
1774 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1775 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1777 /* Now process sub-blocks. */
1778 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1779 unshare_all_decls (t);
1782 /* Go through all virtual stack slots of a function and mark them as
1785 reset_used_decls (blk)
1791 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1792 reset_used_flags (DECL_RTL (t));
1794 /* Now process sub-blocks. */
1795 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1796 reset_used_decls (t);
1799 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1800 Recursively does the same for subexpressions. */
1803 copy_rtx_if_shared (orig)
1806 register rtx x = orig;
1808 register enum rtx_code code;
1809 register const char *format_ptr;
1815 code = GET_CODE (x);
1817 /* These types may be freely shared. */
1830 /* SCRATCH must be shared because they represent distinct values. */
1834 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1835 a LABEL_REF, it isn't sharable. */
1836 if (GET_CODE (XEXP (x, 0)) == PLUS
1837 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1838 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1847 /* The chain of insns is not being copied. */
1851 /* A MEM is allowed to be shared if its address is constant.
1853 We used to allow sharing of MEMs which referenced
1854 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1855 that can lose. instantiate_virtual_regs will not unshare
1856 the MEMs, and combine may change the structure of the address
1857 because it looks safe and profitable in one context, but
1858 in some other context it creates unrecognizable RTL. */
1859 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1868 /* This rtx may not be shared. If it has already been seen,
1869 replace it with a copy of itself. */
1875 copy = rtx_alloc (code);
1876 bcopy ((char *) x, (char *) copy,
1877 (sizeof (*copy) - sizeof (copy->fld)
1878 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1884 /* Now scan the subexpressions recursively.
1885 We can store any replaced subexpressions directly into X
1886 since we know X is not shared! Any vectors in X
1887 must be copied if X was copied. */
1889 format_ptr = GET_RTX_FORMAT (code);
1891 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1893 switch (*format_ptr++)
1896 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1900 if (XVEC (x, i) != NULL)
1903 int len = XVECLEN (x, i);
1905 if (copied && len > 0)
1906 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1907 for (j = 0; j < len; j++)
1908 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1916 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1917 to look for shared sub-parts. */
1920 reset_used_flags (x)
1924 register enum rtx_code code;
1925 register const char *format_ptr;
1930 code = GET_CODE (x);
1932 /* These types may be freely shared so we needn't do any resetting
1953 /* The chain of insns is not being copied. */
1962 format_ptr = GET_RTX_FORMAT (code);
1963 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1965 switch (*format_ptr++)
1968 reset_used_flags (XEXP (x, i));
1972 for (j = 0; j < XVECLEN (x, i); j++)
1973 reset_used_flags (XVECEXP (x, i, j));
1979 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1980 Return X or the rtx for the pseudo reg the value of X was copied into.
1981 OTHER must be valid as a SET_DEST. */
1984 make_safe_from (x, other)
1988 switch (GET_CODE (other))
1991 other = SUBREG_REG (other);
1993 case STRICT_LOW_PART:
1996 other = XEXP (other, 0);
2002 if ((GET_CODE (other) == MEM
2004 && GET_CODE (x) != REG
2005 && GET_CODE (x) != SUBREG)
2006 || (GET_CODE (other) == REG
2007 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2008 || reg_mentioned_p (other, x))))
2010 rtx temp = gen_reg_rtx (GET_MODE (x));
2011 emit_move_insn (temp, x);
2017 /* Emission of insns (adding them to the doubly-linked list). */
2019 /* Return the first insn of the current sequence or current function. */
2027 /* Return the last insn emitted in current sequence or current function. */
2035 /* Specify a new insn as the last in the chain. */
2038 set_last_insn (insn)
2041 if (NEXT_INSN (insn) != 0)
2046 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2049 get_last_insn_anywhere ()
2051 struct sequence_stack *stack;
2054 for (stack = seq_stack; stack; stack = stack->next)
2055 if (stack->last != 0)
2060 /* Return a number larger than any instruction's uid in this function. */
2065 return cur_insn_uid;
2068 /* Renumber instructions so that no instruction UIDs are wasted. */
2071 renumber_insns (stream)
2076 /* If we're not supposed to renumber instructions, don't. */
2077 if (!flag_renumber_insns)
2080 /* If there aren't that many instructions, then it's not really
2081 worth renumbering them. */
2082 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2087 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2090 fprintf (stream, "Renumbering insn %d to %d\n",
2091 INSN_UID (insn), cur_insn_uid);
2092 INSN_UID (insn) = cur_insn_uid++;
2096 /* Return the next insn. If it is a SEQUENCE, return the first insn
2105 insn = NEXT_INSN (insn);
2106 if (insn && GET_CODE (insn) == INSN
2107 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2108 insn = XVECEXP (PATTERN (insn), 0, 0);
2114 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2118 previous_insn (insn)
2123 insn = PREV_INSN (insn);
2124 if (insn && GET_CODE (insn) == INSN
2125 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2126 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2132 /* Return the next insn after INSN that is not a NOTE. This routine does not
2133 look inside SEQUENCEs. */
2136 next_nonnote_insn (insn)
2141 insn = NEXT_INSN (insn);
2142 if (insn == 0 || GET_CODE (insn) != NOTE)
2149 /* Return the previous insn before INSN that is not a NOTE. This routine does
2150 not look inside SEQUENCEs. */
2153 prev_nonnote_insn (insn)
2158 insn = PREV_INSN (insn);
2159 if (insn == 0 || GET_CODE (insn) != NOTE)
2166 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2167 or 0, if there is none. This routine does not look inside
2171 next_real_insn (insn)
2176 insn = NEXT_INSN (insn);
2177 if (insn == 0 || GET_CODE (insn) == INSN
2178 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2185 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2186 or 0, if there is none. This routine does not look inside
2190 prev_real_insn (insn)
2195 insn = PREV_INSN (insn);
2196 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2197 || GET_CODE (insn) == JUMP_INSN)
2204 /* Find the next insn after INSN that really does something. This routine
2205 does not look inside SEQUENCEs. Until reload has completed, this is the
2206 same as next_real_insn. */
2209 active_insn_p (insn)
2212 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2213 || (GET_CODE (insn) == INSN
2214 && (! reload_completed
2215 || (GET_CODE (PATTERN (insn)) != USE
2216 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2220 next_active_insn (insn)
2225 insn = NEXT_INSN (insn);
2226 if (insn == 0 || active_insn_p (insn))
2233 /* Find the last insn before INSN that really does something. This routine
2234 does not look inside SEQUENCEs. Until reload has completed, this is the
2235 same as prev_real_insn. */
2238 prev_active_insn (insn)
2243 insn = PREV_INSN (insn);
2244 if (insn == 0 || active_insn_p (insn))
2251 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2259 insn = NEXT_INSN (insn);
2260 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2267 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2275 insn = PREV_INSN (insn);
2276 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2284 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2285 and REG_CC_USER notes so we can find it. */
2288 link_cc0_insns (insn)
2291 rtx user = next_nonnote_insn (insn);
2293 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2294 user = XVECEXP (PATTERN (user), 0, 0);
2296 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2298 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2301 /* Return the next insn that uses CC0 after INSN, which is assumed to
2302 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2303 applied to the result of this function should yield INSN).
2305 Normally, this is simply the next insn. However, if a REG_CC_USER note
2306 is present, it contains the insn that uses CC0.
2308 Return 0 if we can't find the insn. */
2311 next_cc0_user (insn)
2314 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2317 return XEXP (note, 0);
2319 insn = next_nonnote_insn (insn);
2320 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2321 insn = XVECEXP (PATTERN (insn), 0, 0);
2323 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2324 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2330 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2331 note, it is the previous insn. */
2334 prev_cc0_setter (insn)
2337 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2340 return XEXP (note, 0);
2342 insn = prev_nonnote_insn (insn);
2343 if (! sets_cc0_p (PATTERN (insn)))
2350 /* Try splitting insns that can be split for better scheduling.
2351 PAT is the pattern which might split.
2352 TRIAL is the insn providing PAT.
2353 LAST is non-zero if we should return the last insn of the sequence produced.
2355 If this routine succeeds in splitting, it returns the first or last
2356 replacement insn depending on the value of LAST. Otherwise, it
2357 returns TRIAL. If the insn to be returned can be split, it will be. */
2360 try_split (pat, trial, last)
2364 rtx before = PREV_INSN (trial);
2365 rtx after = NEXT_INSN (trial);
2366 rtx seq = split_insns (pat, trial);
2367 int has_barrier = 0;
2370 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2371 We may need to handle this specially. */
2372 if (after && GET_CODE (after) == BARRIER)
2375 after = NEXT_INSN (after);
2380 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2381 The latter case will normally arise only when being done so that
2382 it, in turn, will be split (SFmode on the 29k is an example). */
2383 if (GET_CODE (seq) == SEQUENCE)
2387 /* Avoid infinite loop if any insn of the result matches
2388 the original pattern. */
2389 for (i = 0; i < XVECLEN (seq, 0); i++)
2390 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2391 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2394 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2395 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2396 increment the usage count so we don't delete the label. */
2398 if (GET_CODE (trial) == JUMP_INSN)
2399 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2400 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2402 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2404 if (JUMP_LABEL (trial))
2405 LABEL_NUSES (JUMP_LABEL (trial))++;
2408 tem = emit_insn_after (seq, before);
2410 delete_insn (trial);
2412 emit_barrier_after (tem);
2414 /* Recursively call try_split for each new insn created; by the
2415 time control returns here that insn will be fully split, so
2416 set LAST and continue from the insn after the one returned.
2417 We can't use next_active_insn here since AFTER may be a note.
2418 Ignore deleted insns, which can be occur if not optimizing. */
2419 for (tem = NEXT_INSN (before); tem != after;
2420 tem = NEXT_INSN (tem))
2421 if (! INSN_DELETED_P (tem)
2422 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2423 tem = try_split (PATTERN (tem), tem, 1);
2425 /* Avoid infinite loop if the result matches the original pattern. */
2426 else if (rtx_equal_p (seq, pat))
2430 PATTERN (trial) = seq;
2431 INSN_CODE (trial) = -1;
2432 try_split (seq, trial, last);
2435 /* Return either the first or the last insn, depending on which was
2438 ? (after ? prev_active_insn (after) : last_insn)
2439 : next_active_insn (before);
2445 /* Make and return an INSN rtx, initializing all its slots.
2446 Store PATTERN in the pattern slots. */
2449 make_insn_raw (pattern)
2454 /* If in RTL generation phase, see if FREE_INSN can be used. */
2455 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2458 free_insn = NEXT_INSN (free_insn);
2459 PUT_CODE (insn, INSN);
2462 insn = rtx_alloc (INSN);
2464 INSN_UID (insn) = cur_insn_uid++;
2465 PATTERN (insn) = pattern;
2466 INSN_CODE (insn) = -1;
2467 LOG_LINKS (insn) = NULL;
2468 REG_NOTES (insn) = NULL;
2470 #ifdef ENABLE_RTL_CHECKING
2472 && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2473 && (returnjump_p (insn)
2474 || (GET_CODE (insn) == SET
2475 && SET_DEST (insn) == pc_rtx)))
2477 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2485 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2488 make_jump_insn_raw (pattern)
2493 insn = rtx_alloc (JUMP_INSN);
2494 INSN_UID (insn) = cur_insn_uid++;
2496 PATTERN (insn) = pattern;
2497 INSN_CODE (insn) = -1;
2498 LOG_LINKS (insn) = NULL;
2499 REG_NOTES (insn) = NULL;
2500 JUMP_LABEL (insn) = NULL;
2505 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2508 make_call_insn_raw (pattern)
2513 insn = rtx_alloc (CALL_INSN);
2514 INSN_UID (insn) = cur_insn_uid++;
2516 PATTERN (insn) = pattern;
2517 INSN_CODE (insn) = -1;
2518 LOG_LINKS (insn) = NULL;
2519 REG_NOTES (insn) = NULL;
2520 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2525 /* Add INSN to the end of the doubly-linked list.
2526 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2532 PREV_INSN (insn) = last_insn;
2533 NEXT_INSN (insn) = 0;
2535 if (NULL != last_insn)
2536 NEXT_INSN (last_insn) = insn;
2538 if (NULL == first_insn)
2544 /* Add INSN into the doubly-linked list after insn AFTER. This and
2545 the next should be the only functions called to insert an insn once
2546 delay slots have been filled since only they know how to update a
2550 add_insn_after (insn, after)
2553 rtx next = NEXT_INSN (after);
2555 if (optimize && INSN_DELETED_P (after))
2558 NEXT_INSN (insn) = next;
2559 PREV_INSN (insn) = after;
2563 PREV_INSN (next) = insn;
2564 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2565 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2567 else if (last_insn == after)
2571 struct sequence_stack *stack = seq_stack;
2572 /* Scan all pending sequences too. */
2573 for (; stack; stack = stack->next)
2574 if (after == stack->last)
2584 NEXT_INSN (after) = insn;
2585 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2587 rtx sequence = PATTERN (after);
2588 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2592 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2593 the previous should be the only functions called to insert an insn once
2594 delay slots have been filled since only they know how to update a
2598 add_insn_before (insn, before)
2601 rtx prev = PREV_INSN (before);
2603 if (optimize && INSN_DELETED_P (before))
2606 PREV_INSN (insn) = prev;
2607 NEXT_INSN (insn) = before;
2611 NEXT_INSN (prev) = insn;
2612 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2614 rtx sequence = PATTERN (prev);
2615 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2618 else if (first_insn == before)
2622 struct sequence_stack *stack = seq_stack;
2623 /* Scan all pending sequences too. */
2624 for (; stack; stack = stack->next)
2625 if (before == stack->first)
2627 stack->first = insn;
2635 PREV_INSN (before) = insn;
2636 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2637 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2640 /* Remove an insn from its doubly-linked list. This function knows how
2641 to handle sequences. */
2646 rtx next = NEXT_INSN (insn);
2647 rtx prev = PREV_INSN (insn);
2650 NEXT_INSN (prev) = next;
2651 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2653 rtx sequence = PATTERN (prev);
2654 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2657 else if (first_insn == insn)
2661 struct sequence_stack *stack = seq_stack;
2662 /* Scan all pending sequences too. */
2663 for (; stack; stack = stack->next)
2664 if (insn == stack->first)
2666 stack->first = next;
2676 PREV_INSN (next) = prev;
2677 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2678 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2680 else if (last_insn == insn)
2684 struct sequence_stack *stack = seq_stack;
2685 /* Scan all pending sequences too. */
2686 for (; stack; stack = stack->next)
2687 if (insn == stack->last)
2698 /* Delete all insns made since FROM.
2699 FROM becomes the new last instruction. */
2702 delete_insns_since (from)
2708 NEXT_INSN (from) = 0;
2712 /* This function is deprecated, please use sequences instead.
2714 Move a consecutive bunch of insns to a different place in the chain.
2715 The insns to be moved are those between FROM and TO.
2716 They are moved to a new position after the insn AFTER.
2717 AFTER must not be FROM or TO or any insn in between.
2719 This function does not know about SEQUENCEs and hence should not be
2720 called after delay-slot filling has been done. */
2723 reorder_insns (from, to, after)
2724 rtx from, to, after;
2726 /* Splice this bunch out of where it is now. */
2727 if (PREV_INSN (from))
2728 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2730 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2731 if (last_insn == to)
2732 last_insn = PREV_INSN (from);
2733 if (first_insn == from)
2734 first_insn = NEXT_INSN (to);
2736 /* Make the new neighbors point to it and it to them. */
2737 if (NEXT_INSN (after))
2738 PREV_INSN (NEXT_INSN (after)) = to;
2740 NEXT_INSN (to) = NEXT_INSN (after);
2741 PREV_INSN (from) = after;
2742 NEXT_INSN (after) = from;
2743 if (after == last_insn)
2747 /* Return the line note insn preceding INSN. */
2750 find_line_note (insn)
2753 if (no_line_numbers)
2756 for (; insn; insn = PREV_INSN (insn))
2757 if (GET_CODE (insn) == NOTE
2758 && NOTE_LINE_NUMBER (insn) >= 0)
2764 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2765 of the moved insns when debugging. This may insert a note between AFTER
2766 and FROM, and another one after TO. */
2769 reorder_insns_with_line_notes (from, to, after)
2770 rtx from, to, after;
2772 rtx from_line = find_line_note (from);
2773 rtx after_line = find_line_note (after);
2775 reorder_insns (from, to, after);
2777 if (from_line == after_line)
2781 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2782 NOTE_LINE_NUMBER (from_line),
2785 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2786 NOTE_LINE_NUMBER (after_line),
2790 /* Remove unnecessary notes from the instruction stream. */
2793 remove_unnecessary_notes ()
2798 /* We must not remove the first instruction in the function because
2799 the compiler depends on the first instruction being a note. */
2800 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2802 /* Remember what's next. */
2803 next = NEXT_INSN (insn);
2805 /* We're only interested in notes. */
2806 if (GET_CODE (insn) != NOTE)
2809 /* By now, all notes indicating lexical blocks should have
2810 NOTE_BLOCK filled in. */
2811 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2812 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2813 && NOTE_BLOCK (insn) == NULL_TREE)
2816 /* Remove NOTE_INSN_DELETED notes. */
2817 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2819 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2821 /* Scan back to see if there are any non-note instructions
2822 between INSN and the beginning of this block. If not,
2823 then there is no PC range in the generated code that will
2824 actually be in this block, so there's no point in
2825 remembering the existence of the block. */
2828 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2830 /* This block contains a real instruction. Note that we
2831 don't include labels; if the only thing in the block
2832 is a label, then there are still no PC values that
2833 lie within the block. */
2834 if (GET_RTX_CLASS (GET_CODE (prev)) == 'i')
2837 /* We're only interested in NOTEs. */
2838 if (GET_CODE (prev) != NOTE)
2841 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2843 /* If the BLOCKs referred to by these notes don't
2844 match, then something is wrong with our BLOCK
2845 nesting structure. */
2846 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2849 if (debug_ignore_block (NOTE_BLOCK (insn)))
2856 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2857 /* There's a nested block. We need to leave the
2858 current block in place since otherwise the debugger
2859 wouldn't be able to show symbols from our block in
2860 the nested block. */
2868 /* Emit an insn of given code and pattern
2869 at a specified place within the doubly-linked list. */
2871 /* Make an instruction with body PATTERN
2872 and output it before the instruction BEFORE. */
2875 emit_insn_before (pattern, before)
2876 register rtx pattern, before;
2878 register rtx insn = before;
2880 if (GET_CODE (pattern) == SEQUENCE)
2884 for (i = 0; i < XVECLEN (pattern, 0); i++)
2886 insn = XVECEXP (pattern, 0, i);
2887 add_insn_before (insn, before);
2889 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2890 sequence_result[XVECLEN (pattern, 0)] = pattern;
2894 insn = make_insn_raw (pattern);
2895 add_insn_before (insn, before);
2901 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2904 emit_block_insn_before (pattern, before, block)
2905 rtx pattern, before;
2908 rtx prev = PREV_INSN (before);
2909 rtx r = emit_insn_before (pattern, before);
2910 if (block && block->head == before)
2911 block->head = NEXT_INSN (prev);
2915 /* Make an instruction with body PATTERN and code JUMP_INSN
2916 and output it before the instruction BEFORE. */
2919 emit_jump_insn_before (pattern, before)
2920 register rtx pattern, before;
2924 if (GET_CODE (pattern) == SEQUENCE)
2925 insn = emit_insn_before (pattern, before);
2928 insn = make_jump_insn_raw (pattern);
2929 add_insn_before (insn, before);
2935 /* Make an instruction with body PATTERN and code CALL_INSN
2936 and output it before the instruction BEFORE. */
2939 emit_call_insn_before (pattern, before)
2940 register rtx pattern, before;
2944 if (GET_CODE (pattern) == SEQUENCE)
2945 insn = emit_insn_before (pattern, before);
2948 insn = make_call_insn_raw (pattern);
2949 add_insn_before (insn, before);
2950 PUT_CODE (insn, CALL_INSN);
2956 /* Make an insn of code BARRIER
2957 and output it before the insn BEFORE. */
2960 emit_barrier_before (before)
2961 register rtx before;
2963 register rtx insn = rtx_alloc (BARRIER);
2965 INSN_UID (insn) = cur_insn_uid++;
2967 add_insn_before (insn, before);
2971 /* Emit the label LABEL before the insn BEFORE. */
2974 emit_label_before (label, before)
2977 /* This can be called twice for the same label as a result of the
2978 confusion that follows a syntax error! So make it harmless. */
2979 if (INSN_UID (label) == 0)
2981 INSN_UID (label) = cur_insn_uid++;
2982 add_insn_before (label, before);
2988 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2991 emit_note_before (subtype, before)
2995 register rtx note = rtx_alloc (NOTE);
2996 INSN_UID (note) = cur_insn_uid++;
2997 NOTE_SOURCE_FILE (note) = 0;
2998 NOTE_LINE_NUMBER (note) = subtype;
3000 add_insn_before (note, before);
3004 /* Make an insn of code INSN with body PATTERN
3005 and output it after the insn AFTER. */
3008 emit_insn_after (pattern, after)
3009 register rtx pattern, after;
3011 register rtx insn = after;
3013 if (GET_CODE (pattern) == SEQUENCE)
3017 for (i = 0; i < XVECLEN (pattern, 0); i++)
3019 insn = XVECEXP (pattern, 0, i);
3020 add_insn_after (insn, after);
3023 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3024 sequence_result[XVECLEN (pattern, 0)] = pattern;
3028 insn = make_insn_raw (pattern);
3029 add_insn_after (insn, after);
3035 /* Similar to emit_insn_after, except that line notes are to be inserted so
3036 as to act as if this insn were at FROM. */
3039 emit_insn_after_with_line_notes (pattern, after, from)
3040 rtx pattern, after, from;
3042 rtx from_line = find_line_note (from);
3043 rtx after_line = find_line_note (after);
3044 rtx insn = emit_insn_after (pattern, after);
3047 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3048 NOTE_LINE_NUMBER (from_line),
3052 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3053 NOTE_LINE_NUMBER (after_line),
3057 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3060 emit_block_insn_after (pattern, after, block)
3064 rtx r = emit_insn_after (pattern, after);
3065 if (block && block->end == after)
3070 /* Make an insn of code JUMP_INSN with body PATTERN
3071 and output it after the insn AFTER. */
3074 emit_jump_insn_after (pattern, after)
3075 register rtx pattern, after;
3079 if (GET_CODE (pattern) == SEQUENCE)
3080 insn = emit_insn_after (pattern, after);
3083 insn = make_jump_insn_raw (pattern);
3084 add_insn_after (insn, after);
3090 /* Make an insn of code BARRIER
3091 and output it after the insn AFTER. */
3094 emit_barrier_after (after)
3097 register rtx insn = rtx_alloc (BARRIER);
3099 INSN_UID (insn) = cur_insn_uid++;
3101 add_insn_after (insn, after);
3105 /* Emit the label LABEL after the insn AFTER. */
3108 emit_label_after (label, after)
3111 /* This can be called twice for the same label
3112 as a result of the confusion that follows a syntax error!
3113 So make it harmless. */
3114 if (INSN_UID (label) == 0)
3116 INSN_UID (label) = cur_insn_uid++;
3117 add_insn_after (label, after);
3123 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3126 emit_note_after (subtype, after)
3130 register rtx note = rtx_alloc (NOTE);
3131 INSN_UID (note) = cur_insn_uid++;
3132 NOTE_SOURCE_FILE (note) = 0;
3133 NOTE_LINE_NUMBER (note) = subtype;
3134 add_insn_after (note, after);
3138 /* Emit a line note for FILE and LINE after the insn AFTER. */
3141 emit_line_note_after (file, line, after)
3148 if (no_line_numbers && line > 0)
3154 note = rtx_alloc (NOTE);
3155 INSN_UID (note) = cur_insn_uid++;
3156 NOTE_SOURCE_FILE (note) = file;
3157 NOTE_LINE_NUMBER (note) = line;
3158 add_insn_after (note, after);
3162 /* Make an insn of code INSN with pattern PATTERN
3163 and add it to the end of the doubly-linked list.
3164 If PATTERN is a SEQUENCE, take the elements of it
3165 and emit an insn for each element.
3167 Returns the last insn emitted. */
3173 rtx insn = last_insn;
3175 if (GET_CODE (pattern) == SEQUENCE)
3179 for (i = 0; i < XVECLEN (pattern, 0); i++)
3181 insn = XVECEXP (pattern, 0, i);
3184 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3185 sequence_result[XVECLEN (pattern, 0)] = pattern;
3189 insn = make_insn_raw (pattern);
3196 /* Emit the insns in a chain starting with INSN.
3197 Return the last insn emitted. */
3207 rtx next = NEXT_INSN (insn);
3216 /* Emit the insns in a chain starting with INSN and place them in front of
3217 the insn BEFORE. Return the last insn emitted. */
3220 emit_insns_before (insn, before)
3228 rtx next = NEXT_INSN (insn);
3229 add_insn_before (insn, before);
3237 /* Emit the insns in a chain starting with FIRST and place them in back of
3238 the insn AFTER. Return the last insn emitted. */
3241 emit_insns_after (first, after)
3246 register rtx after_after;
3254 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3257 after_after = NEXT_INSN (after);
3259 NEXT_INSN (after) = first;
3260 PREV_INSN (first) = after;
3261 NEXT_INSN (last) = after_after;
3263 PREV_INSN (after_after) = last;
3265 if (after == last_insn)
3270 /* Make an insn of code JUMP_INSN with pattern PATTERN
3271 and add it to the end of the doubly-linked list. */
3274 emit_jump_insn (pattern)
3277 if (GET_CODE (pattern) == SEQUENCE)
3278 return emit_insn (pattern);
3281 register rtx insn = make_jump_insn_raw (pattern);
3287 /* Make an insn of code CALL_INSN with pattern PATTERN
3288 and add it to the end of the doubly-linked list. */
3291 emit_call_insn (pattern)
3294 if (GET_CODE (pattern) == SEQUENCE)
3295 return emit_insn (pattern);
3298 register rtx insn = make_call_insn_raw (pattern);
3300 PUT_CODE (insn, CALL_INSN);
3305 /* Add the label LABEL to the end of the doubly-linked list. */
3311 /* This can be called twice for the same label
3312 as a result of the confusion that follows a syntax error!
3313 So make it harmless. */
3314 if (INSN_UID (label) == 0)
3316 INSN_UID (label) = cur_insn_uid++;
3322 /* Make an insn of code BARRIER
3323 and add it to the end of the doubly-linked list. */
3328 register rtx barrier = rtx_alloc (BARRIER);
3329 INSN_UID (barrier) = cur_insn_uid++;
3334 /* Make an insn of code NOTE
3335 with data-fields specified by FILE and LINE
3336 and add it to the end of the doubly-linked list,
3337 but only if line-numbers are desired for debugging info. */
3340 emit_line_note (file, line)
3344 set_file_and_line_for_stmt (file, line);
3347 if (no_line_numbers)
3351 return emit_note (file, line);
3354 /* Make an insn of code NOTE
3355 with data-fields specified by FILE and LINE
3356 and add it to the end of the doubly-linked list.
3357 If it is a line-number NOTE, omit it if it matches the previous one. */
3360 emit_note (file, line)
3368 if (file && last_filename && !strcmp (file, last_filename)
3369 && line == last_linenum)
3371 last_filename = file;
3372 last_linenum = line;
3375 if (no_line_numbers && line > 0)
3381 note = rtx_alloc (NOTE);
3382 INSN_UID (note) = cur_insn_uid++;
3383 NOTE_SOURCE_FILE (note) = file;
3384 NOTE_LINE_NUMBER (note) = line;
3389 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3392 emit_line_note_force (file, line)
3397 return emit_line_note (file, line);
3400 /* Cause next statement to emit a line note even if the line number
3401 has not changed. This is used at the beginning of a function. */
3404 force_next_line_note ()
3409 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3410 note of this type already exists, remove it first. */
3413 set_unique_reg_note (insn, kind, datum)
3418 rtx note = find_reg_note (insn, kind, NULL_RTX);
3420 /* First remove the note if there already is one. */
3422 remove_note (insn, note);
3424 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3427 /* Return an indication of which type of insn should have X as a body.
3428 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3434 if (GET_CODE (x) == CODE_LABEL)
3436 if (GET_CODE (x) == CALL)
3438 if (GET_CODE (x) == RETURN)
3440 if (GET_CODE (x) == SET)
3442 if (SET_DEST (x) == pc_rtx)
3444 else if (GET_CODE (SET_SRC (x)) == CALL)
3449 if (GET_CODE (x) == PARALLEL)
3452 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3453 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3455 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3456 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3458 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3459 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3465 /* Emit the rtl pattern X as an appropriate kind of insn.
3466 If X is a label, it is simply added into the insn chain. */
3472 enum rtx_code code = classify_insn (x);
3474 if (code == CODE_LABEL)
3475 return emit_label (x);
3476 else if (code == INSN)
3477 return emit_insn (x);
3478 else if (code == JUMP_INSN)
3480 register rtx insn = emit_jump_insn (x);
3481 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3482 return emit_barrier ();
3485 else if (code == CALL_INSN)
3486 return emit_call_insn (x);
3491 /* Begin emitting insns to a sequence which can be packaged in an
3492 RTL_EXPR. If this sequence will contain something that might cause
3493 the compiler to pop arguments to function calls (because those
3494 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3495 details), use do_pending_stack_adjust before calling this function.
3496 That will ensure that the deferred pops are not accidentally
3497 emitted in the middel of this sequence. */
3502 struct sequence_stack *tem;
3504 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3506 tem->next = seq_stack;
3507 tem->first = first_insn;
3508 tem->last = last_insn;
3509 tem->sequence_rtl_expr = seq_rtl_expr;
3517 /* Similarly, but indicate that this sequence will be placed in T, an
3518 RTL_EXPR. See the documentation for start_sequence for more
3519 information about how to use this function. */
3522 start_sequence_for_rtl_expr (t)
3530 /* Set up the insn chain starting with FIRST as the current sequence,
3531 saving the previously current one. See the documentation for
3532 start_sequence for more information about how to use this function. */
3535 push_to_sequence (first)
3542 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3548 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3551 push_to_full_sequence (first, last)
3557 /* We really should have the end of the insn chain here. */
3558 if (last && NEXT_INSN (last))
3562 /* Set up the outer-level insn chain
3563 as the current sequence, saving the previously current one. */
3566 push_topmost_sequence ()
3568 struct sequence_stack *stack, *top = NULL;
3572 for (stack = seq_stack; stack; stack = stack->next)
3575 first_insn = top->first;
3576 last_insn = top->last;
3577 seq_rtl_expr = top->sequence_rtl_expr;
3580 /* After emitting to the outer-level insn chain, update the outer-level
3581 insn chain, and restore the previous saved state. */
3584 pop_topmost_sequence ()
3586 struct sequence_stack *stack, *top = NULL;
3588 for (stack = seq_stack; stack; stack = stack->next)
3591 top->first = first_insn;
3592 top->last = last_insn;
3593 /* ??? Why don't we save seq_rtl_expr here? */
3598 /* After emitting to a sequence, restore previous saved state.
3600 To get the contents of the sequence just made, you must call
3601 `gen_sequence' *before* calling here.
3603 If the compiler might have deferred popping arguments while
3604 generating this sequence, and this sequence will not be immediately
3605 inserted into the instruction stream, use do_pending_stack_adjust
3606 before calling gen_sequence. That will ensure that the deferred
3607 pops are inserted into this sequence, and not into some random
3608 location in the instruction stream. See INHIBIT_DEFER_POP for more
3609 information about deferred popping of arguments. */
3614 struct sequence_stack *tem = seq_stack;
3616 first_insn = tem->first;
3617 last_insn = tem->last;
3618 seq_rtl_expr = tem->sequence_rtl_expr;
3619 seq_stack = tem->next;
3624 /* This works like end_sequence, but records the old sequence in FIRST
3628 end_full_sequence (first, last)
3631 *first = first_insn;
3636 /* Return 1 if currently emitting into a sequence. */
3641 return seq_stack != 0;
3644 /* Generate a SEQUENCE rtx containing the insns already emitted
3645 to the current sequence.
3647 This is how the gen_... function from a DEFINE_EXPAND
3648 constructs the SEQUENCE that it returns. */
3658 /* Count the insns in the chain. */
3660 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3663 /* If only one insn, return it rather than a SEQUENCE.
3664 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3665 the case of an empty list.)
3666 We only return the pattern of an insn if its code is INSN and it
3667 has no notes. This ensures that no information gets lost. */
3669 && ! RTX_FRAME_RELATED_P (first_insn)
3670 && GET_CODE (first_insn) == INSN
3671 /* Don't throw away any reg notes. */
3672 && REG_NOTES (first_insn) == 0)
3676 NEXT_INSN (first_insn) = free_insn;
3677 free_insn = first_insn;
3679 return PATTERN (first_insn);
3682 /* Put them in a vector. See if we already have a SEQUENCE of the
3683 appropriate length around. */
3684 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3685 && (result = sequence_result[len]) != 0)
3686 sequence_result[len] = 0;
3689 /* Ensure that this rtl goes in saveable_obstack, since we may
3691 push_obstacks_nochange ();
3692 rtl_in_saveable_obstack ();
3693 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3697 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3698 XVECEXP (result, 0, i) = tem;
3703 /* Put the various virtual registers into REGNO_REG_RTX. */
3706 init_virtual_regs (es)
3707 struct emit_status *es;
3709 rtx *ptr = es->x_regno_reg_rtx;
3710 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3711 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3712 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3713 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3714 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3718 clear_emit_caches ()
3722 /* Clear the start_sequence/gen_sequence cache. */
3723 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3724 sequence_result[i] = 0;
3728 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3729 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3730 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3731 static int copy_insn_n_scratches;
3733 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3734 copied an ASM_OPERANDS.
3735 In that case, it is the original input-operand vector. */
3736 static rtvec orig_asm_operands_vector;
3738 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3739 copied an ASM_OPERANDS.
3740 In that case, it is the copied input-operand vector. */
3741 static rtvec copy_asm_operands_vector;
3743 /* Likewise for the constraints vector. */
3744 static rtvec orig_asm_constraints_vector;
3745 static rtvec copy_asm_constraints_vector;
3747 /* Recursively create a new copy of an rtx for copy_insn.
3748 This function differs from copy_rtx in that it handles SCRATCHes and
3749 ASM_OPERANDs properly.
3750 Normally, this function is not used directly; use copy_insn as front end.
3751 However, you could first copy an insn pattern with copy_insn and then use
3752 this function afterwards to properly copy any REG_NOTEs containing
3761 register RTX_CODE code;
3762 register const char *format_ptr;
3764 code = GET_CODE (orig);
3780 for (i = 0; i < copy_insn_n_scratches; i++)
3781 if (copy_insn_scratch_in[i] == orig)
3782 return copy_insn_scratch_out[i];
3786 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3787 a LABEL_REF, it isn't sharable. */
3788 if (GET_CODE (XEXP (orig, 0)) == PLUS
3789 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3790 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3794 /* A MEM with a constant address is not sharable. The problem is that
3795 the constant address may need to be reloaded. If the mem is shared,
3796 then reloading one copy of this mem will cause all copies to appear
3797 to have been reloaded. */
3803 copy = rtx_alloc (code);
3805 /* Copy the various flags, and other information. We assume that
3806 all fields need copying, and then clear the fields that should
3807 not be copied. That is the sensible default behavior, and forces
3808 us to explicitly document why we are *not* copying a flag. */
3809 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3811 /* We do not copy the USED flag, which is used as a mark bit during
3812 walks over the RTL. */
3815 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3816 if (GET_RTX_CLASS (code) == 'i')
3820 copy->frame_related = 0;
3823 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3825 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3827 copy->fld[i] = orig->fld[i];
3828 switch (*format_ptr++)
3831 if (XEXP (orig, i) != NULL)
3832 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3837 if (XVEC (orig, i) == orig_asm_constraints_vector)
3838 XVEC (copy, i) = copy_asm_constraints_vector;
3839 else if (XVEC (orig, i) == orig_asm_operands_vector)
3840 XVEC (copy, i) = copy_asm_operands_vector;
3841 else if (XVEC (orig, i) != NULL)
3843 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3844 for (j = 0; j < XVECLEN (copy, i); j++)
3845 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3851 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3852 bitmap_copy (new_bits, XBITMAP (orig, i));
3853 XBITMAP (copy, i) = new_bits;
3864 /* These are left unchanged. */
3872 if (code == SCRATCH)
3874 i = copy_insn_n_scratches++;
3875 if (i >= MAX_RECOG_OPERANDS)
3877 copy_insn_scratch_in[i] = orig;
3878 copy_insn_scratch_out[i] = copy;
3880 else if (code == ASM_OPERANDS)
3882 orig_asm_operands_vector = XVEC (orig, 3);
3883 copy_asm_operands_vector = XVEC (copy, 3);
3884 orig_asm_constraints_vector = XVEC (orig, 4);
3885 copy_asm_constraints_vector = XVEC (copy, 4);
3891 /* Create a new copy of an rtx.
3892 This function differs from copy_rtx in that it handles SCRATCHes and
3893 ASM_OPERANDs properly.
3894 INSN doesn't really have to be a full INSN; it could be just the
3900 copy_insn_n_scratches = 0;
3901 orig_asm_operands_vector = 0;
3902 orig_asm_constraints_vector = 0;
3903 copy_asm_operands_vector = 0;
3904 copy_asm_constraints_vector = 0;
3905 return copy_insn_1 (insn);
3908 /* Initialize data structures and variables in this file
3909 before generating rtl for each function. */
3914 struct function *f = cfun;
3916 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3919 seq_rtl_expr = NULL;
3921 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3924 first_label_num = label_num;
3928 clear_emit_caches ();
3930 /* Init the tables that describe all the pseudo regs. */
3932 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3934 f->emit->regno_pointer_flag
3935 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3937 f->emit->regno_pointer_align
3938 = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
3939 sizeof (unsigned char));
3942 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3945 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3946 init_virtual_regs (f->emit);
3948 /* Indicate that the virtual registers and stack locations are
3950 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3951 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3952 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3953 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3955 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3956 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3957 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3958 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3959 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3961 #ifdef STACK_BOUNDARY
3962 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3963 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3964 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3965 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3967 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3968 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3969 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3970 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3971 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3974 #ifdef INIT_EXPANDERS
3979 /* Mark SS for GC. */
3982 mark_sequence_stack (ss)
3983 struct sequence_stack *ss;
3987 ggc_mark_rtx (ss->first);
3988 ggc_mark_tree (ss->sequence_rtl_expr);
3993 /* Mark ES for GC. */
3996 mark_emit_status (es)
3997 struct emit_status *es;
4005 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
4009 mark_sequence_stack (es->sequence_stack);
4010 ggc_mark_tree (es->sequence_rtl_expr);
4011 ggc_mark_rtx (es->x_first_insn);
4014 /* Create some permanent unique rtl objects shared between all functions.
4015 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4018 init_emit_once (line_numbers)
4022 enum machine_mode mode;
4023 enum machine_mode double_mode;
4025 no_line_numbers = ! line_numbers;
4027 /* Compute the word and byte modes. */
4029 byte_mode = VOIDmode;
4030 word_mode = VOIDmode;
4031 double_mode = VOIDmode;
4033 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4034 mode = GET_MODE_WIDER_MODE (mode))
4036 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4037 && byte_mode == VOIDmode)
4040 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4041 && word_mode == VOIDmode)
4045 #ifndef DOUBLE_TYPE_SIZE
4046 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
4049 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4050 mode = GET_MODE_WIDER_MODE (mode))
4052 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4053 && double_mode == VOIDmode)
4057 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4059 /* Assign register numbers to the globally defined register rtx.
4060 This must be done at runtime because the register number field
4061 is in a union and some compilers can't initialize unions. */
4063 pc_rtx = gen_rtx (PC, VOIDmode);
4064 cc0_rtx = gen_rtx (CC0, VOIDmode);
4065 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4066 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4067 if (hard_frame_pointer_rtx == 0)
4068 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4069 HARD_FRAME_POINTER_REGNUM);
4070 if (arg_pointer_rtx == 0)
4071 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4072 virtual_incoming_args_rtx =
4073 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4074 virtual_stack_vars_rtx =
4075 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4076 virtual_stack_dynamic_rtx =
4077 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4078 virtual_outgoing_args_rtx =
4079 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4080 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4082 /* These rtx must be roots if GC is enabled. */
4084 ggc_add_rtx_root (global_rtl, GR_MAX);
4086 #ifdef INIT_EXPANDERS
4087 /* This is to initialize save_machine_status and restore_machine_status before
4088 the first call to push_function_context_to. This is needed by the Chill
4089 front end which calls push_function_context_to before the first cal to
4090 init_function_start. */
4094 /* Create the unique rtx's for certain rtx codes and operand values. */
4096 /* Don't use gen_rtx here since gen_rtx in this case
4097 tries to use these variables. */
4098 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4099 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4100 gen_rtx_raw_CONST_INT (VOIDmode, i);
4102 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4104 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4105 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4106 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4108 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4110 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4111 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4112 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4113 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4115 for (i = 0; i <= 2; i++)
4117 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4118 mode = GET_MODE_WIDER_MODE (mode))
4120 rtx tem = rtx_alloc (CONST_DOUBLE);
4121 union real_extract u;
4123 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
4124 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4126 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
4127 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4128 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4129 PUT_MODE (tem, mode);
4131 const_tiny_rtx[i][(int) mode] = tem;
4134 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4136 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4137 mode = GET_MODE_WIDER_MODE (mode))
4138 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4140 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4142 mode = GET_MODE_WIDER_MODE (mode))
4143 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4146 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4147 if (GET_MODE_CLASS (mode) == MODE_CC)
4148 const_tiny_rtx[0][(int) mode] = const0_rtx;
4150 ggc_add_rtx_root (&const_tiny_rtx[0][0], sizeof(const_tiny_rtx)/sizeof(rtx));
4151 ggc_add_rtx_root (&const_true_rtx, 1);
4153 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4154 return_address_pointer_rtx
4155 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4159 struct_value_rtx = STRUCT_VALUE;
4161 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4164 #ifdef STRUCT_VALUE_INCOMING
4165 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4167 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4168 struct_value_incoming_rtx
4169 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4171 struct_value_incoming_rtx = struct_value_rtx;
4175 #ifdef STATIC_CHAIN_REGNUM
4176 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4178 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4179 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4180 static_chain_incoming_rtx
4181 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4184 static_chain_incoming_rtx = static_chain_rtx;
4188 static_chain_rtx = STATIC_CHAIN;
4190 #ifdef STATIC_CHAIN_INCOMING
4191 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4193 static_chain_incoming_rtx = static_chain_rtx;
4197 #ifdef PIC_OFFSET_TABLE_REGNUM
4198 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4201 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4202 ggc_add_rtx_root (&struct_value_rtx, 1);
4203 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4204 ggc_add_rtx_root (&static_chain_rtx, 1);
4205 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4206 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4208 /* Initialize the CONST_INT hash table. */
4209 const_int_htab = htab_create (37, const_int_htab_hash,
4210 const_int_htab_eq, NULL);
4211 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4215 /* Query and clear/ restore no_line_numbers. This is used by the
4216 switch / case handling in stmt.c to give proper line numbers in
4217 warnings about unreachable code. */
4220 force_line_numbers ()
4222 int old = no_line_numbers;
4224 no_line_numbers = 0;
4226 force_next_line_note ();
4231 restore_line_number_status (old_value)
4234 no_line_numbers = old_value;