1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
51 #include "hard-reg-set.h"
52 #include "insn-config.h"
57 /* Commonly used modes. */
59 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
60 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
61 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
63 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
64 After rtl generation, it is 1 plus the largest register number used. */
66 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Lowest label number in current function. */
75 static int first_label_num;
77 /* Highest label number in current function.
78 Zero means use the value of label_num instead.
79 This is nonzero only when belatedly compiling an inline function. */
81 static int last_label_num;
83 /* Value label_num had when set_new_first_and_last_label_number was called.
84 If label_num has not changed since then, last_label_num is valid. */
86 static int base_label_num;
88 /* Nonzero means do not generate NOTEs for source line numbers. */
90 static int no_line_numbers;
92 /* Commonly used rtx's, so that we only need space for one copy.
93 These are initialized once for the entire compilation.
94 All of these except perhaps the floating-point CONST_DOUBLEs
95 are unique; no other rtx-object will be equal to any of these. */
97 struct _global_rtl global_rtl =
99 {PC, VOIDmode}, /* pc_rtx */
100 {CC0, VOIDmode}, /* cc0_rtx */
101 {REG}, /* stack_pointer_rtx */
102 {REG}, /* frame_pointer_rtx */
103 {REG}, /* hard_frame_pointer_rtx */
104 {REG}, /* arg_pointer_rtx */
105 {REG}, /* virtual_incoming_args_rtx */
106 {REG}, /* virtual_stack_vars_rtx */
107 {REG}, /* virtual_stack_dynamic_rtx */
108 {REG}, /* virtual_outgoing_args_rtx */
111 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
112 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
113 record a copy of const[012]_rtx. */
115 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
119 REAL_VALUE_TYPE dconst0;
120 REAL_VALUE_TYPE dconst1;
121 REAL_VALUE_TYPE dconst2;
122 REAL_VALUE_TYPE dconstm1;
124 /* All references to the following fixed hard registers go through
125 these unique rtl objects. On machines where the frame-pointer and
126 arg-pointer are the same register, they use the same unique object.
128 After register allocation, other rtl objects which used to be pseudo-regs
129 may be clobbered to refer to the frame-pointer register.
130 But references that were originally to the frame-pointer can be
131 distinguished from the others because they contain frame_pointer_rtx.
133 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
134 tricky: until register elimination has taken place hard_frame_pointer_rtx
135 should be used if it is being set, and frame_pointer_rtx otherwise. After
136 register elimination hard_frame_pointer_rtx should always be used.
137 On machines where the two registers are same (most) then these are the
140 In an inline procedure, the stack and frame pointer rtxs may not be
141 used for anything else. */
142 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
143 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
144 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
145 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
146 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
148 /* This is used to implement __builtin_return_address for some machines.
149 See for instance the MIPS port. */
150 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
152 /* We make one copy of (const_int C) where C is in
153 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
154 to save space during the compilation and simplify comparisons of
157 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
159 /* The ends of the doubly-linked chain of rtl for the current function.
160 Both are reset to null at the start of rtl generation for the function.
162 start_sequence saves both of these on `sequence_stack' along with
163 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
165 static rtx first_insn = NULL;
166 static rtx last_insn = NULL;
168 /* RTL_EXPR within which the current sequence will be placed. Use to
169 prevent reuse of any temporaries within the sequence until after the
170 RTL_EXPR is emitted. */
172 tree sequence_rtl_expr = NULL;
174 /* INSN_UID for next insn emitted.
175 Reset to 1 for each function compiled. */
177 static int cur_insn_uid = 1;
179 /* Line number and source file of the last line-number NOTE emitted.
180 This is used to avoid generating duplicates. */
182 static int last_linenum = 0;
183 static char *last_filename = 0;
185 /* A vector indexed by pseudo reg number. The allocated length
186 of this vector is regno_pointer_flag_length. Since this
187 vector is needed during the expansion phase when the total
188 number of registers in the function is not yet known,
189 it is copied and made bigger when necessary. */
191 char *regno_pointer_flag;
192 int regno_pointer_flag_length;
194 /* Indexed by pseudo register number, if nonzero gives the known alignment
195 for that pseudo (if regno_pointer_flag is set).
196 Allocated in parallel with regno_pointer_flag. */
197 char *regno_pointer_align;
199 /* Indexed by pseudo register number, gives the rtx for that pseudo.
200 Allocated in parallel with regno_pointer_flag. */
204 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
205 Each element describes one pending sequence.
206 The main insn-chain is saved in the last element of the chain,
207 unless the chain is empty. */
209 struct sequence_stack *sequence_stack;
211 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
212 shortly thrown away. We use two mechanisms to prevent this waste:
214 First, we keep a list of the expressions used to represent the sequence
215 stack in sequence_element_free_list.
217 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
218 rtvec for use by gen_sequence. One entry for each size is sufficient
219 because most cases are calls to gen_sequence followed by immediately
220 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
221 destructive on the insn in it anyway and hence can't be redone.
223 We do not bother to save this cached data over nested function calls.
224 Instead, we just reinitialize them. */
226 #define SEQUENCE_RESULT_SIZE 5
228 static struct sequence_stack *sequence_element_free_list;
229 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
231 /* During RTL generation, we also keep a list of free INSN rtl codes. */
232 static rtx free_insn;
234 extern int rtx_equal_function_value_matters;
236 /* Filename and line number of last line-number note,
237 whether we actually emitted it or not. */
238 extern char *emit_filename;
239 extern int emit_lineno;
241 static rtx make_jump_insn_raw PROTO((rtx));
242 static rtx make_call_insn_raw PROTO((rtx));
243 static rtx find_line_note PROTO((rtx));
246 gen_rtx_CONST_INT (mode, arg)
247 enum machine_mode mode;
250 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
251 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
253 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
254 if (const_true_rtx && arg == STORE_FLAG_VALUE)
255 return const_true_rtx;
258 return gen_rtx_raw_CONST_INT (mode, arg);
262 gen_rtx_REG (mode, regno)
263 enum machine_mode mode;
266 /* In case the MD file explicitly references the frame pointer, have
267 all such references point to the same frame pointer. This is
268 used during frame pointer elimination to distinguish the explicit
269 references to these registers from pseudos that happened to be
272 If we have eliminated the frame pointer or arg pointer, we will
273 be using it as a normal register, for example as a spill
274 register. In such cases, we might be accessing it in a mode that
275 is not Pmode and therefore cannot use the pre-allocated rtx.
277 Also don't do this when we are making new REGs in reload, since
278 we don't want to get confused with the real pointers. */
280 if (mode == Pmode && !reload_in_progress)
282 if (regno == FRAME_POINTER_REGNUM)
283 return frame_pointer_rtx;
284 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
285 if (regno == HARD_FRAME_POINTER_REGNUM)
286 return hard_frame_pointer_rtx;
288 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
289 if (regno == ARG_POINTER_REGNUM)
290 return arg_pointer_rtx;
292 #ifdef RETURN_ADDRESS_POINTER_REGNUM
293 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
294 return return_address_pointer_rtx;
296 if (regno == STACK_POINTER_REGNUM)
297 return stack_pointer_rtx;
300 return gen_rtx_raw_REG (mode, regno);
303 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
305 ** This routine generates an RTX of the size specified by
306 ** <code>, which is an RTX code. The RTX structure is initialized
307 ** from the arguments <element1> through <elementn>, which are
308 ** interpreted according to the specific RTX type's format. The
309 ** special machine mode associated with the rtx (if any) is specified
312 ** gen_rtx can be invoked in a way which resembles the lisp-like
313 ** rtx it will generate. For example, the following rtx structure:
315 ** (plus:QI (mem:QI (reg:SI 1))
316 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
318 ** ...would be generated by the following C code:
320 ** gen_rtx (PLUS, QImode,
321 ** gen_rtx (MEM, QImode,
322 ** gen_rtx (REG, SImode, 1)),
323 ** gen_rtx (MEM, QImode,
324 ** gen_rtx (PLUS, SImode,
325 ** gen_rtx (REG, SImode, 2),
326 ** gen_rtx (REG, SImode, 3)))),
331 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
335 enum machine_mode mode;
338 register int i; /* Array indices... */
339 register char *fmt; /* Current rtx's format... */
340 register rtx rt_val; /* RTX to return to caller... */
345 code = va_arg (p, enum rtx_code);
346 mode = va_arg (p, enum machine_mode);
349 if (code == CONST_INT)
350 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
351 else if (code == REG)
352 rt_val = gen_rtx_REG (mode, va_arg (p, int));
355 rt_val = rtx_alloc (code); /* Allocate the storage space. */
356 rt_val->mode = mode; /* Store the machine mode... */
358 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
359 for (i = 0; i < GET_RTX_LENGTH (code); i++)
363 case '0': /* Unused field. */
366 case 'i': /* An integer? */
367 XINT (rt_val, i) = va_arg (p, int);
370 case 'w': /* A wide integer? */
371 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
374 case 's': /* A string? */
375 XSTR (rt_val, i) = va_arg (p, char *);
378 case 'e': /* An expression? */
379 case 'u': /* An insn? Same except when printing. */
380 XEXP (rt_val, i) = va_arg (p, rtx);
383 case 'E': /* An RTX vector? */
384 XVEC (rt_val, i) = va_arg (p, rtvec);
393 return rt_val; /* Return the new RTX... */
396 /* gen_rtvec (n, [rt1, ..., rtn])
398 ** This routine creates an rtvec and stores within it the
399 ** pointers to rtx's which are its arguments.
404 gen_rtvec VPROTO((int n, ...))
420 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
422 vector = (rtx *) alloca (n * sizeof (rtx));
424 for (i = 0; i < n; i++)
425 vector[i] = va_arg (p, rtx);
428 return gen_rtvec_v (n, vector);
432 gen_rtvec_v (n, argp)
437 register rtvec rt_val;
440 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
442 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
444 for (i = 0; i < n; i++)
445 rt_val->elem[i].rtx = *argp++;
451 gen_rtvec_vv (n, argp)
456 register rtvec rt_val;
459 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
461 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
463 for (i = 0; i < n; i++)
464 rt_val->elem[i].rtx = (argp++)->rtx;
469 /* Generate a REG rtx for a new pseudo register of mode MODE.
470 This pseudo is assigned the next sequential register number. */
474 enum machine_mode mode;
478 /* Don't let anything called by or after reload create new registers
479 (actually, registers can't be created after flow, but this is a good
482 if (reload_in_progress || reload_completed)
485 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
486 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
488 /* For complex modes, don't make a single pseudo.
489 Instead, make a CONCAT of two pseudos.
490 This allows noncontiguous allocation of the real and imaginary parts,
491 which makes much better code. Besides, allocating DCmode
492 pseudos overstrains reload on some machines like the 386. */
493 rtx realpart, imagpart;
494 int size = GET_MODE_UNIT_SIZE (mode);
495 enum machine_mode partmode
496 = mode_for_size (size * BITS_PER_UNIT,
497 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
498 ? MODE_FLOAT : MODE_INT),
501 realpart = gen_reg_rtx (partmode);
502 imagpart = gen_reg_rtx (partmode);
503 return gen_rtx_CONCAT (mode, realpart, imagpart);
506 /* Make sure regno_pointer_flag and regno_reg_rtx are large
507 enough to have an element for this pseudo reg number. */
509 if (reg_rtx_no == regno_pointer_flag_length)
513 (char *) savealloc (regno_pointer_flag_length * 2);
514 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
515 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
516 regno_pointer_flag = new;
518 new = (char *) savealloc (regno_pointer_flag_length * 2);
519 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
520 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
521 regno_pointer_align = new;
523 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
524 bcopy ((char *) regno_reg_rtx, (char *) new1,
525 regno_pointer_flag_length * sizeof (rtx));
526 bzero ((char *) &new1[regno_pointer_flag_length],
527 regno_pointer_flag_length * sizeof (rtx));
528 regno_reg_rtx = new1;
530 regno_pointer_flag_length *= 2;
533 val = gen_rtx_raw_REG (mode, reg_rtx_no);
534 regno_reg_rtx[reg_rtx_no++] = val;
538 /* Identify REG (which may be a CONCAT) as a user register. */
544 if (GET_CODE (reg) == CONCAT)
546 REG_USERVAR_P (XEXP (reg, 0)) = 1;
547 REG_USERVAR_P (XEXP (reg, 1)) = 1;
549 else if (GET_CODE (reg) == REG)
550 REG_USERVAR_P (reg) = 1;
555 /* Identify REG as a probable pointer register and show its alignment
556 as ALIGN, if nonzero. */
559 mark_reg_pointer (reg, align)
563 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
566 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
569 /* Return 1 plus largest pseudo reg number used in the current function. */
577 /* Return 1 + the largest label number used so far in the current function. */
582 if (last_label_num && label_num == base_label_num)
583 return last_label_num;
587 /* Return first label number used in this function (if any were used). */
590 get_first_label_num ()
592 return first_label_num;
595 /* Return a value representing some low-order bits of X, where the number
596 of low-order bits is given by MODE. Note that no conversion is done
597 between floating-point and fixed-point values, rather, the bit
598 representation is returned.
600 This function handles the cases in common between gen_lowpart, below,
601 and two variants in cse.c and combine.c. These are the cases that can
602 be safely handled at all points in the compilation.
604 If this is not a case we can handle, return 0. */
607 gen_lowpart_common (mode, x)
608 enum machine_mode mode;
613 if (GET_MODE (x) == mode)
616 /* MODE must occupy no more words than the mode of X. */
617 if (GET_MODE (x) != VOIDmode
618 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
619 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
623 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
624 word = ((GET_MODE_SIZE (GET_MODE (x))
625 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
628 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
629 && (GET_MODE_CLASS (mode) == MODE_INT
630 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
632 /* If we are getting the low-order part of something that has been
633 sign- or zero-extended, we can either just use the object being
634 extended or make a narrower extension. If we want an even smaller
635 piece than the size of the object being extended, call ourselves
638 This case is used mostly by combine and cse. */
640 if (GET_MODE (XEXP (x, 0)) == mode)
642 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
643 return gen_lowpart_common (mode, XEXP (x, 0));
644 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
645 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
647 else if (GET_CODE (x) == SUBREG
648 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
649 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
650 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
652 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
653 else if (GET_CODE (x) == REG)
655 /* Let the backend decide how many registers to skip. This is needed
656 in particular for Sparc64 where fp regs are smaller than a word. */
657 /* ??? Note that subregs are now ambiguous, in that those against
658 pseudos are sized by the Word Size, while those against hard
659 regs are sized by the underlying register size. Better would be
660 to always interpret the subreg offset parameter as bytes or bits. */
662 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
663 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
664 - HARD_REGNO_NREGS (REGNO (x), mode));
666 /* If the register is not valid for MODE, return 0. If we don't
667 do this, there is no way to fix up the resulting REG later.
668 But we do do this if the current REG is not valid for its
669 mode. This latter is a kludge, but is required due to the
670 way that parameters are passed on some machines, most
672 if (REGNO (x) < FIRST_PSEUDO_REGISTER
673 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
674 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
676 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
677 /* integrate.c can't handle parts of a return value register. */
678 && (! REG_FUNCTION_VALUE_P (x)
679 || ! rtx_equal_function_value_matters)
680 #ifdef CLASS_CANNOT_CHANGE_SIZE
681 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
682 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
683 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
684 && (TEST_HARD_REG_BIT
685 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
688 /* We want to keep the stack, frame, and arg pointers
690 && x != frame_pointer_rtx
691 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
692 && x != arg_pointer_rtx
694 && x != stack_pointer_rtx)
695 return gen_rtx_REG (mode, REGNO (x) + word);
697 return gen_rtx_SUBREG (mode, x, word);
699 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
700 from the low-order part of the constant. */
701 else if ((GET_MODE_CLASS (mode) == MODE_INT
702 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
703 && GET_MODE (x) == VOIDmode
704 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
706 /* If MODE is twice the host word size, X is already the desired
707 representation. Otherwise, if MODE is wider than a word, we can't
708 do this. If MODE is exactly a word, return just one CONST_INT.
709 If MODE is smaller than a word, clear the bits that don't belong
710 in our mode, unless they and our sign bit are all one. So we get
711 either a reasonable negative value or a reasonable unsigned value
714 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
716 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
718 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
719 return (GET_CODE (x) == CONST_INT ? x
720 : GEN_INT (CONST_DOUBLE_LOW (x)));
723 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
724 int width = GET_MODE_BITSIZE (mode);
725 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
726 : CONST_DOUBLE_LOW (x));
728 /* Sign extend to HOST_WIDE_INT. */
729 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
731 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
736 /* If X is an integral constant but we want it in floating-point, it
737 must be the case that we have a union of an integer and a floating-point
738 value. If the machine-parameters allow it, simulate that union here
739 and return the result. The two-word and single-word cases are
742 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
743 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
744 || flag_pretend_float)
745 && GET_MODE_CLASS (mode) == MODE_FLOAT
746 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
747 && GET_CODE (x) == CONST_INT
748 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
749 #ifdef REAL_ARITHMETIC
755 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
756 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
760 union {HOST_WIDE_INT i; float d; } u;
763 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
766 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
767 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
768 || flag_pretend_float)
769 && GET_MODE_CLASS (mode) == MODE_FLOAT
770 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
771 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
772 && GET_MODE (x) == VOIDmode
773 && (sizeof (double) * HOST_BITS_PER_CHAR
774 == 2 * HOST_BITS_PER_WIDE_INT))
775 #ifdef REAL_ARITHMETIC
779 HOST_WIDE_INT low, high;
781 if (GET_CODE (x) == CONST_INT)
782 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
784 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
786 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
788 if (WORDS_BIG_ENDIAN)
789 i[0] = high, i[1] = low;
791 i[0] = low, i[1] = high;
793 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
794 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
798 union {HOST_WIDE_INT i[2]; double d; } u;
799 HOST_WIDE_INT low, high;
801 if (GET_CODE (x) == CONST_INT)
802 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
804 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
806 #ifdef HOST_WORDS_BIG_ENDIAN
807 u.i[0] = high, u.i[1] = low;
809 u.i[0] = low, u.i[1] = high;
812 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
816 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
817 same as sizeof (double) or when sizeof (float) is larger than the
818 size of a word on the target machine. */
819 #ifdef REAL_ARITHMETIC
820 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
826 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
827 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
831 /* Similarly, if this is converting a floating-point value into a
832 single-word integer. Only do this is the host and target parameters are
835 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
836 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
837 || flag_pretend_float)
838 && (GET_MODE_CLASS (mode) == MODE_INT
839 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
840 && GET_CODE (x) == CONST_DOUBLE
841 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
842 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
843 return operand_subword (x, word, 0, GET_MODE (x));
845 /* Similarly, if this is converting a floating-point value into a
846 two-word integer, we can do this one word at a time and make an
847 integer. Only do this is the host and target parameters are
850 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
851 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
852 || flag_pretend_float)
853 && (GET_MODE_CLASS (mode) == MODE_INT
854 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
855 && GET_CODE (x) == CONST_DOUBLE
856 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
857 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
860 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
862 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
864 if (lowpart && GET_CODE (lowpart) == CONST_INT
865 && highpart && GET_CODE (highpart) == CONST_INT)
866 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
869 /* Otherwise, we can't do this. */
873 /* Return the real part (which has mode MODE) of a complex value X.
874 This always comes at the low address in memory. */
877 gen_realpart (mode, x)
878 enum machine_mode mode;
881 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
883 else if (WORDS_BIG_ENDIAN)
884 return gen_highpart (mode, x);
886 return gen_lowpart (mode, x);
889 /* Return the imaginary part (which has mode MODE) of a complex value X.
890 This always comes at the high address in memory. */
893 gen_imagpart (mode, x)
894 enum machine_mode mode;
897 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
899 else if (WORDS_BIG_ENDIAN)
900 return gen_lowpart (mode, x);
902 return gen_highpart (mode, x);
905 /* Return 1 iff X, assumed to be a SUBREG,
906 refers to the real part of the complex value in its containing reg.
907 Complex values are always stored with the real part in the first word,
908 regardless of WORDS_BIG_ENDIAN. */
911 subreg_realpart_p (x)
914 if (GET_CODE (x) != SUBREG)
917 return SUBREG_WORD (x) == 0;
920 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
921 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
922 least-significant part of X.
923 MODE specifies how big a part of X to return;
924 it usually should not be larger than a word.
925 If X is a MEM whose address is a QUEUED, the value may be so also. */
928 gen_lowpart (mode, x)
929 enum machine_mode mode;
932 rtx result = gen_lowpart_common (mode, x);
936 else if (GET_CODE (x) == REG)
938 /* Must be a hard reg that's not valid in MODE. */
939 result = gen_lowpart_common (mode, copy_to_reg (x));
944 else if (GET_CODE (x) == MEM)
946 /* The only additional case we can do is MEM. */
947 register int offset = 0;
948 if (WORDS_BIG_ENDIAN)
949 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
950 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
952 if (BYTES_BIG_ENDIAN)
953 /* Adjust the address so that the address-after-the-data
955 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
956 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
958 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
960 else if (GET_CODE (x) == ADDRESSOF)
961 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
966 /* Like `gen_lowpart', but refer to the most significant part.
967 This is used to access the imaginary part of a complex number. */
970 gen_highpart (mode, x)
971 enum machine_mode mode;
974 /* This case loses if X is a subreg. To catch bugs early,
975 complain if an invalid MODE is used even in other cases. */
976 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
977 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
979 if (GET_CODE (x) == CONST_DOUBLE
980 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
981 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
984 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
985 else if (GET_CODE (x) == CONST_INT)
987 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
989 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
991 else if (GET_CODE (x) == MEM)
993 register int offset = 0;
994 if (! WORDS_BIG_ENDIAN)
995 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
996 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
998 if (! BYTES_BIG_ENDIAN
999 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1000 offset -= (GET_MODE_SIZE (mode)
1001 - MIN (UNITS_PER_WORD,
1002 GET_MODE_SIZE (GET_MODE (x))));
1004 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1006 else if (GET_CODE (x) == SUBREG)
1008 /* The only time this should occur is when we are looking at a
1009 multi-word item with a SUBREG whose mode is the same as that of the
1010 item. It isn't clear what we would do if it wasn't. */
1011 if (SUBREG_WORD (x) != 0)
1013 return gen_highpart (mode, SUBREG_REG (x));
1015 else if (GET_CODE (x) == REG)
1019 /* Let the backend decide how many registers to skip. This is needed
1020 in particular for sparc64 where fp regs are smaller than a word. */
1021 /* ??? Note that subregs are now ambiguous, in that those against
1022 pseudos are sized by the word size, while those against hard
1023 regs are sized by the underlying register size. Better would be
1024 to always interpret the subreg offset parameter as bytes or bits. */
1026 if (WORDS_BIG_ENDIAN)
1028 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1029 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1030 - HARD_REGNO_NREGS (REGNO (x), mode));
1032 word = ((GET_MODE_SIZE (GET_MODE (x))
1033 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1036 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1037 /* integrate.c can't handle parts of a return value register. */
1038 && (! REG_FUNCTION_VALUE_P (x)
1039 || ! rtx_equal_function_value_matters)
1040 /* We want to keep the stack, frame, and arg pointers special. */
1041 && x != frame_pointer_rtx
1042 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1043 && x != arg_pointer_rtx
1045 && x != stack_pointer_rtx)
1046 return gen_rtx_REG (mode, REGNO (x) + word);
1048 return gen_rtx_SUBREG (mode, x, word);
1054 /* Return 1 iff X, assumed to be a SUBREG,
1055 refers to the least significant part of its containing reg.
1056 If X is not a SUBREG, always return 1 (it is its own low part!). */
1059 subreg_lowpart_p (x)
1062 if (GET_CODE (x) != SUBREG)
1064 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1067 if (WORDS_BIG_ENDIAN
1068 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1069 return (SUBREG_WORD (x)
1070 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1071 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1074 return SUBREG_WORD (x) == 0;
1077 /* Return subword I of operand OP.
1078 The word number, I, is interpreted as the word number starting at the
1079 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1080 otherwise it is the high-order word.
1082 If we cannot extract the required word, we return zero. Otherwise, an
1083 rtx corresponding to the requested word will be returned.
1085 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1086 reload has completed, a valid address will always be returned. After
1087 reload, if a valid address cannot be returned, we return zero.
1089 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1090 it is the responsibility of the caller.
1092 MODE is the mode of OP in case it is a CONST_INT. */
1095 operand_subword (op, i, validate_address, mode)
1098 int validate_address;
1099 enum machine_mode mode;
1102 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1103 int bits_per_word = BITS_PER_WORD;
1105 if (mode == VOIDmode)
1106 mode = GET_MODE (op);
1108 if (mode == VOIDmode)
1111 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1113 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1114 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1117 /* If OP is already an integer word, return it. */
1118 if (GET_MODE_CLASS (mode) == MODE_INT
1119 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1122 /* If OP is a REG or SUBREG, we can handle it very simply. */
1123 if (GET_CODE (op) == REG)
1125 /* If the register is not valid for MODE, return 0. If we don't
1126 do this, there is no way to fix up the resulting REG later. */
1127 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1128 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1130 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1131 || (REG_FUNCTION_VALUE_P (op)
1132 && rtx_equal_function_value_matters)
1133 /* We want to keep the stack, frame, and arg pointers
1135 || op == frame_pointer_rtx
1136 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1137 || op == arg_pointer_rtx
1139 || op == stack_pointer_rtx)
1140 return gen_rtx_SUBREG (word_mode, op, i);
1142 return gen_rtx_REG (word_mode, REGNO (op) + i);
1144 else if (GET_CODE (op) == SUBREG)
1145 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1146 else if (GET_CODE (op) == CONCAT)
1148 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1150 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1151 return operand_subword (XEXP (op, 1), i - partwords,
1152 validate_address, mode);
1155 /* Form a new MEM at the requested address. */
1156 if (GET_CODE (op) == MEM)
1158 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1161 if (validate_address)
1163 if (reload_completed)
1165 if (! strict_memory_address_p (word_mode, addr))
1169 addr = memory_address (word_mode, addr);
1172 new = gen_rtx_MEM (word_mode, addr);
1174 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1175 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1176 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1181 /* The only remaining cases are when OP is a constant. If the host and
1182 target floating formats are the same, handling two-word floating
1183 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1184 are defined as returning one or two 32 bit values, respectively,
1185 and not values of BITS_PER_WORD bits. */
1186 #ifdef REAL_ARITHMETIC
1187 /* The output is some bits, the width of the target machine's word.
1188 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1190 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1191 && GET_MODE_CLASS (mode) == MODE_FLOAT
1192 && GET_MODE_BITSIZE (mode) == 64
1193 && GET_CODE (op) == CONST_DOUBLE)
1198 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1199 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1201 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1202 which the words are written depends on the word endianness.
1204 ??? This is a potential portability problem and should
1205 be fixed at some point. */
1206 if (BITS_PER_WORD == 32)
1207 return GEN_INT ((HOST_WIDE_INT) k[i]);
1208 #if HOST_BITS_PER_WIDE_INT > 32
1209 else if (BITS_PER_WORD >= 64 && i == 0)
1210 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1211 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1213 else if (BITS_PER_WORD == 16)
1217 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1220 return GEN_INT ((HOST_WIDE_INT) value);
1225 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1226 && GET_MODE_CLASS (mode) == MODE_FLOAT
1227 && GET_MODE_BITSIZE (mode) > 64
1228 && GET_CODE (op) == CONST_DOUBLE)
1233 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1234 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1236 if (BITS_PER_WORD == 32)
1237 return GEN_INT ((HOST_WIDE_INT) k[i]);
1239 #else /* no REAL_ARITHMETIC */
1240 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1241 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1242 || flag_pretend_float)
1243 && GET_MODE_CLASS (mode) == MODE_FLOAT
1244 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1245 && GET_CODE (op) == CONST_DOUBLE)
1247 /* The constant is stored in the host's word-ordering,
1248 but we want to access it in the target's word-ordering. Some
1249 compilers don't like a conditional inside macro args, so we have two
1250 copies of the return. */
1251 #ifdef HOST_WORDS_BIG_ENDIAN
1252 return GEN_INT (i == WORDS_BIG_ENDIAN
1253 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1255 return GEN_INT (i != WORDS_BIG_ENDIAN
1256 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1259 #endif /* no REAL_ARITHMETIC */
1261 /* Single word float is a little harder, since single- and double-word
1262 values often do not have the same high-order bits. We have already
1263 verified that we want the only defined word of the single-word value. */
1264 #ifdef REAL_ARITHMETIC
1265 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1266 && GET_MODE_BITSIZE (mode) == 32
1267 && GET_CODE (op) == CONST_DOUBLE)
1272 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1273 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1275 if (BITS_PER_WORD == 16)
1277 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1281 return GEN_INT ((HOST_WIDE_INT) l);
1284 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1285 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1286 || flag_pretend_float)
1287 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1288 && GET_MODE_CLASS (mode) == MODE_FLOAT
1289 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1290 && GET_CODE (op) == CONST_DOUBLE)
1293 union {float f; HOST_WIDE_INT i; } u;
1295 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1298 return GEN_INT (u.i);
1300 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1301 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1302 || flag_pretend_float)
1303 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1304 && GET_MODE_CLASS (mode) == MODE_FLOAT
1305 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1306 && GET_CODE (op) == CONST_DOUBLE)
1309 union {double d; HOST_WIDE_INT i; } u;
1311 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1314 return GEN_INT (u.i);
1316 #endif /* no REAL_ARITHMETIC */
1318 /* The only remaining cases that we can handle are integers.
1319 Convert to proper endianness now since these cases need it.
1320 At this point, i == 0 means the low-order word.
1322 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1323 in general. However, if OP is (const_int 0), we can just return
1326 if (op == const0_rtx)
1329 if (GET_MODE_CLASS (mode) != MODE_INT
1330 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1331 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1334 if (WORDS_BIG_ENDIAN)
1335 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1337 /* Find out which word on the host machine this value is in and get
1338 it from the constant. */
1339 val = (i / size_ratio == 0
1340 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1341 : (GET_CODE (op) == CONST_INT
1342 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1344 /* Get the value we want into the low bits of val. */
1345 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1346 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1348 /* Clear the bits that don't belong in our mode, unless they and our sign
1349 bit are all one. So we get either a reasonable negative value or a
1350 reasonable unsigned value for this mode. */
1351 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1352 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1353 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1354 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1356 /* If this would be an entire word for the target, but is not for
1357 the host, then sign-extend on the host so that the number will look
1358 the same way on the host that it would on the target.
1360 For example, when building a 64 bit alpha hosted 32 bit sparc
1361 targeted compiler, then we want the 32 bit unsigned value -1 to be
1362 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1363 The later confuses the sparc backend. */
1365 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1366 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1367 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1369 return GEN_INT (val);
1372 /* Similar to `operand_subword', but never return 0. If we can't extract
1373 the required subword, put OP into a register and try again. If that fails,
1374 abort. We always validate the address in this case. It is not valid
1375 to call this function after reload; it is mostly meant for RTL
1378 MODE is the mode of OP, in case it is CONST_INT. */
1381 operand_subword_force (op, i, mode)
1384 enum machine_mode mode;
1386 rtx result = operand_subword (op, i, 1, mode);
1391 if (mode != BLKmode && mode != VOIDmode)
1393 /* If this is a register which can not be accessed by words, copy it
1394 to a pseudo register. */
1395 if (GET_CODE (op) == REG)
1396 op = copy_to_reg (op);
1398 op = force_reg (mode, op);
1401 result = operand_subword (op, i, 1, mode);
1408 /* Given a compare instruction, swap the operands.
1409 A test instruction is changed into a compare of 0 against the operand. */
1412 reverse_comparison (insn)
1415 rtx body = PATTERN (insn);
1418 if (GET_CODE (body) == SET)
1419 comp = SET_SRC (body);
1421 comp = SET_SRC (XVECEXP (body, 0, 0));
1423 if (GET_CODE (comp) == COMPARE)
1425 rtx op0 = XEXP (comp, 0);
1426 rtx op1 = XEXP (comp, 1);
1427 XEXP (comp, 0) = op1;
1428 XEXP (comp, 1) = op0;
1432 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1433 if (GET_CODE (body) == SET)
1434 SET_SRC (body) = new;
1436 SET_SRC (XVECEXP (body, 0, 0)) = new;
1440 /* Return a memory reference like MEMREF, but with its mode changed
1441 to MODE and its address changed to ADDR.
1442 (VOIDmode means don't change the mode.
1443 NULL for ADDR means don't change the address.) */
1446 change_address (memref, mode, addr)
1448 enum machine_mode mode;
1453 if (GET_CODE (memref) != MEM)
1455 if (mode == VOIDmode)
1456 mode = GET_MODE (memref);
1458 addr = XEXP (memref, 0);
1460 /* If reload is in progress or has completed, ADDR must be valid.
1461 Otherwise, we can call memory_address to make it valid. */
1462 if (reload_completed || reload_in_progress)
1464 if (! memory_address_p (mode, addr))
1468 addr = memory_address (mode, addr);
1470 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1473 new = gen_rtx_MEM (mode, addr);
1474 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1475 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1476 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1480 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1487 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1488 NULL_RTX, label_num++, NULL_PTR);
1490 LABEL_NUSES (label) = 0;
1494 /* For procedure integration. */
1496 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1497 from a permanent obstack when the opportunity arises. */
1500 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1501 last_labelno, max_parm_regnum, max_regnum, args_size,
1502 pops_args, stack_slots, forced_labels, function_flags,
1503 outgoing_args_size, original_arg_vector,
1504 original_decl_initial, regno_rtx, regno_flag,
1505 regno_align, parm_reg_stack_loc)
1506 rtx first_insn, first_parm_insn;
1507 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1512 int outgoing_args_size;
1513 rtvec original_arg_vector;
1514 rtx original_decl_initial;
1518 rtvec parm_reg_stack_loc;
1520 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1521 cur_insn_uid++, NULL_RTX,
1522 first_insn, first_parm_insn,
1523 first_labelno, last_labelno,
1524 max_parm_regnum, max_regnum, args_size,
1525 pops_args, stack_slots, forced_labels,
1526 function_flags, outgoing_args_size,
1527 original_arg_vector,
1528 original_decl_initial,
1529 regno_rtx, regno_flag, regno_align,
1530 parm_reg_stack_loc);
1534 /* Install new pointers to the first and last insns in the chain.
1535 Also, set cur_insn_uid to one higher than the last in use.
1536 Used for an inline-procedure after copying the insn chain. */
1539 set_new_first_and_last_insn (first, last)
1548 for (insn = first; insn; insn = NEXT_INSN (insn))
1549 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1554 /* Set the range of label numbers found in the current function.
1555 This is used when belatedly compiling an inline function. */
1558 set_new_first_and_last_label_num (first, last)
1561 base_label_num = label_num;
1562 first_label_num = first;
1563 last_label_num = last;
1566 /* Save all variables describing the current status into the structure *P.
1567 This is used before starting a nested function. */
1570 save_emit_status (p)
1573 p->reg_rtx_no = reg_rtx_no;
1574 p->first_label_num = first_label_num;
1575 p->first_insn = first_insn;
1576 p->last_insn = last_insn;
1577 p->sequence_rtl_expr = sequence_rtl_expr;
1578 p->sequence_stack = sequence_stack;
1579 p->cur_insn_uid = cur_insn_uid;
1580 p->last_linenum = last_linenum;
1581 p->last_filename = last_filename;
1582 p->regno_pointer_flag = regno_pointer_flag;
1583 p->regno_pointer_align = regno_pointer_align;
1584 p->regno_pointer_flag_length = regno_pointer_flag_length;
1585 p->regno_reg_rtx = regno_reg_rtx;
1588 /* Restore all variables describing the current status from the structure *P.
1589 This is used after a nested function. */
1592 restore_emit_status (p)
1597 reg_rtx_no = p->reg_rtx_no;
1598 first_label_num = p->first_label_num;
1600 first_insn = p->first_insn;
1601 last_insn = p->last_insn;
1602 sequence_rtl_expr = p->sequence_rtl_expr;
1603 sequence_stack = p->sequence_stack;
1604 cur_insn_uid = p->cur_insn_uid;
1605 last_linenum = p->last_linenum;
1606 last_filename = p->last_filename;
1607 regno_pointer_flag = p->regno_pointer_flag;
1608 regno_pointer_align = p->regno_pointer_align;
1609 regno_pointer_flag_length = p->regno_pointer_flag_length;
1610 regno_reg_rtx = p->regno_reg_rtx;
1612 /* Clear our cache of rtx expressions for start_sequence and
1614 sequence_element_free_list = 0;
1615 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1616 sequence_result[i] = 0;
1621 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1622 It does not work to do this twice, because the mark bits set here
1623 are not cleared afterwards. */
1626 unshare_all_rtl (insn)
1629 for (; insn; insn = NEXT_INSN (insn))
1630 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1631 || GET_CODE (insn) == CALL_INSN)
1633 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1634 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1635 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1638 /* Make sure the addresses of stack slots found outside the insn chain
1639 (such as, in DECL_RTL of a variable) are not shared
1640 with the insn chain.
1642 This special care is necessary when the stack slot MEM does not
1643 actually appear in the insn chain. If it does appear, its address
1644 is unshared from all else at that point. */
1646 copy_rtx_if_shared (stack_slot_list);
1649 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1650 Recursively does the same for subexpressions. */
1653 copy_rtx_if_shared (orig)
1656 register rtx x = orig;
1658 register enum rtx_code code;
1659 register char *format_ptr;
1665 code = GET_CODE (x);
1667 /* These types may be freely shared. */
1680 /* SCRATCH must be shared because they represent distinct values. */
1684 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1685 a LABEL_REF, it isn't sharable. */
1686 if (GET_CODE (XEXP (x, 0)) == PLUS
1687 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1688 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1697 /* The chain of insns is not being copied. */
1701 /* A MEM is allowed to be shared if its address is constant
1702 or is a constant plus one of the special registers. */
1703 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1704 || XEXP (x, 0) == virtual_stack_vars_rtx
1705 || XEXP (x, 0) == virtual_incoming_args_rtx)
1708 if (GET_CODE (XEXP (x, 0)) == PLUS
1709 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1710 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1711 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1713 /* This MEM can appear in more than one place,
1714 but its address better not be shared with anything else. */
1716 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1726 /* This rtx may not be shared. If it has already been seen,
1727 replace it with a copy of itself. */
1733 copy = rtx_alloc (code);
1734 bcopy ((char *) x, (char *) copy,
1735 (sizeof (*copy) - sizeof (copy->fld)
1736 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1742 /* Now scan the subexpressions recursively.
1743 We can store any replaced subexpressions directly into X
1744 since we know X is not shared! Any vectors in X
1745 must be copied if X was copied. */
1747 format_ptr = GET_RTX_FORMAT (code);
1749 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1751 switch (*format_ptr++)
1754 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1758 if (XVEC (x, i) != NULL)
1761 int len = XVECLEN (x, i);
1763 if (copied && len > 0)
1764 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1765 for (j = 0; j < len; j++)
1766 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1774 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1775 to look for shared sub-parts. */
1778 reset_used_flags (x)
1782 register enum rtx_code code;
1783 register char *format_ptr;
1788 code = GET_CODE (x);
1790 /* These types may be freely shared so we needn't do any resetting
1811 /* The chain of insns is not being copied. */
1820 format_ptr = GET_RTX_FORMAT (code);
1821 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1823 switch (*format_ptr++)
1826 reset_used_flags (XEXP (x, i));
1830 for (j = 0; j < XVECLEN (x, i); j++)
1831 reset_used_flags (XVECEXP (x, i, j));
1837 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1838 Return X or the rtx for the pseudo reg the value of X was copied into.
1839 OTHER must be valid as a SET_DEST. */
1842 make_safe_from (x, other)
1846 switch (GET_CODE (other))
1849 other = SUBREG_REG (other);
1851 case STRICT_LOW_PART:
1854 other = XEXP (other, 0);
1860 if ((GET_CODE (other) == MEM
1862 && GET_CODE (x) != REG
1863 && GET_CODE (x) != SUBREG)
1864 || (GET_CODE (other) == REG
1865 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1866 || reg_mentioned_p (other, x))))
1868 rtx temp = gen_reg_rtx (GET_MODE (x));
1869 emit_move_insn (temp, x);
1875 /* Emission of insns (adding them to the doubly-linked list). */
1877 /* Return the first insn of the current sequence or current function. */
1885 /* Return the last insn emitted in current sequence or current function. */
1893 /* Specify a new insn as the last in the chain. */
1896 set_last_insn (insn)
1899 if (NEXT_INSN (insn) != 0)
1904 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1907 get_last_insn_anywhere ()
1909 struct sequence_stack *stack;
1912 for (stack = sequence_stack; stack; stack = stack->next)
1913 if (stack->last != 0)
1918 /* Return a number larger than any instruction's uid in this function. */
1923 return cur_insn_uid;
1926 /* Return the next insn. If it is a SEQUENCE, return the first insn
1935 insn = NEXT_INSN (insn);
1936 if (insn && GET_CODE (insn) == INSN
1937 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1938 insn = XVECEXP (PATTERN (insn), 0, 0);
1944 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1948 previous_insn (insn)
1953 insn = PREV_INSN (insn);
1954 if (insn && GET_CODE (insn) == INSN
1955 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1956 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1962 /* Return the next insn after INSN that is not a NOTE. This routine does not
1963 look inside SEQUENCEs. */
1966 next_nonnote_insn (insn)
1971 insn = NEXT_INSN (insn);
1972 if (insn == 0 || GET_CODE (insn) != NOTE)
1979 /* Return the previous insn before INSN that is not a NOTE. This routine does
1980 not look inside SEQUENCEs. */
1983 prev_nonnote_insn (insn)
1988 insn = PREV_INSN (insn);
1989 if (insn == 0 || GET_CODE (insn) != NOTE)
1996 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1997 or 0, if there is none. This routine does not look inside
2001 next_real_insn (insn)
2006 insn = NEXT_INSN (insn);
2007 if (insn == 0 || GET_CODE (insn) == INSN
2008 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2015 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2016 or 0, if there is none. This routine does not look inside
2020 prev_real_insn (insn)
2025 insn = PREV_INSN (insn);
2026 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2027 || GET_CODE (insn) == JUMP_INSN)
2034 /* Find the next insn after INSN that really does something. This routine
2035 does not look inside SEQUENCEs. Until reload has completed, this is the
2036 same as next_real_insn. */
2039 next_active_insn (insn)
2044 insn = NEXT_INSN (insn);
2046 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2047 || (GET_CODE (insn) == INSN
2048 && (! reload_completed
2049 || (GET_CODE (PATTERN (insn)) != USE
2050 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2057 /* Find the last insn before INSN that really does something. This routine
2058 does not look inside SEQUENCEs. Until reload has completed, this is the
2059 same as prev_real_insn. */
2062 prev_active_insn (insn)
2067 insn = PREV_INSN (insn);
2069 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2070 || (GET_CODE (insn) == INSN
2071 && (! reload_completed
2072 || (GET_CODE (PATTERN (insn)) != USE
2073 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2080 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2088 insn = NEXT_INSN (insn);
2089 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2096 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2104 insn = PREV_INSN (insn);
2105 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2113 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2114 and REG_CC_USER notes so we can find it. */
2117 link_cc0_insns (insn)
2120 rtx user = next_nonnote_insn (insn);
2122 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2123 user = XVECEXP (PATTERN (user), 0, 0);
2125 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2126 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2129 /* Return the next insn that uses CC0 after INSN, which is assumed to
2130 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2131 applied to the result of this function should yield INSN).
2133 Normally, this is simply the next insn. However, if a REG_CC_USER note
2134 is present, it contains the insn that uses CC0.
2136 Return 0 if we can't find the insn. */
2139 next_cc0_user (insn)
2142 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2145 return XEXP (note, 0);
2147 insn = next_nonnote_insn (insn);
2148 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2149 insn = XVECEXP (PATTERN (insn), 0, 0);
2151 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2152 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2158 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2159 note, it is the previous insn. */
2162 prev_cc0_setter (insn)
2165 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2168 return XEXP (note, 0);
2170 insn = prev_nonnote_insn (insn);
2171 if (! sets_cc0_p (PATTERN (insn)))
2178 /* Try splitting insns that can be split for better scheduling.
2179 PAT is the pattern which might split.
2180 TRIAL is the insn providing PAT.
2181 LAST is non-zero if we should return the last insn of the sequence produced.
2183 If this routine succeeds in splitting, it returns the first or last
2184 replacement insn depending on the value of LAST. Otherwise, it
2185 returns TRIAL. If the insn to be returned can be split, it will be. */
2188 try_split (pat, trial, last)
2192 rtx before = PREV_INSN (trial);
2193 rtx after = NEXT_INSN (trial);
2194 rtx seq = split_insns (pat, trial);
2195 int has_barrier = 0;
2198 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2199 We may need to handle this specially. */
2200 if (after && GET_CODE (after) == BARRIER)
2203 after = NEXT_INSN (after);
2208 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2209 The latter case will normally arise only when being done so that
2210 it, in turn, will be split (SFmode on the 29k is an example). */
2211 if (GET_CODE (seq) == SEQUENCE)
2213 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2214 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2215 increment the usage count so we don't delete the label. */
2218 if (GET_CODE (trial) == JUMP_INSN)
2219 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2220 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2222 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2224 if (JUMP_LABEL (trial))
2225 LABEL_NUSES (JUMP_LABEL (trial))++;
2228 tem = emit_insn_after (seq, before);
2230 delete_insn (trial);
2232 emit_barrier_after (tem);
2234 /* Recursively call try_split for each new insn created; by the
2235 time control returns here that insn will be fully split, so
2236 set LAST and continue from the insn after the one returned.
2237 We can't use next_active_insn here since AFTER may be a note.
2238 Ignore deleted insns, which can be occur if not optimizing. */
2239 for (tem = NEXT_INSN (before); tem != after;
2240 tem = NEXT_INSN (tem))
2241 if (! INSN_DELETED_P (tem))
2242 tem = try_split (PATTERN (tem), tem, 1);
2244 /* Avoid infinite loop if the result matches the original pattern. */
2245 else if (rtx_equal_p (seq, pat))
2249 PATTERN (trial) = seq;
2250 INSN_CODE (trial) = -1;
2251 try_split (seq, trial, last);
2254 /* Return either the first or the last insn, depending on which was
2256 return last ? prev_active_insn (after) : next_active_insn (before);
2262 /* Make and return an INSN rtx, initializing all its slots.
2263 Store PATTERN in the pattern slots. */
2266 make_insn_raw (pattern)
2271 /* If in RTL generation phase, see if FREE_INSN can be used. */
2272 if (free_insn != 0 && rtx_equal_function_value_matters)
2275 free_insn = NEXT_INSN (free_insn);
2276 PUT_CODE (insn, INSN);
2279 insn = rtx_alloc (INSN);
2281 INSN_UID (insn) = cur_insn_uid++;
2282 PATTERN (insn) = pattern;
2283 INSN_CODE (insn) = -1;
2284 LOG_LINKS (insn) = NULL;
2285 REG_NOTES (insn) = NULL;
2290 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2293 make_jump_insn_raw (pattern)
2298 insn = rtx_alloc (JUMP_INSN);
2299 INSN_UID (insn) = cur_insn_uid++;
2301 PATTERN (insn) = pattern;
2302 INSN_CODE (insn) = -1;
2303 LOG_LINKS (insn) = NULL;
2304 REG_NOTES (insn) = NULL;
2305 JUMP_LABEL (insn) = NULL;
2310 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2313 make_call_insn_raw (pattern)
2318 insn = rtx_alloc (CALL_INSN);
2319 INSN_UID (insn) = cur_insn_uid++;
2321 PATTERN (insn) = pattern;
2322 INSN_CODE (insn) = -1;
2323 LOG_LINKS (insn) = NULL;
2324 REG_NOTES (insn) = NULL;
2325 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2330 /* Add INSN to the end of the doubly-linked list.
2331 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2337 PREV_INSN (insn) = last_insn;
2338 NEXT_INSN (insn) = 0;
2340 if (NULL != last_insn)
2341 NEXT_INSN (last_insn) = insn;
2343 if (NULL == first_insn)
2349 /* Add INSN into the doubly-linked list after insn AFTER. This and
2350 the next should be the only functions called to insert an insn once
2351 delay slots have been filled since only they know how to update a
2355 add_insn_after (insn, after)
2358 rtx next = NEXT_INSN (after);
2360 if (optimize && INSN_DELETED_P (after))
2363 NEXT_INSN (insn) = next;
2364 PREV_INSN (insn) = after;
2368 PREV_INSN (next) = insn;
2369 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2370 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2372 else if (last_insn == after)
2376 struct sequence_stack *stack = sequence_stack;
2377 /* Scan all pending sequences too. */
2378 for (; stack; stack = stack->next)
2379 if (after == stack->last)
2389 NEXT_INSN (after) = insn;
2390 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2392 rtx sequence = PATTERN (after);
2393 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2397 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2398 the previous should be the only functions called to insert an insn once
2399 delay slots have been filled since only they know how to update a
2403 add_insn_before (insn, before)
2406 rtx prev = PREV_INSN (before);
2408 if (optimize && INSN_DELETED_P (before))
2411 PREV_INSN (insn) = prev;
2412 NEXT_INSN (insn) = before;
2416 NEXT_INSN (prev) = insn;
2417 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2419 rtx sequence = PATTERN (prev);
2420 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2423 else if (first_insn == before)
2427 struct sequence_stack *stack = sequence_stack;
2428 /* Scan all pending sequences too. */
2429 for (; stack; stack = stack->next)
2430 if (before == stack->first)
2432 stack->first = insn;
2440 PREV_INSN (before) = insn;
2441 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2442 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2445 /* Delete all insns made since FROM.
2446 FROM becomes the new last instruction. */
2449 delete_insns_since (from)
2455 NEXT_INSN (from) = 0;
2459 /* This function is deprecated, please use sequences instead.
2461 Move a consecutive bunch of insns to a different place in the chain.
2462 The insns to be moved are those between FROM and TO.
2463 They are moved to a new position after the insn AFTER.
2464 AFTER must not be FROM or TO or any insn in between.
2466 This function does not know about SEQUENCEs and hence should not be
2467 called after delay-slot filling has been done. */
2470 reorder_insns (from, to, after)
2471 rtx from, to, after;
2473 /* Splice this bunch out of where it is now. */
2474 if (PREV_INSN (from))
2475 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2477 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2478 if (last_insn == to)
2479 last_insn = PREV_INSN (from);
2480 if (first_insn == from)
2481 first_insn = NEXT_INSN (to);
2483 /* Make the new neighbors point to it and it to them. */
2484 if (NEXT_INSN (after))
2485 PREV_INSN (NEXT_INSN (after)) = to;
2487 NEXT_INSN (to) = NEXT_INSN (after);
2488 PREV_INSN (from) = after;
2489 NEXT_INSN (after) = from;
2490 if (after == last_insn)
2494 /* Return the line note insn preceding INSN. */
2497 find_line_note (insn)
2500 if (no_line_numbers)
2503 for (; insn; insn = PREV_INSN (insn))
2504 if (GET_CODE (insn) == NOTE
2505 && NOTE_LINE_NUMBER (insn) >= 0)
2511 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2512 of the moved insns when debugging. This may insert a note between AFTER
2513 and FROM, and another one after TO. */
2516 reorder_insns_with_line_notes (from, to, after)
2517 rtx from, to, after;
2519 rtx from_line = find_line_note (from);
2520 rtx after_line = find_line_note (after);
2522 reorder_insns (from, to, after);
2524 if (from_line == after_line)
2528 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2529 NOTE_LINE_NUMBER (from_line),
2532 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2533 NOTE_LINE_NUMBER (after_line),
2537 /* Emit an insn of given code and pattern
2538 at a specified place within the doubly-linked list. */
2540 /* Make an instruction with body PATTERN
2541 and output it before the instruction BEFORE. */
2544 emit_insn_before (pattern, before)
2545 register rtx pattern, before;
2547 register rtx insn = before;
2549 if (GET_CODE (pattern) == SEQUENCE)
2553 for (i = 0; i < XVECLEN (pattern, 0); i++)
2555 insn = XVECEXP (pattern, 0, i);
2556 add_insn_before (insn, before);
2558 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2559 sequence_result[XVECLEN (pattern, 0)] = pattern;
2563 insn = make_insn_raw (pattern);
2564 add_insn_before (insn, before);
2570 /* Make an instruction with body PATTERN and code JUMP_INSN
2571 and output it before the instruction BEFORE. */
2574 emit_jump_insn_before (pattern, before)
2575 register rtx pattern, before;
2579 if (GET_CODE (pattern) == SEQUENCE)
2580 insn = emit_insn_before (pattern, before);
2583 insn = make_jump_insn_raw (pattern);
2584 add_insn_before (insn, before);
2590 /* Make an instruction with body PATTERN and code CALL_INSN
2591 and output it before the instruction BEFORE. */
2594 emit_call_insn_before (pattern, before)
2595 register rtx pattern, before;
2599 if (GET_CODE (pattern) == SEQUENCE)
2600 insn = emit_insn_before (pattern, before);
2603 insn = make_call_insn_raw (pattern);
2604 add_insn_before (insn, before);
2605 PUT_CODE (insn, CALL_INSN);
2611 /* Make an insn of code BARRIER
2612 and output it before the insn AFTER. */
2615 emit_barrier_before (before)
2616 register rtx before;
2618 register rtx insn = rtx_alloc (BARRIER);
2620 INSN_UID (insn) = cur_insn_uid++;
2622 add_insn_before (insn, before);
2626 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2629 emit_note_before (subtype, before)
2633 register rtx note = rtx_alloc (NOTE);
2634 INSN_UID (note) = cur_insn_uid++;
2635 NOTE_SOURCE_FILE (note) = 0;
2636 NOTE_LINE_NUMBER (note) = subtype;
2638 add_insn_before (note, before);
2642 /* Make an insn of code INSN with body PATTERN
2643 and output it after the insn AFTER. */
2646 emit_insn_after (pattern, after)
2647 register rtx pattern, after;
2649 register rtx insn = after;
2651 if (GET_CODE (pattern) == SEQUENCE)
2655 for (i = 0; i < XVECLEN (pattern, 0); i++)
2657 insn = XVECEXP (pattern, 0, i);
2658 add_insn_after (insn, after);
2661 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2662 sequence_result[XVECLEN (pattern, 0)] = pattern;
2666 insn = make_insn_raw (pattern);
2667 add_insn_after (insn, after);
2673 /* Similar to emit_insn_after, except that line notes are to be inserted so
2674 as to act as if this insn were at FROM. */
2677 emit_insn_after_with_line_notes (pattern, after, from)
2678 rtx pattern, after, from;
2680 rtx from_line = find_line_note (from);
2681 rtx after_line = find_line_note (after);
2682 rtx insn = emit_insn_after (pattern, after);
2685 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2686 NOTE_LINE_NUMBER (from_line),
2690 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2691 NOTE_LINE_NUMBER (after_line),
2695 /* Make an insn of code JUMP_INSN with body PATTERN
2696 and output it after the insn AFTER. */
2699 emit_jump_insn_after (pattern, after)
2700 register rtx pattern, after;
2704 if (GET_CODE (pattern) == SEQUENCE)
2705 insn = emit_insn_after (pattern, after);
2708 insn = make_jump_insn_raw (pattern);
2709 add_insn_after (insn, after);
2715 /* Make an insn of code BARRIER
2716 and output it after the insn AFTER. */
2719 emit_barrier_after (after)
2722 register rtx insn = rtx_alloc (BARRIER);
2724 INSN_UID (insn) = cur_insn_uid++;
2726 add_insn_after (insn, after);
2730 /* Emit the label LABEL after the insn AFTER. */
2733 emit_label_after (label, after)
2736 /* This can be called twice for the same label
2737 as a result of the confusion that follows a syntax error!
2738 So make it harmless. */
2739 if (INSN_UID (label) == 0)
2741 INSN_UID (label) = cur_insn_uid++;
2742 add_insn_after (label, after);
2748 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2751 emit_note_after (subtype, after)
2755 register rtx note = rtx_alloc (NOTE);
2756 INSN_UID (note) = cur_insn_uid++;
2757 NOTE_SOURCE_FILE (note) = 0;
2758 NOTE_LINE_NUMBER (note) = subtype;
2759 add_insn_after (note, after);
2763 /* Emit a line note for FILE and LINE after the insn AFTER. */
2766 emit_line_note_after (file, line, after)
2773 if (no_line_numbers && line > 0)
2779 note = rtx_alloc (NOTE);
2780 INSN_UID (note) = cur_insn_uid++;
2781 NOTE_SOURCE_FILE (note) = file;
2782 NOTE_LINE_NUMBER (note) = line;
2783 add_insn_after (note, after);
2787 /* Make an insn of code INSN with pattern PATTERN
2788 and add it to the end of the doubly-linked list.
2789 If PATTERN is a SEQUENCE, take the elements of it
2790 and emit an insn for each element.
2792 Returns the last insn emitted. */
2798 rtx insn = last_insn;
2800 if (GET_CODE (pattern) == SEQUENCE)
2804 for (i = 0; i < XVECLEN (pattern, 0); i++)
2806 insn = XVECEXP (pattern, 0, i);
2809 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2810 sequence_result[XVECLEN (pattern, 0)] = pattern;
2814 insn = make_insn_raw (pattern);
2821 /* Emit the insns in a chain starting with INSN.
2822 Return the last insn emitted. */
2832 rtx next = NEXT_INSN (insn);
2841 /* Emit the insns in a chain starting with INSN and place them in front of
2842 the insn BEFORE. Return the last insn emitted. */
2845 emit_insns_before (insn, before)
2853 rtx next = NEXT_INSN (insn);
2854 add_insn_before (insn, before);
2862 /* Emit the insns in a chain starting with FIRST and place them in back of
2863 the insn AFTER. Return the last insn emitted. */
2866 emit_insns_after (first, after)
2871 register rtx after_after;
2879 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2882 after_after = NEXT_INSN (after);
2884 NEXT_INSN (after) = first;
2885 PREV_INSN (first) = after;
2886 NEXT_INSN (last) = after_after;
2888 PREV_INSN (after_after) = last;
2890 if (after == last_insn)
2895 /* Make an insn of code JUMP_INSN with pattern PATTERN
2896 and add it to the end of the doubly-linked list. */
2899 emit_jump_insn (pattern)
2902 if (GET_CODE (pattern) == SEQUENCE)
2903 return emit_insn (pattern);
2906 register rtx insn = make_jump_insn_raw (pattern);
2912 /* Make an insn of code CALL_INSN with pattern PATTERN
2913 and add it to the end of the doubly-linked list. */
2916 emit_call_insn (pattern)
2919 if (GET_CODE (pattern) == SEQUENCE)
2920 return emit_insn (pattern);
2923 register rtx insn = make_call_insn_raw (pattern);
2925 PUT_CODE (insn, CALL_INSN);
2930 /* Add the label LABEL to the end of the doubly-linked list. */
2936 /* This can be called twice for the same label
2937 as a result of the confusion that follows a syntax error!
2938 So make it harmless. */
2939 if (INSN_UID (label) == 0)
2941 INSN_UID (label) = cur_insn_uid++;
2947 /* Make an insn of code BARRIER
2948 and add it to the end of the doubly-linked list. */
2953 register rtx barrier = rtx_alloc (BARRIER);
2954 INSN_UID (barrier) = cur_insn_uid++;
2959 /* Make an insn of code NOTE
2960 with data-fields specified by FILE and LINE
2961 and add it to the end of the doubly-linked list,
2962 but only if line-numbers are desired for debugging info. */
2965 emit_line_note (file, line)
2969 emit_filename = file;
2973 if (no_line_numbers)
2977 return emit_note (file, line);
2980 /* Make an insn of code NOTE
2981 with data-fields specified by FILE and LINE
2982 and add it to the end of the doubly-linked list.
2983 If it is a line-number NOTE, omit it if it matches the previous one. */
2986 emit_note (file, line)
2994 if (file && last_filename && !strcmp (file, last_filename)
2995 && line == last_linenum)
2997 last_filename = file;
2998 last_linenum = line;
3001 if (no_line_numbers && line > 0)
3007 note = rtx_alloc (NOTE);
3008 INSN_UID (note) = cur_insn_uid++;
3009 NOTE_SOURCE_FILE (note) = file;
3010 NOTE_LINE_NUMBER (note) = line;
3015 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3018 emit_line_note_force (file, line)
3023 return emit_line_note (file, line);
3026 /* Cause next statement to emit a line note even if the line number
3027 has not changed. This is used at the beginning of a function. */
3030 force_next_line_note ()
3035 /* Return an indication of which type of insn should have X as a body.
3036 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3042 if (GET_CODE (x) == CODE_LABEL)
3044 if (GET_CODE (x) == CALL)
3046 if (GET_CODE (x) == RETURN)
3048 if (GET_CODE (x) == SET)
3050 if (SET_DEST (x) == pc_rtx)
3052 else if (GET_CODE (SET_SRC (x)) == CALL)
3057 if (GET_CODE (x) == PARALLEL)
3060 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3061 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3063 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3064 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3066 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3067 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3073 /* Emit the rtl pattern X as an appropriate kind of insn.
3074 If X is a label, it is simply added into the insn chain. */
3080 enum rtx_code code = classify_insn (x);
3082 if (code == CODE_LABEL)
3083 return emit_label (x);
3084 else if (code == INSN)
3085 return emit_insn (x);
3086 else if (code == JUMP_INSN)
3088 register rtx insn = emit_jump_insn (x);
3089 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3090 return emit_barrier ();
3093 else if (code == CALL_INSN)
3094 return emit_call_insn (x);
3099 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3104 struct sequence_stack *tem;
3106 if (sequence_element_free_list)
3108 /* Reuse a previously-saved struct sequence_stack. */
3109 tem = sequence_element_free_list;
3110 sequence_element_free_list = tem->next;
3113 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3115 tem->next = sequence_stack;
3116 tem->first = first_insn;
3117 tem->last = last_insn;
3118 tem->sequence_rtl_expr = sequence_rtl_expr;
3120 sequence_stack = tem;
3126 /* Similarly, but indicate that this sequence will be placed in
3130 start_sequence_for_rtl_expr (t)
3135 sequence_rtl_expr = t;
3138 /* Set up the insn chain starting with FIRST
3139 as the current sequence, saving the previously current one. */
3142 push_to_sequence (first)
3149 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3155 /* Set up the outer-level insn chain
3156 as the current sequence, saving the previously current one. */
3159 push_topmost_sequence ()
3161 struct sequence_stack *stack, *top = NULL;
3165 for (stack = sequence_stack; stack; stack = stack->next)
3168 first_insn = top->first;
3169 last_insn = top->last;
3170 sequence_rtl_expr = top->sequence_rtl_expr;
3173 /* After emitting to the outer-level insn chain, update the outer-level
3174 insn chain, and restore the previous saved state. */
3177 pop_topmost_sequence ()
3179 struct sequence_stack *stack, *top = NULL;
3181 for (stack = sequence_stack; stack; stack = stack->next)
3184 top->first = first_insn;
3185 top->last = last_insn;
3186 /* ??? Why don't we save sequence_rtl_expr here? */
3191 /* After emitting to a sequence, restore previous saved state.
3193 To get the contents of the sequence just made,
3194 you must call `gen_sequence' *before* calling here. */
3199 struct sequence_stack *tem = sequence_stack;
3201 first_insn = tem->first;
3202 last_insn = tem->last;
3203 sequence_rtl_expr = tem->sequence_rtl_expr;
3204 sequence_stack = tem->next;
3206 tem->next = sequence_element_free_list;
3207 sequence_element_free_list = tem;
3210 /* Return 1 if currently emitting into a sequence. */
3215 return sequence_stack != 0;
3218 /* Generate a SEQUENCE rtx containing the insns already emitted
3219 to the current sequence.
3221 This is how the gen_... function from a DEFINE_EXPAND
3222 constructs the SEQUENCE that it returns. */
3232 /* Count the insns in the chain. */
3234 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3237 /* If only one insn, return its pattern rather than a SEQUENCE.
3238 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3239 the case of an empty list.) */
3241 && ! RTX_FRAME_RELATED_P (first_insn)
3242 && (GET_CODE (first_insn) == INSN
3243 || GET_CODE (first_insn) == JUMP_INSN
3244 /* Don't discard the call usage field. */
3245 || (GET_CODE (first_insn) == CALL_INSN
3246 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3248 NEXT_INSN (first_insn) = free_insn;
3249 free_insn = first_insn;
3250 return PATTERN (first_insn);
3253 /* Put them in a vector. See if we already have a SEQUENCE of the
3254 appropriate length around. */
3255 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3256 sequence_result[len] = 0;
3259 /* Ensure that this rtl goes in saveable_obstack, since we may
3261 push_obstacks_nochange ();
3262 rtl_in_saveable_obstack ();
3263 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3267 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3268 XVECEXP (result, 0, i) = tem;
3273 /* Initialize data structures and variables in this file
3274 before generating rtl for each function. */
3283 sequence_rtl_expr = NULL;
3285 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3288 first_label_num = label_num;
3290 sequence_stack = NULL;
3292 /* Clear the start_sequence/gen_sequence cache. */
3293 sequence_element_free_list = 0;
3294 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3295 sequence_result[i] = 0;
3298 /* Init the tables that describe all the pseudo regs. */
3300 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3303 = (char *) savealloc (regno_pointer_flag_length);
3304 bzero (regno_pointer_flag, regno_pointer_flag_length);
3307 = (char *) savealloc (regno_pointer_flag_length);
3308 bzero (regno_pointer_align, regno_pointer_flag_length);
3311 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3312 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3314 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3315 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3316 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3317 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3318 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3320 /* Indicate that the virtual registers and stack locations are
3322 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3323 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3324 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3325 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3327 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3328 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3329 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3330 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3332 #ifdef STACK_BOUNDARY
3333 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3334 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3335 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3336 = STACK_BOUNDARY / BITS_PER_UNIT;
3337 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3339 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3340 = STACK_BOUNDARY / BITS_PER_UNIT;
3341 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3342 = STACK_BOUNDARY / BITS_PER_UNIT;
3343 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3344 = STACK_BOUNDARY / BITS_PER_UNIT;
3345 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3346 = STACK_BOUNDARY / BITS_PER_UNIT;
3349 #ifdef INIT_EXPANDERS
3354 /* Create some permanent unique rtl objects shared between all functions.
3355 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3358 init_emit_once (line_numbers)
3362 enum machine_mode mode;
3364 no_line_numbers = ! line_numbers;
3366 sequence_stack = NULL;
3368 /* Compute the word and byte modes. */
3370 byte_mode = VOIDmode;
3371 word_mode = VOIDmode;
3373 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3374 mode = GET_MODE_WIDER_MODE (mode))
3376 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3377 && byte_mode == VOIDmode)
3380 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3381 && word_mode == VOIDmode)
3385 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3387 /* Create the unique rtx's for certain rtx codes and operand values. */
3389 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3391 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3392 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3393 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3396 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3397 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3398 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3400 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3402 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3403 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3404 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3405 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3407 for (i = 0; i <= 2; i++)
3409 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3410 mode = GET_MODE_WIDER_MODE (mode))
3412 rtx tem = rtx_alloc (CONST_DOUBLE);
3413 union real_extract u;
3415 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3416 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3418 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3419 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3420 PUT_MODE (tem, mode);
3422 const_tiny_rtx[i][(int) mode] = tem;
3425 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3427 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3428 mode = GET_MODE_WIDER_MODE (mode))
3429 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3431 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3433 mode = GET_MODE_WIDER_MODE (mode))
3434 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3437 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3438 mode = GET_MODE_WIDER_MODE (mode))
3439 const_tiny_rtx[0][(int) mode] = const0_rtx;
3442 /* Assign register numbers to the globally defined register rtx.
3443 This must be done at runtime because the register number field
3444 is in a union and some compilers can't initialize unions. */
3446 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3447 PUT_MODE (stack_pointer_rtx, Pmode);
3448 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3449 PUT_MODE (frame_pointer_rtx, Pmode);
3450 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3451 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3452 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3454 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3455 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3456 PUT_MODE (arg_pointer_rtx, Pmode);
3459 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3460 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3461 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3462 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3463 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3464 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3465 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3466 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3468 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3469 return_address_pointer_rtx
3470 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3474 struct_value_rtx = STRUCT_VALUE;
3476 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3479 #ifdef STRUCT_VALUE_INCOMING
3480 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3482 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3483 struct_value_incoming_rtx
3484 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3486 struct_value_incoming_rtx = struct_value_rtx;
3490 #ifdef STATIC_CHAIN_REGNUM
3491 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3493 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3494 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3495 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3498 static_chain_incoming_rtx = static_chain_rtx;
3502 static_chain_rtx = STATIC_CHAIN;
3504 #ifdef STATIC_CHAIN_INCOMING
3505 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3507 static_chain_incoming_rtx = static_chain_rtx;
3511 #ifdef PIC_OFFSET_TABLE_REGNUM
3512 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3516 /* Query and clear/ restore no_line_numbers. This is used by the
3517 switch / case handling in stmt.c to give proper line numbers in
3518 warnings about unreachable code. */
3521 force_line_numbers ()
3523 int old = no_line_numbers;
3525 no_line_numbers = 0;
3527 force_next_line_note ();
3532 restore_line_number_status (old_value)
3535 no_line_numbers = old_value;