1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 /* The basic idea of common subexpression elimination is to go
39 through the code, keeping a record of expressions that would
40 have the same value at the current scan point, and replacing
41 expressions encountered with the cheapest equivalent expression.
43 It is too complicated to keep track of the different possibilities
44 when control paths merge; so, at each label, we forget all that is
45 known and start fresh. This can be described as processing each
46 basic block separately. Note, however, that these are not quite
47 the same as the basic blocks found by a later pass and used for
48 data flow analysis and register packing. We do not need to start fresh
49 after a conditional jump instruction if there is no label there.
51 We use two data structures to record the equivalent expressions:
52 a hash table for most expressions, and several vectors together
53 with "quantity numbers" to record equivalent (pseudo) registers.
55 The use of the special data structure for registers is desirable
56 because it is faster. It is possible because registers references
57 contain a fairly small number, the register number, taken from
58 a contiguously allocated series, and two register references are
59 identical if they have the same number. General expressions
60 do not have any such thing, so the only way to retrieve the
61 information recorded on an expression other than a register
62 is to keep it in a hash table.
64 Registers and "quantity numbers":
66 At the start of each basic block, all of the (hardware and pseudo)
67 registers used in the function are given distinct quantity
68 numbers to indicate their contents. During scan, when the code
69 copies one register into another, we copy the quantity number.
70 When a register is loaded in any other way, we allocate a new
71 quantity number to describe the value generated by this operation.
72 `reg_qty' records what quantity a register is currently thought
75 All real quantity numbers are greater than or equal to `max_reg'.
76 If register N has not been assigned a quantity, reg_qty[N] will equal N.
78 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
79 variables should be referenced with an index below `max_reg'.
81 We also maintain a bidirectional chain of registers for each
82 quantity number. `qty_first_reg', `qty_last_reg',
83 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
85 The first register in a chain is the one whose lifespan is least local.
86 Among equals, it is the one that was seen first.
87 We replace any equivalent register with that one.
89 If two registers have the same quantity number, it must be true that
90 REG expressions with `qty_mode' must be in the hash table for both
91 registers and must be in the same class.
93 The converse is not true. Since hard registers may be referenced in
94 any mode, two REG expressions might be equivalent in the hash table
95 but not have the same quantity number if the quantity number of one
96 of the registers is not the same mode as those expressions.
98 Constants and quantity numbers
100 When a quantity has a known constant value, that value is stored
101 in the appropriate element of qty_const. This is in addition to
102 putting the constant in the hash table as is usual for non-regs.
104 Whether a reg or a constant is preferred is determined by the configuration
105 macro CONST_COSTS and will often depend on the constant value. In any
106 event, expressions containing constants can be simplified, by fold_rtx.
108 When a quantity has a known nearly constant value (such as an address
109 of a stack slot), that value is stored in the appropriate element
112 Integer constants don't have a machine mode. However, cse
113 determines the intended machine mode from the destination
114 of the instruction that moves the constant. The machine mode
115 is recorded in the hash table along with the actual RTL
116 constant expression so that different modes are kept separate.
120 To record known equivalences among expressions in general
121 we use a hash table called `table'. It has a fixed number of buckets
122 that contain chains of `struct table_elt' elements for expressions.
123 These chains connect the elements whose expressions have the same
126 Other chains through the same elements connect the elements which
127 currently have equivalent values.
129 Register references in an expression are canonicalized before hashing
130 the expression. This is done using `reg_qty' and `qty_first_reg'.
131 The hash code of a register reference is computed using the quantity
132 number, not the register number.
134 When the value of an expression changes, it is necessary to remove from the
135 hash table not just that expression but all expressions whose values
136 could be different as a result.
138 1. If the value changing is in memory, except in special cases
139 ANYTHING referring to memory could be changed. That is because
140 nobody knows where a pointer does not point.
141 The function `invalidate_memory' removes what is necessary.
143 The special cases are when the address is constant or is
144 a constant plus a fixed register such as the frame pointer
145 or a static chain pointer. When such addresses are stored in,
146 we can tell exactly which other such addresses must be invalidated
147 due to overlap. `invalidate' does this.
148 All expressions that refer to non-constant
149 memory addresses are also invalidated. `invalidate_memory' does this.
151 2. If the value changing is a register, all expressions
152 containing references to that register, and only those,
155 Because searching the entire hash table for expressions that contain
156 a register is very slow, we try to figure out when it isn't necessary.
157 Precisely, this is necessary only when expressions have been
158 entered in the hash table using this register, and then the value has
159 changed, and then another expression wants to be added to refer to
160 the register's new value. This sequence of circumstances is rare
161 within any one basic block.
163 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
164 reg_tick[i] is incremented whenever a value is stored in register i.
165 reg_in_table[i] holds -1 if no references to register i have been
166 entered in the table; otherwise, it contains the value reg_tick[i] had
167 when the references were entered. If we want to enter a reference
168 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
169 Until we want to enter a new entry, the mere fact that the two vectors
170 don't match makes the entries be ignored if anyone tries to match them.
172 Registers themselves are entered in the hash table as well as in
173 the equivalent-register chains. However, the vectors `reg_tick'
174 and `reg_in_table' do not apply to expressions which are simple
175 register references. These expressions are removed from the table
176 immediately when they become invalid, and this can be done even if
177 we do not immediately search for all the expressions that refer to
180 A CLOBBER rtx in an instruction invalidates its operand for further
181 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
182 invalidates everything that resides in memory.
186 Constant expressions that differ only by an additive integer
187 are called related. When a constant expression is put in
188 the table, the related expression with no constant term
189 is also entered. These are made to point at each other
190 so that it is possible to find out if there exists any
191 register equivalent to an expression related to a given expression. */
193 /* One plus largest register number used in this function. */
197 /* One plus largest instruction UID used in this function at time of
200 static int max_insn_uid;
202 /* Length of vectors indexed by quantity number.
203 We know in advance we will not need a quantity number this big. */
207 /* Next quantity number to be allocated.
208 This is 1 + the largest number needed so far. */
212 /* Indexed by quantity number, gives the first (or last) register
213 in the chain of registers that currently contain this quantity. */
215 static int *qty_first_reg;
216 static int *qty_last_reg;
218 /* Index by quantity number, gives the mode of the quantity. */
220 static enum machine_mode *qty_mode;
222 /* Indexed by quantity number, gives the rtx of the constant value of the
223 quantity, or zero if it does not have a known value.
224 A sum of the frame pointer (or arg pointer) plus a constant
225 can also be entered here. */
227 static rtx *qty_const;
229 /* Indexed by qty number, gives the insn that stored the constant value
230 recorded in `qty_const'. */
232 static rtx *qty_const_insn;
234 /* The next three variables are used to track when a comparison between a
235 quantity and some constant or register has been passed. In that case, we
236 know the results of the comparison in case we see it again. These variables
237 record a comparison that is known to be true. */
239 /* Indexed by qty number, gives the rtx code of a comparison with a known
240 result involving this quantity. If none, it is UNKNOWN. */
241 static enum rtx_code *qty_comparison_code;
243 /* Indexed by qty number, gives the constant being compared against in a
244 comparison of known result. If no such comparison, it is undefined.
245 If the comparison is not with a constant, it is zero. */
247 static rtx *qty_comparison_const;
249 /* Indexed by qty number, gives the quantity being compared against in a
250 comparison of known result. If no such comparison, if it undefined.
251 If the comparison is not with a register, it is -1. */
253 static int *qty_comparison_qty;
256 /* For machines that have a CC0, we do not record its value in the hash
257 table since its use is guaranteed to be the insn immediately following
258 its definition and any other insn is presumed to invalidate it.
260 Instead, we store below the value last assigned to CC0. If it should
261 happen to be a constant, it is stored in preference to the actual
262 assigned value. In case it is a constant, we store the mode in which
263 the constant should be interpreted. */
265 static rtx prev_insn_cc0;
266 static enum machine_mode prev_insn_cc0_mode;
269 /* Previous actual insn. 0 if at first insn of basic block. */
271 static rtx prev_insn;
273 /* Insn being scanned. */
275 static rtx this_insn;
277 /* Index by register number, gives the quantity number
278 of the register's current contents. */
282 /* Index by register number, gives the number of the next (or
283 previous) register in the chain of registers sharing the same
286 Or -1 if this register is at the end of the chain.
288 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
290 static int *reg_next_eqv;
291 static int *reg_prev_eqv;
293 /* Index by register number, gives the number of times
294 that register has been altered in the current basic block. */
296 static int *reg_tick;
298 /* Index by register number, gives the reg_tick value at which
299 rtx's containing this register are valid in the hash table.
300 If this does not equal the current reg_tick value, such expressions
301 existing in the hash table are invalid.
302 If this is -1, no expressions containing this register have been
303 entered in the table. */
305 static int *reg_in_table;
307 /* A HARD_REG_SET containing all the hard registers for which there is
308 currently a REG expression in the hash table. Note the difference
309 from the above variables, which indicate if the REG is mentioned in some
310 expression in the table. */
312 static HARD_REG_SET hard_regs_in_table;
314 /* A HARD_REG_SET containing all the hard registers that are invalidated
317 static HARD_REG_SET regs_invalidated_by_call;
319 /* Two vectors of ints:
320 one containing max_reg -1's; the other max_reg + 500 (an approximation
321 for max_qty) elements where element i contains i.
322 These are used to initialize various other vectors fast. */
324 static int *all_minus_one;
325 static int *consec_ints;
327 /* CUID of insn that starts the basic block currently being cse-processed. */
329 static int cse_basic_block_start;
331 /* CUID of insn that ends the basic block currently being cse-processed. */
333 static int cse_basic_block_end;
335 /* Vector mapping INSN_UIDs to cuids.
336 The cuids are like uids but increase monotonically always.
337 We use them to see whether a reg is used outside a given basic block. */
339 static int *uid_cuid;
341 /* Highest UID in UID_CUID. */
344 /* Get the cuid of an insn. */
346 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
348 /* Nonzero if cse has altered conditional jump insns
349 in such a way that jump optimization should be redone. */
351 static int cse_jumps_altered;
353 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
354 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
355 to put in the note. */
356 static int recorded_label_ref;
358 /* canon_hash stores 1 in do_not_record
359 if it notices a reference to CC0, PC, or some other volatile
362 static int do_not_record;
364 #ifdef LOAD_EXTEND_OP
366 /* Scratch rtl used when looking for load-extended copy of a MEM. */
367 static rtx memory_extend_rtx;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory;
375 /* canon_hash stores 1 in hash_arg_in_struct
376 if it notices a reference to memory that's part of a structure. */
378 static int hash_arg_in_struct;
380 /* The hash table contains buckets which are chains of `struct table_elt's,
381 each recording one expression's information.
382 That expression is in the `exp' field.
384 Those elements with the same hash code are chained in both directions
385 through the `next_same_hash' and `prev_same_hash' fields.
387 Each set of expressions with equivalent values
388 are on a two-way chain through the `next_same_value'
389 and `prev_same_value' fields, and all point with
390 the `first_same_value' field at the first element in
391 that chain. The chain is in order of increasing cost.
392 Each element's cost value is in its `cost' field.
394 The `in_memory' field is nonzero for elements that
395 involve any reference to memory. These elements are removed
396 whenever a write is done to an unidentified location in memory.
397 To be safe, we assume that a memory address is unidentified unless
398 the address is either a symbol constant or a constant plus
399 the frame pointer or argument pointer.
401 The `in_struct' field is nonzero for elements that
402 involve any reference to memory inside a structure or array.
404 The `related_value' field is used to connect related expressions
405 (that differ by adding an integer).
406 The related expressions are chained in a circular fashion.
407 `related_value' is zero for expressions for which this
410 The `cost' field stores the cost of this element's expression.
412 The `is_const' flag is set if the element is a constant (including
415 The `flag' field is used as a temporary during some search routines.
417 The `mode' field is usually the same as GET_MODE (`exp'), but
418 if `exp' is a CONST_INT and has no machine mode then the `mode'
419 field is the mode it was being used as. Each constant is
420 recorded separately for each mode it is used with. */
426 struct table_elt *next_same_hash;
427 struct table_elt *prev_same_hash;
428 struct table_elt *next_same_value;
429 struct table_elt *prev_same_value;
430 struct table_elt *first_same_value;
431 struct table_elt *related_value;
433 enum machine_mode mode;
440 /* We don't want a lot of buckets, because we rarely have very many
441 things stored in the hash table, and a lot of buckets slows
442 down a lot of loops that happen frequently. */
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
451 : canon_hash (X, M) % NBUCKETS)
453 /* Determine whether register number N is considered a fixed register for CSE.
454 It is desirable to replace other regs with fixed regs, to reduce need for
456 A reg wins if it is either the frame pointer or designated as fixed,
457 but not if it is an overlapping register. */
458 #ifdef OVERLAPPING_REGNO_P
459 #define FIXED_REGNO_P(N) \
460 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
461 || fixed_regs[N] || global_regs[N]) \
462 && ! OVERLAPPING_REGNO_P ((N)))
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
476 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
477 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
478 || ((N) < FIRST_PSEUDO_REGISTER \
479 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
481 /* A register is cheap if it is a user variable assigned to the register
482 or if its register number always corresponds to a cheap register. */
484 #define CHEAP_REG(N) \
485 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
486 || CHEAP_REGNO (REGNO (N)))
489 (GET_CODE (X) == REG \
490 ? (CHEAP_REG (X) ? 0 \
491 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
495 /* Determine if the quantity number for register X represents a valid index
496 into the `qty_...' variables. */
498 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
501 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
502 during CSE, such nodes are present. Using an ADDRESSOF node which
503 refers to the address of a REG is a good thing because we can then
504 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
505 #define CSE_ADDRESS_COST(RTX) \
506 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
507 ? -1 : ADDRESS_COST(RTX))
510 static struct table_elt *table[NBUCKETS];
512 /* Chain of `struct table_elt's made so far for this function
513 but currently removed from the table. */
515 static struct table_elt *free_element_chain;
517 /* Number of `struct table_elt' structures made so far for this function. */
519 static int n_elements_made;
521 /* Maximum value `n_elements_made' has had so far in this compilation
522 for functions previously processed. */
524 static int max_elements_made;
526 /* Surviving equivalence class when two equivalence classes are merged
527 by recording the effects of a jump in the last insn. Zero if the
528 last insn was not a conditional jump. */
530 static struct table_elt *last_jump_equiv_class;
532 /* Set to the cost of a constant pool reference if one was found for a
533 symbolic constant. If this was found, it means we should try to
534 convert constants into constant pool entries if they don't fit in
537 static int constant_pool_entries_cost;
539 /* Define maximum length of a branch path. */
541 #define PATHLENGTH 10
543 /* This data describes a block that will be processed by cse_basic_block. */
545 struct cse_basic_block_data {
546 /* Lowest CUID value of insns in block. */
548 /* Highest CUID value of insns in block. */
550 /* Total number of SETs in block. */
552 /* Last insn in the block. */
554 /* Size of current branch path, if any. */
556 /* Current branch path, indicating which branches will be taken. */
558 /* The branch insn. */
560 /* Whether it should be taken or not. AROUND is the same as taken
561 except that it is used when the destination label is not preceded
563 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
567 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
568 virtual regs here because the simplify_*_operation routines are called
569 by integrate.c, which is called before virtual register instantiation. */
571 #define FIXED_BASE_PLUS_P(X) \
572 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
573 || (X) == arg_pointer_rtx \
574 || (X) == virtual_stack_vars_rtx \
575 || (X) == virtual_incoming_args_rtx \
576 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
577 && (XEXP (X, 0) == frame_pointer_rtx \
578 || XEXP (X, 0) == hard_frame_pointer_rtx \
579 || XEXP (X, 0) == arg_pointer_rtx \
580 || XEXP (X, 0) == virtual_stack_vars_rtx \
581 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
582 || GET_CODE (X) == ADDRESSOF)
584 /* Similar, but also allows reference to the stack pointer.
586 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
587 arg_pointer_rtx by itself is nonzero, because on at least one machine,
588 the i960, the arg pointer is zero when it is unused. */
590 #define NONZERO_BASE_PLUS_P(X) \
591 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
592 || (X) == virtual_stack_vars_rtx \
593 || (X) == virtual_incoming_args_rtx \
594 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
595 && (XEXP (X, 0) == frame_pointer_rtx \
596 || XEXP (X, 0) == hard_frame_pointer_rtx \
597 || XEXP (X, 0) == arg_pointer_rtx \
598 || XEXP (X, 0) == virtual_stack_vars_rtx \
599 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
600 || (X) == stack_pointer_rtx \
601 || (X) == virtual_stack_dynamic_rtx \
602 || (X) == virtual_outgoing_args_rtx \
603 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
604 && (XEXP (X, 0) == stack_pointer_rtx \
605 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
606 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
607 || GET_CODE (X) == ADDRESSOF)
609 static int notreg_cost PROTO((rtx));
610 static void new_basic_block PROTO((void));
611 static void make_new_qty PROTO((int));
612 static void make_regs_eqv PROTO((int, int));
613 static void delete_reg_equiv PROTO((int));
614 static int mention_regs PROTO((rtx));
615 static int insert_regs PROTO((rtx, struct table_elt *, int));
616 static void free_element PROTO((struct table_elt *));
617 static void remove_from_table PROTO((struct table_elt *, unsigned));
618 static struct table_elt *get_element PROTO((void));
619 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
620 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
621 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
622 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
624 static void merge_equiv_classes PROTO((struct table_elt *,
625 struct table_elt *));
626 static void invalidate PROTO((rtx, enum machine_mode));
627 static int cse_rtx_varies_p PROTO((rtx));
628 static void remove_invalid_refs PROTO((int));
629 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
630 static void rehash_using_reg PROTO((rtx));
631 static void invalidate_memory PROTO((void));
632 static void invalidate_for_call PROTO((void));
633 static rtx use_related_value PROTO((rtx, struct table_elt *));
634 static unsigned canon_hash PROTO((rtx, enum machine_mode));
635 static unsigned safe_hash PROTO((rtx, enum machine_mode));
636 static int exp_equiv_p PROTO((rtx, rtx, int, int));
637 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
640 static int refers_to_p PROTO((rtx, rtx));
641 static rtx canon_reg PROTO((rtx, rtx));
642 static void find_best_addr PROTO((rtx, rtx *));
643 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
645 enum machine_mode *));
646 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
648 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
650 static rtx fold_rtx PROTO((rtx, rtx));
651 static rtx equiv_constant PROTO((rtx));
652 static void record_jump_equiv PROTO((rtx, int));
653 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
655 static void cse_insn PROTO((rtx, rtx));
656 static int note_mem_written PROTO((rtx));
657 static void invalidate_from_clobbers PROTO((rtx));
658 static rtx cse_process_notes PROTO((rtx, rtx));
659 static void cse_around_loop PROTO((rtx));
660 static void invalidate_skipped_set PROTO((rtx, rtx));
661 static void invalidate_skipped_block PROTO((rtx));
662 static void cse_check_loop_start PROTO((rtx, rtx));
663 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
664 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
665 static void count_reg_usage PROTO((rtx, int *, rtx, int));
666 extern void dump_class PROTO((struct table_elt*));
668 extern int rtx_equal_function_value_matters;
670 /* Dump the expressions in the equivalence class indicated by CLASSP.
671 This function is used only for debugging. */
674 struct table_elt *classp;
676 struct table_elt *elt;
678 fprintf (stderr, "Equivalence chain for ");
679 print_rtl (stderr, classp->exp);
680 fprintf (stderr, ": \n");
682 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
684 print_rtl (stderr, elt->exp);
685 fprintf (stderr, "\n");
689 /* Return an estimate of the cost of computing rtx X.
690 One use is in cse, to decide which expression to keep in the hash table.
691 Another is in rtl generation, to pick the cheapest way to multiply.
692 Other uses like the latter are expected in the future. */
694 /* Internal function, to compute cost when X is not a register; called
695 from COST macro to keep it simple. */
701 return ((GET_CODE (x) == SUBREG
702 && GET_CODE (SUBREG_REG (x)) == REG
703 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
704 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
705 && (GET_MODE_SIZE (GET_MODE (x))
706 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
707 && subreg_lowpart_p (x)
708 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
709 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
710 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
711 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
713 : rtx_cost (x, SET) * 2);
716 /* Return the right cost to give to an operation
717 to make the cost of the corresponding register-to-register instruction
718 N times that of a fast register-to-register instruction. */
720 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
723 rtx_cost (x, outer_code)
725 enum rtx_code outer_code ATTRIBUTE_UNUSED;
728 register enum rtx_code code;
735 /* Compute the default costs of certain things.
736 Note that RTX_COSTS can override the defaults. */
742 /* Count multiplication by 2**n as a shift,
743 because if we are considering it, we would output it as a shift. */
744 if (GET_CODE (XEXP (x, 1)) == CONST_INT
745 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
748 total = COSTS_N_INSNS (5);
754 total = COSTS_N_INSNS (7);
757 /* Used in loop.c and combine.c as a marker. */
761 /* We don't want these to be used in substitutions because
762 we have no way of validating the resulting insn. So assign
763 anything containing an ASM_OPERANDS a very high cost. */
773 return ! CHEAP_REG (x);
776 /* If we can't tie these modes, make this expensive. The larger
777 the mode, the more expensive it is. */
778 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
779 return COSTS_N_INSNS (2
780 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
783 RTX_COSTS (x, code, outer_code);
786 CONST_COSTS (x, code, outer_code);
790 #ifdef DEFAULT_RTX_COSTS
791 DEFAULT_RTX_COSTS(x, code, outer_code);
796 /* Sum the costs of the sub-rtx's, plus cost of this operation,
797 which is already in total. */
799 fmt = GET_RTX_FORMAT (code);
800 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
802 total += rtx_cost (XEXP (x, i), code);
803 else if (fmt[i] == 'E')
804 for (j = 0; j < XVECLEN (x, i); j++)
805 total += rtx_cost (XVECEXP (x, i, j), code);
810 /* Clear the hash table and initialize each register with its own quantity,
811 for a new basic block. */
820 bzero ((char *) reg_tick, max_reg * sizeof (int));
822 bcopy ((char *) all_minus_one, (char *) reg_in_table,
823 max_reg * sizeof (int));
824 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
825 CLEAR_HARD_REG_SET (hard_regs_in_table);
827 /* The per-quantity values used to be initialized here, but it is
828 much faster to initialize each as it is made in `make_new_qty'. */
830 for (i = 0; i < NBUCKETS; i++)
832 register struct table_elt *this, *next;
833 for (this = table[i]; this; this = next)
835 next = this->next_same_hash;
840 bzero ((char *) table, sizeof table);
849 /* Say that register REG contains a quantity not in any register before
850 and initialize that quantity. */
858 if (next_qty >= max_qty)
861 q = reg_qty[reg] = next_qty++;
862 qty_first_reg[q] = reg;
863 qty_last_reg[q] = reg;
864 qty_const[q] = qty_const_insn[q] = 0;
865 qty_comparison_code[q] = UNKNOWN;
867 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
870 /* Make reg NEW equivalent to reg OLD.
871 OLD is not changing; NEW is. */
874 make_regs_eqv (new, old)
875 register int new, old;
877 register int lastr, firstr;
878 register int q = reg_qty[old];
880 /* Nothing should become eqv until it has a "non-invalid" qty number. */
881 if (! REGNO_QTY_VALID_P (old))
885 firstr = qty_first_reg[q];
886 lastr = qty_last_reg[q];
888 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
889 hard regs. Among pseudos, if NEW will live longer than any other reg
890 of the same qty, and that is beyond the current basic block,
891 make it the new canonical replacement for this qty. */
892 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
893 /* Certain fixed registers might be of the class NO_REGS. This means
894 that not only can they not be allocated by the compiler, but
895 they cannot be used in substitutions or canonicalizations
897 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
898 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
899 || (new >= FIRST_PSEUDO_REGISTER
900 && (firstr < FIRST_PSEUDO_REGISTER
901 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
902 || (uid_cuid[REGNO_FIRST_UID (new)]
903 < cse_basic_block_start))
904 && (uid_cuid[REGNO_LAST_UID (new)]
905 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
907 reg_prev_eqv[firstr] = new;
908 reg_next_eqv[new] = firstr;
909 reg_prev_eqv[new] = -1;
910 qty_first_reg[q] = new;
914 /* If NEW is a hard reg (known to be non-fixed), insert at end.
915 Otherwise, insert before any non-fixed hard regs that are at the
916 end. Registers of class NO_REGS cannot be used as an
917 equivalent for anything. */
918 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
919 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
920 && new >= FIRST_PSEUDO_REGISTER)
921 lastr = reg_prev_eqv[lastr];
922 reg_next_eqv[new] = reg_next_eqv[lastr];
923 if (reg_next_eqv[lastr] >= 0)
924 reg_prev_eqv[reg_next_eqv[lastr]] = new;
926 qty_last_reg[q] = new;
927 reg_next_eqv[lastr] = new;
928 reg_prev_eqv[new] = lastr;
932 /* Remove REG from its equivalence class. */
935 delete_reg_equiv (reg)
938 register int q = reg_qty[reg];
941 /* If invalid, do nothing. */
945 p = reg_prev_eqv[reg];
946 n = reg_next_eqv[reg];
955 qty_first_reg[q] = n;
960 /* Remove any invalid expressions from the hash table
961 that refer to any of the registers contained in expression X.
963 Make sure that newly inserted references to those registers
964 as subexpressions will be considered valid.
966 mention_regs is not called when a register itself
967 is being stored in the table.
969 Return 1 if we have done something that may have changed the hash code
976 register enum rtx_code code;
979 register int changed = 0;
987 register int regno = REGNO (x);
988 register int endregno
989 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
990 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
993 for (i = regno; i < endregno; i++)
995 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
996 remove_invalid_refs (i);
998 reg_in_table[i] = reg_tick[i];
1004 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1005 pseudo if they don't use overlapping words. We handle only pseudos
1006 here for simplicity. */
1007 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1008 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1010 int i = REGNO (SUBREG_REG (x));
1012 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
1014 /* If reg_tick has been incremented more than once since
1015 reg_in_table was last set, that means that the entire
1016 register has been set before, so discard anything memorized
1017 for the entrire register, including all SUBREG expressions. */
1018 if (reg_in_table[i] != reg_tick[i] - 1)
1019 remove_invalid_refs (i);
1021 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1024 reg_in_table[i] = reg_tick[i];
1028 /* If X is a comparison or a COMPARE and either operand is a register
1029 that does not have a quantity, give it one. This is so that a later
1030 call to record_jump_equiv won't cause X to be assigned a different
1031 hash code and not found in the table after that call.
1033 It is not necessary to do this here, since rehash_using_reg can
1034 fix up the table later, but doing this here eliminates the need to
1035 call that expensive function in the most common case where the only
1036 use of the register is in the comparison. */
1038 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1040 if (GET_CODE (XEXP (x, 0)) == REG
1041 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1042 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1044 rehash_using_reg (XEXP (x, 0));
1048 if (GET_CODE (XEXP (x, 1)) == REG
1049 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1050 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1052 rehash_using_reg (XEXP (x, 1));
1057 fmt = GET_RTX_FORMAT (code);
1058 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1060 changed |= mention_regs (XEXP (x, i));
1061 else if (fmt[i] == 'E')
1062 for (j = 0; j < XVECLEN (x, i); j++)
1063 changed |= mention_regs (XVECEXP (x, i, j));
1068 /* Update the register quantities for inserting X into the hash table
1069 with a value equivalent to CLASSP.
1070 (If the class does not contain a REG, it is irrelevant.)
1071 If MODIFIED is nonzero, X is a destination; it is being modified.
1072 Note that delete_reg_equiv should be called on a register
1073 before insert_regs is done on that register with MODIFIED != 0.
1075 Nonzero value means that elements of reg_qty have changed
1076 so X's hash code may be different. */
1079 insert_regs (x, classp, modified)
1081 struct table_elt *classp;
1084 if (GET_CODE (x) == REG)
1086 register int regno = REGNO (x);
1088 /* If REGNO is in the equivalence table already but is of the
1089 wrong mode for that equivalence, don't do anything here. */
1091 if (REGNO_QTY_VALID_P (regno)
1092 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1095 if (modified || ! REGNO_QTY_VALID_P (regno))
1098 for (classp = classp->first_same_value;
1100 classp = classp->next_same_value)
1101 if (GET_CODE (classp->exp) == REG
1102 && GET_MODE (classp->exp) == GET_MODE (x))
1104 make_regs_eqv (regno, REGNO (classp->exp));
1108 make_new_qty (regno);
1109 qty_mode[reg_qty[regno]] = GET_MODE (x);
1116 /* If X is a SUBREG, we will likely be inserting the inner register in the
1117 table. If that register doesn't have an assigned quantity number at
1118 this point but does later, the insertion that we will be doing now will
1119 not be accessible because its hash code will have changed. So assign
1120 a quantity number now. */
1122 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1123 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1125 int regno = REGNO (SUBREG_REG (x));
1127 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1128 /* Mention_regs checks if REG_TICK is exactly one larger than
1129 REG_IN_TABLE to find out if there was only a single preceding
1130 invalidation - for the SUBREG - or another one, which would be
1131 for the full register. Since we don't invalidate the SUBREG
1132 here first, we might have to bump up REG_TICK so that mention_regs
1133 will do the right thing. */
1134 if (reg_in_table[regno] >= 0
1135 && reg_tick[regno] == reg_in_table[regno] + 1)
1141 return mention_regs (x);
1144 /* Look in or update the hash table. */
1146 /* Put the element ELT on the list of free elements. */
1150 struct table_elt *elt;
1152 elt->next_same_hash = free_element_chain;
1153 free_element_chain = elt;
1156 /* Return an element that is free for use. */
1158 static struct table_elt *
1161 struct table_elt *elt = free_element_chain;
1164 free_element_chain = elt->next_same_hash;
1168 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1171 /* Remove table element ELT from use in the table.
1172 HASH is its hash code, made using the HASH macro.
1173 It's an argument because often that is known in advance
1174 and we save much time not recomputing it. */
1177 remove_from_table (elt, hash)
1178 register struct table_elt *elt;
1184 /* Mark this element as removed. See cse_insn. */
1185 elt->first_same_value = 0;
1187 /* Remove the table element from its equivalence class. */
1190 register struct table_elt *prev = elt->prev_same_value;
1191 register struct table_elt *next = elt->next_same_value;
1193 if (next) next->prev_same_value = prev;
1196 prev->next_same_value = next;
1199 register struct table_elt *newfirst = next;
1202 next->first_same_value = newfirst;
1203 next = next->next_same_value;
1208 /* Remove the table element from its hash bucket. */
1211 register struct table_elt *prev = elt->prev_same_hash;
1212 register struct table_elt *next = elt->next_same_hash;
1214 if (next) next->prev_same_hash = prev;
1217 prev->next_same_hash = next;
1218 else if (table[hash] == elt)
1222 /* This entry is not in the proper hash bucket. This can happen
1223 when two classes were merged by `merge_equiv_classes'. Search
1224 for the hash bucket that it heads. This happens only very
1225 rarely, so the cost is acceptable. */
1226 for (hash = 0; hash < NBUCKETS; hash++)
1227 if (table[hash] == elt)
1232 /* Remove the table element from its related-value circular chain. */
1234 if (elt->related_value != 0 && elt->related_value != elt)
1236 register struct table_elt *p = elt->related_value;
1237 while (p->related_value != elt)
1238 p = p->related_value;
1239 p->related_value = elt->related_value;
1240 if (p->related_value == p)
1241 p->related_value = 0;
1247 /* Look up X in the hash table and return its table element,
1248 or 0 if X is not in the table.
1250 MODE is the machine-mode of X, or if X is an integer constant
1251 with VOIDmode then MODE is the mode with which X will be used.
1253 Here we are satisfied to find an expression whose tree structure
1256 static struct table_elt *
1257 lookup (x, hash, mode)
1260 enum machine_mode mode;
1262 register struct table_elt *p;
1264 for (p = table[hash]; p; p = p->next_same_hash)
1265 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1266 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1272 /* Like `lookup' but don't care whether the table element uses invalid regs.
1273 Also ignore discrepancies in the machine mode of a register. */
1275 static struct table_elt *
1276 lookup_for_remove (x, hash, mode)
1279 enum machine_mode mode;
1281 register struct table_elt *p;
1283 if (GET_CODE (x) == REG)
1285 int regno = REGNO (x);
1286 /* Don't check the machine mode when comparing registers;
1287 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1288 for (p = table[hash]; p; p = p->next_same_hash)
1289 if (GET_CODE (p->exp) == REG
1290 && REGNO (p->exp) == regno)
1295 for (p = table[hash]; p; p = p->next_same_hash)
1296 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1303 /* Look for an expression equivalent to X and with code CODE.
1304 If one is found, return that expression. */
1307 lookup_as_function (x, code)
1311 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1313 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1314 long as we are narrowing. So if we looked in vain for a mode narrower
1315 than word_mode before, look for word_mode now. */
1316 if (p == 0 && code == CONST_INT
1317 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1320 PUT_MODE (x, word_mode);
1321 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1327 for (p = p->first_same_value; p; p = p->next_same_value)
1329 if (GET_CODE (p->exp) == code
1330 /* Make sure this is a valid entry in the table. */
1331 && exp_equiv_p (p->exp, p->exp, 1, 0))
1338 /* Insert X in the hash table, assuming HASH is its hash code
1339 and CLASSP is an element of the class it should go in
1340 (or 0 if a new class should be made).
1341 It is inserted at the proper position to keep the class in
1342 the order cheapest first.
1344 MODE is the machine-mode of X, or if X is an integer constant
1345 with VOIDmode then MODE is the mode with which X will be used.
1347 For elements of equal cheapness, the most recent one
1348 goes in front, except that the first element in the list
1349 remains first unless a cheaper element is added. The order of
1350 pseudo-registers does not matter, as canon_reg will be called to
1351 find the cheapest when a register is retrieved from the table.
1353 The in_memory field in the hash table element is set to 0.
1354 The caller must set it nonzero if appropriate.
1356 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1357 and if insert_regs returns a nonzero value
1358 you must then recompute its hash code before calling here.
1360 If necessary, update table showing constant values of quantities. */
1362 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1364 static struct table_elt *
1365 insert (x, classp, hash, mode)
1367 register struct table_elt *classp;
1369 enum machine_mode mode;
1371 register struct table_elt *elt;
1373 /* If X is a register and we haven't made a quantity for it,
1374 something is wrong. */
1375 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1378 /* If X is a hard register, show it is being put in the table. */
1379 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1381 int regno = REGNO (x);
1382 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1385 for (i = regno; i < endregno; i++)
1386 SET_HARD_REG_BIT (hard_regs_in_table, i);
1389 /* If X is a label, show we recorded it. */
1390 if (GET_CODE (x) == LABEL_REF
1391 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1392 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1393 recorded_label_ref = 1;
1395 /* Put an element for X into the right hash bucket. */
1397 elt = get_element ();
1399 elt->cost = COST (x);
1400 elt->next_same_value = 0;
1401 elt->prev_same_value = 0;
1402 elt->next_same_hash = table[hash];
1403 elt->prev_same_hash = 0;
1404 elt->related_value = 0;
1407 elt->is_const = (CONSTANT_P (x)
1408 /* GNU C++ takes advantage of this for `this'
1409 (and other const values). */
1410 || (RTX_UNCHANGING_P (x)
1411 && GET_CODE (x) == REG
1412 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1413 || FIXED_BASE_PLUS_P (x));
1416 table[hash]->prev_same_hash = elt;
1419 /* Put it into the proper value-class. */
1422 classp = classp->first_same_value;
1423 if (CHEAPER (elt, classp))
1424 /* Insert at the head of the class */
1426 register struct table_elt *p;
1427 elt->next_same_value = classp;
1428 classp->prev_same_value = elt;
1429 elt->first_same_value = elt;
1431 for (p = classp; p; p = p->next_same_value)
1432 p->first_same_value = elt;
1436 /* Insert not at head of the class. */
1437 /* Put it after the last element cheaper than X. */
1438 register struct table_elt *p, *next;
1439 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1441 /* Put it after P and before NEXT. */
1442 elt->next_same_value = next;
1444 next->prev_same_value = elt;
1445 elt->prev_same_value = p;
1446 p->next_same_value = elt;
1447 elt->first_same_value = classp;
1451 elt->first_same_value = elt;
1453 /* If this is a constant being set equivalent to a register or a register
1454 being set equivalent to a constant, note the constant equivalence.
1456 If this is a constant, it cannot be equivalent to a different constant,
1457 and a constant is the only thing that can be cheaper than a register. So
1458 we know the register is the head of the class (before the constant was
1461 If this is a register that is not already known equivalent to a
1462 constant, we must check the entire class.
1464 If this is a register that is already known equivalent to an insn,
1465 update `qty_const_insn' to show that `this_insn' is the latest
1466 insn making that quantity equivalent to the constant. */
1468 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1469 && GET_CODE (x) != REG)
1471 qty_const[reg_qty[REGNO (classp->exp)]]
1472 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1473 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1476 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]
1479 register struct table_elt *p;
1481 for (p = classp; p != 0; p = p->next_same_value)
1483 if (p->is_const && GET_CODE (p->exp) != REG)
1485 qty_const[reg_qty[REGNO (x)]]
1486 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1487 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1493 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1494 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1495 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1497 /* If this is a constant with symbolic value,
1498 and it has a term with an explicit integer value,
1499 link it up with related expressions. */
1500 if (GET_CODE (x) == CONST)
1502 rtx subexp = get_related_value (x);
1504 struct table_elt *subelt, *subelt_prev;
1508 /* Get the integer-free subexpression in the hash table. */
1509 subhash = safe_hash (subexp, mode) % NBUCKETS;
1510 subelt = lookup (subexp, subhash, mode);
1512 subelt = insert (subexp, NULL_PTR, subhash, mode);
1513 /* Initialize SUBELT's circular chain if it has none. */
1514 if (subelt->related_value == 0)
1515 subelt->related_value = subelt;
1516 /* Find the element in the circular chain that precedes SUBELT. */
1517 subelt_prev = subelt;
1518 while (subelt_prev->related_value != subelt)
1519 subelt_prev = subelt_prev->related_value;
1520 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1521 This way the element that follows SUBELT is the oldest one. */
1522 elt->related_value = subelt_prev->related_value;
1523 subelt_prev->related_value = elt;
1530 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1531 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1532 the two classes equivalent.
1534 CLASS1 will be the surviving class; CLASS2 should not be used after this
1537 Any invalid entries in CLASS2 will not be copied. */
1540 merge_equiv_classes (class1, class2)
1541 struct table_elt *class1, *class2;
1543 struct table_elt *elt, *next, *new;
1545 /* Ensure we start with the head of the classes. */
1546 class1 = class1->first_same_value;
1547 class2 = class2->first_same_value;
1549 /* If they were already equal, forget it. */
1550 if (class1 == class2)
1553 for (elt = class2; elt; elt = next)
1557 enum machine_mode mode = elt->mode;
1559 next = elt->next_same_value;
1561 /* Remove old entry, make a new one in CLASS1's class.
1562 Don't do this for invalid entries as we cannot find their
1563 hash code (it also isn't necessary). */
1564 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1566 hash_arg_in_memory = 0;
1567 hash_arg_in_struct = 0;
1568 hash = HASH (exp, mode);
1570 if (GET_CODE (exp) == REG)
1571 delete_reg_equiv (REGNO (exp));
1573 remove_from_table (elt, hash);
1575 if (insert_regs (exp, class1, 0))
1577 rehash_using_reg (exp);
1578 hash = HASH (exp, mode);
1580 new = insert (exp, class1, hash, mode);
1581 new->in_memory = hash_arg_in_memory;
1582 new->in_struct = hash_arg_in_struct;
1587 /* Remove from the hash table, or mark as invalid,
1588 all expressions whose values could be altered by storing in X.
1589 X is a register, a subreg, or a memory reference with nonvarying address
1590 (because, when a memory reference with a varying address is stored in,
1591 all memory references are removed by invalidate_memory
1592 so specific invalidation is superfluous).
1593 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1594 instead of just the amount indicated by the mode of X. This is only used
1595 for bitfield stores into memory.
1597 A nonvarying address may be just a register or just
1598 a symbol reference, or it may be either of those plus
1599 a numeric offset. */
1602 invalidate (x, full_mode)
1604 enum machine_mode full_mode;
1607 register struct table_elt *p;
1609 /* If X is a register, dependencies on its contents
1610 are recorded through the qty number mechanism.
1611 Just change the qty number of the register,
1612 mark it as invalid for expressions that refer to it,
1613 and remove it itself. */
1615 if (GET_CODE (x) == REG)
1617 register int regno = REGNO (x);
1618 register unsigned hash = HASH (x, GET_MODE (x));
1620 /* Remove REGNO from any quantity list it might be on and indicate
1621 that its value might have changed. If it is a pseudo, remove its
1622 entry from the hash table.
1624 For a hard register, we do the first two actions above for any
1625 additional hard registers corresponding to X. Then, if any of these
1626 registers are in the table, we must remove any REG entries that
1627 overlap these registers. */
1629 delete_reg_equiv (regno);
1632 if (regno >= FIRST_PSEUDO_REGISTER)
1634 /* Because a register can be referenced in more than one mode,
1635 we might have to remove more than one table entry. */
1637 struct table_elt *elt;
1639 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1640 remove_from_table (elt, hash);
1644 HOST_WIDE_INT in_table
1645 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1646 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1647 int tregno, tendregno;
1648 register struct table_elt *p, *next;
1650 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1652 for (i = regno + 1; i < endregno; i++)
1654 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1655 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1656 delete_reg_equiv (i);
1661 for (hash = 0; hash < NBUCKETS; hash++)
1662 for (p = table[hash]; p; p = next)
1664 next = p->next_same_hash;
1666 if (GET_CODE (p->exp) != REG
1667 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1670 tregno = REGNO (p->exp);
1672 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1673 if (tendregno > regno && tregno < endregno)
1674 remove_from_table (p, hash);
1681 if (GET_CODE (x) == SUBREG)
1683 if (GET_CODE (SUBREG_REG (x)) != REG)
1685 invalidate (SUBREG_REG (x), VOIDmode);
1689 /* If X is a parallel, invalidate all of its elements. */
1691 if (GET_CODE (x) == PARALLEL)
1693 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1694 invalidate (XVECEXP (x, 0, i), VOIDmode);
1698 /* If X is an expr_list, this is part of a disjoint return value;
1699 extract the location in question ignoring the offset. */
1701 if (GET_CODE (x) == EXPR_LIST)
1703 invalidate (XEXP (x, 0), VOIDmode);
1707 /* X is not a register; it must be a memory reference with
1708 a nonvarying address. Remove all hash table elements
1709 that refer to overlapping pieces of memory. */
1711 if (GET_CODE (x) != MEM)
1714 if (full_mode == VOIDmode)
1715 full_mode = GET_MODE (x);
1717 for (i = 0; i < NBUCKETS; i++)
1719 register struct table_elt *next;
1720 for (p = table[i]; p; p = next)
1722 next = p->next_same_hash;
1723 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1724 than checking all the aliases). */
1726 && (GET_CODE (p->exp) != MEM
1727 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1728 remove_from_table (p, i);
1733 /* Remove all expressions that refer to register REGNO,
1734 since they are already invalid, and we are about to
1735 mark that register valid again and don't want the old
1736 expressions to reappear as valid. */
1739 remove_invalid_refs (regno)
1743 register struct table_elt *p, *next;
1745 for (i = 0; i < NBUCKETS; i++)
1746 for (p = table[i]; p; p = next)
1748 next = p->next_same_hash;
1749 if (GET_CODE (p->exp) != REG
1750 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1751 remove_from_table (p, i);
1755 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1757 remove_invalid_subreg_refs (regno, word, mode)
1760 enum machine_mode mode;
1763 register struct table_elt *p, *next;
1764 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1766 for (i = 0; i < NBUCKETS; i++)
1767 for (p = table[i]; p; p = next)
1770 next = p->next_same_hash;
1773 if (GET_CODE (p->exp) != REG
1774 && (GET_CODE (exp) != SUBREG
1775 || GET_CODE (SUBREG_REG (exp)) != REG
1776 || REGNO (SUBREG_REG (exp)) != regno
1777 || (((SUBREG_WORD (exp)
1778 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1780 && SUBREG_WORD (exp) <= end))
1781 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1782 remove_from_table (p, i);
1786 /* Recompute the hash codes of any valid entries in the hash table that
1787 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1789 This is called when we make a jump equivalence. */
1792 rehash_using_reg (x)
1796 struct table_elt *p, *next;
1799 if (GET_CODE (x) == SUBREG)
1802 /* If X is not a register or if the register is known not to be in any
1803 valid entries in the table, we have no work to do. */
1805 if (GET_CODE (x) != REG
1806 || reg_in_table[REGNO (x)] < 0
1807 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1810 /* Scan all hash chains looking for valid entries that mention X.
1811 If we find one and it is in the wrong hash chain, move it. We can skip
1812 objects that are registers, since they are handled specially. */
1814 for (i = 0; i < NBUCKETS; i++)
1815 for (p = table[i]; p; p = next)
1817 next = p->next_same_hash;
1818 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1819 && exp_equiv_p (p->exp, p->exp, 1, 0)
1820 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1822 if (p->next_same_hash)
1823 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1825 if (p->prev_same_hash)
1826 p->prev_same_hash->next_same_hash = p->next_same_hash;
1828 table[i] = p->next_same_hash;
1830 p->next_same_hash = table[hash];
1831 p->prev_same_hash = 0;
1833 table[hash]->prev_same_hash = p;
1839 /* Remove from the hash table any expression that is a call-clobbered
1840 register. Also update their TICK values. */
1843 invalidate_for_call ()
1845 int regno, endregno;
1848 struct table_elt *p, *next;
1851 /* Go through all the hard registers. For each that is clobbered in
1852 a CALL_INSN, remove the register from quantity chains and update
1853 reg_tick if defined. Also see if any of these registers is currently
1856 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1857 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1859 delete_reg_equiv (regno);
1860 if (reg_tick[regno] >= 0)
1863 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1866 /* In the case where we have no call-clobbered hard registers in the
1867 table, we are done. Otherwise, scan the table and remove any
1868 entry that overlaps a call-clobbered register. */
1871 for (hash = 0; hash < NBUCKETS; hash++)
1872 for (p = table[hash]; p; p = next)
1874 next = p->next_same_hash;
1878 remove_from_table (p, hash);
1882 if (GET_CODE (p->exp) != REG
1883 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1886 regno = REGNO (p->exp);
1887 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1889 for (i = regno; i < endregno; i++)
1890 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1892 remove_from_table (p, hash);
1898 /* Given an expression X of type CONST,
1899 and ELT which is its table entry (or 0 if it
1900 is not in the hash table),
1901 return an alternate expression for X as a register plus integer.
1902 If none can be found, return 0. */
1905 use_related_value (x, elt)
1907 struct table_elt *elt;
1909 register struct table_elt *relt = 0;
1910 register struct table_elt *p, *q;
1911 HOST_WIDE_INT offset;
1913 /* First, is there anything related known?
1914 If we have a table element, we can tell from that.
1915 Otherwise, must look it up. */
1917 if (elt != 0 && elt->related_value != 0)
1919 else if (elt == 0 && GET_CODE (x) == CONST)
1921 rtx subexp = get_related_value (x);
1923 relt = lookup (subexp,
1924 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1931 /* Search all related table entries for one that has an
1932 equivalent register. */
1937 /* This loop is strange in that it is executed in two different cases.
1938 The first is when X is already in the table. Then it is searching
1939 the RELATED_VALUE list of X's class (RELT). The second case is when
1940 X is not in the table. Then RELT points to a class for the related
1943 Ensure that, whatever case we are in, that we ignore classes that have
1944 the same value as X. */
1946 if (rtx_equal_p (x, p->exp))
1949 for (q = p->first_same_value; q; q = q->next_same_value)
1950 if (GET_CODE (q->exp) == REG)
1956 p = p->related_value;
1958 /* We went all the way around, so there is nothing to be found.
1959 Alternatively, perhaps RELT was in the table for some other reason
1960 and it has no related values recorded. */
1961 if (p == relt || p == 0)
1968 offset = (get_integer_term (x) - get_integer_term (p->exp));
1969 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1970 return plus_constant (q->exp, offset);
1973 /* Hash an rtx. We are careful to make sure the value is never negative.
1974 Equivalent registers hash identically.
1975 MODE is used in hashing for CONST_INTs only;
1976 otherwise the mode of X is used.
1978 Store 1 in do_not_record if any subexpression is volatile.
1980 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1981 which does not have the RTX_UNCHANGING_P bit set.
1982 In this case, also store 1 in hash_arg_in_struct
1983 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1985 Note that cse_insn knows that the hash code of a MEM expression
1986 is just (int) MEM plus the hash code of the address. */
1989 canon_hash (x, mode)
1991 enum machine_mode mode;
1994 register unsigned hash = 0;
1995 register enum rtx_code code;
1998 /* repeat is used to turn tail-recursion into iteration. */
2003 code = GET_CODE (x);
2008 register int regno = REGNO (x);
2010 /* On some machines, we can't record any non-fixed hard register,
2011 because extending its life will cause reload problems. We
2012 consider ap, fp, and sp to be fixed for this purpose.
2014 We also consider CCmode registers to be fixed for this purpose;
2015 failure to do so leads to failure to simplify 0<100 type of
2018 On all machines, we can't record any global registers. */
2020 if (regno < FIRST_PSEUDO_REGISTER
2021 && (global_regs[regno]
2022 || (SMALL_REGISTER_CLASSES
2023 && ! fixed_regs[regno]
2024 && regno != FRAME_POINTER_REGNUM
2025 && regno != HARD_FRAME_POINTER_REGNUM
2026 && regno != ARG_POINTER_REGNUM
2027 && regno != STACK_POINTER_REGNUM
2028 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2033 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
2037 /* We handle SUBREG of a REG specially because the underlying
2038 reg changes its hash value with every value change; we don't
2039 want to have to forget unrelated subregs when one subreg changes. */
2042 if (GET_CODE (SUBREG_REG (x)) == REG)
2044 hash += (((unsigned) SUBREG << 7)
2045 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2053 unsigned HOST_WIDE_INT tem = INTVAL (x);
2054 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2059 /* This is like the general case, except that it only counts
2060 the integers representing the constant. */
2061 hash += (unsigned) code + (unsigned) GET_MODE (x);
2062 if (GET_MODE (x) != VOIDmode)
2063 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2065 unsigned tem = XINT (x, i);
2069 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2070 + (unsigned) CONST_DOUBLE_HIGH (x));
2073 /* Assume there is only one rtx object for any given label. */
2076 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2081 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2085 if (MEM_VOLATILE_P (x))
2090 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2092 hash_arg_in_memory = 1;
2093 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2095 /* Now that we have already found this special case,
2096 might as well speed it up as much as possible. */
2097 hash += (unsigned) MEM;
2108 case UNSPEC_VOLATILE:
2113 if (MEM_VOLATILE_P (x))
2124 i = GET_RTX_LENGTH (code) - 1;
2125 hash += (unsigned) code + (unsigned) GET_MODE (x);
2126 fmt = GET_RTX_FORMAT (code);
2131 rtx tem = XEXP (x, i);
2133 /* If we are about to do the last recursive call
2134 needed at this level, change it into iteration.
2135 This function is called enough to be worth it. */
2141 hash += canon_hash (tem, 0);
2143 else if (fmt[i] == 'E')
2144 for (j = 0; j < XVECLEN (x, i); j++)
2145 hash += canon_hash (XVECEXP (x, i, j), 0);
2146 else if (fmt[i] == 's')
2148 register unsigned char *p = (unsigned char *) XSTR (x, i);
2153 else if (fmt[i] == 'i')
2155 register unsigned tem = XINT (x, i);
2158 else if (fmt[i] == '0')
2166 /* Like canon_hash but with no side effects. */
2171 enum machine_mode mode;
2173 int save_do_not_record = do_not_record;
2174 int save_hash_arg_in_memory = hash_arg_in_memory;
2175 int save_hash_arg_in_struct = hash_arg_in_struct;
2176 unsigned hash = canon_hash (x, mode);
2177 hash_arg_in_memory = save_hash_arg_in_memory;
2178 hash_arg_in_struct = save_hash_arg_in_struct;
2179 do_not_record = save_do_not_record;
2183 /* Return 1 iff X and Y would canonicalize into the same thing,
2184 without actually constructing the canonicalization of either one.
2185 If VALIDATE is nonzero,
2186 we assume X is an expression being processed from the rtl
2187 and Y was found in the hash table. We check register refs
2188 in Y for being marked as valid.
2190 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2191 that is known to be in the register. Ordinarily, we don't allow them
2192 to match, because letting them match would cause unpredictable results
2193 in all the places that search a hash table chain for an equivalent
2194 for a given value. A possible equivalent that has different structure
2195 has its hash code computed from different data. Whether the hash code
2196 is the same as that of the given value is pure luck. */
2199 exp_equiv_p (x, y, validate, equal_values)
2205 register enum rtx_code code;
2208 /* Note: it is incorrect to assume an expression is equivalent to itself
2209 if VALIDATE is nonzero. */
2210 if (x == y && !validate)
2212 if (x == 0 || y == 0)
2215 code = GET_CODE (x);
2216 if (code != GET_CODE (y))
2221 /* If X is a constant and Y is a register or vice versa, they may be
2222 equivalent. We only have to validate if Y is a register. */
2223 if (CONSTANT_P (x) && GET_CODE (y) == REG
2224 && REGNO_QTY_VALID_P (REGNO (y))
2225 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2226 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2227 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2230 if (CONSTANT_P (y) && code == REG
2231 && REGNO_QTY_VALID_P (REGNO (x))
2232 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2233 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2239 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2240 if (GET_MODE (x) != GET_MODE (y))
2250 return INTVAL (x) == INTVAL (y);
2253 return XEXP (x, 0) == XEXP (y, 0);
2256 return XSTR (x, 0) == XSTR (y, 0);
2260 int regno = REGNO (y);
2262 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2263 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2266 /* If the quantities are not the same, the expressions are not
2267 equivalent. If there are and we are not to validate, they
2268 are equivalent. Otherwise, ensure all regs are up-to-date. */
2270 if (reg_qty[REGNO (x)] != reg_qty[regno])
2276 for (i = regno; i < endregno; i++)
2277 if (reg_in_table[i] != reg_tick[i])
2283 /* For commutative operations, check both orders. */
2291 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2292 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2293 validate, equal_values))
2294 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2295 validate, equal_values)
2296 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2297 validate, equal_values)));
2303 /* Compare the elements. If any pair of corresponding elements
2304 fail to match, return 0 for the whole things. */
2306 fmt = GET_RTX_FORMAT (code);
2307 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2312 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2317 if (XVECLEN (x, i) != XVECLEN (y, i))
2319 for (j = 0; j < XVECLEN (x, i); j++)
2320 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2321 validate, equal_values))
2326 if (strcmp (XSTR (x, i), XSTR (y, i)))
2331 if (XINT (x, i) != XINT (y, i))
2336 if (XWINT (x, i) != XWINT (y, i))
2351 /* Return 1 iff any subexpression of X matches Y.
2352 Here we do not require that X or Y be valid (for registers referred to)
2353 for being in the hash table. */
2360 register enum rtx_code code;
2366 if (x == 0 || y == 0)
2369 code = GET_CODE (x);
2370 /* If X as a whole has the same code as Y, they may match.
2372 if (code == GET_CODE (y))
2374 if (exp_equiv_p (x, y, 0, 1))
2378 /* X does not match, so try its subexpressions. */
2380 fmt = GET_RTX_FORMAT (code);
2381 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2390 if (refers_to_p (XEXP (x, i), y))
2393 else if (fmt[i] == 'E')
2396 for (j = 0; j < XVECLEN (x, i); j++)
2397 if (refers_to_p (XVECEXP (x, i, j), y))
2404 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2405 set PBASE, PSTART, and PEND which correspond to the base of the address,
2406 the starting offset, and ending offset respectively.
2408 ADDR is known to be a nonvarying address. */
2410 /* ??? Despite what the comments say, this function is in fact frequently
2411 passed varying addresses. This does not appear to cause any problems. */
2414 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2418 HOST_WIDE_INT *pstart, *pend;
2421 HOST_WIDE_INT start, end;
2427 if (flag_pic && GET_CODE (base) == PLUS
2428 && XEXP (base, 0) == pic_offset_table_rtx)
2429 base = XEXP (base, 1);
2431 /* Registers with nonvarying addresses usually have constant equivalents;
2432 but the frame pointer register is also possible. */
2433 if (GET_CODE (base) == REG
2435 && REGNO_QTY_VALID_P (REGNO (base))
2436 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2437 && qty_const[reg_qty[REGNO (base)]] != 0)
2438 base = qty_const[reg_qty[REGNO (base)]];
2439 else if (GET_CODE (base) == PLUS
2440 && GET_CODE (XEXP (base, 1)) == CONST_INT
2441 && GET_CODE (XEXP (base, 0)) == REG
2443 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2444 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2445 == GET_MODE (XEXP (base, 0)))
2446 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2448 start = INTVAL (XEXP (base, 1));
2449 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2451 /* This can happen as the result of virtual register instantiation,
2452 if the initial offset is too large to be a valid address. */
2453 else if (GET_CODE (base) == PLUS
2454 && GET_CODE (XEXP (base, 0)) == REG
2455 && GET_CODE (XEXP (base, 1)) == REG
2457 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2458 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2459 == GET_MODE (XEXP (base, 0)))
2460 && qty_const[reg_qty[REGNO (XEXP (base, 0))]]
2461 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2462 && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]]
2463 == GET_MODE (XEXP (base, 1)))
2464 && qty_const[reg_qty[REGNO (XEXP (base, 1))]])
2466 rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]];
2467 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2469 /* One of the two values must be a constant. */
2470 if (GET_CODE (base) != CONST_INT)
2472 if (GET_CODE (tem) != CONST_INT)
2474 start = INTVAL (tem);
2478 start = INTVAL (base);
2483 /* Handle everything that we can find inside an address that has been
2484 viewed as constant. */
2488 /* If no part of this switch does a "continue", the code outside
2489 will exit this loop. */
2491 switch (GET_CODE (base))
2494 /* By definition, operand1 of a LO_SUM is the associated constant
2495 address. Use the associated constant address as the base
2497 base = XEXP (base, 1);
2501 /* Strip off CONST. */
2502 base = XEXP (base, 0);
2506 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2508 start += INTVAL (XEXP (base, 1));
2509 base = XEXP (base, 0);
2515 /* Handle the case of an AND which is the negative of a power of
2516 two. This is used to represent unaligned memory operations. */
2517 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2518 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2520 set_nonvarying_address_components (XEXP (base, 0), size,
2521 pbase, pstart, pend);
2523 /* Assume the worst misalignment. START is affected, but not
2524 END, so compensate but adjusting SIZE. Don't lose any
2525 constant we already had. */
2527 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2528 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2541 if (GET_CODE (base) == CONST_INT)
2543 start += INTVAL (base);
2549 /* Set the return values. */
2555 /* Return 1 if X has a value that can vary even between two
2556 executions of the program. 0 means X can be compared reliably
2557 against certain constants or near-constants. */
2560 cse_rtx_varies_p (x)
2563 /* We need not check for X and the equivalence class being of the same
2564 mode because if X is equivalent to a constant in some mode, it
2565 doesn't vary in any mode. */
2567 if (GET_CODE (x) == REG
2568 && REGNO_QTY_VALID_P (REGNO (x))
2569 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2570 && qty_const[reg_qty[REGNO (x)]] != 0)
2573 if (GET_CODE (x) == PLUS
2574 && GET_CODE (XEXP (x, 1)) == CONST_INT
2575 && GET_CODE (XEXP (x, 0)) == REG
2576 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2577 && (GET_MODE (XEXP (x, 0))
2578 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2579 && qty_const[reg_qty[REGNO (XEXP (x, 0))]])
2582 /* This can happen as the result of virtual register instantiation, if
2583 the initial constant is too large to be a valid address. This gives
2584 us a three instruction sequence, load large offset into a register,
2585 load fp minus a constant into a register, then a MEM which is the
2586 sum of the two `constant' registers. */
2587 if (GET_CODE (x) == PLUS
2588 && GET_CODE (XEXP (x, 0)) == REG
2589 && GET_CODE (XEXP (x, 1)) == REG
2590 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2591 && (GET_MODE (XEXP (x, 0))
2592 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2593 && qty_const[reg_qty[REGNO (XEXP (x, 0))]]
2594 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2595 && (GET_MODE (XEXP (x, 1))
2596 == qty_mode[reg_qty[REGNO (XEXP (x, 1))]])
2597 && qty_const[reg_qty[REGNO (XEXP (x, 1))]])
2600 return rtx_varies_p (x);
2603 /* Canonicalize an expression:
2604 replace each register reference inside it
2605 with the "oldest" equivalent register.
2607 If INSN is non-zero and we are replacing a pseudo with a hard register
2608 or vice versa, validate_change is used to ensure that INSN remains valid
2609 after we make our substitution. The calls are made with IN_GROUP non-zero
2610 so apply_change_group must be called upon the outermost return from this
2611 function (unless INSN is zero). The result of apply_change_group can
2612 generally be discarded since the changes we are making are optional. */
2620 register enum rtx_code code;
2626 code = GET_CODE (x);
2644 /* Never replace a hard reg, because hard regs can appear
2645 in more than one machine mode, and we must preserve the mode
2646 of each occurrence. Also, some hard regs appear in
2647 MEMs that are shared and mustn't be altered. Don't try to
2648 replace any reg that maps to a reg of class NO_REGS. */
2649 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2650 || ! REGNO_QTY_VALID_P (REGNO (x)))
2653 first = qty_first_reg[reg_qty[REGNO (x)]];
2654 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2655 : REGNO_REG_CLASS (first) == NO_REGS ? x
2656 : gen_rtx_REG (qty_mode[reg_qty[REGNO (x)]], first));
2663 fmt = GET_RTX_FORMAT (code);
2664 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2670 rtx new = canon_reg (XEXP (x, i), insn);
2673 /* If replacing pseudo with hard reg or vice versa, ensure the
2674 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2675 if (insn != 0 && new != 0
2676 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2677 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2678 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2679 || (insn_code = recog_memoized (insn)) < 0
2680 || insn_n_dups[insn_code] > 0))
2681 validate_change (insn, &XEXP (x, i), new, 1);
2685 else if (fmt[i] == 'E')
2686 for (j = 0; j < XVECLEN (x, i); j++)
2687 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2693 /* LOC is a location within INSN that is an operand address (the contents of
2694 a MEM). Find the best equivalent address to use that is valid for this
2697 On most CISC machines, complicated address modes are costly, and rtx_cost
2698 is a good approximation for that cost. However, most RISC machines have
2699 only a few (usually only one) memory reference formats. If an address is
2700 valid at all, it is often just as cheap as any other address. Hence, for
2701 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2702 costs of various addresses. For two addresses of equal cost, choose the one
2703 with the highest `rtx_cost' value as that has the potential of eliminating
2704 the most insns. For equal costs, we choose the first in the equivalence
2705 class. Note that we ignore the fact that pseudo registers are cheaper
2706 than hard registers here because we would also prefer the pseudo registers.
2710 find_best_addr (insn, loc)
2714 struct table_elt *elt;
2717 struct table_elt *p;
2718 int found_better = 1;
2720 int save_do_not_record = do_not_record;
2721 int save_hash_arg_in_memory = hash_arg_in_memory;
2722 int save_hash_arg_in_struct = hash_arg_in_struct;
2727 /* Do not try to replace constant addresses or addresses of local and
2728 argument slots. These MEM expressions are made only once and inserted
2729 in many instructions, as well as being used to control symbol table
2730 output. It is not safe to clobber them.
2732 There are some uncommon cases where the address is already in a register
2733 for some reason, but we cannot take advantage of that because we have
2734 no easy way to unshare the MEM. In addition, looking up all stack
2735 addresses is costly. */
2736 if ((GET_CODE (addr) == PLUS
2737 && GET_CODE (XEXP (addr, 0)) == REG
2738 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2739 && (regno = REGNO (XEXP (addr, 0)),
2740 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2741 || regno == ARG_POINTER_REGNUM))
2742 || (GET_CODE (addr) == REG
2743 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2744 || regno == HARD_FRAME_POINTER_REGNUM
2745 || regno == ARG_POINTER_REGNUM))
2746 || GET_CODE (addr) == ADDRESSOF
2747 || CONSTANT_ADDRESS_P (addr))
2750 /* If this address is not simply a register, try to fold it. This will
2751 sometimes simplify the expression. Many simplifications
2752 will not be valid, but some, usually applying the associative rule, will
2753 be valid and produce better code. */
2754 if (GET_CODE (addr) != REG)
2756 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2760 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2761 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2762 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2764 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2766 && validate_change (insn, loc, folded, 0))
2770 /* If this address is not in the hash table, we can't look for equivalences
2771 of the whole address. Also, ignore if volatile. */
2774 hash = HASH (addr, Pmode);
2775 addr_volatile = do_not_record;
2776 do_not_record = save_do_not_record;
2777 hash_arg_in_memory = save_hash_arg_in_memory;
2778 hash_arg_in_struct = save_hash_arg_in_struct;
2783 elt = lookup (addr, hash, Pmode);
2785 #ifndef ADDRESS_COST
2788 int our_cost = elt->cost;
2790 /* Find the lowest cost below ours that works. */
2791 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2792 if (elt->cost < our_cost
2793 && (GET_CODE (elt->exp) == REG
2794 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2795 && validate_change (insn, loc,
2796 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2803 /* We need to find the best (under the criteria documented above) entry
2804 in the class that is valid. We use the `flag' field to indicate
2805 choices that were invalid and iterate until we can't find a better
2806 one that hasn't already been tried. */
2808 for (p = elt->first_same_value; p; p = p->next_same_value)
2811 while (found_better)
2813 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2814 int best_rtx_cost = (elt->cost + 1) >> 1;
2815 struct table_elt *best_elt = elt;
2818 for (p = elt->first_same_value; p; p = p->next_same_value)
2821 if ((GET_CODE (p->exp) == REG
2822 || exp_equiv_p (p->exp, p->exp, 1, 0))
2823 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2824 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2825 && (p->cost + 1) >> 1 > best_rtx_cost)))
2828 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2829 best_rtx_cost = (p->cost + 1) >> 1;
2836 if (validate_change (insn, loc,
2837 canon_reg (copy_rtx (best_elt->exp),
2846 /* If the address is a binary operation with the first operand a register
2847 and the second a constant, do the same as above, but looking for
2848 equivalences of the register. Then try to simplify before checking for
2849 the best address to use. This catches a few cases: First is when we
2850 have REG+const and the register is another REG+const. We can often merge
2851 the constants and eliminate one insn and one register. It may also be
2852 that a machine has a cheap REG+REG+const. Finally, this improves the
2853 code on the Alpha for unaligned byte stores. */
2855 if (flag_expensive_optimizations
2856 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2857 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2858 && GET_CODE (XEXP (*loc, 0)) == REG
2859 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2861 rtx c = XEXP (*loc, 1);
2864 hash = HASH (XEXP (*loc, 0), Pmode);
2865 do_not_record = save_do_not_record;
2866 hash_arg_in_memory = save_hash_arg_in_memory;
2867 hash_arg_in_struct = save_hash_arg_in_struct;
2869 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2873 /* We need to find the best (under the criteria documented above) entry
2874 in the class that is valid. We use the `flag' field to indicate
2875 choices that were invalid and iterate until we can't find a better
2876 one that hasn't already been tried. */
2878 for (p = elt->first_same_value; p; p = p->next_same_value)
2881 while (found_better)
2883 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2884 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2885 struct table_elt *best_elt = elt;
2886 rtx best_rtx = *loc;
2889 /* This is at worst case an O(n^2) algorithm, so limit our search
2890 to the first 32 elements on the list. This avoids trouble
2891 compiling code with very long basic blocks that can easily
2892 call cse_gen_binary so many times that we run out of memory. */
2895 for (p = elt->first_same_value, count = 0;
2897 p = p->next_same_value, count++)
2899 && (GET_CODE (p->exp) == REG
2900 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2902 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2904 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2905 || (CSE_ADDRESS_COST (new) == best_addr_cost
2906 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2909 best_addr_cost = CSE_ADDRESS_COST (new);
2910 best_rtx_cost = (COST (new) + 1) >> 1;
2918 if (validate_change (insn, loc,
2919 canon_reg (copy_rtx (best_rtx),
2930 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2931 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2932 what values are being compared.
2934 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2935 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2936 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2937 compared to produce cc0.
2939 The return value is the comparison operator and is either the code of
2940 A or the code corresponding to the inverse of the comparison. */
2942 static enum rtx_code
2943 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2946 enum machine_mode *pmode1, *pmode2;
2950 arg1 = *parg1, arg2 = *parg2;
2952 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2954 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2956 /* Set non-zero when we find something of interest. */
2958 int reverse_code = 0;
2959 struct table_elt *p = 0;
2961 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2962 On machines with CC0, this is the only case that can occur, since
2963 fold_rtx will return the COMPARE or item being compared with zero
2966 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2969 /* If ARG1 is a comparison operator and CODE is testing for
2970 STORE_FLAG_VALUE, get the inner arguments. */
2972 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2975 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2976 && code == LT && STORE_FLAG_VALUE == -1)
2977 #ifdef FLOAT_STORE_FLAG_VALUE
2978 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2979 && FLOAT_STORE_FLAG_VALUE < 0)
2984 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2985 && code == GE && STORE_FLAG_VALUE == -1)
2986 #ifdef FLOAT_STORE_FLAG_VALUE
2987 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2988 && FLOAT_STORE_FLAG_VALUE < 0)
2991 x = arg1, reverse_code = 1;
2994 /* ??? We could also check for
2996 (ne (and (eq (...) (const_int 1))) (const_int 0))
2998 and related forms, but let's wait until we see them occurring. */
3001 /* Look up ARG1 in the hash table and see if it has an equivalence
3002 that lets us see what is being compared. */
3003 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3005 if (p) p = p->first_same_value;
3007 for (; p; p = p->next_same_value)
3009 enum machine_mode inner_mode = GET_MODE (p->exp);
3011 /* If the entry isn't valid, skip it. */
3012 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3015 if (GET_CODE (p->exp) == COMPARE
3016 /* Another possibility is that this machine has a compare insn
3017 that includes the comparison code. In that case, ARG1 would
3018 be equivalent to a comparison operation that would set ARG1 to
3019 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3020 ORIG_CODE is the actual comparison being done; if it is an EQ,
3021 we must reverse ORIG_CODE. On machine with a negative value
3022 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3025 && GET_MODE_CLASS (inner_mode) == MODE_INT
3026 && (GET_MODE_BITSIZE (inner_mode)
3027 <= HOST_BITS_PER_WIDE_INT)
3028 && (STORE_FLAG_VALUE
3029 & ((HOST_WIDE_INT) 1
3030 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3031 #ifdef FLOAT_STORE_FLAG_VALUE
3033 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3034 && FLOAT_STORE_FLAG_VALUE < 0)
3037 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3042 else if ((code == EQ
3044 && GET_MODE_CLASS (inner_mode) == MODE_INT
3045 && (GET_MODE_BITSIZE (inner_mode)
3046 <= HOST_BITS_PER_WIDE_INT)
3047 && (STORE_FLAG_VALUE
3048 & ((HOST_WIDE_INT) 1
3049 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3050 #ifdef FLOAT_STORE_FLAG_VALUE
3052 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3053 && FLOAT_STORE_FLAG_VALUE < 0)
3056 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3063 /* If this is fp + constant, the equivalent is a better operand since
3064 it may let us predict the value of the comparison. */
3065 else if (NONZERO_BASE_PLUS_P (p->exp))
3072 /* If we didn't find a useful equivalence for ARG1, we are done.
3073 Otherwise, set up for the next iteration. */
3077 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3078 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3079 code = GET_CODE (x);
3082 code = reverse_condition (code);
3085 /* Return our results. Return the modes from before fold_rtx
3086 because fold_rtx might produce const_int, and then it's too late. */
3087 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3088 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3093 /* Try to simplify a unary operation CODE whose output mode is to be
3094 MODE with input operand OP whose mode was originally OP_MODE.
3095 Return zero if no simplification can be made. */
3098 simplify_unary_operation (code, mode, op, op_mode)
3100 enum machine_mode mode;
3102 enum machine_mode op_mode;
3104 register int width = GET_MODE_BITSIZE (mode);
3106 /* The order of these tests is critical so that, for example, we don't
3107 check the wrong mode (input vs. output) for a conversion operation,
3108 such as FIX. At some point, this should be simplified. */
3110 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3112 if (code == FLOAT && GET_MODE (op) == VOIDmode
3113 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3115 HOST_WIDE_INT hv, lv;
3118 if (GET_CODE (op) == CONST_INT)
3119 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3121 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3123 #ifdef REAL_ARITHMETIC
3124 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3128 d = (double) (~ hv);
3129 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3130 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3131 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3137 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3138 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3139 d += (double) (unsigned HOST_WIDE_INT) lv;
3141 #endif /* REAL_ARITHMETIC */
3142 d = real_value_truncate (mode, d);
3143 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3145 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3146 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3148 HOST_WIDE_INT hv, lv;
3151 if (GET_CODE (op) == CONST_INT)
3152 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3154 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3156 if (op_mode == VOIDmode)
3158 /* We don't know how to interpret negative-looking numbers in
3159 this case, so don't try to fold those. */
3163 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3166 hv = 0, lv &= GET_MODE_MASK (op_mode);
3168 #ifdef REAL_ARITHMETIC
3169 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3172 d = (double) (unsigned HOST_WIDE_INT) hv;
3173 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3174 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3175 d += (double) (unsigned HOST_WIDE_INT) lv;
3176 #endif /* REAL_ARITHMETIC */
3177 d = real_value_truncate (mode, d);
3178 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3182 if (GET_CODE (op) == CONST_INT
3183 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3185 register HOST_WIDE_INT arg0 = INTVAL (op);
3186 register HOST_WIDE_INT val;
3199 val = (arg0 >= 0 ? arg0 : - arg0);
3203 /* Don't use ffs here. Instead, get low order bit and then its
3204 number. If arg0 is zero, this will return 0, as desired. */
3205 arg0 &= GET_MODE_MASK (mode);
3206 val = exact_log2 (arg0 & (- arg0)) + 1;
3214 if (op_mode == VOIDmode)
3216 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3218 /* If we were really extending the mode,
3219 we would have to distinguish between zero-extension
3220 and sign-extension. */
3221 if (width != GET_MODE_BITSIZE (op_mode))
3225 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3226 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3232 if (op_mode == VOIDmode)
3234 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3236 /* If we were really extending the mode,
3237 we would have to distinguish between zero-extension
3238 and sign-extension. */
3239 if (width != GET_MODE_BITSIZE (op_mode))
3243 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3246 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3248 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3249 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3262 /* Clear the bits that don't belong in our mode,
3263 unless they and our sign bit are all one.
3264 So we get either a reasonable negative value or a reasonable
3265 unsigned value for this mode. */
3266 if (width < HOST_BITS_PER_WIDE_INT
3267 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3268 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3269 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3271 /* If this would be an entire word for the target, but is not for
3272 the host, then sign-extend on the host so that the number will look
3273 the same way on the host that it would on the target.
3275 For example, when building a 64 bit alpha hosted 32 bit sparc
3276 targeted compiler, then we want the 32 bit unsigned value -1 to be
3277 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3278 The later confuses the sparc backend. */
3280 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3281 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3282 val |= ((HOST_WIDE_INT) (-1) << width);
3284 return GEN_INT (val);
3287 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3288 for a DImode operation on a CONST_INT. */
3289 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3290 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3292 HOST_WIDE_INT l1, h1, lv, hv;
3294 if (GET_CODE (op) == CONST_DOUBLE)
3295 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3297 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3307 neg_double (l1, h1, &lv, &hv);
3312 neg_double (l1, h1, &lv, &hv);
3320 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3322 lv = exact_log2 (l1 & (-l1)) + 1;
3326 /* This is just a change-of-mode, so do nothing. */
3331 if (op_mode == VOIDmode
3332 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3336 lv = l1 & GET_MODE_MASK (op_mode);
3340 if (op_mode == VOIDmode
3341 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3345 lv = l1 & GET_MODE_MASK (op_mode);
3346 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3347 && (lv & ((HOST_WIDE_INT) 1
3348 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3349 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3351 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3362 return immed_double_const (lv, hv, mode);
3365 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3366 else if (GET_CODE (op) == CONST_DOUBLE
3367 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3373 if (setjmp (handler))
3374 /* There used to be a warning here, but that is inadvisable.
3375 People may want to cause traps, and the natural way
3376 to do it should not get a warning. */
3379 set_float_handler (handler);
3381 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3386 d = REAL_VALUE_NEGATE (d);
3390 if (REAL_VALUE_NEGATIVE (d))
3391 d = REAL_VALUE_NEGATE (d);
3394 case FLOAT_TRUNCATE:
3395 d = real_value_truncate (mode, d);
3399 /* All this does is change the mode. */
3403 d = REAL_VALUE_RNDZINT (d);
3407 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3417 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3418 set_float_handler (NULL_PTR);
3422 else if (GET_CODE (op) == CONST_DOUBLE
3423 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3424 && GET_MODE_CLASS (mode) == MODE_INT
3425 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3431 if (setjmp (handler))
3434 set_float_handler (handler);
3436 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3441 val = REAL_VALUE_FIX (d);
3445 val = REAL_VALUE_UNSIGNED_FIX (d);
3452 set_float_handler (NULL_PTR);
3454 /* Clear the bits that don't belong in our mode,
3455 unless they and our sign bit are all one.
3456 So we get either a reasonable negative value or a reasonable
3457 unsigned value for this mode. */
3458 if (width < HOST_BITS_PER_WIDE_INT
3459 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3460 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3461 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3463 /* If this would be an entire word for the target, but is not for
3464 the host, then sign-extend on the host so that the number will look
3465 the same way on the host that it would on the target.
3467 For example, when building a 64 bit alpha hosted 32 bit sparc
3468 targeted compiler, then we want the 32 bit unsigned value -1 to be
3469 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3470 The later confuses the sparc backend. */
3472 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3473 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3474 val |= ((HOST_WIDE_INT) (-1) << width);
3476 return GEN_INT (val);
3479 /* This was formerly used only for non-IEEE float.
3480 eggert@twinsun.com says it is safe for IEEE also. */
3483 /* There are some simplifications we can do even if the operands
3489 /* (not (not X)) == X, similarly for NEG. */
3490 if (GET_CODE (op) == code)
3491 return XEXP (op, 0);
3495 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3496 becomes just the MINUS if its mode is MODE. This allows
3497 folding switch statements on machines using casesi (such as
3499 if (GET_CODE (op) == TRUNCATE
3500 && GET_MODE (XEXP (op, 0)) == mode
3501 && GET_CODE (XEXP (op, 0)) == MINUS
3502 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3503 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3504 return XEXP (op, 0);
3506 #ifdef POINTERS_EXTEND_UNSIGNED
3507 if (! POINTERS_EXTEND_UNSIGNED
3508 && mode == Pmode && GET_MODE (op) == ptr_mode
3510 return convert_memory_address (Pmode, op);
3514 #ifdef POINTERS_EXTEND_UNSIGNED
3516 if (POINTERS_EXTEND_UNSIGNED
3517 && mode == Pmode && GET_MODE (op) == ptr_mode
3519 return convert_memory_address (Pmode, op);
3531 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3532 and OP1. Return 0 if no simplification is possible.
3534 Don't use this for relational operations such as EQ or LT.
3535 Use simplify_relational_operation instead. */
3538 simplify_binary_operation (code, mode, op0, op1)
3540 enum machine_mode mode;
3543 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3545 int width = GET_MODE_BITSIZE (mode);
3548 /* Relational operations don't work here. We must know the mode
3549 of the operands in order to do the comparison correctly.
3550 Assuming a full word can give incorrect results.
3551 Consider comparing 128 with -128 in QImode. */
3553 if (GET_RTX_CLASS (code) == '<')
3556 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3557 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3558 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3559 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3561 REAL_VALUE_TYPE f0, f1, value;
3564 if (setjmp (handler))
3567 set_float_handler (handler);
3569 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3570 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3571 f0 = real_value_truncate (mode, f0);
3572 f1 = real_value_truncate (mode, f1);
3574 #ifdef REAL_ARITHMETIC
3575 #ifndef REAL_INFINITY
3576 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3579 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3593 #ifndef REAL_INFINITY
3600 value = MIN (f0, f1);
3603 value = MAX (f0, f1);
3610 value = real_value_truncate (mode, value);
3611 set_float_handler (NULL_PTR);
3612 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3614 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3616 /* We can fold some multi-word operations. */
3617 if (GET_MODE_CLASS (mode) == MODE_INT
3618 && width == HOST_BITS_PER_WIDE_INT * 2
3619 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3620 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3622 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3624 if (GET_CODE (op0) == CONST_DOUBLE)
3625 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3627 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3629 if (GET_CODE (op1) == CONST_DOUBLE)
3630 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3632 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3637 /* A - B == A + (-B). */
3638 neg_double (l2, h2, &lv, &hv);
3641 /* .. fall through ... */
3644 add_double (l1, h1, l2, h2, &lv, &hv);
3648 mul_double (l1, h1, l2, h2, &lv, &hv);
3651 case DIV: case MOD: case UDIV: case UMOD:
3652 /* We'd need to include tree.h to do this and it doesn't seem worth
3657 lv = l1 & l2, hv = h1 & h2;
3661 lv = l1 | l2, hv = h1 | h2;
3665 lv = l1 ^ l2, hv = h1 ^ h2;
3671 && ((unsigned HOST_WIDE_INT) l1
3672 < (unsigned HOST_WIDE_INT) l2)))
3681 && ((unsigned HOST_WIDE_INT) l1
3682 > (unsigned HOST_WIDE_INT) l2)))
3689 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3691 && ((unsigned HOST_WIDE_INT) l1
3692 < (unsigned HOST_WIDE_INT) l2)))
3699 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3701 && ((unsigned HOST_WIDE_INT) l1
3702 > (unsigned HOST_WIDE_INT) l2)))
3708 case LSHIFTRT: case ASHIFTRT:
3710 case ROTATE: case ROTATERT:
3711 #ifdef SHIFT_COUNT_TRUNCATED
3712 if (SHIFT_COUNT_TRUNCATED)
3713 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3716 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3719 if (code == LSHIFTRT || code == ASHIFTRT)
3720 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3722 else if (code == ASHIFT)
3723 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3724 else if (code == ROTATE)
3725 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3726 else /* code == ROTATERT */
3727 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3734 return immed_double_const (lv, hv, mode);
3737 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3738 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3740 /* Even if we can't compute a constant result,
3741 there are some cases worth simplifying. */
3746 /* In IEEE floating point, x+0 is not the same as x. Similarly
3747 for the other optimizations below. */
3748 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3749 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3752 if (op1 == CONST0_RTX (mode))
3755 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3756 if (GET_CODE (op0) == NEG)
3757 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3758 else if (GET_CODE (op1) == NEG)
3759 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3761 /* Handle both-operands-constant cases. We can only add
3762 CONST_INTs to constants since the sum of relocatable symbols
3763 can't be handled by most assemblers. Don't add CONST_INT
3764 to CONST_INT since overflow won't be computed properly if wider
3765 than HOST_BITS_PER_WIDE_INT. */
3767 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3768 && GET_CODE (op1) == CONST_INT)
3769 return plus_constant (op0, INTVAL (op1));
3770 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3771 && GET_CODE (op0) == CONST_INT)
3772 return plus_constant (op1, INTVAL (op0));
3774 /* See if this is something like X * C - X or vice versa or
3775 if the multiplication is written as a shift. If so, we can
3776 distribute and make a new multiply, shift, or maybe just
3777 have X (if C is 2 in the example above). But don't make
3778 real multiply if we didn't have one before. */
3780 if (! FLOAT_MODE_P (mode))
3782 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3783 rtx lhs = op0, rhs = op1;
3786 if (GET_CODE (lhs) == NEG)
3787 coeff0 = -1, lhs = XEXP (lhs, 0);
3788 else if (GET_CODE (lhs) == MULT
3789 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3791 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3794 else if (GET_CODE (lhs) == ASHIFT
3795 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3796 && INTVAL (XEXP (lhs, 1)) >= 0
3797 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3799 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3800 lhs = XEXP (lhs, 0);
3803 if (GET_CODE (rhs) == NEG)
3804 coeff1 = -1, rhs = XEXP (rhs, 0);
3805 else if (GET_CODE (rhs) == MULT
3806 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3808 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3811 else if (GET_CODE (rhs) == ASHIFT
3812 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3813 && INTVAL (XEXP (rhs, 1)) >= 0
3814 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3816 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3817 rhs = XEXP (rhs, 0);
3820 if (rtx_equal_p (lhs, rhs))
3822 tem = cse_gen_binary (MULT, mode, lhs,
3823 GEN_INT (coeff0 + coeff1));
3824 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3828 /* If one of the operands is a PLUS or a MINUS, see if we can
3829 simplify this by the associative law.
3830 Don't use the associative law for floating point.
3831 The inaccuracy makes it nonassociative,
3832 and subtle programs can break if operations are associated. */
3834 if (INTEGRAL_MODE_P (mode)
3835 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3836 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3837 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3843 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3844 using cc0, in which case we want to leave it as a COMPARE
3845 so we can distinguish it from a register-register-copy.
3847 In IEEE floating point, x-0 is not the same as x. */
3849 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3850 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3851 && op1 == CONST0_RTX (mode))
3854 /* Do nothing here. */
3859 /* None of these optimizations can be done for IEEE
3861 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3862 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3865 /* We can't assume x-x is 0 even with non-IEEE floating point,
3866 but since it is zero except in very strange circumstances, we
3867 will treat it as zero with -ffast-math. */
3868 if (rtx_equal_p (op0, op1)
3869 && ! side_effects_p (op0)
3870 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3871 return CONST0_RTX (mode);
3873 /* Change subtraction from zero into negation. */
3874 if (op0 == CONST0_RTX (mode))
3875 return gen_rtx_NEG (mode, op1);
3877 /* (-1 - a) is ~a. */
3878 if (op0 == constm1_rtx)
3879 return gen_rtx_NOT (mode, op1);
3881 /* Subtracting 0 has no effect. */
3882 if (op1 == CONST0_RTX (mode))
3885 /* See if this is something like X * C - X or vice versa or
3886 if the multiplication is written as a shift. If so, we can
3887 distribute and make a new multiply, shift, or maybe just
3888 have X (if C is 2 in the example above). But don't make
3889 real multiply if we didn't have one before. */
3891 if (! FLOAT_MODE_P (mode))
3893 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3894 rtx lhs = op0, rhs = op1;
3897 if (GET_CODE (lhs) == NEG)
3898 coeff0 = -1, lhs = XEXP (lhs, 0);
3899 else if (GET_CODE (lhs) == MULT
3900 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3902 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3905 else if (GET_CODE (lhs) == ASHIFT
3906 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3907 && INTVAL (XEXP (lhs, 1)) >= 0
3908 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3910 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3911 lhs = XEXP (lhs, 0);
3914 if (GET_CODE (rhs) == NEG)
3915 coeff1 = - 1, rhs = XEXP (rhs, 0);
3916 else if (GET_CODE (rhs) == MULT
3917 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3919 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3922 else if (GET_CODE (rhs) == ASHIFT
3923 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3924 && INTVAL (XEXP (rhs, 1)) >= 0
3925 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3927 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3928 rhs = XEXP (rhs, 0);
3931 if (rtx_equal_p (lhs, rhs))
3933 tem = cse_gen_binary (MULT, mode, lhs,
3934 GEN_INT (coeff0 - coeff1));
3935 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3939 /* (a - (-b)) -> (a + b). */
3940 if (GET_CODE (op1) == NEG)
3941 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3943 /* If one of the operands is a PLUS or a MINUS, see if we can
3944 simplify this by the associative law.
3945 Don't use the associative law for floating point.
3946 The inaccuracy makes it nonassociative,
3947 and subtle programs can break if operations are associated. */
3949 if (INTEGRAL_MODE_P (mode)
3950 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3951 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3952 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3955 /* Don't let a relocatable value get a negative coeff. */
3956 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3957 return plus_constant (op0, - INTVAL (op1));
3959 /* (x - (x & y)) -> (x & ~y) */
3960 if (GET_CODE (op1) == AND)
3962 if (rtx_equal_p (op0, XEXP (op1, 0)))
3963 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
3964 if (rtx_equal_p (op0, XEXP (op1, 1)))
3965 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
3970 if (op1 == constm1_rtx)
3972 tem = simplify_unary_operation (NEG, mode, op0, mode);
3974 return tem ? tem : gen_rtx_NEG (mode, op0);
3977 /* In IEEE floating point, x*0 is not always 0. */
3978 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3979 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3980 && op1 == CONST0_RTX (mode)
3981 && ! side_effects_p (op0))
3984 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3985 However, ANSI says we can drop signals,
3986 so we can do this anyway. */
3987 if (op1 == CONST1_RTX (mode))
3990 /* Convert multiply by constant power of two into shift unless
3991 we are still generating RTL. This test is a kludge. */
3992 if (GET_CODE (op1) == CONST_INT
3993 && (val = exact_log2 (INTVAL (op1))) >= 0
3994 /* If the mode is larger than the host word size, and the
3995 uppermost bit is set, then this isn't a power of two due
3996 to implicit sign extension. */
3997 && (width <= HOST_BITS_PER_WIDE_INT
3998 || val != HOST_BITS_PER_WIDE_INT - 1)
3999 && ! rtx_equal_function_value_matters)
4000 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
4002 if (GET_CODE (op1) == CONST_DOUBLE
4003 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
4007 int op1is2, op1ism1;
4009 if (setjmp (handler))
4012 set_float_handler (handler);
4013 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4014 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
4015 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
4016 set_float_handler (NULL_PTR);
4018 /* x*2 is x+x and x*(-1) is -x */
4019 if (op1is2 && GET_MODE (op0) == mode)
4020 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
4022 else if (op1ism1 && GET_MODE (op0) == mode)
4023 return gen_rtx_NEG (mode, op0);
4028 if (op1 == const0_rtx)
4030 if (GET_CODE (op1) == CONST_INT
4031 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4033 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4035 /* A | (~A) -> -1 */
4036 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4037 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4038 && ! side_effects_p (op0)
4039 && GET_MODE_CLASS (mode) != MODE_CC)
4044 if (op1 == const0_rtx)
4046 if (GET_CODE (op1) == CONST_INT
4047 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4048 return gen_rtx_NOT (mode, op0);
4049 if (op0 == op1 && ! side_effects_p (op0)
4050 && GET_MODE_CLASS (mode) != MODE_CC)
4055 if (op1 == const0_rtx && ! side_effects_p (op0))
4057 if (GET_CODE (op1) == CONST_INT
4058 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4060 if (op0 == op1 && ! side_effects_p (op0)
4061 && GET_MODE_CLASS (mode) != MODE_CC)
4064 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4065 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4066 && ! side_effects_p (op0)
4067 && GET_MODE_CLASS (mode) != MODE_CC)
4072 /* Convert divide by power of two into shift (divide by 1 handled
4074 if (GET_CODE (op1) == CONST_INT
4075 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
4076 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
4078 /* ... fall through ... */
4081 if (op1 == CONST1_RTX (mode))
4084 /* In IEEE floating point, 0/x is not always 0. */
4085 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4086 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4087 && op0 == CONST0_RTX (mode)
4088 && ! side_effects_p (op1))
4091 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4092 /* Change division by a constant into multiplication. Only do
4093 this with -ffast-math until an expert says it is safe in
4095 else if (GET_CODE (op1) == CONST_DOUBLE
4096 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
4097 && op1 != CONST0_RTX (mode)
4101 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4103 if (! REAL_VALUES_EQUAL (d, dconst0))
4105 #if defined (REAL_ARITHMETIC)
4106 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
4107 return gen_rtx_MULT (mode, op0,
4108 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
4110 return gen_rtx_MULT (mode, op0,
4111 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4119 /* Handle modulus by power of two (mod with 1 handled below). */
4120 if (GET_CODE (op1) == CONST_INT
4121 && exact_log2 (INTVAL (op1)) > 0)
4122 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
4124 /* ... fall through ... */
4127 if ((op0 == const0_rtx || op1 == const1_rtx)
4128 && ! side_effects_p (op0) && ! side_effects_p (op1))
4134 /* Rotating ~0 always results in ~0. */
4135 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4136 && INTVAL (op0) == GET_MODE_MASK (mode)
4137 && ! side_effects_p (op1))
4140 /* ... fall through ... */
4145 if (op1 == const0_rtx)
4147 if (op0 == const0_rtx && ! side_effects_p (op1))
4152 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4153 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4154 && ! side_effects_p (op0))
4156 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4161 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4163 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4164 && ! side_effects_p (op0))
4166 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4171 if (op1 == const0_rtx && ! side_effects_p (op0))
4173 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4178 if (op1 == constm1_rtx && ! side_effects_p (op0))
4180 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4191 /* Get the integer argument values in two forms:
4192 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4194 arg0 = INTVAL (op0);
4195 arg1 = INTVAL (op1);
4197 if (width < HOST_BITS_PER_WIDE_INT)
4199 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4200 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4203 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4204 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4207 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4208 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4216 /* Compute the value of the arithmetic. */
4221 val = arg0s + arg1s;
4225 val = arg0s - arg1s;
4229 val = arg0s * arg1s;
4235 val = arg0s / arg1s;
4241 val = arg0s % arg1s;
4247 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4253 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4269 /* If shift count is undefined, don't fold it; let the machine do
4270 what it wants. But truncate it if the machine will do that. */
4274 #ifdef SHIFT_COUNT_TRUNCATED
4275 if (SHIFT_COUNT_TRUNCATED)
4279 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4286 #ifdef SHIFT_COUNT_TRUNCATED
4287 if (SHIFT_COUNT_TRUNCATED)
4291 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4298 #ifdef SHIFT_COUNT_TRUNCATED
4299 if (SHIFT_COUNT_TRUNCATED)
4303 val = arg0s >> arg1;
4305 /* Bootstrap compiler may not have sign extended the right shift.
4306 Manually extend the sign to insure bootstrap cc matches gcc. */
4307 if (arg0s < 0 && arg1 > 0)
4308 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4317 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4318 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4326 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4327 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4331 /* Do nothing here. */
4335 val = arg0s <= arg1s ? arg0s : arg1s;
4339 val = ((unsigned HOST_WIDE_INT) arg0
4340 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4344 val = arg0s > arg1s ? arg0s : arg1s;
4348 val = ((unsigned HOST_WIDE_INT) arg0
4349 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4356 /* Clear the bits that don't belong in our mode, unless they and our sign
4357 bit are all one. So we get either a reasonable negative value or a
4358 reasonable unsigned value for this mode. */
4359 if (width < HOST_BITS_PER_WIDE_INT
4360 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4361 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4362 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4364 /* If this would be an entire word for the target, but is not for
4365 the host, then sign-extend on the host so that the number will look
4366 the same way on the host that it would on the target.
4368 For example, when building a 64 bit alpha hosted 32 bit sparc
4369 targeted compiler, then we want the 32 bit unsigned value -1 to be
4370 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4371 The later confuses the sparc backend. */
4373 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4374 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4375 val |= ((HOST_WIDE_INT) (-1) << width);
4377 return GEN_INT (val);
4380 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4383 Rather than test for specific case, we do this by a brute-force method
4384 and do all possible simplifications until no more changes occur. Then
4385 we rebuild the operation. */
4388 simplify_plus_minus (code, mode, op0, op1)
4390 enum machine_mode mode;
4396 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4397 int first = 1, negate = 0, changed;
4400 bzero ((char *) ops, sizeof ops);
4402 /* Set up the two operands and then expand them until nothing has been
4403 changed. If we run out of room in our array, give up; this should
4404 almost never happen. */
4406 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4413 for (i = 0; i < n_ops; i++)
4414 switch (GET_CODE (ops[i]))
4421 ops[n_ops] = XEXP (ops[i], 1);
4422 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4423 ops[i] = XEXP (ops[i], 0);
4429 ops[i] = XEXP (ops[i], 0);
4430 negs[i] = ! negs[i];
4435 ops[i] = XEXP (ops[i], 0);
4441 /* ~a -> (-a - 1) */
4444 ops[n_ops] = constm1_rtx;
4445 negs[n_ops++] = negs[i];
4446 ops[i] = XEXP (ops[i], 0);
4447 negs[i] = ! negs[i];
4454 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4462 /* If we only have two operands, we can't do anything. */
4466 /* Now simplify each pair of operands until nothing changes. The first
4467 time through just simplify constants against each other. */
4474 for (i = 0; i < n_ops - 1; i++)
4475 for (j = i + 1; j < n_ops; j++)
4476 if (ops[i] != 0 && ops[j] != 0
4477 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4479 rtx lhs = ops[i], rhs = ops[j];
4480 enum rtx_code ncode = PLUS;
4482 if (negs[i] && ! negs[j])
4483 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4484 else if (! negs[i] && negs[j])
4487 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4490 ops[i] = tem, ops[j] = 0;
4491 negs[i] = negs[i] && negs[j];
4492 if (GET_CODE (tem) == NEG)
4493 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4495 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4496 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4504 /* Pack all the operands to the lower-numbered entries and give up if
4505 we didn't reduce the number of operands we had. Make sure we
4506 count a CONST as two operands. If we have the same number of
4507 operands, but have made more CONSTs than we had, this is also
4508 an improvement, so accept it. */
4510 for (i = 0, j = 0; j < n_ops; j++)
4513 ops[i] = ops[j], negs[i++] = negs[j];
4514 if (GET_CODE (ops[j]) == CONST)
4518 if (i + n_consts > input_ops
4519 || (i + n_consts == input_ops && n_consts <= input_consts))
4524 /* If we have a CONST_INT, put it last. */
4525 for (i = 0; i < n_ops - 1; i++)
4526 if (GET_CODE (ops[i]) == CONST_INT)
4528 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4529 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4532 /* Put a non-negated operand first. If there aren't any, make all
4533 operands positive and negate the whole thing later. */
4534 for (i = 0; i < n_ops && negs[i]; i++)
4539 for (i = 0; i < n_ops; i++)
4545 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4546 j = negs[0], negs[0] = negs[i], negs[i] = j;
4549 /* Now make the result by performing the requested operations. */
4551 for (i = 1; i < n_ops; i++)
4552 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4554 return negate ? gen_rtx_NEG (mode, result) : result;
4557 /* Make a binary operation by properly ordering the operands and
4558 seeing if the expression folds. */
4561 cse_gen_binary (code, mode, op0, op1)
4563 enum machine_mode mode;
4568 /* Put complex operands first and constants second if commutative. */
4569 if (GET_RTX_CLASS (code) == 'c'
4570 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4571 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4572 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4573 || (GET_CODE (op0) == SUBREG
4574 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4575 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4576 tem = op0, op0 = op1, op1 = tem;
4578 /* If this simplifies, do it. */
4579 tem = simplify_binary_operation (code, mode, op0, op1);
4584 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4585 just form the operation. */
4587 if (code == PLUS && GET_CODE (op1) == CONST_INT
4588 && GET_MODE (op0) != VOIDmode)
4589 return plus_constant (op0, INTVAL (op1));
4590 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4591 && GET_MODE (op0) != VOIDmode)
4592 return plus_constant (op0, - INTVAL (op1));
4594 return gen_rtx_fmt_ee (code, mode, op0, op1);
4597 /* Like simplify_binary_operation except used for relational operators.
4598 MODE is the mode of the operands, not that of the result. If MODE
4599 is VOIDmode, both operands must also be VOIDmode and we compare the
4600 operands in "infinite precision".
4602 If no simplification is possible, this function returns zero. Otherwise,
4603 it returns either const_true_rtx or const0_rtx. */
4606 simplify_relational_operation (code, mode, op0, op1)
4608 enum machine_mode mode;
4611 int equal, op0lt, op0ltu, op1lt, op1ltu;
4614 /* If op0 is a compare, extract the comparison arguments from it. */
4615 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4616 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4618 /* We can't simplify MODE_CC values since we don't know what the
4619 actual comparison is. */
4620 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4627 /* For integer comparisons of A and B maybe we can simplify A - B and can
4628 then simplify a comparison of that with zero. If A and B are both either
4629 a register or a CONST_INT, this can't help; testing for these cases will
4630 prevent infinite recursion here and speed things up.
4632 If CODE is an unsigned comparison, then we can never do this optimization,
4633 because it gives an incorrect result if the subtraction wraps around zero.
4634 ANSI C defines unsigned operations such that they never overflow, and
4635 thus such cases can not be ignored. */
4637 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4638 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4639 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4640 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4641 && code != GTU && code != GEU && code != LTU && code != LEU)
4642 return simplify_relational_operation (signed_condition (code),
4643 mode, tem, const0_rtx);
4645 /* For non-IEEE floating-point, if the two operands are equal, we know the
4647 if (rtx_equal_p (op0, op1)
4648 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4649 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4650 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4652 /* If the operands are floating-point constants, see if we can fold
4654 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4655 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4656 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4658 REAL_VALUE_TYPE d0, d1;
4661 if (setjmp (handler))
4664 set_float_handler (handler);
4665 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4666 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4667 equal = REAL_VALUES_EQUAL (d0, d1);
4668 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4669 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4670 set_float_handler (NULL_PTR);
4672 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4674 /* Otherwise, see if the operands are both integers. */
4675 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4676 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4677 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4679 int width = GET_MODE_BITSIZE (mode);
4680 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4681 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4683 /* Get the two words comprising each integer constant. */
4684 if (GET_CODE (op0) == CONST_DOUBLE)
4686 l0u = l0s = CONST_DOUBLE_LOW (op0);
4687 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4691 l0u = l0s = INTVAL (op0);
4692 h0u = h0s = l0s < 0 ? -1 : 0;
4695 if (GET_CODE (op1) == CONST_DOUBLE)
4697 l1u = l1s = CONST_DOUBLE_LOW (op1);
4698 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4702 l1u = l1s = INTVAL (op1);
4703 h1u = h1s = l1s < 0 ? -1 : 0;
4706 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4707 we have to sign or zero-extend the values. */
4708 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4709 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4711 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4713 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4714 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4716 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4717 l0s |= ((HOST_WIDE_INT) (-1) << width);
4719 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4720 l1s |= ((HOST_WIDE_INT) (-1) << width);
4723 equal = (h0u == h1u && l0u == l1u);
4724 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4725 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4726 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4727 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4730 /* Otherwise, there are some code-specific tests we can make. */
4736 /* References to the frame plus a constant or labels cannot
4737 be zero, but a SYMBOL_REF can due to #pragma weak. */
4738 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4739 || GET_CODE (op0) == LABEL_REF)
4740 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4741 /* On some machines, the ap reg can be 0 sometimes. */
4742 && op0 != arg_pointer_rtx
4749 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4750 || GET_CODE (op0) == LABEL_REF)
4751 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4752 && op0 != arg_pointer_rtx
4755 return const_true_rtx;
4759 /* Unsigned values are never negative. */
4760 if (op1 == const0_rtx)
4761 return const_true_rtx;
4765 if (op1 == const0_rtx)
4770 /* Unsigned values are never greater than the largest
4772 if (GET_CODE (op1) == CONST_INT
4773 && INTVAL (op1) == GET_MODE_MASK (mode)
4774 && INTEGRAL_MODE_P (mode))
4775 return const_true_rtx;
4779 if (GET_CODE (op1) == CONST_INT
4780 && INTVAL (op1) == GET_MODE_MASK (mode)
4781 && INTEGRAL_MODE_P (mode))
4792 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4797 return equal ? const_true_rtx : const0_rtx;
4799 return ! equal ? const_true_rtx : const0_rtx;
4801 return op0lt ? const_true_rtx : const0_rtx;
4803 return op1lt ? const_true_rtx : const0_rtx;
4805 return op0ltu ? const_true_rtx : const0_rtx;
4807 return op1ltu ? const_true_rtx : const0_rtx;
4809 return equal || op0lt ? const_true_rtx : const0_rtx;
4811 return equal || op1lt ? const_true_rtx : const0_rtx;
4813 return equal || op0ltu ? const_true_rtx : const0_rtx;
4815 return equal || op1ltu ? const_true_rtx : const0_rtx;
4821 /* Simplify CODE, an operation with result mode MODE and three operands,
4822 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4823 a constant. Return 0 if no simplifications is possible. */
4826 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4828 enum machine_mode mode, op0_mode;
4831 int width = GET_MODE_BITSIZE (mode);
4833 /* VOIDmode means "infinite" precision. */
4835 width = HOST_BITS_PER_WIDE_INT;
4841 if (GET_CODE (op0) == CONST_INT
4842 && GET_CODE (op1) == CONST_INT
4843 && GET_CODE (op2) == CONST_INT
4844 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4845 && width <= HOST_BITS_PER_WIDE_INT)
4847 /* Extracting a bit-field from a constant */
4848 HOST_WIDE_INT val = INTVAL (op0);
4850 if (BITS_BIG_ENDIAN)
4851 val >>= (GET_MODE_BITSIZE (op0_mode)
4852 - INTVAL (op2) - INTVAL (op1));
4854 val >>= INTVAL (op2);
4856 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4858 /* First zero-extend. */
4859 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4860 /* If desired, propagate sign bit. */
4861 if (code == SIGN_EXTRACT
4862 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4863 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4866 /* Clear the bits that don't belong in our mode,
4867 unless they and our sign bit are all one.
4868 So we get either a reasonable negative value or a reasonable
4869 unsigned value for this mode. */
4870 if (width < HOST_BITS_PER_WIDE_INT
4871 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4872 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4873 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4875 return GEN_INT (val);
4880 if (GET_CODE (op0) == CONST_INT)
4881 return op0 != const0_rtx ? op1 : op2;
4883 /* Convert a == b ? b : a to "a". */
4884 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4885 && rtx_equal_p (XEXP (op0, 0), op1)
4886 && rtx_equal_p (XEXP (op0, 1), op2))
4888 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4889 && rtx_equal_p (XEXP (op0, 1), op1)
4890 && rtx_equal_p (XEXP (op0, 0), op2))
4892 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4895 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4896 XEXP (op0, 0), XEXP (op0, 1));
4897 /* See if any simplifications were possible. */
4898 if (temp == const0_rtx)
4900 else if (temp == const1_rtx)
4912 /* If X is a nontrivial arithmetic operation on an argument
4913 for which a constant value can be determined, return
4914 the result of operating on that value, as a constant.
4915 Otherwise, return X, possibly with one or more operands
4916 modified by recursive calls to this function.
4918 If X is a register whose contents are known, we do NOT
4919 return those contents here. equiv_constant is called to
4922 INSN is the insn that we may be modifying. If it is 0, make a copy
4923 of X before modifying it. */
4930 register enum rtx_code code;
4931 register enum machine_mode mode;
4938 /* Folded equivalents of first two operands of X. */
4942 /* Constant equivalents of first three operands of X;
4943 0 when no such equivalent is known. */
4948 /* The mode of the first operand of X. We need this for sign and zero
4950 enum machine_mode mode_arg0;
4955 mode = GET_MODE (x);
4956 code = GET_CODE (x);
4965 /* No use simplifying an EXPR_LIST
4966 since they are used only for lists of args
4967 in a function call's REG_EQUAL note. */
4969 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4970 want to (e.g.,) make (addressof (const_int 0)) just because
4971 the location is known to be zero. */
4977 return prev_insn_cc0;
4981 /* If the next insn is a CODE_LABEL followed by a jump table,
4982 PC's value is a LABEL_REF pointing to that label. That
4983 lets us fold switch statements on the Vax. */
4984 if (insn && GET_CODE (insn) == JUMP_INSN)
4986 rtx next = next_nonnote_insn (insn);
4988 if (next && GET_CODE (next) == CODE_LABEL
4989 && NEXT_INSN (next) != 0
4990 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4991 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4992 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4993 return gen_rtx_LABEL_REF (Pmode, next);
4998 /* See if we previously assigned a constant value to this SUBREG. */
4999 if ((new = lookup_as_function (x, CONST_INT)) != 0
5000 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
5003 /* If this is a paradoxical SUBREG, we have no idea what value the
5004 extra bits would have. However, if the operand is equivalent
5005 to a SUBREG whose operand is the same as our mode, and all the
5006 modes are within a word, we can just use the inner operand
5007 because these SUBREGs just say how to treat the register.
5009 Similarly if we find an integer constant. */
5011 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
5013 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
5014 struct table_elt *elt;
5016 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
5017 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
5018 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
5020 for (elt = elt->first_same_value;
5021 elt; elt = elt->next_same_value)
5023 if (CONSTANT_P (elt->exp)
5024 && GET_MODE (elt->exp) == VOIDmode)
5027 if (GET_CODE (elt->exp) == SUBREG
5028 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5029 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5030 return copy_rtx (SUBREG_REG (elt->exp));
5036 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5037 We might be able to if the SUBREG is extracting a single word in an
5038 integral mode or extracting the low part. */
5040 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
5041 const_arg0 = equiv_constant (folded_arg0);
5043 folded_arg0 = const_arg0;
5045 if (folded_arg0 != SUBREG_REG (x))
5049 if (GET_MODE_CLASS (mode) == MODE_INT
5050 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5051 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
5052 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
5053 GET_MODE (SUBREG_REG (x)));
5054 if (new == 0 && subreg_lowpart_p (x))
5055 new = gen_lowpart_if_possible (mode, folded_arg0);
5060 /* If this is a narrowing SUBREG and our operand is a REG, see if
5061 we can find an equivalence for REG that is an arithmetic operation
5062 in a wider mode where both operands are paradoxical SUBREGs
5063 from objects of our result mode. In that case, we couldn't report
5064 an equivalent value for that operation, since we don't know what the
5065 extra bits will be. But we can find an equivalence for this SUBREG
5066 by folding that operation is the narrow mode. This allows us to
5067 fold arithmetic in narrow modes when the machine only supports
5068 word-sized arithmetic.
5070 Also look for a case where we have a SUBREG whose operand is the
5071 same as our result. If both modes are smaller than a word, we
5072 are simply interpreting a register in different modes and we
5073 can use the inner value. */
5075 if (GET_CODE (folded_arg0) == REG
5076 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
5077 && subreg_lowpart_p (x))
5079 struct table_elt *elt;
5081 /* We can use HASH here since we know that canon_hash won't be
5083 elt = lookup (folded_arg0,
5084 HASH (folded_arg0, GET_MODE (folded_arg0)),
5085 GET_MODE (folded_arg0));
5088 elt = elt->first_same_value;
5090 for (; elt; elt = elt->next_same_value)
5092 enum rtx_code eltcode = GET_CODE (elt->exp);
5094 /* Just check for unary and binary operations. */
5095 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
5096 && GET_CODE (elt->exp) != SIGN_EXTEND
5097 && GET_CODE (elt->exp) != ZERO_EXTEND
5098 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5099 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
5101 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
5103 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5104 op0 = fold_rtx (op0, NULL_RTX);
5106 op0 = equiv_constant (op0);
5108 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
5111 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
5112 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
5113 && eltcode != DIV && eltcode != MOD
5114 && eltcode != UDIV && eltcode != UMOD
5115 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
5116 && eltcode != ROTATE && eltcode != ROTATERT
5117 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5118 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
5120 || CONSTANT_P (XEXP (elt->exp, 0)))
5121 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
5122 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
5124 || CONSTANT_P (XEXP (elt->exp, 1))))
5126 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
5127 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
5129 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5130 op0 = fold_rtx (op0, NULL_RTX);
5133 op0 = equiv_constant (op0);
5135 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5136 op1 = fold_rtx (op1, NULL_RTX);
5139 op1 = equiv_constant (op1);
5141 /* If we are looking for the low SImode part of
5142 (ashift:DI c (const_int 32)), it doesn't work
5143 to compute that in SImode, because a 32-bit shift
5144 in SImode is unpredictable. We know the value is 0. */
5146 && GET_CODE (elt->exp) == ASHIFT
5147 && GET_CODE (op1) == CONST_INT
5148 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5150 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5152 /* If the count fits in the inner mode's width,
5153 but exceeds the outer mode's width,
5154 the value will get truncated to 0
5158 /* If the count exceeds even the inner mode's width,
5159 don't fold this expression. */
5162 else if (op0 && op1)
5163 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5167 else if (GET_CODE (elt->exp) == SUBREG
5168 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5169 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5171 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5172 new = copy_rtx (SUBREG_REG (elt->exp));
5183 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5184 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5185 new = lookup_as_function (XEXP (x, 0), code);
5187 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5191 /* If we are not actually processing an insn, don't try to find the
5192 best address. Not only don't we care, but we could modify the
5193 MEM in an invalid way since we have no insn to validate against. */
5195 find_best_addr (insn, &XEXP (x, 0));
5198 /* Even if we don't fold in the insn itself,
5199 we can safely do so here, in hopes of getting a constant. */
5200 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5202 HOST_WIDE_INT offset = 0;
5204 if (GET_CODE (addr) == REG
5205 && REGNO_QTY_VALID_P (REGNO (addr))
5206 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
5207 && qty_const[reg_qty[REGNO (addr)]] != 0)
5208 addr = qty_const[reg_qty[REGNO (addr)]];
5210 /* If address is constant, split it into a base and integer offset. */
5211 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5213 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5214 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5216 base = XEXP (XEXP (addr, 0), 0);
5217 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5219 else if (GET_CODE (addr) == LO_SUM
5220 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5221 base = XEXP (addr, 1);
5222 else if (GET_CODE (addr) == ADDRESSOF)
5223 return change_address (x, VOIDmode, addr);
5225 /* If this is a constant pool reference, we can fold it into its
5226 constant to allow better value tracking. */
5227 if (base && GET_CODE (base) == SYMBOL_REF
5228 && CONSTANT_POOL_ADDRESS_P (base))
5230 rtx constant = get_pool_constant (base);
5231 enum machine_mode const_mode = get_pool_mode (base);
5234 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5235 constant_pool_entries_cost = COST (constant);
5237 /* If we are loading the full constant, we have an equivalence. */
5238 if (offset == 0 && mode == const_mode)
5241 /* If this actually isn't a constant (weird!), we can't do
5242 anything. Otherwise, handle the two most common cases:
5243 extracting a word from a multi-word constant, and extracting
5244 the low-order bits. Other cases don't seem common enough to
5246 if (! CONSTANT_P (constant))
5249 if (GET_MODE_CLASS (mode) == MODE_INT
5250 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5251 && offset % UNITS_PER_WORD == 0
5252 && (new = operand_subword (constant,
5253 offset / UNITS_PER_WORD,
5254 0, const_mode)) != 0)
5257 if (((BYTES_BIG_ENDIAN
5258 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5259 || (! BYTES_BIG_ENDIAN && offset == 0))
5260 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5264 /* If this is a reference to a label at a known position in a jump
5265 table, we also know its value. */
5266 if (base && GET_CODE (base) == LABEL_REF)
5268 rtx label = XEXP (base, 0);
5269 rtx table_insn = NEXT_INSN (label);
5271 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5272 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5274 rtx table = PATTERN (table_insn);
5277 && (offset / GET_MODE_SIZE (GET_MODE (table))
5278 < XVECLEN (table, 0)))
5279 return XVECEXP (table, 0,
5280 offset / GET_MODE_SIZE (GET_MODE (table)));
5282 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5283 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5285 rtx table = PATTERN (table_insn);
5288 && (offset / GET_MODE_SIZE (GET_MODE (table))
5289 < XVECLEN (table, 1)))
5291 offset /= GET_MODE_SIZE (GET_MODE (table));
5292 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5295 if (GET_MODE (table) != Pmode)
5296 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5298 /* Indicate this is a constant. This isn't a
5299 valid form of CONST, but it will only be used
5300 to fold the next insns and then discarded, so
5303 Note this expression must be explicitly discarded,
5304 by cse_insn, else it may end up in a REG_EQUAL note
5305 and "escape" to cause problems elsewhere. */
5306 return gen_rtx_CONST (GET_MODE (new), new);
5315 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5316 validate_change (insn, &XVECEXP (x, 3, i),
5317 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5327 mode_arg0 = VOIDmode;
5329 /* Try folding our operands.
5330 Then see which ones have constant values known. */
5332 fmt = GET_RTX_FORMAT (code);
5333 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5336 rtx arg = XEXP (x, i);
5337 rtx folded_arg = arg, const_arg = 0;
5338 enum machine_mode mode_arg = GET_MODE (arg);
5339 rtx cheap_arg, expensive_arg;
5340 rtx replacements[2];
5343 /* Most arguments are cheap, so handle them specially. */
5344 switch (GET_CODE (arg))
5347 /* This is the same as calling equiv_constant; it is duplicated
5349 if (REGNO_QTY_VALID_P (REGNO (arg))
5350 && qty_const[reg_qty[REGNO (arg)]] != 0
5351 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5352 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5354 = gen_lowpart_if_possible (GET_MODE (arg),
5355 qty_const[reg_qty[REGNO (arg)]]);
5368 folded_arg = prev_insn_cc0;
5369 mode_arg = prev_insn_cc0_mode;
5370 const_arg = equiv_constant (folded_arg);
5375 folded_arg = fold_rtx (arg, insn);
5376 const_arg = equiv_constant (folded_arg);
5379 /* For the first three operands, see if the operand
5380 is constant or equivalent to a constant. */
5384 folded_arg0 = folded_arg;
5385 const_arg0 = const_arg;
5386 mode_arg0 = mode_arg;
5389 folded_arg1 = folded_arg;
5390 const_arg1 = const_arg;
5393 const_arg2 = const_arg;
5397 /* Pick the least expensive of the folded argument and an
5398 equivalent constant argument. */
5399 if (const_arg == 0 || const_arg == folded_arg
5400 || COST (const_arg) > COST (folded_arg))
5401 cheap_arg = folded_arg, expensive_arg = const_arg;
5403 cheap_arg = const_arg, expensive_arg = folded_arg;
5405 /* Try to replace the operand with the cheapest of the two
5406 possibilities. If it doesn't work and this is either of the first
5407 two operands of a commutative operation, try swapping them.
5408 If THAT fails, try the more expensive, provided it is cheaper
5409 than what is already there. */
5411 if (cheap_arg == XEXP (x, i))
5414 if (insn == 0 && ! copied)
5420 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5422 j < 2 && replacements[j]
5423 && COST (replacements[j]) < COST (XEXP (x, i));
5426 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5429 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5431 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5432 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5434 if (apply_change_group ())
5436 /* Swap them back to be invalid so that this loop can
5437 continue and flag them to be swapped back later. */
5440 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5452 /* Don't try to fold inside of a vector of expressions.
5453 Doing nothing is harmless. */
5457 /* If a commutative operation, place a constant integer as the second
5458 operand unless the first operand is also a constant integer. Otherwise,
5459 place any constant second unless the first operand is also a constant. */
5461 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5463 if (must_swap || (const_arg0
5465 || (GET_CODE (const_arg0) == CONST_INT
5466 && GET_CODE (const_arg1) != CONST_INT))))
5468 register rtx tem = XEXP (x, 0);
5470 if (insn == 0 && ! copied)
5476 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5477 validate_change (insn, &XEXP (x, 1), tem, 1);
5478 if (apply_change_group ())
5480 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5481 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5486 /* If X is an arithmetic operation, see if we can simplify it. */
5488 switch (GET_RTX_CLASS (code))
5494 /* We can't simplify extension ops unless we know the
5496 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5497 && mode_arg0 == VOIDmode)
5500 /* If we had a CONST, strip it off and put it back later if we
5502 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5503 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5505 new = simplify_unary_operation (code, mode,
5506 const_arg0 ? const_arg0 : folded_arg0,
5508 if (new != 0 && is_const)
5509 new = gen_rtx_CONST (mode, new);
5514 /* See what items are actually being compared and set FOLDED_ARG[01]
5515 to those values and CODE to the actual comparison code. If any are
5516 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5517 do anything if both operands are already known to be constant. */
5519 if (const_arg0 == 0 || const_arg1 == 0)
5521 struct table_elt *p0, *p1;
5522 rtx true = const_true_rtx, false = const0_rtx;
5523 enum machine_mode mode_arg1;
5525 #ifdef FLOAT_STORE_FLAG_VALUE
5526 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5528 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5530 false = CONST0_RTX (mode);
5534 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5535 &mode_arg0, &mode_arg1);
5536 const_arg0 = equiv_constant (folded_arg0);
5537 const_arg1 = equiv_constant (folded_arg1);
5539 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5540 what kinds of things are being compared, so we can't do
5541 anything with this comparison. */
5543 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5546 /* If we do not now have two constants being compared, see
5547 if we can nevertheless deduce some things about the
5549 if (const_arg0 == 0 || const_arg1 == 0)
5551 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5552 non-explicit constant? These aren't zero, but we
5553 don't know their sign. */
5554 if (const_arg1 == const0_rtx
5555 && (NONZERO_BASE_PLUS_P (folded_arg0)
5556 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5558 || GET_CODE (folded_arg0) == SYMBOL_REF
5560 || GET_CODE (folded_arg0) == LABEL_REF
5561 || GET_CODE (folded_arg0) == CONST))
5565 else if (code == NE)
5569 /* See if the two operands are the same. We don't do this
5570 for IEEE floating-point since we can't assume x == x
5571 since x might be a NaN. */
5573 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5574 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5575 && (folded_arg0 == folded_arg1
5576 || (GET_CODE (folded_arg0) == REG
5577 && GET_CODE (folded_arg1) == REG
5578 && (reg_qty[REGNO (folded_arg0)]
5579 == reg_qty[REGNO (folded_arg1)]))
5580 || ((p0 = lookup (folded_arg0,
5581 (safe_hash (folded_arg0, mode_arg0)
5582 % NBUCKETS), mode_arg0))
5583 && (p1 = lookup (folded_arg1,
5584 (safe_hash (folded_arg1, mode_arg0)
5585 % NBUCKETS), mode_arg0))
5586 && p0->first_same_value == p1->first_same_value)))
5587 return ((code == EQ || code == LE || code == GE
5588 || code == LEU || code == GEU)
5591 /* If FOLDED_ARG0 is a register, see if the comparison we are
5592 doing now is either the same as we did before or the reverse
5593 (we only check the reverse if not floating-point). */
5594 else if (GET_CODE (folded_arg0) == REG)
5596 int qty = reg_qty[REGNO (folded_arg0)];
5598 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5599 && (comparison_dominates_p (qty_comparison_code[qty], code)
5600 || (comparison_dominates_p (qty_comparison_code[qty],
5601 reverse_condition (code))
5602 && ! FLOAT_MODE_P (mode_arg0)))
5603 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5605 && rtx_equal_p (qty_comparison_const[qty],
5607 || (GET_CODE (folded_arg1) == REG
5608 && (reg_qty[REGNO (folded_arg1)]
5609 == qty_comparison_qty[qty]))))
5610 return (comparison_dominates_p (qty_comparison_code[qty],
5617 /* If we are comparing against zero, see if the first operand is
5618 equivalent to an IOR with a constant. If so, we may be able to
5619 determine the result of this comparison. */
5621 if (const_arg1 == const0_rtx)
5623 rtx y = lookup_as_function (folded_arg0, IOR);
5627 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5628 && GET_CODE (inner_const) == CONST_INT
5629 && INTVAL (inner_const) != 0)
5631 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5632 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5633 && (INTVAL (inner_const)
5634 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5635 rtx true = const_true_rtx, false = const0_rtx;
5637 #ifdef FLOAT_STORE_FLAG_VALUE
5638 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5640 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5642 false = CONST0_RTX (mode);
5666 new = simplify_relational_operation (code, mode_arg0,
5667 const_arg0 ? const_arg0 : folded_arg0,
5668 const_arg1 ? const_arg1 : folded_arg1);
5669 #ifdef FLOAT_STORE_FLAG_VALUE
5670 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5671 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5672 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5681 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5682 with that LABEL_REF as its second operand. If so, the result is
5683 the first operand of that MINUS. This handles switches with an
5684 ADDR_DIFF_VEC table. */
5685 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5688 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5689 : lookup_as_function (folded_arg0, MINUS);
5691 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5692 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5695 /* Now try for a CONST of a MINUS like the above. */
5696 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5697 : lookup_as_function (folded_arg0, CONST))) != 0
5698 && GET_CODE (XEXP (y, 0)) == MINUS
5699 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5700 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5701 return XEXP (XEXP (y, 0), 0);
5704 /* Likewise if the operands are in the other order. */
5705 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5708 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5709 : lookup_as_function (folded_arg1, MINUS);
5711 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5712 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5715 /* Now try for a CONST of a MINUS like the above. */
5716 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5717 : lookup_as_function (folded_arg1, CONST))) != 0
5718 && GET_CODE (XEXP (y, 0)) == MINUS
5719 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5720 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5721 return XEXP (XEXP (y, 0), 0);
5724 /* If second operand is a register equivalent to a negative
5725 CONST_INT, see if we can find a register equivalent to the
5726 positive constant. Make a MINUS if so. Don't do this for
5727 a non-negative constant since we might then alternate between
5728 chosing positive and negative constants. Having the positive
5729 constant previously-used is the more common case. Be sure
5730 the resulting constant is non-negative; if const_arg1 were
5731 the smallest negative number this would overflow: depending
5732 on the mode, this would either just be the same value (and
5733 hence not save anything) or be incorrect. */
5734 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5735 && INTVAL (const_arg1) < 0
5736 && - INTVAL (const_arg1) >= 0
5737 && GET_CODE (folded_arg1) == REG)
5739 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5741 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5745 for (p = p->first_same_value; p; p = p->next_same_value)
5746 if (GET_CODE (p->exp) == REG)
5747 return cse_gen_binary (MINUS, mode, folded_arg0,
5748 canon_reg (p->exp, NULL_RTX));
5753 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5754 If so, produce (PLUS Z C2-C). */
5755 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5757 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5758 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5759 return fold_rtx (plus_constant (copy_rtx (y),
5760 -INTVAL (const_arg1)),
5764 /* ... fall through ... */
5767 case SMIN: case SMAX: case UMIN: case UMAX:
5768 case IOR: case AND: case XOR:
5769 case MULT: case DIV: case UDIV:
5770 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5771 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5772 is known to be of similar form, we may be able to replace the
5773 operation with a combined operation. This may eliminate the
5774 intermediate operation if every use is simplified in this way.
5775 Note that the similar optimization done by combine.c only works
5776 if the intermediate operation's result has only one reference. */
5778 if (GET_CODE (folded_arg0) == REG
5779 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5782 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5783 rtx y = lookup_as_function (folded_arg0, code);
5785 enum rtx_code associate_code;
5789 || 0 == (inner_const
5790 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5791 || GET_CODE (inner_const) != CONST_INT
5792 /* If we have compiled a statement like
5793 "if (x == (x & mask1))", and now are looking at
5794 "x & mask2", we will have a case where the first operand
5795 of Y is the same as our first operand. Unless we detect
5796 this case, an infinite loop will result. */
5797 || XEXP (y, 0) == folded_arg0)
5800 /* Don't associate these operations if they are a PLUS with the
5801 same constant and it is a power of two. These might be doable
5802 with a pre- or post-increment. Similarly for two subtracts of
5803 identical powers of two with post decrement. */
5805 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5806 && ((HAVE_PRE_INCREMENT
5807 && exact_log2 (INTVAL (const_arg1)) >= 0)
5808 || (HAVE_POST_INCREMENT
5809 && exact_log2 (INTVAL (const_arg1)) >= 0)
5810 || (HAVE_PRE_DECREMENT
5811 && exact_log2 (- INTVAL (const_arg1)) >= 0)
5812 || (HAVE_POST_DECREMENT
5813 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
5816 /* Compute the code used to compose the constants. For example,
5817 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5820 = (code == MULT || code == DIV || code == UDIV ? MULT
5821 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5823 new_const = simplify_binary_operation (associate_code, mode,
5824 const_arg1, inner_const);
5829 /* If we are associating shift operations, don't let this
5830 produce a shift of the size of the object or larger.
5831 This could occur when we follow a sign-extend by a right
5832 shift on a machine that does a sign-extend as a pair
5835 if (is_shift && GET_CODE (new_const) == CONST_INT
5836 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5838 /* As an exception, we can turn an ASHIFTRT of this
5839 form into a shift of the number of bits - 1. */
5840 if (code == ASHIFTRT)
5841 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5846 y = copy_rtx (XEXP (y, 0));
5848 /* If Y contains our first operand (the most common way this
5849 can happen is if Y is a MEM), we would do into an infinite
5850 loop if we tried to fold it. So don't in that case. */
5852 if (! reg_mentioned_p (folded_arg0, y))
5853 y = fold_rtx (y, insn);
5855 return cse_gen_binary (code, mode, y, new_const);
5863 new = simplify_binary_operation (code, mode,
5864 const_arg0 ? const_arg0 : folded_arg0,
5865 const_arg1 ? const_arg1 : folded_arg1);
5869 /* (lo_sum (high X) X) is simply X. */
5870 if (code == LO_SUM && const_arg0 != 0
5871 && GET_CODE (const_arg0) == HIGH
5872 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5878 new = simplify_ternary_operation (code, mode, mode_arg0,
5879 const_arg0 ? const_arg0 : folded_arg0,
5880 const_arg1 ? const_arg1 : folded_arg1,
5881 const_arg2 ? const_arg2 : XEXP (x, 2));
5885 /* Always eliminate CONSTANT_P_RTX at this stage. */
5886 if (code == CONSTANT_P_RTX)
5887 return (const_arg0 ? const1_rtx : const0_rtx);
5891 return new ? new : x;
5894 /* Return a constant value currently equivalent to X.
5895 Return 0 if we don't know one. */
5901 if (GET_CODE (x) == REG
5902 && REGNO_QTY_VALID_P (REGNO (x))
5903 && qty_const[reg_qty[REGNO (x)]])
5904 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5906 if (x == 0 || CONSTANT_P (x))
5909 /* If X is a MEM, try to fold it outside the context of any insn to see if
5910 it might be equivalent to a constant. That handles the case where it
5911 is a constant-pool reference. Then try to look it up in the hash table
5912 in case it is something whose value we have seen before. */
5914 if (GET_CODE (x) == MEM)
5916 struct table_elt *elt;
5918 x = fold_rtx (x, NULL_RTX);
5922 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5926 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5927 if (elt->is_const && CONSTANT_P (elt->exp))
5934 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5935 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5936 least-significant part of X.
5937 MODE specifies how big a part of X to return.
5939 If the requested operation cannot be done, 0 is returned.
5941 This is similar to gen_lowpart in emit-rtl.c. */
5944 gen_lowpart_if_possible (mode, x)
5945 enum machine_mode mode;
5948 rtx result = gen_lowpart_common (mode, x);
5952 else if (GET_CODE (x) == MEM)
5954 /* This is the only other case we handle. */
5955 register int offset = 0;
5958 if (WORDS_BIG_ENDIAN)
5959 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5960 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5961 if (BYTES_BIG_ENDIAN)
5962 /* Adjust the address so that the address-after-the-data is
5964 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5965 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5966 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
5967 if (! memory_address_p (mode, XEXP (new, 0)))
5969 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5970 MEM_COPY_ATTRIBUTES (new, x);
5977 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5978 branch. It will be zero if not.
5980 In certain cases, this can cause us to add an equivalence. For example,
5981 if we are following the taken case of
5983 we can add the fact that `i' and '2' are now equivalent.
5985 In any case, we can record that this comparison was passed. If the same
5986 comparison is seen later, we will know its value. */
5989 record_jump_equiv (insn, taken)
5993 int cond_known_true;
5995 enum machine_mode mode, mode0, mode1;
5996 int reversed_nonequality = 0;
5999 /* Ensure this is the right kind of insn. */
6000 if (! condjump_p (insn) || simplejump_p (insn))
6003 /* See if this jump condition is known true or false. */
6005 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
6007 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
6009 /* Get the type of comparison being done and the operands being compared.
6010 If we had to reverse a non-equality condition, record that fact so we
6011 know that it isn't valid for floating-point. */
6012 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
6013 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
6014 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
6016 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
6017 if (! cond_known_true)
6019 reversed_nonequality = (code != EQ && code != NE);
6020 code = reverse_condition (code);
6023 /* The mode is the mode of the non-constant. */
6025 if (mode1 != VOIDmode)
6028 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
6031 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6032 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6033 Make any useful entries we can with that information. Called from
6034 above function and called recursively. */
6037 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
6039 enum machine_mode mode;
6041 int reversed_nonequality;
6043 unsigned op0_hash, op1_hash;
6044 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
6045 struct table_elt *op0_elt, *op1_elt;
6047 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6048 we know that they are also equal in the smaller mode (this is also
6049 true for all smaller modes whether or not there is a SUBREG, but
6050 is not worth testing for with no SUBREG). */
6052 /* Note that GET_MODE (op0) may not equal MODE. */
6053 if (code == EQ && GET_CODE (op0) == SUBREG
6054 && (GET_MODE_SIZE (GET_MODE (op0))
6055 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6057 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6058 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6060 record_jump_cond (code, mode, SUBREG_REG (op0),
6061 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6062 reversed_nonequality);
6065 if (code == EQ && GET_CODE (op1) == SUBREG
6066 && (GET_MODE_SIZE (GET_MODE (op1))
6067 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6069 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6070 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6072 record_jump_cond (code, mode, SUBREG_REG (op1),
6073 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6074 reversed_nonequality);
6077 /* Similarly, if this is an NE comparison, and either is a SUBREG
6078 making a smaller mode, we know the whole thing is also NE. */
6080 /* Note that GET_MODE (op0) may not equal MODE;
6081 if we test MODE instead, we can get an infinite recursion
6082 alternating between two modes each wider than MODE. */
6084 if (code == NE && GET_CODE (op0) == SUBREG
6085 && subreg_lowpart_p (op0)
6086 && (GET_MODE_SIZE (GET_MODE (op0))
6087 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6089 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6090 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6092 record_jump_cond (code, mode, SUBREG_REG (op0),
6093 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6094 reversed_nonequality);
6097 if (code == NE && GET_CODE (op1) == SUBREG
6098 && subreg_lowpart_p (op1)
6099 && (GET_MODE_SIZE (GET_MODE (op1))
6100 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6102 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6103 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6105 record_jump_cond (code, mode, SUBREG_REG (op1),
6106 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6107 reversed_nonequality);
6110 /* Hash both operands. */
6113 hash_arg_in_memory = 0;
6114 hash_arg_in_struct = 0;
6115 op0_hash = HASH (op0, mode);
6116 op0_in_memory = hash_arg_in_memory;
6117 op0_in_struct = hash_arg_in_struct;
6123 hash_arg_in_memory = 0;
6124 hash_arg_in_struct = 0;
6125 op1_hash = HASH (op1, mode);
6126 op1_in_memory = hash_arg_in_memory;
6127 op1_in_struct = hash_arg_in_struct;
6132 /* Look up both operands. */
6133 op0_elt = lookup (op0, op0_hash, mode);
6134 op1_elt = lookup (op1, op1_hash, mode);
6136 /* If both operands are already equivalent or if they are not in the
6137 table but are identical, do nothing. */
6138 if ((op0_elt != 0 && op1_elt != 0
6139 && op0_elt->first_same_value == op1_elt->first_same_value)
6140 || op0 == op1 || rtx_equal_p (op0, op1))
6143 /* If we aren't setting two things equal all we can do is save this
6144 comparison. Similarly if this is floating-point. In the latter
6145 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6146 If we record the equality, we might inadvertently delete code
6147 whose intent was to change -0 to +0. */
6149 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6151 /* If we reversed a floating-point comparison, if OP0 is not a
6152 register, or if OP1 is neither a register or constant, we can't
6155 if (GET_CODE (op1) != REG)
6156 op1 = equiv_constant (op1);
6158 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6159 || GET_CODE (op0) != REG || op1 == 0)
6162 /* Put OP0 in the hash table if it isn't already. This gives it a
6163 new quantity number. */
6166 if (insert_regs (op0, NULL_PTR, 0))
6168 rehash_using_reg (op0);
6169 op0_hash = HASH (op0, mode);
6171 /* If OP0 is contained in OP1, this changes its hash code
6172 as well. Faster to rehash than to check, except
6173 for the simple case of a constant. */
6174 if (! CONSTANT_P (op1))
6175 op1_hash = HASH (op1,mode);
6178 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6179 op0_elt->in_memory = op0_in_memory;
6180 op0_elt->in_struct = op0_in_struct;
6183 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
6184 if (GET_CODE (op1) == REG)
6186 /* Look it up again--in case op0 and op1 are the same. */
6187 op1_elt = lookup (op1, op1_hash, mode);
6189 /* Put OP1 in the hash table so it gets a new quantity number. */
6192 if (insert_regs (op1, NULL_PTR, 0))
6194 rehash_using_reg (op1);
6195 op1_hash = HASH (op1, mode);
6198 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6199 op1_elt->in_memory = op1_in_memory;
6200 op1_elt->in_struct = op1_in_struct;
6203 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
6204 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
6208 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
6209 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
6215 /* If either side is still missing an equivalence, make it now,
6216 then merge the equivalences. */
6220 if (insert_regs (op0, NULL_PTR, 0))
6222 rehash_using_reg (op0);
6223 op0_hash = HASH (op0, mode);
6226 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6227 op0_elt->in_memory = op0_in_memory;
6228 op0_elt->in_struct = op0_in_struct;
6233 if (insert_regs (op1, NULL_PTR, 0))
6235 rehash_using_reg (op1);
6236 op1_hash = HASH (op1, mode);
6239 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6240 op1_elt->in_memory = op1_in_memory;
6241 op1_elt->in_struct = op1_in_struct;
6244 merge_equiv_classes (op0_elt, op1_elt);
6245 last_jump_equiv_class = op0_elt;
6248 /* CSE processing for one instruction.
6249 First simplify sources and addresses of all assignments
6250 in the instruction, using previously-computed equivalents values.
6251 Then install the new sources and destinations in the table
6252 of available values.
6254 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6255 the insn. It means that INSN is inside libcall block. In this
6256 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6258 /* Data on one SET contained in the instruction. */
6262 /* The SET rtx itself. */
6264 /* The SET_SRC of the rtx (the original value, if it is changing). */
6266 /* The hash-table element for the SET_SRC of the SET. */
6267 struct table_elt *src_elt;
6268 /* Hash value for the SET_SRC. */
6270 /* Hash value for the SET_DEST. */
6272 /* The SET_DEST, with SUBREG, etc., stripped. */
6274 /* Place where the pointer to the INNER_DEST was found. */
6275 rtx *inner_dest_loc;
6276 /* Nonzero if the SET_SRC is in memory. */
6278 /* Nonzero if the SET_SRC is in a structure. */
6280 /* Nonzero if the SET_SRC contains something
6281 whose value cannot be predicted and understood. */
6283 /* Original machine mode, in case it becomes a CONST_INT. */
6284 enum machine_mode mode;
6285 /* A constant equivalent for SET_SRC, if any. */
6287 /* Hash value of constant equivalent for SET_SRC. */
6288 unsigned src_const_hash;
6289 /* Table entry for constant equivalent for SET_SRC, if any. */
6290 struct table_elt *src_const_elt;
6294 cse_insn (insn, libcall_insn)
6298 register rtx x = PATTERN (insn);
6301 register int n_sets = 0;
6304 /* Records what this insn does to set CC0. */
6305 rtx this_insn_cc0 = 0;
6306 enum machine_mode this_insn_cc0_mode = VOIDmode;
6310 struct table_elt *src_eqv_elt = 0;
6311 int src_eqv_volatile;
6312 int src_eqv_in_memory;
6313 int src_eqv_in_struct;
6314 unsigned src_eqv_hash;
6320 /* Find all the SETs and CLOBBERs in this instruction.
6321 Record all the SETs in the array `set' and count them.
6322 Also determine whether there is a CLOBBER that invalidates
6323 all memory references, or all references at varying addresses. */
6325 if (GET_CODE (insn) == CALL_INSN)
6327 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6328 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6329 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6332 if (GET_CODE (x) == SET)
6334 sets = (struct set *) alloca (sizeof (struct set));
6337 /* Ignore SETs that are unconditional jumps.
6338 They never need cse processing, so this does not hurt.
6339 The reason is not efficiency but rather
6340 so that we can test at the end for instructions
6341 that have been simplified to unconditional jumps
6342 and not be misled by unchanged instructions
6343 that were unconditional jumps to begin with. */
6344 if (SET_DEST (x) == pc_rtx
6345 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6348 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6349 The hard function value register is used only once, to copy to
6350 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6351 Ensure we invalidate the destination register. On the 80386 no
6352 other code would invalidate it since it is a fixed_reg.
6353 We need not check the return of apply_change_group; see canon_reg. */
6355 else if (GET_CODE (SET_SRC (x)) == CALL)
6357 canon_reg (SET_SRC (x), insn);
6358 apply_change_group ();
6359 fold_rtx (SET_SRC (x), insn);
6360 invalidate (SET_DEST (x), VOIDmode);
6365 else if (GET_CODE (x) == PARALLEL)
6367 register int lim = XVECLEN (x, 0);
6369 sets = (struct set *) alloca (lim * sizeof (struct set));
6371 /* Find all regs explicitly clobbered in this insn,
6372 and ensure they are not replaced with any other regs
6373 elsewhere in this insn.
6374 When a reg that is clobbered is also used for input,
6375 we should presume that that is for a reason,
6376 and we should not substitute some other register
6377 which is not supposed to be clobbered.
6378 Therefore, this loop cannot be merged into the one below
6379 because a CALL may precede a CLOBBER and refer to the
6380 value clobbered. We must not let a canonicalization do
6381 anything in that case. */
6382 for (i = 0; i < lim; i++)
6384 register rtx y = XVECEXP (x, 0, i);
6385 if (GET_CODE (y) == CLOBBER)
6387 rtx clobbered = XEXP (y, 0);
6389 if (GET_CODE (clobbered) == REG
6390 || GET_CODE (clobbered) == SUBREG)
6391 invalidate (clobbered, VOIDmode);
6392 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6393 || GET_CODE (clobbered) == ZERO_EXTRACT)
6394 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6398 for (i = 0; i < lim; i++)
6400 register rtx y = XVECEXP (x, 0, i);
6401 if (GET_CODE (y) == SET)
6403 /* As above, we ignore unconditional jumps and call-insns and
6404 ignore the result of apply_change_group. */
6405 if (GET_CODE (SET_SRC (y)) == CALL)
6407 canon_reg (SET_SRC (y), insn);
6408 apply_change_group ();
6409 fold_rtx (SET_SRC (y), insn);
6410 invalidate (SET_DEST (y), VOIDmode);
6412 else if (SET_DEST (y) == pc_rtx
6413 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6416 sets[n_sets++].rtl = y;
6418 else if (GET_CODE (y) == CLOBBER)
6420 /* If we clobber memory, canon the address.
6421 This does nothing when a register is clobbered
6422 because we have already invalidated the reg. */
6423 if (GET_CODE (XEXP (y, 0)) == MEM)
6424 canon_reg (XEXP (y, 0), NULL_RTX);
6426 else if (GET_CODE (y) == USE
6427 && ! (GET_CODE (XEXP (y, 0)) == REG
6428 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6429 canon_reg (y, NULL_RTX);
6430 else if (GET_CODE (y) == CALL)
6432 /* The result of apply_change_group can be ignored; see
6434 canon_reg (y, insn);
6435 apply_change_group ();
6440 else if (GET_CODE (x) == CLOBBER)
6442 if (GET_CODE (XEXP (x, 0)) == MEM)
6443 canon_reg (XEXP (x, 0), NULL_RTX);
6446 /* Canonicalize a USE of a pseudo register or memory location. */
6447 else if (GET_CODE (x) == USE
6448 && ! (GET_CODE (XEXP (x, 0)) == REG
6449 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6450 canon_reg (XEXP (x, 0), NULL_RTX);
6451 else if (GET_CODE (x) == CALL)
6453 /* The result of apply_change_group can be ignored; see canon_reg. */
6454 canon_reg (x, insn);
6455 apply_change_group ();
6459 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6460 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6461 is handled specially for this case, and if it isn't set, then there will
6462 be no equivalence for the destination. */
6463 if (n_sets == 1 && REG_NOTES (insn) != 0
6464 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6465 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6466 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6467 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6469 /* Canonicalize sources and addresses of destinations.
6470 We do this in a separate pass to avoid problems when a MATCH_DUP is
6471 present in the insn pattern. In that case, we want to ensure that
6472 we don't break the duplicate nature of the pattern. So we will replace
6473 both operands at the same time. Otherwise, we would fail to find an
6474 equivalent substitution in the loop calling validate_change below.
6476 We used to suppress canonicalization of DEST if it appears in SRC,
6477 but we don't do this any more. */
6479 for (i = 0; i < n_sets; i++)
6481 rtx dest = SET_DEST (sets[i].rtl);
6482 rtx src = SET_SRC (sets[i].rtl);
6483 rtx new = canon_reg (src, insn);
6486 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6487 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6488 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6489 || (insn_code = recog_memoized (insn)) < 0
6490 || insn_n_dups[insn_code] > 0)
6491 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6493 SET_SRC (sets[i].rtl) = new;
6495 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6497 validate_change (insn, &XEXP (dest, 1),
6498 canon_reg (XEXP (dest, 1), insn), 1);
6499 validate_change (insn, &XEXP (dest, 2),
6500 canon_reg (XEXP (dest, 2), insn), 1);
6503 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6504 || GET_CODE (dest) == ZERO_EXTRACT
6505 || GET_CODE (dest) == SIGN_EXTRACT)
6506 dest = XEXP (dest, 0);
6508 if (GET_CODE (dest) == MEM)
6509 canon_reg (dest, insn);
6512 /* Now that we have done all the replacements, we can apply the change
6513 group and see if they all work. Note that this will cause some
6514 canonicalizations that would have worked individually not to be applied
6515 because some other canonicalization didn't work, but this should not
6518 The result of apply_change_group can be ignored; see canon_reg. */
6520 apply_change_group ();
6522 /* Set sets[i].src_elt to the class each source belongs to.
6523 Detect assignments from or to volatile things
6524 and set set[i] to zero so they will be ignored
6525 in the rest of this function.
6527 Nothing in this loop changes the hash table or the register chains. */
6529 for (i = 0; i < n_sets; i++)
6531 register rtx src, dest;
6532 register rtx src_folded;
6533 register struct table_elt *elt = 0, *p;
6534 enum machine_mode mode;
6537 rtx src_related = 0;
6538 struct table_elt *src_const_elt = 0;
6539 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6540 int src_related_cost = 10000, src_elt_cost = 10000;
6541 /* Set non-zero if we need to call force_const_mem on with the
6542 contents of src_folded before using it. */
6543 int src_folded_force_flag = 0;
6545 dest = SET_DEST (sets[i].rtl);
6546 src = SET_SRC (sets[i].rtl);
6548 /* If SRC is a constant that has no machine mode,
6549 hash it with the destination's machine mode.
6550 This way we can keep different modes separate. */
6552 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6553 sets[i].mode = mode;
6557 enum machine_mode eqvmode = mode;
6558 if (GET_CODE (dest) == STRICT_LOW_PART)
6559 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6561 hash_arg_in_memory = 0;
6562 hash_arg_in_struct = 0;
6563 src_eqv = fold_rtx (src_eqv, insn);
6564 src_eqv_hash = HASH (src_eqv, eqvmode);
6566 /* Find the equivalence class for the equivalent expression. */
6569 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6571 src_eqv_volatile = do_not_record;
6572 src_eqv_in_memory = hash_arg_in_memory;
6573 src_eqv_in_struct = hash_arg_in_struct;
6576 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6577 value of the INNER register, not the destination. So it is not
6578 a valid substitution for the source. But save it for later. */
6579 if (GET_CODE (dest) == STRICT_LOW_PART)
6582 src_eqv_here = src_eqv;
6584 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6585 simplified result, which may not necessarily be valid. */
6586 src_folded = fold_rtx (src, insn);
6589 /* ??? This caused bad code to be generated for the m68k port with -O2.
6590 Suppose src is (CONST_INT -1), and that after truncation src_folded
6591 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6592 At the end we will add src and src_const to the same equivalence
6593 class. We now have 3 and -1 on the same equivalence class. This
6594 causes later instructions to be mis-optimized. */
6595 /* If storing a constant in a bitfield, pre-truncate the constant
6596 so we will be able to record it later. */
6597 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6598 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6600 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6602 if (GET_CODE (src) == CONST_INT
6603 && GET_CODE (width) == CONST_INT
6604 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6605 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6607 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6608 << INTVAL (width)) - 1));
6612 /* Compute SRC's hash code, and also notice if it
6613 should not be recorded at all. In that case,
6614 prevent any further processing of this assignment. */
6616 hash_arg_in_memory = 0;
6617 hash_arg_in_struct = 0;
6620 sets[i].src_hash = HASH (src, mode);
6621 sets[i].src_volatile = do_not_record;
6622 sets[i].src_in_memory = hash_arg_in_memory;
6623 sets[i].src_in_struct = hash_arg_in_struct;
6625 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6626 a pseudo that is set more than once, do not record SRC. Using
6627 SRC as a replacement for anything else will be incorrect in that
6628 situation. Note that this usually occurs only for stack slots,
6629 in which case all the RTL would be referring to SRC, so we don't
6630 lose any optimization opportunities by not having SRC in the
6633 if (GET_CODE (src) == MEM
6634 && find_reg_note (insn, REG_EQUIV, src) != 0
6635 && GET_CODE (dest) == REG
6636 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6637 && REG_N_SETS (REGNO (dest)) != 1)
6638 sets[i].src_volatile = 1;
6641 /* It is no longer clear why we used to do this, but it doesn't
6642 appear to still be needed. So let's try without it since this
6643 code hurts cse'ing widened ops. */
6644 /* If source is a perverse subreg (such as QI treated as an SI),
6645 treat it as volatile. It may do the work of an SI in one context
6646 where the extra bits are not being used, but cannot replace an SI
6648 if (GET_CODE (src) == SUBREG
6649 && (GET_MODE_SIZE (GET_MODE (src))
6650 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6651 sets[i].src_volatile = 1;
6654 /* Locate all possible equivalent forms for SRC. Try to replace
6655 SRC in the insn with each cheaper equivalent.
6657 We have the following types of equivalents: SRC itself, a folded
6658 version, a value given in a REG_EQUAL note, or a value related
6661 Each of these equivalents may be part of an additional class
6662 of equivalents (if more than one is in the table, they must be in
6663 the same class; we check for this).
6665 If the source is volatile, we don't do any table lookups.
6667 We note any constant equivalent for possible later use in a
6670 if (!sets[i].src_volatile)
6671 elt = lookup (src, sets[i].src_hash, mode);
6673 sets[i].src_elt = elt;
6675 if (elt && src_eqv_here && src_eqv_elt)
6677 if (elt->first_same_value != src_eqv_elt->first_same_value)
6679 /* The REG_EQUAL is indicating that two formerly distinct
6680 classes are now equivalent. So merge them. */
6681 merge_equiv_classes (elt, src_eqv_elt);
6682 src_eqv_hash = HASH (src_eqv, elt->mode);
6683 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6689 else if (src_eqv_elt)
6692 /* Try to find a constant somewhere and record it in `src_const'.
6693 Record its table element, if any, in `src_const_elt'. Look in
6694 any known equivalences first. (If the constant is not in the
6695 table, also set `sets[i].src_const_hash'). */
6697 for (p = elt->first_same_value; p; p = p->next_same_value)
6701 src_const_elt = elt;
6706 && (CONSTANT_P (src_folded)
6707 /* Consider (minus (label_ref L1) (label_ref L2)) as
6708 "constant" here so we will record it. This allows us
6709 to fold switch statements when an ADDR_DIFF_VEC is used. */
6710 || (GET_CODE (src_folded) == MINUS
6711 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6712 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6713 src_const = src_folded, src_const_elt = elt;
6714 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6715 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6717 /* If we don't know if the constant is in the table, get its
6718 hash code and look it up. */
6719 if (src_const && src_const_elt == 0)
6721 sets[i].src_const_hash = HASH (src_const, mode);
6722 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6725 sets[i].src_const = src_const;
6726 sets[i].src_const_elt = src_const_elt;
6728 /* If the constant and our source are both in the table, mark them as
6729 equivalent. Otherwise, if a constant is in the table but the source
6730 isn't, set ELT to it. */
6731 if (src_const_elt && elt
6732 && src_const_elt->first_same_value != elt->first_same_value)
6733 merge_equiv_classes (elt, src_const_elt);
6734 else if (src_const_elt && elt == 0)
6735 elt = src_const_elt;
6737 /* See if there is a register linearly related to a constant
6738 equivalent of SRC. */
6740 && (GET_CODE (src_const) == CONST
6741 || (src_const_elt && src_const_elt->related_value != 0)))
6743 src_related = use_related_value (src_const, src_const_elt);
6746 struct table_elt *src_related_elt
6747 = lookup (src_related, HASH (src_related, mode), mode);
6748 if (src_related_elt && elt)
6750 if (elt->first_same_value
6751 != src_related_elt->first_same_value)
6752 /* This can occur when we previously saw a CONST
6753 involving a SYMBOL_REF and then see the SYMBOL_REF
6754 twice. Merge the involved classes. */
6755 merge_equiv_classes (elt, src_related_elt);
6758 src_related_elt = 0;
6760 else if (src_related_elt && elt == 0)
6761 elt = src_related_elt;
6765 /* See if we have a CONST_INT that is already in a register in a
6768 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6769 && GET_MODE_CLASS (mode) == MODE_INT
6770 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6772 enum machine_mode wider_mode;
6774 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6775 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6776 && src_related == 0;
6777 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6779 struct table_elt *const_elt
6780 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6785 for (const_elt = const_elt->first_same_value;
6786 const_elt; const_elt = const_elt->next_same_value)
6787 if (GET_CODE (const_elt->exp) == REG)
6789 src_related = gen_lowpart_if_possible (mode,
6796 /* Another possibility is that we have an AND with a constant in
6797 a mode narrower than a word. If so, it might have been generated
6798 as part of an "if" which would narrow the AND. If we already
6799 have done the AND in a wider mode, we can use a SUBREG of that
6802 if (flag_expensive_optimizations && ! src_related
6803 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6804 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6806 enum machine_mode tmode;
6807 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6809 for (tmode = GET_MODE_WIDER_MODE (mode);
6810 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6811 tmode = GET_MODE_WIDER_MODE (tmode))
6813 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6814 struct table_elt *larger_elt;
6818 PUT_MODE (new_and, tmode);
6819 XEXP (new_and, 0) = inner;
6820 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6821 if (larger_elt == 0)
6824 for (larger_elt = larger_elt->first_same_value;
6825 larger_elt; larger_elt = larger_elt->next_same_value)
6826 if (GET_CODE (larger_elt->exp) == REG)
6829 = gen_lowpart_if_possible (mode, larger_elt->exp);
6839 #ifdef LOAD_EXTEND_OP
6840 /* See if a MEM has already been loaded with a widening operation;
6841 if it has, we can use a subreg of that. Many CISC machines
6842 also have such operations, but this is only likely to be
6843 beneficial these machines. */
6845 if (flag_expensive_optimizations && src_related == 0
6846 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6847 && GET_MODE_CLASS (mode) == MODE_INT
6848 && GET_CODE (src) == MEM && ! do_not_record
6849 && LOAD_EXTEND_OP (mode) != NIL)
6851 enum machine_mode tmode;
6853 /* Set what we are trying to extend and the operation it might
6854 have been extended with. */
6855 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6856 XEXP (memory_extend_rtx, 0) = src;
6858 for (tmode = GET_MODE_WIDER_MODE (mode);
6859 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6860 tmode = GET_MODE_WIDER_MODE (tmode))
6862 struct table_elt *larger_elt;
6864 PUT_MODE (memory_extend_rtx, tmode);
6865 larger_elt = lookup (memory_extend_rtx,
6866 HASH (memory_extend_rtx, tmode), tmode);
6867 if (larger_elt == 0)
6870 for (larger_elt = larger_elt->first_same_value;
6871 larger_elt; larger_elt = larger_elt->next_same_value)
6872 if (GET_CODE (larger_elt->exp) == REG)
6874 src_related = gen_lowpart_if_possible (mode,
6883 #endif /* LOAD_EXTEND_OP */
6885 if (src == src_folded)
6888 /* At this point, ELT, if non-zero, points to a class of expressions
6889 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6890 and SRC_RELATED, if non-zero, each contain additional equivalent
6891 expressions. Prune these latter expressions by deleting expressions
6892 already in the equivalence class.
6894 Check for an equivalent identical to the destination. If found,
6895 this is the preferred equivalent since it will likely lead to
6896 elimination of the insn. Indicate this by placing it in
6899 if (elt) elt = elt->first_same_value;
6900 for (p = elt; p; p = p->next_same_value)
6902 enum rtx_code code = GET_CODE (p->exp);
6904 /* If the expression is not valid, ignore it. Then we do not
6905 have to check for validity below. In most cases, we can use
6906 `rtx_equal_p', since canonicalization has already been done. */
6907 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6910 /* Also skip paradoxical subregs, unless that's what we're
6913 && (GET_MODE_SIZE (GET_MODE (p->exp))
6914 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6916 && GET_CODE (src) == SUBREG
6917 && GET_MODE (src) == GET_MODE (p->exp)
6918 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6919 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
6922 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6924 else if (src_folded && GET_CODE (src_folded) == code
6925 && rtx_equal_p (src_folded, p->exp))
6927 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6928 && rtx_equal_p (src_eqv_here, p->exp))
6930 else if (src_related && GET_CODE (src_related) == code
6931 && rtx_equal_p (src_related, p->exp))
6934 /* This is the same as the destination of the insns, we want
6935 to prefer it. Copy it to src_related. The code below will
6936 then give it a negative cost. */
6937 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6942 /* Find the cheapest valid equivalent, trying all the available
6943 possibilities. Prefer items not in the hash table to ones
6944 that are when they are equal cost. Note that we can never
6945 worsen an insn as the current contents will also succeed.
6946 If we find an equivalent identical to the destination, use it as best,
6947 since this insn will probably be eliminated in that case. */
6950 if (rtx_equal_p (src, dest))
6953 src_cost = COST (src);
6958 if (rtx_equal_p (src_eqv_here, dest))
6961 src_eqv_cost = COST (src_eqv_here);
6966 if (rtx_equal_p (src_folded, dest))
6967 src_folded_cost = -1;
6969 src_folded_cost = COST (src_folded);
6974 if (rtx_equal_p (src_related, dest))
6975 src_related_cost = -1;
6977 src_related_cost = COST (src_related);
6980 /* If this was an indirect jump insn, a known label will really be
6981 cheaper even though it looks more expensive. */
6982 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6983 src_folded = src_const, src_folded_cost = -1;
6985 /* Terminate loop when replacement made. This must terminate since
6986 the current contents will be tested and will always be valid. */
6991 /* Skip invalid entries. */
6992 while (elt && GET_CODE (elt->exp) != REG
6993 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6994 elt = elt->next_same_value;
6996 /* A paradoxical subreg would be bad here: it'll be the right
6997 size, but later may be adjusted so that the upper bits aren't
6998 what we want. So reject it. */
7000 && GET_CODE (elt->exp) == SUBREG
7001 && (GET_MODE_SIZE (GET_MODE (elt->exp))
7002 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
7003 /* It is okay, though, if the rtx we're trying to match
7004 will ignore any of the bits we can't predict. */
7006 && GET_CODE (src) == SUBREG
7007 && GET_MODE (src) == GET_MODE (elt->exp)
7008 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7009 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
7011 elt = elt->next_same_value;
7015 if (elt) src_elt_cost = elt->cost;
7017 /* Find cheapest and skip it for the next time. For items
7018 of equal cost, use this order:
7019 src_folded, src, src_eqv, src_related and hash table entry. */
7020 if (src_folded_cost <= src_cost
7021 && src_folded_cost <= src_eqv_cost
7022 && src_folded_cost <= src_related_cost
7023 && src_folded_cost <= src_elt_cost)
7025 trial = src_folded, src_folded_cost = 10000;
7026 if (src_folded_force_flag)
7027 trial = force_const_mem (mode, trial);
7029 else if (src_cost <= src_eqv_cost
7030 && src_cost <= src_related_cost
7031 && src_cost <= src_elt_cost)
7032 trial = src, src_cost = 10000;
7033 else if (src_eqv_cost <= src_related_cost
7034 && src_eqv_cost <= src_elt_cost)
7035 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
7036 else if (src_related_cost <= src_elt_cost)
7037 trial = copy_rtx (src_related), src_related_cost = 10000;
7040 trial = copy_rtx (elt->exp);
7041 elt = elt->next_same_value;
7042 src_elt_cost = 10000;
7045 /* We don't normally have an insn matching (set (pc) (pc)), so
7046 check for this separately here. We will delete such an
7049 Tablejump insns contain a USE of the table, so simply replacing
7050 the operand with the constant won't match. This is simply an
7051 unconditional branch, however, and is therefore valid. Just
7052 insert the substitution here and we will delete and re-emit
7055 /* Keep track of the original SET_SRC so that we can fix notes
7056 on libcall instructions. */
7057 old_src = SET_SRC (sets[i].rtl);
7059 if (n_sets == 1 && dest == pc_rtx
7061 || (GET_CODE (trial) == LABEL_REF
7062 && ! condjump_p (insn))))
7064 /* If TRIAL is a label in front of a jump table, we are
7065 really falling through the switch (this is how casesi
7066 insns work), so we must branch around the table. */
7067 if (GET_CODE (trial) == CODE_LABEL
7068 && NEXT_INSN (trial) != 0
7069 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
7070 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
7071 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
7073 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
7075 SET_SRC (sets[i].rtl) = trial;
7076 cse_jumps_altered = 1;
7080 /* Look for a substitution that makes a valid insn. */
7081 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
7083 /* If we just made a substitution inside a libcall, then we
7084 need to make the same substitution in any notes attached
7085 to the RETVAL insn. */
7087 && (GET_CODE (old_src) == REG
7088 || GET_CODE (old_src) == SUBREG
7089 || GET_CODE (old_src) == MEM))
7090 replace_rtx (REG_NOTES (libcall_insn), old_src,
7091 canon_reg (SET_SRC (sets[i].rtl), insn));
7093 /* The result of apply_change_group can be ignored; see
7096 validate_change (insn, &SET_SRC (sets[i].rtl),
7097 canon_reg (SET_SRC (sets[i].rtl), insn),
7099 apply_change_group ();
7103 /* If we previously found constant pool entries for
7104 constants and this is a constant, try making a
7105 pool entry. Put it in src_folded unless we already have done
7106 this since that is where it likely came from. */
7108 else if (constant_pool_entries_cost
7109 && CONSTANT_P (trial)
7110 && ! (GET_CODE (trial) == CONST
7111 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
7113 || (GET_CODE (src_folded) != MEM
7114 && ! src_folded_force_flag))
7115 && GET_MODE_CLASS (mode) != MODE_CC
7116 && mode != VOIDmode)
7118 src_folded_force_flag = 1;
7120 src_folded_cost = constant_pool_entries_cost;
7124 src = SET_SRC (sets[i].rtl);
7126 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7127 However, there is an important exception: If both are registers
7128 that are not the head of their equivalence class, replace SET_SRC
7129 with the head of the class. If we do not do this, we will have
7130 both registers live over a portion of the basic block. This way,
7131 their lifetimes will likely abut instead of overlapping. */
7132 if (GET_CODE (dest) == REG
7133 && REGNO_QTY_VALID_P (REGNO (dest))
7134 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
7135 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
7136 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7137 /* Don't do this if the original insn had a hard reg as
7139 && (GET_CODE (sets[i].src) != REG
7140 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
7141 /* We can't call canon_reg here because it won't do anything if
7142 SRC is a hard register. */
7144 int first = qty_first_reg[reg_qty[REGNO (src)]];
7146 = (first >= FIRST_PSEUDO_REGISTER
7147 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7149 /* We must use validate-change even for this, because this
7150 might be a special no-op instruction, suitable only to
7152 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7155 /* If we had a constant that is cheaper than what we are now
7156 setting SRC to, use that constant. We ignored it when we
7157 thought we could make this into a no-op. */
7158 if (src_const && COST (src_const) < COST (src)
7159 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7165 /* If we made a change, recompute SRC values. */
7166 if (src != sets[i].src)
7169 hash_arg_in_memory = 0;
7170 hash_arg_in_struct = 0;
7172 sets[i].src_hash = HASH (src, mode);
7173 sets[i].src_volatile = do_not_record;
7174 sets[i].src_in_memory = hash_arg_in_memory;
7175 sets[i].src_in_struct = hash_arg_in_struct;
7176 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7179 /* If this is a single SET, we are setting a register, and we have an
7180 equivalent constant, we want to add a REG_NOTE. We don't want
7181 to write a REG_EQUAL note for a constant pseudo since verifying that
7182 that pseudo hasn't been eliminated is a pain. Such a note also
7183 won't help anything.
7185 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7186 which can be created for a reference to a compile time computable
7187 entry in a jump table. */
7189 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7190 && GET_CODE (src_const) != REG
7191 && ! (GET_CODE (src_const) == CONST
7192 && GET_CODE (XEXP (src_const, 0)) == MINUS
7193 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
7194 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7196 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7198 /* Record the actual constant value in a REG_EQUAL note, making
7199 a new one if one does not already exist. */
7201 XEXP (tem, 0) = src_const;
7203 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7204 src_const, REG_NOTES (insn));
7206 /* If storing a constant value in a register that
7207 previously held the constant value 0,
7208 record this fact with a REG_WAS_0 note on this insn.
7210 Note that the *register* is required to have previously held 0,
7211 not just any register in the quantity and we must point to the
7212 insn that set that register to zero.
7214 Rather than track each register individually, we just see if
7215 the last set for this quantity was for this register. */
7217 if (REGNO_QTY_VALID_P (REGNO (dest))
7218 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
7220 /* See if we previously had a REG_WAS_0 note. */
7221 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7222 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
7224 if ((tem = single_set (const_insn)) != 0
7225 && rtx_equal_p (SET_DEST (tem), dest))
7228 XEXP (note, 0) = const_insn;
7230 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7237 /* Now deal with the destination. */
7239 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7241 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7242 to the MEM or REG within it. */
7243 while (GET_CODE (dest) == SIGN_EXTRACT
7244 || GET_CODE (dest) == ZERO_EXTRACT
7245 || GET_CODE (dest) == SUBREG
7246 || GET_CODE (dest) == STRICT_LOW_PART)
7248 sets[i].inner_dest_loc = &XEXP (dest, 0);
7249 dest = XEXP (dest, 0);
7252 sets[i].inner_dest = dest;
7254 if (GET_CODE (dest) == MEM)
7256 #ifdef PUSH_ROUNDING
7257 /* Stack pushes invalidate the stack pointer. */
7258 rtx addr = XEXP (dest, 0);
7259 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7260 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7261 && XEXP (addr, 0) == stack_pointer_rtx)
7262 invalidate (stack_pointer_rtx, Pmode);
7264 dest = fold_rtx (dest, insn);
7267 /* Compute the hash code of the destination now,
7268 before the effects of this instruction are recorded,
7269 since the register values used in the address computation
7270 are those before this instruction. */
7271 sets[i].dest_hash = HASH (dest, mode);
7273 /* Don't enter a bit-field in the hash table
7274 because the value in it after the store
7275 may not equal what was stored, due to truncation. */
7277 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7278 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7280 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7282 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7283 && GET_CODE (width) == CONST_INT
7284 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7285 && ! (INTVAL (src_const)
7286 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7287 /* Exception: if the value is constant,
7288 and it won't be truncated, record it. */
7292 /* This is chosen so that the destination will be invalidated
7293 but no new value will be recorded.
7294 We must invalidate because sometimes constant
7295 values can be recorded for bitfields. */
7296 sets[i].src_elt = 0;
7297 sets[i].src_volatile = 1;
7303 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7305 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7307 PUT_CODE (insn, NOTE);
7308 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7309 NOTE_SOURCE_FILE (insn) = 0;
7310 cse_jumps_altered = 1;
7311 /* One less use of the label this insn used to jump to. */
7312 if (JUMP_LABEL (insn) != 0)
7313 --LABEL_NUSES (JUMP_LABEL (insn));
7314 /* No more processing for this set. */
7318 /* If this SET is now setting PC to a label, we know it used to
7319 be a conditional or computed branch. So we see if we can follow
7320 it. If it was a computed branch, delete it and re-emit. */
7321 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7325 /* If this is not in the format for a simple branch and
7326 we are the only SET in it, re-emit it. */
7327 if (! simplejump_p (insn) && n_sets == 1)
7329 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7330 JUMP_LABEL (new) = XEXP (src, 0);
7331 LABEL_NUSES (XEXP (src, 0))++;
7336 /* Otherwise, force rerecognition, since it probably had
7337 a different pattern before.
7338 This shouldn't really be necessary, since whatever
7339 changed the source value above should have done this.
7340 Until the right place is found, might as well do this here. */
7341 INSN_CODE (insn) = -1;
7343 /* Now that we've converted this jump to an unconditional jump,
7344 there is dead code after it. Delete the dead code until we
7345 reach a BARRIER, the end of the function, or a label. Do
7346 not delete NOTEs except for NOTE_INSN_DELETED since later
7347 phases assume these notes are retained. */
7351 while (NEXT_INSN (p) != 0
7352 && GET_CODE (NEXT_INSN (p)) != BARRIER
7353 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7355 if (GET_CODE (NEXT_INSN (p)) != NOTE
7356 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7357 delete_insn (NEXT_INSN (p));
7362 /* If we don't have a BARRIER immediately after INSN, put one there.
7363 Much code assumes that there are no NOTEs between a JUMP_INSN and
7366 if (NEXT_INSN (insn) == 0
7367 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7368 emit_barrier_before (NEXT_INSN (insn));
7370 /* We might have two BARRIERs separated by notes. Delete the second
7373 if (p != insn && NEXT_INSN (p) != 0
7374 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7375 delete_insn (NEXT_INSN (p));
7377 cse_jumps_altered = 1;
7381 /* If destination is volatile, invalidate it and then do no further
7382 processing for this assignment. */
7384 else if (do_not_record)
7386 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7387 || GET_CODE (dest) == MEM)
7388 invalidate (dest, VOIDmode);
7389 else if (GET_CODE (dest) == STRICT_LOW_PART
7390 || GET_CODE (dest) == ZERO_EXTRACT)
7391 invalidate (XEXP (dest, 0), GET_MODE (dest));
7395 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7396 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7399 /* If setting CC0, record what it was set to, or a constant, if it
7400 is equivalent to a constant. If it is being set to a floating-point
7401 value, make a COMPARE with the appropriate constant of 0. If we
7402 don't do this, later code can interpret this as a test against
7403 const0_rtx, which can cause problems if we try to put it into an
7404 insn as a floating-point operand. */
7405 if (dest == cc0_rtx)
7407 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7408 this_insn_cc0_mode = mode;
7409 if (FLOAT_MODE_P (mode))
7410 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7416 /* Now enter all non-volatile source expressions in the hash table
7417 if they are not already present.
7418 Record their equivalence classes in src_elt.
7419 This way we can insert the corresponding destinations into
7420 the same classes even if the actual sources are no longer in them
7421 (having been invalidated). */
7423 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7424 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7426 register struct table_elt *elt;
7427 register struct table_elt *classp = sets[0].src_elt;
7428 rtx dest = SET_DEST (sets[0].rtl);
7429 enum machine_mode eqvmode = GET_MODE (dest);
7431 if (GET_CODE (dest) == STRICT_LOW_PART)
7433 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7436 if (insert_regs (src_eqv, classp, 0))
7438 rehash_using_reg (src_eqv);
7439 src_eqv_hash = HASH (src_eqv, eqvmode);
7441 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7442 elt->in_memory = src_eqv_in_memory;
7443 elt->in_struct = src_eqv_in_struct;
7446 /* Check to see if src_eqv_elt is the same as a set source which
7447 does not yet have an elt, and if so set the elt of the set source
7449 for (i = 0; i < n_sets; i++)
7450 if (sets[i].rtl && sets[i].src_elt == 0
7451 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7452 sets[i].src_elt = src_eqv_elt;
7455 for (i = 0; i < n_sets; i++)
7456 if (sets[i].rtl && ! sets[i].src_volatile
7457 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7459 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7461 /* REG_EQUAL in setting a STRICT_LOW_PART
7462 gives an equivalent for the entire destination register,
7463 not just for the subreg being stored in now.
7464 This is a more interesting equivalence, so we arrange later
7465 to treat the entire reg as the destination. */
7466 sets[i].src_elt = src_eqv_elt;
7467 sets[i].src_hash = src_eqv_hash;
7471 /* Insert source and constant equivalent into hash table, if not
7473 register struct table_elt *classp = src_eqv_elt;
7474 register rtx src = sets[i].src;
7475 register rtx dest = SET_DEST (sets[i].rtl);
7476 enum machine_mode mode
7477 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7479 if (sets[i].src_elt == 0)
7481 register struct table_elt *elt;
7483 /* Note that these insert_regs calls cannot remove
7484 any of the src_elt's, because they would have failed to
7485 match if not still valid. */
7486 if (insert_regs (src, classp, 0))
7488 rehash_using_reg (src);
7489 sets[i].src_hash = HASH (src, mode);
7491 elt = insert (src, classp, sets[i].src_hash, mode);
7492 elt->in_memory = sets[i].src_in_memory;
7493 elt->in_struct = sets[i].src_in_struct;
7494 sets[i].src_elt = classp = elt;
7497 if (sets[i].src_const && sets[i].src_const_elt == 0
7498 && src != sets[i].src_const
7499 && ! rtx_equal_p (sets[i].src_const, src))
7500 sets[i].src_elt = insert (sets[i].src_const, classp,
7501 sets[i].src_const_hash, mode);
7504 else if (sets[i].src_elt == 0)
7505 /* If we did not insert the source into the hash table (e.g., it was
7506 volatile), note the equivalence class for the REG_EQUAL value, if any,
7507 so that the destination goes into that class. */
7508 sets[i].src_elt = src_eqv_elt;
7510 invalidate_from_clobbers (x);
7512 /* Some registers are invalidated by subroutine calls. Memory is
7513 invalidated by non-constant calls. */
7515 if (GET_CODE (insn) == CALL_INSN)
7517 if (! CONST_CALL_P (insn))
7518 invalidate_memory ();
7519 invalidate_for_call ();
7522 /* Now invalidate everything set by this instruction.
7523 If a SUBREG or other funny destination is being set,
7524 sets[i].rtl is still nonzero, so here we invalidate the reg
7525 a part of which is being set. */
7527 for (i = 0; i < n_sets; i++)
7530 /* We can't use the inner dest, because the mode associated with
7531 a ZERO_EXTRACT is significant. */
7532 register rtx dest = SET_DEST (sets[i].rtl);
7534 /* Needed for registers to remove the register from its
7535 previous quantity's chain.
7536 Needed for memory if this is a nonvarying address, unless
7537 we have just done an invalidate_memory that covers even those. */
7538 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7539 || GET_CODE (dest) == MEM)
7540 invalidate (dest, VOIDmode);
7541 else if (GET_CODE (dest) == STRICT_LOW_PART
7542 || GET_CODE (dest) == ZERO_EXTRACT)
7543 invalidate (XEXP (dest, 0), GET_MODE (dest));
7546 /* Make sure registers mentioned in destinations
7547 are safe for use in an expression to be inserted.
7548 This removes from the hash table
7549 any invalid entry that refers to one of these registers.
7551 We don't care about the return value from mention_regs because
7552 we are going to hash the SET_DEST values unconditionally. */
7554 for (i = 0; i < n_sets; i++)
7558 rtx x = SET_DEST (sets[i].rtl);
7560 if (GET_CODE (x) != REG)
7564 /* We used to rely on all references to a register becoming
7565 inaccessible when a register changes to a new quantity,
7566 since that changes the hash code. However, that is not
7567 safe, since after NBUCKETS new quantities we get a
7568 hash 'collision' of a register with its own invalid
7569 entries. And since SUBREGs have been changed not to
7570 change their hash code with the hash code of the register,
7571 it wouldn't work any longer at all. So we have to check
7572 for any invalid references lying around now.
7573 This code is similar to the REG case in mention_regs,
7574 but it knows that reg_tick has been incremented, and
7575 it leaves reg_in_table as -1 . */
7576 register int regno = REGNO (x);
7577 register int endregno
7578 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
7579 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
7582 for (i = regno; i < endregno; i++)
7584 if (reg_in_table[i] >= 0)
7586 remove_invalid_refs (i);
7587 reg_in_table[i] = -1;
7594 /* We may have just removed some of the src_elt's from the hash table.
7595 So replace each one with the current head of the same class. */
7597 for (i = 0; i < n_sets; i++)
7600 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7601 /* If elt was removed, find current head of same class,
7602 or 0 if nothing remains of that class. */
7604 register struct table_elt *elt = sets[i].src_elt;
7606 while (elt && elt->prev_same_value)
7607 elt = elt->prev_same_value;
7609 while (elt && elt->first_same_value == 0)
7610 elt = elt->next_same_value;
7611 sets[i].src_elt = elt ? elt->first_same_value : 0;
7615 /* Now insert the destinations into their equivalence classes. */
7617 for (i = 0; i < n_sets; i++)
7620 register rtx dest = SET_DEST (sets[i].rtl);
7621 rtx inner_dest = sets[i].inner_dest;
7622 register struct table_elt *elt;
7624 /* Don't record value if we are not supposed to risk allocating
7625 floating-point values in registers that might be wider than
7627 if ((flag_float_store
7628 && GET_CODE (dest) == MEM
7629 && FLOAT_MODE_P (GET_MODE (dest)))
7630 /* Don't record BLKmode values, because we don't know the
7631 size of it, and can't be sure that other BLKmode values
7632 have the same or smaller size. */
7633 || GET_MODE (dest) == BLKmode
7634 /* Don't record values of destinations set inside a libcall block
7635 since we might delete the libcall. Things should have been set
7636 up so we won't want to reuse such a value, but we play it safe
7639 /* If we didn't put a REG_EQUAL value or a source into the hash
7640 table, there is no point is recording DEST. */
7641 || sets[i].src_elt == 0
7642 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7643 or SIGN_EXTEND, don't record DEST since it can cause
7644 some tracking to be wrong.
7646 ??? Think about this more later. */
7647 || (GET_CODE (dest) == SUBREG
7648 && (GET_MODE_SIZE (GET_MODE (dest))
7649 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7650 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7651 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7654 /* STRICT_LOW_PART isn't part of the value BEING set,
7655 and neither is the SUBREG inside it.
7656 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7657 if (GET_CODE (dest) == STRICT_LOW_PART)
7658 dest = SUBREG_REG (XEXP (dest, 0));
7660 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7661 /* Registers must also be inserted into chains for quantities. */
7662 if (insert_regs (dest, sets[i].src_elt, 1))
7664 /* If `insert_regs' changes something, the hash code must be
7666 rehash_using_reg (dest);
7667 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7670 if (GET_CODE (inner_dest) == MEM
7671 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7672 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7673 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7674 Consider the case in which the address of the MEM is
7675 passed to a function, which alters the MEM. Then, if we
7676 later use Y instead of the MEM we'll miss the update. */
7677 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7679 elt = insert (dest, sets[i].src_elt,
7680 sets[i].dest_hash, GET_MODE (dest));
7682 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7683 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7684 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7689 /* This implicitly assumes a whole struct
7690 need not have MEM_IN_STRUCT_P.
7691 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7692 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7693 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7696 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7697 narrower than M2, and both M1 and M2 are the same number of words,
7698 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7699 make that equivalence as well.
7701 However, BAR may have equivalences for which gen_lowpart_if_possible
7702 will produce a simpler value than gen_lowpart_if_possible applied to
7703 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7704 BAR's equivalences. If we don't get a simplified form, make
7705 the SUBREG. It will not be used in an equivalence, but will
7706 cause two similar assignments to be detected.
7708 Note the loop below will find SUBREG_REG (DEST) since we have
7709 already entered SRC and DEST of the SET in the table. */
7711 if (GET_CODE (dest) == SUBREG
7712 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7714 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7715 && (GET_MODE_SIZE (GET_MODE (dest))
7716 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7717 && sets[i].src_elt != 0)
7719 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7720 struct table_elt *elt, *classp = 0;
7722 for (elt = sets[i].src_elt->first_same_value; elt;
7723 elt = elt->next_same_value)
7727 struct table_elt *src_elt;
7729 /* Ignore invalid entries. */
7730 if (GET_CODE (elt->exp) != REG
7731 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7734 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7736 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7738 src_hash = HASH (new_src, new_mode);
7739 src_elt = lookup (new_src, src_hash, new_mode);
7741 /* Put the new source in the hash table is if isn't
7745 if (insert_regs (new_src, classp, 0))
7747 rehash_using_reg (new_src);
7748 src_hash = HASH (new_src, new_mode);
7750 src_elt = insert (new_src, classp, src_hash, new_mode);
7751 src_elt->in_memory = elt->in_memory;
7752 src_elt->in_struct = elt->in_struct;
7754 else if (classp && classp != src_elt->first_same_value)
7755 /* Show that two things that we've seen before are
7756 actually the same. */
7757 merge_equiv_classes (src_elt, classp);
7759 classp = src_elt->first_same_value;
7760 /* Ignore invalid entries. */
7762 && GET_CODE (classp->exp) != REG
7763 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7764 classp = classp->next_same_value;
7769 /* Special handling for (set REG0 REG1)
7770 where REG0 is the "cheapest", cheaper than REG1.
7771 After cse, REG1 will probably not be used in the sequel,
7772 so (if easily done) change this insn to (set REG1 REG0) and
7773 replace REG1 with REG0 in the previous insn that computed their value.
7774 Then REG1 will become a dead store and won't cloud the situation
7775 for later optimizations.
7777 Do not make this change if REG1 is a hard register, because it will
7778 then be used in the sequel and we may be changing a two-operand insn
7779 into a three-operand insn.
7781 Also do not do this if we are operating on a copy of INSN. */
7783 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7784 && NEXT_INSN (PREV_INSN (insn)) == insn
7785 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7786 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7787 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7788 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7789 == REGNO (SET_DEST (sets[0].rtl))))
7791 rtx prev = PREV_INSN (insn);
7792 while (prev && GET_CODE (prev) == NOTE)
7793 prev = PREV_INSN (prev);
7795 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7796 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7798 rtx dest = SET_DEST (sets[0].rtl);
7799 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7801 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7802 validate_change (insn, & SET_DEST (sets[0].rtl),
7803 SET_SRC (sets[0].rtl), 1);
7804 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7805 apply_change_group ();
7807 /* If REG1 was equivalent to a constant, REG0 is not. */
7809 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7811 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7812 any REG_WAS_0 note on INSN to PREV. */
7813 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7815 remove_note (prev, note);
7817 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7820 remove_note (insn, note);
7821 XEXP (note, 1) = REG_NOTES (prev);
7822 REG_NOTES (prev) = note;
7825 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7826 then we must delete it, because the value in REG0 has changed. */
7827 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7828 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7829 remove_note (insn, note);
7833 /* If this is a conditional jump insn, record any known equivalences due to
7834 the condition being tested. */
7836 last_jump_equiv_class = 0;
7837 if (GET_CODE (insn) == JUMP_INSN
7838 && n_sets == 1 && GET_CODE (x) == SET
7839 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7840 record_jump_equiv (insn, 0);
7843 /* If the previous insn set CC0 and this insn no longer references CC0,
7844 delete the previous insn. Here we use the fact that nothing expects CC0
7845 to be valid over an insn, which is true until the final pass. */
7846 if (prev_insn && GET_CODE (prev_insn) == INSN
7847 && (tem = single_set (prev_insn)) != 0
7848 && SET_DEST (tem) == cc0_rtx
7849 && ! reg_mentioned_p (cc0_rtx, x))
7851 PUT_CODE (prev_insn, NOTE);
7852 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7853 NOTE_SOURCE_FILE (prev_insn) = 0;
7856 prev_insn_cc0 = this_insn_cc0;
7857 prev_insn_cc0_mode = this_insn_cc0_mode;
7863 /* Remove from the hash table all expressions that reference memory. */
7865 invalidate_memory ()
7868 register struct table_elt *p, *next;
7870 for (i = 0; i < NBUCKETS; i++)
7871 for (p = table[i]; p; p = next)
7873 next = p->next_same_hash;
7875 remove_from_table (p, i);
7879 /* XXX ??? The name of this function bears little resemblance to
7880 what this function actually does. FIXME. */
7882 note_mem_written (addr)
7885 /* Pushing or popping the stack invalidates just the stack pointer. */
7886 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7887 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7888 && GET_CODE (XEXP (addr, 0)) == REG
7889 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7891 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7892 reg_tick[STACK_POINTER_REGNUM]++;
7894 /* This should be *very* rare. */
7895 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7896 invalidate (stack_pointer_rtx, VOIDmode);
7902 /* Perform invalidation on the basis of everything about an insn
7903 except for invalidating the actual places that are SET in it.
7904 This includes the places CLOBBERed, and anything that might
7905 alias with something that is SET or CLOBBERed.
7907 X is the pattern of the insn. */
7910 invalidate_from_clobbers (x)
7913 if (GET_CODE (x) == CLOBBER)
7915 rtx ref = XEXP (x, 0);
7918 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7919 || GET_CODE (ref) == MEM)
7920 invalidate (ref, VOIDmode);
7921 else if (GET_CODE (ref) == STRICT_LOW_PART
7922 || GET_CODE (ref) == ZERO_EXTRACT)
7923 invalidate (XEXP (ref, 0), GET_MODE (ref));
7926 else if (GET_CODE (x) == PARALLEL)
7929 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7931 register rtx y = XVECEXP (x, 0, i);
7932 if (GET_CODE (y) == CLOBBER)
7934 rtx ref = XEXP (y, 0);
7935 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7936 || GET_CODE (ref) == MEM)
7937 invalidate (ref, VOIDmode);
7938 else if (GET_CODE (ref) == STRICT_LOW_PART
7939 || GET_CODE (ref) == ZERO_EXTRACT)
7940 invalidate (XEXP (ref, 0), GET_MODE (ref));
7946 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7947 and replace any registers in them with either an equivalent constant
7948 or the canonical form of the register. If we are inside an address,
7949 only do this if the address remains valid.
7951 OBJECT is 0 except when within a MEM in which case it is the MEM.
7953 Return the replacement for X. */
7956 cse_process_notes (x, object)
7960 enum rtx_code code = GET_CODE (x);
7961 char *fmt = GET_RTX_FORMAT (code);
7977 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7982 if (REG_NOTE_KIND (x) == REG_EQUAL)
7983 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7985 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7992 rtx new = cse_process_notes (XEXP (x, 0), object);
7993 /* We don't substitute VOIDmode constants into these rtx,
7994 since they would impede folding. */
7995 if (GET_MODE (new) != VOIDmode)
7996 validate_change (object, &XEXP (x, 0), new, 0);
8001 i = reg_qty[REGNO (x)];
8003 /* Return a constant or a constant register. */
8004 if (REGNO_QTY_VALID_P (REGNO (x))
8005 && qty_const[i] != 0
8006 && (CONSTANT_P (qty_const[i])
8007 || GET_CODE (qty_const[i]) == REG))
8009 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
8014 /* Otherwise, canonicalize this register. */
8015 return canon_reg (x, NULL_RTX);
8021 for (i = 0; i < GET_RTX_LENGTH (code); i++)
8023 validate_change (object, &XEXP (x, i),
8024 cse_process_notes (XEXP (x, i), object), 0);
8029 /* Find common subexpressions between the end test of a loop and the beginning
8030 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8032 Often we have a loop where an expression in the exit test is used
8033 in the body of the loop. For example "while (*p) *q++ = *p++;".
8034 Because of the way we duplicate the loop exit test in front of the loop,
8035 however, we don't detect that common subexpression. This will be caught
8036 when global cse is implemented, but this is a quite common case.
8038 This function handles the most common cases of these common expressions.
8039 It is called after we have processed the basic block ending with the
8040 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8041 jumps to a label used only once. */
8044 cse_around_loop (loop_start)
8049 struct table_elt *p;
8051 /* If the jump at the end of the loop doesn't go to the start, we don't
8053 for (insn = PREV_INSN (loop_start);
8054 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
8055 insn = PREV_INSN (insn))
8059 || GET_CODE (insn) != NOTE
8060 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
8063 /* If the last insn of the loop (the end test) was an NE comparison,
8064 we will interpret it as an EQ comparison, since we fell through
8065 the loop. Any equivalences resulting from that comparison are
8066 therefore not valid and must be invalidated. */
8067 if (last_jump_equiv_class)
8068 for (p = last_jump_equiv_class->first_same_value; p;
8069 p = p->next_same_value)
8071 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
8072 || (GET_CODE (p->exp) == SUBREG
8073 && GET_CODE (SUBREG_REG (p->exp)) == REG))
8074 invalidate (p->exp, VOIDmode);
8075 else if (GET_CODE (p->exp) == STRICT_LOW_PART
8076 || GET_CODE (p->exp) == ZERO_EXTRACT)
8077 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
8080 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8081 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8083 The only thing we do with SET_DEST is invalidate entries, so we
8084 can safely process each SET in order. It is slightly less efficient
8085 to do so, but we only want to handle the most common cases.
8087 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8088 These pseudos won't have valid entries in any of the tables indexed
8089 by register number, such as reg_qty. We avoid out-of-range array
8090 accesses by not processing any instructions created after cse started. */
8092 for (insn = NEXT_INSN (loop_start);
8093 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
8094 && INSN_UID (insn) < max_insn_uid
8095 && ! (GET_CODE (insn) == NOTE
8096 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
8097 insn = NEXT_INSN (insn))
8099 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8100 && (GET_CODE (PATTERN (insn)) == SET
8101 || GET_CODE (PATTERN (insn)) == CLOBBER))
8102 cse_set_around_loop (PATTERN (insn), insn, loop_start);
8103 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8104 && GET_CODE (PATTERN (insn)) == PARALLEL)
8105 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8106 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
8107 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
8108 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
8113 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8114 since they are done elsewhere. This function is called via note_stores. */
8117 invalidate_skipped_set (dest, set)
8121 enum rtx_code code = GET_CODE (dest);
8124 && ! note_mem_written (dest) /* If this is not a stack push ... */
8125 /* There are times when an address can appear varying and be a PLUS
8126 during this scan when it would be a fixed address were we to know
8127 the proper equivalences. So invalidate all memory if there is
8128 a BLKmode or nonscalar memory reference or a reference to a
8129 variable address. */
8130 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
8131 || cse_rtx_varies_p (XEXP (dest, 0))))
8133 invalidate_memory ();
8137 if (GET_CODE (set) == CLOBBER
8144 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
8145 invalidate (XEXP (dest, 0), GET_MODE (dest));
8146 else if (code == REG || code == SUBREG || code == MEM)
8147 invalidate (dest, VOIDmode);
8150 /* Invalidate all insns from START up to the end of the function or the
8151 next label. This called when we wish to CSE around a block that is
8152 conditionally executed. */
8155 invalidate_skipped_block (start)
8160 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
8161 insn = NEXT_INSN (insn))
8163 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
8166 if (GET_CODE (insn) == CALL_INSN)
8168 if (! CONST_CALL_P (insn))
8169 invalidate_memory ();
8170 invalidate_for_call ();
8173 invalidate_from_clobbers (PATTERN (insn));
8174 note_stores (PATTERN (insn), invalidate_skipped_set);
8178 /* Used for communication between the following two routines; contains a
8179 value to be checked for modification. */
8181 static rtx cse_check_loop_start_value;
8183 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8184 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8187 cse_check_loop_start (x, set)
8189 rtx set ATTRIBUTE_UNUSED;
8191 if (cse_check_loop_start_value == 0
8192 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8195 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8196 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8197 cse_check_loop_start_value = 0;
8200 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8201 a loop that starts with the label at LOOP_START.
8203 If X is a SET, we see if its SET_SRC is currently in our hash table.
8204 If so, we see if it has a value equal to some register used only in the
8205 loop exit code (as marked by jump.c).
8207 If those two conditions are true, we search backwards from the start of
8208 the loop to see if that same value was loaded into a register that still
8209 retains its value at the start of the loop.
8211 If so, we insert an insn after the load to copy the destination of that
8212 load into the equivalent register and (try to) replace our SET_SRC with that
8215 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8218 cse_set_around_loop (x, insn, loop_start)
8223 struct table_elt *src_elt;
8225 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8226 are setting PC or CC0 or whose SET_SRC is already a register. */
8227 if (GET_CODE (x) == SET
8228 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8229 && GET_CODE (SET_SRC (x)) != REG)
8231 src_elt = lookup (SET_SRC (x),
8232 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8233 GET_MODE (SET_DEST (x)));
8236 for (src_elt = src_elt->first_same_value; src_elt;
8237 src_elt = src_elt->next_same_value)
8238 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8239 && COST (src_elt->exp) < COST (SET_SRC (x)))
8243 /* Look for an insn in front of LOOP_START that sets
8244 something in the desired mode to SET_SRC (x) before we hit
8245 a label or CALL_INSN. */
8247 for (p = prev_nonnote_insn (loop_start);
8248 p && GET_CODE (p) != CALL_INSN
8249 && GET_CODE (p) != CODE_LABEL;
8250 p = prev_nonnote_insn (p))
8251 if ((set = single_set (p)) != 0
8252 && GET_CODE (SET_DEST (set)) == REG
8253 && GET_MODE (SET_DEST (set)) == src_elt->mode
8254 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8256 /* We now have to ensure that nothing between P
8257 and LOOP_START modified anything referenced in
8258 SET_SRC (x). We know that nothing within the loop
8259 can modify it, or we would have invalidated it in
8263 cse_check_loop_start_value = SET_SRC (x);
8264 for (q = p; q != loop_start; q = NEXT_INSN (q))
8265 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8266 note_stores (PATTERN (q), cse_check_loop_start);
8268 /* If nothing was changed and we can replace our
8269 SET_SRC, add an insn after P to copy its destination
8270 to what we will be replacing SET_SRC with. */
8271 if (cse_check_loop_start_value
8272 && validate_change (insn, &SET_SRC (x),
8275 /* If this creates new pseudos, this is unsafe,
8276 because the regno of new pseudo is unsuitable
8277 to index into reg_qty when cse_insn processes
8278 the new insn. Therefore, if a new pseudo was
8279 created, discard this optimization. */
8280 int nregs = max_reg_num ();
8282 = gen_move_insn (src_elt->exp, SET_DEST (set));
8283 if (nregs != max_reg_num ())
8285 if (! validate_change (insn, &SET_SRC (x),
8290 emit_insn_after (move, p);
8297 /* Now invalidate anything modified by X. */
8298 note_mem_written (SET_DEST (x));
8300 /* See comment on similar code in cse_insn for explanation of these tests. */
8301 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8302 || GET_CODE (SET_DEST (x)) == MEM)
8303 invalidate (SET_DEST (x), VOIDmode);
8304 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8305 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8306 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8309 /* Find the end of INSN's basic block and return its range,
8310 the total number of SETs in all the insns of the block, the last insn of the
8311 block, and the branch path.
8313 The branch path indicates which branches should be followed. If a non-zero
8314 path size is specified, the block should be rescanned and a different set
8315 of branches will be taken. The branch path is only used if
8316 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8318 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8319 used to describe the block. It is filled in with the information about
8320 the current block. The incoming structure's branch path, if any, is used
8321 to construct the output branch path. */
8324 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8326 struct cse_basic_block_data *data;
8333 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8334 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8335 int path_size = data->path_size;
8339 /* Update the previous branch path, if any. If the last branch was
8340 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8341 shorten the path by one and look at the previous branch. We know that
8342 at least one branch must have been taken if PATH_SIZE is non-zero. */
8343 while (path_size > 0)
8345 if (data->path[path_size - 1].status != NOT_TAKEN)
8347 data->path[path_size - 1].status = NOT_TAKEN;
8354 /* Scan to end of this basic block. */
8355 while (p && GET_CODE (p) != CODE_LABEL)
8357 /* Don't cse out the end of a loop. This makes a difference
8358 only for the unusual loops that always execute at least once;
8359 all other loops have labels there so we will stop in any case.
8360 Cse'ing out the end of the loop is dangerous because it
8361 might cause an invariant expression inside the loop
8362 to be reused after the end of the loop. This would make it
8363 hard to move the expression out of the loop in loop.c,
8364 especially if it is one of several equivalent expressions
8365 and loop.c would like to eliminate it.
8367 If we are running after loop.c has finished, we can ignore
8368 the NOTE_INSN_LOOP_END. */
8370 if (! after_loop && GET_CODE (p) == NOTE
8371 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8374 /* Don't cse over a call to setjmp; on some machines (eg vax)
8375 the regs restored by the longjmp come from
8376 a later time than the setjmp. */
8377 if (GET_CODE (p) == NOTE
8378 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8381 /* A PARALLEL can have lots of SETs in it,
8382 especially if it is really an ASM_OPERANDS. */
8383 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8384 && GET_CODE (PATTERN (p)) == PARALLEL)
8385 nsets += XVECLEN (PATTERN (p), 0);
8386 else if (GET_CODE (p) != NOTE)
8389 /* Ignore insns made by CSE; they cannot affect the boundaries of
8392 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8393 high_cuid = INSN_CUID (p);
8394 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8395 low_cuid = INSN_CUID (p);
8397 /* See if this insn is in our branch path. If it is and we are to
8399 if (path_entry < path_size && data->path[path_entry].branch == p)
8401 if (data->path[path_entry].status != NOT_TAKEN)
8404 /* Point to next entry in path, if any. */
8408 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8409 was specified, we haven't reached our maximum path length, there are
8410 insns following the target of the jump, this is the only use of the
8411 jump label, and the target label is preceded by a BARRIER.
8413 Alternatively, we can follow the jump if it branches around a
8414 block of code and there are no other branches into the block.
8415 In this case invalidate_skipped_block will be called to invalidate any
8416 registers set in the block when following the jump. */
8418 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8419 && GET_CODE (p) == JUMP_INSN
8420 && GET_CODE (PATTERN (p)) == SET
8421 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8422 && JUMP_LABEL (p) != 0
8423 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8424 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8426 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8427 if ((GET_CODE (q) != NOTE
8428 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8429 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8430 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8433 /* If we ran into a BARRIER, this code is an extension of the
8434 basic block when the branch is taken. */
8435 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8437 /* Don't allow ourself to keep walking around an
8438 always-executed loop. */
8439 if (next_real_insn (q) == next)
8445 /* Similarly, don't put a branch in our path more than once. */
8446 for (i = 0; i < path_entry; i++)
8447 if (data->path[i].branch == p)
8450 if (i != path_entry)
8453 data->path[path_entry].branch = p;
8454 data->path[path_entry++].status = TAKEN;
8456 /* This branch now ends our path. It was possible that we
8457 didn't see this branch the last time around (when the
8458 insn in front of the target was a JUMP_INSN that was
8459 turned into a no-op). */
8460 path_size = path_entry;
8463 /* Mark block so we won't scan it again later. */
8464 PUT_MODE (NEXT_INSN (p), QImode);
8466 /* Detect a branch around a block of code. */
8467 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8471 if (next_real_insn (q) == next)
8477 for (i = 0; i < path_entry; i++)
8478 if (data->path[i].branch == p)
8481 if (i != path_entry)
8484 /* This is no_labels_between_p (p, q) with an added check for
8485 reaching the end of a function (in case Q precedes P). */
8486 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8487 if (GET_CODE (tmp) == CODE_LABEL)
8492 data->path[path_entry].branch = p;
8493 data->path[path_entry++].status = AROUND;
8495 path_size = path_entry;
8498 /* Mark block so we won't scan it again later. */
8499 PUT_MODE (NEXT_INSN (p), QImode);
8506 data->low_cuid = low_cuid;
8507 data->high_cuid = high_cuid;
8508 data->nsets = nsets;
8511 /* If all jumps in the path are not taken, set our path length to zero
8512 so a rescan won't be done. */
8513 for (i = path_size - 1; i >= 0; i--)
8514 if (data->path[i].status != NOT_TAKEN)
8518 data->path_size = 0;
8520 data->path_size = path_size;
8522 /* End the current branch path. */
8523 data->path[path_size].branch = 0;
8526 /* Perform cse on the instructions of a function.
8527 F is the first instruction.
8528 NREGS is one plus the highest pseudo-reg number used in the instruction.
8530 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8531 (only if -frerun-cse-after-loop).
8533 Returns 1 if jump_optimize should be redone due to simplifications
8534 in conditional jump instructions. */
8537 cse_main (f, nregs, after_loop, file)
8543 struct cse_basic_block_data val;
8544 register rtx insn = f;
8547 cse_jumps_altered = 0;
8548 recorded_label_ref = 0;
8549 constant_pool_entries_cost = 0;
8553 init_alias_analysis ();
8557 max_insn_uid = get_max_uid ();
8559 all_minus_one = (int *) alloca (nregs * sizeof (int));
8560 consec_ints = (int *) alloca (nregs * sizeof (int));
8562 for (i = 0; i < nregs; i++)
8564 all_minus_one[i] = -1;
8568 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8569 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8570 reg_qty = (int *) alloca (nregs * sizeof (int));
8571 reg_in_table = (int *) alloca (nregs * sizeof (int));
8572 reg_tick = (int *) alloca (nregs * sizeof (int));
8574 #ifdef LOAD_EXTEND_OP
8576 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8577 and change the code and mode as appropriate. */
8578 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8581 /* Discard all the free elements of the previous function
8582 since they are allocated in the temporarily obstack. */
8583 bzero ((char *) table, sizeof table);
8584 free_element_chain = 0;
8585 n_elements_made = 0;
8587 /* Find the largest uid. */
8589 max_uid = get_max_uid ();
8590 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8591 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8593 /* Compute the mapping from uids to cuids.
8594 CUIDs are numbers assigned to insns, like uids,
8595 except that cuids increase monotonically through the code.
8596 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8597 between two insns is not affected by -g. */
8599 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8601 if (GET_CODE (insn) != NOTE
8602 || NOTE_LINE_NUMBER (insn) < 0)
8603 INSN_CUID (insn) = ++i;
8605 /* Give a line number note the same cuid as preceding insn. */
8606 INSN_CUID (insn) = i;
8609 /* Initialize which registers are clobbered by calls. */
8611 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8613 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8614 if ((call_used_regs[i]
8615 /* Used to check !fixed_regs[i] here, but that isn't safe;
8616 fixed regs are still call-clobbered, and sched can get
8617 confused if they can "live across calls".
8619 The frame pointer is always preserved across calls. The arg
8620 pointer is if it is fixed. The stack pointer usually is, unless
8621 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8622 will be present. If we are generating PIC code, the PIC offset
8623 table register is preserved across calls. */
8625 && i != STACK_POINTER_REGNUM
8626 && i != FRAME_POINTER_REGNUM
8627 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8628 && i != HARD_FRAME_POINTER_REGNUM
8630 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8631 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8633 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8634 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8638 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8640 /* Loop over basic blocks.
8641 Compute the maximum number of qty's needed for each basic block
8642 (which is 2 for each SET). */
8646 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8647 flag_cse_skip_blocks);
8649 /* If this basic block was already processed or has no sets, skip it. */
8650 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8652 PUT_MODE (insn, VOIDmode);
8653 insn = (val.last ? NEXT_INSN (val.last) : 0);
8658 cse_basic_block_start = val.low_cuid;
8659 cse_basic_block_end = val.high_cuid;
8660 max_qty = val.nsets * 2;
8663 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
8664 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8667 /* Make MAX_QTY bigger to give us room to optimize
8668 past the end of this basic block, if that should prove useful. */
8674 /* If this basic block is being extended by following certain jumps,
8675 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8676 Otherwise, we start after this basic block. */
8677 if (val.path_size > 0)
8678 cse_basic_block (insn, val.last, val.path, 0);
8681 int old_cse_jumps_altered = cse_jumps_altered;
8684 /* When cse changes a conditional jump to an unconditional
8685 jump, we want to reprocess the block, since it will give
8686 us a new branch path to investigate. */
8687 cse_jumps_altered = 0;
8688 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8689 if (cse_jumps_altered == 0
8690 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8693 cse_jumps_altered |= old_cse_jumps_altered;
8701 /* Tell refers_to_mem_p that qty_const info is not available. */
8704 if (max_elements_made < n_elements_made)
8705 max_elements_made = n_elements_made;
8707 return cse_jumps_altered || recorded_label_ref;
8710 /* Process a single basic block. FROM and TO and the limits of the basic
8711 block. NEXT_BRANCH points to the branch path when following jumps or
8712 a null path when not following jumps.
8714 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8715 loop. This is true when we are being called for the last time on a
8716 block and this CSE pass is before loop.c. */
8719 cse_basic_block (from, to, next_branch, around_loop)
8720 register rtx from, to;
8721 struct branch_path *next_branch;
8726 rtx libcall_insn = NULL_RTX;
8729 /* Each of these arrays is undefined before max_reg, so only allocate
8730 the space actually needed and adjust the start below. */
8732 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8733 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8734 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8735 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8736 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8738 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8739 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8740 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8742 qty_first_reg -= max_reg;
8743 qty_last_reg -= max_reg;
8744 qty_mode -= max_reg;
8745 qty_const -= max_reg;
8746 qty_const_insn -= max_reg;
8747 qty_comparison_code -= max_reg;
8748 qty_comparison_qty -= max_reg;
8749 qty_comparison_const -= max_reg;
8753 /* TO might be a label. If so, protect it from being deleted. */
8754 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8757 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8759 register enum rtx_code code = GET_CODE (insn);
8761 struct table_elt *p;
8763 /* If we have processed 1,000 insns, flush the hash table to
8764 avoid extreme quadratic behavior. We must not include NOTEs
8765 in the count since there may be more or them when generating
8766 debugging information. If we clear the table at different
8767 times, code generated with -g -O might be different than code
8768 generated with -O but not -g.
8770 ??? This is a real kludge and needs to be done some other way.
8772 if (code != NOTE && num_insns++ > 1000)
8774 for (i = 0; i < NBUCKETS; i++)
8775 for (p = table[i]; p; p = table[i])
8777 /* Note that invalidate can remove elements
8778 after P in the current hash chain. */
8779 if (GET_CODE (p->exp) == REG)
8780 invalidate (p->exp, p->mode);
8782 remove_from_table (p, i);
8788 /* See if this is a branch that is part of the path. If so, and it is
8789 to be taken, do so. */
8790 if (next_branch->branch == insn)
8792 enum taken status = next_branch++->status;
8793 if (status != NOT_TAKEN)
8795 if (status == TAKEN)
8796 record_jump_equiv (insn, 1);
8798 invalidate_skipped_block (NEXT_INSN (insn));
8800 /* Set the last insn as the jump insn; it doesn't affect cc0.
8801 Then follow this branch. */
8806 insn = JUMP_LABEL (insn);
8811 if (GET_MODE (insn) == QImode)
8812 PUT_MODE (insn, VOIDmode);
8814 if (GET_RTX_CLASS (code) == 'i')
8818 /* Process notes first so we have all notes in canonical forms when
8819 looking for duplicate operations. */
8821 if (REG_NOTES (insn))
8822 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8824 /* Track when we are inside in LIBCALL block. Inside such a block,
8825 we do not want to record destinations. The last insn of a
8826 LIBCALL block is not considered to be part of the block, since
8827 its destination is the result of the block and hence should be
8830 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
8831 libcall_insn = XEXP (p, 0);
8832 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8833 libcall_insn = NULL_RTX;
8835 cse_insn (insn, libcall_insn);
8838 /* If INSN is now an unconditional jump, skip to the end of our
8839 basic block by pretending that we just did the last insn in the
8840 basic block. If we are jumping to the end of our block, show
8841 that we can have one usage of TO. */
8843 if (simplejump_p (insn))
8848 if (JUMP_LABEL (insn) == to)
8851 /* Maybe TO was deleted because the jump is unconditional.
8852 If so, there is nothing left in this basic block. */
8853 /* ??? Perhaps it would be smarter to set TO
8854 to whatever follows this insn,
8855 and pretend the basic block had always ended here. */
8856 if (INSN_DELETED_P (to))
8859 insn = PREV_INSN (to);
8862 /* See if it is ok to keep on going past the label
8863 which used to end our basic block. Remember that we incremented
8864 the count of that label, so we decrement it here. If we made
8865 a jump unconditional, TO_USAGE will be one; in that case, we don't
8866 want to count the use in that jump. */
8868 if (to != 0 && NEXT_INSN (insn) == to
8869 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8871 struct cse_basic_block_data val;
8874 insn = NEXT_INSN (to);
8876 if (LABEL_NUSES (to) == 0)
8877 insn = delete_insn (to);
8879 /* If TO was the last insn in the function, we are done. */
8883 /* If TO was preceded by a BARRIER we are done with this block
8884 because it has no continuation. */
8885 prev = prev_nonnote_insn (to);
8886 if (prev && GET_CODE (prev) == BARRIER)
8889 /* Find the end of the following block. Note that we won't be
8890 following branches in this case. */
8893 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8895 /* If the tables we allocated have enough space left
8896 to handle all the SETs in the next basic block,
8897 continue through it. Otherwise, return,
8898 and that block will be scanned individually. */
8899 if (val.nsets * 2 + next_qty > max_qty)
8902 cse_basic_block_start = val.low_cuid;
8903 cse_basic_block_end = val.high_cuid;
8906 /* Prevent TO from being deleted if it is a label. */
8907 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8910 /* Back up so we process the first insn in the extension. */
8911 insn = PREV_INSN (insn);
8915 if (next_qty > max_qty)
8918 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8919 the previous insn is the only insn that branches to the head of a loop,
8920 we can cse into the loop. Don't do this if we changed the jump
8921 structure of a loop unless we aren't going to be following jumps. */
8923 if ((cse_jumps_altered == 0
8924 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8925 && around_loop && to != 0
8926 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8927 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8928 && JUMP_LABEL (PREV_INSN (to)) != 0
8929 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8930 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8932 return to ? NEXT_INSN (to) : 0;
8935 /* Count the number of times registers are used (not set) in X.
8936 COUNTS is an array in which we accumulate the count, INCR is how much
8937 we count each register usage.
8939 Don't count a usage of DEST, which is the SET_DEST of a SET which
8940 contains X in its SET_SRC. This is because such a SET does not
8941 modify the liveness of DEST. */
8944 count_reg_usage (x, counts, dest, incr)
8957 switch (code = GET_CODE (x))
8961 counts[REGNO (x)] += incr;
8974 /* If we are clobbering a MEM, mark any registers inside the address
8976 if (GET_CODE (XEXP (x, 0)) == MEM)
8977 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
8981 /* Unless we are setting a REG, count everything in SET_DEST. */
8982 if (GET_CODE (SET_DEST (x)) != REG)
8983 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8985 /* If SRC has side-effects, then we can't delete this insn, so the
8986 usage of SET_DEST inside SRC counts.
8988 ??? Strictly-speaking, we might be preserving this insn
8989 because some other SET has side-effects, but that's hard
8990 to do and can't happen now. */
8991 count_reg_usage (SET_SRC (x), counts,
8992 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8997 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8999 /* ... falls through ... */
9002 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
9004 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9007 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
9012 if (REG_NOTE_KIND (x) == REG_EQUAL
9013 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
9014 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
9015 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
9022 fmt = GET_RTX_FORMAT (code);
9023 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9026 count_reg_usage (XEXP (x, i), counts, dest, incr);
9027 else if (fmt[i] == 'E')
9028 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9029 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
9033 /* Scan all the insns and delete any that are dead; i.e., they store a register
9034 that is never used or they copy a register to itself.
9036 This is used to remove insns made obviously dead by cse, loop or other
9037 optimizations. It improves the heuristics in loop since it won't try to
9038 move dead invariants out of loops or make givs for dead quantities. The
9039 remaining passes of the compilation are also sped up. */
9042 delete_trivially_dead_insns (insns, nreg)
9046 int *counts = (int *) alloca (nreg * sizeof (int));
9052 int in_libcall = 0, dead_libcall = 0;
9054 /* First count the number of times each register is used. */
9055 bzero ((char *) counts, sizeof (int) * nreg);
9056 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9057 count_reg_usage (insn, counts, NULL_RTX, 1);
9059 /* Go from the last insn to the first and delete insns that only set unused
9060 registers or copy a register to itself. As we delete an insn, remove
9061 usage counts for registers it uses. */
9062 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
9067 prev = prev_real_insn (insn);
9069 /* Don't delete any insns that are part of a libcall block unless
9070 we can delete the whole libcall block.
9072 Flow or loop might get confused if we did that. Remember
9073 that we are scanning backwards. */
9074 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9080 /* See if there's a REG_EQUAL note on this insn and try to
9081 replace the source with the REG_EQUAL expression.
9083 We assume that insns with REG_RETVALs can only be reg->reg
9084 copies at this point. */
9085 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
9088 rtx set = single_set (insn);
9090 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
9093 find_reg_note (insn, REG_RETVAL, NULL_RTX));
9098 else if (in_libcall)
9099 live_insn = ! dead_libcall;
9100 else if (GET_CODE (PATTERN (insn)) == SET)
9102 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
9103 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
9107 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
9108 && ! side_effects_p (SET_SRC (PATTERN (insn)))
9109 && ((tem = next_nonnote_insn (insn)) == 0
9110 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9111 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9114 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
9115 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
9116 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
9117 || side_effects_p (SET_SRC (PATTERN (insn))))
9120 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9121 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9123 rtx elt = XVECEXP (PATTERN (insn), 0, i);
9125 if (GET_CODE (elt) == SET)
9127 if (GET_CODE (SET_DEST (elt)) == REG
9128 && SET_DEST (elt) == SET_SRC (elt))
9132 else if (GET_CODE (SET_DEST (elt)) == CC0
9133 && ! side_effects_p (SET_SRC (elt))
9134 && ((tem = next_nonnote_insn (insn)) == 0
9135 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9136 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9139 else if (GET_CODE (SET_DEST (elt)) != REG
9140 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
9141 || counts[REGNO (SET_DEST (elt))] != 0
9142 || side_effects_p (SET_SRC (elt)))
9145 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
9151 /* If this is a dead insn, delete it and show registers in it aren't
9156 count_reg_usage (insn, counts, NULL_RTX, -1);
9160 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))