1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 /* The basic idea of common subexpression elimination is to go
39 through the code, keeping a record of expressions that would
40 have the same value at the current scan point, and replacing
41 expressions encountered with the cheapest equivalent expression.
43 It is too complicated to keep track of the different possibilities
44 when control paths merge; so, at each label, we forget all that is
45 known and start fresh. This can be described as processing each
46 basic block separately. Note, however, that these are not quite
47 the same as the basic blocks found by a later pass and used for
48 data flow analysis and register packing. We do not need to start fresh
49 after a conditional jump instruction if there is no label there.
51 We use two data structures to record the equivalent expressions:
52 a hash table for most expressions, and several vectors together
53 with "quantity numbers" to record equivalent (pseudo) registers.
55 The use of the special data structure for registers is desirable
56 because it is faster. It is possible because registers references
57 contain a fairly small number, the register number, taken from
58 a contiguously allocated series, and two register references are
59 identical if they have the same number. General expressions
60 do not have any such thing, so the only way to retrieve the
61 information recorded on an expression other than a register
62 is to keep it in a hash table.
64 Registers and "quantity numbers":
66 At the start of each basic block, all of the (hardware and pseudo)
67 registers used in the function are given distinct quantity
68 numbers to indicate their contents. During scan, when the code
69 copies one register into another, we copy the quantity number.
70 When a register is loaded in any other way, we allocate a new
71 quantity number to describe the value generated by this operation.
72 `reg_qty' records what quantity a register is currently thought
75 All real quantity numbers are greater than or equal to `max_reg'.
76 If register N has not been assigned a quantity, reg_qty[N] will equal N.
78 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
79 variables should be referenced with an index below `max_reg'.
81 We also maintain a bidirectional chain of registers for each
82 quantity number. `qty_first_reg', `qty_last_reg',
83 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
85 The first register in a chain is the one whose lifespan is least local.
86 Among equals, it is the one that was seen first.
87 We replace any equivalent register with that one.
89 If two registers have the same quantity number, it must be true that
90 REG expressions with `qty_mode' must be in the hash table for both
91 registers and must be in the same class.
93 The converse is not true. Since hard registers may be referenced in
94 any mode, two REG expressions might be equivalent in the hash table
95 but not have the same quantity number if the quantity number of one
96 of the registers is not the same mode as those expressions.
98 Constants and quantity numbers
100 When a quantity has a known constant value, that value is stored
101 in the appropriate element of qty_const. This is in addition to
102 putting the constant in the hash table as is usual for non-regs.
104 Whether a reg or a constant is preferred is determined by the configuration
105 macro CONST_COSTS and will often depend on the constant value. In any
106 event, expressions containing constants can be simplified, by fold_rtx.
108 When a quantity has a known nearly constant value (such as an address
109 of a stack slot), that value is stored in the appropriate element
112 Integer constants don't have a machine mode. However, cse
113 determines the intended machine mode from the destination
114 of the instruction that moves the constant. The machine mode
115 is recorded in the hash table along with the actual RTL
116 constant expression so that different modes are kept separate.
120 To record known equivalences among expressions in general
121 we use a hash table called `table'. It has a fixed number of buckets
122 that contain chains of `struct table_elt' elements for expressions.
123 These chains connect the elements whose expressions have the same
126 Other chains through the same elements connect the elements which
127 currently have equivalent values.
129 Register references in an expression are canonicalized before hashing
130 the expression. This is done using `reg_qty' and `qty_first_reg'.
131 The hash code of a register reference is computed using the quantity
132 number, not the register number.
134 When the value of an expression changes, it is necessary to remove from the
135 hash table not just that expression but all expressions whose values
136 could be different as a result.
138 1. If the value changing is in memory, except in special cases
139 ANYTHING referring to memory could be changed. That is because
140 nobody knows where a pointer does not point.
141 The function `invalidate_memory' removes what is necessary.
143 The special cases are when the address is constant or is
144 a constant plus a fixed register such as the frame pointer
145 or a static chain pointer. When such addresses are stored in,
146 we can tell exactly which other such addresses must be invalidated
147 due to overlap. `invalidate' does this.
148 All expressions that refer to non-constant
149 memory addresses are also invalidated. `invalidate_memory' does this.
151 2. If the value changing is a register, all expressions
152 containing references to that register, and only those,
155 Because searching the entire hash table for expressions that contain
156 a register is very slow, we try to figure out when it isn't necessary.
157 Precisely, this is necessary only when expressions have been
158 entered in the hash table using this register, and then the value has
159 changed, and then another expression wants to be added to refer to
160 the register's new value. This sequence of circumstances is rare
161 within any one basic block.
163 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
164 reg_tick[i] is incremented whenever a value is stored in register i.
165 reg_in_table[i] holds -1 if no references to register i have been
166 entered in the table; otherwise, it contains the value reg_tick[i] had
167 when the references were entered. If we want to enter a reference
168 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
169 Until we want to enter a new entry, the mere fact that the two vectors
170 don't match makes the entries be ignored if anyone tries to match them.
172 Registers themselves are entered in the hash table as well as in
173 the equivalent-register chains. However, the vectors `reg_tick'
174 and `reg_in_table' do not apply to expressions which are simple
175 register references. These expressions are removed from the table
176 immediately when they become invalid, and this can be done even if
177 we do not immediately search for all the expressions that refer to
180 A CLOBBER rtx in an instruction invalidates its operand for further
181 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
182 invalidates everything that resides in memory.
186 Constant expressions that differ only by an additive integer
187 are called related. When a constant expression is put in
188 the table, the related expression with no constant term
189 is also entered. These are made to point at each other
190 so that it is possible to find out if there exists any
191 register equivalent to an expression related to a given expression. */
193 /* One plus largest register number used in this function. */
197 /* One plus largest instruction UID used in this function at time of
200 static int max_insn_uid;
202 /* Length of vectors indexed by quantity number.
203 We know in advance we will not need a quantity number this big. */
207 /* Next quantity number to be allocated.
208 This is 1 + the largest number needed so far. */
212 /* Indexed by quantity number, gives the first (or last) register
213 in the chain of registers that currently contain this quantity. */
215 static int *qty_first_reg;
216 static int *qty_last_reg;
218 /* Index by quantity number, gives the mode of the quantity. */
220 static enum machine_mode *qty_mode;
222 /* Indexed by quantity number, gives the rtx of the constant value of the
223 quantity, or zero if it does not have a known value.
224 A sum of the frame pointer (or arg pointer) plus a constant
225 can also be entered here. */
227 static rtx *qty_const;
229 /* Indexed by qty number, gives the insn that stored the constant value
230 recorded in `qty_const'. */
232 static rtx *qty_const_insn;
234 /* The next three variables are used to track when a comparison between a
235 quantity and some constant or register has been passed. In that case, we
236 know the results of the comparison in case we see it again. These variables
237 record a comparison that is known to be true. */
239 /* Indexed by qty number, gives the rtx code of a comparison with a known
240 result involving this quantity. If none, it is UNKNOWN. */
241 static enum rtx_code *qty_comparison_code;
243 /* Indexed by qty number, gives the constant being compared against in a
244 comparison of known result. If no such comparison, it is undefined.
245 If the comparison is not with a constant, it is zero. */
247 static rtx *qty_comparison_const;
249 /* Indexed by qty number, gives the quantity being compared against in a
250 comparison of known result. If no such comparison, if it undefined.
251 If the comparison is not with a register, it is -1. */
253 static int *qty_comparison_qty;
256 /* For machines that have a CC0, we do not record its value in the hash
257 table since its use is guaranteed to be the insn immediately following
258 its definition and any other insn is presumed to invalidate it.
260 Instead, we store below the value last assigned to CC0. If it should
261 happen to be a constant, it is stored in preference to the actual
262 assigned value. In case it is a constant, we store the mode in which
263 the constant should be interpreted. */
265 static rtx prev_insn_cc0;
266 static enum machine_mode prev_insn_cc0_mode;
269 /* Previous actual insn. 0 if at first insn of basic block. */
271 static rtx prev_insn;
273 /* Insn being scanned. */
275 static rtx this_insn;
277 /* Index by register number, gives the quantity number
278 of the register's current contents. */
282 /* Index by register number, gives the number of the next (or
283 previous) register in the chain of registers sharing the same
286 Or -1 if this register is at the end of the chain.
288 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
290 static int *reg_next_eqv;
291 static int *reg_prev_eqv;
293 /* Index by register number, gives the number of times
294 that register has been altered in the current basic block. */
296 static int *reg_tick;
298 /* Index by register number, gives the reg_tick value at which
299 rtx's containing this register are valid in the hash table.
300 If this does not equal the current reg_tick value, such expressions
301 existing in the hash table are invalid.
302 If this is -1, no expressions containing this register have been
303 entered in the table. */
305 static int *reg_in_table;
307 /* A HARD_REG_SET containing all the hard registers for which there is
308 currently a REG expression in the hash table. Note the difference
309 from the above variables, which indicate if the REG is mentioned in some
310 expression in the table. */
312 static HARD_REG_SET hard_regs_in_table;
314 /* A HARD_REG_SET containing all the hard registers that are invalidated
317 static HARD_REG_SET regs_invalidated_by_call;
319 /* Two vectors of ints:
320 one containing max_reg -1's; the other max_reg + 500 (an approximation
321 for max_qty) elements where element i contains i.
322 These are used to initialize various other vectors fast. */
324 static int *all_minus_one;
325 static int *consec_ints;
327 /* CUID of insn that starts the basic block currently being cse-processed. */
329 static int cse_basic_block_start;
331 /* CUID of insn that ends the basic block currently being cse-processed. */
333 static int cse_basic_block_end;
335 /* Vector mapping INSN_UIDs to cuids.
336 The cuids are like uids but increase monotonically always.
337 We use them to see whether a reg is used outside a given basic block. */
339 static int *uid_cuid;
341 /* Highest UID in UID_CUID. */
344 /* Get the cuid of an insn. */
346 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
348 /* Nonzero if cse has altered conditional jump insns
349 in such a way that jump optimization should be redone. */
351 static int cse_jumps_altered;
353 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
354 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
355 to put in the note. */
356 static int recorded_label_ref;
358 /* canon_hash stores 1 in do_not_record
359 if it notices a reference to CC0, PC, or some other volatile
362 static int do_not_record;
364 #ifdef LOAD_EXTEND_OP
366 /* Scratch rtl used when looking for load-extended copy of a MEM. */
367 static rtx memory_extend_rtx;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory;
375 /* canon_hash stores 1 in hash_arg_in_struct
376 if it notices a reference to memory that's part of a structure. */
378 static int hash_arg_in_struct;
380 /* The hash table contains buckets which are chains of `struct table_elt's,
381 each recording one expression's information.
382 That expression is in the `exp' field.
384 Those elements with the same hash code are chained in both directions
385 through the `next_same_hash' and `prev_same_hash' fields.
387 Each set of expressions with equivalent values
388 are on a two-way chain through the `next_same_value'
389 and `prev_same_value' fields, and all point with
390 the `first_same_value' field at the first element in
391 that chain. The chain is in order of increasing cost.
392 Each element's cost value is in its `cost' field.
394 The `in_memory' field is nonzero for elements that
395 involve any reference to memory. These elements are removed
396 whenever a write is done to an unidentified location in memory.
397 To be safe, we assume that a memory address is unidentified unless
398 the address is either a symbol constant or a constant plus
399 the frame pointer or argument pointer.
401 The `in_struct' field is nonzero for elements that
402 involve any reference to memory inside a structure or array.
404 The `related_value' field is used to connect related expressions
405 (that differ by adding an integer).
406 The related expressions are chained in a circular fashion.
407 `related_value' is zero for expressions for which this
410 The `cost' field stores the cost of this element's expression.
412 The `is_const' flag is set if the element is a constant (including
415 The `flag' field is used as a temporary during some search routines.
417 The `mode' field is usually the same as GET_MODE (`exp'), but
418 if `exp' is a CONST_INT and has no machine mode then the `mode'
419 field is the mode it was being used as. Each constant is
420 recorded separately for each mode it is used with. */
426 struct table_elt *next_same_hash;
427 struct table_elt *prev_same_hash;
428 struct table_elt *next_same_value;
429 struct table_elt *prev_same_value;
430 struct table_elt *first_same_value;
431 struct table_elt *related_value;
433 enum machine_mode mode;
440 /* We don't want a lot of buckets, because we rarely have very many
441 things stored in the hash table, and a lot of buckets slows
442 down a lot of loops that happen frequently. */
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
451 : canon_hash (X, M) % NBUCKETS)
453 /* Determine whether register number N is considered a fixed register for CSE.
454 It is desirable to replace other regs with fixed regs, to reduce need for
456 A reg wins if it is either the frame pointer or designated as fixed,
457 but not if it is an overlapping register. */
458 #ifdef OVERLAPPING_REGNO_P
459 #define FIXED_REGNO_P(N) \
460 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
461 || fixed_regs[N] || global_regs[N]) \
462 && ! OVERLAPPING_REGNO_P ((N)))
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
476 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
477 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
478 || ((N) < FIRST_PSEUDO_REGISTER \
479 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
481 /* A register is cheap if it is a user variable assigned to the register
482 or if its register number always corresponds to a cheap register. */
484 #define CHEAP_REG(N) \
485 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
486 || CHEAP_REGNO (REGNO (N)))
489 (GET_CODE (X) == REG \
490 ? (CHEAP_REG (X) ? 0 \
491 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
495 /* Determine if the quantity number for register X represents a valid index
496 into the `qty_...' variables. */
498 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
501 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
502 during CSE, such nodes are present. Using an ADDRESSOF node which
503 refers to the address of a REG is a good thing because we can then
504 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
505 #define CSE_ADDRESS_COST(RTX) \
506 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
507 ? -1 : ADDRESS_COST(RTX))
510 static struct table_elt *table[NBUCKETS];
512 /* Chain of `struct table_elt's made so far for this function
513 but currently removed from the table. */
515 static struct table_elt *free_element_chain;
517 /* Number of `struct table_elt' structures made so far for this function. */
519 static int n_elements_made;
521 /* Maximum value `n_elements_made' has had so far in this compilation
522 for functions previously processed. */
524 static int max_elements_made;
526 /* Surviving equivalence class when two equivalence classes are merged
527 by recording the effects of a jump in the last insn. Zero if the
528 last insn was not a conditional jump. */
530 static struct table_elt *last_jump_equiv_class;
532 /* Set to the cost of a constant pool reference if one was found for a
533 symbolic constant. If this was found, it means we should try to
534 convert constants into constant pool entries if they don't fit in
537 static int constant_pool_entries_cost;
539 /* Define maximum length of a branch path. */
541 #define PATHLENGTH 10
543 /* This data describes a block that will be processed by cse_basic_block. */
545 struct cse_basic_block_data {
546 /* Lowest CUID value of insns in block. */
548 /* Highest CUID value of insns in block. */
550 /* Total number of SETs in block. */
552 /* Last insn in the block. */
554 /* Size of current branch path, if any. */
556 /* Current branch path, indicating which branches will be taken. */
558 /* The branch insn. */
560 /* Whether it should be taken or not. AROUND is the same as taken
561 except that it is used when the destination label is not preceded
563 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
567 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
568 virtual regs here because the simplify_*_operation routines are called
569 by integrate.c, which is called before virtual register instantiation. */
571 #define FIXED_BASE_PLUS_P(X) \
572 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
573 || (X) == arg_pointer_rtx \
574 || (X) == virtual_stack_vars_rtx \
575 || (X) == virtual_incoming_args_rtx \
576 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
577 && (XEXP (X, 0) == frame_pointer_rtx \
578 || XEXP (X, 0) == hard_frame_pointer_rtx \
579 || XEXP (X, 0) == arg_pointer_rtx \
580 || XEXP (X, 0) == virtual_stack_vars_rtx \
581 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
582 || GET_CODE (X) == ADDRESSOF)
584 /* Similar, but also allows reference to the stack pointer.
586 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
587 arg_pointer_rtx by itself is nonzero, because on at least one machine,
588 the i960, the arg pointer is zero when it is unused. */
590 #define NONZERO_BASE_PLUS_P(X) \
591 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
592 || (X) == virtual_stack_vars_rtx \
593 || (X) == virtual_incoming_args_rtx \
594 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
595 && (XEXP (X, 0) == frame_pointer_rtx \
596 || XEXP (X, 0) == hard_frame_pointer_rtx \
597 || XEXP (X, 0) == arg_pointer_rtx \
598 || XEXP (X, 0) == virtual_stack_vars_rtx \
599 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
600 || (X) == stack_pointer_rtx \
601 || (X) == virtual_stack_dynamic_rtx \
602 || (X) == virtual_outgoing_args_rtx \
603 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
604 && (XEXP (X, 0) == stack_pointer_rtx \
605 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
606 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
607 || GET_CODE (X) == ADDRESSOF)
609 static int notreg_cost PROTO((rtx));
610 static void new_basic_block PROTO((void));
611 static void make_new_qty PROTO((int));
612 static void make_regs_eqv PROTO((int, int));
613 static void delete_reg_equiv PROTO((int));
614 static int mention_regs PROTO((rtx));
615 static int insert_regs PROTO((rtx, struct table_elt *, int));
616 static void free_element PROTO((struct table_elt *));
617 static void remove_from_table PROTO((struct table_elt *, unsigned));
618 static struct table_elt *get_element PROTO((void));
619 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
620 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
621 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
622 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
624 static void merge_equiv_classes PROTO((struct table_elt *,
625 struct table_elt *));
626 static void invalidate PROTO((rtx, enum machine_mode));
627 static int cse_rtx_varies_p PROTO((rtx));
628 static void remove_invalid_refs PROTO((int));
629 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
630 static void rehash_using_reg PROTO((rtx));
631 static void invalidate_memory PROTO((void));
632 static void invalidate_for_call PROTO((void));
633 static rtx use_related_value PROTO((rtx, struct table_elt *));
634 static unsigned canon_hash PROTO((rtx, enum machine_mode));
635 static unsigned safe_hash PROTO((rtx, enum machine_mode));
636 static int exp_equiv_p PROTO((rtx, rtx, int, int));
637 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
640 static int refers_to_p PROTO((rtx, rtx));
641 static rtx canon_reg PROTO((rtx, rtx));
642 static void find_best_addr PROTO((rtx, rtx *));
643 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
645 enum machine_mode *));
646 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
648 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
650 static rtx fold_rtx PROTO((rtx, rtx));
651 static rtx equiv_constant PROTO((rtx));
652 static void record_jump_equiv PROTO((rtx, int));
653 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
655 static void cse_insn PROTO((rtx, rtx));
656 static int note_mem_written PROTO((rtx));
657 static void invalidate_from_clobbers PROTO((rtx));
658 static rtx cse_process_notes PROTO((rtx, rtx));
659 static void cse_around_loop PROTO((rtx));
660 static void invalidate_skipped_set PROTO((rtx, rtx));
661 static void invalidate_skipped_block PROTO((rtx));
662 static void cse_check_loop_start PROTO((rtx, rtx));
663 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
664 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
665 static void count_reg_usage PROTO((rtx, int *, rtx, int));
666 extern void dump_class PROTO((struct table_elt*));
668 extern int rtx_equal_function_value_matters;
670 /* Dump the expressions in the equivalence class indicated by CLASSP.
671 This function is used only for debugging. */
674 struct table_elt *classp;
676 struct table_elt *elt;
678 fprintf (stderr, "Equivalence chain for ");
679 print_rtl (stderr, classp->exp);
680 fprintf (stderr, ": \n");
682 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
684 print_rtl (stderr, elt->exp);
685 fprintf (stderr, "\n");
689 /* Return an estimate of the cost of computing rtx X.
690 One use is in cse, to decide which expression to keep in the hash table.
691 Another is in rtl generation, to pick the cheapest way to multiply.
692 Other uses like the latter are expected in the future. */
694 /* Internal function, to compute cost when X is not a register; called
695 from COST macro to keep it simple. */
701 return ((GET_CODE (x) == SUBREG
702 && GET_CODE (SUBREG_REG (x)) == REG
703 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
704 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
705 && (GET_MODE_SIZE (GET_MODE (x))
706 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
707 && subreg_lowpart_p (x)
708 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
709 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
710 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
711 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
713 : rtx_cost (x, SET) * 2);
716 /* Return the right cost to give to an operation
717 to make the cost of the corresponding register-to-register instruction
718 N times that of a fast register-to-register instruction. */
720 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
723 rtx_cost (x, outer_code)
725 enum rtx_code outer_code ATTRIBUTE_UNUSED;
728 register enum rtx_code code;
735 /* Compute the default costs of certain things.
736 Note that RTX_COSTS can override the defaults. */
742 /* Count multiplication by 2**n as a shift,
743 because if we are considering it, we would output it as a shift. */
744 if (GET_CODE (XEXP (x, 1)) == CONST_INT
745 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
748 total = COSTS_N_INSNS (5);
754 total = COSTS_N_INSNS (7);
757 /* Used in loop.c and combine.c as a marker. */
761 /* We don't want these to be used in substitutions because
762 we have no way of validating the resulting insn. So assign
763 anything containing an ASM_OPERANDS a very high cost. */
773 return ! CHEAP_REG (x);
776 /* If we can't tie these modes, make this expensive. The larger
777 the mode, the more expensive it is. */
778 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
779 return COSTS_N_INSNS (2
780 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
783 RTX_COSTS (x, code, outer_code);
786 CONST_COSTS (x, code, outer_code);
790 #ifdef DEFAULT_RTX_COSTS
791 DEFAULT_RTX_COSTS(x, code, outer_code);
796 /* Sum the costs of the sub-rtx's, plus cost of this operation,
797 which is already in total. */
799 fmt = GET_RTX_FORMAT (code);
800 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
802 total += rtx_cost (XEXP (x, i), code);
803 else if (fmt[i] == 'E')
804 for (j = 0; j < XVECLEN (x, i); j++)
805 total += rtx_cost (XVECEXP (x, i, j), code);
810 /* Clear the hash table and initialize each register with its own quantity,
811 for a new basic block. */
820 bzero ((char *) reg_tick, max_reg * sizeof (int));
822 bcopy ((char *) all_minus_one, (char *) reg_in_table,
823 max_reg * sizeof (int));
824 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
825 CLEAR_HARD_REG_SET (hard_regs_in_table);
827 /* The per-quantity values used to be initialized here, but it is
828 much faster to initialize each as it is made in `make_new_qty'. */
830 for (i = 0; i < NBUCKETS; i++)
832 register struct table_elt *this, *next;
833 for (this = table[i]; this; this = next)
835 next = this->next_same_hash;
840 bzero ((char *) table, sizeof table);
849 /* Say that register REG contains a quantity not in any register before
850 and initialize that quantity. */
858 if (next_qty >= max_qty)
861 q = reg_qty[reg] = next_qty++;
862 qty_first_reg[q] = reg;
863 qty_last_reg[q] = reg;
864 qty_const[q] = qty_const_insn[q] = 0;
865 qty_comparison_code[q] = UNKNOWN;
867 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
870 /* Make reg NEW equivalent to reg OLD.
871 OLD is not changing; NEW is. */
874 make_regs_eqv (new, old)
875 register int new, old;
877 register int lastr, firstr;
878 register int q = reg_qty[old];
880 /* Nothing should become eqv until it has a "non-invalid" qty number. */
881 if (! REGNO_QTY_VALID_P (old))
885 firstr = qty_first_reg[q];
886 lastr = qty_last_reg[q];
888 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
889 hard regs. Among pseudos, if NEW will live longer than any other reg
890 of the same qty, and that is beyond the current basic block,
891 make it the new canonical replacement for this qty. */
892 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
893 /* Certain fixed registers might be of the class NO_REGS. This means
894 that not only can they not be allocated by the compiler, but
895 they cannot be used in substitutions or canonicalizations
897 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
898 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
899 || (new >= FIRST_PSEUDO_REGISTER
900 && (firstr < FIRST_PSEUDO_REGISTER
901 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
902 || (uid_cuid[REGNO_FIRST_UID (new)]
903 < cse_basic_block_start))
904 && (uid_cuid[REGNO_LAST_UID (new)]
905 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
907 reg_prev_eqv[firstr] = new;
908 reg_next_eqv[new] = firstr;
909 reg_prev_eqv[new] = -1;
910 qty_first_reg[q] = new;
914 /* If NEW is a hard reg (known to be non-fixed), insert at end.
915 Otherwise, insert before any non-fixed hard regs that are at the
916 end. Registers of class NO_REGS cannot be used as an
917 equivalent for anything. */
918 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
919 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
920 && new >= FIRST_PSEUDO_REGISTER)
921 lastr = reg_prev_eqv[lastr];
922 reg_next_eqv[new] = reg_next_eqv[lastr];
923 if (reg_next_eqv[lastr] >= 0)
924 reg_prev_eqv[reg_next_eqv[lastr]] = new;
926 qty_last_reg[q] = new;
927 reg_next_eqv[lastr] = new;
928 reg_prev_eqv[new] = lastr;
932 /* Remove REG from its equivalence class. */
935 delete_reg_equiv (reg)
938 register int q = reg_qty[reg];
941 /* If invalid, do nothing. */
945 p = reg_prev_eqv[reg];
946 n = reg_next_eqv[reg];
955 qty_first_reg[q] = n;
960 /* Remove any invalid expressions from the hash table
961 that refer to any of the registers contained in expression X.
963 Make sure that newly inserted references to those registers
964 as subexpressions will be considered valid.
966 mention_regs is not called when a register itself
967 is being stored in the table.
969 Return 1 if we have done something that may have changed the hash code
976 register enum rtx_code code;
979 register int changed = 0;
987 register int regno = REGNO (x);
988 register int endregno
989 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
990 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
993 for (i = regno; i < endregno; i++)
995 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
996 remove_invalid_refs (i);
998 reg_in_table[i] = reg_tick[i];
1004 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1005 pseudo if they don't use overlapping words. We handle only pseudos
1006 here for simplicity. */
1007 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1008 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1010 int i = REGNO (SUBREG_REG (x));
1012 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
1014 /* If reg_tick has been incremented more than once since
1015 reg_in_table was last set, that means that the entire
1016 register has been set before, so discard anything memorized
1017 for the entrire register, including all SUBREG expressions. */
1018 if (reg_in_table[i] != reg_tick[i] - 1)
1019 remove_invalid_refs (i);
1021 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1024 reg_in_table[i] = reg_tick[i];
1028 /* If X is a comparison or a COMPARE and either operand is a register
1029 that does not have a quantity, give it one. This is so that a later
1030 call to record_jump_equiv won't cause X to be assigned a different
1031 hash code and not found in the table after that call.
1033 It is not necessary to do this here, since rehash_using_reg can
1034 fix up the table later, but doing this here eliminates the need to
1035 call that expensive function in the most common case where the only
1036 use of the register is in the comparison. */
1038 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1040 if (GET_CODE (XEXP (x, 0)) == REG
1041 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1042 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1044 rehash_using_reg (XEXP (x, 0));
1048 if (GET_CODE (XEXP (x, 1)) == REG
1049 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1050 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1052 rehash_using_reg (XEXP (x, 1));
1057 fmt = GET_RTX_FORMAT (code);
1058 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1060 changed |= mention_regs (XEXP (x, i));
1061 else if (fmt[i] == 'E')
1062 for (j = 0; j < XVECLEN (x, i); j++)
1063 changed |= mention_regs (XVECEXP (x, i, j));
1068 /* Update the register quantities for inserting X into the hash table
1069 with a value equivalent to CLASSP.
1070 (If the class does not contain a REG, it is irrelevant.)
1071 If MODIFIED is nonzero, X is a destination; it is being modified.
1072 Note that delete_reg_equiv should be called on a register
1073 before insert_regs is done on that register with MODIFIED != 0.
1075 Nonzero value means that elements of reg_qty have changed
1076 so X's hash code may be different. */
1079 insert_regs (x, classp, modified)
1081 struct table_elt *classp;
1084 if (GET_CODE (x) == REG)
1086 register int regno = REGNO (x);
1088 /* If REGNO is in the equivalence table already but is of the
1089 wrong mode for that equivalence, don't do anything here. */
1091 if (REGNO_QTY_VALID_P (regno)
1092 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1095 if (modified || ! REGNO_QTY_VALID_P (regno))
1098 for (classp = classp->first_same_value;
1100 classp = classp->next_same_value)
1101 if (GET_CODE (classp->exp) == REG
1102 && GET_MODE (classp->exp) == GET_MODE (x))
1104 make_regs_eqv (regno, REGNO (classp->exp));
1108 make_new_qty (regno);
1109 qty_mode[reg_qty[regno]] = GET_MODE (x);
1116 /* If X is a SUBREG, we will likely be inserting the inner register in the
1117 table. If that register doesn't have an assigned quantity number at
1118 this point but does later, the insertion that we will be doing now will
1119 not be accessible because its hash code will have changed. So assign
1120 a quantity number now. */
1122 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1123 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1125 int regno = REGNO (SUBREG_REG (x));
1127 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1128 /* Mention_regs checks if REG_TICK is exactly one larger than
1129 REG_IN_TABLE to find out if there was only a single preceding
1130 invalidation - for the SUBREG - or another one, which would be
1131 for the full register. Since we don't invalidate the SUBREG
1132 here first, we might have to bump up REG_TICK so that mention_regs
1133 will do the right thing. */
1134 if (reg_in_table[regno] >= 0
1135 && reg_tick[regno] == reg_in_table[regno] + 1)
1141 return mention_regs (x);
1144 /* Look in or update the hash table. */
1146 /* Put the element ELT on the list of free elements. */
1150 struct table_elt *elt;
1152 elt->next_same_hash = free_element_chain;
1153 free_element_chain = elt;
1156 /* Return an element that is free for use. */
1158 static struct table_elt *
1161 struct table_elt *elt = free_element_chain;
1164 free_element_chain = elt->next_same_hash;
1168 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1171 /* Remove table element ELT from use in the table.
1172 HASH is its hash code, made using the HASH macro.
1173 It's an argument because often that is known in advance
1174 and we save much time not recomputing it. */
1177 remove_from_table (elt, hash)
1178 register struct table_elt *elt;
1184 /* Mark this element as removed. See cse_insn. */
1185 elt->first_same_value = 0;
1187 /* Remove the table element from its equivalence class. */
1190 register struct table_elt *prev = elt->prev_same_value;
1191 register struct table_elt *next = elt->next_same_value;
1193 if (next) next->prev_same_value = prev;
1196 prev->next_same_value = next;
1199 register struct table_elt *newfirst = next;
1202 next->first_same_value = newfirst;
1203 next = next->next_same_value;
1208 /* Remove the table element from its hash bucket. */
1211 register struct table_elt *prev = elt->prev_same_hash;
1212 register struct table_elt *next = elt->next_same_hash;
1214 if (next) next->prev_same_hash = prev;
1217 prev->next_same_hash = next;
1218 else if (table[hash] == elt)
1222 /* This entry is not in the proper hash bucket. This can happen
1223 when two classes were merged by `merge_equiv_classes'. Search
1224 for the hash bucket that it heads. This happens only very
1225 rarely, so the cost is acceptable. */
1226 for (hash = 0; hash < NBUCKETS; hash++)
1227 if (table[hash] == elt)
1232 /* Remove the table element from its related-value circular chain. */
1234 if (elt->related_value != 0 && elt->related_value != elt)
1236 register struct table_elt *p = elt->related_value;
1237 while (p->related_value != elt)
1238 p = p->related_value;
1239 p->related_value = elt->related_value;
1240 if (p->related_value == p)
1241 p->related_value = 0;
1247 /* Look up X in the hash table and return its table element,
1248 or 0 if X is not in the table.
1250 MODE is the machine-mode of X, or if X is an integer constant
1251 with VOIDmode then MODE is the mode with which X will be used.
1253 Here we are satisfied to find an expression whose tree structure
1256 static struct table_elt *
1257 lookup (x, hash, mode)
1260 enum machine_mode mode;
1262 register struct table_elt *p;
1264 for (p = table[hash]; p; p = p->next_same_hash)
1265 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1266 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1272 /* Like `lookup' but don't care whether the table element uses invalid regs.
1273 Also ignore discrepancies in the machine mode of a register. */
1275 static struct table_elt *
1276 lookup_for_remove (x, hash, mode)
1279 enum machine_mode mode;
1281 register struct table_elt *p;
1283 if (GET_CODE (x) == REG)
1285 int regno = REGNO (x);
1286 /* Don't check the machine mode when comparing registers;
1287 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1288 for (p = table[hash]; p; p = p->next_same_hash)
1289 if (GET_CODE (p->exp) == REG
1290 && REGNO (p->exp) == regno)
1295 for (p = table[hash]; p; p = p->next_same_hash)
1296 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1303 /* Look for an expression equivalent to X and with code CODE.
1304 If one is found, return that expression. */
1307 lookup_as_function (x, code)
1311 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1313 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1314 long as we are narrowing. So if we looked in vain for a mode narrower
1315 than word_mode before, look for word_mode now. */
1316 if (p == 0 && code == CONST_INT
1317 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1320 PUT_MODE (x, word_mode);
1321 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1327 for (p = p->first_same_value; p; p = p->next_same_value)
1329 if (GET_CODE (p->exp) == code
1330 /* Make sure this is a valid entry in the table. */
1331 && exp_equiv_p (p->exp, p->exp, 1, 0))
1338 /* Insert X in the hash table, assuming HASH is its hash code
1339 and CLASSP is an element of the class it should go in
1340 (or 0 if a new class should be made).
1341 It is inserted at the proper position to keep the class in
1342 the order cheapest first.
1344 MODE is the machine-mode of X, or if X is an integer constant
1345 with VOIDmode then MODE is the mode with which X will be used.
1347 For elements of equal cheapness, the most recent one
1348 goes in front, except that the first element in the list
1349 remains first unless a cheaper element is added. The order of
1350 pseudo-registers does not matter, as canon_reg will be called to
1351 find the cheapest when a register is retrieved from the table.
1353 The in_memory field in the hash table element is set to 0.
1354 The caller must set it nonzero if appropriate.
1356 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1357 and if insert_regs returns a nonzero value
1358 you must then recompute its hash code before calling here.
1360 If necessary, update table showing constant values of quantities. */
1362 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1364 static struct table_elt *
1365 insert (x, classp, hash, mode)
1367 register struct table_elt *classp;
1369 enum machine_mode mode;
1371 register struct table_elt *elt;
1373 /* If X is a register and we haven't made a quantity for it,
1374 something is wrong. */
1375 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1378 /* If X is a hard register, show it is being put in the table. */
1379 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1381 int regno = REGNO (x);
1382 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1385 for (i = regno; i < endregno; i++)
1386 SET_HARD_REG_BIT (hard_regs_in_table, i);
1389 /* If X is a label, show we recorded it. */
1390 if (GET_CODE (x) == LABEL_REF
1391 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1392 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1393 recorded_label_ref = 1;
1395 /* Put an element for X into the right hash bucket. */
1397 elt = get_element ();
1399 elt->cost = COST (x);
1400 elt->next_same_value = 0;
1401 elt->prev_same_value = 0;
1402 elt->next_same_hash = table[hash];
1403 elt->prev_same_hash = 0;
1404 elt->related_value = 0;
1407 elt->is_const = (CONSTANT_P (x)
1408 /* GNU C++ takes advantage of this for `this'
1409 (and other const values). */
1410 || (RTX_UNCHANGING_P (x)
1411 && GET_CODE (x) == REG
1412 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1413 || FIXED_BASE_PLUS_P (x));
1416 table[hash]->prev_same_hash = elt;
1419 /* Put it into the proper value-class. */
1422 classp = classp->first_same_value;
1423 if (CHEAPER (elt, classp))
1424 /* Insert at the head of the class */
1426 register struct table_elt *p;
1427 elt->next_same_value = classp;
1428 classp->prev_same_value = elt;
1429 elt->first_same_value = elt;
1431 for (p = classp; p; p = p->next_same_value)
1432 p->first_same_value = elt;
1436 /* Insert not at head of the class. */
1437 /* Put it after the last element cheaper than X. */
1438 register struct table_elt *p, *next;
1439 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1441 /* Put it after P and before NEXT. */
1442 elt->next_same_value = next;
1444 next->prev_same_value = elt;
1445 elt->prev_same_value = p;
1446 p->next_same_value = elt;
1447 elt->first_same_value = classp;
1451 elt->first_same_value = elt;
1453 /* If this is a constant being set equivalent to a register or a register
1454 being set equivalent to a constant, note the constant equivalence.
1456 If this is a constant, it cannot be equivalent to a different constant,
1457 and a constant is the only thing that can be cheaper than a register. So
1458 we know the register is the head of the class (before the constant was
1461 If this is a register that is not already known equivalent to a
1462 constant, we must check the entire class.
1464 If this is a register that is already known equivalent to an insn,
1465 update `qty_const_insn' to show that `this_insn' is the latest
1466 insn making that quantity equivalent to the constant. */
1468 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1469 && GET_CODE (x) != REG)
1471 qty_const[reg_qty[REGNO (classp->exp)]]
1472 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1473 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1476 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]
1479 register struct table_elt *p;
1481 for (p = classp; p != 0; p = p->next_same_value)
1483 if (p->is_const && GET_CODE (p->exp) != REG)
1485 qty_const[reg_qty[REGNO (x)]]
1486 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1487 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1493 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1494 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1495 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1497 /* If this is a constant with symbolic value,
1498 and it has a term with an explicit integer value,
1499 link it up with related expressions. */
1500 if (GET_CODE (x) == CONST)
1502 rtx subexp = get_related_value (x);
1504 struct table_elt *subelt, *subelt_prev;
1508 /* Get the integer-free subexpression in the hash table. */
1509 subhash = safe_hash (subexp, mode) % NBUCKETS;
1510 subelt = lookup (subexp, subhash, mode);
1512 subelt = insert (subexp, NULL_PTR, subhash, mode);
1513 /* Initialize SUBELT's circular chain if it has none. */
1514 if (subelt->related_value == 0)
1515 subelt->related_value = subelt;
1516 /* Find the element in the circular chain that precedes SUBELT. */
1517 subelt_prev = subelt;
1518 while (subelt_prev->related_value != subelt)
1519 subelt_prev = subelt_prev->related_value;
1520 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1521 This way the element that follows SUBELT is the oldest one. */
1522 elt->related_value = subelt_prev->related_value;
1523 subelt_prev->related_value = elt;
1530 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1531 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1532 the two classes equivalent.
1534 CLASS1 will be the surviving class; CLASS2 should not be used after this
1537 Any invalid entries in CLASS2 will not be copied. */
1540 merge_equiv_classes (class1, class2)
1541 struct table_elt *class1, *class2;
1543 struct table_elt *elt, *next, *new;
1545 /* Ensure we start with the head of the classes. */
1546 class1 = class1->first_same_value;
1547 class2 = class2->first_same_value;
1549 /* If they were already equal, forget it. */
1550 if (class1 == class2)
1553 for (elt = class2; elt; elt = next)
1557 enum machine_mode mode = elt->mode;
1559 next = elt->next_same_value;
1561 /* Remove old entry, make a new one in CLASS1's class.
1562 Don't do this for invalid entries as we cannot find their
1563 hash code (it also isn't necessary). */
1564 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1566 hash_arg_in_memory = 0;
1567 hash_arg_in_struct = 0;
1568 hash = HASH (exp, mode);
1570 if (GET_CODE (exp) == REG)
1571 delete_reg_equiv (REGNO (exp));
1573 remove_from_table (elt, hash);
1575 if (insert_regs (exp, class1, 0))
1577 rehash_using_reg (exp);
1578 hash = HASH (exp, mode);
1580 new = insert (exp, class1, hash, mode);
1581 new->in_memory = hash_arg_in_memory;
1582 new->in_struct = hash_arg_in_struct;
1587 /* Remove from the hash table, or mark as invalid,
1588 all expressions whose values could be altered by storing in X.
1589 X is a register, a subreg, or a memory reference with nonvarying address
1590 (because, when a memory reference with a varying address is stored in,
1591 all memory references are removed by invalidate_memory
1592 so specific invalidation is superfluous).
1593 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1594 instead of just the amount indicated by the mode of X. This is only used
1595 for bitfield stores into memory.
1597 A nonvarying address may be just a register or just
1598 a symbol reference, or it may be either of those plus
1599 a numeric offset. */
1602 invalidate (x, full_mode)
1604 enum machine_mode full_mode;
1607 register struct table_elt *p;
1609 /* If X is a register, dependencies on its contents
1610 are recorded through the qty number mechanism.
1611 Just change the qty number of the register,
1612 mark it as invalid for expressions that refer to it,
1613 and remove it itself. */
1615 if (GET_CODE (x) == REG)
1617 register int regno = REGNO (x);
1618 register unsigned hash = HASH (x, GET_MODE (x));
1620 /* Remove REGNO from any quantity list it might be on and indicate
1621 that its value might have changed. If it is a pseudo, remove its
1622 entry from the hash table.
1624 For a hard register, we do the first two actions above for any
1625 additional hard registers corresponding to X. Then, if any of these
1626 registers are in the table, we must remove any REG entries that
1627 overlap these registers. */
1629 delete_reg_equiv (regno);
1632 if (regno >= FIRST_PSEUDO_REGISTER)
1634 /* Because a register can be referenced in more than one mode,
1635 we might have to remove more than one table entry. */
1637 struct table_elt *elt;
1639 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1640 remove_from_table (elt, hash);
1644 HOST_WIDE_INT in_table
1645 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1646 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1647 int tregno, tendregno;
1648 register struct table_elt *p, *next;
1650 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1652 for (i = regno + 1; i < endregno; i++)
1654 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1655 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1656 delete_reg_equiv (i);
1661 for (hash = 0; hash < NBUCKETS; hash++)
1662 for (p = table[hash]; p; p = next)
1664 next = p->next_same_hash;
1666 if (GET_CODE (p->exp) != REG
1667 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1670 tregno = REGNO (p->exp);
1672 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1673 if (tendregno > regno && tregno < endregno)
1674 remove_from_table (p, hash);
1681 if (GET_CODE (x) == SUBREG)
1683 if (GET_CODE (SUBREG_REG (x)) != REG)
1685 invalidate (SUBREG_REG (x), VOIDmode);
1689 /* If X is a parallel, invalidate all of its elements. */
1691 if (GET_CODE (x) == PARALLEL)
1693 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1694 invalidate (XVECEXP (x, 0, i), VOIDmode);
1698 /* If X is an expr_list, this is part of a disjoint return value;
1699 extract the location in question ignoring the offset. */
1701 if (GET_CODE (x) == EXPR_LIST)
1703 invalidate (XEXP (x, 0), VOIDmode);
1707 /* X is not a register; it must be a memory reference with
1708 a nonvarying address. Remove all hash table elements
1709 that refer to overlapping pieces of memory. */
1711 if (GET_CODE (x) != MEM)
1714 if (full_mode == VOIDmode)
1715 full_mode = GET_MODE (x);
1717 for (i = 0; i < NBUCKETS; i++)
1719 register struct table_elt *next;
1720 for (p = table[i]; p; p = next)
1722 next = p->next_same_hash;
1723 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1724 than checking all the aliases). */
1726 && (GET_CODE (p->exp) != MEM
1727 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1728 remove_from_table (p, i);
1733 /* Remove all expressions that refer to register REGNO,
1734 since they are already invalid, and we are about to
1735 mark that register valid again and don't want the old
1736 expressions to reappear as valid. */
1739 remove_invalid_refs (regno)
1743 register struct table_elt *p, *next;
1745 for (i = 0; i < NBUCKETS; i++)
1746 for (p = table[i]; p; p = next)
1748 next = p->next_same_hash;
1749 if (GET_CODE (p->exp) != REG
1750 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1751 remove_from_table (p, i);
1755 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1757 remove_invalid_subreg_refs (regno, word, mode)
1760 enum machine_mode mode;
1763 register struct table_elt *p, *next;
1764 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1766 for (i = 0; i < NBUCKETS; i++)
1767 for (p = table[i]; p; p = next)
1770 next = p->next_same_hash;
1773 if (GET_CODE (p->exp) != REG
1774 && (GET_CODE (exp) != SUBREG
1775 || GET_CODE (SUBREG_REG (exp)) != REG
1776 || REGNO (SUBREG_REG (exp)) != regno
1777 || (((SUBREG_WORD (exp)
1778 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1780 && SUBREG_WORD (exp) <= end))
1781 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1782 remove_from_table (p, i);
1786 /* Recompute the hash codes of any valid entries in the hash table that
1787 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1789 This is called when we make a jump equivalence. */
1792 rehash_using_reg (x)
1796 struct table_elt *p, *next;
1799 if (GET_CODE (x) == SUBREG)
1802 /* If X is not a register or if the register is known not to be in any
1803 valid entries in the table, we have no work to do. */
1805 if (GET_CODE (x) != REG
1806 || reg_in_table[REGNO (x)] < 0
1807 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1810 /* Scan all hash chains looking for valid entries that mention X.
1811 If we find one and it is in the wrong hash chain, move it. We can skip
1812 objects that are registers, since they are handled specially. */
1814 for (i = 0; i < NBUCKETS; i++)
1815 for (p = table[i]; p; p = next)
1817 next = p->next_same_hash;
1818 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1819 && exp_equiv_p (p->exp, p->exp, 1, 0)
1820 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1822 if (p->next_same_hash)
1823 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1825 if (p->prev_same_hash)
1826 p->prev_same_hash->next_same_hash = p->next_same_hash;
1828 table[i] = p->next_same_hash;
1830 p->next_same_hash = table[hash];
1831 p->prev_same_hash = 0;
1833 table[hash]->prev_same_hash = p;
1839 /* Remove from the hash table any expression that is a call-clobbered
1840 register. Also update their TICK values. */
1843 invalidate_for_call ()
1845 int regno, endregno;
1848 struct table_elt *p, *next;
1851 /* Go through all the hard registers. For each that is clobbered in
1852 a CALL_INSN, remove the register from quantity chains and update
1853 reg_tick if defined. Also see if any of these registers is currently
1856 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1857 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1859 delete_reg_equiv (regno);
1860 if (reg_tick[regno] >= 0)
1863 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1866 /* In the case where we have no call-clobbered hard registers in the
1867 table, we are done. Otherwise, scan the table and remove any
1868 entry that overlaps a call-clobbered register. */
1871 for (hash = 0; hash < NBUCKETS; hash++)
1872 for (p = table[hash]; p; p = next)
1874 next = p->next_same_hash;
1878 remove_from_table (p, hash);
1882 if (GET_CODE (p->exp) != REG
1883 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1886 regno = REGNO (p->exp);
1887 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1889 for (i = regno; i < endregno; i++)
1890 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1892 remove_from_table (p, hash);
1898 /* Given an expression X of type CONST,
1899 and ELT which is its table entry (or 0 if it
1900 is not in the hash table),
1901 return an alternate expression for X as a register plus integer.
1902 If none can be found, return 0. */
1905 use_related_value (x, elt)
1907 struct table_elt *elt;
1909 register struct table_elt *relt = 0;
1910 register struct table_elt *p, *q;
1911 HOST_WIDE_INT offset;
1913 /* First, is there anything related known?
1914 If we have a table element, we can tell from that.
1915 Otherwise, must look it up. */
1917 if (elt != 0 && elt->related_value != 0)
1919 else if (elt == 0 && GET_CODE (x) == CONST)
1921 rtx subexp = get_related_value (x);
1923 relt = lookup (subexp,
1924 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1931 /* Search all related table entries for one that has an
1932 equivalent register. */
1937 /* This loop is strange in that it is executed in two different cases.
1938 The first is when X is already in the table. Then it is searching
1939 the RELATED_VALUE list of X's class (RELT). The second case is when
1940 X is not in the table. Then RELT points to a class for the related
1943 Ensure that, whatever case we are in, that we ignore classes that have
1944 the same value as X. */
1946 if (rtx_equal_p (x, p->exp))
1949 for (q = p->first_same_value; q; q = q->next_same_value)
1950 if (GET_CODE (q->exp) == REG)
1956 p = p->related_value;
1958 /* We went all the way around, so there is nothing to be found.
1959 Alternatively, perhaps RELT was in the table for some other reason
1960 and it has no related values recorded. */
1961 if (p == relt || p == 0)
1968 offset = (get_integer_term (x) - get_integer_term (p->exp));
1969 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1970 return plus_constant (q->exp, offset);
1973 /* Hash an rtx. We are careful to make sure the value is never negative.
1974 Equivalent registers hash identically.
1975 MODE is used in hashing for CONST_INTs only;
1976 otherwise the mode of X is used.
1978 Store 1 in do_not_record if any subexpression is volatile.
1980 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1981 which does not have the RTX_UNCHANGING_P bit set.
1982 In this case, also store 1 in hash_arg_in_struct
1983 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1985 Note that cse_insn knows that the hash code of a MEM expression
1986 is just (int) MEM plus the hash code of the address. */
1989 canon_hash (x, mode)
1991 enum machine_mode mode;
1994 register unsigned hash = 0;
1995 register enum rtx_code code;
1998 /* repeat is used to turn tail-recursion into iteration. */
2003 code = GET_CODE (x);
2008 register int regno = REGNO (x);
2010 /* On some machines, we can't record any non-fixed hard register,
2011 because extending its life will cause reload problems. We
2012 consider ap, fp, and sp to be fixed for this purpose.
2013 On all machines, we can't record any global registers. */
2015 if (regno < FIRST_PSEUDO_REGISTER
2016 && (global_regs[regno]
2017 || (SMALL_REGISTER_CLASSES
2018 && ! fixed_regs[regno]
2019 && regno != FRAME_POINTER_REGNUM
2020 && regno != HARD_FRAME_POINTER_REGNUM
2021 && regno != ARG_POINTER_REGNUM
2022 && regno != STACK_POINTER_REGNUM)))
2027 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
2031 /* We handle SUBREG of a REG specially because the underlying
2032 reg changes its hash value with every value change; we don't
2033 want to have to forget unrelated subregs when one subreg changes. */
2036 if (GET_CODE (SUBREG_REG (x)) == REG)
2038 hash += (((unsigned) SUBREG << 7)
2039 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2047 unsigned HOST_WIDE_INT tem = INTVAL (x);
2048 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2053 /* This is like the general case, except that it only counts
2054 the integers representing the constant. */
2055 hash += (unsigned) code + (unsigned) GET_MODE (x);
2056 if (GET_MODE (x) != VOIDmode)
2057 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2059 unsigned tem = XINT (x, i);
2063 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2064 + (unsigned) CONST_DOUBLE_HIGH (x));
2067 /* Assume there is only one rtx object for any given label. */
2070 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2075 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2079 if (MEM_VOLATILE_P (x))
2084 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2086 hash_arg_in_memory = 1;
2087 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2089 /* Now that we have already found this special case,
2090 might as well speed it up as much as possible. */
2091 hash += (unsigned) MEM;
2102 case UNSPEC_VOLATILE:
2107 if (MEM_VOLATILE_P (x))
2118 i = GET_RTX_LENGTH (code) - 1;
2119 hash += (unsigned) code + (unsigned) GET_MODE (x);
2120 fmt = GET_RTX_FORMAT (code);
2125 rtx tem = XEXP (x, i);
2127 /* If we are about to do the last recursive call
2128 needed at this level, change it into iteration.
2129 This function is called enough to be worth it. */
2135 hash += canon_hash (tem, 0);
2137 else if (fmt[i] == 'E')
2138 for (j = 0; j < XVECLEN (x, i); j++)
2139 hash += canon_hash (XVECEXP (x, i, j), 0);
2140 else if (fmt[i] == 's')
2142 register unsigned char *p = (unsigned char *) XSTR (x, i);
2147 else if (fmt[i] == 'i')
2149 register unsigned tem = XINT (x, i);
2152 else if (fmt[i] == '0')
2160 /* Like canon_hash but with no side effects. */
2165 enum machine_mode mode;
2167 int save_do_not_record = do_not_record;
2168 int save_hash_arg_in_memory = hash_arg_in_memory;
2169 int save_hash_arg_in_struct = hash_arg_in_struct;
2170 unsigned hash = canon_hash (x, mode);
2171 hash_arg_in_memory = save_hash_arg_in_memory;
2172 hash_arg_in_struct = save_hash_arg_in_struct;
2173 do_not_record = save_do_not_record;
2177 /* Return 1 iff X and Y would canonicalize into the same thing,
2178 without actually constructing the canonicalization of either one.
2179 If VALIDATE is nonzero,
2180 we assume X is an expression being processed from the rtl
2181 and Y was found in the hash table. We check register refs
2182 in Y for being marked as valid.
2184 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2185 that is known to be in the register. Ordinarily, we don't allow them
2186 to match, because letting them match would cause unpredictable results
2187 in all the places that search a hash table chain for an equivalent
2188 for a given value. A possible equivalent that has different structure
2189 has its hash code computed from different data. Whether the hash code
2190 is the same as that of the given value is pure luck. */
2193 exp_equiv_p (x, y, validate, equal_values)
2199 register enum rtx_code code;
2202 /* Note: it is incorrect to assume an expression is equivalent to itself
2203 if VALIDATE is nonzero. */
2204 if (x == y && !validate)
2206 if (x == 0 || y == 0)
2209 code = GET_CODE (x);
2210 if (code != GET_CODE (y))
2215 /* If X is a constant and Y is a register or vice versa, they may be
2216 equivalent. We only have to validate if Y is a register. */
2217 if (CONSTANT_P (x) && GET_CODE (y) == REG
2218 && REGNO_QTY_VALID_P (REGNO (y))
2219 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2220 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2221 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2224 if (CONSTANT_P (y) && code == REG
2225 && REGNO_QTY_VALID_P (REGNO (x))
2226 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2227 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2233 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2234 if (GET_MODE (x) != GET_MODE (y))
2244 return INTVAL (x) == INTVAL (y);
2247 return XEXP (x, 0) == XEXP (y, 0);
2250 return XSTR (x, 0) == XSTR (y, 0);
2254 int regno = REGNO (y);
2256 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2257 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2260 /* If the quantities are not the same, the expressions are not
2261 equivalent. If there are and we are not to validate, they
2262 are equivalent. Otherwise, ensure all regs are up-to-date. */
2264 if (reg_qty[REGNO (x)] != reg_qty[regno])
2270 for (i = regno; i < endregno; i++)
2271 if (reg_in_table[i] != reg_tick[i])
2277 /* For commutative operations, check both orders. */
2285 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2286 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2287 validate, equal_values))
2288 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2289 validate, equal_values)
2290 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2291 validate, equal_values)));
2297 /* Compare the elements. If any pair of corresponding elements
2298 fail to match, return 0 for the whole things. */
2300 fmt = GET_RTX_FORMAT (code);
2301 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2306 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2311 if (XVECLEN (x, i) != XVECLEN (y, i))
2313 for (j = 0; j < XVECLEN (x, i); j++)
2314 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2315 validate, equal_values))
2320 if (strcmp (XSTR (x, i), XSTR (y, i)))
2325 if (XINT (x, i) != XINT (y, i))
2330 if (XWINT (x, i) != XWINT (y, i))
2345 /* Return 1 iff any subexpression of X matches Y.
2346 Here we do not require that X or Y be valid (for registers referred to)
2347 for being in the hash table. */
2354 register enum rtx_code code;
2360 if (x == 0 || y == 0)
2363 code = GET_CODE (x);
2364 /* If X as a whole has the same code as Y, they may match.
2366 if (code == GET_CODE (y))
2368 if (exp_equiv_p (x, y, 0, 1))
2372 /* X does not match, so try its subexpressions. */
2374 fmt = GET_RTX_FORMAT (code);
2375 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2384 if (refers_to_p (XEXP (x, i), y))
2387 else if (fmt[i] == 'E')
2390 for (j = 0; j < XVECLEN (x, i); j++)
2391 if (refers_to_p (XVECEXP (x, i, j), y))
2398 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2399 set PBASE, PSTART, and PEND which correspond to the base of the address,
2400 the starting offset, and ending offset respectively.
2402 ADDR is known to be a nonvarying address. */
2404 /* ??? Despite what the comments say, this function is in fact frequently
2405 passed varying addresses. This does not appear to cause any problems. */
2408 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2412 HOST_WIDE_INT *pstart, *pend;
2415 HOST_WIDE_INT start, end;
2421 if (flag_pic && GET_CODE (base) == PLUS
2422 && XEXP (base, 0) == pic_offset_table_rtx)
2423 base = XEXP (base, 1);
2425 /* Registers with nonvarying addresses usually have constant equivalents;
2426 but the frame pointer register is also possible. */
2427 if (GET_CODE (base) == REG
2429 && REGNO_QTY_VALID_P (REGNO (base))
2430 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2431 && qty_const[reg_qty[REGNO (base)]] != 0)
2432 base = qty_const[reg_qty[REGNO (base)]];
2433 else if (GET_CODE (base) == PLUS
2434 && GET_CODE (XEXP (base, 1)) == CONST_INT
2435 && GET_CODE (XEXP (base, 0)) == REG
2437 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2438 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2439 == GET_MODE (XEXP (base, 0)))
2440 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2442 start = INTVAL (XEXP (base, 1));
2443 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2445 /* This can happen as the result of virtual register instantiation,
2446 if the initial offset is too large to be a valid address. */
2447 else if (GET_CODE (base) == PLUS
2448 && GET_CODE (XEXP (base, 0)) == REG
2449 && GET_CODE (XEXP (base, 1)) == REG
2451 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2452 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2453 == GET_MODE (XEXP (base, 0)))
2454 && qty_const[reg_qty[REGNO (XEXP (base, 0))]]
2455 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2456 && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]]
2457 == GET_MODE (XEXP (base, 1)))
2458 && qty_const[reg_qty[REGNO (XEXP (base, 1))]])
2460 rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]];
2461 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2463 /* One of the two values must be a constant. */
2464 if (GET_CODE (base) != CONST_INT)
2466 if (GET_CODE (tem) != CONST_INT)
2468 start = INTVAL (tem);
2472 start = INTVAL (base);
2477 /* Handle everything that we can find inside an address that has been
2478 viewed as constant. */
2482 /* If no part of this switch does a "continue", the code outside
2483 will exit this loop. */
2485 switch (GET_CODE (base))
2488 /* By definition, operand1 of a LO_SUM is the associated constant
2489 address. Use the associated constant address as the base
2491 base = XEXP (base, 1);
2495 /* Strip off CONST. */
2496 base = XEXP (base, 0);
2500 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2502 start += INTVAL (XEXP (base, 1));
2503 base = XEXP (base, 0);
2509 /* Handle the case of an AND which is the negative of a power of
2510 two. This is used to represent unaligned memory operations. */
2511 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2512 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2514 set_nonvarying_address_components (XEXP (base, 0), size,
2515 pbase, pstart, pend);
2517 /* Assume the worst misalignment. START is affected, but not
2518 END, so compensate but adjusting SIZE. Don't lose any
2519 constant we already had. */
2521 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2522 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2535 if (GET_CODE (base) == CONST_INT)
2537 start += INTVAL (base);
2543 /* Set the return values. */
2549 /* Return 1 if X has a value that can vary even between two
2550 executions of the program. 0 means X can be compared reliably
2551 against certain constants or near-constants. */
2554 cse_rtx_varies_p (x)
2557 /* We need not check for X and the equivalence class being of the same
2558 mode because if X is equivalent to a constant in some mode, it
2559 doesn't vary in any mode. */
2561 if (GET_CODE (x) == REG
2562 && REGNO_QTY_VALID_P (REGNO (x))
2563 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2564 && qty_const[reg_qty[REGNO (x)]] != 0)
2567 if (GET_CODE (x) == PLUS
2568 && GET_CODE (XEXP (x, 1)) == CONST_INT
2569 && GET_CODE (XEXP (x, 0)) == REG
2570 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2571 && (GET_MODE (XEXP (x, 0))
2572 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2573 && qty_const[reg_qty[REGNO (XEXP (x, 0))]])
2576 /* This can happen as the result of virtual register instantiation, if
2577 the initial constant is too large to be a valid address. This gives
2578 us a three instruction sequence, load large offset into a register,
2579 load fp minus a constant into a register, then a MEM which is the
2580 sum of the two `constant' registers. */
2581 if (GET_CODE (x) == PLUS
2582 && GET_CODE (XEXP (x, 0)) == REG
2583 && GET_CODE (XEXP (x, 1)) == REG
2584 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2585 && (GET_MODE (XEXP (x, 0))
2586 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2587 && qty_const[reg_qty[REGNO (XEXP (x, 0))]]
2588 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2589 && (GET_MODE (XEXP (x, 1))
2590 == qty_mode[reg_qty[REGNO (XEXP (x, 1))]])
2591 && qty_const[reg_qty[REGNO (XEXP (x, 1))]])
2594 return rtx_varies_p (x);
2597 /* Canonicalize an expression:
2598 replace each register reference inside it
2599 with the "oldest" equivalent register.
2601 If INSN is non-zero and we are replacing a pseudo with a hard register
2602 or vice versa, validate_change is used to ensure that INSN remains valid
2603 after we make our substitution. The calls are made with IN_GROUP non-zero
2604 so apply_change_group must be called upon the outermost return from this
2605 function (unless INSN is zero). The result of apply_change_group can
2606 generally be discarded since the changes we are making are optional. */
2614 register enum rtx_code code;
2620 code = GET_CODE (x);
2638 /* Never replace a hard reg, because hard regs can appear
2639 in more than one machine mode, and we must preserve the mode
2640 of each occurrence. Also, some hard regs appear in
2641 MEMs that are shared and mustn't be altered. Don't try to
2642 replace any reg that maps to a reg of class NO_REGS. */
2643 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2644 || ! REGNO_QTY_VALID_P (REGNO (x)))
2647 first = qty_first_reg[reg_qty[REGNO (x)]];
2648 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2649 : REGNO_REG_CLASS (first) == NO_REGS ? x
2650 : gen_rtx_REG (qty_mode[reg_qty[REGNO (x)]], first));
2657 fmt = GET_RTX_FORMAT (code);
2658 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2664 rtx new = canon_reg (XEXP (x, i), insn);
2667 /* If replacing pseudo with hard reg or vice versa, ensure the
2668 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2669 if (insn != 0 && new != 0
2670 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2671 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2672 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2673 || (insn_code = recog_memoized (insn)) < 0
2674 || insn_n_dups[insn_code] > 0))
2675 validate_change (insn, &XEXP (x, i), new, 1);
2679 else if (fmt[i] == 'E')
2680 for (j = 0; j < XVECLEN (x, i); j++)
2681 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2687 /* LOC is a location within INSN that is an operand address (the contents of
2688 a MEM). Find the best equivalent address to use that is valid for this
2691 On most CISC machines, complicated address modes are costly, and rtx_cost
2692 is a good approximation for that cost. However, most RISC machines have
2693 only a few (usually only one) memory reference formats. If an address is
2694 valid at all, it is often just as cheap as any other address. Hence, for
2695 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2696 costs of various addresses. For two addresses of equal cost, choose the one
2697 with the highest `rtx_cost' value as that has the potential of eliminating
2698 the most insns. For equal costs, we choose the first in the equivalence
2699 class. Note that we ignore the fact that pseudo registers are cheaper
2700 than hard registers here because we would also prefer the pseudo registers.
2704 find_best_addr (insn, loc)
2708 struct table_elt *elt;
2711 struct table_elt *p;
2712 int found_better = 1;
2714 int save_do_not_record = do_not_record;
2715 int save_hash_arg_in_memory = hash_arg_in_memory;
2716 int save_hash_arg_in_struct = hash_arg_in_struct;
2721 /* Do not try to replace constant addresses or addresses of local and
2722 argument slots. These MEM expressions are made only once and inserted
2723 in many instructions, as well as being used to control symbol table
2724 output. It is not safe to clobber them.
2726 There are some uncommon cases where the address is already in a register
2727 for some reason, but we cannot take advantage of that because we have
2728 no easy way to unshare the MEM. In addition, looking up all stack
2729 addresses is costly. */
2730 if ((GET_CODE (addr) == PLUS
2731 && GET_CODE (XEXP (addr, 0)) == REG
2732 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2733 && (regno = REGNO (XEXP (addr, 0)),
2734 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2735 || regno == ARG_POINTER_REGNUM))
2736 || (GET_CODE (addr) == REG
2737 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2738 || regno == HARD_FRAME_POINTER_REGNUM
2739 || regno == ARG_POINTER_REGNUM))
2740 || GET_CODE (addr) == ADDRESSOF
2741 || CONSTANT_ADDRESS_P (addr))
2744 /* If this address is not simply a register, try to fold it. This will
2745 sometimes simplify the expression. Many simplifications
2746 will not be valid, but some, usually applying the associative rule, will
2747 be valid and produce better code. */
2748 if (GET_CODE (addr) != REG)
2750 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2754 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2755 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2756 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2758 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2760 && validate_change (insn, loc, folded, 0))
2764 /* If this address is not in the hash table, we can't look for equivalences
2765 of the whole address. Also, ignore if volatile. */
2768 hash = HASH (addr, Pmode);
2769 addr_volatile = do_not_record;
2770 do_not_record = save_do_not_record;
2771 hash_arg_in_memory = save_hash_arg_in_memory;
2772 hash_arg_in_struct = save_hash_arg_in_struct;
2777 elt = lookup (addr, hash, Pmode);
2779 #ifndef ADDRESS_COST
2782 int our_cost = elt->cost;
2784 /* Find the lowest cost below ours that works. */
2785 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2786 if (elt->cost < our_cost
2787 && (GET_CODE (elt->exp) == REG
2788 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2789 && validate_change (insn, loc,
2790 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2797 /* We need to find the best (under the criteria documented above) entry
2798 in the class that is valid. We use the `flag' field to indicate
2799 choices that were invalid and iterate until we can't find a better
2800 one that hasn't already been tried. */
2802 for (p = elt->first_same_value; p; p = p->next_same_value)
2805 while (found_better)
2807 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2808 int best_rtx_cost = (elt->cost + 1) >> 1;
2809 struct table_elt *best_elt = elt;
2812 for (p = elt->first_same_value; p; p = p->next_same_value)
2815 if ((GET_CODE (p->exp) == REG
2816 || exp_equiv_p (p->exp, p->exp, 1, 0))
2817 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2818 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2819 && (p->cost + 1) >> 1 > best_rtx_cost)))
2822 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2823 best_rtx_cost = (p->cost + 1) >> 1;
2830 if (validate_change (insn, loc,
2831 canon_reg (copy_rtx (best_elt->exp),
2840 /* If the address is a binary operation with the first operand a register
2841 and the second a constant, do the same as above, but looking for
2842 equivalences of the register. Then try to simplify before checking for
2843 the best address to use. This catches a few cases: First is when we
2844 have REG+const and the register is another REG+const. We can often merge
2845 the constants and eliminate one insn and one register. It may also be
2846 that a machine has a cheap REG+REG+const. Finally, this improves the
2847 code on the Alpha for unaligned byte stores. */
2849 if (flag_expensive_optimizations
2850 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2851 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2852 && GET_CODE (XEXP (*loc, 0)) == REG
2853 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2855 rtx c = XEXP (*loc, 1);
2858 hash = HASH (XEXP (*loc, 0), Pmode);
2859 do_not_record = save_do_not_record;
2860 hash_arg_in_memory = save_hash_arg_in_memory;
2861 hash_arg_in_struct = save_hash_arg_in_struct;
2863 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2867 /* We need to find the best (under the criteria documented above) entry
2868 in the class that is valid. We use the `flag' field to indicate
2869 choices that were invalid and iterate until we can't find a better
2870 one that hasn't already been tried. */
2872 for (p = elt->first_same_value; p; p = p->next_same_value)
2875 while (found_better)
2877 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2878 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2879 struct table_elt *best_elt = elt;
2880 rtx best_rtx = *loc;
2883 /* This is at worst case an O(n^2) algorithm, so limit our search
2884 to the first 32 elements on the list. This avoids trouble
2885 compiling code with very long basic blocks that can easily
2886 call cse_gen_binary so many times that we run out of memory. */
2889 for (p = elt->first_same_value, count = 0;
2891 p = p->next_same_value, count++)
2893 && (GET_CODE (p->exp) == REG
2894 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2896 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2898 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2899 || (CSE_ADDRESS_COST (new) == best_addr_cost
2900 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2903 best_addr_cost = CSE_ADDRESS_COST (new);
2904 best_rtx_cost = (COST (new) + 1) >> 1;
2912 if (validate_change (insn, loc,
2913 canon_reg (copy_rtx (best_rtx),
2924 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2925 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2926 what values are being compared.
2928 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2929 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2930 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2931 compared to produce cc0.
2933 The return value is the comparison operator and is either the code of
2934 A or the code corresponding to the inverse of the comparison. */
2936 static enum rtx_code
2937 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2940 enum machine_mode *pmode1, *pmode2;
2944 arg1 = *parg1, arg2 = *parg2;
2946 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2948 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2950 /* Set non-zero when we find something of interest. */
2952 int reverse_code = 0;
2953 struct table_elt *p = 0;
2955 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2956 On machines with CC0, this is the only case that can occur, since
2957 fold_rtx will return the COMPARE or item being compared with zero
2960 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2963 /* If ARG1 is a comparison operator and CODE is testing for
2964 STORE_FLAG_VALUE, get the inner arguments. */
2966 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2969 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2970 && code == LT && STORE_FLAG_VALUE == -1)
2971 #ifdef FLOAT_STORE_FLAG_VALUE
2972 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2973 && FLOAT_STORE_FLAG_VALUE < 0)
2978 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2979 && code == GE && STORE_FLAG_VALUE == -1)
2980 #ifdef FLOAT_STORE_FLAG_VALUE
2981 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2982 && FLOAT_STORE_FLAG_VALUE < 0)
2985 x = arg1, reverse_code = 1;
2988 /* ??? We could also check for
2990 (ne (and (eq (...) (const_int 1))) (const_int 0))
2992 and related forms, but let's wait until we see them occurring. */
2995 /* Look up ARG1 in the hash table and see if it has an equivalence
2996 that lets us see what is being compared. */
2997 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2999 if (p) p = p->first_same_value;
3001 for (; p; p = p->next_same_value)
3003 enum machine_mode inner_mode = GET_MODE (p->exp);
3005 /* If the entry isn't valid, skip it. */
3006 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3009 if (GET_CODE (p->exp) == COMPARE
3010 /* Another possibility is that this machine has a compare insn
3011 that includes the comparison code. In that case, ARG1 would
3012 be equivalent to a comparison operation that would set ARG1 to
3013 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3014 ORIG_CODE is the actual comparison being done; if it is an EQ,
3015 we must reverse ORIG_CODE. On machine with a negative value
3016 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3019 && GET_MODE_CLASS (inner_mode) == MODE_INT
3020 && (GET_MODE_BITSIZE (inner_mode)
3021 <= HOST_BITS_PER_WIDE_INT)
3022 && (STORE_FLAG_VALUE
3023 & ((HOST_WIDE_INT) 1
3024 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3025 #ifdef FLOAT_STORE_FLAG_VALUE
3027 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3028 && FLOAT_STORE_FLAG_VALUE < 0)
3031 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3036 else if ((code == EQ
3038 && GET_MODE_CLASS (inner_mode) == MODE_INT
3039 && (GET_MODE_BITSIZE (inner_mode)
3040 <= HOST_BITS_PER_WIDE_INT)
3041 && (STORE_FLAG_VALUE
3042 & ((HOST_WIDE_INT) 1
3043 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3044 #ifdef FLOAT_STORE_FLAG_VALUE
3046 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3047 && FLOAT_STORE_FLAG_VALUE < 0)
3050 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3057 /* If this is fp + constant, the equivalent is a better operand since
3058 it may let us predict the value of the comparison. */
3059 else if (NONZERO_BASE_PLUS_P (p->exp))
3066 /* If we didn't find a useful equivalence for ARG1, we are done.
3067 Otherwise, set up for the next iteration. */
3071 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3072 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3073 code = GET_CODE (x);
3076 code = reverse_condition (code);
3079 /* Return our results. Return the modes from before fold_rtx
3080 because fold_rtx might produce const_int, and then it's too late. */
3081 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3082 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3087 /* Try to simplify a unary operation CODE whose output mode is to be
3088 MODE with input operand OP whose mode was originally OP_MODE.
3089 Return zero if no simplification can be made. */
3092 simplify_unary_operation (code, mode, op, op_mode)
3094 enum machine_mode mode;
3096 enum machine_mode op_mode;
3098 register int width = GET_MODE_BITSIZE (mode);
3100 /* The order of these tests is critical so that, for example, we don't
3101 check the wrong mode (input vs. output) for a conversion operation,
3102 such as FIX. At some point, this should be simplified. */
3104 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3106 if (code == FLOAT && GET_MODE (op) == VOIDmode
3107 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3109 HOST_WIDE_INT hv, lv;
3112 if (GET_CODE (op) == CONST_INT)
3113 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3115 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3117 #ifdef REAL_ARITHMETIC
3118 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3122 d = (double) (~ hv);
3123 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3124 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3125 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3131 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3132 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3133 d += (double) (unsigned HOST_WIDE_INT) lv;
3135 #endif /* REAL_ARITHMETIC */
3136 d = real_value_truncate (mode, d);
3137 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3139 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3140 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3142 HOST_WIDE_INT hv, lv;
3145 if (GET_CODE (op) == CONST_INT)
3146 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3148 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3150 if (op_mode == VOIDmode)
3152 /* We don't know how to interpret negative-looking numbers in
3153 this case, so don't try to fold those. */
3157 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3160 hv = 0, lv &= GET_MODE_MASK (op_mode);
3162 #ifdef REAL_ARITHMETIC
3163 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3166 d = (double) (unsigned HOST_WIDE_INT) hv;
3167 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3168 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3169 d += (double) (unsigned HOST_WIDE_INT) lv;
3170 #endif /* REAL_ARITHMETIC */
3171 d = real_value_truncate (mode, d);
3172 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3176 if (GET_CODE (op) == CONST_INT
3177 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3179 register HOST_WIDE_INT arg0 = INTVAL (op);
3180 register HOST_WIDE_INT val;
3193 val = (arg0 >= 0 ? arg0 : - arg0);
3197 /* Don't use ffs here. Instead, get low order bit and then its
3198 number. If arg0 is zero, this will return 0, as desired. */
3199 arg0 &= GET_MODE_MASK (mode);
3200 val = exact_log2 (arg0 & (- arg0)) + 1;
3208 if (op_mode == VOIDmode)
3210 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3212 /* If we were really extending the mode,
3213 we would have to distinguish between zero-extension
3214 and sign-extension. */
3215 if (width != GET_MODE_BITSIZE (op_mode))
3219 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3220 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3226 if (op_mode == VOIDmode)
3228 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3230 /* If we were really extending the mode,
3231 we would have to distinguish between zero-extension
3232 and sign-extension. */
3233 if (width != GET_MODE_BITSIZE (op_mode))
3237 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3240 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3242 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3243 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3256 /* Clear the bits that don't belong in our mode,
3257 unless they and our sign bit are all one.
3258 So we get either a reasonable negative value or a reasonable
3259 unsigned value for this mode. */
3260 if (width < HOST_BITS_PER_WIDE_INT
3261 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3262 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3263 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3265 /* If this would be an entire word for the target, but is not for
3266 the host, then sign-extend on the host so that the number will look
3267 the same way on the host that it would on the target.
3269 For example, when building a 64 bit alpha hosted 32 bit sparc
3270 targeted compiler, then we want the 32 bit unsigned value -1 to be
3271 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3272 The later confuses the sparc backend. */
3274 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3275 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3276 val |= ((HOST_WIDE_INT) (-1) << width);
3278 return GEN_INT (val);
3281 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3282 for a DImode operation on a CONST_INT. */
3283 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3284 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3286 HOST_WIDE_INT l1, h1, lv, hv;
3288 if (GET_CODE (op) == CONST_DOUBLE)
3289 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3291 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3301 neg_double (l1, h1, &lv, &hv);
3306 neg_double (l1, h1, &lv, &hv);
3314 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3316 lv = exact_log2 (l1 & (-l1)) + 1;
3320 /* This is just a change-of-mode, so do nothing. */
3325 if (op_mode == VOIDmode
3326 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3330 lv = l1 & GET_MODE_MASK (op_mode);
3334 if (op_mode == VOIDmode
3335 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3339 lv = l1 & GET_MODE_MASK (op_mode);
3340 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3341 && (lv & ((HOST_WIDE_INT) 1
3342 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3343 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3345 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3356 return immed_double_const (lv, hv, mode);
3359 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3360 else if (GET_CODE (op) == CONST_DOUBLE
3361 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3367 if (setjmp (handler))
3368 /* There used to be a warning here, but that is inadvisable.
3369 People may want to cause traps, and the natural way
3370 to do it should not get a warning. */
3373 set_float_handler (handler);
3375 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3380 d = REAL_VALUE_NEGATE (d);
3384 if (REAL_VALUE_NEGATIVE (d))
3385 d = REAL_VALUE_NEGATE (d);
3388 case FLOAT_TRUNCATE:
3389 d = real_value_truncate (mode, d);
3393 /* All this does is change the mode. */
3397 d = REAL_VALUE_RNDZINT (d);
3401 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3411 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3412 set_float_handler (NULL_PTR);
3416 else if (GET_CODE (op) == CONST_DOUBLE
3417 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3418 && GET_MODE_CLASS (mode) == MODE_INT
3419 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3425 if (setjmp (handler))
3428 set_float_handler (handler);
3430 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3435 val = REAL_VALUE_FIX (d);
3439 val = REAL_VALUE_UNSIGNED_FIX (d);
3446 set_float_handler (NULL_PTR);
3448 /* Clear the bits that don't belong in our mode,
3449 unless they and our sign bit are all one.
3450 So we get either a reasonable negative value or a reasonable
3451 unsigned value for this mode. */
3452 if (width < HOST_BITS_PER_WIDE_INT
3453 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3454 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3455 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3457 /* If this would be an entire word for the target, but is not for
3458 the host, then sign-extend on the host so that the number will look
3459 the same way on the host that it would on the target.
3461 For example, when building a 64 bit alpha hosted 32 bit sparc
3462 targeted compiler, then we want the 32 bit unsigned value -1 to be
3463 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3464 The later confuses the sparc backend. */
3466 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3467 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3468 val |= ((HOST_WIDE_INT) (-1) << width);
3470 return GEN_INT (val);
3473 /* This was formerly used only for non-IEEE float.
3474 eggert@twinsun.com says it is safe for IEEE also. */
3477 /* There are some simplifications we can do even if the operands
3483 /* (not (not X)) == X, similarly for NEG. */
3484 if (GET_CODE (op) == code)
3485 return XEXP (op, 0);
3489 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3490 becomes just the MINUS if its mode is MODE. This allows
3491 folding switch statements on machines using casesi (such as
3493 if (GET_CODE (op) == TRUNCATE
3494 && GET_MODE (XEXP (op, 0)) == mode
3495 && GET_CODE (XEXP (op, 0)) == MINUS
3496 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3497 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3498 return XEXP (op, 0);
3500 #ifdef POINTERS_EXTEND_UNSIGNED
3501 if (! POINTERS_EXTEND_UNSIGNED
3502 && mode == Pmode && GET_MODE (op) == ptr_mode
3504 return convert_memory_address (Pmode, op);
3508 #ifdef POINTERS_EXTEND_UNSIGNED
3510 if (POINTERS_EXTEND_UNSIGNED
3511 && mode == Pmode && GET_MODE (op) == ptr_mode
3513 return convert_memory_address (Pmode, op);
3525 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3526 and OP1. Return 0 if no simplification is possible.
3528 Don't use this for relational operations such as EQ or LT.
3529 Use simplify_relational_operation instead. */
3532 simplify_binary_operation (code, mode, op0, op1)
3534 enum machine_mode mode;
3537 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3539 int width = GET_MODE_BITSIZE (mode);
3542 /* Relational operations don't work here. We must know the mode
3543 of the operands in order to do the comparison correctly.
3544 Assuming a full word can give incorrect results.
3545 Consider comparing 128 with -128 in QImode. */
3547 if (GET_RTX_CLASS (code) == '<')
3550 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3551 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3552 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3553 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3555 REAL_VALUE_TYPE f0, f1, value;
3558 if (setjmp (handler))
3561 set_float_handler (handler);
3563 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3564 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3565 f0 = real_value_truncate (mode, f0);
3566 f1 = real_value_truncate (mode, f1);
3568 #ifdef REAL_ARITHMETIC
3569 #ifndef REAL_INFINITY
3570 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3573 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3587 #ifndef REAL_INFINITY
3594 value = MIN (f0, f1);
3597 value = MAX (f0, f1);
3604 value = real_value_truncate (mode, value);
3605 set_float_handler (NULL_PTR);
3606 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3608 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3610 /* We can fold some multi-word operations. */
3611 if (GET_MODE_CLASS (mode) == MODE_INT
3612 && width == HOST_BITS_PER_WIDE_INT * 2
3613 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3614 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3616 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3618 if (GET_CODE (op0) == CONST_DOUBLE)
3619 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3621 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3623 if (GET_CODE (op1) == CONST_DOUBLE)
3624 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3626 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3631 /* A - B == A + (-B). */
3632 neg_double (l2, h2, &lv, &hv);
3635 /* .. fall through ... */
3638 add_double (l1, h1, l2, h2, &lv, &hv);
3642 mul_double (l1, h1, l2, h2, &lv, &hv);
3645 case DIV: case MOD: case UDIV: case UMOD:
3646 /* We'd need to include tree.h to do this and it doesn't seem worth
3651 lv = l1 & l2, hv = h1 & h2;
3655 lv = l1 | l2, hv = h1 | h2;
3659 lv = l1 ^ l2, hv = h1 ^ h2;
3665 && ((unsigned HOST_WIDE_INT) l1
3666 < (unsigned HOST_WIDE_INT) l2)))
3675 && ((unsigned HOST_WIDE_INT) l1
3676 > (unsigned HOST_WIDE_INT) l2)))
3683 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3685 && ((unsigned HOST_WIDE_INT) l1
3686 < (unsigned HOST_WIDE_INT) l2)))
3693 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3695 && ((unsigned HOST_WIDE_INT) l1
3696 > (unsigned HOST_WIDE_INT) l2)))
3702 case LSHIFTRT: case ASHIFTRT:
3704 case ROTATE: case ROTATERT:
3705 #ifdef SHIFT_COUNT_TRUNCATED
3706 if (SHIFT_COUNT_TRUNCATED)
3707 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3710 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3713 if (code == LSHIFTRT || code == ASHIFTRT)
3714 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3716 else if (code == ASHIFT)
3717 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3718 else if (code == ROTATE)
3719 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3720 else /* code == ROTATERT */
3721 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3728 return immed_double_const (lv, hv, mode);
3731 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3732 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3734 /* Even if we can't compute a constant result,
3735 there are some cases worth simplifying. */
3740 /* In IEEE floating point, x+0 is not the same as x. Similarly
3741 for the other optimizations below. */
3742 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3743 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3746 if (op1 == CONST0_RTX (mode))
3749 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3750 if (GET_CODE (op0) == NEG)
3751 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3752 else if (GET_CODE (op1) == NEG)
3753 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3755 /* Handle both-operands-constant cases. We can only add
3756 CONST_INTs to constants since the sum of relocatable symbols
3757 can't be handled by most assemblers. Don't add CONST_INT
3758 to CONST_INT since overflow won't be computed properly if wider
3759 than HOST_BITS_PER_WIDE_INT. */
3761 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3762 && GET_CODE (op1) == CONST_INT)
3763 return plus_constant (op0, INTVAL (op1));
3764 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3765 && GET_CODE (op0) == CONST_INT)
3766 return plus_constant (op1, INTVAL (op0));
3768 /* See if this is something like X * C - X or vice versa or
3769 if the multiplication is written as a shift. If so, we can
3770 distribute and make a new multiply, shift, or maybe just
3771 have X (if C is 2 in the example above). But don't make
3772 real multiply if we didn't have one before. */
3774 if (! FLOAT_MODE_P (mode))
3776 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3777 rtx lhs = op0, rhs = op1;
3780 if (GET_CODE (lhs) == NEG)
3781 coeff0 = -1, lhs = XEXP (lhs, 0);
3782 else if (GET_CODE (lhs) == MULT
3783 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3785 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3788 else if (GET_CODE (lhs) == ASHIFT
3789 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3790 && INTVAL (XEXP (lhs, 1)) >= 0
3791 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3793 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3794 lhs = XEXP (lhs, 0);
3797 if (GET_CODE (rhs) == NEG)
3798 coeff1 = -1, rhs = XEXP (rhs, 0);
3799 else if (GET_CODE (rhs) == MULT
3800 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3802 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3805 else if (GET_CODE (rhs) == ASHIFT
3806 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3807 && INTVAL (XEXP (rhs, 1)) >= 0
3808 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3810 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3811 rhs = XEXP (rhs, 0);
3814 if (rtx_equal_p (lhs, rhs))
3816 tem = cse_gen_binary (MULT, mode, lhs,
3817 GEN_INT (coeff0 + coeff1));
3818 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3822 /* If one of the operands is a PLUS or a MINUS, see if we can
3823 simplify this by the associative law.
3824 Don't use the associative law for floating point.
3825 The inaccuracy makes it nonassociative,
3826 and subtle programs can break if operations are associated. */
3828 if (INTEGRAL_MODE_P (mode)
3829 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3830 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3831 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3837 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3838 using cc0, in which case we want to leave it as a COMPARE
3839 so we can distinguish it from a register-register-copy.
3841 In IEEE floating point, x-0 is not the same as x. */
3843 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3844 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3845 && op1 == CONST0_RTX (mode))
3848 /* Do nothing here. */
3853 /* None of these optimizations can be done for IEEE
3855 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3856 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3859 /* We can't assume x-x is 0 even with non-IEEE floating point,
3860 but since it is zero except in very strange circumstances, we
3861 will treat it as zero with -ffast-math. */
3862 if (rtx_equal_p (op0, op1)
3863 && ! side_effects_p (op0)
3864 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3865 return CONST0_RTX (mode);
3867 /* Change subtraction from zero into negation. */
3868 if (op0 == CONST0_RTX (mode))
3869 return gen_rtx_NEG (mode, op1);
3871 /* (-1 - a) is ~a. */
3872 if (op0 == constm1_rtx)
3873 return gen_rtx_NOT (mode, op1);
3875 /* Subtracting 0 has no effect. */
3876 if (op1 == CONST0_RTX (mode))
3879 /* See if this is something like X * C - X or vice versa or
3880 if the multiplication is written as a shift. If so, we can
3881 distribute and make a new multiply, shift, or maybe just
3882 have X (if C is 2 in the example above). But don't make
3883 real multiply if we didn't have one before. */
3885 if (! FLOAT_MODE_P (mode))
3887 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3888 rtx lhs = op0, rhs = op1;
3891 if (GET_CODE (lhs) == NEG)
3892 coeff0 = -1, lhs = XEXP (lhs, 0);
3893 else if (GET_CODE (lhs) == MULT
3894 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3896 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3899 else if (GET_CODE (lhs) == ASHIFT
3900 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3901 && INTVAL (XEXP (lhs, 1)) >= 0
3902 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3904 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3905 lhs = XEXP (lhs, 0);
3908 if (GET_CODE (rhs) == NEG)
3909 coeff1 = - 1, rhs = XEXP (rhs, 0);
3910 else if (GET_CODE (rhs) == MULT
3911 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3913 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3916 else if (GET_CODE (rhs) == ASHIFT
3917 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3918 && INTVAL (XEXP (rhs, 1)) >= 0
3919 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3921 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3922 rhs = XEXP (rhs, 0);
3925 if (rtx_equal_p (lhs, rhs))
3927 tem = cse_gen_binary (MULT, mode, lhs,
3928 GEN_INT (coeff0 - coeff1));
3929 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3933 /* (a - (-b)) -> (a + b). */
3934 if (GET_CODE (op1) == NEG)
3935 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3937 /* If one of the operands is a PLUS or a MINUS, see if we can
3938 simplify this by the associative law.
3939 Don't use the associative law for floating point.
3940 The inaccuracy makes it nonassociative,
3941 and subtle programs can break if operations are associated. */
3943 if (INTEGRAL_MODE_P (mode)
3944 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3945 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3946 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3949 /* Don't let a relocatable value get a negative coeff. */
3950 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3951 return plus_constant (op0, - INTVAL (op1));
3953 /* (x - (x & y)) -> (x & ~y) */
3954 if (GET_CODE (op1) == AND)
3956 if (rtx_equal_p (op0, XEXP (op1, 0)))
3957 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
3958 if (rtx_equal_p (op0, XEXP (op1, 1)))
3959 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
3964 if (op1 == constm1_rtx)
3966 tem = simplify_unary_operation (NEG, mode, op0, mode);
3968 return tem ? tem : gen_rtx_NEG (mode, op0);
3971 /* In IEEE floating point, x*0 is not always 0. */
3972 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3973 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3974 && op1 == CONST0_RTX (mode)
3975 && ! side_effects_p (op0))
3978 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3979 However, ANSI says we can drop signals,
3980 so we can do this anyway. */
3981 if (op1 == CONST1_RTX (mode))
3984 /* Convert multiply by constant power of two into shift unless
3985 we are still generating RTL. This test is a kludge. */
3986 if (GET_CODE (op1) == CONST_INT
3987 && (val = exact_log2 (INTVAL (op1))) >= 0
3988 /* If the mode is larger than the host word size, and the
3989 uppermost bit is set, then this isn't a power of two due
3990 to implicit sign extension. */
3991 && (width <= HOST_BITS_PER_WIDE_INT
3992 || val != HOST_BITS_PER_WIDE_INT - 1)
3993 && ! rtx_equal_function_value_matters)
3994 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
3996 if (GET_CODE (op1) == CONST_DOUBLE
3997 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
4001 int op1is2, op1ism1;
4003 if (setjmp (handler))
4006 set_float_handler (handler);
4007 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4008 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
4009 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
4010 set_float_handler (NULL_PTR);
4012 /* x*2 is x+x and x*(-1) is -x */
4013 if (op1is2 && GET_MODE (op0) == mode)
4014 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
4016 else if (op1ism1 && GET_MODE (op0) == mode)
4017 return gen_rtx_NEG (mode, op0);
4022 if (op1 == const0_rtx)
4024 if (GET_CODE (op1) == CONST_INT
4025 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4027 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4029 /* A | (~A) -> -1 */
4030 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4031 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4032 && ! side_effects_p (op0)
4033 && GET_MODE_CLASS (mode) != MODE_CC)
4038 if (op1 == const0_rtx)
4040 if (GET_CODE (op1) == CONST_INT
4041 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4042 return gen_rtx_NOT (mode, op0);
4043 if (op0 == op1 && ! side_effects_p (op0)
4044 && GET_MODE_CLASS (mode) != MODE_CC)
4049 if (op1 == const0_rtx && ! side_effects_p (op0))
4051 if (GET_CODE (op1) == CONST_INT
4052 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4054 if (op0 == op1 && ! side_effects_p (op0)
4055 && GET_MODE_CLASS (mode) != MODE_CC)
4058 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4059 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4060 && ! side_effects_p (op0)
4061 && GET_MODE_CLASS (mode) != MODE_CC)
4066 /* Convert divide by power of two into shift (divide by 1 handled
4068 if (GET_CODE (op1) == CONST_INT
4069 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
4070 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
4072 /* ... fall through ... */
4075 if (op1 == CONST1_RTX (mode))
4078 /* In IEEE floating point, 0/x is not always 0. */
4079 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4080 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4081 && op0 == CONST0_RTX (mode)
4082 && ! side_effects_p (op1))
4085 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4086 /* Change division by a constant into multiplication. Only do
4087 this with -ffast-math until an expert says it is safe in
4089 else if (GET_CODE (op1) == CONST_DOUBLE
4090 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
4091 && op1 != CONST0_RTX (mode)
4095 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4097 if (! REAL_VALUES_EQUAL (d, dconst0))
4099 #if defined (REAL_ARITHMETIC)
4100 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
4101 return gen_rtx_MULT (mode, op0,
4102 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
4104 return gen_rtx_MULT (mode, op0,
4105 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4113 /* Handle modulus by power of two (mod with 1 handled below). */
4114 if (GET_CODE (op1) == CONST_INT
4115 && exact_log2 (INTVAL (op1)) > 0)
4116 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
4118 /* ... fall through ... */
4121 if ((op0 == const0_rtx || op1 == const1_rtx)
4122 && ! side_effects_p (op0) && ! side_effects_p (op1))
4128 /* Rotating ~0 always results in ~0. */
4129 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4130 && INTVAL (op0) == GET_MODE_MASK (mode)
4131 && ! side_effects_p (op1))
4134 /* ... fall through ... */
4139 if (op1 == const0_rtx)
4141 if (op0 == const0_rtx && ! side_effects_p (op1))
4146 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4147 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4148 && ! side_effects_p (op0))
4150 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4155 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4157 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4158 && ! side_effects_p (op0))
4160 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4165 if (op1 == const0_rtx && ! side_effects_p (op0))
4167 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4172 if (op1 == constm1_rtx && ! side_effects_p (op0))
4174 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4185 /* Get the integer argument values in two forms:
4186 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4188 arg0 = INTVAL (op0);
4189 arg1 = INTVAL (op1);
4191 if (width < HOST_BITS_PER_WIDE_INT)
4193 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4194 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4197 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4198 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4201 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4202 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4210 /* Compute the value of the arithmetic. */
4215 val = arg0s + arg1s;
4219 val = arg0s - arg1s;
4223 val = arg0s * arg1s;
4229 val = arg0s / arg1s;
4235 val = arg0s % arg1s;
4241 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4247 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4263 /* If shift count is undefined, don't fold it; let the machine do
4264 what it wants. But truncate it if the machine will do that. */
4268 #ifdef SHIFT_COUNT_TRUNCATED
4269 if (SHIFT_COUNT_TRUNCATED)
4273 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4280 #ifdef SHIFT_COUNT_TRUNCATED
4281 if (SHIFT_COUNT_TRUNCATED)
4285 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4292 #ifdef SHIFT_COUNT_TRUNCATED
4293 if (SHIFT_COUNT_TRUNCATED)
4297 val = arg0s >> arg1;
4299 /* Bootstrap compiler may not have sign extended the right shift.
4300 Manually extend the sign to insure bootstrap cc matches gcc. */
4301 if (arg0s < 0 && arg1 > 0)
4302 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4311 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4312 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4320 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4321 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4325 /* Do nothing here. */
4329 val = arg0s <= arg1s ? arg0s : arg1s;
4333 val = ((unsigned HOST_WIDE_INT) arg0
4334 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4338 val = arg0s > arg1s ? arg0s : arg1s;
4342 val = ((unsigned HOST_WIDE_INT) arg0
4343 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4350 /* Clear the bits that don't belong in our mode, unless they and our sign
4351 bit are all one. So we get either a reasonable negative value or a
4352 reasonable unsigned value for this mode. */
4353 if (width < HOST_BITS_PER_WIDE_INT
4354 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4355 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4356 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4358 /* If this would be an entire word for the target, but is not for
4359 the host, then sign-extend on the host so that the number will look
4360 the same way on the host that it would on the target.
4362 For example, when building a 64 bit alpha hosted 32 bit sparc
4363 targeted compiler, then we want the 32 bit unsigned value -1 to be
4364 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4365 The later confuses the sparc backend. */
4367 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4368 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4369 val |= ((HOST_WIDE_INT) (-1) << width);
4371 return GEN_INT (val);
4374 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4377 Rather than test for specific case, we do this by a brute-force method
4378 and do all possible simplifications until no more changes occur. Then
4379 we rebuild the operation. */
4382 simplify_plus_minus (code, mode, op0, op1)
4384 enum machine_mode mode;
4390 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4391 int first = 1, negate = 0, changed;
4394 bzero ((char *) ops, sizeof ops);
4396 /* Set up the two operands and then expand them until nothing has been
4397 changed. If we run out of room in our array, give up; this should
4398 almost never happen. */
4400 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4407 for (i = 0; i < n_ops; i++)
4408 switch (GET_CODE (ops[i]))
4415 ops[n_ops] = XEXP (ops[i], 1);
4416 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4417 ops[i] = XEXP (ops[i], 0);
4423 ops[i] = XEXP (ops[i], 0);
4424 negs[i] = ! negs[i];
4429 ops[i] = XEXP (ops[i], 0);
4435 /* ~a -> (-a - 1) */
4438 ops[n_ops] = constm1_rtx;
4439 negs[n_ops++] = negs[i];
4440 ops[i] = XEXP (ops[i], 0);
4441 negs[i] = ! negs[i];
4448 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4456 /* If we only have two operands, we can't do anything. */
4460 /* Now simplify each pair of operands until nothing changes. The first
4461 time through just simplify constants against each other. */
4468 for (i = 0; i < n_ops - 1; i++)
4469 for (j = i + 1; j < n_ops; j++)
4470 if (ops[i] != 0 && ops[j] != 0
4471 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4473 rtx lhs = ops[i], rhs = ops[j];
4474 enum rtx_code ncode = PLUS;
4476 if (negs[i] && ! negs[j])
4477 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4478 else if (! negs[i] && negs[j])
4481 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4484 ops[i] = tem, ops[j] = 0;
4485 negs[i] = negs[i] && negs[j];
4486 if (GET_CODE (tem) == NEG)
4487 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4489 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4490 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4498 /* Pack all the operands to the lower-numbered entries and give up if
4499 we didn't reduce the number of operands we had. Make sure we
4500 count a CONST as two operands. If we have the same number of
4501 operands, but have made more CONSTs than we had, this is also
4502 an improvement, so accept it. */
4504 for (i = 0, j = 0; j < n_ops; j++)
4507 ops[i] = ops[j], negs[i++] = negs[j];
4508 if (GET_CODE (ops[j]) == CONST)
4512 if (i + n_consts > input_ops
4513 || (i + n_consts == input_ops && n_consts <= input_consts))
4518 /* If we have a CONST_INT, put it last. */
4519 for (i = 0; i < n_ops - 1; i++)
4520 if (GET_CODE (ops[i]) == CONST_INT)
4522 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4523 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4526 /* Put a non-negated operand first. If there aren't any, make all
4527 operands positive and negate the whole thing later. */
4528 for (i = 0; i < n_ops && negs[i]; i++)
4533 for (i = 0; i < n_ops; i++)
4539 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4540 j = negs[0], negs[0] = negs[i], negs[i] = j;
4543 /* Now make the result by performing the requested operations. */
4545 for (i = 1; i < n_ops; i++)
4546 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4548 return negate ? gen_rtx_NEG (mode, result) : result;
4551 /* Make a binary operation by properly ordering the operands and
4552 seeing if the expression folds. */
4555 cse_gen_binary (code, mode, op0, op1)
4557 enum machine_mode mode;
4562 /* Put complex operands first and constants second if commutative. */
4563 if (GET_RTX_CLASS (code) == 'c'
4564 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4565 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4566 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4567 || (GET_CODE (op0) == SUBREG
4568 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4569 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4570 tem = op0, op0 = op1, op1 = tem;
4572 /* If this simplifies, do it. */
4573 tem = simplify_binary_operation (code, mode, op0, op1);
4578 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4579 just form the operation. */
4581 if (code == PLUS && GET_CODE (op1) == CONST_INT
4582 && GET_MODE (op0) != VOIDmode)
4583 return plus_constant (op0, INTVAL (op1));
4584 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4585 && GET_MODE (op0) != VOIDmode)
4586 return plus_constant (op0, - INTVAL (op1));
4588 return gen_rtx_fmt_ee (code, mode, op0, op1);
4591 /* Like simplify_binary_operation except used for relational operators.
4592 MODE is the mode of the operands, not that of the result. If MODE
4593 is VOIDmode, both operands must also be VOIDmode and we compare the
4594 operands in "infinite precision".
4596 If no simplification is possible, this function returns zero. Otherwise,
4597 it returns either const_true_rtx or const0_rtx. */
4600 simplify_relational_operation (code, mode, op0, op1)
4602 enum machine_mode mode;
4605 int equal, op0lt, op0ltu, op1lt, op1ltu;
4608 /* If op0 is a compare, extract the comparison arguments from it. */
4609 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4610 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4612 /* We can't simplify MODE_CC values since we don't know what the
4613 actual comparison is. */
4614 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4621 /* For integer comparisons of A and B maybe we can simplify A - B and can
4622 then simplify a comparison of that with zero. If A and B are both either
4623 a register or a CONST_INT, this can't help; testing for these cases will
4624 prevent infinite recursion here and speed things up.
4626 If CODE is an unsigned comparison, then we can never do this optimization,
4627 because it gives an incorrect result if the subtraction wraps around zero.
4628 ANSI C defines unsigned operations such that they never overflow, and
4629 thus such cases can not be ignored. */
4631 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4632 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4633 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4634 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4635 && code != GTU && code != GEU && code != LTU && code != LEU)
4636 return simplify_relational_operation (signed_condition (code),
4637 mode, tem, const0_rtx);
4639 /* For non-IEEE floating-point, if the two operands are equal, we know the
4641 if (rtx_equal_p (op0, op1)
4642 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4643 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4644 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4646 /* If the operands are floating-point constants, see if we can fold
4648 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4649 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4650 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4652 REAL_VALUE_TYPE d0, d1;
4655 if (setjmp (handler))
4658 set_float_handler (handler);
4659 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4660 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4661 equal = REAL_VALUES_EQUAL (d0, d1);
4662 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4663 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4664 set_float_handler (NULL_PTR);
4666 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4668 /* Otherwise, see if the operands are both integers. */
4669 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4670 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4671 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4673 int width = GET_MODE_BITSIZE (mode);
4674 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4675 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4677 /* Get the two words comprising each integer constant. */
4678 if (GET_CODE (op0) == CONST_DOUBLE)
4680 l0u = l0s = CONST_DOUBLE_LOW (op0);
4681 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4685 l0u = l0s = INTVAL (op0);
4686 h0u = h0s = l0s < 0 ? -1 : 0;
4689 if (GET_CODE (op1) == CONST_DOUBLE)
4691 l1u = l1s = CONST_DOUBLE_LOW (op1);
4692 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4696 l1u = l1s = INTVAL (op1);
4697 h1u = h1s = l1s < 0 ? -1 : 0;
4700 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4701 we have to sign or zero-extend the values. */
4702 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4703 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4705 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4707 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4708 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4710 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4711 l0s |= ((HOST_WIDE_INT) (-1) << width);
4713 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4714 l1s |= ((HOST_WIDE_INT) (-1) << width);
4717 equal = (h0u == h1u && l0u == l1u);
4718 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4719 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4720 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4721 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4724 /* Otherwise, there are some code-specific tests we can make. */
4730 /* References to the frame plus a constant or labels cannot
4731 be zero, but a SYMBOL_REF can due to #pragma weak. */
4732 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4733 || GET_CODE (op0) == LABEL_REF)
4734 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4735 /* On some machines, the ap reg can be 0 sometimes. */
4736 && op0 != arg_pointer_rtx
4743 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4744 || GET_CODE (op0) == LABEL_REF)
4745 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4746 && op0 != arg_pointer_rtx
4749 return const_true_rtx;
4753 /* Unsigned values are never negative. */
4754 if (op1 == const0_rtx)
4755 return const_true_rtx;
4759 if (op1 == const0_rtx)
4764 /* Unsigned values are never greater than the largest
4766 if (GET_CODE (op1) == CONST_INT
4767 && INTVAL (op1) == GET_MODE_MASK (mode)
4768 && INTEGRAL_MODE_P (mode))
4769 return const_true_rtx;
4773 if (GET_CODE (op1) == CONST_INT
4774 && INTVAL (op1) == GET_MODE_MASK (mode)
4775 && INTEGRAL_MODE_P (mode))
4786 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4791 return equal ? const_true_rtx : const0_rtx;
4793 return ! equal ? const_true_rtx : const0_rtx;
4795 return op0lt ? const_true_rtx : const0_rtx;
4797 return op1lt ? const_true_rtx : const0_rtx;
4799 return op0ltu ? const_true_rtx : const0_rtx;
4801 return op1ltu ? const_true_rtx : const0_rtx;
4803 return equal || op0lt ? const_true_rtx : const0_rtx;
4805 return equal || op1lt ? const_true_rtx : const0_rtx;
4807 return equal || op0ltu ? const_true_rtx : const0_rtx;
4809 return equal || op1ltu ? const_true_rtx : const0_rtx;
4815 /* Simplify CODE, an operation with result mode MODE and three operands,
4816 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4817 a constant. Return 0 if no simplifications is possible. */
4820 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4822 enum machine_mode mode, op0_mode;
4825 int width = GET_MODE_BITSIZE (mode);
4827 /* VOIDmode means "infinite" precision. */
4829 width = HOST_BITS_PER_WIDE_INT;
4835 if (GET_CODE (op0) == CONST_INT
4836 && GET_CODE (op1) == CONST_INT
4837 && GET_CODE (op2) == CONST_INT
4838 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4839 && width <= HOST_BITS_PER_WIDE_INT)
4841 /* Extracting a bit-field from a constant */
4842 HOST_WIDE_INT val = INTVAL (op0);
4844 if (BITS_BIG_ENDIAN)
4845 val >>= (GET_MODE_BITSIZE (op0_mode)
4846 - INTVAL (op2) - INTVAL (op1));
4848 val >>= INTVAL (op2);
4850 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4852 /* First zero-extend. */
4853 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4854 /* If desired, propagate sign bit. */
4855 if (code == SIGN_EXTRACT
4856 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4857 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4860 /* Clear the bits that don't belong in our mode,
4861 unless they and our sign bit are all one.
4862 So we get either a reasonable negative value or a reasonable
4863 unsigned value for this mode. */
4864 if (width < HOST_BITS_PER_WIDE_INT
4865 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4866 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4867 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4869 return GEN_INT (val);
4874 if (GET_CODE (op0) == CONST_INT)
4875 return op0 != const0_rtx ? op1 : op2;
4877 /* Convert a == b ? b : a to "a". */
4878 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4879 && rtx_equal_p (XEXP (op0, 0), op1)
4880 && rtx_equal_p (XEXP (op0, 1), op2))
4882 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4883 && rtx_equal_p (XEXP (op0, 1), op1)
4884 && rtx_equal_p (XEXP (op0, 0), op2))
4886 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4889 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4890 XEXP (op0, 0), XEXP (op0, 1));
4891 /* See if any simplifications were possible. */
4892 if (temp == const0_rtx)
4894 else if (temp == const1_rtx)
4906 /* If X is a nontrivial arithmetic operation on an argument
4907 for which a constant value can be determined, return
4908 the result of operating on that value, as a constant.
4909 Otherwise, return X, possibly with one or more operands
4910 modified by recursive calls to this function.
4912 If X is a register whose contents are known, we do NOT
4913 return those contents here. equiv_constant is called to
4916 INSN is the insn that we may be modifying. If it is 0, make a copy
4917 of X before modifying it. */
4924 register enum rtx_code code;
4925 register enum machine_mode mode;
4932 /* Folded equivalents of first two operands of X. */
4936 /* Constant equivalents of first three operands of X;
4937 0 when no such equivalent is known. */
4942 /* The mode of the first operand of X. We need this for sign and zero
4944 enum machine_mode mode_arg0;
4949 mode = GET_MODE (x);
4950 code = GET_CODE (x);
4959 /* No use simplifying an EXPR_LIST
4960 since they are used only for lists of args
4961 in a function call's REG_EQUAL note. */
4963 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4964 want to (e.g.,) make (addressof (const_int 0)) just because
4965 the location is known to be zero. */
4971 return prev_insn_cc0;
4975 /* If the next insn is a CODE_LABEL followed by a jump table,
4976 PC's value is a LABEL_REF pointing to that label. That
4977 lets us fold switch statements on the Vax. */
4978 if (insn && GET_CODE (insn) == JUMP_INSN)
4980 rtx next = next_nonnote_insn (insn);
4982 if (next && GET_CODE (next) == CODE_LABEL
4983 && NEXT_INSN (next) != 0
4984 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4985 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4986 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4987 return gen_rtx_LABEL_REF (Pmode, next);
4992 /* See if we previously assigned a constant value to this SUBREG. */
4993 if ((new = lookup_as_function (x, CONST_INT)) != 0
4994 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4997 /* If this is a paradoxical SUBREG, we have no idea what value the
4998 extra bits would have. However, if the operand is equivalent
4999 to a SUBREG whose operand is the same as our mode, and all the
5000 modes are within a word, we can just use the inner operand
5001 because these SUBREGs just say how to treat the register.
5003 Similarly if we find an integer constant. */
5005 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
5007 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
5008 struct table_elt *elt;
5010 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
5011 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
5012 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
5014 for (elt = elt->first_same_value;
5015 elt; elt = elt->next_same_value)
5017 if (CONSTANT_P (elt->exp)
5018 && GET_MODE (elt->exp) == VOIDmode)
5021 if (GET_CODE (elt->exp) == SUBREG
5022 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5023 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5024 return copy_rtx (SUBREG_REG (elt->exp));
5030 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5031 We might be able to if the SUBREG is extracting a single word in an
5032 integral mode or extracting the low part. */
5034 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
5035 const_arg0 = equiv_constant (folded_arg0);
5037 folded_arg0 = const_arg0;
5039 if (folded_arg0 != SUBREG_REG (x))
5043 if (GET_MODE_CLASS (mode) == MODE_INT
5044 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5045 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
5046 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
5047 GET_MODE (SUBREG_REG (x)));
5048 if (new == 0 && subreg_lowpart_p (x))
5049 new = gen_lowpart_if_possible (mode, folded_arg0);
5054 /* If this is a narrowing SUBREG and our operand is a REG, see if
5055 we can find an equivalence for REG that is an arithmetic operation
5056 in a wider mode where both operands are paradoxical SUBREGs
5057 from objects of our result mode. In that case, we couldn't report
5058 an equivalent value for that operation, since we don't know what the
5059 extra bits will be. But we can find an equivalence for this SUBREG
5060 by folding that operation is the narrow mode. This allows us to
5061 fold arithmetic in narrow modes when the machine only supports
5062 word-sized arithmetic.
5064 Also look for a case where we have a SUBREG whose operand is the
5065 same as our result. If both modes are smaller than a word, we
5066 are simply interpreting a register in different modes and we
5067 can use the inner value. */
5069 if (GET_CODE (folded_arg0) == REG
5070 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
5071 && subreg_lowpart_p (x))
5073 struct table_elt *elt;
5075 /* We can use HASH here since we know that canon_hash won't be
5077 elt = lookup (folded_arg0,
5078 HASH (folded_arg0, GET_MODE (folded_arg0)),
5079 GET_MODE (folded_arg0));
5082 elt = elt->first_same_value;
5084 for (; elt; elt = elt->next_same_value)
5086 enum rtx_code eltcode = GET_CODE (elt->exp);
5088 /* Just check for unary and binary operations. */
5089 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
5090 && GET_CODE (elt->exp) != SIGN_EXTEND
5091 && GET_CODE (elt->exp) != ZERO_EXTEND
5092 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5093 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
5095 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
5097 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5098 op0 = fold_rtx (op0, NULL_RTX);
5100 op0 = equiv_constant (op0);
5102 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
5105 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
5106 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
5107 && eltcode != DIV && eltcode != MOD
5108 && eltcode != UDIV && eltcode != UMOD
5109 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
5110 && eltcode != ROTATE && eltcode != ROTATERT
5111 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5112 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
5114 || CONSTANT_P (XEXP (elt->exp, 0)))
5115 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
5116 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
5118 || CONSTANT_P (XEXP (elt->exp, 1))))
5120 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
5121 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
5123 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5124 op0 = fold_rtx (op0, NULL_RTX);
5127 op0 = equiv_constant (op0);
5129 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5130 op1 = fold_rtx (op1, NULL_RTX);
5133 op1 = equiv_constant (op1);
5135 /* If we are looking for the low SImode part of
5136 (ashift:DI c (const_int 32)), it doesn't work
5137 to compute that in SImode, because a 32-bit shift
5138 in SImode is unpredictable. We know the value is 0. */
5140 && GET_CODE (elt->exp) == ASHIFT
5141 && GET_CODE (op1) == CONST_INT
5142 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5144 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5146 /* If the count fits in the inner mode's width,
5147 but exceeds the outer mode's width,
5148 the value will get truncated to 0
5152 /* If the count exceeds even the inner mode's width,
5153 don't fold this expression. */
5156 else if (op0 && op1)
5157 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5161 else if (GET_CODE (elt->exp) == SUBREG
5162 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5163 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5165 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5166 new = copy_rtx (SUBREG_REG (elt->exp));
5177 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5178 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5179 new = lookup_as_function (XEXP (x, 0), code);
5181 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5185 /* If we are not actually processing an insn, don't try to find the
5186 best address. Not only don't we care, but we could modify the
5187 MEM in an invalid way since we have no insn to validate against. */
5189 find_best_addr (insn, &XEXP (x, 0));
5192 /* Even if we don't fold in the insn itself,
5193 we can safely do so here, in hopes of getting a constant. */
5194 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5196 HOST_WIDE_INT offset = 0;
5198 if (GET_CODE (addr) == REG
5199 && REGNO_QTY_VALID_P (REGNO (addr))
5200 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
5201 && qty_const[reg_qty[REGNO (addr)]] != 0)
5202 addr = qty_const[reg_qty[REGNO (addr)]];
5204 /* If address is constant, split it into a base and integer offset. */
5205 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5207 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5208 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5210 base = XEXP (XEXP (addr, 0), 0);
5211 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5213 else if (GET_CODE (addr) == LO_SUM
5214 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5215 base = XEXP (addr, 1);
5216 else if (GET_CODE (addr) == ADDRESSOF)
5217 return change_address (x, VOIDmode, addr);
5219 /* If this is a constant pool reference, we can fold it into its
5220 constant to allow better value tracking. */
5221 if (base && GET_CODE (base) == SYMBOL_REF
5222 && CONSTANT_POOL_ADDRESS_P (base))
5224 rtx constant = get_pool_constant (base);
5225 enum machine_mode const_mode = get_pool_mode (base);
5228 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5229 constant_pool_entries_cost = COST (constant);
5231 /* If we are loading the full constant, we have an equivalence. */
5232 if (offset == 0 && mode == const_mode)
5235 /* If this actually isn't a constant (weird!), we can't do
5236 anything. Otherwise, handle the two most common cases:
5237 extracting a word from a multi-word constant, and extracting
5238 the low-order bits. Other cases don't seem common enough to
5240 if (! CONSTANT_P (constant))
5243 if (GET_MODE_CLASS (mode) == MODE_INT
5244 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5245 && offset % UNITS_PER_WORD == 0
5246 && (new = operand_subword (constant,
5247 offset / UNITS_PER_WORD,
5248 0, const_mode)) != 0)
5251 if (((BYTES_BIG_ENDIAN
5252 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5253 || (! BYTES_BIG_ENDIAN && offset == 0))
5254 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5258 /* If this is a reference to a label at a known position in a jump
5259 table, we also know its value. */
5260 if (base && GET_CODE (base) == LABEL_REF)
5262 rtx label = XEXP (base, 0);
5263 rtx table_insn = NEXT_INSN (label);
5265 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5266 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5268 rtx table = PATTERN (table_insn);
5271 && (offset / GET_MODE_SIZE (GET_MODE (table))
5272 < XVECLEN (table, 0)))
5273 return XVECEXP (table, 0,
5274 offset / GET_MODE_SIZE (GET_MODE (table)));
5276 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5277 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5279 rtx table = PATTERN (table_insn);
5282 && (offset / GET_MODE_SIZE (GET_MODE (table))
5283 < XVECLEN (table, 1)))
5285 offset /= GET_MODE_SIZE (GET_MODE (table));
5286 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5289 if (GET_MODE (table) != Pmode)
5290 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5292 /* Indicate this is a constant. This isn't a
5293 valid form of CONST, but it will only be used
5294 to fold the next insns and then discarded, so
5297 Note this expression must be explicitly discarded,
5298 by cse_insn, else it may end up in a REG_EQUAL note
5299 and "escape" to cause problems elsewhere. */
5300 return gen_rtx_CONST (GET_MODE (new), new);
5309 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5310 validate_change (insn, &XVECEXP (x, 3, i),
5311 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5321 mode_arg0 = VOIDmode;
5323 /* Try folding our operands.
5324 Then see which ones have constant values known. */
5326 fmt = GET_RTX_FORMAT (code);
5327 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5330 rtx arg = XEXP (x, i);
5331 rtx folded_arg = arg, const_arg = 0;
5332 enum machine_mode mode_arg = GET_MODE (arg);
5333 rtx cheap_arg, expensive_arg;
5334 rtx replacements[2];
5337 /* Most arguments are cheap, so handle them specially. */
5338 switch (GET_CODE (arg))
5341 /* This is the same as calling equiv_constant; it is duplicated
5343 if (REGNO_QTY_VALID_P (REGNO (arg))
5344 && qty_const[reg_qty[REGNO (arg)]] != 0
5345 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5346 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5348 = gen_lowpart_if_possible (GET_MODE (arg),
5349 qty_const[reg_qty[REGNO (arg)]]);
5362 folded_arg = prev_insn_cc0;
5363 mode_arg = prev_insn_cc0_mode;
5364 const_arg = equiv_constant (folded_arg);
5369 folded_arg = fold_rtx (arg, insn);
5370 const_arg = equiv_constant (folded_arg);
5373 /* For the first three operands, see if the operand
5374 is constant or equivalent to a constant. */
5378 folded_arg0 = folded_arg;
5379 const_arg0 = const_arg;
5380 mode_arg0 = mode_arg;
5383 folded_arg1 = folded_arg;
5384 const_arg1 = const_arg;
5387 const_arg2 = const_arg;
5391 /* Pick the least expensive of the folded argument and an
5392 equivalent constant argument. */
5393 if (const_arg == 0 || const_arg == folded_arg
5394 || COST (const_arg) > COST (folded_arg))
5395 cheap_arg = folded_arg, expensive_arg = const_arg;
5397 cheap_arg = const_arg, expensive_arg = folded_arg;
5399 /* Try to replace the operand with the cheapest of the two
5400 possibilities. If it doesn't work and this is either of the first
5401 two operands of a commutative operation, try swapping them.
5402 If THAT fails, try the more expensive, provided it is cheaper
5403 than what is already there. */
5405 if (cheap_arg == XEXP (x, i))
5408 if (insn == 0 && ! copied)
5414 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5416 j < 2 && replacements[j]
5417 && COST (replacements[j]) < COST (XEXP (x, i));
5420 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5423 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5425 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5426 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5428 if (apply_change_group ())
5430 /* Swap them back to be invalid so that this loop can
5431 continue and flag them to be swapped back later. */
5434 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5446 /* Don't try to fold inside of a vector of expressions.
5447 Doing nothing is harmless. */
5451 /* If a commutative operation, place a constant integer as the second
5452 operand unless the first operand is also a constant integer. Otherwise,
5453 place any constant second unless the first operand is also a constant. */
5455 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5457 if (must_swap || (const_arg0
5459 || (GET_CODE (const_arg0) == CONST_INT
5460 && GET_CODE (const_arg1) != CONST_INT))))
5462 register rtx tem = XEXP (x, 0);
5464 if (insn == 0 && ! copied)
5470 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5471 validate_change (insn, &XEXP (x, 1), tem, 1);
5472 if (apply_change_group ())
5474 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5475 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5480 /* If X is an arithmetic operation, see if we can simplify it. */
5482 switch (GET_RTX_CLASS (code))
5488 /* We can't simplify extension ops unless we know the
5490 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5491 && mode_arg0 == VOIDmode)
5494 /* If we had a CONST, strip it off and put it back later if we
5496 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5497 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5499 new = simplify_unary_operation (code, mode,
5500 const_arg0 ? const_arg0 : folded_arg0,
5502 if (new != 0 && is_const)
5503 new = gen_rtx_CONST (mode, new);
5508 /* See what items are actually being compared and set FOLDED_ARG[01]
5509 to those values and CODE to the actual comparison code. If any are
5510 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5511 do anything if both operands are already known to be constant. */
5513 if (const_arg0 == 0 || const_arg1 == 0)
5515 struct table_elt *p0, *p1;
5516 rtx true = const_true_rtx, false = const0_rtx;
5517 enum machine_mode mode_arg1;
5519 #ifdef FLOAT_STORE_FLAG_VALUE
5520 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5522 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5524 false = CONST0_RTX (mode);
5528 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5529 &mode_arg0, &mode_arg1);
5530 const_arg0 = equiv_constant (folded_arg0);
5531 const_arg1 = equiv_constant (folded_arg1);
5533 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5534 what kinds of things are being compared, so we can't do
5535 anything with this comparison. */
5537 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5540 /* If we do not now have two constants being compared, see
5541 if we can nevertheless deduce some things about the
5543 if (const_arg0 == 0 || const_arg1 == 0)
5545 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5546 non-explicit constant? These aren't zero, but we
5547 don't know their sign. */
5548 if (const_arg1 == const0_rtx
5549 && (NONZERO_BASE_PLUS_P (folded_arg0)
5550 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5552 || GET_CODE (folded_arg0) == SYMBOL_REF
5554 || GET_CODE (folded_arg0) == LABEL_REF
5555 || GET_CODE (folded_arg0) == CONST))
5559 else if (code == NE)
5563 /* See if the two operands are the same. We don't do this
5564 for IEEE floating-point since we can't assume x == x
5565 since x might be a NaN. */
5567 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5568 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5569 && (folded_arg0 == folded_arg1
5570 || (GET_CODE (folded_arg0) == REG
5571 && GET_CODE (folded_arg1) == REG
5572 && (reg_qty[REGNO (folded_arg0)]
5573 == reg_qty[REGNO (folded_arg1)]))
5574 || ((p0 = lookup (folded_arg0,
5575 (safe_hash (folded_arg0, mode_arg0)
5576 % NBUCKETS), mode_arg0))
5577 && (p1 = lookup (folded_arg1,
5578 (safe_hash (folded_arg1, mode_arg0)
5579 % NBUCKETS), mode_arg0))
5580 && p0->first_same_value == p1->first_same_value)))
5581 return ((code == EQ || code == LE || code == GE
5582 || code == LEU || code == GEU)
5585 /* If FOLDED_ARG0 is a register, see if the comparison we are
5586 doing now is either the same as we did before or the reverse
5587 (we only check the reverse if not floating-point). */
5588 else if (GET_CODE (folded_arg0) == REG)
5590 int qty = reg_qty[REGNO (folded_arg0)];
5592 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5593 && (comparison_dominates_p (qty_comparison_code[qty], code)
5594 || (comparison_dominates_p (qty_comparison_code[qty],
5595 reverse_condition (code))
5596 && ! FLOAT_MODE_P (mode_arg0)))
5597 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5599 && rtx_equal_p (qty_comparison_const[qty],
5601 || (GET_CODE (folded_arg1) == REG
5602 && (reg_qty[REGNO (folded_arg1)]
5603 == qty_comparison_qty[qty]))))
5604 return (comparison_dominates_p (qty_comparison_code[qty],
5611 /* If we are comparing against zero, see if the first operand is
5612 equivalent to an IOR with a constant. If so, we may be able to
5613 determine the result of this comparison. */
5615 if (const_arg1 == const0_rtx)
5617 rtx y = lookup_as_function (folded_arg0, IOR);
5621 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5622 && GET_CODE (inner_const) == CONST_INT
5623 && INTVAL (inner_const) != 0)
5625 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5626 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5627 && (INTVAL (inner_const)
5628 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5629 rtx true = const_true_rtx, false = const0_rtx;
5631 #ifdef FLOAT_STORE_FLAG_VALUE
5632 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5634 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5636 false = CONST0_RTX (mode);
5660 new = simplify_relational_operation (code, mode_arg0,
5661 const_arg0 ? const_arg0 : folded_arg0,
5662 const_arg1 ? const_arg1 : folded_arg1);
5663 #ifdef FLOAT_STORE_FLAG_VALUE
5664 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5665 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5666 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5675 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5676 with that LABEL_REF as its second operand. If so, the result is
5677 the first operand of that MINUS. This handles switches with an
5678 ADDR_DIFF_VEC table. */
5679 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5682 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5683 : lookup_as_function (folded_arg0, MINUS);
5685 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5686 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5689 /* Now try for a CONST of a MINUS like the above. */
5690 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5691 : lookup_as_function (folded_arg0, CONST))) != 0
5692 && GET_CODE (XEXP (y, 0)) == MINUS
5693 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5694 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5695 return XEXP (XEXP (y, 0), 0);
5698 /* Likewise if the operands are in the other order. */
5699 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5702 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5703 : lookup_as_function (folded_arg1, MINUS);
5705 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5706 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5709 /* Now try for a CONST of a MINUS like the above. */
5710 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5711 : lookup_as_function (folded_arg1, CONST))) != 0
5712 && GET_CODE (XEXP (y, 0)) == MINUS
5713 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5714 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5715 return XEXP (XEXP (y, 0), 0);
5718 /* If second operand is a register equivalent to a negative
5719 CONST_INT, see if we can find a register equivalent to the
5720 positive constant. Make a MINUS if so. Don't do this for
5721 a non-negative constant since we might then alternate between
5722 chosing positive and negative constants. Having the positive
5723 constant previously-used is the more common case. Be sure
5724 the resulting constant is non-negative; if const_arg1 were
5725 the smallest negative number this would overflow: depending
5726 on the mode, this would either just be the same value (and
5727 hence not save anything) or be incorrect. */
5728 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5729 && INTVAL (const_arg1) < 0
5730 && - INTVAL (const_arg1) >= 0
5731 && GET_CODE (folded_arg1) == REG)
5733 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5735 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5739 for (p = p->first_same_value; p; p = p->next_same_value)
5740 if (GET_CODE (p->exp) == REG)
5741 return cse_gen_binary (MINUS, mode, folded_arg0,
5742 canon_reg (p->exp, NULL_RTX));
5747 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5748 If so, produce (PLUS Z C2-C). */
5749 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5751 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5752 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5753 return fold_rtx (plus_constant (copy_rtx (y),
5754 -INTVAL (const_arg1)),
5758 /* ... fall through ... */
5761 case SMIN: case SMAX: case UMIN: case UMAX:
5762 case IOR: case AND: case XOR:
5763 case MULT: case DIV: case UDIV:
5764 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5765 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5766 is known to be of similar form, we may be able to replace the
5767 operation with a combined operation. This may eliminate the
5768 intermediate operation if every use is simplified in this way.
5769 Note that the similar optimization done by combine.c only works
5770 if the intermediate operation's result has only one reference. */
5772 if (GET_CODE (folded_arg0) == REG
5773 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5776 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5777 rtx y = lookup_as_function (folded_arg0, code);
5779 enum rtx_code associate_code;
5783 || 0 == (inner_const
5784 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5785 || GET_CODE (inner_const) != CONST_INT
5786 /* If we have compiled a statement like
5787 "if (x == (x & mask1))", and now are looking at
5788 "x & mask2", we will have a case where the first operand
5789 of Y is the same as our first operand. Unless we detect
5790 this case, an infinite loop will result. */
5791 || XEXP (y, 0) == folded_arg0)
5794 /* Don't associate these operations if they are a PLUS with the
5795 same constant and it is a power of two. These might be doable
5796 with a pre- or post-increment. Similarly for two subtracts of
5797 identical powers of two with post decrement. */
5799 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5800 && ((HAVE_PRE_INCREMENT
5801 && exact_log2 (INTVAL (const_arg1)) >= 0)
5802 || (HAVE_POST_INCREMENT
5803 && exact_log2 (INTVAL (const_arg1)) >= 0)
5804 || (HAVE_PRE_DECREMENT
5805 && exact_log2 (- INTVAL (const_arg1)) >= 0)
5806 || (HAVE_POST_DECREMENT
5807 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
5810 /* Compute the code used to compose the constants. For example,
5811 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5814 = (code == MULT || code == DIV || code == UDIV ? MULT
5815 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5817 new_const = simplify_binary_operation (associate_code, mode,
5818 const_arg1, inner_const);
5823 /* If we are associating shift operations, don't let this
5824 produce a shift of the size of the object or larger.
5825 This could occur when we follow a sign-extend by a right
5826 shift on a machine that does a sign-extend as a pair
5829 if (is_shift && GET_CODE (new_const) == CONST_INT
5830 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5832 /* As an exception, we can turn an ASHIFTRT of this
5833 form into a shift of the number of bits - 1. */
5834 if (code == ASHIFTRT)
5835 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5840 y = copy_rtx (XEXP (y, 0));
5842 /* If Y contains our first operand (the most common way this
5843 can happen is if Y is a MEM), we would do into an infinite
5844 loop if we tried to fold it. So don't in that case. */
5846 if (! reg_mentioned_p (folded_arg0, y))
5847 y = fold_rtx (y, insn);
5849 return cse_gen_binary (code, mode, y, new_const);
5857 new = simplify_binary_operation (code, mode,
5858 const_arg0 ? const_arg0 : folded_arg0,
5859 const_arg1 ? const_arg1 : folded_arg1);
5863 /* (lo_sum (high X) X) is simply X. */
5864 if (code == LO_SUM && const_arg0 != 0
5865 && GET_CODE (const_arg0) == HIGH
5866 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5872 new = simplify_ternary_operation (code, mode, mode_arg0,
5873 const_arg0 ? const_arg0 : folded_arg0,
5874 const_arg1 ? const_arg1 : folded_arg1,
5875 const_arg2 ? const_arg2 : XEXP (x, 2));
5879 /* Always eliminate CONSTANT_P_RTX at this stage. */
5880 if (code == CONSTANT_P_RTX)
5881 return (const_arg0 ? const1_rtx : const0_rtx);
5885 return new ? new : x;
5888 /* Return a constant value currently equivalent to X.
5889 Return 0 if we don't know one. */
5895 if (GET_CODE (x) == REG
5896 && REGNO_QTY_VALID_P (REGNO (x))
5897 && qty_const[reg_qty[REGNO (x)]])
5898 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5900 if (x == 0 || CONSTANT_P (x))
5903 /* If X is a MEM, try to fold it outside the context of any insn to see if
5904 it might be equivalent to a constant. That handles the case where it
5905 is a constant-pool reference. Then try to look it up in the hash table
5906 in case it is something whose value we have seen before. */
5908 if (GET_CODE (x) == MEM)
5910 struct table_elt *elt;
5912 x = fold_rtx (x, NULL_RTX);
5916 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5920 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5921 if (elt->is_const && CONSTANT_P (elt->exp))
5928 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5929 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5930 least-significant part of X.
5931 MODE specifies how big a part of X to return.
5933 If the requested operation cannot be done, 0 is returned.
5935 This is similar to gen_lowpart in emit-rtl.c. */
5938 gen_lowpart_if_possible (mode, x)
5939 enum machine_mode mode;
5942 rtx result = gen_lowpart_common (mode, x);
5946 else if (GET_CODE (x) == MEM)
5948 /* This is the only other case we handle. */
5949 register int offset = 0;
5952 if (WORDS_BIG_ENDIAN)
5953 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5954 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5955 if (BYTES_BIG_ENDIAN)
5956 /* Adjust the address so that the address-after-the-data is
5958 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5959 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5960 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
5961 if (! memory_address_p (mode, XEXP (new, 0)))
5963 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5964 MEM_COPY_ATTRIBUTES (new, x);
5971 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5972 branch. It will be zero if not.
5974 In certain cases, this can cause us to add an equivalence. For example,
5975 if we are following the taken case of
5977 we can add the fact that `i' and '2' are now equivalent.
5979 In any case, we can record that this comparison was passed. If the same
5980 comparison is seen later, we will know its value. */
5983 record_jump_equiv (insn, taken)
5987 int cond_known_true;
5989 enum machine_mode mode, mode0, mode1;
5990 int reversed_nonequality = 0;
5993 /* Ensure this is the right kind of insn. */
5994 if (! condjump_p (insn) || simplejump_p (insn))
5997 /* See if this jump condition is known true or false. */
5999 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
6001 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
6003 /* Get the type of comparison being done and the operands being compared.
6004 If we had to reverse a non-equality condition, record that fact so we
6005 know that it isn't valid for floating-point. */
6006 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
6007 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
6008 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
6010 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
6011 if (! cond_known_true)
6013 reversed_nonequality = (code != EQ && code != NE);
6014 code = reverse_condition (code);
6017 /* The mode is the mode of the non-constant. */
6019 if (mode1 != VOIDmode)
6022 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
6025 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6026 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6027 Make any useful entries we can with that information. Called from
6028 above function and called recursively. */
6031 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
6033 enum machine_mode mode;
6035 int reversed_nonequality;
6037 unsigned op0_hash, op1_hash;
6038 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
6039 struct table_elt *op0_elt, *op1_elt;
6041 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6042 we know that they are also equal in the smaller mode (this is also
6043 true for all smaller modes whether or not there is a SUBREG, but
6044 is not worth testing for with no SUBREG). */
6046 /* Note that GET_MODE (op0) may not equal MODE. */
6047 if (code == EQ && GET_CODE (op0) == SUBREG
6048 && (GET_MODE_SIZE (GET_MODE (op0))
6049 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6051 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6052 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6054 record_jump_cond (code, mode, SUBREG_REG (op0),
6055 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6056 reversed_nonequality);
6059 if (code == EQ && GET_CODE (op1) == SUBREG
6060 && (GET_MODE_SIZE (GET_MODE (op1))
6061 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6063 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6064 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6066 record_jump_cond (code, mode, SUBREG_REG (op1),
6067 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6068 reversed_nonequality);
6071 /* Similarly, if this is an NE comparison, and either is a SUBREG
6072 making a smaller mode, we know the whole thing is also NE. */
6074 /* Note that GET_MODE (op0) may not equal MODE;
6075 if we test MODE instead, we can get an infinite recursion
6076 alternating between two modes each wider than MODE. */
6078 if (code == NE && GET_CODE (op0) == SUBREG
6079 && subreg_lowpart_p (op0)
6080 && (GET_MODE_SIZE (GET_MODE (op0))
6081 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6083 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6084 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6086 record_jump_cond (code, mode, SUBREG_REG (op0),
6087 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6088 reversed_nonequality);
6091 if (code == NE && GET_CODE (op1) == SUBREG
6092 && subreg_lowpart_p (op1)
6093 && (GET_MODE_SIZE (GET_MODE (op1))
6094 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6096 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6097 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6099 record_jump_cond (code, mode, SUBREG_REG (op1),
6100 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6101 reversed_nonequality);
6104 /* Hash both operands. */
6107 hash_arg_in_memory = 0;
6108 hash_arg_in_struct = 0;
6109 op0_hash = HASH (op0, mode);
6110 op0_in_memory = hash_arg_in_memory;
6111 op0_in_struct = hash_arg_in_struct;
6117 hash_arg_in_memory = 0;
6118 hash_arg_in_struct = 0;
6119 op1_hash = HASH (op1, mode);
6120 op1_in_memory = hash_arg_in_memory;
6121 op1_in_struct = hash_arg_in_struct;
6126 /* Look up both operands. */
6127 op0_elt = lookup (op0, op0_hash, mode);
6128 op1_elt = lookup (op1, op1_hash, mode);
6130 /* If both operands are already equivalent or if they are not in the
6131 table but are identical, do nothing. */
6132 if ((op0_elt != 0 && op1_elt != 0
6133 && op0_elt->first_same_value == op1_elt->first_same_value)
6134 || op0 == op1 || rtx_equal_p (op0, op1))
6137 /* If we aren't setting two things equal all we can do is save this
6138 comparison. Similarly if this is floating-point. In the latter
6139 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6140 If we record the equality, we might inadvertently delete code
6141 whose intent was to change -0 to +0. */
6143 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6145 /* If we reversed a floating-point comparison, if OP0 is not a
6146 register, or if OP1 is neither a register or constant, we can't
6149 if (GET_CODE (op1) != REG)
6150 op1 = equiv_constant (op1);
6152 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6153 || GET_CODE (op0) != REG || op1 == 0)
6156 /* Put OP0 in the hash table if it isn't already. This gives it a
6157 new quantity number. */
6160 if (insert_regs (op0, NULL_PTR, 0))
6162 rehash_using_reg (op0);
6163 op0_hash = HASH (op0, mode);
6165 /* If OP0 is contained in OP1, this changes its hash code
6166 as well. Faster to rehash than to check, except
6167 for the simple case of a constant. */
6168 if (! CONSTANT_P (op1))
6169 op1_hash = HASH (op1,mode);
6172 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6173 op0_elt->in_memory = op0_in_memory;
6174 op0_elt->in_struct = op0_in_struct;
6177 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
6178 if (GET_CODE (op1) == REG)
6180 /* Look it up again--in case op0 and op1 are the same. */
6181 op1_elt = lookup (op1, op1_hash, mode);
6183 /* Put OP1 in the hash table so it gets a new quantity number. */
6186 if (insert_regs (op1, NULL_PTR, 0))
6188 rehash_using_reg (op1);
6189 op1_hash = HASH (op1, mode);
6192 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6193 op1_elt->in_memory = op1_in_memory;
6194 op1_elt->in_struct = op1_in_struct;
6197 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
6198 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
6202 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
6203 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
6209 /* If either side is still missing an equivalence, make it now,
6210 then merge the equivalences. */
6214 if (insert_regs (op0, NULL_PTR, 0))
6216 rehash_using_reg (op0);
6217 op0_hash = HASH (op0, mode);
6220 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6221 op0_elt->in_memory = op0_in_memory;
6222 op0_elt->in_struct = op0_in_struct;
6227 if (insert_regs (op1, NULL_PTR, 0))
6229 rehash_using_reg (op1);
6230 op1_hash = HASH (op1, mode);
6233 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6234 op1_elt->in_memory = op1_in_memory;
6235 op1_elt->in_struct = op1_in_struct;
6238 merge_equiv_classes (op0_elt, op1_elt);
6239 last_jump_equiv_class = op0_elt;
6242 /* CSE processing for one instruction.
6243 First simplify sources and addresses of all assignments
6244 in the instruction, using previously-computed equivalents values.
6245 Then install the new sources and destinations in the table
6246 of available values.
6248 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6249 the insn. It means that INSN is inside libcall block. In this
6250 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6252 /* Data on one SET contained in the instruction. */
6256 /* The SET rtx itself. */
6258 /* The SET_SRC of the rtx (the original value, if it is changing). */
6260 /* The hash-table element for the SET_SRC of the SET. */
6261 struct table_elt *src_elt;
6262 /* Hash value for the SET_SRC. */
6264 /* Hash value for the SET_DEST. */
6266 /* The SET_DEST, with SUBREG, etc., stripped. */
6268 /* Place where the pointer to the INNER_DEST was found. */
6269 rtx *inner_dest_loc;
6270 /* Nonzero if the SET_SRC is in memory. */
6272 /* Nonzero if the SET_SRC is in a structure. */
6274 /* Nonzero if the SET_SRC contains something
6275 whose value cannot be predicted and understood. */
6277 /* Original machine mode, in case it becomes a CONST_INT. */
6278 enum machine_mode mode;
6279 /* A constant equivalent for SET_SRC, if any. */
6281 /* Hash value of constant equivalent for SET_SRC. */
6282 unsigned src_const_hash;
6283 /* Table entry for constant equivalent for SET_SRC, if any. */
6284 struct table_elt *src_const_elt;
6288 cse_insn (insn, libcall_insn)
6292 register rtx x = PATTERN (insn);
6295 register int n_sets = 0;
6298 /* Records what this insn does to set CC0. */
6299 rtx this_insn_cc0 = 0;
6300 enum machine_mode this_insn_cc0_mode = VOIDmode;
6304 struct table_elt *src_eqv_elt = 0;
6305 int src_eqv_volatile;
6306 int src_eqv_in_memory;
6307 int src_eqv_in_struct;
6308 unsigned src_eqv_hash;
6314 /* Find all the SETs and CLOBBERs in this instruction.
6315 Record all the SETs in the array `set' and count them.
6316 Also determine whether there is a CLOBBER that invalidates
6317 all memory references, or all references at varying addresses. */
6319 if (GET_CODE (insn) == CALL_INSN)
6321 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6322 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6323 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6326 if (GET_CODE (x) == SET)
6328 sets = (struct set *) alloca (sizeof (struct set));
6331 /* Ignore SETs that are unconditional jumps.
6332 They never need cse processing, so this does not hurt.
6333 The reason is not efficiency but rather
6334 so that we can test at the end for instructions
6335 that have been simplified to unconditional jumps
6336 and not be misled by unchanged instructions
6337 that were unconditional jumps to begin with. */
6338 if (SET_DEST (x) == pc_rtx
6339 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6342 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6343 The hard function value register is used only once, to copy to
6344 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6345 Ensure we invalidate the destination register. On the 80386 no
6346 other code would invalidate it since it is a fixed_reg.
6347 We need not check the return of apply_change_group; see canon_reg. */
6349 else if (GET_CODE (SET_SRC (x)) == CALL)
6351 canon_reg (SET_SRC (x), insn);
6352 apply_change_group ();
6353 fold_rtx (SET_SRC (x), insn);
6354 invalidate (SET_DEST (x), VOIDmode);
6359 else if (GET_CODE (x) == PARALLEL)
6361 register int lim = XVECLEN (x, 0);
6363 sets = (struct set *) alloca (lim * sizeof (struct set));
6365 /* Find all regs explicitly clobbered in this insn,
6366 and ensure they are not replaced with any other regs
6367 elsewhere in this insn.
6368 When a reg that is clobbered is also used for input,
6369 we should presume that that is for a reason,
6370 and we should not substitute some other register
6371 which is not supposed to be clobbered.
6372 Therefore, this loop cannot be merged into the one below
6373 because a CALL may precede a CLOBBER and refer to the
6374 value clobbered. We must not let a canonicalization do
6375 anything in that case. */
6376 for (i = 0; i < lim; i++)
6378 register rtx y = XVECEXP (x, 0, i);
6379 if (GET_CODE (y) == CLOBBER)
6381 rtx clobbered = XEXP (y, 0);
6383 if (GET_CODE (clobbered) == REG
6384 || GET_CODE (clobbered) == SUBREG)
6385 invalidate (clobbered, VOIDmode);
6386 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6387 || GET_CODE (clobbered) == ZERO_EXTRACT)
6388 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6392 for (i = 0; i < lim; i++)
6394 register rtx y = XVECEXP (x, 0, i);
6395 if (GET_CODE (y) == SET)
6397 /* As above, we ignore unconditional jumps and call-insns and
6398 ignore the result of apply_change_group. */
6399 if (GET_CODE (SET_SRC (y)) == CALL)
6401 canon_reg (SET_SRC (y), insn);
6402 apply_change_group ();
6403 fold_rtx (SET_SRC (y), insn);
6404 invalidate (SET_DEST (y), VOIDmode);
6406 else if (SET_DEST (y) == pc_rtx
6407 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6410 sets[n_sets++].rtl = y;
6412 else if (GET_CODE (y) == CLOBBER)
6414 /* If we clobber memory, canon the address.
6415 This does nothing when a register is clobbered
6416 because we have already invalidated the reg. */
6417 if (GET_CODE (XEXP (y, 0)) == MEM)
6418 canon_reg (XEXP (y, 0), NULL_RTX);
6420 else if (GET_CODE (y) == USE
6421 && ! (GET_CODE (XEXP (y, 0)) == REG
6422 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6423 canon_reg (y, NULL_RTX);
6424 else if (GET_CODE (y) == CALL)
6426 /* The result of apply_change_group can be ignored; see
6428 canon_reg (y, insn);
6429 apply_change_group ();
6434 else if (GET_CODE (x) == CLOBBER)
6436 if (GET_CODE (XEXP (x, 0)) == MEM)
6437 canon_reg (XEXP (x, 0), NULL_RTX);
6440 /* Canonicalize a USE of a pseudo register or memory location. */
6441 else if (GET_CODE (x) == USE
6442 && ! (GET_CODE (XEXP (x, 0)) == REG
6443 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6444 canon_reg (XEXP (x, 0), NULL_RTX);
6445 else if (GET_CODE (x) == CALL)
6447 /* The result of apply_change_group can be ignored; see canon_reg. */
6448 canon_reg (x, insn);
6449 apply_change_group ();
6453 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6454 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6455 is handled specially for this case, and if it isn't set, then there will
6456 be no equivalence for the destination. */
6457 if (n_sets == 1 && REG_NOTES (insn) != 0
6458 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6459 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6460 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6461 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6463 /* Canonicalize sources and addresses of destinations.
6464 We do this in a separate pass to avoid problems when a MATCH_DUP is
6465 present in the insn pattern. In that case, we want to ensure that
6466 we don't break the duplicate nature of the pattern. So we will replace
6467 both operands at the same time. Otherwise, we would fail to find an
6468 equivalent substitution in the loop calling validate_change below.
6470 We used to suppress canonicalization of DEST if it appears in SRC,
6471 but we don't do this any more. */
6473 for (i = 0; i < n_sets; i++)
6475 rtx dest = SET_DEST (sets[i].rtl);
6476 rtx src = SET_SRC (sets[i].rtl);
6477 rtx new = canon_reg (src, insn);
6480 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6481 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6482 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6483 || (insn_code = recog_memoized (insn)) < 0
6484 || insn_n_dups[insn_code] > 0)
6485 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6487 SET_SRC (sets[i].rtl) = new;
6489 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6491 validate_change (insn, &XEXP (dest, 1),
6492 canon_reg (XEXP (dest, 1), insn), 1);
6493 validate_change (insn, &XEXP (dest, 2),
6494 canon_reg (XEXP (dest, 2), insn), 1);
6497 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6498 || GET_CODE (dest) == ZERO_EXTRACT
6499 || GET_CODE (dest) == SIGN_EXTRACT)
6500 dest = XEXP (dest, 0);
6502 if (GET_CODE (dest) == MEM)
6503 canon_reg (dest, insn);
6506 /* Now that we have done all the replacements, we can apply the change
6507 group and see if they all work. Note that this will cause some
6508 canonicalizations that would have worked individually not to be applied
6509 because some other canonicalization didn't work, but this should not
6512 The result of apply_change_group can be ignored; see canon_reg. */
6514 apply_change_group ();
6516 /* Set sets[i].src_elt to the class each source belongs to.
6517 Detect assignments from or to volatile things
6518 and set set[i] to zero so they will be ignored
6519 in the rest of this function.
6521 Nothing in this loop changes the hash table or the register chains. */
6523 for (i = 0; i < n_sets; i++)
6525 register rtx src, dest;
6526 register rtx src_folded;
6527 register struct table_elt *elt = 0, *p;
6528 enum machine_mode mode;
6531 rtx src_related = 0;
6532 struct table_elt *src_const_elt = 0;
6533 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6534 int src_related_cost = 10000, src_elt_cost = 10000;
6535 /* Set non-zero if we need to call force_const_mem on with the
6536 contents of src_folded before using it. */
6537 int src_folded_force_flag = 0;
6539 dest = SET_DEST (sets[i].rtl);
6540 src = SET_SRC (sets[i].rtl);
6542 /* If SRC is a constant that has no machine mode,
6543 hash it with the destination's machine mode.
6544 This way we can keep different modes separate. */
6546 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6547 sets[i].mode = mode;
6551 enum machine_mode eqvmode = mode;
6552 if (GET_CODE (dest) == STRICT_LOW_PART)
6553 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6555 hash_arg_in_memory = 0;
6556 hash_arg_in_struct = 0;
6557 src_eqv = fold_rtx (src_eqv, insn);
6558 src_eqv_hash = HASH (src_eqv, eqvmode);
6560 /* Find the equivalence class for the equivalent expression. */
6563 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6565 src_eqv_volatile = do_not_record;
6566 src_eqv_in_memory = hash_arg_in_memory;
6567 src_eqv_in_struct = hash_arg_in_struct;
6570 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6571 value of the INNER register, not the destination. So it is not
6572 a valid substitution for the source. But save it for later. */
6573 if (GET_CODE (dest) == STRICT_LOW_PART)
6576 src_eqv_here = src_eqv;
6578 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6579 simplified result, which may not necessarily be valid. */
6580 src_folded = fold_rtx (src, insn);
6583 /* ??? This caused bad code to be generated for the m68k port with -O2.
6584 Suppose src is (CONST_INT -1), and that after truncation src_folded
6585 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6586 At the end we will add src and src_const to the same equivalence
6587 class. We now have 3 and -1 on the same equivalence class. This
6588 causes later instructions to be mis-optimized. */
6589 /* If storing a constant in a bitfield, pre-truncate the constant
6590 so we will be able to record it later. */
6591 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6592 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6594 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6596 if (GET_CODE (src) == CONST_INT
6597 && GET_CODE (width) == CONST_INT
6598 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6599 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6601 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6602 << INTVAL (width)) - 1));
6606 /* Compute SRC's hash code, and also notice if it
6607 should not be recorded at all. In that case,
6608 prevent any further processing of this assignment. */
6610 hash_arg_in_memory = 0;
6611 hash_arg_in_struct = 0;
6614 sets[i].src_hash = HASH (src, mode);
6615 sets[i].src_volatile = do_not_record;
6616 sets[i].src_in_memory = hash_arg_in_memory;
6617 sets[i].src_in_struct = hash_arg_in_struct;
6619 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6620 a pseudo that is set more than once, do not record SRC. Using
6621 SRC as a replacement for anything else will be incorrect in that
6622 situation. Note that this usually occurs only for stack slots,
6623 in which case all the RTL would be referring to SRC, so we don't
6624 lose any optimization opportunities by not having SRC in the
6627 if (GET_CODE (src) == MEM
6628 && find_reg_note (insn, REG_EQUIV, src) != 0
6629 && GET_CODE (dest) == REG
6630 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6631 && REG_N_SETS (REGNO (dest)) != 1)
6632 sets[i].src_volatile = 1;
6635 /* It is no longer clear why we used to do this, but it doesn't
6636 appear to still be needed. So let's try without it since this
6637 code hurts cse'ing widened ops. */
6638 /* If source is a perverse subreg (such as QI treated as an SI),
6639 treat it as volatile. It may do the work of an SI in one context
6640 where the extra bits are not being used, but cannot replace an SI
6642 if (GET_CODE (src) == SUBREG
6643 && (GET_MODE_SIZE (GET_MODE (src))
6644 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6645 sets[i].src_volatile = 1;
6648 /* Locate all possible equivalent forms for SRC. Try to replace
6649 SRC in the insn with each cheaper equivalent.
6651 We have the following types of equivalents: SRC itself, a folded
6652 version, a value given in a REG_EQUAL note, or a value related
6655 Each of these equivalents may be part of an additional class
6656 of equivalents (if more than one is in the table, they must be in
6657 the same class; we check for this).
6659 If the source is volatile, we don't do any table lookups.
6661 We note any constant equivalent for possible later use in a
6664 if (!sets[i].src_volatile)
6665 elt = lookup (src, sets[i].src_hash, mode);
6667 sets[i].src_elt = elt;
6669 if (elt && src_eqv_here && src_eqv_elt)
6671 if (elt->first_same_value != src_eqv_elt->first_same_value)
6673 /* The REG_EQUAL is indicating that two formerly distinct
6674 classes are now equivalent. So merge them. */
6675 merge_equiv_classes (elt, src_eqv_elt);
6676 src_eqv_hash = HASH (src_eqv, elt->mode);
6677 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6683 else if (src_eqv_elt)
6686 /* Try to find a constant somewhere and record it in `src_const'.
6687 Record its table element, if any, in `src_const_elt'. Look in
6688 any known equivalences first. (If the constant is not in the
6689 table, also set `sets[i].src_const_hash'). */
6691 for (p = elt->first_same_value; p; p = p->next_same_value)
6695 src_const_elt = elt;
6700 && (CONSTANT_P (src_folded)
6701 /* Consider (minus (label_ref L1) (label_ref L2)) as
6702 "constant" here so we will record it. This allows us
6703 to fold switch statements when an ADDR_DIFF_VEC is used. */
6704 || (GET_CODE (src_folded) == MINUS
6705 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6706 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6707 src_const = src_folded, src_const_elt = elt;
6708 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6709 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6711 /* If we don't know if the constant is in the table, get its
6712 hash code and look it up. */
6713 if (src_const && src_const_elt == 0)
6715 sets[i].src_const_hash = HASH (src_const, mode);
6716 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6719 sets[i].src_const = src_const;
6720 sets[i].src_const_elt = src_const_elt;
6722 /* If the constant and our source are both in the table, mark them as
6723 equivalent. Otherwise, if a constant is in the table but the source
6724 isn't, set ELT to it. */
6725 if (src_const_elt && elt
6726 && src_const_elt->first_same_value != elt->first_same_value)
6727 merge_equiv_classes (elt, src_const_elt);
6728 else if (src_const_elt && elt == 0)
6729 elt = src_const_elt;
6731 /* See if there is a register linearly related to a constant
6732 equivalent of SRC. */
6734 && (GET_CODE (src_const) == CONST
6735 || (src_const_elt && src_const_elt->related_value != 0)))
6737 src_related = use_related_value (src_const, src_const_elt);
6740 struct table_elt *src_related_elt
6741 = lookup (src_related, HASH (src_related, mode), mode);
6742 if (src_related_elt && elt)
6744 if (elt->first_same_value
6745 != src_related_elt->first_same_value)
6746 /* This can occur when we previously saw a CONST
6747 involving a SYMBOL_REF and then see the SYMBOL_REF
6748 twice. Merge the involved classes. */
6749 merge_equiv_classes (elt, src_related_elt);
6752 src_related_elt = 0;
6754 else if (src_related_elt && elt == 0)
6755 elt = src_related_elt;
6759 /* See if we have a CONST_INT that is already in a register in a
6762 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6763 && GET_MODE_CLASS (mode) == MODE_INT
6764 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6766 enum machine_mode wider_mode;
6768 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6769 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6770 && src_related == 0;
6771 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6773 struct table_elt *const_elt
6774 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6779 for (const_elt = const_elt->first_same_value;
6780 const_elt; const_elt = const_elt->next_same_value)
6781 if (GET_CODE (const_elt->exp) == REG)
6783 src_related = gen_lowpart_if_possible (mode,
6790 /* Another possibility is that we have an AND with a constant in
6791 a mode narrower than a word. If so, it might have been generated
6792 as part of an "if" which would narrow the AND. If we already
6793 have done the AND in a wider mode, we can use a SUBREG of that
6796 if (flag_expensive_optimizations && ! src_related
6797 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6798 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6800 enum machine_mode tmode;
6801 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6803 for (tmode = GET_MODE_WIDER_MODE (mode);
6804 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6805 tmode = GET_MODE_WIDER_MODE (tmode))
6807 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6808 struct table_elt *larger_elt;
6812 PUT_MODE (new_and, tmode);
6813 XEXP (new_and, 0) = inner;
6814 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6815 if (larger_elt == 0)
6818 for (larger_elt = larger_elt->first_same_value;
6819 larger_elt; larger_elt = larger_elt->next_same_value)
6820 if (GET_CODE (larger_elt->exp) == REG)
6823 = gen_lowpart_if_possible (mode, larger_elt->exp);
6833 #ifdef LOAD_EXTEND_OP
6834 /* See if a MEM has already been loaded with a widening operation;
6835 if it has, we can use a subreg of that. Many CISC machines
6836 also have such operations, but this is only likely to be
6837 beneficial these machines. */
6839 if (flag_expensive_optimizations && src_related == 0
6840 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6841 && GET_MODE_CLASS (mode) == MODE_INT
6842 && GET_CODE (src) == MEM && ! do_not_record
6843 && LOAD_EXTEND_OP (mode) != NIL)
6845 enum machine_mode tmode;
6847 /* Set what we are trying to extend and the operation it might
6848 have been extended with. */
6849 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6850 XEXP (memory_extend_rtx, 0) = src;
6852 for (tmode = GET_MODE_WIDER_MODE (mode);
6853 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6854 tmode = GET_MODE_WIDER_MODE (tmode))
6856 struct table_elt *larger_elt;
6858 PUT_MODE (memory_extend_rtx, tmode);
6859 larger_elt = lookup (memory_extend_rtx,
6860 HASH (memory_extend_rtx, tmode), tmode);
6861 if (larger_elt == 0)
6864 for (larger_elt = larger_elt->first_same_value;
6865 larger_elt; larger_elt = larger_elt->next_same_value)
6866 if (GET_CODE (larger_elt->exp) == REG)
6868 src_related = gen_lowpart_if_possible (mode,
6877 #endif /* LOAD_EXTEND_OP */
6879 if (src == src_folded)
6882 /* At this point, ELT, if non-zero, points to a class of expressions
6883 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6884 and SRC_RELATED, if non-zero, each contain additional equivalent
6885 expressions. Prune these latter expressions by deleting expressions
6886 already in the equivalence class.
6888 Check for an equivalent identical to the destination. If found,
6889 this is the preferred equivalent since it will likely lead to
6890 elimination of the insn. Indicate this by placing it in
6893 if (elt) elt = elt->first_same_value;
6894 for (p = elt; p; p = p->next_same_value)
6896 enum rtx_code code = GET_CODE (p->exp);
6898 /* If the expression is not valid, ignore it. Then we do not
6899 have to check for validity below. In most cases, we can use
6900 `rtx_equal_p', since canonicalization has already been done. */
6901 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6904 /* Also skip paradoxical subregs, unless that's what we're
6907 && (GET_MODE_SIZE (GET_MODE (p->exp))
6908 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6910 && GET_CODE (src) == SUBREG
6911 && GET_MODE (src) == GET_MODE (p->exp)
6912 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6913 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
6916 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6918 else if (src_folded && GET_CODE (src_folded) == code
6919 && rtx_equal_p (src_folded, p->exp))
6921 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6922 && rtx_equal_p (src_eqv_here, p->exp))
6924 else if (src_related && GET_CODE (src_related) == code
6925 && rtx_equal_p (src_related, p->exp))
6928 /* This is the same as the destination of the insns, we want
6929 to prefer it. Copy it to src_related. The code below will
6930 then give it a negative cost. */
6931 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6936 /* Find the cheapest valid equivalent, trying all the available
6937 possibilities. Prefer items not in the hash table to ones
6938 that are when they are equal cost. Note that we can never
6939 worsen an insn as the current contents will also succeed.
6940 If we find an equivalent identical to the destination, use it as best,
6941 since this insn will probably be eliminated in that case. */
6944 if (rtx_equal_p (src, dest))
6947 src_cost = COST (src);
6952 if (rtx_equal_p (src_eqv_here, dest))
6955 src_eqv_cost = COST (src_eqv_here);
6960 if (rtx_equal_p (src_folded, dest))
6961 src_folded_cost = -1;
6963 src_folded_cost = COST (src_folded);
6968 if (rtx_equal_p (src_related, dest))
6969 src_related_cost = -1;
6971 src_related_cost = COST (src_related);
6974 /* If this was an indirect jump insn, a known label will really be
6975 cheaper even though it looks more expensive. */
6976 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6977 src_folded = src_const, src_folded_cost = -1;
6979 /* Terminate loop when replacement made. This must terminate since
6980 the current contents will be tested and will always be valid. */
6985 /* Skip invalid entries. */
6986 while (elt && GET_CODE (elt->exp) != REG
6987 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6988 elt = elt->next_same_value;
6990 /* A paradoxical subreg would be bad here: it'll be the right
6991 size, but later may be adjusted so that the upper bits aren't
6992 what we want. So reject it. */
6994 && GET_CODE (elt->exp) == SUBREG
6995 && (GET_MODE_SIZE (GET_MODE (elt->exp))
6996 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
6997 /* It is okay, though, if the rtx we're trying to match
6998 will ignore any of the bits we can't predict. */
7000 && GET_CODE (src) == SUBREG
7001 && GET_MODE (src) == GET_MODE (elt->exp)
7002 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7003 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
7005 elt = elt->next_same_value;
7009 if (elt) src_elt_cost = elt->cost;
7011 /* Find cheapest and skip it for the next time. For items
7012 of equal cost, use this order:
7013 src_folded, src, src_eqv, src_related and hash table entry. */
7014 if (src_folded_cost <= src_cost
7015 && src_folded_cost <= src_eqv_cost
7016 && src_folded_cost <= src_related_cost
7017 && src_folded_cost <= src_elt_cost)
7019 trial = src_folded, src_folded_cost = 10000;
7020 if (src_folded_force_flag)
7021 trial = force_const_mem (mode, trial);
7023 else if (src_cost <= src_eqv_cost
7024 && src_cost <= src_related_cost
7025 && src_cost <= src_elt_cost)
7026 trial = src, src_cost = 10000;
7027 else if (src_eqv_cost <= src_related_cost
7028 && src_eqv_cost <= src_elt_cost)
7029 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
7030 else if (src_related_cost <= src_elt_cost)
7031 trial = copy_rtx (src_related), src_related_cost = 10000;
7034 trial = copy_rtx (elt->exp);
7035 elt = elt->next_same_value;
7036 src_elt_cost = 10000;
7039 /* We don't normally have an insn matching (set (pc) (pc)), so
7040 check for this separately here. We will delete such an
7043 Tablejump insns contain a USE of the table, so simply replacing
7044 the operand with the constant won't match. This is simply an
7045 unconditional branch, however, and is therefore valid. Just
7046 insert the substitution here and we will delete and re-emit
7049 /* Keep track of the original SET_SRC so that we can fix notes
7050 on libcall instructions. */
7051 old_src = SET_SRC (sets[i].rtl);
7053 if (n_sets == 1 && dest == pc_rtx
7055 || (GET_CODE (trial) == LABEL_REF
7056 && ! condjump_p (insn))))
7058 /* If TRIAL is a label in front of a jump table, we are
7059 really falling through the switch (this is how casesi
7060 insns work), so we must branch around the table. */
7061 if (GET_CODE (trial) == CODE_LABEL
7062 && NEXT_INSN (trial) != 0
7063 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
7064 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
7065 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
7067 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
7069 SET_SRC (sets[i].rtl) = trial;
7070 cse_jumps_altered = 1;
7074 /* Look for a substitution that makes a valid insn. */
7075 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
7077 /* If we just made a substitution inside a libcall, then we
7078 need to make the same substitution in any notes attached
7079 to the RETVAL insn. */
7081 && (GET_CODE (old_src) == REG
7082 || GET_CODE (old_src) == SUBREG
7083 || GET_CODE (old_src) == MEM))
7084 replace_rtx (REG_NOTES (libcall_insn), old_src,
7085 canon_reg (SET_SRC (sets[i].rtl), insn));
7087 /* The result of apply_change_group can be ignored; see
7090 validate_change (insn, &SET_SRC (sets[i].rtl),
7091 canon_reg (SET_SRC (sets[i].rtl), insn),
7093 apply_change_group ();
7097 /* If we previously found constant pool entries for
7098 constants and this is a constant, try making a
7099 pool entry. Put it in src_folded unless we already have done
7100 this since that is where it likely came from. */
7102 else if (constant_pool_entries_cost
7103 && CONSTANT_P (trial)
7104 && ! (GET_CODE (trial) == CONST
7105 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
7107 || (GET_CODE (src_folded) != MEM
7108 && ! src_folded_force_flag))
7109 && GET_MODE_CLASS (mode) != MODE_CC
7110 && mode != VOIDmode)
7112 src_folded_force_flag = 1;
7114 src_folded_cost = constant_pool_entries_cost;
7118 src = SET_SRC (sets[i].rtl);
7120 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7121 However, there is an important exception: If both are registers
7122 that are not the head of their equivalence class, replace SET_SRC
7123 with the head of the class. If we do not do this, we will have
7124 both registers live over a portion of the basic block. This way,
7125 their lifetimes will likely abut instead of overlapping. */
7126 if (GET_CODE (dest) == REG
7127 && REGNO_QTY_VALID_P (REGNO (dest))
7128 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
7129 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
7130 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7131 /* Don't do this if the original insn had a hard reg as
7133 && (GET_CODE (sets[i].src) != REG
7134 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
7135 /* We can't call canon_reg here because it won't do anything if
7136 SRC is a hard register. */
7138 int first = qty_first_reg[reg_qty[REGNO (src)]];
7140 = (first >= FIRST_PSEUDO_REGISTER
7141 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7143 /* We must use validate-change even for this, because this
7144 might be a special no-op instruction, suitable only to
7146 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7149 /* If we had a constant that is cheaper than what we are now
7150 setting SRC to, use that constant. We ignored it when we
7151 thought we could make this into a no-op. */
7152 if (src_const && COST (src_const) < COST (src)
7153 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7159 /* If we made a change, recompute SRC values. */
7160 if (src != sets[i].src)
7163 hash_arg_in_memory = 0;
7164 hash_arg_in_struct = 0;
7166 sets[i].src_hash = HASH (src, mode);
7167 sets[i].src_volatile = do_not_record;
7168 sets[i].src_in_memory = hash_arg_in_memory;
7169 sets[i].src_in_struct = hash_arg_in_struct;
7170 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7173 /* If this is a single SET, we are setting a register, and we have an
7174 equivalent constant, we want to add a REG_NOTE. We don't want
7175 to write a REG_EQUAL note for a constant pseudo since verifying that
7176 that pseudo hasn't been eliminated is a pain. Such a note also
7177 won't help anything.
7179 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7180 which can be created for a reference to a compile time computable
7181 entry in a jump table. */
7183 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7184 && GET_CODE (src_const) != REG
7185 && ! (GET_CODE (src_const) == CONST
7186 && GET_CODE (XEXP (src_const, 0)) == MINUS
7187 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
7188 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7190 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7192 /* Record the actual constant value in a REG_EQUAL note, making
7193 a new one if one does not already exist. */
7195 XEXP (tem, 0) = src_const;
7197 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7198 src_const, REG_NOTES (insn));
7200 /* If storing a constant value in a register that
7201 previously held the constant value 0,
7202 record this fact with a REG_WAS_0 note on this insn.
7204 Note that the *register* is required to have previously held 0,
7205 not just any register in the quantity and we must point to the
7206 insn that set that register to zero.
7208 Rather than track each register individually, we just see if
7209 the last set for this quantity was for this register. */
7211 if (REGNO_QTY_VALID_P (REGNO (dest))
7212 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
7214 /* See if we previously had a REG_WAS_0 note. */
7215 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7216 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
7218 if ((tem = single_set (const_insn)) != 0
7219 && rtx_equal_p (SET_DEST (tem), dest))
7222 XEXP (note, 0) = const_insn;
7224 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7231 /* Now deal with the destination. */
7233 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7235 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7236 to the MEM or REG within it. */
7237 while (GET_CODE (dest) == SIGN_EXTRACT
7238 || GET_CODE (dest) == ZERO_EXTRACT
7239 || GET_CODE (dest) == SUBREG
7240 || GET_CODE (dest) == STRICT_LOW_PART)
7242 sets[i].inner_dest_loc = &XEXP (dest, 0);
7243 dest = XEXP (dest, 0);
7246 sets[i].inner_dest = dest;
7248 if (GET_CODE (dest) == MEM)
7250 #ifdef PUSH_ROUNDING
7251 /* Stack pushes invalidate the stack pointer. */
7252 rtx addr = XEXP (dest, 0);
7253 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7254 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7255 && XEXP (addr, 0) == stack_pointer_rtx)
7256 invalidate (stack_pointer_rtx, Pmode);
7258 dest = fold_rtx (dest, insn);
7261 /* Compute the hash code of the destination now,
7262 before the effects of this instruction are recorded,
7263 since the register values used in the address computation
7264 are those before this instruction. */
7265 sets[i].dest_hash = HASH (dest, mode);
7267 /* Don't enter a bit-field in the hash table
7268 because the value in it after the store
7269 may not equal what was stored, due to truncation. */
7271 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7272 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7274 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7276 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7277 && GET_CODE (width) == CONST_INT
7278 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7279 && ! (INTVAL (src_const)
7280 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7281 /* Exception: if the value is constant,
7282 and it won't be truncated, record it. */
7286 /* This is chosen so that the destination will be invalidated
7287 but no new value will be recorded.
7288 We must invalidate because sometimes constant
7289 values can be recorded for bitfields. */
7290 sets[i].src_elt = 0;
7291 sets[i].src_volatile = 1;
7297 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7299 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7301 PUT_CODE (insn, NOTE);
7302 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7303 NOTE_SOURCE_FILE (insn) = 0;
7304 cse_jumps_altered = 1;
7305 /* One less use of the label this insn used to jump to. */
7306 if (JUMP_LABEL (insn) != 0)
7307 --LABEL_NUSES (JUMP_LABEL (insn));
7308 /* No more processing for this set. */
7312 /* If this SET is now setting PC to a label, we know it used to
7313 be a conditional or computed branch. So we see if we can follow
7314 it. If it was a computed branch, delete it and re-emit. */
7315 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7319 /* If this is not in the format for a simple branch and
7320 we are the only SET in it, re-emit it. */
7321 if (! simplejump_p (insn) && n_sets == 1)
7323 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7324 JUMP_LABEL (new) = XEXP (src, 0);
7325 LABEL_NUSES (XEXP (src, 0))++;
7330 /* Otherwise, force rerecognition, since it probably had
7331 a different pattern before.
7332 This shouldn't really be necessary, since whatever
7333 changed the source value above should have done this.
7334 Until the right place is found, might as well do this here. */
7335 INSN_CODE (insn) = -1;
7337 /* Now that we've converted this jump to an unconditional jump,
7338 there is dead code after it. Delete the dead code until we
7339 reach a BARRIER, the end of the function, or a label. Do
7340 not delete NOTEs except for NOTE_INSN_DELETED since later
7341 phases assume these notes are retained. */
7345 while (NEXT_INSN (p) != 0
7346 && GET_CODE (NEXT_INSN (p)) != BARRIER
7347 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7349 if (GET_CODE (NEXT_INSN (p)) != NOTE
7350 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7351 delete_insn (NEXT_INSN (p));
7356 /* If we don't have a BARRIER immediately after INSN, put one there.
7357 Much code assumes that there are no NOTEs between a JUMP_INSN and
7360 if (NEXT_INSN (insn) == 0
7361 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7362 emit_barrier_before (NEXT_INSN (insn));
7364 /* We might have two BARRIERs separated by notes. Delete the second
7367 if (p != insn && NEXT_INSN (p) != 0
7368 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7369 delete_insn (NEXT_INSN (p));
7371 cse_jumps_altered = 1;
7375 /* If destination is volatile, invalidate it and then do no further
7376 processing for this assignment. */
7378 else if (do_not_record)
7380 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7381 || GET_CODE (dest) == MEM)
7382 invalidate (dest, VOIDmode);
7383 else if (GET_CODE (dest) == STRICT_LOW_PART
7384 || GET_CODE (dest) == ZERO_EXTRACT)
7385 invalidate (XEXP (dest, 0), GET_MODE (dest));
7389 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7390 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7393 /* If setting CC0, record what it was set to, or a constant, if it
7394 is equivalent to a constant. If it is being set to a floating-point
7395 value, make a COMPARE with the appropriate constant of 0. If we
7396 don't do this, later code can interpret this as a test against
7397 const0_rtx, which can cause problems if we try to put it into an
7398 insn as a floating-point operand. */
7399 if (dest == cc0_rtx)
7401 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7402 this_insn_cc0_mode = mode;
7403 if (FLOAT_MODE_P (mode))
7404 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7410 /* Now enter all non-volatile source expressions in the hash table
7411 if they are not already present.
7412 Record their equivalence classes in src_elt.
7413 This way we can insert the corresponding destinations into
7414 the same classes even if the actual sources are no longer in them
7415 (having been invalidated). */
7417 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7418 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7420 register struct table_elt *elt;
7421 register struct table_elt *classp = sets[0].src_elt;
7422 rtx dest = SET_DEST (sets[0].rtl);
7423 enum machine_mode eqvmode = GET_MODE (dest);
7425 if (GET_CODE (dest) == STRICT_LOW_PART)
7427 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7430 if (insert_regs (src_eqv, classp, 0))
7432 rehash_using_reg (src_eqv);
7433 src_eqv_hash = HASH (src_eqv, eqvmode);
7435 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7436 elt->in_memory = src_eqv_in_memory;
7437 elt->in_struct = src_eqv_in_struct;
7440 /* Check to see if src_eqv_elt is the same as a set source which
7441 does not yet have an elt, and if so set the elt of the set source
7443 for (i = 0; i < n_sets; i++)
7444 if (sets[i].rtl && sets[i].src_elt == 0
7445 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7446 sets[i].src_elt = src_eqv_elt;
7449 for (i = 0; i < n_sets; i++)
7450 if (sets[i].rtl && ! sets[i].src_volatile
7451 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7453 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7455 /* REG_EQUAL in setting a STRICT_LOW_PART
7456 gives an equivalent for the entire destination register,
7457 not just for the subreg being stored in now.
7458 This is a more interesting equivalence, so we arrange later
7459 to treat the entire reg as the destination. */
7460 sets[i].src_elt = src_eqv_elt;
7461 sets[i].src_hash = src_eqv_hash;
7465 /* Insert source and constant equivalent into hash table, if not
7467 register struct table_elt *classp = src_eqv_elt;
7468 register rtx src = sets[i].src;
7469 register rtx dest = SET_DEST (sets[i].rtl);
7470 enum machine_mode mode
7471 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7473 if (sets[i].src_elt == 0)
7475 register struct table_elt *elt;
7477 /* Note that these insert_regs calls cannot remove
7478 any of the src_elt's, because they would have failed to
7479 match if not still valid. */
7480 if (insert_regs (src, classp, 0))
7482 rehash_using_reg (src);
7483 sets[i].src_hash = HASH (src, mode);
7485 elt = insert (src, classp, sets[i].src_hash, mode);
7486 elt->in_memory = sets[i].src_in_memory;
7487 elt->in_struct = sets[i].src_in_struct;
7488 sets[i].src_elt = classp = elt;
7491 if (sets[i].src_const && sets[i].src_const_elt == 0
7492 && src != sets[i].src_const
7493 && ! rtx_equal_p (sets[i].src_const, src))
7494 sets[i].src_elt = insert (sets[i].src_const, classp,
7495 sets[i].src_const_hash, mode);
7498 else if (sets[i].src_elt == 0)
7499 /* If we did not insert the source into the hash table (e.g., it was
7500 volatile), note the equivalence class for the REG_EQUAL value, if any,
7501 so that the destination goes into that class. */
7502 sets[i].src_elt = src_eqv_elt;
7504 invalidate_from_clobbers (x);
7506 /* Some registers are invalidated by subroutine calls. Memory is
7507 invalidated by non-constant calls. */
7509 if (GET_CODE (insn) == CALL_INSN)
7511 if (! CONST_CALL_P (insn))
7512 invalidate_memory ();
7513 invalidate_for_call ();
7516 /* Now invalidate everything set by this instruction.
7517 If a SUBREG or other funny destination is being set,
7518 sets[i].rtl is still nonzero, so here we invalidate the reg
7519 a part of which is being set. */
7521 for (i = 0; i < n_sets; i++)
7524 /* We can't use the inner dest, because the mode associated with
7525 a ZERO_EXTRACT is significant. */
7526 register rtx dest = SET_DEST (sets[i].rtl);
7528 /* Needed for registers to remove the register from its
7529 previous quantity's chain.
7530 Needed for memory if this is a nonvarying address, unless
7531 we have just done an invalidate_memory that covers even those. */
7532 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7533 || GET_CODE (dest) == MEM)
7534 invalidate (dest, VOIDmode);
7535 else if (GET_CODE (dest) == STRICT_LOW_PART
7536 || GET_CODE (dest) == ZERO_EXTRACT)
7537 invalidate (XEXP (dest, 0), GET_MODE (dest));
7540 /* Make sure registers mentioned in destinations
7541 are safe for use in an expression to be inserted.
7542 This removes from the hash table
7543 any invalid entry that refers to one of these registers.
7545 We don't care about the return value from mention_regs because
7546 we are going to hash the SET_DEST values unconditionally. */
7548 for (i = 0; i < n_sets; i++)
7552 rtx x = SET_DEST (sets[i].rtl);
7554 if (GET_CODE (x) != REG)
7558 /* We used to rely on all references to a register becoming
7559 inaccessible when a register changes to a new quantity,
7560 since that changes the hash code. However, that is not
7561 safe, since after NBUCKETS new quantities we get a
7562 hash 'collision' of a register with its own invalid
7563 entries. And since SUBREGs have been changed not to
7564 change their hash code with the hash code of the register,
7565 it wouldn't work any longer at all. So we have to check
7566 for any invalid references lying around now.
7567 This code is similar to the REG case in mention_regs,
7568 but it knows that reg_tick has been incremented, and
7569 it leaves reg_in_table as -1 . */
7570 register int regno = REGNO (x);
7571 register int endregno
7572 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
7573 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
7576 for (i = regno; i < endregno; i++)
7578 if (reg_in_table[i] >= 0)
7580 remove_invalid_refs (i);
7581 reg_in_table[i] = -1;
7588 /* We may have just removed some of the src_elt's from the hash table.
7589 So replace each one with the current head of the same class. */
7591 for (i = 0; i < n_sets; i++)
7594 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7595 /* If elt was removed, find current head of same class,
7596 or 0 if nothing remains of that class. */
7598 register struct table_elt *elt = sets[i].src_elt;
7600 while (elt && elt->prev_same_value)
7601 elt = elt->prev_same_value;
7603 while (elt && elt->first_same_value == 0)
7604 elt = elt->next_same_value;
7605 sets[i].src_elt = elt ? elt->first_same_value : 0;
7609 /* Now insert the destinations into their equivalence classes. */
7611 for (i = 0; i < n_sets; i++)
7614 register rtx dest = SET_DEST (sets[i].rtl);
7615 rtx inner_dest = sets[i].inner_dest;
7616 register struct table_elt *elt;
7618 /* Don't record value if we are not supposed to risk allocating
7619 floating-point values in registers that might be wider than
7621 if ((flag_float_store
7622 && GET_CODE (dest) == MEM
7623 && FLOAT_MODE_P (GET_MODE (dest)))
7624 /* Don't record BLKmode values, because we don't know the
7625 size of it, and can't be sure that other BLKmode values
7626 have the same or smaller size. */
7627 || GET_MODE (dest) == BLKmode
7628 /* Don't record values of destinations set inside a libcall block
7629 since we might delete the libcall. Things should have been set
7630 up so we won't want to reuse such a value, but we play it safe
7633 /* If we didn't put a REG_EQUAL value or a source into the hash
7634 table, there is no point is recording DEST. */
7635 || sets[i].src_elt == 0
7636 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7637 or SIGN_EXTEND, don't record DEST since it can cause
7638 some tracking to be wrong.
7640 ??? Think about this more later. */
7641 || (GET_CODE (dest) == SUBREG
7642 && (GET_MODE_SIZE (GET_MODE (dest))
7643 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7644 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7645 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7648 /* STRICT_LOW_PART isn't part of the value BEING set,
7649 and neither is the SUBREG inside it.
7650 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7651 if (GET_CODE (dest) == STRICT_LOW_PART)
7652 dest = SUBREG_REG (XEXP (dest, 0));
7654 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7655 /* Registers must also be inserted into chains for quantities. */
7656 if (insert_regs (dest, sets[i].src_elt, 1))
7658 /* If `insert_regs' changes something, the hash code must be
7660 rehash_using_reg (dest);
7661 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7664 if (GET_CODE (inner_dest) == MEM
7665 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7666 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7667 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7668 Consider the case in which the address of the MEM is
7669 passed to a function, which alters the MEM. Then, if we
7670 later use Y instead of the MEM we'll miss the update. */
7671 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7673 elt = insert (dest, sets[i].src_elt,
7674 sets[i].dest_hash, GET_MODE (dest));
7676 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7677 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7678 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7683 /* This implicitly assumes a whole struct
7684 need not have MEM_IN_STRUCT_P.
7685 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7686 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7687 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7690 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7691 narrower than M2, and both M1 and M2 are the same number of words,
7692 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7693 make that equivalence as well.
7695 However, BAR may have equivalences for which gen_lowpart_if_possible
7696 will produce a simpler value than gen_lowpart_if_possible applied to
7697 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7698 BAR's equivalences. If we don't get a simplified form, make
7699 the SUBREG. It will not be used in an equivalence, but will
7700 cause two similar assignments to be detected.
7702 Note the loop below will find SUBREG_REG (DEST) since we have
7703 already entered SRC and DEST of the SET in the table. */
7705 if (GET_CODE (dest) == SUBREG
7706 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7708 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7709 && (GET_MODE_SIZE (GET_MODE (dest))
7710 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7711 && sets[i].src_elt != 0)
7713 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7714 struct table_elt *elt, *classp = 0;
7716 for (elt = sets[i].src_elt->first_same_value; elt;
7717 elt = elt->next_same_value)
7721 struct table_elt *src_elt;
7723 /* Ignore invalid entries. */
7724 if (GET_CODE (elt->exp) != REG
7725 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7728 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7730 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7732 src_hash = HASH (new_src, new_mode);
7733 src_elt = lookup (new_src, src_hash, new_mode);
7735 /* Put the new source in the hash table is if isn't
7739 if (insert_regs (new_src, classp, 0))
7741 rehash_using_reg (new_src);
7742 src_hash = HASH (new_src, new_mode);
7744 src_elt = insert (new_src, classp, src_hash, new_mode);
7745 src_elt->in_memory = elt->in_memory;
7746 src_elt->in_struct = elt->in_struct;
7748 else if (classp && classp != src_elt->first_same_value)
7749 /* Show that two things that we've seen before are
7750 actually the same. */
7751 merge_equiv_classes (src_elt, classp);
7753 classp = src_elt->first_same_value;
7754 /* Ignore invalid entries. */
7756 && GET_CODE (classp->exp) != REG
7757 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7758 classp = classp->next_same_value;
7763 /* Special handling for (set REG0 REG1)
7764 where REG0 is the "cheapest", cheaper than REG1.
7765 After cse, REG1 will probably not be used in the sequel,
7766 so (if easily done) change this insn to (set REG1 REG0) and
7767 replace REG1 with REG0 in the previous insn that computed their value.
7768 Then REG1 will become a dead store and won't cloud the situation
7769 for later optimizations.
7771 Do not make this change if REG1 is a hard register, because it will
7772 then be used in the sequel and we may be changing a two-operand insn
7773 into a three-operand insn.
7775 Also do not do this if we are operating on a copy of INSN. */
7777 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7778 && NEXT_INSN (PREV_INSN (insn)) == insn
7779 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7780 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7781 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7782 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7783 == REGNO (SET_DEST (sets[0].rtl))))
7785 rtx prev = PREV_INSN (insn);
7786 while (prev && GET_CODE (prev) == NOTE)
7787 prev = PREV_INSN (prev);
7789 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7790 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7792 rtx dest = SET_DEST (sets[0].rtl);
7793 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7795 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7796 validate_change (insn, & SET_DEST (sets[0].rtl),
7797 SET_SRC (sets[0].rtl), 1);
7798 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7799 apply_change_group ();
7801 /* If REG1 was equivalent to a constant, REG0 is not. */
7803 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7805 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7806 any REG_WAS_0 note on INSN to PREV. */
7807 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7809 remove_note (prev, note);
7811 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7814 remove_note (insn, note);
7815 XEXP (note, 1) = REG_NOTES (prev);
7816 REG_NOTES (prev) = note;
7819 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7820 then we must delete it, because the value in REG0 has changed. */
7821 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7822 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7823 remove_note (insn, note);
7827 /* If this is a conditional jump insn, record any known equivalences due to
7828 the condition being tested. */
7830 last_jump_equiv_class = 0;
7831 if (GET_CODE (insn) == JUMP_INSN
7832 && n_sets == 1 && GET_CODE (x) == SET
7833 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7834 record_jump_equiv (insn, 0);
7837 /* If the previous insn set CC0 and this insn no longer references CC0,
7838 delete the previous insn. Here we use the fact that nothing expects CC0
7839 to be valid over an insn, which is true until the final pass. */
7840 if (prev_insn && GET_CODE (prev_insn) == INSN
7841 && (tem = single_set (prev_insn)) != 0
7842 && SET_DEST (tem) == cc0_rtx
7843 && ! reg_mentioned_p (cc0_rtx, x))
7845 PUT_CODE (prev_insn, NOTE);
7846 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7847 NOTE_SOURCE_FILE (prev_insn) = 0;
7850 prev_insn_cc0 = this_insn_cc0;
7851 prev_insn_cc0_mode = this_insn_cc0_mode;
7857 /* Remove from the hash table all expressions that reference memory. */
7859 invalidate_memory ()
7862 register struct table_elt *p, *next;
7864 for (i = 0; i < NBUCKETS; i++)
7865 for (p = table[i]; p; p = next)
7867 next = p->next_same_hash;
7869 remove_from_table (p, i);
7873 /* XXX ??? The name of this function bears little resemblance to
7874 what this function actually does. FIXME. */
7876 note_mem_written (addr)
7879 /* Pushing or popping the stack invalidates just the stack pointer. */
7880 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7881 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7882 && GET_CODE (XEXP (addr, 0)) == REG
7883 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7885 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7886 reg_tick[STACK_POINTER_REGNUM]++;
7888 /* This should be *very* rare. */
7889 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7890 invalidate (stack_pointer_rtx, VOIDmode);
7896 /* Perform invalidation on the basis of everything about an insn
7897 except for invalidating the actual places that are SET in it.
7898 This includes the places CLOBBERed, and anything that might
7899 alias with something that is SET or CLOBBERed.
7901 X is the pattern of the insn. */
7904 invalidate_from_clobbers (x)
7907 if (GET_CODE (x) == CLOBBER)
7909 rtx ref = XEXP (x, 0);
7912 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7913 || GET_CODE (ref) == MEM)
7914 invalidate (ref, VOIDmode);
7915 else if (GET_CODE (ref) == STRICT_LOW_PART
7916 || GET_CODE (ref) == ZERO_EXTRACT)
7917 invalidate (XEXP (ref, 0), GET_MODE (ref));
7920 else if (GET_CODE (x) == PARALLEL)
7923 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7925 register rtx y = XVECEXP (x, 0, i);
7926 if (GET_CODE (y) == CLOBBER)
7928 rtx ref = XEXP (y, 0);
7929 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7930 || GET_CODE (ref) == MEM)
7931 invalidate (ref, VOIDmode);
7932 else if (GET_CODE (ref) == STRICT_LOW_PART
7933 || GET_CODE (ref) == ZERO_EXTRACT)
7934 invalidate (XEXP (ref, 0), GET_MODE (ref));
7940 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7941 and replace any registers in them with either an equivalent constant
7942 or the canonical form of the register. If we are inside an address,
7943 only do this if the address remains valid.
7945 OBJECT is 0 except when within a MEM in which case it is the MEM.
7947 Return the replacement for X. */
7950 cse_process_notes (x, object)
7954 enum rtx_code code = GET_CODE (x);
7955 char *fmt = GET_RTX_FORMAT (code);
7971 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7976 if (REG_NOTE_KIND (x) == REG_EQUAL)
7977 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7979 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7986 rtx new = cse_process_notes (XEXP (x, 0), object);
7987 /* We don't substitute VOIDmode constants into these rtx,
7988 since they would impede folding. */
7989 if (GET_MODE (new) != VOIDmode)
7990 validate_change (object, &XEXP (x, 0), new, 0);
7995 i = reg_qty[REGNO (x)];
7997 /* Return a constant or a constant register. */
7998 if (REGNO_QTY_VALID_P (REGNO (x))
7999 && qty_const[i] != 0
8000 && (CONSTANT_P (qty_const[i])
8001 || GET_CODE (qty_const[i]) == REG))
8003 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
8008 /* Otherwise, canonicalize this register. */
8009 return canon_reg (x, NULL_RTX);
8015 for (i = 0; i < GET_RTX_LENGTH (code); i++)
8017 validate_change (object, &XEXP (x, i),
8018 cse_process_notes (XEXP (x, i), object), 0);
8023 /* Find common subexpressions between the end test of a loop and the beginning
8024 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8026 Often we have a loop where an expression in the exit test is used
8027 in the body of the loop. For example "while (*p) *q++ = *p++;".
8028 Because of the way we duplicate the loop exit test in front of the loop,
8029 however, we don't detect that common subexpression. This will be caught
8030 when global cse is implemented, but this is a quite common case.
8032 This function handles the most common cases of these common expressions.
8033 It is called after we have processed the basic block ending with the
8034 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8035 jumps to a label used only once. */
8038 cse_around_loop (loop_start)
8043 struct table_elt *p;
8045 /* If the jump at the end of the loop doesn't go to the start, we don't
8047 for (insn = PREV_INSN (loop_start);
8048 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
8049 insn = PREV_INSN (insn))
8053 || GET_CODE (insn) != NOTE
8054 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
8057 /* If the last insn of the loop (the end test) was an NE comparison,
8058 we will interpret it as an EQ comparison, since we fell through
8059 the loop. Any equivalences resulting from that comparison are
8060 therefore not valid and must be invalidated. */
8061 if (last_jump_equiv_class)
8062 for (p = last_jump_equiv_class->first_same_value; p;
8063 p = p->next_same_value)
8065 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
8066 || (GET_CODE (p->exp) == SUBREG
8067 && GET_CODE (SUBREG_REG (p->exp)) == REG))
8068 invalidate (p->exp, VOIDmode);
8069 else if (GET_CODE (p->exp) == STRICT_LOW_PART
8070 || GET_CODE (p->exp) == ZERO_EXTRACT)
8071 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
8074 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8075 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8077 The only thing we do with SET_DEST is invalidate entries, so we
8078 can safely process each SET in order. It is slightly less efficient
8079 to do so, but we only want to handle the most common cases.
8081 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8082 These pseudos won't have valid entries in any of the tables indexed
8083 by register number, such as reg_qty. We avoid out-of-range array
8084 accesses by not processing any instructions created after cse started. */
8086 for (insn = NEXT_INSN (loop_start);
8087 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
8088 && INSN_UID (insn) < max_insn_uid
8089 && ! (GET_CODE (insn) == NOTE
8090 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
8091 insn = NEXT_INSN (insn))
8093 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8094 && (GET_CODE (PATTERN (insn)) == SET
8095 || GET_CODE (PATTERN (insn)) == CLOBBER))
8096 cse_set_around_loop (PATTERN (insn), insn, loop_start);
8097 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8098 && GET_CODE (PATTERN (insn)) == PARALLEL)
8099 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8100 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
8101 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
8102 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
8107 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8108 since they are done elsewhere. This function is called via note_stores. */
8111 invalidate_skipped_set (dest, set)
8115 enum rtx_code code = GET_CODE (dest);
8118 && ! note_mem_written (dest) /* If this is not a stack push ... */
8119 /* There are times when an address can appear varying and be a PLUS
8120 during this scan when it would be a fixed address were we to know
8121 the proper equivalences. So invalidate all memory if there is
8122 a BLKmode or nonscalar memory reference or a reference to a
8123 variable address. */
8124 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
8125 || cse_rtx_varies_p (XEXP (dest, 0))))
8127 invalidate_memory ();
8131 if (GET_CODE (set) == CLOBBER
8138 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
8139 invalidate (XEXP (dest, 0), GET_MODE (dest));
8140 else if (code == REG || code == SUBREG || code == MEM)
8141 invalidate (dest, VOIDmode);
8144 /* Invalidate all insns from START up to the end of the function or the
8145 next label. This called when we wish to CSE around a block that is
8146 conditionally executed. */
8149 invalidate_skipped_block (start)
8154 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
8155 insn = NEXT_INSN (insn))
8157 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
8160 if (GET_CODE (insn) == CALL_INSN)
8162 if (! CONST_CALL_P (insn))
8163 invalidate_memory ();
8164 invalidate_for_call ();
8167 invalidate_from_clobbers (PATTERN (insn));
8168 note_stores (PATTERN (insn), invalidate_skipped_set);
8172 /* Used for communication between the following two routines; contains a
8173 value to be checked for modification. */
8175 static rtx cse_check_loop_start_value;
8177 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8178 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8181 cse_check_loop_start (x, set)
8183 rtx set ATTRIBUTE_UNUSED;
8185 if (cse_check_loop_start_value == 0
8186 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8189 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8190 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8191 cse_check_loop_start_value = 0;
8194 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8195 a loop that starts with the label at LOOP_START.
8197 If X is a SET, we see if its SET_SRC is currently in our hash table.
8198 If so, we see if it has a value equal to some register used only in the
8199 loop exit code (as marked by jump.c).
8201 If those two conditions are true, we search backwards from the start of
8202 the loop to see if that same value was loaded into a register that still
8203 retains its value at the start of the loop.
8205 If so, we insert an insn after the load to copy the destination of that
8206 load into the equivalent register and (try to) replace our SET_SRC with that
8209 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8212 cse_set_around_loop (x, insn, loop_start)
8217 struct table_elt *src_elt;
8219 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8220 are setting PC or CC0 or whose SET_SRC is already a register. */
8221 if (GET_CODE (x) == SET
8222 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8223 && GET_CODE (SET_SRC (x)) != REG)
8225 src_elt = lookup (SET_SRC (x),
8226 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8227 GET_MODE (SET_DEST (x)));
8230 for (src_elt = src_elt->first_same_value; src_elt;
8231 src_elt = src_elt->next_same_value)
8232 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8233 && COST (src_elt->exp) < COST (SET_SRC (x)))
8237 /* Look for an insn in front of LOOP_START that sets
8238 something in the desired mode to SET_SRC (x) before we hit
8239 a label or CALL_INSN. */
8241 for (p = prev_nonnote_insn (loop_start);
8242 p && GET_CODE (p) != CALL_INSN
8243 && GET_CODE (p) != CODE_LABEL;
8244 p = prev_nonnote_insn (p))
8245 if ((set = single_set (p)) != 0
8246 && GET_CODE (SET_DEST (set)) == REG
8247 && GET_MODE (SET_DEST (set)) == src_elt->mode
8248 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8250 /* We now have to ensure that nothing between P
8251 and LOOP_START modified anything referenced in
8252 SET_SRC (x). We know that nothing within the loop
8253 can modify it, or we would have invalidated it in
8257 cse_check_loop_start_value = SET_SRC (x);
8258 for (q = p; q != loop_start; q = NEXT_INSN (q))
8259 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8260 note_stores (PATTERN (q), cse_check_loop_start);
8262 /* If nothing was changed and we can replace our
8263 SET_SRC, add an insn after P to copy its destination
8264 to what we will be replacing SET_SRC with. */
8265 if (cse_check_loop_start_value
8266 && validate_change (insn, &SET_SRC (x),
8269 /* If this creates new pseudos, this is unsafe,
8270 because the regno of new pseudo is unsuitable
8271 to index into reg_qty when cse_insn processes
8272 the new insn. Therefore, if a new pseudo was
8273 created, discard this optimization. */
8274 int nregs = max_reg_num ();
8276 = gen_move_insn (src_elt->exp, SET_DEST (set));
8277 if (nregs != max_reg_num ())
8279 if (! validate_change (insn, &SET_SRC (x),
8284 emit_insn_after (move, p);
8291 /* Now invalidate anything modified by X. */
8292 note_mem_written (SET_DEST (x));
8294 /* See comment on similar code in cse_insn for explanation of these tests. */
8295 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8296 || GET_CODE (SET_DEST (x)) == MEM)
8297 invalidate (SET_DEST (x), VOIDmode);
8298 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8299 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8300 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8303 /* Find the end of INSN's basic block and return its range,
8304 the total number of SETs in all the insns of the block, the last insn of the
8305 block, and the branch path.
8307 The branch path indicates which branches should be followed. If a non-zero
8308 path size is specified, the block should be rescanned and a different set
8309 of branches will be taken. The branch path is only used if
8310 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8312 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8313 used to describe the block. It is filled in with the information about
8314 the current block. The incoming structure's branch path, if any, is used
8315 to construct the output branch path. */
8318 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8320 struct cse_basic_block_data *data;
8327 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8328 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8329 int path_size = data->path_size;
8333 /* Update the previous branch path, if any. If the last branch was
8334 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8335 shorten the path by one and look at the previous branch. We know that
8336 at least one branch must have been taken if PATH_SIZE is non-zero. */
8337 while (path_size > 0)
8339 if (data->path[path_size - 1].status != NOT_TAKEN)
8341 data->path[path_size - 1].status = NOT_TAKEN;
8348 /* Scan to end of this basic block. */
8349 while (p && GET_CODE (p) != CODE_LABEL)
8351 /* Don't cse out the end of a loop. This makes a difference
8352 only for the unusual loops that always execute at least once;
8353 all other loops have labels there so we will stop in any case.
8354 Cse'ing out the end of the loop is dangerous because it
8355 might cause an invariant expression inside the loop
8356 to be reused after the end of the loop. This would make it
8357 hard to move the expression out of the loop in loop.c,
8358 especially if it is one of several equivalent expressions
8359 and loop.c would like to eliminate it.
8361 If we are running after loop.c has finished, we can ignore
8362 the NOTE_INSN_LOOP_END. */
8364 if (! after_loop && GET_CODE (p) == NOTE
8365 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8368 /* Don't cse over a call to setjmp; on some machines (eg vax)
8369 the regs restored by the longjmp come from
8370 a later time than the setjmp. */
8371 if (GET_CODE (p) == NOTE
8372 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8375 /* A PARALLEL can have lots of SETs in it,
8376 especially if it is really an ASM_OPERANDS. */
8377 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8378 && GET_CODE (PATTERN (p)) == PARALLEL)
8379 nsets += XVECLEN (PATTERN (p), 0);
8380 else if (GET_CODE (p) != NOTE)
8383 /* Ignore insns made by CSE; they cannot affect the boundaries of
8386 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8387 high_cuid = INSN_CUID (p);
8388 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8389 low_cuid = INSN_CUID (p);
8391 /* See if this insn is in our branch path. If it is and we are to
8393 if (path_entry < path_size && data->path[path_entry].branch == p)
8395 if (data->path[path_entry].status != NOT_TAKEN)
8398 /* Point to next entry in path, if any. */
8402 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8403 was specified, we haven't reached our maximum path length, there are
8404 insns following the target of the jump, this is the only use of the
8405 jump label, and the target label is preceded by a BARRIER.
8407 Alternatively, we can follow the jump if it branches around a
8408 block of code and there are no other branches into the block.
8409 In this case invalidate_skipped_block will be called to invalidate any
8410 registers set in the block when following the jump. */
8412 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8413 && GET_CODE (p) == JUMP_INSN
8414 && GET_CODE (PATTERN (p)) == SET
8415 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8416 && JUMP_LABEL (p) != 0
8417 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8418 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8420 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8421 if ((GET_CODE (q) != NOTE
8422 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8423 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8424 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8427 /* If we ran into a BARRIER, this code is an extension of the
8428 basic block when the branch is taken. */
8429 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8431 /* Don't allow ourself to keep walking around an
8432 always-executed loop. */
8433 if (next_real_insn (q) == next)
8439 /* Similarly, don't put a branch in our path more than once. */
8440 for (i = 0; i < path_entry; i++)
8441 if (data->path[i].branch == p)
8444 if (i != path_entry)
8447 data->path[path_entry].branch = p;
8448 data->path[path_entry++].status = TAKEN;
8450 /* This branch now ends our path. It was possible that we
8451 didn't see this branch the last time around (when the
8452 insn in front of the target was a JUMP_INSN that was
8453 turned into a no-op). */
8454 path_size = path_entry;
8457 /* Mark block so we won't scan it again later. */
8458 PUT_MODE (NEXT_INSN (p), QImode);
8460 /* Detect a branch around a block of code. */
8461 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8465 if (next_real_insn (q) == next)
8471 for (i = 0; i < path_entry; i++)
8472 if (data->path[i].branch == p)
8475 if (i != path_entry)
8478 /* This is no_labels_between_p (p, q) with an added check for
8479 reaching the end of a function (in case Q precedes P). */
8480 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8481 if (GET_CODE (tmp) == CODE_LABEL)
8486 data->path[path_entry].branch = p;
8487 data->path[path_entry++].status = AROUND;
8489 path_size = path_entry;
8492 /* Mark block so we won't scan it again later. */
8493 PUT_MODE (NEXT_INSN (p), QImode);
8500 data->low_cuid = low_cuid;
8501 data->high_cuid = high_cuid;
8502 data->nsets = nsets;
8505 /* If all jumps in the path are not taken, set our path length to zero
8506 so a rescan won't be done. */
8507 for (i = path_size - 1; i >= 0; i--)
8508 if (data->path[i].status != NOT_TAKEN)
8512 data->path_size = 0;
8514 data->path_size = path_size;
8516 /* End the current branch path. */
8517 data->path[path_size].branch = 0;
8520 /* Perform cse on the instructions of a function.
8521 F is the first instruction.
8522 NREGS is one plus the highest pseudo-reg number used in the instruction.
8524 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8525 (only if -frerun-cse-after-loop).
8527 Returns 1 if jump_optimize should be redone due to simplifications
8528 in conditional jump instructions. */
8531 cse_main (f, nregs, after_loop, file)
8537 struct cse_basic_block_data val;
8538 register rtx insn = f;
8541 cse_jumps_altered = 0;
8542 recorded_label_ref = 0;
8543 constant_pool_entries_cost = 0;
8547 init_alias_analysis ();
8551 max_insn_uid = get_max_uid ();
8553 all_minus_one = (int *) alloca (nregs * sizeof (int));
8554 consec_ints = (int *) alloca (nregs * sizeof (int));
8556 for (i = 0; i < nregs; i++)
8558 all_minus_one[i] = -1;
8562 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8563 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8564 reg_qty = (int *) alloca (nregs * sizeof (int));
8565 reg_in_table = (int *) alloca (nregs * sizeof (int));
8566 reg_tick = (int *) alloca (nregs * sizeof (int));
8568 #ifdef LOAD_EXTEND_OP
8570 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8571 and change the code and mode as appropriate. */
8572 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8575 /* Discard all the free elements of the previous function
8576 since they are allocated in the temporarily obstack. */
8577 bzero ((char *) table, sizeof table);
8578 free_element_chain = 0;
8579 n_elements_made = 0;
8581 /* Find the largest uid. */
8583 max_uid = get_max_uid ();
8584 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8585 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8587 /* Compute the mapping from uids to cuids.
8588 CUIDs are numbers assigned to insns, like uids,
8589 except that cuids increase monotonically through the code.
8590 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8591 between two insns is not affected by -g. */
8593 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8595 if (GET_CODE (insn) != NOTE
8596 || NOTE_LINE_NUMBER (insn) < 0)
8597 INSN_CUID (insn) = ++i;
8599 /* Give a line number note the same cuid as preceding insn. */
8600 INSN_CUID (insn) = i;
8603 /* Initialize which registers are clobbered by calls. */
8605 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8607 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8608 if ((call_used_regs[i]
8609 /* Used to check !fixed_regs[i] here, but that isn't safe;
8610 fixed regs are still call-clobbered, and sched can get
8611 confused if they can "live across calls".
8613 The frame pointer is always preserved across calls. The arg
8614 pointer is if it is fixed. The stack pointer usually is, unless
8615 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8616 will be present. If we are generating PIC code, the PIC offset
8617 table register is preserved across calls. */
8619 && i != STACK_POINTER_REGNUM
8620 && i != FRAME_POINTER_REGNUM
8621 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8622 && i != HARD_FRAME_POINTER_REGNUM
8624 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8625 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8627 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8628 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8632 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8634 /* Loop over basic blocks.
8635 Compute the maximum number of qty's needed for each basic block
8636 (which is 2 for each SET). */
8640 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8641 flag_cse_skip_blocks);
8643 /* If this basic block was already processed or has no sets, skip it. */
8644 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8646 PUT_MODE (insn, VOIDmode);
8647 insn = (val.last ? NEXT_INSN (val.last) : 0);
8652 cse_basic_block_start = val.low_cuid;
8653 cse_basic_block_end = val.high_cuid;
8654 max_qty = val.nsets * 2;
8657 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
8658 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8661 /* Make MAX_QTY bigger to give us room to optimize
8662 past the end of this basic block, if that should prove useful. */
8668 /* If this basic block is being extended by following certain jumps,
8669 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8670 Otherwise, we start after this basic block. */
8671 if (val.path_size > 0)
8672 cse_basic_block (insn, val.last, val.path, 0);
8675 int old_cse_jumps_altered = cse_jumps_altered;
8678 /* When cse changes a conditional jump to an unconditional
8679 jump, we want to reprocess the block, since it will give
8680 us a new branch path to investigate. */
8681 cse_jumps_altered = 0;
8682 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8683 if (cse_jumps_altered == 0
8684 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8687 cse_jumps_altered |= old_cse_jumps_altered;
8695 /* Tell refers_to_mem_p that qty_const info is not available. */
8698 if (max_elements_made < n_elements_made)
8699 max_elements_made = n_elements_made;
8701 return cse_jumps_altered || recorded_label_ref;
8704 /* Process a single basic block. FROM and TO and the limits of the basic
8705 block. NEXT_BRANCH points to the branch path when following jumps or
8706 a null path when not following jumps.
8708 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8709 loop. This is true when we are being called for the last time on a
8710 block and this CSE pass is before loop.c. */
8713 cse_basic_block (from, to, next_branch, around_loop)
8714 register rtx from, to;
8715 struct branch_path *next_branch;
8720 rtx libcall_insn = NULL_RTX;
8723 /* Each of these arrays is undefined before max_reg, so only allocate
8724 the space actually needed and adjust the start below. */
8726 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8727 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8728 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8729 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8730 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8732 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8733 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8734 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8736 qty_first_reg -= max_reg;
8737 qty_last_reg -= max_reg;
8738 qty_mode -= max_reg;
8739 qty_const -= max_reg;
8740 qty_const_insn -= max_reg;
8741 qty_comparison_code -= max_reg;
8742 qty_comparison_qty -= max_reg;
8743 qty_comparison_const -= max_reg;
8747 /* TO might be a label. If so, protect it from being deleted. */
8748 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8751 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8753 register enum rtx_code code = GET_CODE (insn);
8755 struct table_elt *p;
8757 /* If we have processed 1,000 insns, flush the hash table to
8758 avoid extreme quadratic behavior. We must not include NOTEs
8759 in the count since there may be more or them when generating
8760 debugging information. If we clear the table at different
8761 times, code generated with -g -O might be different than code
8762 generated with -O but not -g.
8764 ??? This is a real kludge and needs to be done some other way.
8766 if (code != NOTE && num_insns++ > 1000)
8768 for (i = 0; i < NBUCKETS; i++)
8769 for (p = table[i]; p; p = table[i])
8771 /* Note that invalidate can remove elements
8772 after P in the current hash chain. */
8773 if (GET_CODE (p->exp) == REG)
8774 invalidate (p->exp, p->mode);
8776 remove_from_table (p, i);
8782 /* See if this is a branch that is part of the path. If so, and it is
8783 to be taken, do so. */
8784 if (next_branch->branch == insn)
8786 enum taken status = next_branch++->status;
8787 if (status != NOT_TAKEN)
8789 if (status == TAKEN)
8790 record_jump_equiv (insn, 1);
8792 invalidate_skipped_block (NEXT_INSN (insn));
8794 /* Set the last insn as the jump insn; it doesn't affect cc0.
8795 Then follow this branch. */
8800 insn = JUMP_LABEL (insn);
8805 if (GET_MODE (insn) == QImode)
8806 PUT_MODE (insn, VOIDmode);
8808 if (GET_RTX_CLASS (code) == 'i')
8812 /* Process notes first so we have all notes in canonical forms when
8813 looking for duplicate operations. */
8815 if (REG_NOTES (insn))
8816 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8818 /* Track when we are inside in LIBCALL block. Inside such a block,
8819 we do not want to record destinations. The last insn of a
8820 LIBCALL block is not considered to be part of the block, since
8821 its destination is the result of the block and hence should be
8824 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
8825 libcall_insn = XEXP (p, 0);
8826 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8827 libcall_insn = NULL_RTX;
8829 cse_insn (insn, libcall_insn);
8832 /* If INSN is now an unconditional jump, skip to the end of our
8833 basic block by pretending that we just did the last insn in the
8834 basic block. If we are jumping to the end of our block, show
8835 that we can have one usage of TO. */
8837 if (simplejump_p (insn))
8842 if (JUMP_LABEL (insn) == to)
8845 /* Maybe TO was deleted because the jump is unconditional.
8846 If so, there is nothing left in this basic block. */
8847 /* ??? Perhaps it would be smarter to set TO
8848 to whatever follows this insn,
8849 and pretend the basic block had always ended here. */
8850 if (INSN_DELETED_P (to))
8853 insn = PREV_INSN (to);
8856 /* See if it is ok to keep on going past the label
8857 which used to end our basic block. Remember that we incremented
8858 the count of that label, so we decrement it here. If we made
8859 a jump unconditional, TO_USAGE will be one; in that case, we don't
8860 want to count the use in that jump. */
8862 if (to != 0 && NEXT_INSN (insn) == to
8863 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8865 struct cse_basic_block_data val;
8868 insn = NEXT_INSN (to);
8870 if (LABEL_NUSES (to) == 0)
8871 insn = delete_insn (to);
8873 /* If TO was the last insn in the function, we are done. */
8877 /* If TO was preceded by a BARRIER we are done with this block
8878 because it has no continuation. */
8879 prev = prev_nonnote_insn (to);
8880 if (prev && GET_CODE (prev) == BARRIER)
8883 /* Find the end of the following block. Note that we won't be
8884 following branches in this case. */
8887 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8889 /* If the tables we allocated have enough space left
8890 to handle all the SETs in the next basic block,
8891 continue through it. Otherwise, return,
8892 and that block will be scanned individually. */
8893 if (val.nsets * 2 + next_qty > max_qty)
8896 cse_basic_block_start = val.low_cuid;
8897 cse_basic_block_end = val.high_cuid;
8900 /* Prevent TO from being deleted if it is a label. */
8901 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8904 /* Back up so we process the first insn in the extension. */
8905 insn = PREV_INSN (insn);
8909 if (next_qty > max_qty)
8912 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8913 the previous insn is the only insn that branches to the head of a loop,
8914 we can cse into the loop. Don't do this if we changed the jump
8915 structure of a loop unless we aren't going to be following jumps. */
8917 if ((cse_jumps_altered == 0
8918 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8919 && around_loop && to != 0
8920 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8921 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8922 && JUMP_LABEL (PREV_INSN (to)) != 0
8923 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8924 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8926 return to ? NEXT_INSN (to) : 0;
8929 /* Count the number of times registers are used (not set) in X.
8930 COUNTS is an array in which we accumulate the count, INCR is how much
8931 we count each register usage.
8933 Don't count a usage of DEST, which is the SET_DEST of a SET which
8934 contains X in its SET_SRC. This is because such a SET does not
8935 modify the liveness of DEST. */
8938 count_reg_usage (x, counts, dest, incr)
8951 switch (code = GET_CODE (x))
8955 counts[REGNO (x)] += incr;
8968 /* If we are clobbering a MEM, mark any registers inside the address
8970 if (GET_CODE (XEXP (x, 0)) == MEM)
8971 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
8975 /* Unless we are setting a REG, count everything in SET_DEST. */
8976 if (GET_CODE (SET_DEST (x)) != REG)
8977 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8979 /* If SRC has side-effects, then we can't delete this insn, so the
8980 usage of SET_DEST inside SRC counts.
8982 ??? Strictly-speaking, we might be preserving this insn
8983 because some other SET has side-effects, but that's hard
8984 to do and can't happen now. */
8985 count_reg_usage (SET_SRC (x), counts,
8986 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8991 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8993 /* ... falls through ... */
8996 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8998 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9001 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
9006 if (REG_NOTE_KIND (x) == REG_EQUAL
9007 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
9008 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
9009 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
9016 fmt = GET_RTX_FORMAT (code);
9017 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9020 count_reg_usage (XEXP (x, i), counts, dest, incr);
9021 else if (fmt[i] == 'E')
9022 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9023 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
9027 /* Scan all the insns and delete any that are dead; i.e., they store a register
9028 that is never used or they copy a register to itself.
9030 This is used to remove insns made obviously dead by cse, loop or other
9031 optimizations. It improves the heuristics in loop since it won't try to
9032 move dead invariants out of loops or make givs for dead quantities. The
9033 remaining passes of the compilation are also sped up. */
9036 delete_trivially_dead_insns (insns, nreg)
9040 int *counts = (int *) alloca (nreg * sizeof (int));
9046 int in_libcall = 0, dead_libcall = 0;
9048 /* First count the number of times each register is used. */
9049 bzero ((char *) counts, sizeof (int) * nreg);
9050 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9051 count_reg_usage (insn, counts, NULL_RTX, 1);
9053 /* Go from the last insn to the first and delete insns that only set unused
9054 registers or copy a register to itself. As we delete an insn, remove
9055 usage counts for registers it uses. */
9056 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
9061 prev = prev_real_insn (insn);
9063 /* Don't delete any insns that are part of a libcall block unless
9064 we can delete the whole libcall block.
9066 Flow or loop might get confused if we did that. Remember
9067 that we are scanning backwards. */
9068 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9074 /* See if there's a REG_EQUAL note on this insn and try to
9075 replace the source with the REG_EQUAL expression.
9077 We assume that insns with REG_RETVALs can only be reg->reg
9078 copies at this point. */
9079 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
9082 rtx set = single_set (insn);
9084 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
9087 find_reg_note (insn, REG_RETVAL, NULL_RTX));
9092 else if (in_libcall)
9093 live_insn = ! dead_libcall;
9094 else if (GET_CODE (PATTERN (insn)) == SET)
9096 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
9097 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
9101 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
9102 && ! side_effects_p (SET_SRC (PATTERN (insn)))
9103 && ((tem = next_nonnote_insn (insn)) == 0
9104 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9105 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9108 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
9109 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
9110 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
9111 || side_effects_p (SET_SRC (PATTERN (insn))))
9114 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9115 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9117 rtx elt = XVECEXP (PATTERN (insn), 0, i);
9119 if (GET_CODE (elt) == SET)
9121 if (GET_CODE (SET_DEST (elt)) == REG
9122 && SET_DEST (elt) == SET_SRC (elt))
9126 else if (GET_CODE (SET_DEST (elt)) == CC0
9127 && ! side_effects_p (SET_SRC (elt))
9128 && ((tem = next_nonnote_insn (insn)) == 0
9129 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9130 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9133 else if (GET_CODE (SET_DEST (elt)) != REG
9134 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
9135 || counts[REGNO (SET_DEST (elt))] != 0
9136 || side_effects_p (SET_SRC (elt)))
9139 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
9145 /* If this is a dead insn, delete it and show registers in it aren't
9150 count_reg_usage (insn, counts, NULL_RTX, -1);
9154 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))