1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
30 #include "hard-reg-set.h"
33 #include "insn-config.h"
41 /* The basic idea of common subexpression elimination is to go
42 through the code, keeping a record of expressions that would
43 have the same value at the current scan point, and replacing
44 expressions encountered with the cheapest equivalent expression.
46 It is too complicated to keep track of the different possibilities
47 when control paths merge in this code; so, at each label, we forget all
48 that is known and start fresh. This can be described as processing each
49 extended basic block separately. We have a separate pass to perform
52 Note CSE can turn a conditional or computed jump into a nop or
53 an unconditional jump. When this occurs we arrange to run the jump
54 optimizer after CSE to delete the unreachable code.
56 We use two data structures to record the equivalent expressions:
57 a hash table for most expressions, and a vector of "quantity
58 numbers" to record equivalent (pseudo) registers.
60 The use of the special data structure for registers is desirable
61 because it is faster. It is possible because registers references
62 contain a fairly small number, the register number, taken from
63 a contiguously allocated series, and two register references are
64 identical if they have the same number. General expressions
65 do not have any such thing, so the only way to retrieve the
66 information recorded on an expression other than a register
67 is to keep it in a hash table.
69 Registers and "quantity numbers":
71 At the start of each basic block, all of the (hardware and pseudo)
72 registers used in the function are given distinct quantity
73 numbers to indicate their contents. During scan, when the code
74 copies one register into another, we copy the quantity number.
75 When a register is loaded in any other way, we allocate a new
76 quantity number to describe the value generated by this operation.
77 `reg_qty' records what quantity a register is currently thought
80 All real quantity numbers are greater than or equal to `max_reg'.
81 If register N has not been assigned a quantity, reg_qty[N] will equal N.
83 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
84 entries should be referenced with an index below `max_reg'.
86 We also maintain a bidirectional chain of registers for each
87 quantity number. The `qty_table` members `first_reg' and `last_reg',
88 and `reg_eqv_table' members `next' and `prev' hold these chains.
90 The first register in a chain is the one whose lifespan is least local.
91 Among equals, it is the one that was seen first.
92 We replace any equivalent register with that one.
94 If two registers have the same quantity number, it must be true that
95 REG expressions with qty_table `mode' must be in the hash table for both
96 registers and must be in the same class.
98 The converse is not true. Since hard registers may be referenced in
99 any mode, two REG expressions might be equivalent in the hash table
100 but not have the same quantity number if the quantity number of one
101 of the registers is not the same mode as those expressions.
103 Constants and quantity numbers
105 When a quantity has a known constant value, that value is stored
106 in the appropriate qty_table `const_rtx'. This is in addition to
107 putting the constant in the hash table as is usual for non-regs.
109 Whether a reg or a constant is preferred is determined by the configuration
110 macro CONST_COSTS and will often depend on the constant value. In any
111 event, expressions containing constants can be simplified, by fold_rtx.
113 When a quantity has a known nearly constant value (such as an address
114 of a stack slot), that value is stored in the appropriate qty_table
117 Integer constants don't have a machine mode. However, cse
118 determines the intended machine mode from the destination
119 of the instruction that moves the constant. The machine mode
120 is recorded in the hash table along with the actual RTL
121 constant expression so that different modes are kept separate.
125 To record known equivalences among expressions in general
126 we use a hash table called `table'. It has a fixed number of buckets
127 that contain chains of `struct table_elt' elements for expressions.
128 These chains connect the elements whose expressions have the same
131 Other chains through the same elements connect the elements which
132 currently have equivalent values.
134 Register references in an expression are canonicalized before hashing
135 the expression. This is done using `reg_qty' and qty_table `first_reg'.
136 The hash code of a register reference is computed using the quantity
137 number, not the register number.
139 When the value of an expression changes, it is necessary to remove from the
140 hash table not just that expression but all expressions whose values
141 could be different as a result.
143 1. If the value changing is in memory, except in special cases
144 ANYTHING referring to memory could be changed. That is because
145 nobody knows where a pointer does not point.
146 The function `invalidate_memory' removes what is necessary.
148 The special cases are when the address is constant or is
149 a constant plus a fixed register such as the frame pointer
150 or a static chain pointer. When such addresses are stored in,
151 we can tell exactly which other such addresses must be invalidated
152 due to overlap. `invalidate' does this.
153 All expressions that refer to non-constant
154 memory addresses are also invalidated. `invalidate_memory' does this.
156 2. If the value changing is a register, all expressions
157 containing references to that register, and only those,
160 Because searching the entire hash table for expressions that contain
161 a register is very slow, we try to figure out when it isn't necessary.
162 Precisely, this is necessary only when expressions have been
163 entered in the hash table using this register, and then the value has
164 changed, and then another expression wants to be added to refer to
165 the register's new value. This sequence of circumstances is rare
166 within any one basic block.
168 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
169 reg_tick[i] is incremented whenever a value is stored in register i.
170 reg_in_table[i] holds -1 if no references to register i have been
171 entered in the table; otherwise, it contains the value reg_tick[i] had
172 when the references were entered. If we want to enter a reference
173 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
174 Until we want to enter a new entry, the mere fact that the two vectors
175 don't match makes the entries be ignored if anyone tries to match them.
177 Registers themselves are entered in the hash table as well as in
178 the equivalent-register chains. However, the vectors `reg_tick'
179 and `reg_in_table' do not apply to expressions which are simple
180 register references. These expressions are removed from the table
181 immediately when they become invalid, and this can be done even if
182 we do not immediately search for all the expressions that refer to
185 A CLOBBER rtx in an instruction invalidates its operand for further
186 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
187 invalidates everything that resides in memory.
191 Constant expressions that differ only by an additive integer
192 are called related. When a constant expression is put in
193 the table, the related expression with no constant term
194 is also entered. These are made to point at each other
195 so that it is possible to find out if there exists any
196 register equivalent to an expression related to a given expression. */
198 /* One plus largest register number used in this function. */
202 /* One plus largest instruction UID used in this function at time of
205 static int max_insn_uid;
207 /* Length of qty_table vector. We know in advance we will not need
208 a quantity number this big. */
212 /* Next quantity number to be allocated.
213 This is 1 + the largest number needed so far. */
217 /* Per-qty information tracking.
219 `first_reg' and `last_reg' track the head and tail of the
220 chain of registers which currently contain this quantity.
222 `mode' contains the machine mode of this quantity.
224 `const_rtx' holds the rtx of the constant value of this
225 quantity, if known. A summations of the frame/arg pointer
226 and a constant can also be entered here. When this holds
227 a known value, `const_insn' is the insn which stored the
230 `comparison_{code,const,qty}' are used to track when a
231 comparison between a quantity and some constant or register has
232 been passed. In such a case, we know the results of the comparison
233 in case we see it again. These members record a comparison that
234 is known to be true. `comparison_code' holds the rtx code of such
235 a comparison, else it is set to UNKNOWN and the other two
236 comparison members are undefined. `comparison_const' holds
237 the constant being compared against, or zero if the comparison
238 is not against a constant. `comparison_qty' holds the quantity
239 being compared against when the result is known. If the comparison
240 is not with a register, `comparison_qty' is -1. */
242 struct qty_table_elem
246 rtx comparison_const;
248 unsigned int first_reg, last_reg;
249 enum machine_mode mode;
250 enum rtx_code comparison_code;
253 /* The table of all qtys, indexed by qty number. */
254 static struct qty_table_elem *qty_table;
257 /* For machines that have a CC0, we do not record its value in the hash
258 table since its use is guaranteed to be the insn immediately following
259 its definition and any other insn is presumed to invalidate it.
261 Instead, we store below the value last assigned to CC0. If it should
262 happen to be a constant, it is stored in preference to the actual
263 assigned value. In case it is a constant, we store the mode in which
264 the constant should be interpreted. */
266 static rtx prev_insn_cc0;
267 static enum machine_mode prev_insn_cc0_mode;
270 /* Previous actual insn. 0 if at first insn of basic block. */
272 static rtx prev_insn;
274 /* Insn being scanned. */
276 static rtx this_insn;
278 /* Index by register number, gives the number of the next (or
279 previous) register in the chain of registers sharing the same
282 Or -1 if this register is at the end of the chain.
284 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
286 /* Per-register equivalence chain. */
292 /* The table of all register equivalence chains. */
293 static struct reg_eqv_elem *reg_eqv_table;
297 /* Next in hash chain. */
298 struct cse_reg_info *hash_next;
300 /* The next cse_reg_info structure in the free or used list. */
301 struct cse_reg_info *next;
306 /* The quantity number of the register's current contents. */
309 /* The number of times the register has been altered in the current
313 /* The REG_TICK value at which rtx's containing this register are
314 valid in the hash table. If this does not equal the current
315 reg_tick value, such expressions existing in the hash table are
320 /* A free list of cse_reg_info entries. */
321 static struct cse_reg_info *cse_reg_info_free_list;
323 /* A used list of cse_reg_info entries. */
324 static struct cse_reg_info *cse_reg_info_used_list;
325 static struct cse_reg_info *cse_reg_info_used_list_end;
327 /* A mapping from registers to cse_reg_info data structures. */
328 #define REGHASH_SHIFT 7
329 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
330 #define REGHASH_MASK (REGHASH_SIZE - 1)
331 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
333 #define REGHASH_FN(REGNO) \
334 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
336 /* The last lookup we did into the cse_reg_info_tree. This allows us
337 to cache repeated lookups. */
338 static unsigned int cached_regno;
339 static struct cse_reg_info *cached_cse_reg_info;
341 /* A HARD_REG_SET containing all the hard registers for which there is
342 currently a REG expression in the hash table. Note the difference
343 from the above variables, which indicate if the REG is mentioned in some
344 expression in the table. */
346 static HARD_REG_SET hard_regs_in_table;
348 /* A HARD_REG_SET containing all the hard registers that are invalidated
351 static HARD_REG_SET regs_invalidated_by_call;
353 /* CUID of insn that starts the basic block currently being cse-processed. */
355 static int cse_basic_block_start;
357 /* CUID of insn that ends the basic block currently being cse-processed. */
359 static int cse_basic_block_end;
361 /* Vector mapping INSN_UIDs to cuids.
362 The cuids are like uids but increase monotonically always.
363 We use them to see whether a reg is used outside a given basic block. */
365 static int *uid_cuid;
367 /* Highest UID in UID_CUID. */
370 /* Get the cuid of an insn. */
372 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
374 /* Nonzero if this pass has made changes, and therefore it's
375 worthwhile to run the garbage collector. */
377 static int cse_altered;
379 /* Nonzero if cse has altered conditional jump insns
380 in such a way that jump optimization should be redone. */
382 static int cse_jumps_altered;
384 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
385 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
386 to put in the note. */
387 static int recorded_label_ref;
389 /* canon_hash stores 1 in do_not_record
390 if it notices a reference to CC0, PC, or some other volatile
393 static int do_not_record;
395 #ifdef LOAD_EXTEND_OP
397 /* Scratch rtl used when looking for load-extended copy of a MEM. */
398 static rtx memory_extend_rtx;
401 /* canon_hash stores 1 in hash_arg_in_memory
402 if it notices a reference to memory within the expression being hashed. */
404 static int hash_arg_in_memory;
406 /* The hash table contains buckets which are chains of `struct table_elt's,
407 each recording one expression's information.
408 That expression is in the `exp' field.
410 The canon_exp field contains a canonical (from the point of view of
411 alias analysis) version of the `exp' field.
413 Those elements with the same hash code are chained in both directions
414 through the `next_same_hash' and `prev_same_hash' fields.
416 Each set of expressions with equivalent values
417 are on a two-way chain through the `next_same_value'
418 and `prev_same_value' fields, and all point with
419 the `first_same_value' field at the first element in
420 that chain. The chain is in order of increasing cost.
421 Each element's cost value is in its `cost' field.
423 The `in_memory' field is nonzero for elements that
424 involve any reference to memory. These elements are removed
425 whenever a write is done to an unidentified location in memory.
426 To be safe, we assume that a memory address is unidentified unless
427 the address is either a symbol constant or a constant plus
428 the frame pointer or argument pointer.
430 The `related_value' field is used to connect related expressions
431 (that differ by adding an integer).
432 The related expressions are chained in a circular fashion.
433 `related_value' is zero for expressions for which this
436 The `cost' field stores the cost of this element's expression.
438 The `is_const' flag is set if the element is a constant (including
441 The `flag' field is used as a temporary during some search routines.
443 The `mode' field is usually the same as GET_MODE (`exp'), but
444 if `exp' is a CONST_INT and has no machine mode then the `mode'
445 field is the mode it was being used as. Each constant is
446 recorded separately for each mode it is used with. */
452 struct table_elt *next_same_hash;
453 struct table_elt *prev_same_hash;
454 struct table_elt *next_same_value;
455 struct table_elt *prev_same_value;
456 struct table_elt *first_same_value;
457 struct table_elt *related_value;
459 enum machine_mode mode;
465 /* We don't want a lot of buckets, because we rarely have very many
466 things stored in the hash table, and a lot of buckets slows
467 down a lot of loops that happen frequently. */
469 #define HASH_SIZE (1 << HASH_SHIFT)
470 #define HASH_MASK (HASH_SIZE - 1)
472 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
473 register (hard registers may require `do_not_record' to be set). */
476 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
477 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
478 : canon_hash (X, M)) & HASH_MASK)
480 /* Determine whether register number N is considered a fixed register for CSE.
481 It is desirable to replace other regs with fixed regs, to reduce need for
483 A reg wins if it is either the frame pointer or designated as fixed. */
484 #define FIXED_REGNO_P(N) \
485 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
486 || fixed_regs[N] || global_regs[N])
488 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
489 hard registers and pointers into the frame are the cheapest with a cost
490 of 0. Next come pseudos with a cost of one and other hard registers with
491 a cost of 2. Aside from these special cases, call `rtx_cost'. */
493 #define CHEAP_REGNO(N) \
494 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
495 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
496 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
497 || ((N) < FIRST_PSEUDO_REGISTER \
498 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
500 /* A register is cheap if it is a user variable assigned to the register
501 or if its register number always corresponds to a cheap register. */
503 #define CHEAP_REG(N) \
504 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
505 || CHEAP_REGNO (REGNO (N)))
508 (GET_CODE (X) == REG \
509 ? (CHEAP_REG (X) ? 0 \
510 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
514 /* Get the info associated with register N. */
516 #define GET_CSE_REG_INFO(N) \
517 (((N) == cached_regno && cached_cse_reg_info) \
518 ? cached_cse_reg_info : get_cse_reg_info ((N)))
520 /* Get the number of times this register has been updated in this
523 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
525 /* Get the point at which REG was recorded in the table. */
527 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
529 /* Get the quantity number for REG. */
531 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
533 /* Determine if the quantity number for register X represents a valid index
534 into the qty_table. */
536 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
538 static struct table_elt *table[HASH_SIZE];
540 /* Chain of `struct table_elt's made so far for this function
541 but currently removed from the table. */
543 static struct table_elt *free_element_chain;
545 /* Number of `struct table_elt' structures made so far for this function. */
547 static int n_elements_made;
549 /* Maximum value `n_elements_made' has had so far in this compilation
550 for functions previously processed. */
552 static int max_elements_made;
554 /* Surviving equivalence class when two equivalence classes are merged
555 by recording the effects of a jump in the last insn. Zero if the
556 last insn was not a conditional jump. */
558 static struct table_elt *last_jump_equiv_class;
560 /* Set to the cost of a constant pool reference if one was found for a
561 symbolic constant. If this was found, it means we should try to
562 convert constants into constant pool entries if they don't fit in
565 static int constant_pool_entries_cost;
567 /* Define maximum length of a branch path. */
569 #define PATHLENGTH 10
571 /* This data describes a block that will be processed by cse_basic_block. */
573 struct cse_basic_block_data
575 /* Lowest CUID value of insns in block. */
577 /* Highest CUID value of insns in block. */
579 /* Total number of SETs in block. */
581 /* Last insn in the block. */
583 /* Size of current branch path, if any. */
585 /* Current branch path, indicating which branches will be taken. */
588 /* The branch insn. */
590 /* Whether it should be taken or not. AROUND is the same as taken
591 except that it is used when the destination label is not preceded
593 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
597 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
598 virtual regs here because the simplify_*_operation routines are called
599 by integrate.c, which is called before virtual register instantiation.
601 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
602 a header file so that their definitions can be shared with the
603 simplification routines in simplify-rtx.c. Until then, do not
604 change these macros without also changing the copy in simplify-rtx.c. */
606 #define FIXED_BASE_PLUS_P(X) \
607 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
608 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
609 || (X) == virtual_stack_vars_rtx \
610 || (X) == virtual_incoming_args_rtx \
611 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
612 && (XEXP (X, 0) == frame_pointer_rtx \
613 || XEXP (X, 0) == hard_frame_pointer_rtx \
614 || ((X) == arg_pointer_rtx \
615 && fixed_regs[ARG_POINTER_REGNUM]) \
616 || XEXP (X, 0) == virtual_stack_vars_rtx \
617 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
618 || GET_CODE (X) == ADDRESSOF)
620 /* Similar, but also allows reference to the stack pointer.
622 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
623 arg_pointer_rtx by itself is nonzero, because on at least one machine,
624 the i960, the arg pointer is zero when it is unused. */
626 #define NONZERO_BASE_PLUS_P(X) \
627 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
628 || (X) == virtual_stack_vars_rtx \
629 || (X) == virtual_incoming_args_rtx \
630 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
631 && (XEXP (X, 0) == frame_pointer_rtx \
632 || XEXP (X, 0) == hard_frame_pointer_rtx \
633 || ((X) == arg_pointer_rtx \
634 && fixed_regs[ARG_POINTER_REGNUM]) \
635 || XEXP (X, 0) == virtual_stack_vars_rtx \
636 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
637 || (X) == stack_pointer_rtx \
638 || (X) == virtual_stack_dynamic_rtx \
639 || (X) == virtual_outgoing_args_rtx \
640 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
641 && (XEXP (X, 0) == stack_pointer_rtx \
642 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
643 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
644 || GET_CODE (X) == ADDRESSOF)
646 static int notreg_cost PARAMS ((rtx));
647 static void new_basic_block PARAMS ((void));
648 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
649 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
650 static void delete_reg_equiv PARAMS ((unsigned int));
651 static int mention_regs PARAMS ((rtx));
652 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
653 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
654 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
655 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
656 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
657 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
659 static void merge_equiv_classes PARAMS ((struct table_elt *,
660 struct table_elt *));
661 static void invalidate PARAMS ((rtx, enum machine_mode));
662 static int cse_rtx_varies_p PARAMS ((rtx));
663 static void remove_invalid_refs PARAMS ((unsigned int));
664 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
666 static void rehash_using_reg PARAMS ((rtx));
667 static void invalidate_memory PARAMS ((void));
668 static void invalidate_for_call PARAMS ((void));
669 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
670 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
671 static unsigned canon_hash_string PARAMS ((const char *));
672 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
673 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
674 static rtx canon_reg PARAMS ((rtx, rtx));
675 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
676 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
678 enum machine_mode *));
679 static rtx fold_rtx PARAMS ((rtx, rtx));
680 static rtx equiv_constant PARAMS ((rtx));
681 static void record_jump_equiv PARAMS ((rtx, int));
682 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
684 static void cse_insn PARAMS ((rtx, rtx));
685 static int addr_affects_sp_p PARAMS ((rtx));
686 static void invalidate_from_clobbers PARAMS ((rtx));
687 static rtx cse_process_notes PARAMS ((rtx, rtx));
688 static void cse_around_loop PARAMS ((rtx));
689 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
690 static void invalidate_skipped_block PARAMS ((rtx));
691 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
692 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
693 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
694 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
695 extern void dump_class PARAMS ((struct table_elt*));
696 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
697 static int check_dependence PARAMS ((rtx *, void *));
699 static void flush_hash_table PARAMS ((void));
701 /* Dump the expressions in the equivalence class indicated by CLASSP.
702 This function is used only for debugging. */
705 struct table_elt *classp;
707 struct table_elt *elt;
709 fprintf (stderr, "Equivalence chain for ");
710 print_rtl (stderr, classp->exp);
711 fprintf (stderr, ": \n");
713 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
715 print_rtl (stderr, elt->exp);
716 fprintf (stderr, "\n");
720 /* Internal function, to compute cost when X is not a register; called
721 from COST macro to keep it simple. */
727 return ((GET_CODE (x) == SUBREG
728 && GET_CODE (SUBREG_REG (x)) == REG
729 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
730 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
731 && (GET_MODE_SIZE (GET_MODE (x))
732 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
733 && subreg_lowpart_p (x)
734 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
735 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
736 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
737 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
739 : rtx_cost (x, SET) * 2);
742 /* Return the right cost to give to an operation
743 to make the cost of the corresponding register-to-register instruction
744 N times that of a fast register-to-register instruction. */
746 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
748 /* Return an estimate of the cost of computing rtx X.
749 One use is in cse, to decide which expression to keep in the hash table.
750 Another is in rtl generation, to pick the cheapest way to multiply.
751 Other uses like the latter are expected in the future. */
754 rtx_cost (x, outer_code)
756 enum rtx_code outer_code ATTRIBUTE_UNUSED;
759 register enum rtx_code code;
760 register const char *fmt;
766 /* Compute the default costs of certain things.
767 Note that RTX_COSTS can override the defaults. */
773 /* Count multiplication by 2**n as a shift,
774 because if we are considering it, we would output it as a shift. */
775 if (GET_CODE (XEXP (x, 1)) == CONST_INT
776 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
779 total = COSTS_N_INSNS (5);
785 total = COSTS_N_INSNS (7);
788 /* Used in loop.c and combine.c as a marker. */
798 return ! CHEAP_REG (x);
801 /* If we can't tie these modes, make this expensive. The larger
802 the mode, the more expensive it is. */
803 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
804 return COSTS_N_INSNS (2
805 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
808 RTX_COSTS (x, code, outer_code);
811 CONST_COSTS (x, code, outer_code);
815 #ifdef DEFAULT_RTX_COSTS
816 DEFAULT_RTX_COSTS (x, code, outer_code);
821 /* Sum the costs of the sub-rtx's, plus cost of this operation,
822 which is already in total. */
824 fmt = GET_RTX_FORMAT (code);
825 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
827 total += rtx_cost (XEXP (x, i), code);
828 else if (fmt[i] == 'E')
829 for (j = 0; j < XVECLEN (x, i); j++)
830 total += rtx_cost (XVECEXP (x, i, j), code);
835 /* Return cost of address expression X.
836 Expect that X is propertly formed address reference. */
839 address_cost (x, mode)
841 enum machine_mode mode;
843 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
844 during CSE, such nodes are present. Using an ADDRESSOF node which
845 refers to the address of a REG is a good thing because we can then
846 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
848 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
851 /* We may be asked for cost of various unusual addresses, such as operands
852 of push instruction. It is not worthwhile to complicate writing
853 of ADDRESS_COST macro by such cases. */
855 if (!memory_address_p (mode, x))
858 return ADDRESS_COST (x);
860 return rtx_cost (x, MEM);
864 static struct cse_reg_info *
865 get_cse_reg_info (regno)
868 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
869 struct cse_reg_info *p;
871 for (p = *hash_head; p != NULL; p = p->hash_next)
872 if (p->regno == regno)
877 /* Get a new cse_reg_info structure. */
878 if (cse_reg_info_free_list)
880 p = cse_reg_info_free_list;
881 cse_reg_info_free_list = p->next;
884 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
886 /* Insert into hash table. */
887 p->hash_next = *hash_head;
892 p->reg_in_table = -1;
895 p->next = cse_reg_info_used_list;
896 cse_reg_info_used_list = p;
897 if (!cse_reg_info_used_list_end)
898 cse_reg_info_used_list_end = p;
901 /* Cache this lookup; we tend to be looking up information about the
902 same register several times in a row. */
903 cached_regno = regno;
904 cached_cse_reg_info = p;
909 /* Clear the hash table and initialize each register with its own quantity,
910 for a new basic block. */
919 /* Clear out hash table state for this pass. */
921 bzero ((char *) reg_hash, sizeof reg_hash);
923 if (cse_reg_info_used_list)
925 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
926 cse_reg_info_free_list = cse_reg_info_used_list;
927 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
929 cached_cse_reg_info = 0;
931 CLEAR_HARD_REG_SET (hard_regs_in_table);
933 /* The per-quantity values used to be initialized here, but it is
934 much faster to initialize each as it is made in `make_new_qty'. */
936 for (i = 0; i < HASH_SIZE; i++)
938 struct table_elt *first;
943 struct table_elt *last = first;
947 while (last->next_same_hash != NULL)
948 last = last->next_same_hash;
950 /* Now relink this hash entire chain into
951 the free element list. */
953 last->next_same_hash = free_element_chain;
954 free_element_chain = first;
965 /* Say that register REG contains a quantity in mode MODE not in any
966 register before and initialize that quantity. */
969 make_new_qty (reg, mode)
971 enum machine_mode mode;
974 register struct qty_table_elem *ent;
975 register struct reg_eqv_elem *eqv;
977 if (next_qty >= max_qty)
980 q = REG_QTY (reg) = next_qty++;
982 ent->first_reg = reg;
985 ent->const_rtx = ent->const_insn = NULL_RTX;
986 ent->comparison_code = UNKNOWN;
988 eqv = ®_eqv_table[reg];
989 eqv->next = eqv->prev = -1;
992 /* Make reg NEW equivalent to reg OLD.
993 OLD is not changing; NEW is. */
996 make_regs_eqv (new, old)
997 unsigned int new, old;
999 unsigned int lastr, firstr;
1000 int q = REG_QTY (old);
1001 struct qty_table_elem *ent;
1003 ent = &qty_table[q];
1005 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1006 if (! REGNO_QTY_VALID_P (old))
1010 firstr = ent->first_reg;
1011 lastr = ent->last_reg;
1013 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1014 hard regs. Among pseudos, if NEW will live longer than any other reg
1015 of the same qty, and that is beyond the current basic block,
1016 make it the new canonical replacement for this qty. */
1017 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1018 /* Certain fixed registers might be of the class NO_REGS. This means
1019 that not only can they not be allocated by the compiler, but
1020 they cannot be used in substitutions or canonicalizations
1022 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1023 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1024 || (new >= FIRST_PSEUDO_REGISTER
1025 && (firstr < FIRST_PSEUDO_REGISTER
1026 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1027 || (uid_cuid[REGNO_FIRST_UID (new)]
1028 < cse_basic_block_start))
1029 && (uid_cuid[REGNO_LAST_UID (new)]
1030 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1032 reg_eqv_table[firstr].prev = new;
1033 reg_eqv_table[new].next = firstr;
1034 reg_eqv_table[new].prev = -1;
1035 ent->first_reg = new;
1039 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1040 Otherwise, insert before any non-fixed hard regs that are at the
1041 end. Registers of class NO_REGS cannot be used as an
1042 equivalent for anything. */
1043 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1044 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1045 && new >= FIRST_PSEUDO_REGISTER)
1046 lastr = reg_eqv_table[lastr].prev;
1047 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1048 if (reg_eqv_table[lastr].next >= 0)
1049 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1051 qty_table[q].last_reg = new;
1052 reg_eqv_table[lastr].next = new;
1053 reg_eqv_table[new].prev = lastr;
1057 /* Remove REG from its equivalence class. */
1060 delete_reg_equiv (reg)
1063 register struct qty_table_elem *ent;
1064 register int q = REG_QTY (reg);
1067 /* If invalid, do nothing. */
1071 ent = &qty_table[q];
1073 p = reg_eqv_table[reg].prev;
1074 n = reg_eqv_table[reg].next;
1077 reg_eqv_table[n].prev = p;
1081 reg_eqv_table[p].next = n;
1085 REG_QTY (reg) = reg;
1088 /* Remove any invalid expressions from the hash table
1089 that refer to any of the registers contained in expression X.
1091 Make sure that newly inserted references to those registers
1092 as subexpressions will be considered valid.
1094 mention_regs is not called when a register itself
1095 is being stored in the table.
1097 Return 1 if we have done something that may have changed the hash code
1104 register enum rtx_code code;
1106 register const char *fmt;
1107 register int changed = 0;
1112 code = GET_CODE (x);
1115 unsigned int regno = REGNO (x);
1116 unsigned int endregno
1117 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1118 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1121 for (i = regno; i < endregno; i++)
1123 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1124 remove_invalid_refs (i);
1126 REG_IN_TABLE (i) = REG_TICK (i);
1132 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1133 pseudo if they don't use overlapping words. We handle only pseudos
1134 here for simplicity. */
1135 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1136 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1138 unsigned int i = REGNO (SUBREG_REG (x));
1140 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1142 /* If reg_tick has been incremented more than once since
1143 reg_in_table was last set, that means that the entire
1144 register has been set before, so discard anything memorized
1145 for the entrire register, including all SUBREG expressions. */
1146 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1147 remove_invalid_refs (i);
1149 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1152 REG_IN_TABLE (i) = REG_TICK (i);
1156 /* If X is a comparison or a COMPARE and either operand is a register
1157 that does not have a quantity, give it one. This is so that a later
1158 call to record_jump_equiv won't cause X to be assigned a different
1159 hash code and not found in the table after that call.
1161 It is not necessary to do this here, since rehash_using_reg can
1162 fix up the table later, but doing this here eliminates the need to
1163 call that expensive function in the most common case where the only
1164 use of the register is in the comparison. */
1166 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1168 if (GET_CODE (XEXP (x, 0)) == REG
1169 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1170 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1172 rehash_using_reg (XEXP (x, 0));
1176 if (GET_CODE (XEXP (x, 1)) == REG
1177 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1178 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1180 rehash_using_reg (XEXP (x, 1));
1185 fmt = GET_RTX_FORMAT (code);
1186 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1188 changed |= mention_regs (XEXP (x, i));
1189 else if (fmt[i] == 'E')
1190 for (j = 0; j < XVECLEN (x, i); j++)
1191 changed |= mention_regs (XVECEXP (x, i, j));
1196 /* Update the register quantities for inserting X into the hash table
1197 with a value equivalent to CLASSP.
1198 (If the class does not contain a REG, it is irrelevant.)
1199 If MODIFIED is nonzero, X is a destination; it is being modified.
1200 Note that delete_reg_equiv should be called on a register
1201 before insert_regs is done on that register with MODIFIED != 0.
1203 Nonzero value means that elements of reg_qty have changed
1204 so X's hash code may be different. */
1207 insert_regs (x, classp, modified)
1209 struct table_elt *classp;
1212 if (GET_CODE (x) == REG)
1214 unsigned int regno = REGNO (x);
1217 /* If REGNO is in the equivalence table already but is of the
1218 wrong mode for that equivalence, don't do anything here. */
1220 qty_valid = REGNO_QTY_VALID_P (regno);
1223 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1225 if (ent->mode != GET_MODE (x))
1229 if (modified || ! qty_valid)
1232 for (classp = classp->first_same_value;
1234 classp = classp->next_same_value)
1235 if (GET_CODE (classp->exp) == REG
1236 && GET_MODE (classp->exp) == GET_MODE (x))
1238 make_regs_eqv (regno, REGNO (classp->exp));
1242 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1243 than REG_IN_TABLE to find out if there was only a single preceding
1244 invalidation - for the SUBREG - or another one, which would be
1245 for the full register. However, if we find here that REG_TICK
1246 indicates that the register is invalid, it means that it has
1247 been invalidated in a separate operation. The SUBREG might be used
1248 now (then this is a recursive call), or we might use the full REG
1249 now and a SUBREG of it later. So bump up REG_TICK so that
1250 mention_regs will do the right thing. */
1252 && REG_IN_TABLE (regno) >= 0
1253 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1255 make_new_qty (regno, GET_MODE (x));
1262 /* If X is a SUBREG, we will likely be inserting the inner register in the
1263 table. If that register doesn't have an assigned quantity number at
1264 this point but does later, the insertion that we will be doing now will
1265 not be accessible because its hash code will have changed. So assign
1266 a quantity number now. */
1268 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1269 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1271 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1276 return mention_regs (x);
1279 /* Look in or update the hash table. */
1281 /* Remove table element ELT from use in the table.
1282 HASH is its hash code, made using the HASH macro.
1283 It's an argument because often that is known in advance
1284 and we save much time not recomputing it. */
1287 remove_from_table (elt, hash)
1288 register struct table_elt *elt;
1294 /* Mark this element as removed. See cse_insn. */
1295 elt->first_same_value = 0;
1297 /* Remove the table element from its equivalence class. */
1300 register struct table_elt *prev = elt->prev_same_value;
1301 register struct table_elt *next = elt->next_same_value;
1304 next->prev_same_value = prev;
1307 prev->next_same_value = next;
1310 register struct table_elt *newfirst = next;
1313 next->first_same_value = newfirst;
1314 next = next->next_same_value;
1319 /* Remove the table element from its hash bucket. */
1322 register struct table_elt *prev = elt->prev_same_hash;
1323 register struct table_elt *next = elt->next_same_hash;
1326 next->prev_same_hash = prev;
1329 prev->next_same_hash = next;
1330 else if (table[hash] == elt)
1334 /* This entry is not in the proper hash bucket. This can happen
1335 when two classes were merged by `merge_equiv_classes'. Search
1336 for the hash bucket that it heads. This happens only very
1337 rarely, so the cost is acceptable. */
1338 for (hash = 0; hash < HASH_SIZE; hash++)
1339 if (table[hash] == elt)
1344 /* Remove the table element from its related-value circular chain. */
1346 if (elt->related_value != 0 && elt->related_value != elt)
1348 register struct table_elt *p = elt->related_value;
1350 while (p->related_value != elt)
1351 p = p->related_value;
1352 p->related_value = elt->related_value;
1353 if (p->related_value == p)
1354 p->related_value = 0;
1357 /* Now add it to the free element chain. */
1358 elt->next_same_hash = free_element_chain;
1359 free_element_chain = elt;
1362 /* Look up X in the hash table and return its table element,
1363 or 0 if X is not in the table.
1365 MODE is the machine-mode of X, or if X is an integer constant
1366 with VOIDmode then MODE is the mode with which X will be used.
1368 Here we are satisfied to find an expression whose tree structure
1371 static struct table_elt *
1372 lookup (x, hash, mode)
1375 enum machine_mode mode;
1377 register struct table_elt *p;
1379 for (p = table[hash]; p; p = p->next_same_hash)
1380 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1381 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1387 /* Like `lookup' but don't care whether the table element uses invalid regs.
1388 Also ignore discrepancies in the machine mode of a register. */
1390 static struct table_elt *
1391 lookup_for_remove (x, hash, mode)
1394 enum machine_mode mode;
1396 register struct table_elt *p;
1398 if (GET_CODE (x) == REG)
1400 unsigned int regno = REGNO (x);
1402 /* Don't check the machine mode when comparing registers;
1403 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1404 for (p = table[hash]; p; p = p->next_same_hash)
1405 if (GET_CODE (p->exp) == REG
1406 && REGNO (p->exp) == regno)
1411 for (p = table[hash]; p; p = p->next_same_hash)
1412 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1419 /* Look for an expression equivalent to X and with code CODE.
1420 If one is found, return that expression. */
1423 lookup_as_function (x, code)
1427 register struct table_elt *p
1428 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1430 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1431 long as we are narrowing. So if we looked in vain for a mode narrower
1432 than word_mode before, look for word_mode now. */
1433 if (p == 0 && code == CONST_INT
1434 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1437 PUT_MODE (x, word_mode);
1438 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1444 for (p = p->first_same_value; p; p = p->next_same_value)
1445 if (GET_CODE (p->exp) == code
1446 /* Make sure this is a valid entry in the table. */
1447 && exp_equiv_p (p->exp, p->exp, 1, 0))
1453 /* Insert X in the hash table, assuming HASH is its hash code
1454 and CLASSP is an element of the class it should go in
1455 (or 0 if a new class should be made).
1456 It is inserted at the proper position to keep the class in
1457 the order cheapest first.
1459 MODE is the machine-mode of X, or if X is an integer constant
1460 with VOIDmode then MODE is the mode with which X will be used.
1462 For elements of equal cheapness, the most recent one
1463 goes in front, except that the first element in the list
1464 remains first unless a cheaper element is added. The order of
1465 pseudo-registers does not matter, as canon_reg will be called to
1466 find the cheapest when a register is retrieved from the table.
1468 The in_memory field in the hash table element is set to 0.
1469 The caller must set it nonzero if appropriate.
1471 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1472 and if insert_regs returns a nonzero value
1473 you must then recompute its hash code before calling here.
1475 If necessary, update table showing constant values of quantities. */
1477 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1479 static struct table_elt *
1480 insert (x, classp, hash, mode)
1482 register struct table_elt *classp;
1484 enum machine_mode mode;
1486 register struct table_elt *elt;
1488 /* If X is a register and we haven't made a quantity for it,
1489 something is wrong. */
1490 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1493 /* If X is a hard register, show it is being put in the table. */
1494 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1496 unsigned int regno = REGNO (x);
1497 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1500 for (i = regno; i < endregno; i++)
1501 SET_HARD_REG_BIT (hard_regs_in_table, i);
1504 /* If X is a label, show we recorded it. */
1505 if (GET_CODE (x) == LABEL_REF
1506 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1507 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1508 recorded_label_ref = 1;
1510 /* Put an element for X into the right hash bucket. */
1512 elt = free_element_chain;
1514 free_element_chain = elt->next_same_hash;
1518 elt = (struct table_elt *) oballoc (sizeof (struct table_elt));
1522 elt->canon_exp = NULL_RTX;
1523 elt->cost = COST (x);
1524 elt->next_same_value = 0;
1525 elt->prev_same_value = 0;
1526 elt->next_same_hash = table[hash];
1527 elt->prev_same_hash = 0;
1528 elt->related_value = 0;
1531 elt->is_const = (CONSTANT_P (x)
1532 /* GNU C++ takes advantage of this for `this'
1533 (and other const values). */
1534 || (RTX_UNCHANGING_P (x)
1535 && GET_CODE (x) == REG
1536 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1537 || FIXED_BASE_PLUS_P (x));
1540 table[hash]->prev_same_hash = elt;
1543 /* Put it into the proper value-class. */
1546 classp = classp->first_same_value;
1547 if (CHEAPER (elt, classp))
1548 /* Insert at the head of the class */
1550 register struct table_elt *p;
1551 elt->next_same_value = classp;
1552 classp->prev_same_value = elt;
1553 elt->first_same_value = elt;
1555 for (p = classp; p; p = p->next_same_value)
1556 p->first_same_value = elt;
1560 /* Insert not at head of the class. */
1561 /* Put it after the last element cheaper than X. */
1562 register struct table_elt *p, *next;
1564 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1567 /* Put it after P and before NEXT. */
1568 elt->next_same_value = next;
1570 next->prev_same_value = elt;
1572 elt->prev_same_value = p;
1573 p->next_same_value = elt;
1574 elt->first_same_value = classp;
1578 elt->first_same_value = elt;
1580 /* If this is a constant being set equivalent to a register or a register
1581 being set equivalent to a constant, note the constant equivalence.
1583 If this is a constant, it cannot be equivalent to a different constant,
1584 and a constant is the only thing that can be cheaper than a register. So
1585 we know the register is the head of the class (before the constant was
1588 If this is a register that is not already known equivalent to a
1589 constant, we must check the entire class.
1591 If this is a register that is already known equivalent to an insn,
1592 update the qtys `const_insn' to show that `this_insn' is the latest
1593 insn making that quantity equivalent to the constant. */
1595 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1596 && GET_CODE (x) != REG)
1598 int exp_q = REG_QTY (REGNO (classp->exp));
1599 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1601 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1602 exp_ent->const_insn = this_insn;
1605 else if (GET_CODE (x) == REG
1607 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1610 register struct table_elt *p;
1612 for (p = classp; p != 0; p = p->next_same_value)
1614 if (p->is_const && GET_CODE (p->exp) != REG)
1616 int x_q = REG_QTY (REGNO (x));
1617 struct qty_table_elem *x_ent = &qty_table[x_q];
1620 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1621 x_ent->const_insn = this_insn;
1627 else if (GET_CODE (x) == REG
1628 && qty_table[REG_QTY (REGNO (x))].const_rtx
1629 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1630 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1632 /* If this is a constant with symbolic value,
1633 and it has a term with an explicit integer value,
1634 link it up with related expressions. */
1635 if (GET_CODE (x) == CONST)
1637 rtx subexp = get_related_value (x);
1639 struct table_elt *subelt, *subelt_prev;
1643 /* Get the integer-free subexpression in the hash table. */
1644 subhash = safe_hash (subexp, mode) & HASH_MASK;
1645 subelt = lookup (subexp, subhash, mode);
1647 subelt = insert (subexp, NULL_PTR, subhash, mode);
1648 /* Initialize SUBELT's circular chain if it has none. */
1649 if (subelt->related_value == 0)
1650 subelt->related_value = subelt;
1651 /* Find the element in the circular chain that precedes SUBELT. */
1652 subelt_prev = subelt;
1653 while (subelt_prev->related_value != subelt)
1654 subelt_prev = subelt_prev->related_value;
1655 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1656 This way the element that follows SUBELT is the oldest one. */
1657 elt->related_value = subelt_prev->related_value;
1658 subelt_prev->related_value = elt;
1665 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1666 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1667 the two classes equivalent.
1669 CLASS1 will be the surviving class; CLASS2 should not be used after this
1672 Any invalid entries in CLASS2 will not be copied. */
1675 merge_equiv_classes (class1, class2)
1676 struct table_elt *class1, *class2;
1678 struct table_elt *elt, *next, *new;
1680 /* Ensure we start with the head of the classes. */
1681 class1 = class1->first_same_value;
1682 class2 = class2->first_same_value;
1684 /* If they were already equal, forget it. */
1685 if (class1 == class2)
1688 for (elt = class2; elt; elt = next)
1692 enum machine_mode mode = elt->mode;
1694 next = elt->next_same_value;
1696 /* Remove old entry, make a new one in CLASS1's class.
1697 Don't do this for invalid entries as we cannot find their
1698 hash code (it also isn't necessary). */
1699 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1701 hash_arg_in_memory = 0;
1702 hash = HASH (exp, mode);
1704 if (GET_CODE (exp) == REG)
1705 delete_reg_equiv (REGNO (exp));
1707 remove_from_table (elt, hash);
1709 if (insert_regs (exp, class1, 0))
1711 rehash_using_reg (exp);
1712 hash = HASH (exp, mode);
1714 new = insert (exp, class1, hash, mode);
1715 new->in_memory = hash_arg_in_memory;
1720 /* Flush the entire hash table. */
1726 struct table_elt *p;
1728 for (i = 0; i < HASH_SIZE; i++)
1729 for (p = table[i]; p; p = table[i])
1731 /* Note that invalidate can remove elements
1732 after P in the current hash chain. */
1733 if (GET_CODE (p->exp) == REG)
1734 invalidate (p->exp, p->mode);
1736 remove_from_table (p, i);
1740 /* Function called for each rtx to check whether true dependence exist. */
1741 struct check_dependence_data
1743 enum machine_mode mode;
1747 check_dependence (x, data)
1751 struct check_dependence_data *d = (struct check_dependence_data *) data;
1752 if (*x && GET_CODE (*x) == MEM)
1753 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1758 /* Remove from the hash table, or mark as invalid, all expressions whose
1759 values could be altered by storing in X. X is a register, a subreg, or
1760 a memory reference with nonvarying address (because, when a memory
1761 reference with a varying address is stored in, all memory references are
1762 removed by invalidate_memory so specific invalidation is superfluous).
1763 FULL_MODE, if not VOIDmode, indicates that this much should be
1764 invalidated instead of just the amount indicated by the mode of X. This
1765 is only used for bitfield stores into memory.
1767 A nonvarying address may be just a register or just a symbol reference,
1768 or it may be either of those plus a numeric offset. */
1771 invalidate (x, full_mode)
1773 enum machine_mode full_mode;
1776 register struct table_elt *p;
1778 switch (GET_CODE (x))
1782 /* If X is a register, dependencies on its contents are recorded
1783 through the qty number mechanism. Just change the qty number of
1784 the register, mark it as invalid for expressions that refer to it,
1785 and remove it itself. */
1786 unsigned int regno = REGNO (x);
1787 unsigned int hash = HASH (x, GET_MODE (x));
1789 /* Remove REGNO from any quantity list it might be on and indicate
1790 that its value might have changed. If it is a pseudo, remove its
1791 entry from the hash table.
1793 For a hard register, we do the first two actions above for any
1794 additional hard registers corresponding to X. Then, if any of these
1795 registers are in the table, we must remove any REG entries that
1796 overlap these registers. */
1798 delete_reg_equiv (regno);
1801 if (regno >= FIRST_PSEUDO_REGISTER)
1803 /* Because a register can be referenced in more than one mode,
1804 we might have to remove more than one table entry. */
1805 struct table_elt *elt;
1807 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1808 remove_from_table (elt, hash);
1812 HOST_WIDE_INT in_table
1813 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1814 unsigned int endregno
1815 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1816 unsigned int tregno, tendregno, rn;
1817 register struct table_elt *p, *next;
1819 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1821 for (rn = regno + 1; rn < endregno; rn++)
1823 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1824 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1825 delete_reg_equiv (rn);
1830 for (hash = 0; hash < HASH_SIZE; hash++)
1831 for (p = table[hash]; p; p = next)
1833 next = p->next_same_hash;
1835 if (GET_CODE (p->exp) != REG
1836 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1839 tregno = REGNO (p->exp);
1841 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1842 if (tendregno > regno && tregno < endregno)
1843 remove_from_table (p, hash);
1850 invalidate (SUBREG_REG (x), VOIDmode);
1854 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1855 invalidate (XVECEXP (x, 0, i), VOIDmode);
1859 /* This is part of a disjoint return value; extract the location in
1860 question ignoring the offset. */
1861 invalidate (XEXP (x, 0), VOIDmode);
1865 /* Calculate the canonical version of X here so that
1866 true_dependence doesn't generate new RTL for X on each call. */
1869 /* Remove all hash table elements that refer to overlapping pieces of
1871 if (full_mode == VOIDmode)
1872 full_mode = GET_MODE (x);
1874 for (i = 0; i < HASH_SIZE; i++)
1876 register struct table_elt *next;
1878 for (p = table[i]; p; p = next)
1880 next = p->next_same_hash;
1883 struct check_dependence_data d;
1885 /* Just canonicalize the expression once;
1886 otherwise each time we call invalidate
1887 true_dependence will canonicalize the
1888 expression again. */
1890 p->canon_exp = canon_rtx (p->exp);
1893 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1894 remove_from_table (p, i);
1905 /* Remove all expressions that refer to register REGNO,
1906 since they are already invalid, and we are about to
1907 mark that register valid again and don't want the old
1908 expressions to reappear as valid. */
1911 remove_invalid_refs (regno)
1915 struct table_elt *p, *next;
1917 for (i = 0; i < HASH_SIZE; i++)
1918 for (p = table[i]; p; p = next)
1920 next = p->next_same_hash;
1921 if (GET_CODE (p->exp) != REG
1922 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1923 remove_from_table (p, i);
1927 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1929 remove_invalid_subreg_refs (regno, word, mode)
1932 enum machine_mode mode;
1935 struct table_elt *p, *next;
1936 unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1938 for (i = 0; i < HASH_SIZE; i++)
1939 for (p = table[i]; p; p = next)
1942 next = p->next_same_hash;
1945 if (GET_CODE (p->exp) != REG
1946 && (GET_CODE (exp) != SUBREG
1947 || GET_CODE (SUBREG_REG (exp)) != REG
1948 || REGNO (SUBREG_REG (exp)) != regno
1949 || (((SUBREG_WORD (exp)
1950 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1952 && SUBREG_WORD (exp) <= end))
1953 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1954 remove_from_table (p, i);
1958 /* Recompute the hash codes of any valid entries in the hash table that
1959 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1961 This is called when we make a jump equivalence. */
1964 rehash_using_reg (x)
1968 struct table_elt *p, *next;
1971 if (GET_CODE (x) == SUBREG)
1974 /* If X is not a register or if the register is known not to be in any
1975 valid entries in the table, we have no work to do. */
1977 if (GET_CODE (x) != REG
1978 || REG_IN_TABLE (REGNO (x)) < 0
1979 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1982 /* Scan all hash chains looking for valid entries that mention X.
1983 If we find one and it is in the wrong hash chain, move it. We can skip
1984 objects that are registers, since they are handled specially. */
1986 for (i = 0; i < HASH_SIZE; i++)
1987 for (p = table[i]; p; p = next)
1989 next = p->next_same_hash;
1990 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1991 && exp_equiv_p (p->exp, p->exp, 1, 0)
1992 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1994 if (p->next_same_hash)
1995 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1997 if (p->prev_same_hash)
1998 p->prev_same_hash->next_same_hash = p->next_same_hash;
2000 table[i] = p->next_same_hash;
2002 p->next_same_hash = table[hash];
2003 p->prev_same_hash = 0;
2005 table[hash]->prev_same_hash = p;
2011 /* Remove from the hash table any expression that is a call-clobbered
2012 register. Also update their TICK values. */
2015 invalidate_for_call ()
2017 unsigned int regno, endregno;
2020 struct table_elt *p, *next;
2023 /* Go through all the hard registers. For each that is clobbered in
2024 a CALL_INSN, remove the register from quantity chains and update
2025 reg_tick if defined. Also see if any of these registers is currently
2028 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2029 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2031 delete_reg_equiv (regno);
2032 if (REG_TICK (regno) >= 0)
2035 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2038 /* In the case where we have no call-clobbered hard registers in the
2039 table, we are done. Otherwise, scan the table and remove any
2040 entry that overlaps a call-clobbered register. */
2043 for (hash = 0; hash < HASH_SIZE; hash++)
2044 for (p = table[hash]; p; p = next)
2046 next = p->next_same_hash;
2048 if (GET_CODE (p->exp) != REG
2049 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2052 regno = REGNO (p->exp);
2053 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2055 for (i = regno; i < endregno; i++)
2056 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2058 remove_from_table (p, hash);
2064 /* Given an expression X of type CONST,
2065 and ELT which is its table entry (or 0 if it
2066 is not in the hash table),
2067 return an alternate expression for X as a register plus integer.
2068 If none can be found, return 0. */
2071 use_related_value (x, elt)
2073 struct table_elt *elt;
2075 register struct table_elt *relt = 0;
2076 register struct table_elt *p, *q;
2077 HOST_WIDE_INT offset;
2079 /* First, is there anything related known?
2080 If we have a table element, we can tell from that.
2081 Otherwise, must look it up. */
2083 if (elt != 0 && elt->related_value != 0)
2085 else if (elt == 0 && GET_CODE (x) == CONST)
2087 rtx subexp = get_related_value (x);
2089 relt = lookup (subexp,
2090 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2097 /* Search all related table entries for one that has an
2098 equivalent register. */
2103 /* This loop is strange in that it is executed in two different cases.
2104 The first is when X is already in the table. Then it is searching
2105 the RELATED_VALUE list of X's class (RELT). The second case is when
2106 X is not in the table. Then RELT points to a class for the related
2109 Ensure that, whatever case we are in, that we ignore classes that have
2110 the same value as X. */
2112 if (rtx_equal_p (x, p->exp))
2115 for (q = p->first_same_value; q; q = q->next_same_value)
2116 if (GET_CODE (q->exp) == REG)
2122 p = p->related_value;
2124 /* We went all the way around, so there is nothing to be found.
2125 Alternatively, perhaps RELT was in the table for some other reason
2126 and it has no related values recorded. */
2127 if (p == relt || p == 0)
2134 offset = (get_integer_term (x) - get_integer_term (p->exp));
2135 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2136 return plus_constant (q->exp, offset);
2139 /* Hash a string. Just add its bytes up. */
2140 static inline unsigned
2141 canon_hash_string (ps)
2145 const unsigned char *p = (const unsigned char *)ps;
2154 /* Hash an rtx. We are careful to make sure the value is never negative.
2155 Equivalent registers hash identically.
2156 MODE is used in hashing for CONST_INTs only;
2157 otherwise the mode of X is used.
2159 Store 1 in do_not_record if any subexpression is volatile.
2161 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2162 which does not have the RTX_UNCHANGING_P bit set.
2164 Note that cse_insn knows that the hash code of a MEM expression
2165 is just (int) MEM plus the hash code of the address. */
2168 canon_hash (x, mode)
2170 enum machine_mode mode;
2173 register unsigned hash = 0;
2174 register enum rtx_code code;
2175 register const char *fmt;
2177 /* repeat is used to turn tail-recursion into iteration. */
2182 code = GET_CODE (x);
2187 unsigned int regno = REGNO (x);
2189 /* On some machines, we can't record any non-fixed hard register,
2190 because extending its life will cause reload problems. We
2191 consider ap, fp, and sp to be fixed for this purpose.
2193 We also consider CCmode registers to be fixed for this purpose;
2194 failure to do so leads to failure to simplify 0<100 type of
2197 On all machines, we can't record any global registers. */
2199 if (regno < FIRST_PSEUDO_REGISTER
2200 && (global_regs[regno]
2201 || (SMALL_REGISTER_CLASSES
2202 && ! fixed_regs[regno]
2203 && regno != FRAME_POINTER_REGNUM
2204 && regno != HARD_FRAME_POINTER_REGNUM
2205 && regno != ARG_POINTER_REGNUM
2206 && regno != STACK_POINTER_REGNUM
2207 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2213 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2217 /* We handle SUBREG of a REG specially because the underlying
2218 reg changes its hash value with every value change; we don't
2219 want to have to forget unrelated subregs when one subreg changes. */
2222 if (GET_CODE (SUBREG_REG (x)) == REG)
2224 hash += (((unsigned) SUBREG << 7)
2225 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2233 unsigned HOST_WIDE_INT tem = INTVAL (x);
2234 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2239 /* This is like the general case, except that it only counts
2240 the integers representing the constant. */
2241 hash += (unsigned) code + (unsigned) GET_MODE (x);
2242 if (GET_MODE (x) != VOIDmode)
2243 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2245 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2249 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2250 + (unsigned) CONST_DOUBLE_HIGH (x));
2253 /* Assume there is only one rtx object for any given label. */
2255 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2259 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2263 /* We don't record if marked volatile or if BLKmode since we don't
2264 know the size of the move. */
2265 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2270 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2272 hash_arg_in_memory = 1;
2274 /* Now that we have already found this special case,
2275 might as well speed it up as much as possible. */
2276 hash += (unsigned) MEM;
2289 case UNSPEC_VOLATILE:
2294 if (MEM_VOLATILE_P (x))
2301 /* We don't want to take the filename and line into account. */
2302 hash += (unsigned) code + (unsigned) GET_MODE (x)
2303 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2304 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2305 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2307 if (ASM_OPERANDS_INPUT_LENGTH (x))
2309 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2311 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2312 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2313 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2317 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2318 x = ASM_OPERANDS_INPUT (x, 0);
2319 mode = GET_MODE (x);
2331 i = GET_RTX_LENGTH (code) - 1;
2332 hash += (unsigned) code + (unsigned) GET_MODE (x);
2333 fmt = GET_RTX_FORMAT (code);
2338 rtx tem = XEXP (x, i);
2340 /* If we are about to do the last recursive call
2341 needed at this level, change it into iteration.
2342 This function is called enough to be worth it. */
2348 hash += canon_hash (tem, 0);
2350 else if (fmt[i] == 'E')
2351 for (j = 0; j < XVECLEN (x, i); j++)
2352 hash += canon_hash (XVECEXP (x, i, j), 0);
2353 else if (fmt[i] == 's')
2354 hash += canon_hash_string (XSTR (x, i));
2355 else if (fmt[i] == 'i')
2357 register unsigned tem = XINT (x, i);
2360 else if (fmt[i] == '0' || fmt[i] == 't')
2369 /* Like canon_hash but with no side effects. */
2374 enum machine_mode mode;
2376 int save_do_not_record = do_not_record;
2377 int save_hash_arg_in_memory = hash_arg_in_memory;
2378 unsigned hash = canon_hash (x, mode);
2379 hash_arg_in_memory = save_hash_arg_in_memory;
2380 do_not_record = save_do_not_record;
2384 /* Return 1 iff X and Y would canonicalize into the same thing,
2385 without actually constructing the canonicalization of either one.
2386 If VALIDATE is nonzero,
2387 we assume X is an expression being processed from the rtl
2388 and Y was found in the hash table. We check register refs
2389 in Y for being marked as valid.
2391 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2392 that is known to be in the register. Ordinarily, we don't allow them
2393 to match, because letting them match would cause unpredictable results
2394 in all the places that search a hash table chain for an equivalent
2395 for a given value. A possible equivalent that has different structure
2396 has its hash code computed from different data. Whether the hash code
2397 is the same as that of the given value is pure luck. */
2400 exp_equiv_p (x, y, validate, equal_values)
2406 register enum rtx_code code;
2407 register const char *fmt;
2409 /* Note: it is incorrect to assume an expression is equivalent to itself
2410 if VALIDATE is nonzero. */
2411 if (x == y && !validate)
2413 if (x == 0 || y == 0)
2416 code = GET_CODE (x);
2417 if (code != GET_CODE (y))
2422 /* If X is a constant and Y is a register or vice versa, they may be
2423 equivalent. We only have to validate if Y is a register. */
2424 if (CONSTANT_P (x) && GET_CODE (y) == REG
2425 && REGNO_QTY_VALID_P (REGNO (y)))
2427 int y_q = REG_QTY (REGNO (y));
2428 struct qty_table_elem *y_ent = &qty_table[y_q];
2430 if (GET_MODE (y) == y_ent->mode
2431 && rtx_equal_p (x, y_ent->const_rtx)
2432 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2436 if (CONSTANT_P (y) && code == REG
2437 && REGNO_QTY_VALID_P (REGNO (x)))
2439 int x_q = REG_QTY (REGNO (x));
2440 struct qty_table_elem *x_ent = &qty_table[x_q];
2442 if (GET_MODE (x) == x_ent->mode
2443 && rtx_equal_p (y, x_ent->const_rtx))
2450 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2451 if (GET_MODE (x) != GET_MODE (y))
2462 return XEXP (x, 0) == XEXP (y, 0);
2465 return XSTR (x, 0) == XSTR (y, 0);
2469 unsigned int regno = REGNO (y);
2470 unsigned int endregno
2471 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2472 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2475 /* If the quantities are not the same, the expressions are not
2476 equivalent. If there are and we are not to validate, they
2477 are equivalent. Otherwise, ensure all regs are up-to-date. */
2479 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2485 for (i = regno; i < endregno; i++)
2486 if (REG_IN_TABLE (i) != REG_TICK (i))
2492 /* For commutative operations, check both orders. */
2500 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2501 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2502 validate, equal_values))
2503 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2504 validate, equal_values)
2505 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2506 validate, equal_values)));
2509 /* We don't use the generic code below because we want to
2510 disregard filename and line numbers. */
2512 /* A volatile asm isn't equivalent to any other. */
2513 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2516 if (GET_MODE (x) != GET_MODE (y)
2517 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2518 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2519 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2520 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2521 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2524 if (ASM_OPERANDS_INPUT_LENGTH (x))
2526 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2527 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2528 ASM_OPERANDS_INPUT (y, i),
2529 validate, equal_values)
2530 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2531 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2541 /* Compare the elements. If any pair of corresponding elements
2542 fail to match, return 0 for the whole things. */
2544 fmt = GET_RTX_FORMAT (code);
2545 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2550 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2555 if (XVECLEN (x, i) != XVECLEN (y, i))
2557 for (j = 0; j < XVECLEN (x, i); j++)
2558 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2559 validate, equal_values))
2564 if (strcmp (XSTR (x, i), XSTR (y, i)))
2569 if (XINT (x, i) != XINT (y, i))
2574 if (XWINT (x, i) != XWINT (y, i))
2590 /* Return 1 if X has a value that can vary even between two
2591 executions of the program. 0 means X can be compared reliably
2592 against certain constants or near-constants. */
2595 cse_rtx_varies_p (x)
2598 /* We need not check for X and the equivalence class being of the same
2599 mode because if X is equivalent to a constant in some mode, it
2600 doesn't vary in any mode. */
2602 if (GET_CODE (x) == REG
2603 && REGNO_QTY_VALID_P (REGNO (x)))
2605 int x_q = REG_QTY (REGNO (x));
2606 struct qty_table_elem *x_ent = &qty_table[x_q];
2608 if (GET_MODE (x) == x_ent->mode
2609 && x_ent->const_rtx != NULL_RTX)
2613 if (GET_CODE (x) == PLUS
2614 && GET_CODE (XEXP (x, 1)) == CONST_INT
2615 && GET_CODE (XEXP (x, 0)) == REG
2616 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2618 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2619 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2621 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2622 && x0_ent->const_rtx != NULL_RTX)
2626 /* This can happen as the result of virtual register instantiation, if
2627 the initial constant is too large to be a valid address. This gives
2628 us a three instruction sequence, load large offset into a register,
2629 load fp minus a constant into a register, then a MEM which is the
2630 sum of the two `constant' registers. */
2631 if (GET_CODE (x) == PLUS
2632 && GET_CODE (XEXP (x, 0)) == REG
2633 && GET_CODE (XEXP (x, 1)) == REG
2634 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2635 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2637 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2638 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2639 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2640 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2642 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2643 && x0_ent->const_rtx != NULL_RTX
2644 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2645 && x1_ent->const_rtx != NULL_RTX)
2649 return rtx_varies_p (x);
2652 /* Canonicalize an expression:
2653 replace each register reference inside it
2654 with the "oldest" equivalent register.
2656 If INSN is non-zero and we are replacing a pseudo with a hard register
2657 or vice versa, validate_change is used to ensure that INSN remains valid
2658 after we make our substitution. The calls are made with IN_GROUP non-zero
2659 so apply_change_group must be called upon the outermost return from this
2660 function (unless INSN is zero). The result of apply_change_group can
2661 generally be discarded since the changes we are making are optional. */
2669 register enum rtx_code code;
2670 register const char *fmt;
2675 code = GET_CODE (x);
2693 register struct qty_table_elem *ent;
2695 /* Never replace a hard reg, because hard regs can appear
2696 in more than one machine mode, and we must preserve the mode
2697 of each occurrence. Also, some hard regs appear in
2698 MEMs that are shared and mustn't be altered. Don't try to
2699 replace any reg that maps to a reg of class NO_REGS. */
2700 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2701 || ! REGNO_QTY_VALID_P (REGNO (x)))
2704 q = REG_QTY (REGNO (x));
2705 ent = &qty_table[q];
2706 first = ent->first_reg;
2707 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2708 : REGNO_REG_CLASS (first) == NO_REGS ? x
2709 : gen_rtx_REG (ent->mode, first));
2716 fmt = GET_RTX_FORMAT (code);
2717 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2723 rtx new = canon_reg (XEXP (x, i), insn);
2726 /* If replacing pseudo with hard reg or vice versa, ensure the
2727 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2728 if (insn != 0 && new != 0
2729 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2730 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2731 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2732 || (insn_code = recog_memoized (insn)) < 0
2733 || insn_data[insn_code].n_dups > 0))
2734 validate_change (insn, &XEXP (x, i), new, 1);
2738 else if (fmt[i] == 'E')
2739 for (j = 0; j < XVECLEN (x, i); j++)
2740 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2746 /* LOC is a location within INSN that is an operand address (the contents of
2747 a MEM). Find the best equivalent address to use that is valid for this
2750 On most CISC machines, complicated address modes are costly, and rtx_cost
2751 is a good approximation for that cost. However, most RISC machines have
2752 only a few (usually only one) memory reference formats. If an address is
2753 valid at all, it is often just as cheap as any other address. Hence, for
2754 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2755 costs of various addresses. For two addresses of equal cost, choose the one
2756 with the highest `rtx_cost' value as that has the potential of eliminating
2757 the most insns. For equal costs, we choose the first in the equivalence
2758 class. Note that we ignore the fact that pseudo registers are cheaper
2759 than hard registers here because we would also prefer the pseudo registers.
2763 find_best_addr (insn, loc, mode)
2766 enum machine_mode mode;
2768 struct table_elt *elt;
2771 struct table_elt *p;
2772 int found_better = 1;
2774 int save_do_not_record = do_not_record;
2775 int save_hash_arg_in_memory = hash_arg_in_memory;
2778 int folded_cost, addr_cost;
2781 /* Do not try to replace constant addresses or addresses of local and
2782 argument slots. These MEM expressions are made only once and inserted
2783 in many instructions, as well as being used to control symbol table
2784 output. It is not safe to clobber them.
2786 There are some uncommon cases where the address is already in a register
2787 for some reason, but we cannot take advantage of that because we have
2788 no easy way to unshare the MEM. In addition, looking up all stack
2789 addresses is costly. */
2790 if ((GET_CODE (addr) == PLUS
2791 && GET_CODE (XEXP (addr, 0)) == REG
2792 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2793 && (regno = REGNO (XEXP (addr, 0)),
2794 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2795 || regno == ARG_POINTER_REGNUM))
2796 || (GET_CODE (addr) == REG
2797 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2798 || regno == HARD_FRAME_POINTER_REGNUM
2799 || regno == ARG_POINTER_REGNUM))
2800 || GET_CODE (addr) == ADDRESSOF
2801 || CONSTANT_ADDRESS_P (addr))
2804 /* If this address is not simply a register, try to fold it. This will
2805 sometimes simplify the expression. Many simplifications
2806 will not be valid, but some, usually applying the associative rule, will
2807 be valid and produce better code. */
2808 if (GET_CODE (addr) != REG)
2810 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2812 folded_cost = address_cost (folded, mode);
2813 addr_cost = address_cost (addr, mode);
2815 if ((folded_cost < addr_cost
2816 || (folded_cost == addr_cost
2817 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2818 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2819 && validate_change (insn, loc, folded, 0))
2823 /* If this address is not in the hash table, we can't look for equivalences
2824 of the whole address. Also, ignore if volatile. */
2827 hash = HASH (addr, Pmode);
2828 addr_volatile = do_not_record;
2829 do_not_record = save_do_not_record;
2830 hash_arg_in_memory = save_hash_arg_in_memory;
2835 elt = lookup (addr, hash, Pmode);
2837 #ifndef ADDRESS_COST
2840 int our_cost = elt->cost;
2842 /* Find the lowest cost below ours that works. */
2843 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2844 if (elt->cost < our_cost
2845 && (GET_CODE (elt->exp) == REG
2846 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2847 && validate_change (insn, loc,
2848 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2855 /* We need to find the best (under the criteria documented above) entry
2856 in the class that is valid. We use the `flag' field to indicate
2857 choices that were invalid and iterate until we can't find a better
2858 one that hasn't already been tried. */
2860 for (p = elt->first_same_value; p; p = p->next_same_value)
2863 while (found_better)
2865 int best_addr_cost = address_cost (*loc, mode);
2866 int best_rtx_cost = (elt->cost + 1) >> 1;
2868 struct table_elt *best_elt = elt;
2871 for (p = elt->first_same_value; p; p = p->next_same_value)
2874 if ((GET_CODE (p->exp) == REG
2875 || exp_equiv_p (p->exp, p->exp, 1, 0))
2876 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2877 || (exp_cost == best_addr_cost
2878 && (p->cost + 1) >> 1 < best_rtx_cost)))
2881 best_addr_cost = exp_cost;
2882 best_rtx_cost = (p->cost + 1) >> 1;
2889 if (validate_change (insn, loc,
2890 canon_reg (copy_rtx (best_elt->exp),
2899 /* If the address is a binary operation with the first operand a register
2900 and the second a constant, do the same as above, but looking for
2901 equivalences of the register. Then try to simplify before checking for
2902 the best address to use. This catches a few cases: First is when we
2903 have REG+const and the register is another REG+const. We can often merge
2904 the constants and eliminate one insn and one register. It may also be
2905 that a machine has a cheap REG+REG+const. Finally, this improves the
2906 code on the Alpha for unaligned byte stores. */
2908 if (flag_expensive_optimizations
2909 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2910 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2911 && GET_CODE (XEXP (*loc, 0)) == REG
2912 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2914 rtx c = XEXP (*loc, 1);
2917 hash = HASH (XEXP (*loc, 0), Pmode);
2918 do_not_record = save_do_not_record;
2919 hash_arg_in_memory = save_hash_arg_in_memory;
2921 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2925 /* We need to find the best (under the criteria documented above) entry
2926 in the class that is valid. We use the `flag' field to indicate
2927 choices that were invalid and iterate until we can't find a better
2928 one that hasn't already been tried. */
2930 for (p = elt->first_same_value; p; p = p->next_same_value)
2933 while (found_better)
2935 int best_addr_cost = address_cost (*loc, mode);
2936 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2937 struct table_elt *best_elt = elt;
2938 rtx best_rtx = *loc;
2941 /* This is at worst case an O(n^2) algorithm, so limit our search
2942 to the first 32 elements on the list. This avoids trouble
2943 compiling code with very long basic blocks that can easily
2944 call simplify_gen_binary so many times that we run out of
2948 for (p = elt->first_same_value, count = 0;
2950 p = p->next_same_value, count++)
2952 && (GET_CODE (p->exp) == REG
2953 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2955 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2958 new_cost = address_cost (new, mode);
2960 if (new_cost < best_addr_cost
2961 || (new_cost == best_addr_cost
2962 && (COST (new) + 1) >> 1 > best_rtx_cost))
2965 best_addr_cost = new_cost;
2966 best_rtx_cost = (COST (new) + 1) >> 1;
2974 if (validate_change (insn, loc,
2975 canon_reg (copy_rtx (best_rtx),
2986 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2987 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2988 what values are being compared.
2990 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2991 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2992 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2993 compared to produce cc0.
2995 The return value is the comparison operator and is either the code of
2996 A or the code corresponding to the inverse of the comparison. */
2998 static enum rtx_code
2999 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3002 enum machine_mode *pmode1, *pmode2;
3006 arg1 = *parg1, arg2 = *parg2;
3008 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3010 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3012 /* Set non-zero when we find something of interest. */
3014 int reverse_code = 0;
3015 struct table_elt *p = 0;
3017 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3018 On machines with CC0, this is the only case that can occur, since
3019 fold_rtx will return the COMPARE or item being compared with zero
3022 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3025 /* If ARG1 is a comparison operator and CODE is testing for
3026 STORE_FLAG_VALUE, get the inner arguments. */
3028 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3031 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3032 && code == LT && STORE_FLAG_VALUE == -1)
3033 #ifdef FLOAT_STORE_FLAG_VALUE
3034 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3035 && (REAL_VALUE_NEGATIVE
3036 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3041 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3042 && code == GE && STORE_FLAG_VALUE == -1)
3043 #ifdef FLOAT_STORE_FLAG_VALUE
3044 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3045 && (REAL_VALUE_NEGATIVE
3046 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3049 x = arg1, reverse_code = 1;
3052 /* ??? We could also check for
3054 (ne (and (eq (...) (const_int 1))) (const_int 0))
3056 and related forms, but let's wait until we see them occurring. */
3059 /* Look up ARG1 in the hash table and see if it has an equivalence
3060 that lets us see what is being compared. */
3061 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3064 p = p->first_same_value;
3066 for (; p; p = p->next_same_value)
3068 enum machine_mode inner_mode = GET_MODE (p->exp);
3070 /* If the entry isn't valid, skip it. */
3071 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3074 if (GET_CODE (p->exp) == COMPARE
3075 /* Another possibility is that this machine has a compare insn
3076 that includes the comparison code. In that case, ARG1 would
3077 be equivalent to a comparison operation that would set ARG1 to
3078 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3079 ORIG_CODE is the actual comparison being done; if it is an EQ,
3080 we must reverse ORIG_CODE. On machine with a negative value
3081 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3084 && GET_MODE_CLASS (inner_mode) == MODE_INT
3085 && (GET_MODE_BITSIZE (inner_mode)
3086 <= HOST_BITS_PER_WIDE_INT)
3087 && (STORE_FLAG_VALUE
3088 & ((HOST_WIDE_INT) 1
3089 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3090 #ifdef FLOAT_STORE_FLAG_VALUE
3092 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3093 && (REAL_VALUE_NEGATIVE
3094 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3097 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3102 else if ((code == EQ
3104 && GET_MODE_CLASS (inner_mode) == MODE_INT
3105 && (GET_MODE_BITSIZE (inner_mode)
3106 <= HOST_BITS_PER_WIDE_INT)
3107 && (STORE_FLAG_VALUE
3108 & ((HOST_WIDE_INT) 1
3109 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3110 #ifdef FLOAT_STORE_FLAG_VALUE
3112 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3113 && (REAL_VALUE_NEGATIVE
3114 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3117 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3124 /* If this is fp + constant, the equivalent is a better operand since
3125 it may let us predict the value of the comparison. */
3126 else if (NONZERO_BASE_PLUS_P (p->exp))
3133 /* If we didn't find a useful equivalence for ARG1, we are done.
3134 Otherwise, set up for the next iteration. */
3138 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3139 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3140 code = GET_CODE (x);
3143 code = reverse_condition (code);
3146 /* Return our results. Return the modes from before fold_rtx
3147 because fold_rtx might produce const_int, and then it's too late. */
3148 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3149 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3154 /* If X is a nontrivial arithmetic operation on an argument
3155 for which a constant value can be determined, return
3156 the result of operating on that value, as a constant.
3157 Otherwise, return X, possibly with one or more operands
3158 modified by recursive calls to this function.
3160 If X is a register whose contents are known, we do NOT
3161 return those contents here. equiv_constant is called to
3164 INSN is the insn that we may be modifying. If it is 0, make a copy
3165 of X before modifying it. */
3172 register enum rtx_code code;
3173 register enum machine_mode mode;
3174 register const char *fmt;
3180 /* Folded equivalents of first two operands of X. */
3184 /* Constant equivalents of first three operands of X;
3185 0 when no such equivalent is known. */
3190 /* The mode of the first operand of X. We need this for sign and zero
3192 enum machine_mode mode_arg0;
3197 mode = GET_MODE (x);
3198 code = GET_CODE (x);
3207 /* No use simplifying an EXPR_LIST
3208 since they are used only for lists of args
3209 in a function call's REG_EQUAL note. */
3211 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3212 want to (e.g.,) make (addressof (const_int 0)) just because
3213 the location is known to be zero. */
3219 return prev_insn_cc0;
3223 /* If the next insn is a CODE_LABEL followed by a jump table,
3224 PC's value is a LABEL_REF pointing to that label. That
3225 lets us fold switch statements on the Vax. */
3226 if (insn && GET_CODE (insn) == JUMP_INSN)
3228 rtx next = next_nonnote_insn (insn);
3230 if (next && GET_CODE (next) == CODE_LABEL
3231 && NEXT_INSN (next) != 0
3232 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3233 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3234 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3235 return gen_rtx_LABEL_REF (Pmode, next);
3240 /* See if we previously assigned a constant value to this SUBREG. */
3241 if ((new = lookup_as_function (x, CONST_INT)) != 0
3242 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3245 /* If this is a paradoxical SUBREG, we have no idea what value the
3246 extra bits would have. However, if the operand is equivalent
3247 to a SUBREG whose operand is the same as our mode, and all the
3248 modes are within a word, we can just use the inner operand
3249 because these SUBREGs just say how to treat the register.
3251 Similarly if we find an integer constant. */
3253 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3255 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3256 struct table_elt *elt;
3258 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3259 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3260 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3262 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3264 if (CONSTANT_P (elt->exp)
3265 && GET_MODE (elt->exp) == VOIDmode)
3268 if (GET_CODE (elt->exp) == SUBREG
3269 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3270 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3271 return copy_rtx (SUBREG_REG (elt->exp));
3277 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3278 We might be able to if the SUBREG is extracting a single word in an
3279 integral mode or extracting the low part. */
3281 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3282 const_arg0 = equiv_constant (folded_arg0);
3284 folded_arg0 = const_arg0;
3286 if (folded_arg0 != SUBREG_REG (x))
3290 if (GET_MODE_CLASS (mode) == MODE_INT
3291 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3292 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3293 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3294 GET_MODE (SUBREG_REG (x)));
3295 if (new == 0 && subreg_lowpart_p (x))
3296 new = gen_lowpart_if_possible (mode, folded_arg0);
3301 /* If this is a narrowing SUBREG and our operand is a REG, see if
3302 we can find an equivalence for REG that is an arithmetic operation
3303 in a wider mode where both operands are paradoxical SUBREGs
3304 from objects of our result mode. In that case, we couldn't report
3305 an equivalent value for that operation, since we don't know what the
3306 extra bits will be. But we can find an equivalence for this SUBREG
3307 by folding that operation is the narrow mode. This allows us to
3308 fold arithmetic in narrow modes when the machine only supports
3309 word-sized arithmetic.
3311 Also look for a case where we have a SUBREG whose operand is the
3312 same as our result. If both modes are smaller than a word, we
3313 are simply interpreting a register in different modes and we
3314 can use the inner value. */
3316 if (GET_CODE (folded_arg0) == REG
3317 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3318 && subreg_lowpart_p (x))
3320 struct table_elt *elt;
3322 /* We can use HASH here since we know that canon_hash won't be
3324 elt = lookup (folded_arg0,
3325 HASH (folded_arg0, GET_MODE (folded_arg0)),
3326 GET_MODE (folded_arg0));
3329 elt = elt->first_same_value;
3331 for (; elt; elt = elt->next_same_value)
3333 enum rtx_code eltcode = GET_CODE (elt->exp);
3335 /* Just check for unary and binary operations. */
3336 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3337 && GET_CODE (elt->exp) != SIGN_EXTEND
3338 && GET_CODE (elt->exp) != ZERO_EXTEND
3339 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3340 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3342 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3344 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3345 op0 = fold_rtx (op0, NULL_RTX);
3347 op0 = equiv_constant (op0);
3349 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3352 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3353 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3354 && eltcode != DIV && eltcode != MOD
3355 && eltcode != UDIV && eltcode != UMOD
3356 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3357 && eltcode != ROTATE && eltcode != ROTATERT
3358 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3359 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3361 || CONSTANT_P (XEXP (elt->exp, 0)))
3362 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3363 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3365 || CONSTANT_P (XEXP (elt->exp, 1))))
3367 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3368 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3370 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3371 op0 = fold_rtx (op0, NULL_RTX);
3374 op0 = equiv_constant (op0);
3376 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3377 op1 = fold_rtx (op1, NULL_RTX);
3380 op1 = equiv_constant (op1);
3382 /* If we are looking for the low SImode part of
3383 (ashift:DI c (const_int 32)), it doesn't work
3384 to compute that in SImode, because a 32-bit shift
3385 in SImode is unpredictable. We know the value is 0. */
3387 && GET_CODE (elt->exp) == ASHIFT
3388 && GET_CODE (op1) == CONST_INT
3389 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3391 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3393 /* If the count fits in the inner mode's width,
3394 but exceeds the outer mode's width,
3395 the value will get truncated to 0
3399 /* If the count exceeds even the inner mode's width,
3400 don't fold this expression. */
3403 else if (op0 && op1)
3404 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3408 else if (GET_CODE (elt->exp) == SUBREG
3409 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3410 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3412 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3413 new = copy_rtx (SUBREG_REG (elt->exp));
3424 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3425 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3426 new = lookup_as_function (XEXP (x, 0), code);
3428 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3432 /* If we are not actually processing an insn, don't try to find the
3433 best address. Not only don't we care, but we could modify the
3434 MEM in an invalid way since we have no insn to validate against. */
3436 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3439 /* Even if we don't fold in the insn itself,
3440 we can safely do so here, in hopes of getting a constant. */
3441 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3443 HOST_WIDE_INT offset = 0;
3445 if (GET_CODE (addr) == REG
3446 && REGNO_QTY_VALID_P (REGNO (addr)))
3448 int addr_q = REG_QTY (REGNO (addr));
3449 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3451 if (GET_MODE (addr) == addr_ent->mode
3452 && addr_ent->const_rtx != NULL_RTX)
3453 addr = addr_ent->const_rtx;
3456 /* If address is constant, split it into a base and integer offset. */
3457 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3459 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3460 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3462 base = XEXP (XEXP (addr, 0), 0);
3463 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3465 else if (GET_CODE (addr) == LO_SUM
3466 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3467 base = XEXP (addr, 1);
3468 else if (GET_CODE (addr) == ADDRESSOF)
3469 return change_address (x, VOIDmode, addr);
3471 /* If this is a constant pool reference, we can fold it into its
3472 constant to allow better value tracking. */
3473 if (base && GET_CODE (base) == SYMBOL_REF
3474 && CONSTANT_POOL_ADDRESS_P (base))
3476 rtx constant = get_pool_constant (base);
3477 enum machine_mode const_mode = get_pool_mode (base);
3480 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3481 constant_pool_entries_cost = COST (constant);
3483 /* If we are loading the full constant, we have an equivalence. */
3484 if (offset == 0 && mode == const_mode)
3487 /* If this actually isn't a constant (weird!), we can't do
3488 anything. Otherwise, handle the two most common cases:
3489 extracting a word from a multi-word constant, and extracting
3490 the low-order bits. Other cases don't seem common enough to
3492 if (! CONSTANT_P (constant))
3495 if (GET_MODE_CLASS (mode) == MODE_INT
3496 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3497 && offset % UNITS_PER_WORD == 0
3498 && (new = operand_subword (constant,
3499 offset / UNITS_PER_WORD,
3500 0, const_mode)) != 0)
3503 if (((BYTES_BIG_ENDIAN
3504 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3505 || (! BYTES_BIG_ENDIAN && offset == 0))
3506 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3510 /* If this is a reference to a label at a known position in a jump
3511 table, we also know its value. */
3512 if (base && GET_CODE (base) == LABEL_REF)
3514 rtx label = XEXP (base, 0);
3515 rtx table_insn = NEXT_INSN (label);
3517 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3518 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3520 rtx table = PATTERN (table_insn);
3523 && (offset / GET_MODE_SIZE (GET_MODE (table))
3524 < XVECLEN (table, 0)))
3525 return XVECEXP (table, 0,
3526 offset / GET_MODE_SIZE (GET_MODE (table)));
3528 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3529 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3531 rtx table = PATTERN (table_insn);
3534 && (offset / GET_MODE_SIZE (GET_MODE (table))
3535 < XVECLEN (table, 1)))
3537 offset /= GET_MODE_SIZE (GET_MODE (table));
3538 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3541 if (GET_MODE (table) != Pmode)
3542 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3544 /* Indicate this is a constant. This isn't a
3545 valid form of CONST, but it will only be used
3546 to fold the next insns and then discarded, so
3549 Note this expression must be explicitly discarded,
3550 by cse_insn, else it may end up in a REG_EQUAL note
3551 and "escape" to cause problems elsewhere. */
3552 return gen_rtx_CONST (GET_MODE (new), new);
3561 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3562 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3563 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3573 mode_arg0 = VOIDmode;
3575 /* Try folding our operands.
3576 Then see which ones have constant values known. */
3578 fmt = GET_RTX_FORMAT (code);
3579 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3582 rtx arg = XEXP (x, i);
3583 rtx folded_arg = arg, const_arg = 0;
3584 enum machine_mode mode_arg = GET_MODE (arg);
3585 rtx cheap_arg, expensive_arg;
3586 rtx replacements[2];
3589 /* Most arguments are cheap, so handle them specially. */
3590 switch (GET_CODE (arg))
3593 /* This is the same as calling equiv_constant; it is duplicated
3595 if (REGNO_QTY_VALID_P (REGNO (arg)))
3597 int arg_q = REG_QTY (REGNO (arg));
3598 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3600 if (arg_ent->const_rtx != NULL_RTX
3601 && GET_CODE (arg_ent->const_rtx) != REG
3602 && GET_CODE (arg_ent->const_rtx) != PLUS)
3604 = gen_lowpart_if_possible (GET_MODE (arg),
3605 arg_ent->const_rtx);
3619 folded_arg = prev_insn_cc0;
3620 mode_arg = prev_insn_cc0_mode;
3621 const_arg = equiv_constant (folded_arg);
3626 folded_arg = fold_rtx (arg, insn);
3627 const_arg = equiv_constant (folded_arg);
3630 /* For the first three operands, see if the operand
3631 is constant or equivalent to a constant. */
3635 folded_arg0 = folded_arg;
3636 const_arg0 = const_arg;
3637 mode_arg0 = mode_arg;
3640 folded_arg1 = folded_arg;
3641 const_arg1 = const_arg;
3644 const_arg2 = const_arg;
3648 /* Pick the least expensive of the folded argument and an
3649 equivalent constant argument. */
3650 if (const_arg == 0 || const_arg == folded_arg
3651 || COST (const_arg) > COST (folded_arg))
3652 cheap_arg = folded_arg, expensive_arg = const_arg;
3654 cheap_arg = const_arg, expensive_arg = folded_arg;
3656 /* Try to replace the operand with the cheapest of the two
3657 possibilities. If it doesn't work and this is either of the first
3658 two operands of a commutative operation, try swapping them.
3659 If THAT fails, try the more expensive, provided it is cheaper
3660 than what is already there. */
3662 if (cheap_arg == XEXP (x, i))
3665 if (insn == 0 && ! copied)
3671 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3673 j < 2 && replacements[j]
3674 && COST (replacements[j]) < COST (XEXP (x, i));
3677 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3680 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3682 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3683 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3685 if (apply_change_group ())
3687 /* Swap them back to be invalid so that this loop can
3688 continue and flag them to be swapped back later. */
3691 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3703 /* Don't try to fold inside of a vector of expressions.
3704 Doing nothing is harmless. */
3708 /* If a commutative operation, place a constant integer as the second
3709 operand unless the first operand is also a constant integer. Otherwise,
3710 place any constant second unless the first operand is also a constant. */
3712 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3714 if (must_swap || (const_arg0
3716 || (GET_CODE (const_arg0) == CONST_INT
3717 && GET_CODE (const_arg1) != CONST_INT))))
3719 register rtx tem = XEXP (x, 0);
3721 if (insn == 0 && ! copied)
3727 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3728 validate_change (insn, &XEXP (x, 1), tem, 1);
3729 if (apply_change_group ())
3731 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3732 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3737 /* If X is an arithmetic operation, see if we can simplify it. */
3739 switch (GET_RTX_CLASS (code))
3745 /* We can't simplify extension ops unless we know the
3747 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3748 && mode_arg0 == VOIDmode)
3751 /* If we had a CONST, strip it off and put it back later if we
3753 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3754 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3756 new = simplify_unary_operation (code, mode,
3757 const_arg0 ? const_arg0 : folded_arg0,
3759 if (new != 0 && is_const)
3760 new = gen_rtx_CONST (mode, new);
3765 /* See what items are actually being compared and set FOLDED_ARG[01]
3766 to those values and CODE to the actual comparison code. If any are
3767 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3768 do anything if both operands are already known to be constant. */
3770 if (const_arg0 == 0 || const_arg1 == 0)
3772 struct table_elt *p0, *p1;
3773 rtx true = const_true_rtx, false = const0_rtx;
3774 enum machine_mode mode_arg1;
3776 #ifdef FLOAT_STORE_FLAG_VALUE
3777 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3779 true = (CONST_DOUBLE_FROM_REAL_VALUE
3780 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3781 false = CONST0_RTX (mode);
3785 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3786 &mode_arg0, &mode_arg1);
3787 const_arg0 = equiv_constant (folded_arg0);
3788 const_arg1 = equiv_constant (folded_arg1);
3790 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3791 what kinds of things are being compared, so we can't do
3792 anything with this comparison. */
3794 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3797 /* If we do not now have two constants being compared, see
3798 if we can nevertheless deduce some things about the
3800 if (const_arg0 == 0 || const_arg1 == 0)
3802 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3803 non-explicit constant? These aren't zero, but we
3804 don't know their sign. */
3805 if (const_arg1 == const0_rtx
3806 && (NONZERO_BASE_PLUS_P (folded_arg0)
3807 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3809 || GET_CODE (folded_arg0) == SYMBOL_REF
3811 || GET_CODE (folded_arg0) == LABEL_REF
3812 || GET_CODE (folded_arg0) == CONST))
3816 else if (code == NE)
3820 /* See if the two operands are the same. We don't do this
3821 for IEEE floating-point since we can't assume x == x
3822 since x might be a NaN. */
3824 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3825 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3826 && (folded_arg0 == folded_arg1
3827 || (GET_CODE (folded_arg0) == REG
3828 && GET_CODE (folded_arg1) == REG
3829 && (REG_QTY (REGNO (folded_arg0))
3830 == REG_QTY (REGNO (folded_arg1))))
3831 || ((p0 = lookup (folded_arg0,
3832 (safe_hash (folded_arg0, mode_arg0)
3833 & HASH_MASK), mode_arg0))
3834 && (p1 = lookup (folded_arg1,
3835 (safe_hash (folded_arg1, mode_arg0)
3836 & HASH_MASK), mode_arg0))
3837 && p0->first_same_value == p1->first_same_value)))
3838 return ((code == EQ || code == LE || code == GE
3839 || code == LEU || code == GEU)
3842 /* If FOLDED_ARG0 is a register, see if the comparison we are
3843 doing now is either the same as we did before or the reverse
3844 (we only check the reverse if not floating-point). */
3845 else if (GET_CODE (folded_arg0) == REG)
3847 int qty = REG_QTY (REGNO (folded_arg0));
3849 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3851 struct qty_table_elem *ent = &qty_table[qty];
3853 if ((comparison_dominates_p (ent->comparison_code, code)
3854 || (! FLOAT_MODE_P (mode_arg0)
3855 && comparison_dominates_p (ent->comparison_code,
3856 reverse_condition (code))))
3857 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3859 && rtx_equal_p (ent->comparison_const,
3861 || (GET_CODE (folded_arg1) == REG
3862 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3863 return (comparison_dominates_p (ent->comparison_code, code)
3870 /* If we are comparing against zero, see if the first operand is
3871 equivalent to an IOR with a constant. If so, we may be able to
3872 determine the result of this comparison. */
3874 if (const_arg1 == const0_rtx)
3876 rtx y = lookup_as_function (folded_arg0, IOR);
3880 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3881 && GET_CODE (inner_const) == CONST_INT
3882 && INTVAL (inner_const) != 0)
3884 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3885 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3886 && (INTVAL (inner_const)
3887 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3888 rtx true = const_true_rtx, false = const0_rtx;
3890 #ifdef FLOAT_STORE_FLAG_VALUE
3891 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3893 true = (CONST_DOUBLE_FROM_REAL_VALUE
3894 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3895 false = CONST0_RTX (mode);
3919 new = simplify_relational_operation (code,
3920 (mode_arg0 != VOIDmode
3922 : (GET_MODE (const_arg0
3926 ? GET_MODE (const_arg0
3929 : GET_MODE (const_arg1
3932 const_arg0 ? const_arg0 : folded_arg0,
3933 const_arg1 ? const_arg1 : folded_arg1);
3934 #ifdef FLOAT_STORE_FLAG_VALUE
3935 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3937 if (new == const0_rtx)
3938 new = CONST0_RTX (mode);
3940 new = (CONST_DOUBLE_FROM_REAL_VALUE
3941 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3951 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3952 with that LABEL_REF as its second operand. If so, the result is
3953 the first operand of that MINUS. This handles switches with an
3954 ADDR_DIFF_VEC table. */
3955 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3958 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3959 : lookup_as_function (folded_arg0, MINUS);
3961 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3962 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3965 /* Now try for a CONST of a MINUS like the above. */
3966 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3967 : lookup_as_function (folded_arg0, CONST))) != 0
3968 && GET_CODE (XEXP (y, 0)) == MINUS
3969 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3970 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3971 return XEXP (XEXP (y, 0), 0);
3974 /* Likewise if the operands are in the other order. */
3975 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3978 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3979 : lookup_as_function (folded_arg1, MINUS);
3981 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3982 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3985 /* Now try for a CONST of a MINUS like the above. */
3986 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3987 : lookup_as_function (folded_arg1, CONST))) != 0
3988 && GET_CODE (XEXP (y, 0)) == MINUS
3989 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3990 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3991 return XEXP (XEXP (y, 0), 0);
3994 /* If second operand is a register equivalent to a negative
3995 CONST_INT, see if we can find a register equivalent to the
3996 positive constant. Make a MINUS if so. Don't do this for
3997 a non-negative constant since we might then alternate between
3998 chosing positive and negative constants. Having the positive
3999 constant previously-used is the more common case. Be sure
4000 the resulting constant is non-negative; if const_arg1 were
4001 the smallest negative number this would overflow: depending
4002 on the mode, this would either just be the same value (and
4003 hence not save anything) or be incorrect. */
4004 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4005 && INTVAL (const_arg1) < 0
4006 /* This used to test
4008 -INTVAL (const_arg1) >= 0
4010 But The Sun V5.0 compilers mis-compiled that test. So
4011 instead we test for the problematic value in a more direct
4012 manner and hope the Sun compilers get it correct. */
4013 && INTVAL (const_arg1) !=
4014 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4015 && GET_CODE (folded_arg1) == REG)
4017 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4019 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4023 for (p = p->first_same_value; p; p = p->next_same_value)
4024 if (GET_CODE (p->exp) == REG)
4025 return simplify_gen_binary (MINUS, mode, folded_arg0,
4026 canon_reg (p->exp, NULL_RTX));
4031 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4032 If so, produce (PLUS Z C2-C). */
4033 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4035 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4036 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4037 return fold_rtx (plus_constant (copy_rtx (y),
4038 -INTVAL (const_arg1)),
4045 case SMIN: case SMAX: case UMIN: case UMAX:
4046 case IOR: case AND: case XOR:
4047 case MULT: case DIV: case UDIV:
4048 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4049 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4050 is known to be of similar form, we may be able to replace the
4051 operation with a combined operation. This may eliminate the
4052 intermediate operation if every use is simplified in this way.
4053 Note that the similar optimization done by combine.c only works
4054 if the intermediate operation's result has only one reference. */
4056 if (GET_CODE (folded_arg0) == REG
4057 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4060 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4061 rtx y = lookup_as_function (folded_arg0, code);
4063 enum rtx_code associate_code;
4067 || 0 == (inner_const
4068 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4069 || GET_CODE (inner_const) != CONST_INT
4070 /* If we have compiled a statement like
4071 "if (x == (x & mask1))", and now are looking at
4072 "x & mask2", we will have a case where the first operand
4073 of Y is the same as our first operand. Unless we detect
4074 this case, an infinite loop will result. */
4075 || XEXP (y, 0) == folded_arg0)
4078 /* Don't associate these operations if they are a PLUS with the
4079 same constant and it is a power of two. These might be doable
4080 with a pre- or post-increment. Similarly for two subtracts of
4081 identical powers of two with post decrement. */
4083 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4084 && ((HAVE_PRE_INCREMENT
4085 && exact_log2 (INTVAL (const_arg1)) >= 0)
4086 || (HAVE_POST_INCREMENT
4087 && exact_log2 (INTVAL (const_arg1)) >= 0)
4088 || (HAVE_PRE_DECREMENT
4089 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4090 || (HAVE_POST_DECREMENT
4091 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4094 /* Compute the code used to compose the constants. For example,
4095 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4098 = (code == MULT || code == DIV || code == UDIV ? MULT
4099 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4101 new_const = simplify_binary_operation (associate_code, mode,
4102 const_arg1, inner_const);
4107 /* If we are associating shift operations, don't let this
4108 produce a shift of the size of the object or larger.
4109 This could occur when we follow a sign-extend by a right
4110 shift on a machine that does a sign-extend as a pair
4113 if (is_shift && GET_CODE (new_const) == CONST_INT
4114 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4116 /* As an exception, we can turn an ASHIFTRT of this
4117 form into a shift of the number of bits - 1. */
4118 if (code == ASHIFTRT)
4119 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4124 y = copy_rtx (XEXP (y, 0));
4126 /* If Y contains our first operand (the most common way this
4127 can happen is if Y is a MEM), we would do into an infinite
4128 loop if we tried to fold it. So don't in that case. */
4130 if (! reg_mentioned_p (folded_arg0, y))
4131 y = fold_rtx (y, insn);
4133 return simplify_gen_binary (code, mode, y, new_const);
4141 new = simplify_binary_operation (code, mode,
4142 const_arg0 ? const_arg0 : folded_arg0,
4143 const_arg1 ? const_arg1 : folded_arg1);
4147 /* (lo_sum (high X) X) is simply X. */
4148 if (code == LO_SUM && const_arg0 != 0
4149 && GET_CODE (const_arg0) == HIGH
4150 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4156 new = simplify_ternary_operation (code, mode, mode_arg0,
4157 const_arg0 ? const_arg0 : folded_arg0,
4158 const_arg1 ? const_arg1 : folded_arg1,
4159 const_arg2 ? const_arg2 : XEXP (x, 2));
4163 /* Always eliminate CONSTANT_P_RTX at this stage. */
4164 if (code == CONSTANT_P_RTX)
4165 return (const_arg0 ? const1_rtx : const0_rtx);
4169 return new ? new : x;
4172 /* Return a constant value currently equivalent to X.
4173 Return 0 if we don't know one. */
4179 if (GET_CODE (x) == REG
4180 && REGNO_QTY_VALID_P (REGNO (x)))
4182 int x_q = REG_QTY (REGNO (x));
4183 struct qty_table_elem *x_ent = &qty_table[x_q];
4185 if (x_ent->const_rtx)
4186 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4189 if (x == 0 || CONSTANT_P (x))
4192 /* If X is a MEM, try to fold it outside the context of any insn to see if
4193 it might be equivalent to a constant. That handles the case where it
4194 is a constant-pool reference. Then try to look it up in the hash table
4195 in case it is something whose value we have seen before. */
4197 if (GET_CODE (x) == MEM)
4199 struct table_elt *elt;
4201 x = fold_rtx (x, NULL_RTX);
4205 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4209 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4210 if (elt->is_const && CONSTANT_P (elt->exp))
4217 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4218 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4219 least-significant part of X.
4220 MODE specifies how big a part of X to return.
4222 If the requested operation cannot be done, 0 is returned.
4224 This is similar to gen_lowpart in emit-rtl.c. */
4227 gen_lowpart_if_possible (mode, x)
4228 enum machine_mode mode;
4231 rtx result = gen_lowpart_common (mode, x);
4235 else if (GET_CODE (x) == MEM)
4237 /* This is the only other case we handle. */
4238 register int offset = 0;
4241 if (WORDS_BIG_ENDIAN)
4242 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4243 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4244 if (BYTES_BIG_ENDIAN)
4245 /* Adjust the address so that the address-after-the-data is
4247 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4248 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4249 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4250 if (! memory_address_p (mode, XEXP (new, 0)))
4252 MEM_COPY_ATTRIBUTES (new, x);
4259 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4260 branch. It will be zero if not.
4262 In certain cases, this can cause us to add an equivalence. For example,
4263 if we are following the taken case of
4265 we can add the fact that `i' and '2' are now equivalent.
4267 In any case, we can record that this comparison was passed. If the same
4268 comparison is seen later, we will know its value. */
4271 record_jump_equiv (insn, taken)
4275 int cond_known_true;
4278 enum machine_mode mode, mode0, mode1;
4279 int reversed_nonequality = 0;
4282 /* Ensure this is the right kind of insn. */
4283 if (! any_condjump_p (insn))
4285 set = pc_set (insn);
4287 /* See if this jump condition is known true or false. */
4289 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4291 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4293 /* Get the type of comparison being done and the operands being compared.
4294 If we had to reverse a non-equality condition, record that fact so we
4295 know that it isn't valid for floating-point. */
4296 code = GET_CODE (XEXP (SET_SRC (set), 0));
4297 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4298 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4300 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4301 if (! cond_known_true)
4303 reversed_nonequality = (code != EQ && code != NE);
4304 code = reverse_condition (code);
4306 /* Don't remember if we can't find the inverse. */
4307 if (code == UNKNOWN)
4311 /* The mode is the mode of the non-constant. */
4313 if (mode1 != VOIDmode)
4316 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4319 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4320 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4321 Make any useful entries we can with that information. Called from
4322 above function and called recursively. */
4325 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4327 enum machine_mode mode;
4329 int reversed_nonequality;
4331 unsigned op0_hash, op1_hash;
4332 int op0_in_memory, op1_in_memory;
4333 struct table_elt *op0_elt, *op1_elt;
4335 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4336 we know that they are also equal in the smaller mode (this is also
4337 true for all smaller modes whether or not there is a SUBREG, but
4338 is not worth testing for with no SUBREG). */
4340 /* Note that GET_MODE (op0) may not equal MODE. */
4341 if (code == EQ && GET_CODE (op0) == SUBREG
4342 && (GET_MODE_SIZE (GET_MODE (op0))
4343 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4345 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4346 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4348 record_jump_cond (code, mode, SUBREG_REG (op0),
4349 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4350 reversed_nonequality);
4353 if (code == EQ && GET_CODE (op1) == SUBREG
4354 && (GET_MODE_SIZE (GET_MODE (op1))
4355 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4357 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4358 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4360 record_jump_cond (code, mode, SUBREG_REG (op1),
4361 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4362 reversed_nonequality);
4365 /* Similarly, if this is an NE comparison, and either is a SUBREG
4366 making a smaller mode, we know the whole thing is also NE. */
4368 /* Note that GET_MODE (op0) may not equal MODE;
4369 if we test MODE instead, we can get an infinite recursion
4370 alternating between two modes each wider than MODE. */
4372 if (code == NE && GET_CODE (op0) == SUBREG
4373 && subreg_lowpart_p (op0)
4374 && (GET_MODE_SIZE (GET_MODE (op0))
4375 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4377 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4378 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4380 record_jump_cond (code, mode, SUBREG_REG (op0),
4381 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4382 reversed_nonequality);
4385 if (code == NE && GET_CODE (op1) == SUBREG
4386 && subreg_lowpart_p (op1)
4387 && (GET_MODE_SIZE (GET_MODE (op1))
4388 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4390 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4391 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4393 record_jump_cond (code, mode, SUBREG_REG (op1),
4394 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4395 reversed_nonequality);
4398 /* Hash both operands. */
4401 hash_arg_in_memory = 0;
4402 op0_hash = HASH (op0, mode);
4403 op0_in_memory = hash_arg_in_memory;
4409 hash_arg_in_memory = 0;
4410 op1_hash = HASH (op1, mode);
4411 op1_in_memory = hash_arg_in_memory;
4416 /* Look up both operands. */
4417 op0_elt = lookup (op0, op0_hash, mode);
4418 op1_elt = lookup (op1, op1_hash, mode);
4420 /* If both operands are already equivalent or if they are not in the
4421 table but are identical, do nothing. */
4422 if ((op0_elt != 0 && op1_elt != 0
4423 && op0_elt->first_same_value == op1_elt->first_same_value)
4424 || op0 == op1 || rtx_equal_p (op0, op1))
4427 /* If we aren't setting two things equal all we can do is save this
4428 comparison. Similarly if this is floating-point. In the latter
4429 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4430 If we record the equality, we might inadvertently delete code
4431 whose intent was to change -0 to +0. */
4433 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4435 struct qty_table_elem *ent;
4438 /* If we reversed a floating-point comparison, if OP0 is not a
4439 register, or if OP1 is neither a register or constant, we can't
4442 if (GET_CODE (op1) != REG)
4443 op1 = equiv_constant (op1);
4445 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4446 || GET_CODE (op0) != REG || op1 == 0)
4449 /* Put OP0 in the hash table if it isn't already. This gives it a
4450 new quantity number. */
4453 if (insert_regs (op0, NULL_PTR, 0))
4455 rehash_using_reg (op0);
4456 op0_hash = HASH (op0, mode);
4458 /* If OP0 is contained in OP1, this changes its hash code
4459 as well. Faster to rehash than to check, except
4460 for the simple case of a constant. */
4461 if (! CONSTANT_P (op1))
4462 op1_hash = HASH (op1,mode);
4465 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4466 op0_elt->in_memory = op0_in_memory;
4469 qty = REG_QTY (REGNO (op0));
4470 ent = &qty_table[qty];
4472 ent->comparison_code = code;
4473 if (GET_CODE (op1) == REG)
4475 /* Look it up again--in case op0 and op1 are the same. */
4476 op1_elt = lookup (op1, op1_hash, mode);
4478 /* Put OP1 in the hash table so it gets a new quantity number. */
4481 if (insert_regs (op1, NULL_PTR, 0))
4483 rehash_using_reg (op1);
4484 op1_hash = HASH (op1, mode);
4487 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4488 op1_elt->in_memory = op1_in_memory;
4491 ent->comparison_const = NULL_RTX;
4492 ent->comparison_qty = REG_QTY (REGNO (op1));
4496 ent->comparison_const = op1;
4497 ent->comparison_qty = -1;
4503 /* If either side is still missing an equivalence, make it now,
4504 then merge the equivalences. */
4508 if (insert_regs (op0, NULL_PTR, 0))
4510 rehash_using_reg (op0);
4511 op0_hash = HASH (op0, mode);
4514 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4515 op0_elt->in_memory = op0_in_memory;
4520 if (insert_regs (op1, NULL_PTR, 0))
4522 rehash_using_reg (op1);
4523 op1_hash = HASH (op1, mode);
4526 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4527 op1_elt->in_memory = op1_in_memory;
4530 merge_equiv_classes (op0_elt, op1_elt);
4531 last_jump_equiv_class = op0_elt;
4534 /* CSE processing for one instruction.
4535 First simplify sources and addresses of all assignments
4536 in the instruction, using previously-computed equivalents values.
4537 Then install the new sources and destinations in the table
4538 of available values.
4540 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4541 the insn. It means that INSN is inside libcall block. In this
4542 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4544 /* Data on one SET contained in the instruction. */
4548 /* The SET rtx itself. */
4550 /* The SET_SRC of the rtx (the original value, if it is changing). */
4552 /* The hash-table element for the SET_SRC of the SET. */
4553 struct table_elt *src_elt;
4554 /* Hash value for the SET_SRC. */
4556 /* Hash value for the SET_DEST. */
4558 /* The SET_DEST, with SUBREG, etc., stripped. */
4560 /* Nonzero if the SET_SRC is in memory. */
4562 /* Nonzero if the SET_SRC contains something
4563 whose value cannot be predicted and understood. */
4565 /* Original machine mode, in case it becomes a CONST_INT. */
4566 enum machine_mode mode;
4567 /* A constant equivalent for SET_SRC, if any. */
4569 /* Original SET_SRC value used for libcall notes. */
4571 /* Hash value of constant equivalent for SET_SRC. */
4572 unsigned src_const_hash;
4573 /* Table entry for constant equivalent for SET_SRC, if any. */
4574 struct table_elt *src_const_elt;
4578 cse_insn (insn, libcall_insn)
4582 register rtx x = PATTERN (insn);
4585 register int n_sets = 0;
4588 /* Records what this insn does to set CC0. */
4589 rtx this_insn_cc0 = 0;
4590 enum machine_mode this_insn_cc0_mode = VOIDmode;
4594 struct table_elt *src_eqv_elt = 0;
4595 int src_eqv_volatile = 0;
4596 int src_eqv_in_memory = 0;
4597 unsigned src_eqv_hash = 0;
4599 struct set *sets = (struct set *) NULL_PTR;
4603 /* Find all the SETs and CLOBBERs in this instruction.
4604 Record all the SETs in the array `set' and count them.
4605 Also determine whether there is a CLOBBER that invalidates
4606 all memory references, or all references at varying addresses. */
4608 if (GET_CODE (insn) == CALL_INSN)
4610 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4611 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4612 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4615 if (GET_CODE (x) == SET)
4617 sets = (struct set *) alloca (sizeof (struct set));
4620 /* Ignore SETs that are unconditional jumps.
4621 They never need cse processing, so this does not hurt.
4622 The reason is not efficiency but rather
4623 so that we can test at the end for instructions
4624 that have been simplified to unconditional jumps
4625 and not be misled by unchanged instructions
4626 that were unconditional jumps to begin with. */
4627 if (SET_DEST (x) == pc_rtx
4628 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4631 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4632 The hard function value register is used only once, to copy to
4633 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4634 Ensure we invalidate the destination register. On the 80386 no
4635 other code would invalidate it since it is a fixed_reg.
4636 We need not check the return of apply_change_group; see canon_reg. */
4638 else if (GET_CODE (SET_SRC (x)) == CALL)
4640 canon_reg (SET_SRC (x), insn);
4641 apply_change_group ();
4642 fold_rtx (SET_SRC (x), insn);
4643 invalidate (SET_DEST (x), VOIDmode);
4648 else if (GET_CODE (x) == PARALLEL)
4650 register int lim = XVECLEN (x, 0);
4652 sets = (struct set *) alloca (lim * sizeof (struct set));
4654 /* Find all regs explicitly clobbered in this insn,
4655 and ensure they are not replaced with any other regs
4656 elsewhere in this insn.
4657 When a reg that is clobbered is also used for input,
4658 we should presume that that is for a reason,
4659 and we should not substitute some other register
4660 which is not supposed to be clobbered.
4661 Therefore, this loop cannot be merged into the one below
4662 because a CALL may precede a CLOBBER and refer to the
4663 value clobbered. We must not let a canonicalization do
4664 anything in that case. */
4665 for (i = 0; i < lim; i++)
4667 register rtx y = XVECEXP (x, 0, i);
4668 if (GET_CODE (y) == CLOBBER)
4670 rtx clobbered = XEXP (y, 0);
4672 if (GET_CODE (clobbered) == REG
4673 || GET_CODE (clobbered) == SUBREG)
4674 invalidate (clobbered, VOIDmode);
4675 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4676 || GET_CODE (clobbered) == ZERO_EXTRACT)
4677 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4681 for (i = 0; i < lim; i++)
4683 register rtx y = XVECEXP (x, 0, i);
4684 if (GET_CODE (y) == SET)
4686 /* As above, we ignore unconditional jumps and call-insns and
4687 ignore the result of apply_change_group. */
4688 if (GET_CODE (SET_SRC (y)) == CALL)
4690 canon_reg (SET_SRC (y), insn);
4691 apply_change_group ();
4692 fold_rtx (SET_SRC (y), insn);
4693 invalidate (SET_DEST (y), VOIDmode);
4695 else if (SET_DEST (y) == pc_rtx
4696 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4699 sets[n_sets++].rtl = y;
4701 else if (GET_CODE (y) == CLOBBER)
4703 /* If we clobber memory, canon the address.
4704 This does nothing when a register is clobbered
4705 because we have already invalidated the reg. */
4706 if (GET_CODE (XEXP (y, 0)) == MEM)
4707 canon_reg (XEXP (y, 0), NULL_RTX);
4709 else if (GET_CODE (y) == USE
4710 && ! (GET_CODE (XEXP (y, 0)) == REG
4711 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4712 canon_reg (y, NULL_RTX);
4713 else if (GET_CODE (y) == CALL)
4715 /* The result of apply_change_group can be ignored; see
4717 canon_reg (y, insn);
4718 apply_change_group ();
4723 else if (GET_CODE (x) == CLOBBER)
4725 if (GET_CODE (XEXP (x, 0)) == MEM)
4726 canon_reg (XEXP (x, 0), NULL_RTX);
4729 /* Canonicalize a USE of a pseudo register or memory location. */
4730 else if (GET_CODE (x) == USE
4731 && ! (GET_CODE (XEXP (x, 0)) == REG
4732 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4733 canon_reg (XEXP (x, 0), NULL_RTX);
4734 else if (GET_CODE (x) == CALL)
4736 /* The result of apply_change_group can be ignored; see canon_reg. */
4737 canon_reg (x, insn);
4738 apply_change_group ();
4742 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4743 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4744 is handled specially for this case, and if it isn't set, then there will
4745 be no equivalence for the destination. */
4746 if (n_sets == 1 && REG_NOTES (insn) != 0
4747 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4748 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4749 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4750 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4752 /* Canonicalize sources and addresses of destinations.
4753 We do this in a separate pass to avoid problems when a MATCH_DUP is
4754 present in the insn pattern. In that case, we want to ensure that
4755 we don't break the duplicate nature of the pattern. So we will replace
4756 both operands at the same time. Otherwise, we would fail to find an
4757 equivalent substitution in the loop calling validate_change below.
4759 We used to suppress canonicalization of DEST if it appears in SRC,
4760 but we don't do this any more. */
4762 for (i = 0; i < n_sets; i++)
4764 rtx dest = SET_DEST (sets[i].rtl);
4765 rtx src = SET_SRC (sets[i].rtl);
4766 rtx new = canon_reg (src, insn);
4769 sets[i].orig_src = src;
4770 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4771 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4772 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4773 || (insn_code = recog_memoized (insn)) < 0
4774 || insn_data[insn_code].n_dups > 0)
4775 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4777 SET_SRC (sets[i].rtl) = new;
4779 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4781 validate_change (insn, &XEXP (dest, 1),
4782 canon_reg (XEXP (dest, 1), insn), 1);
4783 validate_change (insn, &XEXP (dest, 2),
4784 canon_reg (XEXP (dest, 2), insn), 1);
4787 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4788 || GET_CODE (dest) == ZERO_EXTRACT
4789 || GET_CODE (dest) == SIGN_EXTRACT)
4790 dest = XEXP (dest, 0);
4792 if (GET_CODE (dest) == MEM)
4793 canon_reg (dest, insn);
4796 /* Now that we have done all the replacements, we can apply the change
4797 group and see if they all work. Note that this will cause some
4798 canonicalizations that would have worked individually not to be applied
4799 because some other canonicalization didn't work, but this should not
4802 The result of apply_change_group can be ignored; see canon_reg. */
4804 apply_change_group ();
4806 /* Set sets[i].src_elt to the class each source belongs to.
4807 Detect assignments from or to volatile things
4808 and set set[i] to zero so they will be ignored
4809 in the rest of this function.
4811 Nothing in this loop changes the hash table or the register chains. */
4813 for (i = 0; i < n_sets; i++)
4815 register rtx src, dest;
4816 register rtx src_folded;
4817 register struct table_elt *elt = 0, *p;
4818 enum machine_mode mode;
4821 rtx src_related = 0;
4822 struct table_elt *src_const_elt = 0;
4823 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4824 int src_related_cost = 10000, src_elt_cost = 10000;
4825 /* Set non-zero if we need to call force_const_mem on with the
4826 contents of src_folded before using it. */
4827 int src_folded_force_flag = 0;
4829 dest = SET_DEST (sets[i].rtl);
4830 src = SET_SRC (sets[i].rtl);
4832 /* If SRC is a constant that has no machine mode,
4833 hash it with the destination's machine mode.
4834 This way we can keep different modes separate. */
4836 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4837 sets[i].mode = mode;
4841 enum machine_mode eqvmode = mode;
4842 if (GET_CODE (dest) == STRICT_LOW_PART)
4843 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4845 hash_arg_in_memory = 0;
4846 src_eqv = fold_rtx (src_eqv, insn);
4847 src_eqv_hash = HASH (src_eqv, eqvmode);
4849 /* Find the equivalence class for the equivalent expression. */
4852 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4854 src_eqv_volatile = do_not_record;
4855 src_eqv_in_memory = hash_arg_in_memory;
4858 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4859 value of the INNER register, not the destination. So it is not
4860 a valid substitution for the source. But save it for later. */
4861 if (GET_CODE (dest) == STRICT_LOW_PART)
4864 src_eqv_here = src_eqv;
4866 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4867 simplified result, which may not necessarily be valid. */
4868 src_folded = fold_rtx (src, insn);
4871 /* ??? This caused bad code to be generated for the m68k port with -O2.
4872 Suppose src is (CONST_INT -1), and that after truncation src_folded
4873 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4874 At the end we will add src and src_const to the same equivalence
4875 class. We now have 3 and -1 on the same equivalence class. This
4876 causes later instructions to be mis-optimized. */
4877 /* If storing a constant in a bitfield, pre-truncate the constant
4878 so we will be able to record it later. */
4879 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4880 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4882 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4884 if (GET_CODE (src) == CONST_INT
4885 && GET_CODE (width) == CONST_INT
4886 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4887 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4889 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4890 << INTVAL (width)) - 1));
4894 /* Compute SRC's hash code, and also notice if it
4895 should not be recorded at all. In that case,
4896 prevent any further processing of this assignment. */
4898 hash_arg_in_memory = 0;
4901 sets[i].src_hash = HASH (src, mode);
4902 sets[i].src_volatile = do_not_record;
4903 sets[i].src_in_memory = hash_arg_in_memory;
4905 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4906 a pseudo that is set more than once, do not record SRC. Using
4907 SRC as a replacement for anything else will be incorrect in that
4908 situation. Note that this usually occurs only for stack slots,
4909 in which case all the RTL would be referring to SRC, so we don't
4910 lose any optimization opportunities by not having SRC in the
4913 if (GET_CODE (src) == MEM
4914 && find_reg_note (insn, REG_EQUIV, src) != 0
4915 && GET_CODE (dest) == REG
4916 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4917 && REG_N_SETS (REGNO (dest)) != 1)
4918 sets[i].src_volatile = 1;
4921 /* It is no longer clear why we used to do this, but it doesn't
4922 appear to still be needed. So let's try without it since this
4923 code hurts cse'ing widened ops. */
4924 /* If source is a perverse subreg (such as QI treated as an SI),
4925 treat it as volatile. It may do the work of an SI in one context
4926 where the extra bits are not being used, but cannot replace an SI
4928 if (GET_CODE (src) == SUBREG
4929 && (GET_MODE_SIZE (GET_MODE (src))
4930 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4931 sets[i].src_volatile = 1;
4934 /* Locate all possible equivalent forms for SRC. Try to replace
4935 SRC in the insn with each cheaper equivalent.
4937 We have the following types of equivalents: SRC itself, a folded
4938 version, a value given in a REG_EQUAL note, or a value related
4941 Each of these equivalents may be part of an additional class
4942 of equivalents (if more than one is in the table, they must be in
4943 the same class; we check for this).
4945 If the source is volatile, we don't do any table lookups.
4947 We note any constant equivalent for possible later use in a
4950 if (!sets[i].src_volatile)
4951 elt = lookup (src, sets[i].src_hash, mode);
4953 sets[i].src_elt = elt;
4955 if (elt && src_eqv_here && src_eqv_elt)
4957 if (elt->first_same_value != src_eqv_elt->first_same_value)
4959 /* The REG_EQUAL is indicating that two formerly distinct
4960 classes are now equivalent. So merge them. */
4961 merge_equiv_classes (elt, src_eqv_elt);
4962 src_eqv_hash = HASH (src_eqv, elt->mode);
4963 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4969 else if (src_eqv_elt)
4972 /* Try to find a constant somewhere and record it in `src_const'.
4973 Record its table element, if any, in `src_const_elt'. Look in
4974 any known equivalences first. (If the constant is not in the
4975 table, also set `sets[i].src_const_hash'). */
4977 for (p = elt->first_same_value; p; p = p->next_same_value)
4981 src_const_elt = elt;
4986 && (CONSTANT_P (src_folded)
4987 /* Consider (minus (label_ref L1) (label_ref L2)) as
4988 "constant" here so we will record it. This allows us
4989 to fold switch statements when an ADDR_DIFF_VEC is used. */
4990 || (GET_CODE (src_folded) == MINUS
4991 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4992 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4993 src_const = src_folded, src_const_elt = elt;
4994 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4995 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4997 /* If we don't know if the constant is in the table, get its
4998 hash code and look it up. */
4999 if (src_const && src_const_elt == 0)
5001 sets[i].src_const_hash = HASH (src_const, mode);
5002 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5005 sets[i].src_const = src_const;
5006 sets[i].src_const_elt = src_const_elt;
5008 /* If the constant and our source are both in the table, mark them as
5009 equivalent. Otherwise, if a constant is in the table but the source
5010 isn't, set ELT to it. */
5011 if (src_const_elt && elt
5012 && src_const_elt->first_same_value != elt->first_same_value)
5013 merge_equiv_classes (elt, src_const_elt);
5014 else if (src_const_elt && elt == 0)
5015 elt = src_const_elt;
5017 /* See if there is a register linearly related to a constant
5018 equivalent of SRC. */
5020 && (GET_CODE (src_const) == CONST
5021 || (src_const_elt && src_const_elt->related_value != 0)))
5023 src_related = use_related_value (src_const, src_const_elt);
5026 struct table_elt *src_related_elt
5027 = lookup (src_related, HASH (src_related, mode), mode);
5028 if (src_related_elt && elt)
5030 if (elt->first_same_value
5031 != src_related_elt->first_same_value)
5032 /* This can occur when we previously saw a CONST
5033 involving a SYMBOL_REF and then see the SYMBOL_REF
5034 twice. Merge the involved classes. */
5035 merge_equiv_classes (elt, src_related_elt);
5038 src_related_elt = 0;
5040 else if (src_related_elt && elt == 0)
5041 elt = src_related_elt;
5045 /* See if we have a CONST_INT that is already in a register in a
5048 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5049 && GET_MODE_CLASS (mode) == MODE_INT
5050 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5052 enum machine_mode wider_mode;
5054 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5055 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5056 && src_related == 0;
5057 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5059 struct table_elt *const_elt
5060 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5065 for (const_elt = const_elt->first_same_value;
5066 const_elt; const_elt = const_elt->next_same_value)
5067 if (GET_CODE (const_elt->exp) == REG)
5069 src_related = gen_lowpart_if_possible (mode,
5076 /* Another possibility is that we have an AND with a constant in
5077 a mode narrower than a word. If so, it might have been generated
5078 as part of an "if" which would narrow the AND. If we already
5079 have done the AND in a wider mode, we can use a SUBREG of that
5082 if (flag_expensive_optimizations && ! src_related
5083 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5084 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5086 enum machine_mode tmode;
5087 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5089 for (tmode = GET_MODE_WIDER_MODE (mode);
5090 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5091 tmode = GET_MODE_WIDER_MODE (tmode))
5093 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5094 struct table_elt *larger_elt;
5098 PUT_MODE (new_and, tmode);
5099 XEXP (new_and, 0) = inner;
5100 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5101 if (larger_elt == 0)
5104 for (larger_elt = larger_elt->first_same_value;
5105 larger_elt; larger_elt = larger_elt->next_same_value)
5106 if (GET_CODE (larger_elt->exp) == REG)
5109 = gen_lowpart_if_possible (mode, larger_elt->exp);
5119 #ifdef LOAD_EXTEND_OP
5120 /* See if a MEM has already been loaded with a widening operation;
5121 if it has, we can use a subreg of that. Many CISC machines
5122 also have such operations, but this is only likely to be
5123 beneficial these machines. */
5125 if (flag_expensive_optimizations && src_related == 0
5126 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5127 && GET_MODE_CLASS (mode) == MODE_INT
5128 && GET_CODE (src) == MEM && ! do_not_record
5129 && LOAD_EXTEND_OP (mode) != NIL)
5131 enum machine_mode tmode;
5133 /* Set what we are trying to extend and the operation it might
5134 have been extended with. */
5135 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5136 XEXP (memory_extend_rtx, 0) = src;
5138 for (tmode = GET_MODE_WIDER_MODE (mode);
5139 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5140 tmode = GET_MODE_WIDER_MODE (tmode))
5142 struct table_elt *larger_elt;
5144 PUT_MODE (memory_extend_rtx, tmode);
5145 larger_elt = lookup (memory_extend_rtx,
5146 HASH (memory_extend_rtx, tmode), tmode);
5147 if (larger_elt == 0)
5150 for (larger_elt = larger_elt->first_same_value;
5151 larger_elt; larger_elt = larger_elt->next_same_value)
5152 if (GET_CODE (larger_elt->exp) == REG)
5154 src_related = gen_lowpart_if_possible (mode,
5163 #endif /* LOAD_EXTEND_OP */
5165 if (src == src_folded)
5168 /* At this point, ELT, if non-zero, points to a class of expressions
5169 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5170 and SRC_RELATED, if non-zero, each contain additional equivalent
5171 expressions. Prune these latter expressions by deleting expressions
5172 already in the equivalence class.
5174 Check for an equivalent identical to the destination. If found,
5175 this is the preferred equivalent since it will likely lead to
5176 elimination of the insn. Indicate this by placing it in
5180 elt = elt->first_same_value;
5181 for (p = elt; p; p = p->next_same_value)
5183 enum rtx_code code = GET_CODE (p->exp);
5185 /* If the expression is not valid, ignore it. Then we do not
5186 have to check for validity below. In most cases, we can use
5187 `rtx_equal_p', since canonicalization has already been done. */
5188 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5191 /* Also skip paradoxical subregs, unless that's what we're
5194 && (GET_MODE_SIZE (GET_MODE (p->exp))
5195 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5197 && GET_CODE (src) == SUBREG
5198 && GET_MODE (src) == GET_MODE (p->exp)
5199 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5200 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5203 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5205 else if (src_folded && GET_CODE (src_folded) == code
5206 && rtx_equal_p (src_folded, p->exp))
5208 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5209 && rtx_equal_p (src_eqv_here, p->exp))
5211 else if (src_related && GET_CODE (src_related) == code
5212 && rtx_equal_p (src_related, p->exp))
5215 /* This is the same as the destination of the insns, we want
5216 to prefer it. Copy it to src_related. The code below will
5217 then give it a negative cost. */
5218 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5222 /* Find the cheapest valid equivalent, trying all the available
5223 possibilities. Prefer items not in the hash table to ones
5224 that are when they are equal cost. Note that we can never
5225 worsen an insn as the current contents will also succeed.
5226 If we find an equivalent identical to the destination, use it as best,
5227 since this insn will probably be eliminated in that case. */
5230 if (rtx_equal_p (src, dest))
5233 src_cost = COST (src);
5238 if (rtx_equal_p (src_eqv_here, dest))
5241 src_eqv_cost = COST (src_eqv_here);
5246 if (rtx_equal_p (src_folded, dest))
5247 src_folded_cost = -1;
5249 src_folded_cost = COST (src_folded);
5254 if (rtx_equal_p (src_related, dest))
5255 src_related_cost = -1;
5257 src_related_cost = COST (src_related);
5260 /* If this was an indirect jump insn, a known label will really be
5261 cheaper even though it looks more expensive. */
5262 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5263 src_folded = src_const, src_folded_cost = -1;
5265 /* Terminate loop when replacement made. This must terminate since
5266 the current contents will be tested and will always be valid. */
5271 /* Skip invalid entries. */
5272 while (elt && GET_CODE (elt->exp) != REG
5273 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5274 elt = elt->next_same_value;
5276 /* A paradoxical subreg would be bad here: it'll be the right
5277 size, but later may be adjusted so that the upper bits aren't
5278 what we want. So reject it. */
5280 && GET_CODE (elt->exp) == SUBREG
5281 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5282 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5283 /* It is okay, though, if the rtx we're trying to match
5284 will ignore any of the bits we can't predict. */
5286 && GET_CODE (src) == SUBREG
5287 && GET_MODE (src) == GET_MODE (elt->exp)
5288 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5289 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5291 elt = elt->next_same_value;
5296 src_elt_cost = elt->cost;
5298 /* Find cheapest and skip it for the next time. For items
5299 of equal cost, use this order:
5300 src_folded, src, src_eqv, src_related and hash table entry. */
5301 if (src_folded_cost <= src_cost
5302 && src_folded_cost <= src_eqv_cost
5303 && src_folded_cost <= src_related_cost
5304 && src_folded_cost <= src_elt_cost)
5306 trial = src_folded, src_folded_cost = 10000;
5307 if (src_folded_force_flag)
5308 trial = force_const_mem (mode, trial);
5310 else if (src_cost <= src_eqv_cost
5311 && src_cost <= src_related_cost
5312 && src_cost <= src_elt_cost)
5313 trial = src, src_cost = 10000;
5314 else if (src_eqv_cost <= src_related_cost
5315 && src_eqv_cost <= src_elt_cost)
5316 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5317 else if (src_related_cost <= src_elt_cost)
5318 trial = copy_rtx (src_related), src_related_cost = 10000;
5321 trial = copy_rtx (elt->exp);
5322 elt = elt->next_same_value;
5323 src_elt_cost = 10000;
5326 /* We don't normally have an insn matching (set (pc) (pc)), so
5327 check for this separately here. We will delete such an
5330 Tablejump insns contain a USE of the table, so simply replacing
5331 the operand with the constant won't match. This is simply an
5332 unconditional branch, however, and is therefore valid. Just
5333 insert the substitution here and we will delete and re-emit
5336 if (n_sets == 1 && dest == pc_rtx
5338 || (GET_CODE (trial) == LABEL_REF
5339 && ! condjump_p (insn))))
5341 if (trial == pc_rtx)
5343 SET_SRC (sets[i].rtl) = trial;
5344 cse_jumps_altered = 1;
5348 PATTERN (insn) = gen_jump (XEXP (trial, 0));
5349 INSN_CODE (insn) = -1;
5351 if (NEXT_INSN (insn) != 0
5352 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5353 emit_barrier_after (insn);
5355 cse_jumps_altered = 1;
5359 /* Look for a substitution that makes a valid insn. */
5360 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5362 /* If we just made a substitution inside a libcall, then we
5363 need to make the same substitution in any notes attached
5364 to the RETVAL insn. */
5366 && (GET_CODE (sets[i].orig_src) == REG
5367 || GET_CODE (sets[i].orig_src) == SUBREG
5368 || GET_CODE (sets[i].orig_src) == MEM))
5369 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5370 canon_reg (SET_SRC (sets[i].rtl), insn));
5372 /* The result of apply_change_group can be ignored; see
5375 validate_change (insn, &SET_SRC (sets[i].rtl),
5376 canon_reg (SET_SRC (sets[i].rtl), insn),
5378 apply_change_group ();
5382 /* If we previously found constant pool entries for
5383 constants and this is a constant, try making a
5384 pool entry. Put it in src_folded unless we already have done
5385 this since that is where it likely came from. */
5387 else if (constant_pool_entries_cost
5388 && CONSTANT_P (trial)
5389 /* Reject cases that will abort in decode_rtx_const.
5390 On the alpha when simplifying a switch, we get
5391 (const (truncate (minus (label_ref) (label_ref)))). */
5392 && ! (GET_CODE (trial) == CONST
5393 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5394 /* Likewise on IA-64, except without the truncate. */
5395 && ! (GET_CODE (trial) == CONST
5396 && GET_CODE (XEXP (trial, 0)) == MINUS
5397 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5398 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5400 || (GET_CODE (src_folded) != MEM
5401 && ! src_folded_force_flag))
5402 && GET_MODE_CLASS (mode) != MODE_CC
5403 && mode != VOIDmode)
5405 src_folded_force_flag = 1;
5407 src_folded_cost = constant_pool_entries_cost;
5411 src = SET_SRC (sets[i].rtl);
5413 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5414 However, there is an important exception: If both are registers
5415 that are not the head of their equivalence class, replace SET_SRC
5416 with the head of the class. If we do not do this, we will have
5417 both registers live over a portion of the basic block. This way,
5418 their lifetimes will likely abut instead of overlapping. */
5419 if (GET_CODE (dest) == REG
5420 && REGNO_QTY_VALID_P (REGNO (dest)))
5422 int dest_q = REG_QTY (REGNO (dest));
5423 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5425 if (dest_ent->mode == GET_MODE (dest)
5426 && dest_ent->first_reg != REGNO (dest)
5427 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5428 /* Don't do this if the original insn had a hard reg as
5429 SET_SRC or SET_DEST. */
5430 && (GET_CODE (sets[i].src) != REG
5431 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5432 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5433 /* We can't call canon_reg here because it won't do anything if
5434 SRC is a hard register. */
5436 int src_q = REG_QTY (REGNO (src));
5437 struct qty_table_elem *src_ent = &qty_table[src_q];
5438 int first = src_ent->first_reg;
5440 = (first >= FIRST_PSEUDO_REGISTER
5441 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5443 /* We must use validate-change even for this, because this
5444 might be a special no-op instruction, suitable only to
5446 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5449 /* If we had a constant that is cheaper than what we are now
5450 setting SRC to, use that constant. We ignored it when we
5451 thought we could make this into a no-op. */
5452 if (src_const && COST (src_const) < COST (src)
5453 && validate_change (insn, &SET_SRC (sets[i].rtl),
5460 /* If we made a change, recompute SRC values. */
5461 if (src != sets[i].src)
5465 hash_arg_in_memory = 0;
5467 sets[i].src_hash = HASH (src, mode);
5468 sets[i].src_volatile = do_not_record;
5469 sets[i].src_in_memory = hash_arg_in_memory;
5470 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5473 /* If this is a single SET, we are setting a register, and we have an
5474 equivalent constant, we want to add a REG_NOTE. We don't want
5475 to write a REG_EQUAL note for a constant pseudo since verifying that
5476 that pseudo hasn't been eliminated is a pain. Such a note also
5477 won't help anything.
5479 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5480 which can be created for a reference to a compile time computable
5481 entry in a jump table. */
5483 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5484 && GET_CODE (src_const) != REG
5485 && ! (GET_CODE (src_const) == CONST
5486 && GET_CODE (XEXP (src_const, 0)) == MINUS
5487 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5488 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5490 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5492 /* Make sure that the rtx is not shared with any other insn. */
5493 src_const = copy_rtx (src_const);
5495 /* Record the actual constant value in a REG_EQUAL note, making
5496 a new one if one does not already exist. */
5498 XEXP (tem, 0) = src_const;
5500 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5501 src_const, REG_NOTES (insn));
5503 /* If storing a constant value in a register that
5504 previously held the constant value 0,
5505 record this fact with a REG_WAS_0 note on this insn.
5507 Note that the *register* is required to have previously held 0,
5508 not just any register in the quantity and we must point to the
5509 insn that set that register to zero.
5511 Rather than track each register individually, we just see if
5512 the last set for this quantity was for this register. */
5514 if (REGNO_QTY_VALID_P (REGNO (dest)))
5516 int dest_q = REG_QTY (REGNO (dest));
5517 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5519 if (dest_ent->const_rtx == const0_rtx)
5521 /* See if we previously had a REG_WAS_0 note. */
5522 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5523 rtx const_insn = dest_ent->const_insn;
5525 if ((tem = single_set (const_insn)) != 0
5526 && rtx_equal_p (SET_DEST (tem), dest))
5529 XEXP (note, 0) = const_insn;
5532 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5539 /* Now deal with the destination. */
5542 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5543 to the MEM or REG within it. */
5544 while (GET_CODE (dest) == SIGN_EXTRACT
5545 || GET_CODE (dest) == ZERO_EXTRACT
5546 || GET_CODE (dest) == SUBREG
5547 || GET_CODE (dest) == STRICT_LOW_PART)
5548 dest = XEXP (dest, 0);
5550 sets[i].inner_dest = dest;
5552 if (GET_CODE (dest) == MEM)
5554 #ifdef PUSH_ROUNDING
5555 /* Stack pushes invalidate the stack pointer. */
5556 rtx addr = XEXP (dest, 0);
5557 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5558 && XEXP (addr, 0) == stack_pointer_rtx)
5559 invalidate (stack_pointer_rtx, Pmode);
5561 dest = fold_rtx (dest, insn);
5564 /* Compute the hash code of the destination now,
5565 before the effects of this instruction are recorded,
5566 since the register values used in the address computation
5567 are those before this instruction. */
5568 sets[i].dest_hash = HASH (dest, mode);
5570 /* Don't enter a bit-field in the hash table
5571 because the value in it after the store
5572 may not equal what was stored, due to truncation. */
5574 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5575 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5577 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5579 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5580 && GET_CODE (width) == CONST_INT
5581 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5582 && ! (INTVAL (src_const)
5583 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5584 /* Exception: if the value is constant,
5585 and it won't be truncated, record it. */
5589 /* This is chosen so that the destination will be invalidated
5590 but no new value will be recorded.
5591 We must invalidate because sometimes constant
5592 values can be recorded for bitfields. */
5593 sets[i].src_elt = 0;
5594 sets[i].src_volatile = 1;
5600 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5602 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5604 /* One less use of the label this insn used to jump to. */
5605 if (JUMP_LABEL (insn) != 0)
5606 --LABEL_NUSES (JUMP_LABEL (insn));
5607 PUT_CODE (insn, NOTE);
5608 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5609 NOTE_SOURCE_FILE (insn) = 0;
5610 cse_jumps_altered = 1;
5611 /* No more processing for this set. */
5615 /* If this SET is now setting PC to a label, we know it used to
5616 be a conditional or computed branch. So we see if we can follow
5617 it. If it was a computed branch, delete it and re-emit. */
5618 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5620 /* If this is not in the format for a simple branch and
5621 we are the only SET in it, re-emit it. */
5622 if (! simplejump_p (insn) && n_sets == 1)
5624 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5625 JUMP_LABEL (new) = XEXP (src, 0);
5626 LABEL_NUSES (XEXP (src, 0))++;
5630 /* Otherwise, force rerecognition, since it probably had
5631 a different pattern before.
5632 This shouldn't really be necessary, since whatever
5633 changed the source value above should have done this.
5634 Until the right place is found, might as well do this here. */
5635 INSN_CODE (insn) = -1;
5637 never_reached_warning (insn);
5639 /* Now emit a BARRIER after the unconditional jump. Do not bother
5640 deleting any unreachable code, let jump/flow do that. */
5641 if (NEXT_INSN (insn) != 0
5642 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5643 emit_barrier_after (insn);
5645 cse_jumps_altered = 1;
5649 /* If destination is volatile, invalidate it and then do no further
5650 processing for this assignment. */
5652 else if (do_not_record)
5654 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5655 || GET_CODE (dest) == MEM)
5656 invalidate (dest, VOIDmode);
5657 else if (GET_CODE (dest) == STRICT_LOW_PART
5658 || GET_CODE (dest) == ZERO_EXTRACT)
5659 invalidate (XEXP (dest, 0), GET_MODE (dest));
5663 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5664 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5667 /* If setting CC0, record what it was set to, or a constant, if it
5668 is equivalent to a constant. If it is being set to a floating-point
5669 value, make a COMPARE with the appropriate constant of 0. If we
5670 don't do this, later code can interpret this as a test against
5671 const0_rtx, which can cause problems if we try to put it into an
5672 insn as a floating-point operand. */
5673 if (dest == cc0_rtx)
5675 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5676 this_insn_cc0_mode = mode;
5677 if (FLOAT_MODE_P (mode))
5678 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5684 /* Now enter all non-volatile source expressions in the hash table
5685 if they are not already present.
5686 Record their equivalence classes in src_elt.
5687 This way we can insert the corresponding destinations into
5688 the same classes even if the actual sources are no longer in them
5689 (having been invalidated). */
5691 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5692 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5694 register struct table_elt *elt;
5695 register struct table_elt *classp = sets[0].src_elt;
5696 rtx dest = SET_DEST (sets[0].rtl);
5697 enum machine_mode eqvmode = GET_MODE (dest);
5699 if (GET_CODE (dest) == STRICT_LOW_PART)
5701 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5704 if (insert_regs (src_eqv, classp, 0))
5706 rehash_using_reg (src_eqv);
5707 src_eqv_hash = HASH (src_eqv, eqvmode);
5709 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5710 elt->in_memory = src_eqv_in_memory;
5713 /* Check to see if src_eqv_elt is the same as a set source which
5714 does not yet have an elt, and if so set the elt of the set source
5716 for (i = 0; i < n_sets; i++)
5717 if (sets[i].rtl && sets[i].src_elt == 0
5718 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5719 sets[i].src_elt = src_eqv_elt;
5722 for (i = 0; i < n_sets; i++)
5723 if (sets[i].rtl && ! sets[i].src_volatile
5724 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5726 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5728 /* REG_EQUAL in setting a STRICT_LOW_PART
5729 gives an equivalent for the entire destination register,
5730 not just for the subreg being stored in now.
5731 This is a more interesting equivalence, so we arrange later
5732 to treat the entire reg as the destination. */
5733 sets[i].src_elt = src_eqv_elt;
5734 sets[i].src_hash = src_eqv_hash;
5738 /* Insert source and constant equivalent into hash table, if not
5740 register struct table_elt *classp = src_eqv_elt;
5741 register rtx src = sets[i].src;
5742 register rtx dest = SET_DEST (sets[i].rtl);
5743 enum machine_mode mode
5744 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5746 if (sets[i].src_elt == 0)
5748 /* Don't put a hard register source into the table if this is
5749 the last insn of a libcall. In this case, we only need
5750 to put src_eqv_elt in src_elt. */
5751 if (GET_CODE (src) != REG
5752 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5753 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5755 register struct table_elt *elt;
5757 /* Note that these insert_regs calls cannot remove
5758 any of the src_elt's, because they would have failed to
5759 match if not still valid. */
5760 if (insert_regs (src, classp, 0))
5762 rehash_using_reg (src);
5763 sets[i].src_hash = HASH (src, mode);
5765 elt = insert (src, classp, sets[i].src_hash, mode);
5766 elt->in_memory = sets[i].src_in_memory;
5767 sets[i].src_elt = classp = elt;
5770 sets[i].src_elt = classp;
5772 if (sets[i].src_const && sets[i].src_const_elt == 0
5773 && src != sets[i].src_const
5774 && ! rtx_equal_p (sets[i].src_const, src))
5775 sets[i].src_elt = insert (sets[i].src_const, classp,
5776 sets[i].src_const_hash, mode);
5779 else if (sets[i].src_elt == 0)
5780 /* If we did not insert the source into the hash table (e.g., it was
5781 volatile), note the equivalence class for the REG_EQUAL value, if any,
5782 so that the destination goes into that class. */
5783 sets[i].src_elt = src_eqv_elt;
5785 invalidate_from_clobbers (x);
5787 /* Some registers are invalidated by subroutine calls. Memory is
5788 invalidated by non-constant calls. */
5790 if (GET_CODE (insn) == CALL_INSN)
5792 if (! CONST_CALL_P (insn))
5793 invalidate_memory ();
5794 invalidate_for_call ();
5797 /* Now invalidate everything set by this instruction.
5798 If a SUBREG or other funny destination is being set,
5799 sets[i].rtl is still nonzero, so here we invalidate the reg
5800 a part of which is being set. */
5802 for (i = 0; i < n_sets; i++)
5805 /* We can't use the inner dest, because the mode associated with
5806 a ZERO_EXTRACT is significant. */
5807 register rtx dest = SET_DEST (sets[i].rtl);
5809 /* Needed for registers to remove the register from its
5810 previous quantity's chain.
5811 Needed for memory if this is a nonvarying address, unless
5812 we have just done an invalidate_memory that covers even those. */
5813 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5814 || GET_CODE (dest) == MEM)
5815 invalidate (dest, VOIDmode);
5816 else if (GET_CODE (dest) == STRICT_LOW_PART
5817 || GET_CODE (dest) == ZERO_EXTRACT)
5818 invalidate (XEXP (dest, 0), GET_MODE (dest));
5821 /* A volatile ASM invalidates everything. */
5822 if (GET_CODE (insn) == INSN
5823 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5824 && MEM_VOLATILE_P (PATTERN (insn)))
5825 flush_hash_table ();
5827 /* Make sure registers mentioned in destinations
5828 are safe for use in an expression to be inserted.
5829 This removes from the hash table
5830 any invalid entry that refers to one of these registers.
5832 We don't care about the return value from mention_regs because
5833 we are going to hash the SET_DEST values unconditionally. */
5835 for (i = 0; i < n_sets; i++)
5839 rtx x = SET_DEST (sets[i].rtl);
5841 if (GET_CODE (x) != REG)
5845 /* We used to rely on all references to a register becoming
5846 inaccessible when a register changes to a new quantity,
5847 since that changes the hash code. However, that is not
5848 safe, since after HASH_SIZE new quantities we get a
5849 hash 'collision' of a register with its own invalid
5850 entries. And since SUBREGs have been changed not to
5851 change their hash code with the hash code of the register,
5852 it wouldn't work any longer at all. So we have to check
5853 for any invalid references lying around now.
5854 This code is similar to the REG case in mention_regs,
5855 but it knows that reg_tick has been incremented, and
5856 it leaves reg_in_table as -1 . */
5857 unsigned int regno = REGNO (x);
5858 unsigned int endregno
5859 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5860 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5863 for (i = regno; i < endregno; i++)
5865 if (REG_IN_TABLE (i) >= 0)
5867 remove_invalid_refs (i);
5868 REG_IN_TABLE (i) = -1;
5875 /* We may have just removed some of the src_elt's from the hash table.
5876 So replace each one with the current head of the same class. */
5878 for (i = 0; i < n_sets; i++)
5881 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5882 /* If elt was removed, find current head of same class,
5883 or 0 if nothing remains of that class. */
5885 register struct table_elt *elt = sets[i].src_elt;
5887 while (elt && elt->prev_same_value)
5888 elt = elt->prev_same_value;
5890 while (elt && elt->first_same_value == 0)
5891 elt = elt->next_same_value;
5892 sets[i].src_elt = elt ? elt->first_same_value : 0;
5896 /* Now insert the destinations into their equivalence classes. */
5898 for (i = 0; i < n_sets; i++)
5901 register rtx dest = SET_DEST (sets[i].rtl);
5902 rtx inner_dest = sets[i].inner_dest;
5903 register struct table_elt *elt;
5905 /* Don't record value if we are not supposed to risk allocating
5906 floating-point values in registers that might be wider than
5908 if ((flag_float_store
5909 && GET_CODE (dest) == MEM
5910 && FLOAT_MODE_P (GET_MODE (dest)))
5911 /* Don't record BLKmode values, because we don't know the
5912 size of it, and can't be sure that other BLKmode values
5913 have the same or smaller size. */
5914 || GET_MODE (dest) == BLKmode
5915 /* Don't record values of destinations set inside a libcall block
5916 since we might delete the libcall. Things should have been set
5917 up so we won't want to reuse such a value, but we play it safe
5920 /* If we didn't put a REG_EQUAL value or a source into the hash
5921 table, there is no point is recording DEST. */
5922 || sets[i].src_elt == 0
5923 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5924 or SIGN_EXTEND, don't record DEST since it can cause
5925 some tracking to be wrong.
5927 ??? Think about this more later. */
5928 || (GET_CODE (dest) == SUBREG
5929 && (GET_MODE_SIZE (GET_MODE (dest))
5930 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5931 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5932 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5935 /* STRICT_LOW_PART isn't part of the value BEING set,
5936 and neither is the SUBREG inside it.
5937 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5938 if (GET_CODE (dest) == STRICT_LOW_PART)
5939 dest = SUBREG_REG (XEXP (dest, 0));
5941 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5942 /* Registers must also be inserted into chains for quantities. */
5943 if (insert_regs (dest, sets[i].src_elt, 1))
5945 /* If `insert_regs' changes something, the hash code must be
5947 rehash_using_reg (dest);
5948 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5951 if (GET_CODE (inner_dest) == MEM
5952 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5953 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5954 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5955 Consider the case in which the address of the MEM is
5956 passed to a function, which alters the MEM. Then, if we
5957 later use Y instead of the MEM we'll miss the update. */
5958 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5960 elt = insert (dest, sets[i].src_elt,
5961 sets[i].dest_hash, GET_MODE (dest));
5963 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5964 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5965 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5968 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5969 narrower than M2, and both M1 and M2 are the same number of words,
5970 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5971 make that equivalence as well.
5973 However, BAR may have equivalences for which gen_lowpart_if_possible
5974 will produce a simpler value than gen_lowpart_if_possible applied to
5975 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5976 BAR's equivalences. If we don't get a simplified form, make
5977 the SUBREG. It will not be used in an equivalence, but will
5978 cause two similar assignments to be detected.
5980 Note the loop below will find SUBREG_REG (DEST) since we have
5981 already entered SRC and DEST of the SET in the table. */
5983 if (GET_CODE (dest) == SUBREG
5984 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5986 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5987 && (GET_MODE_SIZE (GET_MODE (dest))
5988 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5989 && sets[i].src_elt != 0)
5991 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5992 struct table_elt *elt, *classp = 0;
5994 for (elt = sets[i].src_elt->first_same_value; elt;
5995 elt = elt->next_same_value)
5999 struct table_elt *src_elt;
6001 /* Ignore invalid entries. */
6002 if (GET_CODE (elt->exp) != REG
6003 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6006 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6008 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6010 src_hash = HASH (new_src, new_mode);
6011 src_elt = lookup (new_src, src_hash, new_mode);
6013 /* Put the new source in the hash table is if isn't
6017 if (insert_regs (new_src, classp, 0))
6019 rehash_using_reg (new_src);
6020 src_hash = HASH (new_src, new_mode);
6022 src_elt = insert (new_src, classp, src_hash, new_mode);
6023 src_elt->in_memory = elt->in_memory;
6025 else if (classp && classp != src_elt->first_same_value)
6026 /* Show that two things that we've seen before are
6027 actually the same. */
6028 merge_equiv_classes (src_elt, classp);
6030 classp = src_elt->first_same_value;
6031 /* Ignore invalid entries. */
6033 && GET_CODE (classp->exp) != REG
6034 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6035 classp = classp->next_same_value;
6040 /* Special handling for (set REG0 REG1) where REG0 is the
6041 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6042 be used in the sequel, so (if easily done) change this insn to
6043 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6044 that computed their value. Then REG1 will become a dead store
6045 and won't cloud the situation for later optimizations.
6047 Do not make this change if REG1 is a hard register, because it will
6048 then be used in the sequel and we may be changing a two-operand insn
6049 into a three-operand insn.
6051 Also do not do this if we are operating on a copy of INSN.
6053 Also don't do this if INSN ends a libcall; this would cause an unrelated
6054 register to be set in the middle of a libcall, and we then get bad code
6055 if the libcall is deleted. */
6057 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6058 && NEXT_INSN (PREV_INSN (insn)) == insn
6059 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6060 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6061 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6063 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6064 struct qty_table_elem *src_ent = &qty_table[src_q];
6066 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6067 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6069 rtx prev = prev_nonnote_insn (insn);
6071 if (prev != 0 && GET_CODE (prev) == INSN
6072 && GET_CODE (PATTERN (prev)) == SET
6073 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
6075 rtx dest = SET_DEST (sets[0].rtl);
6076 rtx src = SET_SRC (sets[0].rtl);
6077 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
6079 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6080 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6081 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6082 apply_change_group ();
6084 /* If REG1 was equivalent to a constant, REG0 is not. */
6086 PUT_REG_NOTE_KIND (note, REG_EQUAL);
6088 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6089 any REG_WAS_0 note on INSN to PREV. */
6090 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6092 remove_note (prev, note);
6094 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6097 remove_note (insn, note);
6098 XEXP (note, 1) = REG_NOTES (prev);
6099 REG_NOTES (prev) = note;
6102 /* If INSN has a REG_EQUAL note, and this note mentions
6103 REG0, then we must delete it, because the value in
6104 REG0 has changed. If the note's value is REG1, we must
6105 also delete it because that is now this insn's dest. */
6106 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6108 && (reg_mentioned_p (dest, XEXP (note, 0))
6109 || rtx_equal_p (src, XEXP (note, 0))))
6110 remove_note (insn, note);
6115 /* If this is a conditional jump insn, record any known equivalences due to
6116 the condition being tested. */
6118 last_jump_equiv_class = 0;
6119 if (GET_CODE (insn) == JUMP_INSN
6120 && n_sets == 1 && GET_CODE (x) == SET
6121 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6122 record_jump_equiv (insn, 0);
6125 /* If the previous insn set CC0 and this insn no longer references CC0,
6126 delete the previous insn. Here we use the fact that nothing expects CC0
6127 to be valid over an insn, which is true until the final pass. */
6128 if (prev_insn && GET_CODE (prev_insn) == INSN
6129 && (tem = single_set (prev_insn)) != 0
6130 && SET_DEST (tem) == cc0_rtx
6131 && ! reg_mentioned_p (cc0_rtx, x))
6133 PUT_CODE (prev_insn, NOTE);
6134 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6135 NOTE_SOURCE_FILE (prev_insn) = 0;
6138 prev_insn_cc0 = this_insn_cc0;
6139 prev_insn_cc0_mode = this_insn_cc0_mode;
6145 /* Remove from the hash table all expressions that reference memory. */
6148 invalidate_memory ()
6151 register struct table_elt *p, *next;
6153 for (i = 0; i < HASH_SIZE; i++)
6154 for (p = table[i]; p; p = next)
6156 next = p->next_same_hash;
6158 remove_from_table (p, i);
6162 /* If ADDR is an address that implicitly affects the stack pointer, return
6163 1 and update the register tables to show the effect. Else, return 0. */
6166 addr_affects_sp_p (addr)
6169 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6170 && GET_CODE (XEXP (addr, 0)) == REG
6171 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6173 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6174 REG_TICK (STACK_POINTER_REGNUM)++;
6176 /* This should be *very* rare. */
6177 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6178 invalidate (stack_pointer_rtx, VOIDmode);
6186 /* Perform invalidation on the basis of everything about an insn
6187 except for invalidating the actual places that are SET in it.
6188 This includes the places CLOBBERed, and anything that might
6189 alias with something that is SET or CLOBBERed.
6191 X is the pattern of the insn. */
6194 invalidate_from_clobbers (x)
6197 if (GET_CODE (x) == CLOBBER)
6199 rtx ref = XEXP (x, 0);
6202 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6203 || GET_CODE (ref) == MEM)
6204 invalidate (ref, VOIDmode);
6205 else if (GET_CODE (ref) == STRICT_LOW_PART
6206 || GET_CODE (ref) == ZERO_EXTRACT)
6207 invalidate (XEXP (ref, 0), GET_MODE (ref));
6210 else if (GET_CODE (x) == PARALLEL)
6213 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6215 register rtx y = XVECEXP (x, 0, i);
6216 if (GET_CODE (y) == CLOBBER)
6218 rtx ref = XEXP (y, 0);
6219 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6220 || GET_CODE (ref) == MEM)
6221 invalidate (ref, VOIDmode);
6222 else if (GET_CODE (ref) == STRICT_LOW_PART
6223 || GET_CODE (ref) == ZERO_EXTRACT)
6224 invalidate (XEXP (ref, 0), GET_MODE (ref));
6230 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6231 and replace any registers in them with either an equivalent constant
6232 or the canonical form of the register. If we are inside an address,
6233 only do this if the address remains valid.
6235 OBJECT is 0 except when within a MEM in which case it is the MEM.
6237 Return the replacement for X. */
6240 cse_process_notes (x, object)
6244 enum rtx_code code = GET_CODE (x);
6245 const char *fmt = GET_RTX_FORMAT (code);
6261 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6266 if (REG_NOTE_KIND (x) == REG_EQUAL)
6267 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6269 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6276 rtx new = cse_process_notes (XEXP (x, 0), object);
6277 /* We don't substitute VOIDmode constants into these rtx,
6278 since they would impede folding. */
6279 if (GET_MODE (new) != VOIDmode)
6280 validate_change (object, &XEXP (x, 0), new, 0);
6285 i = REG_QTY (REGNO (x));
6287 /* Return a constant or a constant register. */
6288 if (REGNO_QTY_VALID_P (REGNO (x)))
6290 struct qty_table_elem *ent = &qty_table[i];
6292 if (ent->const_rtx != NULL_RTX
6293 && (CONSTANT_P (ent->const_rtx)
6294 || GET_CODE (ent->const_rtx) == REG))
6296 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6302 /* Otherwise, canonicalize this register. */
6303 return canon_reg (x, NULL_RTX);
6309 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6311 validate_change (object, &XEXP (x, i),
6312 cse_process_notes (XEXP (x, i), object), 0);
6317 /* Find common subexpressions between the end test of a loop and the beginning
6318 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6320 Often we have a loop where an expression in the exit test is used
6321 in the body of the loop. For example "while (*p) *q++ = *p++;".
6322 Because of the way we duplicate the loop exit test in front of the loop,
6323 however, we don't detect that common subexpression. This will be caught
6324 when global cse is implemented, but this is a quite common case.
6326 This function handles the most common cases of these common expressions.
6327 It is called after we have processed the basic block ending with the
6328 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6329 jumps to a label used only once. */
6332 cse_around_loop (loop_start)
6337 struct table_elt *p;
6339 /* If the jump at the end of the loop doesn't go to the start, we don't
6341 for (insn = PREV_INSN (loop_start);
6342 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6343 insn = PREV_INSN (insn))
6347 || GET_CODE (insn) != NOTE
6348 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6351 /* If the last insn of the loop (the end test) was an NE comparison,
6352 we will interpret it as an EQ comparison, since we fell through
6353 the loop. Any equivalences resulting from that comparison are
6354 therefore not valid and must be invalidated. */
6355 if (last_jump_equiv_class)
6356 for (p = last_jump_equiv_class->first_same_value; p;
6357 p = p->next_same_value)
6359 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6360 || (GET_CODE (p->exp) == SUBREG
6361 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6362 invalidate (p->exp, VOIDmode);
6363 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6364 || GET_CODE (p->exp) == ZERO_EXTRACT)
6365 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6368 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6369 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6371 The only thing we do with SET_DEST is invalidate entries, so we
6372 can safely process each SET in order. It is slightly less efficient
6373 to do so, but we only want to handle the most common cases.
6375 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6376 These pseudos won't have valid entries in any of the tables indexed
6377 by register number, such as reg_qty. We avoid out-of-range array
6378 accesses by not processing any instructions created after cse started. */
6380 for (insn = NEXT_INSN (loop_start);
6381 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6382 && INSN_UID (insn) < max_insn_uid
6383 && ! (GET_CODE (insn) == NOTE
6384 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6385 insn = NEXT_INSN (insn))
6388 && (GET_CODE (PATTERN (insn)) == SET
6389 || GET_CODE (PATTERN (insn)) == CLOBBER))
6390 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6391 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6392 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6393 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6394 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6395 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6400 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6401 since they are done elsewhere. This function is called via note_stores. */
6404 invalidate_skipped_set (dest, set, data)
6407 void *data ATTRIBUTE_UNUSED;
6409 enum rtx_code code = GET_CODE (dest);
6412 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6413 /* There are times when an address can appear varying and be a PLUS
6414 during this scan when it would be a fixed address were we to know
6415 the proper equivalences. So invalidate all memory if there is
6416 a BLKmode or nonscalar memory reference or a reference to a
6417 variable address. */
6418 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6419 || cse_rtx_varies_p (XEXP (dest, 0))))
6421 invalidate_memory ();
6425 if (GET_CODE (set) == CLOBBER
6432 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6433 invalidate (XEXP (dest, 0), GET_MODE (dest));
6434 else if (code == REG || code == SUBREG || code == MEM)
6435 invalidate (dest, VOIDmode);
6438 /* Invalidate all insns from START up to the end of the function or the
6439 next label. This called when we wish to CSE around a block that is
6440 conditionally executed. */
6443 invalidate_skipped_block (start)
6448 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6449 insn = NEXT_INSN (insn))
6451 if (! INSN_P (insn))
6454 if (GET_CODE (insn) == CALL_INSN)
6456 if (! CONST_CALL_P (insn))
6457 invalidate_memory ();
6458 invalidate_for_call ();
6461 invalidate_from_clobbers (PATTERN (insn));
6462 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6466 /* If modifying X will modify the value in *DATA (which is really an
6467 `rtx *'), indicate that fact by setting the pointed to value to
6471 cse_check_loop_start (x, set, data)
6473 rtx set ATTRIBUTE_UNUSED;
6476 rtx *cse_check_loop_start_value = (rtx *) data;
6478 if (*cse_check_loop_start_value == NULL_RTX
6479 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6482 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6483 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6484 *cse_check_loop_start_value = NULL_RTX;
6487 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6488 a loop that starts with the label at LOOP_START.
6490 If X is a SET, we see if its SET_SRC is currently in our hash table.
6491 If so, we see if it has a value equal to some register used only in the
6492 loop exit code (as marked by jump.c).
6494 If those two conditions are true, we search backwards from the start of
6495 the loop to see if that same value was loaded into a register that still
6496 retains its value at the start of the loop.
6498 If so, we insert an insn after the load to copy the destination of that
6499 load into the equivalent register and (try to) replace our SET_SRC with that
6502 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6505 cse_set_around_loop (x, insn, loop_start)
6510 struct table_elt *src_elt;
6512 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6513 are setting PC or CC0 or whose SET_SRC is already a register. */
6514 if (GET_CODE (x) == SET
6515 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6516 && GET_CODE (SET_SRC (x)) != REG)
6518 src_elt = lookup (SET_SRC (x),
6519 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6520 GET_MODE (SET_DEST (x)));
6523 for (src_elt = src_elt->first_same_value; src_elt;
6524 src_elt = src_elt->next_same_value)
6525 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6526 && COST (src_elt->exp) < COST (SET_SRC (x)))
6530 /* Look for an insn in front of LOOP_START that sets
6531 something in the desired mode to SET_SRC (x) before we hit
6532 a label or CALL_INSN. */
6534 for (p = prev_nonnote_insn (loop_start);
6535 p && GET_CODE (p) != CALL_INSN
6536 && GET_CODE (p) != CODE_LABEL;
6537 p = prev_nonnote_insn (p))
6538 if ((set = single_set (p)) != 0
6539 && GET_CODE (SET_DEST (set)) == REG
6540 && GET_MODE (SET_DEST (set)) == src_elt->mode
6541 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6543 /* We now have to ensure that nothing between P
6544 and LOOP_START modified anything referenced in
6545 SET_SRC (x). We know that nothing within the loop
6546 can modify it, or we would have invalidated it in
6549 rtx cse_check_loop_start_value = SET_SRC (x);
6550 for (q = p; q != loop_start; q = NEXT_INSN (q))
6552 note_stores (PATTERN (q),
6553 cse_check_loop_start,
6554 &cse_check_loop_start_value);
6556 /* If nothing was changed and we can replace our
6557 SET_SRC, add an insn after P to copy its destination
6558 to what we will be replacing SET_SRC with. */
6559 if (cse_check_loop_start_value
6560 && validate_change (insn, &SET_SRC (x),
6563 /* If this creates new pseudos, this is unsafe,
6564 because the regno of new pseudo is unsuitable
6565 to index into reg_qty when cse_insn processes
6566 the new insn. Therefore, if a new pseudo was
6567 created, discard this optimization. */
6568 int nregs = max_reg_num ();
6570 = gen_move_insn (src_elt->exp, SET_DEST (set));
6571 if (nregs != max_reg_num ())
6573 if (! validate_change (insn, &SET_SRC (x),
6578 emit_insn_after (move, p);
6585 /* Deal with the destination of X affecting the stack pointer. */
6586 addr_affects_sp_p (SET_DEST (x));
6588 /* See comment on similar code in cse_insn for explanation of these
6590 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6591 || GET_CODE (SET_DEST (x)) == MEM)
6592 invalidate (SET_DEST (x), VOIDmode);
6593 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6594 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6595 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6598 /* Find the end of INSN's basic block and return its range,
6599 the total number of SETs in all the insns of the block, the last insn of the
6600 block, and the branch path.
6602 The branch path indicates which branches should be followed. If a non-zero
6603 path size is specified, the block should be rescanned and a different set
6604 of branches will be taken. The branch path is only used if
6605 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6607 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6608 used to describe the block. It is filled in with the information about
6609 the current block. The incoming structure's branch path, if any, is used
6610 to construct the output branch path. */
6613 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6615 struct cse_basic_block_data *data;
6622 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6623 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6624 int path_size = data->path_size;
6628 /* Update the previous branch path, if any. If the last branch was
6629 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6630 shorten the path by one and look at the previous branch. We know that
6631 at least one branch must have been taken if PATH_SIZE is non-zero. */
6632 while (path_size > 0)
6634 if (data->path[path_size - 1].status != NOT_TAKEN)
6636 data->path[path_size - 1].status = NOT_TAKEN;
6643 /* If the first instruction is marked with QImode, that means we've
6644 already processed this block. Our caller will look at DATA->LAST
6645 to figure out where to go next. We want to return the next block
6646 in the instruction stream, not some branched-to block somewhere
6647 else. We accomplish this by pretending our called forbid us to
6648 follow jumps, or skip blocks. */
6649 if (GET_MODE (insn) == QImode)
6650 follow_jumps = skip_blocks = 0;
6652 /* Scan to end of this basic block. */
6653 while (p && GET_CODE (p) != CODE_LABEL)
6655 /* Don't cse out the end of a loop. This makes a difference
6656 only for the unusual loops that always execute at least once;
6657 all other loops have labels there so we will stop in any case.
6658 Cse'ing out the end of the loop is dangerous because it
6659 might cause an invariant expression inside the loop
6660 to be reused after the end of the loop. This would make it
6661 hard to move the expression out of the loop in loop.c,
6662 especially if it is one of several equivalent expressions
6663 and loop.c would like to eliminate it.
6665 If we are running after loop.c has finished, we can ignore
6666 the NOTE_INSN_LOOP_END. */
6668 if (! after_loop && GET_CODE (p) == NOTE
6669 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6672 /* Don't cse over a call to setjmp; on some machines (eg vax)
6673 the regs restored by the longjmp come from
6674 a later time than the setjmp. */
6675 if (GET_CODE (p) == NOTE
6676 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6679 /* A PARALLEL can have lots of SETs in it,
6680 especially if it is really an ASM_OPERANDS. */
6681 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6682 nsets += XVECLEN (PATTERN (p), 0);
6683 else if (GET_CODE (p) != NOTE)
6686 /* Ignore insns made by CSE; they cannot affect the boundaries of
6689 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6690 high_cuid = INSN_CUID (p);
6691 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6692 low_cuid = INSN_CUID (p);
6694 /* See if this insn is in our branch path. If it is and we are to
6696 if (path_entry < path_size && data->path[path_entry].branch == p)
6698 if (data->path[path_entry].status != NOT_TAKEN)
6701 /* Point to next entry in path, if any. */
6705 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6706 was specified, we haven't reached our maximum path length, there are
6707 insns following the target of the jump, this is the only use of the
6708 jump label, and the target label is preceded by a BARRIER.
6710 Alternatively, we can follow the jump if it branches around a
6711 block of code and there are no other branches into the block.
6712 In this case invalidate_skipped_block will be called to invalidate any
6713 registers set in the block when following the jump. */
6715 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6716 && GET_CODE (p) == JUMP_INSN
6717 && GET_CODE (PATTERN (p)) == SET
6718 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6719 && JUMP_LABEL (p) != 0
6720 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6721 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6723 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6724 if ((GET_CODE (q) != NOTE
6725 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6726 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6727 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6730 /* If we ran into a BARRIER, this code is an extension of the
6731 basic block when the branch is taken. */
6732 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6734 /* Don't allow ourself to keep walking around an
6735 always-executed loop. */
6736 if (next_real_insn (q) == next)
6742 /* Similarly, don't put a branch in our path more than once. */
6743 for (i = 0; i < path_entry; i++)
6744 if (data->path[i].branch == p)
6747 if (i != path_entry)
6750 data->path[path_entry].branch = p;
6751 data->path[path_entry++].status = TAKEN;
6753 /* This branch now ends our path. It was possible that we
6754 didn't see this branch the last time around (when the
6755 insn in front of the target was a JUMP_INSN that was
6756 turned into a no-op). */
6757 path_size = path_entry;
6760 /* Mark block so we won't scan it again later. */
6761 PUT_MODE (NEXT_INSN (p), QImode);
6763 /* Detect a branch around a block of code. */
6764 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6768 if (next_real_insn (q) == next)
6774 for (i = 0; i < path_entry; i++)
6775 if (data->path[i].branch == p)
6778 if (i != path_entry)
6781 /* This is no_labels_between_p (p, q) with an added check for
6782 reaching the end of a function (in case Q precedes P). */
6783 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6784 if (GET_CODE (tmp) == CODE_LABEL)
6789 data->path[path_entry].branch = p;
6790 data->path[path_entry++].status = AROUND;
6792 path_size = path_entry;
6795 /* Mark block so we won't scan it again later. */
6796 PUT_MODE (NEXT_INSN (p), QImode);
6803 data->low_cuid = low_cuid;
6804 data->high_cuid = high_cuid;
6805 data->nsets = nsets;
6808 /* If all jumps in the path are not taken, set our path length to zero
6809 so a rescan won't be done. */
6810 for (i = path_size - 1; i >= 0; i--)
6811 if (data->path[i].status != NOT_TAKEN)
6815 data->path_size = 0;
6817 data->path_size = path_size;
6819 /* End the current branch path. */
6820 data->path[path_size].branch = 0;
6823 /* Perform cse on the instructions of a function.
6824 F is the first instruction.
6825 NREGS is one plus the highest pseudo-reg number used in the instruction.
6827 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6828 (only if -frerun-cse-after-loop).
6830 Returns 1 if jump_optimize should be redone due to simplifications
6831 in conditional jump instructions. */
6834 cse_main (f, nregs, after_loop, file)
6840 struct cse_basic_block_data val;
6841 register rtx insn = f;
6844 cse_jumps_altered = 0;
6845 recorded_label_ref = 0;
6846 constant_pool_entries_cost = 0;
6850 init_alias_analysis ();
6854 max_insn_uid = get_max_uid ();
6856 reg_eqv_table = (struct reg_eqv_elem *)
6857 xmalloc (nregs * sizeof (struct reg_eqv_elem));
6859 #ifdef LOAD_EXTEND_OP
6861 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6862 and change the code and mode as appropriate. */
6863 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6866 /* Discard all the free elements of the previous function
6867 since they are allocated in the temporarily obstack. */
6868 bzero ((char *) table, sizeof table);
6869 free_element_chain = 0;
6870 n_elements_made = 0;
6872 /* Find the largest uid. */
6874 max_uid = get_max_uid ();
6875 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6877 /* Compute the mapping from uids to cuids.
6878 CUIDs are numbers assigned to insns, like uids,
6879 except that cuids increase monotonically through the code.
6880 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6881 between two insns is not affected by -g. */
6883 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6885 if (GET_CODE (insn) != NOTE
6886 || NOTE_LINE_NUMBER (insn) < 0)
6887 INSN_CUID (insn) = ++i;
6889 /* Give a line number note the same cuid as preceding insn. */
6890 INSN_CUID (insn) = i;
6893 /* Initialize which registers are clobbered by calls. */
6895 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6897 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6898 if ((call_used_regs[i]
6899 /* Used to check !fixed_regs[i] here, but that isn't safe;
6900 fixed regs are still call-clobbered, and sched can get
6901 confused if they can "live across calls".
6903 The frame pointer is always preserved across calls. The arg
6904 pointer is if it is fixed. The stack pointer usually is, unless
6905 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6906 will be present. If we are generating PIC code, the PIC offset
6907 table register is preserved across calls. */
6909 && i != STACK_POINTER_REGNUM
6910 && i != FRAME_POINTER_REGNUM
6911 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6912 && i != HARD_FRAME_POINTER_REGNUM
6914 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6915 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6917 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6918 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6922 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6925 ggc_push_context ();
6927 /* Loop over basic blocks.
6928 Compute the maximum number of qty's needed for each basic block
6929 (which is 2 for each SET). */
6934 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6935 flag_cse_skip_blocks);
6937 /* If this basic block was already processed or has no sets, skip it. */
6938 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6940 PUT_MODE (insn, VOIDmode);
6941 insn = (val.last ? NEXT_INSN (val.last) : 0);
6946 cse_basic_block_start = val.low_cuid;
6947 cse_basic_block_end = val.high_cuid;
6948 max_qty = val.nsets * 2;
6951 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6952 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6955 /* Make MAX_QTY bigger to give us room to optimize
6956 past the end of this basic block, if that should prove useful. */
6962 /* If this basic block is being extended by following certain jumps,
6963 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6964 Otherwise, we start after this basic block. */
6965 if (val.path_size > 0)
6966 cse_basic_block (insn, val.last, val.path, 0);
6969 int old_cse_jumps_altered = cse_jumps_altered;
6972 /* When cse changes a conditional jump to an unconditional
6973 jump, we want to reprocess the block, since it will give
6974 us a new branch path to investigate. */
6975 cse_jumps_altered = 0;
6976 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6977 if (cse_jumps_altered == 0
6978 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6981 cse_jumps_altered |= old_cse_jumps_altered;
6984 if (ggc_p && cse_altered)
6995 if (max_elements_made < n_elements_made)
6996 max_elements_made = n_elements_made;
6999 end_alias_analysis ();
7001 free (reg_eqv_table);
7003 return cse_jumps_altered || recorded_label_ref;
7006 /* Process a single basic block. FROM and TO and the limits of the basic
7007 block. NEXT_BRANCH points to the branch path when following jumps or
7008 a null path when not following jumps.
7010 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7011 loop. This is true when we are being called for the last time on a
7012 block and this CSE pass is before loop.c. */
7015 cse_basic_block (from, to, next_branch, around_loop)
7016 register rtx from, to;
7017 struct branch_path *next_branch;
7022 rtx libcall_insn = NULL_RTX;
7025 /* This array is undefined before max_reg, so only allocate
7026 the space actually needed and adjust the start. */
7029 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7030 * sizeof (struct qty_table_elem));
7031 qty_table -= max_reg;
7035 /* TO might be a label. If so, protect it from being deleted. */
7036 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7039 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7041 register enum rtx_code code = GET_CODE (insn);
7043 /* If we have processed 1,000 insns, flush the hash table to
7044 avoid extreme quadratic behavior. We must not include NOTEs
7045 in the count since there may be more of them when generating
7046 debugging information. If we clear the table at different
7047 times, code generated with -g -O might be different than code
7048 generated with -O but not -g.
7050 ??? This is a real kludge and needs to be done some other way.
7052 if (code != NOTE && num_insns++ > 1000)
7054 flush_hash_table ();
7058 /* See if this is a branch that is part of the path. If so, and it is
7059 to be taken, do so. */
7060 if (next_branch->branch == insn)
7062 enum taken status = next_branch++->status;
7063 if (status != NOT_TAKEN)
7065 if (status == TAKEN)
7066 record_jump_equiv (insn, 1);
7068 invalidate_skipped_block (NEXT_INSN (insn));
7070 /* Set the last insn as the jump insn; it doesn't affect cc0.
7071 Then follow this branch. */
7076 insn = JUMP_LABEL (insn);
7081 if (GET_MODE (insn) == QImode)
7082 PUT_MODE (insn, VOIDmode);
7084 if (GET_RTX_CLASS (code) == 'i')
7088 /* Process notes first so we have all notes in canonical forms when
7089 looking for duplicate operations. */
7091 if (REG_NOTES (insn))
7092 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7094 /* Track when we are inside in LIBCALL block. Inside such a block,
7095 we do not want to record destinations. The last insn of a
7096 LIBCALL block is not considered to be part of the block, since
7097 its destination is the result of the block and hence should be
7100 if (REG_NOTES (insn) != 0)
7102 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7103 libcall_insn = XEXP (p, 0);
7104 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7108 cse_insn (insn, libcall_insn);
7111 /* If INSN is now an unconditional jump, skip to the end of our
7112 basic block by pretending that we just did the last insn in the
7113 basic block. If we are jumping to the end of our block, show
7114 that we can have one usage of TO. */
7116 if (any_uncondjump_p (insn))
7120 free (qty_table + max_reg);
7124 if (JUMP_LABEL (insn) == to)
7127 /* Maybe TO was deleted because the jump is unconditional.
7128 If so, there is nothing left in this basic block. */
7129 /* ??? Perhaps it would be smarter to set TO
7130 to whatever follows this insn,
7131 and pretend the basic block had always ended here. */
7132 if (INSN_DELETED_P (to))
7135 insn = PREV_INSN (to);
7138 /* See if it is ok to keep on going past the label
7139 which used to end our basic block. Remember that we incremented
7140 the count of that label, so we decrement it here. If we made
7141 a jump unconditional, TO_USAGE will be one; in that case, we don't
7142 want to count the use in that jump. */
7144 if (to != 0 && NEXT_INSN (insn) == to
7145 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7147 struct cse_basic_block_data val;
7150 insn = NEXT_INSN (to);
7152 /* If TO was the last insn in the function, we are done. */
7155 free (qty_table + max_reg);
7159 /* If TO was preceded by a BARRIER we are done with this block
7160 because it has no continuation. */
7161 prev = prev_nonnote_insn (to);
7162 if (prev && GET_CODE (prev) == BARRIER)
7164 free (qty_table + max_reg);
7168 /* Find the end of the following block. Note that we won't be
7169 following branches in this case. */
7172 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7174 /* If the tables we allocated have enough space left
7175 to handle all the SETs in the next basic block,
7176 continue through it. Otherwise, return,
7177 and that block will be scanned individually. */
7178 if (val.nsets * 2 + next_qty > max_qty)
7181 cse_basic_block_start = val.low_cuid;
7182 cse_basic_block_end = val.high_cuid;
7185 /* Prevent TO from being deleted if it is a label. */
7186 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7189 /* Back up so we process the first insn in the extension. */
7190 insn = PREV_INSN (insn);
7194 if (next_qty > max_qty)
7197 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7198 the previous insn is the only insn that branches to the head of a loop,
7199 we can cse into the loop. Don't do this if we changed the jump
7200 structure of a loop unless we aren't going to be following jumps. */
7202 if ((cse_jumps_altered == 0
7203 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7204 && around_loop && to != 0
7205 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7206 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7207 && JUMP_LABEL (PREV_INSN (to)) != 0
7208 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7209 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7211 free (qty_table + max_reg);
7213 return to ? NEXT_INSN (to) : 0;
7216 /* Count the number of times registers are used (not set) in X.
7217 COUNTS is an array in which we accumulate the count, INCR is how much
7218 we count each register usage.
7220 Don't count a usage of DEST, which is the SET_DEST of a SET which
7221 contains X in its SET_SRC. This is because such a SET does not
7222 modify the liveness of DEST. */
7225 count_reg_usage (x, counts, dest, incr)
7238 switch (code = GET_CODE (x))
7242 counts[REGNO (x)] += incr;
7255 /* If we are clobbering a MEM, mark any registers inside the address
7257 if (GET_CODE (XEXP (x, 0)) == MEM)
7258 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7262 /* Unless we are setting a REG, count everything in SET_DEST. */
7263 if (GET_CODE (SET_DEST (x)) != REG)
7264 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7266 /* If SRC has side-effects, then we can't delete this insn, so the
7267 usage of SET_DEST inside SRC counts.
7269 ??? Strictly-speaking, we might be preserving this insn
7270 because some other SET has side-effects, but that's hard
7271 to do and can't happen now. */
7272 count_reg_usage (SET_SRC (x), counts,
7273 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7278 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7283 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7285 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7288 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7293 if (REG_NOTE_KIND (x) == REG_EQUAL
7294 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7295 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7296 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7303 fmt = GET_RTX_FORMAT (code);
7304 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7307 count_reg_usage (XEXP (x, i), counts, dest, incr);
7308 else if (fmt[i] == 'E')
7309 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7310 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7314 /* Scan all the insns and delete any that are dead; i.e., they store a register
7315 that is never used or they copy a register to itself.
7317 This is used to remove insns made obviously dead by cse, loop or other
7318 optimizations. It improves the heuristics in loop since it won't try to
7319 move dead invariants out of loops or make givs for dead quantities. The
7320 remaining passes of the compilation are also sped up. */
7323 delete_trivially_dead_insns (insns, nreg)
7333 int in_libcall = 0, dead_libcall = 0;
7335 /* First count the number of times each register is used. */
7336 counts = (int *) xcalloc (nreg, sizeof (int));
7337 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7338 count_reg_usage (insn, counts, NULL_RTX, 1);
7340 /* Go from the last insn to the first and delete insns that only set unused
7341 registers or copy a register to itself. As we delete an insn, remove
7342 usage counts for registers it uses.
7344 The first jump optimization pass may leave a real insn as the last
7345 insn in the function. We must not skip that insn or we may end
7346 up deleting code that is not really dead. */
7347 insn = get_last_insn ();
7348 if (! INSN_P (insn))
7349 insn = prev_real_insn (insn);
7351 for (; insn; insn = prev)
7356 prev = prev_real_insn (insn);
7358 /* Don't delete any insns that are part of a libcall block unless
7359 we can delete the whole libcall block.
7361 Flow or loop might get confused if we did that. Remember
7362 that we are scanning backwards. */
7363 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7369 /* See if there's a REG_EQUAL note on this insn and try to
7370 replace the source with the REG_EQUAL expression.
7372 We assume that insns with REG_RETVALs can only be reg->reg
7373 copies at this point. */
7374 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7377 rtx set = single_set (insn);
7378 rtx new = simplify_rtx (XEXP (note, 0));
7381 new = XEXP (note, 0);
7383 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7386 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7391 else if (in_libcall)
7392 live_insn = ! dead_libcall;
7393 else if (GET_CODE (PATTERN (insn)) == SET)
7395 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7396 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7397 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7398 SET_SRC (PATTERN (insn))))
7400 else if (GET_CODE (SET_DEST (PATTERN (insn))) == STRICT_LOW_PART
7401 && rtx_equal_p (XEXP (SET_DEST (PATTERN (insn)), 0),
7402 SET_SRC (PATTERN (insn))))
7406 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7407 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7408 && ((tem = next_nonnote_insn (insn)) == 0
7410 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7413 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7414 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7415 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7416 || side_effects_p (SET_SRC (PATTERN (insn)))
7417 /* An ADDRESSOF expression can turn into a use of the
7418 internal arg pointer, so always consider the
7419 internal arg pointer live. If it is truly dead,
7420 flow will delete the initializing insn. */
7421 || (SET_DEST (PATTERN (insn))
7422 == current_function_internal_arg_pointer))
7425 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7426 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7428 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7430 if (GET_CODE (elt) == SET)
7432 if ((GET_CODE (SET_DEST (elt)) == REG
7433 || GET_CODE (SET_DEST (elt)) == SUBREG)
7434 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7438 else if (GET_CODE (SET_DEST (elt)) == CC0
7439 && ! side_effects_p (SET_SRC (elt))
7440 && ((tem = next_nonnote_insn (insn)) == 0
7442 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7445 else if (GET_CODE (SET_DEST (elt)) != REG
7446 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7447 || counts[REGNO (SET_DEST (elt))] != 0
7448 || side_effects_p (SET_SRC (elt))
7449 /* An ADDRESSOF expression can turn into a use of the
7450 internal arg pointer, so always consider the
7451 internal arg pointer live. If it is truly dead,
7452 flow will delete the initializing insn. */
7454 == current_function_internal_arg_pointer))
7457 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7463 /* If this is a dead insn, delete it and show registers in it aren't
7468 count_reg_usage (insn, counts, NULL_RTX, -1);
7472 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))