1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
30 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
203 /* One plus largest instruction UID used in this function at time of
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
307 /* The quantity number of the register's current contents. */
310 /* The number of times the register has been altered in the current
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
386 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
387 to put in the note. */
388 static int recorded_label_ref;
390 /* canon_hash stores 1 in do_not_record
391 if it notices a reference to CC0, PC, or some other volatile
394 static int do_not_record;
396 #ifdef LOAD_EXTEND_OP
398 /* Scratch rtl used when looking for load-extended copy of a MEM. */
399 static rtx memory_extend_rtx;
402 /* canon_hash stores 1 in hash_arg_in_memory
403 if it notices a reference to memory within the expression being hashed. */
405 static int hash_arg_in_memory;
407 /* The hash table contains buckets which are chains of `struct table_elt's,
408 each recording one expression's information.
409 That expression is in the `exp' field.
411 The canon_exp field contains a canonical (from the point of view of
412 alias analysis) version of the `exp' field.
414 Those elements with the same hash code are chained in both directions
415 through the `next_same_hash' and `prev_same_hash' fields.
417 Each set of expressions with equivalent values
418 are on a two-way chain through the `next_same_value'
419 and `prev_same_value' fields, and all point with
420 the `first_same_value' field at the first element in
421 that chain. The chain is in order of increasing cost.
422 Each element's cost value is in its `cost' field.
424 The `in_memory' field is nonzero for elements that
425 involve any reference to memory. These elements are removed
426 whenever a write is done to an unidentified location in memory.
427 To be safe, we assume that a memory address is unidentified unless
428 the address is either a symbol constant or a constant plus
429 the frame pointer or argument pointer.
431 The `related_value' field is used to connect related expressions
432 (that differ by adding an integer).
433 The related expressions are chained in a circular fashion.
434 `related_value' is zero for expressions for which this
437 The `cost' field stores the cost of this element's expression.
438 The `regcost' field stores the value returned by approx_reg_cost for
439 this element's expression.
441 The `is_const' flag is set if the element is a constant (including
444 The `flag' field is used as a temporary during some search routines.
446 The `mode' field is usually the same as GET_MODE (`exp'), but
447 if `exp' is a CONST_INT and has no machine mode then the `mode'
448 field is the mode it was being used as. Each constant is
449 recorded separately for each mode it is used with. */
455 struct table_elt *next_same_hash;
456 struct table_elt *prev_same_hash;
457 struct table_elt *next_same_value;
458 struct table_elt *prev_same_value;
459 struct table_elt *first_same_value;
460 struct table_elt *related_value;
463 enum machine_mode mode;
469 /* We don't want a lot of buckets, because we rarely have very many
470 things stored in the hash table, and a lot of buckets slows
471 down a lot of loops that happen frequently. */
473 #define HASH_SIZE (1 << HASH_SHIFT)
474 #define HASH_MASK (HASH_SIZE - 1)
476 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
477 register (hard registers may require `do_not_record' to be set). */
480 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
481 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
482 : canon_hash (X, M)) & HASH_MASK)
484 /* Determine whether register number N is considered a fixed register for the
485 purpose of approximating register costs.
486 It is desirable to replace other regs with fixed regs, to reduce need for
488 A reg wins if it is either the frame pointer or designated as fixed. */
489 #define FIXED_REGNO_P(N) \
490 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
491 || fixed_regs[N] || global_regs[N])
493 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
494 hard registers and pointers into the frame are the cheapest with a cost
495 of 0. Next come pseudos with a cost of one and other hard registers with
496 a cost of 2. Aside from these special cases, call `rtx_cost'. */
498 #define CHEAP_REGNO(N) \
499 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
500 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
501 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
502 || ((N) < FIRST_PSEUDO_REGISTER \
503 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
505 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X))
507 /* Get the info associated with register N. */
509 #define GET_CSE_REG_INFO(N) \
510 (((N) == cached_regno && cached_cse_reg_info) \
511 ? cached_cse_reg_info : get_cse_reg_info ((N)))
513 /* Get the number of times this register has been updated in this
516 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
518 /* Get the point at which REG was recorded in the table. */
520 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
522 /* Get the quantity number for REG. */
524 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
526 /* Determine if the quantity number for register X represents a valid index
527 into the qty_table. */
529 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
531 static struct table_elt *table[HASH_SIZE];
533 /* Chain of `struct table_elt's made so far for this function
534 but currently removed from the table. */
536 static struct table_elt *free_element_chain;
538 /* Number of `struct table_elt' structures made so far for this function. */
540 static int n_elements_made;
542 /* Maximum value `n_elements_made' has had so far in this compilation
543 for functions previously processed. */
545 static int max_elements_made;
547 /* Surviving equivalence class when two equivalence classes are merged
548 by recording the effects of a jump in the last insn. Zero if the
549 last insn was not a conditional jump. */
551 static struct table_elt *last_jump_equiv_class;
553 /* Set to the cost of a constant pool reference if one was found for a
554 symbolic constant. If this was found, it means we should try to
555 convert constants into constant pool entries if they don't fit in
558 static int constant_pool_entries_cost;
560 /* Define maximum length of a branch path. */
562 #define PATHLENGTH 10
564 /* This data describes a block that will be processed by cse_basic_block. */
566 struct cse_basic_block_data
568 /* Lowest CUID value of insns in block. */
570 /* Highest CUID value of insns in block. */
572 /* Total number of SETs in block. */
574 /* Last insn in the block. */
576 /* Size of current branch path, if any. */
578 /* Current branch path, indicating which branches will be taken. */
581 /* The branch insn. */
583 /* Whether it should be taken or not. AROUND is the same as taken
584 except that it is used when the destination label is not preceded
586 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
590 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
591 virtual regs here because the simplify_*_operation routines are called
592 by integrate.c, which is called before virtual register instantiation.
594 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
595 a header file so that their definitions can be shared with the
596 simplification routines in simplify-rtx.c. Until then, do not
597 change these macros without also changing the copy in simplify-rtx.c. */
599 #define FIXED_BASE_PLUS_P(X) \
600 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
601 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
602 || (X) == virtual_stack_vars_rtx \
603 || (X) == virtual_incoming_args_rtx \
604 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
605 && (XEXP (X, 0) == frame_pointer_rtx \
606 || XEXP (X, 0) == hard_frame_pointer_rtx \
607 || ((X) == arg_pointer_rtx \
608 && fixed_regs[ARG_POINTER_REGNUM]) \
609 || XEXP (X, 0) == virtual_stack_vars_rtx \
610 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
611 || GET_CODE (X) == ADDRESSOF)
613 /* Similar, but also allows reference to the stack pointer.
615 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
616 arg_pointer_rtx by itself is nonzero, because on at least one machine,
617 the i960, the arg pointer is zero when it is unused. */
619 #define NONZERO_BASE_PLUS_P(X) \
620 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
621 || (X) == virtual_stack_vars_rtx \
622 || (X) == virtual_incoming_args_rtx \
623 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
624 && (XEXP (X, 0) == frame_pointer_rtx \
625 || XEXP (X, 0) == hard_frame_pointer_rtx \
626 || ((X) == arg_pointer_rtx \
627 && fixed_regs[ARG_POINTER_REGNUM]) \
628 || XEXP (X, 0) == virtual_stack_vars_rtx \
629 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
630 || (X) == stack_pointer_rtx \
631 || (X) == virtual_stack_dynamic_rtx \
632 || (X) == virtual_outgoing_args_rtx \
633 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
634 && (XEXP (X, 0) == stack_pointer_rtx \
635 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
636 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
637 || GET_CODE (X) == ADDRESSOF)
639 static int notreg_cost PARAMS ((rtx));
640 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
641 static int approx_reg_cost PARAMS ((rtx));
642 static int preferrable PARAMS ((int, int, int, int));
643 static void new_basic_block PARAMS ((void));
644 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
645 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
646 static void delete_reg_equiv PARAMS ((unsigned int));
647 static int mention_regs PARAMS ((rtx));
648 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
649 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
650 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
651 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
652 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
653 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
655 static void merge_equiv_classes PARAMS ((struct table_elt *,
656 struct table_elt *));
657 static void invalidate PARAMS ((rtx, enum machine_mode));
658 static int cse_rtx_varies_p PARAMS ((rtx));
659 static void remove_invalid_refs PARAMS ((unsigned int));
660 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
662 static void rehash_using_reg PARAMS ((rtx));
663 static void invalidate_memory PARAMS ((void));
664 static void invalidate_for_call PARAMS ((void));
665 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
666 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
667 static unsigned canon_hash_string PARAMS ((const char *));
668 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
669 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
670 static rtx canon_reg PARAMS ((rtx, rtx));
671 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
672 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
674 enum machine_mode *));
675 static rtx fold_rtx PARAMS ((rtx, rtx));
676 static rtx equiv_constant PARAMS ((rtx));
677 static void record_jump_equiv PARAMS ((rtx, int));
678 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
680 static void cse_insn PARAMS ((rtx, rtx));
681 static int addr_affects_sp_p PARAMS ((rtx));
682 static void invalidate_from_clobbers PARAMS ((rtx));
683 static rtx cse_process_notes PARAMS ((rtx, rtx));
684 static void cse_around_loop PARAMS ((rtx));
685 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
686 static void invalidate_skipped_block PARAMS ((rtx));
687 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
688 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
689 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
690 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
691 extern void dump_class PARAMS ((struct table_elt*));
692 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
693 static int check_dependence PARAMS ((rtx *, void *));
695 static void flush_hash_table PARAMS ((void));
697 /* Dump the expressions in the equivalence class indicated by CLASSP.
698 This function is used only for debugging. */
701 struct table_elt *classp;
703 struct table_elt *elt;
705 fprintf (stderr, "Equivalence chain for ");
706 print_rtl (stderr, classp->exp);
707 fprintf (stderr, ": \n");
709 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
711 print_rtl (stderr, elt->exp);
712 fprintf (stderr, "\n");
716 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
718 approx_reg_cost_1 (xp, data)
723 regset set = (regset) data;
725 if (x && GET_CODE (x) == REG)
726 SET_REGNO_REG_SET (set, REGNO (x));
730 /* Return an estimate of the cost of the registers used in an rtx.
731 This is mostly the number of different REG expressions in the rtx;
732 however for some excecptions like fixed registers we use a cost of
733 0. If any other hard register reference occurs, return MAX_COST. */
745 for_each_rtx (&x, approx_reg_cost_1, (void *)&set);
747 EXECUTE_IF_SET_IN_REG_SET
750 if (! CHEAP_REGNO (i))
752 if (i < FIRST_PSEUDO_REGISTER)
755 cost += i < FIRST_PSEUDO_REGISTER ? 2 : 1;
759 CLEAR_REG_SET (&set);
760 return hardregs && SMALL_REGISTER_CLASSES ? MAX_COST : cost;
763 /* Return a negative value if an rtx A, whose costs are given by COST_A
764 and REGCOST_A, is more desirable than an rtx B.
765 Return a positive value if A is less desirable, or 0 if the two are
768 preferrable (cost_a, regcost_a, cost_b, regcost_b)
769 int cost_a, regcost_a, cost_b, regcost_b;
771 /* First, get rid of a cases involving expressions that are entirely
773 if (cost_a != cost_b)
775 if (cost_a == MAX_COST)
777 if (cost_b == MAX_COST)
781 /* Avoid extending lifetimes of hardregs. */
782 if (regcost_a != regcost_b)
784 if (regcost_a == MAX_COST)
786 if (regcost_b == MAX_COST)
790 /* Normal operation costs take precedence. */
791 if (cost_a != cost_b)
792 return cost_a - cost_b;
793 /* Only if these are identical consider effects on register pressure. */
794 if (regcost_a != regcost_b)
795 return regcost_a - regcost_b;
799 /* Internal function, to compute cost when X is not a register; called
800 from COST macro to keep it simple. */
806 return ((GET_CODE (x) == SUBREG
807 && GET_CODE (SUBREG_REG (x)) == REG
808 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
809 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
810 && (GET_MODE_SIZE (GET_MODE (x))
811 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
812 && subreg_lowpart_p (x)
813 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
814 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
816 : rtx_cost (x, SET) * 2);
819 /* Return an estimate of the cost of computing rtx X.
820 One use is in cse, to decide which expression to keep in the hash table.
821 Another is in rtl generation, to pick the cheapest way to multiply.
822 Other uses like the latter are expected in the future. */
825 rtx_cost (x, outer_code)
827 enum rtx_code outer_code ATTRIBUTE_UNUSED;
830 register enum rtx_code code;
831 register const char *fmt;
837 /* Compute the default costs of certain things.
838 Note that RTX_COSTS can override the defaults. */
844 /* Count multiplication by 2**n as a shift,
845 because if we are considering it, we would output it as a shift. */
846 if (GET_CODE (XEXP (x, 1)) == CONST_INT
847 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
850 total = COSTS_N_INSNS (5);
856 total = COSTS_N_INSNS (7);
859 /* Used in loop.c and combine.c as a marker. */
863 total = COSTS_N_INSNS (1);
872 /* If we can't tie these modes, make this expensive. The larger
873 the mode, the more expensive it is. */
874 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
875 return COSTS_N_INSNS (2
876 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
880 RTX_COSTS (x, code, outer_code);
883 CONST_COSTS (x, code, outer_code);
887 #ifdef DEFAULT_RTX_COSTS
888 DEFAULT_RTX_COSTS (x, code, outer_code);
893 /* Sum the costs of the sub-rtx's, plus cost of this operation,
894 which is already in total. */
896 fmt = GET_RTX_FORMAT (code);
897 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
899 total += rtx_cost (XEXP (x, i), code);
900 else if (fmt[i] == 'E')
901 for (j = 0; j < XVECLEN (x, i); j++)
902 total += rtx_cost (XVECEXP (x, i, j), code);
907 /* Return cost of address expression X.
908 Expect that X is propertly formed address reference. */
911 address_cost (x, mode)
913 enum machine_mode mode;
915 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
916 during CSE, such nodes are present. Using an ADDRESSOF node which
917 refers to the address of a REG is a good thing because we can then
918 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
920 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
923 /* We may be asked for cost of various unusual addresses, such as operands
924 of push instruction. It is not worthwhile to complicate writing
925 of ADDRESS_COST macro by such cases. */
927 if (!memory_address_p (mode, x))
930 return ADDRESS_COST (x);
932 return rtx_cost (x, MEM);
937 static struct cse_reg_info *
938 get_cse_reg_info (regno)
941 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
942 struct cse_reg_info *p;
944 for (p = *hash_head; p != NULL; p = p->hash_next)
945 if (p->regno == regno)
950 /* Get a new cse_reg_info structure. */
951 if (cse_reg_info_free_list)
953 p = cse_reg_info_free_list;
954 cse_reg_info_free_list = p->next;
957 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
959 /* Insert into hash table. */
960 p->hash_next = *hash_head;
965 p->reg_in_table = -1;
968 p->next = cse_reg_info_used_list;
969 cse_reg_info_used_list = p;
970 if (!cse_reg_info_used_list_end)
971 cse_reg_info_used_list_end = p;
974 /* Cache this lookup; we tend to be looking up information about the
975 same register several times in a row. */
976 cached_regno = regno;
977 cached_cse_reg_info = p;
982 /* Clear the hash table and initialize each register with its own quantity,
983 for a new basic block. */
992 /* Clear out hash table state for this pass. */
994 bzero ((char *) reg_hash, sizeof reg_hash);
996 if (cse_reg_info_used_list)
998 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
999 cse_reg_info_free_list = cse_reg_info_used_list;
1000 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
1002 cached_cse_reg_info = 0;
1004 CLEAR_HARD_REG_SET (hard_regs_in_table);
1006 /* The per-quantity values used to be initialized here, but it is
1007 much faster to initialize each as it is made in `make_new_qty'. */
1009 for (i = 0; i < HASH_SIZE; i++)
1011 struct table_elt *first;
1016 struct table_elt *last = first;
1020 while (last->next_same_hash != NULL)
1021 last = last->next_same_hash;
1023 /* Now relink this hash entire chain into
1024 the free element list. */
1026 last->next_same_hash = free_element_chain;
1027 free_element_chain = first;
1038 /* Say that register REG contains a quantity in mode MODE not in any
1039 register before and initialize that quantity. */
1042 make_new_qty (reg, mode)
1044 enum machine_mode mode;
1047 register struct qty_table_elem *ent;
1048 register struct reg_eqv_elem *eqv;
1050 if (next_qty >= max_qty)
1053 q = REG_QTY (reg) = next_qty++;
1054 ent = &qty_table[q];
1055 ent->first_reg = reg;
1056 ent->last_reg = reg;
1058 ent->const_rtx = ent->const_insn = NULL_RTX;
1059 ent->comparison_code = UNKNOWN;
1061 eqv = ®_eqv_table[reg];
1062 eqv->next = eqv->prev = -1;
1065 /* Make reg NEW equivalent to reg OLD.
1066 OLD is not changing; NEW is. */
1069 make_regs_eqv (new, old)
1070 unsigned int new, old;
1072 unsigned int lastr, firstr;
1073 int q = REG_QTY (old);
1074 struct qty_table_elem *ent;
1076 ent = &qty_table[q];
1078 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1079 if (! REGNO_QTY_VALID_P (old))
1083 firstr = ent->first_reg;
1084 lastr = ent->last_reg;
1086 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1087 hard regs. Among pseudos, if NEW will live longer than any other reg
1088 of the same qty, and that is beyond the current basic block,
1089 make it the new canonical replacement for this qty. */
1090 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1091 /* Certain fixed registers might be of the class NO_REGS. This means
1092 that not only can they not be allocated by the compiler, but
1093 they cannot be used in substitutions or canonicalizations
1095 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1096 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1097 || (new >= FIRST_PSEUDO_REGISTER
1098 && (firstr < FIRST_PSEUDO_REGISTER
1099 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1100 || (uid_cuid[REGNO_FIRST_UID (new)]
1101 < cse_basic_block_start))
1102 && (uid_cuid[REGNO_LAST_UID (new)]
1103 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1105 reg_eqv_table[firstr].prev = new;
1106 reg_eqv_table[new].next = firstr;
1107 reg_eqv_table[new].prev = -1;
1108 ent->first_reg = new;
1112 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1113 Otherwise, insert before any non-fixed hard regs that are at the
1114 end. Registers of class NO_REGS cannot be used as an
1115 equivalent for anything. */
1116 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1117 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1118 && new >= FIRST_PSEUDO_REGISTER)
1119 lastr = reg_eqv_table[lastr].prev;
1120 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1121 if (reg_eqv_table[lastr].next >= 0)
1122 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1124 qty_table[q].last_reg = new;
1125 reg_eqv_table[lastr].next = new;
1126 reg_eqv_table[new].prev = lastr;
1130 /* Remove REG from its equivalence class. */
1133 delete_reg_equiv (reg)
1136 register struct qty_table_elem *ent;
1137 register int q = REG_QTY (reg);
1140 /* If invalid, do nothing. */
1144 ent = &qty_table[q];
1146 p = reg_eqv_table[reg].prev;
1147 n = reg_eqv_table[reg].next;
1150 reg_eqv_table[n].prev = p;
1154 reg_eqv_table[p].next = n;
1158 REG_QTY (reg) = reg;
1161 /* Remove any invalid expressions from the hash table
1162 that refer to any of the registers contained in expression X.
1164 Make sure that newly inserted references to those registers
1165 as subexpressions will be considered valid.
1167 mention_regs is not called when a register itself
1168 is being stored in the table.
1170 Return 1 if we have done something that may have changed the hash code
1177 register enum rtx_code code;
1179 register const char *fmt;
1180 register int changed = 0;
1185 code = GET_CODE (x);
1188 unsigned int regno = REGNO (x);
1189 unsigned int endregno
1190 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1191 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1194 for (i = regno; i < endregno; i++)
1196 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1197 remove_invalid_refs (i);
1199 REG_IN_TABLE (i) = REG_TICK (i);
1205 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1206 pseudo if they don't use overlapping words. We handle only pseudos
1207 here for simplicity. */
1208 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1209 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1211 unsigned int i = REGNO (SUBREG_REG (x));
1213 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1215 /* If reg_tick has been incremented more than once since
1216 reg_in_table was last set, that means that the entire
1217 register has been set before, so discard anything memorized
1218 for the entrire register, including all SUBREG expressions. */
1219 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1220 remove_invalid_refs (i);
1222 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1225 REG_IN_TABLE (i) = REG_TICK (i);
1229 /* If X is a comparison or a COMPARE and either operand is a register
1230 that does not have a quantity, give it one. This is so that a later
1231 call to record_jump_equiv won't cause X to be assigned a different
1232 hash code and not found in the table after that call.
1234 It is not necessary to do this here, since rehash_using_reg can
1235 fix up the table later, but doing this here eliminates the need to
1236 call that expensive function in the most common case where the only
1237 use of the register is in the comparison. */
1239 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1241 if (GET_CODE (XEXP (x, 0)) == REG
1242 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1243 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1245 rehash_using_reg (XEXP (x, 0));
1249 if (GET_CODE (XEXP (x, 1)) == REG
1250 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1251 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1253 rehash_using_reg (XEXP (x, 1));
1258 fmt = GET_RTX_FORMAT (code);
1259 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1261 changed |= mention_regs (XEXP (x, i));
1262 else if (fmt[i] == 'E')
1263 for (j = 0; j < XVECLEN (x, i); j++)
1264 changed |= mention_regs (XVECEXP (x, i, j));
1269 /* Update the register quantities for inserting X into the hash table
1270 with a value equivalent to CLASSP.
1271 (If the class does not contain a REG, it is irrelevant.)
1272 If MODIFIED is nonzero, X is a destination; it is being modified.
1273 Note that delete_reg_equiv should be called on a register
1274 before insert_regs is done on that register with MODIFIED != 0.
1276 Nonzero value means that elements of reg_qty have changed
1277 so X's hash code may be different. */
1280 insert_regs (x, classp, modified)
1282 struct table_elt *classp;
1285 if (GET_CODE (x) == REG)
1287 unsigned int regno = REGNO (x);
1290 /* If REGNO is in the equivalence table already but is of the
1291 wrong mode for that equivalence, don't do anything here. */
1293 qty_valid = REGNO_QTY_VALID_P (regno);
1296 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1298 if (ent->mode != GET_MODE (x))
1302 if (modified || ! qty_valid)
1305 for (classp = classp->first_same_value;
1307 classp = classp->next_same_value)
1308 if (GET_CODE (classp->exp) == REG
1309 && GET_MODE (classp->exp) == GET_MODE (x))
1311 make_regs_eqv (regno, REGNO (classp->exp));
1315 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1316 than REG_IN_TABLE to find out if there was only a single preceding
1317 invalidation - for the SUBREG - or another one, which would be
1318 for the full register. However, if we find here that REG_TICK
1319 indicates that the register is invalid, it means that it has
1320 been invalidated in a separate operation. The SUBREG might be used
1321 now (then this is a recursive call), or we might use the full REG
1322 now and a SUBREG of it later. So bump up REG_TICK so that
1323 mention_regs will do the right thing. */
1325 && REG_IN_TABLE (regno) >= 0
1326 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1328 make_new_qty (regno, GET_MODE (x));
1335 /* If X is a SUBREG, we will likely be inserting the inner register in the
1336 table. If that register doesn't have an assigned quantity number at
1337 this point but does later, the insertion that we will be doing now will
1338 not be accessible because its hash code will have changed. So assign
1339 a quantity number now. */
1341 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1342 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1344 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1349 return mention_regs (x);
1352 /* Look in or update the hash table. */
1354 /* Remove table element ELT from use in the table.
1355 HASH is its hash code, made using the HASH macro.
1356 It's an argument because often that is known in advance
1357 and we save much time not recomputing it. */
1360 remove_from_table (elt, hash)
1361 register struct table_elt *elt;
1367 /* Mark this element as removed. See cse_insn. */
1368 elt->first_same_value = 0;
1370 /* Remove the table element from its equivalence class. */
1373 register struct table_elt *prev = elt->prev_same_value;
1374 register struct table_elt *next = elt->next_same_value;
1377 next->prev_same_value = prev;
1380 prev->next_same_value = next;
1383 register struct table_elt *newfirst = next;
1386 next->first_same_value = newfirst;
1387 next = next->next_same_value;
1392 /* Remove the table element from its hash bucket. */
1395 register struct table_elt *prev = elt->prev_same_hash;
1396 register struct table_elt *next = elt->next_same_hash;
1399 next->prev_same_hash = prev;
1402 prev->next_same_hash = next;
1403 else if (table[hash] == elt)
1407 /* This entry is not in the proper hash bucket. This can happen
1408 when two classes were merged by `merge_equiv_classes'. Search
1409 for the hash bucket that it heads. This happens only very
1410 rarely, so the cost is acceptable. */
1411 for (hash = 0; hash < HASH_SIZE; hash++)
1412 if (table[hash] == elt)
1417 /* Remove the table element from its related-value circular chain. */
1419 if (elt->related_value != 0 && elt->related_value != elt)
1421 register struct table_elt *p = elt->related_value;
1423 while (p->related_value != elt)
1424 p = p->related_value;
1425 p->related_value = elt->related_value;
1426 if (p->related_value == p)
1427 p->related_value = 0;
1430 /* Now add it to the free element chain. */
1431 elt->next_same_hash = free_element_chain;
1432 free_element_chain = elt;
1435 /* Look up X in the hash table and return its table element,
1436 or 0 if X is not in the table.
1438 MODE is the machine-mode of X, or if X is an integer constant
1439 with VOIDmode then MODE is the mode with which X will be used.
1441 Here we are satisfied to find an expression whose tree structure
1444 static struct table_elt *
1445 lookup (x, hash, mode)
1448 enum machine_mode mode;
1450 register struct table_elt *p;
1452 for (p = table[hash]; p; p = p->next_same_hash)
1453 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1454 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1460 /* Like `lookup' but don't care whether the table element uses invalid regs.
1461 Also ignore discrepancies in the machine mode of a register. */
1463 static struct table_elt *
1464 lookup_for_remove (x, hash, mode)
1467 enum machine_mode mode;
1469 register struct table_elt *p;
1471 if (GET_CODE (x) == REG)
1473 unsigned int regno = REGNO (x);
1475 /* Don't check the machine mode when comparing registers;
1476 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1477 for (p = table[hash]; p; p = p->next_same_hash)
1478 if (GET_CODE (p->exp) == REG
1479 && REGNO (p->exp) == regno)
1484 for (p = table[hash]; p; p = p->next_same_hash)
1485 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1492 /* Look for an expression equivalent to X and with code CODE.
1493 If one is found, return that expression. */
1496 lookup_as_function (x, code)
1500 register struct table_elt *p
1501 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1503 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1504 long as we are narrowing. So if we looked in vain for a mode narrower
1505 than word_mode before, look for word_mode now. */
1506 if (p == 0 && code == CONST_INT
1507 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1510 PUT_MODE (x, word_mode);
1511 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1517 for (p = p->first_same_value; p; p = p->next_same_value)
1518 if (GET_CODE (p->exp) == code
1519 /* Make sure this is a valid entry in the table. */
1520 && exp_equiv_p (p->exp, p->exp, 1, 0))
1526 /* Insert X in the hash table, assuming HASH is its hash code
1527 and CLASSP is an element of the class it should go in
1528 (or 0 if a new class should be made).
1529 It is inserted at the proper position to keep the class in
1530 the order cheapest first.
1532 MODE is the machine-mode of X, or if X is an integer constant
1533 with VOIDmode then MODE is the mode with which X will be used.
1535 For elements of equal cheapness, the most recent one
1536 goes in front, except that the first element in the list
1537 remains first unless a cheaper element is added. The order of
1538 pseudo-registers does not matter, as canon_reg will be called to
1539 find the cheapest when a register is retrieved from the table.
1541 The in_memory field in the hash table element is set to 0.
1542 The caller must set it nonzero if appropriate.
1544 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1545 and if insert_regs returns a nonzero value
1546 you must then recompute its hash code before calling here.
1548 If necessary, update table showing constant values of quantities. */
1550 #define CHEAPER(X, Y) \
1551 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1553 static struct table_elt *
1554 insert (x, classp, hash, mode)
1556 register struct table_elt *classp;
1558 enum machine_mode mode;
1560 register struct table_elt *elt;
1562 /* If X is a register and we haven't made a quantity for it,
1563 something is wrong. */
1564 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1567 /* If X is a hard register, show it is being put in the table. */
1568 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1570 unsigned int regno = REGNO (x);
1571 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1574 for (i = regno; i < endregno; i++)
1575 SET_HARD_REG_BIT (hard_regs_in_table, i);
1578 /* If X is a label, show we recorded it. */
1579 if (GET_CODE (x) == LABEL_REF
1580 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1581 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1582 recorded_label_ref = 1;
1584 /* Put an element for X into the right hash bucket. */
1586 elt = free_element_chain;
1588 free_element_chain = elt->next_same_hash;
1592 elt = (struct table_elt *) oballoc (sizeof (struct table_elt));
1596 elt->canon_exp = NULL_RTX;
1597 elt->cost = COST (x);
1598 elt->regcost = approx_reg_cost (x);
1599 elt->next_same_value = 0;
1600 elt->prev_same_value = 0;
1601 elt->next_same_hash = table[hash];
1602 elt->prev_same_hash = 0;
1603 elt->related_value = 0;
1606 elt->is_const = (CONSTANT_P (x)
1607 /* GNU C++ takes advantage of this for `this'
1608 (and other const values). */
1609 || (RTX_UNCHANGING_P (x)
1610 && GET_CODE (x) == REG
1611 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1612 || FIXED_BASE_PLUS_P (x));
1615 table[hash]->prev_same_hash = elt;
1618 /* Put it into the proper value-class. */
1621 classp = classp->first_same_value;
1622 if (CHEAPER (elt, classp))
1623 /* Insert at the head of the class */
1625 register struct table_elt *p;
1626 elt->next_same_value = classp;
1627 classp->prev_same_value = elt;
1628 elt->first_same_value = elt;
1630 for (p = classp; p; p = p->next_same_value)
1631 p->first_same_value = elt;
1635 /* Insert not at head of the class. */
1636 /* Put it after the last element cheaper than X. */
1637 register struct table_elt *p, *next;
1639 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1642 /* Put it after P and before NEXT. */
1643 elt->next_same_value = next;
1645 next->prev_same_value = elt;
1647 elt->prev_same_value = p;
1648 p->next_same_value = elt;
1649 elt->first_same_value = classp;
1653 elt->first_same_value = elt;
1655 /* If this is a constant being set equivalent to a register or a register
1656 being set equivalent to a constant, note the constant equivalence.
1658 If this is a constant, it cannot be equivalent to a different constant,
1659 and a constant is the only thing that can be cheaper than a register. So
1660 we know the register is the head of the class (before the constant was
1663 If this is a register that is not already known equivalent to a
1664 constant, we must check the entire class.
1666 If this is a register that is already known equivalent to an insn,
1667 update the qtys `const_insn' to show that `this_insn' is the latest
1668 insn making that quantity equivalent to the constant. */
1670 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1671 && GET_CODE (x) != REG)
1673 int exp_q = REG_QTY (REGNO (classp->exp));
1674 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1676 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1677 exp_ent->const_insn = this_insn;
1680 else if (GET_CODE (x) == REG
1682 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1685 register struct table_elt *p;
1687 for (p = classp; p != 0; p = p->next_same_value)
1689 if (p->is_const && GET_CODE (p->exp) != REG)
1691 int x_q = REG_QTY (REGNO (x));
1692 struct qty_table_elem *x_ent = &qty_table[x_q];
1695 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1696 x_ent->const_insn = this_insn;
1702 else if (GET_CODE (x) == REG
1703 && qty_table[REG_QTY (REGNO (x))].const_rtx
1704 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1705 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1707 /* If this is a constant with symbolic value,
1708 and it has a term with an explicit integer value,
1709 link it up with related expressions. */
1710 if (GET_CODE (x) == CONST)
1712 rtx subexp = get_related_value (x);
1714 struct table_elt *subelt, *subelt_prev;
1718 /* Get the integer-free subexpression in the hash table. */
1719 subhash = safe_hash (subexp, mode) & HASH_MASK;
1720 subelt = lookup (subexp, subhash, mode);
1722 subelt = insert (subexp, NULL_PTR, subhash, mode);
1723 /* Initialize SUBELT's circular chain if it has none. */
1724 if (subelt->related_value == 0)
1725 subelt->related_value = subelt;
1726 /* Find the element in the circular chain that precedes SUBELT. */
1727 subelt_prev = subelt;
1728 while (subelt_prev->related_value != subelt)
1729 subelt_prev = subelt_prev->related_value;
1730 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1731 This way the element that follows SUBELT is the oldest one. */
1732 elt->related_value = subelt_prev->related_value;
1733 subelt_prev->related_value = elt;
1740 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1741 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1742 the two classes equivalent.
1744 CLASS1 will be the surviving class; CLASS2 should not be used after this
1747 Any invalid entries in CLASS2 will not be copied. */
1750 merge_equiv_classes (class1, class2)
1751 struct table_elt *class1, *class2;
1753 struct table_elt *elt, *next, *new;
1755 /* Ensure we start with the head of the classes. */
1756 class1 = class1->first_same_value;
1757 class2 = class2->first_same_value;
1759 /* If they were already equal, forget it. */
1760 if (class1 == class2)
1763 for (elt = class2; elt; elt = next)
1767 enum machine_mode mode = elt->mode;
1769 next = elt->next_same_value;
1771 /* Remove old entry, make a new one in CLASS1's class.
1772 Don't do this for invalid entries as we cannot find their
1773 hash code (it also isn't necessary). */
1774 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1776 hash_arg_in_memory = 0;
1777 hash = HASH (exp, mode);
1779 if (GET_CODE (exp) == REG)
1780 delete_reg_equiv (REGNO (exp));
1782 remove_from_table (elt, hash);
1784 if (insert_regs (exp, class1, 0))
1786 rehash_using_reg (exp);
1787 hash = HASH (exp, mode);
1789 new = insert (exp, class1, hash, mode);
1790 new->in_memory = hash_arg_in_memory;
1795 /* Flush the entire hash table. */
1801 struct table_elt *p;
1803 for (i = 0; i < HASH_SIZE; i++)
1804 for (p = table[i]; p; p = table[i])
1806 /* Note that invalidate can remove elements
1807 after P in the current hash chain. */
1808 if (GET_CODE (p->exp) == REG)
1809 invalidate (p->exp, p->mode);
1811 remove_from_table (p, i);
1815 /* Function called for each rtx to check whether true dependence exist. */
1816 struct check_dependence_data
1818 enum machine_mode mode;
1822 check_dependence (x, data)
1826 struct check_dependence_data *d = (struct check_dependence_data *) data;
1827 if (*x && GET_CODE (*x) == MEM)
1828 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1833 /* Remove from the hash table, or mark as invalid, all expressions whose
1834 values could be altered by storing in X. X is a register, a subreg, or
1835 a memory reference with nonvarying address (because, when a memory
1836 reference with a varying address is stored in, all memory references are
1837 removed by invalidate_memory so specific invalidation is superfluous).
1838 FULL_MODE, if not VOIDmode, indicates that this much should be
1839 invalidated instead of just the amount indicated by the mode of X. This
1840 is only used for bitfield stores into memory.
1842 A nonvarying address may be just a register or just a symbol reference,
1843 or it may be either of those plus a numeric offset. */
1846 invalidate (x, full_mode)
1848 enum machine_mode full_mode;
1851 register struct table_elt *p;
1853 switch (GET_CODE (x))
1857 /* If X is a register, dependencies on its contents are recorded
1858 through the qty number mechanism. Just change the qty number of
1859 the register, mark it as invalid for expressions that refer to it,
1860 and remove it itself. */
1861 unsigned int regno = REGNO (x);
1862 unsigned int hash = HASH (x, GET_MODE (x));
1864 /* Remove REGNO from any quantity list it might be on and indicate
1865 that its value might have changed. If it is a pseudo, remove its
1866 entry from the hash table.
1868 For a hard register, we do the first two actions above for any
1869 additional hard registers corresponding to X. Then, if any of these
1870 registers are in the table, we must remove any REG entries that
1871 overlap these registers. */
1873 delete_reg_equiv (regno);
1876 if (regno >= FIRST_PSEUDO_REGISTER)
1878 /* Because a register can be referenced in more than one mode,
1879 we might have to remove more than one table entry. */
1880 struct table_elt *elt;
1882 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1883 remove_from_table (elt, hash);
1887 HOST_WIDE_INT in_table
1888 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1889 unsigned int endregno
1890 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1891 unsigned int tregno, tendregno, rn;
1892 register struct table_elt *p, *next;
1894 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1896 for (rn = regno + 1; rn < endregno; rn++)
1898 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1899 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1900 delete_reg_equiv (rn);
1905 for (hash = 0; hash < HASH_SIZE; hash++)
1906 for (p = table[hash]; p; p = next)
1908 next = p->next_same_hash;
1910 if (GET_CODE (p->exp) != REG
1911 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1914 tregno = REGNO (p->exp);
1916 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1917 if (tendregno > regno && tregno < endregno)
1918 remove_from_table (p, hash);
1925 invalidate (SUBREG_REG (x), VOIDmode);
1929 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1930 invalidate (XVECEXP (x, 0, i), VOIDmode);
1934 /* This is part of a disjoint return value; extract the location in
1935 question ignoring the offset. */
1936 invalidate (XEXP (x, 0), VOIDmode);
1940 /* Calculate the canonical version of X here so that
1941 true_dependence doesn't generate new RTL for X on each call. */
1944 /* Remove all hash table elements that refer to overlapping pieces of
1946 if (full_mode == VOIDmode)
1947 full_mode = GET_MODE (x);
1949 for (i = 0; i < HASH_SIZE; i++)
1951 register struct table_elt *next;
1953 for (p = table[i]; p; p = next)
1955 next = p->next_same_hash;
1958 struct check_dependence_data d;
1960 /* Just canonicalize the expression once;
1961 otherwise each time we call invalidate
1962 true_dependence will canonicalize the
1963 expression again. */
1965 p->canon_exp = canon_rtx (p->exp);
1968 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1969 remove_from_table (p, i);
1980 /* Remove all expressions that refer to register REGNO,
1981 since they are already invalid, and we are about to
1982 mark that register valid again and don't want the old
1983 expressions to reappear as valid. */
1986 remove_invalid_refs (regno)
1990 struct table_elt *p, *next;
1992 for (i = 0; i < HASH_SIZE; i++)
1993 for (p = table[i]; p; p = next)
1995 next = p->next_same_hash;
1996 if (GET_CODE (p->exp) != REG
1997 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1998 remove_from_table (p, i);
2002 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
2004 remove_invalid_subreg_refs (regno, word, mode)
2007 enum machine_mode mode;
2010 struct table_elt *p, *next;
2011 unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
2013 for (i = 0; i < HASH_SIZE; i++)
2014 for (p = table[i]; p; p = next)
2017 next = p->next_same_hash;
2020 if (GET_CODE (p->exp) != REG
2021 && (GET_CODE (exp) != SUBREG
2022 || GET_CODE (SUBREG_REG (exp)) != REG
2023 || REGNO (SUBREG_REG (exp)) != regno
2024 || (((SUBREG_WORD (exp)
2025 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
2027 && SUBREG_WORD (exp) <= end))
2028 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
2029 remove_from_table (p, i);
2033 /* Recompute the hash codes of any valid entries in the hash table that
2034 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2036 This is called when we make a jump equivalence. */
2039 rehash_using_reg (x)
2043 struct table_elt *p, *next;
2046 if (GET_CODE (x) == SUBREG)
2049 /* If X is not a register or if the register is known not to be in any
2050 valid entries in the table, we have no work to do. */
2052 if (GET_CODE (x) != REG
2053 || REG_IN_TABLE (REGNO (x)) < 0
2054 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2057 /* Scan all hash chains looking for valid entries that mention X.
2058 If we find one and it is in the wrong hash chain, move it. We can skip
2059 objects that are registers, since they are handled specially. */
2061 for (i = 0; i < HASH_SIZE; i++)
2062 for (p = table[i]; p; p = next)
2064 next = p->next_same_hash;
2065 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2066 && exp_equiv_p (p->exp, p->exp, 1, 0)
2067 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2069 if (p->next_same_hash)
2070 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2072 if (p->prev_same_hash)
2073 p->prev_same_hash->next_same_hash = p->next_same_hash;
2075 table[i] = p->next_same_hash;
2077 p->next_same_hash = table[hash];
2078 p->prev_same_hash = 0;
2080 table[hash]->prev_same_hash = p;
2086 /* Remove from the hash table any expression that is a call-clobbered
2087 register. Also update their TICK values. */
2090 invalidate_for_call ()
2092 unsigned int regno, endregno;
2095 struct table_elt *p, *next;
2098 /* Go through all the hard registers. For each that is clobbered in
2099 a CALL_INSN, remove the register from quantity chains and update
2100 reg_tick if defined. Also see if any of these registers is currently
2103 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2104 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2106 delete_reg_equiv (regno);
2107 if (REG_TICK (regno) >= 0)
2110 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2113 /* In the case where we have no call-clobbered hard registers in the
2114 table, we are done. Otherwise, scan the table and remove any
2115 entry that overlaps a call-clobbered register. */
2118 for (hash = 0; hash < HASH_SIZE; hash++)
2119 for (p = table[hash]; p; p = next)
2121 next = p->next_same_hash;
2123 if (GET_CODE (p->exp) != REG
2124 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2127 regno = REGNO (p->exp);
2128 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2130 for (i = regno; i < endregno; i++)
2131 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2133 remove_from_table (p, hash);
2139 /* Given an expression X of type CONST,
2140 and ELT which is its table entry (or 0 if it
2141 is not in the hash table),
2142 return an alternate expression for X as a register plus integer.
2143 If none can be found, return 0. */
2146 use_related_value (x, elt)
2148 struct table_elt *elt;
2150 register struct table_elt *relt = 0;
2151 register struct table_elt *p, *q;
2152 HOST_WIDE_INT offset;
2154 /* First, is there anything related known?
2155 If we have a table element, we can tell from that.
2156 Otherwise, must look it up. */
2158 if (elt != 0 && elt->related_value != 0)
2160 else if (elt == 0 && GET_CODE (x) == CONST)
2162 rtx subexp = get_related_value (x);
2164 relt = lookup (subexp,
2165 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2172 /* Search all related table entries for one that has an
2173 equivalent register. */
2178 /* This loop is strange in that it is executed in two different cases.
2179 The first is when X is already in the table. Then it is searching
2180 the RELATED_VALUE list of X's class (RELT). The second case is when
2181 X is not in the table. Then RELT points to a class for the related
2184 Ensure that, whatever case we are in, that we ignore classes that have
2185 the same value as X. */
2187 if (rtx_equal_p (x, p->exp))
2190 for (q = p->first_same_value; q; q = q->next_same_value)
2191 if (GET_CODE (q->exp) == REG)
2197 p = p->related_value;
2199 /* We went all the way around, so there is nothing to be found.
2200 Alternatively, perhaps RELT was in the table for some other reason
2201 and it has no related values recorded. */
2202 if (p == relt || p == 0)
2209 offset = (get_integer_term (x) - get_integer_term (p->exp));
2210 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2211 return plus_constant (q->exp, offset);
2214 /* Hash a string. Just add its bytes up. */
2215 static inline unsigned
2216 canon_hash_string (ps)
2220 const unsigned char *p = (const unsigned char *)ps;
2229 /* Hash an rtx. We are careful to make sure the value is never negative.
2230 Equivalent registers hash identically.
2231 MODE is used in hashing for CONST_INTs only;
2232 otherwise the mode of X is used.
2234 Store 1 in do_not_record if any subexpression is volatile.
2236 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2237 which does not have the RTX_UNCHANGING_P bit set.
2239 Note that cse_insn knows that the hash code of a MEM expression
2240 is just (int) MEM plus the hash code of the address. */
2243 canon_hash (x, mode)
2245 enum machine_mode mode;
2248 register unsigned hash = 0;
2249 register enum rtx_code code;
2250 register const char *fmt;
2252 /* repeat is used to turn tail-recursion into iteration. */
2257 code = GET_CODE (x);
2262 unsigned int regno = REGNO (x);
2264 /* On some machines, we can't record any non-fixed hard register,
2265 because extending its life will cause reload problems. We
2266 consider ap, fp, and sp to be fixed for this purpose.
2268 We also consider CCmode registers to be fixed for this purpose;
2269 failure to do so leads to failure to simplify 0<100 type of
2272 On all machines, we can't record any global registers. */
2274 if (regno < FIRST_PSEUDO_REGISTER
2275 && (global_regs[regno]
2276 || (SMALL_REGISTER_CLASSES
2277 && ! fixed_regs[regno]
2278 && regno != FRAME_POINTER_REGNUM
2279 && regno != HARD_FRAME_POINTER_REGNUM
2280 && regno != ARG_POINTER_REGNUM
2281 && regno != STACK_POINTER_REGNUM
2282 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2288 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2292 /* We handle SUBREG of a REG specially because the underlying
2293 reg changes its hash value with every value change; we don't
2294 want to have to forget unrelated subregs when one subreg changes. */
2297 if (GET_CODE (SUBREG_REG (x)) == REG)
2299 hash += (((unsigned) SUBREG << 7)
2300 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2308 unsigned HOST_WIDE_INT tem = INTVAL (x);
2309 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2314 /* This is like the general case, except that it only counts
2315 the integers representing the constant. */
2316 hash += (unsigned) code + (unsigned) GET_MODE (x);
2317 if (GET_MODE (x) != VOIDmode)
2318 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2320 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2324 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2325 + (unsigned) CONST_DOUBLE_HIGH (x));
2328 /* Assume there is only one rtx object for any given label. */
2330 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2334 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2338 /* We don't record if marked volatile or if BLKmode since we don't
2339 know the size of the move. */
2340 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2345 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2347 hash_arg_in_memory = 1;
2349 /* Now that we have already found this special case,
2350 might as well speed it up as much as possible. */
2351 hash += (unsigned) MEM;
2356 /* A USE that mentions non-volatile memory needs special
2357 handling since the MEM may be BLKmode which normally
2358 prevents an entry from being made. Pure calls are
2359 marked by a USE which mentions BLKmode memory. */
2360 if (GET_CODE (XEXP (x, 0)) == MEM
2361 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2363 hash += (unsigned)USE;
2366 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2367 hash_arg_in_memory = 1;
2369 /* Now that we have already found this special case,
2370 might as well speed it up as much as possible. */
2371 hash += (unsigned) MEM;
2386 case UNSPEC_VOLATILE:
2391 if (MEM_VOLATILE_P (x))
2398 /* We don't want to take the filename and line into account. */
2399 hash += (unsigned) code + (unsigned) GET_MODE (x)
2400 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2401 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2402 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2404 if (ASM_OPERANDS_INPUT_LENGTH (x))
2406 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2408 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2409 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2410 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2414 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2415 x = ASM_OPERANDS_INPUT (x, 0);
2416 mode = GET_MODE (x);
2428 i = GET_RTX_LENGTH (code) - 1;
2429 hash += (unsigned) code + (unsigned) GET_MODE (x);
2430 fmt = GET_RTX_FORMAT (code);
2435 rtx tem = XEXP (x, i);
2437 /* If we are about to do the last recursive call
2438 needed at this level, change it into iteration.
2439 This function is called enough to be worth it. */
2445 hash += canon_hash (tem, 0);
2447 else if (fmt[i] == 'E')
2448 for (j = 0; j < XVECLEN (x, i); j++)
2449 hash += canon_hash (XVECEXP (x, i, j), 0);
2450 else if (fmt[i] == 's')
2451 hash += canon_hash_string (XSTR (x, i));
2452 else if (fmt[i] == 'i')
2454 register unsigned tem = XINT (x, i);
2457 else if (fmt[i] == '0' || fmt[i] == 't')
2466 /* Like canon_hash but with no side effects. */
2471 enum machine_mode mode;
2473 int save_do_not_record = do_not_record;
2474 int save_hash_arg_in_memory = hash_arg_in_memory;
2475 unsigned hash = canon_hash (x, mode);
2476 hash_arg_in_memory = save_hash_arg_in_memory;
2477 do_not_record = save_do_not_record;
2481 /* Return 1 iff X and Y would canonicalize into the same thing,
2482 without actually constructing the canonicalization of either one.
2483 If VALIDATE is nonzero,
2484 we assume X is an expression being processed from the rtl
2485 and Y was found in the hash table. We check register refs
2486 in Y for being marked as valid.
2488 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2489 that is known to be in the register. Ordinarily, we don't allow them
2490 to match, because letting them match would cause unpredictable results
2491 in all the places that search a hash table chain for an equivalent
2492 for a given value. A possible equivalent that has different structure
2493 has its hash code computed from different data. Whether the hash code
2494 is the same as that of the given value is pure luck. */
2497 exp_equiv_p (x, y, validate, equal_values)
2503 register enum rtx_code code;
2504 register const char *fmt;
2506 /* Note: it is incorrect to assume an expression is equivalent to itself
2507 if VALIDATE is nonzero. */
2508 if (x == y && !validate)
2510 if (x == 0 || y == 0)
2513 code = GET_CODE (x);
2514 if (code != GET_CODE (y))
2519 /* If X is a constant and Y is a register or vice versa, they may be
2520 equivalent. We only have to validate if Y is a register. */
2521 if (CONSTANT_P (x) && GET_CODE (y) == REG
2522 && REGNO_QTY_VALID_P (REGNO (y)))
2524 int y_q = REG_QTY (REGNO (y));
2525 struct qty_table_elem *y_ent = &qty_table[y_q];
2527 if (GET_MODE (y) == y_ent->mode
2528 && rtx_equal_p (x, y_ent->const_rtx)
2529 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2533 if (CONSTANT_P (y) && code == REG
2534 && REGNO_QTY_VALID_P (REGNO (x)))
2536 int x_q = REG_QTY (REGNO (x));
2537 struct qty_table_elem *x_ent = &qty_table[x_q];
2539 if (GET_MODE (x) == x_ent->mode
2540 && rtx_equal_p (y, x_ent->const_rtx))
2547 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2548 if (GET_MODE (x) != GET_MODE (y))
2559 return XEXP (x, 0) == XEXP (y, 0);
2562 return XSTR (x, 0) == XSTR (y, 0);
2566 unsigned int regno = REGNO (y);
2567 unsigned int endregno
2568 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2569 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2572 /* If the quantities are not the same, the expressions are not
2573 equivalent. If there are and we are not to validate, they
2574 are equivalent. Otherwise, ensure all regs are up-to-date. */
2576 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2582 for (i = regno; i < endregno; i++)
2583 if (REG_IN_TABLE (i) != REG_TICK (i))
2589 /* For commutative operations, check both orders. */
2597 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2598 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2599 validate, equal_values))
2600 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2601 validate, equal_values)
2602 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2603 validate, equal_values)));
2606 /* We don't use the generic code below because we want to
2607 disregard filename and line numbers. */
2609 /* A volatile asm isn't equivalent to any other. */
2610 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2613 if (GET_MODE (x) != GET_MODE (y)
2614 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2615 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2616 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2617 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2618 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2621 if (ASM_OPERANDS_INPUT_LENGTH (x))
2623 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2624 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2625 ASM_OPERANDS_INPUT (y, i),
2626 validate, equal_values)
2627 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2628 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2638 /* Compare the elements. If any pair of corresponding elements
2639 fail to match, return 0 for the whole things. */
2641 fmt = GET_RTX_FORMAT (code);
2642 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2647 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2652 if (XVECLEN (x, i) != XVECLEN (y, i))
2654 for (j = 0; j < XVECLEN (x, i); j++)
2655 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2656 validate, equal_values))
2661 if (strcmp (XSTR (x, i), XSTR (y, i)))
2666 if (XINT (x, i) != XINT (y, i))
2671 if (XWINT (x, i) != XWINT (y, i))
2687 /* Return 1 if X has a value that can vary even between two
2688 executions of the program. 0 means X can be compared reliably
2689 against certain constants or near-constants. */
2692 cse_rtx_varies_p (x)
2695 /* We need not check for X and the equivalence class being of the same
2696 mode because if X is equivalent to a constant in some mode, it
2697 doesn't vary in any mode. */
2699 if (GET_CODE (x) == REG
2700 && REGNO_QTY_VALID_P (REGNO (x)))
2702 int x_q = REG_QTY (REGNO (x));
2703 struct qty_table_elem *x_ent = &qty_table[x_q];
2705 if (GET_MODE (x) == x_ent->mode
2706 && x_ent->const_rtx != NULL_RTX)
2710 if (GET_CODE (x) == PLUS
2711 && GET_CODE (XEXP (x, 1)) == CONST_INT
2712 && GET_CODE (XEXP (x, 0)) == REG
2713 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2715 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2716 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2718 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2719 && x0_ent->const_rtx != NULL_RTX)
2723 /* This can happen as the result of virtual register instantiation, if
2724 the initial constant is too large to be a valid address. This gives
2725 us a three instruction sequence, load large offset into a register,
2726 load fp minus a constant into a register, then a MEM which is the
2727 sum of the two `constant' registers. */
2728 if (GET_CODE (x) == PLUS
2729 && GET_CODE (XEXP (x, 0)) == REG
2730 && GET_CODE (XEXP (x, 1)) == REG
2731 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2732 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2734 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2735 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2736 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2737 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2739 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2740 && x0_ent->const_rtx != NULL_RTX
2741 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2742 && x1_ent->const_rtx != NULL_RTX)
2746 return rtx_varies_p (x);
2749 /* Canonicalize an expression:
2750 replace each register reference inside it
2751 with the "oldest" equivalent register.
2753 If INSN is non-zero and we are replacing a pseudo with a hard register
2754 or vice versa, validate_change is used to ensure that INSN remains valid
2755 after we make our substitution. The calls are made with IN_GROUP non-zero
2756 so apply_change_group must be called upon the outermost return from this
2757 function (unless INSN is zero). The result of apply_change_group can
2758 generally be discarded since the changes we are making are optional. */
2766 register enum rtx_code code;
2767 register const char *fmt;
2772 code = GET_CODE (x);
2790 register struct qty_table_elem *ent;
2792 /* Never replace a hard reg, because hard regs can appear
2793 in more than one machine mode, and we must preserve the mode
2794 of each occurrence. Also, some hard regs appear in
2795 MEMs that are shared and mustn't be altered. Don't try to
2796 replace any reg that maps to a reg of class NO_REGS. */
2797 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2798 || ! REGNO_QTY_VALID_P (REGNO (x)))
2801 q = REG_QTY (REGNO (x));
2802 ent = &qty_table[q];
2803 first = ent->first_reg;
2804 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2805 : REGNO_REG_CLASS (first) == NO_REGS ? x
2806 : gen_rtx_REG (ent->mode, first));
2813 fmt = GET_RTX_FORMAT (code);
2814 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2820 rtx new = canon_reg (XEXP (x, i), insn);
2823 /* If replacing pseudo with hard reg or vice versa, ensure the
2824 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2825 if (insn != 0 && new != 0
2826 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2827 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2828 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2829 || (insn_code = recog_memoized (insn)) < 0
2830 || insn_data[insn_code].n_dups > 0))
2831 validate_change (insn, &XEXP (x, i), new, 1);
2835 else if (fmt[i] == 'E')
2836 for (j = 0; j < XVECLEN (x, i); j++)
2837 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2843 /* LOC is a location within INSN that is an operand address (the contents of
2844 a MEM). Find the best equivalent address to use that is valid for this
2847 On most CISC machines, complicated address modes are costly, and rtx_cost
2848 is a good approximation for that cost. However, most RISC machines have
2849 only a few (usually only one) memory reference formats. If an address is
2850 valid at all, it is often just as cheap as any other address. Hence, for
2851 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2852 costs of various addresses. For two addresses of equal cost, choose the one
2853 with the highest `rtx_cost' value as that has the potential of eliminating
2854 the most insns. For equal costs, we choose the first in the equivalence
2855 class. Note that we ignore the fact that pseudo registers are cheaper
2856 than hard registers here because we would also prefer the pseudo registers.
2860 find_best_addr (insn, loc, mode)
2863 enum machine_mode mode;
2865 struct table_elt *elt;
2868 struct table_elt *p;
2869 int found_better = 1;
2871 int save_do_not_record = do_not_record;
2872 int save_hash_arg_in_memory = hash_arg_in_memory;
2877 /* Do not try to replace constant addresses or addresses of local and
2878 argument slots. These MEM expressions are made only once and inserted
2879 in many instructions, as well as being used to control symbol table
2880 output. It is not safe to clobber them.
2882 There are some uncommon cases where the address is already in a register
2883 for some reason, but we cannot take advantage of that because we have
2884 no easy way to unshare the MEM. In addition, looking up all stack
2885 addresses is costly. */
2886 if ((GET_CODE (addr) == PLUS
2887 && GET_CODE (XEXP (addr, 0)) == REG
2888 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2889 && (regno = REGNO (XEXP (addr, 0)),
2890 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2891 || regno == ARG_POINTER_REGNUM))
2892 || (GET_CODE (addr) == REG
2893 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2894 || regno == HARD_FRAME_POINTER_REGNUM
2895 || regno == ARG_POINTER_REGNUM))
2896 || GET_CODE (addr) == ADDRESSOF
2897 || CONSTANT_ADDRESS_P (addr))
2900 /* If this address is not simply a register, try to fold it. This will
2901 sometimes simplify the expression. Many simplifications
2902 will not be valid, but some, usually applying the associative rule, will
2903 be valid and produce better code. */
2904 if (GET_CODE (addr) != REG)
2906 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2907 int addr_folded_cost = address_cost (folded, mode);
2908 int addr_cost = address_cost (addr, mode);
2910 if ((addr_folded_cost < addr_cost
2911 || (addr_folded_cost == addr_cost
2912 /* ??? The rtx_cost comparison is left over from an older
2913 version of this code. It is probably no longer helpful. */
2914 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2915 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2916 && validate_change (insn, loc, folded, 0))
2920 /* If this address is not in the hash table, we can't look for equivalences
2921 of the whole address. Also, ignore if volatile. */
2924 hash = HASH (addr, Pmode);
2925 addr_volatile = do_not_record;
2926 do_not_record = save_do_not_record;
2927 hash_arg_in_memory = save_hash_arg_in_memory;
2932 elt = lookup (addr, hash, Pmode);
2934 #ifndef ADDRESS_COST
2937 int our_cost = elt->cost;
2939 /* Find the lowest cost below ours that works. */
2940 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2941 if (elt->cost < our_cost
2942 && (GET_CODE (elt->exp) == REG
2943 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2944 && validate_change (insn, loc,
2945 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2952 /* We need to find the best (under the criteria documented above) entry
2953 in the class that is valid. We use the `flag' field to indicate
2954 choices that were invalid and iterate until we can't find a better
2955 one that hasn't already been tried. */
2957 for (p = elt->first_same_value; p; p = p->next_same_value)
2960 while (found_better)
2962 int best_addr_cost = address_cost (*loc, mode);
2963 int best_rtx_cost = (elt->cost + 1) >> 1;
2965 struct table_elt *best_elt = elt;
2968 for (p = elt->first_same_value; p; p = p->next_same_value)
2971 if ((GET_CODE (p->exp) == REG
2972 || exp_equiv_p (p->exp, p->exp, 1, 0))
2973 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2974 || (exp_cost == best_addr_cost
2975 && (p->cost + 1) >> 1 < best_rtx_cost)))
2978 best_addr_cost = exp_cost;
2979 best_rtx_cost = (p->cost + 1) >> 1;
2986 if (validate_change (insn, loc,
2987 canon_reg (copy_rtx (best_elt->exp),
2996 /* If the address is a binary operation with the first operand a register
2997 and the second a constant, do the same as above, but looking for
2998 equivalences of the register. Then try to simplify before checking for
2999 the best address to use. This catches a few cases: First is when we
3000 have REG+const and the register is another REG+const. We can often merge
3001 the constants and eliminate one insn and one register. It may also be
3002 that a machine has a cheap REG+REG+const. Finally, this improves the
3003 code on the Alpha for unaligned byte stores. */
3005 if (flag_expensive_optimizations
3006 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3007 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3008 && GET_CODE (XEXP (*loc, 0)) == REG
3009 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3011 rtx c = XEXP (*loc, 1);
3014 hash = HASH (XEXP (*loc, 0), Pmode);
3015 do_not_record = save_do_not_record;
3016 hash_arg_in_memory = save_hash_arg_in_memory;
3018 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3022 /* We need to find the best (under the criteria documented above) entry
3023 in the class that is valid. We use the `flag' field to indicate
3024 choices that were invalid and iterate until we can't find a better
3025 one that hasn't already been tried. */
3027 for (p = elt->first_same_value; p; p = p->next_same_value)
3030 while (found_better)
3032 int best_addr_cost = address_cost (*loc, mode);
3033 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3034 struct table_elt *best_elt = elt;
3035 rtx best_rtx = *loc;
3038 /* This is at worst case an O(n^2) algorithm, so limit our search
3039 to the first 32 elements on the list. This avoids trouble
3040 compiling code with very long basic blocks that can easily
3041 call simplify_gen_binary so many times that we run out of
3045 for (p = elt->first_same_value, count = 0;
3047 p = p->next_same_value, count++)
3049 && (GET_CODE (p->exp) == REG
3050 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3052 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3055 new_cost = address_cost (new, mode);
3057 if (new_cost < best_addr_cost
3058 || (new_cost == best_addr_cost
3059 && (COST (new) + 1) >> 1 > best_rtx_cost))
3062 best_addr_cost = new_cost;
3063 best_rtx_cost = (COST (new) + 1) >> 1;
3071 if (validate_change (insn, loc,
3072 canon_reg (copy_rtx (best_rtx),
3083 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3084 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3085 what values are being compared.
3087 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3088 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3089 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3090 compared to produce cc0.
3092 The return value is the comparison operator and is either the code of
3093 A or the code corresponding to the inverse of the comparison. */
3095 static enum rtx_code
3096 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3099 enum machine_mode *pmode1, *pmode2;
3103 arg1 = *parg1, arg2 = *parg2;
3105 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3107 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3109 /* Set non-zero when we find something of interest. */
3111 int reverse_code = 0;
3112 struct table_elt *p = 0;
3114 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3115 On machines with CC0, this is the only case that can occur, since
3116 fold_rtx will return the COMPARE or item being compared with zero
3119 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3122 /* If ARG1 is a comparison operator and CODE is testing for
3123 STORE_FLAG_VALUE, get the inner arguments. */
3125 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3128 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3129 && code == LT && STORE_FLAG_VALUE == -1)
3130 #ifdef FLOAT_STORE_FLAG_VALUE
3131 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3132 && (REAL_VALUE_NEGATIVE
3133 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3138 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3139 && code == GE && STORE_FLAG_VALUE == -1)
3140 #ifdef FLOAT_STORE_FLAG_VALUE
3141 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3142 && (REAL_VALUE_NEGATIVE
3143 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3146 x = arg1, reverse_code = 1;
3149 /* ??? We could also check for
3151 (ne (and (eq (...) (const_int 1))) (const_int 0))
3153 and related forms, but let's wait until we see them occurring. */
3156 /* Look up ARG1 in the hash table and see if it has an equivalence
3157 that lets us see what is being compared. */
3158 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3161 p = p->first_same_value;
3163 for (; p; p = p->next_same_value)
3165 enum machine_mode inner_mode = GET_MODE (p->exp);
3167 /* If the entry isn't valid, skip it. */
3168 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3171 if (GET_CODE (p->exp) == COMPARE
3172 /* Another possibility is that this machine has a compare insn
3173 that includes the comparison code. In that case, ARG1 would
3174 be equivalent to a comparison operation that would set ARG1 to
3175 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3176 ORIG_CODE is the actual comparison being done; if it is an EQ,
3177 we must reverse ORIG_CODE. On machine with a negative value
3178 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3181 && GET_MODE_CLASS (inner_mode) == MODE_INT
3182 && (GET_MODE_BITSIZE (inner_mode)
3183 <= HOST_BITS_PER_WIDE_INT)
3184 && (STORE_FLAG_VALUE
3185 & ((HOST_WIDE_INT) 1
3186 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3187 #ifdef FLOAT_STORE_FLAG_VALUE
3189 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3190 && (REAL_VALUE_NEGATIVE
3191 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3194 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3199 else if ((code == EQ
3201 && GET_MODE_CLASS (inner_mode) == MODE_INT
3202 && (GET_MODE_BITSIZE (inner_mode)
3203 <= HOST_BITS_PER_WIDE_INT)
3204 && (STORE_FLAG_VALUE
3205 & ((HOST_WIDE_INT) 1
3206 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3207 #ifdef FLOAT_STORE_FLAG_VALUE
3209 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3210 && (REAL_VALUE_NEGATIVE
3211 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3214 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3221 /* If this is fp + constant, the equivalent is a better operand since
3222 it may let us predict the value of the comparison. */
3223 else if (NONZERO_BASE_PLUS_P (p->exp))
3230 /* If we didn't find a useful equivalence for ARG1, we are done.
3231 Otherwise, set up for the next iteration. */
3235 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3236 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3237 code = GET_CODE (x);
3240 code = reverse_condition (code);
3243 /* Return our results. Return the modes from before fold_rtx
3244 because fold_rtx might produce const_int, and then it's too late. */
3245 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3246 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3251 /* If X is a nontrivial arithmetic operation on an argument
3252 for which a constant value can be determined, return
3253 the result of operating on that value, as a constant.
3254 Otherwise, return X, possibly with one or more operands
3255 modified by recursive calls to this function.
3257 If X is a register whose contents are known, we do NOT
3258 return those contents here. equiv_constant is called to
3261 INSN is the insn that we may be modifying. If it is 0, make a copy
3262 of X before modifying it. */
3269 register enum rtx_code code;
3270 register enum machine_mode mode;
3271 register const char *fmt;
3277 /* Folded equivalents of first two operands of X. */
3281 /* Constant equivalents of first three operands of X;
3282 0 when no such equivalent is known. */
3287 /* The mode of the first operand of X. We need this for sign and zero
3289 enum machine_mode mode_arg0;
3294 mode = GET_MODE (x);
3295 code = GET_CODE (x);
3304 /* No use simplifying an EXPR_LIST
3305 since they are used only for lists of args
3306 in a function call's REG_EQUAL note. */
3308 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3309 want to (e.g.,) make (addressof (const_int 0)) just because
3310 the location is known to be zero. */
3316 return prev_insn_cc0;
3320 /* If the next insn is a CODE_LABEL followed by a jump table,
3321 PC's value is a LABEL_REF pointing to that label. That
3322 lets us fold switch statements on the Vax. */
3323 if (insn && GET_CODE (insn) == JUMP_INSN)
3325 rtx next = next_nonnote_insn (insn);
3327 if (next && GET_CODE (next) == CODE_LABEL
3328 && NEXT_INSN (next) != 0
3329 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3330 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3331 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3332 return gen_rtx_LABEL_REF (Pmode, next);
3337 /* See if we previously assigned a constant value to this SUBREG. */
3338 if ((new = lookup_as_function (x, CONST_INT)) != 0
3339 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3342 /* If this is a paradoxical SUBREG, we have no idea what value the
3343 extra bits would have. However, if the operand is equivalent
3344 to a SUBREG whose operand is the same as our mode, and all the
3345 modes are within a word, we can just use the inner operand
3346 because these SUBREGs just say how to treat the register.
3348 Similarly if we find an integer constant. */
3350 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3352 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3353 struct table_elt *elt;
3355 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3356 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3357 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3359 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3361 if (CONSTANT_P (elt->exp)
3362 && GET_MODE (elt->exp) == VOIDmode)
3365 if (GET_CODE (elt->exp) == SUBREG
3366 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3367 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3368 return copy_rtx (SUBREG_REG (elt->exp));
3374 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3375 We might be able to if the SUBREG is extracting a single word in an
3376 integral mode or extracting the low part. */
3378 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3379 const_arg0 = equiv_constant (folded_arg0);
3381 folded_arg0 = const_arg0;
3383 if (folded_arg0 != SUBREG_REG (x))
3387 if (GET_MODE_CLASS (mode) == MODE_INT
3388 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3389 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3390 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3391 GET_MODE (SUBREG_REG (x)));
3392 if (new == 0 && subreg_lowpart_p (x))
3393 new = gen_lowpart_if_possible (mode, folded_arg0);
3398 /* If this is a narrowing SUBREG and our operand is a REG, see if
3399 we can find an equivalence for REG that is an arithmetic operation
3400 in a wider mode where both operands are paradoxical SUBREGs
3401 from objects of our result mode. In that case, we couldn't report
3402 an equivalent value for that operation, since we don't know what the
3403 extra bits will be. But we can find an equivalence for this SUBREG
3404 by folding that operation is the narrow mode. This allows us to
3405 fold arithmetic in narrow modes when the machine only supports
3406 word-sized arithmetic.
3408 Also look for a case where we have a SUBREG whose operand is the
3409 same as our result. If both modes are smaller than a word, we
3410 are simply interpreting a register in different modes and we
3411 can use the inner value. */
3413 if (GET_CODE (folded_arg0) == REG
3414 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3415 && subreg_lowpart_p (x))
3417 struct table_elt *elt;
3419 /* We can use HASH here since we know that canon_hash won't be
3421 elt = lookup (folded_arg0,
3422 HASH (folded_arg0, GET_MODE (folded_arg0)),
3423 GET_MODE (folded_arg0));
3426 elt = elt->first_same_value;
3428 for (; elt; elt = elt->next_same_value)
3430 enum rtx_code eltcode = GET_CODE (elt->exp);
3432 /* Just check for unary and binary operations. */
3433 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3434 && GET_CODE (elt->exp) != SIGN_EXTEND
3435 && GET_CODE (elt->exp) != ZERO_EXTEND
3436 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3437 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3439 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3441 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3442 op0 = fold_rtx (op0, NULL_RTX);
3444 op0 = equiv_constant (op0);
3446 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3449 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3450 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3451 && eltcode != DIV && eltcode != MOD
3452 && eltcode != UDIV && eltcode != UMOD
3453 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3454 && eltcode != ROTATE && eltcode != ROTATERT
3455 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3456 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3458 || CONSTANT_P (XEXP (elt->exp, 0)))
3459 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3460 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3462 || CONSTANT_P (XEXP (elt->exp, 1))))
3464 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3465 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3467 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3468 op0 = fold_rtx (op0, NULL_RTX);
3471 op0 = equiv_constant (op0);
3473 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3474 op1 = fold_rtx (op1, NULL_RTX);
3477 op1 = equiv_constant (op1);
3479 /* If we are looking for the low SImode part of
3480 (ashift:DI c (const_int 32)), it doesn't work
3481 to compute that in SImode, because a 32-bit shift
3482 in SImode is unpredictable. We know the value is 0. */
3484 && GET_CODE (elt->exp) == ASHIFT
3485 && GET_CODE (op1) == CONST_INT
3486 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3488 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3490 /* If the count fits in the inner mode's width,
3491 but exceeds the outer mode's width,
3492 the value will get truncated to 0
3496 /* If the count exceeds even the inner mode's width,
3497 don't fold this expression. */
3500 else if (op0 && op1)
3501 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3505 else if (GET_CODE (elt->exp) == SUBREG
3506 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3507 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3509 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3510 new = copy_rtx (SUBREG_REG (elt->exp));
3521 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3522 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3523 new = lookup_as_function (XEXP (x, 0), code);
3525 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3529 /* If we are not actually processing an insn, don't try to find the
3530 best address. Not only don't we care, but we could modify the
3531 MEM in an invalid way since we have no insn to validate against. */
3533 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3536 /* Even if we don't fold in the insn itself,
3537 we can safely do so here, in hopes of getting a constant. */
3538 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3540 HOST_WIDE_INT offset = 0;
3542 if (GET_CODE (addr) == REG
3543 && REGNO_QTY_VALID_P (REGNO (addr)))
3545 int addr_q = REG_QTY (REGNO (addr));
3546 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3548 if (GET_MODE (addr) == addr_ent->mode
3549 && addr_ent->const_rtx != NULL_RTX)
3550 addr = addr_ent->const_rtx;
3553 /* If address is constant, split it into a base and integer offset. */
3554 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3556 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3557 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3559 base = XEXP (XEXP (addr, 0), 0);
3560 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3562 else if (GET_CODE (addr) == LO_SUM
3563 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3564 base = XEXP (addr, 1);
3565 else if (GET_CODE (addr) == ADDRESSOF)
3566 return change_address (x, VOIDmode, addr);
3568 /* If this is a constant pool reference, we can fold it into its
3569 constant to allow better value tracking. */
3570 if (base && GET_CODE (base) == SYMBOL_REF
3571 && CONSTANT_POOL_ADDRESS_P (base))
3573 rtx constant = get_pool_constant (base);
3574 enum machine_mode const_mode = get_pool_mode (base);
3577 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3578 constant_pool_entries_cost = COST (constant);
3580 /* If we are loading the full constant, we have an equivalence. */
3581 if (offset == 0 && mode == const_mode)
3584 /* If this actually isn't a constant (weird!), we can't do
3585 anything. Otherwise, handle the two most common cases:
3586 extracting a word from a multi-word constant, and extracting
3587 the low-order bits. Other cases don't seem common enough to
3589 if (! CONSTANT_P (constant))
3592 if (GET_MODE_CLASS (mode) == MODE_INT
3593 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3594 && offset % UNITS_PER_WORD == 0
3595 && (new = operand_subword (constant,
3596 offset / UNITS_PER_WORD,
3597 0, const_mode)) != 0)
3600 if (((BYTES_BIG_ENDIAN
3601 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3602 || (! BYTES_BIG_ENDIAN && offset == 0))
3603 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3607 /* If this is a reference to a label at a known position in a jump
3608 table, we also know its value. */
3609 if (base && GET_CODE (base) == LABEL_REF)
3611 rtx label = XEXP (base, 0);
3612 rtx table_insn = NEXT_INSN (label);
3614 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3615 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3617 rtx table = PATTERN (table_insn);
3620 && (offset / GET_MODE_SIZE (GET_MODE (table))
3621 < XVECLEN (table, 0)))
3622 return XVECEXP (table, 0,
3623 offset / GET_MODE_SIZE (GET_MODE (table)));
3625 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3626 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3628 rtx table = PATTERN (table_insn);
3631 && (offset / GET_MODE_SIZE (GET_MODE (table))
3632 < XVECLEN (table, 1)))
3634 offset /= GET_MODE_SIZE (GET_MODE (table));
3635 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3638 if (GET_MODE (table) != Pmode)
3639 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3641 /* Indicate this is a constant. This isn't a
3642 valid form of CONST, but it will only be used
3643 to fold the next insns and then discarded, so
3646 Note this expression must be explicitly discarded,
3647 by cse_insn, else it may end up in a REG_EQUAL note
3648 and "escape" to cause problems elsewhere. */
3649 return gen_rtx_CONST (GET_MODE (new), new);
3657 #ifdef NO_FUNCTION_CSE
3659 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3665 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3666 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3667 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3677 mode_arg0 = VOIDmode;
3679 /* Try folding our operands.
3680 Then see which ones have constant values known. */
3682 fmt = GET_RTX_FORMAT (code);
3683 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3686 rtx arg = XEXP (x, i);
3687 rtx folded_arg = arg, const_arg = 0;
3688 enum machine_mode mode_arg = GET_MODE (arg);
3689 rtx cheap_arg, expensive_arg;
3690 rtx replacements[2];
3693 /* Most arguments are cheap, so handle them specially. */
3694 switch (GET_CODE (arg))
3697 /* This is the same as calling equiv_constant; it is duplicated
3699 if (REGNO_QTY_VALID_P (REGNO (arg)))
3701 int arg_q = REG_QTY (REGNO (arg));
3702 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3704 if (arg_ent->const_rtx != NULL_RTX
3705 && GET_CODE (arg_ent->const_rtx) != REG
3706 && GET_CODE (arg_ent->const_rtx) != PLUS)
3708 = gen_lowpart_if_possible (GET_MODE (arg),
3709 arg_ent->const_rtx);
3723 folded_arg = prev_insn_cc0;
3724 mode_arg = prev_insn_cc0_mode;
3725 const_arg = equiv_constant (folded_arg);
3730 folded_arg = fold_rtx (arg, insn);
3731 const_arg = equiv_constant (folded_arg);
3734 /* For the first three operands, see if the operand
3735 is constant or equivalent to a constant. */
3739 folded_arg0 = folded_arg;
3740 const_arg0 = const_arg;
3741 mode_arg0 = mode_arg;
3744 folded_arg1 = folded_arg;
3745 const_arg1 = const_arg;
3748 const_arg2 = const_arg;
3752 /* Pick the least expensive of the folded argument and an
3753 equivalent constant argument. */
3754 if (const_arg == 0 || const_arg == folded_arg
3755 || COST (const_arg) > COST (folded_arg))
3756 cheap_arg = folded_arg, expensive_arg = const_arg;
3758 cheap_arg = const_arg, expensive_arg = folded_arg;
3760 /* Try to replace the operand with the cheapest of the two
3761 possibilities. If it doesn't work and this is either of the first
3762 two operands of a commutative operation, try swapping them.
3763 If THAT fails, try the more expensive, provided it is cheaper
3764 than what is already there. */
3766 if (cheap_arg == XEXP (x, i))
3769 if (insn == 0 && ! copied)
3775 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3777 j < 2 && replacements[j]
3778 && COST (replacements[j]) < COST (XEXP (x, i));
3781 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3784 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3786 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3787 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3789 if (apply_change_group ())
3791 /* Swap them back to be invalid so that this loop can
3792 continue and flag them to be swapped back later. */
3795 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3807 /* Don't try to fold inside of a vector of expressions.
3808 Doing nothing is harmless. */
3812 /* If a commutative operation, place a constant integer as the second
3813 operand unless the first operand is also a constant integer. Otherwise,
3814 place any constant second unless the first operand is also a constant. */
3816 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3818 if (must_swap || (const_arg0
3820 || (GET_CODE (const_arg0) == CONST_INT
3821 && GET_CODE (const_arg1) != CONST_INT))))
3823 register rtx tem = XEXP (x, 0);
3825 if (insn == 0 && ! copied)
3831 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3832 validate_change (insn, &XEXP (x, 1), tem, 1);
3833 if (apply_change_group ())
3835 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3836 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3841 /* If X is an arithmetic operation, see if we can simplify it. */
3843 switch (GET_RTX_CLASS (code))
3849 /* We can't simplify extension ops unless we know the
3851 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3852 && mode_arg0 == VOIDmode)
3855 /* If we had a CONST, strip it off and put it back later if we
3857 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3858 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3860 new = simplify_unary_operation (code, mode,
3861 const_arg0 ? const_arg0 : folded_arg0,
3863 if (new != 0 && is_const)
3864 new = gen_rtx_CONST (mode, new);
3869 /* See what items are actually being compared and set FOLDED_ARG[01]
3870 to those values and CODE to the actual comparison code. If any are
3871 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3872 do anything if both operands are already known to be constant. */
3874 if (const_arg0 == 0 || const_arg1 == 0)
3876 struct table_elt *p0, *p1;
3877 rtx true = const_true_rtx, false = const0_rtx;
3878 enum machine_mode mode_arg1;
3880 #ifdef FLOAT_STORE_FLAG_VALUE
3881 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3883 true = (CONST_DOUBLE_FROM_REAL_VALUE
3884 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3885 false = CONST0_RTX (mode);
3889 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3890 &mode_arg0, &mode_arg1);
3891 const_arg0 = equiv_constant (folded_arg0);
3892 const_arg1 = equiv_constant (folded_arg1);
3894 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3895 what kinds of things are being compared, so we can't do
3896 anything with this comparison. */
3898 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3901 /* If we do not now have two constants being compared, see
3902 if we can nevertheless deduce some things about the
3904 if (const_arg0 == 0 || const_arg1 == 0)
3906 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3907 non-explicit constant? These aren't zero, but we
3908 don't know their sign. */
3909 if (const_arg1 == const0_rtx
3910 && (NONZERO_BASE_PLUS_P (folded_arg0)
3911 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3913 || GET_CODE (folded_arg0) == SYMBOL_REF
3915 || GET_CODE (folded_arg0) == LABEL_REF
3916 || GET_CODE (folded_arg0) == CONST))
3920 else if (code == NE)
3924 /* See if the two operands are the same. We don't do this
3925 for IEEE floating-point since we can't assume x == x
3926 since x might be a NaN. */
3928 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3929 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3930 && (folded_arg0 == folded_arg1
3931 || (GET_CODE (folded_arg0) == REG
3932 && GET_CODE (folded_arg1) == REG
3933 && (REG_QTY (REGNO (folded_arg0))
3934 == REG_QTY (REGNO (folded_arg1))))
3935 || ((p0 = lookup (folded_arg0,
3936 (safe_hash (folded_arg0, mode_arg0)
3937 & HASH_MASK), mode_arg0))
3938 && (p1 = lookup (folded_arg1,
3939 (safe_hash (folded_arg1, mode_arg0)
3940 & HASH_MASK), mode_arg0))
3941 && p0->first_same_value == p1->first_same_value)))
3942 return ((code == EQ || code == LE || code == GE
3943 || code == LEU || code == GEU)
3946 /* If FOLDED_ARG0 is a register, see if the comparison we are
3947 doing now is either the same as we did before or the reverse
3948 (we only check the reverse if not floating-point). */
3949 else if (GET_CODE (folded_arg0) == REG)
3951 int qty = REG_QTY (REGNO (folded_arg0));
3953 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3955 struct qty_table_elem *ent = &qty_table[qty];
3957 if ((comparison_dominates_p (ent->comparison_code, code)
3958 || (! FLOAT_MODE_P (mode_arg0)
3959 && comparison_dominates_p (ent->comparison_code,
3960 reverse_condition (code))))
3961 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3963 && rtx_equal_p (ent->comparison_const,
3965 || (GET_CODE (folded_arg1) == REG
3966 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3967 return (comparison_dominates_p (ent->comparison_code, code)
3974 /* If we are comparing against zero, see if the first operand is
3975 equivalent to an IOR with a constant. If so, we may be able to
3976 determine the result of this comparison. */
3978 if (const_arg1 == const0_rtx)
3980 rtx y = lookup_as_function (folded_arg0, IOR);
3984 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3985 && GET_CODE (inner_const) == CONST_INT
3986 && INTVAL (inner_const) != 0)
3988 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3989 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3990 && (INTVAL (inner_const)
3991 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3992 rtx true = const_true_rtx, false = const0_rtx;
3994 #ifdef FLOAT_STORE_FLAG_VALUE
3995 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3997 true = (CONST_DOUBLE_FROM_REAL_VALUE
3998 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3999 false = CONST0_RTX (mode);
4023 new = simplify_relational_operation (code,
4024 (mode_arg0 != VOIDmode
4026 : (GET_MODE (const_arg0
4030 ? GET_MODE (const_arg0
4033 : GET_MODE (const_arg1
4036 const_arg0 ? const_arg0 : folded_arg0,
4037 const_arg1 ? const_arg1 : folded_arg1);
4038 #ifdef FLOAT_STORE_FLAG_VALUE
4039 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4041 if (new == const0_rtx)
4042 new = CONST0_RTX (mode);
4044 new = (CONST_DOUBLE_FROM_REAL_VALUE
4045 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4055 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4056 with that LABEL_REF as its second operand. If so, the result is
4057 the first operand of that MINUS. This handles switches with an
4058 ADDR_DIFF_VEC table. */
4059 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4062 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4063 : lookup_as_function (folded_arg0, MINUS);
4065 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4066 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4069 /* Now try for a CONST of a MINUS like the above. */
4070 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4071 : lookup_as_function (folded_arg0, CONST))) != 0
4072 && GET_CODE (XEXP (y, 0)) == MINUS
4073 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4074 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4075 return XEXP (XEXP (y, 0), 0);
4078 /* Likewise if the operands are in the other order. */
4079 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4082 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4083 : lookup_as_function (folded_arg1, MINUS);
4085 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4086 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4089 /* Now try for a CONST of a MINUS like the above. */
4090 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4091 : lookup_as_function (folded_arg1, CONST))) != 0
4092 && GET_CODE (XEXP (y, 0)) == MINUS
4093 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4094 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4095 return XEXP (XEXP (y, 0), 0);
4098 /* If second operand is a register equivalent to a negative
4099 CONST_INT, see if we can find a register equivalent to the
4100 positive constant. Make a MINUS if so. Don't do this for
4101 a non-negative constant since we might then alternate between
4102 chosing positive and negative constants. Having the positive
4103 constant previously-used is the more common case. Be sure
4104 the resulting constant is non-negative; if const_arg1 were
4105 the smallest negative number this would overflow: depending
4106 on the mode, this would either just be the same value (and
4107 hence not save anything) or be incorrect. */
4108 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4109 && INTVAL (const_arg1) < 0
4110 /* This used to test
4112 -INTVAL (const_arg1) >= 0
4114 But The Sun V5.0 compilers mis-compiled that test. So
4115 instead we test for the problematic value in a more direct
4116 manner and hope the Sun compilers get it correct. */
4117 && INTVAL (const_arg1) !=
4118 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4119 && GET_CODE (folded_arg1) == REG)
4121 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4123 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4127 for (p = p->first_same_value; p; p = p->next_same_value)
4128 if (GET_CODE (p->exp) == REG)
4129 return simplify_gen_binary (MINUS, mode, folded_arg0,
4130 canon_reg (p->exp, NULL_RTX));
4135 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4136 If so, produce (PLUS Z C2-C). */
4137 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4139 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4140 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4141 return fold_rtx (plus_constant (copy_rtx (y),
4142 -INTVAL (const_arg1)),
4149 case SMIN: case SMAX: case UMIN: case UMAX:
4150 case IOR: case AND: case XOR:
4151 case MULT: case DIV: case UDIV:
4152 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4153 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4154 is known to be of similar form, we may be able to replace the
4155 operation with a combined operation. This may eliminate the
4156 intermediate operation if every use is simplified in this way.
4157 Note that the similar optimization done by combine.c only works
4158 if the intermediate operation's result has only one reference. */
4160 if (GET_CODE (folded_arg0) == REG
4161 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4164 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4165 rtx y = lookup_as_function (folded_arg0, code);
4167 enum rtx_code associate_code;
4171 || 0 == (inner_const
4172 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4173 || GET_CODE (inner_const) != CONST_INT
4174 /* If we have compiled a statement like
4175 "if (x == (x & mask1))", and now are looking at
4176 "x & mask2", we will have a case where the first operand
4177 of Y is the same as our first operand. Unless we detect
4178 this case, an infinite loop will result. */
4179 || XEXP (y, 0) == folded_arg0)
4182 /* Don't associate these operations if they are a PLUS with the
4183 same constant and it is a power of two. These might be doable
4184 with a pre- or post-increment. Similarly for two subtracts of
4185 identical powers of two with post decrement. */
4187 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4188 && ((HAVE_PRE_INCREMENT
4189 && exact_log2 (INTVAL (const_arg1)) >= 0)
4190 || (HAVE_POST_INCREMENT
4191 && exact_log2 (INTVAL (const_arg1)) >= 0)
4192 || (HAVE_PRE_DECREMENT
4193 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4194 || (HAVE_POST_DECREMENT
4195 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4198 /* Compute the code used to compose the constants. For example,
4199 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4202 = (code == MULT || code == DIV || code == UDIV ? MULT
4203 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4205 new_const = simplify_binary_operation (associate_code, mode,
4206 const_arg1, inner_const);
4211 /* If we are associating shift operations, don't let this
4212 produce a shift of the size of the object or larger.
4213 This could occur when we follow a sign-extend by a right
4214 shift on a machine that does a sign-extend as a pair
4217 if (is_shift && GET_CODE (new_const) == CONST_INT
4218 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4220 /* As an exception, we can turn an ASHIFTRT of this
4221 form into a shift of the number of bits - 1. */
4222 if (code == ASHIFTRT)
4223 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4228 y = copy_rtx (XEXP (y, 0));
4230 /* If Y contains our first operand (the most common way this
4231 can happen is if Y is a MEM), we would do into an infinite
4232 loop if we tried to fold it. So don't in that case. */
4234 if (! reg_mentioned_p (folded_arg0, y))
4235 y = fold_rtx (y, insn);
4237 return simplify_gen_binary (code, mode, y, new_const);
4245 new = simplify_binary_operation (code, mode,
4246 const_arg0 ? const_arg0 : folded_arg0,
4247 const_arg1 ? const_arg1 : folded_arg1);
4251 /* (lo_sum (high X) X) is simply X. */
4252 if (code == LO_SUM && const_arg0 != 0
4253 && GET_CODE (const_arg0) == HIGH
4254 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4260 new = simplify_ternary_operation (code, mode, mode_arg0,
4261 const_arg0 ? const_arg0 : folded_arg0,
4262 const_arg1 ? const_arg1 : folded_arg1,
4263 const_arg2 ? const_arg2 : XEXP (x, 2));
4267 /* Always eliminate CONSTANT_P_RTX at this stage. */
4268 if (code == CONSTANT_P_RTX)
4269 return (const_arg0 ? const1_rtx : const0_rtx);
4273 return new ? new : x;
4276 /* Return a constant value currently equivalent to X.
4277 Return 0 if we don't know one. */
4283 if (GET_CODE (x) == REG
4284 && REGNO_QTY_VALID_P (REGNO (x)))
4286 int x_q = REG_QTY (REGNO (x));
4287 struct qty_table_elem *x_ent = &qty_table[x_q];
4289 if (x_ent->const_rtx)
4290 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4293 if (x == 0 || CONSTANT_P (x))
4296 /* If X is a MEM, try to fold it outside the context of any insn to see if
4297 it might be equivalent to a constant. That handles the case where it
4298 is a constant-pool reference. Then try to look it up in the hash table
4299 in case it is something whose value we have seen before. */
4301 if (GET_CODE (x) == MEM)
4303 struct table_elt *elt;
4305 x = fold_rtx (x, NULL_RTX);
4309 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4313 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4314 if (elt->is_const && CONSTANT_P (elt->exp))
4321 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4322 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4323 least-significant part of X.
4324 MODE specifies how big a part of X to return.
4326 If the requested operation cannot be done, 0 is returned.
4328 This is similar to gen_lowpart in emit-rtl.c. */
4331 gen_lowpart_if_possible (mode, x)
4332 enum machine_mode mode;
4335 rtx result = gen_lowpart_common (mode, x);
4339 else if (GET_CODE (x) == MEM)
4341 /* This is the only other case we handle. */
4342 register int offset = 0;
4345 if (WORDS_BIG_ENDIAN)
4346 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4347 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4348 if (BYTES_BIG_ENDIAN)
4349 /* Adjust the address so that the address-after-the-data is
4351 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4352 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4353 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4354 if (! memory_address_p (mode, XEXP (new, 0)))
4356 MEM_COPY_ATTRIBUTES (new, x);
4363 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4364 branch. It will be zero if not.
4366 In certain cases, this can cause us to add an equivalence. For example,
4367 if we are following the taken case of
4369 we can add the fact that `i' and '2' are now equivalent.
4371 In any case, we can record that this comparison was passed. If the same
4372 comparison is seen later, we will know its value. */
4375 record_jump_equiv (insn, taken)
4379 int cond_known_true;
4382 enum machine_mode mode, mode0, mode1;
4383 int reversed_nonequality = 0;
4386 /* Ensure this is the right kind of insn. */
4387 if (! any_condjump_p (insn))
4389 set = pc_set (insn);
4391 /* See if this jump condition is known true or false. */
4393 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4395 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4397 /* Get the type of comparison being done and the operands being compared.
4398 If we had to reverse a non-equality condition, record that fact so we
4399 know that it isn't valid for floating-point. */
4400 code = GET_CODE (XEXP (SET_SRC (set), 0));
4401 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4402 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4404 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4405 if (! cond_known_true)
4407 reversed_nonequality = (code != EQ && code != NE);
4408 code = reverse_condition (code);
4410 /* Don't remember if we can't find the inverse. */
4411 if (code == UNKNOWN)
4415 /* The mode is the mode of the non-constant. */
4417 if (mode1 != VOIDmode)
4420 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4423 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4424 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4425 Make any useful entries we can with that information. Called from
4426 above function and called recursively. */
4429 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4431 enum machine_mode mode;
4433 int reversed_nonequality;
4435 unsigned op0_hash, op1_hash;
4436 int op0_in_memory, op1_in_memory;
4437 struct table_elt *op0_elt, *op1_elt;
4439 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4440 we know that they are also equal in the smaller mode (this is also
4441 true for all smaller modes whether or not there is a SUBREG, but
4442 is not worth testing for with no SUBREG). */
4444 /* Note that GET_MODE (op0) may not equal MODE. */
4445 if (code == EQ && GET_CODE (op0) == SUBREG
4446 && (GET_MODE_SIZE (GET_MODE (op0))
4447 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4449 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4450 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4452 record_jump_cond (code, mode, SUBREG_REG (op0),
4453 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4454 reversed_nonequality);
4457 if (code == EQ && GET_CODE (op1) == SUBREG
4458 && (GET_MODE_SIZE (GET_MODE (op1))
4459 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4461 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4462 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4464 record_jump_cond (code, mode, SUBREG_REG (op1),
4465 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4466 reversed_nonequality);
4469 /* Similarly, if this is an NE comparison, and either is a SUBREG
4470 making a smaller mode, we know the whole thing is also NE. */
4472 /* Note that GET_MODE (op0) may not equal MODE;
4473 if we test MODE instead, we can get an infinite recursion
4474 alternating between two modes each wider than MODE. */
4476 if (code == NE && GET_CODE (op0) == SUBREG
4477 && subreg_lowpart_p (op0)
4478 && (GET_MODE_SIZE (GET_MODE (op0))
4479 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4481 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4482 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4484 record_jump_cond (code, mode, SUBREG_REG (op0),
4485 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4486 reversed_nonequality);
4489 if (code == NE && GET_CODE (op1) == SUBREG
4490 && subreg_lowpart_p (op1)
4491 && (GET_MODE_SIZE (GET_MODE (op1))
4492 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4494 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4495 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4497 record_jump_cond (code, mode, SUBREG_REG (op1),
4498 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4499 reversed_nonequality);
4502 /* Hash both operands. */
4505 hash_arg_in_memory = 0;
4506 op0_hash = HASH (op0, mode);
4507 op0_in_memory = hash_arg_in_memory;
4513 hash_arg_in_memory = 0;
4514 op1_hash = HASH (op1, mode);
4515 op1_in_memory = hash_arg_in_memory;
4520 /* Look up both operands. */
4521 op0_elt = lookup (op0, op0_hash, mode);
4522 op1_elt = lookup (op1, op1_hash, mode);
4524 /* If both operands are already equivalent or if they are not in the
4525 table but are identical, do nothing. */
4526 if ((op0_elt != 0 && op1_elt != 0
4527 && op0_elt->first_same_value == op1_elt->first_same_value)
4528 || op0 == op1 || rtx_equal_p (op0, op1))
4531 /* If we aren't setting two things equal all we can do is save this
4532 comparison. Similarly if this is floating-point. In the latter
4533 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4534 If we record the equality, we might inadvertently delete code
4535 whose intent was to change -0 to +0. */
4537 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4539 struct qty_table_elem *ent;
4542 /* If we reversed a floating-point comparison, if OP0 is not a
4543 register, or if OP1 is neither a register or constant, we can't
4546 if (GET_CODE (op1) != REG)
4547 op1 = equiv_constant (op1);
4549 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4550 || GET_CODE (op0) != REG || op1 == 0)
4553 /* Put OP0 in the hash table if it isn't already. This gives it a
4554 new quantity number. */
4557 if (insert_regs (op0, NULL_PTR, 0))
4559 rehash_using_reg (op0);
4560 op0_hash = HASH (op0, mode);
4562 /* If OP0 is contained in OP1, this changes its hash code
4563 as well. Faster to rehash than to check, except
4564 for the simple case of a constant. */
4565 if (! CONSTANT_P (op1))
4566 op1_hash = HASH (op1,mode);
4569 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4570 op0_elt->in_memory = op0_in_memory;
4573 qty = REG_QTY (REGNO (op0));
4574 ent = &qty_table[qty];
4576 ent->comparison_code = code;
4577 if (GET_CODE (op1) == REG)
4579 /* Look it up again--in case op0 and op1 are the same. */
4580 op1_elt = lookup (op1, op1_hash, mode);
4582 /* Put OP1 in the hash table so it gets a new quantity number. */
4585 if (insert_regs (op1, NULL_PTR, 0))
4587 rehash_using_reg (op1);
4588 op1_hash = HASH (op1, mode);
4591 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4592 op1_elt->in_memory = op1_in_memory;
4595 ent->comparison_const = NULL_RTX;
4596 ent->comparison_qty = REG_QTY (REGNO (op1));
4600 ent->comparison_const = op1;
4601 ent->comparison_qty = -1;
4607 /* If either side is still missing an equivalence, make it now,
4608 then merge the equivalences. */
4612 if (insert_regs (op0, NULL_PTR, 0))
4614 rehash_using_reg (op0);
4615 op0_hash = HASH (op0, mode);
4618 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4619 op0_elt->in_memory = op0_in_memory;
4624 if (insert_regs (op1, NULL_PTR, 0))
4626 rehash_using_reg (op1);
4627 op1_hash = HASH (op1, mode);
4630 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4631 op1_elt->in_memory = op1_in_memory;
4634 merge_equiv_classes (op0_elt, op1_elt);
4635 last_jump_equiv_class = op0_elt;
4638 /* CSE processing for one instruction.
4639 First simplify sources and addresses of all assignments
4640 in the instruction, using previously-computed equivalents values.
4641 Then install the new sources and destinations in the table
4642 of available values.
4644 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4645 the insn. It means that INSN is inside libcall block. In this
4646 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4648 /* Data on one SET contained in the instruction. */
4652 /* The SET rtx itself. */
4654 /* The SET_SRC of the rtx (the original value, if it is changing). */
4656 /* The hash-table element for the SET_SRC of the SET. */
4657 struct table_elt *src_elt;
4658 /* Hash value for the SET_SRC. */
4660 /* Hash value for the SET_DEST. */
4662 /* The SET_DEST, with SUBREG, etc., stripped. */
4664 /* Nonzero if the SET_SRC is in memory. */
4666 /* Nonzero if the SET_SRC contains something
4667 whose value cannot be predicted and understood. */
4669 /* Original machine mode, in case it becomes a CONST_INT. */
4670 enum machine_mode mode;
4671 /* A constant equivalent for SET_SRC, if any. */
4673 /* Original SET_SRC value used for libcall notes. */
4675 /* Hash value of constant equivalent for SET_SRC. */
4676 unsigned src_const_hash;
4677 /* Table entry for constant equivalent for SET_SRC, if any. */
4678 struct table_elt *src_const_elt;
4682 cse_insn (insn, libcall_insn)
4686 register rtx x = PATTERN (insn);
4689 register int n_sets = 0;
4692 /* Records what this insn does to set CC0. */
4693 rtx this_insn_cc0 = 0;
4694 enum machine_mode this_insn_cc0_mode = VOIDmode;
4698 struct table_elt *src_eqv_elt = 0;
4699 int src_eqv_volatile = 0;
4700 int src_eqv_in_memory = 0;
4701 unsigned src_eqv_hash = 0;
4703 struct set *sets = (struct set *) NULL_PTR;
4707 /* Find all the SETs and CLOBBERs in this instruction.
4708 Record all the SETs in the array `set' and count them.
4709 Also determine whether there is a CLOBBER that invalidates
4710 all memory references, or all references at varying addresses. */
4712 if (GET_CODE (insn) == CALL_INSN)
4714 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4715 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4716 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4719 if (GET_CODE (x) == SET)
4721 sets = (struct set *) alloca (sizeof (struct set));
4724 /* Ignore SETs that are unconditional jumps.
4725 They never need cse processing, so this does not hurt.
4726 The reason is not efficiency but rather
4727 so that we can test at the end for instructions
4728 that have been simplified to unconditional jumps
4729 and not be misled by unchanged instructions
4730 that were unconditional jumps to begin with. */
4731 if (SET_DEST (x) == pc_rtx
4732 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4735 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4736 The hard function value register is used only once, to copy to
4737 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4738 Ensure we invalidate the destination register. On the 80386 no
4739 other code would invalidate it since it is a fixed_reg.
4740 We need not check the return of apply_change_group; see canon_reg. */
4742 else if (GET_CODE (SET_SRC (x)) == CALL)
4744 canon_reg (SET_SRC (x), insn);
4745 apply_change_group ();
4746 fold_rtx (SET_SRC (x), insn);
4747 invalidate (SET_DEST (x), VOIDmode);
4752 else if (GET_CODE (x) == PARALLEL)
4754 register int lim = XVECLEN (x, 0);
4756 sets = (struct set *) alloca (lim * sizeof (struct set));
4758 /* Find all regs explicitly clobbered in this insn,
4759 and ensure they are not replaced with any other regs
4760 elsewhere in this insn.
4761 When a reg that is clobbered is also used for input,
4762 we should presume that that is for a reason,
4763 and we should not substitute some other register
4764 which is not supposed to be clobbered.
4765 Therefore, this loop cannot be merged into the one below
4766 because a CALL may precede a CLOBBER and refer to the
4767 value clobbered. We must not let a canonicalization do
4768 anything in that case. */
4769 for (i = 0; i < lim; i++)
4771 register rtx y = XVECEXP (x, 0, i);
4772 if (GET_CODE (y) == CLOBBER)
4774 rtx clobbered = XEXP (y, 0);
4776 if (GET_CODE (clobbered) == REG
4777 || GET_CODE (clobbered) == SUBREG)
4778 invalidate (clobbered, VOIDmode);
4779 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4780 || GET_CODE (clobbered) == ZERO_EXTRACT)
4781 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4785 for (i = 0; i < lim; i++)
4787 register rtx y = XVECEXP (x, 0, i);
4788 if (GET_CODE (y) == SET)
4790 /* As above, we ignore unconditional jumps and call-insns and
4791 ignore the result of apply_change_group. */
4792 if (GET_CODE (SET_SRC (y)) == CALL)
4794 canon_reg (SET_SRC (y), insn);
4795 apply_change_group ();
4796 fold_rtx (SET_SRC (y), insn);
4797 invalidate (SET_DEST (y), VOIDmode);
4799 else if (SET_DEST (y) == pc_rtx
4800 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4803 sets[n_sets++].rtl = y;
4805 else if (GET_CODE (y) == CLOBBER)
4807 /* If we clobber memory, canon the address.
4808 This does nothing when a register is clobbered
4809 because we have already invalidated the reg. */
4810 if (GET_CODE (XEXP (y, 0)) == MEM)
4811 canon_reg (XEXP (y, 0), NULL_RTX);
4813 else if (GET_CODE (y) == USE
4814 && ! (GET_CODE (XEXP (y, 0)) == REG
4815 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4816 canon_reg (y, NULL_RTX);
4817 else if (GET_CODE (y) == CALL)
4819 /* The result of apply_change_group can be ignored; see
4821 canon_reg (y, insn);
4822 apply_change_group ();
4827 else if (GET_CODE (x) == CLOBBER)
4829 if (GET_CODE (XEXP (x, 0)) == MEM)
4830 canon_reg (XEXP (x, 0), NULL_RTX);
4833 /* Canonicalize a USE of a pseudo register or memory location. */
4834 else if (GET_CODE (x) == USE
4835 && ! (GET_CODE (XEXP (x, 0)) == REG
4836 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4837 canon_reg (XEXP (x, 0), NULL_RTX);
4838 else if (GET_CODE (x) == CALL)
4840 /* The result of apply_change_group can be ignored; see canon_reg. */
4841 canon_reg (x, insn);
4842 apply_change_group ();
4846 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4847 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4848 is handled specially for this case, and if it isn't set, then there will
4849 be no equivalence for the destination. */
4850 if (n_sets == 1 && REG_NOTES (insn) != 0
4851 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4852 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4853 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4854 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4856 /* Canonicalize sources and addresses of destinations.
4857 We do this in a separate pass to avoid problems when a MATCH_DUP is
4858 present in the insn pattern. In that case, we want to ensure that
4859 we don't break the duplicate nature of the pattern. So we will replace
4860 both operands at the same time. Otherwise, we would fail to find an
4861 equivalent substitution in the loop calling validate_change below.
4863 We used to suppress canonicalization of DEST if it appears in SRC,
4864 but we don't do this any more. */
4866 for (i = 0; i < n_sets; i++)
4868 rtx dest = SET_DEST (sets[i].rtl);
4869 rtx src = SET_SRC (sets[i].rtl);
4870 rtx new = canon_reg (src, insn);
4873 sets[i].orig_src = src;
4874 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4875 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4876 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4877 || (insn_code = recog_memoized (insn)) < 0
4878 || insn_data[insn_code].n_dups > 0)
4879 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4881 SET_SRC (sets[i].rtl) = new;
4883 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4885 validate_change (insn, &XEXP (dest, 1),
4886 canon_reg (XEXP (dest, 1), insn), 1);
4887 validate_change (insn, &XEXP (dest, 2),
4888 canon_reg (XEXP (dest, 2), insn), 1);
4891 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4892 || GET_CODE (dest) == ZERO_EXTRACT
4893 || GET_CODE (dest) == SIGN_EXTRACT)
4894 dest = XEXP (dest, 0);
4896 if (GET_CODE (dest) == MEM)
4897 canon_reg (dest, insn);
4900 /* Now that we have done all the replacements, we can apply the change
4901 group and see if they all work. Note that this will cause some
4902 canonicalizations that would have worked individually not to be applied
4903 because some other canonicalization didn't work, but this should not
4906 The result of apply_change_group can be ignored; see canon_reg. */
4908 apply_change_group ();
4910 /* Set sets[i].src_elt to the class each source belongs to.
4911 Detect assignments from or to volatile things
4912 and set set[i] to zero so they will be ignored
4913 in the rest of this function.
4915 Nothing in this loop changes the hash table or the register chains. */
4917 for (i = 0; i < n_sets; i++)
4919 register rtx src, dest;
4920 register rtx src_folded;
4921 register struct table_elt *elt = 0, *p;
4922 enum machine_mode mode;
4925 rtx src_related = 0;
4926 struct table_elt *src_const_elt = 0;
4927 int src_cost = MAX_COST, src_eqv_cost = MAX_COST, src_folded_cost = MAX_COST;
4928 int src_related_cost = MAX_COST, src_elt_cost = MAX_COST;
4929 int src_regcost, src_eqv_regcost, src_folded_regcost;
4930 int src_related_regcost, src_elt_regcost;
4931 /* Set non-zero if we need to call force_const_mem on with the
4932 contents of src_folded before using it. */
4933 int src_folded_force_flag = 0;
4935 dest = SET_DEST (sets[i].rtl);
4936 src = SET_SRC (sets[i].rtl);
4938 /* If SRC is a constant that has no machine mode,
4939 hash it with the destination's machine mode.
4940 This way we can keep different modes separate. */
4942 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4943 sets[i].mode = mode;
4947 enum machine_mode eqvmode = mode;
4948 if (GET_CODE (dest) == STRICT_LOW_PART)
4949 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4951 hash_arg_in_memory = 0;
4952 src_eqv = fold_rtx (src_eqv, insn);
4953 src_eqv_hash = HASH (src_eqv, eqvmode);
4955 /* Find the equivalence class for the equivalent expression. */
4958 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4960 src_eqv_volatile = do_not_record;
4961 src_eqv_in_memory = hash_arg_in_memory;
4964 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4965 value of the INNER register, not the destination. So it is not
4966 a valid substitution for the source. But save it for later. */
4967 if (GET_CODE (dest) == STRICT_LOW_PART)
4970 src_eqv_here = src_eqv;
4972 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4973 simplified result, which may not necessarily be valid. */
4974 src_folded = fold_rtx (src, insn);
4977 /* ??? This caused bad code to be generated for the m68k port with -O2.
4978 Suppose src is (CONST_INT -1), and that after truncation src_folded
4979 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4980 At the end we will add src and src_const to the same equivalence
4981 class. We now have 3 and -1 on the same equivalence class. This
4982 causes later instructions to be mis-optimized. */
4983 /* If storing a constant in a bitfield, pre-truncate the constant
4984 so we will be able to record it later. */
4985 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4986 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4988 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4990 if (GET_CODE (src) == CONST_INT
4991 && GET_CODE (width) == CONST_INT
4992 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4993 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4995 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4996 << INTVAL (width)) - 1));
5000 /* Compute SRC's hash code, and also notice if it
5001 should not be recorded at all. In that case,
5002 prevent any further processing of this assignment. */
5004 hash_arg_in_memory = 0;
5007 sets[i].src_hash = HASH (src, mode);
5008 sets[i].src_volatile = do_not_record;
5009 sets[i].src_in_memory = hash_arg_in_memory;
5011 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5012 a pseudo that is set more than once, do not record SRC. Using
5013 SRC as a replacement for anything else will be incorrect in that
5014 situation. Note that this usually occurs only for stack slots,
5015 in which case all the RTL would be referring to SRC, so we don't
5016 lose any optimization opportunities by not having SRC in the
5019 if (GET_CODE (src) == MEM
5020 && find_reg_note (insn, REG_EQUIV, src) != 0
5021 && GET_CODE (dest) == REG
5022 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
5023 && REG_N_SETS (REGNO (dest)) != 1)
5024 sets[i].src_volatile = 1;
5027 /* It is no longer clear why we used to do this, but it doesn't
5028 appear to still be needed. So let's try without it since this
5029 code hurts cse'ing widened ops. */
5030 /* If source is a perverse subreg (such as QI treated as an SI),
5031 treat it as volatile. It may do the work of an SI in one context
5032 where the extra bits are not being used, but cannot replace an SI
5034 if (GET_CODE (src) == SUBREG
5035 && (GET_MODE_SIZE (GET_MODE (src))
5036 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5037 sets[i].src_volatile = 1;
5040 /* Locate all possible equivalent forms for SRC. Try to replace
5041 SRC in the insn with each cheaper equivalent.
5043 We have the following types of equivalents: SRC itself, a folded
5044 version, a value given in a REG_EQUAL note, or a value related
5047 Each of these equivalents may be part of an additional class
5048 of equivalents (if more than one is in the table, they must be in
5049 the same class; we check for this).
5051 If the source is volatile, we don't do any table lookups.
5053 We note any constant equivalent for possible later use in a
5056 if (!sets[i].src_volatile)
5057 elt = lookup (src, sets[i].src_hash, mode);
5059 sets[i].src_elt = elt;
5061 if (elt && src_eqv_here && src_eqv_elt)
5063 if (elt->first_same_value != src_eqv_elt->first_same_value)
5065 /* The REG_EQUAL is indicating that two formerly distinct
5066 classes are now equivalent. So merge them. */
5067 merge_equiv_classes (elt, src_eqv_elt);
5068 src_eqv_hash = HASH (src_eqv, elt->mode);
5069 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5075 else if (src_eqv_elt)
5078 /* Try to find a constant somewhere and record it in `src_const'.
5079 Record its table element, if any, in `src_const_elt'. Look in
5080 any known equivalences first. (If the constant is not in the
5081 table, also set `sets[i].src_const_hash'). */
5083 for (p = elt->first_same_value; p; p = p->next_same_value)
5087 src_const_elt = elt;
5092 && (CONSTANT_P (src_folded)
5093 /* Consider (minus (label_ref L1) (label_ref L2)) as
5094 "constant" here so we will record it. This allows us
5095 to fold switch statements when an ADDR_DIFF_VEC is used. */
5096 || (GET_CODE (src_folded) == MINUS
5097 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5098 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5099 src_const = src_folded, src_const_elt = elt;
5100 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5101 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5103 /* If we don't know if the constant is in the table, get its
5104 hash code and look it up. */
5105 if (src_const && src_const_elt == 0)
5107 sets[i].src_const_hash = HASH (src_const, mode);
5108 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5111 sets[i].src_const = src_const;
5112 sets[i].src_const_elt = src_const_elt;
5114 /* If the constant and our source are both in the table, mark them as
5115 equivalent. Otherwise, if a constant is in the table but the source
5116 isn't, set ELT to it. */
5117 if (src_const_elt && elt
5118 && src_const_elt->first_same_value != elt->first_same_value)
5119 merge_equiv_classes (elt, src_const_elt);
5120 else if (src_const_elt && elt == 0)
5121 elt = src_const_elt;
5123 /* See if there is a register linearly related to a constant
5124 equivalent of SRC. */
5126 && (GET_CODE (src_const) == CONST
5127 || (src_const_elt && src_const_elt->related_value != 0)))
5129 src_related = use_related_value (src_const, src_const_elt);
5132 struct table_elt *src_related_elt
5133 = lookup (src_related, HASH (src_related, mode), mode);
5134 if (src_related_elt && elt)
5136 if (elt->first_same_value
5137 != src_related_elt->first_same_value)
5138 /* This can occur when we previously saw a CONST
5139 involving a SYMBOL_REF and then see the SYMBOL_REF
5140 twice. Merge the involved classes. */
5141 merge_equiv_classes (elt, src_related_elt);
5144 src_related_elt = 0;
5146 else if (src_related_elt && elt == 0)
5147 elt = src_related_elt;
5151 /* See if we have a CONST_INT that is already in a register in a
5154 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5155 && GET_MODE_CLASS (mode) == MODE_INT
5156 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5158 enum machine_mode wider_mode;
5160 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5161 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5162 && src_related == 0;
5163 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5165 struct table_elt *const_elt
5166 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5171 for (const_elt = const_elt->first_same_value;
5172 const_elt; const_elt = const_elt->next_same_value)
5173 if (GET_CODE (const_elt->exp) == REG)
5175 src_related = gen_lowpart_if_possible (mode,
5182 /* Another possibility is that we have an AND with a constant in
5183 a mode narrower than a word. If so, it might have been generated
5184 as part of an "if" which would narrow the AND. If we already
5185 have done the AND in a wider mode, we can use a SUBREG of that
5188 if (flag_expensive_optimizations && ! src_related
5189 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5190 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5192 enum machine_mode tmode;
5193 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5195 for (tmode = GET_MODE_WIDER_MODE (mode);
5196 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5197 tmode = GET_MODE_WIDER_MODE (tmode))
5199 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5200 struct table_elt *larger_elt;
5204 PUT_MODE (new_and, tmode);
5205 XEXP (new_and, 0) = inner;
5206 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5207 if (larger_elt == 0)
5210 for (larger_elt = larger_elt->first_same_value;
5211 larger_elt; larger_elt = larger_elt->next_same_value)
5212 if (GET_CODE (larger_elt->exp) == REG)
5215 = gen_lowpart_if_possible (mode, larger_elt->exp);
5225 #ifdef LOAD_EXTEND_OP
5226 /* See if a MEM has already been loaded with a widening operation;
5227 if it has, we can use a subreg of that. Many CISC machines
5228 also have such operations, but this is only likely to be
5229 beneficial these machines. */
5231 if (flag_expensive_optimizations && src_related == 0
5232 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5233 && GET_MODE_CLASS (mode) == MODE_INT
5234 && GET_CODE (src) == MEM && ! do_not_record
5235 && LOAD_EXTEND_OP (mode) != NIL)
5237 enum machine_mode tmode;
5239 /* Set what we are trying to extend and the operation it might
5240 have been extended with. */
5241 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5242 XEXP (memory_extend_rtx, 0) = src;
5244 for (tmode = GET_MODE_WIDER_MODE (mode);
5245 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5246 tmode = GET_MODE_WIDER_MODE (tmode))
5248 struct table_elt *larger_elt;
5250 PUT_MODE (memory_extend_rtx, tmode);
5251 larger_elt = lookup (memory_extend_rtx,
5252 HASH (memory_extend_rtx, tmode), tmode);
5253 if (larger_elt == 0)
5256 for (larger_elt = larger_elt->first_same_value;
5257 larger_elt; larger_elt = larger_elt->next_same_value)
5258 if (GET_CODE (larger_elt->exp) == REG)
5260 src_related = gen_lowpart_if_possible (mode,
5269 #endif /* LOAD_EXTEND_OP */
5271 if (src == src_folded)
5274 /* At this point, ELT, if non-zero, points to a class of expressions
5275 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5276 and SRC_RELATED, if non-zero, each contain additional equivalent
5277 expressions. Prune these latter expressions by deleting expressions
5278 already in the equivalence class.
5280 Check for an equivalent identical to the destination. If found,
5281 this is the preferred equivalent since it will likely lead to
5282 elimination of the insn. Indicate this by placing it in
5286 elt = elt->first_same_value;
5287 for (p = elt; p; p = p->next_same_value)
5289 enum rtx_code code = GET_CODE (p->exp);
5291 /* If the expression is not valid, ignore it. Then we do not
5292 have to check for validity below. In most cases, we can use
5293 `rtx_equal_p', since canonicalization has already been done. */
5294 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5297 /* Also skip paradoxical subregs, unless that's what we're
5300 && (GET_MODE_SIZE (GET_MODE (p->exp))
5301 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5303 && GET_CODE (src) == SUBREG
5304 && GET_MODE (src) == GET_MODE (p->exp)
5305 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5306 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5309 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5311 else if (src_folded && GET_CODE (src_folded) == code
5312 && rtx_equal_p (src_folded, p->exp))
5314 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5315 && rtx_equal_p (src_eqv_here, p->exp))
5317 else if (src_related && GET_CODE (src_related) == code
5318 && rtx_equal_p (src_related, p->exp))
5321 /* This is the same as the destination of the insns, we want
5322 to prefer it. Copy it to src_related. The code below will
5323 then give it a negative cost. */
5324 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5328 /* Find the cheapest valid equivalent, trying all the available
5329 possibilities. Prefer items not in the hash table to ones
5330 that are when they are equal cost. Note that we can never
5331 worsen an insn as the current contents will also succeed.
5332 If we find an equivalent identical to the destination, use it as best,
5333 since this insn will probably be eliminated in that case. */
5336 if (rtx_equal_p (src, dest))
5337 src_cost = src_regcost = -1;
5340 src_cost = COST (src);
5341 src_regcost = approx_reg_cost (src);
5347 if (rtx_equal_p (src_eqv_here, dest))
5348 src_eqv_cost = src_eqv_regcost = -1;
5351 src_eqv_cost = COST (src_eqv_here);
5352 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5358 if (rtx_equal_p (src_folded, dest))
5359 src_folded_cost = src_folded_regcost = -1;
5362 src_folded_cost = COST (src_folded);
5363 src_folded_regcost = approx_reg_cost (src_folded);
5369 if (rtx_equal_p (src_related, dest))
5370 src_related_cost = src_related_regcost = -1;
5373 src_related_cost = COST (src_related);
5374 src_related_regcost = approx_reg_cost (src_related);
5378 /* If this was an indirect jump insn, a known label will really be
5379 cheaper even though it looks more expensive. */
5380 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5381 src_folded = src_const, src_folded_cost = src_folded_regcost -1;
5383 /* Terminate loop when replacement made. This must terminate since
5384 the current contents will be tested and will always be valid. */
5389 /* Skip invalid entries. */
5390 while (elt && GET_CODE (elt->exp) != REG
5391 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5392 elt = elt->next_same_value;
5394 /* A paradoxical subreg would be bad here: it'll be the right
5395 size, but later may be adjusted so that the upper bits aren't
5396 what we want. So reject it. */
5398 && GET_CODE (elt->exp) == SUBREG
5399 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5400 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5401 /* It is okay, though, if the rtx we're trying to match
5402 will ignore any of the bits we can't predict. */
5404 && GET_CODE (src) == SUBREG
5405 && GET_MODE (src) == GET_MODE (elt->exp)
5406 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5407 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5409 elt = elt->next_same_value;
5415 src_elt_cost = elt->cost;
5416 src_elt_regcost = elt->regcost;
5419 /* Find cheapest and skip it for the next time. For items
5420 of equal cost, use this order:
5421 src_folded, src, src_eqv, src_related and hash table entry. */
5422 if (preferrable (src_folded_cost, src_folded_regcost,
5423 src_cost, src_regcost) <= 0
5424 && preferrable (src_folded_cost, src_folded_regcost,
5425 src_eqv_cost, src_eqv_regcost) <= 0
5426 && preferrable (src_folded_cost, src_folded_regcost,
5427 src_related_cost, src_related_regcost) <= 0
5428 && preferrable (src_folded_cost, src_folded_regcost,
5429 src_elt_cost, src_elt_regcost) <= 0)
5431 trial = src_folded, src_folded_cost = MAX_COST;
5432 if (src_folded_force_flag)
5433 trial = force_const_mem (mode, trial);
5435 else if (preferrable (src_cost, src_regcost,
5436 src_eqv_cost, src_eqv_regcost) <= 0
5437 && preferrable (src_cost, src_regcost,
5438 src_related_cost, src_related_regcost) <= 0
5439 && preferrable (src_cost, src_regcost,
5440 src_elt_cost, src_elt_regcost) <= 0)
5441 trial = src, src_cost = MAX_COST;
5442 else if (preferrable (src_eqv_cost, src_eqv_regcost,
5443 src_related_cost, src_related_regcost) <= 0
5444 && preferrable (src_eqv_cost, src_eqv_regcost,
5445 src_elt_cost, src_elt_regcost) <= 0)
5446 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5447 else if (preferrable (src_related_cost, src_related_regcost,
5448 src_elt_cost, src_elt_regcost) <= 0)
5449 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5452 trial = copy_rtx (elt->exp);
5453 elt = elt->next_same_value;
5454 src_elt_cost = MAX_COST;
5457 /* We don't normally have an insn matching (set (pc) (pc)), so
5458 check for this separately here. We will delete such an
5461 Tablejump insns contain a USE of the table, so simply replacing
5462 the operand with the constant won't match. This is simply an
5463 unconditional branch, however, and is therefore valid. Just
5464 insert the substitution here and we will delete and re-emit
5467 if (n_sets == 1 && dest == pc_rtx
5469 || (GET_CODE (trial) == LABEL_REF
5470 && ! condjump_p (insn))))
5472 if (trial == pc_rtx)
5474 SET_SRC (sets[i].rtl) = trial;
5475 cse_jumps_altered = 1;
5479 PATTERN (insn) = gen_jump (XEXP (trial, 0));
5480 INSN_CODE (insn) = -1;
5482 if (NEXT_INSN (insn) != 0
5483 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5484 emit_barrier_after (insn);
5486 cse_jumps_altered = 1;
5490 /* Look for a substitution that makes a valid insn. */
5491 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5493 /* If we just made a substitution inside a libcall, then we
5494 need to make the same substitution in any notes attached
5495 to the RETVAL insn. */
5497 && (GET_CODE (sets[i].orig_src) == REG
5498 || GET_CODE (sets[i].orig_src) == SUBREG
5499 || GET_CODE (sets[i].orig_src) == MEM))
5500 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5501 canon_reg (SET_SRC (sets[i].rtl), insn));
5503 /* The result of apply_change_group can be ignored; see
5506 validate_change (insn, &SET_SRC (sets[i].rtl),
5507 canon_reg (SET_SRC (sets[i].rtl), insn),
5509 apply_change_group ();
5513 /* If we previously found constant pool entries for
5514 constants and this is a constant, try making a
5515 pool entry. Put it in src_folded unless we already have done
5516 this since that is where it likely came from. */
5518 else if (constant_pool_entries_cost
5519 && CONSTANT_P (trial)
5520 /* Reject cases that will abort in decode_rtx_const.
5521 On the alpha when simplifying a switch, we get
5522 (const (truncate (minus (label_ref) (label_ref)))). */
5523 && ! (GET_CODE (trial) == CONST
5524 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5525 /* Likewise on IA-64, except without the truncate. */
5526 && ! (GET_CODE (trial) == CONST
5527 && GET_CODE (XEXP (trial, 0)) == MINUS
5528 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5529 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5531 || (GET_CODE (src_folded) != MEM
5532 && ! src_folded_force_flag))
5533 && GET_MODE_CLASS (mode) != MODE_CC
5534 && mode != VOIDmode)
5536 src_folded_force_flag = 1;
5538 src_folded_cost = constant_pool_entries_cost;
5542 src = SET_SRC (sets[i].rtl);
5544 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5545 However, there is an important exception: If both are registers
5546 that are not the head of their equivalence class, replace SET_SRC
5547 with the head of the class. If we do not do this, we will have
5548 both registers live over a portion of the basic block. This way,
5549 their lifetimes will likely abut instead of overlapping. */
5550 if (GET_CODE (dest) == REG
5551 && REGNO_QTY_VALID_P (REGNO (dest)))
5553 int dest_q = REG_QTY (REGNO (dest));
5554 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5556 if (dest_ent->mode == GET_MODE (dest)
5557 && dest_ent->first_reg != REGNO (dest)
5558 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5559 /* Don't do this if the original insn had a hard reg as
5560 SET_SRC or SET_DEST. */
5561 && (GET_CODE (sets[i].src) != REG
5562 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5563 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5564 /* We can't call canon_reg here because it won't do anything if
5565 SRC is a hard register. */
5567 int src_q = REG_QTY (REGNO (src));
5568 struct qty_table_elem *src_ent = &qty_table[src_q];
5569 int first = src_ent->first_reg;
5571 = (first >= FIRST_PSEUDO_REGISTER
5572 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5574 /* We must use validate-change even for this, because this
5575 might be a special no-op instruction, suitable only to
5577 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5580 /* If we had a constant that is cheaper than what we are now
5581 setting SRC to, use that constant. We ignored it when we
5582 thought we could make this into a no-op. */
5583 if (src_const && COST (src_const) < COST (src)
5584 && validate_change (insn, &SET_SRC (sets[i].rtl),
5591 /* If we made a change, recompute SRC values. */
5592 if (src != sets[i].src)
5596 hash_arg_in_memory = 0;
5598 sets[i].src_hash = HASH (src, mode);
5599 sets[i].src_volatile = do_not_record;
5600 sets[i].src_in_memory = hash_arg_in_memory;
5601 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5604 /* If this is a single SET, we are setting a register, and we have an
5605 equivalent constant, we want to add a REG_NOTE. We don't want
5606 to write a REG_EQUAL note for a constant pseudo since verifying that
5607 that pseudo hasn't been eliminated is a pain. Such a note also
5608 won't help anything.
5610 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5611 which can be created for a reference to a compile time computable
5612 entry in a jump table. */
5614 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5615 && GET_CODE (src_const) != REG
5616 && ! (GET_CODE (src_const) == CONST
5617 && GET_CODE (XEXP (src_const, 0)) == MINUS
5618 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5619 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5621 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5623 /* Make sure that the rtx is not shared with any other insn. */
5624 src_const = copy_rtx (src_const);
5626 /* Record the actual constant value in a REG_EQUAL note, making
5627 a new one if one does not already exist. */
5629 XEXP (tem, 0) = src_const;
5631 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5632 src_const, REG_NOTES (insn));
5634 /* If storing a constant value in a register that
5635 previously held the constant value 0,
5636 record this fact with a REG_WAS_0 note on this insn.
5638 Note that the *register* is required to have previously held 0,
5639 not just any register in the quantity and we must point to the
5640 insn that set that register to zero.
5642 Rather than track each register individually, we just see if
5643 the last set for this quantity was for this register. */
5645 if (REGNO_QTY_VALID_P (REGNO (dest)))
5647 int dest_q = REG_QTY (REGNO (dest));
5648 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5650 if (dest_ent->const_rtx == const0_rtx)
5652 /* See if we previously had a REG_WAS_0 note. */
5653 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5654 rtx const_insn = dest_ent->const_insn;
5656 if ((tem = single_set (const_insn)) != 0
5657 && rtx_equal_p (SET_DEST (tem), dest))
5660 XEXP (note, 0) = const_insn;
5663 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5670 /* Now deal with the destination. */
5673 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5674 to the MEM or REG within it. */
5675 while (GET_CODE (dest) == SIGN_EXTRACT
5676 || GET_CODE (dest) == ZERO_EXTRACT
5677 || GET_CODE (dest) == SUBREG
5678 || GET_CODE (dest) == STRICT_LOW_PART)
5679 dest = XEXP (dest, 0);
5681 sets[i].inner_dest = dest;
5683 if (GET_CODE (dest) == MEM)
5685 #ifdef PUSH_ROUNDING
5686 /* Stack pushes invalidate the stack pointer. */
5687 rtx addr = XEXP (dest, 0);
5688 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5689 && XEXP (addr, 0) == stack_pointer_rtx)
5690 invalidate (stack_pointer_rtx, Pmode);
5692 dest = fold_rtx (dest, insn);
5695 /* Compute the hash code of the destination now,
5696 before the effects of this instruction are recorded,
5697 since the register values used in the address computation
5698 are those before this instruction. */
5699 sets[i].dest_hash = HASH (dest, mode);
5701 /* Don't enter a bit-field in the hash table
5702 because the value in it after the store
5703 may not equal what was stored, due to truncation. */
5705 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5706 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5708 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5710 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5711 && GET_CODE (width) == CONST_INT
5712 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5713 && ! (INTVAL (src_const)
5714 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5715 /* Exception: if the value is constant,
5716 and it won't be truncated, record it. */
5720 /* This is chosen so that the destination will be invalidated
5721 but no new value will be recorded.
5722 We must invalidate because sometimes constant
5723 values can be recorded for bitfields. */
5724 sets[i].src_elt = 0;
5725 sets[i].src_volatile = 1;
5731 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5733 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5735 /* One less use of the label this insn used to jump to. */
5736 if (JUMP_LABEL (insn) != 0)
5737 --LABEL_NUSES (JUMP_LABEL (insn));
5738 PUT_CODE (insn, NOTE);
5739 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5740 NOTE_SOURCE_FILE (insn) = 0;
5741 cse_jumps_altered = 1;
5742 /* No more processing for this set. */
5746 /* If this SET is now setting PC to a label, we know it used to
5747 be a conditional or computed branch. So we see if we can follow
5748 it. If it was a computed branch, delete it and re-emit. */
5749 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5751 /* If this is not in the format for a simple branch and
5752 we are the only SET in it, re-emit it. */
5753 if (! simplejump_p (insn) && n_sets == 1)
5755 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5756 JUMP_LABEL (new) = XEXP (src, 0);
5757 LABEL_NUSES (XEXP (src, 0))++;
5761 /* Otherwise, force rerecognition, since it probably had
5762 a different pattern before.
5763 This shouldn't really be necessary, since whatever
5764 changed the source value above should have done this.
5765 Until the right place is found, might as well do this here. */
5766 INSN_CODE (insn) = -1;
5768 never_reached_warning (insn);
5770 /* Now emit a BARRIER after the unconditional jump. Do not bother
5771 deleting any unreachable code, let jump/flow do that. */
5772 if (NEXT_INSN (insn) != 0
5773 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5774 emit_barrier_after (insn);
5776 cse_jumps_altered = 1;
5780 /* If destination is volatile, invalidate it and then do no further
5781 processing for this assignment. */
5783 else if (do_not_record)
5785 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5786 invalidate (dest, VOIDmode);
5787 else if (GET_CODE (dest) == MEM)
5789 /* Outgoing arguments for a libcall don't
5790 affect any recorded expressions. */
5791 if (! libcall_insn || insn == libcall_insn)
5792 invalidate (dest, VOIDmode);
5794 else if (GET_CODE (dest) == STRICT_LOW_PART
5795 || GET_CODE (dest) == ZERO_EXTRACT)
5796 invalidate (XEXP (dest, 0), GET_MODE (dest));
5800 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5801 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5804 /* If setting CC0, record what it was set to, or a constant, if it
5805 is equivalent to a constant. If it is being set to a floating-point
5806 value, make a COMPARE with the appropriate constant of 0. If we
5807 don't do this, later code can interpret this as a test against
5808 const0_rtx, which can cause problems if we try to put it into an
5809 insn as a floating-point operand. */
5810 if (dest == cc0_rtx)
5812 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5813 this_insn_cc0_mode = mode;
5814 if (FLOAT_MODE_P (mode))
5815 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5821 /* Now enter all non-volatile source expressions in the hash table
5822 if they are not already present.
5823 Record their equivalence classes in src_elt.
5824 This way we can insert the corresponding destinations into
5825 the same classes even if the actual sources are no longer in them
5826 (having been invalidated). */
5828 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5829 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5831 register struct table_elt *elt;
5832 register struct table_elt *classp = sets[0].src_elt;
5833 rtx dest = SET_DEST (sets[0].rtl);
5834 enum machine_mode eqvmode = GET_MODE (dest);
5836 if (GET_CODE (dest) == STRICT_LOW_PART)
5838 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5841 if (insert_regs (src_eqv, classp, 0))
5843 rehash_using_reg (src_eqv);
5844 src_eqv_hash = HASH (src_eqv, eqvmode);
5846 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5847 elt->in_memory = src_eqv_in_memory;
5850 /* Check to see if src_eqv_elt is the same as a set source which
5851 does not yet have an elt, and if so set the elt of the set source
5853 for (i = 0; i < n_sets; i++)
5854 if (sets[i].rtl && sets[i].src_elt == 0
5855 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5856 sets[i].src_elt = src_eqv_elt;
5859 for (i = 0; i < n_sets; i++)
5860 if (sets[i].rtl && ! sets[i].src_volatile
5861 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5863 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5865 /* REG_EQUAL in setting a STRICT_LOW_PART
5866 gives an equivalent for the entire destination register,
5867 not just for the subreg being stored in now.
5868 This is a more interesting equivalence, so we arrange later
5869 to treat the entire reg as the destination. */
5870 sets[i].src_elt = src_eqv_elt;
5871 sets[i].src_hash = src_eqv_hash;
5875 /* Insert source and constant equivalent into hash table, if not
5877 register struct table_elt *classp = src_eqv_elt;
5878 register rtx src = sets[i].src;
5879 register rtx dest = SET_DEST (sets[i].rtl);
5880 enum machine_mode mode
5881 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5883 if (sets[i].src_elt == 0)
5885 /* Don't put a hard register source into the table if this is
5886 the last insn of a libcall. In this case, we only need
5887 to put src_eqv_elt in src_elt. */
5888 if (GET_CODE (src) != REG
5889 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5890 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5892 register struct table_elt *elt;
5894 /* Note that these insert_regs calls cannot remove
5895 any of the src_elt's, because they would have failed to
5896 match if not still valid. */
5897 if (insert_regs (src, classp, 0))
5899 rehash_using_reg (src);
5900 sets[i].src_hash = HASH (src, mode);
5902 elt = insert (src, classp, sets[i].src_hash, mode);
5903 elt->in_memory = sets[i].src_in_memory;
5904 sets[i].src_elt = classp = elt;
5907 sets[i].src_elt = classp;
5909 if (sets[i].src_const && sets[i].src_const_elt == 0
5910 && src != sets[i].src_const
5911 && ! rtx_equal_p (sets[i].src_const, src))
5912 sets[i].src_elt = insert (sets[i].src_const, classp,
5913 sets[i].src_const_hash, mode);
5916 else if (sets[i].src_elt == 0)
5917 /* If we did not insert the source into the hash table (e.g., it was
5918 volatile), note the equivalence class for the REG_EQUAL value, if any,
5919 so that the destination goes into that class. */
5920 sets[i].src_elt = src_eqv_elt;
5922 invalidate_from_clobbers (x);
5924 /* Some registers are invalidated by subroutine calls. Memory is
5925 invalidated by non-constant calls. */
5927 if (GET_CODE (insn) == CALL_INSN)
5929 if (! CONST_CALL_P (insn))
5930 invalidate_memory ();
5931 invalidate_for_call ();
5934 /* Now invalidate everything set by this instruction.
5935 If a SUBREG or other funny destination is being set,
5936 sets[i].rtl is still nonzero, so here we invalidate the reg
5937 a part of which is being set. */
5939 for (i = 0; i < n_sets; i++)
5942 /* We can't use the inner dest, because the mode associated with
5943 a ZERO_EXTRACT is significant. */
5944 register rtx dest = SET_DEST (sets[i].rtl);
5946 /* Needed for registers to remove the register from its
5947 previous quantity's chain.
5948 Needed for memory if this is a nonvarying address, unless
5949 we have just done an invalidate_memory that covers even those. */
5950 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5951 invalidate (dest, VOIDmode);
5952 else if (GET_CODE (dest) == MEM)
5954 /* Outgoing arguments for a libcall don't
5955 affect any recorded expressions. */
5956 if (! libcall_insn || insn == libcall_insn)
5957 invalidate (dest, VOIDmode);
5959 else if (GET_CODE (dest) == STRICT_LOW_PART
5960 || GET_CODE (dest) == ZERO_EXTRACT)
5961 invalidate (XEXP (dest, 0), GET_MODE (dest));
5964 /* A volatile ASM invalidates everything. */
5965 if (GET_CODE (insn) == INSN
5966 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5967 && MEM_VOLATILE_P (PATTERN (insn)))
5968 flush_hash_table ();
5970 /* Make sure registers mentioned in destinations
5971 are safe for use in an expression to be inserted.
5972 This removes from the hash table
5973 any invalid entry that refers to one of these registers.
5975 We don't care about the return value from mention_regs because
5976 we are going to hash the SET_DEST values unconditionally. */
5978 for (i = 0; i < n_sets; i++)
5982 rtx x = SET_DEST (sets[i].rtl);
5984 if (GET_CODE (x) != REG)
5988 /* We used to rely on all references to a register becoming
5989 inaccessible when a register changes to a new quantity,
5990 since that changes the hash code. However, that is not
5991 safe, since after HASH_SIZE new quantities we get a
5992 hash 'collision' of a register with its own invalid
5993 entries. And since SUBREGs have been changed not to
5994 change their hash code with the hash code of the register,
5995 it wouldn't work any longer at all. So we have to check
5996 for any invalid references lying around now.
5997 This code is similar to the REG case in mention_regs,
5998 but it knows that reg_tick has been incremented, and
5999 it leaves reg_in_table as -1 . */
6000 unsigned int regno = REGNO (x);
6001 unsigned int endregno
6002 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6003 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6006 for (i = regno; i < endregno; i++)
6008 if (REG_IN_TABLE (i) >= 0)
6010 remove_invalid_refs (i);
6011 REG_IN_TABLE (i) = -1;
6018 /* We may have just removed some of the src_elt's from the hash table.
6019 So replace each one with the current head of the same class. */
6021 for (i = 0; i < n_sets; i++)
6024 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6025 /* If elt was removed, find current head of same class,
6026 or 0 if nothing remains of that class. */
6028 register struct table_elt *elt = sets[i].src_elt;
6030 while (elt && elt->prev_same_value)
6031 elt = elt->prev_same_value;
6033 while (elt && elt->first_same_value == 0)
6034 elt = elt->next_same_value;
6035 sets[i].src_elt = elt ? elt->first_same_value : 0;
6039 /* Now insert the destinations into their equivalence classes. */
6041 for (i = 0; i < n_sets; i++)
6044 register rtx dest = SET_DEST (sets[i].rtl);
6045 rtx inner_dest = sets[i].inner_dest;
6046 register struct table_elt *elt;
6048 /* Don't record value if we are not supposed to risk allocating
6049 floating-point values in registers that might be wider than
6051 if ((flag_float_store
6052 && GET_CODE (dest) == MEM
6053 && FLOAT_MODE_P (GET_MODE (dest)))
6054 /* Don't record BLKmode values, because we don't know the
6055 size of it, and can't be sure that other BLKmode values
6056 have the same or smaller size. */
6057 || GET_MODE (dest) == BLKmode
6058 /* Don't record values of destinations set inside a libcall block
6059 since we might delete the libcall. Things should have been set
6060 up so we won't want to reuse such a value, but we play it safe
6063 /* If we didn't put a REG_EQUAL value or a source into the hash
6064 table, there is no point is recording DEST. */
6065 || sets[i].src_elt == 0
6066 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6067 or SIGN_EXTEND, don't record DEST since it can cause
6068 some tracking to be wrong.
6070 ??? Think about this more later. */
6071 || (GET_CODE (dest) == SUBREG
6072 && (GET_MODE_SIZE (GET_MODE (dest))
6073 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6074 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6075 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6078 /* STRICT_LOW_PART isn't part of the value BEING set,
6079 and neither is the SUBREG inside it.
6080 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6081 if (GET_CODE (dest) == STRICT_LOW_PART)
6082 dest = SUBREG_REG (XEXP (dest, 0));
6084 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6085 /* Registers must also be inserted into chains for quantities. */
6086 if (insert_regs (dest, sets[i].src_elt, 1))
6088 /* If `insert_regs' changes something, the hash code must be
6090 rehash_using_reg (dest);
6091 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6094 if (GET_CODE (inner_dest) == MEM
6095 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6096 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6097 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6098 Consider the case in which the address of the MEM is
6099 passed to a function, which alters the MEM. Then, if we
6100 later use Y instead of the MEM we'll miss the update. */
6101 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6103 elt = insert (dest, sets[i].src_elt,
6104 sets[i].dest_hash, GET_MODE (dest));
6106 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6107 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6108 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
6111 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6112 narrower than M2, and both M1 and M2 are the same number of words,
6113 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6114 make that equivalence as well.
6116 However, BAR may have equivalences for which gen_lowpart_if_possible
6117 will produce a simpler value than gen_lowpart_if_possible applied to
6118 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6119 BAR's equivalences. If we don't get a simplified form, make
6120 the SUBREG. It will not be used in an equivalence, but will
6121 cause two similar assignments to be detected.
6123 Note the loop below will find SUBREG_REG (DEST) since we have
6124 already entered SRC and DEST of the SET in the table. */
6126 if (GET_CODE (dest) == SUBREG
6127 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6129 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6130 && (GET_MODE_SIZE (GET_MODE (dest))
6131 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6132 && sets[i].src_elt != 0)
6134 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6135 struct table_elt *elt, *classp = 0;
6137 for (elt = sets[i].src_elt->first_same_value; elt;
6138 elt = elt->next_same_value)
6142 struct table_elt *src_elt;
6144 /* Ignore invalid entries. */
6145 if (GET_CODE (elt->exp) != REG
6146 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6149 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6151 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6153 src_hash = HASH (new_src, new_mode);
6154 src_elt = lookup (new_src, src_hash, new_mode);
6156 /* Put the new source in the hash table is if isn't
6160 if (insert_regs (new_src, classp, 0))
6162 rehash_using_reg (new_src);
6163 src_hash = HASH (new_src, new_mode);
6165 src_elt = insert (new_src, classp, src_hash, new_mode);
6166 src_elt->in_memory = elt->in_memory;
6168 else if (classp && classp != src_elt->first_same_value)
6169 /* Show that two things that we've seen before are
6170 actually the same. */
6171 merge_equiv_classes (src_elt, classp);
6173 classp = src_elt->first_same_value;
6174 /* Ignore invalid entries. */
6176 && GET_CODE (classp->exp) != REG
6177 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6178 classp = classp->next_same_value;
6183 /* Special handling for (set REG0 REG1) where REG0 is the
6184 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6185 be used in the sequel, so (if easily done) change this insn to
6186 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6187 that computed their value. Then REG1 will become a dead store
6188 and won't cloud the situation for later optimizations.
6190 Do not make this change if REG1 is a hard register, because it will
6191 then be used in the sequel and we may be changing a two-operand insn
6192 into a three-operand insn.
6194 Also do not do this if we are operating on a copy of INSN.
6196 Also don't do this if INSN ends a libcall; this would cause an unrelated
6197 register to be set in the middle of a libcall, and we then get bad code
6198 if the libcall is deleted. */
6200 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6201 && NEXT_INSN (PREV_INSN (insn)) == insn
6202 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6203 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6204 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6206 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6207 struct qty_table_elem *src_ent = &qty_table[src_q];
6209 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6210 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6212 rtx prev = prev_nonnote_insn (insn);
6214 if (prev != 0 && GET_CODE (prev) == INSN
6215 && GET_CODE (PATTERN (prev)) == SET
6216 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
6218 rtx dest = SET_DEST (sets[0].rtl);
6219 rtx src = SET_SRC (sets[0].rtl);
6220 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
6222 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6223 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6224 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6225 apply_change_group ();
6227 /* If REG1 was equivalent to a constant, REG0 is not. */
6229 PUT_REG_NOTE_KIND (note, REG_EQUAL);
6231 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6232 any REG_WAS_0 note on INSN to PREV. */
6233 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6235 remove_note (prev, note);
6237 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6240 remove_note (insn, note);
6241 XEXP (note, 1) = REG_NOTES (prev);
6242 REG_NOTES (prev) = note;
6245 /* If INSN has a REG_EQUAL note, and this note mentions
6246 REG0, then we must delete it, because the value in
6247 REG0 has changed. If the note's value is REG1, we must
6248 also delete it because that is now this insn's dest. */
6249 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6251 && (reg_mentioned_p (dest, XEXP (note, 0))
6252 || rtx_equal_p (src, XEXP (note, 0))))
6253 remove_note (insn, note);
6258 /* If this is a conditional jump insn, record any known equivalences due to
6259 the condition being tested. */
6261 last_jump_equiv_class = 0;
6262 if (GET_CODE (insn) == JUMP_INSN
6263 && n_sets == 1 && GET_CODE (x) == SET
6264 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6265 record_jump_equiv (insn, 0);
6268 /* If the previous insn set CC0 and this insn no longer references CC0,
6269 delete the previous insn. Here we use the fact that nothing expects CC0
6270 to be valid over an insn, which is true until the final pass. */
6271 if (prev_insn && GET_CODE (prev_insn) == INSN
6272 && (tem = single_set (prev_insn)) != 0
6273 && SET_DEST (tem) == cc0_rtx
6274 && ! reg_mentioned_p (cc0_rtx, x))
6276 PUT_CODE (prev_insn, NOTE);
6277 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6278 NOTE_SOURCE_FILE (prev_insn) = 0;
6281 prev_insn_cc0 = this_insn_cc0;
6282 prev_insn_cc0_mode = this_insn_cc0_mode;
6288 /* Remove from the hash table all expressions that reference memory. */
6291 invalidate_memory ()
6294 register struct table_elt *p, *next;
6296 for (i = 0; i < HASH_SIZE; i++)
6297 for (p = table[i]; p; p = next)
6299 next = p->next_same_hash;
6301 remove_from_table (p, i);
6305 /* If ADDR is an address that implicitly affects the stack pointer, return
6306 1 and update the register tables to show the effect. Else, return 0. */
6309 addr_affects_sp_p (addr)
6312 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6313 && GET_CODE (XEXP (addr, 0)) == REG
6314 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6316 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6317 REG_TICK (STACK_POINTER_REGNUM)++;
6319 /* This should be *very* rare. */
6320 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6321 invalidate (stack_pointer_rtx, VOIDmode);
6329 /* Perform invalidation on the basis of everything about an insn
6330 except for invalidating the actual places that are SET in it.
6331 This includes the places CLOBBERed, and anything that might
6332 alias with something that is SET or CLOBBERed.
6334 X is the pattern of the insn. */
6337 invalidate_from_clobbers (x)
6340 if (GET_CODE (x) == CLOBBER)
6342 rtx ref = XEXP (x, 0);
6345 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6346 || GET_CODE (ref) == MEM)
6347 invalidate (ref, VOIDmode);
6348 else if (GET_CODE (ref) == STRICT_LOW_PART
6349 || GET_CODE (ref) == ZERO_EXTRACT)
6350 invalidate (XEXP (ref, 0), GET_MODE (ref));
6353 else if (GET_CODE (x) == PARALLEL)
6356 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6358 register rtx y = XVECEXP (x, 0, i);
6359 if (GET_CODE (y) == CLOBBER)
6361 rtx ref = XEXP (y, 0);
6362 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6363 || GET_CODE (ref) == MEM)
6364 invalidate (ref, VOIDmode);
6365 else if (GET_CODE (ref) == STRICT_LOW_PART
6366 || GET_CODE (ref) == ZERO_EXTRACT)
6367 invalidate (XEXP (ref, 0), GET_MODE (ref));
6373 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6374 and replace any registers in them with either an equivalent constant
6375 or the canonical form of the register. If we are inside an address,
6376 only do this if the address remains valid.
6378 OBJECT is 0 except when within a MEM in which case it is the MEM.
6380 Return the replacement for X. */
6383 cse_process_notes (x, object)
6387 enum rtx_code code = GET_CODE (x);
6388 const char *fmt = GET_RTX_FORMAT (code);
6404 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6409 if (REG_NOTE_KIND (x) == REG_EQUAL)
6410 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6412 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6419 rtx new = cse_process_notes (XEXP (x, 0), object);
6420 /* We don't substitute VOIDmode constants into these rtx,
6421 since they would impede folding. */
6422 if (GET_MODE (new) != VOIDmode)
6423 validate_change (object, &XEXP (x, 0), new, 0);
6428 i = REG_QTY (REGNO (x));
6430 /* Return a constant or a constant register. */
6431 if (REGNO_QTY_VALID_P (REGNO (x)))
6433 struct qty_table_elem *ent = &qty_table[i];
6435 if (ent->const_rtx != NULL_RTX
6436 && (CONSTANT_P (ent->const_rtx)
6437 || GET_CODE (ent->const_rtx) == REG))
6439 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6445 /* Otherwise, canonicalize this register. */
6446 return canon_reg (x, NULL_RTX);
6452 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6454 validate_change (object, &XEXP (x, i),
6455 cse_process_notes (XEXP (x, i), object), 0);
6460 /* Find common subexpressions between the end test of a loop and the beginning
6461 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6463 Often we have a loop where an expression in the exit test is used
6464 in the body of the loop. For example "while (*p) *q++ = *p++;".
6465 Because of the way we duplicate the loop exit test in front of the loop,
6466 however, we don't detect that common subexpression. This will be caught
6467 when global cse is implemented, but this is a quite common case.
6469 This function handles the most common cases of these common expressions.
6470 It is called after we have processed the basic block ending with the
6471 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6472 jumps to a label used only once. */
6475 cse_around_loop (loop_start)
6480 struct table_elt *p;
6482 /* If the jump at the end of the loop doesn't go to the start, we don't
6484 for (insn = PREV_INSN (loop_start);
6485 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6486 insn = PREV_INSN (insn))
6490 || GET_CODE (insn) != NOTE
6491 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6494 /* If the last insn of the loop (the end test) was an NE comparison,
6495 we will interpret it as an EQ comparison, since we fell through
6496 the loop. Any equivalences resulting from that comparison are
6497 therefore not valid and must be invalidated. */
6498 if (last_jump_equiv_class)
6499 for (p = last_jump_equiv_class->first_same_value; p;
6500 p = p->next_same_value)
6502 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6503 || (GET_CODE (p->exp) == SUBREG
6504 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6505 invalidate (p->exp, VOIDmode);
6506 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6507 || GET_CODE (p->exp) == ZERO_EXTRACT)
6508 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6511 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6512 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6514 The only thing we do with SET_DEST is invalidate entries, so we
6515 can safely process each SET in order. It is slightly less efficient
6516 to do so, but we only want to handle the most common cases.
6518 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6519 These pseudos won't have valid entries in any of the tables indexed
6520 by register number, such as reg_qty. We avoid out-of-range array
6521 accesses by not processing any instructions created after cse started. */
6523 for (insn = NEXT_INSN (loop_start);
6524 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6525 && INSN_UID (insn) < max_insn_uid
6526 && ! (GET_CODE (insn) == NOTE
6527 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6528 insn = NEXT_INSN (insn))
6531 && (GET_CODE (PATTERN (insn)) == SET
6532 || GET_CODE (PATTERN (insn)) == CLOBBER))
6533 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6534 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6535 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6536 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6537 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6538 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6543 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6544 since they are done elsewhere. This function is called via note_stores. */
6547 invalidate_skipped_set (dest, set, data)
6550 void *data ATTRIBUTE_UNUSED;
6552 enum rtx_code code = GET_CODE (dest);
6555 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6556 /* There are times when an address can appear varying and be a PLUS
6557 during this scan when it would be a fixed address were we to know
6558 the proper equivalences. So invalidate all memory if there is
6559 a BLKmode or nonscalar memory reference or a reference to a
6560 variable address. */
6561 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6562 || cse_rtx_varies_p (XEXP (dest, 0))))
6564 invalidate_memory ();
6568 if (GET_CODE (set) == CLOBBER
6575 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6576 invalidate (XEXP (dest, 0), GET_MODE (dest));
6577 else if (code == REG || code == SUBREG || code == MEM)
6578 invalidate (dest, VOIDmode);
6581 /* Invalidate all insns from START up to the end of the function or the
6582 next label. This called when we wish to CSE around a block that is
6583 conditionally executed. */
6586 invalidate_skipped_block (start)
6591 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6592 insn = NEXT_INSN (insn))
6594 if (! INSN_P (insn))
6597 if (GET_CODE (insn) == CALL_INSN)
6599 if (! CONST_CALL_P (insn))
6600 invalidate_memory ();
6601 invalidate_for_call ();
6604 invalidate_from_clobbers (PATTERN (insn));
6605 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6609 /* If modifying X will modify the value in *DATA (which is really an
6610 `rtx *'), indicate that fact by setting the pointed to value to
6614 cse_check_loop_start (x, set, data)
6616 rtx set ATTRIBUTE_UNUSED;
6619 rtx *cse_check_loop_start_value = (rtx *) data;
6621 if (*cse_check_loop_start_value == NULL_RTX
6622 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6625 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6626 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6627 *cse_check_loop_start_value = NULL_RTX;
6630 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6631 a loop that starts with the label at LOOP_START.
6633 If X is a SET, we see if its SET_SRC is currently in our hash table.
6634 If so, we see if it has a value equal to some register used only in the
6635 loop exit code (as marked by jump.c).
6637 If those two conditions are true, we search backwards from the start of
6638 the loop to see if that same value was loaded into a register that still
6639 retains its value at the start of the loop.
6641 If so, we insert an insn after the load to copy the destination of that
6642 load into the equivalent register and (try to) replace our SET_SRC with that
6645 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6648 cse_set_around_loop (x, insn, loop_start)
6653 struct table_elt *src_elt;
6655 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6656 are setting PC or CC0 or whose SET_SRC is already a register. */
6657 if (GET_CODE (x) == SET
6658 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6659 && GET_CODE (SET_SRC (x)) != REG)
6661 src_elt = lookup (SET_SRC (x),
6662 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6663 GET_MODE (SET_DEST (x)));
6666 for (src_elt = src_elt->first_same_value; src_elt;
6667 src_elt = src_elt->next_same_value)
6668 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6669 && COST (src_elt->exp) < COST (SET_SRC (x)))
6673 /* Look for an insn in front of LOOP_START that sets
6674 something in the desired mode to SET_SRC (x) before we hit
6675 a label or CALL_INSN. */
6677 for (p = prev_nonnote_insn (loop_start);
6678 p && GET_CODE (p) != CALL_INSN
6679 && GET_CODE (p) != CODE_LABEL;
6680 p = prev_nonnote_insn (p))
6681 if ((set = single_set (p)) != 0
6682 && GET_CODE (SET_DEST (set)) == REG
6683 && GET_MODE (SET_DEST (set)) == src_elt->mode
6684 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6686 /* We now have to ensure that nothing between P
6687 and LOOP_START modified anything referenced in
6688 SET_SRC (x). We know that nothing within the loop
6689 can modify it, or we would have invalidated it in
6692 rtx cse_check_loop_start_value = SET_SRC (x);
6693 for (q = p; q != loop_start; q = NEXT_INSN (q))
6695 note_stores (PATTERN (q),
6696 cse_check_loop_start,
6697 &cse_check_loop_start_value);
6699 /* If nothing was changed and we can replace our
6700 SET_SRC, add an insn after P to copy its destination
6701 to what we will be replacing SET_SRC with. */
6702 if (cse_check_loop_start_value
6703 && validate_change (insn, &SET_SRC (x),
6706 /* If this creates new pseudos, this is unsafe,
6707 because the regno of new pseudo is unsuitable
6708 to index into reg_qty when cse_insn processes
6709 the new insn. Therefore, if a new pseudo was
6710 created, discard this optimization. */
6711 int nregs = max_reg_num ();
6713 = gen_move_insn (src_elt->exp, SET_DEST (set));
6714 if (nregs != max_reg_num ())
6716 if (! validate_change (insn, &SET_SRC (x),
6721 emit_insn_after (move, p);
6728 /* Deal with the destination of X affecting the stack pointer. */
6729 addr_affects_sp_p (SET_DEST (x));
6731 /* See comment on similar code in cse_insn for explanation of these
6733 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6734 || GET_CODE (SET_DEST (x)) == MEM)
6735 invalidate (SET_DEST (x), VOIDmode);
6736 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6737 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6738 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6741 /* Find the end of INSN's basic block and return its range,
6742 the total number of SETs in all the insns of the block, the last insn of the
6743 block, and the branch path.
6745 The branch path indicates which branches should be followed. If a non-zero
6746 path size is specified, the block should be rescanned and a different set
6747 of branches will be taken. The branch path is only used if
6748 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6750 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6751 used to describe the block. It is filled in with the information about
6752 the current block. The incoming structure's branch path, if any, is used
6753 to construct the output branch path. */
6756 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6758 struct cse_basic_block_data *data;
6765 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6766 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6767 int path_size = data->path_size;
6771 /* Update the previous branch path, if any. If the last branch was
6772 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6773 shorten the path by one and look at the previous branch. We know that
6774 at least one branch must have been taken if PATH_SIZE is non-zero. */
6775 while (path_size > 0)
6777 if (data->path[path_size - 1].status != NOT_TAKEN)
6779 data->path[path_size - 1].status = NOT_TAKEN;
6786 /* If the first instruction is marked with QImode, that means we've
6787 already processed this block. Our caller will look at DATA->LAST
6788 to figure out where to go next. We want to return the next block
6789 in the instruction stream, not some branched-to block somewhere
6790 else. We accomplish this by pretending our called forbid us to
6791 follow jumps, or skip blocks. */
6792 if (GET_MODE (insn) == QImode)
6793 follow_jumps = skip_blocks = 0;
6795 /* Scan to end of this basic block. */
6796 while (p && GET_CODE (p) != CODE_LABEL)
6798 /* Don't cse out the end of a loop. This makes a difference
6799 only for the unusual loops that always execute at least once;
6800 all other loops have labels there so we will stop in any case.
6801 Cse'ing out the end of the loop is dangerous because it
6802 might cause an invariant expression inside the loop
6803 to be reused after the end of the loop. This would make it
6804 hard to move the expression out of the loop in loop.c,
6805 especially if it is one of several equivalent expressions
6806 and loop.c would like to eliminate it.
6808 If we are running after loop.c has finished, we can ignore
6809 the NOTE_INSN_LOOP_END. */
6811 if (! after_loop && GET_CODE (p) == NOTE
6812 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6815 /* Don't cse over a call to setjmp; on some machines (eg vax)
6816 the regs restored by the longjmp come from
6817 a later time than the setjmp. */
6818 if (GET_CODE (p) == NOTE
6819 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6822 /* A PARALLEL can have lots of SETs in it,
6823 especially if it is really an ASM_OPERANDS. */
6824 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6825 nsets += XVECLEN (PATTERN (p), 0);
6826 else if (GET_CODE (p) != NOTE)
6829 /* Ignore insns made by CSE; they cannot affect the boundaries of
6832 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6833 high_cuid = INSN_CUID (p);
6834 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6835 low_cuid = INSN_CUID (p);
6837 /* See if this insn is in our branch path. If it is and we are to
6839 if (path_entry < path_size && data->path[path_entry].branch == p)
6841 if (data->path[path_entry].status != NOT_TAKEN)
6844 /* Point to next entry in path, if any. */
6848 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6849 was specified, we haven't reached our maximum path length, there are
6850 insns following the target of the jump, this is the only use of the
6851 jump label, and the target label is preceded by a BARRIER.
6853 Alternatively, we can follow the jump if it branches around a
6854 block of code and there are no other branches into the block.
6855 In this case invalidate_skipped_block will be called to invalidate any
6856 registers set in the block when following the jump. */
6858 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6859 && GET_CODE (p) == JUMP_INSN
6860 && GET_CODE (PATTERN (p)) == SET
6861 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6862 && JUMP_LABEL (p) != 0
6863 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6864 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6866 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6867 if ((GET_CODE (q) != NOTE
6868 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6869 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6870 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6873 /* If we ran into a BARRIER, this code is an extension of the
6874 basic block when the branch is taken. */
6875 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6877 /* Don't allow ourself to keep walking around an
6878 always-executed loop. */
6879 if (next_real_insn (q) == next)
6885 /* Similarly, don't put a branch in our path more than once. */
6886 for (i = 0; i < path_entry; i++)
6887 if (data->path[i].branch == p)
6890 if (i != path_entry)
6893 data->path[path_entry].branch = p;
6894 data->path[path_entry++].status = TAKEN;
6896 /* This branch now ends our path. It was possible that we
6897 didn't see this branch the last time around (when the
6898 insn in front of the target was a JUMP_INSN that was
6899 turned into a no-op). */
6900 path_size = path_entry;
6903 /* Mark block so we won't scan it again later. */
6904 PUT_MODE (NEXT_INSN (p), QImode);
6906 /* Detect a branch around a block of code. */
6907 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6911 if (next_real_insn (q) == next)
6917 for (i = 0; i < path_entry; i++)
6918 if (data->path[i].branch == p)
6921 if (i != path_entry)
6924 /* This is no_labels_between_p (p, q) with an added check for
6925 reaching the end of a function (in case Q precedes P). */
6926 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6927 if (GET_CODE (tmp) == CODE_LABEL)
6932 data->path[path_entry].branch = p;
6933 data->path[path_entry++].status = AROUND;
6935 path_size = path_entry;
6938 /* Mark block so we won't scan it again later. */
6939 PUT_MODE (NEXT_INSN (p), QImode);
6946 data->low_cuid = low_cuid;
6947 data->high_cuid = high_cuid;
6948 data->nsets = nsets;
6951 /* If all jumps in the path are not taken, set our path length to zero
6952 so a rescan won't be done. */
6953 for (i = path_size - 1; i >= 0; i--)
6954 if (data->path[i].status != NOT_TAKEN)
6958 data->path_size = 0;
6960 data->path_size = path_size;
6962 /* End the current branch path. */
6963 data->path[path_size].branch = 0;
6966 /* Perform cse on the instructions of a function.
6967 F is the first instruction.
6968 NREGS is one plus the highest pseudo-reg number used in the instruction.
6970 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6971 (only if -frerun-cse-after-loop).
6973 Returns 1 if jump_optimize should be redone due to simplifications
6974 in conditional jump instructions. */
6977 cse_main (f, nregs, after_loop, file)
6983 struct cse_basic_block_data val;
6984 register rtx insn = f;
6987 cse_jumps_altered = 0;
6988 recorded_label_ref = 0;
6989 constant_pool_entries_cost = 0;
6993 init_alias_analysis ();
6997 max_insn_uid = get_max_uid ();
6999 reg_eqv_table = (struct reg_eqv_elem *)
7000 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7002 #ifdef LOAD_EXTEND_OP
7004 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7005 and change the code and mode as appropriate. */
7006 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7009 /* Discard all the free elements of the previous function
7010 since they are allocated in the temporarily obstack. */
7011 bzero ((char *) table, sizeof table);
7012 free_element_chain = 0;
7013 n_elements_made = 0;
7015 /* Find the largest uid. */
7017 max_uid = get_max_uid ();
7018 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7020 /* Compute the mapping from uids to cuids.
7021 CUIDs are numbers assigned to insns, like uids,
7022 except that cuids increase monotonically through the code.
7023 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7024 between two insns is not affected by -g. */
7026 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7028 if (GET_CODE (insn) != NOTE
7029 || NOTE_LINE_NUMBER (insn) < 0)
7030 INSN_CUID (insn) = ++i;
7032 /* Give a line number note the same cuid as preceding insn. */
7033 INSN_CUID (insn) = i;
7036 /* Initialize which registers are clobbered by calls. */
7038 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7040 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7041 if ((call_used_regs[i]
7042 /* Used to check !fixed_regs[i] here, but that isn't safe;
7043 fixed regs are still call-clobbered, and sched can get
7044 confused if they can "live across calls".
7046 The frame pointer is always preserved across calls. The arg
7047 pointer is if it is fixed. The stack pointer usually is, unless
7048 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7049 will be present. If we are generating PIC code, the PIC offset
7050 table register is preserved across calls. */
7052 && i != STACK_POINTER_REGNUM
7053 && i != FRAME_POINTER_REGNUM
7054 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
7055 && i != HARD_FRAME_POINTER_REGNUM
7057 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7058 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7060 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
7061 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7065 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7068 ggc_push_context ();
7070 /* Loop over basic blocks.
7071 Compute the maximum number of qty's needed for each basic block
7072 (which is 2 for each SET). */
7077 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7078 flag_cse_skip_blocks);
7080 /* If this basic block was already processed or has no sets, skip it. */
7081 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7083 PUT_MODE (insn, VOIDmode);
7084 insn = (val.last ? NEXT_INSN (val.last) : 0);
7089 cse_basic_block_start = val.low_cuid;
7090 cse_basic_block_end = val.high_cuid;
7091 max_qty = val.nsets * 2;
7094 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7095 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7098 /* Make MAX_QTY bigger to give us room to optimize
7099 past the end of this basic block, if that should prove useful. */
7105 /* If this basic block is being extended by following certain jumps,
7106 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7107 Otherwise, we start after this basic block. */
7108 if (val.path_size > 0)
7109 cse_basic_block (insn, val.last, val.path, 0);
7112 int old_cse_jumps_altered = cse_jumps_altered;
7115 /* When cse changes a conditional jump to an unconditional
7116 jump, we want to reprocess the block, since it will give
7117 us a new branch path to investigate. */
7118 cse_jumps_altered = 0;
7119 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7120 if (cse_jumps_altered == 0
7121 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7124 cse_jumps_altered |= old_cse_jumps_altered;
7127 if (ggc_p && cse_altered)
7138 if (max_elements_made < n_elements_made)
7139 max_elements_made = n_elements_made;
7142 end_alias_analysis ();
7144 free (reg_eqv_table);
7146 return cse_jumps_altered || recorded_label_ref;
7149 /* Process a single basic block. FROM and TO and the limits of the basic
7150 block. NEXT_BRANCH points to the branch path when following jumps or
7151 a null path when not following jumps.
7153 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7154 loop. This is true when we are being called for the last time on a
7155 block and this CSE pass is before loop.c. */
7158 cse_basic_block (from, to, next_branch, around_loop)
7159 register rtx from, to;
7160 struct branch_path *next_branch;
7165 rtx libcall_insn = NULL_RTX;
7168 /* This array is undefined before max_reg, so only allocate
7169 the space actually needed and adjust the start. */
7172 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7173 * sizeof (struct qty_table_elem));
7174 qty_table -= max_reg;
7178 /* TO might be a label. If so, protect it from being deleted. */
7179 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7182 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7184 register enum rtx_code code = GET_CODE (insn);
7186 /* If we have processed 1,000 insns, flush the hash table to
7187 avoid extreme quadratic behavior. We must not include NOTEs
7188 in the count since there may be more of them when generating
7189 debugging information. If we clear the table at different
7190 times, code generated with -g -O might be different than code
7191 generated with -O but not -g.
7193 ??? This is a real kludge and needs to be done some other way.
7195 if (code != NOTE && num_insns++ > 1000)
7197 flush_hash_table ();
7201 /* See if this is a branch that is part of the path. If so, and it is
7202 to be taken, do so. */
7203 if (next_branch->branch == insn)
7205 enum taken status = next_branch++->status;
7206 if (status != NOT_TAKEN)
7208 if (status == TAKEN)
7209 record_jump_equiv (insn, 1);
7211 invalidate_skipped_block (NEXT_INSN (insn));
7213 /* Set the last insn as the jump insn; it doesn't affect cc0.
7214 Then follow this branch. */
7219 insn = JUMP_LABEL (insn);
7224 if (GET_MODE (insn) == QImode)
7225 PUT_MODE (insn, VOIDmode);
7227 if (GET_RTX_CLASS (code) == 'i')
7231 /* Process notes first so we have all notes in canonical forms when
7232 looking for duplicate operations. */
7234 if (REG_NOTES (insn))
7235 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7237 /* Track when we are inside in LIBCALL block. Inside such a block,
7238 we do not want to record destinations. The last insn of a
7239 LIBCALL block is not considered to be part of the block, since
7240 its destination is the result of the block and hence should be
7243 if (REG_NOTES (insn) != 0)
7245 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7246 libcall_insn = XEXP (p, 0);
7247 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7251 cse_insn (insn, libcall_insn);
7254 /* If INSN is now an unconditional jump, skip to the end of our
7255 basic block by pretending that we just did the last insn in the
7256 basic block. If we are jumping to the end of our block, show
7257 that we can have one usage of TO. */
7259 if (any_uncondjump_p (insn))
7263 free (qty_table + max_reg);
7267 if (JUMP_LABEL (insn) == to)
7270 /* Maybe TO was deleted because the jump is unconditional.
7271 If so, there is nothing left in this basic block. */
7272 /* ??? Perhaps it would be smarter to set TO
7273 to whatever follows this insn,
7274 and pretend the basic block had always ended here. */
7275 if (INSN_DELETED_P (to))
7278 insn = PREV_INSN (to);
7281 /* See if it is ok to keep on going past the label
7282 which used to end our basic block. Remember that we incremented
7283 the count of that label, so we decrement it here. If we made
7284 a jump unconditional, TO_USAGE will be one; in that case, we don't
7285 want to count the use in that jump. */
7287 if (to != 0 && NEXT_INSN (insn) == to
7288 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7290 struct cse_basic_block_data val;
7293 insn = NEXT_INSN (to);
7295 /* If TO was the last insn in the function, we are done. */
7298 free (qty_table + max_reg);
7302 /* If TO was preceded by a BARRIER we are done with this block
7303 because it has no continuation. */
7304 prev = prev_nonnote_insn (to);
7305 if (prev && GET_CODE (prev) == BARRIER)
7307 free (qty_table + max_reg);
7311 /* Find the end of the following block. Note that we won't be
7312 following branches in this case. */
7315 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7317 /* If the tables we allocated have enough space left
7318 to handle all the SETs in the next basic block,
7319 continue through it. Otherwise, return,
7320 and that block will be scanned individually. */
7321 if (val.nsets * 2 + next_qty > max_qty)
7324 cse_basic_block_start = val.low_cuid;
7325 cse_basic_block_end = val.high_cuid;
7328 /* Prevent TO from being deleted if it is a label. */
7329 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7332 /* Back up so we process the first insn in the extension. */
7333 insn = PREV_INSN (insn);
7337 if (next_qty > max_qty)
7340 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7341 the previous insn is the only insn that branches to the head of a loop,
7342 we can cse into the loop. Don't do this if we changed the jump
7343 structure of a loop unless we aren't going to be following jumps. */
7345 if ((cse_jumps_altered == 0
7346 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7347 && around_loop && to != 0
7348 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7349 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7350 && JUMP_LABEL (PREV_INSN (to)) != 0
7351 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7352 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7354 free (qty_table + max_reg);
7356 return to ? NEXT_INSN (to) : 0;
7359 /* Count the number of times registers are used (not set) in X.
7360 COUNTS is an array in which we accumulate the count, INCR is how much
7361 we count each register usage.
7363 Don't count a usage of DEST, which is the SET_DEST of a SET which
7364 contains X in its SET_SRC. This is because such a SET does not
7365 modify the liveness of DEST. */
7368 count_reg_usage (x, counts, dest, incr)
7381 switch (code = GET_CODE (x))
7385 counts[REGNO (x)] += incr;
7398 /* If we are clobbering a MEM, mark any registers inside the address
7400 if (GET_CODE (XEXP (x, 0)) == MEM)
7401 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7405 /* Unless we are setting a REG, count everything in SET_DEST. */
7406 if (GET_CODE (SET_DEST (x)) != REG)
7407 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7409 /* If SRC has side-effects, then we can't delete this insn, so the
7410 usage of SET_DEST inside SRC counts.
7412 ??? Strictly-speaking, we might be preserving this insn
7413 because some other SET has side-effects, but that's hard
7414 to do and can't happen now. */
7415 count_reg_usage (SET_SRC (x), counts,
7416 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7421 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7426 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7428 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7431 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7436 if (REG_NOTE_KIND (x) == REG_EQUAL
7437 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7438 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7439 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7446 fmt = GET_RTX_FORMAT (code);
7447 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7450 count_reg_usage (XEXP (x, i), counts, dest, incr);
7451 else if (fmt[i] == 'E')
7452 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7453 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7457 /* Scan all the insns and delete any that are dead; i.e., they store a register
7458 that is never used or they copy a register to itself.
7460 This is used to remove insns made obviously dead by cse, loop or other
7461 optimizations. It improves the heuristics in loop since it won't try to
7462 move dead invariants out of loops or make givs for dead quantities. The
7463 remaining passes of the compilation are also sped up. */
7466 delete_trivially_dead_insns (insns, nreg)
7476 int in_libcall = 0, dead_libcall = 0;
7478 /* First count the number of times each register is used. */
7479 counts = (int *) xcalloc (nreg, sizeof (int));
7480 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7481 count_reg_usage (insn, counts, NULL_RTX, 1);
7483 /* Go from the last insn to the first and delete insns that only set unused
7484 registers or copy a register to itself. As we delete an insn, remove
7485 usage counts for registers it uses.
7487 The first jump optimization pass may leave a real insn as the last
7488 insn in the function. We must not skip that insn or we may end
7489 up deleting code that is not really dead. */
7490 insn = get_last_insn ();
7491 if (! INSN_P (insn))
7492 insn = prev_real_insn (insn);
7494 for (; insn; insn = prev)
7499 prev = prev_real_insn (insn);
7501 /* Don't delete any insns that are part of a libcall block unless
7502 we can delete the whole libcall block.
7504 Flow or loop might get confused if we did that. Remember
7505 that we are scanning backwards. */
7506 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7512 /* See if there's a REG_EQUAL note on this insn and try to
7513 replace the source with the REG_EQUAL expression.
7515 We assume that insns with REG_RETVALs can only be reg->reg
7516 copies at this point. */
7517 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7520 rtx set = single_set (insn);
7521 rtx new = simplify_rtx (XEXP (note, 0));
7524 new = XEXP (note, 0);
7526 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7529 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7534 else if (in_libcall)
7535 live_insn = ! dead_libcall;
7536 else if (GET_CODE (PATTERN (insn)) == SET)
7538 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7539 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7540 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7541 SET_SRC (PATTERN (insn))))
7543 else if (GET_CODE (SET_DEST (PATTERN (insn))) == STRICT_LOW_PART
7544 && rtx_equal_p (XEXP (SET_DEST (PATTERN (insn)), 0),
7545 SET_SRC (PATTERN (insn))))
7549 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7550 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7551 && ((tem = next_nonnote_insn (insn)) == 0
7553 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7556 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7557 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7558 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7559 || side_effects_p (SET_SRC (PATTERN (insn)))
7560 /* An ADDRESSOF expression can turn into a use of the
7561 internal arg pointer, so always consider the
7562 internal arg pointer live. If it is truly dead,
7563 flow will delete the initializing insn. */
7564 || (SET_DEST (PATTERN (insn))
7565 == current_function_internal_arg_pointer))
7568 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7569 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7571 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7573 if (GET_CODE (elt) == SET)
7575 if ((GET_CODE (SET_DEST (elt)) == REG
7576 || GET_CODE (SET_DEST (elt)) == SUBREG)
7577 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7581 else if (GET_CODE (SET_DEST (elt)) == CC0
7582 && ! side_effects_p (SET_SRC (elt))
7583 && ((tem = next_nonnote_insn (insn)) == 0
7585 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7588 else if (GET_CODE (SET_DEST (elt)) != REG
7589 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7590 || counts[REGNO (SET_DEST (elt))] != 0
7591 || side_effects_p (SET_SRC (elt))
7592 /* An ADDRESSOF expression can turn into a use of the
7593 internal arg pointer, so always consider the
7594 internal arg pointer live. If it is truly dead,
7595 flow will delete the initializing insn. */
7597 == current_function_internal_arg_pointer))
7600 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7606 /* If this is a dead insn, delete it and show registers in it aren't
7611 count_reg_usage (insn, counts, NULL_RTX, -1);
7615 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))