1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
37 #include "splay-tree.h"
39 /* The basic idea of common subexpression elimination is to go
40 through the code, keeping a record of expressions that would
41 have the same value at the current scan point, and replacing
42 expressions encountered with the cheapest equivalent expression.
44 It is too complicated to keep track of the different possibilities
45 when control paths merge; so, at each label, we forget all that is
46 known and start fresh. This can be described as processing each
47 basic block separately. Note, however, that these are not quite
48 the same as the basic blocks found by a later pass and used for
49 data flow analysis and register packing. We do not need to start fresh
50 after a conditional jump instruction if there is no label there.
52 We use two data structures to record the equivalent expressions:
53 a hash table for most expressions, and several vectors together
54 with "quantity numbers" to record equivalent (pseudo) registers.
56 The use of the special data structure for registers is desirable
57 because it is faster. It is possible because registers references
58 contain a fairly small number, the register number, taken from
59 a contiguously allocated series, and two register references are
60 identical if they have the same number. General expressions
61 do not have any such thing, so the only way to retrieve the
62 information recorded on an expression other than a register
63 is to keep it in a hash table.
65 Registers and "quantity numbers":
67 At the start of each basic block, all of the (hardware and pseudo)
68 registers used in the function are given distinct quantity
69 numbers to indicate their contents. During scan, when the code
70 copies one register into another, we copy the quantity number.
71 When a register is loaded in any other way, we allocate a new
72 quantity number to describe the value generated by this operation.
73 `reg_qty' records what quantity a register is currently thought
76 All real quantity numbers are greater than or equal to `max_reg'.
77 If register N has not been assigned a quantity, reg_qty[N] will equal N.
79 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
80 variables should be referenced with an index below `max_reg'.
82 We also maintain a bidirectional chain of registers for each
83 quantity number. `qty_first_reg', `qty_last_reg',
84 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
86 The first register in a chain is the one whose lifespan is least local.
87 Among equals, it is the one that was seen first.
88 We replace any equivalent register with that one.
90 If two registers have the same quantity number, it must be true that
91 REG expressions with `qty_mode' must be in the hash table for both
92 registers and must be in the same class.
94 The converse is not true. Since hard registers may be referenced in
95 any mode, two REG expressions might be equivalent in the hash table
96 but not have the same quantity number if the quantity number of one
97 of the registers is not the same mode as those expressions.
99 Constants and quantity numbers
101 When a quantity has a known constant value, that value is stored
102 in the appropriate element of qty_const. This is in addition to
103 putting the constant in the hash table as is usual for non-regs.
105 Whether a reg or a constant is preferred is determined by the configuration
106 macro CONST_COSTS and will often depend on the constant value. In any
107 event, expressions containing constants can be simplified, by fold_rtx.
109 When a quantity has a known nearly constant value (such as an address
110 of a stack slot), that value is stored in the appropriate element
113 Integer constants don't have a machine mode. However, cse
114 determines the intended machine mode from the destination
115 of the instruction that moves the constant. The machine mode
116 is recorded in the hash table along with the actual RTL
117 constant expression so that different modes are kept separate.
121 To record known equivalences among expressions in general
122 we use a hash table called `table'. It has a fixed number of buckets
123 that contain chains of `struct table_elt' elements for expressions.
124 These chains connect the elements whose expressions have the same
127 Other chains through the same elements connect the elements which
128 currently have equivalent values.
130 Register references in an expression are canonicalized before hashing
131 the expression. This is done using `reg_qty' and `qty_first_reg'.
132 The hash code of a register reference is computed using the quantity
133 number, not the register number.
135 When the value of an expression changes, it is necessary to remove from the
136 hash table not just that expression but all expressions whose values
137 could be different as a result.
139 1. If the value changing is in memory, except in special cases
140 ANYTHING referring to memory could be changed. That is because
141 nobody knows where a pointer does not point.
142 The function `invalidate_memory' removes what is necessary.
144 The special cases are when the address is constant or is
145 a constant plus a fixed register such as the frame pointer
146 or a static chain pointer. When such addresses are stored in,
147 we can tell exactly which other such addresses must be invalidated
148 due to overlap. `invalidate' does this.
149 All expressions that refer to non-constant
150 memory addresses are also invalidated. `invalidate_memory' does this.
152 2. If the value changing is a register, all expressions
153 containing references to that register, and only those,
156 Because searching the entire hash table for expressions that contain
157 a register is very slow, we try to figure out when it isn't necessary.
158 Precisely, this is necessary only when expressions have been
159 entered in the hash table using this register, and then the value has
160 changed, and then another expression wants to be added to refer to
161 the register's new value. This sequence of circumstances is rare
162 within any one basic block.
164 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
165 reg_tick[i] is incremented whenever a value is stored in register i.
166 reg_in_table[i] holds -1 if no references to register i have been
167 entered in the table; otherwise, it contains the value reg_tick[i] had
168 when the references were entered. If we want to enter a reference
169 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
170 Until we want to enter a new entry, the mere fact that the two vectors
171 don't match makes the entries be ignored if anyone tries to match them.
173 Registers themselves are entered in the hash table as well as in
174 the equivalent-register chains. However, the vectors `reg_tick'
175 and `reg_in_table' do not apply to expressions which are simple
176 register references. These expressions are removed from the table
177 immediately when they become invalid, and this can be done even if
178 we do not immediately search for all the expressions that refer to
181 A CLOBBER rtx in an instruction invalidates its operand for further
182 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
183 invalidates everything that resides in memory.
187 Constant expressions that differ only by an additive integer
188 are called related. When a constant expression is put in
189 the table, the related expression with no constant term
190 is also entered. These are made to point at each other
191 so that it is possible to find out if there exists any
192 register equivalent to an expression related to a given expression. */
194 /* One plus largest register number used in this function. */
198 /* One plus largest instruction UID used in this function at time of
201 static int max_insn_uid;
203 /* Length of vectors indexed by quantity number.
204 We know in advance we will not need a quantity number this big. */
208 /* Next quantity number to be allocated.
209 This is 1 + the largest number needed so far. */
213 /* Indexed by quantity number, gives the first (or last) register
214 in the chain of registers that currently contain this quantity. */
216 static int *qty_first_reg;
217 static int *qty_last_reg;
219 /* Index by quantity number, gives the mode of the quantity. */
221 static enum machine_mode *qty_mode;
223 /* Indexed by quantity number, gives the rtx of the constant value of the
224 quantity, or zero if it does not have a known value.
225 A sum of the frame pointer (or arg pointer) plus a constant
226 can also be entered here. */
228 static rtx *qty_const;
230 /* Indexed by qty number, gives the insn that stored the constant value
231 recorded in `qty_const'. */
233 static rtx *qty_const_insn;
235 /* The next three variables are used to track when a comparison between a
236 quantity and some constant or register has been passed. In that case, we
237 know the results of the comparison in case we see it again. These variables
238 record a comparison that is known to be true. */
240 /* Indexed by qty number, gives the rtx code of a comparison with a known
241 result involving this quantity. If none, it is UNKNOWN. */
242 static enum rtx_code *qty_comparison_code;
244 /* Indexed by qty number, gives the constant being compared against in a
245 comparison of known result. If no such comparison, it is undefined.
246 If the comparison is not with a constant, it is zero. */
248 static rtx *qty_comparison_const;
250 /* Indexed by qty number, gives the quantity being compared against in a
251 comparison of known result. If no such comparison, if it undefined.
252 If the comparison is not with a register, it is -1. */
254 static int *qty_comparison_qty;
257 /* For machines that have a CC0, we do not record its value in the hash
258 table since its use is guaranteed to be the insn immediately following
259 its definition and any other insn is presumed to invalidate it.
261 Instead, we store below the value last assigned to CC0. If it should
262 happen to be a constant, it is stored in preference to the actual
263 assigned value. In case it is a constant, we store the mode in which
264 the constant should be interpreted. */
266 static rtx prev_insn_cc0;
267 static enum machine_mode prev_insn_cc0_mode;
270 /* Previous actual insn. 0 if at first insn of basic block. */
272 static rtx prev_insn;
274 /* Insn being scanned. */
276 static rtx this_insn;
278 /* Index by register number, gives the number of the next (or
279 previous) register in the chain of registers sharing the same
282 Or -1 if this register is at the end of the chain.
284 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
286 static int *reg_next_eqv;
287 static int *reg_prev_eqv;
289 struct cse_reg_info {
291 /* The number of times the register has been altered in the current
295 /* The next cse_reg_info structure in the free list. */
296 struct cse_reg_info* next;
299 /* The REG_TICK value at which rtx's containing this register are
300 valid in the hash table. If this does not equal the current
301 reg_tick value, such expressions existing in the hash table are
305 /* The quantity number of the register's current contents. */
309 /* A free list of cse_reg_info entries. */
310 static struct cse_reg_info *cse_reg_info_free_list;
312 /* A mapping from registers to cse_reg_info data structures. */
313 static splay_tree cse_reg_info_tree;
315 /* The last lookup we did into the cse_reg_info_tree. This allows us
316 to cache repeated lookups. */
317 static int cached_regno;
318 static struct cse_reg_info *cached_cse_reg_info;
320 /* A HARD_REG_SET containing all the hard registers for which there is
321 currently a REG expression in the hash table. Note the difference
322 from the above variables, which indicate if the REG is mentioned in some
323 expression in the table. */
325 static HARD_REG_SET hard_regs_in_table;
327 /* A HARD_REG_SET containing all the hard registers that are invalidated
330 static HARD_REG_SET regs_invalidated_by_call;
332 /* CUID of insn that starts the basic block currently being cse-processed. */
334 static int cse_basic_block_start;
336 /* CUID of insn that ends the basic block currently being cse-processed. */
338 static int cse_basic_block_end;
340 /* Vector mapping INSN_UIDs to cuids.
341 The cuids are like uids but increase monotonically always.
342 We use them to see whether a reg is used outside a given basic block. */
344 static int *uid_cuid;
346 /* Highest UID in UID_CUID. */
349 /* Get the cuid of an insn. */
351 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
353 /* Nonzero if cse has altered conditional jump insns
354 in such a way that jump optimization should be redone. */
356 static int cse_jumps_altered;
358 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
359 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
360 to put in the note. */
361 static int recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
367 static int do_not_record;
369 #ifdef LOAD_EXTEND_OP
371 /* Scratch rtl used when looking for load-extended copy of a MEM. */
372 static rtx memory_extend_rtx;
375 /* canon_hash stores 1 in hash_arg_in_memory
376 if it notices a reference to memory within the expression being hashed. */
378 static int hash_arg_in_memory;
380 /* canon_hash stores 1 in hash_arg_in_struct
381 if it notices a reference to memory that's part of a structure. */
383 static int hash_arg_in_struct;
385 /* The hash table contains buckets which are chains of `struct table_elt's,
386 each recording one expression's information.
387 That expression is in the `exp' field.
389 Those elements with the same hash code are chained in both directions
390 through the `next_same_hash' and `prev_same_hash' fields.
392 Each set of expressions with equivalent values
393 are on a two-way chain through the `next_same_value'
394 and `prev_same_value' fields, and all point with
395 the `first_same_value' field at the first element in
396 that chain. The chain is in order of increasing cost.
397 Each element's cost value is in its `cost' field.
399 The `in_memory' field is nonzero for elements that
400 involve any reference to memory. These elements are removed
401 whenever a write is done to an unidentified location in memory.
402 To be safe, we assume that a memory address is unidentified unless
403 the address is either a symbol constant or a constant plus
404 the frame pointer or argument pointer.
406 The `in_struct' field is nonzero for elements that
407 involve any reference to memory inside a structure or array.
409 The `related_value' field is used to connect related expressions
410 (that differ by adding an integer).
411 The related expressions are chained in a circular fashion.
412 `related_value' is zero for expressions for which this
415 The `cost' field stores the cost of this element's expression.
417 The `is_const' flag is set if the element is a constant (including
420 The `flag' field is used as a temporary during some search routines.
422 The `mode' field is usually the same as GET_MODE (`exp'), but
423 if `exp' is a CONST_INT and has no machine mode then the `mode'
424 field is the mode it was being used as. Each constant is
425 recorded separately for each mode it is used with. */
431 struct table_elt *next_same_hash;
432 struct table_elt *prev_same_hash;
433 struct table_elt *next_same_value;
434 struct table_elt *prev_same_value;
435 struct table_elt *first_same_value;
436 struct table_elt *related_value;
438 enum machine_mode mode;
445 /* We don't want a lot of buckets, because we rarely have very many
446 things stored in the hash table, and a lot of buckets slows
447 down a lot of loops that happen frequently. */
450 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
451 register (hard registers may require `do_not_record' to be set). */
454 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
455 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
456 : canon_hash (X, M) % NBUCKETS)
458 /* Determine whether register number N is considered a fixed register for CSE.
459 It is desirable to replace other regs with fixed regs, to reduce need for
461 A reg wins if it is either the frame pointer or designated as fixed,
462 but not if it is an overlapping register. */
463 #ifdef OVERLAPPING_REGNO_P
464 #define FIXED_REGNO_P(N) \
465 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N]) \
467 && ! OVERLAPPING_REGNO_P ((N)))
469 #define FIXED_REGNO_P(N) \
470 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
471 || fixed_regs[N] || global_regs[N])
474 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
475 hard registers and pointers into the frame are the cheapest with a cost
476 of 0. Next come pseudos with a cost of one and other hard registers with
477 a cost of 2. Aside from these special cases, call `rtx_cost'. */
479 #define CHEAP_REGNO(N) \
480 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
481 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
482 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
483 || ((N) < FIRST_PSEUDO_REGISTER \
484 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
486 /* A register is cheap if it is a user variable assigned to the register
487 or if its register number always corresponds to a cheap register. */
489 #define CHEAP_REG(N) \
490 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
491 || CHEAP_REGNO (REGNO (N)))
494 (GET_CODE (X) == REG \
495 ? (CHEAP_REG (X) ? 0 \
496 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
500 /* Get the info associated with register N. */
502 #define GET_CSE_REG_INFO(N) \
503 (((N) == cached_regno && cached_cse_reg_info) \
504 ? cached_cse_reg_info : get_cse_reg_info ((N)))
506 /* Get the number of times this register has been updated in this
509 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->variant.reg_tick)
511 /* Get the point at which REG was recorded in the table. */
513 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
515 /* Get the quantity number for REG. */
517 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
519 /* Determine if the quantity number for register X represents a valid index
520 into the `qty_...' variables. */
522 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
525 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
526 during CSE, such nodes are present. Using an ADDRESSOF node which
527 refers to the address of a REG is a good thing because we can then
528 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
529 #define CSE_ADDRESS_COST(RTX) \
530 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
531 ? -1 : ADDRESS_COST(RTX))
534 static struct table_elt *table[NBUCKETS];
536 /* Chain of `struct table_elt's made so far for this function
537 but currently removed from the table. */
539 static struct table_elt *free_element_chain;
541 /* Number of `struct table_elt' structures made so far for this function. */
543 static int n_elements_made;
545 /* Maximum value `n_elements_made' has had so far in this compilation
546 for functions previously processed. */
548 static int max_elements_made;
550 /* Surviving equivalence class when two equivalence classes are merged
551 by recording the effects of a jump in the last insn. Zero if the
552 last insn was not a conditional jump. */
554 static struct table_elt *last_jump_equiv_class;
556 /* Set to the cost of a constant pool reference if one was found for a
557 symbolic constant. If this was found, it means we should try to
558 convert constants into constant pool entries if they don't fit in
561 static int constant_pool_entries_cost;
563 /* Define maximum length of a branch path. */
565 #define PATHLENGTH 10
567 /* This data describes a block that will be processed by cse_basic_block. */
569 struct cse_basic_block_data {
570 /* Lowest CUID value of insns in block. */
572 /* Highest CUID value of insns in block. */
574 /* Total number of SETs in block. */
576 /* Last insn in the block. */
578 /* Size of current branch path, if any. */
580 /* Current branch path, indicating which branches will be taken. */
582 /* The branch insn. */
584 /* Whether it should be taken or not. AROUND is the same as taken
585 except that it is used when the destination label is not preceded
587 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
591 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
592 virtual regs here because the simplify_*_operation routines are called
593 by integrate.c, which is called before virtual register instantiation. */
595 #define FIXED_BASE_PLUS_P(X) \
596 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
597 || (X) == arg_pointer_rtx \
598 || (X) == virtual_stack_vars_rtx \
599 || (X) == virtual_incoming_args_rtx \
600 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
601 && (XEXP (X, 0) == frame_pointer_rtx \
602 || XEXP (X, 0) == hard_frame_pointer_rtx \
603 || XEXP (X, 0) == arg_pointer_rtx \
604 || XEXP (X, 0) == virtual_stack_vars_rtx \
605 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
606 || GET_CODE (X) == ADDRESSOF)
608 /* Similar, but also allows reference to the stack pointer.
610 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
611 arg_pointer_rtx by itself is nonzero, because on at least one machine,
612 the i960, the arg pointer is zero when it is unused. */
614 #define NONZERO_BASE_PLUS_P(X) \
615 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
616 || (X) == virtual_stack_vars_rtx \
617 || (X) == virtual_incoming_args_rtx \
618 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
619 && (XEXP (X, 0) == frame_pointer_rtx \
620 || XEXP (X, 0) == hard_frame_pointer_rtx \
621 || XEXP (X, 0) == arg_pointer_rtx \
622 || XEXP (X, 0) == virtual_stack_vars_rtx \
623 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
624 || (X) == stack_pointer_rtx \
625 || (X) == virtual_stack_dynamic_rtx \
626 || (X) == virtual_outgoing_args_rtx \
627 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
628 && (XEXP (X, 0) == stack_pointer_rtx \
629 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
630 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
631 || GET_CODE (X) == ADDRESSOF)
633 static int notreg_cost PROTO((rtx));
634 static void new_basic_block PROTO((void));
635 static void make_new_qty PROTO((int));
636 static void make_regs_eqv PROTO((int, int));
637 static void delete_reg_equiv PROTO((int));
638 static int mention_regs PROTO((rtx));
639 static int insert_regs PROTO((rtx, struct table_elt *, int));
640 static void free_element PROTO((struct table_elt *));
641 static void remove_from_table PROTO((struct table_elt *, unsigned));
642 static struct table_elt *get_element PROTO((void));
643 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
644 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
645 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
646 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
648 static void merge_equiv_classes PROTO((struct table_elt *,
649 struct table_elt *));
650 static void invalidate PROTO((rtx, enum machine_mode));
651 static int cse_rtx_varies_p PROTO((rtx));
652 static void remove_invalid_refs PROTO((int));
653 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
654 static void rehash_using_reg PROTO((rtx));
655 static void invalidate_memory PROTO((void));
656 static void invalidate_for_call PROTO((void));
657 static rtx use_related_value PROTO((rtx, struct table_elt *));
658 static unsigned canon_hash PROTO((rtx, enum machine_mode));
659 static unsigned safe_hash PROTO((rtx, enum machine_mode));
660 static int exp_equiv_p PROTO((rtx, rtx, int, int));
661 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
664 static int refers_to_p PROTO((rtx, rtx));
665 static rtx canon_reg PROTO((rtx, rtx));
666 static void find_best_addr PROTO((rtx, rtx *));
667 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
669 enum machine_mode *));
670 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
672 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
674 static rtx fold_rtx PROTO((rtx, rtx));
675 static rtx equiv_constant PROTO((rtx));
676 static void record_jump_equiv PROTO((rtx, int));
677 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
679 static void cse_insn PROTO((rtx, rtx));
680 static int note_mem_written PROTO((rtx));
681 static void invalidate_from_clobbers PROTO((rtx));
682 static rtx cse_process_notes PROTO((rtx, rtx));
683 static void cse_around_loop PROTO((rtx));
684 static void invalidate_skipped_set PROTO((rtx, rtx));
685 static void invalidate_skipped_block PROTO((rtx));
686 static void cse_check_loop_start PROTO((rtx, rtx));
687 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
688 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
689 static void count_reg_usage PROTO((rtx, int *, rtx, int));
690 extern void dump_class PROTO((struct table_elt*));
691 static void check_fold_consts PROTO((PTR));
692 static struct cse_reg_info* get_cse_reg_info PROTO((int));
693 static void free_cse_reg_info PROTO((splay_tree_value));
695 extern int rtx_equal_function_value_matters;
697 /* Dump the expressions in the equivalence class indicated by CLASSP.
698 This function is used only for debugging. */
701 struct table_elt *classp;
703 struct table_elt *elt;
705 fprintf (stderr, "Equivalence chain for ");
706 print_rtl (stderr, classp->exp);
707 fprintf (stderr, ": \n");
709 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
711 print_rtl (stderr, elt->exp);
712 fprintf (stderr, "\n");
716 /* Return an estimate of the cost of computing rtx X.
717 One use is in cse, to decide which expression to keep in the hash table.
718 Another is in rtl generation, to pick the cheapest way to multiply.
719 Other uses like the latter are expected in the future. */
721 /* Internal function, to compute cost when X is not a register; called
722 from COST macro to keep it simple. */
728 return ((GET_CODE (x) == SUBREG
729 && GET_CODE (SUBREG_REG (x)) == REG
730 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
731 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
732 && (GET_MODE_SIZE (GET_MODE (x))
733 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
734 && subreg_lowpart_p (x)
735 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
736 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
737 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
738 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
740 : rtx_cost (x, SET) * 2);
743 /* Return the right cost to give to an operation
744 to make the cost of the corresponding register-to-register instruction
745 N times that of a fast register-to-register instruction. */
747 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
750 rtx_cost (x, outer_code)
752 enum rtx_code outer_code ATTRIBUTE_UNUSED;
755 register enum rtx_code code;
762 /* Compute the default costs of certain things.
763 Note that RTX_COSTS can override the defaults. */
769 /* Count multiplication by 2**n as a shift,
770 because if we are considering it, we would output it as a shift. */
771 if (GET_CODE (XEXP (x, 1)) == CONST_INT
772 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
775 total = COSTS_N_INSNS (5);
781 total = COSTS_N_INSNS (7);
784 /* Used in loop.c and combine.c as a marker. */
788 /* We don't want these to be used in substitutions because
789 we have no way of validating the resulting insn. So assign
790 anything containing an ASM_OPERANDS a very high cost. */
800 return ! CHEAP_REG (x);
803 /* If we can't tie these modes, make this expensive. The larger
804 the mode, the more expensive it is. */
805 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
806 return COSTS_N_INSNS (2
807 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
810 RTX_COSTS (x, code, outer_code);
813 CONST_COSTS (x, code, outer_code);
817 #ifdef DEFAULT_RTX_COSTS
818 DEFAULT_RTX_COSTS(x, code, outer_code);
823 /* Sum the costs of the sub-rtx's, plus cost of this operation,
824 which is already in total. */
826 fmt = GET_RTX_FORMAT (code);
827 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
829 total += rtx_cost (XEXP (x, i), code);
830 else if (fmt[i] == 'E')
831 for (j = 0; j < XVECLEN (x, i); j++)
832 total += rtx_cost (XVECEXP (x, i, j), code);
837 static struct cse_reg_info *
838 get_cse_reg_info (regno)
841 struct cse_reg_info *cri;
844 /* See if we already have this entry. */
845 n = splay_tree_lookup (cse_reg_info_tree,
846 (splay_tree_key) regno);
848 cri = (struct cse_reg_info *) (n->value);
851 /* Get a new cse_reg_info structure. */
852 if (cse_reg_info_free_list)
854 cri = cse_reg_info_free_list;
855 cse_reg_info_free_list = cri->variant.next;
858 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
861 cri->variant.reg_tick = 0;
862 cri->reg_in_table = -1;
863 cri->reg_qty = regno;
865 splay_tree_insert (cse_reg_info_tree,
866 (splay_tree_key) regno,
867 (splay_tree_value) cri);
870 /* Cache this lookup; we tend to be looking up information about the
871 same register several times in a row. */
872 cached_regno = regno;
873 cached_cse_reg_info = cri;
879 free_cse_reg_info (v)
882 struct cse_reg_info *cri = (struct cse_reg_info *) v;
884 cri->variant.next = cse_reg_info_free_list;
885 cse_reg_info_free_list = cri;
888 /* Clear the hash table and initialize each register with its own quantity,
889 for a new basic block. */
898 if (cse_reg_info_tree)
900 splay_tree_delete (cse_reg_info_tree);
901 cached_cse_reg_info = 0;
904 cse_reg_info_tree = splay_tree_new (splay_tree_compare_ints, 0,
907 CLEAR_HARD_REG_SET (hard_regs_in_table);
909 /* The per-quantity values used to be initialized here, but it is
910 much faster to initialize each as it is made in `make_new_qty'. */
912 for (i = 0; i < NBUCKETS; i++)
914 register struct table_elt *this, *next;
915 for (this = table[i]; this; this = next)
917 next = this->next_same_hash;
922 bzero ((char *) table, sizeof table);
931 /* Say that register REG contains a quantity not in any register before
932 and initialize that quantity. */
940 if (next_qty >= max_qty)
943 q = REG_QTY (reg) = next_qty++;
944 qty_first_reg[q] = reg;
945 qty_last_reg[q] = reg;
946 qty_const[q] = qty_const_insn[q] = 0;
947 qty_comparison_code[q] = UNKNOWN;
949 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
952 /* Make reg NEW equivalent to reg OLD.
953 OLD is not changing; NEW is. */
956 make_regs_eqv (new, old)
957 register int new, old;
959 register int lastr, firstr;
960 register int q = REG_QTY (old);
962 /* Nothing should become eqv until it has a "non-invalid" qty number. */
963 if (! REGNO_QTY_VALID_P (old))
967 firstr = qty_first_reg[q];
968 lastr = qty_last_reg[q];
970 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
971 hard regs. Among pseudos, if NEW will live longer than any other reg
972 of the same qty, and that is beyond the current basic block,
973 make it the new canonical replacement for this qty. */
974 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
975 /* Certain fixed registers might be of the class NO_REGS. This means
976 that not only can they not be allocated by the compiler, but
977 they cannot be used in substitutions or canonicalizations
979 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
980 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
981 || (new >= FIRST_PSEUDO_REGISTER
982 && (firstr < FIRST_PSEUDO_REGISTER
983 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
984 || (uid_cuid[REGNO_FIRST_UID (new)]
985 < cse_basic_block_start))
986 && (uid_cuid[REGNO_LAST_UID (new)]
987 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
989 reg_prev_eqv[firstr] = new;
990 reg_next_eqv[new] = firstr;
991 reg_prev_eqv[new] = -1;
992 qty_first_reg[q] = new;
996 /* If NEW is a hard reg (known to be non-fixed), insert at end.
997 Otherwise, insert before any non-fixed hard regs that are at the
998 end. Registers of class NO_REGS cannot be used as an
999 equivalent for anything. */
1000 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1001 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1002 && new >= FIRST_PSEUDO_REGISTER)
1003 lastr = reg_prev_eqv[lastr];
1004 reg_next_eqv[new] = reg_next_eqv[lastr];
1005 if (reg_next_eqv[lastr] >= 0)
1006 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1008 qty_last_reg[q] = new;
1009 reg_next_eqv[lastr] = new;
1010 reg_prev_eqv[new] = lastr;
1014 /* Remove REG from its equivalence class. */
1017 delete_reg_equiv (reg)
1020 register int q = REG_QTY (reg);
1023 /* If invalid, do nothing. */
1027 p = reg_prev_eqv[reg];
1028 n = reg_next_eqv[reg];
1031 reg_prev_eqv[n] = p;
1033 qty_last_reg[q] = p;
1035 reg_next_eqv[p] = n;
1037 qty_first_reg[q] = n;
1039 REG_QTY (reg) = reg;
1042 /* Remove any invalid expressions from the hash table
1043 that refer to any of the registers contained in expression X.
1045 Make sure that newly inserted references to those registers
1046 as subexpressions will be considered valid.
1048 mention_regs is not called when a register itself
1049 is being stored in the table.
1051 Return 1 if we have done something that may have changed the hash code
1058 register enum rtx_code code;
1061 register int changed = 0;
1066 code = GET_CODE (x);
1069 register int regno = REGNO (x);
1070 register int endregno
1071 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1072 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1075 for (i = regno; i < endregno; i++)
1077 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1078 remove_invalid_refs (i);
1080 REG_IN_TABLE (i) = REG_TICK (i);
1086 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1087 pseudo if they don't use overlapping words. We handle only pseudos
1088 here for simplicity. */
1089 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1090 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1092 int i = REGNO (SUBREG_REG (x));
1094 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1096 /* If reg_tick has been incremented more than once since
1097 reg_in_table was last set, that means that the entire
1098 register has been set before, so discard anything memorized
1099 for the entrire register, including all SUBREG expressions. */
1100 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1101 remove_invalid_refs (i);
1103 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1106 REG_IN_TABLE (i) = REG_TICK (i);
1110 /* If X is a comparison or a COMPARE and either operand is a register
1111 that does not have a quantity, give it one. This is so that a later
1112 call to record_jump_equiv won't cause X to be assigned a different
1113 hash code and not found in the table after that call.
1115 It is not necessary to do this here, since rehash_using_reg can
1116 fix up the table later, but doing this here eliminates the need to
1117 call that expensive function in the most common case where the only
1118 use of the register is in the comparison. */
1120 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1122 if (GET_CODE (XEXP (x, 0)) == REG
1123 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1124 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1126 rehash_using_reg (XEXP (x, 0));
1130 if (GET_CODE (XEXP (x, 1)) == REG
1131 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1132 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1134 rehash_using_reg (XEXP (x, 1));
1139 fmt = GET_RTX_FORMAT (code);
1140 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1142 changed |= mention_regs (XEXP (x, i));
1143 else if (fmt[i] == 'E')
1144 for (j = 0; j < XVECLEN (x, i); j++)
1145 changed |= mention_regs (XVECEXP (x, i, j));
1150 /* Update the register quantities for inserting X into the hash table
1151 with a value equivalent to CLASSP.
1152 (If the class does not contain a REG, it is irrelevant.)
1153 If MODIFIED is nonzero, X is a destination; it is being modified.
1154 Note that delete_reg_equiv should be called on a register
1155 before insert_regs is done on that register with MODIFIED != 0.
1157 Nonzero value means that elements of reg_qty have changed
1158 so X's hash code may be different. */
1161 insert_regs (x, classp, modified)
1163 struct table_elt *classp;
1166 if (GET_CODE (x) == REG)
1168 register int regno = REGNO (x);
1170 /* If REGNO is in the equivalence table already but is of the
1171 wrong mode for that equivalence, don't do anything here. */
1173 if (REGNO_QTY_VALID_P (regno)
1174 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1177 if (modified || ! REGNO_QTY_VALID_P (regno))
1180 for (classp = classp->first_same_value;
1182 classp = classp->next_same_value)
1183 if (GET_CODE (classp->exp) == REG
1184 && GET_MODE (classp->exp) == GET_MODE (x))
1186 make_regs_eqv (regno, REGNO (classp->exp));
1190 make_new_qty (regno);
1191 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1198 /* If X is a SUBREG, we will likely be inserting the inner register in the
1199 table. If that register doesn't have an assigned quantity number at
1200 this point but does later, the insertion that we will be doing now will
1201 not be accessible because its hash code will have changed. So assign
1202 a quantity number now. */
1204 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1205 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1207 int regno = REGNO (SUBREG_REG (x));
1209 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1210 /* Mention_regs checks if REG_TICK is exactly one larger than
1211 REG_IN_TABLE to find out if there was only a single preceding
1212 invalidation - for the SUBREG - or another one, which would be
1213 for the full register. Since we don't invalidate the SUBREG
1214 here first, we might have to bump up REG_TICK so that mention_regs
1215 will do the right thing. */
1216 if (REG_IN_TABLE (regno) >= 0
1217 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1223 return mention_regs (x);
1226 /* Look in or update the hash table. */
1228 /* Put the element ELT on the list of free elements. */
1232 struct table_elt *elt;
1234 elt->next_same_hash = free_element_chain;
1235 free_element_chain = elt;
1238 /* Return an element that is free for use. */
1240 static struct table_elt *
1243 struct table_elt *elt = free_element_chain;
1246 free_element_chain = elt->next_same_hash;
1250 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1253 /* Remove table element ELT from use in the table.
1254 HASH is its hash code, made using the HASH macro.
1255 It's an argument because often that is known in advance
1256 and we save much time not recomputing it. */
1259 remove_from_table (elt, hash)
1260 register struct table_elt *elt;
1266 /* Mark this element as removed. See cse_insn. */
1267 elt->first_same_value = 0;
1269 /* Remove the table element from its equivalence class. */
1272 register struct table_elt *prev = elt->prev_same_value;
1273 register struct table_elt *next = elt->next_same_value;
1275 if (next) next->prev_same_value = prev;
1278 prev->next_same_value = next;
1281 register struct table_elt *newfirst = next;
1284 next->first_same_value = newfirst;
1285 next = next->next_same_value;
1290 /* Remove the table element from its hash bucket. */
1293 register struct table_elt *prev = elt->prev_same_hash;
1294 register struct table_elt *next = elt->next_same_hash;
1296 if (next) next->prev_same_hash = prev;
1299 prev->next_same_hash = next;
1300 else if (table[hash] == elt)
1304 /* This entry is not in the proper hash bucket. This can happen
1305 when two classes were merged by `merge_equiv_classes'. Search
1306 for the hash bucket that it heads. This happens only very
1307 rarely, so the cost is acceptable. */
1308 for (hash = 0; hash < NBUCKETS; hash++)
1309 if (table[hash] == elt)
1314 /* Remove the table element from its related-value circular chain. */
1316 if (elt->related_value != 0 && elt->related_value != elt)
1318 register struct table_elt *p = elt->related_value;
1319 while (p->related_value != elt)
1320 p = p->related_value;
1321 p->related_value = elt->related_value;
1322 if (p->related_value == p)
1323 p->related_value = 0;
1329 /* Look up X in the hash table and return its table element,
1330 or 0 if X is not in the table.
1332 MODE is the machine-mode of X, or if X is an integer constant
1333 with VOIDmode then MODE is the mode with which X will be used.
1335 Here we are satisfied to find an expression whose tree structure
1338 static struct table_elt *
1339 lookup (x, hash, mode)
1342 enum machine_mode mode;
1344 register struct table_elt *p;
1346 for (p = table[hash]; p; p = p->next_same_hash)
1347 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1348 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1354 /* Like `lookup' but don't care whether the table element uses invalid regs.
1355 Also ignore discrepancies in the machine mode of a register. */
1357 static struct table_elt *
1358 lookup_for_remove (x, hash, mode)
1361 enum machine_mode mode;
1363 register struct table_elt *p;
1365 if (GET_CODE (x) == REG)
1367 int regno = REGNO (x);
1368 /* Don't check the machine mode when comparing registers;
1369 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1370 for (p = table[hash]; p; p = p->next_same_hash)
1371 if (GET_CODE (p->exp) == REG
1372 && REGNO (p->exp) == regno)
1377 for (p = table[hash]; p; p = p->next_same_hash)
1378 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1385 /* Look for an expression equivalent to X and with code CODE.
1386 If one is found, return that expression. */
1389 lookup_as_function (x, code)
1393 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1395 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1396 long as we are narrowing. So if we looked in vain for a mode narrower
1397 than word_mode before, look for word_mode now. */
1398 if (p == 0 && code == CONST_INT
1399 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1402 PUT_MODE (x, word_mode);
1403 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1409 for (p = p->first_same_value; p; p = p->next_same_value)
1411 if (GET_CODE (p->exp) == code
1412 /* Make sure this is a valid entry in the table. */
1413 && exp_equiv_p (p->exp, p->exp, 1, 0))
1420 /* Insert X in the hash table, assuming HASH is its hash code
1421 and CLASSP is an element of the class it should go in
1422 (or 0 if a new class should be made).
1423 It is inserted at the proper position to keep the class in
1424 the order cheapest first.
1426 MODE is the machine-mode of X, or if X is an integer constant
1427 with VOIDmode then MODE is the mode with which X will be used.
1429 For elements of equal cheapness, the most recent one
1430 goes in front, except that the first element in the list
1431 remains first unless a cheaper element is added. The order of
1432 pseudo-registers does not matter, as canon_reg will be called to
1433 find the cheapest when a register is retrieved from the table.
1435 The in_memory field in the hash table element is set to 0.
1436 The caller must set it nonzero if appropriate.
1438 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1439 and if insert_regs returns a nonzero value
1440 you must then recompute its hash code before calling here.
1442 If necessary, update table showing constant values of quantities. */
1444 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1446 static struct table_elt *
1447 insert (x, classp, hash, mode)
1449 register struct table_elt *classp;
1451 enum machine_mode mode;
1453 register struct table_elt *elt;
1455 /* If X is a register and we haven't made a quantity for it,
1456 something is wrong. */
1457 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1460 /* If X is a hard register, show it is being put in the table. */
1461 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1463 int regno = REGNO (x);
1464 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1467 for (i = regno; i < endregno; i++)
1468 SET_HARD_REG_BIT (hard_regs_in_table, i);
1471 /* If X is a label, show we recorded it. */
1472 if (GET_CODE (x) == LABEL_REF
1473 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1474 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1475 recorded_label_ref = 1;
1477 /* Put an element for X into the right hash bucket. */
1479 elt = get_element ();
1481 elt->cost = COST (x);
1482 elt->next_same_value = 0;
1483 elt->prev_same_value = 0;
1484 elt->next_same_hash = table[hash];
1485 elt->prev_same_hash = 0;
1486 elt->related_value = 0;
1489 elt->is_const = (CONSTANT_P (x)
1490 /* GNU C++ takes advantage of this for `this'
1491 (and other const values). */
1492 || (RTX_UNCHANGING_P (x)
1493 && GET_CODE (x) == REG
1494 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1495 || FIXED_BASE_PLUS_P (x));
1498 table[hash]->prev_same_hash = elt;
1501 /* Put it into the proper value-class. */
1504 classp = classp->first_same_value;
1505 if (CHEAPER (elt, classp))
1506 /* Insert at the head of the class */
1508 register struct table_elt *p;
1509 elt->next_same_value = classp;
1510 classp->prev_same_value = elt;
1511 elt->first_same_value = elt;
1513 for (p = classp; p; p = p->next_same_value)
1514 p->first_same_value = elt;
1518 /* Insert not at head of the class. */
1519 /* Put it after the last element cheaper than X. */
1520 register struct table_elt *p, *next;
1521 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1523 /* Put it after P and before NEXT. */
1524 elt->next_same_value = next;
1526 next->prev_same_value = elt;
1527 elt->prev_same_value = p;
1528 p->next_same_value = elt;
1529 elt->first_same_value = classp;
1533 elt->first_same_value = elt;
1535 /* If this is a constant being set equivalent to a register or a register
1536 being set equivalent to a constant, note the constant equivalence.
1538 If this is a constant, it cannot be equivalent to a different constant,
1539 and a constant is the only thing that can be cheaper than a register. So
1540 we know the register is the head of the class (before the constant was
1543 If this is a register that is not already known equivalent to a
1544 constant, we must check the entire class.
1546 If this is a register that is already known equivalent to an insn,
1547 update `qty_const_insn' to show that `this_insn' is the latest
1548 insn making that quantity equivalent to the constant. */
1550 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1551 && GET_CODE (x) != REG)
1553 qty_const[REG_QTY (REGNO (classp->exp))]
1554 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1555 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1558 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1561 register struct table_elt *p;
1563 for (p = classp; p != 0; p = p->next_same_value)
1565 if (p->is_const && GET_CODE (p->exp) != REG)
1567 qty_const[REG_QTY (REGNO (x))]
1568 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1569 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1575 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1576 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1577 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1579 /* If this is a constant with symbolic value,
1580 and it has a term with an explicit integer value,
1581 link it up with related expressions. */
1582 if (GET_CODE (x) == CONST)
1584 rtx subexp = get_related_value (x);
1586 struct table_elt *subelt, *subelt_prev;
1590 /* Get the integer-free subexpression in the hash table. */
1591 subhash = safe_hash (subexp, mode) % NBUCKETS;
1592 subelt = lookup (subexp, subhash, mode);
1594 subelt = insert (subexp, NULL_PTR, subhash, mode);
1595 /* Initialize SUBELT's circular chain if it has none. */
1596 if (subelt->related_value == 0)
1597 subelt->related_value = subelt;
1598 /* Find the element in the circular chain that precedes SUBELT. */
1599 subelt_prev = subelt;
1600 while (subelt_prev->related_value != subelt)
1601 subelt_prev = subelt_prev->related_value;
1602 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1603 This way the element that follows SUBELT is the oldest one. */
1604 elt->related_value = subelt_prev->related_value;
1605 subelt_prev->related_value = elt;
1612 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1613 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1614 the two classes equivalent.
1616 CLASS1 will be the surviving class; CLASS2 should not be used after this
1619 Any invalid entries in CLASS2 will not be copied. */
1622 merge_equiv_classes (class1, class2)
1623 struct table_elt *class1, *class2;
1625 struct table_elt *elt, *next, *new;
1627 /* Ensure we start with the head of the classes. */
1628 class1 = class1->first_same_value;
1629 class2 = class2->first_same_value;
1631 /* If they were already equal, forget it. */
1632 if (class1 == class2)
1635 for (elt = class2; elt; elt = next)
1639 enum machine_mode mode = elt->mode;
1641 next = elt->next_same_value;
1643 /* Remove old entry, make a new one in CLASS1's class.
1644 Don't do this for invalid entries as we cannot find their
1645 hash code (it also isn't necessary). */
1646 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1648 hash_arg_in_memory = 0;
1649 hash_arg_in_struct = 0;
1650 hash = HASH (exp, mode);
1652 if (GET_CODE (exp) == REG)
1653 delete_reg_equiv (REGNO (exp));
1655 remove_from_table (elt, hash);
1657 if (insert_regs (exp, class1, 0))
1659 rehash_using_reg (exp);
1660 hash = HASH (exp, mode);
1662 new = insert (exp, class1, hash, mode);
1663 new->in_memory = hash_arg_in_memory;
1664 new->in_struct = hash_arg_in_struct;
1669 /* Remove from the hash table, or mark as invalid,
1670 all expressions whose values could be altered by storing in X.
1671 X is a register, a subreg, or a memory reference with nonvarying address
1672 (because, when a memory reference with a varying address is stored in,
1673 all memory references are removed by invalidate_memory
1674 so specific invalidation is superfluous).
1675 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1676 instead of just the amount indicated by the mode of X. This is only used
1677 for bitfield stores into memory.
1679 A nonvarying address may be just a register or just
1680 a symbol reference, or it may be either of those plus
1681 a numeric offset. */
1684 invalidate (x, full_mode)
1686 enum machine_mode full_mode;
1689 register struct table_elt *p;
1691 /* If X is a register, dependencies on its contents
1692 are recorded through the qty number mechanism.
1693 Just change the qty number of the register,
1694 mark it as invalid for expressions that refer to it,
1695 and remove it itself. */
1697 if (GET_CODE (x) == REG)
1699 register int regno = REGNO (x);
1700 register unsigned hash = HASH (x, GET_MODE (x));
1702 /* Remove REGNO from any quantity list it might be on and indicate
1703 that its value might have changed. If it is a pseudo, remove its
1704 entry from the hash table.
1706 For a hard register, we do the first two actions above for any
1707 additional hard registers corresponding to X. Then, if any of these
1708 registers are in the table, we must remove any REG entries that
1709 overlap these registers. */
1711 delete_reg_equiv (regno);
1714 if (regno >= FIRST_PSEUDO_REGISTER)
1716 /* Because a register can be referenced in more than one mode,
1717 we might have to remove more than one table entry. */
1719 struct table_elt *elt;
1721 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1722 remove_from_table (elt, hash);
1726 HOST_WIDE_INT in_table
1727 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1728 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1729 int tregno, tendregno;
1730 register struct table_elt *p, *next;
1732 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1734 for (i = regno + 1; i < endregno; i++)
1736 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1737 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1738 delete_reg_equiv (i);
1743 for (hash = 0; hash < NBUCKETS; hash++)
1744 for (p = table[hash]; p; p = next)
1746 next = p->next_same_hash;
1748 if (GET_CODE (p->exp) != REG
1749 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1752 tregno = REGNO (p->exp);
1754 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1755 if (tendregno > regno && tregno < endregno)
1756 remove_from_table (p, hash);
1763 if (GET_CODE (x) == SUBREG)
1765 if (GET_CODE (SUBREG_REG (x)) != REG)
1767 invalidate (SUBREG_REG (x), VOIDmode);
1771 /* If X is a parallel, invalidate all of its elements. */
1773 if (GET_CODE (x) == PARALLEL)
1775 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1776 invalidate (XVECEXP (x, 0, i), VOIDmode);
1780 /* If X is an expr_list, this is part of a disjoint return value;
1781 extract the location in question ignoring the offset. */
1783 if (GET_CODE (x) == EXPR_LIST)
1785 invalidate (XEXP (x, 0), VOIDmode);
1789 /* X is not a register; it must be a memory reference with
1790 a nonvarying address. Remove all hash table elements
1791 that refer to overlapping pieces of memory. */
1793 if (GET_CODE (x) != MEM)
1796 if (full_mode == VOIDmode)
1797 full_mode = GET_MODE (x);
1799 for (i = 0; i < NBUCKETS; i++)
1801 register struct table_elt *next;
1802 for (p = table[i]; p; p = next)
1804 next = p->next_same_hash;
1805 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1806 than checking all the aliases). */
1808 && (GET_CODE (p->exp) != MEM
1809 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1810 remove_from_table (p, i);
1815 /* Remove all expressions that refer to register REGNO,
1816 since they are already invalid, and we are about to
1817 mark that register valid again and don't want the old
1818 expressions to reappear as valid. */
1821 remove_invalid_refs (regno)
1825 register struct table_elt *p, *next;
1827 for (i = 0; i < NBUCKETS; i++)
1828 for (p = table[i]; p; p = next)
1830 next = p->next_same_hash;
1831 if (GET_CODE (p->exp) != REG
1832 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1833 remove_from_table (p, i);
1837 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1839 remove_invalid_subreg_refs (regno, word, mode)
1842 enum machine_mode mode;
1845 register struct table_elt *p, *next;
1846 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1848 for (i = 0; i < NBUCKETS; i++)
1849 for (p = table[i]; p; p = next)
1852 next = p->next_same_hash;
1855 if (GET_CODE (p->exp) != REG
1856 && (GET_CODE (exp) != SUBREG
1857 || GET_CODE (SUBREG_REG (exp)) != REG
1858 || REGNO (SUBREG_REG (exp)) != regno
1859 || (((SUBREG_WORD (exp)
1860 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1862 && SUBREG_WORD (exp) <= end))
1863 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1864 remove_from_table (p, i);
1868 /* Recompute the hash codes of any valid entries in the hash table that
1869 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1871 This is called when we make a jump equivalence. */
1874 rehash_using_reg (x)
1878 struct table_elt *p, *next;
1881 if (GET_CODE (x) == SUBREG)
1884 /* If X is not a register or if the register is known not to be in any
1885 valid entries in the table, we have no work to do. */
1887 if (GET_CODE (x) != REG
1888 || REG_IN_TABLE (REGNO (x)) < 0
1889 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1892 /* Scan all hash chains looking for valid entries that mention X.
1893 If we find one and it is in the wrong hash chain, move it. We can skip
1894 objects that are registers, since they are handled specially. */
1896 for (i = 0; i < NBUCKETS; i++)
1897 for (p = table[i]; p; p = next)
1899 next = p->next_same_hash;
1900 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1901 && exp_equiv_p (p->exp, p->exp, 1, 0)
1902 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1904 if (p->next_same_hash)
1905 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1907 if (p->prev_same_hash)
1908 p->prev_same_hash->next_same_hash = p->next_same_hash;
1910 table[i] = p->next_same_hash;
1912 p->next_same_hash = table[hash];
1913 p->prev_same_hash = 0;
1915 table[hash]->prev_same_hash = p;
1921 /* Remove from the hash table any expression that is a call-clobbered
1922 register. Also update their TICK values. */
1925 invalidate_for_call ()
1927 int regno, endregno;
1930 struct table_elt *p, *next;
1933 /* Go through all the hard registers. For each that is clobbered in
1934 a CALL_INSN, remove the register from quantity chains and update
1935 reg_tick if defined. Also see if any of these registers is currently
1938 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1939 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1941 delete_reg_equiv (regno);
1942 if (REG_TICK (regno) >= 0)
1945 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1948 /* In the case where we have no call-clobbered hard registers in the
1949 table, we are done. Otherwise, scan the table and remove any
1950 entry that overlaps a call-clobbered register. */
1953 for (hash = 0; hash < NBUCKETS; hash++)
1954 for (p = table[hash]; p; p = next)
1956 next = p->next_same_hash;
1960 remove_from_table (p, hash);
1964 if (GET_CODE (p->exp) != REG
1965 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1968 regno = REGNO (p->exp);
1969 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1971 for (i = regno; i < endregno; i++)
1972 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1974 remove_from_table (p, hash);
1980 /* Given an expression X of type CONST,
1981 and ELT which is its table entry (or 0 if it
1982 is not in the hash table),
1983 return an alternate expression for X as a register plus integer.
1984 If none can be found, return 0. */
1987 use_related_value (x, elt)
1989 struct table_elt *elt;
1991 register struct table_elt *relt = 0;
1992 register struct table_elt *p, *q;
1993 HOST_WIDE_INT offset;
1995 /* First, is there anything related known?
1996 If we have a table element, we can tell from that.
1997 Otherwise, must look it up. */
1999 if (elt != 0 && elt->related_value != 0)
2001 else if (elt == 0 && GET_CODE (x) == CONST)
2003 rtx subexp = get_related_value (x);
2005 relt = lookup (subexp,
2006 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2013 /* Search all related table entries for one that has an
2014 equivalent register. */
2019 /* This loop is strange in that it is executed in two different cases.
2020 The first is when X is already in the table. Then it is searching
2021 the RELATED_VALUE list of X's class (RELT). The second case is when
2022 X is not in the table. Then RELT points to a class for the related
2025 Ensure that, whatever case we are in, that we ignore classes that have
2026 the same value as X. */
2028 if (rtx_equal_p (x, p->exp))
2031 for (q = p->first_same_value; q; q = q->next_same_value)
2032 if (GET_CODE (q->exp) == REG)
2038 p = p->related_value;
2040 /* We went all the way around, so there is nothing to be found.
2041 Alternatively, perhaps RELT was in the table for some other reason
2042 and it has no related values recorded. */
2043 if (p == relt || p == 0)
2050 offset = (get_integer_term (x) - get_integer_term (p->exp));
2051 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2052 return plus_constant (q->exp, offset);
2055 /* Hash an rtx. We are careful to make sure the value is never negative.
2056 Equivalent registers hash identically.
2057 MODE is used in hashing for CONST_INTs only;
2058 otherwise the mode of X is used.
2060 Store 1 in do_not_record if any subexpression is volatile.
2062 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2063 which does not have the RTX_UNCHANGING_P bit set.
2064 In this case, also store 1 in hash_arg_in_struct
2065 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2067 Note that cse_insn knows that the hash code of a MEM expression
2068 is just (int) MEM plus the hash code of the address. */
2071 canon_hash (x, mode)
2073 enum machine_mode mode;
2076 register unsigned hash = 0;
2077 register enum rtx_code code;
2080 /* repeat is used to turn tail-recursion into iteration. */
2085 code = GET_CODE (x);
2090 register int regno = REGNO (x);
2092 /* On some machines, we can't record any non-fixed hard register,
2093 because extending its life will cause reload problems. We
2094 consider ap, fp, and sp to be fixed for this purpose.
2096 We also consider CCmode registers to be fixed for this purpose;
2097 failure to do so leads to failure to simplify 0<100 type of
2100 On all machines, we can't record any global registers. */
2102 if (regno < FIRST_PSEUDO_REGISTER
2103 && (global_regs[regno]
2104 || (SMALL_REGISTER_CLASSES
2105 && ! fixed_regs[regno]
2106 && regno != FRAME_POINTER_REGNUM
2107 && regno != HARD_FRAME_POINTER_REGNUM
2108 && regno != ARG_POINTER_REGNUM
2109 && regno != STACK_POINTER_REGNUM
2110 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2115 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2119 /* We handle SUBREG of a REG specially because the underlying
2120 reg changes its hash value with every value change; we don't
2121 want to have to forget unrelated subregs when one subreg changes. */
2124 if (GET_CODE (SUBREG_REG (x)) == REG)
2126 hash += (((unsigned) SUBREG << 7)
2127 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2135 unsigned HOST_WIDE_INT tem = INTVAL (x);
2136 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2141 /* This is like the general case, except that it only counts
2142 the integers representing the constant. */
2143 hash += (unsigned) code + (unsigned) GET_MODE (x);
2144 if (GET_MODE (x) != VOIDmode)
2145 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2147 unsigned tem = XINT (x, i);
2151 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2152 + (unsigned) CONST_DOUBLE_HIGH (x));
2155 /* Assume there is only one rtx object for any given label. */
2158 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2163 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2167 if (MEM_VOLATILE_P (x))
2172 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2174 hash_arg_in_memory = 1;
2175 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2177 /* Now that we have already found this special case,
2178 might as well speed it up as much as possible. */
2179 hash += (unsigned) MEM;
2190 case UNSPEC_VOLATILE:
2195 if (MEM_VOLATILE_P (x))
2206 i = GET_RTX_LENGTH (code) - 1;
2207 hash += (unsigned) code + (unsigned) GET_MODE (x);
2208 fmt = GET_RTX_FORMAT (code);
2213 rtx tem = XEXP (x, i);
2215 /* If we are about to do the last recursive call
2216 needed at this level, change it into iteration.
2217 This function is called enough to be worth it. */
2223 hash += canon_hash (tem, 0);
2225 else if (fmt[i] == 'E')
2226 for (j = 0; j < XVECLEN (x, i); j++)
2227 hash += canon_hash (XVECEXP (x, i, j), 0);
2228 else if (fmt[i] == 's')
2230 register unsigned char *p = (unsigned char *) XSTR (x, i);
2235 else if (fmt[i] == 'i')
2237 register unsigned tem = XINT (x, i);
2240 else if (fmt[i] == '0')
2248 /* Like canon_hash but with no side effects. */
2253 enum machine_mode mode;
2255 int save_do_not_record = do_not_record;
2256 int save_hash_arg_in_memory = hash_arg_in_memory;
2257 int save_hash_arg_in_struct = hash_arg_in_struct;
2258 unsigned hash = canon_hash (x, mode);
2259 hash_arg_in_memory = save_hash_arg_in_memory;
2260 hash_arg_in_struct = save_hash_arg_in_struct;
2261 do_not_record = save_do_not_record;
2265 /* Return 1 iff X and Y would canonicalize into the same thing,
2266 without actually constructing the canonicalization of either one.
2267 If VALIDATE is nonzero,
2268 we assume X is an expression being processed from the rtl
2269 and Y was found in the hash table. We check register refs
2270 in Y for being marked as valid.
2272 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2273 that is known to be in the register. Ordinarily, we don't allow them
2274 to match, because letting them match would cause unpredictable results
2275 in all the places that search a hash table chain for an equivalent
2276 for a given value. A possible equivalent that has different structure
2277 has its hash code computed from different data. Whether the hash code
2278 is the same as that of the given value is pure luck. */
2281 exp_equiv_p (x, y, validate, equal_values)
2287 register enum rtx_code code;
2290 /* Note: it is incorrect to assume an expression is equivalent to itself
2291 if VALIDATE is nonzero. */
2292 if (x == y && !validate)
2294 if (x == 0 || y == 0)
2297 code = GET_CODE (x);
2298 if (code != GET_CODE (y))
2303 /* If X is a constant and Y is a register or vice versa, they may be
2304 equivalent. We only have to validate if Y is a register. */
2305 if (CONSTANT_P (x) && GET_CODE (y) == REG
2306 && REGNO_QTY_VALID_P (REGNO (y))
2307 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2308 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2309 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2312 if (CONSTANT_P (y) && code == REG
2313 && REGNO_QTY_VALID_P (REGNO (x))
2314 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2315 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2321 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2322 if (GET_MODE (x) != GET_MODE (y))
2332 return INTVAL (x) == INTVAL (y);
2335 return XEXP (x, 0) == XEXP (y, 0);
2338 return XSTR (x, 0) == XSTR (y, 0);
2342 int regno = REGNO (y);
2344 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2345 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2348 /* If the quantities are not the same, the expressions are not
2349 equivalent. If there are and we are not to validate, they
2350 are equivalent. Otherwise, ensure all regs are up-to-date. */
2352 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2358 for (i = regno; i < endregno; i++)
2359 if (REG_IN_TABLE (i) != REG_TICK (i))
2365 /* For commutative operations, check both orders. */
2373 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2374 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2375 validate, equal_values))
2376 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2377 validate, equal_values)
2378 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2379 validate, equal_values)));
2385 /* Compare the elements. If any pair of corresponding elements
2386 fail to match, return 0 for the whole things. */
2388 fmt = GET_RTX_FORMAT (code);
2389 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2394 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2399 if (XVECLEN (x, i) != XVECLEN (y, i))
2401 for (j = 0; j < XVECLEN (x, i); j++)
2402 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2403 validate, equal_values))
2408 if (strcmp (XSTR (x, i), XSTR (y, i)))
2413 if (XINT (x, i) != XINT (y, i))
2418 if (XWINT (x, i) != XWINT (y, i))
2433 /* Return 1 iff any subexpression of X matches Y.
2434 Here we do not require that X or Y be valid (for registers referred to)
2435 for being in the hash table. */
2442 register enum rtx_code code;
2448 if (x == 0 || y == 0)
2451 code = GET_CODE (x);
2452 /* If X as a whole has the same code as Y, they may match.
2454 if (code == GET_CODE (y))
2456 if (exp_equiv_p (x, y, 0, 1))
2460 /* X does not match, so try its subexpressions. */
2462 fmt = GET_RTX_FORMAT (code);
2463 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2472 if (refers_to_p (XEXP (x, i), y))
2475 else if (fmt[i] == 'E')
2478 for (j = 0; j < XVECLEN (x, i); j++)
2479 if (refers_to_p (XVECEXP (x, i, j), y))
2486 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2487 set PBASE, PSTART, and PEND which correspond to the base of the address,
2488 the starting offset, and ending offset respectively.
2490 ADDR is known to be a nonvarying address. */
2492 /* ??? Despite what the comments say, this function is in fact frequently
2493 passed varying addresses. This does not appear to cause any problems. */
2496 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2500 HOST_WIDE_INT *pstart, *pend;
2503 HOST_WIDE_INT start, end;
2509 if (flag_pic && GET_CODE (base) == PLUS
2510 && XEXP (base, 0) == pic_offset_table_rtx)
2511 base = XEXP (base, 1);
2513 /* Registers with nonvarying addresses usually have constant equivalents;
2514 but the frame pointer register is also possible. */
2515 if (GET_CODE (base) == REG
2517 && REGNO_QTY_VALID_P (REGNO (base))
2518 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2519 && qty_const[REG_QTY (REGNO (base))] != 0)
2520 base = qty_const[REG_QTY (REGNO (base))];
2521 else if (GET_CODE (base) == PLUS
2522 && GET_CODE (XEXP (base, 1)) == CONST_INT
2523 && GET_CODE (XEXP (base, 0)) == REG
2525 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2526 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2527 == GET_MODE (XEXP (base, 0)))
2528 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2530 start = INTVAL (XEXP (base, 1));
2531 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2533 /* This can happen as the result of virtual register instantiation,
2534 if the initial offset is too large to be a valid address. */
2535 else if (GET_CODE (base) == PLUS
2536 && GET_CODE (XEXP (base, 0)) == REG
2537 && GET_CODE (XEXP (base, 1)) == REG
2539 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2540 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2541 == GET_MODE (XEXP (base, 0)))
2542 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2543 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2544 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2545 == GET_MODE (XEXP (base, 1)))
2546 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2548 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2549 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2551 /* One of the two values must be a constant. */
2552 if (GET_CODE (base) != CONST_INT)
2554 if (GET_CODE (tem) != CONST_INT)
2556 start = INTVAL (tem);
2560 start = INTVAL (base);
2565 /* Handle everything that we can find inside an address that has been
2566 viewed as constant. */
2570 /* If no part of this switch does a "continue", the code outside
2571 will exit this loop. */
2573 switch (GET_CODE (base))
2576 /* By definition, operand1 of a LO_SUM is the associated constant
2577 address. Use the associated constant address as the base
2579 base = XEXP (base, 1);
2583 /* Strip off CONST. */
2584 base = XEXP (base, 0);
2588 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2590 start += INTVAL (XEXP (base, 1));
2591 base = XEXP (base, 0);
2597 /* Handle the case of an AND which is the negative of a power of
2598 two. This is used to represent unaligned memory operations. */
2599 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2600 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2602 set_nonvarying_address_components (XEXP (base, 0), size,
2603 pbase, pstart, pend);
2605 /* Assume the worst misalignment. START is affected, but not
2606 END, so compensate but adjusting SIZE. Don't lose any
2607 constant we already had. */
2609 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2610 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2623 if (GET_CODE (base) == CONST_INT)
2625 start += INTVAL (base);
2631 /* Set the return values. */
2637 /* Return 1 if X has a value that can vary even between two
2638 executions of the program. 0 means X can be compared reliably
2639 against certain constants or near-constants. */
2642 cse_rtx_varies_p (x)
2645 /* We need not check for X and the equivalence class being of the same
2646 mode because if X is equivalent to a constant in some mode, it
2647 doesn't vary in any mode. */
2649 if (GET_CODE (x) == REG
2650 && REGNO_QTY_VALID_P (REGNO (x))
2651 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2652 && qty_const[REG_QTY (REGNO (x))] != 0)
2655 if (GET_CODE (x) == PLUS
2656 && GET_CODE (XEXP (x, 1)) == CONST_INT
2657 && GET_CODE (XEXP (x, 0)) == REG
2658 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2659 && (GET_MODE (XEXP (x, 0))
2660 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2661 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2664 /* This can happen as the result of virtual register instantiation, if
2665 the initial constant is too large to be a valid address. This gives
2666 us a three instruction sequence, load large offset into a register,
2667 load fp minus a constant into a register, then a MEM which is the
2668 sum of the two `constant' registers. */
2669 if (GET_CODE (x) == PLUS
2670 && GET_CODE (XEXP (x, 0)) == REG
2671 && GET_CODE (XEXP (x, 1)) == REG
2672 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2673 && (GET_MODE (XEXP (x, 0))
2674 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2675 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2676 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2677 && (GET_MODE (XEXP (x, 1))
2678 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2679 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2682 return rtx_varies_p (x);
2685 /* Canonicalize an expression:
2686 replace each register reference inside it
2687 with the "oldest" equivalent register.
2689 If INSN is non-zero and we are replacing a pseudo with a hard register
2690 or vice versa, validate_change is used to ensure that INSN remains valid
2691 after we make our substitution. The calls are made with IN_GROUP non-zero
2692 so apply_change_group must be called upon the outermost return from this
2693 function (unless INSN is zero). The result of apply_change_group can
2694 generally be discarded since the changes we are making are optional. */
2702 register enum rtx_code code;
2708 code = GET_CODE (x);
2726 /* Never replace a hard reg, because hard regs can appear
2727 in more than one machine mode, and we must preserve the mode
2728 of each occurrence. Also, some hard regs appear in
2729 MEMs that are shared and mustn't be altered. Don't try to
2730 replace any reg that maps to a reg of class NO_REGS. */
2731 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2732 || ! REGNO_QTY_VALID_P (REGNO (x)))
2735 first = qty_first_reg[REG_QTY (REGNO (x))];
2736 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2737 : REGNO_REG_CLASS (first) == NO_REGS ? x
2738 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2745 fmt = GET_RTX_FORMAT (code);
2746 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2752 rtx new = canon_reg (XEXP (x, i), insn);
2755 /* If replacing pseudo with hard reg or vice versa, ensure the
2756 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2757 if (insn != 0 && new != 0
2758 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2759 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2760 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2761 || (insn_code = recog_memoized (insn)) < 0
2762 || insn_n_dups[insn_code] > 0))
2763 validate_change (insn, &XEXP (x, i), new, 1);
2767 else if (fmt[i] == 'E')
2768 for (j = 0; j < XVECLEN (x, i); j++)
2769 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2775 /* LOC is a location within INSN that is an operand address (the contents of
2776 a MEM). Find the best equivalent address to use that is valid for this
2779 On most CISC machines, complicated address modes are costly, and rtx_cost
2780 is a good approximation for that cost. However, most RISC machines have
2781 only a few (usually only one) memory reference formats. If an address is
2782 valid at all, it is often just as cheap as any other address. Hence, for
2783 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2784 costs of various addresses. For two addresses of equal cost, choose the one
2785 with the highest `rtx_cost' value as that has the potential of eliminating
2786 the most insns. For equal costs, we choose the first in the equivalence
2787 class. Note that we ignore the fact that pseudo registers are cheaper
2788 than hard registers here because we would also prefer the pseudo registers.
2792 find_best_addr (insn, loc)
2796 struct table_elt *elt;
2799 struct table_elt *p;
2800 int found_better = 1;
2802 int save_do_not_record = do_not_record;
2803 int save_hash_arg_in_memory = hash_arg_in_memory;
2804 int save_hash_arg_in_struct = hash_arg_in_struct;
2809 /* Do not try to replace constant addresses or addresses of local and
2810 argument slots. These MEM expressions are made only once and inserted
2811 in many instructions, as well as being used to control symbol table
2812 output. It is not safe to clobber them.
2814 There are some uncommon cases where the address is already in a register
2815 for some reason, but we cannot take advantage of that because we have
2816 no easy way to unshare the MEM. In addition, looking up all stack
2817 addresses is costly. */
2818 if ((GET_CODE (addr) == PLUS
2819 && GET_CODE (XEXP (addr, 0)) == REG
2820 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2821 && (regno = REGNO (XEXP (addr, 0)),
2822 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2823 || regno == ARG_POINTER_REGNUM))
2824 || (GET_CODE (addr) == REG
2825 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2826 || regno == HARD_FRAME_POINTER_REGNUM
2827 || regno == ARG_POINTER_REGNUM))
2828 || GET_CODE (addr) == ADDRESSOF
2829 || CONSTANT_ADDRESS_P (addr))
2832 /* If this address is not simply a register, try to fold it. This will
2833 sometimes simplify the expression. Many simplifications
2834 will not be valid, but some, usually applying the associative rule, will
2835 be valid and produce better code. */
2836 if (GET_CODE (addr) != REG)
2838 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2842 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2843 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2844 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2846 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2848 && validate_change (insn, loc, folded, 0))
2852 /* If this address is not in the hash table, we can't look for equivalences
2853 of the whole address. Also, ignore if volatile. */
2856 hash = HASH (addr, Pmode);
2857 addr_volatile = do_not_record;
2858 do_not_record = save_do_not_record;
2859 hash_arg_in_memory = save_hash_arg_in_memory;
2860 hash_arg_in_struct = save_hash_arg_in_struct;
2865 elt = lookup (addr, hash, Pmode);
2867 #ifndef ADDRESS_COST
2870 int our_cost = elt->cost;
2872 /* Find the lowest cost below ours that works. */
2873 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2874 if (elt->cost < our_cost
2875 && (GET_CODE (elt->exp) == REG
2876 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2877 && validate_change (insn, loc,
2878 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2885 /* We need to find the best (under the criteria documented above) entry
2886 in the class that is valid. We use the `flag' field to indicate
2887 choices that were invalid and iterate until we can't find a better
2888 one that hasn't already been tried. */
2890 for (p = elt->first_same_value; p; p = p->next_same_value)
2893 while (found_better)
2895 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2896 int best_rtx_cost = (elt->cost + 1) >> 1;
2897 struct table_elt *best_elt = elt;
2900 for (p = elt->first_same_value; p; p = p->next_same_value)
2903 if ((GET_CODE (p->exp) == REG
2904 || exp_equiv_p (p->exp, p->exp, 1, 0))
2905 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2906 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2907 && (p->cost + 1) >> 1 > best_rtx_cost)))
2910 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2911 best_rtx_cost = (p->cost + 1) >> 1;
2918 if (validate_change (insn, loc,
2919 canon_reg (copy_rtx (best_elt->exp),
2928 /* If the address is a binary operation with the first operand a register
2929 and the second a constant, do the same as above, but looking for
2930 equivalences of the register. Then try to simplify before checking for
2931 the best address to use. This catches a few cases: First is when we
2932 have REG+const and the register is another REG+const. We can often merge
2933 the constants and eliminate one insn and one register. It may also be
2934 that a machine has a cheap REG+REG+const. Finally, this improves the
2935 code on the Alpha for unaligned byte stores. */
2937 if (flag_expensive_optimizations
2938 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2939 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2940 && GET_CODE (XEXP (*loc, 0)) == REG
2941 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2943 rtx c = XEXP (*loc, 1);
2946 hash = HASH (XEXP (*loc, 0), Pmode);
2947 do_not_record = save_do_not_record;
2948 hash_arg_in_memory = save_hash_arg_in_memory;
2949 hash_arg_in_struct = save_hash_arg_in_struct;
2951 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2955 /* We need to find the best (under the criteria documented above) entry
2956 in the class that is valid. We use the `flag' field to indicate
2957 choices that were invalid and iterate until we can't find a better
2958 one that hasn't already been tried. */
2960 for (p = elt->first_same_value; p; p = p->next_same_value)
2963 while (found_better)
2965 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2966 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2967 struct table_elt *best_elt = elt;
2968 rtx best_rtx = *loc;
2971 /* This is at worst case an O(n^2) algorithm, so limit our search
2972 to the first 32 elements on the list. This avoids trouble
2973 compiling code with very long basic blocks that can easily
2974 call cse_gen_binary so many times that we run out of memory. */
2977 for (p = elt->first_same_value, count = 0;
2979 p = p->next_same_value, count++)
2981 && (GET_CODE (p->exp) == REG
2982 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2984 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2986 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2987 || (CSE_ADDRESS_COST (new) == best_addr_cost
2988 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2991 best_addr_cost = CSE_ADDRESS_COST (new);
2992 best_rtx_cost = (COST (new) + 1) >> 1;
3000 if (validate_change (insn, loc,
3001 canon_reg (copy_rtx (best_rtx),
3012 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3013 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3014 what values are being compared.
3016 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3017 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3018 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3019 compared to produce cc0.
3021 The return value is the comparison operator and is either the code of
3022 A or the code corresponding to the inverse of the comparison. */
3024 static enum rtx_code
3025 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3028 enum machine_mode *pmode1, *pmode2;
3032 arg1 = *parg1, arg2 = *parg2;
3034 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3036 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3038 /* Set non-zero when we find something of interest. */
3040 int reverse_code = 0;
3041 struct table_elt *p = 0;
3043 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3044 On machines with CC0, this is the only case that can occur, since
3045 fold_rtx will return the COMPARE or item being compared with zero
3048 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3051 /* If ARG1 is a comparison operator and CODE is testing for
3052 STORE_FLAG_VALUE, get the inner arguments. */
3054 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3057 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3058 && code == LT && STORE_FLAG_VALUE == -1)
3059 #ifdef FLOAT_STORE_FLAG_VALUE
3060 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3061 && FLOAT_STORE_FLAG_VALUE < 0)
3066 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3067 && code == GE && STORE_FLAG_VALUE == -1)
3068 #ifdef FLOAT_STORE_FLAG_VALUE
3069 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3070 && FLOAT_STORE_FLAG_VALUE < 0)
3073 x = arg1, reverse_code = 1;
3076 /* ??? We could also check for
3078 (ne (and (eq (...) (const_int 1))) (const_int 0))
3080 and related forms, but let's wait until we see them occurring. */
3083 /* Look up ARG1 in the hash table and see if it has an equivalence
3084 that lets us see what is being compared. */
3085 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3087 if (p) p = p->first_same_value;
3089 for (; p; p = p->next_same_value)
3091 enum machine_mode inner_mode = GET_MODE (p->exp);
3093 /* If the entry isn't valid, skip it. */
3094 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3097 if (GET_CODE (p->exp) == COMPARE
3098 /* Another possibility is that this machine has a compare insn
3099 that includes the comparison code. In that case, ARG1 would
3100 be equivalent to a comparison operation that would set ARG1 to
3101 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3102 ORIG_CODE is the actual comparison being done; if it is an EQ,
3103 we must reverse ORIG_CODE. On machine with a negative value
3104 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3107 && GET_MODE_CLASS (inner_mode) == MODE_INT
3108 && (GET_MODE_BITSIZE (inner_mode)
3109 <= HOST_BITS_PER_WIDE_INT)
3110 && (STORE_FLAG_VALUE
3111 & ((HOST_WIDE_INT) 1
3112 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3113 #ifdef FLOAT_STORE_FLAG_VALUE
3115 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3116 && FLOAT_STORE_FLAG_VALUE < 0)
3119 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3124 else if ((code == EQ
3126 && GET_MODE_CLASS (inner_mode) == MODE_INT
3127 && (GET_MODE_BITSIZE (inner_mode)
3128 <= HOST_BITS_PER_WIDE_INT)
3129 && (STORE_FLAG_VALUE
3130 & ((HOST_WIDE_INT) 1
3131 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3132 #ifdef FLOAT_STORE_FLAG_VALUE
3134 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3135 && FLOAT_STORE_FLAG_VALUE < 0)
3138 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3145 /* If this is fp + constant, the equivalent is a better operand since
3146 it may let us predict the value of the comparison. */
3147 else if (NONZERO_BASE_PLUS_P (p->exp))
3154 /* If we didn't find a useful equivalence for ARG1, we are done.
3155 Otherwise, set up for the next iteration. */
3159 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3160 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3161 code = GET_CODE (x);
3164 code = reverse_condition (code);
3167 /* Return our results. Return the modes from before fold_rtx
3168 because fold_rtx might produce const_int, and then it's too late. */
3169 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3170 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3175 /* Try to simplify a unary operation CODE whose output mode is to be
3176 MODE with input operand OP whose mode was originally OP_MODE.
3177 Return zero if no simplification can be made. */
3180 simplify_unary_operation (code, mode, op, op_mode)
3182 enum machine_mode mode;
3184 enum machine_mode op_mode;
3186 register int width = GET_MODE_BITSIZE (mode);
3188 /* The order of these tests is critical so that, for example, we don't
3189 check the wrong mode (input vs. output) for a conversion operation,
3190 such as FIX. At some point, this should be simplified. */
3192 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3194 if (code == FLOAT && GET_MODE (op) == VOIDmode
3195 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3197 HOST_WIDE_INT hv, lv;
3200 if (GET_CODE (op) == CONST_INT)
3201 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3203 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3205 #ifdef REAL_ARITHMETIC
3206 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3210 d = (double) (~ hv);
3211 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3212 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3213 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3219 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3220 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3221 d += (double) (unsigned HOST_WIDE_INT) lv;
3223 #endif /* REAL_ARITHMETIC */
3224 d = real_value_truncate (mode, d);
3225 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3227 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3228 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3230 HOST_WIDE_INT hv, lv;
3233 if (GET_CODE (op) == CONST_INT)
3234 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3236 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3238 if (op_mode == VOIDmode)
3240 /* We don't know how to interpret negative-looking numbers in
3241 this case, so don't try to fold those. */
3245 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3248 hv = 0, lv &= GET_MODE_MASK (op_mode);
3250 #ifdef REAL_ARITHMETIC
3251 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3254 d = (double) (unsigned HOST_WIDE_INT) hv;
3255 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3256 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3257 d += (double) (unsigned HOST_WIDE_INT) lv;
3258 #endif /* REAL_ARITHMETIC */
3259 d = real_value_truncate (mode, d);
3260 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3264 if (GET_CODE (op) == CONST_INT
3265 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3267 register HOST_WIDE_INT arg0 = INTVAL (op);
3268 register HOST_WIDE_INT val;
3281 val = (arg0 >= 0 ? arg0 : - arg0);
3285 /* Don't use ffs here. Instead, get low order bit and then its
3286 number. If arg0 is zero, this will return 0, as desired. */
3287 arg0 &= GET_MODE_MASK (mode);
3288 val = exact_log2 (arg0 & (- arg0)) + 1;
3296 if (op_mode == VOIDmode)
3298 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3300 /* If we were really extending the mode,
3301 we would have to distinguish between zero-extension
3302 and sign-extension. */
3303 if (width != GET_MODE_BITSIZE (op_mode))
3307 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3308 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3314 if (op_mode == VOIDmode)
3316 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3318 /* If we were really extending the mode,
3319 we would have to distinguish between zero-extension
3320 and sign-extension. */
3321 if (width != GET_MODE_BITSIZE (op_mode))
3325 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3328 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3330 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3331 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3344 /* Clear the bits that don't belong in our mode,
3345 unless they and our sign bit are all one.
3346 So we get either a reasonable negative value or a reasonable
3347 unsigned value for this mode. */
3348 if (width < HOST_BITS_PER_WIDE_INT
3349 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3350 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3351 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3353 /* If this would be an entire word for the target, but is not for
3354 the host, then sign-extend on the host so that the number will look
3355 the same way on the host that it would on the target.
3357 For example, when building a 64 bit alpha hosted 32 bit sparc
3358 targeted compiler, then we want the 32 bit unsigned value -1 to be
3359 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3360 The later confuses the sparc backend. */
3362 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3363 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3364 val |= ((HOST_WIDE_INT) (-1) << width);
3366 return GEN_INT (val);
3369 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3370 for a DImode operation on a CONST_INT. */
3371 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3372 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3374 HOST_WIDE_INT l1, h1, lv, hv;
3376 if (GET_CODE (op) == CONST_DOUBLE)
3377 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3379 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3389 neg_double (l1, h1, &lv, &hv);
3394 neg_double (l1, h1, &lv, &hv);
3402 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3404 lv = exact_log2 (l1 & (-l1)) + 1;
3408 /* This is just a change-of-mode, so do nothing. */
3413 if (op_mode == VOIDmode
3414 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3418 lv = l1 & GET_MODE_MASK (op_mode);
3422 if (op_mode == VOIDmode
3423 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3427 lv = l1 & GET_MODE_MASK (op_mode);
3428 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3429 && (lv & ((HOST_WIDE_INT) 1
3430 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3431 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3433 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3444 return immed_double_const (lv, hv, mode);
3447 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3448 else if (GET_CODE (op) == CONST_DOUBLE
3449 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3455 if (setjmp (handler))
3456 /* There used to be a warning here, but that is inadvisable.
3457 People may want to cause traps, and the natural way
3458 to do it should not get a warning. */
3461 set_float_handler (handler);
3463 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3468 d = REAL_VALUE_NEGATE (d);
3472 if (REAL_VALUE_NEGATIVE (d))
3473 d = REAL_VALUE_NEGATE (d);
3476 case FLOAT_TRUNCATE:
3477 d = real_value_truncate (mode, d);
3481 /* All this does is change the mode. */
3485 d = REAL_VALUE_RNDZINT (d);
3489 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3499 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3500 set_float_handler (NULL_PTR);
3504 else if (GET_CODE (op) == CONST_DOUBLE
3505 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3506 && GET_MODE_CLASS (mode) == MODE_INT
3507 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3513 if (setjmp (handler))
3516 set_float_handler (handler);
3518 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3523 val = REAL_VALUE_FIX (d);
3527 val = REAL_VALUE_UNSIGNED_FIX (d);
3534 set_float_handler (NULL_PTR);
3536 /* Clear the bits that don't belong in our mode,
3537 unless they and our sign bit are all one.
3538 So we get either a reasonable negative value or a reasonable
3539 unsigned value for this mode. */
3540 if (width < HOST_BITS_PER_WIDE_INT
3541 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3542 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3543 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3545 /* If this would be an entire word for the target, but is not for
3546 the host, then sign-extend on the host so that the number will look
3547 the same way on the host that it would on the target.
3549 For example, when building a 64 bit alpha hosted 32 bit sparc
3550 targeted compiler, then we want the 32 bit unsigned value -1 to be
3551 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3552 The later confuses the sparc backend. */
3554 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3555 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3556 val |= ((HOST_WIDE_INT) (-1) << width);
3558 return GEN_INT (val);
3561 /* This was formerly used only for non-IEEE float.
3562 eggert@twinsun.com says it is safe for IEEE also. */
3565 /* There are some simplifications we can do even if the operands
3571 /* (not (not X)) == X, similarly for NEG. */
3572 if (GET_CODE (op) == code)
3573 return XEXP (op, 0);
3577 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3578 becomes just the MINUS if its mode is MODE. This allows
3579 folding switch statements on machines using casesi (such as
3581 if (GET_CODE (op) == TRUNCATE
3582 && GET_MODE (XEXP (op, 0)) == mode
3583 && GET_CODE (XEXP (op, 0)) == MINUS
3584 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3585 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3586 return XEXP (op, 0);
3588 #ifdef POINTERS_EXTEND_UNSIGNED
3589 if (! POINTERS_EXTEND_UNSIGNED
3590 && mode == Pmode && GET_MODE (op) == ptr_mode
3592 return convert_memory_address (Pmode, op);
3596 #ifdef POINTERS_EXTEND_UNSIGNED
3598 if (POINTERS_EXTEND_UNSIGNED
3599 && mode == Pmode && GET_MODE (op) == ptr_mode
3601 return convert_memory_address (Pmode, op);
3613 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3614 and OP1. Return 0 if no simplification is possible.
3616 Don't use this for relational operations such as EQ or LT.
3617 Use simplify_relational_operation instead. */
3620 simplify_binary_operation (code, mode, op0, op1)
3622 enum machine_mode mode;
3625 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3627 int width = GET_MODE_BITSIZE (mode);
3630 /* Relational operations don't work here. We must know the mode
3631 of the operands in order to do the comparison correctly.
3632 Assuming a full word can give incorrect results.
3633 Consider comparing 128 with -128 in QImode. */
3635 if (GET_RTX_CLASS (code) == '<')
3638 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3639 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3640 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3641 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3643 REAL_VALUE_TYPE f0, f1, value;
3646 if (setjmp (handler))
3649 set_float_handler (handler);
3651 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3652 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3653 f0 = real_value_truncate (mode, f0);
3654 f1 = real_value_truncate (mode, f1);
3656 #ifdef REAL_ARITHMETIC
3657 #ifndef REAL_INFINITY
3658 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3661 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3675 #ifndef REAL_INFINITY
3682 value = MIN (f0, f1);
3685 value = MAX (f0, f1);
3692 value = real_value_truncate (mode, value);
3693 set_float_handler (NULL_PTR);
3694 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3696 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3698 /* We can fold some multi-word operations. */
3699 if (GET_MODE_CLASS (mode) == MODE_INT
3700 && width == HOST_BITS_PER_WIDE_INT * 2
3701 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3702 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3704 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3706 if (GET_CODE (op0) == CONST_DOUBLE)
3707 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3709 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3711 if (GET_CODE (op1) == CONST_DOUBLE)
3712 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3714 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3719 /* A - B == A + (-B). */
3720 neg_double (l2, h2, &lv, &hv);
3723 /* .. fall through ... */
3726 add_double (l1, h1, l2, h2, &lv, &hv);
3730 mul_double (l1, h1, l2, h2, &lv, &hv);
3733 case DIV: case MOD: case UDIV: case UMOD:
3734 /* We'd need to include tree.h to do this and it doesn't seem worth
3739 lv = l1 & l2, hv = h1 & h2;
3743 lv = l1 | l2, hv = h1 | h2;
3747 lv = l1 ^ l2, hv = h1 ^ h2;
3753 && ((unsigned HOST_WIDE_INT) l1
3754 < (unsigned HOST_WIDE_INT) l2)))
3763 && ((unsigned HOST_WIDE_INT) l1
3764 > (unsigned HOST_WIDE_INT) l2)))
3771 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3773 && ((unsigned HOST_WIDE_INT) l1
3774 < (unsigned HOST_WIDE_INT) l2)))
3781 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3783 && ((unsigned HOST_WIDE_INT) l1
3784 > (unsigned HOST_WIDE_INT) l2)))
3790 case LSHIFTRT: case ASHIFTRT:
3792 case ROTATE: case ROTATERT:
3793 #ifdef SHIFT_COUNT_TRUNCATED
3794 if (SHIFT_COUNT_TRUNCATED)
3795 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3798 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3801 if (code == LSHIFTRT || code == ASHIFTRT)
3802 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3804 else if (code == ASHIFT)
3805 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3806 else if (code == ROTATE)
3807 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3808 else /* code == ROTATERT */
3809 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3816 return immed_double_const (lv, hv, mode);
3819 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3820 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3822 /* Even if we can't compute a constant result,
3823 there are some cases worth simplifying. */
3828 /* In IEEE floating point, x+0 is not the same as x. Similarly
3829 for the other optimizations below. */
3830 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3831 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3834 if (op1 == CONST0_RTX (mode))
3837 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3838 if (GET_CODE (op0) == NEG)
3839 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3840 else if (GET_CODE (op1) == NEG)
3841 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3843 /* Handle both-operands-constant cases. We can only add
3844 CONST_INTs to constants since the sum of relocatable symbols
3845 can't be handled by most assemblers. Don't add CONST_INT
3846 to CONST_INT since overflow won't be computed properly if wider
3847 than HOST_BITS_PER_WIDE_INT. */
3849 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3850 && GET_CODE (op1) == CONST_INT)
3851 return plus_constant (op0, INTVAL (op1));
3852 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3853 && GET_CODE (op0) == CONST_INT)
3854 return plus_constant (op1, INTVAL (op0));
3856 /* See if this is something like X * C - X or vice versa or
3857 if the multiplication is written as a shift. If so, we can
3858 distribute and make a new multiply, shift, or maybe just
3859 have X (if C is 2 in the example above). But don't make
3860 real multiply if we didn't have one before. */
3862 if (! FLOAT_MODE_P (mode))
3864 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3865 rtx lhs = op0, rhs = op1;
3868 if (GET_CODE (lhs) == NEG)
3869 coeff0 = -1, lhs = XEXP (lhs, 0);
3870 else if (GET_CODE (lhs) == MULT
3871 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3873 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3876 else if (GET_CODE (lhs) == ASHIFT
3877 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3878 && INTVAL (XEXP (lhs, 1)) >= 0
3879 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3881 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3882 lhs = XEXP (lhs, 0);
3885 if (GET_CODE (rhs) == NEG)
3886 coeff1 = -1, rhs = XEXP (rhs, 0);
3887 else if (GET_CODE (rhs) == MULT
3888 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3890 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3893 else if (GET_CODE (rhs) == ASHIFT
3894 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3895 && INTVAL (XEXP (rhs, 1)) >= 0
3896 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3898 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3899 rhs = XEXP (rhs, 0);
3902 if (rtx_equal_p (lhs, rhs))
3904 tem = cse_gen_binary (MULT, mode, lhs,
3905 GEN_INT (coeff0 + coeff1));
3906 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3910 /* If one of the operands is a PLUS or a MINUS, see if we can
3911 simplify this by the associative law.
3912 Don't use the associative law for floating point.
3913 The inaccuracy makes it nonassociative,
3914 and subtle programs can break if operations are associated. */
3916 if (INTEGRAL_MODE_P (mode)
3917 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3918 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3919 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3925 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3926 using cc0, in which case we want to leave it as a COMPARE
3927 so we can distinguish it from a register-register-copy.
3929 In IEEE floating point, x-0 is not the same as x. */
3931 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3932 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3933 && op1 == CONST0_RTX (mode))
3936 /* Do nothing here. */
3941 /* None of these optimizations can be done for IEEE
3943 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3944 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3947 /* We can't assume x-x is 0 even with non-IEEE floating point,
3948 but since it is zero except in very strange circumstances, we
3949 will treat it as zero with -ffast-math. */
3950 if (rtx_equal_p (op0, op1)
3951 && ! side_effects_p (op0)
3952 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3953 return CONST0_RTX (mode);
3955 /* Change subtraction from zero into negation. */
3956 if (op0 == CONST0_RTX (mode))
3957 return gen_rtx_NEG (mode, op1);
3959 /* (-1 - a) is ~a. */
3960 if (op0 == constm1_rtx)
3961 return gen_rtx_NOT (mode, op1);
3963 /* Subtracting 0 has no effect. */
3964 if (op1 == CONST0_RTX (mode))
3967 /* See if this is something like X * C - X or vice versa or
3968 if the multiplication is written as a shift. If so, we can
3969 distribute and make a new multiply, shift, or maybe just
3970 have X (if C is 2 in the example above). But don't make
3971 real multiply if we didn't have one before. */
3973 if (! FLOAT_MODE_P (mode))
3975 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3976 rtx lhs = op0, rhs = op1;
3979 if (GET_CODE (lhs) == NEG)
3980 coeff0 = -1, lhs = XEXP (lhs, 0);
3981 else if (GET_CODE (lhs) == MULT
3982 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3984 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3987 else if (GET_CODE (lhs) == ASHIFT
3988 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3989 && INTVAL (XEXP (lhs, 1)) >= 0
3990 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3992 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3993 lhs = XEXP (lhs, 0);
3996 if (GET_CODE (rhs) == NEG)
3997 coeff1 = - 1, rhs = XEXP (rhs, 0);
3998 else if (GET_CODE (rhs) == MULT
3999 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
4001 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
4004 else if (GET_CODE (rhs) == ASHIFT
4005 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
4006 && INTVAL (XEXP (rhs, 1)) >= 0
4007 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
4009 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
4010 rhs = XEXP (rhs, 0);
4013 if (rtx_equal_p (lhs, rhs))
4015 tem = cse_gen_binary (MULT, mode, lhs,
4016 GEN_INT (coeff0 - coeff1));
4017 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
4021 /* (a - (-b)) -> (a + b). */
4022 if (GET_CODE (op1) == NEG)
4023 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
4025 /* If one of the operands is a PLUS or a MINUS, see if we can
4026 simplify this by the associative law.
4027 Don't use the associative law for floating point.
4028 The inaccuracy makes it nonassociative,
4029 and subtle programs can break if operations are associated. */
4031 if (INTEGRAL_MODE_P (mode)
4032 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
4033 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
4034 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
4037 /* Don't let a relocatable value get a negative coeff. */
4038 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
4039 return plus_constant (op0, - INTVAL (op1));
4041 /* (x - (x & y)) -> (x & ~y) */
4042 if (GET_CODE (op1) == AND)
4044 if (rtx_equal_p (op0, XEXP (op1, 0)))
4045 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
4046 if (rtx_equal_p (op0, XEXP (op1, 1)))
4047 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
4052 if (op1 == constm1_rtx)
4054 tem = simplify_unary_operation (NEG, mode, op0, mode);
4056 return tem ? tem : gen_rtx_NEG (mode, op0);
4059 /* In IEEE floating point, x*0 is not always 0. */
4060 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4061 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4062 && op1 == CONST0_RTX (mode)
4063 && ! side_effects_p (op0))
4066 /* In IEEE floating point, x*1 is not equivalent to x for nans.
4067 However, ANSI says we can drop signals,
4068 so we can do this anyway. */
4069 if (op1 == CONST1_RTX (mode))
4072 /* Convert multiply by constant power of two into shift unless
4073 we are still generating RTL. This test is a kludge. */
4074 if (GET_CODE (op1) == CONST_INT
4075 && (val = exact_log2 (INTVAL (op1))) >= 0
4076 /* If the mode is larger than the host word size, and the
4077 uppermost bit is set, then this isn't a power of two due
4078 to implicit sign extension. */
4079 && (width <= HOST_BITS_PER_WIDE_INT
4080 || val != HOST_BITS_PER_WIDE_INT - 1)
4081 && ! rtx_equal_function_value_matters)
4082 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
4084 if (GET_CODE (op1) == CONST_DOUBLE
4085 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
4089 int op1is2, op1ism1;
4091 if (setjmp (handler))
4094 set_float_handler (handler);
4095 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4096 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
4097 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
4098 set_float_handler (NULL_PTR);
4100 /* x*2 is x+x and x*(-1) is -x */
4101 if (op1is2 && GET_MODE (op0) == mode)
4102 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
4104 else if (op1ism1 && GET_MODE (op0) == mode)
4105 return gen_rtx_NEG (mode, op0);
4110 if (op1 == const0_rtx)
4112 if (GET_CODE (op1) == CONST_INT
4113 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4115 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4117 /* A | (~A) -> -1 */
4118 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4119 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4120 && ! side_effects_p (op0)
4121 && GET_MODE_CLASS (mode) != MODE_CC)
4126 if (op1 == const0_rtx)
4128 if (GET_CODE (op1) == CONST_INT
4129 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4130 return gen_rtx_NOT (mode, op0);
4131 if (op0 == op1 && ! side_effects_p (op0)
4132 && GET_MODE_CLASS (mode) != MODE_CC)
4137 if (op1 == const0_rtx && ! side_effects_p (op0))
4139 if (GET_CODE (op1) == CONST_INT
4140 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4142 if (op0 == op1 && ! side_effects_p (op0)
4143 && GET_MODE_CLASS (mode) != MODE_CC)
4146 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4147 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4148 && ! side_effects_p (op0)
4149 && GET_MODE_CLASS (mode) != MODE_CC)
4154 /* Convert divide by power of two into shift (divide by 1 handled
4156 if (GET_CODE (op1) == CONST_INT
4157 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
4158 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
4160 /* ... fall through ... */
4163 if (op1 == CONST1_RTX (mode))
4166 /* In IEEE floating point, 0/x is not always 0. */
4167 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4168 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4169 && op0 == CONST0_RTX (mode)
4170 && ! side_effects_p (op1))
4173 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4174 /* Change division by a constant into multiplication. Only do
4175 this with -ffast-math until an expert says it is safe in
4177 else if (GET_CODE (op1) == CONST_DOUBLE
4178 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
4179 && op1 != CONST0_RTX (mode)
4183 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4185 if (! REAL_VALUES_EQUAL (d, dconst0))
4187 #if defined (REAL_ARITHMETIC)
4188 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
4189 return gen_rtx_MULT (mode, op0,
4190 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
4192 return gen_rtx_MULT (mode, op0,
4193 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4201 /* Handle modulus by power of two (mod with 1 handled below). */
4202 if (GET_CODE (op1) == CONST_INT
4203 && exact_log2 (INTVAL (op1)) > 0)
4204 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
4206 /* ... fall through ... */
4209 if ((op0 == const0_rtx || op1 == const1_rtx)
4210 && ! side_effects_p (op0) && ! side_effects_p (op1))
4216 /* Rotating ~0 always results in ~0. */
4217 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4218 && INTVAL (op0) == GET_MODE_MASK (mode)
4219 && ! side_effects_p (op1))
4222 /* ... fall through ... */
4227 if (op1 == const0_rtx)
4229 if (op0 == const0_rtx && ! side_effects_p (op1))
4234 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4235 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4236 && ! side_effects_p (op0))
4238 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4243 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4245 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4246 && ! side_effects_p (op0))
4248 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4253 if (op1 == const0_rtx && ! side_effects_p (op0))
4255 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4260 if (op1 == constm1_rtx && ! side_effects_p (op0))
4262 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4273 /* Get the integer argument values in two forms:
4274 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4276 arg0 = INTVAL (op0);
4277 arg1 = INTVAL (op1);
4279 if (width < HOST_BITS_PER_WIDE_INT)
4281 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4282 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4285 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4286 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4289 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4290 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4298 /* Compute the value of the arithmetic. */
4303 val = arg0s + arg1s;
4307 val = arg0s - arg1s;
4311 val = arg0s * arg1s;
4317 val = arg0s / arg1s;
4323 val = arg0s % arg1s;
4329 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4335 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4351 /* If shift count is undefined, don't fold it; let the machine do
4352 what it wants. But truncate it if the machine will do that. */
4356 #ifdef SHIFT_COUNT_TRUNCATED
4357 if (SHIFT_COUNT_TRUNCATED)
4361 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4368 #ifdef SHIFT_COUNT_TRUNCATED
4369 if (SHIFT_COUNT_TRUNCATED)
4373 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4380 #ifdef SHIFT_COUNT_TRUNCATED
4381 if (SHIFT_COUNT_TRUNCATED)
4385 val = arg0s >> arg1;
4387 /* Bootstrap compiler may not have sign extended the right shift.
4388 Manually extend the sign to insure bootstrap cc matches gcc. */
4389 if (arg0s < 0 && arg1 > 0)
4390 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4399 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4400 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4408 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4409 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4413 /* Do nothing here. */
4417 val = arg0s <= arg1s ? arg0s : arg1s;
4421 val = ((unsigned HOST_WIDE_INT) arg0
4422 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4426 val = arg0s > arg1s ? arg0s : arg1s;
4430 val = ((unsigned HOST_WIDE_INT) arg0
4431 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4438 /* Clear the bits that don't belong in our mode, unless they and our sign
4439 bit are all one. So we get either a reasonable negative value or a
4440 reasonable unsigned value for this mode. */
4441 if (width < HOST_BITS_PER_WIDE_INT
4442 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4443 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4444 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4446 /* If this would be an entire word for the target, but is not for
4447 the host, then sign-extend on the host so that the number will look
4448 the same way on the host that it would on the target.
4450 For example, when building a 64 bit alpha hosted 32 bit sparc
4451 targeted compiler, then we want the 32 bit unsigned value -1 to be
4452 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4453 The later confuses the sparc backend. */
4455 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4456 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4457 val |= ((HOST_WIDE_INT) (-1) << width);
4459 return GEN_INT (val);
4462 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4465 Rather than test for specific case, we do this by a brute-force method
4466 and do all possible simplifications until no more changes occur. Then
4467 we rebuild the operation. */
4470 simplify_plus_minus (code, mode, op0, op1)
4472 enum machine_mode mode;
4478 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4479 int first = 1, negate = 0, changed;
4482 bzero ((char *) ops, sizeof ops);
4484 /* Set up the two operands and then expand them until nothing has been
4485 changed. If we run out of room in our array, give up; this should
4486 almost never happen. */
4488 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4495 for (i = 0; i < n_ops; i++)
4496 switch (GET_CODE (ops[i]))
4503 ops[n_ops] = XEXP (ops[i], 1);
4504 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4505 ops[i] = XEXP (ops[i], 0);
4511 ops[i] = XEXP (ops[i], 0);
4512 negs[i] = ! negs[i];
4517 ops[i] = XEXP (ops[i], 0);
4523 /* ~a -> (-a - 1) */
4526 ops[n_ops] = constm1_rtx;
4527 negs[n_ops++] = negs[i];
4528 ops[i] = XEXP (ops[i], 0);
4529 negs[i] = ! negs[i];
4536 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4544 /* If we only have two operands, we can't do anything. */
4548 /* Now simplify each pair of operands until nothing changes. The first
4549 time through just simplify constants against each other. */
4556 for (i = 0; i < n_ops - 1; i++)
4557 for (j = i + 1; j < n_ops; j++)
4558 if (ops[i] != 0 && ops[j] != 0
4559 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4561 rtx lhs = ops[i], rhs = ops[j];
4562 enum rtx_code ncode = PLUS;
4564 if (negs[i] && ! negs[j])
4565 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4566 else if (! negs[i] && negs[j])
4569 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4572 ops[i] = tem, ops[j] = 0;
4573 negs[i] = negs[i] && negs[j];
4574 if (GET_CODE (tem) == NEG)
4575 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4577 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4578 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4586 /* Pack all the operands to the lower-numbered entries and give up if
4587 we didn't reduce the number of operands we had. Make sure we
4588 count a CONST as two operands. If we have the same number of
4589 operands, but have made more CONSTs than we had, this is also
4590 an improvement, so accept it. */
4592 for (i = 0, j = 0; j < n_ops; j++)
4595 ops[i] = ops[j], negs[i++] = negs[j];
4596 if (GET_CODE (ops[j]) == CONST)
4600 if (i + n_consts > input_ops
4601 || (i + n_consts == input_ops && n_consts <= input_consts))
4606 /* If we have a CONST_INT, put it last. */
4607 for (i = 0; i < n_ops - 1; i++)
4608 if (GET_CODE (ops[i]) == CONST_INT)
4610 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4611 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4614 /* Put a non-negated operand first. If there aren't any, make all
4615 operands positive and negate the whole thing later. */
4616 for (i = 0; i < n_ops && negs[i]; i++)
4621 for (i = 0; i < n_ops; i++)
4627 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4628 j = negs[0], negs[0] = negs[i], negs[i] = j;
4631 /* Now make the result by performing the requested operations. */
4633 for (i = 1; i < n_ops; i++)
4634 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4636 return negate ? gen_rtx_NEG (mode, result) : result;
4639 /* Make a binary operation by properly ordering the operands and
4640 seeing if the expression folds. */
4643 cse_gen_binary (code, mode, op0, op1)
4645 enum machine_mode mode;
4650 /* Put complex operands first and constants second if commutative. */
4651 if (GET_RTX_CLASS (code) == 'c'
4652 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4653 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4654 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4655 || (GET_CODE (op0) == SUBREG
4656 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4657 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4658 tem = op0, op0 = op1, op1 = tem;
4660 /* If this simplifies, do it. */
4661 tem = simplify_binary_operation (code, mode, op0, op1);
4666 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4667 just form the operation. */
4669 if (code == PLUS && GET_CODE (op1) == CONST_INT
4670 && GET_MODE (op0) != VOIDmode)
4671 return plus_constant (op0, INTVAL (op1));
4672 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4673 && GET_MODE (op0) != VOIDmode)
4674 return plus_constant (op0, - INTVAL (op1));
4676 return gen_rtx_fmt_ee (code, mode, op0, op1);
4684 int equal, op0lt, op1lt;
4688 check_fold_consts (data)
4691 struct cfc_args * args = (struct cfc_args *) data;
4692 REAL_VALUE_TYPE d0, d1;
4694 REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
4695 REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
4696 args->equal = REAL_VALUES_EQUAL (d0, d1);
4697 args->op0lt = REAL_VALUES_LESS (d0, d1);
4698 args->op1lt = REAL_VALUES_LESS (d1, d0);
4701 /* Like simplify_binary_operation except used for relational operators.
4702 MODE is the mode of the operands, not that of the result. If MODE
4703 is VOIDmode, both operands must also be VOIDmode and we compare the
4704 operands in "infinite precision".
4706 If no simplification is possible, this function returns zero. Otherwise,
4707 it returns either const_true_rtx or const0_rtx. */
4710 simplify_relational_operation (code, mode, op0, op1)
4712 enum machine_mode mode;
4715 int equal, op0lt, op0ltu, op1lt, op1ltu;
4718 /* If op0 is a compare, extract the comparison arguments from it. */
4719 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4720 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4722 /* We can't simplify MODE_CC values since we don't know what the
4723 actual comparison is. */
4724 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4731 /* For integer comparisons of A and B maybe we can simplify A - B and can
4732 then simplify a comparison of that with zero. If A and B are both either
4733 a register or a CONST_INT, this can't help; testing for these cases will
4734 prevent infinite recursion here and speed things up.
4736 If CODE is an unsigned comparison, then we can never do this optimization,
4737 because it gives an incorrect result if the subtraction wraps around zero.
4738 ANSI C defines unsigned operations such that they never overflow, and
4739 thus such cases can not be ignored. */
4741 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4742 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4743 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4744 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4745 && code != GTU && code != GEU && code != LTU && code != LEU)
4746 return simplify_relational_operation (signed_condition (code),
4747 mode, tem, const0_rtx);
4749 /* For non-IEEE floating-point, if the two operands are equal, we know the
4751 if (rtx_equal_p (op0, op1)
4752 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4753 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4754 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4756 /* If the operands are floating-point constants, see if we can fold
4758 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4759 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4760 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4762 struct cfc_args args;
4764 /* Setup input for check_fold_consts() */
4768 if (do_float_handler(check_fold_consts, (PTR) &args) == 0)
4769 /* We got an exception from check_fold_consts() */
4772 /* Receive output from check_fold_consts() */
4774 op0lt = op0ltu = args.op0lt;
4775 op1lt = op1ltu = args.op1lt;
4777 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4779 /* Otherwise, see if the operands are both integers. */
4780 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4781 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4782 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4784 int width = GET_MODE_BITSIZE (mode);
4785 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4786 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4788 /* Get the two words comprising each integer constant. */
4789 if (GET_CODE (op0) == CONST_DOUBLE)
4791 l0u = l0s = CONST_DOUBLE_LOW (op0);
4792 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4796 l0u = l0s = INTVAL (op0);
4797 h0u = h0s = l0s < 0 ? -1 : 0;
4800 if (GET_CODE (op1) == CONST_DOUBLE)
4802 l1u = l1s = CONST_DOUBLE_LOW (op1);
4803 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4807 l1u = l1s = INTVAL (op1);
4808 h1u = h1s = l1s < 0 ? -1 : 0;
4811 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4812 we have to sign or zero-extend the values. */
4813 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4814 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4816 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4818 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4819 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4821 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4822 l0s |= ((HOST_WIDE_INT) (-1) << width);
4824 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4825 l1s |= ((HOST_WIDE_INT) (-1) << width);
4828 equal = (h0u == h1u && l0u == l1u);
4829 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4830 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4831 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4832 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4835 /* Otherwise, there are some code-specific tests we can make. */
4841 /* References to the frame plus a constant or labels cannot
4842 be zero, but a SYMBOL_REF can due to #pragma weak. */
4843 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4844 || GET_CODE (op0) == LABEL_REF)
4845 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4846 /* On some machines, the ap reg can be 0 sometimes. */
4847 && op0 != arg_pointer_rtx
4854 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4855 || GET_CODE (op0) == LABEL_REF)
4856 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4857 && op0 != arg_pointer_rtx
4860 return const_true_rtx;
4864 /* Unsigned values are never negative. */
4865 if (op1 == const0_rtx)
4866 return const_true_rtx;
4870 if (op1 == const0_rtx)
4875 /* Unsigned values are never greater than the largest
4877 if (GET_CODE (op1) == CONST_INT
4878 && INTVAL (op1) == GET_MODE_MASK (mode)
4879 && INTEGRAL_MODE_P (mode))
4880 return const_true_rtx;
4884 if (GET_CODE (op1) == CONST_INT
4885 && INTVAL (op1) == GET_MODE_MASK (mode)
4886 && INTEGRAL_MODE_P (mode))
4897 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4902 return equal ? const_true_rtx : const0_rtx;
4904 return ! equal ? const_true_rtx : const0_rtx;
4906 return op0lt ? const_true_rtx : const0_rtx;
4908 return op1lt ? const_true_rtx : const0_rtx;
4910 return op0ltu ? const_true_rtx : const0_rtx;
4912 return op1ltu ? const_true_rtx : const0_rtx;
4914 return equal || op0lt ? const_true_rtx : const0_rtx;
4916 return equal || op1lt ? const_true_rtx : const0_rtx;
4918 return equal || op0ltu ? const_true_rtx : const0_rtx;
4920 return equal || op1ltu ? const_true_rtx : const0_rtx;
4926 /* Simplify CODE, an operation with result mode MODE and three operands,
4927 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4928 a constant. Return 0 if no simplifications is possible. */
4931 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4933 enum machine_mode mode, op0_mode;
4936 int width = GET_MODE_BITSIZE (mode);
4938 /* VOIDmode means "infinite" precision. */
4940 width = HOST_BITS_PER_WIDE_INT;
4946 if (GET_CODE (op0) == CONST_INT
4947 && GET_CODE (op1) == CONST_INT
4948 && GET_CODE (op2) == CONST_INT
4949 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4950 && width <= HOST_BITS_PER_WIDE_INT)
4952 /* Extracting a bit-field from a constant */
4953 HOST_WIDE_INT val = INTVAL (op0);
4955 if (BITS_BIG_ENDIAN)
4956 val >>= (GET_MODE_BITSIZE (op0_mode)
4957 - INTVAL (op2) - INTVAL (op1));
4959 val >>= INTVAL (op2);
4961 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4963 /* First zero-extend. */
4964 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4965 /* If desired, propagate sign bit. */
4966 if (code == SIGN_EXTRACT
4967 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4968 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4971 /* Clear the bits that don't belong in our mode,
4972 unless they and our sign bit are all one.
4973 So we get either a reasonable negative value or a reasonable
4974 unsigned value for this mode. */
4975 if (width < HOST_BITS_PER_WIDE_INT
4976 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4977 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4978 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4980 return GEN_INT (val);
4985 if (GET_CODE (op0) == CONST_INT)
4986 return op0 != const0_rtx ? op1 : op2;
4988 /* Convert a == b ? b : a to "a". */
4989 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4990 && rtx_equal_p (XEXP (op0, 0), op1)
4991 && rtx_equal_p (XEXP (op0, 1), op2))
4993 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4994 && rtx_equal_p (XEXP (op0, 1), op1)
4995 && rtx_equal_p (XEXP (op0, 0), op2))
4997 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
5000 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
5001 XEXP (op0, 0), XEXP (op0, 1));
5002 /* See if any simplifications were possible. */
5003 if (temp == const0_rtx)
5005 else if (temp == const1_rtx)
5017 /* If X is a nontrivial arithmetic operation on an argument
5018 for which a constant value can be determined, return
5019 the result of operating on that value, as a constant.
5020 Otherwise, return X, possibly with one or more operands
5021 modified by recursive calls to this function.
5023 If X is a register whose contents are known, we do NOT
5024 return those contents here. equiv_constant is called to
5027 INSN is the insn that we may be modifying. If it is 0, make a copy
5028 of X before modifying it. */
5035 register enum rtx_code code;
5036 register enum machine_mode mode;
5043 /* Folded equivalents of first two operands of X. */
5047 /* Constant equivalents of first three operands of X;
5048 0 when no such equivalent is known. */
5053 /* The mode of the first operand of X. We need this for sign and zero
5055 enum machine_mode mode_arg0;
5060 mode = GET_MODE (x);
5061 code = GET_CODE (x);
5070 /* No use simplifying an EXPR_LIST
5071 since they are used only for lists of args
5072 in a function call's REG_EQUAL note. */
5074 /* Changing anything inside an ADDRESSOF is incorrect; we don't
5075 want to (e.g.,) make (addressof (const_int 0)) just because
5076 the location is known to be zero. */
5082 return prev_insn_cc0;
5086 /* If the next insn is a CODE_LABEL followed by a jump table,
5087 PC's value is a LABEL_REF pointing to that label. That
5088 lets us fold switch statements on the Vax. */
5089 if (insn && GET_CODE (insn) == JUMP_INSN)
5091 rtx next = next_nonnote_insn (insn);
5093 if (next && GET_CODE (next) == CODE_LABEL
5094 && NEXT_INSN (next) != 0
5095 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
5096 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
5097 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
5098 return gen_rtx_LABEL_REF (Pmode, next);
5103 /* See if we previously assigned a constant value to this SUBREG. */
5104 if ((new = lookup_as_function (x, CONST_INT)) != 0
5105 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
5108 /* If this is a paradoxical SUBREG, we have no idea what value the
5109 extra bits would have. However, if the operand is equivalent
5110 to a SUBREG whose operand is the same as our mode, and all the
5111 modes are within a word, we can just use the inner operand
5112 because these SUBREGs just say how to treat the register.
5114 Similarly if we find an integer constant. */
5116 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
5118 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
5119 struct table_elt *elt;
5121 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
5122 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
5123 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
5125 for (elt = elt->first_same_value;
5126 elt; elt = elt->next_same_value)
5128 if (CONSTANT_P (elt->exp)
5129 && GET_MODE (elt->exp) == VOIDmode)
5132 if (GET_CODE (elt->exp) == SUBREG
5133 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5134 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5135 return copy_rtx (SUBREG_REG (elt->exp));
5141 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5142 We might be able to if the SUBREG is extracting a single word in an
5143 integral mode or extracting the low part. */
5145 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
5146 const_arg0 = equiv_constant (folded_arg0);
5148 folded_arg0 = const_arg0;
5150 if (folded_arg0 != SUBREG_REG (x))
5154 if (GET_MODE_CLASS (mode) == MODE_INT
5155 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5156 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
5157 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
5158 GET_MODE (SUBREG_REG (x)));
5159 if (new == 0 && subreg_lowpart_p (x))
5160 new = gen_lowpart_if_possible (mode, folded_arg0);
5165 /* If this is a narrowing SUBREG and our operand is a REG, see if
5166 we can find an equivalence for REG that is an arithmetic operation
5167 in a wider mode where both operands are paradoxical SUBREGs
5168 from objects of our result mode. In that case, we couldn't report
5169 an equivalent value for that operation, since we don't know what the
5170 extra bits will be. But we can find an equivalence for this SUBREG
5171 by folding that operation is the narrow mode. This allows us to
5172 fold arithmetic in narrow modes when the machine only supports
5173 word-sized arithmetic.
5175 Also look for a case where we have a SUBREG whose operand is the
5176 same as our result. If both modes are smaller than a word, we
5177 are simply interpreting a register in different modes and we
5178 can use the inner value. */
5180 if (GET_CODE (folded_arg0) == REG
5181 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
5182 && subreg_lowpart_p (x))
5184 struct table_elt *elt;
5186 /* We can use HASH here since we know that canon_hash won't be
5188 elt = lookup (folded_arg0,
5189 HASH (folded_arg0, GET_MODE (folded_arg0)),
5190 GET_MODE (folded_arg0));
5193 elt = elt->first_same_value;
5195 for (; elt; elt = elt->next_same_value)
5197 enum rtx_code eltcode = GET_CODE (elt->exp);
5199 /* Just check for unary and binary operations. */
5200 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
5201 && GET_CODE (elt->exp) != SIGN_EXTEND
5202 && GET_CODE (elt->exp) != ZERO_EXTEND
5203 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5204 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
5206 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
5208 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5209 op0 = fold_rtx (op0, NULL_RTX);
5211 op0 = equiv_constant (op0);
5213 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
5216 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
5217 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
5218 && eltcode != DIV && eltcode != MOD
5219 && eltcode != UDIV && eltcode != UMOD
5220 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
5221 && eltcode != ROTATE && eltcode != ROTATERT
5222 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5223 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
5225 || CONSTANT_P (XEXP (elt->exp, 0)))
5226 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
5227 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
5229 || CONSTANT_P (XEXP (elt->exp, 1))))
5231 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
5232 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
5234 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5235 op0 = fold_rtx (op0, NULL_RTX);
5238 op0 = equiv_constant (op0);
5240 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5241 op1 = fold_rtx (op1, NULL_RTX);
5244 op1 = equiv_constant (op1);
5246 /* If we are looking for the low SImode part of
5247 (ashift:DI c (const_int 32)), it doesn't work
5248 to compute that in SImode, because a 32-bit shift
5249 in SImode is unpredictable. We know the value is 0. */
5251 && GET_CODE (elt->exp) == ASHIFT
5252 && GET_CODE (op1) == CONST_INT
5253 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5255 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5257 /* If the count fits in the inner mode's width,
5258 but exceeds the outer mode's width,
5259 the value will get truncated to 0
5263 /* If the count exceeds even the inner mode's width,
5264 don't fold this expression. */
5267 else if (op0 && op1)
5268 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5272 else if (GET_CODE (elt->exp) == SUBREG
5273 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5274 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5276 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5277 new = copy_rtx (SUBREG_REG (elt->exp));
5288 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5289 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5290 new = lookup_as_function (XEXP (x, 0), code);
5292 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5296 /* If we are not actually processing an insn, don't try to find the
5297 best address. Not only don't we care, but we could modify the
5298 MEM in an invalid way since we have no insn to validate against. */
5300 find_best_addr (insn, &XEXP (x, 0));
5303 /* Even if we don't fold in the insn itself,
5304 we can safely do so here, in hopes of getting a constant. */
5305 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5307 HOST_WIDE_INT offset = 0;
5309 if (GET_CODE (addr) == REG
5310 && REGNO_QTY_VALID_P (REGNO (addr))
5311 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
5312 && qty_const[REG_QTY (REGNO (addr))] != 0)
5313 addr = qty_const[REG_QTY (REGNO (addr))];
5315 /* If address is constant, split it into a base and integer offset. */
5316 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5318 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5319 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5321 base = XEXP (XEXP (addr, 0), 0);
5322 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5324 else if (GET_CODE (addr) == LO_SUM
5325 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5326 base = XEXP (addr, 1);
5327 else if (GET_CODE (addr) == ADDRESSOF)
5328 return change_address (x, VOIDmode, addr);
5330 /* If this is a constant pool reference, we can fold it into its
5331 constant to allow better value tracking. */
5332 if (base && GET_CODE (base) == SYMBOL_REF
5333 && CONSTANT_POOL_ADDRESS_P (base))
5335 rtx constant = get_pool_constant (base);
5336 enum machine_mode const_mode = get_pool_mode (base);
5339 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5340 constant_pool_entries_cost = COST (constant);
5342 /* If we are loading the full constant, we have an equivalence. */
5343 if (offset == 0 && mode == const_mode)
5346 /* If this actually isn't a constant (weird!), we can't do
5347 anything. Otherwise, handle the two most common cases:
5348 extracting a word from a multi-word constant, and extracting
5349 the low-order bits. Other cases don't seem common enough to
5351 if (! CONSTANT_P (constant))
5354 if (GET_MODE_CLASS (mode) == MODE_INT
5355 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5356 && offset % UNITS_PER_WORD == 0
5357 && (new = operand_subword (constant,
5358 offset / UNITS_PER_WORD,
5359 0, const_mode)) != 0)
5362 if (((BYTES_BIG_ENDIAN
5363 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5364 || (! BYTES_BIG_ENDIAN && offset == 0))
5365 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5369 /* If this is a reference to a label at a known position in a jump
5370 table, we also know its value. */
5371 if (base && GET_CODE (base) == LABEL_REF)
5373 rtx label = XEXP (base, 0);
5374 rtx table_insn = NEXT_INSN (label);
5376 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5377 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5379 rtx table = PATTERN (table_insn);
5382 && (offset / GET_MODE_SIZE (GET_MODE (table))
5383 < XVECLEN (table, 0)))
5384 return XVECEXP (table, 0,
5385 offset / GET_MODE_SIZE (GET_MODE (table)));
5387 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5388 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5390 rtx table = PATTERN (table_insn);
5393 && (offset / GET_MODE_SIZE (GET_MODE (table))
5394 < XVECLEN (table, 1)))
5396 offset /= GET_MODE_SIZE (GET_MODE (table));
5397 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5400 if (GET_MODE (table) != Pmode)
5401 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5403 /* Indicate this is a constant. This isn't a
5404 valid form of CONST, but it will only be used
5405 to fold the next insns and then discarded, so
5408 Note this expression must be explicitly discarded,
5409 by cse_insn, else it may end up in a REG_EQUAL note
5410 and "escape" to cause problems elsewhere. */
5411 return gen_rtx_CONST (GET_MODE (new), new);
5420 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5421 validate_change (insn, &XVECEXP (x, 3, i),
5422 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5432 mode_arg0 = VOIDmode;
5434 /* Try folding our operands.
5435 Then see which ones have constant values known. */
5437 fmt = GET_RTX_FORMAT (code);
5438 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5441 rtx arg = XEXP (x, i);
5442 rtx folded_arg = arg, const_arg = 0;
5443 enum machine_mode mode_arg = GET_MODE (arg);
5444 rtx cheap_arg, expensive_arg;
5445 rtx replacements[2];
5448 /* Most arguments are cheap, so handle them specially. */
5449 switch (GET_CODE (arg))
5452 /* This is the same as calling equiv_constant; it is duplicated
5454 if (REGNO_QTY_VALID_P (REGNO (arg))
5455 && qty_const[REG_QTY (REGNO (arg))] != 0
5456 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
5457 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
5459 = gen_lowpart_if_possible (GET_MODE (arg),
5460 qty_const[REG_QTY (REGNO (arg))]);
5473 folded_arg = prev_insn_cc0;
5474 mode_arg = prev_insn_cc0_mode;
5475 const_arg = equiv_constant (folded_arg);
5480 folded_arg = fold_rtx (arg, insn);
5481 const_arg = equiv_constant (folded_arg);
5484 /* For the first three operands, see if the operand
5485 is constant or equivalent to a constant. */
5489 folded_arg0 = folded_arg;
5490 const_arg0 = const_arg;
5491 mode_arg0 = mode_arg;
5494 folded_arg1 = folded_arg;
5495 const_arg1 = const_arg;
5498 const_arg2 = const_arg;
5502 /* Pick the least expensive of the folded argument and an
5503 equivalent constant argument. */
5504 if (const_arg == 0 || const_arg == folded_arg
5505 || COST (const_arg) > COST (folded_arg))
5506 cheap_arg = folded_arg, expensive_arg = const_arg;
5508 cheap_arg = const_arg, expensive_arg = folded_arg;
5510 /* Try to replace the operand with the cheapest of the two
5511 possibilities. If it doesn't work and this is either of the first
5512 two operands of a commutative operation, try swapping them.
5513 If THAT fails, try the more expensive, provided it is cheaper
5514 than what is already there. */
5516 if (cheap_arg == XEXP (x, i))
5519 if (insn == 0 && ! copied)
5525 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5527 j < 2 && replacements[j]
5528 && COST (replacements[j]) < COST (XEXP (x, i));
5531 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5534 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5536 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5537 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5539 if (apply_change_group ())
5541 /* Swap them back to be invalid so that this loop can
5542 continue and flag them to be swapped back later. */
5545 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5557 /* Don't try to fold inside of a vector of expressions.
5558 Doing nothing is harmless. */
5562 /* If a commutative operation, place a constant integer as the second
5563 operand unless the first operand is also a constant integer. Otherwise,
5564 place any constant second unless the first operand is also a constant. */
5566 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5568 if (must_swap || (const_arg0
5570 || (GET_CODE (const_arg0) == CONST_INT
5571 && GET_CODE (const_arg1) != CONST_INT))))
5573 register rtx tem = XEXP (x, 0);
5575 if (insn == 0 && ! copied)
5581 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5582 validate_change (insn, &XEXP (x, 1), tem, 1);
5583 if (apply_change_group ())
5585 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5586 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5591 /* If X is an arithmetic operation, see if we can simplify it. */
5593 switch (GET_RTX_CLASS (code))
5599 /* We can't simplify extension ops unless we know the
5601 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5602 && mode_arg0 == VOIDmode)
5605 /* If we had a CONST, strip it off and put it back later if we
5607 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5608 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5610 new = simplify_unary_operation (code, mode,
5611 const_arg0 ? const_arg0 : folded_arg0,
5613 if (new != 0 && is_const)
5614 new = gen_rtx_CONST (mode, new);
5619 /* See what items are actually being compared and set FOLDED_ARG[01]
5620 to those values and CODE to the actual comparison code. If any are
5621 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5622 do anything if both operands are already known to be constant. */
5624 if (const_arg0 == 0 || const_arg1 == 0)
5626 struct table_elt *p0, *p1;
5627 rtx true = const_true_rtx, false = const0_rtx;
5628 enum machine_mode mode_arg1;
5630 #ifdef FLOAT_STORE_FLAG_VALUE
5631 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5633 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5635 false = CONST0_RTX (mode);
5639 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5640 &mode_arg0, &mode_arg1);
5641 const_arg0 = equiv_constant (folded_arg0);
5642 const_arg1 = equiv_constant (folded_arg1);
5644 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5645 what kinds of things are being compared, so we can't do
5646 anything with this comparison. */
5648 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5651 /* If we do not now have two constants being compared, see
5652 if we can nevertheless deduce some things about the
5654 if (const_arg0 == 0 || const_arg1 == 0)
5656 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5657 non-explicit constant? These aren't zero, but we
5658 don't know their sign. */
5659 if (const_arg1 == const0_rtx
5660 && (NONZERO_BASE_PLUS_P (folded_arg0)
5661 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5663 || GET_CODE (folded_arg0) == SYMBOL_REF
5665 || GET_CODE (folded_arg0) == LABEL_REF
5666 || GET_CODE (folded_arg0) == CONST))
5670 else if (code == NE)
5674 /* See if the two operands are the same. We don't do this
5675 for IEEE floating-point since we can't assume x == x
5676 since x might be a NaN. */
5678 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5679 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5680 && (folded_arg0 == folded_arg1
5681 || (GET_CODE (folded_arg0) == REG
5682 && GET_CODE (folded_arg1) == REG
5683 && (REG_QTY (REGNO (folded_arg0))
5684 == REG_QTY (REGNO (folded_arg1))))
5685 || ((p0 = lookup (folded_arg0,
5686 (safe_hash (folded_arg0, mode_arg0)
5687 % NBUCKETS), mode_arg0))
5688 && (p1 = lookup (folded_arg1,
5689 (safe_hash (folded_arg1, mode_arg0)
5690 % NBUCKETS), mode_arg0))
5691 && p0->first_same_value == p1->first_same_value)))
5692 return ((code == EQ || code == LE || code == GE
5693 || code == LEU || code == GEU)
5696 /* If FOLDED_ARG0 is a register, see if the comparison we are
5697 doing now is either the same as we did before or the reverse
5698 (we only check the reverse if not floating-point). */
5699 else if (GET_CODE (folded_arg0) == REG)
5701 int qty = REG_QTY (REGNO (folded_arg0));
5703 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5704 && (comparison_dominates_p (qty_comparison_code[qty], code)
5705 || (comparison_dominates_p (qty_comparison_code[qty],
5706 reverse_condition (code))
5707 && ! FLOAT_MODE_P (mode_arg0)))
5708 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5710 && rtx_equal_p (qty_comparison_const[qty],
5712 || (GET_CODE (folded_arg1) == REG
5713 && (REG_QTY (REGNO (folded_arg1))
5714 == qty_comparison_qty[qty]))))
5715 return (comparison_dominates_p (qty_comparison_code[qty],
5722 /* If we are comparing against zero, see if the first operand is
5723 equivalent to an IOR with a constant. If so, we may be able to
5724 determine the result of this comparison. */
5726 if (const_arg1 == const0_rtx)
5728 rtx y = lookup_as_function (folded_arg0, IOR);
5732 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5733 && GET_CODE (inner_const) == CONST_INT
5734 && INTVAL (inner_const) != 0)
5736 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5737 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5738 && (INTVAL (inner_const)
5739 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5740 rtx true = const_true_rtx, false = const0_rtx;
5742 #ifdef FLOAT_STORE_FLAG_VALUE
5743 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5745 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5747 false = CONST0_RTX (mode);
5771 new = simplify_relational_operation (code, mode_arg0,
5772 const_arg0 ? const_arg0 : folded_arg0,
5773 const_arg1 ? const_arg1 : folded_arg1);
5774 #ifdef FLOAT_STORE_FLAG_VALUE
5775 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5776 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5777 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5786 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5787 with that LABEL_REF as its second operand. If so, the result is
5788 the first operand of that MINUS. This handles switches with an
5789 ADDR_DIFF_VEC table. */
5790 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5793 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5794 : lookup_as_function (folded_arg0, MINUS);
5796 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5797 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5800 /* Now try for a CONST of a MINUS like the above. */
5801 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5802 : lookup_as_function (folded_arg0, CONST))) != 0
5803 && GET_CODE (XEXP (y, 0)) == MINUS
5804 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5805 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5806 return XEXP (XEXP (y, 0), 0);
5809 /* Likewise if the operands are in the other order. */
5810 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5813 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5814 : lookup_as_function (folded_arg1, MINUS);
5816 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5817 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5820 /* Now try for a CONST of a MINUS like the above. */
5821 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5822 : lookup_as_function (folded_arg1, CONST))) != 0
5823 && GET_CODE (XEXP (y, 0)) == MINUS
5824 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5825 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5826 return XEXP (XEXP (y, 0), 0);
5829 /* If second operand is a register equivalent to a negative
5830 CONST_INT, see if we can find a register equivalent to the
5831 positive constant. Make a MINUS if so. Don't do this for
5832 a non-negative constant since we might then alternate between
5833 chosing positive and negative constants. Having the positive
5834 constant previously-used is the more common case. Be sure
5835 the resulting constant is non-negative; if const_arg1 were
5836 the smallest negative number this would overflow: depending
5837 on the mode, this would either just be the same value (and
5838 hence not save anything) or be incorrect. */
5839 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5840 && INTVAL (const_arg1) < 0
5841 && - INTVAL (const_arg1) >= 0
5842 && GET_CODE (folded_arg1) == REG)
5844 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5846 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5850 for (p = p->first_same_value; p; p = p->next_same_value)
5851 if (GET_CODE (p->exp) == REG)
5852 return cse_gen_binary (MINUS, mode, folded_arg0,
5853 canon_reg (p->exp, NULL_RTX));
5858 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5859 If so, produce (PLUS Z C2-C). */
5860 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5862 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5863 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5864 return fold_rtx (plus_constant (copy_rtx (y),
5865 -INTVAL (const_arg1)),
5869 /* ... fall through ... */
5872 case SMIN: case SMAX: case UMIN: case UMAX:
5873 case IOR: case AND: case XOR:
5874 case MULT: case DIV: case UDIV:
5875 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5876 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5877 is known to be of similar form, we may be able to replace the
5878 operation with a combined operation. This may eliminate the
5879 intermediate operation if every use is simplified in this way.
5880 Note that the similar optimization done by combine.c only works
5881 if the intermediate operation's result has only one reference. */
5883 if (GET_CODE (folded_arg0) == REG
5884 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5887 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5888 rtx y = lookup_as_function (folded_arg0, code);
5890 enum rtx_code associate_code;
5894 || 0 == (inner_const
5895 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5896 || GET_CODE (inner_const) != CONST_INT
5897 /* If we have compiled a statement like
5898 "if (x == (x & mask1))", and now are looking at
5899 "x & mask2", we will have a case where the first operand
5900 of Y is the same as our first operand. Unless we detect
5901 this case, an infinite loop will result. */
5902 || XEXP (y, 0) == folded_arg0)
5905 /* Don't associate these operations if they are a PLUS with the
5906 same constant and it is a power of two. These might be doable
5907 with a pre- or post-increment. Similarly for two subtracts of
5908 identical powers of two with post decrement. */
5910 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5911 && ((HAVE_PRE_INCREMENT
5912 && exact_log2 (INTVAL (const_arg1)) >= 0)
5913 || (HAVE_POST_INCREMENT
5914 && exact_log2 (INTVAL (const_arg1)) >= 0)
5915 || (HAVE_PRE_DECREMENT
5916 && exact_log2 (- INTVAL (const_arg1)) >= 0)
5917 || (HAVE_POST_DECREMENT
5918 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
5921 /* Compute the code used to compose the constants. For example,
5922 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5925 = (code == MULT || code == DIV || code == UDIV ? MULT
5926 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5928 new_const = simplify_binary_operation (associate_code, mode,
5929 const_arg1, inner_const);
5934 /* If we are associating shift operations, don't let this
5935 produce a shift of the size of the object or larger.
5936 This could occur when we follow a sign-extend by a right
5937 shift on a machine that does a sign-extend as a pair
5940 if (is_shift && GET_CODE (new_const) == CONST_INT
5941 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5943 /* As an exception, we can turn an ASHIFTRT of this
5944 form into a shift of the number of bits - 1. */
5945 if (code == ASHIFTRT)
5946 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5951 y = copy_rtx (XEXP (y, 0));
5953 /* If Y contains our first operand (the most common way this
5954 can happen is if Y is a MEM), we would do into an infinite
5955 loop if we tried to fold it. So don't in that case. */
5957 if (! reg_mentioned_p (folded_arg0, y))
5958 y = fold_rtx (y, insn);
5960 return cse_gen_binary (code, mode, y, new_const);
5968 new = simplify_binary_operation (code, mode,
5969 const_arg0 ? const_arg0 : folded_arg0,
5970 const_arg1 ? const_arg1 : folded_arg1);
5974 /* (lo_sum (high X) X) is simply X. */
5975 if (code == LO_SUM && const_arg0 != 0
5976 && GET_CODE (const_arg0) == HIGH
5977 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5983 new = simplify_ternary_operation (code, mode, mode_arg0,
5984 const_arg0 ? const_arg0 : folded_arg0,
5985 const_arg1 ? const_arg1 : folded_arg1,
5986 const_arg2 ? const_arg2 : XEXP (x, 2));
5990 /* Always eliminate CONSTANT_P_RTX at this stage. */
5991 if (code == CONSTANT_P_RTX)
5992 return (const_arg0 ? const1_rtx : const0_rtx);
5996 return new ? new : x;
5999 /* Return a constant value currently equivalent to X.
6000 Return 0 if we don't know one. */
6006 if (GET_CODE (x) == REG
6007 && REGNO_QTY_VALID_P (REGNO (x))
6008 && qty_const[REG_QTY (REGNO (x))])
6009 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
6011 if (x == 0 || CONSTANT_P (x))
6014 /* If X is a MEM, try to fold it outside the context of any insn to see if
6015 it might be equivalent to a constant. That handles the case where it
6016 is a constant-pool reference. Then try to look it up in the hash table
6017 in case it is something whose value we have seen before. */
6019 if (GET_CODE (x) == MEM)
6021 struct table_elt *elt;
6023 x = fold_rtx (x, NULL_RTX);
6027 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
6031 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
6032 if (elt->is_const && CONSTANT_P (elt->exp))
6039 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
6040 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
6041 least-significant part of X.
6042 MODE specifies how big a part of X to return.
6044 If the requested operation cannot be done, 0 is returned.
6046 This is similar to gen_lowpart in emit-rtl.c. */
6049 gen_lowpart_if_possible (mode, x)
6050 enum machine_mode mode;
6053 rtx result = gen_lowpart_common (mode, x);
6057 else if (GET_CODE (x) == MEM)
6059 /* This is the only other case we handle. */
6060 register int offset = 0;
6063 if (WORDS_BIG_ENDIAN)
6064 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
6065 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
6066 if (BYTES_BIG_ENDIAN)
6067 /* Adjust the address so that the address-after-the-data is
6069 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
6070 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
6071 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
6072 if (! memory_address_p (mode, XEXP (new, 0)))
6074 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
6075 MEM_COPY_ATTRIBUTES (new, x);
6082 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
6083 branch. It will be zero if not.
6085 In certain cases, this can cause us to add an equivalence. For example,
6086 if we are following the taken case of
6088 we can add the fact that `i' and '2' are now equivalent.
6090 In any case, we can record that this comparison was passed. If the same
6091 comparison is seen later, we will know its value. */
6094 record_jump_equiv (insn, taken)
6098 int cond_known_true;
6100 enum machine_mode mode, mode0, mode1;
6101 int reversed_nonequality = 0;
6104 /* Ensure this is the right kind of insn. */
6105 if (! condjump_p (insn) || simplejump_p (insn))
6108 /* See if this jump condition is known true or false. */
6110 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
6112 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
6114 /* Get the type of comparison being done and the operands being compared.
6115 If we had to reverse a non-equality condition, record that fact so we
6116 know that it isn't valid for floating-point. */
6117 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
6118 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
6119 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
6121 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
6122 if (! cond_known_true)
6124 reversed_nonequality = (code != EQ && code != NE);
6125 code = reverse_condition (code);
6128 /* The mode is the mode of the non-constant. */
6130 if (mode1 != VOIDmode)
6133 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
6136 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6137 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6138 Make any useful entries we can with that information. Called from
6139 above function and called recursively. */
6142 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
6144 enum machine_mode mode;
6146 int reversed_nonequality;
6148 unsigned op0_hash, op1_hash;
6149 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
6150 struct table_elt *op0_elt, *op1_elt;
6152 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6153 we know that they are also equal in the smaller mode (this is also
6154 true for all smaller modes whether or not there is a SUBREG, but
6155 is not worth testing for with no SUBREG). */
6157 /* Note that GET_MODE (op0) may not equal MODE. */
6158 if (code == EQ && GET_CODE (op0) == SUBREG
6159 && (GET_MODE_SIZE (GET_MODE (op0))
6160 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6162 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6163 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6165 record_jump_cond (code, mode, SUBREG_REG (op0),
6166 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6167 reversed_nonequality);
6170 if (code == EQ && GET_CODE (op1) == SUBREG
6171 && (GET_MODE_SIZE (GET_MODE (op1))
6172 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6174 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6175 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6177 record_jump_cond (code, mode, SUBREG_REG (op1),
6178 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6179 reversed_nonequality);
6182 /* Similarly, if this is an NE comparison, and either is a SUBREG
6183 making a smaller mode, we know the whole thing is also NE. */
6185 /* Note that GET_MODE (op0) may not equal MODE;
6186 if we test MODE instead, we can get an infinite recursion
6187 alternating between two modes each wider than MODE. */
6189 if (code == NE && GET_CODE (op0) == SUBREG
6190 && subreg_lowpart_p (op0)
6191 && (GET_MODE_SIZE (GET_MODE (op0))
6192 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6194 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6195 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6197 record_jump_cond (code, mode, SUBREG_REG (op0),
6198 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6199 reversed_nonequality);
6202 if (code == NE && GET_CODE (op1) == SUBREG
6203 && subreg_lowpart_p (op1)
6204 && (GET_MODE_SIZE (GET_MODE (op1))
6205 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6207 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6208 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6210 record_jump_cond (code, mode, SUBREG_REG (op1),
6211 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6212 reversed_nonequality);
6215 /* Hash both operands. */
6218 hash_arg_in_memory = 0;
6219 hash_arg_in_struct = 0;
6220 op0_hash = HASH (op0, mode);
6221 op0_in_memory = hash_arg_in_memory;
6222 op0_in_struct = hash_arg_in_struct;
6228 hash_arg_in_memory = 0;
6229 hash_arg_in_struct = 0;
6230 op1_hash = HASH (op1, mode);
6231 op1_in_memory = hash_arg_in_memory;
6232 op1_in_struct = hash_arg_in_struct;
6237 /* Look up both operands. */
6238 op0_elt = lookup (op0, op0_hash, mode);
6239 op1_elt = lookup (op1, op1_hash, mode);
6241 /* If both operands are already equivalent or if they are not in the
6242 table but are identical, do nothing. */
6243 if ((op0_elt != 0 && op1_elt != 0
6244 && op0_elt->first_same_value == op1_elt->first_same_value)
6245 || op0 == op1 || rtx_equal_p (op0, op1))
6248 /* If we aren't setting two things equal all we can do is save this
6249 comparison. Similarly if this is floating-point. In the latter
6250 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6251 If we record the equality, we might inadvertently delete code
6252 whose intent was to change -0 to +0. */
6254 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6256 /* If we reversed a floating-point comparison, if OP0 is not a
6257 register, or if OP1 is neither a register or constant, we can't
6260 if (GET_CODE (op1) != REG)
6261 op1 = equiv_constant (op1);
6263 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6264 || GET_CODE (op0) != REG || op1 == 0)
6267 /* Put OP0 in the hash table if it isn't already. This gives it a
6268 new quantity number. */
6271 if (insert_regs (op0, NULL_PTR, 0))
6273 rehash_using_reg (op0);
6274 op0_hash = HASH (op0, mode);
6276 /* If OP0 is contained in OP1, this changes its hash code
6277 as well. Faster to rehash than to check, except
6278 for the simple case of a constant. */
6279 if (! CONSTANT_P (op1))
6280 op1_hash = HASH (op1,mode);
6283 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6284 op0_elt->in_memory = op0_in_memory;
6285 op0_elt->in_struct = op0_in_struct;
6288 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
6289 if (GET_CODE (op1) == REG)
6291 /* Look it up again--in case op0 and op1 are the same. */
6292 op1_elt = lookup (op1, op1_hash, mode);
6294 /* Put OP1 in the hash table so it gets a new quantity number. */
6297 if (insert_regs (op1, NULL_PTR, 0))
6299 rehash_using_reg (op1);
6300 op1_hash = HASH (op1, mode);
6303 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6304 op1_elt->in_memory = op1_in_memory;
6305 op1_elt->in_struct = op1_in_struct;
6308 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
6309 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
6313 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
6314 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
6320 /* If either side is still missing an equivalence, make it now,
6321 then merge the equivalences. */
6325 if (insert_regs (op0, NULL_PTR, 0))
6327 rehash_using_reg (op0);
6328 op0_hash = HASH (op0, mode);
6331 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6332 op0_elt->in_memory = op0_in_memory;
6333 op0_elt->in_struct = op0_in_struct;
6338 if (insert_regs (op1, NULL_PTR, 0))
6340 rehash_using_reg (op1);
6341 op1_hash = HASH (op1, mode);
6344 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6345 op1_elt->in_memory = op1_in_memory;
6346 op1_elt->in_struct = op1_in_struct;
6349 merge_equiv_classes (op0_elt, op1_elt);
6350 last_jump_equiv_class = op0_elt;
6353 /* CSE processing for one instruction.
6354 First simplify sources and addresses of all assignments
6355 in the instruction, using previously-computed equivalents values.
6356 Then install the new sources and destinations in the table
6357 of available values.
6359 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6360 the insn. It means that INSN is inside libcall block. In this
6361 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6363 /* Data on one SET contained in the instruction. */
6367 /* The SET rtx itself. */
6369 /* The SET_SRC of the rtx (the original value, if it is changing). */
6371 /* The hash-table element for the SET_SRC of the SET. */
6372 struct table_elt *src_elt;
6373 /* Hash value for the SET_SRC. */
6375 /* Hash value for the SET_DEST. */
6377 /* The SET_DEST, with SUBREG, etc., stripped. */
6379 /* Place where the pointer to the INNER_DEST was found. */
6380 rtx *inner_dest_loc;
6381 /* Nonzero if the SET_SRC is in memory. */
6383 /* Nonzero if the SET_SRC is in a structure. */
6385 /* Nonzero if the SET_SRC contains something
6386 whose value cannot be predicted and understood. */
6388 /* Original machine mode, in case it becomes a CONST_INT. */
6389 enum machine_mode mode;
6390 /* A constant equivalent for SET_SRC, if any. */
6392 /* Hash value of constant equivalent for SET_SRC. */
6393 unsigned src_const_hash;
6394 /* Table entry for constant equivalent for SET_SRC, if any. */
6395 struct table_elt *src_const_elt;
6399 cse_insn (insn, libcall_insn)
6403 register rtx x = PATTERN (insn);
6406 register int n_sets = 0;
6409 /* Records what this insn does to set CC0. */
6410 rtx this_insn_cc0 = 0;
6411 enum machine_mode this_insn_cc0_mode = VOIDmode;
6415 struct table_elt *src_eqv_elt = 0;
6416 int src_eqv_volatile;
6417 int src_eqv_in_memory;
6418 int src_eqv_in_struct;
6419 unsigned src_eqv_hash;
6425 /* Find all the SETs and CLOBBERs in this instruction.
6426 Record all the SETs in the array `set' and count them.
6427 Also determine whether there is a CLOBBER that invalidates
6428 all memory references, or all references at varying addresses. */
6430 if (GET_CODE (insn) == CALL_INSN)
6432 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6433 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6434 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6437 if (GET_CODE (x) == SET)
6439 sets = (struct set *) alloca (sizeof (struct set));
6442 /* Ignore SETs that are unconditional jumps.
6443 They never need cse processing, so this does not hurt.
6444 The reason is not efficiency but rather
6445 so that we can test at the end for instructions
6446 that have been simplified to unconditional jumps
6447 and not be misled by unchanged instructions
6448 that were unconditional jumps to begin with. */
6449 if (SET_DEST (x) == pc_rtx
6450 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6453 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6454 The hard function value register is used only once, to copy to
6455 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6456 Ensure we invalidate the destination register. On the 80386 no
6457 other code would invalidate it since it is a fixed_reg.
6458 We need not check the return of apply_change_group; see canon_reg. */
6460 else if (GET_CODE (SET_SRC (x)) == CALL)
6462 canon_reg (SET_SRC (x), insn);
6463 apply_change_group ();
6464 fold_rtx (SET_SRC (x), insn);
6465 invalidate (SET_DEST (x), VOIDmode);
6470 else if (GET_CODE (x) == PARALLEL)
6472 register int lim = XVECLEN (x, 0);
6474 sets = (struct set *) alloca (lim * sizeof (struct set));
6476 /* Find all regs explicitly clobbered in this insn,
6477 and ensure they are not replaced with any other regs
6478 elsewhere in this insn.
6479 When a reg that is clobbered is also used for input,
6480 we should presume that that is for a reason,
6481 and we should not substitute some other register
6482 which is not supposed to be clobbered.
6483 Therefore, this loop cannot be merged into the one below
6484 because a CALL may precede a CLOBBER and refer to the
6485 value clobbered. We must not let a canonicalization do
6486 anything in that case. */
6487 for (i = 0; i < lim; i++)
6489 register rtx y = XVECEXP (x, 0, i);
6490 if (GET_CODE (y) == CLOBBER)
6492 rtx clobbered = XEXP (y, 0);
6494 if (GET_CODE (clobbered) == REG
6495 || GET_CODE (clobbered) == SUBREG)
6496 invalidate (clobbered, VOIDmode);
6497 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6498 || GET_CODE (clobbered) == ZERO_EXTRACT)
6499 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6503 for (i = 0; i < lim; i++)
6505 register rtx y = XVECEXP (x, 0, i);
6506 if (GET_CODE (y) == SET)
6508 /* As above, we ignore unconditional jumps and call-insns and
6509 ignore the result of apply_change_group. */
6510 if (GET_CODE (SET_SRC (y)) == CALL)
6512 canon_reg (SET_SRC (y), insn);
6513 apply_change_group ();
6514 fold_rtx (SET_SRC (y), insn);
6515 invalidate (SET_DEST (y), VOIDmode);
6517 else if (SET_DEST (y) == pc_rtx
6518 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6521 sets[n_sets++].rtl = y;
6523 else if (GET_CODE (y) == CLOBBER)
6525 /* If we clobber memory, canon the address.
6526 This does nothing when a register is clobbered
6527 because we have already invalidated the reg. */
6528 if (GET_CODE (XEXP (y, 0)) == MEM)
6529 canon_reg (XEXP (y, 0), NULL_RTX);
6531 else if (GET_CODE (y) == USE
6532 && ! (GET_CODE (XEXP (y, 0)) == REG
6533 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6534 canon_reg (y, NULL_RTX);
6535 else if (GET_CODE (y) == CALL)
6537 /* The result of apply_change_group can be ignored; see
6539 canon_reg (y, insn);
6540 apply_change_group ();
6545 else if (GET_CODE (x) == CLOBBER)
6547 if (GET_CODE (XEXP (x, 0)) == MEM)
6548 canon_reg (XEXP (x, 0), NULL_RTX);
6551 /* Canonicalize a USE of a pseudo register or memory location. */
6552 else if (GET_CODE (x) == USE
6553 && ! (GET_CODE (XEXP (x, 0)) == REG
6554 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6555 canon_reg (XEXP (x, 0), NULL_RTX);
6556 else if (GET_CODE (x) == CALL)
6558 /* The result of apply_change_group can be ignored; see canon_reg. */
6559 canon_reg (x, insn);
6560 apply_change_group ();
6564 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6565 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6566 is handled specially for this case, and if it isn't set, then there will
6567 be no equivalence for the destination. */
6568 if (n_sets == 1 && REG_NOTES (insn) != 0
6569 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6570 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6571 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6572 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6574 /* Canonicalize sources and addresses of destinations.
6575 We do this in a separate pass to avoid problems when a MATCH_DUP is
6576 present in the insn pattern. In that case, we want to ensure that
6577 we don't break the duplicate nature of the pattern. So we will replace
6578 both operands at the same time. Otherwise, we would fail to find an
6579 equivalent substitution in the loop calling validate_change below.
6581 We used to suppress canonicalization of DEST if it appears in SRC,
6582 but we don't do this any more. */
6584 for (i = 0; i < n_sets; i++)
6586 rtx dest = SET_DEST (sets[i].rtl);
6587 rtx src = SET_SRC (sets[i].rtl);
6588 rtx new = canon_reg (src, insn);
6591 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6592 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6593 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6594 || (insn_code = recog_memoized (insn)) < 0
6595 || insn_n_dups[insn_code] > 0)
6596 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6598 SET_SRC (sets[i].rtl) = new;
6600 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6602 validate_change (insn, &XEXP (dest, 1),
6603 canon_reg (XEXP (dest, 1), insn), 1);
6604 validate_change (insn, &XEXP (dest, 2),
6605 canon_reg (XEXP (dest, 2), insn), 1);
6608 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6609 || GET_CODE (dest) == ZERO_EXTRACT
6610 || GET_CODE (dest) == SIGN_EXTRACT)
6611 dest = XEXP (dest, 0);
6613 if (GET_CODE (dest) == MEM)
6614 canon_reg (dest, insn);
6617 /* Now that we have done all the replacements, we can apply the change
6618 group and see if they all work. Note that this will cause some
6619 canonicalizations that would have worked individually not to be applied
6620 because some other canonicalization didn't work, but this should not
6623 The result of apply_change_group can be ignored; see canon_reg. */
6625 apply_change_group ();
6627 /* Set sets[i].src_elt to the class each source belongs to.
6628 Detect assignments from or to volatile things
6629 and set set[i] to zero so they will be ignored
6630 in the rest of this function.
6632 Nothing in this loop changes the hash table or the register chains. */
6634 for (i = 0; i < n_sets; i++)
6636 register rtx src, dest;
6637 register rtx src_folded;
6638 register struct table_elt *elt = 0, *p;
6639 enum machine_mode mode;
6642 rtx src_related = 0;
6643 struct table_elt *src_const_elt = 0;
6644 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6645 int src_related_cost = 10000, src_elt_cost = 10000;
6646 /* Set non-zero if we need to call force_const_mem on with the
6647 contents of src_folded before using it. */
6648 int src_folded_force_flag = 0;
6650 dest = SET_DEST (sets[i].rtl);
6651 src = SET_SRC (sets[i].rtl);
6653 /* If SRC is a constant that has no machine mode,
6654 hash it with the destination's machine mode.
6655 This way we can keep different modes separate. */
6657 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6658 sets[i].mode = mode;
6662 enum machine_mode eqvmode = mode;
6663 if (GET_CODE (dest) == STRICT_LOW_PART)
6664 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6666 hash_arg_in_memory = 0;
6667 hash_arg_in_struct = 0;
6668 src_eqv = fold_rtx (src_eqv, insn);
6669 src_eqv_hash = HASH (src_eqv, eqvmode);
6671 /* Find the equivalence class for the equivalent expression. */
6674 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6676 src_eqv_volatile = do_not_record;
6677 src_eqv_in_memory = hash_arg_in_memory;
6678 src_eqv_in_struct = hash_arg_in_struct;
6681 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6682 value of the INNER register, not the destination. So it is not
6683 a valid substitution for the source. But save it for later. */
6684 if (GET_CODE (dest) == STRICT_LOW_PART)
6687 src_eqv_here = src_eqv;
6689 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6690 simplified result, which may not necessarily be valid. */
6691 src_folded = fold_rtx (src, insn);
6694 /* ??? This caused bad code to be generated for the m68k port with -O2.
6695 Suppose src is (CONST_INT -1), and that after truncation src_folded
6696 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6697 At the end we will add src and src_const to the same equivalence
6698 class. We now have 3 and -1 on the same equivalence class. This
6699 causes later instructions to be mis-optimized. */
6700 /* If storing a constant in a bitfield, pre-truncate the constant
6701 so we will be able to record it later. */
6702 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6703 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6705 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6707 if (GET_CODE (src) == CONST_INT
6708 && GET_CODE (width) == CONST_INT
6709 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6710 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6712 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6713 << INTVAL (width)) - 1));
6717 /* Compute SRC's hash code, and also notice if it
6718 should not be recorded at all. In that case,
6719 prevent any further processing of this assignment. */
6721 hash_arg_in_memory = 0;
6722 hash_arg_in_struct = 0;
6725 sets[i].src_hash = HASH (src, mode);
6726 sets[i].src_volatile = do_not_record;
6727 sets[i].src_in_memory = hash_arg_in_memory;
6728 sets[i].src_in_struct = hash_arg_in_struct;
6730 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6731 a pseudo that is set more than once, do not record SRC. Using
6732 SRC as a replacement for anything else will be incorrect in that
6733 situation. Note that this usually occurs only for stack slots,
6734 in which case all the RTL would be referring to SRC, so we don't
6735 lose any optimization opportunities by not having SRC in the
6738 if (GET_CODE (src) == MEM
6739 && find_reg_note (insn, REG_EQUIV, src) != 0
6740 && GET_CODE (dest) == REG
6741 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6742 && REG_N_SETS (REGNO (dest)) != 1)
6743 sets[i].src_volatile = 1;
6746 /* It is no longer clear why we used to do this, but it doesn't
6747 appear to still be needed. So let's try without it since this
6748 code hurts cse'ing widened ops. */
6749 /* If source is a perverse subreg (such as QI treated as an SI),
6750 treat it as volatile. It may do the work of an SI in one context
6751 where the extra bits are not being used, but cannot replace an SI
6753 if (GET_CODE (src) == SUBREG
6754 && (GET_MODE_SIZE (GET_MODE (src))
6755 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6756 sets[i].src_volatile = 1;
6759 /* Locate all possible equivalent forms for SRC. Try to replace
6760 SRC in the insn with each cheaper equivalent.
6762 We have the following types of equivalents: SRC itself, a folded
6763 version, a value given in a REG_EQUAL note, or a value related
6766 Each of these equivalents may be part of an additional class
6767 of equivalents (if more than one is in the table, they must be in
6768 the same class; we check for this).
6770 If the source is volatile, we don't do any table lookups.
6772 We note any constant equivalent for possible later use in a
6775 if (!sets[i].src_volatile)
6776 elt = lookup (src, sets[i].src_hash, mode);
6778 sets[i].src_elt = elt;
6780 if (elt && src_eqv_here && src_eqv_elt)
6782 if (elt->first_same_value != src_eqv_elt->first_same_value)
6784 /* The REG_EQUAL is indicating that two formerly distinct
6785 classes are now equivalent. So merge them. */
6786 merge_equiv_classes (elt, src_eqv_elt);
6787 src_eqv_hash = HASH (src_eqv, elt->mode);
6788 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6794 else if (src_eqv_elt)
6797 /* Try to find a constant somewhere and record it in `src_const'.
6798 Record its table element, if any, in `src_const_elt'. Look in
6799 any known equivalences first. (If the constant is not in the
6800 table, also set `sets[i].src_const_hash'). */
6802 for (p = elt->first_same_value; p; p = p->next_same_value)
6806 src_const_elt = elt;
6811 && (CONSTANT_P (src_folded)
6812 /* Consider (minus (label_ref L1) (label_ref L2)) as
6813 "constant" here so we will record it. This allows us
6814 to fold switch statements when an ADDR_DIFF_VEC is used. */
6815 || (GET_CODE (src_folded) == MINUS
6816 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6817 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6818 src_const = src_folded, src_const_elt = elt;
6819 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6820 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6822 /* If we don't know if the constant is in the table, get its
6823 hash code and look it up. */
6824 if (src_const && src_const_elt == 0)
6826 sets[i].src_const_hash = HASH (src_const, mode);
6827 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6830 sets[i].src_const = src_const;
6831 sets[i].src_const_elt = src_const_elt;
6833 /* If the constant and our source are both in the table, mark them as
6834 equivalent. Otherwise, if a constant is in the table but the source
6835 isn't, set ELT to it. */
6836 if (src_const_elt && elt
6837 && src_const_elt->first_same_value != elt->first_same_value)
6838 merge_equiv_classes (elt, src_const_elt);
6839 else if (src_const_elt && elt == 0)
6840 elt = src_const_elt;
6842 /* See if there is a register linearly related to a constant
6843 equivalent of SRC. */
6845 && (GET_CODE (src_const) == CONST
6846 || (src_const_elt && src_const_elt->related_value != 0)))
6848 src_related = use_related_value (src_const, src_const_elt);
6851 struct table_elt *src_related_elt
6852 = lookup (src_related, HASH (src_related, mode), mode);
6853 if (src_related_elt && elt)
6855 if (elt->first_same_value
6856 != src_related_elt->first_same_value)
6857 /* This can occur when we previously saw a CONST
6858 involving a SYMBOL_REF and then see the SYMBOL_REF
6859 twice. Merge the involved classes. */
6860 merge_equiv_classes (elt, src_related_elt);
6863 src_related_elt = 0;
6865 else if (src_related_elt && elt == 0)
6866 elt = src_related_elt;
6870 /* See if we have a CONST_INT that is already in a register in a
6873 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6874 && GET_MODE_CLASS (mode) == MODE_INT
6875 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6877 enum machine_mode wider_mode;
6879 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6880 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6881 && src_related == 0;
6882 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6884 struct table_elt *const_elt
6885 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6890 for (const_elt = const_elt->first_same_value;
6891 const_elt; const_elt = const_elt->next_same_value)
6892 if (GET_CODE (const_elt->exp) == REG)
6894 src_related = gen_lowpart_if_possible (mode,
6901 /* Another possibility is that we have an AND with a constant in
6902 a mode narrower than a word. If so, it might have been generated
6903 as part of an "if" which would narrow the AND. If we already
6904 have done the AND in a wider mode, we can use a SUBREG of that
6907 if (flag_expensive_optimizations && ! src_related
6908 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6909 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6911 enum machine_mode tmode;
6912 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6914 for (tmode = GET_MODE_WIDER_MODE (mode);
6915 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6916 tmode = GET_MODE_WIDER_MODE (tmode))
6918 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6919 struct table_elt *larger_elt;
6923 PUT_MODE (new_and, tmode);
6924 XEXP (new_and, 0) = inner;
6925 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6926 if (larger_elt == 0)
6929 for (larger_elt = larger_elt->first_same_value;
6930 larger_elt; larger_elt = larger_elt->next_same_value)
6931 if (GET_CODE (larger_elt->exp) == REG)
6934 = gen_lowpart_if_possible (mode, larger_elt->exp);
6944 #ifdef LOAD_EXTEND_OP
6945 /* See if a MEM has already been loaded with a widening operation;
6946 if it has, we can use a subreg of that. Many CISC machines
6947 also have such operations, but this is only likely to be
6948 beneficial these machines. */
6950 if (flag_expensive_optimizations && src_related == 0
6951 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6952 && GET_MODE_CLASS (mode) == MODE_INT
6953 && GET_CODE (src) == MEM && ! do_not_record
6954 && LOAD_EXTEND_OP (mode) != NIL)
6956 enum machine_mode tmode;
6958 /* Set what we are trying to extend and the operation it might
6959 have been extended with. */
6960 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6961 XEXP (memory_extend_rtx, 0) = src;
6963 for (tmode = GET_MODE_WIDER_MODE (mode);
6964 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6965 tmode = GET_MODE_WIDER_MODE (tmode))
6967 struct table_elt *larger_elt;
6969 PUT_MODE (memory_extend_rtx, tmode);
6970 larger_elt = lookup (memory_extend_rtx,
6971 HASH (memory_extend_rtx, tmode), tmode);
6972 if (larger_elt == 0)
6975 for (larger_elt = larger_elt->first_same_value;
6976 larger_elt; larger_elt = larger_elt->next_same_value)
6977 if (GET_CODE (larger_elt->exp) == REG)
6979 src_related = gen_lowpart_if_possible (mode,
6988 #endif /* LOAD_EXTEND_OP */
6990 if (src == src_folded)
6993 /* At this point, ELT, if non-zero, points to a class of expressions
6994 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6995 and SRC_RELATED, if non-zero, each contain additional equivalent
6996 expressions. Prune these latter expressions by deleting expressions
6997 already in the equivalence class.
6999 Check for an equivalent identical to the destination. If found,
7000 this is the preferred equivalent since it will likely lead to
7001 elimination of the insn. Indicate this by placing it in
7004 if (elt) elt = elt->first_same_value;
7005 for (p = elt; p; p = p->next_same_value)
7007 enum rtx_code code = GET_CODE (p->exp);
7009 /* If the expression is not valid, ignore it. Then we do not
7010 have to check for validity below. In most cases, we can use
7011 `rtx_equal_p', since canonicalization has already been done. */
7012 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
7015 /* Also skip paradoxical subregs, unless that's what we're
7018 && (GET_MODE_SIZE (GET_MODE (p->exp))
7019 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
7021 && GET_CODE (src) == SUBREG
7022 && GET_MODE (src) == GET_MODE (p->exp)
7023 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7024 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
7027 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
7029 else if (src_folded && GET_CODE (src_folded) == code
7030 && rtx_equal_p (src_folded, p->exp))
7032 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
7033 && rtx_equal_p (src_eqv_here, p->exp))
7035 else if (src_related && GET_CODE (src_related) == code
7036 && rtx_equal_p (src_related, p->exp))
7039 /* This is the same as the destination of the insns, we want
7040 to prefer it. Copy it to src_related. The code below will
7041 then give it a negative cost. */
7042 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
7047 /* Find the cheapest valid equivalent, trying all the available
7048 possibilities. Prefer items not in the hash table to ones
7049 that are when they are equal cost. Note that we can never
7050 worsen an insn as the current contents will also succeed.
7051 If we find an equivalent identical to the destination, use it as best,
7052 since this insn will probably be eliminated in that case. */
7055 if (rtx_equal_p (src, dest))
7058 src_cost = COST (src);
7063 if (rtx_equal_p (src_eqv_here, dest))
7066 src_eqv_cost = COST (src_eqv_here);
7071 if (rtx_equal_p (src_folded, dest))
7072 src_folded_cost = -1;
7074 src_folded_cost = COST (src_folded);
7079 if (rtx_equal_p (src_related, dest))
7080 src_related_cost = -1;
7082 src_related_cost = COST (src_related);
7085 /* If this was an indirect jump insn, a known label will really be
7086 cheaper even though it looks more expensive. */
7087 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
7088 src_folded = src_const, src_folded_cost = -1;
7090 /* Terminate loop when replacement made. This must terminate since
7091 the current contents will be tested and will always be valid. */
7096 /* Skip invalid entries. */
7097 while (elt && GET_CODE (elt->exp) != REG
7098 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7099 elt = elt->next_same_value;
7101 /* A paradoxical subreg would be bad here: it'll be the right
7102 size, but later may be adjusted so that the upper bits aren't
7103 what we want. So reject it. */
7105 && GET_CODE (elt->exp) == SUBREG
7106 && (GET_MODE_SIZE (GET_MODE (elt->exp))
7107 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
7108 /* It is okay, though, if the rtx we're trying to match
7109 will ignore any of the bits we can't predict. */
7111 && GET_CODE (src) == SUBREG
7112 && GET_MODE (src) == GET_MODE (elt->exp)
7113 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7114 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
7116 elt = elt->next_same_value;
7120 if (elt) src_elt_cost = elt->cost;
7122 /* Find cheapest and skip it for the next time. For items
7123 of equal cost, use this order:
7124 src_folded, src, src_eqv, src_related and hash table entry. */
7125 if (src_folded_cost <= src_cost
7126 && src_folded_cost <= src_eqv_cost
7127 && src_folded_cost <= src_related_cost
7128 && src_folded_cost <= src_elt_cost)
7130 trial = src_folded, src_folded_cost = 10000;
7131 if (src_folded_force_flag)
7132 trial = force_const_mem (mode, trial);
7134 else if (src_cost <= src_eqv_cost
7135 && src_cost <= src_related_cost
7136 && src_cost <= src_elt_cost)
7137 trial = src, src_cost = 10000;
7138 else if (src_eqv_cost <= src_related_cost
7139 && src_eqv_cost <= src_elt_cost)
7140 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
7141 else if (src_related_cost <= src_elt_cost)
7142 trial = copy_rtx (src_related), src_related_cost = 10000;
7145 trial = copy_rtx (elt->exp);
7146 elt = elt->next_same_value;
7147 src_elt_cost = 10000;
7150 /* We don't normally have an insn matching (set (pc) (pc)), so
7151 check for this separately here. We will delete such an
7154 Tablejump insns contain a USE of the table, so simply replacing
7155 the operand with the constant won't match. This is simply an
7156 unconditional branch, however, and is therefore valid. Just
7157 insert the substitution here and we will delete and re-emit
7160 /* Keep track of the original SET_SRC so that we can fix notes
7161 on libcall instructions. */
7162 old_src = SET_SRC (sets[i].rtl);
7164 if (n_sets == 1 && dest == pc_rtx
7166 || (GET_CODE (trial) == LABEL_REF
7167 && ! condjump_p (insn))))
7169 /* If TRIAL is a label in front of a jump table, we are
7170 really falling through the switch (this is how casesi
7171 insns work), so we must branch around the table. */
7172 if (GET_CODE (trial) == CODE_LABEL
7173 && NEXT_INSN (trial) != 0
7174 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
7175 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
7176 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
7178 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
7180 SET_SRC (sets[i].rtl) = trial;
7181 cse_jumps_altered = 1;
7185 /* Look for a substitution that makes a valid insn. */
7186 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
7188 /* If we just made a substitution inside a libcall, then we
7189 need to make the same substitution in any notes attached
7190 to the RETVAL insn. */
7192 && (GET_CODE (old_src) == REG
7193 || GET_CODE (old_src) == SUBREG
7194 || GET_CODE (old_src) == MEM))
7195 replace_rtx (REG_NOTES (libcall_insn), old_src,
7196 canon_reg (SET_SRC (sets[i].rtl), insn));
7198 /* The result of apply_change_group can be ignored; see
7201 validate_change (insn, &SET_SRC (sets[i].rtl),
7202 canon_reg (SET_SRC (sets[i].rtl), insn),
7204 apply_change_group ();
7208 /* If we previously found constant pool entries for
7209 constants and this is a constant, try making a
7210 pool entry. Put it in src_folded unless we already have done
7211 this since that is where it likely came from. */
7213 else if (constant_pool_entries_cost
7214 && CONSTANT_P (trial)
7215 && ! (GET_CODE (trial) == CONST
7216 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
7218 || (GET_CODE (src_folded) != MEM
7219 && ! src_folded_force_flag))
7220 && GET_MODE_CLASS (mode) != MODE_CC
7221 && mode != VOIDmode)
7223 src_folded_force_flag = 1;
7225 src_folded_cost = constant_pool_entries_cost;
7229 src = SET_SRC (sets[i].rtl);
7231 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7232 However, there is an important exception: If both are registers
7233 that are not the head of their equivalence class, replace SET_SRC
7234 with the head of the class. If we do not do this, we will have
7235 both registers live over a portion of the basic block. This way,
7236 their lifetimes will likely abut instead of overlapping. */
7237 if (GET_CODE (dest) == REG
7238 && REGNO_QTY_VALID_P (REGNO (dest))
7239 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
7240 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
7241 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7242 /* Don't do this if the original insn had a hard reg as
7244 && (GET_CODE (sets[i].src) != REG
7245 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
7246 /* We can't call canon_reg here because it won't do anything if
7247 SRC is a hard register. */
7249 int first = qty_first_reg[REG_QTY (REGNO (src))];
7251 = (first >= FIRST_PSEUDO_REGISTER
7252 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7254 /* We must use validate-change even for this, because this
7255 might be a special no-op instruction, suitable only to
7257 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7260 /* If we had a constant that is cheaper than what we are now
7261 setting SRC to, use that constant. We ignored it when we
7262 thought we could make this into a no-op. */
7263 if (src_const && COST (src_const) < COST (src)
7264 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7270 /* If we made a change, recompute SRC values. */
7271 if (src != sets[i].src)
7274 hash_arg_in_memory = 0;
7275 hash_arg_in_struct = 0;
7277 sets[i].src_hash = HASH (src, mode);
7278 sets[i].src_volatile = do_not_record;
7279 sets[i].src_in_memory = hash_arg_in_memory;
7280 sets[i].src_in_struct = hash_arg_in_struct;
7281 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7284 /* If this is a single SET, we are setting a register, and we have an
7285 equivalent constant, we want to add a REG_NOTE. We don't want
7286 to write a REG_EQUAL note for a constant pseudo since verifying that
7287 that pseudo hasn't been eliminated is a pain. Such a note also
7288 won't help anything.
7290 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7291 which can be created for a reference to a compile time computable
7292 entry in a jump table. */
7294 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7295 && GET_CODE (src_const) != REG
7296 && ! (GET_CODE (src_const) == CONST
7297 && GET_CODE (XEXP (src_const, 0)) == MINUS
7298 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
7299 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7301 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7303 /* Record the actual constant value in a REG_EQUAL note, making
7304 a new one if one does not already exist. */
7306 XEXP (tem, 0) = src_const;
7308 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7309 src_const, REG_NOTES (insn));
7311 /* If storing a constant value in a register that
7312 previously held the constant value 0,
7313 record this fact with a REG_WAS_0 note on this insn.
7315 Note that the *register* is required to have previously held 0,
7316 not just any register in the quantity and we must point to the
7317 insn that set that register to zero.
7319 Rather than track each register individually, we just see if
7320 the last set for this quantity was for this register. */
7322 if (REGNO_QTY_VALID_P (REGNO (dest))
7323 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
7325 /* See if we previously had a REG_WAS_0 note. */
7326 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7327 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
7329 if ((tem = single_set (const_insn)) != 0
7330 && rtx_equal_p (SET_DEST (tem), dest))
7333 XEXP (note, 0) = const_insn;
7335 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7342 /* Now deal with the destination. */
7344 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7346 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7347 to the MEM or REG within it. */
7348 while (GET_CODE (dest) == SIGN_EXTRACT
7349 || GET_CODE (dest) == ZERO_EXTRACT
7350 || GET_CODE (dest) == SUBREG
7351 || GET_CODE (dest) == STRICT_LOW_PART)
7353 sets[i].inner_dest_loc = &XEXP (dest, 0);
7354 dest = XEXP (dest, 0);
7357 sets[i].inner_dest = dest;
7359 if (GET_CODE (dest) == MEM)
7361 #ifdef PUSH_ROUNDING
7362 /* Stack pushes invalidate the stack pointer. */
7363 rtx addr = XEXP (dest, 0);
7364 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7365 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7366 && XEXP (addr, 0) == stack_pointer_rtx)
7367 invalidate (stack_pointer_rtx, Pmode);
7369 dest = fold_rtx (dest, insn);
7372 /* Compute the hash code of the destination now,
7373 before the effects of this instruction are recorded,
7374 since the register values used in the address computation
7375 are those before this instruction. */
7376 sets[i].dest_hash = HASH (dest, mode);
7378 /* Don't enter a bit-field in the hash table
7379 because the value in it after the store
7380 may not equal what was stored, due to truncation. */
7382 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7383 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7385 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7387 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7388 && GET_CODE (width) == CONST_INT
7389 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7390 && ! (INTVAL (src_const)
7391 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7392 /* Exception: if the value is constant,
7393 and it won't be truncated, record it. */
7397 /* This is chosen so that the destination will be invalidated
7398 but no new value will be recorded.
7399 We must invalidate because sometimes constant
7400 values can be recorded for bitfields. */
7401 sets[i].src_elt = 0;
7402 sets[i].src_volatile = 1;
7408 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7410 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7412 PUT_CODE (insn, NOTE);
7413 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7414 NOTE_SOURCE_FILE (insn) = 0;
7415 cse_jumps_altered = 1;
7416 /* One less use of the label this insn used to jump to. */
7417 if (JUMP_LABEL (insn) != 0)
7418 --LABEL_NUSES (JUMP_LABEL (insn));
7419 /* No more processing for this set. */
7423 /* If this SET is now setting PC to a label, we know it used to
7424 be a conditional or computed branch. So we see if we can follow
7425 it. If it was a computed branch, delete it and re-emit. */
7426 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7430 /* If this is not in the format for a simple branch and
7431 we are the only SET in it, re-emit it. */
7432 if (! simplejump_p (insn) && n_sets == 1)
7434 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7435 JUMP_LABEL (new) = XEXP (src, 0);
7436 LABEL_NUSES (XEXP (src, 0))++;
7441 /* Otherwise, force rerecognition, since it probably had
7442 a different pattern before.
7443 This shouldn't really be necessary, since whatever
7444 changed the source value above should have done this.
7445 Until the right place is found, might as well do this here. */
7446 INSN_CODE (insn) = -1;
7448 /* Now that we've converted this jump to an unconditional jump,
7449 there is dead code after it. Delete the dead code until we
7450 reach a BARRIER, the end of the function, or a label. Do
7451 not delete NOTEs except for NOTE_INSN_DELETED since later
7452 phases assume these notes are retained. */
7456 while (NEXT_INSN (p) != 0
7457 && GET_CODE (NEXT_INSN (p)) != BARRIER
7458 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7460 if (GET_CODE (NEXT_INSN (p)) != NOTE
7461 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7462 delete_insn (NEXT_INSN (p));
7467 /* If we don't have a BARRIER immediately after INSN, put one there.
7468 Much code assumes that there are no NOTEs between a JUMP_INSN and
7471 if (NEXT_INSN (insn) == 0
7472 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7473 emit_barrier_before (NEXT_INSN (insn));
7475 /* We might have two BARRIERs separated by notes. Delete the second
7478 if (p != insn && NEXT_INSN (p) != 0
7479 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7480 delete_insn (NEXT_INSN (p));
7482 cse_jumps_altered = 1;
7486 /* If destination is volatile, invalidate it and then do no further
7487 processing for this assignment. */
7489 else if (do_not_record)
7491 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7492 || GET_CODE (dest) == MEM)
7493 invalidate (dest, VOIDmode);
7494 else if (GET_CODE (dest) == STRICT_LOW_PART
7495 || GET_CODE (dest) == ZERO_EXTRACT)
7496 invalidate (XEXP (dest, 0), GET_MODE (dest));
7500 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7501 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7504 /* If setting CC0, record what it was set to, or a constant, if it
7505 is equivalent to a constant. If it is being set to a floating-point
7506 value, make a COMPARE with the appropriate constant of 0. If we
7507 don't do this, later code can interpret this as a test against
7508 const0_rtx, which can cause problems if we try to put it into an
7509 insn as a floating-point operand. */
7510 if (dest == cc0_rtx)
7512 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7513 this_insn_cc0_mode = mode;
7514 if (FLOAT_MODE_P (mode))
7515 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7521 /* Now enter all non-volatile source expressions in the hash table
7522 if they are not already present.
7523 Record their equivalence classes in src_elt.
7524 This way we can insert the corresponding destinations into
7525 the same classes even if the actual sources are no longer in them
7526 (having been invalidated). */
7528 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7529 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7531 register struct table_elt *elt;
7532 register struct table_elt *classp = sets[0].src_elt;
7533 rtx dest = SET_DEST (sets[0].rtl);
7534 enum machine_mode eqvmode = GET_MODE (dest);
7536 if (GET_CODE (dest) == STRICT_LOW_PART)
7538 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7541 if (insert_regs (src_eqv, classp, 0))
7543 rehash_using_reg (src_eqv);
7544 src_eqv_hash = HASH (src_eqv, eqvmode);
7546 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7547 elt->in_memory = src_eqv_in_memory;
7548 elt->in_struct = src_eqv_in_struct;
7551 /* Check to see if src_eqv_elt is the same as a set source which
7552 does not yet have an elt, and if so set the elt of the set source
7554 for (i = 0; i < n_sets; i++)
7555 if (sets[i].rtl && sets[i].src_elt == 0
7556 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7557 sets[i].src_elt = src_eqv_elt;
7560 for (i = 0; i < n_sets; i++)
7561 if (sets[i].rtl && ! sets[i].src_volatile
7562 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7564 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7566 /* REG_EQUAL in setting a STRICT_LOW_PART
7567 gives an equivalent for the entire destination register,
7568 not just for the subreg being stored in now.
7569 This is a more interesting equivalence, so we arrange later
7570 to treat the entire reg as the destination. */
7571 sets[i].src_elt = src_eqv_elt;
7572 sets[i].src_hash = src_eqv_hash;
7576 /* Insert source and constant equivalent into hash table, if not
7578 register struct table_elt *classp = src_eqv_elt;
7579 register rtx src = sets[i].src;
7580 register rtx dest = SET_DEST (sets[i].rtl);
7581 enum machine_mode mode
7582 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7584 if (sets[i].src_elt == 0)
7586 register struct table_elt *elt;
7588 /* Note that these insert_regs calls cannot remove
7589 any of the src_elt's, because they would have failed to
7590 match if not still valid. */
7591 if (insert_regs (src, classp, 0))
7593 rehash_using_reg (src);
7594 sets[i].src_hash = HASH (src, mode);
7596 elt = insert (src, classp, sets[i].src_hash, mode);
7597 elt->in_memory = sets[i].src_in_memory;
7598 elt->in_struct = sets[i].src_in_struct;
7599 sets[i].src_elt = classp = elt;
7602 if (sets[i].src_const && sets[i].src_const_elt == 0
7603 && src != sets[i].src_const
7604 && ! rtx_equal_p (sets[i].src_const, src))
7605 sets[i].src_elt = insert (sets[i].src_const, classp,
7606 sets[i].src_const_hash, mode);
7609 else if (sets[i].src_elt == 0)
7610 /* If we did not insert the source into the hash table (e.g., it was
7611 volatile), note the equivalence class for the REG_EQUAL value, if any,
7612 so that the destination goes into that class. */
7613 sets[i].src_elt = src_eqv_elt;
7615 invalidate_from_clobbers (x);
7617 /* Some registers are invalidated by subroutine calls. Memory is
7618 invalidated by non-constant calls. */
7620 if (GET_CODE (insn) == CALL_INSN)
7622 if (! CONST_CALL_P (insn))
7623 invalidate_memory ();
7624 invalidate_for_call ();
7627 /* Now invalidate everything set by this instruction.
7628 If a SUBREG or other funny destination is being set,
7629 sets[i].rtl is still nonzero, so here we invalidate the reg
7630 a part of which is being set. */
7632 for (i = 0; i < n_sets; i++)
7635 /* We can't use the inner dest, because the mode associated with
7636 a ZERO_EXTRACT is significant. */
7637 register rtx dest = SET_DEST (sets[i].rtl);
7639 /* Needed for registers to remove the register from its
7640 previous quantity's chain.
7641 Needed for memory if this is a nonvarying address, unless
7642 we have just done an invalidate_memory that covers even those. */
7643 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7644 || GET_CODE (dest) == MEM)
7645 invalidate (dest, VOIDmode);
7646 else if (GET_CODE (dest) == STRICT_LOW_PART
7647 || GET_CODE (dest) == ZERO_EXTRACT)
7648 invalidate (XEXP (dest, 0), GET_MODE (dest));
7651 /* Make sure registers mentioned in destinations
7652 are safe for use in an expression to be inserted.
7653 This removes from the hash table
7654 any invalid entry that refers to one of these registers.
7656 We don't care about the return value from mention_regs because
7657 we are going to hash the SET_DEST values unconditionally. */
7659 for (i = 0; i < n_sets; i++)
7663 rtx x = SET_DEST (sets[i].rtl);
7665 if (GET_CODE (x) != REG)
7669 /* We used to rely on all references to a register becoming
7670 inaccessible when a register changes to a new quantity,
7671 since that changes the hash code. However, that is not
7672 safe, since after NBUCKETS new quantities we get a
7673 hash 'collision' of a register with its own invalid
7674 entries. And since SUBREGs have been changed not to
7675 change their hash code with the hash code of the register,
7676 it wouldn't work any longer at all. So we have to check
7677 for any invalid references lying around now.
7678 This code is similar to the REG case in mention_regs,
7679 but it knows that reg_tick has been incremented, and
7680 it leaves reg_in_table as -1 . */
7681 register int regno = REGNO (x);
7682 register int endregno
7683 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
7684 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
7687 for (i = regno; i < endregno; i++)
7689 if (REG_IN_TABLE (i) >= 0)
7691 remove_invalid_refs (i);
7692 REG_IN_TABLE (i) = -1;
7699 /* We may have just removed some of the src_elt's from the hash table.
7700 So replace each one with the current head of the same class. */
7702 for (i = 0; i < n_sets; i++)
7705 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7706 /* If elt was removed, find current head of same class,
7707 or 0 if nothing remains of that class. */
7709 register struct table_elt *elt = sets[i].src_elt;
7711 while (elt && elt->prev_same_value)
7712 elt = elt->prev_same_value;
7714 while (elt && elt->first_same_value == 0)
7715 elt = elt->next_same_value;
7716 sets[i].src_elt = elt ? elt->first_same_value : 0;
7720 /* Now insert the destinations into their equivalence classes. */
7722 for (i = 0; i < n_sets; i++)
7725 register rtx dest = SET_DEST (sets[i].rtl);
7726 rtx inner_dest = sets[i].inner_dest;
7727 register struct table_elt *elt;
7729 /* Don't record value if we are not supposed to risk allocating
7730 floating-point values in registers that might be wider than
7732 if ((flag_float_store
7733 && GET_CODE (dest) == MEM
7734 && FLOAT_MODE_P (GET_MODE (dest)))
7735 /* Don't record BLKmode values, because we don't know the
7736 size of it, and can't be sure that other BLKmode values
7737 have the same or smaller size. */
7738 || GET_MODE (dest) == BLKmode
7739 /* Don't record values of destinations set inside a libcall block
7740 since we might delete the libcall. Things should have been set
7741 up so we won't want to reuse such a value, but we play it safe
7744 /* If we didn't put a REG_EQUAL value or a source into the hash
7745 table, there is no point is recording DEST. */
7746 || sets[i].src_elt == 0
7747 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7748 or SIGN_EXTEND, don't record DEST since it can cause
7749 some tracking to be wrong.
7751 ??? Think about this more later. */
7752 || (GET_CODE (dest) == SUBREG
7753 && (GET_MODE_SIZE (GET_MODE (dest))
7754 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7755 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7756 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7759 /* STRICT_LOW_PART isn't part of the value BEING set,
7760 and neither is the SUBREG inside it.
7761 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7762 if (GET_CODE (dest) == STRICT_LOW_PART)
7763 dest = SUBREG_REG (XEXP (dest, 0));
7765 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7766 /* Registers must also be inserted into chains for quantities. */
7767 if (insert_regs (dest, sets[i].src_elt, 1))
7769 /* If `insert_regs' changes something, the hash code must be
7771 rehash_using_reg (dest);
7772 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7775 if (GET_CODE (inner_dest) == MEM
7776 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7777 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7778 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7779 Consider the case in which the address of the MEM is
7780 passed to a function, which alters the MEM. Then, if we
7781 later use Y instead of the MEM we'll miss the update. */
7782 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7784 elt = insert (dest, sets[i].src_elt,
7785 sets[i].dest_hash, GET_MODE (dest));
7787 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7788 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7789 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7794 /* This implicitly assumes a whole struct
7795 need not have MEM_IN_STRUCT_P.
7796 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7797 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7798 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7801 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7802 narrower than M2, and both M1 and M2 are the same number of words,
7803 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7804 make that equivalence as well.
7806 However, BAR may have equivalences for which gen_lowpart_if_possible
7807 will produce a simpler value than gen_lowpart_if_possible applied to
7808 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7809 BAR's equivalences. If we don't get a simplified form, make
7810 the SUBREG. It will not be used in an equivalence, but will
7811 cause two similar assignments to be detected.
7813 Note the loop below will find SUBREG_REG (DEST) since we have
7814 already entered SRC and DEST of the SET in the table. */
7816 if (GET_CODE (dest) == SUBREG
7817 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7819 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7820 && (GET_MODE_SIZE (GET_MODE (dest))
7821 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7822 && sets[i].src_elt != 0)
7824 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7825 struct table_elt *elt, *classp = 0;
7827 for (elt = sets[i].src_elt->first_same_value; elt;
7828 elt = elt->next_same_value)
7832 struct table_elt *src_elt;
7834 /* Ignore invalid entries. */
7835 if (GET_CODE (elt->exp) != REG
7836 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7839 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7841 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7843 src_hash = HASH (new_src, new_mode);
7844 src_elt = lookup (new_src, src_hash, new_mode);
7846 /* Put the new source in the hash table is if isn't
7850 if (insert_regs (new_src, classp, 0))
7852 rehash_using_reg (new_src);
7853 src_hash = HASH (new_src, new_mode);
7855 src_elt = insert (new_src, classp, src_hash, new_mode);
7856 src_elt->in_memory = elt->in_memory;
7857 src_elt->in_struct = elt->in_struct;
7859 else if (classp && classp != src_elt->first_same_value)
7860 /* Show that two things that we've seen before are
7861 actually the same. */
7862 merge_equiv_classes (src_elt, classp);
7864 classp = src_elt->first_same_value;
7865 /* Ignore invalid entries. */
7867 && GET_CODE (classp->exp) != REG
7868 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7869 classp = classp->next_same_value;
7874 /* Special handling for (set REG0 REG1)
7875 where REG0 is the "cheapest", cheaper than REG1.
7876 After cse, REG1 will probably not be used in the sequel,
7877 so (if easily done) change this insn to (set REG1 REG0) and
7878 replace REG1 with REG0 in the previous insn that computed their value.
7879 Then REG1 will become a dead store and won't cloud the situation
7880 for later optimizations.
7882 Do not make this change if REG1 is a hard register, because it will
7883 then be used in the sequel and we may be changing a two-operand insn
7884 into a three-operand insn.
7886 Also do not do this if we are operating on a copy of INSN.
7888 Also don't do this if INSN ends a libcall; this would cause an unrelated
7889 register to be set in the middle of a libcall, and we then get bad code
7890 if the libcall is deleted. */
7892 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7893 && NEXT_INSN (PREV_INSN (insn)) == insn
7894 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7895 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7896 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7897 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
7898 == REGNO (SET_DEST (sets[0].rtl)))
7899 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
7901 rtx prev = PREV_INSN (insn);
7902 while (prev && GET_CODE (prev) == NOTE)
7903 prev = PREV_INSN (prev);
7905 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7906 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7908 rtx dest = SET_DEST (sets[0].rtl);
7909 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7911 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7912 validate_change (insn, & SET_DEST (sets[0].rtl),
7913 SET_SRC (sets[0].rtl), 1);
7914 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7915 apply_change_group ();
7917 /* If REG1 was equivalent to a constant, REG0 is not. */
7919 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7921 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7922 any REG_WAS_0 note on INSN to PREV. */
7923 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7925 remove_note (prev, note);
7927 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7930 remove_note (insn, note);
7931 XEXP (note, 1) = REG_NOTES (prev);
7932 REG_NOTES (prev) = note;
7935 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7936 then we must delete it, because the value in REG0 has changed. */
7937 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7938 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7939 remove_note (insn, note);
7943 /* If this is a conditional jump insn, record any known equivalences due to
7944 the condition being tested. */
7946 last_jump_equiv_class = 0;
7947 if (GET_CODE (insn) == JUMP_INSN
7948 && n_sets == 1 && GET_CODE (x) == SET
7949 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7950 record_jump_equiv (insn, 0);
7953 /* If the previous insn set CC0 and this insn no longer references CC0,
7954 delete the previous insn. Here we use the fact that nothing expects CC0
7955 to be valid over an insn, which is true until the final pass. */
7956 if (prev_insn && GET_CODE (prev_insn) == INSN
7957 && (tem = single_set (prev_insn)) != 0
7958 && SET_DEST (tem) == cc0_rtx
7959 && ! reg_mentioned_p (cc0_rtx, x))
7961 PUT_CODE (prev_insn, NOTE);
7962 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7963 NOTE_SOURCE_FILE (prev_insn) = 0;
7966 prev_insn_cc0 = this_insn_cc0;
7967 prev_insn_cc0_mode = this_insn_cc0_mode;
7973 /* Remove from the hash table all expressions that reference memory. */
7975 invalidate_memory ()
7978 register struct table_elt *p, *next;
7980 for (i = 0; i < NBUCKETS; i++)
7981 for (p = table[i]; p; p = next)
7983 next = p->next_same_hash;
7985 remove_from_table (p, i);
7989 /* XXX ??? The name of this function bears little resemblance to
7990 what this function actually does. FIXME. */
7992 note_mem_written (addr)
7995 /* Pushing or popping the stack invalidates just the stack pointer. */
7996 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7997 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7998 && GET_CODE (XEXP (addr, 0)) == REG
7999 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
8001 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
8002 REG_TICK (STACK_POINTER_REGNUM)++;
8004 /* This should be *very* rare. */
8005 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
8006 invalidate (stack_pointer_rtx, VOIDmode);
8012 /* Perform invalidation on the basis of everything about an insn
8013 except for invalidating the actual places that are SET in it.
8014 This includes the places CLOBBERed, and anything that might
8015 alias with something that is SET or CLOBBERed.
8017 X is the pattern of the insn. */
8020 invalidate_from_clobbers (x)
8023 if (GET_CODE (x) == CLOBBER)
8025 rtx ref = XEXP (x, 0);
8028 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8029 || GET_CODE (ref) == MEM)
8030 invalidate (ref, VOIDmode);
8031 else if (GET_CODE (ref) == STRICT_LOW_PART
8032 || GET_CODE (ref) == ZERO_EXTRACT)
8033 invalidate (XEXP (ref, 0), GET_MODE (ref));
8036 else if (GET_CODE (x) == PARALLEL)
8039 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
8041 register rtx y = XVECEXP (x, 0, i);
8042 if (GET_CODE (y) == CLOBBER)
8044 rtx ref = XEXP (y, 0);
8045 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8046 || GET_CODE (ref) == MEM)
8047 invalidate (ref, VOIDmode);
8048 else if (GET_CODE (ref) == STRICT_LOW_PART
8049 || GET_CODE (ref) == ZERO_EXTRACT)
8050 invalidate (XEXP (ref, 0), GET_MODE (ref));
8056 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
8057 and replace any registers in them with either an equivalent constant
8058 or the canonical form of the register. If we are inside an address,
8059 only do this if the address remains valid.
8061 OBJECT is 0 except when within a MEM in which case it is the MEM.
8063 Return the replacement for X. */
8066 cse_process_notes (x, object)
8070 enum rtx_code code = GET_CODE (x);
8071 char *fmt = GET_RTX_FORMAT (code);
8087 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
8092 if (REG_NOTE_KIND (x) == REG_EQUAL)
8093 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
8095 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
8102 rtx new = cse_process_notes (XEXP (x, 0), object);
8103 /* We don't substitute VOIDmode constants into these rtx,
8104 since they would impede folding. */
8105 if (GET_MODE (new) != VOIDmode)
8106 validate_change (object, &XEXP (x, 0), new, 0);
8111 i = REG_QTY (REGNO (x));
8113 /* Return a constant or a constant register. */
8114 if (REGNO_QTY_VALID_P (REGNO (x))
8115 && qty_const[i] != 0
8116 && (CONSTANT_P (qty_const[i])
8117 || GET_CODE (qty_const[i]) == REG))
8119 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
8124 /* Otherwise, canonicalize this register. */
8125 return canon_reg (x, NULL_RTX);
8131 for (i = 0; i < GET_RTX_LENGTH (code); i++)
8133 validate_change (object, &XEXP (x, i),
8134 cse_process_notes (XEXP (x, i), object), 0);
8139 /* Find common subexpressions between the end test of a loop and the beginning
8140 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8142 Often we have a loop where an expression in the exit test is used
8143 in the body of the loop. For example "while (*p) *q++ = *p++;".
8144 Because of the way we duplicate the loop exit test in front of the loop,
8145 however, we don't detect that common subexpression. This will be caught
8146 when global cse is implemented, but this is a quite common case.
8148 This function handles the most common cases of these common expressions.
8149 It is called after we have processed the basic block ending with the
8150 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8151 jumps to a label used only once. */
8154 cse_around_loop (loop_start)
8159 struct table_elt *p;
8161 /* If the jump at the end of the loop doesn't go to the start, we don't
8163 for (insn = PREV_INSN (loop_start);
8164 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
8165 insn = PREV_INSN (insn))
8169 || GET_CODE (insn) != NOTE
8170 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
8173 /* If the last insn of the loop (the end test) was an NE comparison,
8174 we will interpret it as an EQ comparison, since we fell through
8175 the loop. Any equivalences resulting from that comparison are
8176 therefore not valid and must be invalidated. */
8177 if (last_jump_equiv_class)
8178 for (p = last_jump_equiv_class->first_same_value; p;
8179 p = p->next_same_value)
8181 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
8182 || (GET_CODE (p->exp) == SUBREG
8183 && GET_CODE (SUBREG_REG (p->exp)) == REG))
8184 invalidate (p->exp, VOIDmode);
8185 else if (GET_CODE (p->exp) == STRICT_LOW_PART
8186 || GET_CODE (p->exp) == ZERO_EXTRACT)
8187 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
8190 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8191 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8193 The only thing we do with SET_DEST is invalidate entries, so we
8194 can safely process each SET in order. It is slightly less efficient
8195 to do so, but we only want to handle the most common cases.
8197 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8198 These pseudos won't have valid entries in any of the tables indexed
8199 by register number, such as reg_qty. We avoid out-of-range array
8200 accesses by not processing any instructions created after cse started. */
8202 for (insn = NEXT_INSN (loop_start);
8203 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
8204 && INSN_UID (insn) < max_insn_uid
8205 && ! (GET_CODE (insn) == NOTE
8206 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
8207 insn = NEXT_INSN (insn))
8209 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8210 && (GET_CODE (PATTERN (insn)) == SET
8211 || GET_CODE (PATTERN (insn)) == CLOBBER))
8212 cse_set_around_loop (PATTERN (insn), insn, loop_start);
8213 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8214 && GET_CODE (PATTERN (insn)) == PARALLEL)
8215 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8216 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
8217 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
8218 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
8223 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8224 since they are done elsewhere. This function is called via note_stores. */
8227 invalidate_skipped_set (dest, set)
8231 enum rtx_code code = GET_CODE (dest);
8234 && ! note_mem_written (dest) /* If this is not a stack push ... */
8235 /* There are times when an address can appear varying and be a PLUS
8236 during this scan when it would be a fixed address were we to know
8237 the proper equivalences. So invalidate all memory if there is
8238 a BLKmode or nonscalar memory reference or a reference to a
8239 variable address. */
8240 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
8241 || cse_rtx_varies_p (XEXP (dest, 0))))
8243 invalidate_memory ();
8247 if (GET_CODE (set) == CLOBBER
8254 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
8255 invalidate (XEXP (dest, 0), GET_MODE (dest));
8256 else if (code == REG || code == SUBREG || code == MEM)
8257 invalidate (dest, VOIDmode);
8260 /* Invalidate all insns from START up to the end of the function or the
8261 next label. This called when we wish to CSE around a block that is
8262 conditionally executed. */
8265 invalidate_skipped_block (start)
8270 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
8271 insn = NEXT_INSN (insn))
8273 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
8276 if (GET_CODE (insn) == CALL_INSN)
8278 if (! CONST_CALL_P (insn))
8279 invalidate_memory ();
8280 invalidate_for_call ();
8283 invalidate_from_clobbers (PATTERN (insn));
8284 note_stores (PATTERN (insn), invalidate_skipped_set);
8288 /* Used for communication between the following two routines; contains a
8289 value to be checked for modification. */
8291 static rtx cse_check_loop_start_value;
8293 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8294 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8297 cse_check_loop_start (x, set)
8299 rtx set ATTRIBUTE_UNUSED;
8301 if (cse_check_loop_start_value == 0
8302 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8305 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8306 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8307 cse_check_loop_start_value = 0;
8310 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8311 a loop that starts with the label at LOOP_START.
8313 If X is a SET, we see if its SET_SRC is currently in our hash table.
8314 If so, we see if it has a value equal to some register used only in the
8315 loop exit code (as marked by jump.c).
8317 If those two conditions are true, we search backwards from the start of
8318 the loop to see if that same value was loaded into a register that still
8319 retains its value at the start of the loop.
8321 If so, we insert an insn after the load to copy the destination of that
8322 load into the equivalent register and (try to) replace our SET_SRC with that
8325 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8328 cse_set_around_loop (x, insn, loop_start)
8333 struct table_elt *src_elt;
8335 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8336 are setting PC or CC0 or whose SET_SRC is already a register. */
8337 if (GET_CODE (x) == SET
8338 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8339 && GET_CODE (SET_SRC (x)) != REG)
8341 src_elt = lookup (SET_SRC (x),
8342 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8343 GET_MODE (SET_DEST (x)));
8346 for (src_elt = src_elt->first_same_value; src_elt;
8347 src_elt = src_elt->next_same_value)
8348 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8349 && COST (src_elt->exp) < COST (SET_SRC (x)))
8353 /* Look for an insn in front of LOOP_START that sets
8354 something in the desired mode to SET_SRC (x) before we hit
8355 a label or CALL_INSN. */
8357 for (p = prev_nonnote_insn (loop_start);
8358 p && GET_CODE (p) != CALL_INSN
8359 && GET_CODE (p) != CODE_LABEL;
8360 p = prev_nonnote_insn (p))
8361 if ((set = single_set (p)) != 0
8362 && GET_CODE (SET_DEST (set)) == REG
8363 && GET_MODE (SET_DEST (set)) == src_elt->mode
8364 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8366 /* We now have to ensure that nothing between P
8367 and LOOP_START modified anything referenced in
8368 SET_SRC (x). We know that nothing within the loop
8369 can modify it, or we would have invalidated it in
8373 cse_check_loop_start_value = SET_SRC (x);
8374 for (q = p; q != loop_start; q = NEXT_INSN (q))
8375 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8376 note_stores (PATTERN (q), cse_check_loop_start);
8378 /* If nothing was changed and we can replace our
8379 SET_SRC, add an insn after P to copy its destination
8380 to what we will be replacing SET_SRC with. */
8381 if (cse_check_loop_start_value
8382 && validate_change (insn, &SET_SRC (x),
8385 /* If this creates new pseudos, this is unsafe,
8386 because the regno of new pseudo is unsuitable
8387 to index into reg_qty when cse_insn processes
8388 the new insn. Therefore, if a new pseudo was
8389 created, discard this optimization. */
8390 int nregs = max_reg_num ();
8392 = gen_move_insn (src_elt->exp, SET_DEST (set));
8393 if (nregs != max_reg_num ())
8395 if (! validate_change (insn, &SET_SRC (x),
8400 emit_insn_after (move, p);
8407 /* Now invalidate anything modified by X. */
8408 note_mem_written (SET_DEST (x));
8410 /* See comment on similar code in cse_insn for explanation of these tests. */
8411 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8412 || GET_CODE (SET_DEST (x)) == MEM)
8413 invalidate (SET_DEST (x), VOIDmode);
8414 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8415 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8416 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8419 /* Find the end of INSN's basic block and return its range,
8420 the total number of SETs in all the insns of the block, the last insn of the
8421 block, and the branch path.
8423 The branch path indicates which branches should be followed. If a non-zero
8424 path size is specified, the block should be rescanned and a different set
8425 of branches will be taken. The branch path is only used if
8426 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8428 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8429 used to describe the block. It is filled in with the information about
8430 the current block. The incoming structure's branch path, if any, is used
8431 to construct the output branch path. */
8434 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8436 struct cse_basic_block_data *data;
8443 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8444 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8445 int path_size = data->path_size;
8449 /* Update the previous branch path, if any. If the last branch was
8450 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8451 shorten the path by one and look at the previous branch. We know that
8452 at least one branch must have been taken if PATH_SIZE is non-zero. */
8453 while (path_size > 0)
8455 if (data->path[path_size - 1].status != NOT_TAKEN)
8457 data->path[path_size - 1].status = NOT_TAKEN;
8464 /* Scan to end of this basic block. */
8465 while (p && GET_CODE (p) != CODE_LABEL)
8467 /* Don't cse out the end of a loop. This makes a difference
8468 only for the unusual loops that always execute at least once;
8469 all other loops have labels there so we will stop in any case.
8470 Cse'ing out the end of the loop is dangerous because it
8471 might cause an invariant expression inside the loop
8472 to be reused after the end of the loop. This would make it
8473 hard to move the expression out of the loop in loop.c,
8474 especially if it is one of several equivalent expressions
8475 and loop.c would like to eliminate it.
8477 If we are running after loop.c has finished, we can ignore
8478 the NOTE_INSN_LOOP_END. */
8480 if (! after_loop && GET_CODE (p) == NOTE
8481 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8484 /* Don't cse over a call to setjmp; on some machines (eg vax)
8485 the regs restored by the longjmp come from
8486 a later time than the setjmp. */
8487 if (GET_CODE (p) == NOTE
8488 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8491 /* A PARALLEL can have lots of SETs in it,
8492 especially if it is really an ASM_OPERANDS. */
8493 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8494 && GET_CODE (PATTERN (p)) == PARALLEL)
8495 nsets += XVECLEN (PATTERN (p), 0);
8496 else if (GET_CODE (p) != NOTE)
8499 /* Ignore insns made by CSE; they cannot affect the boundaries of
8502 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8503 high_cuid = INSN_CUID (p);
8504 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8505 low_cuid = INSN_CUID (p);
8507 /* See if this insn is in our branch path. If it is and we are to
8509 if (path_entry < path_size && data->path[path_entry].branch == p)
8511 if (data->path[path_entry].status != NOT_TAKEN)
8514 /* Point to next entry in path, if any. */
8518 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8519 was specified, we haven't reached our maximum path length, there are
8520 insns following the target of the jump, this is the only use of the
8521 jump label, and the target label is preceded by a BARRIER.
8523 Alternatively, we can follow the jump if it branches around a
8524 block of code and there are no other branches into the block.
8525 In this case invalidate_skipped_block will be called to invalidate any
8526 registers set in the block when following the jump. */
8528 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8529 && GET_CODE (p) == JUMP_INSN
8530 && GET_CODE (PATTERN (p)) == SET
8531 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8532 && JUMP_LABEL (p) != 0
8533 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8534 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8536 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8537 if ((GET_CODE (q) != NOTE
8538 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8539 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8540 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8543 /* If we ran into a BARRIER, this code is an extension of the
8544 basic block when the branch is taken. */
8545 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8547 /* Don't allow ourself to keep walking around an
8548 always-executed loop. */
8549 if (next_real_insn (q) == next)
8555 /* Similarly, don't put a branch in our path more than once. */
8556 for (i = 0; i < path_entry; i++)
8557 if (data->path[i].branch == p)
8560 if (i != path_entry)
8563 data->path[path_entry].branch = p;
8564 data->path[path_entry++].status = TAKEN;
8566 /* This branch now ends our path. It was possible that we
8567 didn't see this branch the last time around (when the
8568 insn in front of the target was a JUMP_INSN that was
8569 turned into a no-op). */
8570 path_size = path_entry;
8573 /* Mark block so we won't scan it again later. */
8574 PUT_MODE (NEXT_INSN (p), QImode);
8576 /* Detect a branch around a block of code. */
8577 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8581 if (next_real_insn (q) == next)
8587 for (i = 0; i < path_entry; i++)
8588 if (data->path[i].branch == p)
8591 if (i != path_entry)
8594 /* This is no_labels_between_p (p, q) with an added check for
8595 reaching the end of a function (in case Q precedes P). */
8596 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8597 if (GET_CODE (tmp) == CODE_LABEL)
8602 data->path[path_entry].branch = p;
8603 data->path[path_entry++].status = AROUND;
8605 path_size = path_entry;
8608 /* Mark block so we won't scan it again later. */
8609 PUT_MODE (NEXT_INSN (p), QImode);
8616 data->low_cuid = low_cuid;
8617 data->high_cuid = high_cuid;
8618 data->nsets = nsets;
8621 /* If all jumps in the path are not taken, set our path length to zero
8622 so a rescan won't be done. */
8623 for (i = path_size - 1; i >= 0; i--)
8624 if (data->path[i].status != NOT_TAKEN)
8628 data->path_size = 0;
8630 data->path_size = path_size;
8632 /* End the current branch path. */
8633 data->path[path_size].branch = 0;
8636 /* Perform cse on the instructions of a function.
8637 F is the first instruction.
8638 NREGS is one plus the highest pseudo-reg number used in the instruction.
8640 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8641 (only if -frerun-cse-after-loop).
8643 Returns 1 if jump_optimize should be redone due to simplifications
8644 in conditional jump instructions. */
8647 cse_main (f, nregs, after_loop, file)
8653 struct cse_basic_block_data val;
8654 register rtx insn = f;
8657 cse_jumps_altered = 0;
8658 recorded_label_ref = 0;
8659 constant_pool_entries_cost = 0;
8663 init_alias_analysis ();
8667 max_insn_uid = get_max_uid ();
8669 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8670 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8672 #ifdef LOAD_EXTEND_OP
8674 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8675 and change the code and mode as appropriate. */
8676 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8679 /* Discard all the free elements of the previous function
8680 since they are allocated in the temporarily obstack. */
8681 bzero ((char *) table, sizeof table);
8682 free_element_chain = 0;
8683 n_elements_made = 0;
8685 /* Find the largest uid. */
8687 max_uid = get_max_uid ();
8688 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8689 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8691 /* Compute the mapping from uids to cuids.
8692 CUIDs are numbers assigned to insns, like uids,
8693 except that cuids increase monotonically through the code.
8694 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8695 between two insns is not affected by -g. */
8697 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8699 if (GET_CODE (insn) != NOTE
8700 || NOTE_LINE_NUMBER (insn) < 0)
8701 INSN_CUID (insn) = ++i;
8703 /* Give a line number note the same cuid as preceding insn. */
8704 INSN_CUID (insn) = i;
8707 /* Initialize which registers are clobbered by calls. */
8709 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8711 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8712 if ((call_used_regs[i]
8713 /* Used to check !fixed_regs[i] here, but that isn't safe;
8714 fixed regs are still call-clobbered, and sched can get
8715 confused if they can "live across calls".
8717 The frame pointer is always preserved across calls. The arg
8718 pointer is if it is fixed. The stack pointer usually is, unless
8719 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8720 will be present. If we are generating PIC code, the PIC offset
8721 table register is preserved across calls. */
8723 && i != STACK_POINTER_REGNUM
8724 && i != FRAME_POINTER_REGNUM
8725 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8726 && i != HARD_FRAME_POINTER_REGNUM
8728 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8729 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8731 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8732 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8736 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8738 /* Loop over basic blocks.
8739 Compute the maximum number of qty's needed for each basic block
8740 (which is 2 for each SET). */
8744 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8745 flag_cse_skip_blocks);
8747 /* If this basic block was already processed or has no sets, skip it. */
8748 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8750 PUT_MODE (insn, VOIDmode);
8751 insn = (val.last ? NEXT_INSN (val.last) : 0);
8756 cse_basic_block_start = val.low_cuid;
8757 cse_basic_block_end = val.high_cuid;
8758 max_qty = val.nsets * 2;
8761 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
8762 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8765 /* Make MAX_QTY bigger to give us room to optimize
8766 past the end of this basic block, if that should prove useful. */
8772 /* If this basic block is being extended by following certain jumps,
8773 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8774 Otherwise, we start after this basic block. */
8775 if (val.path_size > 0)
8776 cse_basic_block (insn, val.last, val.path, 0);
8779 int old_cse_jumps_altered = cse_jumps_altered;
8782 /* When cse changes a conditional jump to an unconditional
8783 jump, we want to reprocess the block, since it will give
8784 us a new branch path to investigate. */
8785 cse_jumps_altered = 0;
8786 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8787 if (cse_jumps_altered == 0
8788 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8791 cse_jumps_altered |= old_cse_jumps_altered;
8799 /* Tell refers_to_mem_p that qty_const info is not available. */
8802 if (max_elements_made < n_elements_made)
8803 max_elements_made = n_elements_made;
8805 return cse_jumps_altered || recorded_label_ref;
8808 /* Process a single basic block. FROM and TO and the limits of the basic
8809 block. NEXT_BRANCH points to the branch path when following jumps or
8810 a null path when not following jumps.
8812 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8813 loop. This is true when we are being called for the last time on a
8814 block and this CSE pass is before loop.c. */
8817 cse_basic_block (from, to, next_branch, around_loop)
8818 register rtx from, to;
8819 struct branch_path *next_branch;
8824 rtx libcall_insn = NULL_RTX;
8827 /* Each of these arrays is undefined before max_reg, so only allocate
8828 the space actually needed and adjust the start below. */
8830 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8831 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8832 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8833 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8834 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8836 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8837 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8838 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8840 qty_first_reg -= max_reg;
8841 qty_last_reg -= max_reg;
8842 qty_mode -= max_reg;
8843 qty_const -= max_reg;
8844 qty_const_insn -= max_reg;
8845 qty_comparison_code -= max_reg;
8846 qty_comparison_qty -= max_reg;
8847 qty_comparison_const -= max_reg;
8851 /* TO might be a label. If so, protect it from being deleted. */
8852 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8855 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8857 register enum rtx_code code = GET_CODE (insn);
8859 struct table_elt *p;
8861 /* If we have processed 1,000 insns, flush the hash table to
8862 avoid extreme quadratic behavior. We must not include NOTEs
8863 in the count since there may be more or them when generating
8864 debugging information. If we clear the table at different
8865 times, code generated with -g -O might be different than code
8866 generated with -O but not -g.
8868 ??? This is a real kludge and needs to be done some other way.
8870 if (code != NOTE && num_insns++ > 1000)
8872 for (i = 0; i < NBUCKETS; i++)
8873 for (p = table[i]; p; p = table[i])
8875 /* Note that invalidate can remove elements
8876 after P in the current hash chain. */
8877 if (GET_CODE (p->exp) == REG)
8878 invalidate (p->exp, p->mode);
8880 remove_from_table (p, i);
8886 /* See if this is a branch that is part of the path. If so, and it is
8887 to be taken, do so. */
8888 if (next_branch->branch == insn)
8890 enum taken status = next_branch++->status;
8891 if (status != NOT_TAKEN)
8893 if (status == TAKEN)
8894 record_jump_equiv (insn, 1);
8896 invalidate_skipped_block (NEXT_INSN (insn));
8898 /* Set the last insn as the jump insn; it doesn't affect cc0.
8899 Then follow this branch. */
8904 insn = JUMP_LABEL (insn);
8909 if (GET_MODE (insn) == QImode)
8910 PUT_MODE (insn, VOIDmode);
8912 if (GET_RTX_CLASS (code) == 'i')
8916 /* Process notes first so we have all notes in canonical forms when
8917 looking for duplicate operations. */
8919 if (REG_NOTES (insn))
8920 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8922 /* Track when we are inside in LIBCALL block. Inside such a block,
8923 we do not want to record destinations. The last insn of a
8924 LIBCALL block is not considered to be part of the block, since
8925 its destination is the result of the block and hence should be
8928 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
8929 libcall_insn = XEXP (p, 0);
8930 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8931 libcall_insn = NULL_RTX;
8933 cse_insn (insn, libcall_insn);
8936 /* If INSN is now an unconditional jump, skip to the end of our
8937 basic block by pretending that we just did the last insn in the
8938 basic block. If we are jumping to the end of our block, show
8939 that we can have one usage of TO. */
8941 if (simplejump_p (insn))
8946 if (JUMP_LABEL (insn) == to)
8949 /* Maybe TO was deleted because the jump is unconditional.
8950 If so, there is nothing left in this basic block. */
8951 /* ??? Perhaps it would be smarter to set TO
8952 to whatever follows this insn,
8953 and pretend the basic block had always ended here. */
8954 if (INSN_DELETED_P (to))
8957 insn = PREV_INSN (to);
8960 /* See if it is ok to keep on going past the label
8961 which used to end our basic block. Remember that we incremented
8962 the count of that label, so we decrement it here. If we made
8963 a jump unconditional, TO_USAGE will be one; in that case, we don't
8964 want to count the use in that jump. */
8966 if (to != 0 && NEXT_INSN (insn) == to
8967 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8969 struct cse_basic_block_data val;
8972 insn = NEXT_INSN (to);
8974 if (LABEL_NUSES (to) == 0)
8975 insn = delete_insn (to);
8977 /* If TO was the last insn in the function, we are done. */
8981 /* If TO was preceded by a BARRIER we are done with this block
8982 because it has no continuation. */
8983 prev = prev_nonnote_insn (to);
8984 if (prev && GET_CODE (prev) == BARRIER)
8987 /* Find the end of the following block. Note that we won't be
8988 following branches in this case. */
8991 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8993 /* If the tables we allocated have enough space left
8994 to handle all the SETs in the next basic block,
8995 continue through it. Otherwise, return,
8996 and that block will be scanned individually. */
8997 if (val.nsets * 2 + next_qty > max_qty)
9000 cse_basic_block_start = val.low_cuid;
9001 cse_basic_block_end = val.high_cuid;
9004 /* Prevent TO from being deleted if it is a label. */
9005 if (to != 0 && GET_CODE (to) == CODE_LABEL)
9008 /* Back up so we process the first insn in the extension. */
9009 insn = PREV_INSN (insn);
9013 if (next_qty > max_qty)
9016 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
9017 the previous insn is the only insn that branches to the head of a loop,
9018 we can cse into the loop. Don't do this if we changed the jump
9019 structure of a loop unless we aren't going to be following jumps. */
9021 if ((cse_jumps_altered == 0
9022 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
9023 && around_loop && to != 0
9024 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
9025 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
9026 && JUMP_LABEL (PREV_INSN (to)) != 0
9027 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
9028 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
9030 return to ? NEXT_INSN (to) : 0;
9033 /* Count the number of times registers are used (not set) in X.
9034 COUNTS is an array in which we accumulate the count, INCR is how much
9035 we count each register usage.
9037 Don't count a usage of DEST, which is the SET_DEST of a SET which
9038 contains X in its SET_SRC. This is because such a SET does not
9039 modify the liveness of DEST. */
9042 count_reg_usage (x, counts, dest, incr)
9055 switch (code = GET_CODE (x))
9059 counts[REGNO (x)] += incr;
9072 /* If we are clobbering a MEM, mark any registers inside the address
9074 if (GET_CODE (XEXP (x, 0)) == MEM)
9075 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
9079 /* Unless we are setting a REG, count everything in SET_DEST. */
9080 if (GET_CODE (SET_DEST (x)) != REG)
9081 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
9083 /* If SRC has side-effects, then we can't delete this insn, so the
9084 usage of SET_DEST inside SRC counts.
9086 ??? Strictly-speaking, we might be preserving this insn
9087 because some other SET has side-effects, but that's hard
9088 to do and can't happen now. */
9089 count_reg_usage (SET_SRC (x), counts,
9090 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
9095 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
9097 /* ... falls through ... */
9100 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
9102 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9105 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
9110 if (REG_NOTE_KIND (x) == REG_EQUAL
9111 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
9112 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
9113 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
9120 fmt = GET_RTX_FORMAT (code);
9121 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9124 count_reg_usage (XEXP (x, i), counts, dest, incr);
9125 else if (fmt[i] == 'E')
9126 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9127 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
9131 /* Scan all the insns and delete any that are dead; i.e., they store a register
9132 that is never used or they copy a register to itself.
9134 This is used to remove insns made obviously dead by cse, loop or other
9135 optimizations. It improves the heuristics in loop since it won't try to
9136 move dead invariants out of loops or make givs for dead quantities. The
9137 remaining passes of the compilation are also sped up. */
9140 delete_trivially_dead_insns (insns, nreg)
9144 int *counts = (int *) alloca (nreg * sizeof (int));
9150 int in_libcall = 0, dead_libcall = 0;
9152 /* First count the number of times each register is used. */
9153 bzero ((char *) counts, sizeof (int) * nreg);
9154 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9155 count_reg_usage (insn, counts, NULL_RTX, 1);
9157 /* Go from the last insn to the first and delete insns that only set unused
9158 registers or copy a register to itself. As we delete an insn, remove
9159 usage counts for registers it uses. */
9160 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
9165 prev = prev_real_insn (insn);
9167 /* Don't delete any insns that are part of a libcall block unless
9168 we can delete the whole libcall block.
9170 Flow or loop might get confused if we did that. Remember
9171 that we are scanning backwards. */
9172 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9178 /* See if there's a REG_EQUAL note on this insn and try to
9179 replace the source with the REG_EQUAL expression.
9181 We assume that insns with REG_RETVALs can only be reg->reg
9182 copies at this point. */
9183 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
9186 rtx set = single_set (insn);
9188 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
9191 find_reg_note (insn, REG_RETVAL, NULL_RTX));
9196 else if (in_libcall)
9197 live_insn = ! dead_libcall;
9198 else if (GET_CODE (PATTERN (insn)) == SET)
9200 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
9201 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
9205 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
9206 && ! side_effects_p (SET_SRC (PATTERN (insn)))
9207 && ((tem = next_nonnote_insn (insn)) == 0
9208 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9209 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9212 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
9213 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
9214 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
9215 || side_effects_p (SET_SRC (PATTERN (insn))))
9218 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9219 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9221 rtx elt = XVECEXP (PATTERN (insn), 0, i);
9223 if (GET_CODE (elt) == SET)
9225 if (GET_CODE (SET_DEST (elt)) == REG
9226 && SET_DEST (elt) == SET_SRC (elt))
9230 else if (GET_CODE (SET_DEST (elt)) == CC0
9231 && ! side_effects_p (SET_SRC (elt))
9232 && ((tem = next_nonnote_insn (insn)) == 0
9233 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9234 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9237 else if (GET_CODE (SET_DEST (elt)) != REG
9238 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
9239 || counts[REGNO (SET_DEST (elt))] != 0
9240 || side_effects_p (SET_SRC (elt)))
9243 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
9249 /* If this is a dead insn, delete it and show registers in it aren't
9254 count_reg_usage (insn, counts, NULL_RTX, -1);
9258 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))