1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
30 #include "hard-reg-set.h"
33 #include "insn-config.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and several vectors together
59 with "quantity numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
85 variables should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. `qty_first_reg', `qty_last_reg',
89 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with `qty_mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate element of qty_const. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate element
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and `qty_first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
203 /* One plus largest instruction UID used in this function at time of
206 static int max_insn_uid;
208 /* Length of vectors indexed by quantity number.
209 We know in advance we will not need a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Indexed by quantity number, gives the first (or last) register
219 in the chain of registers that currently contain this quantity. */
221 static int *qty_first_reg;
222 static int *qty_last_reg;
224 /* Index by quantity number, gives the mode of the quantity. */
226 static enum machine_mode *qty_mode;
228 /* Indexed by quantity number, gives the rtx of the constant value of the
229 quantity, or zero if it does not have a known value.
230 A sum of the frame pointer (or arg pointer) plus a constant
231 can also be entered here. */
233 static rtx *qty_const;
235 /* Indexed by qty number, gives the insn that stored the constant value
236 recorded in `qty_const'. */
238 static rtx *qty_const_insn;
240 /* The next three variables are used to track when a comparison between a
241 quantity and some constant or register has been passed. In that case, we
242 know the results of the comparison in case we see it again. These variables
243 record a comparison that is known to be true. */
245 /* Indexed by qty number, gives the rtx code of a comparison with a known
246 result involving this quantity. If none, it is UNKNOWN. */
247 static enum rtx_code *qty_comparison_code;
249 /* Indexed by qty number, gives the constant being compared against in a
250 comparison of known result. If no such comparison, it is undefined.
251 If the comparison is not with a constant, it is zero. */
253 static rtx *qty_comparison_const;
255 /* Indexed by qty number, gives the quantity being compared against in a
256 comparison of known result. If no such comparison, if it undefined.
257 If the comparison is not with a register, it is -1. */
259 static int *qty_comparison_qty;
262 /* For machines that have a CC0, we do not record its value in the hash
263 table since its use is guaranteed to be the insn immediately following
264 its definition and any other insn is presumed to invalidate it.
266 Instead, we store below the value last assigned to CC0. If it should
267 happen to be a constant, it is stored in preference to the actual
268 assigned value. In case it is a constant, we store the mode in which
269 the constant should be interpreted. */
271 static rtx prev_insn_cc0;
272 static enum machine_mode prev_insn_cc0_mode;
275 /* Previous actual insn. 0 if at first insn of basic block. */
277 static rtx prev_insn;
279 /* Insn being scanned. */
281 static rtx this_insn;
283 /* Index by register number, gives the number of the next (or
284 previous) register in the chain of registers sharing the same
287 Or -1 if this register is at the end of the chain.
289 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
291 static int *reg_next_eqv;
292 static int *reg_prev_eqv;
296 /* The number of times the register has been altered in the current
300 /* The next cse_reg_info structure in the free or used list. */
301 struct cse_reg_info *next;
303 /* The REG_TICK value at which rtx's containing this register are
304 valid in the hash table. If this does not equal the current
305 reg_tick value, such expressions existing in the hash table are
309 /* The quantity number of the register's current contents. */
316 /* A free list of cse_reg_info entries. */
317 static struct cse_reg_info *cse_reg_info_free_list;
319 /* A used list of cse_reg_info entries. */
320 static struct cse_reg_info *cse_reg_info_used_list;
321 static struct cse_reg_info *cse_reg_info_used_list_end;
323 /* A mapping from registers to cse_reg_info data structures. */
324 static hash_table_t cse_reg_info_tree;
326 /* The last lookup we did into the cse_reg_info_tree. This allows us
327 to cache repeated lookups. */
328 static int cached_regno;
329 static struct cse_reg_info *cached_cse_reg_info;
331 /* A HARD_REG_SET containing all the hard registers for which there is
332 currently a REG expression in the hash table. Note the difference
333 from the above variables, which indicate if the REG is mentioned in some
334 expression in the table. */
336 static HARD_REG_SET hard_regs_in_table;
338 /* A HARD_REG_SET containing all the hard registers that are invalidated
341 static HARD_REG_SET regs_invalidated_by_call;
343 /* CUID of insn that starts the basic block currently being cse-processed. */
345 static int cse_basic_block_start;
347 /* CUID of insn that ends the basic block currently being cse-processed. */
349 static int cse_basic_block_end;
351 /* Vector mapping INSN_UIDs to cuids.
352 The cuids are like uids but increase monotonically always.
353 We use them to see whether a reg is used outside a given basic block. */
355 static int *uid_cuid;
357 /* Highest UID in UID_CUID. */
360 /* Get the cuid of an insn. */
362 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
364 /* Nonzero if cse has altered conditional jump insns
365 in such a way that jump optimization should be redone. */
367 static int cse_jumps_altered;
369 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
370 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
371 to put in the note. */
372 static int recorded_label_ref;
374 /* canon_hash stores 1 in do_not_record
375 if it notices a reference to CC0, PC, or some other volatile
378 static int do_not_record;
380 #ifdef LOAD_EXTEND_OP
382 /* Scratch rtl used when looking for load-extended copy of a MEM. */
383 static rtx memory_extend_rtx;
386 /* canon_hash stores 1 in hash_arg_in_memory
387 if it notices a reference to memory within the expression being hashed. */
389 static int hash_arg_in_memory;
391 /* canon_hash stores 1 in hash_arg_in_struct
392 if it notices a reference to memory that's part of a structure. */
394 static int hash_arg_in_struct;
396 /* The hash table contains buckets which are chains of `struct table_elt's,
397 each recording one expression's information.
398 That expression is in the `exp' field.
400 Those elements with the same hash code are chained in both directions
401 through the `next_same_hash' and `prev_same_hash' fields.
403 Each set of expressions with equivalent values
404 are on a two-way chain through the `next_same_value'
405 and `prev_same_value' fields, and all point with
406 the `first_same_value' field at the first element in
407 that chain. The chain is in order of increasing cost.
408 Each element's cost value is in its `cost' field.
410 The `in_memory' field is nonzero for elements that
411 involve any reference to memory. These elements are removed
412 whenever a write is done to an unidentified location in memory.
413 To be safe, we assume that a memory address is unidentified unless
414 the address is either a symbol constant or a constant plus
415 the frame pointer or argument pointer.
417 The `in_struct' field is nonzero for elements that
418 involve any reference to memory inside a structure or array.
420 The `related_value' field is used to connect related expressions
421 (that differ by adding an integer).
422 The related expressions are chained in a circular fashion.
423 `related_value' is zero for expressions for which this
426 The `cost' field stores the cost of this element's expression.
428 The `is_const' flag is set if the element is a constant (including
431 The `flag' field is used as a temporary during some search routines.
433 The `mode' field is usually the same as GET_MODE (`exp'), but
434 if `exp' is a CONST_INT and has no machine mode then the `mode'
435 field is the mode it was being used as. Each constant is
436 recorded separately for each mode it is used with. */
442 struct table_elt *next_same_hash;
443 struct table_elt *prev_same_hash;
444 struct table_elt *next_same_value;
445 struct table_elt *prev_same_value;
446 struct table_elt *first_same_value;
447 struct table_elt *related_value;
449 enum machine_mode mode;
456 /* We don't want a lot of buckets, because we rarely have very many
457 things stored in the hash table, and a lot of buckets slows
458 down a lot of loops that happen frequently. */
461 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
462 register (hard registers may require `do_not_record' to be set). */
465 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
466 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
467 : canon_hash (X, M) % NBUCKETS)
469 /* Determine whether register number N is considered a fixed register for CSE.
470 It is desirable to replace other regs with fixed regs, to reduce need for
472 A reg wins if it is either the frame pointer or designated as fixed,
473 but not if it is an overlapping register. */
474 #ifdef OVERLAPPING_REGNO_P
475 #define FIXED_REGNO_P(N) \
476 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
477 || fixed_regs[N] || global_regs[N]) \
478 && ! OVERLAPPING_REGNO_P ((N)))
480 #define FIXED_REGNO_P(N) \
481 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
482 || fixed_regs[N] || global_regs[N])
485 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
486 hard registers and pointers into the frame are the cheapest with a cost
487 of 0. Next come pseudos with a cost of one and other hard registers with
488 a cost of 2. Aside from these special cases, call `rtx_cost'. */
490 #define CHEAP_REGNO(N) \
491 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
492 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
493 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
494 || ((N) < FIRST_PSEUDO_REGISTER \
495 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
497 /* A register is cheap if it is a user variable assigned to the register
498 or if its register number always corresponds to a cheap register. */
500 #define CHEAP_REG(N) \
501 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
502 || CHEAP_REGNO (REGNO (N)))
505 (GET_CODE (X) == REG \
506 ? (CHEAP_REG (X) ? 0 \
507 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
511 /* Get the info associated with register N. */
513 #define GET_CSE_REG_INFO(N) \
514 (((N) == cached_regno && cached_cse_reg_info) \
515 ? cached_cse_reg_info : get_cse_reg_info ((N)))
517 /* Get the number of times this register has been updated in this
520 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
522 /* Get the point at which REG was recorded in the table. */
524 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
526 /* Get the quantity number for REG. */
528 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
530 /* Determine if the quantity number for register X represents a valid index
531 into the `qty_...' variables. */
533 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
536 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
537 during CSE, such nodes are present. Using an ADDRESSOF node which
538 refers to the address of a REG is a good thing because we can then
539 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
540 #define CSE_ADDRESS_COST(RTX) \
541 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
542 ? -1 : ADDRESS_COST(RTX))
545 static struct table_elt *table[NBUCKETS];
547 /* Chain of `struct table_elt's made so far for this function
548 but currently removed from the table. */
550 static struct table_elt *free_element_chain;
552 /* Number of `struct table_elt' structures made so far for this function. */
554 static int n_elements_made;
556 /* Maximum value `n_elements_made' has had so far in this compilation
557 for functions previously processed. */
559 static int max_elements_made;
561 /* Surviving equivalence class when two equivalence classes are merged
562 by recording the effects of a jump in the last insn. Zero if the
563 last insn was not a conditional jump. */
565 static struct table_elt *last_jump_equiv_class;
567 /* Set to the cost of a constant pool reference if one was found for a
568 symbolic constant. If this was found, it means we should try to
569 convert constants into constant pool entries if they don't fit in
572 static int constant_pool_entries_cost;
574 /* Define maximum length of a branch path. */
576 #define PATHLENGTH 10
578 /* This data describes a block that will be processed by cse_basic_block. */
580 struct cse_basic_block_data
582 /* Lowest CUID value of insns in block. */
584 /* Highest CUID value of insns in block. */
586 /* Total number of SETs in block. */
588 /* Last insn in the block. */
590 /* Size of current branch path, if any. */
592 /* Current branch path, indicating which branches will be taken. */
595 /* The branch insn. */
597 /* Whether it should be taken or not. AROUND is the same as taken
598 except that it is used when the destination label is not preceded
600 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
604 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
605 virtual regs here because the simplify_*_operation routines are called
606 by integrate.c, which is called before virtual register instantiation.
608 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
609 a header file so that their definitions can be shared with the
610 simplification routines in simplify-rtx.c. Until then, do not
611 change these macros without also changing the copy in simplify-rtx.c. */
613 #define FIXED_BASE_PLUS_P(X) \
614 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
615 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
616 || (X) == virtual_stack_vars_rtx \
617 || (X) == virtual_incoming_args_rtx \
618 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
619 && (XEXP (X, 0) == frame_pointer_rtx \
620 || XEXP (X, 0) == hard_frame_pointer_rtx \
621 || ((X) == arg_pointer_rtx \
622 && fixed_regs[ARG_POINTER_REGNUM]) \
623 || XEXP (X, 0) == virtual_stack_vars_rtx \
624 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
625 || GET_CODE (X) == ADDRESSOF)
627 /* Similar, but also allows reference to the stack pointer.
629 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
630 arg_pointer_rtx by itself is nonzero, because on at least one machine,
631 the i960, the arg pointer is zero when it is unused. */
633 #define NONZERO_BASE_PLUS_P(X) \
634 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
635 || (X) == virtual_stack_vars_rtx \
636 || (X) == virtual_incoming_args_rtx \
637 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
638 && (XEXP (X, 0) == frame_pointer_rtx \
639 || XEXP (X, 0) == hard_frame_pointer_rtx \
640 || ((X) == arg_pointer_rtx \
641 && fixed_regs[ARG_POINTER_REGNUM]) \
642 || XEXP (X, 0) == virtual_stack_vars_rtx \
643 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
644 || (X) == stack_pointer_rtx \
645 || (X) == virtual_stack_dynamic_rtx \
646 || (X) == virtual_outgoing_args_rtx \
647 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
648 && (XEXP (X, 0) == stack_pointer_rtx \
649 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
650 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
651 || GET_CODE (X) == ADDRESSOF)
653 static int notreg_cost PROTO((rtx));
654 static void new_basic_block PROTO((void));
655 static void make_new_qty PROTO((int));
656 static void make_regs_eqv PROTO((int, int));
657 static void delete_reg_equiv PROTO((int));
658 static int mention_regs PROTO((rtx));
659 static int insert_regs PROTO((rtx, struct table_elt *, int));
660 static void free_element PROTO((struct table_elt *));
661 static void remove_from_table PROTO((struct table_elt *, unsigned));
662 static struct table_elt *get_element PROTO((void));
663 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
664 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
665 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
666 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
668 static void merge_equiv_classes PROTO((struct table_elt *,
669 struct table_elt *));
670 static void invalidate PROTO((rtx, enum machine_mode));
671 static int cse_rtx_varies_p PROTO((rtx));
672 static void remove_invalid_refs PROTO((int));
673 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
674 static void rehash_using_reg PROTO((rtx));
675 static void invalidate_memory PROTO((void));
676 static void invalidate_for_call PROTO((void));
677 static rtx use_related_value PROTO((rtx, struct table_elt *));
678 static unsigned canon_hash PROTO((rtx, enum machine_mode));
679 static unsigned safe_hash PROTO((rtx, enum machine_mode));
680 static int exp_equiv_p PROTO((rtx, rtx, int, int));
681 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
684 static int refers_to_p PROTO((rtx, rtx));
685 static rtx canon_reg PROTO((rtx, rtx));
686 static void find_best_addr PROTO((rtx, rtx *));
687 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
689 enum machine_mode *));
690 static rtx fold_rtx PROTO((rtx, rtx));
691 static rtx equiv_constant PROTO((rtx));
692 static void record_jump_equiv PROTO((rtx, int));
693 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
695 static void cse_insn PROTO((rtx, rtx));
697 static int addr_affects_sp_p PROTO((rtx));
699 static void invalidate_from_clobbers PROTO((rtx));
700 static rtx cse_process_notes PROTO((rtx, rtx));
701 static void cse_around_loop PROTO((rtx));
702 static void invalidate_skipped_set PROTO((rtx, rtx, void *));
703 static void invalidate_skipped_block PROTO((rtx));
704 static void cse_check_loop_start PROTO((rtx, rtx, void *));
705 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
706 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
707 static void count_reg_usage PROTO((rtx, int *, rtx, int));
708 extern void dump_class PROTO((struct table_elt*));
709 static struct cse_reg_info* get_cse_reg_info PROTO((int));
710 static unsigned int hash_cse_reg_info PROTO((hash_table_entry_t));
711 static int cse_reg_info_equal_p PROTO((hash_table_entry_t,
712 hash_table_entry_t));
714 static void flush_hash_table PROTO((void));
716 /* Dump the expressions in the equivalence class indicated by CLASSP.
717 This function is used only for debugging. */
720 struct table_elt *classp;
722 struct table_elt *elt;
724 fprintf (stderr, "Equivalence chain for ");
725 print_rtl (stderr, classp->exp);
726 fprintf (stderr, ": \n");
728 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
730 print_rtl (stderr, elt->exp);
731 fprintf (stderr, "\n");
735 /* Return an estimate of the cost of computing rtx X.
736 One use is in cse, to decide which expression to keep in the hash table.
737 Another is in rtl generation, to pick the cheapest way to multiply.
738 Other uses like the latter are expected in the future. */
740 /* Internal function, to compute cost when X is not a register; called
741 from COST macro to keep it simple. */
747 return ((GET_CODE (x) == SUBREG
748 && GET_CODE (SUBREG_REG (x)) == REG
749 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
750 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
751 && (GET_MODE_SIZE (GET_MODE (x))
752 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
753 && subreg_lowpart_p (x)
754 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
755 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
756 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
757 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
759 : rtx_cost (x, SET) * 2);
762 /* Return the right cost to give to an operation
763 to make the cost of the corresponding register-to-register instruction
764 N times that of a fast register-to-register instruction. */
766 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
769 rtx_cost (x, outer_code)
771 enum rtx_code outer_code ATTRIBUTE_UNUSED;
774 register enum rtx_code code;
775 register const char *fmt;
781 /* Compute the default costs of certain things.
782 Note that RTX_COSTS can override the defaults. */
788 /* Count multiplication by 2**n as a shift,
789 because if we are considering it, we would output it as a shift. */
790 if (GET_CODE (XEXP (x, 1)) == CONST_INT
791 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
794 total = COSTS_N_INSNS (5);
800 total = COSTS_N_INSNS (7);
803 /* Used in loop.c and combine.c as a marker. */
807 /* We don't want these to be used in substitutions because
808 we have no way of validating the resulting insn. So assign
809 anything containing an ASM_OPERANDS a very high cost. */
819 return ! CHEAP_REG (x);
822 /* If we can't tie these modes, make this expensive. The larger
823 the mode, the more expensive it is. */
824 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
825 return COSTS_N_INSNS (2
826 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
829 RTX_COSTS (x, code, outer_code);
832 CONST_COSTS (x, code, outer_code);
836 #ifdef DEFAULT_RTX_COSTS
837 DEFAULT_RTX_COSTS(x, code, outer_code);
842 /* Sum the costs of the sub-rtx's, plus cost of this operation,
843 which is already in total. */
845 fmt = GET_RTX_FORMAT (code);
846 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
848 total += rtx_cost (XEXP (x, i), code);
849 else if (fmt[i] == 'E')
850 for (j = 0; j < XVECLEN (x, i); j++)
851 total += rtx_cost (XVECEXP (x, i, j), code);
856 static struct cse_reg_info *
857 get_cse_reg_info (regno)
860 struct cse_reg_info *cri;
861 struct cse_reg_info **entry;
862 struct cse_reg_info temp;
864 /* See if we already have this entry. */
866 entry = (struct cse_reg_info **) find_hash_table_entry (cse_reg_info_tree,
873 /* Get a new cse_reg_info structure. */
874 if (cse_reg_info_free_list)
876 cri = cse_reg_info_free_list;
877 cse_reg_info_free_list = cri->next;
880 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
884 cri->reg_in_table = -1;
885 cri->reg_qty = regno;
887 cri->next = cse_reg_info_used_list;
888 cse_reg_info_used_list = cri;
889 if (!cse_reg_info_used_list_end)
890 cse_reg_info_used_list_end = cri;
895 /* Cache this lookup; we tend to be looking up information about the
896 same register several times in a row. */
897 cached_regno = regno;
898 cached_cse_reg_info = cri;
904 hash_cse_reg_info (el_ptr)
905 hash_table_entry_t el_ptr;
907 return ((const struct cse_reg_info *) el_ptr)->regno;
911 cse_reg_info_equal_p (el_ptr1, el_ptr2)
912 hash_table_entry_t el_ptr1;
913 hash_table_entry_t el_ptr2;
915 return (((const struct cse_reg_info *) el_ptr1)->regno
916 == ((const struct cse_reg_info *) el_ptr2)->regno);
919 /* Clear the hash table and initialize each register with its own quantity,
920 for a new basic block. */
929 if (cse_reg_info_tree)
931 delete_hash_table (cse_reg_info_tree);
932 if (cse_reg_info_used_list)
934 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
935 cse_reg_info_free_list = cse_reg_info_used_list;
936 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
938 cached_cse_reg_info = 0;
941 cse_reg_info_tree = create_hash_table (0, hash_cse_reg_info,
942 cse_reg_info_equal_p);
944 CLEAR_HARD_REG_SET (hard_regs_in_table);
946 /* The per-quantity values used to be initialized here, but it is
947 much faster to initialize each as it is made in `make_new_qty'. */
949 for (i = 0; i < NBUCKETS; i++)
951 register struct table_elt *this, *next;
952 for (this = table[i]; this; this = next)
954 next = this->next_same_hash;
959 bzero ((char *) table, sizeof table);
968 /* Say that register REG contains a quantity not in any register before
969 and initialize that quantity. */
977 if (next_qty >= max_qty)
980 q = REG_QTY (reg) = next_qty++;
981 qty_first_reg[q] = reg;
982 qty_last_reg[q] = reg;
983 qty_const[q] = qty_const_insn[q] = 0;
984 qty_comparison_code[q] = UNKNOWN;
986 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
989 /* Make reg NEW equivalent to reg OLD.
990 OLD is not changing; NEW is. */
993 make_regs_eqv (new, old)
994 register int new, old;
996 register int lastr, firstr;
997 register int q = REG_QTY (old);
999 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1000 if (! REGNO_QTY_VALID_P (old))
1004 firstr = qty_first_reg[q];
1005 lastr = qty_last_reg[q];
1007 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1008 hard regs. Among pseudos, if NEW will live longer than any other reg
1009 of the same qty, and that is beyond the current basic block,
1010 make it the new canonical replacement for this qty. */
1011 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1012 /* Certain fixed registers might be of the class NO_REGS. This means
1013 that not only can they not be allocated by the compiler, but
1014 they cannot be used in substitutions or canonicalizations
1016 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1017 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1018 || (new >= FIRST_PSEUDO_REGISTER
1019 && (firstr < FIRST_PSEUDO_REGISTER
1020 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1021 || (uid_cuid[REGNO_FIRST_UID (new)]
1022 < cse_basic_block_start))
1023 && (uid_cuid[REGNO_LAST_UID (new)]
1024 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1026 reg_prev_eqv[firstr] = new;
1027 reg_next_eqv[new] = firstr;
1028 reg_prev_eqv[new] = -1;
1029 qty_first_reg[q] = new;
1033 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1034 Otherwise, insert before any non-fixed hard regs that are at the
1035 end. Registers of class NO_REGS cannot be used as an
1036 equivalent for anything. */
1037 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1038 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1039 && new >= FIRST_PSEUDO_REGISTER)
1040 lastr = reg_prev_eqv[lastr];
1041 reg_next_eqv[new] = reg_next_eqv[lastr];
1042 if (reg_next_eqv[lastr] >= 0)
1043 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1045 qty_last_reg[q] = new;
1046 reg_next_eqv[lastr] = new;
1047 reg_prev_eqv[new] = lastr;
1051 /* Remove REG from its equivalence class. */
1054 delete_reg_equiv (reg)
1057 register int q = REG_QTY (reg);
1060 /* If invalid, do nothing. */
1064 p = reg_prev_eqv[reg];
1065 n = reg_next_eqv[reg];
1068 reg_prev_eqv[n] = p;
1070 qty_last_reg[q] = p;
1072 reg_next_eqv[p] = n;
1074 qty_first_reg[q] = n;
1076 REG_QTY (reg) = reg;
1079 /* Remove any invalid expressions from the hash table
1080 that refer to any of the registers contained in expression X.
1082 Make sure that newly inserted references to those registers
1083 as subexpressions will be considered valid.
1085 mention_regs is not called when a register itself
1086 is being stored in the table.
1088 Return 1 if we have done something that may have changed the hash code
1095 register enum rtx_code code;
1097 register const char *fmt;
1098 register int changed = 0;
1103 code = GET_CODE (x);
1106 register int regno = REGNO (x);
1107 register int endregno
1108 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1109 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1112 for (i = regno; i < endregno; i++)
1114 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1115 remove_invalid_refs (i);
1117 REG_IN_TABLE (i) = REG_TICK (i);
1123 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1124 pseudo if they don't use overlapping words. We handle only pseudos
1125 here for simplicity. */
1126 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1127 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1129 int i = REGNO (SUBREG_REG (x));
1131 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1133 /* If reg_tick has been incremented more than once since
1134 reg_in_table was last set, that means that the entire
1135 register has been set before, so discard anything memorized
1136 for the entrire register, including all SUBREG expressions. */
1137 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1138 remove_invalid_refs (i);
1140 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1143 REG_IN_TABLE (i) = REG_TICK (i);
1147 /* If X is a comparison or a COMPARE and either operand is a register
1148 that does not have a quantity, give it one. This is so that a later
1149 call to record_jump_equiv won't cause X to be assigned a different
1150 hash code and not found in the table after that call.
1152 It is not necessary to do this here, since rehash_using_reg can
1153 fix up the table later, but doing this here eliminates the need to
1154 call that expensive function in the most common case where the only
1155 use of the register is in the comparison. */
1157 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1159 if (GET_CODE (XEXP (x, 0)) == REG
1160 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1161 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1163 rehash_using_reg (XEXP (x, 0));
1167 if (GET_CODE (XEXP (x, 1)) == REG
1168 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1169 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1171 rehash_using_reg (XEXP (x, 1));
1176 fmt = GET_RTX_FORMAT (code);
1177 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1179 changed |= mention_regs (XEXP (x, i));
1180 else if (fmt[i] == 'E')
1181 for (j = 0; j < XVECLEN (x, i); j++)
1182 changed |= mention_regs (XVECEXP (x, i, j));
1187 /* Update the register quantities for inserting X into the hash table
1188 with a value equivalent to CLASSP.
1189 (If the class does not contain a REG, it is irrelevant.)
1190 If MODIFIED is nonzero, X is a destination; it is being modified.
1191 Note that delete_reg_equiv should be called on a register
1192 before insert_regs is done on that register with MODIFIED != 0.
1194 Nonzero value means that elements of reg_qty have changed
1195 so X's hash code may be different. */
1198 insert_regs (x, classp, modified)
1200 struct table_elt *classp;
1203 if (GET_CODE (x) == REG)
1205 register int regno = REGNO (x);
1207 /* If REGNO is in the equivalence table already but is of the
1208 wrong mode for that equivalence, don't do anything here. */
1210 if (REGNO_QTY_VALID_P (regno)
1211 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1214 if (modified || ! REGNO_QTY_VALID_P (regno))
1217 for (classp = classp->first_same_value;
1219 classp = classp->next_same_value)
1220 if (GET_CODE (classp->exp) == REG
1221 && GET_MODE (classp->exp) == GET_MODE (x))
1223 make_regs_eqv (regno, REGNO (classp->exp));
1227 make_new_qty (regno);
1228 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1235 /* If X is a SUBREG, we will likely be inserting the inner register in the
1236 table. If that register doesn't have an assigned quantity number at
1237 this point but does later, the insertion that we will be doing now will
1238 not be accessible because its hash code will have changed. So assign
1239 a quantity number now. */
1241 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1242 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1244 int regno = REGNO (SUBREG_REG (x));
1246 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1247 /* Mention_regs checks if REG_TICK is exactly one larger than
1248 REG_IN_TABLE to find out if there was only a single preceding
1249 invalidation - for the SUBREG - or another one, which would be
1250 for the full register. Since we don't invalidate the SUBREG
1251 here first, we might have to bump up REG_TICK so that mention_regs
1252 will do the right thing. */
1253 if (REG_IN_TABLE (regno) >= 0
1254 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1260 return mention_regs (x);
1263 /* Look in or update the hash table. */
1265 /* Put the element ELT on the list of free elements. */
1269 struct table_elt *elt;
1271 elt->next_same_hash = free_element_chain;
1272 free_element_chain = elt;
1275 /* Return an element that is free for use. */
1277 static struct table_elt *
1280 struct table_elt *elt = free_element_chain;
1283 free_element_chain = elt->next_same_hash;
1287 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1290 /* Remove table element ELT from use in the table.
1291 HASH is its hash code, made using the HASH macro.
1292 It's an argument because often that is known in advance
1293 and we save much time not recomputing it. */
1296 remove_from_table (elt, hash)
1297 register struct table_elt *elt;
1303 /* Mark this element as removed. See cse_insn. */
1304 elt->first_same_value = 0;
1306 /* Remove the table element from its equivalence class. */
1309 register struct table_elt *prev = elt->prev_same_value;
1310 register struct table_elt *next = elt->next_same_value;
1312 if (next) next->prev_same_value = prev;
1315 prev->next_same_value = next;
1318 register struct table_elt *newfirst = next;
1321 next->first_same_value = newfirst;
1322 next = next->next_same_value;
1327 /* Remove the table element from its hash bucket. */
1330 register struct table_elt *prev = elt->prev_same_hash;
1331 register struct table_elt *next = elt->next_same_hash;
1333 if (next) next->prev_same_hash = prev;
1336 prev->next_same_hash = next;
1337 else if (table[hash] == elt)
1341 /* This entry is not in the proper hash bucket. This can happen
1342 when two classes were merged by `merge_equiv_classes'. Search
1343 for the hash bucket that it heads. This happens only very
1344 rarely, so the cost is acceptable. */
1345 for (hash = 0; hash < NBUCKETS; hash++)
1346 if (table[hash] == elt)
1351 /* Remove the table element from its related-value circular chain. */
1353 if (elt->related_value != 0 && elt->related_value != elt)
1355 register struct table_elt *p = elt->related_value;
1356 while (p->related_value != elt)
1357 p = p->related_value;
1358 p->related_value = elt->related_value;
1359 if (p->related_value == p)
1360 p->related_value = 0;
1366 /* Look up X in the hash table and return its table element,
1367 or 0 if X is not in the table.
1369 MODE is the machine-mode of X, or if X is an integer constant
1370 with VOIDmode then MODE is the mode with which X will be used.
1372 Here we are satisfied to find an expression whose tree structure
1375 static struct table_elt *
1376 lookup (x, hash, mode)
1379 enum machine_mode mode;
1381 register struct table_elt *p;
1383 for (p = table[hash]; p; p = p->next_same_hash)
1384 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1385 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1391 /* Like `lookup' but don't care whether the table element uses invalid regs.
1392 Also ignore discrepancies in the machine mode of a register. */
1394 static struct table_elt *
1395 lookup_for_remove (x, hash, mode)
1398 enum machine_mode mode;
1400 register struct table_elt *p;
1402 if (GET_CODE (x) == REG)
1404 int regno = REGNO (x);
1405 /* Don't check the machine mode when comparing registers;
1406 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1407 for (p = table[hash]; p; p = p->next_same_hash)
1408 if (GET_CODE (p->exp) == REG
1409 && REGNO (p->exp) == regno)
1414 for (p = table[hash]; p; p = p->next_same_hash)
1415 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1422 /* Look for an expression equivalent to X and with code CODE.
1423 If one is found, return that expression. */
1426 lookup_as_function (x, code)
1430 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1432 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1433 long as we are narrowing. So if we looked in vain for a mode narrower
1434 than word_mode before, look for word_mode now. */
1435 if (p == 0 && code == CONST_INT
1436 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1439 PUT_MODE (x, word_mode);
1440 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1446 for (p = p->first_same_value; p; p = p->next_same_value)
1448 if (GET_CODE (p->exp) == code
1449 /* Make sure this is a valid entry in the table. */
1450 && exp_equiv_p (p->exp, p->exp, 1, 0))
1457 /* Insert X in the hash table, assuming HASH is its hash code
1458 and CLASSP is an element of the class it should go in
1459 (or 0 if a new class should be made).
1460 It is inserted at the proper position to keep the class in
1461 the order cheapest first.
1463 MODE is the machine-mode of X, or if X is an integer constant
1464 with VOIDmode then MODE is the mode with which X will be used.
1466 For elements of equal cheapness, the most recent one
1467 goes in front, except that the first element in the list
1468 remains first unless a cheaper element is added. The order of
1469 pseudo-registers does not matter, as canon_reg will be called to
1470 find the cheapest when a register is retrieved from the table.
1472 The in_memory field in the hash table element is set to 0.
1473 The caller must set it nonzero if appropriate.
1475 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1476 and if insert_regs returns a nonzero value
1477 you must then recompute its hash code before calling here.
1479 If necessary, update table showing constant values of quantities. */
1481 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1483 static struct table_elt *
1484 insert (x, classp, hash, mode)
1486 register struct table_elt *classp;
1488 enum machine_mode mode;
1490 register struct table_elt *elt;
1492 /* If X is a register and we haven't made a quantity for it,
1493 something is wrong. */
1494 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1497 /* If X is a hard register, show it is being put in the table. */
1498 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1500 int regno = REGNO (x);
1501 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1504 for (i = regno; i < endregno; i++)
1505 SET_HARD_REG_BIT (hard_regs_in_table, i);
1508 /* If X is a label, show we recorded it. */
1509 if (GET_CODE (x) == LABEL_REF
1510 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1511 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1512 recorded_label_ref = 1;
1514 /* Put an element for X into the right hash bucket. */
1516 elt = get_element ();
1518 elt->cost = COST (x);
1519 elt->next_same_value = 0;
1520 elt->prev_same_value = 0;
1521 elt->next_same_hash = table[hash];
1522 elt->prev_same_hash = 0;
1523 elt->related_value = 0;
1526 elt->is_const = (CONSTANT_P (x)
1527 /* GNU C++ takes advantage of this for `this'
1528 (and other const values). */
1529 || (RTX_UNCHANGING_P (x)
1530 && GET_CODE (x) == REG
1531 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1532 || FIXED_BASE_PLUS_P (x));
1535 table[hash]->prev_same_hash = elt;
1538 /* Put it into the proper value-class. */
1541 classp = classp->first_same_value;
1542 if (CHEAPER (elt, classp))
1543 /* Insert at the head of the class */
1545 register struct table_elt *p;
1546 elt->next_same_value = classp;
1547 classp->prev_same_value = elt;
1548 elt->first_same_value = elt;
1550 for (p = classp; p; p = p->next_same_value)
1551 p->first_same_value = elt;
1555 /* Insert not at head of the class. */
1556 /* Put it after the last element cheaper than X. */
1557 register struct table_elt *p, *next;
1558 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1560 /* Put it after P and before NEXT. */
1561 elt->next_same_value = next;
1563 next->prev_same_value = elt;
1564 elt->prev_same_value = p;
1565 p->next_same_value = elt;
1566 elt->first_same_value = classp;
1570 elt->first_same_value = elt;
1572 /* If this is a constant being set equivalent to a register or a register
1573 being set equivalent to a constant, note the constant equivalence.
1575 If this is a constant, it cannot be equivalent to a different constant,
1576 and a constant is the only thing that can be cheaper than a register. So
1577 we know the register is the head of the class (before the constant was
1580 If this is a register that is not already known equivalent to a
1581 constant, we must check the entire class.
1583 If this is a register that is already known equivalent to an insn,
1584 update `qty_const_insn' to show that `this_insn' is the latest
1585 insn making that quantity equivalent to the constant. */
1587 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1588 && GET_CODE (x) != REG)
1590 qty_const[REG_QTY (REGNO (classp->exp))]
1591 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1592 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1595 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1598 register struct table_elt *p;
1600 for (p = classp; p != 0; p = p->next_same_value)
1602 if (p->is_const && GET_CODE (p->exp) != REG)
1604 qty_const[REG_QTY (REGNO (x))]
1605 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1606 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1612 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1613 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1614 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1616 /* If this is a constant with symbolic value,
1617 and it has a term with an explicit integer value,
1618 link it up with related expressions. */
1619 if (GET_CODE (x) == CONST)
1621 rtx subexp = get_related_value (x);
1623 struct table_elt *subelt, *subelt_prev;
1627 /* Get the integer-free subexpression in the hash table. */
1628 subhash = safe_hash (subexp, mode) % NBUCKETS;
1629 subelt = lookup (subexp, subhash, mode);
1631 subelt = insert (subexp, NULL_PTR, subhash, mode);
1632 /* Initialize SUBELT's circular chain if it has none. */
1633 if (subelt->related_value == 0)
1634 subelt->related_value = subelt;
1635 /* Find the element in the circular chain that precedes SUBELT. */
1636 subelt_prev = subelt;
1637 while (subelt_prev->related_value != subelt)
1638 subelt_prev = subelt_prev->related_value;
1639 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1640 This way the element that follows SUBELT is the oldest one. */
1641 elt->related_value = subelt_prev->related_value;
1642 subelt_prev->related_value = elt;
1649 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1650 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1651 the two classes equivalent.
1653 CLASS1 will be the surviving class; CLASS2 should not be used after this
1656 Any invalid entries in CLASS2 will not be copied. */
1659 merge_equiv_classes (class1, class2)
1660 struct table_elt *class1, *class2;
1662 struct table_elt *elt, *next, *new;
1664 /* Ensure we start with the head of the classes. */
1665 class1 = class1->first_same_value;
1666 class2 = class2->first_same_value;
1668 /* If they were already equal, forget it. */
1669 if (class1 == class2)
1672 for (elt = class2; elt; elt = next)
1676 enum machine_mode mode = elt->mode;
1678 next = elt->next_same_value;
1680 /* Remove old entry, make a new one in CLASS1's class.
1681 Don't do this for invalid entries as we cannot find their
1682 hash code (it also isn't necessary). */
1683 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1685 hash_arg_in_memory = 0;
1686 hash_arg_in_struct = 0;
1687 hash = HASH (exp, mode);
1689 if (GET_CODE (exp) == REG)
1690 delete_reg_equiv (REGNO (exp));
1692 remove_from_table (elt, hash);
1694 if (insert_regs (exp, class1, 0))
1696 rehash_using_reg (exp);
1697 hash = HASH (exp, mode);
1699 new = insert (exp, class1, hash, mode);
1700 new->in_memory = hash_arg_in_memory;
1701 new->in_struct = hash_arg_in_struct;
1707 /* Flush the entire hash table. */
1713 struct table_elt *p;
1715 for (i = 0; i < NBUCKETS; i++)
1716 for (p = table[i]; p; p = table[i])
1718 /* Note that invalidate can remove elements
1719 after P in the current hash chain. */
1720 if (GET_CODE (p->exp) == REG)
1721 invalidate (p->exp, p->mode);
1723 remove_from_table (p, i);
1727 /* Remove from the hash table, or mark as invalid, all expressions whose
1728 values could be altered by storing in X. X is a register, a subreg, or
1729 a memory reference with nonvarying address (because, when a memory
1730 reference with a varying address is stored in, all memory references are
1731 removed by invalidate_memory so specific invalidation is superfluous).
1732 FULL_MODE, if not VOIDmode, indicates that this much should be
1733 invalidated instead of just the amount indicated by the mode of X. This
1734 is only used for bitfield stores into memory.
1736 A nonvarying address may be just a register or just a symbol reference,
1737 or it may be either of those plus a numeric offset. */
1740 invalidate (x, full_mode)
1742 enum machine_mode full_mode;
1745 register struct table_elt *p;
1747 switch (GET_CODE (x))
1751 /* If X is a register, dependencies on its contents are recorded
1752 through the qty number mechanism. Just change the qty number of
1753 the register, mark it as invalid for expressions that refer to it,
1754 and remove it itself. */
1755 register int regno = REGNO (x);
1756 register unsigned hash = HASH (x, GET_MODE (x));
1758 /* Remove REGNO from any quantity list it might be on and indicate
1759 that its value might have changed. If it is a pseudo, remove its
1760 entry from the hash table.
1762 For a hard register, we do the first two actions above for any
1763 additional hard registers corresponding to X. Then, if any of these
1764 registers are in the table, we must remove any REG entries that
1765 overlap these registers. */
1767 delete_reg_equiv (regno);
1770 if (regno >= FIRST_PSEUDO_REGISTER)
1772 /* Because a register can be referenced in more than one mode,
1773 we might have to remove more than one table entry. */
1774 struct table_elt *elt;
1776 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1777 remove_from_table (elt, hash);
1781 HOST_WIDE_INT in_table
1782 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1783 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1784 int tregno, tendregno;
1785 register struct table_elt *p, *next;
1787 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1789 for (i = regno + 1; i < endregno; i++)
1791 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1792 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1793 delete_reg_equiv (i);
1798 for (hash = 0; hash < NBUCKETS; hash++)
1799 for (p = table[hash]; p; p = next)
1801 next = p->next_same_hash;
1803 if (GET_CODE (p->exp) != REG
1804 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1807 tregno = REGNO (p->exp);
1809 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1810 if (tendregno > regno && tregno < endregno)
1811 remove_from_table (p, hash);
1818 invalidate (SUBREG_REG (x), VOIDmode);
1822 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1823 invalidate (XVECEXP (x, 0, i), VOIDmode);
1827 /* This is part of a disjoint return value; extract the location in
1828 question ignoring the offset. */
1829 invalidate (XEXP (x, 0), VOIDmode);
1833 /* Remove all hash table elements that refer to overlapping pieces of
1835 if (full_mode == VOIDmode)
1836 full_mode = GET_MODE (x);
1838 for (i = 0; i < NBUCKETS; i++)
1840 register struct table_elt *next;
1842 for (p = table[i]; p; p = next)
1844 next = p->next_same_hash;
1846 && (GET_CODE (p->exp) != MEM
1847 || true_dependence (x, full_mode, p->exp,
1849 remove_from_table (p, i);
1859 /* Remove all expressions that refer to register REGNO,
1860 since they are already invalid, and we are about to
1861 mark that register valid again and don't want the old
1862 expressions to reappear as valid. */
1865 remove_invalid_refs (regno)
1869 register struct table_elt *p, *next;
1871 for (i = 0; i < NBUCKETS; i++)
1872 for (p = table[i]; p; p = next)
1874 next = p->next_same_hash;
1875 if (GET_CODE (p->exp) != REG
1876 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1877 remove_from_table (p, i);
1881 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1883 remove_invalid_subreg_refs (regno, word, mode)
1886 enum machine_mode mode;
1889 register struct table_elt *p, *next;
1890 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1892 for (i = 0; i < NBUCKETS; i++)
1893 for (p = table[i]; p; p = next)
1896 next = p->next_same_hash;
1899 if (GET_CODE (p->exp) != REG
1900 && (GET_CODE (exp) != SUBREG
1901 || GET_CODE (SUBREG_REG (exp)) != REG
1902 || REGNO (SUBREG_REG (exp)) != regno
1903 || (((SUBREG_WORD (exp)
1904 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1906 && SUBREG_WORD (exp) <= end))
1907 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1908 remove_from_table (p, i);
1912 /* Recompute the hash codes of any valid entries in the hash table that
1913 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1915 This is called when we make a jump equivalence. */
1918 rehash_using_reg (x)
1922 struct table_elt *p, *next;
1925 if (GET_CODE (x) == SUBREG)
1928 /* If X is not a register or if the register is known not to be in any
1929 valid entries in the table, we have no work to do. */
1931 if (GET_CODE (x) != REG
1932 || REG_IN_TABLE (REGNO (x)) < 0
1933 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1936 /* Scan all hash chains looking for valid entries that mention X.
1937 If we find one and it is in the wrong hash chain, move it. We can skip
1938 objects that are registers, since they are handled specially. */
1940 for (i = 0; i < NBUCKETS; i++)
1941 for (p = table[i]; p; p = next)
1943 next = p->next_same_hash;
1944 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1945 && exp_equiv_p (p->exp, p->exp, 1, 0)
1946 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1948 if (p->next_same_hash)
1949 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1951 if (p->prev_same_hash)
1952 p->prev_same_hash->next_same_hash = p->next_same_hash;
1954 table[i] = p->next_same_hash;
1956 p->next_same_hash = table[hash];
1957 p->prev_same_hash = 0;
1959 table[hash]->prev_same_hash = p;
1965 /* Remove from the hash table any expression that is a call-clobbered
1966 register. Also update their TICK values. */
1969 invalidate_for_call ()
1971 int regno, endregno;
1974 struct table_elt *p, *next;
1977 /* Go through all the hard registers. For each that is clobbered in
1978 a CALL_INSN, remove the register from quantity chains and update
1979 reg_tick if defined. Also see if any of these registers is currently
1982 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1983 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1985 delete_reg_equiv (regno);
1986 if (REG_TICK (regno) >= 0)
1989 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1992 /* In the case where we have no call-clobbered hard registers in the
1993 table, we are done. Otherwise, scan the table and remove any
1994 entry that overlaps a call-clobbered register. */
1997 for (hash = 0; hash < NBUCKETS; hash++)
1998 for (p = table[hash]; p; p = next)
2000 next = p->next_same_hash;
2002 if (GET_CODE (p->exp) != REG
2003 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2006 regno = REGNO (p->exp);
2007 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2009 for (i = regno; i < endregno; i++)
2010 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2012 remove_from_table (p, hash);
2018 /* Given an expression X of type CONST,
2019 and ELT which is its table entry (or 0 if it
2020 is not in the hash table),
2021 return an alternate expression for X as a register plus integer.
2022 If none can be found, return 0. */
2025 use_related_value (x, elt)
2027 struct table_elt *elt;
2029 register struct table_elt *relt = 0;
2030 register struct table_elt *p, *q;
2031 HOST_WIDE_INT offset;
2033 /* First, is there anything related known?
2034 If we have a table element, we can tell from that.
2035 Otherwise, must look it up. */
2037 if (elt != 0 && elt->related_value != 0)
2039 else if (elt == 0 && GET_CODE (x) == CONST)
2041 rtx subexp = get_related_value (x);
2043 relt = lookup (subexp,
2044 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2051 /* Search all related table entries for one that has an
2052 equivalent register. */
2057 /* This loop is strange in that it is executed in two different cases.
2058 The first is when X is already in the table. Then it is searching
2059 the RELATED_VALUE list of X's class (RELT). The second case is when
2060 X is not in the table. Then RELT points to a class for the related
2063 Ensure that, whatever case we are in, that we ignore classes that have
2064 the same value as X. */
2066 if (rtx_equal_p (x, p->exp))
2069 for (q = p->first_same_value; q; q = q->next_same_value)
2070 if (GET_CODE (q->exp) == REG)
2076 p = p->related_value;
2078 /* We went all the way around, so there is nothing to be found.
2079 Alternatively, perhaps RELT was in the table for some other reason
2080 and it has no related values recorded. */
2081 if (p == relt || p == 0)
2088 offset = (get_integer_term (x) - get_integer_term (p->exp));
2089 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2090 return plus_constant (q->exp, offset);
2093 /* Hash an rtx. We are careful to make sure the value is never negative.
2094 Equivalent registers hash identically.
2095 MODE is used in hashing for CONST_INTs only;
2096 otherwise the mode of X is used.
2098 Store 1 in do_not_record if any subexpression is volatile.
2100 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2101 which does not have the RTX_UNCHANGING_P bit set.
2102 In this case, also store 1 in hash_arg_in_struct
2103 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2105 Note that cse_insn knows that the hash code of a MEM expression
2106 is just (int) MEM plus the hash code of the address. */
2109 canon_hash (x, mode)
2111 enum machine_mode mode;
2114 register unsigned hash = 0;
2115 register enum rtx_code code;
2116 register const char *fmt;
2118 /* repeat is used to turn tail-recursion into iteration. */
2123 code = GET_CODE (x);
2128 register int regno = REGNO (x);
2130 /* On some machines, we can't record any non-fixed hard register,
2131 because extending its life will cause reload problems. We
2132 consider ap, fp, and sp to be fixed for this purpose.
2134 We also consider CCmode registers to be fixed for this purpose;
2135 failure to do so leads to failure to simplify 0<100 type of
2138 On all machines, we can't record any global registers. */
2140 if (regno < FIRST_PSEUDO_REGISTER
2141 && (global_regs[regno]
2142 || (SMALL_REGISTER_CLASSES
2143 && ! fixed_regs[regno]
2144 && regno != FRAME_POINTER_REGNUM
2145 && regno != HARD_FRAME_POINTER_REGNUM
2146 && regno != ARG_POINTER_REGNUM
2147 && regno != STACK_POINTER_REGNUM
2148 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2153 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2157 /* We handle SUBREG of a REG specially because the underlying
2158 reg changes its hash value with every value change; we don't
2159 want to have to forget unrelated subregs when one subreg changes. */
2162 if (GET_CODE (SUBREG_REG (x)) == REG)
2164 hash += (((unsigned) SUBREG << 7)
2165 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2173 unsigned HOST_WIDE_INT tem = INTVAL (x);
2174 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2179 /* This is like the general case, except that it only counts
2180 the integers representing the constant. */
2181 hash += (unsigned) code + (unsigned) GET_MODE (x);
2182 if (GET_MODE (x) != VOIDmode)
2183 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2185 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2189 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2190 + (unsigned) CONST_DOUBLE_HIGH (x));
2193 /* Assume there is only one rtx object for any given label. */
2196 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2201 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2205 /* We don't record if marked volatile or if BLKmode since we don't
2206 know the size of the move. */
2207 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2212 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2214 hash_arg_in_memory = 1;
2215 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2217 /* Now that we have already found this special case,
2218 might as well speed it up as much as possible. */
2219 hash += (unsigned) MEM;
2230 case UNSPEC_VOLATILE:
2235 if (MEM_VOLATILE_P (x))
2246 i = GET_RTX_LENGTH (code) - 1;
2247 hash += (unsigned) code + (unsigned) GET_MODE (x);
2248 fmt = GET_RTX_FORMAT (code);
2253 rtx tem = XEXP (x, i);
2255 /* If we are about to do the last recursive call
2256 needed at this level, change it into iteration.
2257 This function is called enough to be worth it. */
2263 hash += canon_hash (tem, 0);
2265 else if (fmt[i] == 'E')
2266 for (j = 0; j < XVECLEN (x, i); j++)
2267 hash += canon_hash (XVECEXP (x, i, j), 0);
2268 else if (fmt[i] == 's')
2270 register unsigned char *p = (unsigned char *) XSTR (x, i);
2275 else if (fmt[i] == 'i')
2277 register unsigned tem = XINT (x, i);
2280 else if (fmt[i] == '0' || fmt[i] == 't')
2288 /* Like canon_hash but with no side effects. */
2293 enum machine_mode mode;
2295 int save_do_not_record = do_not_record;
2296 int save_hash_arg_in_memory = hash_arg_in_memory;
2297 int save_hash_arg_in_struct = hash_arg_in_struct;
2298 unsigned hash = canon_hash (x, mode);
2299 hash_arg_in_memory = save_hash_arg_in_memory;
2300 hash_arg_in_struct = save_hash_arg_in_struct;
2301 do_not_record = save_do_not_record;
2305 /* Return 1 iff X and Y would canonicalize into the same thing,
2306 without actually constructing the canonicalization of either one.
2307 If VALIDATE is nonzero,
2308 we assume X is an expression being processed from the rtl
2309 and Y was found in the hash table. We check register refs
2310 in Y for being marked as valid.
2312 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2313 that is known to be in the register. Ordinarily, we don't allow them
2314 to match, because letting them match would cause unpredictable results
2315 in all the places that search a hash table chain for an equivalent
2316 for a given value. A possible equivalent that has different structure
2317 has its hash code computed from different data. Whether the hash code
2318 is the same as that of the given value is pure luck. */
2321 exp_equiv_p (x, y, validate, equal_values)
2327 register enum rtx_code code;
2328 register const char *fmt;
2330 /* Note: it is incorrect to assume an expression is equivalent to itself
2331 if VALIDATE is nonzero. */
2332 if (x == y && !validate)
2334 if (x == 0 || y == 0)
2337 code = GET_CODE (x);
2338 if (code != GET_CODE (y))
2343 /* If X is a constant and Y is a register or vice versa, they may be
2344 equivalent. We only have to validate if Y is a register. */
2345 if (CONSTANT_P (x) && GET_CODE (y) == REG
2346 && REGNO_QTY_VALID_P (REGNO (y))
2347 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2348 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2349 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2352 if (CONSTANT_P (y) && code == REG
2353 && REGNO_QTY_VALID_P (REGNO (x))
2354 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2355 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2361 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2362 if (GET_MODE (x) != GET_MODE (y))
2372 return INTVAL (x) == INTVAL (y);
2375 return XEXP (x, 0) == XEXP (y, 0);
2378 return XSTR (x, 0) == XSTR (y, 0);
2382 int regno = REGNO (y);
2384 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2385 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2388 /* If the quantities are not the same, the expressions are not
2389 equivalent. If there are and we are not to validate, they
2390 are equivalent. Otherwise, ensure all regs are up-to-date. */
2392 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2398 for (i = regno; i < endregno; i++)
2399 if (REG_IN_TABLE (i) != REG_TICK (i))
2405 /* For commutative operations, check both orders. */
2413 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2414 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2415 validate, equal_values))
2416 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2417 validate, equal_values)
2418 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2419 validate, equal_values)));
2425 /* Compare the elements. If any pair of corresponding elements
2426 fail to match, return 0 for the whole things. */
2428 fmt = GET_RTX_FORMAT (code);
2429 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2434 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2439 if (XVECLEN (x, i) != XVECLEN (y, i))
2441 for (j = 0; j < XVECLEN (x, i); j++)
2442 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2443 validate, equal_values))
2448 if (strcmp (XSTR (x, i), XSTR (y, i)))
2453 if (XINT (x, i) != XINT (y, i))
2458 if (XWINT (x, i) != XWINT (y, i))
2474 /* Return 1 iff any subexpression of X matches Y.
2475 Here we do not require that X or Y be valid (for registers referred to)
2476 for being in the hash table. */
2483 register enum rtx_code code;
2484 register const char *fmt;
2489 if (x == 0 || y == 0)
2492 code = GET_CODE (x);
2493 /* If X as a whole has the same code as Y, they may match.
2495 if (code == GET_CODE (y))
2497 if (exp_equiv_p (x, y, 0, 1))
2501 /* X does not match, so try its subexpressions. */
2503 fmt = GET_RTX_FORMAT (code);
2504 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2513 if (refers_to_p (XEXP (x, i), y))
2516 else if (fmt[i] == 'E')
2519 for (j = 0; j < XVECLEN (x, i); j++)
2520 if (refers_to_p (XVECEXP (x, i, j), y))
2527 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2528 set PBASE, PSTART, and PEND which correspond to the base of the address,
2529 the starting offset, and ending offset respectively.
2531 ADDR is known to be a nonvarying address. */
2533 /* ??? Despite what the comments say, this function is in fact frequently
2534 passed varying addresses. This does not appear to cause any problems. */
2537 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2541 HOST_WIDE_INT *pstart, *pend;
2544 HOST_WIDE_INT start, end;
2550 if (flag_pic && GET_CODE (base) == PLUS
2551 && XEXP (base, 0) == pic_offset_table_rtx)
2552 base = XEXP (base, 1);
2554 /* Registers with nonvarying addresses usually have constant equivalents;
2555 but the frame pointer register is also possible. */
2556 if (GET_CODE (base) == REG
2558 && REGNO_QTY_VALID_P (REGNO (base))
2559 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2560 && qty_const[REG_QTY (REGNO (base))] != 0)
2561 base = qty_const[REG_QTY (REGNO (base))];
2562 else if (GET_CODE (base) == PLUS
2563 && GET_CODE (XEXP (base, 1)) == CONST_INT
2564 && GET_CODE (XEXP (base, 0)) == REG
2566 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2567 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2568 == GET_MODE (XEXP (base, 0)))
2569 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2571 start = INTVAL (XEXP (base, 1));
2572 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2574 /* This can happen as the result of virtual register instantiation,
2575 if the initial offset is too large to be a valid address. */
2576 else if (GET_CODE (base) == PLUS
2577 && GET_CODE (XEXP (base, 0)) == REG
2578 && GET_CODE (XEXP (base, 1)) == REG
2580 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2581 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2582 == GET_MODE (XEXP (base, 0)))
2583 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2584 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2585 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2586 == GET_MODE (XEXP (base, 1)))
2587 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2589 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2590 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2592 /* One of the two values must be a constant. */
2593 if (GET_CODE (base) != CONST_INT)
2595 if (GET_CODE (tem) != CONST_INT)
2597 start = INTVAL (tem);
2601 start = INTVAL (base);
2606 /* Handle everything that we can find inside an address that has been
2607 viewed as constant. */
2611 /* If no part of this switch does a "continue", the code outside
2612 will exit this loop. */
2614 switch (GET_CODE (base))
2617 /* By definition, operand1 of a LO_SUM is the associated constant
2618 address. Use the associated constant address as the base
2620 base = XEXP (base, 1);
2624 /* Strip off CONST. */
2625 base = XEXP (base, 0);
2629 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2631 start += INTVAL (XEXP (base, 1));
2632 base = XEXP (base, 0);
2638 /* Handle the case of an AND which is the negative of a power of
2639 two. This is used to represent unaligned memory operations. */
2640 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2641 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2643 set_nonvarying_address_components (XEXP (base, 0), size,
2644 pbase, pstart, pend);
2646 /* Assume the worst misalignment. START is affected, but not
2647 END, so compensate but adjusting SIZE. Don't lose any
2648 constant we already had. */
2650 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2651 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2664 if (GET_CODE (base) == CONST_INT)
2666 start += INTVAL (base);
2672 /* Set the return values. */
2678 /* Return 1 if X has a value that can vary even between two
2679 executions of the program. 0 means X can be compared reliably
2680 against certain constants or near-constants. */
2683 cse_rtx_varies_p (x)
2686 /* We need not check for X and the equivalence class being of the same
2687 mode because if X is equivalent to a constant in some mode, it
2688 doesn't vary in any mode. */
2690 if (GET_CODE (x) == REG
2691 && REGNO_QTY_VALID_P (REGNO (x))
2692 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2693 && qty_const[REG_QTY (REGNO (x))] != 0)
2696 if (GET_CODE (x) == PLUS
2697 && GET_CODE (XEXP (x, 1)) == CONST_INT
2698 && GET_CODE (XEXP (x, 0)) == REG
2699 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2700 && (GET_MODE (XEXP (x, 0))
2701 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2702 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2705 /* This can happen as the result of virtual register instantiation, if
2706 the initial constant is too large to be a valid address. This gives
2707 us a three instruction sequence, load large offset into a register,
2708 load fp minus a constant into a register, then a MEM which is the
2709 sum of the two `constant' registers. */
2710 if (GET_CODE (x) == PLUS
2711 && GET_CODE (XEXP (x, 0)) == REG
2712 && GET_CODE (XEXP (x, 1)) == REG
2713 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2714 && (GET_MODE (XEXP (x, 0))
2715 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2716 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2717 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2718 && (GET_MODE (XEXP (x, 1))
2719 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2720 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2723 return rtx_varies_p (x);
2726 /* Canonicalize an expression:
2727 replace each register reference inside it
2728 with the "oldest" equivalent register.
2730 If INSN is non-zero and we are replacing a pseudo with a hard register
2731 or vice versa, validate_change is used to ensure that INSN remains valid
2732 after we make our substitution. The calls are made with IN_GROUP non-zero
2733 so apply_change_group must be called upon the outermost return from this
2734 function (unless INSN is zero). The result of apply_change_group can
2735 generally be discarded since the changes we are making are optional. */
2743 register enum rtx_code code;
2744 register const char *fmt;
2749 code = GET_CODE (x);
2767 /* Never replace a hard reg, because hard regs can appear
2768 in more than one machine mode, and we must preserve the mode
2769 of each occurrence. Also, some hard regs appear in
2770 MEMs that are shared and mustn't be altered. Don't try to
2771 replace any reg that maps to a reg of class NO_REGS. */
2772 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2773 || ! REGNO_QTY_VALID_P (REGNO (x)))
2776 first = qty_first_reg[REG_QTY (REGNO (x))];
2777 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2778 : REGNO_REG_CLASS (first) == NO_REGS ? x
2779 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2786 fmt = GET_RTX_FORMAT (code);
2787 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2793 rtx new = canon_reg (XEXP (x, i), insn);
2796 /* If replacing pseudo with hard reg or vice versa, ensure the
2797 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2798 if (insn != 0 && new != 0
2799 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2800 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2801 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2802 || (insn_code = recog_memoized (insn)) < 0
2803 || insn_data[insn_code].n_dups > 0))
2804 validate_change (insn, &XEXP (x, i), new, 1);
2808 else if (fmt[i] == 'E')
2809 for (j = 0; j < XVECLEN (x, i); j++)
2810 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2816 /* LOC is a location within INSN that is an operand address (the contents of
2817 a MEM). Find the best equivalent address to use that is valid for this
2820 On most CISC machines, complicated address modes are costly, and rtx_cost
2821 is a good approximation for that cost. However, most RISC machines have
2822 only a few (usually only one) memory reference formats. If an address is
2823 valid at all, it is often just as cheap as any other address. Hence, for
2824 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2825 costs of various addresses. For two addresses of equal cost, choose the one
2826 with the highest `rtx_cost' value as that has the potential of eliminating
2827 the most insns. For equal costs, we choose the first in the equivalence
2828 class. Note that we ignore the fact that pseudo registers are cheaper
2829 than hard registers here because we would also prefer the pseudo registers.
2833 find_best_addr (insn, loc)
2837 struct table_elt *elt;
2840 struct table_elt *p;
2841 int found_better = 1;
2843 int save_do_not_record = do_not_record;
2844 int save_hash_arg_in_memory = hash_arg_in_memory;
2845 int save_hash_arg_in_struct = hash_arg_in_struct;
2850 /* Do not try to replace constant addresses or addresses of local and
2851 argument slots. These MEM expressions are made only once and inserted
2852 in many instructions, as well as being used to control symbol table
2853 output. It is not safe to clobber them.
2855 There are some uncommon cases where the address is already in a register
2856 for some reason, but we cannot take advantage of that because we have
2857 no easy way to unshare the MEM. In addition, looking up all stack
2858 addresses is costly. */
2859 if ((GET_CODE (addr) == PLUS
2860 && GET_CODE (XEXP (addr, 0)) == REG
2861 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2862 && (regno = REGNO (XEXP (addr, 0)),
2863 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2864 || regno == ARG_POINTER_REGNUM))
2865 || (GET_CODE (addr) == REG
2866 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2867 || regno == HARD_FRAME_POINTER_REGNUM
2868 || regno == ARG_POINTER_REGNUM))
2869 || GET_CODE (addr) == ADDRESSOF
2870 || CONSTANT_ADDRESS_P (addr))
2873 /* If this address is not simply a register, try to fold it. This will
2874 sometimes simplify the expression. Many simplifications
2875 will not be valid, but some, usually applying the associative rule, will
2876 be valid and produce better code. */
2877 if (GET_CODE (addr) != REG)
2879 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2883 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2884 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2885 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2887 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2889 && validate_change (insn, loc, folded, 0))
2893 /* If this address is not in the hash table, we can't look for equivalences
2894 of the whole address. Also, ignore if volatile. */
2897 hash = HASH (addr, Pmode);
2898 addr_volatile = do_not_record;
2899 do_not_record = save_do_not_record;
2900 hash_arg_in_memory = save_hash_arg_in_memory;
2901 hash_arg_in_struct = save_hash_arg_in_struct;
2906 elt = lookup (addr, hash, Pmode);
2908 #ifndef ADDRESS_COST
2911 int our_cost = elt->cost;
2913 /* Find the lowest cost below ours that works. */
2914 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2915 if (elt->cost < our_cost
2916 && (GET_CODE (elt->exp) == REG
2917 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2918 && validate_change (insn, loc,
2919 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2926 /* We need to find the best (under the criteria documented above) entry
2927 in the class that is valid. We use the `flag' field to indicate
2928 choices that were invalid and iterate until we can't find a better
2929 one that hasn't already been tried. */
2931 for (p = elt->first_same_value; p; p = p->next_same_value)
2934 while (found_better)
2936 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2937 int best_rtx_cost = (elt->cost + 1) >> 1;
2938 struct table_elt *best_elt = elt;
2941 for (p = elt->first_same_value; p; p = p->next_same_value)
2944 if ((GET_CODE (p->exp) == REG
2945 || exp_equiv_p (p->exp, p->exp, 1, 0))
2946 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2947 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2948 && (p->cost + 1) >> 1 > best_rtx_cost)))
2951 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2952 best_rtx_cost = (p->cost + 1) >> 1;
2959 if (validate_change (insn, loc,
2960 canon_reg (copy_rtx (best_elt->exp),
2969 /* If the address is a binary operation with the first operand a register
2970 and the second a constant, do the same as above, but looking for
2971 equivalences of the register. Then try to simplify before checking for
2972 the best address to use. This catches a few cases: First is when we
2973 have REG+const and the register is another REG+const. We can often merge
2974 the constants and eliminate one insn and one register. It may also be
2975 that a machine has a cheap REG+REG+const. Finally, this improves the
2976 code on the Alpha for unaligned byte stores. */
2978 if (flag_expensive_optimizations
2979 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2980 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2981 && GET_CODE (XEXP (*loc, 0)) == REG
2982 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2984 rtx c = XEXP (*loc, 1);
2987 hash = HASH (XEXP (*loc, 0), Pmode);
2988 do_not_record = save_do_not_record;
2989 hash_arg_in_memory = save_hash_arg_in_memory;
2990 hash_arg_in_struct = save_hash_arg_in_struct;
2992 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2996 /* We need to find the best (under the criteria documented above) entry
2997 in the class that is valid. We use the `flag' field to indicate
2998 choices that were invalid and iterate until we can't find a better
2999 one that hasn't already been tried. */
3001 for (p = elt->first_same_value; p; p = p->next_same_value)
3004 while (found_better)
3006 int best_addr_cost = CSE_ADDRESS_COST (*loc);
3007 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3008 struct table_elt *best_elt = elt;
3009 rtx best_rtx = *loc;
3012 /* This is at worst case an O(n^2) algorithm, so limit our search
3013 to the first 32 elements on the list. This avoids trouble
3014 compiling code with very long basic blocks that can easily
3015 call simplify_gen_binary so many times that we run out of
3019 for (p = elt->first_same_value, count = 0;
3021 p = p->next_same_value, count++)
3023 && (GET_CODE (p->exp) == REG
3024 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3026 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3029 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3030 || (CSE_ADDRESS_COST (new) == best_addr_cost
3031 && (COST (new) + 1) >> 1 > best_rtx_cost)))
3034 best_addr_cost = CSE_ADDRESS_COST (new);
3035 best_rtx_cost = (COST (new) + 1) >> 1;
3043 if (validate_change (insn, loc,
3044 canon_reg (copy_rtx (best_rtx),
3055 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3056 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3057 what values are being compared.
3059 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3060 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3061 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3062 compared to produce cc0.
3064 The return value is the comparison operator and is either the code of
3065 A or the code corresponding to the inverse of the comparison. */
3067 static enum rtx_code
3068 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3071 enum machine_mode *pmode1, *pmode2;
3075 arg1 = *parg1, arg2 = *parg2;
3077 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3079 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3081 /* Set non-zero when we find something of interest. */
3083 int reverse_code = 0;
3084 struct table_elt *p = 0;
3086 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3087 On machines with CC0, this is the only case that can occur, since
3088 fold_rtx will return the COMPARE or item being compared with zero
3091 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3094 /* If ARG1 is a comparison operator and CODE is testing for
3095 STORE_FLAG_VALUE, get the inner arguments. */
3097 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3100 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3101 && code == LT && STORE_FLAG_VALUE == -1)
3102 #ifdef FLOAT_STORE_FLAG_VALUE
3103 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3104 && FLOAT_STORE_FLAG_VALUE < 0)
3109 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3110 && code == GE && STORE_FLAG_VALUE == -1)
3111 #ifdef FLOAT_STORE_FLAG_VALUE
3112 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3113 && FLOAT_STORE_FLAG_VALUE < 0)
3116 x = arg1, reverse_code = 1;
3119 /* ??? We could also check for
3121 (ne (and (eq (...) (const_int 1))) (const_int 0))
3123 and related forms, but let's wait until we see them occurring. */
3126 /* Look up ARG1 in the hash table and see if it has an equivalence
3127 that lets us see what is being compared. */
3128 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3130 if (p) p = p->first_same_value;
3132 for (; p; p = p->next_same_value)
3134 enum machine_mode inner_mode = GET_MODE (p->exp);
3136 /* If the entry isn't valid, skip it. */
3137 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3140 if (GET_CODE (p->exp) == COMPARE
3141 /* Another possibility is that this machine has a compare insn
3142 that includes the comparison code. In that case, ARG1 would
3143 be equivalent to a comparison operation that would set ARG1 to
3144 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3145 ORIG_CODE is the actual comparison being done; if it is an EQ,
3146 we must reverse ORIG_CODE. On machine with a negative value
3147 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3150 && GET_MODE_CLASS (inner_mode) == MODE_INT
3151 && (GET_MODE_BITSIZE (inner_mode)
3152 <= HOST_BITS_PER_WIDE_INT)
3153 && (STORE_FLAG_VALUE
3154 & ((HOST_WIDE_INT) 1
3155 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3156 #ifdef FLOAT_STORE_FLAG_VALUE
3158 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3159 && FLOAT_STORE_FLAG_VALUE < 0)
3162 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3167 else if ((code == EQ
3169 && GET_MODE_CLASS (inner_mode) == MODE_INT
3170 && (GET_MODE_BITSIZE (inner_mode)
3171 <= HOST_BITS_PER_WIDE_INT)
3172 && (STORE_FLAG_VALUE
3173 & ((HOST_WIDE_INT) 1
3174 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3175 #ifdef FLOAT_STORE_FLAG_VALUE
3177 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3178 && FLOAT_STORE_FLAG_VALUE < 0)
3181 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3188 /* If this is fp + constant, the equivalent is a better operand since
3189 it may let us predict the value of the comparison. */
3190 else if (NONZERO_BASE_PLUS_P (p->exp))
3197 /* If we didn't find a useful equivalence for ARG1, we are done.
3198 Otherwise, set up for the next iteration. */
3202 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3203 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3204 code = GET_CODE (x);
3207 code = reverse_condition (code);
3210 /* Return our results. Return the modes from before fold_rtx
3211 because fold_rtx might produce const_int, and then it's too late. */
3212 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3213 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3218 /* If X is a nontrivial arithmetic operation on an argument
3219 for which a constant value can be determined, return
3220 the result of operating on that value, as a constant.
3221 Otherwise, return X, possibly with one or more operands
3222 modified by recursive calls to this function.
3224 If X is a register whose contents are known, we do NOT
3225 return those contents here. equiv_constant is called to
3228 INSN is the insn that we may be modifying. If it is 0, make a copy
3229 of X before modifying it. */
3236 register enum rtx_code code;
3237 register enum machine_mode mode;
3238 register const char *fmt;
3244 /* Folded equivalents of first two operands of X. */
3248 /* Constant equivalents of first three operands of X;
3249 0 when no such equivalent is known. */
3254 /* The mode of the first operand of X. We need this for sign and zero
3256 enum machine_mode mode_arg0;
3261 mode = GET_MODE (x);
3262 code = GET_CODE (x);
3271 /* No use simplifying an EXPR_LIST
3272 since they are used only for lists of args
3273 in a function call's REG_EQUAL note. */
3275 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3276 want to (e.g.,) make (addressof (const_int 0)) just because
3277 the location is known to be zero. */
3283 return prev_insn_cc0;
3287 /* If the next insn is a CODE_LABEL followed by a jump table,
3288 PC's value is a LABEL_REF pointing to that label. That
3289 lets us fold switch statements on the Vax. */
3290 if (insn && GET_CODE (insn) == JUMP_INSN)
3292 rtx next = next_nonnote_insn (insn);
3294 if (next && GET_CODE (next) == CODE_LABEL
3295 && NEXT_INSN (next) != 0
3296 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3297 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3298 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3299 return gen_rtx_LABEL_REF (Pmode, next);
3304 /* See if we previously assigned a constant value to this SUBREG. */
3305 if ((new = lookup_as_function (x, CONST_INT)) != 0
3306 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3309 /* If this is a paradoxical SUBREG, we have no idea what value the
3310 extra bits would have. However, if the operand is equivalent
3311 to a SUBREG whose operand is the same as our mode, and all the
3312 modes are within a word, we can just use the inner operand
3313 because these SUBREGs just say how to treat the register.
3315 Similarly if we find an integer constant. */
3317 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3319 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3320 struct table_elt *elt;
3322 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3323 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3324 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3326 for (elt = elt->first_same_value;
3327 elt; elt = elt->next_same_value)
3329 if (CONSTANT_P (elt->exp)
3330 && GET_MODE (elt->exp) == VOIDmode)
3333 if (GET_CODE (elt->exp) == SUBREG
3334 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3335 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3336 return copy_rtx (SUBREG_REG (elt->exp));
3342 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3343 We might be able to if the SUBREG is extracting a single word in an
3344 integral mode or extracting the low part. */
3346 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3347 const_arg0 = equiv_constant (folded_arg0);
3349 folded_arg0 = const_arg0;
3351 if (folded_arg0 != SUBREG_REG (x))
3355 if (GET_MODE_CLASS (mode) == MODE_INT
3356 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3357 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3358 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3359 GET_MODE (SUBREG_REG (x)));
3360 if (new == 0 && subreg_lowpart_p (x))
3361 new = gen_lowpart_if_possible (mode, folded_arg0);
3366 /* If this is a narrowing SUBREG and our operand is a REG, see if
3367 we can find an equivalence for REG that is an arithmetic operation
3368 in a wider mode where both operands are paradoxical SUBREGs
3369 from objects of our result mode. In that case, we couldn't report
3370 an equivalent value for that operation, since we don't know what the
3371 extra bits will be. But we can find an equivalence for this SUBREG
3372 by folding that operation is the narrow mode. This allows us to
3373 fold arithmetic in narrow modes when the machine only supports
3374 word-sized arithmetic.
3376 Also look for a case where we have a SUBREG whose operand is the
3377 same as our result. If both modes are smaller than a word, we
3378 are simply interpreting a register in different modes and we
3379 can use the inner value. */
3381 if (GET_CODE (folded_arg0) == REG
3382 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3383 && subreg_lowpart_p (x))
3385 struct table_elt *elt;
3387 /* We can use HASH here since we know that canon_hash won't be
3389 elt = lookup (folded_arg0,
3390 HASH (folded_arg0, GET_MODE (folded_arg0)),
3391 GET_MODE (folded_arg0));
3394 elt = elt->first_same_value;
3396 for (; elt; elt = elt->next_same_value)
3398 enum rtx_code eltcode = GET_CODE (elt->exp);
3400 /* Just check for unary and binary operations. */
3401 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3402 && GET_CODE (elt->exp) != SIGN_EXTEND
3403 && GET_CODE (elt->exp) != ZERO_EXTEND
3404 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3405 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3407 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3409 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3410 op0 = fold_rtx (op0, NULL_RTX);
3412 op0 = equiv_constant (op0);
3414 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3417 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3418 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3419 && eltcode != DIV && eltcode != MOD
3420 && eltcode != UDIV && eltcode != UMOD
3421 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3422 && eltcode != ROTATE && eltcode != ROTATERT
3423 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3424 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3426 || CONSTANT_P (XEXP (elt->exp, 0)))
3427 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3428 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3430 || CONSTANT_P (XEXP (elt->exp, 1))))
3432 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3433 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3435 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3436 op0 = fold_rtx (op0, NULL_RTX);
3439 op0 = equiv_constant (op0);
3441 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3442 op1 = fold_rtx (op1, NULL_RTX);
3445 op1 = equiv_constant (op1);
3447 /* If we are looking for the low SImode part of
3448 (ashift:DI c (const_int 32)), it doesn't work
3449 to compute that in SImode, because a 32-bit shift
3450 in SImode is unpredictable. We know the value is 0. */
3452 && GET_CODE (elt->exp) == ASHIFT
3453 && GET_CODE (op1) == CONST_INT
3454 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3456 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3458 /* If the count fits in the inner mode's width,
3459 but exceeds the outer mode's width,
3460 the value will get truncated to 0
3464 /* If the count exceeds even the inner mode's width,
3465 don't fold this expression. */
3468 else if (op0 && op1)
3469 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3473 else if (GET_CODE (elt->exp) == SUBREG
3474 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3475 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3477 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3478 new = copy_rtx (SUBREG_REG (elt->exp));
3489 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3490 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3491 new = lookup_as_function (XEXP (x, 0), code);
3493 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3497 /* If we are not actually processing an insn, don't try to find the
3498 best address. Not only don't we care, but we could modify the
3499 MEM in an invalid way since we have no insn to validate against. */
3501 find_best_addr (insn, &XEXP (x, 0));
3504 /* Even if we don't fold in the insn itself,
3505 we can safely do so here, in hopes of getting a constant. */
3506 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3508 HOST_WIDE_INT offset = 0;
3510 if (GET_CODE (addr) == REG
3511 && REGNO_QTY_VALID_P (REGNO (addr))
3512 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
3513 && qty_const[REG_QTY (REGNO (addr))] != 0)
3514 addr = qty_const[REG_QTY (REGNO (addr))];
3516 /* If address is constant, split it into a base and integer offset. */
3517 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3519 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3520 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3522 base = XEXP (XEXP (addr, 0), 0);
3523 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3525 else if (GET_CODE (addr) == LO_SUM
3526 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3527 base = XEXP (addr, 1);
3528 else if (GET_CODE (addr) == ADDRESSOF)
3529 return change_address (x, VOIDmode, addr);
3531 /* If this is a constant pool reference, we can fold it into its
3532 constant to allow better value tracking. */
3533 if (base && GET_CODE (base) == SYMBOL_REF
3534 && CONSTANT_POOL_ADDRESS_P (base))
3536 rtx constant = get_pool_constant (base);
3537 enum machine_mode const_mode = get_pool_mode (base);
3540 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3541 constant_pool_entries_cost = COST (constant);
3543 /* If we are loading the full constant, we have an equivalence. */
3544 if (offset == 0 && mode == const_mode)
3547 /* If this actually isn't a constant (weird!), we can't do
3548 anything. Otherwise, handle the two most common cases:
3549 extracting a word from a multi-word constant, and extracting
3550 the low-order bits. Other cases don't seem common enough to
3552 if (! CONSTANT_P (constant))
3555 if (GET_MODE_CLASS (mode) == MODE_INT
3556 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3557 && offset % UNITS_PER_WORD == 0
3558 && (new = operand_subword (constant,
3559 offset / UNITS_PER_WORD,
3560 0, const_mode)) != 0)
3563 if (((BYTES_BIG_ENDIAN
3564 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3565 || (! BYTES_BIG_ENDIAN && offset == 0))
3566 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3570 /* If this is a reference to a label at a known position in a jump
3571 table, we also know its value. */
3572 if (base && GET_CODE (base) == LABEL_REF)
3574 rtx label = XEXP (base, 0);
3575 rtx table_insn = NEXT_INSN (label);
3577 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3578 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3580 rtx table = PATTERN (table_insn);
3583 && (offset / GET_MODE_SIZE (GET_MODE (table))
3584 < XVECLEN (table, 0)))
3585 return XVECEXP (table, 0,
3586 offset / GET_MODE_SIZE (GET_MODE (table)));
3588 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3589 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3591 rtx table = PATTERN (table_insn);
3594 && (offset / GET_MODE_SIZE (GET_MODE (table))
3595 < XVECLEN (table, 1)))
3597 offset /= GET_MODE_SIZE (GET_MODE (table));
3598 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3601 if (GET_MODE (table) != Pmode)
3602 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3604 /* Indicate this is a constant. This isn't a
3605 valid form of CONST, but it will only be used
3606 to fold the next insns and then discarded, so
3609 Note this expression must be explicitly discarded,
3610 by cse_insn, else it may end up in a REG_EQUAL note
3611 and "escape" to cause problems elsewhere. */
3612 return gen_rtx_CONST (GET_MODE (new), new);
3621 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3622 validate_change (insn, &XVECEXP (x, 3, i),
3623 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3633 mode_arg0 = VOIDmode;
3635 /* Try folding our operands.
3636 Then see which ones have constant values known. */
3638 fmt = GET_RTX_FORMAT (code);
3639 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3642 rtx arg = XEXP (x, i);
3643 rtx folded_arg = arg, const_arg = 0;
3644 enum machine_mode mode_arg = GET_MODE (arg);
3645 rtx cheap_arg, expensive_arg;
3646 rtx replacements[2];
3649 /* Most arguments are cheap, so handle them specially. */
3650 switch (GET_CODE (arg))
3653 /* This is the same as calling equiv_constant; it is duplicated
3655 if (REGNO_QTY_VALID_P (REGNO (arg))
3656 && qty_const[REG_QTY (REGNO (arg))] != 0
3657 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
3658 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
3660 = gen_lowpart_if_possible (GET_MODE (arg),
3661 qty_const[REG_QTY (REGNO (arg))]);
3674 folded_arg = prev_insn_cc0;
3675 mode_arg = prev_insn_cc0_mode;
3676 const_arg = equiv_constant (folded_arg);
3681 folded_arg = fold_rtx (arg, insn);
3682 const_arg = equiv_constant (folded_arg);
3685 /* For the first three operands, see if the operand
3686 is constant or equivalent to a constant. */
3690 folded_arg0 = folded_arg;
3691 const_arg0 = const_arg;
3692 mode_arg0 = mode_arg;
3695 folded_arg1 = folded_arg;
3696 const_arg1 = const_arg;
3699 const_arg2 = const_arg;
3703 /* Pick the least expensive of the folded argument and an
3704 equivalent constant argument. */
3705 if (const_arg == 0 || const_arg == folded_arg
3706 || COST (const_arg) > COST (folded_arg))
3707 cheap_arg = folded_arg, expensive_arg = const_arg;
3709 cheap_arg = const_arg, expensive_arg = folded_arg;
3711 /* Try to replace the operand with the cheapest of the two
3712 possibilities. If it doesn't work and this is either of the first
3713 two operands of a commutative operation, try swapping them.
3714 If THAT fails, try the more expensive, provided it is cheaper
3715 than what is already there. */
3717 if (cheap_arg == XEXP (x, i))
3720 if (insn == 0 && ! copied)
3726 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3728 j < 2 && replacements[j]
3729 && COST (replacements[j]) < COST (XEXP (x, i));
3732 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3735 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3737 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3738 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3740 if (apply_change_group ())
3742 /* Swap them back to be invalid so that this loop can
3743 continue and flag them to be swapped back later. */
3746 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3758 /* Don't try to fold inside of a vector of expressions.
3759 Doing nothing is harmless. */
3763 /* If a commutative operation, place a constant integer as the second
3764 operand unless the first operand is also a constant integer. Otherwise,
3765 place any constant second unless the first operand is also a constant. */
3767 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3769 if (must_swap || (const_arg0
3771 || (GET_CODE (const_arg0) == CONST_INT
3772 && GET_CODE (const_arg1) != CONST_INT))))
3774 register rtx tem = XEXP (x, 0);
3776 if (insn == 0 && ! copied)
3782 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3783 validate_change (insn, &XEXP (x, 1), tem, 1);
3784 if (apply_change_group ())
3786 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3787 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3792 /* If X is an arithmetic operation, see if we can simplify it. */
3794 switch (GET_RTX_CLASS (code))
3800 /* We can't simplify extension ops unless we know the
3802 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3803 && mode_arg0 == VOIDmode)
3806 /* If we had a CONST, strip it off and put it back later if we
3808 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3809 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3811 new = simplify_unary_operation (code, mode,
3812 const_arg0 ? const_arg0 : folded_arg0,
3814 if (new != 0 && is_const)
3815 new = gen_rtx_CONST (mode, new);
3820 /* See what items are actually being compared and set FOLDED_ARG[01]
3821 to those values and CODE to the actual comparison code. If any are
3822 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3823 do anything if both operands are already known to be constant. */
3825 if (const_arg0 == 0 || const_arg1 == 0)
3827 struct table_elt *p0, *p1;
3828 rtx true = const_true_rtx, false = const0_rtx;
3829 enum machine_mode mode_arg1;
3831 #ifdef FLOAT_STORE_FLAG_VALUE
3832 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3834 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3836 false = CONST0_RTX (mode);
3840 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3841 &mode_arg0, &mode_arg1);
3842 const_arg0 = equiv_constant (folded_arg0);
3843 const_arg1 = equiv_constant (folded_arg1);
3845 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3846 what kinds of things are being compared, so we can't do
3847 anything with this comparison. */
3849 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3852 /* If we do not now have two constants being compared, see
3853 if we can nevertheless deduce some things about the
3855 if (const_arg0 == 0 || const_arg1 == 0)
3857 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3858 non-explicit constant? These aren't zero, but we
3859 don't know their sign. */
3860 if (const_arg1 == const0_rtx
3861 && (NONZERO_BASE_PLUS_P (folded_arg0)
3862 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3864 || GET_CODE (folded_arg0) == SYMBOL_REF
3866 || GET_CODE (folded_arg0) == LABEL_REF
3867 || GET_CODE (folded_arg0) == CONST))
3871 else if (code == NE)
3875 /* See if the two operands are the same. We don't do this
3876 for IEEE floating-point since we can't assume x == x
3877 since x might be a NaN. */
3879 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3880 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3881 && (folded_arg0 == folded_arg1
3882 || (GET_CODE (folded_arg0) == REG
3883 && GET_CODE (folded_arg1) == REG
3884 && (REG_QTY (REGNO (folded_arg0))
3885 == REG_QTY (REGNO (folded_arg1))))
3886 || ((p0 = lookup (folded_arg0,
3887 (safe_hash (folded_arg0, mode_arg0)
3888 % NBUCKETS), mode_arg0))
3889 && (p1 = lookup (folded_arg1,
3890 (safe_hash (folded_arg1, mode_arg0)
3891 % NBUCKETS), mode_arg0))
3892 && p0->first_same_value == p1->first_same_value)))
3893 return ((code == EQ || code == LE || code == GE
3894 || code == LEU || code == GEU)
3897 /* If FOLDED_ARG0 is a register, see if the comparison we are
3898 doing now is either the same as we did before or the reverse
3899 (we only check the reverse if not floating-point). */
3900 else if (GET_CODE (folded_arg0) == REG)
3902 int qty = REG_QTY (REGNO (folded_arg0));
3904 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
3905 && (comparison_dominates_p (qty_comparison_code[qty], code)
3906 || (comparison_dominates_p (qty_comparison_code[qty],
3907 reverse_condition (code))
3908 && ! FLOAT_MODE_P (mode_arg0)))
3909 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
3911 && rtx_equal_p (qty_comparison_const[qty],
3913 || (GET_CODE (folded_arg1) == REG
3914 && (REG_QTY (REGNO (folded_arg1))
3915 == qty_comparison_qty[qty]))))
3916 return (comparison_dominates_p (qty_comparison_code[qty],
3923 /* If we are comparing against zero, see if the first operand is
3924 equivalent to an IOR with a constant. If so, we may be able to
3925 determine the result of this comparison. */
3927 if (const_arg1 == const0_rtx)
3929 rtx y = lookup_as_function (folded_arg0, IOR);
3933 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3934 && GET_CODE (inner_const) == CONST_INT
3935 && INTVAL (inner_const) != 0)
3937 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3938 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3939 && (INTVAL (inner_const)
3940 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3941 rtx true = const_true_rtx, false = const0_rtx;
3943 #ifdef FLOAT_STORE_FLAG_VALUE
3944 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3946 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3948 false = CONST0_RTX (mode);
3972 new = simplify_relational_operation (code, mode_arg0,
3973 const_arg0 ? const_arg0 : folded_arg0,
3974 const_arg1 ? const_arg1 : folded_arg1);
3975 #ifdef FLOAT_STORE_FLAG_VALUE
3976 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3977 new = ((new == const0_rtx) ? CONST0_RTX (mode)
3978 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
3987 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3988 with that LABEL_REF as its second operand. If so, the result is
3989 the first operand of that MINUS. This handles switches with an
3990 ADDR_DIFF_VEC table. */
3991 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3994 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3995 : lookup_as_function (folded_arg0, MINUS);
3997 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3998 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4001 /* Now try for a CONST of a MINUS like the above. */
4002 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4003 : lookup_as_function (folded_arg0, CONST))) != 0
4004 && GET_CODE (XEXP (y, 0)) == MINUS
4005 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4006 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
4007 return XEXP (XEXP (y, 0), 0);
4010 /* Likewise if the operands are in the other order. */
4011 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4014 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4015 : lookup_as_function (folded_arg1, MINUS);
4017 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4018 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4021 /* Now try for a CONST of a MINUS like the above. */
4022 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4023 : lookup_as_function (folded_arg1, CONST))) != 0
4024 && GET_CODE (XEXP (y, 0)) == MINUS
4025 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4026 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
4027 return XEXP (XEXP (y, 0), 0);
4030 /* If second operand is a register equivalent to a negative
4031 CONST_INT, see if we can find a register equivalent to the
4032 positive constant. Make a MINUS if so. Don't do this for
4033 a non-negative constant since we might then alternate between
4034 chosing positive and negative constants. Having the positive
4035 constant previously-used is the more common case. Be sure
4036 the resulting constant is non-negative; if const_arg1 were
4037 the smallest negative number this would overflow: depending
4038 on the mode, this would either just be the same value (and
4039 hence not save anything) or be incorrect. */
4040 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4041 && INTVAL (const_arg1) < 0
4042 /* This used to test
4044 - INTVAL (const_arg1) >= 0
4046 But The Sun V5.0 compilers mis-compiled that test. So
4047 instead we test for the problematic value in a more direct
4048 manner and hope the Sun compilers get it correct. */
4049 && INTVAL (const_arg1) !=
4050 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4051 && GET_CODE (folded_arg1) == REG)
4053 rtx new_const = GEN_INT (- INTVAL (const_arg1));
4055 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
4059 for (p = p->first_same_value; p; p = p->next_same_value)
4060 if (GET_CODE (p->exp) == REG)
4061 return simplify_gen_binary (MINUS, mode, folded_arg0,
4062 canon_reg (p->exp, NULL_RTX));
4067 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4068 If so, produce (PLUS Z C2-C). */
4069 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4071 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4072 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4073 return fold_rtx (plus_constant (copy_rtx (y),
4074 -INTVAL (const_arg1)),
4078 /* ... fall through ... */
4081 case SMIN: case SMAX: case UMIN: case UMAX:
4082 case IOR: case AND: case XOR:
4083 case MULT: case DIV: case UDIV:
4084 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4085 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4086 is known to be of similar form, we may be able to replace the
4087 operation with a combined operation. This may eliminate the
4088 intermediate operation if every use is simplified in this way.
4089 Note that the similar optimization done by combine.c only works
4090 if the intermediate operation's result has only one reference. */
4092 if (GET_CODE (folded_arg0) == REG
4093 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4096 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4097 rtx y = lookup_as_function (folded_arg0, code);
4099 enum rtx_code associate_code;
4103 || 0 == (inner_const
4104 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4105 || GET_CODE (inner_const) != CONST_INT
4106 /* If we have compiled a statement like
4107 "if (x == (x & mask1))", and now are looking at
4108 "x & mask2", we will have a case where the first operand
4109 of Y is the same as our first operand. Unless we detect
4110 this case, an infinite loop will result. */
4111 || XEXP (y, 0) == folded_arg0)
4114 /* Don't associate these operations if they are a PLUS with the
4115 same constant and it is a power of two. These might be doable
4116 with a pre- or post-increment. Similarly for two subtracts of
4117 identical powers of two with post decrement. */
4119 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4120 && ((HAVE_PRE_INCREMENT
4121 && exact_log2 (INTVAL (const_arg1)) >= 0)
4122 || (HAVE_POST_INCREMENT
4123 && exact_log2 (INTVAL (const_arg1)) >= 0)
4124 || (HAVE_PRE_DECREMENT
4125 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4126 || (HAVE_POST_DECREMENT
4127 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4130 /* Compute the code used to compose the constants. For example,
4131 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4134 = (code == MULT || code == DIV || code == UDIV ? MULT
4135 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4137 new_const = simplify_binary_operation (associate_code, mode,
4138 const_arg1, inner_const);
4143 /* If we are associating shift operations, don't let this
4144 produce a shift of the size of the object or larger.
4145 This could occur when we follow a sign-extend by a right
4146 shift on a machine that does a sign-extend as a pair
4149 if (is_shift && GET_CODE (new_const) == CONST_INT
4150 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4152 /* As an exception, we can turn an ASHIFTRT of this
4153 form into a shift of the number of bits - 1. */
4154 if (code == ASHIFTRT)
4155 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4160 y = copy_rtx (XEXP (y, 0));
4162 /* If Y contains our first operand (the most common way this
4163 can happen is if Y is a MEM), we would do into an infinite
4164 loop if we tried to fold it. So don't in that case. */
4166 if (! reg_mentioned_p (folded_arg0, y))
4167 y = fold_rtx (y, insn);
4169 return simplify_gen_binary (code, mode, y, new_const);
4177 new = simplify_binary_operation (code, mode,
4178 const_arg0 ? const_arg0 : folded_arg0,
4179 const_arg1 ? const_arg1 : folded_arg1);
4183 /* (lo_sum (high X) X) is simply X. */
4184 if (code == LO_SUM && const_arg0 != 0
4185 && GET_CODE (const_arg0) == HIGH
4186 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4192 new = simplify_ternary_operation (code, mode, mode_arg0,
4193 const_arg0 ? const_arg0 : folded_arg0,
4194 const_arg1 ? const_arg1 : folded_arg1,
4195 const_arg2 ? const_arg2 : XEXP (x, 2));
4199 /* Always eliminate CONSTANT_P_RTX at this stage. */
4200 if (code == CONSTANT_P_RTX)
4201 return (const_arg0 ? const1_rtx : const0_rtx);
4205 return new ? new : x;
4208 /* Return a constant value currently equivalent to X.
4209 Return 0 if we don't know one. */
4215 if (GET_CODE (x) == REG
4216 && REGNO_QTY_VALID_P (REGNO (x))
4217 && qty_const[REG_QTY (REGNO (x))])
4218 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
4220 if (x == 0 || CONSTANT_P (x))
4223 /* If X is a MEM, try to fold it outside the context of any insn to see if
4224 it might be equivalent to a constant. That handles the case where it
4225 is a constant-pool reference. Then try to look it up in the hash table
4226 in case it is something whose value we have seen before. */
4228 if (GET_CODE (x) == MEM)
4230 struct table_elt *elt;
4232 x = fold_rtx (x, NULL_RTX);
4236 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
4240 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4241 if (elt->is_const && CONSTANT_P (elt->exp))
4248 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4249 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4250 least-significant part of X.
4251 MODE specifies how big a part of X to return.
4253 If the requested operation cannot be done, 0 is returned.
4255 This is similar to gen_lowpart in emit-rtl.c. */
4258 gen_lowpart_if_possible (mode, x)
4259 enum machine_mode mode;
4262 rtx result = gen_lowpart_common (mode, x);
4266 else if (GET_CODE (x) == MEM)
4268 /* This is the only other case we handle. */
4269 register int offset = 0;
4272 if (WORDS_BIG_ENDIAN)
4273 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4274 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4275 if (BYTES_BIG_ENDIAN)
4276 /* Adjust the address so that the address-after-the-data is
4278 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4279 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4280 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4281 if (! memory_address_p (mode, XEXP (new, 0)))
4283 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4284 MEM_COPY_ATTRIBUTES (new, x);
4291 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4292 branch. It will be zero if not.
4294 In certain cases, this can cause us to add an equivalence. For example,
4295 if we are following the taken case of
4297 we can add the fact that `i' and '2' are now equivalent.
4299 In any case, we can record that this comparison was passed. If the same
4300 comparison is seen later, we will know its value. */
4303 record_jump_equiv (insn, taken)
4307 int cond_known_true;
4309 enum machine_mode mode, mode0, mode1;
4310 int reversed_nonequality = 0;
4313 /* Ensure this is the right kind of insn. */
4314 if (! condjump_p (insn) || simplejump_p (insn))
4317 /* See if this jump condition is known true or false. */
4319 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4321 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4323 /* Get the type of comparison being done and the operands being compared.
4324 If we had to reverse a non-equality condition, record that fact so we
4325 know that it isn't valid for floating-point. */
4326 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4327 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4328 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4330 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4331 if (! cond_known_true)
4333 reversed_nonequality = (code != EQ && code != NE);
4334 code = reverse_condition (code);
4337 /* The mode is the mode of the non-constant. */
4339 if (mode1 != VOIDmode)
4342 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4345 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4346 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4347 Make any useful entries we can with that information. Called from
4348 above function and called recursively. */
4351 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4353 enum machine_mode mode;
4355 int reversed_nonequality;
4357 unsigned op0_hash, op1_hash;
4358 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
4359 struct table_elt *op0_elt, *op1_elt;
4361 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4362 we know that they are also equal in the smaller mode (this is also
4363 true for all smaller modes whether or not there is a SUBREG, but
4364 is not worth testing for with no SUBREG). */
4366 /* Note that GET_MODE (op0) may not equal MODE. */
4367 if (code == EQ && GET_CODE (op0) == SUBREG
4368 && (GET_MODE_SIZE (GET_MODE (op0))
4369 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4371 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4372 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4374 record_jump_cond (code, mode, SUBREG_REG (op0),
4375 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4376 reversed_nonequality);
4379 if (code == EQ && GET_CODE (op1) == SUBREG
4380 && (GET_MODE_SIZE (GET_MODE (op1))
4381 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4383 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4384 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4386 record_jump_cond (code, mode, SUBREG_REG (op1),
4387 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4388 reversed_nonequality);
4391 /* Similarly, if this is an NE comparison, and either is a SUBREG
4392 making a smaller mode, we know the whole thing is also NE. */
4394 /* Note that GET_MODE (op0) may not equal MODE;
4395 if we test MODE instead, we can get an infinite recursion
4396 alternating between two modes each wider than MODE. */
4398 if (code == NE && GET_CODE (op0) == SUBREG
4399 && subreg_lowpart_p (op0)
4400 && (GET_MODE_SIZE (GET_MODE (op0))
4401 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4403 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4404 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4406 record_jump_cond (code, mode, SUBREG_REG (op0),
4407 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4408 reversed_nonequality);
4411 if (code == NE && GET_CODE (op1) == SUBREG
4412 && subreg_lowpart_p (op1)
4413 && (GET_MODE_SIZE (GET_MODE (op1))
4414 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4416 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4417 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4419 record_jump_cond (code, mode, SUBREG_REG (op1),
4420 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4421 reversed_nonequality);
4424 /* Hash both operands. */
4427 hash_arg_in_memory = 0;
4428 hash_arg_in_struct = 0;
4429 op0_hash = HASH (op0, mode);
4430 op0_in_memory = hash_arg_in_memory;
4431 op0_in_struct = hash_arg_in_struct;
4437 hash_arg_in_memory = 0;
4438 hash_arg_in_struct = 0;
4439 op1_hash = HASH (op1, mode);
4440 op1_in_memory = hash_arg_in_memory;
4441 op1_in_struct = hash_arg_in_struct;
4446 /* Look up both operands. */
4447 op0_elt = lookup (op0, op0_hash, mode);
4448 op1_elt = lookup (op1, op1_hash, mode);
4450 /* If both operands are already equivalent or if they are not in the
4451 table but are identical, do nothing. */
4452 if ((op0_elt != 0 && op1_elt != 0
4453 && op0_elt->first_same_value == op1_elt->first_same_value)
4454 || op0 == op1 || rtx_equal_p (op0, op1))
4457 /* If we aren't setting two things equal all we can do is save this
4458 comparison. Similarly if this is floating-point. In the latter
4459 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4460 If we record the equality, we might inadvertently delete code
4461 whose intent was to change -0 to +0. */
4463 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4465 /* If we reversed a floating-point comparison, if OP0 is not a
4466 register, or if OP1 is neither a register or constant, we can't
4469 if (GET_CODE (op1) != REG)
4470 op1 = equiv_constant (op1);
4472 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4473 || GET_CODE (op0) != REG || op1 == 0)
4476 /* Put OP0 in the hash table if it isn't already. This gives it a
4477 new quantity number. */
4480 if (insert_regs (op0, NULL_PTR, 0))
4482 rehash_using_reg (op0);
4483 op0_hash = HASH (op0, mode);
4485 /* If OP0 is contained in OP1, this changes its hash code
4486 as well. Faster to rehash than to check, except
4487 for the simple case of a constant. */
4488 if (! CONSTANT_P (op1))
4489 op1_hash = HASH (op1,mode);
4492 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4493 op0_elt->in_memory = op0_in_memory;
4494 op0_elt->in_struct = op0_in_struct;
4497 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
4498 if (GET_CODE (op1) == REG)
4500 /* Look it up again--in case op0 and op1 are the same. */
4501 op1_elt = lookup (op1, op1_hash, mode);
4503 /* Put OP1 in the hash table so it gets a new quantity number. */
4506 if (insert_regs (op1, NULL_PTR, 0))
4508 rehash_using_reg (op1);
4509 op1_hash = HASH (op1, mode);
4512 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4513 op1_elt->in_memory = op1_in_memory;
4514 op1_elt->in_struct = op1_in_struct;
4517 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
4518 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
4522 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
4523 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
4529 /* If either side is still missing an equivalence, make it now,
4530 then merge the equivalences. */
4534 if (insert_regs (op0, NULL_PTR, 0))
4536 rehash_using_reg (op0);
4537 op0_hash = HASH (op0, mode);
4540 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4541 op0_elt->in_memory = op0_in_memory;
4542 op0_elt->in_struct = op0_in_struct;
4547 if (insert_regs (op1, NULL_PTR, 0))
4549 rehash_using_reg (op1);
4550 op1_hash = HASH (op1, mode);
4553 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4554 op1_elt->in_memory = op1_in_memory;
4555 op1_elt->in_struct = op1_in_struct;
4558 merge_equiv_classes (op0_elt, op1_elt);
4559 last_jump_equiv_class = op0_elt;
4562 /* CSE processing for one instruction.
4563 First simplify sources and addresses of all assignments
4564 in the instruction, using previously-computed equivalents values.
4565 Then install the new sources and destinations in the table
4566 of available values.
4568 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4569 the insn. It means that INSN is inside libcall block. In this
4570 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4572 /* Data on one SET contained in the instruction. */
4576 /* The SET rtx itself. */
4578 /* The SET_SRC of the rtx (the original value, if it is changing). */
4580 /* The hash-table element for the SET_SRC of the SET. */
4581 struct table_elt *src_elt;
4582 /* Hash value for the SET_SRC. */
4584 /* Hash value for the SET_DEST. */
4586 /* The SET_DEST, with SUBREG, etc., stripped. */
4588 /* Nonzero if the SET_SRC is in memory. */
4590 /* Nonzero if the SET_SRC is in a structure. */
4592 /* Nonzero if the SET_SRC contains something
4593 whose value cannot be predicted and understood. */
4595 /* Original machine mode, in case it becomes a CONST_INT. */
4596 enum machine_mode mode;
4597 /* A constant equivalent for SET_SRC, if any. */
4599 /* Hash value of constant equivalent for SET_SRC. */
4600 unsigned src_const_hash;
4601 /* Table entry for constant equivalent for SET_SRC, if any. */
4602 struct table_elt *src_const_elt;
4606 cse_insn (insn, libcall_insn)
4610 register rtx x = PATTERN (insn);
4613 register int n_sets = 0;
4616 /* Records what this insn does to set CC0. */
4617 rtx this_insn_cc0 = 0;
4618 enum machine_mode this_insn_cc0_mode = VOIDmode;
4622 struct table_elt *src_eqv_elt = 0;
4623 int src_eqv_volatile = 0;
4624 int src_eqv_in_memory = 0;
4625 int src_eqv_in_struct = 0;
4626 unsigned src_eqv_hash = 0;
4628 struct set *sets = NULL_PTR;
4632 /* Find all the SETs and CLOBBERs in this instruction.
4633 Record all the SETs in the array `set' and count them.
4634 Also determine whether there is a CLOBBER that invalidates
4635 all memory references, or all references at varying addresses. */
4637 if (GET_CODE (insn) == CALL_INSN)
4639 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4640 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4641 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4644 if (GET_CODE (x) == SET)
4646 sets = (struct set *) alloca (sizeof (struct set));
4649 /* Ignore SETs that are unconditional jumps.
4650 They never need cse processing, so this does not hurt.
4651 The reason is not efficiency but rather
4652 so that we can test at the end for instructions
4653 that have been simplified to unconditional jumps
4654 and not be misled by unchanged instructions
4655 that were unconditional jumps to begin with. */
4656 if (SET_DEST (x) == pc_rtx
4657 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4660 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4661 The hard function value register is used only once, to copy to
4662 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4663 Ensure we invalidate the destination register. On the 80386 no
4664 other code would invalidate it since it is a fixed_reg.
4665 We need not check the return of apply_change_group; see canon_reg. */
4667 else if (GET_CODE (SET_SRC (x)) == CALL)
4669 canon_reg (SET_SRC (x), insn);
4670 apply_change_group ();
4671 fold_rtx (SET_SRC (x), insn);
4672 invalidate (SET_DEST (x), VOIDmode);
4677 else if (GET_CODE (x) == PARALLEL)
4679 register int lim = XVECLEN (x, 0);
4681 sets = (struct set *) alloca (lim * sizeof (struct set));
4683 /* Find all regs explicitly clobbered in this insn,
4684 and ensure they are not replaced with any other regs
4685 elsewhere in this insn.
4686 When a reg that is clobbered is also used for input,
4687 we should presume that that is for a reason,
4688 and we should not substitute some other register
4689 which is not supposed to be clobbered.
4690 Therefore, this loop cannot be merged into the one below
4691 because a CALL may precede a CLOBBER and refer to the
4692 value clobbered. We must not let a canonicalization do
4693 anything in that case. */
4694 for (i = 0; i < lim; i++)
4696 register rtx y = XVECEXP (x, 0, i);
4697 if (GET_CODE (y) == CLOBBER)
4699 rtx clobbered = XEXP (y, 0);
4701 if (GET_CODE (clobbered) == REG
4702 || GET_CODE (clobbered) == SUBREG)
4703 invalidate (clobbered, VOIDmode);
4704 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4705 || GET_CODE (clobbered) == ZERO_EXTRACT)
4706 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4710 for (i = 0; i < lim; i++)
4712 register rtx y = XVECEXP (x, 0, i);
4713 if (GET_CODE (y) == SET)
4715 /* As above, we ignore unconditional jumps and call-insns and
4716 ignore the result of apply_change_group. */
4717 if (GET_CODE (SET_SRC (y)) == CALL)
4719 canon_reg (SET_SRC (y), insn);
4720 apply_change_group ();
4721 fold_rtx (SET_SRC (y), insn);
4722 invalidate (SET_DEST (y), VOIDmode);
4724 else if (SET_DEST (y) == pc_rtx
4725 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4728 sets[n_sets++].rtl = y;
4730 else if (GET_CODE (y) == CLOBBER)
4732 /* If we clobber memory, canon the address.
4733 This does nothing when a register is clobbered
4734 because we have already invalidated the reg. */
4735 if (GET_CODE (XEXP (y, 0)) == MEM)
4736 canon_reg (XEXP (y, 0), NULL_RTX);
4738 else if (GET_CODE (y) == USE
4739 && ! (GET_CODE (XEXP (y, 0)) == REG
4740 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4741 canon_reg (y, NULL_RTX);
4742 else if (GET_CODE (y) == CALL)
4744 /* The result of apply_change_group can be ignored; see
4746 canon_reg (y, insn);
4747 apply_change_group ();
4752 else if (GET_CODE (x) == CLOBBER)
4754 if (GET_CODE (XEXP (x, 0)) == MEM)
4755 canon_reg (XEXP (x, 0), NULL_RTX);
4758 /* Canonicalize a USE of a pseudo register or memory location. */
4759 else if (GET_CODE (x) == USE
4760 && ! (GET_CODE (XEXP (x, 0)) == REG
4761 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4762 canon_reg (XEXP (x, 0), NULL_RTX);
4763 else if (GET_CODE (x) == CALL)
4765 /* The result of apply_change_group can be ignored; see canon_reg. */
4766 canon_reg (x, insn);
4767 apply_change_group ();
4771 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4772 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4773 is handled specially for this case, and if it isn't set, then there will
4774 be no equivalence for the destination. */
4775 if (n_sets == 1 && REG_NOTES (insn) != 0
4776 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4777 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4778 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4779 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4781 /* Canonicalize sources and addresses of destinations.
4782 We do this in a separate pass to avoid problems when a MATCH_DUP is
4783 present in the insn pattern. In that case, we want to ensure that
4784 we don't break the duplicate nature of the pattern. So we will replace
4785 both operands at the same time. Otherwise, we would fail to find an
4786 equivalent substitution in the loop calling validate_change below.
4788 We used to suppress canonicalization of DEST if it appears in SRC,
4789 but we don't do this any more. */
4791 for (i = 0; i < n_sets; i++)
4793 rtx dest = SET_DEST (sets[i].rtl);
4794 rtx src = SET_SRC (sets[i].rtl);
4795 rtx new = canon_reg (src, insn);
4798 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4799 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4800 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4801 || (insn_code = recog_memoized (insn)) < 0
4802 || insn_data[insn_code].n_dups > 0)
4803 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4805 SET_SRC (sets[i].rtl) = new;
4807 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4809 validate_change (insn, &XEXP (dest, 1),
4810 canon_reg (XEXP (dest, 1), insn), 1);
4811 validate_change (insn, &XEXP (dest, 2),
4812 canon_reg (XEXP (dest, 2), insn), 1);
4815 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4816 || GET_CODE (dest) == ZERO_EXTRACT
4817 || GET_CODE (dest) == SIGN_EXTRACT)
4818 dest = XEXP (dest, 0);
4820 if (GET_CODE (dest) == MEM)
4821 canon_reg (dest, insn);
4824 /* Now that we have done all the replacements, we can apply the change
4825 group and see if they all work. Note that this will cause some
4826 canonicalizations that would have worked individually not to be applied
4827 because some other canonicalization didn't work, but this should not
4830 The result of apply_change_group can be ignored; see canon_reg. */
4832 apply_change_group ();
4834 /* Set sets[i].src_elt to the class each source belongs to.
4835 Detect assignments from or to volatile things
4836 and set set[i] to zero so they will be ignored
4837 in the rest of this function.
4839 Nothing in this loop changes the hash table or the register chains. */
4841 for (i = 0; i < n_sets; i++)
4843 register rtx src, dest;
4844 register rtx src_folded;
4845 register struct table_elt *elt = 0, *p;
4846 enum machine_mode mode;
4849 rtx src_related = 0;
4850 struct table_elt *src_const_elt = 0;
4851 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4852 int src_related_cost = 10000, src_elt_cost = 10000;
4853 /* Set non-zero if we need to call force_const_mem on with the
4854 contents of src_folded before using it. */
4855 int src_folded_force_flag = 0;
4857 dest = SET_DEST (sets[i].rtl);
4858 src = SET_SRC (sets[i].rtl);
4860 /* If SRC is a constant that has no machine mode,
4861 hash it with the destination's machine mode.
4862 This way we can keep different modes separate. */
4864 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4865 sets[i].mode = mode;
4869 enum machine_mode eqvmode = mode;
4870 if (GET_CODE (dest) == STRICT_LOW_PART)
4871 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4873 hash_arg_in_memory = 0;
4874 hash_arg_in_struct = 0;
4875 src_eqv = fold_rtx (src_eqv, insn);
4876 src_eqv_hash = HASH (src_eqv, eqvmode);
4878 /* Find the equivalence class for the equivalent expression. */
4881 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4883 src_eqv_volatile = do_not_record;
4884 src_eqv_in_memory = hash_arg_in_memory;
4885 src_eqv_in_struct = hash_arg_in_struct;
4888 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4889 value of the INNER register, not the destination. So it is not
4890 a valid substitution for the source. But save it for later. */
4891 if (GET_CODE (dest) == STRICT_LOW_PART)
4894 src_eqv_here = src_eqv;
4896 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4897 simplified result, which may not necessarily be valid. */
4898 src_folded = fold_rtx (src, insn);
4901 /* ??? This caused bad code to be generated for the m68k port with -O2.
4902 Suppose src is (CONST_INT -1), and that after truncation src_folded
4903 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4904 At the end we will add src and src_const to the same equivalence
4905 class. We now have 3 and -1 on the same equivalence class. This
4906 causes later instructions to be mis-optimized. */
4907 /* If storing a constant in a bitfield, pre-truncate the constant
4908 so we will be able to record it later. */
4909 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4910 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4912 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4914 if (GET_CODE (src) == CONST_INT
4915 && GET_CODE (width) == CONST_INT
4916 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4917 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4919 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4920 << INTVAL (width)) - 1));
4924 /* Compute SRC's hash code, and also notice if it
4925 should not be recorded at all. In that case,
4926 prevent any further processing of this assignment. */
4928 hash_arg_in_memory = 0;
4929 hash_arg_in_struct = 0;
4932 sets[i].src_hash = HASH (src, mode);
4933 sets[i].src_volatile = do_not_record;
4934 sets[i].src_in_memory = hash_arg_in_memory;
4935 sets[i].src_in_struct = hash_arg_in_struct;
4937 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4938 a pseudo that is set more than once, do not record SRC. Using
4939 SRC as a replacement for anything else will be incorrect in that
4940 situation. Note that this usually occurs only for stack slots,
4941 in which case all the RTL would be referring to SRC, so we don't
4942 lose any optimization opportunities by not having SRC in the
4945 if (GET_CODE (src) == MEM
4946 && find_reg_note (insn, REG_EQUIV, src) != 0
4947 && GET_CODE (dest) == REG
4948 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4949 && REG_N_SETS (REGNO (dest)) != 1)
4950 sets[i].src_volatile = 1;
4953 /* It is no longer clear why we used to do this, but it doesn't
4954 appear to still be needed. So let's try without it since this
4955 code hurts cse'ing widened ops. */
4956 /* If source is a perverse subreg (such as QI treated as an SI),
4957 treat it as volatile. It may do the work of an SI in one context
4958 where the extra bits are not being used, but cannot replace an SI
4960 if (GET_CODE (src) == SUBREG
4961 && (GET_MODE_SIZE (GET_MODE (src))
4962 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4963 sets[i].src_volatile = 1;
4966 /* Locate all possible equivalent forms for SRC. Try to replace
4967 SRC in the insn with each cheaper equivalent.
4969 We have the following types of equivalents: SRC itself, a folded
4970 version, a value given in a REG_EQUAL note, or a value related
4973 Each of these equivalents may be part of an additional class
4974 of equivalents (if more than one is in the table, they must be in
4975 the same class; we check for this).
4977 If the source is volatile, we don't do any table lookups.
4979 We note any constant equivalent for possible later use in a
4982 if (!sets[i].src_volatile)
4983 elt = lookup (src, sets[i].src_hash, mode);
4985 sets[i].src_elt = elt;
4987 if (elt && src_eqv_here && src_eqv_elt)
4989 if (elt->first_same_value != src_eqv_elt->first_same_value)
4991 /* The REG_EQUAL is indicating that two formerly distinct
4992 classes are now equivalent. So merge them. */
4993 merge_equiv_classes (elt, src_eqv_elt);
4994 src_eqv_hash = HASH (src_eqv, elt->mode);
4995 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5001 else if (src_eqv_elt)
5004 /* Try to find a constant somewhere and record it in `src_const'.
5005 Record its table element, if any, in `src_const_elt'. Look in
5006 any known equivalences first. (If the constant is not in the
5007 table, also set `sets[i].src_const_hash'). */
5009 for (p = elt->first_same_value; p; p = p->next_same_value)
5013 src_const_elt = elt;
5018 && (CONSTANT_P (src_folded)
5019 /* Consider (minus (label_ref L1) (label_ref L2)) as
5020 "constant" here so we will record it. This allows us
5021 to fold switch statements when an ADDR_DIFF_VEC is used. */
5022 || (GET_CODE (src_folded) == MINUS
5023 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5024 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5025 src_const = src_folded, src_const_elt = elt;
5026 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5027 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5029 /* If we don't know if the constant is in the table, get its
5030 hash code and look it up. */
5031 if (src_const && src_const_elt == 0)
5033 sets[i].src_const_hash = HASH (src_const, mode);
5034 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5037 sets[i].src_const = src_const;
5038 sets[i].src_const_elt = src_const_elt;
5040 /* If the constant and our source are both in the table, mark them as
5041 equivalent. Otherwise, if a constant is in the table but the source
5042 isn't, set ELT to it. */
5043 if (src_const_elt && elt
5044 && src_const_elt->first_same_value != elt->first_same_value)
5045 merge_equiv_classes (elt, src_const_elt);
5046 else if (src_const_elt && elt == 0)
5047 elt = src_const_elt;
5049 /* See if there is a register linearly related to a constant
5050 equivalent of SRC. */
5052 && (GET_CODE (src_const) == CONST
5053 || (src_const_elt && src_const_elt->related_value != 0)))
5055 src_related = use_related_value (src_const, src_const_elt);
5058 struct table_elt *src_related_elt
5059 = lookup (src_related, HASH (src_related, mode), mode);
5060 if (src_related_elt && elt)
5062 if (elt->first_same_value
5063 != src_related_elt->first_same_value)
5064 /* This can occur when we previously saw a CONST
5065 involving a SYMBOL_REF and then see the SYMBOL_REF
5066 twice. Merge the involved classes. */
5067 merge_equiv_classes (elt, src_related_elt);
5070 src_related_elt = 0;
5072 else if (src_related_elt && elt == 0)
5073 elt = src_related_elt;
5077 /* See if we have a CONST_INT that is already in a register in a
5080 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5081 && GET_MODE_CLASS (mode) == MODE_INT
5082 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5084 enum machine_mode wider_mode;
5086 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5087 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5088 && src_related == 0;
5089 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5091 struct table_elt *const_elt
5092 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5097 for (const_elt = const_elt->first_same_value;
5098 const_elt; const_elt = const_elt->next_same_value)
5099 if (GET_CODE (const_elt->exp) == REG)
5101 src_related = gen_lowpart_if_possible (mode,
5108 /* Another possibility is that we have an AND with a constant in
5109 a mode narrower than a word. If so, it might have been generated
5110 as part of an "if" which would narrow the AND. If we already
5111 have done the AND in a wider mode, we can use a SUBREG of that
5114 if (flag_expensive_optimizations && ! src_related
5115 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5116 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5118 enum machine_mode tmode;
5119 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5121 for (tmode = GET_MODE_WIDER_MODE (mode);
5122 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5123 tmode = GET_MODE_WIDER_MODE (tmode))
5125 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5126 struct table_elt *larger_elt;
5130 PUT_MODE (new_and, tmode);
5131 XEXP (new_and, 0) = inner;
5132 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5133 if (larger_elt == 0)
5136 for (larger_elt = larger_elt->first_same_value;
5137 larger_elt; larger_elt = larger_elt->next_same_value)
5138 if (GET_CODE (larger_elt->exp) == REG)
5141 = gen_lowpart_if_possible (mode, larger_elt->exp);
5151 #ifdef LOAD_EXTEND_OP
5152 /* See if a MEM has already been loaded with a widening operation;
5153 if it has, we can use a subreg of that. Many CISC machines
5154 also have such operations, but this is only likely to be
5155 beneficial these machines. */
5157 if (flag_expensive_optimizations && src_related == 0
5158 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5159 && GET_MODE_CLASS (mode) == MODE_INT
5160 && GET_CODE (src) == MEM && ! do_not_record
5161 && LOAD_EXTEND_OP (mode) != NIL)
5163 enum machine_mode tmode;
5165 /* Set what we are trying to extend and the operation it might
5166 have been extended with. */
5167 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5168 XEXP (memory_extend_rtx, 0) = src;
5170 for (tmode = GET_MODE_WIDER_MODE (mode);
5171 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5172 tmode = GET_MODE_WIDER_MODE (tmode))
5174 struct table_elt *larger_elt;
5176 PUT_MODE (memory_extend_rtx, tmode);
5177 larger_elt = lookup (memory_extend_rtx,
5178 HASH (memory_extend_rtx, tmode), tmode);
5179 if (larger_elt == 0)
5182 for (larger_elt = larger_elt->first_same_value;
5183 larger_elt; larger_elt = larger_elt->next_same_value)
5184 if (GET_CODE (larger_elt->exp) == REG)
5186 src_related = gen_lowpart_if_possible (mode,
5195 #endif /* LOAD_EXTEND_OP */
5197 if (src == src_folded)
5200 /* At this point, ELT, if non-zero, points to a class of expressions
5201 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5202 and SRC_RELATED, if non-zero, each contain additional equivalent
5203 expressions. Prune these latter expressions by deleting expressions
5204 already in the equivalence class.
5206 Check for an equivalent identical to the destination. If found,
5207 this is the preferred equivalent since it will likely lead to
5208 elimination of the insn. Indicate this by placing it in
5211 if (elt) elt = elt->first_same_value;
5212 for (p = elt; p; p = p->next_same_value)
5214 enum rtx_code code = GET_CODE (p->exp);
5216 /* If the expression is not valid, ignore it. Then we do not
5217 have to check for validity below. In most cases, we can use
5218 `rtx_equal_p', since canonicalization has already been done. */
5219 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5222 /* Also skip paradoxical subregs, unless that's what we're
5225 && (GET_MODE_SIZE (GET_MODE (p->exp))
5226 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5228 && GET_CODE (src) == SUBREG
5229 && GET_MODE (src) == GET_MODE (p->exp)
5230 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5231 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5234 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5236 else if (src_folded && GET_CODE (src_folded) == code
5237 && rtx_equal_p (src_folded, p->exp))
5239 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5240 && rtx_equal_p (src_eqv_here, p->exp))
5242 else if (src_related && GET_CODE (src_related) == code
5243 && rtx_equal_p (src_related, p->exp))
5246 /* This is the same as the destination of the insns, we want
5247 to prefer it. Copy it to src_related. The code below will
5248 then give it a negative cost. */
5249 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5254 /* Find the cheapest valid equivalent, trying all the available
5255 possibilities. Prefer items not in the hash table to ones
5256 that are when they are equal cost. Note that we can never
5257 worsen an insn as the current contents will also succeed.
5258 If we find an equivalent identical to the destination, use it as best,
5259 since this insn will probably be eliminated in that case. */
5262 if (rtx_equal_p (src, dest))
5265 src_cost = COST (src);
5270 if (rtx_equal_p (src_eqv_here, dest))
5273 src_eqv_cost = COST (src_eqv_here);
5278 if (rtx_equal_p (src_folded, dest))
5279 src_folded_cost = -1;
5281 src_folded_cost = COST (src_folded);
5286 if (rtx_equal_p (src_related, dest))
5287 src_related_cost = -1;
5289 src_related_cost = COST (src_related);
5292 /* If this was an indirect jump insn, a known label will really be
5293 cheaper even though it looks more expensive. */
5294 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5295 src_folded = src_const, src_folded_cost = -1;
5297 /* Terminate loop when replacement made. This must terminate since
5298 the current contents will be tested and will always be valid. */
5303 /* Skip invalid entries. */
5304 while (elt && GET_CODE (elt->exp) != REG
5305 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5306 elt = elt->next_same_value;
5308 /* A paradoxical subreg would be bad here: it'll be the right
5309 size, but later may be adjusted so that the upper bits aren't
5310 what we want. So reject it. */
5312 && GET_CODE (elt->exp) == SUBREG
5313 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5314 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5315 /* It is okay, though, if the rtx we're trying to match
5316 will ignore any of the bits we can't predict. */
5318 && GET_CODE (src) == SUBREG
5319 && GET_MODE (src) == GET_MODE (elt->exp)
5320 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5321 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5323 elt = elt->next_same_value;
5327 if (elt) src_elt_cost = elt->cost;
5329 /* Find cheapest and skip it for the next time. For items
5330 of equal cost, use this order:
5331 src_folded, src, src_eqv, src_related and hash table entry. */
5332 if (src_folded_cost <= src_cost
5333 && src_folded_cost <= src_eqv_cost
5334 && src_folded_cost <= src_related_cost
5335 && src_folded_cost <= src_elt_cost)
5337 trial = src_folded, src_folded_cost = 10000;
5338 if (src_folded_force_flag)
5339 trial = force_const_mem (mode, trial);
5341 else if (src_cost <= src_eqv_cost
5342 && src_cost <= src_related_cost
5343 && src_cost <= src_elt_cost)
5344 trial = src, src_cost = 10000;
5345 else if (src_eqv_cost <= src_related_cost
5346 && src_eqv_cost <= src_elt_cost)
5347 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5348 else if (src_related_cost <= src_elt_cost)
5349 trial = copy_rtx (src_related), src_related_cost = 10000;
5352 trial = copy_rtx (elt->exp);
5353 elt = elt->next_same_value;
5354 src_elt_cost = 10000;
5357 /* We don't normally have an insn matching (set (pc) (pc)), so
5358 check for this separately here. We will delete such an
5361 Tablejump insns contain a USE of the table, so simply replacing
5362 the operand with the constant won't match. This is simply an
5363 unconditional branch, however, and is therefore valid. Just
5364 insert the substitution here and we will delete and re-emit
5367 /* Keep track of the original SET_SRC so that we can fix notes
5368 on libcall instructions. */
5369 old_src = SET_SRC (sets[i].rtl);
5371 if (n_sets == 1 && dest == pc_rtx
5373 || (GET_CODE (trial) == LABEL_REF
5374 && ! condjump_p (insn))))
5376 /* If TRIAL is a label in front of a jump table, we are
5377 really falling through the switch (this is how casesi
5378 insns work), so we must branch around the table. */
5379 if (GET_CODE (trial) == CODE_LABEL
5380 && NEXT_INSN (trial) != 0
5381 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
5382 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
5383 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
5385 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
5387 SET_SRC (sets[i].rtl) = trial;
5388 cse_jumps_altered = 1;
5392 /* Look for a substitution that makes a valid insn. */
5393 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5395 /* If we just made a substitution inside a libcall, then we
5396 need to make the same substitution in any notes attached
5397 to the RETVAL insn. */
5399 && (GET_CODE (old_src) == REG
5400 || GET_CODE (old_src) == SUBREG
5401 || GET_CODE (old_src) == MEM))
5402 replace_rtx (REG_NOTES (libcall_insn), old_src,
5403 canon_reg (SET_SRC (sets[i].rtl), insn));
5405 /* The result of apply_change_group can be ignored; see
5408 validate_change (insn, &SET_SRC (sets[i].rtl),
5409 canon_reg (SET_SRC (sets[i].rtl), insn),
5411 apply_change_group ();
5415 /* If we previously found constant pool entries for
5416 constants and this is a constant, try making a
5417 pool entry. Put it in src_folded unless we already have done
5418 this since that is where it likely came from. */
5420 else if (constant_pool_entries_cost
5421 && CONSTANT_P (trial)
5422 && ! (GET_CODE (trial) == CONST
5423 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5425 || (GET_CODE (src_folded) != MEM
5426 && ! src_folded_force_flag))
5427 && GET_MODE_CLASS (mode) != MODE_CC
5428 && mode != VOIDmode)
5430 src_folded_force_flag = 1;
5432 src_folded_cost = constant_pool_entries_cost;
5436 src = SET_SRC (sets[i].rtl);
5438 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5439 However, there is an important exception: If both are registers
5440 that are not the head of their equivalence class, replace SET_SRC
5441 with the head of the class. If we do not do this, we will have
5442 both registers live over a portion of the basic block. This way,
5443 their lifetimes will likely abut instead of overlapping. */
5444 if (GET_CODE (dest) == REG
5445 && REGNO_QTY_VALID_P (REGNO (dest))
5446 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
5447 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
5448 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5449 /* Don't do this if the original insn had a hard reg as
5450 SET_SRC or SET_DEST. */
5451 && (GET_CODE (sets[i].src) != REG
5452 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5453 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5454 /* We can't call canon_reg here because it won't do anything if
5455 SRC is a hard register. */
5457 int first = qty_first_reg[REG_QTY (REGNO (src))];
5459 = (first >= FIRST_PSEUDO_REGISTER
5460 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5462 /* We must use validate-change even for this, because this
5463 might be a special no-op instruction, suitable only to
5465 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5468 /* If we had a constant that is cheaper than what we are now
5469 setting SRC to, use that constant. We ignored it when we
5470 thought we could make this into a no-op. */
5471 if (src_const && COST (src_const) < COST (src)
5472 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5478 /* If we made a change, recompute SRC values. */
5479 if (src != sets[i].src)
5482 hash_arg_in_memory = 0;
5483 hash_arg_in_struct = 0;
5485 sets[i].src_hash = HASH (src, mode);
5486 sets[i].src_volatile = do_not_record;
5487 sets[i].src_in_memory = hash_arg_in_memory;
5488 sets[i].src_in_struct = hash_arg_in_struct;
5489 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5492 /* If this is a single SET, we are setting a register, and we have an
5493 equivalent constant, we want to add a REG_NOTE. We don't want
5494 to write a REG_EQUAL note for a constant pseudo since verifying that
5495 that pseudo hasn't been eliminated is a pain. Such a note also
5496 won't help anything.
5498 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5499 which can be created for a reference to a compile time computable
5500 entry in a jump table. */
5502 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5503 && GET_CODE (src_const) != REG
5504 && ! (GET_CODE (src_const) == CONST
5505 && GET_CODE (XEXP (src_const, 0)) == MINUS
5506 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5507 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5509 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5511 /* Make sure that the rtx is not shared with any other insn. */
5512 src_const = copy_rtx (src_const);
5514 /* Record the actual constant value in a REG_EQUAL note, making
5515 a new one if one does not already exist. */
5517 XEXP (tem, 0) = src_const;
5519 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5520 src_const, REG_NOTES (insn));
5522 /* If storing a constant value in a register that
5523 previously held the constant value 0,
5524 record this fact with a REG_WAS_0 note on this insn.
5526 Note that the *register* is required to have previously held 0,
5527 not just any register in the quantity and we must point to the
5528 insn that set that register to zero.
5530 Rather than track each register individually, we just see if
5531 the last set for this quantity was for this register. */
5533 if (REGNO_QTY_VALID_P (REGNO (dest))
5534 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
5536 /* See if we previously had a REG_WAS_0 note. */
5537 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5538 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
5540 if ((tem = single_set (const_insn)) != 0
5541 && rtx_equal_p (SET_DEST (tem), dest))
5544 XEXP (note, 0) = const_insn;
5547 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5553 /* Now deal with the destination. */
5556 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5557 to the MEM or REG within it. */
5558 while (GET_CODE (dest) == SIGN_EXTRACT
5559 || GET_CODE (dest) == ZERO_EXTRACT
5560 || GET_CODE (dest) == SUBREG
5561 || GET_CODE (dest) == STRICT_LOW_PART)
5562 dest = XEXP (dest, 0);
5564 sets[i].inner_dest = dest;
5566 if (GET_CODE (dest) == MEM)
5568 #ifdef PUSH_ROUNDING
5569 /* Stack pushes invalidate the stack pointer. */
5570 rtx addr = XEXP (dest, 0);
5571 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5572 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5573 && XEXP (addr, 0) == stack_pointer_rtx)
5574 invalidate (stack_pointer_rtx, Pmode);
5576 dest = fold_rtx (dest, insn);
5579 /* Compute the hash code of the destination now,
5580 before the effects of this instruction are recorded,
5581 since the register values used in the address computation
5582 are those before this instruction. */
5583 sets[i].dest_hash = HASH (dest, mode);
5585 /* Don't enter a bit-field in the hash table
5586 because the value in it after the store
5587 may not equal what was stored, due to truncation. */
5589 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5590 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5592 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5594 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5595 && GET_CODE (width) == CONST_INT
5596 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5597 && ! (INTVAL (src_const)
5598 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5599 /* Exception: if the value is constant,
5600 and it won't be truncated, record it. */
5604 /* This is chosen so that the destination will be invalidated
5605 but no new value will be recorded.
5606 We must invalidate because sometimes constant
5607 values can be recorded for bitfields. */
5608 sets[i].src_elt = 0;
5609 sets[i].src_volatile = 1;
5615 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5617 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5619 /* One less use of the label this insn used to jump to. */
5620 if (JUMP_LABEL (insn) != 0)
5621 --LABEL_NUSES (JUMP_LABEL (insn));
5622 PUT_CODE (insn, NOTE);
5623 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5624 NOTE_SOURCE_FILE (insn) = 0;
5625 cse_jumps_altered = 1;
5626 /* No more processing for this set. */
5630 /* If this SET is now setting PC to a label, we know it used to
5631 be a conditional or computed branch. So we see if we can follow
5632 it. If it was a computed branch, delete it and re-emit. */
5633 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5635 /* If this is not in the format for a simple branch and
5636 we are the only SET in it, re-emit it. */
5637 if (! simplejump_p (insn) && n_sets == 1)
5639 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5640 JUMP_LABEL (new) = XEXP (src, 0);
5641 LABEL_NUSES (XEXP (src, 0))++;
5645 /* Otherwise, force rerecognition, since it probably had
5646 a different pattern before.
5647 This shouldn't really be necessary, since whatever
5648 changed the source value above should have done this.
5649 Until the right place is found, might as well do this here. */
5650 INSN_CODE (insn) = -1;
5652 never_reached_warning (insn);
5654 /* Now emit a BARRIER after the unconditional jump. Do not bother
5655 deleting any unreachable code, let jump/flow do that. */
5656 if (NEXT_INSN (insn) != 0
5657 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5658 emit_barrier_after (insn);
5660 cse_jumps_altered = 1;
5664 /* If destination is volatile, invalidate it and then do no further
5665 processing for this assignment. */
5667 else if (do_not_record)
5669 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5670 || GET_CODE (dest) == MEM)
5671 invalidate (dest, VOIDmode);
5672 else if (GET_CODE (dest) == STRICT_LOW_PART
5673 || GET_CODE (dest) == ZERO_EXTRACT)
5674 invalidate (XEXP (dest, 0), GET_MODE (dest));
5678 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5679 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5682 /* If setting CC0, record what it was set to, or a constant, if it
5683 is equivalent to a constant. If it is being set to a floating-point
5684 value, make a COMPARE with the appropriate constant of 0. If we
5685 don't do this, later code can interpret this as a test against
5686 const0_rtx, which can cause problems if we try to put it into an
5687 insn as a floating-point operand. */
5688 if (dest == cc0_rtx)
5690 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5691 this_insn_cc0_mode = mode;
5692 if (FLOAT_MODE_P (mode))
5693 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5699 /* Now enter all non-volatile source expressions in the hash table
5700 if they are not already present.
5701 Record their equivalence classes in src_elt.
5702 This way we can insert the corresponding destinations into
5703 the same classes even if the actual sources are no longer in them
5704 (having been invalidated). */
5706 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5707 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5709 register struct table_elt *elt;
5710 register struct table_elt *classp = sets[0].src_elt;
5711 rtx dest = SET_DEST (sets[0].rtl);
5712 enum machine_mode eqvmode = GET_MODE (dest);
5714 if (GET_CODE (dest) == STRICT_LOW_PART)
5716 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5719 if (insert_regs (src_eqv, classp, 0))
5721 rehash_using_reg (src_eqv);
5722 src_eqv_hash = HASH (src_eqv, eqvmode);
5724 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5725 elt->in_memory = src_eqv_in_memory;
5726 elt->in_struct = src_eqv_in_struct;
5729 /* Check to see if src_eqv_elt is the same as a set source which
5730 does not yet have an elt, and if so set the elt of the set source
5732 for (i = 0; i < n_sets; i++)
5733 if (sets[i].rtl && sets[i].src_elt == 0
5734 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5735 sets[i].src_elt = src_eqv_elt;
5738 for (i = 0; i < n_sets; i++)
5739 if (sets[i].rtl && ! sets[i].src_volatile
5740 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5742 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5744 /* REG_EQUAL in setting a STRICT_LOW_PART
5745 gives an equivalent for the entire destination register,
5746 not just for the subreg being stored in now.
5747 This is a more interesting equivalence, so we arrange later
5748 to treat the entire reg as the destination. */
5749 sets[i].src_elt = src_eqv_elt;
5750 sets[i].src_hash = src_eqv_hash;
5754 /* Insert source and constant equivalent into hash table, if not
5756 register struct table_elt *classp = src_eqv_elt;
5757 register rtx src = sets[i].src;
5758 register rtx dest = SET_DEST (sets[i].rtl);
5759 enum machine_mode mode
5760 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5762 if (sets[i].src_elt == 0)
5764 /* Don't put a hard register source into the table if this is
5765 the last insn of a libcall. In this case, we only need
5766 to put src_eqv_elt in src_elt. */
5767 if (GET_CODE (src) != REG
5768 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5769 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5771 register struct table_elt *elt;
5773 /* Note that these insert_regs calls cannot remove
5774 any of the src_elt's, because they would have failed to
5775 match if not still valid. */
5776 if (insert_regs (src, classp, 0))
5778 rehash_using_reg (src);
5779 sets[i].src_hash = HASH (src, mode);
5781 elt = insert (src, classp, sets[i].src_hash, mode);
5782 elt->in_memory = sets[i].src_in_memory;
5783 elt->in_struct = sets[i].src_in_struct;
5784 sets[i].src_elt = classp = elt;
5787 sets[i].src_elt = classp;
5789 if (sets[i].src_const && sets[i].src_const_elt == 0
5790 && src != sets[i].src_const
5791 && ! rtx_equal_p (sets[i].src_const, src))
5792 sets[i].src_elt = insert (sets[i].src_const, classp,
5793 sets[i].src_const_hash, mode);
5796 else if (sets[i].src_elt == 0)
5797 /* If we did not insert the source into the hash table (e.g., it was
5798 volatile), note the equivalence class for the REG_EQUAL value, if any,
5799 so that the destination goes into that class. */
5800 sets[i].src_elt = src_eqv_elt;
5802 invalidate_from_clobbers (x);
5804 /* Some registers are invalidated by subroutine calls. Memory is
5805 invalidated by non-constant calls. */
5807 if (GET_CODE (insn) == CALL_INSN)
5809 if (! CONST_CALL_P (insn))
5810 invalidate_memory ();
5811 invalidate_for_call ();
5814 /* Now invalidate everything set by this instruction.
5815 If a SUBREG or other funny destination is being set,
5816 sets[i].rtl is still nonzero, so here we invalidate the reg
5817 a part of which is being set. */
5819 for (i = 0; i < n_sets; i++)
5822 /* We can't use the inner dest, because the mode associated with
5823 a ZERO_EXTRACT is significant. */
5824 register rtx dest = SET_DEST (sets[i].rtl);
5826 /* Needed for registers to remove the register from its
5827 previous quantity's chain.
5828 Needed for memory if this is a nonvarying address, unless
5829 we have just done an invalidate_memory that covers even those. */
5830 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5831 || GET_CODE (dest) == MEM)
5832 invalidate (dest, VOIDmode);
5833 else if (GET_CODE (dest) == STRICT_LOW_PART
5834 || GET_CODE (dest) == ZERO_EXTRACT)
5835 invalidate (XEXP (dest, 0), GET_MODE (dest));
5838 /* A volatile ASM invalidates everything. */
5839 if (GET_CODE (insn) == INSN
5840 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5841 && MEM_VOLATILE_P (PATTERN (insn)))
5842 flush_hash_table ();
5844 /* Make sure registers mentioned in destinations
5845 are safe for use in an expression to be inserted.
5846 This removes from the hash table
5847 any invalid entry that refers to one of these registers.
5849 We don't care about the return value from mention_regs because
5850 we are going to hash the SET_DEST values unconditionally. */
5852 for (i = 0; i < n_sets; i++)
5856 rtx x = SET_DEST (sets[i].rtl);
5858 if (GET_CODE (x) != REG)
5862 /* We used to rely on all references to a register becoming
5863 inaccessible when a register changes to a new quantity,
5864 since that changes the hash code. However, that is not
5865 safe, since after NBUCKETS new quantities we get a
5866 hash 'collision' of a register with its own invalid
5867 entries. And since SUBREGs have been changed not to
5868 change their hash code with the hash code of the register,
5869 it wouldn't work any longer at all. So we have to check
5870 for any invalid references lying around now.
5871 This code is similar to the REG case in mention_regs,
5872 but it knows that reg_tick has been incremented, and
5873 it leaves reg_in_table as -1 . */
5874 register int regno = REGNO (x);
5875 register int endregno
5876 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5877 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5880 for (i = regno; i < endregno; i++)
5882 if (REG_IN_TABLE (i) >= 0)
5884 remove_invalid_refs (i);
5885 REG_IN_TABLE (i) = -1;
5892 /* We may have just removed some of the src_elt's from the hash table.
5893 So replace each one with the current head of the same class. */
5895 for (i = 0; i < n_sets; i++)
5898 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5899 /* If elt was removed, find current head of same class,
5900 or 0 if nothing remains of that class. */
5902 register struct table_elt *elt = sets[i].src_elt;
5904 while (elt && elt->prev_same_value)
5905 elt = elt->prev_same_value;
5907 while (elt && elt->first_same_value == 0)
5908 elt = elt->next_same_value;
5909 sets[i].src_elt = elt ? elt->first_same_value : 0;
5913 /* Now insert the destinations into their equivalence classes. */
5915 for (i = 0; i < n_sets; i++)
5918 register rtx dest = SET_DEST (sets[i].rtl);
5919 rtx inner_dest = sets[i].inner_dest;
5920 register struct table_elt *elt;
5922 /* Don't record value if we are not supposed to risk allocating
5923 floating-point values in registers that might be wider than
5925 if ((flag_float_store
5926 && GET_CODE (dest) == MEM
5927 && FLOAT_MODE_P (GET_MODE (dest)))
5928 /* Don't record BLKmode values, because we don't know the
5929 size of it, and can't be sure that other BLKmode values
5930 have the same or smaller size. */
5931 || GET_MODE (dest) == BLKmode
5932 /* Don't record values of destinations set inside a libcall block
5933 since we might delete the libcall. Things should have been set
5934 up so we won't want to reuse such a value, but we play it safe
5937 /* If we didn't put a REG_EQUAL value or a source into the hash
5938 table, there is no point is recording DEST. */
5939 || sets[i].src_elt == 0
5940 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5941 or SIGN_EXTEND, don't record DEST since it can cause
5942 some tracking to be wrong.
5944 ??? Think about this more later. */
5945 || (GET_CODE (dest) == SUBREG
5946 && (GET_MODE_SIZE (GET_MODE (dest))
5947 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5948 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5949 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5952 /* STRICT_LOW_PART isn't part of the value BEING set,
5953 and neither is the SUBREG inside it.
5954 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5955 if (GET_CODE (dest) == STRICT_LOW_PART)
5956 dest = SUBREG_REG (XEXP (dest, 0));
5958 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5959 /* Registers must also be inserted into chains for quantities. */
5960 if (insert_regs (dest, sets[i].src_elt, 1))
5962 /* If `insert_regs' changes something, the hash code must be
5964 rehash_using_reg (dest);
5965 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5968 if (GET_CODE (inner_dest) == MEM
5969 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5970 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5971 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5972 Consider the case in which the address of the MEM is
5973 passed to a function, which alters the MEM. Then, if we
5974 later use Y instead of the MEM we'll miss the update. */
5975 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5977 elt = insert (dest, sets[i].src_elt,
5978 sets[i].dest_hash, GET_MODE (dest));
5980 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5981 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5982 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5987 /* This implicitly assumes a whole struct
5988 need not have MEM_IN_STRUCT_P.
5989 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
5990 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
5991 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
5994 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5995 narrower than M2, and both M1 and M2 are the same number of words,
5996 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5997 make that equivalence as well.
5999 However, BAR may have equivalences for which gen_lowpart_if_possible
6000 will produce a simpler value than gen_lowpart_if_possible applied to
6001 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6002 BAR's equivalences. If we don't get a simplified form, make
6003 the SUBREG. It will not be used in an equivalence, but will
6004 cause two similar assignments to be detected.
6006 Note the loop below will find SUBREG_REG (DEST) since we have
6007 already entered SRC and DEST of the SET in the table. */
6009 if (GET_CODE (dest) == SUBREG
6010 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6012 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
6013 && (GET_MODE_SIZE (GET_MODE (dest))
6014 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6015 && sets[i].src_elt != 0)
6017 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6018 struct table_elt *elt, *classp = 0;
6020 for (elt = sets[i].src_elt->first_same_value; elt;
6021 elt = elt->next_same_value)
6025 struct table_elt *src_elt;
6027 /* Ignore invalid entries. */
6028 if (GET_CODE (elt->exp) != REG
6029 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6032 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6034 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6036 src_hash = HASH (new_src, new_mode);
6037 src_elt = lookup (new_src, src_hash, new_mode);
6039 /* Put the new source in the hash table is if isn't
6043 if (insert_regs (new_src, classp, 0))
6045 rehash_using_reg (new_src);
6046 src_hash = HASH (new_src, new_mode);
6048 src_elt = insert (new_src, classp, src_hash, new_mode);
6049 src_elt->in_memory = elt->in_memory;
6050 src_elt->in_struct = elt->in_struct;
6052 else if (classp && classp != src_elt->first_same_value)
6053 /* Show that two things that we've seen before are
6054 actually the same. */
6055 merge_equiv_classes (src_elt, classp);
6057 classp = src_elt->first_same_value;
6058 /* Ignore invalid entries. */
6060 && GET_CODE (classp->exp) != REG
6061 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6062 classp = classp->next_same_value;
6067 /* Special handling for (set REG0 REG1)
6068 where REG0 is the "cheapest", cheaper than REG1.
6069 After cse, REG1 will probably not be used in the sequel,
6070 so (if easily done) change this insn to (set REG1 REG0) and
6071 replace REG1 with REG0 in the previous insn that computed their value.
6072 Then REG1 will become a dead store and won't cloud the situation
6073 for later optimizations.
6075 Do not make this change if REG1 is a hard register, because it will
6076 then be used in the sequel and we may be changing a two-operand insn
6077 into a three-operand insn.
6079 Also do not do this if we are operating on a copy of INSN.
6081 Also don't do this if INSN ends a libcall; this would cause an unrelated
6082 register to be set in the middle of a libcall, and we then get bad code
6083 if the libcall is deleted. */
6085 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6086 && NEXT_INSN (PREV_INSN (insn)) == insn
6087 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6088 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6089 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
6090 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
6091 == REGNO (SET_DEST (sets[0].rtl)))
6092 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6094 rtx prev = PREV_INSN (insn);
6095 while (prev && GET_CODE (prev) == NOTE)
6096 prev = PREV_INSN (prev);
6098 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
6099 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
6101 rtx dest = SET_DEST (sets[0].rtl);
6102 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
6104 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
6105 validate_change (insn, & SET_DEST (sets[0].rtl),
6106 SET_SRC (sets[0].rtl), 1);
6107 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
6108 apply_change_group ();
6110 /* If REG1 was equivalent to a constant, REG0 is not. */
6112 PUT_REG_NOTE_KIND (note, REG_EQUAL);
6114 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6115 any REG_WAS_0 note on INSN to PREV. */
6116 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6118 remove_note (prev, note);
6120 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6123 remove_note (insn, note);
6124 XEXP (note, 1) = REG_NOTES (prev);
6125 REG_NOTES (prev) = note;
6128 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
6129 then we must delete it, because the value in REG0 has changed. */
6130 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6131 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
6132 remove_note (insn, note);
6136 /* If this is a conditional jump insn, record any known equivalences due to
6137 the condition being tested. */
6139 last_jump_equiv_class = 0;
6140 if (GET_CODE (insn) == JUMP_INSN
6141 && n_sets == 1 && GET_CODE (x) == SET
6142 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6143 record_jump_equiv (insn, 0);
6146 /* If the previous insn set CC0 and this insn no longer references CC0,
6147 delete the previous insn. Here we use the fact that nothing expects CC0
6148 to be valid over an insn, which is true until the final pass. */
6149 if (prev_insn && GET_CODE (prev_insn) == INSN
6150 && (tem = single_set (prev_insn)) != 0
6151 && SET_DEST (tem) == cc0_rtx
6152 && ! reg_mentioned_p (cc0_rtx, x))
6154 PUT_CODE (prev_insn, NOTE);
6155 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6156 NOTE_SOURCE_FILE (prev_insn) = 0;
6159 prev_insn_cc0 = this_insn_cc0;
6160 prev_insn_cc0_mode = this_insn_cc0_mode;
6166 /* Remove from the hash table all expressions that reference memory. */
6169 invalidate_memory ()
6172 register struct table_elt *p, *next;
6174 for (i = 0; i < NBUCKETS; i++)
6175 for (p = table[i]; p; p = next)
6177 next = p->next_same_hash;
6179 remove_from_table (p, i);
6185 /* If ADDR is an address that implicitly affects the stack pointer, return
6186 1 and update the register tables to show the effect. Else, return 0. */
6189 addr_affects_sp_p (addr)
6192 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6193 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6194 && GET_CODE (XEXP (addr, 0)) == REG
6195 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6197 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6198 REG_TICK (STACK_POINTER_REGNUM)++;
6200 /* This should be *very* rare. */
6201 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6202 invalidate (stack_pointer_rtx, VOIDmode);
6211 /* Perform invalidation on the basis of everything about an insn
6212 except for invalidating the actual places that are SET in it.
6213 This includes the places CLOBBERed, and anything that might
6214 alias with something that is SET or CLOBBERed.
6216 X is the pattern of the insn. */
6219 invalidate_from_clobbers (x)
6222 if (GET_CODE (x) == CLOBBER)
6224 rtx ref = XEXP (x, 0);
6227 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6228 || GET_CODE (ref) == MEM)
6229 invalidate (ref, VOIDmode);
6230 else if (GET_CODE (ref) == STRICT_LOW_PART
6231 || GET_CODE (ref) == ZERO_EXTRACT)
6232 invalidate (XEXP (ref, 0), GET_MODE (ref));
6235 else if (GET_CODE (x) == PARALLEL)
6238 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6240 register rtx y = XVECEXP (x, 0, i);
6241 if (GET_CODE (y) == CLOBBER)
6243 rtx ref = XEXP (y, 0);
6244 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6245 || GET_CODE (ref) == MEM)
6246 invalidate (ref, VOIDmode);
6247 else if (GET_CODE (ref) == STRICT_LOW_PART
6248 || GET_CODE (ref) == ZERO_EXTRACT)
6249 invalidate (XEXP (ref, 0), GET_MODE (ref));
6255 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6256 and replace any registers in them with either an equivalent constant
6257 or the canonical form of the register. If we are inside an address,
6258 only do this if the address remains valid.
6260 OBJECT is 0 except when within a MEM in which case it is the MEM.
6262 Return the replacement for X. */
6265 cse_process_notes (x, object)
6269 enum rtx_code code = GET_CODE (x);
6270 const char *fmt = GET_RTX_FORMAT (code);
6286 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6291 if (REG_NOTE_KIND (x) == REG_EQUAL)
6292 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6294 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6301 rtx new = cse_process_notes (XEXP (x, 0), object);
6302 /* We don't substitute VOIDmode constants into these rtx,
6303 since they would impede folding. */
6304 if (GET_MODE (new) != VOIDmode)
6305 validate_change (object, &XEXP (x, 0), new, 0);
6310 i = REG_QTY (REGNO (x));
6312 /* Return a constant or a constant register. */
6313 if (REGNO_QTY_VALID_P (REGNO (x))
6314 && qty_const[i] != 0
6315 && (CONSTANT_P (qty_const[i])
6316 || GET_CODE (qty_const[i]) == REG))
6318 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
6323 /* Otherwise, canonicalize this register. */
6324 return canon_reg (x, NULL_RTX);
6330 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6332 validate_change (object, &XEXP (x, i),
6333 cse_process_notes (XEXP (x, i), object), 0);
6338 /* Find common subexpressions between the end test of a loop and the beginning
6339 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6341 Often we have a loop where an expression in the exit test is used
6342 in the body of the loop. For example "while (*p) *q++ = *p++;".
6343 Because of the way we duplicate the loop exit test in front of the loop,
6344 however, we don't detect that common subexpression. This will be caught
6345 when global cse is implemented, but this is a quite common case.
6347 This function handles the most common cases of these common expressions.
6348 It is called after we have processed the basic block ending with the
6349 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6350 jumps to a label used only once. */
6353 cse_around_loop (loop_start)
6358 struct table_elt *p;
6360 /* If the jump at the end of the loop doesn't go to the start, we don't
6362 for (insn = PREV_INSN (loop_start);
6363 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6364 insn = PREV_INSN (insn))
6368 || GET_CODE (insn) != NOTE
6369 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6372 /* If the last insn of the loop (the end test) was an NE comparison,
6373 we will interpret it as an EQ comparison, since we fell through
6374 the loop. Any equivalences resulting from that comparison are
6375 therefore not valid and must be invalidated. */
6376 if (last_jump_equiv_class)
6377 for (p = last_jump_equiv_class->first_same_value; p;
6378 p = p->next_same_value)
6380 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6381 || (GET_CODE (p->exp) == SUBREG
6382 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6383 invalidate (p->exp, VOIDmode);
6384 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6385 || GET_CODE (p->exp) == ZERO_EXTRACT)
6386 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6389 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6390 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6392 The only thing we do with SET_DEST is invalidate entries, so we
6393 can safely process each SET in order. It is slightly less efficient
6394 to do so, but we only want to handle the most common cases.
6396 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6397 These pseudos won't have valid entries in any of the tables indexed
6398 by register number, such as reg_qty. We avoid out-of-range array
6399 accesses by not processing any instructions created after cse started. */
6401 for (insn = NEXT_INSN (loop_start);
6402 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6403 && INSN_UID (insn) < max_insn_uid
6404 && ! (GET_CODE (insn) == NOTE
6405 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6406 insn = NEXT_INSN (insn))
6408 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6409 && (GET_CODE (PATTERN (insn)) == SET
6410 || GET_CODE (PATTERN (insn)) == CLOBBER))
6411 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6412 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6413 && GET_CODE (PATTERN (insn)) == PARALLEL)
6414 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6415 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6416 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6417 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6422 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6423 since they are done elsewhere. This function is called via note_stores. */
6426 invalidate_skipped_set (dest, set, data)
6429 void *data ATTRIBUTE_UNUSED;
6431 enum rtx_code code = GET_CODE (dest);
6435 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6437 /* There are times when an address can appear varying and be a PLUS
6438 during this scan when it would be a fixed address were we to know
6439 the proper equivalences. So invalidate all memory if there is
6440 a BLKmode or nonscalar memory reference or a reference to a
6441 variable address. */
6442 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6443 || cse_rtx_varies_p (XEXP (dest, 0))))
6445 invalidate_memory ();
6449 if (GET_CODE (set) == CLOBBER
6456 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6457 invalidate (XEXP (dest, 0), GET_MODE (dest));
6458 else if (code == REG || code == SUBREG || code == MEM)
6459 invalidate (dest, VOIDmode);
6462 /* Invalidate all insns from START up to the end of the function or the
6463 next label. This called when we wish to CSE around a block that is
6464 conditionally executed. */
6467 invalidate_skipped_block (start)
6472 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6473 insn = NEXT_INSN (insn))
6475 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6478 if (GET_CODE (insn) == CALL_INSN)
6480 if (! CONST_CALL_P (insn))
6481 invalidate_memory ();
6482 invalidate_for_call ();
6485 invalidate_from_clobbers (PATTERN (insn));
6486 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6490 /* If modifying X will modify the value in *DATA (which is really an
6491 `rtx *'), indicate that fact by setting the pointed to value to
6495 cse_check_loop_start (x, set, data)
6497 rtx set ATTRIBUTE_UNUSED;
6500 rtx *cse_check_loop_start_value = (rtx *) data;
6502 if (*cse_check_loop_start_value == NULL_RTX
6503 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6506 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6507 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6508 *cse_check_loop_start_value = NULL_RTX;
6511 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6512 a loop that starts with the label at LOOP_START.
6514 If X is a SET, we see if its SET_SRC is currently in our hash table.
6515 If so, we see if it has a value equal to some register used only in the
6516 loop exit code (as marked by jump.c).
6518 If those two conditions are true, we search backwards from the start of
6519 the loop to see if that same value was loaded into a register that still
6520 retains its value at the start of the loop.
6522 If so, we insert an insn after the load to copy the destination of that
6523 load into the equivalent register and (try to) replace our SET_SRC with that
6526 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6529 cse_set_around_loop (x, insn, loop_start)
6534 struct table_elt *src_elt;
6536 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6537 are setting PC or CC0 or whose SET_SRC is already a register. */
6538 if (GET_CODE (x) == SET
6539 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6540 && GET_CODE (SET_SRC (x)) != REG)
6542 src_elt = lookup (SET_SRC (x),
6543 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6544 GET_MODE (SET_DEST (x)));
6547 for (src_elt = src_elt->first_same_value; src_elt;
6548 src_elt = src_elt->next_same_value)
6549 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6550 && COST (src_elt->exp) < COST (SET_SRC (x)))
6554 /* Look for an insn in front of LOOP_START that sets
6555 something in the desired mode to SET_SRC (x) before we hit
6556 a label or CALL_INSN. */
6558 for (p = prev_nonnote_insn (loop_start);
6559 p && GET_CODE (p) != CALL_INSN
6560 && GET_CODE (p) != CODE_LABEL;
6561 p = prev_nonnote_insn (p))
6562 if ((set = single_set (p)) != 0
6563 && GET_CODE (SET_DEST (set)) == REG
6564 && GET_MODE (SET_DEST (set)) == src_elt->mode
6565 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6567 /* We now have to ensure that nothing between P
6568 and LOOP_START modified anything referenced in
6569 SET_SRC (x). We know that nothing within the loop
6570 can modify it, or we would have invalidated it in
6573 rtx cse_check_loop_start_value = SET_SRC (x);
6574 for (q = p; q != loop_start; q = NEXT_INSN (q))
6575 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6576 note_stores (PATTERN (q),
6577 cse_check_loop_start,
6578 &cse_check_loop_start_value);
6580 /* If nothing was changed and we can replace our
6581 SET_SRC, add an insn after P to copy its destination
6582 to what we will be replacing SET_SRC with. */
6583 if (cse_check_loop_start_value
6584 && validate_change (insn, &SET_SRC (x),
6587 /* If this creates new pseudos, this is unsafe,
6588 because the regno of new pseudo is unsuitable
6589 to index into reg_qty when cse_insn processes
6590 the new insn. Therefore, if a new pseudo was
6591 created, discard this optimization. */
6592 int nregs = max_reg_num ();
6594 = gen_move_insn (src_elt->exp, SET_DEST (set));
6595 if (nregs != max_reg_num ())
6597 if (! validate_change (insn, &SET_SRC (x),
6602 emit_insn_after (move, p);
6610 /* Deal with the destination of X affecting the stack pointer. */
6611 addr_affects_sp_p (SET_DEST (x));
6614 /* See comment on similar code in cse_insn for explanation of these
6616 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6617 || GET_CODE (SET_DEST (x)) == MEM)
6618 invalidate (SET_DEST (x), VOIDmode);
6619 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6620 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6621 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6624 /* Find the end of INSN's basic block and return its range,
6625 the total number of SETs in all the insns of the block, the last insn of the
6626 block, and the branch path.
6628 The branch path indicates which branches should be followed. If a non-zero
6629 path size is specified, the block should be rescanned and a different set
6630 of branches will be taken. The branch path is only used if
6631 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6633 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6634 used to describe the block. It is filled in with the information about
6635 the current block. The incoming structure's branch path, if any, is used
6636 to construct the output branch path. */
6639 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6641 struct cse_basic_block_data *data;
6648 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6649 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6650 int path_size = data->path_size;
6654 /* Update the previous branch path, if any. If the last branch was
6655 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6656 shorten the path by one and look at the previous branch. We know that
6657 at least one branch must have been taken if PATH_SIZE is non-zero. */
6658 while (path_size > 0)
6660 if (data->path[path_size - 1].status != NOT_TAKEN)
6662 data->path[path_size - 1].status = NOT_TAKEN;
6669 /* If the first instruction is marked with QImode, that means we've
6670 already processed this block. Our caller will look at DATA->LAST
6671 to figure out where to go next. We want to return the next block
6672 in the instruction stream, not some branched-to block somewhere
6673 else. We accomplish this by pretending our called forbid us to
6674 follow jumps, or skip blocks. */
6675 if (GET_MODE (insn) == QImode)
6676 follow_jumps = skip_blocks = 0;
6678 /* Scan to end of this basic block. */
6679 while (p && GET_CODE (p) != CODE_LABEL)
6681 /* Don't cse out the end of a loop. This makes a difference
6682 only for the unusual loops that always execute at least once;
6683 all other loops have labels there so we will stop in any case.
6684 Cse'ing out the end of the loop is dangerous because it
6685 might cause an invariant expression inside the loop
6686 to be reused after the end of the loop. This would make it
6687 hard to move the expression out of the loop in loop.c,
6688 especially if it is one of several equivalent expressions
6689 and loop.c would like to eliminate it.
6691 If we are running after loop.c has finished, we can ignore
6692 the NOTE_INSN_LOOP_END. */
6694 if (! after_loop && GET_CODE (p) == NOTE
6695 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6698 /* Don't cse over a call to setjmp; on some machines (eg vax)
6699 the regs restored by the longjmp come from
6700 a later time than the setjmp. */
6701 if (GET_CODE (p) == NOTE
6702 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6705 /* A PARALLEL can have lots of SETs in it,
6706 especially if it is really an ASM_OPERANDS. */
6707 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6708 && GET_CODE (PATTERN (p)) == PARALLEL)
6709 nsets += XVECLEN (PATTERN (p), 0);
6710 else if (GET_CODE (p) != NOTE)
6713 /* Ignore insns made by CSE; they cannot affect the boundaries of
6716 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6717 high_cuid = INSN_CUID (p);
6718 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6719 low_cuid = INSN_CUID (p);
6721 /* See if this insn is in our branch path. If it is and we are to
6723 if (path_entry < path_size && data->path[path_entry].branch == p)
6725 if (data->path[path_entry].status != NOT_TAKEN)
6728 /* Point to next entry in path, if any. */
6732 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6733 was specified, we haven't reached our maximum path length, there are
6734 insns following the target of the jump, this is the only use of the
6735 jump label, and the target label is preceded by a BARRIER.
6737 Alternatively, we can follow the jump if it branches around a
6738 block of code and there are no other branches into the block.
6739 In this case invalidate_skipped_block will be called to invalidate any
6740 registers set in the block when following the jump. */
6742 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6743 && GET_CODE (p) == JUMP_INSN
6744 && GET_CODE (PATTERN (p)) == SET
6745 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6746 && JUMP_LABEL (p) != 0
6747 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6748 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6750 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6751 if ((GET_CODE (q) != NOTE
6752 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6753 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6754 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6757 /* If we ran into a BARRIER, this code is an extension of the
6758 basic block when the branch is taken. */
6759 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6761 /* Don't allow ourself to keep walking around an
6762 always-executed loop. */
6763 if (next_real_insn (q) == next)
6769 /* Similarly, don't put a branch in our path more than once. */
6770 for (i = 0; i < path_entry; i++)
6771 if (data->path[i].branch == p)
6774 if (i != path_entry)
6777 data->path[path_entry].branch = p;
6778 data->path[path_entry++].status = TAKEN;
6780 /* This branch now ends our path. It was possible that we
6781 didn't see this branch the last time around (when the
6782 insn in front of the target was a JUMP_INSN that was
6783 turned into a no-op). */
6784 path_size = path_entry;
6787 /* Mark block so we won't scan it again later. */
6788 PUT_MODE (NEXT_INSN (p), QImode);
6790 /* Detect a branch around a block of code. */
6791 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6795 if (next_real_insn (q) == next)
6801 for (i = 0; i < path_entry; i++)
6802 if (data->path[i].branch == p)
6805 if (i != path_entry)
6808 /* This is no_labels_between_p (p, q) with an added check for
6809 reaching the end of a function (in case Q precedes P). */
6810 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6811 if (GET_CODE (tmp) == CODE_LABEL)
6816 data->path[path_entry].branch = p;
6817 data->path[path_entry++].status = AROUND;
6819 path_size = path_entry;
6822 /* Mark block so we won't scan it again later. */
6823 PUT_MODE (NEXT_INSN (p), QImode);
6830 data->low_cuid = low_cuid;
6831 data->high_cuid = high_cuid;
6832 data->nsets = nsets;
6835 /* If all jumps in the path are not taken, set our path length to zero
6836 so a rescan won't be done. */
6837 for (i = path_size - 1; i >= 0; i--)
6838 if (data->path[i].status != NOT_TAKEN)
6842 data->path_size = 0;
6844 data->path_size = path_size;
6846 /* End the current branch path. */
6847 data->path[path_size].branch = 0;
6850 /* Perform cse on the instructions of a function.
6851 F is the first instruction.
6852 NREGS is one plus the highest pseudo-reg number used in the instruction.
6854 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6855 (only if -frerun-cse-after-loop).
6857 Returns 1 if jump_optimize should be redone due to simplifications
6858 in conditional jump instructions. */
6861 cse_main (f, nregs, after_loop, file)
6867 struct cse_basic_block_data val;
6868 register rtx insn = f;
6871 cse_jumps_altered = 0;
6872 recorded_label_ref = 0;
6873 constant_pool_entries_cost = 0;
6877 init_alias_analysis ();
6881 max_insn_uid = get_max_uid ();
6883 reg_next_eqv = (int *) xmalloc (nregs * sizeof (int));
6884 reg_prev_eqv = (int *) xmalloc (nregs * sizeof (int));
6886 #ifdef LOAD_EXTEND_OP
6888 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6889 and change the code and mode as appropriate. */
6890 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6893 /* Discard all the free elements of the previous function
6894 since they are allocated in the temporarily obstack. */
6895 bzero ((char *) table, sizeof table);
6896 free_element_chain = 0;
6897 n_elements_made = 0;
6899 /* Find the largest uid. */
6901 max_uid = get_max_uid ();
6902 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6904 /* Compute the mapping from uids to cuids.
6905 CUIDs are numbers assigned to insns, like uids,
6906 except that cuids increase monotonically through the code.
6907 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6908 between two insns is not affected by -g. */
6910 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6912 if (GET_CODE (insn) != NOTE
6913 || NOTE_LINE_NUMBER (insn) < 0)
6914 INSN_CUID (insn) = ++i;
6916 /* Give a line number note the same cuid as preceding insn. */
6917 INSN_CUID (insn) = i;
6920 /* Initialize which registers are clobbered by calls. */
6922 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6924 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6925 if ((call_used_regs[i]
6926 /* Used to check !fixed_regs[i] here, but that isn't safe;
6927 fixed regs are still call-clobbered, and sched can get
6928 confused if they can "live across calls".
6930 The frame pointer is always preserved across calls. The arg
6931 pointer is if it is fixed. The stack pointer usually is, unless
6932 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6933 will be present. If we are generating PIC code, the PIC offset
6934 table register is preserved across calls. */
6936 && i != STACK_POINTER_REGNUM
6937 && i != FRAME_POINTER_REGNUM
6938 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6939 && i != HARD_FRAME_POINTER_REGNUM
6941 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6942 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6944 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6945 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6949 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6952 ggc_push_context ();
6954 /* Loop over basic blocks.
6955 Compute the maximum number of qty's needed for each basic block
6956 (which is 2 for each SET). */
6960 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6961 flag_cse_skip_blocks);
6963 /* If this basic block was already processed or has no sets, skip it. */
6964 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6966 PUT_MODE (insn, VOIDmode);
6967 insn = (val.last ? NEXT_INSN (val.last) : 0);
6972 cse_basic_block_start = val.low_cuid;
6973 cse_basic_block_end = val.high_cuid;
6974 max_qty = val.nsets * 2;
6977 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6978 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6981 /* Make MAX_QTY bigger to give us room to optimize
6982 past the end of this basic block, if that should prove useful. */
6988 /* If this basic block is being extended by following certain jumps,
6989 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6990 Otherwise, we start after this basic block. */
6991 if (val.path_size > 0)
6992 cse_basic_block (insn, val.last, val.path, 0);
6995 int old_cse_jumps_altered = cse_jumps_altered;
6998 /* When cse changes a conditional jump to an unconditional
6999 jump, we want to reprocess the block, since it will give
7000 us a new branch path to investigate. */
7001 cse_jumps_altered = 0;
7002 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7003 if (cse_jumps_altered == 0
7004 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7007 cse_jumps_altered |= old_cse_jumps_altered;
7021 /* Tell refers_to_mem_p that qty_const info is not available. */
7024 if (max_elements_made < n_elements_made)
7025 max_elements_made = n_elements_made;
7028 end_alias_analysis ();
7030 free (reg_next_eqv);
7031 free (reg_prev_eqv);
7033 return cse_jumps_altered || recorded_label_ref;
7036 /* Process a single basic block. FROM and TO and the limits of the basic
7037 block. NEXT_BRANCH points to the branch path when following jumps or
7038 a null path when not following jumps.
7040 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7041 loop. This is true when we are being called for the last time on a
7042 block and this CSE pass is before loop.c. */
7045 cse_basic_block (from, to, next_branch, around_loop)
7046 register rtx from, to;
7047 struct branch_path *next_branch;
7052 rtx libcall_insn = NULL_RTX;
7055 /* Each of these arrays is undefined before max_reg, so only allocate
7056 the space actually needed and adjust the start below. */
7058 qty_first_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
7059 qty_last_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
7060 qty_mode = (enum machine_mode *) xmalloc ((max_qty - max_reg)
7061 * sizeof (enum machine_mode));
7062 qty_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
7063 qty_const_insn = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
7065 = (enum rtx_code *) xmalloc ((max_qty - max_reg) * sizeof (enum rtx_code));
7066 qty_comparison_qty = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
7067 qty_comparison_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
7069 qty_first_reg -= max_reg;
7070 qty_last_reg -= max_reg;
7071 qty_mode -= max_reg;
7072 qty_const -= max_reg;
7073 qty_const_insn -= max_reg;
7074 qty_comparison_code -= max_reg;
7075 qty_comparison_qty -= max_reg;
7076 qty_comparison_const -= max_reg;
7080 /* TO might be a label. If so, protect it from being deleted. */
7081 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7084 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7086 register enum rtx_code code = GET_CODE (insn);
7088 /* If we have processed 1,000 insns, flush the hash table to
7089 avoid extreme quadratic behavior. We must not include NOTEs
7090 in the count since there may be more or them when generating
7091 debugging information. If we clear the table at different
7092 times, code generated with -g -O might be different than code
7093 generated with -O but not -g.
7095 ??? This is a real kludge and needs to be done some other way.
7097 if (code != NOTE && num_insns++ > 1000)
7099 flush_hash_table ();
7103 /* See if this is a branch that is part of the path. If so, and it is
7104 to be taken, do so. */
7105 if (next_branch->branch == insn)
7107 enum taken status = next_branch++->status;
7108 if (status != NOT_TAKEN)
7110 if (status == TAKEN)
7111 record_jump_equiv (insn, 1);
7113 invalidate_skipped_block (NEXT_INSN (insn));
7115 /* Set the last insn as the jump insn; it doesn't affect cc0.
7116 Then follow this branch. */
7121 insn = JUMP_LABEL (insn);
7126 if (GET_MODE (insn) == QImode)
7127 PUT_MODE (insn, VOIDmode);
7129 if (GET_RTX_CLASS (code) == 'i')
7133 /* Process notes first so we have all notes in canonical forms when
7134 looking for duplicate operations. */
7136 if (REG_NOTES (insn))
7137 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7139 /* Track when we are inside in LIBCALL block. Inside such a block,
7140 we do not want to record destinations. The last insn of a
7141 LIBCALL block is not considered to be part of the block, since
7142 its destination is the result of the block and hence should be
7145 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7146 libcall_insn = XEXP (p, 0);
7147 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7148 libcall_insn = NULL_RTX;
7150 cse_insn (insn, libcall_insn);
7153 /* If INSN is now an unconditional jump, skip to the end of our
7154 basic block by pretending that we just did the last insn in the
7155 basic block. If we are jumping to the end of our block, show
7156 that we can have one usage of TO. */
7158 if (simplejump_p (insn))
7163 if (JUMP_LABEL (insn) == to)
7166 /* Maybe TO was deleted because the jump is unconditional.
7167 If so, there is nothing left in this basic block. */
7168 /* ??? Perhaps it would be smarter to set TO
7169 to whatever follows this insn,
7170 and pretend the basic block had always ended here. */
7171 if (INSN_DELETED_P (to))
7174 insn = PREV_INSN (to);
7177 /* See if it is ok to keep on going past the label
7178 which used to end our basic block. Remember that we incremented
7179 the count of that label, so we decrement it here. If we made
7180 a jump unconditional, TO_USAGE will be one; in that case, we don't
7181 want to count the use in that jump. */
7183 if (to != 0 && NEXT_INSN (insn) == to
7184 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7186 struct cse_basic_block_data val;
7189 insn = NEXT_INSN (to);
7191 /* If TO was the last insn in the function, we are done. */
7195 /* If TO was preceded by a BARRIER we are done with this block
7196 because it has no continuation. */
7197 prev = prev_nonnote_insn (to);
7198 if (prev && GET_CODE (prev) == BARRIER)
7201 /* Find the end of the following block. Note that we won't be
7202 following branches in this case. */
7205 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7207 /* If the tables we allocated have enough space left
7208 to handle all the SETs in the next basic block,
7209 continue through it. Otherwise, return,
7210 and that block will be scanned individually. */
7211 if (val.nsets * 2 + next_qty > max_qty)
7214 cse_basic_block_start = val.low_cuid;
7215 cse_basic_block_end = val.high_cuid;
7218 /* Prevent TO from being deleted if it is a label. */
7219 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7222 /* Back up so we process the first insn in the extension. */
7223 insn = PREV_INSN (insn);
7227 if (next_qty > max_qty)
7230 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7231 the previous insn is the only insn that branches to the head of a loop,
7232 we can cse into the loop. Don't do this if we changed the jump
7233 structure of a loop unless we aren't going to be following jumps. */
7235 if ((cse_jumps_altered == 0
7236 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7237 && around_loop && to != 0
7238 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7239 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7240 && JUMP_LABEL (PREV_INSN (to)) != 0
7241 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7242 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7244 free (qty_first_reg + max_reg);
7245 free (qty_last_reg + max_reg);
7246 free (qty_mode + max_reg);
7247 free (qty_const + max_reg);
7248 free (qty_const_insn + max_reg);
7249 free (qty_comparison_code + max_reg);
7250 free (qty_comparison_qty + max_reg);
7251 free (qty_comparison_const + max_reg);
7253 return to ? NEXT_INSN (to) : 0;
7256 /* Count the number of times registers are used (not set) in X.
7257 COUNTS is an array in which we accumulate the count, INCR is how much
7258 we count each register usage.
7260 Don't count a usage of DEST, which is the SET_DEST of a SET which
7261 contains X in its SET_SRC. This is because such a SET does not
7262 modify the liveness of DEST. */
7265 count_reg_usage (x, counts, dest, incr)
7278 switch (code = GET_CODE (x))
7282 counts[REGNO (x)] += incr;
7295 /* If we are clobbering a MEM, mark any registers inside the address
7297 if (GET_CODE (XEXP (x, 0)) == MEM)
7298 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7302 /* Unless we are setting a REG, count everything in SET_DEST. */
7303 if (GET_CODE (SET_DEST (x)) != REG)
7304 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7306 /* If SRC has side-effects, then we can't delete this insn, so the
7307 usage of SET_DEST inside SRC counts.
7309 ??? Strictly-speaking, we might be preserving this insn
7310 because some other SET has side-effects, but that's hard
7311 to do and can't happen now. */
7312 count_reg_usage (SET_SRC (x), counts,
7313 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7318 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7320 /* ... falls through ... */
7323 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7325 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7328 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7333 if (REG_NOTE_KIND (x) == REG_EQUAL
7334 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7335 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7336 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7343 fmt = GET_RTX_FORMAT (code);
7344 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7347 count_reg_usage (XEXP (x, i), counts, dest, incr);
7348 else if (fmt[i] == 'E')
7349 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7350 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7354 /* Scan all the insns and delete any that are dead; i.e., they store a register
7355 that is never used or they copy a register to itself.
7357 This is used to remove insns made obviously dead by cse, loop or other
7358 optimizations. It improves the heuristics in loop since it won't try to
7359 move dead invariants out of loops or make givs for dead quantities. The
7360 remaining passes of the compilation are also sped up. */
7363 delete_trivially_dead_insns (insns, nreg)
7373 int in_libcall = 0, dead_libcall = 0;
7375 /* First count the number of times each register is used. */
7376 counts = (int *) xcalloc (nreg, sizeof (int));
7377 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7378 count_reg_usage (insn, counts, NULL_RTX, 1);
7380 /* Go from the last insn to the first and delete insns that only set unused
7381 registers or copy a register to itself. As we delete an insn, remove
7382 usage counts for registers it uses.
7384 The first jump optimization pass may leave a real insn as the last
7385 insn in the function. We must not skip that insn or we may end
7386 up deleting code that is not really dead. */
7387 insn = get_last_insn ();
7388 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7389 insn = prev_real_insn (insn);
7391 for ( ; insn; insn = prev)
7396 prev = prev_real_insn (insn);
7398 /* Don't delete any insns that are part of a libcall block unless
7399 we can delete the whole libcall block.
7401 Flow or loop might get confused if we did that. Remember
7402 that we are scanning backwards. */
7403 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7409 /* See if there's a REG_EQUAL note on this insn and try to
7410 replace the source with the REG_EQUAL expression.
7412 We assume that insns with REG_RETVALs can only be reg->reg
7413 copies at this point. */
7414 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7417 rtx set = single_set (insn);
7418 rtx new = simplify_rtx (XEXP (note, 0));
7421 new = XEXP (note, 0);
7423 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7426 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7431 else if (in_libcall)
7432 live_insn = ! dead_libcall;
7433 else if (GET_CODE (PATTERN (insn)) == SET)
7435 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
7436 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
7440 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7441 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7442 && ((tem = next_nonnote_insn (insn)) == 0
7443 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7444 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7447 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7448 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7449 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7450 || side_effects_p (SET_SRC (PATTERN (insn)))
7451 /* An ADDRESSOF expression can turn into a use of the
7452 internal arg pointer, so always consider the
7453 internal arg pointer live. If it is truly dead,
7454 flow will delete the initializing insn. */
7455 || (SET_DEST (PATTERN (insn))
7456 == current_function_internal_arg_pointer))
7459 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7460 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7462 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7464 if (GET_CODE (elt) == SET)
7466 if (GET_CODE (SET_DEST (elt)) == REG
7467 && SET_DEST (elt) == SET_SRC (elt))
7471 else if (GET_CODE (SET_DEST (elt)) == CC0
7472 && ! side_effects_p (SET_SRC (elt))
7473 && ((tem = next_nonnote_insn (insn)) == 0
7474 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7475 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7478 else if (GET_CODE (SET_DEST (elt)) != REG
7479 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7480 || counts[REGNO (SET_DEST (elt))] != 0
7481 || side_effects_p (SET_SRC (elt))
7482 /* An ADDRESSOF expression can turn into a use of the
7483 internal arg pointer, so always consider the
7484 internal arg pointer live. If it is truly dead,
7485 flow will delete the initializing insn. */
7487 == current_function_internal_arg_pointer))
7490 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7496 /* If this is a dead insn, delete it and show registers in it aren't
7501 count_reg_usage (insn, counts, NULL_RTX, -1);
7505 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
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