1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
35 #include "insn-config.h"
46 #include "rtlhooks-def.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `reg_qty' records what quantity a register is currently thought
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, reg_qty[N] will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
177 reg_tick[i] is incremented whenever a value is stored in register i.
178 reg_in_table[i] holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value reg_tick[i] had
180 when the references were entered. If we want to enter a reference
181 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
182 Until we want to enter a new entry, the mere fact that the two vectors
183 don't match makes the entries be ignored if anyone tries to match them.
185 Registers themselves are entered in the hash table as well as in
186 the equivalent-register chains. However, the vectors `reg_tick'
187 and `reg_in_table' do not apply to expressions which are simple
188 register references. These expressions are removed from the table
189 immediately when they become invalid, and this can be done even if
190 we do not immediately search for all the expressions that refer to
193 A CLOBBER rtx in an instruction invalidates its operand for further
194 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
195 invalidates everything that resides in memory.
199 Constant expressions that differ only by an additive integer
200 are called related. When a constant expression is put in
201 the table, the related expression with no constant term
202 is also entered. These are made to point at each other
203 so that it is possible to find out if there exists any
204 register equivalent to an expression related to a given expression. */
206 /* One plus largest register number used in this function. */
210 /* One plus largest instruction UID used in this function at time of
213 static int max_insn_uid;
215 /* Length of qty_table vector. We know in advance we will not need
216 a quantity number this big. */
220 /* Next quantity number to be allocated.
221 This is 1 + the largest number needed so far. */
225 /* Per-qty information tracking.
227 `first_reg' and `last_reg' track the head and tail of the
228 chain of registers which currently contain this quantity.
230 `mode' contains the machine mode of this quantity.
232 `const_rtx' holds the rtx of the constant value of this
233 quantity, if known. A summations of the frame/arg pointer
234 and a constant can also be entered here. When this holds
235 a known value, `const_insn' is the insn which stored the
238 `comparison_{code,const,qty}' are used to track when a
239 comparison between a quantity and some constant or register has
240 been passed. In such a case, we know the results of the comparison
241 in case we see it again. These members record a comparison that
242 is known to be true. `comparison_code' holds the rtx code of such
243 a comparison, else it is set to UNKNOWN and the other two
244 comparison members are undefined. `comparison_const' holds
245 the constant being compared against, or zero if the comparison
246 is not against a constant. `comparison_qty' holds the quantity
247 being compared against when the result is known. If the comparison
248 is not with a register, `comparison_qty' is -1. */
250 struct qty_table_elem
254 rtx comparison_const;
256 unsigned int first_reg, last_reg;
257 /* The sizes of these fields should match the sizes of the
258 code and mode fields of struct rtx_def (see rtl.h). */
259 ENUM_BITFIELD(rtx_code) comparison_code : 16;
260 ENUM_BITFIELD(machine_mode) mode : 8;
263 /* The table of all qtys, indexed by qty number. */
264 static struct qty_table_elem *qty_table;
266 /* Structure used to pass arguments via for_each_rtx to function
267 cse_change_cc_mode. */
268 struct change_cc_mode_args
275 /* For machines that have a CC0, we do not record its value in the hash
276 table since its use is guaranteed to be the insn immediately following
277 its definition and any other insn is presumed to invalidate it.
279 Instead, we store below the value last assigned to CC0. If it should
280 happen to be a constant, it is stored in preference to the actual
281 assigned value. In case it is a constant, we store the mode in which
282 the constant should be interpreted. */
284 static rtx prev_insn_cc0;
285 static enum machine_mode prev_insn_cc0_mode;
287 /* Previous actual insn. 0 if at first insn of basic block. */
289 static rtx prev_insn;
292 /* Insn being scanned. */
294 static rtx this_insn;
296 /* Index by register number, gives the number of the next (or
297 previous) register in the chain of registers sharing the same
300 Or -1 if this register is at the end of the chain.
302 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
304 /* Per-register equivalence chain. */
310 /* The table of all register equivalence chains. */
311 static struct reg_eqv_elem *reg_eqv_table;
315 /* Next in hash chain. */
316 struct cse_reg_info *hash_next;
318 /* The next cse_reg_info structure in the free or used list. */
319 struct cse_reg_info *next;
324 /* The quantity number of the register's current contents. */
327 /* The number of times the register has been altered in the current
331 /* The REG_TICK value at which rtx's containing this register are
332 valid in the hash table. If this does not equal the current
333 reg_tick value, such expressions existing in the hash table are
337 /* The SUBREG that was set when REG_TICK was last incremented. Set
338 to -1 if the last store was to the whole register, not a subreg. */
339 unsigned int subreg_ticked;
342 /* A free list of cse_reg_info entries. */
343 static struct cse_reg_info *cse_reg_info_free_list;
345 /* A used list of cse_reg_info entries. */
346 static struct cse_reg_info *cse_reg_info_used_list;
347 static struct cse_reg_info *cse_reg_info_used_list_end;
349 /* A mapping from registers to cse_reg_info data structures. */
350 #define REGHASH_SHIFT 7
351 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
352 #define REGHASH_MASK (REGHASH_SIZE - 1)
353 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
355 #define REGHASH_FN(REGNO) \
356 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
358 /* The last lookup we did into the cse_reg_info_tree. This allows us
359 to cache repeated lookups. */
360 static unsigned int cached_regno;
361 static struct cse_reg_info *cached_cse_reg_info;
363 /* A HARD_REG_SET containing all the hard registers for which there is
364 currently a REG expression in the hash table. Note the difference
365 from the above variables, which indicate if the REG is mentioned in some
366 expression in the table. */
368 static HARD_REG_SET hard_regs_in_table;
370 /* CUID of insn that starts the basic block currently being cse-processed. */
372 static int cse_basic_block_start;
374 /* CUID of insn that ends the basic block currently being cse-processed. */
376 static int cse_basic_block_end;
378 /* Vector mapping INSN_UIDs to cuids.
379 The cuids are like uids but increase monotonically always.
380 We use them to see whether a reg is used outside a given basic block. */
382 static int *uid_cuid;
384 /* Highest UID in UID_CUID. */
387 /* Get the cuid of an insn. */
389 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
391 /* Nonzero if this pass has made changes, and therefore it's
392 worthwhile to run the garbage collector. */
394 static int cse_altered;
396 /* Nonzero if cse has altered conditional jump insns
397 in such a way that jump optimization should be redone. */
399 static int cse_jumps_altered;
401 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
402 REG_LABEL, we have to rerun jump after CSE to put in the note. */
403 static int recorded_label_ref;
405 /* canon_hash stores 1 in do_not_record
406 if it notices a reference to CC0, PC, or some other volatile
409 static int do_not_record;
411 /* canon_hash stores 1 in hash_arg_in_memory
412 if it notices a reference to memory within the expression being hashed. */
414 static int hash_arg_in_memory;
416 /* The hash table contains buckets which are chains of `struct table_elt's,
417 each recording one expression's information.
418 That expression is in the `exp' field.
420 The canon_exp field contains a canonical (from the point of view of
421 alias analysis) version of the `exp' field.
423 Those elements with the same hash code are chained in both directions
424 through the `next_same_hash' and `prev_same_hash' fields.
426 Each set of expressions with equivalent values
427 are on a two-way chain through the `next_same_value'
428 and `prev_same_value' fields, and all point with
429 the `first_same_value' field at the first element in
430 that chain. The chain is in order of increasing cost.
431 Each element's cost value is in its `cost' field.
433 The `in_memory' field is nonzero for elements that
434 involve any reference to memory. These elements are removed
435 whenever a write is done to an unidentified location in memory.
436 To be safe, we assume that a memory address is unidentified unless
437 the address is either a symbol constant or a constant plus
438 the frame pointer or argument pointer.
440 The `related_value' field is used to connect related expressions
441 (that differ by adding an integer).
442 The related expressions are chained in a circular fashion.
443 `related_value' is zero for expressions for which this
446 The `cost' field stores the cost of this element's expression.
447 The `regcost' field stores the value returned by approx_reg_cost for
448 this element's expression.
450 The `is_const' flag is set if the element is a constant (including
453 The `flag' field is used as a temporary during some search routines.
455 The `mode' field is usually the same as GET_MODE (`exp'), but
456 if `exp' is a CONST_INT and has no machine mode then the `mode'
457 field is the mode it was being used as. Each constant is
458 recorded separately for each mode it is used with. */
464 struct table_elt *next_same_hash;
465 struct table_elt *prev_same_hash;
466 struct table_elt *next_same_value;
467 struct table_elt *prev_same_value;
468 struct table_elt *first_same_value;
469 struct table_elt *related_value;
472 /* The size of this field should match the size
473 of the mode field of struct rtx_def (see rtl.h). */
474 ENUM_BITFIELD(machine_mode) mode : 8;
480 /* We don't want a lot of buckets, because we rarely have very many
481 things stored in the hash table, and a lot of buckets slows
482 down a lot of loops that happen frequently. */
484 #define HASH_SIZE (1 << HASH_SHIFT)
485 #define HASH_MASK (HASH_SIZE - 1)
487 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
488 register (hard registers may require `do_not_record' to be set). */
491 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
492 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
493 : canon_hash (X, M)) & HASH_MASK)
495 /* Like HASH, but without side-effects. */
496 #define SAFE_HASH(X, M) \
497 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
498 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
499 : safe_hash (X, M)) & HASH_MASK)
501 /* Determine whether register number N is considered a fixed register for the
502 purpose of approximating register costs.
503 It is desirable to replace other regs with fixed regs, to reduce need for
505 A reg wins if it is either the frame pointer or designated as fixed. */
506 #define FIXED_REGNO_P(N) \
507 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
508 || fixed_regs[N] || global_regs[N])
510 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
511 hard registers and pointers into the frame are the cheapest with a cost
512 of 0. Next come pseudos with a cost of one and other hard registers with
513 a cost of 2. Aside from these special cases, call `rtx_cost'. */
515 #define CHEAP_REGNO(N) \
516 (REGNO_PTR_FRAME_P(N) \
517 || (HARD_REGISTER_NUM_P (N) \
518 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
520 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
521 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
523 /* Get the info associated with register N. */
525 #define GET_CSE_REG_INFO(N) \
526 (((N) == cached_regno && cached_cse_reg_info) \
527 ? cached_cse_reg_info : get_cse_reg_info ((N)))
529 /* Get the number of times this register has been updated in this
532 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
534 /* Get the point at which REG was recorded in the table. */
536 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
538 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
541 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
543 /* Get the quantity number for REG. */
545 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
547 /* Determine if the quantity number for register X represents a valid index
548 into the qty_table. */
550 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
552 static struct table_elt *table[HASH_SIZE];
554 /* Chain of `struct table_elt's made so far for this function
555 but currently removed from the table. */
557 static struct table_elt *free_element_chain;
559 /* Number of `struct table_elt' structures made so far for this function. */
561 static int n_elements_made;
563 /* Maximum value `n_elements_made' has had so far in this compilation
564 for functions previously processed. */
566 static int max_elements_made;
568 /* Set to the cost of a constant pool reference if one was found for a
569 symbolic constant. If this was found, it means we should try to
570 convert constants into constant pool entries if they don't fit in
573 static int constant_pool_entries_cost;
574 static int constant_pool_entries_regcost;
576 /* This data describes a block that will be processed by cse_basic_block. */
578 struct cse_basic_block_data
580 /* Lowest CUID value of insns in block. */
582 /* Highest CUID value of insns in block. */
584 /* Total number of SETs in block. */
586 /* Last insn in the block. */
588 /* Size of current branch path, if any. */
590 /* Current branch path, indicating which branches will be taken. */
593 /* The branch insn. */
595 /* Whether it should be taken or not. AROUND is the same as taken
596 except that it is used when the destination label is not preceded
598 enum taken {PATH_TAKEN, PATH_NOT_TAKEN, PATH_AROUND} status;
602 static bool fixed_base_plus_p (rtx x);
603 static int notreg_cost (rtx, enum rtx_code);
604 static int approx_reg_cost_1 (rtx *, void *);
605 static int approx_reg_cost (rtx);
606 static int preferable (int, int, int, int);
607 static void new_basic_block (void);
608 static void make_new_qty (unsigned int, enum machine_mode);
609 static void make_regs_eqv (unsigned int, unsigned int);
610 static void delete_reg_equiv (unsigned int);
611 static int mention_regs (rtx);
612 static int insert_regs (rtx, struct table_elt *, int);
613 static void remove_from_table (struct table_elt *, unsigned);
614 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
615 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
616 static rtx lookup_as_function (rtx, enum rtx_code);
617 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
619 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
620 static void invalidate (rtx, enum machine_mode);
621 static int cse_rtx_varies_p (rtx, int);
622 static void remove_invalid_refs (unsigned int);
623 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
625 static void rehash_using_reg (rtx);
626 static void invalidate_memory (void);
627 static void invalidate_for_call (void);
628 static rtx use_related_value (rtx, struct table_elt *);
630 static inline unsigned canon_hash (rtx, enum machine_mode);
631 static inline unsigned safe_hash (rtx, enum machine_mode);
632 static unsigned hash_rtx_string (const char *);
634 static rtx canon_reg (rtx, rtx);
635 static void find_best_addr (rtx, rtx *, enum machine_mode);
636 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
638 enum machine_mode *);
639 static rtx fold_rtx (rtx, rtx);
640 static rtx equiv_constant (rtx);
641 static void record_jump_equiv (rtx, int);
642 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
644 static void cse_insn (rtx, rtx);
645 static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
647 static int addr_affects_sp_p (rtx);
648 static void invalidate_from_clobbers (rtx);
649 static rtx cse_process_notes (rtx, rtx);
650 static void invalidate_skipped_set (rtx, rtx, void *);
651 static void invalidate_skipped_block (rtx);
652 static rtx cse_basic_block (rtx, rtx, struct branch_path *);
653 static void count_reg_usage (rtx, int *, int);
654 static int check_for_label_ref (rtx *, void *);
655 extern void dump_class (struct table_elt*);
656 static struct cse_reg_info * get_cse_reg_info (unsigned int);
657 static int check_dependence (rtx *, void *);
659 static void flush_hash_table (void);
660 static bool insn_live_p (rtx, int *);
661 static bool set_live_p (rtx, rtx, int *);
662 static bool dead_libcall_p (rtx, int *);
663 static int cse_change_cc_mode (rtx *, void *);
664 static void cse_change_cc_mode_insn (rtx, rtx);
665 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
666 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
669 #undef RTL_HOOKS_GEN_LOWPART
670 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
672 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
674 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
675 virtual regs here because the simplify_*_operation routines are called
676 by integrate.c, which is called before virtual register instantiation. */
679 fixed_base_plus_p (rtx x)
681 switch (GET_CODE (x))
684 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
686 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
688 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
689 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
694 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
696 return fixed_base_plus_p (XEXP (x, 0));
703 /* Dump the expressions in the equivalence class indicated by CLASSP.
704 This function is used only for debugging. */
706 dump_class (struct table_elt *classp)
708 struct table_elt *elt;
710 fprintf (stderr, "Equivalence chain for ");
711 print_rtl (stderr, classp->exp);
712 fprintf (stderr, ": \n");
714 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
716 print_rtl (stderr, elt->exp);
717 fprintf (stderr, "\n");
721 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
724 approx_reg_cost_1 (rtx *xp, void *data)
731 unsigned int regno = REGNO (x);
733 if (! CHEAP_REGNO (regno))
735 if (regno < FIRST_PSEUDO_REGISTER)
737 if (SMALL_REGISTER_CLASSES)
749 /* Return an estimate of the cost of the registers used in an rtx.
750 This is mostly the number of different REG expressions in the rtx;
751 however for some exceptions like fixed registers we use a cost of
752 0. If any other hard register reference occurs, return MAX_COST. */
755 approx_reg_cost (rtx x)
759 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
765 /* Return a negative value if an rtx A, whose costs are given by COST_A
766 and REGCOST_A, is more desirable than an rtx B.
767 Return a positive value if A is less desirable, or 0 if the two are
770 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
772 /* First, get rid of cases involving expressions that are entirely
774 if (cost_a != cost_b)
776 if (cost_a == MAX_COST)
778 if (cost_b == MAX_COST)
782 /* Avoid extending lifetimes of hardregs. */
783 if (regcost_a != regcost_b)
785 if (regcost_a == MAX_COST)
787 if (regcost_b == MAX_COST)
791 /* Normal operation costs take precedence. */
792 if (cost_a != cost_b)
793 return cost_a - cost_b;
794 /* Only if these are identical consider effects on register pressure. */
795 if (regcost_a != regcost_b)
796 return regcost_a - regcost_b;
800 /* Internal function, to compute cost when X is not a register; called
801 from COST macro to keep it simple. */
804 notreg_cost (rtx x, enum rtx_code outer)
806 return ((GET_CODE (x) == SUBREG
807 && REG_P (SUBREG_REG (x))
808 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
809 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
810 && (GET_MODE_SIZE (GET_MODE (x))
811 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
812 && subreg_lowpart_p (x)
813 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
814 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
816 : rtx_cost (x, outer) * 2);
820 static struct cse_reg_info *
821 get_cse_reg_info (unsigned int regno)
823 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
824 struct cse_reg_info *p;
826 for (p = *hash_head; p != NULL; p = p->hash_next)
827 if (p->regno == regno)
832 /* Get a new cse_reg_info structure. */
833 if (cse_reg_info_free_list)
835 p = cse_reg_info_free_list;
836 cse_reg_info_free_list = p->next;
839 p = xmalloc (sizeof (struct cse_reg_info));
841 /* Insert into hash table. */
842 p->hash_next = *hash_head;
847 p->reg_in_table = -1;
848 p->subreg_ticked = -1;
849 p->reg_qty = -regno - 1;
851 p->next = cse_reg_info_used_list;
852 cse_reg_info_used_list = p;
853 if (!cse_reg_info_used_list_end)
854 cse_reg_info_used_list_end = p;
857 /* Cache this lookup; we tend to be looking up information about the
858 same register several times in a row. */
859 cached_regno = regno;
860 cached_cse_reg_info = p;
865 /* Clear the hash table and initialize each register with its own quantity,
866 for a new basic block. */
869 new_basic_block (void)
875 /* Clear out hash table state for this pass. */
877 memset (reg_hash, 0, sizeof reg_hash);
879 if (cse_reg_info_used_list)
881 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
882 cse_reg_info_free_list = cse_reg_info_used_list;
883 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
885 cached_cse_reg_info = 0;
887 CLEAR_HARD_REG_SET (hard_regs_in_table);
889 /* The per-quantity values used to be initialized here, but it is
890 much faster to initialize each as it is made in `make_new_qty'. */
892 for (i = 0; i < HASH_SIZE; i++)
894 struct table_elt *first;
899 struct table_elt *last = first;
903 while (last->next_same_hash != NULL)
904 last = last->next_same_hash;
906 /* Now relink this hash entire chain into
907 the free element list. */
909 last->next_same_hash = free_element_chain;
910 free_element_chain = first;
920 /* Say that register REG contains a quantity in mode MODE not in any
921 register before and initialize that quantity. */
924 make_new_qty (unsigned int reg, enum machine_mode mode)
927 struct qty_table_elem *ent;
928 struct reg_eqv_elem *eqv;
930 gcc_assert (next_qty < max_qty);
932 q = REG_QTY (reg) = next_qty++;
934 ent->first_reg = reg;
937 ent->const_rtx = ent->const_insn = NULL_RTX;
938 ent->comparison_code = UNKNOWN;
940 eqv = ®_eqv_table[reg];
941 eqv->next = eqv->prev = -1;
944 /* Make reg NEW equivalent to reg OLD.
945 OLD is not changing; NEW is. */
948 make_regs_eqv (unsigned int new, unsigned int old)
950 unsigned int lastr, firstr;
951 int q = REG_QTY (old);
952 struct qty_table_elem *ent;
956 /* Nothing should become eqv until it has a "non-invalid" qty number. */
957 gcc_assert (REGNO_QTY_VALID_P (old));
960 firstr = ent->first_reg;
961 lastr = ent->last_reg;
963 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
964 hard regs. Among pseudos, if NEW will live longer than any other reg
965 of the same qty, and that is beyond the current basic block,
966 make it the new canonical replacement for this qty. */
967 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
968 /* Certain fixed registers might be of the class NO_REGS. This means
969 that not only can they not be allocated by the compiler, but
970 they cannot be used in substitutions or canonicalizations
972 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
973 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
974 || (new >= FIRST_PSEUDO_REGISTER
975 && (firstr < FIRST_PSEUDO_REGISTER
976 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
977 || (uid_cuid[REGNO_FIRST_UID (new)]
978 < cse_basic_block_start))
979 && (uid_cuid[REGNO_LAST_UID (new)]
980 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
982 reg_eqv_table[firstr].prev = new;
983 reg_eqv_table[new].next = firstr;
984 reg_eqv_table[new].prev = -1;
985 ent->first_reg = new;
989 /* If NEW is a hard reg (known to be non-fixed), insert at end.
990 Otherwise, insert before any non-fixed hard regs that are at the
991 end. Registers of class NO_REGS cannot be used as an
992 equivalent for anything. */
993 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
994 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
995 && new >= FIRST_PSEUDO_REGISTER)
996 lastr = reg_eqv_table[lastr].prev;
997 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
998 if (reg_eqv_table[lastr].next >= 0)
999 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1001 qty_table[q].last_reg = new;
1002 reg_eqv_table[lastr].next = new;
1003 reg_eqv_table[new].prev = lastr;
1007 /* Remove REG from its equivalence class. */
1010 delete_reg_equiv (unsigned int reg)
1012 struct qty_table_elem *ent;
1013 int q = REG_QTY (reg);
1016 /* If invalid, do nothing. */
1017 if (! REGNO_QTY_VALID_P (reg))
1020 ent = &qty_table[q];
1022 p = reg_eqv_table[reg].prev;
1023 n = reg_eqv_table[reg].next;
1026 reg_eqv_table[n].prev = p;
1030 reg_eqv_table[p].next = n;
1034 REG_QTY (reg) = -reg - 1;
1037 /* Remove any invalid expressions from the hash table
1038 that refer to any of the registers contained in expression X.
1040 Make sure that newly inserted references to those registers
1041 as subexpressions will be considered valid.
1043 mention_regs is not called when a register itself
1044 is being stored in the table.
1046 Return 1 if we have done something that may have changed the hash code
1050 mention_regs (rtx x)
1060 code = GET_CODE (x);
1063 unsigned int regno = REGNO (x);
1064 unsigned int endregno
1065 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1066 : hard_regno_nregs[regno][GET_MODE (x)]);
1069 for (i = regno; i < endregno; i++)
1071 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1072 remove_invalid_refs (i);
1074 REG_IN_TABLE (i) = REG_TICK (i);
1075 SUBREG_TICKED (i) = -1;
1081 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1082 pseudo if they don't use overlapping words. We handle only pseudos
1083 here for simplicity. */
1084 if (code == SUBREG && REG_P (SUBREG_REG (x))
1085 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1087 unsigned int i = REGNO (SUBREG_REG (x));
1089 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1091 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1092 the last store to this register really stored into this
1093 subreg, then remove the memory of this subreg.
1094 Otherwise, remove any memory of the entire register and
1095 all its subregs from the table. */
1096 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1097 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1098 remove_invalid_refs (i);
1100 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1103 REG_IN_TABLE (i) = REG_TICK (i);
1104 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1108 /* If X is a comparison or a COMPARE and either operand is a register
1109 that does not have a quantity, give it one. This is so that a later
1110 call to record_jump_equiv won't cause X to be assigned a different
1111 hash code and not found in the table after that call.
1113 It is not necessary to do this here, since rehash_using_reg can
1114 fix up the table later, but doing this here eliminates the need to
1115 call that expensive function in the most common case where the only
1116 use of the register is in the comparison. */
1118 if (code == COMPARE || COMPARISON_P (x))
1120 if (REG_P (XEXP (x, 0))
1121 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1122 if (insert_regs (XEXP (x, 0), NULL, 0))
1124 rehash_using_reg (XEXP (x, 0));
1128 if (REG_P (XEXP (x, 1))
1129 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1130 if (insert_regs (XEXP (x, 1), NULL, 0))
1132 rehash_using_reg (XEXP (x, 1));
1137 fmt = GET_RTX_FORMAT (code);
1138 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1140 changed |= mention_regs (XEXP (x, i));
1141 else if (fmt[i] == 'E')
1142 for (j = 0; j < XVECLEN (x, i); j++)
1143 changed |= mention_regs (XVECEXP (x, i, j));
1148 /* Update the register quantities for inserting X into the hash table
1149 with a value equivalent to CLASSP.
1150 (If the class does not contain a REG, it is irrelevant.)
1151 If MODIFIED is nonzero, X is a destination; it is being modified.
1152 Note that delete_reg_equiv should be called on a register
1153 before insert_regs is done on that register with MODIFIED != 0.
1155 Nonzero value means that elements of reg_qty have changed
1156 so X's hash code may be different. */
1159 insert_regs (rtx x, struct table_elt *classp, int modified)
1163 unsigned int regno = REGNO (x);
1166 /* If REGNO is in the equivalence table already but is of the
1167 wrong mode for that equivalence, don't do anything here. */
1169 qty_valid = REGNO_QTY_VALID_P (regno);
1172 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1174 if (ent->mode != GET_MODE (x))
1178 if (modified || ! qty_valid)
1181 for (classp = classp->first_same_value;
1183 classp = classp->next_same_value)
1184 if (REG_P (classp->exp)
1185 && GET_MODE (classp->exp) == GET_MODE (x))
1187 make_regs_eqv (regno, REGNO (classp->exp));
1191 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1192 than REG_IN_TABLE to find out if there was only a single preceding
1193 invalidation - for the SUBREG - or another one, which would be
1194 for the full register. However, if we find here that REG_TICK
1195 indicates that the register is invalid, it means that it has
1196 been invalidated in a separate operation. The SUBREG might be used
1197 now (then this is a recursive call), or we might use the full REG
1198 now and a SUBREG of it later. So bump up REG_TICK so that
1199 mention_regs will do the right thing. */
1201 && REG_IN_TABLE (regno) >= 0
1202 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1204 make_new_qty (regno, GET_MODE (x));
1211 /* If X is a SUBREG, we will likely be inserting the inner register in the
1212 table. If that register doesn't have an assigned quantity number at
1213 this point but does later, the insertion that we will be doing now will
1214 not be accessible because its hash code will have changed. So assign
1215 a quantity number now. */
1217 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1218 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1220 insert_regs (SUBREG_REG (x), NULL, 0);
1225 return mention_regs (x);
1228 /* Look in or update the hash table. */
1230 /* Remove table element ELT from use in the table.
1231 HASH is its hash code, made using the HASH macro.
1232 It's an argument because often that is known in advance
1233 and we save much time not recomputing it. */
1236 remove_from_table (struct table_elt *elt, unsigned int hash)
1241 /* Mark this element as removed. See cse_insn. */
1242 elt->first_same_value = 0;
1244 /* Remove the table element from its equivalence class. */
1247 struct table_elt *prev = elt->prev_same_value;
1248 struct table_elt *next = elt->next_same_value;
1251 next->prev_same_value = prev;
1254 prev->next_same_value = next;
1257 struct table_elt *newfirst = next;
1260 next->first_same_value = newfirst;
1261 next = next->next_same_value;
1266 /* Remove the table element from its hash bucket. */
1269 struct table_elt *prev = elt->prev_same_hash;
1270 struct table_elt *next = elt->next_same_hash;
1273 next->prev_same_hash = prev;
1276 prev->next_same_hash = next;
1277 else if (table[hash] == elt)
1281 /* This entry is not in the proper hash bucket. This can happen
1282 when two classes were merged by `merge_equiv_classes'. Search
1283 for the hash bucket that it heads. This happens only very
1284 rarely, so the cost is acceptable. */
1285 for (hash = 0; hash < HASH_SIZE; hash++)
1286 if (table[hash] == elt)
1291 /* Remove the table element from its related-value circular chain. */
1293 if (elt->related_value != 0 && elt->related_value != elt)
1295 struct table_elt *p = elt->related_value;
1297 while (p->related_value != elt)
1298 p = p->related_value;
1299 p->related_value = elt->related_value;
1300 if (p->related_value == p)
1301 p->related_value = 0;
1304 /* Now add it to the free element chain. */
1305 elt->next_same_hash = free_element_chain;
1306 free_element_chain = elt;
1309 /* Look up X in the hash table and return its table element,
1310 or 0 if X is not in the table.
1312 MODE is the machine-mode of X, or if X is an integer constant
1313 with VOIDmode then MODE is the mode with which X will be used.
1315 Here we are satisfied to find an expression whose tree structure
1318 static struct table_elt *
1319 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1321 struct table_elt *p;
1323 for (p = table[hash]; p; p = p->next_same_hash)
1324 if (mode == p->mode && ((x == p->exp && REG_P (x))
1325 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1331 /* Like `lookup' but don't care whether the table element uses invalid regs.
1332 Also ignore discrepancies in the machine mode of a register. */
1334 static struct table_elt *
1335 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1337 struct table_elt *p;
1341 unsigned int regno = REGNO (x);
1343 /* Don't check the machine mode when comparing registers;
1344 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1345 for (p = table[hash]; p; p = p->next_same_hash)
1347 && REGNO (p->exp) == regno)
1352 for (p = table[hash]; p; p = p->next_same_hash)
1354 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1361 /* Look for an expression equivalent to X and with code CODE.
1362 If one is found, return that expression. */
1365 lookup_as_function (rtx x, enum rtx_code code)
1368 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1370 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1371 long as we are narrowing. So if we looked in vain for a mode narrower
1372 than word_mode before, look for word_mode now. */
1373 if (p == 0 && code == CONST_INT
1374 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1377 PUT_MODE (x, word_mode);
1378 p = lookup (x, SAFE_HASH (x, VOIDmode), word_mode);
1384 for (p = p->first_same_value; p; p = p->next_same_value)
1385 if (GET_CODE (p->exp) == code
1386 /* Make sure this is a valid entry in the table. */
1387 && exp_equiv_p (p->exp, p->exp, 1, false))
1393 /* Insert X in the hash table, assuming HASH is its hash code
1394 and CLASSP is an element of the class it should go in
1395 (or 0 if a new class should be made).
1396 It is inserted at the proper position to keep the class in
1397 the order cheapest first.
1399 MODE is the machine-mode of X, or if X is an integer constant
1400 with VOIDmode then MODE is the mode with which X will be used.
1402 For elements of equal cheapness, the most recent one
1403 goes in front, except that the first element in the list
1404 remains first unless a cheaper element is added. The order of
1405 pseudo-registers does not matter, as canon_reg will be called to
1406 find the cheapest when a register is retrieved from the table.
1408 The in_memory field in the hash table element is set to 0.
1409 The caller must set it nonzero if appropriate.
1411 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1412 and if insert_regs returns a nonzero value
1413 you must then recompute its hash code before calling here.
1415 If necessary, update table showing constant values of quantities. */
1417 #define CHEAPER(X, Y) \
1418 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1420 static struct table_elt *
1421 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1423 struct table_elt *elt;
1425 /* If X is a register and we haven't made a quantity for it,
1426 something is wrong. */
1427 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1429 /* If X is a hard register, show it is being put in the table. */
1430 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1432 unsigned int regno = REGNO (x);
1433 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
1436 for (i = regno; i < endregno; i++)
1437 SET_HARD_REG_BIT (hard_regs_in_table, i);
1440 /* Put an element for X into the right hash bucket. */
1442 elt = free_element_chain;
1444 free_element_chain = elt->next_same_hash;
1448 elt = xmalloc (sizeof (struct table_elt));
1452 elt->canon_exp = NULL_RTX;
1453 elt->cost = COST (x);
1454 elt->regcost = approx_reg_cost (x);
1455 elt->next_same_value = 0;
1456 elt->prev_same_value = 0;
1457 elt->next_same_hash = table[hash];
1458 elt->prev_same_hash = 0;
1459 elt->related_value = 0;
1462 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1465 table[hash]->prev_same_hash = elt;
1468 /* Put it into the proper value-class. */
1471 classp = classp->first_same_value;
1472 if (CHEAPER (elt, classp))
1473 /* Insert at the head of the class. */
1475 struct table_elt *p;
1476 elt->next_same_value = classp;
1477 classp->prev_same_value = elt;
1478 elt->first_same_value = elt;
1480 for (p = classp; p; p = p->next_same_value)
1481 p->first_same_value = elt;
1485 /* Insert not at head of the class. */
1486 /* Put it after the last element cheaper than X. */
1487 struct table_elt *p, *next;
1489 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1492 /* Put it after P and before NEXT. */
1493 elt->next_same_value = next;
1495 next->prev_same_value = elt;
1497 elt->prev_same_value = p;
1498 p->next_same_value = elt;
1499 elt->first_same_value = classp;
1503 elt->first_same_value = elt;
1505 /* If this is a constant being set equivalent to a register or a register
1506 being set equivalent to a constant, note the constant equivalence.
1508 If this is a constant, it cannot be equivalent to a different constant,
1509 and a constant is the only thing that can be cheaper than a register. So
1510 we know the register is the head of the class (before the constant was
1513 If this is a register that is not already known equivalent to a
1514 constant, we must check the entire class.
1516 If this is a register that is already known equivalent to an insn,
1517 update the qtys `const_insn' to show that `this_insn' is the latest
1518 insn making that quantity equivalent to the constant. */
1520 if (elt->is_const && classp && REG_P (classp->exp)
1523 int exp_q = REG_QTY (REGNO (classp->exp));
1524 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1526 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1527 exp_ent->const_insn = this_insn;
1532 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1535 struct table_elt *p;
1537 for (p = classp; p != 0; p = p->next_same_value)
1539 if (p->is_const && !REG_P (p->exp))
1541 int x_q = REG_QTY (REGNO (x));
1542 struct qty_table_elem *x_ent = &qty_table[x_q];
1545 = gen_lowpart (GET_MODE (x), p->exp);
1546 x_ent->const_insn = this_insn;
1553 && qty_table[REG_QTY (REGNO (x))].const_rtx
1554 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1555 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1557 /* If this is a constant with symbolic value,
1558 and it has a term with an explicit integer value,
1559 link it up with related expressions. */
1560 if (GET_CODE (x) == CONST)
1562 rtx subexp = get_related_value (x);
1564 struct table_elt *subelt, *subelt_prev;
1568 /* Get the integer-free subexpression in the hash table. */
1569 subhash = SAFE_HASH (subexp, mode);
1570 subelt = lookup (subexp, subhash, mode);
1572 subelt = insert (subexp, NULL, subhash, mode);
1573 /* Initialize SUBELT's circular chain if it has none. */
1574 if (subelt->related_value == 0)
1575 subelt->related_value = subelt;
1576 /* Find the element in the circular chain that precedes SUBELT. */
1577 subelt_prev = subelt;
1578 while (subelt_prev->related_value != subelt)
1579 subelt_prev = subelt_prev->related_value;
1580 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1581 This way the element that follows SUBELT is the oldest one. */
1582 elt->related_value = subelt_prev->related_value;
1583 subelt_prev->related_value = elt;
1590 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1591 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1592 the two classes equivalent.
1594 CLASS1 will be the surviving class; CLASS2 should not be used after this
1597 Any invalid entries in CLASS2 will not be copied. */
1600 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1602 struct table_elt *elt, *next, *new;
1604 /* Ensure we start with the head of the classes. */
1605 class1 = class1->first_same_value;
1606 class2 = class2->first_same_value;
1608 /* If they were already equal, forget it. */
1609 if (class1 == class2)
1612 for (elt = class2; elt; elt = next)
1616 enum machine_mode mode = elt->mode;
1618 next = elt->next_same_value;
1620 /* Remove old entry, make a new one in CLASS1's class.
1621 Don't do this for invalid entries as we cannot find their
1622 hash code (it also isn't necessary). */
1623 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1625 bool need_rehash = false;
1627 hash_arg_in_memory = 0;
1628 hash = HASH (exp, mode);
1632 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1633 delete_reg_equiv (REGNO (exp));
1636 remove_from_table (elt, hash);
1638 if (insert_regs (exp, class1, 0) || need_rehash)
1640 rehash_using_reg (exp);
1641 hash = HASH (exp, mode);
1643 new = insert (exp, class1, hash, mode);
1644 new->in_memory = hash_arg_in_memory;
1649 /* Flush the entire hash table. */
1652 flush_hash_table (void)
1655 struct table_elt *p;
1657 for (i = 0; i < HASH_SIZE; i++)
1658 for (p = table[i]; p; p = table[i])
1660 /* Note that invalidate can remove elements
1661 after P in the current hash chain. */
1663 invalidate (p->exp, p->mode);
1665 remove_from_table (p, i);
1669 /* Function called for each rtx to check whether true dependence exist. */
1670 struct check_dependence_data
1672 enum machine_mode mode;
1678 check_dependence (rtx *x, void *data)
1680 struct check_dependence_data *d = (struct check_dependence_data *) data;
1681 if (*x && MEM_P (*x))
1682 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1688 /* Remove from the hash table, or mark as invalid, all expressions whose
1689 values could be altered by storing in X. X is a register, a subreg, or
1690 a memory reference with nonvarying address (because, when a memory
1691 reference with a varying address is stored in, all memory references are
1692 removed by invalidate_memory so specific invalidation is superfluous).
1693 FULL_MODE, if not VOIDmode, indicates that this much should be
1694 invalidated instead of just the amount indicated by the mode of X. This
1695 is only used for bitfield stores into memory.
1697 A nonvarying address may be just a register or just a symbol reference,
1698 or it may be either of those plus a numeric offset. */
1701 invalidate (rtx x, enum machine_mode full_mode)
1704 struct table_elt *p;
1707 switch (GET_CODE (x))
1711 /* If X is a register, dependencies on its contents are recorded
1712 through the qty number mechanism. Just change the qty number of
1713 the register, mark it as invalid for expressions that refer to it,
1714 and remove it itself. */
1715 unsigned int regno = REGNO (x);
1716 unsigned int hash = HASH (x, GET_MODE (x));
1718 /* Remove REGNO from any quantity list it might be on and indicate
1719 that its value might have changed. If it is a pseudo, remove its
1720 entry from the hash table.
1722 For a hard register, we do the first two actions above for any
1723 additional hard registers corresponding to X. Then, if any of these
1724 registers are in the table, we must remove any REG entries that
1725 overlap these registers. */
1727 delete_reg_equiv (regno);
1729 SUBREG_TICKED (regno) = -1;
1731 if (regno >= FIRST_PSEUDO_REGISTER)
1733 /* Because a register can be referenced in more than one mode,
1734 we might have to remove more than one table entry. */
1735 struct table_elt *elt;
1737 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1738 remove_from_table (elt, hash);
1742 HOST_WIDE_INT in_table
1743 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1744 unsigned int endregno
1745 = regno + hard_regno_nregs[regno][GET_MODE (x)];
1746 unsigned int tregno, tendregno, rn;
1747 struct table_elt *p, *next;
1749 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1751 for (rn = regno + 1; rn < endregno; rn++)
1753 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1754 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1755 delete_reg_equiv (rn);
1757 SUBREG_TICKED (rn) = -1;
1761 for (hash = 0; hash < HASH_SIZE; hash++)
1762 for (p = table[hash]; p; p = next)
1764 next = p->next_same_hash;
1767 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1770 tregno = REGNO (p->exp);
1772 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
1773 if (tendregno > regno && tregno < endregno)
1774 remove_from_table (p, hash);
1781 invalidate (SUBREG_REG (x), VOIDmode);
1785 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1786 invalidate (XVECEXP (x, 0, i), VOIDmode);
1790 /* This is part of a disjoint return value; extract the location in
1791 question ignoring the offset. */
1792 invalidate (XEXP (x, 0), VOIDmode);
1796 addr = canon_rtx (get_addr (XEXP (x, 0)));
1797 /* Calculate the canonical version of X here so that
1798 true_dependence doesn't generate new RTL for X on each call. */
1801 /* Remove all hash table elements that refer to overlapping pieces of
1803 if (full_mode == VOIDmode)
1804 full_mode = GET_MODE (x);
1806 for (i = 0; i < HASH_SIZE; i++)
1808 struct table_elt *next;
1810 for (p = table[i]; p; p = next)
1812 next = p->next_same_hash;
1815 struct check_dependence_data d;
1817 /* Just canonicalize the expression once;
1818 otherwise each time we call invalidate
1819 true_dependence will canonicalize the
1820 expression again. */
1822 p->canon_exp = canon_rtx (p->exp);
1826 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1827 remove_from_table (p, i);
1838 /* Remove all expressions that refer to register REGNO,
1839 since they are already invalid, and we are about to
1840 mark that register valid again and don't want the old
1841 expressions to reappear as valid. */
1844 remove_invalid_refs (unsigned int regno)
1847 struct table_elt *p, *next;
1849 for (i = 0; i < HASH_SIZE; i++)
1850 for (p = table[i]; p; p = next)
1852 next = p->next_same_hash;
1854 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1855 remove_from_table (p, i);
1859 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1862 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1863 enum machine_mode mode)
1866 struct table_elt *p, *next;
1867 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1869 for (i = 0; i < HASH_SIZE; i++)
1870 for (p = table[i]; p; p = next)
1873 next = p->next_same_hash;
1876 && (GET_CODE (exp) != SUBREG
1877 || !REG_P (SUBREG_REG (exp))
1878 || REGNO (SUBREG_REG (exp)) != regno
1879 || (((SUBREG_BYTE (exp)
1880 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1881 && SUBREG_BYTE (exp) <= end))
1882 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1883 remove_from_table (p, i);
1887 /* Recompute the hash codes of any valid entries in the hash table that
1888 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1890 This is called when we make a jump equivalence. */
1893 rehash_using_reg (rtx x)
1896 struct table_elt *p, *next;
1899 if (GET_CODE (x) == SUBREG)
1902 /* If X is not a register or if the register is known not to be in any
1903 valid entries in the table, we have no work to do. */
1906 || REG_IN_TABLE (REGNO (x)) < 0
1907 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1910 /* Scan all hash chains looking for valid entries that mention X.
1911 If we find one and it is in the wrong hash chain, move it. */
1913 for (i = 0; i < HASH_SIZE; i++)
1914 for (p = table[i]; p; p = next)
1916 next = p->next_same_hash;
1917 if (reg_mentioned_p (x, p->exp)
1918 && exp_equiv_p (p->exp, p->exp, 1, false)
1919 && i != (hash = SAFE_HASH (p->exp, p->mode)))
1921 if (p->next_same_hash)
1922 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1924 if (p->prev_same_hash)
1925 p->prev_same_hash->next_same_hash = p->next_same_hash;
1927 table[i] = p->next_same_hash;
1929 p->next_same_hash = table[hash];
1930 p->prev_same_hash = 0;
1932 table[hash]->prev_same_hash = p;
1938 /* Remove from the hash table any expression that is a call-clobbered
1939 register. Also update their TICK values. */
1942 invalidate_for_call (void)
1944 unsigned int regno, endregno;
1947 struct table_elt *p, *next;
1950 /* Go through all the hard registers. For each that is clobbered in
1951 a CALL_INSN, remove the register from quantity chains and update
1952 reg_tick if defined. Also see if any of these registers is currently
1955 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1956 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1958 delete_reg_equiv (regno);
1959 if (REG_TICK (regno) >= 0)
1962 SUBREG_TICKED (regno) = -1;
1965 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1968 /* In the case where we have no call-clobbered hard registers in the
1969 table, we are done. Otherwise, scan the table and remove any
1970 entry that overlaps a call-clobbered register. */
1973 for (hash = 0; hash < HASH_SIZE; hash++)
1974 for (p = table[hash]; p; p = next)
1976 next = p->next_same_hash;
1979 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1982 regno = REGNO (p->exp);
1983 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
1985 for (i = regno; i < endregno; i++)
1986 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1988 remove_from_table (p, hash);
1994 /* Given an expression X of type CONST,
1995 and ELT which is its table entry (or 0 if it
1996 is not in the hash table),
1997 return an alternate expression for X as a register plus integer.
1998 If none can be found, return 0. */
2001 use_related_value (rtx x, struct table_elt *elt)
2003 struct table_elt *relt = 0;
2004 struct table_elt *p, *q;
2005 HOST_WIDE_INT offset;
2007 /* First, is there anything related known?
2008 If we have a table element, we can tell from that.
2009 Otherwise, must look it up. */
2011 if (elt != 0 && elt->related_value != 0)
2013 else if (elt == 0 && GET_CODE (x) == CONST)
2015 rtx subexp = get_related_value (x);
2017 relt = lookup (subexp,
2018 SAFE_HASH (subexp, GET_MODE (subexp)),
2025 /* Search all related table entries for one that has an
2026 equivalent register. */
2031 /* This loop is strange in that it is executed in two different cases.
2032 The first is when X is already in the table. Then it is searching
2033 the RELATED_VALUE list of X's class (RELT). The second case is when
2034 X is not in the table. Then RELT points to a class for the related
2037 Ensure that, whatever case we are in, that we ignore classes that have
2038 the same value as X. */
2040 if (rtx_equal_p (x, p->exp))
2043 for (q = p->first_same_value; q; q = q->next_same_value)
2050 p = p->related_value;
2052 /* We went all the way around, so there is nothing to be found.
2053 Alternatively, perhaps RELT was in the table for some other reason
2054 and it has no related values recorded. */
2055 if (p == relt || p == 0)
2062 offset = (get_integer_term (x) - get_integer_term (p->exp));
2063 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2064 return plus_constant (q->exp, offset);
2067 /* Hash a string. Just add its bytes up. */
2068 static inline unsigned
2069 hash_rtx_string (const char *ps)
2072 const unsigned char *p = (const unsigned char *) ps;
2081 /* Hash an rtx. We are careful to make sure the value is never negative.
2082 Equivalent registers hash identically.
2083 MODE is used in hashing for CONST_INTs only;
2084 otherwise the mode of X is used.
2086 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2088 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2089 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2091 Note that cse_insn knows that the hash code of a MEM expression
2092 is just (int) MEM plus the hash code of the address. */
2095 hash_rtx (rtx x, enum machine_mode mode, int *do_not_record_p,
2096 int *hash_arg_in_memory_p, bool have_reg_qty)
2103 /* Used to turn recursion into iteration. We can't rely on GCC's
2104 tail-recursion elimination since we need to keep accumulating values
2110 code = GET_CODE (x);
2115 unsigned int regno = REGNO (x);
2117 if (!reload_completed)
2119 /* On some machines, we can't record any non-fixed hard register,
2120 because extending its life will cause reload problems. We
2121 consider ap, fp, sp, gp to be fixed for this purpose.
2123 We also consider CCmode registers to be fixed for this purpose;
2124 failure to do so leads to failure to simplify 0<100 type of
2127 On all machines, we can't record any global registers.
2128 Nor should we record any register that is in a small
2129 class, as defined by CLASS_LIKELY_SPILLED_P. */
2132 if (regno >= FIRST_PSEUDO_REGISTER)
2134 else if (x == frame_pointer_rtx
2135 || x == hard_frame_pointer_rtx
2136 || x == arg_pointer_rtx
2137 || x == stack_pointer_rtx
2138 || x == pic_offset_table_rtx)
2140 else if (global_regs[regno])
2142 else if (fixed_regs[regno])
2144 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2146 else if (SMALL_REGISTER_CLASSES)
2148 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2155 *do_not_record_p = 1;
2160 hash += ((unsigned int) REG << 7);
2161 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2165 /* We handle SUBREG of a REG specially because the underlying
2166 reg changes its hash value with every value change; we don't
2167 want to have to forget unrelated subregs when one subreg changes. */
2170 if (REG_P (SUBREG_REG (x)))
2172 hash += (((unsigned int) SUBREG << 7)
2173 + REGNO (SUBREG_REG (x))
2174 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2181 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2182 + (unsigned int) INTVAL (x));
2186 /* This is like the general case, except that it only counts
2187 the integers representing the constant. */
2188 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2189 if (GET_MODE (x) != VOIDmode)
2190 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2192 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2193 + (unsigned int) CONST_DOUBLE_HIGH (x));
2201 units = CONST_VECTOR_NUNITS (x);
2203 for (i = 0; i < units; ++i)
2205 elt = CONST_VECTOR_ELT (x, i);
2206 hash += hash_rtx (elt, GET_MODE (elt), do_not_record_p,
2207 hash_arg_in_memory_p, have_reg_qty);
2213 /* Assume there is only one rtx object for any given label. */
2215 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2216 differences and differences between each stage's debugging dumps. */
2217 hash += (((unsigned int) LABEL_REF << 7)
2218 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2223 /* Don't hash on the symbol's address to avoid bootstrap differences.
2224 Different hash values may cause expressions to be recorded in
2225 different orders and thus different registers to be used in the
2226 final assembler. This also avoids differences in the dump files
2227 between various stages. */
2229 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2232 h += (h << 7) + *p++; /* ??? revisit */
2234 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2239 /* We don't record if marked volatile or if BLKmode since we don't
2240 know the size of the move. */
2241 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2243 *do_not_record_p = 1;
2246 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2247 *hash_arg_in_memory_p = 1;
2249 /* Now that we have already found this special case,
2250 might as well speed it up as much as possible. */
2251 hash += (unsigned) MEM;
2256 /* A USE that mentions non-volatile memory needs special
2257 handling since the MEM may be BLKmode which normally
2258 prevents an entry from being made. Pure calls are
2259 marked by a USE which mentions BLKmode memory.
2260 See calls.c:emit_call_1. */
2261 if (MEM_P (XEXP (x, 0))
2262 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2264 hash += (unsigned) USE;
2267 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2268 *hash_arg_in_memory_p = 1;
2270 /* Now that we have already found this special case,
2271 might as well speed it up as much as possible. */
2272 hash += (unsigned) MEM;
2287 case UNSPEC_VOLATILE:
2288 *do_not_record_p = 1;
2292 if (MEM_VOLATILE_P (x))
2294 *do_not_record_p = 1;
2299 /* We don't want to take the filename and line into account. */
2300 hash += (unsigned) code + (unsigned) GET_MODE (x)
2301 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2302 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2303 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2305 if (ASM_OPERANDS_INPUT_LENGTH (x))
2307 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2309 hash += (hash_rtx (ASM_OPERANDS_INPUT (x, i),
2310 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2311 do_not_record_p, hash_arg_in_memory_p,
2314 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2317 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2318 x = ASM_OPERANDS_INPUT (x, 0);
2319 mode = GET_MODE (x);
2331 i = GET_RTX_LENGTH (code) - 1;
2332 hash += (unsigned) code + (unsigned) GET_MODE (x);
2333 fmt = GET_RTX_FORMAT (code);
2339 /* If we are about to do the last recursive call
2340 needed at this level, change it into iteration.
2341 This function is called enough to be worth it. */
2348 hash += hash_rtx (XEXP (x, i), 0, do_not_record_p,
2349 hash_arg_in_memory_p, have_reg_qty);
2353 for (j = 0; j < XVECLEN (x, i); j++)
2354 hash += hash_rtx (XVECEXP (x, i, j), 0, do_not_record_p,
2355 hash_arg_in_memory_p, have_reg_qty);
2359 hash += hash_rtx_string (XSTR (x, i));
2363 hash += (unsigned int) XINT (x, i);
2378 /* Hash an rtx X for cse via hash_rtx.
2379 Stores 1 in do_not_record if any subexpression is volatile.
2380 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2381 does not have the RTX_UNCHANGING_P bit set. */
2383 static inline unsigned
2384 canon_hash (rtx x, enum machine_mode mode)
2386 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2389 /* Like canon_hash but with no side effects, i.e. do_not_record
2390 and hash_arg_in_memory are not changed. */
2392 static inline unsigned
2393 safe_hash (rtx x, enum machine_mode mode)
2395 int dummy_do_not_record;
2396 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2399 /* Return 1 iff X and Y would canonicalize into the same thing,
2400 without actually constructing the canonicalization of either one.
2401 If VALIDATE is nonzero,
2402 we assume X is an expression being processed from the rtl
2403 and Y was found in the hash table. We check register refs
2404 in Y for being marked as valid.
2406 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2409 exp_equiv_p (rtx x, rtx y, int validate, bool for_gcse)
2415 /* Note: it is incorrect to assume an expression is equivalent to itself
2416 if VALIDATE is nonzero. */
2417 if (x == y && !validate)
2420 if (x == 0 || y == 0)
2423 code = GET_CODE (x);
2424 if (code != GET_CODE (y))
2427 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2428 if (GET_MODE (x) != GET_MODE (y))
2439 return XEXP (x, 0) == XEXP (y, 0);
2442 return XSTR (x, 0) == XSTR (y, 0);
2446 return REGNO (x) == REGNO (y);
2449 unsigned int regno = REGNO (y);
2451 unsigned int endregno
2452 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2453 : hard_regno_nregs[regno][GET_MODE (y)]);
2455 /* If the quantities are not the same, the expressions are not
2456 equivalent. If there are and we are not to validate, they
2457 are equivalent. Otherwise, ensure all regs are up-to-date. */
2459 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2465 for (i = regno; i < endregno; i++)
2466 if (REG_IN_TABLE (i) != REG_TICK (i))
2475 /* Can't merge two expressions in different alias sets, since we
2476 can decide that the expression is transparent in a block when
2477 it isn't, due to it being set with the different alias set. */
2478 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
2481 /* A volatile mem should not be considered equivalent to any
2483 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2488 /* For commutative operations, check both orders. */
2496 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2498 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2499 validate, for_gcse))
2500 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2502 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2503 validate, for_gcse)));
2506 /* We don't use the generic code below because we want to
2507 disregard filename and line numbers. */
2509 /* A volatile asm isn't equivalent to any other. */
2510 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2513 if (GET_MODE (x) != GET_MODE (y)
2514 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2515 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2516 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2517 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2518 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2521 if (ASM_OPERANDS_INPUT_LENGTH (x))
2523 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2524 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2525 ASM_OPERANDS_INPUT (y, i),
2527 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2528 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2538 /* Compare the elements. If any pair of corresponding elements
2539 fail to match, return 0 for the whole thing. */
2541 fmt = GET_RTX_FORMAT (code);
2542 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2547 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2548 validate, for_gcse))
2553 if (XVECLEN (x, i) != XVECLEN (y, i))
2555 for (j = 0; j < XVECLEN (x, i); j++)
2556 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2557 validate, for_gcse))
2562 if (strcmp (XSTR (x, i), XSTR (y, i)))
2567 if (XINT (x, i) != XINT (y, i))
2572 if (XWINT (x, i) != XWINT (y, i))
2588 /* Return 1 if X has a value that can vary even between two
2589 executions of the program. 0 means X can be compared reliably
2590 against certain constants or near-constants. */
2593 cse_rtx_varies_p (rtx x, int from_alias)
2595 /* We need not check for X and the equivalence class being of the same
2596 mode because if X is equivalent to a constant in some mode, it
2597 doesn't vary in any mode. */
2600 && REGNO_QTY_VALID_P (REGNO (x)))
2602 int x_q = REG_QTY (REGNO (x));
2603 struct qty_table_elem *x_ent = &qty_table[x_q];
2605 if (GET_MODE (x) == x_ent->mode
2606 && x_ent->const_rtx != NULL_RTX)
2610 if (GET_CODE (x) == PLUS
2611 && GET_CODE (XEXP (x, 1)) == CONST_INT
2612 && REG_P (XEXP (x, 0))
2613 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2615 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2616 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2618 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2619 && x0_ent->const_rtx != NULL_RTX)
2623 /* This can happen as the result of virtual register instantiation, if
2624 the initial constant is too large to be a valid address. This gives
2625 us a three instruction sequence, load large offset into a register,
2626 load fp minus a constant into a register, then a MEM which is the
2627 sum of the two `constant' registers. */
2628 if (GET_CODE (x) == PLUS
2629 && REG_P (XEXP (x, 0))
2630 && REG_P (XEXP (x, 1))
2631 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2632 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2634 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2635 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2636 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2637 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2639 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2640 && x0_ent->const_rtx != NULL_RTX
2641 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2642 && x1_ent->const_rtx != NULL_RTX)
2646 return rtx_varies_p (x, from_alias);
2649 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2650 the result if necessary. INSN is as for canon_reg. */
2653 validate_canon_reg (rtx *xloc, rtx insn)
2655 rtx new = canon_reg (*xloc, insn);
2658 /* If replacing pseudo with hard reg or vice versa, ensure the
2659 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2660 if (insn != 0 && new != 0
2661 && REG_P (new) && REG_P (*xloc)
2662 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2663 != (REGNO (*xloc) < FIRST_PSEUDO_REGISTER))
2664 || GET_MODE (new) != GET_MODE (*xloc)
2665 || (insn_code = recog_memoized (insn)) < 0
2666 || insn_data[insn_code].n_dups > 0))
2667 validate_change (insn, xloc, new, 1);
2672 /* Canonicalize an expression:
2673 replace each register reference inside it
2674 with the "oldest" equivalent register.
2676 If INSN is nonzero and we are replacing a pseudo with a hard register
2677 or vice versa, validate_change is used to ensure that INSN remains valid
2678 after we make our substitution. The calls are made with IN_GROUP nonzero
2679 so apply_change_group must be called upon the outermost return from this
2680 function (unless INSN is zero). The result of apply_change_group can
2681 generally be discarded since the changes we are making are optional. */
2684 canon_reg (rtx x, rtx insn)
2693 code = GET_CODE (x);
2712 struct qty_table_elem *ent;
2714 /* Never replace a hard reg, because hard regs can appear
2715 in more than one machine mode, and we must preserve the mode
2716 of each occurrence. Also, some hard regs appear in
2717 MEMs that are shared and mustn't be altered. Don't try to
2718 replace any reg that maps to a reg of class NO_REGS. */
2719 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2720 || ! REGNO_QTY_VALID_P (REGNO (x)))
2723 q = REG_QTY (REGNO (x));
2724 ent = &qty_table[q];
2725 first = ent->first_reg;
2726 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2727 : REGNO_REG_CLASS (first) == NO_REGS ? x
2728 : gen_rtx_REG (ent->mode, first));
2735 fmt = GET_RTX_FORMAT (code);
2736 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2741 validate_canon_reg (&XEXP (x, i), insn);
2742 else if (fmt[i] == 'E')
2743 for (j = 0; j < XVECLEN (x, i); j++)
2744 validate_canon_reg (&XVECEXP (x, i, j), insn);
2750 /* LOC is a location within INSN that is an operand address (the contents of
2751 a MEM). Find the best equivalent address to use that is valid for this
2754 On most CISC machines, complicated address modes are costly, and rtx_cost
2755 is a good approximation for that cost. However, most RISC machines have
2756 only a few (usually only one) memory reference formats. If an address is
2757 valid at all, it is often just as cheap as any other address. Hence, for
2758 RISC machines, we use `address_cost' to compare the costs of various
2759 addresses. For two addresses of equal cost, choose the one with the
2760 highest `rtx_cost' value as that has the potential of eliminating the
2761 most insns. For equal costs, we choose the first in the equivalence
2762 class. Note that we ignore the fact that pseudo registers are cheaper than
2763 hard registers here because we would also prefer the pseudo registers. */
2766 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2768 struct table_elt *elt;
2770 struct table_elt *p;
2771 int found_better = 1;
2772 int save_do_not_record = do_not_record;
2773 int save_hash_arg_in_memory = hash_arg_in_memory;
2778 /* Do not try to replace constant addresses or addresses of local and
2779 argument slots. These MEM expressions are made only once and inserted
2780 in many instructions, as well as being used to control symbol table
2781 output. It is not safe to clobber them.
2783 There are some uncommon cases where the address is already in a register
2784 for some reason, but we cannot take advantage of that because we have
2785 no easy way to unshare the MEM. In addition, looking up all stack
2786 addresses is costly. */
2787 if ((GET_CODE (addr) == PLUS
2788 && REG_P (XEXP (addr, 0))
2789 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2790 && (regno = REGNO (XEXP (addr, 0)),
2791 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2792 || regno == ARG_POINTER_REGNUM))
2794 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2795 || regno == HARD_FRAME_POINTER_REGNUM
2796 || regno == ARG_POINTER_REGNUM))
2797 || CONSTANT_ADDRESS_P (addr))
2800 /* If this address is not simply a register, try to fold it. This will
2801 sometimes simplify the expression. Many simplifications
2802 will not be valid, but some, usually applying the associative rule, will
2803 be valid and produce better code. */
2806 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2807 int addr_folded_cost = address_cost (folded, mode);
2808 int addr_cost = address_cost (addr, mode);
2810 if ((addr_folded_cost < addr_cost
2811 || (addr_folded_cost == addr_cost
2812 /* ??? The rtx_cost comparison is left over from an older
2813 version of this code. It is probably no longer helpful. */
2814 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2815 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2816 && validate_change (insn, loc, folded, 0))
2820 /* If this address is not in the hash table, we can't look for equivalences
2821 of the whole address. Also, ignore if volatile. */
2824 hash = HASH (addr, Pmode);
2825 addr_volatile = do_not_record;
2826 do_not_record = save_do_not_record;
2827 hash_arg_in_memory = save_hash_arg_in_memory;
2832 elt = lookup (addr, hash, Pmode);
2836 /* We need to find the best (under the criteria documented above) entry
2837 in the class that is valid. We use the `flag' field to indicate
2838 choices that were invalid and iterate until we can't find a better
2839 one that hasn't already been tried. */
2841 for (p = elt->first_same_value; p; p = p->next_same_value)
2844 while (found_better)
2846 int best_addr_cost = address_cost (*loc, mode);
2847 int best_rtx_cost = (elt->cost + 1) >> 1;
2849 struct table_elt *best_elt = elt;
2852 for (p = elt->first_same_value; p; p = p->next_same_value)
2856 || exp_equiv_p (p->exp, p->exp, 1, false))
2857 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2858 || (exp_cost == best_addr_cost
2859 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2862 best_addr_cost = exp_cost;
2863 best_rtx_cost = (p->cost + 1) >> 1;
2870 if (validate_change (insn, loc,
2871 canon_reg (copy_rtx (best_elt->exp),
2880 /* If the address is a binary operation with the first operand a register
2881 and the second a constant, do the same as above, but looking for
2882 equivalences of the register. Then try to simplify before checking for
2883 the best address to use. This catches a few cases: First is when we
2884 have REG+const and the register is another REG+const. We can often merge
2885 the constants and eliminate one insn and one register. It may also be
2886 that a machine has a cheap REG+REG+const. Finally, this improves the
2887 code on the Alpha for unaligned byte stores. */
2889 if (flag_expensive_optimizations
2890 && ARITHMETIC_P (*loc)
2891 && REG_P (XEXP (*loc, 0)))
2893 rtx op1 = XEXP (*loc, 1);
2896 hash = HASH (XEXP (*loc, 0), Pmode);
2897 do_not_record = save_do_not_record;
2898 hash_arg_in_memory = save_hash_arg_in_memory;
2900 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2904 /* We need to find the best (under the criteria documented above) entry
2905 in the class that is valid. We use the `flag' field to indicate
2906 choices that were invalid and iterate until we can't find a better
2907 one that hasn't already been tried. */
2909 for (p = elt->first_same_value; p; p = p->next_same_value)
2912 while (found_better)
2914 int best_addr_cost = address_cost (*loc, mode);
2915 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2916 struct table_elt *best_elt = elt;
2917 rtx best_rtx = *loc;
2920 /* This is at worst case an O(n^2) algorithm, so limit our search
2921 to the first 32 elements on the list. This avoids trouble
2922 compiling code with very long basic blocks that can easily
2923 call simplify_gen_binary so many times that we run out of
2927 for (p = elt->first_same_value, count = 0;
2929 p = p->next_same_value, count++)
2932 || exp_equiv_p (p->exp, p->exp, 1, false)))
2934 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2937 new_cost = address_cost (new, mode);
2939 if (new_cost < best_addr_cost
2940 || (new_cost == best_addr_cost
2941 && (COST (new) + 1) >> 1 > best_rtx_cost))
2944 best_addr_cost = new_cost;
2945 best_rtx_cost = (COST (new) + 1) >> 1;
2953 if (validate_change (insn, loc,
2954 canon_reg (copy_rtx (best_rtx),
2964 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2965 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2966 what values are being compared.
2968 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2969 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2970 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2971 compared to produce cc0.
2973 The return value is the comparison operator and is either the code of
2974 A or the code corresponding to the inverse of the comparison. */
2976 static enum rtx_code
2977 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2978 enum machine_mode *pmode1, enum machine_mode *pmode2)
2982 arg1 = *parg1, arg2 = *parg2;
2984 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2986 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2988 /* Set nonzero when we find something of interest. */
2990 int reverse_code = 0;
2991 struct table_elt *p = 0;
2993 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2994 On machines with CC0, this is the only case that can occur, since
2995 fold_rtx will return the COMPARE or item being compared with zero
2998 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3001 /* If ARG1 is a comparison operator and CODE is testing for
3002 STORE_FLAG_VALUE, get the inner arguments. */
3004 else if (COMPARISON_P (arg1))
3006 #ifdef FLOAT_STORE_FLAG_VALUE
3007 REAL_VALUE_TYPE fsfv;
3011 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3012 && code == LT && STORE_FLAG_VALUE == -1)
3013 #ifdef FLOAT_STORE_FLAG_VALUE
3014 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3015 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3016 REAL_VALUE_NEGATIVE (fsfv)))
3021 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3022 && code == GE && STORE_FLAG_VALUE == -1)
3023 #ifdef FLOAT_STORE_FLAG_VALUE
3024 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3025 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3026 REAL_VALUE_NEGATIVE (fsfv)))
3029 x = arg1, reverse_code = 1;
3032 /* ??? We could also check for
3034 (ne (and (eq (...) (const_int 1))) (const_int 0))
3036 and related forms, but let's wait until we see them occurring. */
3039 /* Look up ARG1 in the hash table and see if it has an equivalence
3040 that lets us see what is being compared. */
3041 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3044 p = p->first_same_value;
3046 /* If what we compare is already known to be constant, that is as
3048 We need to break the loop in this case, because otherwise we
3049 can have an infinite loop when looking at a reg that is known
3050 to be a constant which is the same as a comparison of a reg
3051 against zero which appears later in the insn stream, which in
3052 turn is constant and the same as the comparison of the first reg
3058 for (; p; p = p->next_same_value)
3060 enum machine_mode inner_mode = GET_MODE (p->exp);
3061 #ifdef FLOAT_STORE_FLAG_VALUE
3062 REAL_VALUE_TYPE fsfv;
3065 /* If the entry isn't valid, skip it. */
3066 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3069 if (GET_CODE (p->exp) == COMPARE
3070 /* Another possibility is that this machine has a compare insn
3071 that includes the comparison code. In that case, ARG1 would
3072 be equivalent to a comparison operation that would set ARG1 to
3073 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3074 ORIG_CODE is the actual comparison being done; if it is an EQ,
3075 we must reverse ORIG_CODE. On machine with a negative value
3076 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3079 && GET_MODE_CLASS (inner_mode) == MODE_INT
3080 && (GET_MODE_BITSIZE (inner_mode)
3081 <= HOST_BITS_PER_WIDE_INT)
3082 && (STORE_FLAG_VALUE
3083 & ((HOST_WIDE_INT) 1
3084 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3085 #ifdef FLOAT_STORE_FLAG_VALUE
3087 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3088 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3089 REAL_VALUE_NEGATIVE (fsfv)))
3092 && COMPARISON_P (p->exp)))
3097 else if ((code == EQ
3099 && GET_MODE_CLASS (inner_mode) == MODE_INT
3100 && (GET_MODE_BITSIZE (inner_mode)
3101 <= HOST_BITS_PER_WIDE_INT)
3102 && (STORE_FLAG_VALUE
3103 & ((HOST_WIDE_INT) 1
3104 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3105 #ifdef FLOAT_STORE_FLAG_VALUE
3107 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3108 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3109 REAL_VALUE_NEGATIVE (fsfv)))
3112 && COMPARISON_P (p->exp))
3119 /* If this non-trapping address, e.g. fp + constant, the
3120 equivalent is a better operand since it may let us predict
3121 the value of the comparison. */
3122 else if (!rtx_addr_can_trap_p (p->exp))
3129 /* If we didn't find a useful equivalence for ARG1, we are done.
3130 Otherwise, set up for the next iteration. */
3134 /* If we need to reverse the comparison, make sure that that is
3135 possible -- we can't necessarily infer the value of GE from LT
3136 with floating-point operands. */
3139 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3140 if (reversed == UNKNOWN)
3145 else if (COMPARISON_P (x))
3146 code = GET_CODE (x);
3147 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3150 /* Return our results. Return the modes from before fold_rtx
3151 because fold_rtx might produce const_int, and then it's too late. */
3152 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3153 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3158 /* If X is a nontrivial arithmetic operation on an argument
3159 for which a constant value can be determined, return
3160 the result of operating on that value, as a constant.
3161 Otherwise, return X, possibly with one or more operands
3162 modified by recursive calls to this function.
3164 If X is a register whose contents are known, we do NOT
3165 return those contents here. equiv_constant is called to
3168 INSN is the insn that we may be modifying. If it is 0, make a copy
3169 of X before modifying it. */
3172 fold_rtx (rtx x, rtx insn)
3175 enum machine_mode mode;
3182 /* Folded equivalents of first two operands of X. */
3186 /* Constant equivalents of first three operands of X;
3187 0 when no such equivalent is known. */
3192 /* The mode of the first operand of X. We need this for sign and zero
3194 enum machine_mode mode_arg0;
3199 mode = GET_MODE (x);
3200 code = GET_CODE (x);
3210 /* No use simplifying an EXPR_LIST
3211 since they are used only for lists of args
3212 in a function call's REG_EQUAL note. */
3218 return prev_insn_cc0;
3222 /* If the next insn is a CODE_LABEL followed by a jump table,
3223 PC's value is a LABEL_REF pointing to that label. That
3224 lets us fold switch statements on the VAX. */
3227 if (insn && tablejump_p (insn, &next, NULL))
3228 return gen_rtx_LABEL_REF (Pmode, next);
3233 /* See if we previously assigned a constant value to this SUBREG. */
3234 if ((new = lookup_as_function (x, CONST_INT)) != 0
3235 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3238 /* If this is a paradoxical SUBREG, we have no idea what value the
3239 extra bits would have. However, if the operand is equivalent
3240 to a SUBREG whose operand is the same as our mode, and all the
3241 modes are within a word, we can just use the inner operand
3242 because these SUBREGs just say how to treat the register.
3244 Similarly if we find an integer constant. */
3246 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3248 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3249 struct table_elt *elt;
3251 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3252 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3253 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3255 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3257 if (CONSTANT_P (elt->exp)
3258 && GET_MODE (elt->exp) == VOIDmode)
3261 if (GET_CODE (elt->exp) == SUBREG
3262 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3263 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3264 return copy_rtx (SUBREG_REG (elt->exp));
3270 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3271 We might be able to if the SUBREG is extracting a single word in an
3272 integral mode or extracting the low part. */
3274 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3275 const_arg0 = equiv_constant (folded_arg0);
3277 folded_arg0 = const_arg0;
3279 if (folded_arg0 != SUBREG_REG (x))
3281 new = simplify_subreg (mode, folded_arg0,
3282 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3287 if (REG_P (folded_arg0)
3288 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
3290 struct table_elt *elt;
3292 elt = lookup (folded_arg0,
3293 HASH (folded_arg0, GET_MODE (folded_arg0)),
3294 GET_MODE (folded_arg0));
3297 elt = elt->first_same_value;
3299 if (subreg_lowpart_p (x))
3300 /* If this is a narrowing SUBREG and our operand is a REG, see
3301 if we can find an equivalence for REG that is an arithmetic
3302 operation in a wider mode where both operands are paradoxical
3303 SUBREGs from objects of our result mode. In that case, we
3304 couldn-t report an equivalent value for that operation, since we
3305 don't know what the extra bits will be. But we can find an
3306 equivalence for this SUBREG by folding that operation in the
3307 narrow mode. This allows us to fold arithmetic in narrow modes
3308 when the machine only supports word-sized arithmetic.
3310 Also look for a case where we have a SUBREG whose operand
3311 is the same as our result. If both modes are smaller
3312 than a word, we are simply interpreting a register in
3313 different modes and we can use the inner value. */
3315 for (; elt; elt = elt->next_same_value)
3317 enum rtx_code eltcode = GET_CODE (elt->exp);
3319 /* Just check for unary and binary operations. */
3320 if (UNARY_P (elt->exp)
3321 && eltcode != SIGN_EXTEND
3322 && eltcode != ZERO_EXTEND
3323 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3324 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3325 && (GET_MODE_CLASS (mode)
3326 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3328 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3330 if (!REG_P (op0) && ! CONSTANT_P (op0))
3331 op0 = fold_rtx (op0, NULL_RTX);
3333 op0 = equiv_constant (op0);
3335 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3338 else if (ARITHMETIC_P (elt->exp)
3339 && eltcode != DIV && eltcode != MOD
3340 && eltcode != UDIV && eltcode != UMOD
3341 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3342 && eltcode != ROTATE && eltcode != ROTATERT
3343 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3344 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3346 || CONSTANT_P (XEXP (elt->exp, 0)))
3347 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3348 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3350 || CONSTANT_P (XEXP (elt->exp, 1))))
3352 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3353 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3355 if (op0 && !REG_P (op0) && ! CONSTANT_P (op0))
3356 op0 = fold_rtx (op0, NULL_RTX);
3359 op0 = equiv_constant (op0);
3361 if (op1 && !REG_P (op1) && ! CONSTANT_P (op1))
3362 op1 = fold_rtx (op1, NULL_RTX);
3365 op1 = equiv_constant (op1);
3367 /* If we are looking for the low SImode part of
3368 (ashift:DI c (const_int 32)), it doesn't work
3369 to compute that in SImode, because a 32-bit shift
3370 in SImode is unpredictable. We know the value is 0. */
3372 && GET_CODE (elt->exp) == ASHIFT
3373 && GET_CODE (op1) == CONST_INT
3374 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3377 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3378 /* If the count fits in the inner mode's width,
3379 but exceeds the outer mode's width,
3380 the value will get truncated to 0
3382 new = CONST0_RTX (mode);
3384 /* If the count exceeds even the inner mode's width,
3385 don't fold this expression. */
3388 else if (op0 && op1)
3389 new = simplify_binary_operation (GET_CODE (elt->exp), mode, op0, op1);
3392 else if (GET_CODE (elt->exp) == SUBREG
3393 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3394 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3396 && exp_equiv_p (elt->exp, elt->exp, 1, false))
3397 new = copy_rtx (SUBREG_REG (elt->exp));
3403 /* A SUBREG resulting from a zero extension may fold to zero if
3404 it extracts higher bits than the ZERO_EXTEND's source bits.
3405 FIXME: if combine tried to, er, combine these instructions,
3406 this transformation may be moved to simplify_subreg. */
3407 for (; elt; elt = elt->next_same_value)
3409 if (GET_CODE (elt->exp) == ZERO_EXTEND
3411 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3412 return CONST0_RTX (mode);
3420 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3421 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3422 new = lookup_as_function (XEXP (x, 0), code);
3424 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3428 /* If we are not actually processing an insn, don't try to find the
3429 best address. Not only don't we care, but we could modify the
3430 MEM in an invalid way since we have no insn to validate against. */
3432 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3435 /* Even if we don't fold in the insn itself,
3436 we can safely do so here, in hopes of getting a constant. */
3437 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3439 HOST_WIDE_INT offset = 0;
3442 && REGNO_QTY_VALID_P (REGNO (addr)))
3444 int addr_q = REG_QTY (REGNO (addr));
3445 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3447 if (GET_MODE (addr) == addr_ent->mode
3448 && addr_ent->const_rtx != NULL_RTX)
3449 addr = addr_ent->const_rtx;
3452 /* If address is constant, split it into a base and integer offset. */
3453 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3455 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3456 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3458 base = XEXP (XEXP (addr, 0), 0);
3459 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3461 else if (GET_CODE (addr) == LO_SUM
3462 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3463 base = XEXP (addr, 1);
3465 /* If this is a constant pool reference, we can fold it into its
3466 constant to allow better value tracking. */
3467 if (base && GET_CODE (base) == SYMBOL_REF
3468 && CONSTANT_POOL_ADDRESS_P (base))
3470 rtx constant = get_pool_constant (base);
3471 enum machine_mode const_mode = get_pool_mode (base);
3474 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3476 constant_pool_entries_cost = COST (constant);
3477 constant_pool_entries_regcost = approx_reg_cost (constant);
3480 /* If we are loading the full constant, we have an equivalence. */
3481 if (offset == 0 && mode == const_mode)
3484 /* If this actually isn't a constant (weird!), we can't do
3485 anything. Otherwise, handle the two most common cases:
3486 extracting a word from a multi-word constant, and extracting
3487 the low-order bits. Other cases don't seem common enough to
3489 if (! CONSTANT_P (constant))
3492 if (GET_MODE_CLASS (mode) == MODE_INT
3493 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3494 && offset % UNITS_PER_WORD == 0
3495 && (new = operand_subword (constant,
3496 offset / UNITS_PER_WORD,
3497 0, const_mode)) != 0)
3500 if (((BYTES_BIG_ENDIAN
3501 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3502 || (! BYTES_BIG_ENDIAN && offset == 0))
3503 && (new = gen_lowpart (mode, constant)) != 0)
3507 /* If this is a reference to a label at a known position in a jump
3508 table, we also know its value. */
3509 if (base && GET_CODE (base) == LABEL_REF)
3511 rtx label = XEXP (base, 0);
3512 rtx table_insn = NEXT_INSN (label);
3514 if (table_insn && JUMP_P (table_insn)
3515 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3517 rtx table = PATTERN (table_insn);
3520 && (offset / GET_MODE_SIZE (GET_MODE (table))
3521 < XVECLEN (table, 0)))
3522 return XVECEXP (table, 0,
3523 offset / GET_MODE_SIZE (GET_MODE (table)));
3525 if (table_insn && JUMP_P (table_insn)
3526 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3528 rtx table = PATTERN (table_insn);
3531 && (offset / GET_MODE_SIZE (GET_MODE (table))
3532 < XVECLEN (table, 1)))
3534 offset /= GET_MODE_SIZE (GET_MODE (table));
3535 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3538 if (GET_MODE (table) != Pmode)
3539 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3541 /* Indicate this is a constant. This isn't a
3542 valid form of CONST, but it will only be used
3543 to fold the next insns and then discarded, so
3546 Note this expression must be explicitly discarded,
3547 by cse_insn, else it may end up in a REG_EQUAL note
3548 and "escape" to cause problems elsewhere. */
3549 return gen_rtx_CONST (GET_MODE (new), new);
3557 #ifdef NO_FUNCTION_CSE
3559 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3565 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3566 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3567 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3577 mode_arg0 = VOIDmode;
3579 /* Try folding our operands.
3580 Then see which ones have constant values known. */
3582 fmt = GET_RTX_FORMAT (code);
3583 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3586 rtx arg = XEXP (x, i);
3587 rtx folded_arg = arg, const_arg = 0;
3588 enum machine_mode mode_arg = GET_MODE (arg);
3589 rtx cheap_arg, expensive_arg;
3590 rtx replacements[2];
3592 int old_cost = COST_IN (XEXP (x, i), code);
3594 /* Most arguments are cheap, so handle them specially. */
3595 switch (GET_CODE (arg))
3598 /* This is the same as calling equiv_constant; it is duplicated
3600 if (REGNO_QTY_VALID_P (REGNO (arg)))
3602 int arg_q = REG_QTY (REGNO (arg));
3603 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3605 if (arg_ent->const_rtx != NULL_RTX
3606 && !REG_P (arg_ent->const_rtx)
3607 && GET_CODE (arg_ent->const_rtx) != PLUS)
3609 = gen_lowpart (GET_MODE (arg),
3610 arg_ent->const_rtx);
3625 folded_arg = prev_insn_cc0;
3626 mode_arg = prev_insn_cc0_mode;
3627 const_arg = equiv_constant (folded_arg);
3632 folded_arg = fold_rtx (arg, insn);
3633 const_arg = equiv_constant (folded_arg);
3636 /* For the first three operands, see if the operand
3637 is constant or equivalent to a constant. */
3641 folded_arg0 = folded_arg;
3642 const_arg0 = const_arg;
3643 mode_arg0 = mode_arg;
3646 folded_arg1 = folded_arg;
3647 const_arg1 = const_arg;
3650 const_arg2 = const_arg;
3654 /* Pick the least expensive of the folded argument and an
3655 equivalent constant argument. */
3656 if (const_arg == 0 || const_arg == folded_arg
3657 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3658 cheap_arg = folded_arg, expensive_arg = const_arg;
3660 cheap_arg = const_arg, expensive_arg = folded_arg;
3662 /* Try to replace the operand with the cheapest of the two
3663 possibilities. If it doesn't work and this is either of the first
3664 two operands of a commutative operation, try swapping them.
3665 If THAT fails, try the more expensive, provided it is cheaper
3666 than what is already there. */
3668 if (cheap_arg == XEXP (x, i))
3671 if (insn == 0 && ! copied)
3677 /* Order the replacements from cheapest to most expensive. */
3678 replacements[0] = cheap_arg;
3679 replacements[1] = expensive_arg;
3681 for (j = 0; j < 2 && replacements[j]; j++)
3683 int new_cost = COST_IN (replacements[j], code);
3685 /* Stop if what existed before was cheaper. Prefer constants
3686 in the case of a tie. */
3687 if (new_cost > old_cost
3688 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3691 /* It's not safe to substitute the operand of a conversion
3692 operator with a constant, as the conversion's identity
3693 depends upon the mode of it's operand. This optimization
3694 is handled by the call to simplify_unary_operation. */
3695 if (GET_RTX_CLASS (code) == RTX_UNARY
3696 && GET_MODE (replacements[j]) != mode_arg0
3697 && (code == ZERO_EXTEND
3698 || code == SIGN_EXTEND
3700 || code == FLOAT_TRUNCATE
3701 || code == FLOAT_EXTEND
3704 || code == UNSIGNED_FLOAT
3705 || code == UNSIGNED_FIX))
3708 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3711 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3712 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
3714 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3715 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3717 if (apply_change_group ())
3719 /* Swap them back to be invalid so that this loop can
3720 continue and flag them to be swapped back later. */
3723 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3735 /* Don't try to fold inside of a vector of expressions.
3736 Doing nothing is harmless. */
3740 /* If a commutative operation, place a constant integer as the second
3741 operand unless the first operand is also a constant integer. Otherwise,
3742 place any constant second unless the first operand is also a constant. */
3744 if (COMMUTATIVE_P (x))
3747 || swap_commutative_operands_p (const_arg0 ? const_arg0
3749 const_arg1 ? const_arg1
3752 rtx tem = XEXP (x, 0);
3754 if (insn == 0 && ! copied)
3760 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3761 validate_change (insn, &XEXP (x, 1), tem, 1);
3762 if (apply_change_group ())
3764 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3765 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3770 /* If X is an arithmetic operation, see if we can simplify it. */
3772 switch (GET_RTX_CLASS (code))
3778 /* We can't simplify extension ops unless we know the
3780 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3781 && mode_arg0 == VOIDmode)
3784 /* If we had a CONST, strip it off and put it back later if we
3786 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3787 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3789 new = simplify_unary_operation (code, mode,
3790 const_arg0 ? const_arg0 : folded_arg0,
3792 /* NEG of PLUS could be converted into MINUS, but that causes
3793 expressions of the form
3794 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3795 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3796 FIXME: those ports should be fixed. */
3797 if (new != 0 && is_const
3798 && GET_CODE (new) == PLUS
3799 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3800 || GET_CODE (XEXP (new, 0)) == LABEL_REF)
3801 && GET_CODE (XEXP (new, 1)) == CONST_INT)
3802 new = gen_rtx_CONST (mode, new);
3807 case RTX_COMM_COMPARE:
3808 /* See what items are actually being compared and set FOLDED_ARG[01]
3809 to those values and CODE to the actual comparison code. If any are
3810 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3811 do anything if both operands are already known to be constant. */
3813 if (const_arg0 == 0 || const_arg1 == 0)
3815 struct table_elt *p0, *p1;
3816 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3817 enum machine_mode mode_arg1;
3819 #ifdef FLOAT_STORE_FLAG_VALUE
3820 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3822 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3823 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3824 false_rtx = CONST0_RTX (mode);
3828 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3829 &mode_arg0, &mode_arg1);
3830 const_arg0 = equiv_constant (folded_arg0);
3831 const_arg1 = equiv_constant (folded_arg1);
3833 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3834 what kinds of things are being compared, so we can't do
3835 anything with this comparison. */
3837 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3840 /* If we do not now have two constants being compared, see
3841 if we can nevertheless deduce some things about the
3843 if (const_arg0 == 0 || const_arg1 == 0)
3845 /* Some addresses are known to be nonzero. We don't know
3846 their sign, but equality comparisons are known. */
3847 if (const_arg1 == const0_rtx
3848 && nonzero_address_p (folded_arg0))
3852 else if (code == NE)
3856 /* See if the two operands are the same. */
3858 if (folded_arg0 == folded_arg1
3859 || (REG_P (folded_arg0)
3860 && REG_P (folded_arg1)
3861 && (REG_QTY (REGNO (folded_arg0))
3862 == REG_QTY (REGNO (folded_arg1))))
3863 || ((p0 = lookup (folded_arg0,
3864 SAFE_HASH (folded_arg0, mode_arg0),
3866 && (p1 = lookup (folded_arg1,
3867 SAFE_HASH (folded_arg1, mode_arg0),
3869 && p0->first_same_value == p1->first_same_value))
3871 /* Sadly two equal NaNs are not equivalent. */
3872 if (!HONOR_NANS (mode_arg0))
3873 return ((code == EQ || code == LE || code == GE
3874 || code == LEU || code == GEU || code == UNEQ
3875 || code == UNLE || code == UNGE
3877 ? true_rtx : false_rtx);
3878 /* Take care for the FP compares we can resolve. */
3879 if (code == UNEQ || code == UNLE || code == UNGE)
3881 if (code == LTGT || code == LT || code == GT)
3885 /* If FOLDED_ARG0 is a register, see if the comparison we are
3886 doing now is either the same as we did before or the reverse
3887 (we only check the reverse if not floating-point). */
3888 else if (REG_P (folded_arg0))
3890 int qty = REG_QTY (REGNO (folded_arg0));
3892 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3894 struct qty_table_elem *ent = &qty_table[qty];
3896 if ((comparison_dominates_p (ent->comparison_code, code)
3897 || (! FLOAT_MODE_P (mode_arg0)
3898 && comparison_dominates_p (ent->comparison_code,
3899 reverse_condition (code))))
3900 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3902 && rtx_equal_p (ent->comparison_const,
3904 || (REG_P (folded_arg1)
3905 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3906 return (comparison_dominates_p (ent->comparison_code, code)
3907 ? true_rtx : false_rtx);
3913 /* If we are comparing against zero, see if the first operand is
3914 equivalent to an IOR with a constant. If so, we may be able to
3915 determine the result of this comparison. */
3917 if (const_arg1 == const0_rtx)
3919 rtx y = lookup_as_function (folded_arg0, IOR);
3923 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3924 && GET_CODE (inner_const) == CONST_INT
3925 && INTVAL (inner_const) != 0)
3927 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3928 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3929 && (INTVAL (inner_const)
3930 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3931 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3933 #ifdef FLOAT_STORE_FLAG_VALUE
3934 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3936 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3937 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3938 false_rtx = CONST0_RTX (mode);
3963 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3964 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3965 new = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3970 case RTX_COMM_ARITH:
3974 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3975 with that LABEL_REF as its second operand. If so, the result is
3976 the first operand of that MINUS. This handles switches with an
3977 ADDR_DIFF_VEC table. */
3978 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3981 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3982 : lookup_as_function (folded_arg0, MINUS);
3984 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3985 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3988 /* Now try for a CONST of a MINUS like the above. */
3989 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3990 : lookup_as_function (folded_arg0, CONST))) != 0
3991 && GET_CODE (XEXP (y, 0)) == MINUS
3992 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3993 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3994 return XEXP (XEXP (y, 0), 0);
3997 /* Likewise if the operands are in the other order. */
3998 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4001 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4002 : lookup_as_function (folded_arg1, MINUS);
4004 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4005 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4008 /* Now try for a CONST of a MINUS like the above. */
4009 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4010 : lookup_as_function (folded_arg1, CONST))) != 0
4011 && GET_CODE (XEXP (y, 0)) == MINUS
4012 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4013 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4014 return XEXP (XEXP (y, 0), 0);
4017 /* If second operand is a register equivalent to a negative
4018 CONST_INT, see if we can find a register equivalent to the
4019 positive constant. Make a MINUS if so. Don't do this for
4020 a non-negative constant since we might then alternate between
4021 choosing positive and negative constants. Having the positive
4022 constant previously-used is the more common case. Be sure
4023 the resulting constant is non-negative; if const_arg1 were
4024 the smallest negative number this would overflow: depending
4025 on the mode, this would either just be the same value (and
4026 hence not save anything) or be incorrect. */
4027 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4028 && INTVAL (const_arg1) < 0
4029 /* This used to test
4031 -INTVAL (const_arg1) >= 0
4033 But The Sun V5.0 compilers mis-compiled that test. So
4034 instead we test for the problematic value in a more direct
4035 manner and hope the Sun compilers get it correct. */
4036 && INTVAL (const_arg1) !=
4037 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4038 && REG_P (folded_arg1))
4040 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4042 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
4045 for (p = p->first_same_value; p; p = p->next_same_value)
4047 return simplify_gen_binary (MINUS, mode, folded_arg0,
4048 canon_reg (p->exp, NULL_RTX));
4053 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4054 If so, produce (PLUS Z C2-C). */
4055 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4057 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4058 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4059 return fold_rtx (plus_constant (copy_rtx (y),
4060 -INTVAL (const_arg1)),
4067 case SMIN: case SMAX: case UMIN: case UMAX:
4068 case IOR: case AND: case XOR:
4070 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4071 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4072 is known to be of similar form, we may be able to replace the
4073 operation with a combined operation. This may eliminate the
4074 intermediate operation if every use is simplified in this way.
4075 Note that the similar optimization done by combine.c only works
4076 if the intermediate operation's result has only one reference. */
4078 if (REG_P (folded_arg0)
4079 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4082 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4083 rtx y = lookup_as_function (folded_arg0, code);
4085 enum rtx_code associate_code;
4089 || 0 == (inner_const
4090 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4091 || GET_CODE (inner_const) != CONST_INT
4092 /* If we have compiled a statement like
4093 "if (x == (x & mask1))", and now are looking at
4094 "x & mask2", we will have a case where the first operand
4095 of Y is the same as our first operand. Unless we detect
4096 this case, an infinite loop will result. */
4097 || XEXP (y, 0) == folded_arg0)
4100 /* Don't associate these operations if they are a PLUS with the
4101 same constant and it is a power of two. These might be doable
4102 with a pre- or post-increment. Similarly for two subtracts of
4103 identical powers of two with post decrement. */
4105 if (code == PLUS && const_arg1 == inner_const
4106 && ((HAVE_PRE_INCREMENT
4107 && exact_log2 (INTVAL (const_arg1)) >= 0)
4108 || (HAVE_POST_INCREMENT
4109 && exact_log2 (INTVAL (const_arg1)) >= 0)
4110 || (HAVE_PRE_DECREMENT
4111 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4112 || (HAVE_POST_DECREMENT
4113 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4116 /* Compute the code used to compose the constants. For example,
4117 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4119 associate_code = (is_shift || code == MINUS ? PLUS : code);
4121 new_const = simplify_binary_operation (associate_code, mode,
4122 const_arg1, inner_const);
4127 /* If we are associating shift operations, don't let this
4128 produce a shift of the size of the object or larger.
4129 This could occur when we follow a sign-extend by a right
4130 shift on a machine that does a sign-extend as a pair
4133 if (is_shift && GET_CODE (new_const) == CONST_INT
4134 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4136 /* As an exception, we can turn an ASHIFTRT of this
4137 form into a shift of the number of bits - 1. */
4138 if (code == ASHIFTRT)
4139 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4144 y = copy_rtx (XEXP (y, 0));
4146 /* If Y contains our first operand (the most common way this
4147 can happen is if Y is a MEM), we would do into an infinite
4148 loop if we tried to fold it. So don't in that case. */
4150 if (! reg_mentioned_p (folded_arg0, y))
4151 y = fold_rtx (y, insn);
4153 return simplify_gen_binary (code, mode, y, new_const);
4157 case DIV: case UDIV:
4158 /* ??? The associative optimization performed immediately above is
4159 also possible for DIV and UDIV using associate_code of MULT.
4160 However, we would need extra code to verify that the
4161 multiplication does not overflow, that is, there is no overflow
4162 in the calculation of new_const. */
4169 new = simplify_binary_operation (code, mode,
4170 const_arg0 ? const_arg0 : folded_arg0,
4171 const_arg1 ? const_arg1 : folded_arg1);
4175 /* (lo_sum (high X) X) is simply X. */
4176 if (code == LO_SUM && const_arg0 != 0
4177 && GET_CODE (const_arg0) == HIGH
4178 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4183 case RTX_BITFIELD_OPS:
4184 new = simplify_ternary_operation (code, mode, mode_arg0,
4185 const_arg0 ? const_arg0 : folded_arg0,
4186 const_arg1 ? const_arg1 : folded_arg1,
4187 const_arg2 ? const_arg2 : XEXP (x, 2));
4194 return new ? new : x;
4197 /* Return a constant value currently equivalent to X.
4198 Return 0 if we don't know one. */
4201 equiv_constant (rtx x)
4204 && REGNO_QTY_VALID_P (REGNO (x)))
4206 int x_q = REG_QTY (REGNO (x));
4207 struct qty_table_elem *x_ent = &qty_table[x_q];
4209 if (x_ent->const_rtx)
4210 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
4213 if (x == 0 || CONSTANT_P (x))
4216 /* If X is a MEM, try to fold it outside the context of any insn to see if
4217 it might be equivalent to a constant. That handles the case where it
4218 is a constant-pool reference. Then try to look it up in the hash table
4219 in case it is something whose value we have seen before. */
4223 struct table_elt *elt;
4225 x = fold_rtx (x, NULL_RTX);
4229 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
4233 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4234 if (elt->is_const && CONSTANT_P (elt->exp))
4241 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4242 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4243 least-significant part of X.
4244 MODE specifies how big a part of X to return.
4246 If the requested operation cannot be done, 0 is returned.
4248 This is similar to gen_lowpart_general in emit-rtl.c. */
4251 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4253 rtx result = gen_lowpart_common (mode, x);
4259 /* This is the only other case we handle. */
4263 if (WORDS_BIG_ENDIAN)
4264 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4265 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4266 if (BYTES_BIG_ENDIAN)
4267 /* Adjust the address so that the address-after-the-data is
4269 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4270 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4272 new = adjust_address_nv (x, mode, offset);
4273 if (! memory_address_p (mode, XEXP (new, 0)))
4282 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4283 branch. It will be zero if not.
4285 In certain cases, this can cause us to add an equivalence. For example,
4286 if we are following the taken case of
4288 we can add the fact that `i' and '2' are now equivalent.
4290 In any case, we can record that this comparison was passed. If the same
4291 comparison is seen later, we will know its value. */
4294 record_jump_equiv (rtx insn, int taken)
4296 int cond_known_true;
4299 enum machine_mode mode, mode0, mode1;
4300 int reversed_nonequality = 0;
4303 /* Ensure this is the right kind of insn. */
4304 if (! any_condjump_p (insn))
4306 set = pc_set (insn);
4308 /* See if this jump condition is known true or false. */
4310 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4312 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4314 /* Get the type of comparison being done and the operands being compared.
4315 If we had to reverse a non-equality condition, record that fact so we
4316 know that it isn't valid for floating-point. */
4317 code = GET_CODE (XEXP (SET_SRC (set), 0));
4318 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4319 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4321 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4322 if (! cond_known_true)
4324 code = reversed_comparison_code_parts (code, op0, op1, insn);
4326 /* Don't remember if we can't find the inverse. */
4327 if (code == UNKNOWN)
4331 /* The mode is the mode of the non-constant. */
4333 if (mode1 != VOIDmode)
4336 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4339 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4340 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4341 Make any useful entries we can with that information. Called from
4342 above function and called recursively. */
4345 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4346 rtx op1, int reversed_nonequality)
4348 unsigned op0_hash, op1_hash;
4349 int op0_in_memory, op1_in_memory;
4350 struct table_elt *op0_elt, *op1_elt;
4352 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4353 we know that they are also equal in the smaller mode (this is also
4354 true for all smaller modes whether or not there is a SUBREG, but
4355 is not worth testing for with no SUBREG). */
4357 /* Note that GET_MODE (op0) may not equal MODE. */
4358 if (code == EQ && GET_CODE (op0) == SUBREG
4359 && (GET_MODE_SIZE (GET_MODE (op0))
4360 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4362 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4363 rtx tem = gen_lowpart (inner_mode, op1);
4365 record_jump_cond (code, mode, SUBREG_REG (op0),
4366 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4367 reversed_nonequality);
4370 if (code == EQ && GET_CODE (op1) == SUBREG
4371 && (GET_MODE_SIZE (GET_MODE (op1))
4372 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4374 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4375 rtx tem = gen_lowpart (inner_mode, op0);
4377 record_jump_cond (code, mode, SUBREG_REG (op1),
4378 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4379 reversed_nonequality);
4382 /* Similarly, if this is an NE comparison, and either is a SUBREG
4383 making a smaller mode, we know the whole thing is also NE. */
4385 /* Note that GET_MODE (op0) may not equal MODE;
4386 if we test MODE instead, we can get an infinite recursion
4387 alternating between two modes each wider than MODE. */
4389 if (code == NE && GET_CODE (op0) == SUBREG
4390 && subreg_lowpart_p (op0)
4391 && (GET_MODE_SIZE (GET_MODE (op0))
4392 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4394 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4395 rtx tem = gen_lowpart (inner_mode, op1);
4397 record_jump_cond (code, mode, SUBREG_REG (op0),
4398 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4399 reversed_nonequality);
4402 if (code == NE && GET_CODE (op1) == SUBREG
4403 && subreg_lowpart_p (op1)
4404 && (GET_MODE_SIZE (GET_MODE (op1))
4405 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4407 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4408 rtx tem = gen_lowpart (inner_mode, op0);
4410 record_jump_cond (code, mode, SUBREG_REG (op1),
4411 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4412 reversed_nonequality);
4415 /* Hash both operands. */
4418 hash_arg_in_memory = 0;
4419 op0_hash = HASH (op0, mode);
4420 op0_in_memory = hash_arg_in_memory;
4426 hash_arg_in_memory = 0;
4427 op1_hash = HASH (op1, mode);
4428 op1_in_memory = hash_arg_in_memory;
4433 /* Look up both operands. */
4434 op0_elt = lookup (op0, op0_hash, mode);
4435 op1_elt = lookup (op1, op1_hash, mode);
4437 /* If both operands are already equivalent or if they are not in the
4438 table but are identical, do nothing. */
4439 if ((op0_elt != 0 && op1_elt != 0
4440 && op0_elt->first_same_value == op1_elt->first_same_value)
4441 || op0 == op1 || rtx_equal_p (op0, op1))
4444 /* If we aren't setting two things equal all we can do is save this
4445 comparison. Similarly if this is floating-point. In the latter
4446 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4447 If we record the equality, we might inadvertently delete code
4448 whose intent was to change -0 to +0. */
4450 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4452 struct qty_table_elem *ent;
4455 /* If we reversed a floating-point comparison, if OP0 is not a
4456 register, or if OP1 is neither a register or constant, we can't
4460 op1 = equiv_constant (op1);
4462 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4463 || !REG_P (op0) || op1 == 0)
4466 /* Put OP0 in the hash table if it isn't already. This gives it a
4467 new quantity number. */
4470 if (insert_regs (op0, NULL, 0))
4472 rehash_using_reg (op0);
4473 op0_hash = HASH (op0, mode);
4475 /* If OP0 is contained in OP1, this changes its hash code
4476 as well. Faster to rehash than to check, except
4477 for the simple case of a constant. */
4478 if (! CONSTANT_P (op1))
4479 op1_hash = HASH (op1,mode);
4482 op0_elt = insert (op0, NULL, op0_hash, mode);
4483 op0_elt->in_memory = op0_in_memory;
4486 qty = REG_QTY (REGNO (op0));
4487 ent = &qty_table[qty];
4489 ent->comparison_code = code;
4492 /* Look it up again--in case op0 and op1 are the same. */
4493 op1_elt = lookup (op1, op1_hash, mode);
4495 /* Put OP1 in the hash table so it gets a new quantity number. */
4498 if (insert_regs (op1, NULL, 0))
4500 rehash_using_reg (op1);
4501 op1_hash = HASH (op1, mode);
4504 op1_elt = insert (op1, NULL, op1_hash, mode);
4505 op1_elt->in_memory = op1_in_memory;
4508 ent->comparison_const = NULL_RTX;
4509 ent->comparison_qty = REG_QTY (REGNO (op1));
4513 ent->comparison_const = op1;
4514 ent->comparison_qty = -1;
4520 /* If either side is still missing an equivalence, make it now,
4521 then merge the equivalences. */
4525 if (insert_regs (op0, NULL, 0))
4527 rehash_using_reg (op0);
4528 op0_hash = HASH (op0, mode);
4531 op0_elt = insert (op0, NULL, op0_hash, mode);
4532 op0_elt->in_memory = op0_in_memory;
4537 if (insert_regs (op1, NULL, 0))
4539 rehash_using_reg (op1);
4540 op1_hash = HASH (op1, mode);
4543 op1_elt = insert (op1, NULL, op1_hash, mode);
4544 op1_elt->in_memory = op1_in_memory;
4547 merge_equiv_classes (op0_elt, op1_elt);
4550 /* CSE processing for one instruction.
4551 First simplify sources and addresses of all assignments
4552 in the instruction, using previously-computed equivalents values.
4553 Then install the new sources and destinations in the table
4554 of available values.
4556 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4557 the insn. It means that INSN is inside libcall block. In this
4558 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4560 /* Data on one SET contained in the instruction. */
4564 /* The SET rtx itself. */
4566 /* The SET_SRC of the rtx (the original value, if it is changing). */
4568 /* The hash-table element for the SET_SRC of the SET. */
4569 struct table_elt *src_elt;
4570 /* Hash value for the SET_SRC. */
4572 /* Hash value for the SET_DEST. */
4574 /* The SET_DEST, with SUBREG, etc., stripped. */
4576 /* Nonzero if the SET_SRC is in memory. */
4578 /* Nonzero if the SET_SRC contains something
4579 whose value cannot be predicted and understood. */
4581 /* Original machine mode, in case it becomes a CONST_INT.
4582 The size of this field should match the size of the mode
4583 field of struct rtx_def (see rtl.h). */
4584 ENUM_BITFIELD(machine_mode) mode : 8;
4585 /* A constant equivalent for SET_SRC, if any. */
4587 /* Original SET_SRC value used for libcall notes. */
4589 /* Hash value of constant equivalent for SET_SRC. */
4590 unsigned src_const_hash;
4591 /* Table entry for constant equivalent for SET_SRC, if any. */
4592 struct table_elt *src_const_elt;
4596 cse_insn (rtx insn, rtx libcall_insn)
4598 rtx x = PATTERN (insn);
4604 /* Records what this insn does to set CC0. */
4605 rtx this_insn_cc0 = 0;
4606 enum machine_mode this_insn_cc0_mode = VOIDmode;
4610 struct table_elt *src_eqv_elt = 0;
4611 int src_eqv_volatile = 0;
4612 int src_eqv_in_memory = 0;
4613 unsigned src_eqv_hash = 0;
4615 struct set *sets = (struct set *) 0;
4619 /* Find all the SETs and CLOBBERs in this instruction.
4620 Record all the SETs in the array `set' and count them.
4621 Also determine whether there is a CLOBBER that invalidates
4622 all memory references, or all references at varying addresses. */
4626 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4628 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4629 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4630 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4634 if (GET_CODE (x) == SET)
4636 sets = alloca (sizeof (struct set));
4639 /* Ignore SETs that are unconditional jumps.
4640 They never need cse processing, so this does not hurt.
4641 The reason is not efficiency but rather
4642 so that we can test at the end for instructions
4643 that have been simplified to unconditional jumps
4644 and not be misled by unchanged instructions
4645 that were unconditional jumps to begin with. */
4646 if (SET_DEST (x) == pc_rtx
4647 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4650 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4651 The hard function value register is used only once, to copy to
4652 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4653 Ensure we invalidate the destination register. On the 80386 no
4654 other code would invalidate it since it is a fixed_reg.
4655 We need not check the return of apply_change_group; see canon_reg. */
4657 else if (GET_CODE (SET_SRC (x)) == CALL)
4659 canon_reg (SET_SRC (x), insn);
4660 apply_change_group ();
4661 fold_rtx (SET_SRC (x), insn);
4662 invalidate (SET_DEST (x), VOIDmode);
4667 else if (GET_CODE (x) == PARALLEL)
4669 int lim = XVECLEN (x, 0);
4671 sets = alloca (lim * sizeof (struct set));
4673 /* Find all regs explicitly clobbered in this insn,
4674 and ensure they are not replaced with any other regs
4675 elsewhere in this insn.
4676 When a reg that is clobbered is also used for input,
4677 we should presume that that is for a reason,
4678 and we should not substitute some other register
4679 which is not supposed to be clobbered.
4680 Therefore, this loop cannot be merged into the one below
4681 because a CALL may precede a CLOBBER and refer to the
4682 value clobbered. We must not let a canonicalization do
4683 anything in that case. */
4684 for (i = 0; i < lim; i++)
4686 rtx y = XVECEXP (x, 0, i);
4687 if (GET_CODE (y) == CLOBBER)
4689 rtx clobbered = XEXP (y, 0);
4691 if (REG_P (clobbered)
4692 || GET_CODE (clobbered) == SUBREG)
4693 invalidate (clobbered, VOIDmode);
4694 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4695 || GET_CODE (clobbered) == ZERO_EXTRACT)
4696 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4700 for (i = 0; i < lim; i++)
4702 rtx y = XVECEXP (x, 0, i);
4703 if (GET_CODE (y) == SET)
4705 /* As above, we ignore unconditional jumps and call-insns and
4706 ignore the result of apply_change_group. */
4707 if (GET_CODE (SET_SRC (y)) == CALL)
4709 canon_reg (SET_SRC (y), insn);
4710 apply_change_group ();
4711 fold_rtx (SET_SRC (y), insn);
4712 invalidate (SET_DEST (y), VOIDmode);
4714 else if (SET_DEST (y) == pc_rtx
4715 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4718 sets[n_sets++].rtl = y;
4720 else if (GET_CODE (y) == CLOBBER)
4722 /* If we clobber memory, canon the address.
4723 This does nothing when a register is clobbered
4724 because we have already invalidated the reg. */
4725 if (MEM_P (XEXP (y, 0)))
4726 canon_reg (XEXP (y, 0), NULL_RTX);
4728 else if (GET_CODE (y) == USE
4729 && ! (REG_P (XEXP (y, 0))
4730 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4731 canon_reg (y, NULL_RTX);
4732 else if (GET_CODE (y) == CALL)
4734 /* The result of apply_change_group can be ignored; see
4736 canon_reg (y, insn);
4737 apply_change_group ();
4742 else if (GET_CODE (x) == CLOBBER)
4744 if (MEM_P (XEXP (x, 0)))
4745 canon_reg (XEXP (x, 0), NULL_RTX);
4748 /* Canonicalize a USE of a pseudo register or memory location. */
4749 else if (GET_CODE (x) == USE
4750 && ! (REG_P (XEXP (x, 0))
4751 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4752 canon_reg (XEXP (x, 0), NULL_RTX);
4753 else if (GET_CODE (x) == CALL)
4755 /* The result of apply_change_group can be ignored; see canon_reg. */
4756 canon_reg (x, insn);
4757 apply_change_group ();
4761 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4762 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4763 is handled specially for this case, and if it isn't set, then there will
4764 be no equivalence for the destination. */
4765 if (n_sets == 1 && REG_NOTES (insn) != 0
4766 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4767 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4768 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4770 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4771 XEXP (tem, 0) = src_eqv;
4774 /* Canonicalize sources and addresses of destinations.
4775 We do this in a separate pass to avoid problems when a MATCH_DUP is
4776 present in the insn pattern. In that case, we want to ensure that
4777 we don't break the duplicate nature of the pattern. So we will replace
4778 both operands at the same time. Otherwise, we would fail to find an
4779 equivalent substitution in the loop calling validate_change below.
4781 We used to suppress canonicalization of DEST if it appears in SRC,
4782 but we don't do this any more. */
4784 for (i = 0; i < n_sets; i++)
4786 rtx dest = SET_DEST (sets[i].rtl);
4787 rtx src = SET_SRC (sets[i].rtl);
4788 rtx new = canon_reg (src, insn);
4791 sets[i].orig_src = src;
4792 if ((REG_P (new) && REG_P (src)
4793 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4794 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4795 || (insn_code = recog_memoized (insn)) < 0
4796 || insn_data[insn_code].n_dups > 0)
4797 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4799 SET_SRC (sets[i].rtl) = new;
4801 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4803 validate_change (insn, &XEXP (dest, 1),
4804 canon_reg (XEXP (dest, 1), insn), 1);
4805 validate_change (insn, &XEXP (dest, 2),
4806 canon_reg (XEXP (dest, 2), insn), 1);
4809 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4810 || GET_CODE (dest) == ZERO_EXTRACT
4811 || GET_CODE (dest) == SIGN_EXTRACT)
4812 dest = XEXP (dest, 0);
4815 canon_reg (dest, insn);
4818 /* Now that we have done all the replacements, we can apply the change
4819 group and see if they all work. Note that this will cause some
4820 canonicalizations that would have worked individually not to be applied
4821 because some other canonicalization didn't work, but this should not
4824 The result of apply_change_group can be ignored; see canon_reg. */
4826 apply_change_group ();
4828 /* Set sets[i].src_elt to the class each source belongs to.
4829 Detect assignments from or to volatile things
4830 and set set[i] to zero so they will be ignored
4831 in the rest of this function.
4833 Nothing in this loop changes the hash table or the register chains. */
4835 for (i = 0; i < n_sets; i++)
4839 struct table_elt *elt = 0, *p;
4840 enum machine_mode mode;
4843 rtx src_related = 0;
4844 struct table_elt *src_const_elt = 0;
4845 int src_cost = MAX_COST;
4846 int src_eqv_cost = MAX_COST;
4847 int src_folded_cost = MAX_COST;
4848 int src_related_cost = MAX_COST;
4849 int src_elt_cost = MAX_COST;
4850 int src_regcost = MAX_COST;
4851 int src_eqv_regcost = MAX_COST;
4852 int src_folded_regcost = MAX_COST;
4853 int src_related_regcost = MAX_COST;
4854 int src_elt_regcost = MAX_COST;
4855 /* Set nonzero if we need to call force_const_mem on with the
4856 contents of src_folded before using it. */
4857 int src_folded_force_flag = 0;
4859 dest = SET_DEST (sets[i].rtl);
4860 src = SET_SRC (sets[i].rtl);
4862 /* If SRC is a constant that has no machine mode,
4863 hash it with the destination's machine mode.
4864 This way we can keep different modes separate. */
4866 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4867 sets[i].mode = mode;
4871 enum machine_mode eqvmode = mode;
4872 if (GET_CODE (dest) == STRICT_LOW_PART)
4873 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4875 hash_arg_in_memory = 0;
4876 src_eqv_hash = HASH (src_eqv, eqvmode);
4878 /* Find the equivalence class for the equivalent expression. */
4881 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4883 src_eqv_volatile = do_not_record;
4884 src_eqv_in_memory = hash_arg_in_memory;
4887 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4888 value of the INNER register, not the destination. So it is not
4889 a valid substitution for the source. But save it for later. */
4890 if (GET_CODE (dest) == STRICT_LOW_PART)
4893 src_eqv_here = src_eqv;
4895 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4896 simplified result, which may not necessarily be valid. */
4897 src_folded = fold_rtx (src, insn);
4900 /* ??? This caused bad code to be generated for the m68k port with -O2.
4901 Suppose src is (CONST_INT -1), and that after truncation src_folded
4902 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4903 At the end we will add src and src_const to the same equivalence
4904 class. We now have 3 and -1 on the same equivalence class. This
4905 causes later instructions to be mis-optimized. */
4906 /* If storing a constant in a bitfield, pre-truncate the constant
4907 so we will be able to record it later. */
4908 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4909 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4911 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4913 if (GET_CODE (src) == CONST_INT
4914 && GET_CODE (width) == CONST_INT
4915 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4916 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4918 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4919 << INTVAL (width)) - 1));
4923 /* Compute SRC's hash code, and also notice if it
4924 should not be recorded at all. In that case,
4925 prevent any further processing of this assignment. */
4927 hash_arg_in_memory = 0;
4930 sets[i].src_hash = HASH (src, mode);
4931 sets[i].src_volatile = do_not_record;
4932 sets[i].src_in_memory = hash_arg_in_memory;
4934 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4935 a pseudo, do not record SRC. Using SRC as a replacement for
4936 anything else will be incorrect in that situation. Note that
4937 this usually occurs only for stack slots, in which case all the
4938 RTL would be referring to SRC, so we don't lose any optimization
4939 opportunities by not having SRC in the hash table. */
4942 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4944 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4945 sets[i].src_volatile = 1;
4948 /* It is no longer clear why we used to do this, but it doesn't
4949 appear to still be needed. So let's try without it since this
4950 code hurts cse'ing widened ops. */
4951 /* If source is a paradoxical subreg (such as QI treated as an SI),
4952 treat it as volatile. It may do the work of an SI in one context
4953 where the extra bits are not being used, but cannot replace an SI
4955 if (GET_CODE (src) == SUBREG
4956 && (GET_MODE_SIZE (GET_MODE (src))
4957 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4958 sets[i].src_volatile = 1;
4961 /* Locate all possible equivalent forms for SRC. Try to replace
4962 SRC in the insn with each cheaper equivalent.
4964 We have the following types of equivalents: SRC itself, a folded
4965 version, a value given in a REG_EQUAL note, or a value related
4968 Each of these equivalents may be part of an additional class
4969 of equivalents (if more than one is in the table, they must be in
4970 the same class; we check for this).
4972 If the source is volatile, we don't do any table lookups.
4974 We note any constant equivalent for possible later use in a
4977 if (!sets[i].src_volatile)
4978 elt = lookup (src, sets[i].src_hash, mode);
4980 sets[i].src_elt = elt;
4982 if (elt && src_eqv_here && src_eqv_elt)
4984 if (elt->first_same_value != src_eqv_elt->first_same_value)
4986 /* The REG_EQUAL is indicating that two formerly distinct
4987 classes are now equivalent. So merge them. */
4988 merge_equiv_classes (elt, src_eqv_elt);
4989 src_eqv_hash = HASH (src_eqv, elt->mode);
4990 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4996 else if (src_eqv_elt)
4999 /* Try to find a constant somewhere and record it in `src_const'.
5000 Record its table element, if any, in `src_const_elt'. Look in
5001 any known equivalences first. (If the constant is not in the
5002 table, also set `sets[i].src_const_hash'). */
5004 for (p = elt->first_same_value; p; p = p->next_same_value)
5008 src_const_elt = elt;
5013 && (CONSTANT_P (src_folded)
5014 /* Consider (minus (label_ref L1) (label_ref L2)) as
5015 "constant" here so we will record it. This allows us
5016 to fold switch statements when an ADDR_DIFF_VEC is used. */
5017 || (GET_CODE (src_folded) == MINUS
5018 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5019 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5020 src_const = src_folded, src_const_elt = elt;
5021 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5022 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5024 /* If we don't know if the constant is in the table, get its
5025 hash code and look it up. */
5026 if (src_const && src_const_elt == 0)
5028 sets[i].src_const_hash = HASH (src_const, mode);
5029 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5032 sets[i].src_const = src_const;
5033 sets[i].src_const_elt = src_const_elt;
5035 /* If the constant and our source are both in the table, mark them as
5036 equivalent. Otherwise, if a constant is in the table but the source
5037 isn't, set ELT to it. */
5038 if (src_const_elt && elt
5039 && src_const_elt->first_same_value != elt->first_same_value)
5040 merge_equiv_classes (elt, src_const_elt);
5041 else if (src_const_elt && elt == 0)
5042 elt = src_const_elt;
5044 /* See if there is a register linearly related to a constant
5045 equivalent of SRC. */
5047 && (GET_CODE (src_const) == CONST
5048 || (src_const_elt && src_const_elt->related_value != 0)))
5050 src_related = use_related_value (src_const, src_const_elt);
5053 struct table_elt *src_related_elt
5054 = lookup (src_related, HASH (src_related, mode), mode);
5055 if (src_related_elt && elt)
5057 if (elt->first_same_value
5058 != src_related_elt->first_same_value)
5059 /* This can occur when we previously saw a CONST
5060 involving a SYMBOL_REF and then see the SYMBOL_REF
5061 twice. Merge the involved classes. */
5062 merge_equiv_classes (elt, src_related_elt);
5065 src_related_elt = 0;
5067 else if (src_related_elt && elt == 0)
5068 elt = src_related_elt;
5072 /* See if we have a CONST_INT that is already in a register in a
5075 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5076 && GET_MODE_CLASS (mode) == MODE_INT
5077 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5079 enum machine_mode wider_mode;
5081 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5082 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5083 && src_related == 0;
5084 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5086 struct table_elt *const_elt
5087 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5092 for (const_elt = const_elt->first_same_value;
5093 const_elt; const_elt = const_elt->next_same_value)
5094 if (REG_P (const_elt->exp))
5096 src_related = gen_lowpart (mode,
5103 /* Another possibility is that we have an AND with a constant in
5104 a mode narrower than a word. If so, it might have been generated
5105 as part of an "if" which would narrow the AND. If we already
5106 have done the AND in a wider mode, we can use a SUBREG of that
5109 if (flag_expensive_optimizations && ! src_related
5110 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5111 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5113 enum machine_mode tmode;
5114 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5116 for (tmode = GET_MODE_WIDER_MODE (mode);
5117 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5118 tmode = GET_MODE_WIDER_MODE (tmode))
5120 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
5121 struct table_elt *larger_elt;
5125 PUT_MODE (new_and, tmode);
5126 XEXP (new_and, 0) = inner;
5127 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5128 if (larger_elt == 0)
5131 for (larger_elt = larger_elt->first_same_value;
5132 larger_elt; larger_elt = larger_elt->next_same_value)
5133 if (REG_P (larger_elt->exp))
5136 = gen_lowpart (mode, larger_elt->exp);
5146 #ifdef LOAD_EXTEND_OP
5147 /* See if a MEM has already been loaded with a widening operation;
5148 if it has, we can use a subreg of that. Many CISC machines
5149 also have such operations, but this is only likely to be
5150 beneficial on these machines. */
5152 if (flag_expensive_optimizations && src_related == 0
5153 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5154 && GET_MODE_CLASS (mode) == MODE_INT
5155 && MEM_P (src) && ! do_not_record
5156 && LOAD_EXTEND_OP (mode) != UNKNOWN)
5158 struct rtx_def memory_extend_buf;
5159 rtx memory_extend_rtx = &memory_extend_buf;
5160 enum machine_mode tmode;
5162 /* Set what we are trying to extend and the operation it might
5163 have been extended with. */
5164 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
5165 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5166 XEXP (memory_extend_rtx, 0) = src;
5168 for (tmode = GET_MODE_WIDER_MODE (mode);
5169 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5170 tmode = GET_MODE_WIDER_MODE (tmode))
5172 struct table_elt *larger_elt;
5174 PUT_MODE (memory_extend_rtx, tmode);
5175 larger_elt = lookup (memory_extend_rtx,
5176 HASH (memory_extend_rtx, tmode), tmode);
5177 if (larger_elt == 0)
5180 for (larger_elt = larger_elt->first_same_value;
5181 larger_elt; larger_elt = larger_elt->next_same_value)
5182 if (REG_P (larger_elt->exp))
5184 src_related = gen_lowpart (mode,
5193 #endif /* LOAD_EXTEND_OP */
5195 if (src == src_folded)
5198 /* At this point, ELT, if nonzero, points to a class of expressions
5199 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5200 and SRC_RELATED, if nonzero, each contain additional equivalent
5201 expressions. Prune these latter expressions by deleting expressions
5202 already in the equivalence class.
5204 Check for an equivalent identical to the destination. If found,
5205 this is the preferred equivalent since it will likely lead to
5206 elimination of the insn. Indicate this by placing it in
5210 elt = elt->first_same_value;
5211 for (p = elt; p; p = p->next_same_value)
5213 enum rtx_code code = GET_CODE (p->exp);
5215 /* If the expression is not valid, ignore it. Then we do not
5216 have to check for validity below. In most cases, we can use
5217 `rtx_equal_p', since canonicalization has already been done. */
5218 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
5221 /* Also skip paradoxical subregs, unless that's what we're
5224 && (GET_MODE_SIZE (GET_MODE (p->exp))
5225 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5227 && GET_CODE (src) == SUBREG
5228 && GET_MODE (src) == GET_MODE (p->exp)
5229 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5230 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5233 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5235 else if (src_folded && GET_CODE (src_folded) == code
5236 && rtx_equal_p (src_folded, p->exp))
5238 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5239 && rtx_equal_p (src_eqv_here, p->exp))
5241 else if (src_related && GET_CODE (src_related) == code
5242 && rtx_equal_p (src_related, p->exp))
5245 /* This is the same as the destination of the insns, we want
5246 to prefer it. Copy it to src_related. The code below will
5247 then give it a negative cost. */
5248 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5252 /* Find the cheapest valid equivalent, trying all the available
5253 possibilities. Prefer items not in the hash table to ones
5254 that are when they are equal cost. Note that we can never
5255 worsen an insn as the current contents will also succeed.
5256 If we find an equivalent identical to the destination, use it as best,
5257 since this insn will probably be eliminated in that case. */
5260 if (rtx_equal_p (src, dest))
5261 src_cost = src_regcost = -1;
5264 src_cost = COST (src);
5265 src_regcost = approx_reg_cost (src);
5271 if (rtx_equal_p (src_eqv_here, dest))
5272 src_eqv_cost = src_eqv_regcost = -1;
5275 src_eqv_cost = COST (src_eqv_here);
5276 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5282 if (rtx_equal_p (src_folded, dest))
5283 src_folded_cost = src_folded_regcost = -1;
5286 src_folded_cost = COST (src_folded);
5287 src_folded_regcost = approx_reg_cost (src_folded);
5293 if (rtx_equal_p (src_related, dest))
5294 src_related_cost = src_related_regcost = -1;
5297 src_related_cost = COST (src_related);
5298 src_related_regcost = approx_reg_cost (src_related);
5302 /* If this was an indirect jump insn, a known label will really be
5303 cheaper even though it looks more expensive. */
5304 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5305 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5307 /* Terminate loop when replacement made. This must terminate since
5308 the current contents will be tested and will always be valid. */
5313 /* Skip invalid entries. */
5314 while (elt && !REG_P (elt->exp)
5315 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5316 elt = elt->next_same_value;
5318 /* A paradoxical subreg would be bad here: it'll be the right
5319 size, but later may be adjusted so that the upper bits aren't
5320 what we want. So reject it. */
5322 && GET_CODE (elt->exp) == SUBREG
5323 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5324 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5325 /* It is okay, though, if the rtx we're trying to match
5326 will ignore any of the bits we can't predict. */
5328 && GET_CODE (src) == SUBREG
5329 && GET_MODE (src) == GET_MODE (elt->exp)
5330 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5331 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5333 elt = elt->next_same_value;
5339 src_elt_cost = elt->cost;
5340 src_elt_regcost = elt->regcost;
5343 /* Find cheapest and skip it for the next time. For items
5344 of equal cost, use this order:
5345 src_folded, src, src_eqv, src_related and hash table entry. */
5347 && preferable (src_folded_cost, src_folded_regcost,
5348 src_cost, src_regcost) <= 0
5349 && preferable (src_folded_cost, src_folded_regcost,
5350 src_eqv_cost, src_eqv_regcost) <= 0
5351 && preferable (src_folded_cost, src_folded_regcost,
5352 src_related_cost, src_related_regcost) <= 0
5353 && preferable (src_folded_cost, src_folded_regcost,
5354 src_elt_cost, src_elt_regcost) <= 0)
5356 trial = src_folded, src_folded_cost = MAX_COST;
5357 if (src_folded_force_flag)
5359 rtx forced = force_const_mem (mode, trial);
5365 && preferable (src_cost, src_regcost,
5366 src_eqv_cost, src_eqv_regcost) <= 0
5367 && preferable (src_cost, src_regcost,
5368 src_related_cost, src_related_regcost) <= 0
5369 && preferable (src_cost, src_regcost,
5370 src_elt_cost, src_elt_regcost) <= 0)
5371 trial = src, src_cost = MAX_COST;
5372 else if (src_eqv_here
5373 && preferable (src_eqv_cost, src_eqv_regcost,
5374 src_related_cost, src_related_regcost) <= 0
5375 && preferable (src_eqv_cost, src_eqv_regcost,
5376 src_elt_cost, src_elt_regcost) <= 0)
5377 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5378 else if (src_related
5379 && preferable (src_related_cost, src_related_regcost,
5380 src_elt_cost, src_elt_regcost) <= 0)
5381 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5384 trial = copy_rtx (elt->exp);
5385 elt = elt->next_same_value;
5386 src_elt_cost = MAX_COST;
5389 /* We don't normally have an insn matching (set (pc) (pc)), so
5390 check for this separately here. We will delete such an
5393 For other cases such as a table jump or conditional jump
5394 where we know the ultimate target, go ahead and replace the
5395 operand. While that may not make a valid insn, we will
5396 reemit the jump below (and also insert any necessary
5398 if (n_sets == 1 && dest == pc_rtx
5400 || (GET_CODE (trial) == LABEL_REF
5401 && ! condjump_p (insn))))
5403 /* Don't substitute non-local labels, this confuses CFG. */
5404 if (GET_CODE (trial) == LABEL_REF
5405 && LABEL_REF_NONLOCAL_P (trial))
5408 SET_SRC (sets[i].rtl) = trial;
5409 cse_jumps_altered = 1;
5413 /* Look for a substitution that makes a valid insn. */
5414 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5416 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5418 /* If we just made a substitution inside a libcall, then we
5419 need to make the same substitution in any notes attached
5420 to the RETVAL insn. */
5422 && (REG_P (sets[i].orig_src)
5423 || GET_CODE (sets[i].orig_src) == SUBREG
5424 || MEM_P (sets[i].orig_src)))
5426 rtx note = find_reg_equal_equiv_note (libcall_insn);
5428 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0),
5433 /* The result of apply_change_group can be ignored; see
5436 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5437 apply_change_group ();
5441 /* If we previously found constant pool entries for
5442 constants and this is a constant, try making a
5443 pool entry. Put it in src_folded unless we already have done
5444 this since that is where it likely came from. */
5446 else if (constant_pool_entries_cost
5447 && CONSTANT_P (trial)
5448 /* Reject cases that will abort in decode_rtx_const.
5449 On the alpha when simplifying a switch, we get
5450 (const (truncate (minus (label_ref) (label_ref)))). */
5451 && ! (GET_CODE (trial) == CONST
5452 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5453 /* Likewise on IA-64, except without the truncate. */
5454 && ! (GET_CODE (trial) == CONST
5455 && GET_CODE (XEXP (trial, 0)) == MINUS
5456 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5457 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5459 || (!MEM_P (src_folded)
5460 && ! src_folded_force_flag))
5461 && GET_MODE_CLASS (mode) != MODE_CC
5462 && mode != VOIDmode)
5464 src_folded_force_flag = 1;
5466 src_folded_cost = constant_pool_entries_cost;
5467 src_folded_regcost = constant_pool_entries_regcost;
5471 src = SET_SRC (sets[i].rtl);
5473 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5474 However, there is an important exception: If both are registers
5475 that are not the head of their equivalence class, replace SET_SRC
5476 with the head of the class. If we do not do this, we will have
5477 both registers live over a portion of the basic block. This way,
5478 their lifetimes will likely abut instead of overlapping. */
5480 && REGNO_QTY_VALID_P (REGNO (dest)))
5482 int dest_q = REG_QTY (REGNO (dest));
5483 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5485 if (dest_ent->mode == GET_MODE (dest)
5486 && dest_ent->first_reg != REGNO (dest)
5487 && REG_P (src) && REGNO (src) == REGNO (dest)
5488 /* Don't do this if the original insn had a hard reg as
5489 SET_SRC or SET_DEST. */
5490 && (!REG_P (sets[i].src)
5491 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5492 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5493 /* We can't call canon_reg here because it won't do anything if
5494 SRC is a hard register. */
5496 int src_q = REG_QTY (REGNO (src));
5497 struct qty_table_elem *src_ent = &qty_table[src_q];
5498 int first = src_ent->first_reg;
5500 = (first >= FIRST_PSEUDO_REGISTER
5501 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5503 /* We must use validate-change even for this, because this
5504 might be a special no-op instruction, suitable only to
5506 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5509 /* If we had a constant that is cheaper than what we are now
5510 setting SRC to, use that constant. We ignored it when we
5511 thought we could make this into a no-op. */
5512 if (src_const && COST (src_const) < COST (src)
5513 && validate_change (insn, &SET_SRC (sets[i].rtl),
5520 /* If we made a change, recompute SRC values. */
5521 if (src != sets[i].src)
5525 hash_arg_in_memory = 0;
5527 sets[i].src_hash = HASH (src, mode);
5528 sets[i].src_volatile = do_not_record;
5529 sets[i].src_in_memory = hash_arg_in_memory;
5530 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5533 /* If this is a single SET, we are setting a register, and we have an
5534 equivalent constant, we want to add a REG_NOTE. We don't want
5535 to write a REG_EQUAL note for a constant pseudo since verifying that
5536 that pseudo hasn't been eliminated is a pain. Such a note also
5537 won't help anything.
5539 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5540 which can be created for a reference to a compile time computable
5541 entry in a jump table. */
5543 if (n_sets == 1 && src_const && REG_P (dest)
5544 && !REG_P (src_const)
5545 && ! (GET_CODE (src_const) == CONST
5546 && GET_CODE (XEXP (src_const, 0)) == MINUS
5547 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5548 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5550 /* We only want a REG_EQUAL note if src_const != src. */
5551 if (! rtx_equal_p (src, src_const))
5553 /* Make sure that the rtx is not shared. */
5554 src_const = copy_rtx (src_const);
5556 /* Record the actual constant value in a REG_EQUAL note,
5557 making a new one if one does not already exist. */
5558 set_unique_reg_note (insn, REG_EQUAL, src_const);
5562 /* Now deal with the destination. */
5565 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5566 to the MEM or REG within it. */
5567 while (GET_CODE (dest) == SIGN_EXTRACT
5568 || GET_CODE (dest) == ZERO_EXTRACT
5569 || GET_CODE (dest) == SUBREG
5570 || GET_CODE (dest) == STRICT_LOW_PART)
5571 dest = XEXP (dest, 0);
5573 sets[i].inner_dest = dest;
5577 #ifdef PUSH_ROUNDING
5578 /* Stack pushes invalidate the stack pointer. */
5579 rtx addr = XEXP (dest, 0);
5580 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5581 && XEXP (addr, 0) == stack_pointer_rtx)
5582 invalidate (stack_pointer_rtx, Pmode);
5584 dest = fold_rtx (dest, insn);
5587 /* Compute the hash code of the destination now,
5588 before the effects of this instruction are recorded,
5589 since the register values used in the address computation
5590 are those before this instruction. */
5591 sets[i].dest_hash = HASH (dest, mode);
5593 /* Don't enter a bit-field in the hash table
5594 because the value in it after the store
5595 may not equal what was stored, due to truncation. */
5597 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5598 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5600 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5602 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5603 && GET_CODE (width) == CONST_INT
5604 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5605 && ! (INTVAL (src_const)
5606 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5607 /* Exception: if the value is constant,
5608 and it won't be truncated, record it. */
5612 /* This is chosen so that the destination will be invalidated
5613 but no new value will be recorded.
5614 We must invalidate because sometimes constant
5615 values can be recorded for bitfields. */
5616 sets[i].src_elt = 0;
5617 sets[i].src_volatile = 1;
5623 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5625 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5627 /* One less use of the label this insn used to jump to. */
5629 cse_jumps_altered = 1;
5630 /* No more processing for this set. */
5634 /* If this SET is now setting PC to a label, we know it used to
5635 be a conditional or computed branch. */
5636 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5637 && !LABEL_REF_NONLOCAL_P (src))
5639 /* Now emit a BARRIER after the unconditional jump. */
5640 if (NEXT_INSN (insn) == 0
5641 || !BARRIER_P (NEXT_INSN (insn)))
5642 emit_barrier_after (insn);
5644 /* We reemit the jump in as many cases as possible just in
5645 case the form of an unconditional jump is significantly
5646 different than a computed jump or conditional jump.
5648 If this insn has multiple sets, then reemitting the
5649 jump is nontrivial. So instead we just force rerecognition
5650 and hope for the best. */
5655 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5656 JUMP_LABEL (new) = XEXP (src, 0);
5657 LABEL_NUSES (XEXP (src, 0))++;
5659 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5660 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5663 XEXP (note, 1) = NULL_RTX;
5664 REG_NOTES (new) = note;
5670 /* Now emit a BARRIER after the unconditional jump. */
5671 if (NEXT_INSN (insn) == 0
5672 || !BARRIER_P (NEXT_INSN (insn)))
5673 emit_barrier_after (insn);
5676 INSN_CODE (insn) = -1;
5678 /* Do not bother deleting any unreachable code,
5679 let jump/flow do that. */
5681 cse_jumps_altered = 1;
5685 /* If destination is volatile, invalidate it and then do no further
5686 processing for this assignment. */
5688 else if (do_not_record)
5690 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5691 invalidate (dest, VOIDmode);
5692 else if (MEM_P (dest))
5693 invalidate (dest, VOIDmode);
5694 else if (GET_CODE (dest) == STRICT_LOW_PART
5695 || GET_CODE (dest) == ZERO_EXTRACT)
5696 invalidate (XEXP (dest, 0), GET_MODE (dest));
5700 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5701 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5704 /* If setting CC0, record what it was set to, or a constant, if it
5705 is equivalent to a constant. If it is being set to a floating-point
5706 value, make a COMPARE with the appropriate constant of 0. If we
5707 don't do this, later code can interpret this as a test against
5708 const0_rtx, which can cause problems if we try to put it into an
5709 insn as a floating-point operand. */
5710 if (dest == cc0_rtx)
5712 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5713 this_insn_cc0_mode = mode;
5714 if (FLOAT_MODE_P (mode))
5715 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5721 /* Now enter all non-volatile source expressions in the hash table
5722 if they are not already present.
5723 Record their equivalence classes in src_elt.
5724 This way we can insert the corresponding destinations into
5725 the same classes even if the actual sources are no longer in them
5726 (having been invalidated). */
5728 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5729 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5731 struct table_elt *elt;
5732 struct table_elt *classp = sets[0].src_elt;
5733 rtx dest = SET_DEST (sets[0].rtl);
5734 enum machine_mode eqvmode = GET_MODE (dest);
5736 if (GET_CODE (dest) == STRICT_LOW_PART)
5738 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5741 if (insert_regs (src_eqv, classp, 0))
5743 rehash_using_reg (src_eqv);
5744 src_eqv_hash = HASH (src_eqv, eqvmode);
5746 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5747 elt->in_memory = src_eqv_in_memory;
5750 /* Check to see if src_eqv_elt is the same as a set source which
5751 does not yet have an elt, and if so set the elt of the set source
5753 for (i = 0; i < n_sets; i++)
5754 if (sets[i].rtl && sets[i].src_elt == 0
5755 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5756 sets[i].src_elt = src_eqv_elt;
5759 for (i = 0; i < n_sets; i++)
5760 if (sets[i].rtl && ! sets[i].src_volatile
5761 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5763 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5765 /* REG_EQUAL in setting a STRICT_LOW_PART
5766 gives an equivalent for the entire destination register,
5767 not just for the subreg being stored in now.
5768 This is a more interesting equivalence, so we arrange later
5769 to treat the entire reg as the destination. */
5770 sets[i].src_elt = src_eqv_elt;
5771 sets[i].src_hash = src_eqv_hash;
5775 /* Insert source and constant equivalent into hash table, if not
5777 struct table_elt *classp = src_eqv_elt;
5778 rtx src = sets[i].src;
5779 rtx dest = SET_DEST (sets[i].rtl);
5780 enum machine_mode mode
5781 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5783 /* It's possible that we have a source value known to be
5784 constant but don't have a REG_EQUAL note on the insn.
5785 Lack of a note will mean src_eqv_elt will be NULL. This
5786 can happen where we've generated a SUBREG to access a
5787 CONST_INT that is already in a register in a wider mode.
5788 Ensure that the source expression is put in the proper
5791 classp = sets[i].src_const_elt;
5793 if (sets[i].src_elt == 0)
5795 /* Don't put a hard register source into the table if this is
5796 the last insn of a libcall. In this case, we only need
5797 to put src_eqv_elt in src_elt. */
5798 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5800 struct table_elt *elt;
5802 /* Note that these insert_regs calls cannot remove
5803 any of the src_elt's, because they would have failed to
5804 match if not still valid. */
5805 if (insert_regs (src, classp, 0))
5807 rehash_using_reg (src);
5808 sets[i].src_hash = HASH (src, mode);
5810 elt = insert (src, classp, sets[i].src_hash, mode);
5811 elt->in_memory = sets[i].src_in_memory;
5812 sets[i].src_elt = classp = elt;
5815 sets[i].src_elt = classp;
5817 if (sets[i].src_const && sets[i].src_const_elt == 0
5818 && src != sets[i].src_const
5819 && ! rtx_equal_p (sets[i].src_const, src))
5820 sets[i].src_elt = insert (sets[i].src_const, classp,
5821 sets[i].src_const_hash, mode);
5824 else if (sets[i].src_elt == 0)
5825 /* If we did not insert the source into the hash table (e.g., it was
5826 volatile), note the equivalence class for the REG_EQUAL value, if any,
5827 so that the destination goes into that class. */
5828 sets[i].src_elt = src_eqv_elt;
5830 invalidate_from_clobbers (x);
5832 /* Some registers are invalidated by subroutine calls. Memory is
5833 invalidated by non-constant calls. */
5837 if (! CONST_OR_PURE_CALL_P (insn))
5838 invalidate_memory ();
5839 invalidate_for_call ();
5842 /* Now invalidate everything set by this instruction.
5843 If a SUBREG or other funny destination is being set,
5844 sets[i].rtl is still nonzero, so here we invalidate the reg
5845 a part of which is being set. */
5847 for (i = 0; i < n_sets; i++)
5850 /* We can't use the inner dest, because the mode associated with
5851 a ZERO_EXTRACT is significant. */
5852 rtx dest = SET_DEST (sets[i].rtl);
5854 /* Needed for registers to remove the register from its
5855 previous quantity's chain.
5856 Needed for memory if this is a nonvarying address, unless
5857 we have just done an invalidate_memory that covers even those. */
5858 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5859 invalidate (dest, VOIDmode);
5860 else if (MEM_P (dest))
5861 invalidate (dest, VOIDmode);
5862 else if (GET_CODE (dest) == STRICT_LOW_PART
5863 || GET_CODE (dest) == ZERO_EXTRACT)
5864 invalidate (XEXP (dest, 0), GET_MODE (dest));
5867 /* A volatile ASM invalidates everything. */
5868 if (NONJUMP_INSN_P (insn)
5869 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5870 && MEM_VOLATILE_P (PATTERN (insn)))
5871 flush_hash_table ();
5873 /* Make sure registers mentioned in destinations
5874 are safe for use in an expression to be inserted.
5875 This removes from the hash table
5876 any invalid entry that refers to one of these registers.
5878 We don't care about the return value from mention_regs because
5879 we are going to hash the SET_DEST values unconditionally. */
5881 for (i = 0; i < n_sets; i++)
5885 rtx x = SET_DEST (sets[i].rtl);
5891 /* We used to rely on all references to a register becoming
5892 inaccessible when a register changes to a new quantity,
5893 since that changes the hash code. However, that is not
5894 safe, since after HASH_SIZE new quantities we get a
5895 hash 'collision' of a register with its own invalid
5896 entries. And since SUBREGs have been changed not to
5897 change their hash code with the hash code of the register,
5898 it wouldn't work any longer at all. So we have to check
5899 for any invalid references lying around now.
5900 This code is similar to the REG case in mention_regs,
5901 but it knows that reg_tick has been incremented, and
5902 it leaves reg_in_table as -1 . */
5903 unsigned int regno = REGNO (x);
5904 unsigned int endregno
5905 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5906 : hard_regno_nregs[regno][GET_MODE (x)]);
5909 for (i = regno; i < endregno; i++)
5911 if (REG_IN_TABLE (i) >= 0)
5913 remove_invalid_refs (i);
5914 REG_IN_TABLE (i) = -1;
5921 /* We may have just removed some of the src_elt's from the hash table.
5922 So replace each one with the current head of the same class. */
5924 for (i = 0; i < n_sets; i++)
5927 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5928 /* If elt was removed, find current head of same class,
5929 or 0 if nothing remains of that class. */
5931 struct table_elt *elt = sets[i].src_elt;
5933 while (elt && elt->prev_same_value)
5934 elt = elt->prev_same_value;
5936 while (elt && elt->first_same_value == 0)
5937 elt = elt->next_same_value;
5938 sets[i].src_elt = elt ? elt->first_same_value : 0;
5942 /* Now insert the destinations into their equivalence classes. */
5944 for (i = 0; i < n_sets; i++)
5947 rtx dest = SET_DEST (sets[i].rtl);
5948 struct table_elt *elt;
5950 /* Don't record value if we are not supposed to risk allocating
5951 floating-point values in registers that might be wider than
5953 if ((flag_float_store
5955 && FLOAT_MODE_P (GET_MODE (dest)))
5956 /* Don't record BLKmode values, because we don't know the
5957 size of it, and can't be sure that other BLKmode values
5958 have the same or smaller size. */
5959 || GET_MODE (dest) == BLKmode
5960 /* Don't record values of destinations set inside a libcall block
5961 since we might delete the libcall. Things should have been set
5962 up so we won't want to reuse such a value, but we play it safe
5965 /* If we didn't put a REG_EQUAL value or a source into the hash
5966 table, there is no point is recording DEST. */
5967 || sets[i].src_elt == 0
5968 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5969 or SIGN_EXTEND, don't record DEST since it can cause
5970 some tracking to be wrong.
5972 ??? Think about this more later. */
5973 || (GET_CODE (dest) == SUBREG
5974 && (GET_MODE_SIZE (GET_MODE (dest))
5975 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5976 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5977 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5980 /* STRICT_LOW_PART isn't part of the value BEING set,
5981 and neither is the SUBREG inside it.
5982 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5983 if (GET_CODE (dest) == STRICT_LOW_PART)
5984 dest = SUBREG_REG (XEXP (dest, 0));
5986 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5987 /* Registers must also be inserted into chains for quantities. */
5988 if (insert_regs (dest, sets[i].src_elt, 1))
5990 /* If `insert_regs' changes something, the hash code must be
5992 rehash_using_reg (dest);
5993 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5996 elt = insert (dest, sets[i].src_elt,
5997 sets[i].dest_hash, GET_MODE (dest));
5999 elt->in_memory = (MEM_P (sets[i].inner_dest)
6000 && !MEM_READONLY_P (sets[i].inner_dest));
6002 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6003 narrower than M2, and both M1 and M2 are the same number of words,
6004 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6005 make that equivalence as well.
6007 However, BAR may have equivalences for which gen_lowpart
6008 will produce a simpler value than gen_lowpart applied to
6009 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6010 BAR's equivalences. If we don't get a simplified form, make
6011 the SUBREG. It will not be used in an equivalence, but will
6012 cause two similar assignments to be detected.
6014 Note the loop below will find SUBREG_REG (DEST) since we have
6015 already entered SRC and DEST of the SET in the table. */
6017 if (GET_CODE (dest) == SUBREG
6018 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6020 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6021 && (GET_MODE_SIZE (GET_MODE (dest))
6022 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6023 && sets[i].src_elt != 0)
6025 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6026 struct table_elt *elt, *classp = 0;
6028 for (elt = sets[i].src_elt->first_same_value; elt;
6029 elt = elt->next_same_value)
6033 struct table_elt *src_elt;
6036 /* Ignore invalid entries. */
6037 if (!REG_P (elt->exp)
6038 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
6041 /* We may have already been playing subreg games. If the
6042 mode is already correct for the destination, use it. */
6043 if (GET_MODE (elt->exp) == new_mode)
6047 /* Calculate big endian correction for the SUBREG_BYTE.
6048 We have already checked that M1 (GET_MODE (dest))
6049 is not narrower than M2 (new_mode). */
6050 if (BYTES_BIG_ENDIAN)
6051 byte = (GET_MODE_SIZE (GET_MODE (dest))
6052 - GET_MODE_SIZE (new_mode));
6054 new_src = simplify_gen_subreg (new_mode, elt->exp,
6055 GET_MODE (dest), byte);
6058 /* The call to simplify_gen_subreg fails if the value
6059 is VOIDmode, yet we can't do any simplification, e.g.
6060 for EXPR_LISTs denoting function call results.
6061 It is invalid to construct a SUBREG with a VOIDmode
6062 SUBREG_REG, hence a zero new_src means we can't do
6063 this substitution. */
6067 src_hash = HASH (new_src, new_mode);
6068 src_elt = lookup (new_src, src_hash, new_mode);
6070 /* Put the new source in the hash table is if isn't
6074 if (insert_regs (new_src, classp, 0))
6076 rehash_using_reg (new_src);
6077 src_hash = HASH (new_src, new_mode);
6079 src_elt = insert (new_src, classp, src_hash, new_mode);
6080 src_elt->in_memory = elt->in_memory;
6082 else if (classp && classp != src_elt->first_same_value)
6083 /* Show that two things that we've seen before are
6084 actually the same. */
6085 merge_equiv_classes (src_elt, classp);
6087 classp = src_elt->first_same_value;
6088 /* Ignore invalid entries. */
6090 && !REG_P (classp->exp)
6091 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
6092 classp = classp->next_same_value;
6097 /* Special handling for (set REG0 REG1) where REG0 is the
6098 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6099 be used in the sequel, so (if easily done) change this insn to
6100 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6101 that computed their value. Then REG1 will become a dead store
6102 and won't cloud the situation for later optimizations.
6104 Do not make this change if REG1 is a hard register, because it will
6105 then be used in the sequel and we may be changing a two-operand insn
6106 into a three-operand insn.
6108 Also do not do this if we are operating on a copy of INSN.
6110 Also don't do this if INSN ends a libcall; this would cause an unrelated
6111 register to be set in the middle of a libcall, and we then get bad code
6112 if the libcall is deleted. */
6114 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
6115 && NEXT_INSN (PREV_INSN (insn)) == insn
6116 && REG_P (SET_SRC (sets[0].rtl))
6117 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6118 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6120 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6121 struct qty_table_elem *src_ent = &qty_table[src_q];
6123 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6124 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6127 /* Scan for the previous nonnote insn, but stop at a basic
6131 prev = PREV_INSN (prev);
6133 while (prev && NOTE_P (prev)
6134 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6136 /* Do not swap the registers around if the previous instruction
6137 attaches a REG_EQUIV note to REG1.
6139 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6140 from the pseudo that originally shadowed an incoming argument
6141 to another register. Some uses of REG_EQUIV might rely on it
6142 being attached to REG1 rather than REG2.
6144 This section previously turned the REG_EQUIV into a REG_EQUAL
6145 note. We cannot do that because REG_EQUIV may provide an
6146 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6148 if (prev != 0 && NONJUMP_INSN_P (prev)
6149 && GET_CODE (PATTERN (prev)) == SET
6150 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6151 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6153 rtx dest = SET_DEST (sets[0].rtl);
6154 rtx src = SET_SRC (sets[0].rtl);
6157 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6158 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6159 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6160 apply_change_group ();
6162 /* If INSN has a REG_EQUAL note, and this note mentions
6163 REG0, then we must delete it, because the value in
6164 REG0 has changed. If the note's value is REG1, we must
6165 also delete it because that is now this insn's dest. */
6166 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6168 && (reg_mentioned_p (dest, XEXP (note, 0))
6169 || rtx_equal_p (src, XEXP (note, 0))))
6170 remove_note (insn, note);
6175 /* If this is a conditional jump insn, record any known equivalences due to
6176 the condition being tested. */
6179 && n_sets == 1 && GET_CODE (x) == SET
6180 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6181 record_jump_equiv (insn, 0);
6184 /* If the previous insn set CC0 and this insn no longer references CC0,
6185 delete the previous insn. Here we use the fact that nothing expects CC0
6186 to be valid over an insn, which is true until the final pass. */
6187 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6188 && (tem = single_set (prev_insn)) != 0
6189 && SET_DEST (tem) == cc0_rtx
6190 && ! reg_mentioned_p (cc0_rtx, x))
6191 delete_insn (prev_insn);
6193 prev_insn_cc0 = this_insn_cc0;
6194 prev_insn_cc0_mode = this_insn_cc0_mode;
6199 /* Remove from the hash table all expressions that reference memory. */
6202 invalidate_memory (void)
6205 struct table_elt *p, *next;
6207 for (i = 0; i < HASH_SIZE; i++)
6208 for (p = table[i]; p; p = next)
6210 next = p->next_same_hash;
6212 remove_from_table (p, i);
6216 /* If ADDR is an address that implicitly affects the stack pointer, return
6217 1 and update the register tables to show the effect. Else, return 0. */
6220 addr_affects_sp_p (rtx addr)
6222 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
6223 && REG_P (XEXP (addr, 0))
6224 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6226 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6228 REG_TICK (STACK_POINTER_REGNUM)++;
6229 /* Is it possible to use a subreg of SP? */
6230 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6233 /* This should be *very* rare. */
6234 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6235 invalidate (stack_pointer_rtx, VOIDmode);
6243 /* Perform invalidation on the basis of everything about an insn
6244 except for invalidating the actual places that are SET in it.
6245 This includes the places CLOBBERed, and anything that might
6246 alias with something that is SET or CLOBBERed.
6248 X is the pattern of the insn. */
6251 invalidate_from_clobbers (rtx x)
6253 if (GET_CODE (x) == CLOBBER)
6255 rtx ref = XEXP (x, 0);
6258 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6260 invalidate (ref, VOIDmode);
6261 else if (GET_CODE (ref) == STRICT_LOW_PART
6262 || GET_CODE (ref) == ZERO_EXTRACT)
6263 invalidate (XEXP (ref, 0), GET_MODE (ref));
6266 else if (GET_CODE (x) == PARALLEL)
6269 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6271 rtx y = XVECEXP (x, 0, i);
6272 if (GET_CODE (y) == CLOBBER)
6274 rtx ref = XEXP (y, 0);
6275 if (REG_P (ref) || GET_CODE (ref) == SUBREG
6277 invalidate (ref, VOIDmode);
6278 else if (GET_CODE (ref) == STRICT_LOW_PART
6279 || GET_CODE (ref) == ZERO_EXTRACT)
6280 invalidate (XEXP (ref, 0), GET_MODE (ref));
6286 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6287 and replace any registers in them with either an equivalent constant
6288 or the canonical form of the register. If we are inside an address,
6289 only do this if the address remains valid.
6291 OBJECT is 0 except when within a MEM in which case it is the MEM.
6293 Return the replacement for X. */
6296 cse_process_notes (rtx x, rtx object)
6298 enum rtx_code code = GET_CODE (x);
6299 const char *fmt = GET_RTX_FORMAT (code);
6316 validate_change (x, &XEXP (x, 0),
6317 cse_process_notes (XEXP (x, 0), x), 0);
6322 if (REG_NOTE_KIND (x) == REG_EQUAL)
6323 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6325 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6332 rtx new = cse_process_notes (XEXP (x, 0), object);
6333 /* We don't substitute VOIDmode constants into these rtx,
6334 since they would impede folding. */
6335 if (GET_MODE (new) != VOIDmode)
6336 validate_change (object, &XEXP (x, 0), new, 0);
6341 i = REG_QTY (REGNO (x));
6343 /* Return a constant or a constant register. */
6344 if (REGNO_QTY_VALID_P (REGNO (x)))
6346 struct qty_table_elem *ent = &qty_table[i];
6348 if (ent->const_rtx != NULL_RTX
6349 && (CONSTANT_P (ent->const_rtx)
6350 || REG_P (ent->const_rtx)))
6352 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
6358 /* Otherwise, canonicalize this register. */
6359 return canon_reg (x, NULL_RTX);
6365 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6367 validate_change (object, &XEXP (x, i),
6368 cse_process_notes (XEXP (x, i), object), 0);
6373 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6374 since they are done elsewhere. This function is called via note_stores. */
6377 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6379 enum rtx_code code = GET_CODE (dest);
6382 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6383 /* There are times when an address can appear varying and be a PLUS
6384 during this scan when it would be a fixed address were we to know
6385 the proper equivalences. So invalidate all memory if there is
6386 a BLKmode or nonscalar memory reference or a reference to a
6387 variable address. */
6388 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6389 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6391 invalidate_memory ();
6395 if (GET_CODE (set) == CLOBBER
6400 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6401 invalidate (XEXP (dest, 0), GET_MODE (dest));
6402 else if (code == REG || code == SUBREG || code == MEM)
6403 invalidate (dest, VOIDmode);
6406 /* Invalidate all insns from START up to the end of the function or the
6407 next label. This called when we wish to CSE around a block that is
6408 conditionally executed. */
6411 invalidate_skipped_block (rtx start)
6415 for (insn = start; insn && !LABEL_P (insn);
6416 insn = NEXT_INSN (insn))
6418 if (! INSN_P (insn))
6423 if (! CONST_OR_PURE_CALL_P (insn))
6424 invalidate_memory ();
6425 invalidate_for_call ();
6428 invalidate_from_clobbers (PATTERN (insn));
6429 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6433 /* Find the end of INSN's basic block and return its range,
6434 the total number of SETs in all the insns of the block, the last insn of the
6435 block, and the branch path.
6437 The branch path indicates which branches should be followed. If a nonzero
6438 path size is specified, the block should be rescanned and a different set
6439 of branches will be taken. The branch path is only used if
6440 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6442 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6443 used to describe the block. It is filled in with the information about
6444 the current block. The incoming structure's branch path, if any, is used
6445 to construct the output branch path. */
6448 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6449 int follow_jumps, int skip_blocks)
6453 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6454 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6455 int path_size = data->path_size;
6459 /* Update the previous branch path, if any. If the last branch was
6460 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6461 If it was previously PATH_NOT_TAKEN,
6462 shorten the path by one and look at the previous branch. We know that
6463 at least one branch must have been taken if PATH_SIZE is nonzero. */
6464 while (path_size > 0)
6466 if (data->path[path_size - 1].status != PATH_NOT_TAKEN)
6468 data->path[path_size - 1].status = PATH_NOT_TAKEN;
6475 /* If the first instruction is marked with QImode, that means we've
6476 already processed this block. Our caller will look at DATA->LAST
6477 to figure out where to go next. We want to return the next block
6478 in the instruction stream, not some branched-to block somewhere
6479 else. We accomplish this by pretending our called forbid us to
6480 follow jumps, or skip blocks. */
6481 if (GET_MODE (insn) == QImode)
6482 follow_jumps = skip_blocks = 0;
6484 /* Scan to end of this basic block. */
6485 while (p && !LABEL_P (p))
6487 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6488 the regs restored by the longjmp come from
6489 a later time than the setjmp. */
6490 if (PREV_INSN (p) && CALL_P (PREV_INSN (p))
6491 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6494 /* A PARALLEL can have lots of SETs in it,
6495 especially if it is really an ASM_OPERANDS. */
6496 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6497 nsets += XVECLEN (PATTERN (p), 0);
6498 else if (!NOTE_P (p))
6501 /* Ignore insns made by CSE; they cannot affect the boundaries of
6504 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6505 high_cuid = INSN_CUID (p);
6506 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6507 low_cuid = INSN_CUID (p);
6509 /* See if this insn is in our branch path. If it is and we are to
6511 if (path_entry < path_size && data->path[path_entry].branch == p)
6513 if (data->path[path_entry].status != PATH_NOT_TAKEN)
6516 /* Point to next entry in path, if any. */
6520 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6521 was specified, we haven't reached our maximum path length, there are
6522 insns following the target of the jump, this is the only use of the
6523 jump label, and the target label is preceded by a BARRIER.
6525 Alternatively, we can follow the jump if it branches around a
6526 block of code and there are no other branches into the block.
6527 In this case invalidate_skipped_block will be called to invalidate any
6528 registers set in the block when following the jump. */
6530 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6532 && GET_CODE (PATTERN (p)) == SET
6533 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6534 && JUMP_LABEL (p) != 0
6535 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6536 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6538 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6540 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6541 || (PREV_INSN (q) && CALL_P (PREV_INSN (q))
6542 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6543 && (!LABEL_P (q) || LABEL_NUSES (q) != 0))
6546 /* If we ran into a BARRIER, this code is an extension of the
6547 basic block when the branch is taken. */
6548 if (follow_jumps && q != 0 && BARRIER_P (q))
6550 /* Don't allow ourself to keep walking around an
6551 always-executed loop. */
6552 if (next_real_insn (q) == next)
6558 /* Similarly, don't put a branch in our path more than once. */
6559 for (i = 0; i < path_entry; i++)
6560 if (data->path[i].branch == p)
6563 if (i != path_entry)
6566 data->path[path_entry].branch = p;
6567 data->path[path_entry++].status = PATH_TAKEN;
6569 /* This branch now ends our path. It was possible that we
6570 didn't see this branch the last time around (when the
6571 insn in front of the target was a JUMP_INSN that was
6572 turned into a no-op). */
6573 path_size = path_entry;
6576 /* Mark block so we won't scan it again later. */
6577 PUT_MODE (NEXT_INSN (p), QImode);
6579 /* Detect a branch around a block of code. */
6580 else if (skip_blocks && q != 0 && !LABEL_P (q))
6584 if (next_real_insn (q) == next)
6590 for (i = 0; i < path_entry; i++)
6591 if (data->path[i].branch == p)
6594 if (i != path_entry)
6597 /* This is no_labels_between_p (p, q) with an added check for
6598 reaching the end of a function (in case Q precedes P). */
6599 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6605 data->path[path_entry].branch = p;
6606 data->path[path_entry++].status = PATH_AROUND;
6608 path_size = path_entry;
6611 /* Mark block so we won't scan it again later. */
6612 PUT_MODE (NEXT_INSN (p), QImode);
6619 data->low_cuid = low_cuid;
6620 data->high_cuid = high_cuid;
6621 data->nsets = nsets;
6624 /* If all jumps in the path are not taken, set our path length to zero
6625 so a rescan won't be done. */
6626 for (i = path_size - 1; i >= 0; i--)
6627 if (data->path[i].status != PATH_NOT_TAKEN)
6631 data->path_size = 0;
6633 data->path_size = path_size;
6635 /* End the current branch path. */
6636 data->path[path_size].branch = 0;
6639 /* Perform cse on the instructions of a function.
6640 F is the first instruction.
6641 NREGS is one plus the highest pseudo-reg number used in the instruction.
6643 Returns 1 if jump_optimize should be redone due to simplifications
6644 in conditional jump instructions. */
6647 cse_main (rtx f, int nregs, FILE *file)
6649 struct cse_basic_block_data val;
6653 val.path = xmalloc (sizeof (struct branch_path)
6654 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6656 cse_jumps_altered = 0;
6657 recorded_label_ref = 0;
6658 constant_pool_entries_cost = 0;
6659 constant_pool_entries_regcost = 0;
6661 rtl_hooks = cse_rtl_hooks;
6664 init_alias_analysis ();
6668 max_insn_uid = get_max_uid ();
6670 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6672 /* Reset the counter indicating how many elements have been made
6674 n_elements_made = 0;
6676 /* Find the largest uid. */
6678 max_uid = get_max_uid ();
6679 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6681 /* Compute the mapping from uids to cuids.
6682 CUIDs are numbers assigned to insns, like uids,
6683 except that cuids increase monotonically through the code.
6684 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6685 between two insns is not affected by -g. */
6687 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6690 || NOTE_LINE_NUMBER (insn) < 0)
6691 INSN_CUID (insn) = ++i;
6693 /* Give a line number note the same cuid as preceding insn. */
6694 INSN_CUID (insn) = i;
6697 /* Loop over basic blocks.
6698 Compute the maximum number of qty's needed for each basic block
6699 (which is 2 for each SET). */
6704 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps,
6705 flag_cse_skip_blocks);
6707 /* If this basic block was already processed or has no sets, skip it. */
6708 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6710 PUT_MODE (insn, VOIDmode);
6711 insn = (val.last ? NEXT_INSN (val.last) : 0);
6716 cse_basic_block_start = val.low_cuid;
6717 cse_basic_block_end = val.high_cuid;
6718 max_qty = val.nsets * 2;
6721 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6722 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6725 /* Make MAX_QTY bigger to give us room to optimize
6726 past the end of this basic block, if that should prove useful. */
6730 /* If this basic block is being extended by following certain jumps,
6731 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6732 Otherwise, we start after this basic block. */
6733 if (val.path_size > 0)
6734 cse_basic_block (insn, val.last, val.path);
6737 int old_cse_jumps_altered = cse_jumps_altered;
6740 /* When cse changes a conditional jump to an unconditional
6741 jump, we want to reprocess the block, since it will give
6742 us a new branch path to investigate. */
6743 cse_jumps_altered = 0;
6744 temp = cse_basic_block (insn, val.last, val.path);
6745 if (cse_jumps_altered == 0
6746 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6749 cse_jumps_altered |= old_cse_jumps_altered;
6760 if (max_elements_made < n_elements_made)
6761 max_elements_made = n_elements_made;
6764 end_alias_analysis ();
6766 free (reg_eqv_table);
6768 rtl_hooks = general_rtl_hooks;
6770 return cse_jumps_altered || recorded_label_ref;
6773 /* Process a single basic block. FROM and TO and the limits of the basic
6774 block. NEXT_BRANCH points to the branch path when following jumps or
6775 a null path when not following jumps. */
6778 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch)
6782 rtx libcall_insn = NULL_RTX;
6784 int no_conflict = 0;
6786 /* Allocate the space needed by qty_table. */
6787 qty_table = xmalloc (max_qty * sizeof (struct qty_table_elem));
6791 /* TO might be a label. If so, protect it from being deleted. */
6792 if (to != 0 && LABEL_P (to))
6795 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6797 enum rtx_code code = GET_CODE (insn);
6799 /* If we have processed 1,000 insns, flush the hash table to
6800 avoid extreme quadratic behavior. We must not include NOTEs
6801 in the count since there may be more of them when generating
6802 debugging information. If we clear the table at different
6803 times, code generated with -g -O might be different than code
6804 generated with -O but not -g.
6806 ??? This is a real kludge and needs to be done some other way.
6808 if (code != NOTE && num_insns++ > 1000)
6810 flush_hash_table ();
6814 /* See if this is a branch that is part of the path. If so, and it is
6815 to be taken, do so. */
6816 if (next_branch->branch == insn)
6818 enum taken status = next_branch++->status;
6819 if (status != PATH_NOT_TAKEN)
6821 if (status == PATH_TAKEN)
6822 record_jump_equiv (insn, 1);
6824 invalidate_skipped_block (NEXT_INSN (insn));
6826 /* Set the last insn as the jump insn; it doesn't affect cc0.
6827 Then follow this branch. */
6832 insn = JUMP_LABEL (insn);
6837 if (GET_MODE (insn) == QImode)
6838 PUT_MODE (insn, VOIDmode);
6840 if (GET_RTX_CLASS (code) == RTX_INSN)
6844 /* Process notes first so we have all notes in canonical forms when
6845 looking for duplicate operations. */
6847 if (REG_NOTES (insn))
6848 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
6850 /* Track when we are inside in LIBCALL block. Inside such a block,
6851 we do not want to record destinations. The last insn of a
6852 LIBCALL block is not considered to be part of the block, since
6853 its destination is the result of the block and hence should be
6856 if (REG_NOTES (insn) != 0)
6858 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6859 libcall_insn = XEXP (p, 0);
6860 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6862 /* Keep libcall_insn for the last SET insn of a no-conflict
6863 block to prevent changing the destination. */
6869 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
6873 cse_insn (insn, libcall_insn);
6875 if (no_conflict == -1)
6881 /* If we haven't already found an insn where we added a LABEL_REF,
6883 if (NONJUMP_INSN_P (insn) && ! recorded_label_ref
6884 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6886 recorded_label_ref = 1;
6889 /* If INSN is now an unconditional jump, skip to the end of our
6890 basic block by pretending that we just did the last insn in the
6891 basic block. If we are jumping to the end of our block, show
6892 that we can have one usage of TO. */
6894 if (any_uncondjump_p (insn))
6902 if (JUMP_LABEL (insn) == to)
6905 /* Maybe TO was deleted because the jump is unconditional.
6906 If so, there is nothing left in this basic block. */
6907 /* ??? Perhaps it would be smarter to set TO
6908 to whatever follows this insn,
6909 and pretend the basic block had always ended here. */
6910 if (INSN_DELETED_P (to))
6913 insn = PREV_INSN (to);
6916 /* See if it is ok to keep on going past the label
6917 which used to end our basic block. Remember that we incremented
6918 the count of that label, so we decrement it here. If we made
6919 a jump unconditional, TO_USAGE will be one; in that case, we don't
6920 want to count the use in that jump. */
6922 if (to != 0 && NEXT_INSN (insn) == to
6923 && LABEL_P (to) && --LABEL_NUSES (to) == to_usage)
6925 struct cse_basic_block_data val;
6928 insn = NEXT_INSN (to);
6930 /* If TO was the last insn in the function, we are done. */
6937 /* If TO was preceded by a BARRIER we are done with this block
6938 because it has no continuation. */
6939 prev = prev_nonnote_insn (to);
6940 if (prev && BARRIER_P (prev))
6946 /* Find the end of the following block. Note that we won't be
6947 following branches in this case. */
6950 val.path = xmalloc (sizeof (struct branch_path)
6951 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6952 cse_end_of_basic_block (insn, &val, 0, 0);
6955 /* If the tables we allocated have enough space left
6956 to handle all the SETs in the next basic block,
6957 continue through it. Otherwise, return,
6958 and that block will be scanned individually. */
6959 if (val.nsets * 2 + next_qty > max_qty)
6962 cse_basic_block_start = val.low_cuid;
6963 cse_basic_block_end = val.high_cuid;
6966 /* Prevent TO from being deleted if it is a label. */
6967 if (to != 0 && LABEL_P (to))
6970 /* Back up so we process the first insn in the extension. */
6971 insn = PREV_INSN (insn);
6975 gcc_assert (next_qty <= max_qty);
6979 return to ? NEXT_INSN (to) : 0;
6982 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
6983 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
6986 check_for_label_ref (rtx *rtl, void *data)
6988 rtx insn = (rtx) data;
6990 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
6991 we must rerun jump since it needs to place the note. If this is a
6992 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
6993 since no REG_LABEL will be added. */
6994 return (GET_CODE (*rtl) == LABEL_REF
6995 && ! LABEL_REF_NONLOCAL_P (*rtl)
6996 && LABEL_P (XEXP (*rtl, 0))
6997 && INSN_UID (XEXP (*rtl, 0)) != 0
6998 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7001 /* Count the number of times registers are used (not set) in X.
7002 COUNTS is an array in which we accumulate the count, INCR is how much
7003 we count each register usage. */
7006 count_reg_usage (rtx x, int *counts, int incr)
7016 switch (code = GET_CODE (x))
7019 counts[REGNO (x)] += incr;
7033 /* If we are clobbering a MEM, mark any registers inside the address
7035 if (MEM_P (XEXP (x, 0)))
7036 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7040 /* Unless we are setting a REG, count everything in SET_DEST. */
7041 if (!REG_P (SET_DEST (x)))
7042 count_reg_usage (SET_DEST (x), counts, incr);
7043 count_reg_usage (SET_SRC (x), counts, incr);
7047 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7052 count_reg_usage (PATTERN (x), counts, incr);
7054 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7057 note = find_reg_equal_equiv_note (x);
7060 rtx eqv = XEXP (note, 0);
7062 if (GET_CODE (eqv) == EXPR_LIST)
7063 /* This REG_EQUAL note describes the result of a function call.
7064 Process all the arguments. */
7067 count_reg_usage (XEXP (eqv, 0), counts, incr);
7068 eqv = XEXP (eqv, 1);
7070 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7072 count_reg_usage (eqv, counts, incr);
7077 if (REG_NOTE_KIND (x) == REG_EQUAL
7078 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7079 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7080 involving registers in the address. */
7081 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7082 count_reg_usage (XEXP (x, 0), counts, incr);
7084 count_reg_usage (XEXP (x, 1), counts, incr);
7088 /* Iterate over just the inputs, not the constraints as well. */
7089 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7090 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7100 fmt = GET_RTX_FORMAT (code);
7101 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7104 count_reg_usage (XEXP (x, i), counts, incr);
7105 else if (fmt[i] == 'E')
7106 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7107 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7111 /* Return true if set is live. */
7113 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7120 if (set_noop_p (set))
7124 else if (GET_CODE (SET_DEST (set)) == CC0
7125 && !side_effects_p (SET_SRC (set))
7126 && ((tem = next_nonnote_insn (insn)) == 0
7128 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7131 else if (!REG_P (SET_DEST (set))
7132 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7133 || counts[REGNO (SET_DEST (set))] != 0
7134 || side_effects_p (SET_SRC (set)))
7139 /* Return true if insn is live. */
7142 insn_live_p (rtx insn, int *counts)
7145 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7147 else if (GET_CODE (PATTERN (insn)) == SET)
7148 return set_live_p (PATTERN (insn), insn, counts);
7149 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7151 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7153 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7155 if (GET_CODE (elt) == SET)
7157 if (set_live_p (elt, insn, counts))
7160 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7169 /* Return true if libcall is dead as a whole. */
7172 dead_libcall_p (rtx insn, int *counts)
7176 /* See if there's a REG_EQUAL note on this insn and try to
7177 replace the source with the REG_EQUAL expression.
7179 We assume that insns with REG_RETVALs can only be reg->reg
7180 copies at this point. */
7181 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7185 set = single_set (insn);
7189 new = simplify_rtx (XEXP (note, 0));
7191 new = XEXP (note, 0);
7193 /* While changing insn, we must update the counts accordingly. */
7194 count_reg_usage (insn, counts, -1);
7196 if (validate_change (insn, &SET_SRC (set), new, 0))
7198 count_reg_usage (insn, counts, 1);
7199 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7200 remove_note (insn, note);
7204 if (CONSTANT_P (new))
7206 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7207 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7209 count_reg_usage (insn, counts, 1);
7210 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7211 remove_note (insn, note);
7216 count_reg_usage (insn, counts, 1);
7220 /* Scan all the insns and delete any that are dead; i.e., they store a register
7221 that is never used or they copy a register to itself.
7223 This is used to remove insns made obviously dead by cse, loop or other
7224 optimizations. It improves the heuristics in loop since it won't try to
7225 move dead invariants out of loops or make givs for dead quantities. The
7226 remaining passes of the compilation are also sped up. */
7229 delete_trivially_dead_insns (rtx insns, int nreg)
7233 int in_libcall = 0, dead_libcall = 0;
7234 int ndead = 0, nlastdead, niterations = 0;
7236 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7237 /* First count the number of times each register is used. */
7238 counts = xcalloc (nreg, sizeof (int));
7239 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7240 count_reg_usage (insn, counts, 1);
7246 /* Go from the last insn to the first and delete insns that only set unused
7247 registers or copy a register to itself. As we delete an insn, remove
7248 usage counts for registers it uses.
7250 The first jump optimization pass may leave a real insn as the last
7251 insn in the function. We must not skip that insn or we may end
7252 up deleting code that is not really dead. */
7253 insn = get_last_insn ();
7254 if (! INSN_P (insn))
7255 insn = prev_real_insn (insn);
7257 for (; insn; insn = prev)
7261 prev = prev_real_insn (insn);
7263 /* Don't delete any insns that are part of a libcall block unless
7264 we can delete the whole libcall block.
7266 Flow or loop might get confused if we did that. Remember
7267 that we are scanning backwards. */
7268 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7272 dead_libcall = dead_libcall_p (insn, counts);
7274 else if (in_libcall)
7275 live_insn = ! dead_libcall;
7277 live_insn = insn_live_p (insn, counts);
7279 /* If this is a dead insn, delete it and show registers in it aren't
7284 count_reg_usage (insn, counts, -1);
7285 delete_insn_and_edges (insn);
7289 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7296 while (ndead != nlastdead);
7298 if (dump_file && ndead)
7299 fprintf (dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7300 ndead, niterations);
7303 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7307 /* This function is called via for_each_rtx. The argument, NEWREG, is
7308 a condition code register with the desired mode. If we are looking
7309 at the same register in a different mode, replace it with
7313 cse_change_cc_mode (rtx *loc, void *data)
7315 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
7319 && REGNO (*loc) == REGNO (args->newreg)
7320 && GET_MODE (*loc) != GET_MODE (args->newreg))
7322 validate_change (args->insn, loc, args->newreg, 1);
7329 /* Change the mode of any reference to the register REGNO (NEWREG) to
7330 GET_MODE (NEWREG) in INSN. */
7333 cse_change_cc_mode_insn (rtx insn, rtx newreg)
7335 struct change_cc_mode_args args;
7342 args.newreg = newreg;
7344 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
7345 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args);
7347 /* If the following assertion was triggered, there is most probably
7348 something wrong with the cc_modes_compatible back end function.
7349 CC modes only can be considered compatible if the insn - with the mode
7350 replaced by any of the compatible modes - can still be recognized. */
7351 success = apply_change_group ();
7352 gcc_assert (success);
7355 /* Change the mode of any reference to the register REGNO (NEWREG) to
7356 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7357 any instruction which modifies NEWREG. */
7360 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7364 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7366 if (! INSN_P (insn))
7369 if (reg_set_p (newreg, insn))
7372 cse_change_cc_mode_insn (insn, newreg);
7376 /* BB is a basic block which finishes with CC_REG as a condition code
7377 register which is set to CC_SRC. Look through the successors of BB
7378 to find blocks which have a single predecessor (i.e., this one),
7379 and look through those blocks for an assignment to CC_REG which is
7380 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7381 permitted to change the mode of CC_SRC to a compatible mode. This
7382 returns VOIDmode if no equivalent assignments were found.
7383 Otherwise it returns the mode which CC_SRC should wind up with.
7385 The main complexity in this function is handling the mode issues.
7386 We may have more than one duplicate which we can eliminate, and we
7387 try to find a mode which will work for multiple duplicates. */
7389 static enum machine_mode
7390 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7393 enum machine_mode mode;
7394 unsigned int insn_count;
7397 enum machine_mode modes[2];
7403 /* We expect to have two successors. Look at both before picking
7404 the final mode for the comparison. If we have more successors
7405 (i.e., some sort of table jump, although that seems unlikely),
7406 then we require all beyond the first two to use the same
7409 found_equiv = false;
7410 mode = GET_MODE (cc_src);
7412 FOR_EACH_EDGE (e, ei, bb->succs)
7417 if (e->flags & EDGE_COMPLEX)
7420 if (EDGE_COUNT (e->dest->preds) != 1
7421 || e->dest == EXIT_BLOCK_PTR)
7424 end = NEXT_INSN (BB_END (e->dest));
7425 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7429 if (! INSN_P (insn))
7432 /* If CC_SRC is modified, we have to stop looking for
7433 something which uses it. */
7434 if (modified_in_p (cc_src, insn))
7437 /* Check whether INSN sets CC_REG to CC_SRC. */
7438 set = single_set (insn);
7440 && REG_P (SET_DEST (set))
7441 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7444 enum machine_mode set_mode;
7445 enum machine_mode comp_mode;
7448 set_mode = GET_MODE (SET_SRC (set));
7449 comp_mode = set_mode;
7450 if (rtx_equal_p (cc_src, SET_SRC (set)))
7452 else if (GET_CODE (cc_src) == COMPARE
7453 && GET_CODE (SET_SRC (set)) == COMPARE
7455 && rtx_equal_p (XEXP (cc_src, 0),
7456 XEXP (SET_SRC (set), 0))
7457 && rtx_equal_p (XEXP (cc_src, 1),
7458 XEXP (SET_SRC (set), 1)))
7461 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7462 if (comp_mode != VOIDmode
7463 && (can_change_mode || comp_mode == mode))
7470 if (insn_count < ARRAY_SIZE (insns))
7472 insns[insn_count] = insn;
7473 modes[insn_count] = set_mode;
7474 last_insns[insn_count] = end;
7477 if (mode != comp_mode)
7479 gcc_assert (can_change_mode);
7482 /* The modified insn will be re-recognized later. */
7483 PUT_MODE (cc_src, mode);
7488 if (set_mode != mode)
7490 /* We found a matching expression in the
7491 wrong mode, but we don't have room to
7492 store it in the array. Punt. This case
7496 /* INSN sets CC_REG to a value equal to CC_SRC
7497 with the right mode. We can simply delete
7502 /* We found an instruction to delete. Keep looking,
7503 in the hopes of finding a three-way jump. */
7507 /* We found an instruction which sets the condition
7508 code, so don't look any farther. */
7512 /* If INSN sets CC_REG in some other way, don't look any
7514 if (reg_set_p (cc_reg, insn))
7518 /* If we fell off the bottom of the block, we can keep looking
7519 through successors. We pass CAN_CHANGE_MODE as false because
7520 we aren't prepared to handle compatibility between the
7521 further blocks and this block. */
7524 enum machine_mode submode;
7526 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7527 if (submode != VOIDmode)
7529 gcc_assert (submode == mode);
7531 can_change_mode = false;
7539 /* Now INSN_COUNT is the number of instructions we found which set
7540 CC_REG to a value equivalent to CC_SRC. The instructions are in
7541 INSNS. The modes used by those instructions are in MODES. */
7544 for (i = 0; i < insn_count; ++i)
7546 if (modes[i] != mode)
7548 /* We need to change the mode of CC_REG in INSNS[i] and
7549 subsequent instructions. */
7552 if (GET_MODE (cc_reg) == mode)
7555 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7557 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7561 delete_insn (insns[i]);
7567 /* If we have a fixed condition code register (or two), walk through
7568 the instructions and try to eliminate duplicate assignments. */
7571 cse_condition_code_reg (void)
7573 unsigned int cc_regno_1;
7574 unsigned int cc_regno_2;
7579 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7582 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7583 if (cc_regno_2 != INVALID_REGNUM)
7584 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7586 cc_reg_2 = NULL_RTX;
7595 enum machine_mode mode;
7596 enum machine_mode orig_mode;
7598 /* Look for blocks which end with a conditional jump based on a
7599 condition code register. Then look for the instruction which
7600 sets the condition code register. Then look through the
7601 successor blocks for instructions which set the condition
7602 code register to the same value. There are other possible
7603 uses of the condition code register, but these are by far the
7604 most common and the ones which we are most likely to be able
7607 last_insn = BB_END (bb);
7608 if (!JUMP_P (last_insn))
7611 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7613 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7618 cc_src_insn = NULL_RTX;
7620 for (insn = PREV_INSN (last_insn);
7621 insn && insn != PREV_INSN (BB_HEAD (bb));
7622 insn = PREV_INSN (insn))
7626 if (! INSN_P (insn))
7628 set = single_set (insn);
7630 && REG_P (SET_DEST (set))
7631 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7634 cc_src = SET_SRC (set);
7637 else if (reg_set_p (cc_reg, insn))
7644 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7647 /* Now CC_REG is a condition code register used for a
7648 conditional jump at the end of the block, and CC_SRC, in
7649 CC_SRC_INSN, is the value to which that condition code
7650 register is set, and CC_SRC is still meaningful at the end of
7653 orig_mode = GET_MODE (cc_src);
7654 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
7655 if (mode != VOIDmode)
7657 gcc_assert (mode == GET_MODE (cc_src));
7658 if (mode != orig_mode)
7660 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7662 cse_change_cc_mode_insn (cc_src_insn, newreg);
7664 /* Do the same in the following insns that use the
7665 current value of CC_REG within BB. */
7666 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7667 NEXT_INSN (last_insn),