1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
32 #include "insn-config.h"
36 #include "diagnostic-core.h"
44 #include "rtlhooks-def.h"
45 #include "tree-pass.h"
49 /* The basic idea of common subexpression elimination is to go
50 through the code, keeping a record of expressions that would
51 have the same value at the current scan point, and replacing
52 expressions encountered with the cheapest equivalent expression.
54 It is too complicated to keep track of the different possibilities
55 when control paths merge in this code; so, at each label, we forget all
56 that is known and start fresh. This can be described as processing each
57 extended basic block separately. We have a separate pass to perform
60 Note CSE can turn a conditional or computed jump into a nop or
61 an unconditional jump. When this occurs we arrange to run the jump
62 optimizer after CSE to delete the unreachable code.
64 We use two data structures to record the equivalent expressions:
65 a hash table for most expressions, and a vector of "quantity
66 numbers" to record equivalent (pseudo) registers.
68 The use of the special data structure for registers is desirable
69 because it is faster. It is possible because registers references
70 contain a fairly small number, the register number, taken from
71 a contiguously allocated series, and two register references are
72 identical if they have the same number. General expressions
73 do not have any such thing, so the only way to retrieve the
74 information recorded on an expression other than a register
75 is to keep it in a hash table.
77 Registers and "quantity numbers":
79 At the start of each basic block, all of the (hardware and pseudo)
80 registers used in the function are given distinct quantity
81 numbers to indicate their contents. During scan, when the code
82 copies one register into another, we copy the quantity number.
83 When a register is loaded in any other way, we allocate a new
84 quantity number to describe the value generated by this operation.
85 `REG_QTY (N)' records what quantity register N is currently thought
88 All real quantity numbers are greater than or equal to zero.
89 If register N has not been assigned a quantity, `REG_QTY (N)' will
90 equal -N - 1, which is always negative.
92 Quantity numbers below zero do not exist and none of the `qty_table'
93 entries should be referenced with a negative index.
95 We also maintain a bidirectional chain of registers for each
96 quantity number. The `qty_table` members `first_reg' and `last_reg',
97 and `reg_eqv_table' members `next' and `prev' hold these chains.
99 The first register in a chain is the one whose lifespan is least local.
100 Among equals, it is the one that was seen first.
101 We replace any equivalent register with that one.
103 If two registers have the same quantity number, it must be true that
104 REG expressions with qty_table `mode' must be in the hash table for both
105 registers and must be in the same class.
107 The converse is not true. Since hard registers may be referenced in
108 any mode, two REG expressions might be equivalent in the hash table
109 but not have the same quantity number if the quantity number of one
110 of the registers is not the same mode as those expressions.
112 Constants and quantity numbers
114 When a quantity has a known constant value, that value is stored
115 in the appropriate qty_table `const_rtx'. This is in addition to
116 putting the constant in the hash table as is usual for non-regs.
118 Whether a reg or a constant is preferred is determined by the configuration
119 macro CONST_COSTS and will often depend on the constant value. In any
120 event, expressions containing constants can be simplified, by fold_rtx.
122 When a quantity has a known nearly constant value (such as an address
123 of a stack slot), that value is stored in the appropriate qty_table
126 Integer constants don't have a machine mode. However, cse
127 determines the intended machine mode from the destination
128 of the instruction that moves the constant. The machine mode
129 is recorded in the hash table along with the actual RTL
130 constant expression so that different modes are kept separate.
134 To record known equivalences among expressions in general
135 we use a hash table called `table'. It has a fixed number of buckets
136 that contain chains of `struct table_elt' elements for expressions.
137 These chains connect the elements whose expressions have the same
140 Other chains through the same elements connect the elements which
141 currently have equivalent values.
143 Register references in an expression are canonicalized before hashing
144 the expression. This is done using `reg_qty' and qty_table `first_reg'.
145 The hash code of a register reference is computed using the quantity
146 number, not the register number.
148 When the value of an expression changes, it is necessary to remove from the
149 hash table not just that expression but all expressions whose values
150 could be different as a result.
152 1. If the value changing is in memory, except in special cases
153 ANYTHING referring to memory could be changed. That is because
154 nobody knows where a pointer does not point.
155 The function `invalidate_memory' removes what is necessary.
157 The special cases are when the address is constant or is
158 a constant plus a fixed register such as the frame pointer
159 or a static chain pointer. When such addresses are stored in,
160 we can tell exactly which other such addresses must be invalidated
161 due to overlap. `invalidate' does this.
162 All expressions that refer to non-constant
163 memory addresses are also invalidated. `invalidate_memory' does this.
165 2. If the value changing is a register, all expressions
166 containing references to that register, and only those,
169 Because searching the entire hash table for expressions that contain
170 a register is very slow, we try to figure out when it isn't necessary.
171 Precisely, this is necessary only when expressions have been
172 entered in the hash table using this register, and then the value has
173 changed, and then another expression wants to be added to refer to
174 the register's new value. This sequence of circumstances is rare
175 within any one basic block.
177 `REG_TICK' and `REG_IN_TABLE', accessors for members of
178 cse_reg_info, are used to detect this case. REG_TICK (i) is
179 incremented whenever a value is stored in register i.
180 REG_IN_TABLE (i) holds -1 if no references to register i have been
181 entered in the table; otherwise, it contains the value REG_TICK (i)
182 had when the references were entered. If we want to enter a
183 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
184 remove old references. Until we want to enter a new entry, the
185 mere fact that the two vectors don't match makes the entries be
186 ignored if anyone tries to match them.
188 Registers themselves are entered in the hash table as well as in
189 the equivalent-register chains. However, `REG_TICK' and
190 `REG_IN_TABLE' do not apply to expressions which are simple
191 register references. These expressions are removed from the table
192 immediately when they become invalid, and this can be done even if
193 we do not immediately search for all the expressions that refer to
196 A CLOBBER rtx in an instruction invalidates its operand for further
197 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
198 invalidates everything that resides in memory.
202 Constant expressions that differ only by an additive integer
203 are called related. When a constant expression is put in
204 the table, the related expression with no constant term
205 is also entered. These are made to point at each other
206 so that it is possible to find out if there exists any
207 register equivalent to an expression related to a given expression. */
209 /* Length of qty_table vector. We know in advance we will not need
210 a quantity number this big. */
214 /* Next quantity number to be allocated.
215 This is 1 + the largest number needed so far. */
219 /* Per-qty information tracking.
221 `first_reg' and `last_reg' track the head and tail of the
222 chain of registers which currently contain this quantity.
224 `mode' contains the machine mode of this quantity.
226 `const_rtx' holds the rtx of the constant value of this
227 quantity, if known. A summations of the frame/arg pointer
228 and a constant can also be entered here. When this holds
229 a known value, `const_insn' is the insn which stored the
232 `comparison_{code,const,qty}' are used to track when a
233 comparison between a quantity and some constant or register has
234 been passed. In such a case, we know the results of the comparison
235 in case we see it again. These members record a comparison that
236 is known to be true. `comparison_code' holds the rtx code of such
237 a comparison, else it is set to UNKNOWN and the other two
238 comparison members are undefined. `comparison_const' holds
239 the constant being compared against, or zero if the comparison
240 is not against a constant. `comparison_qty' holds the quantity
241 being compared against when the result is known. If the comparison
242 is not with a register, `comparison_qty' is -1. */
244 struct qty_table_elem
248 rtx comparison_const;
250 unsigned int first_reg, last_reg;
251 /* The sizes of these fields should match the sizes of the
252 code and mode fields of struct rtx_def (see rtl.h). */
253 ENUM_BITFIELD(rtx_code) comparison_code : 16;
254 ENUM_BITFIELD(machine_mode) mode : 8;
257 /* The table of all qtys, indexed by qty number. */
258 static struct qty_table_elem *qty_table;
260 /* Structure used to pass arguments via for_each_rtx to function
261 cse_change_cc_mode. */
262 struct change_cc_mode_args
269 /* For machines that have a CC0, we do not record its value in the hash
270 table since its use is guaranteed to be the insn immediately following
271 its definition and any other insn is presumed to invalidate it.
273 Instead, we store below the current and last value assigned to CC0.
274 If it should happen to be a constant, it is stored in preference
275 to the actual assigned value. In case it is a constant, we store
276 the mode in which the constant should be interpreted. */
278 static rtx this_insn_cc0, prev_insn_cc0;
279 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
282 /* Insn being scanned. */
284 static rtx this_insn;
285 static bool optimize_this_for_speed_p;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp;
309 /* The quantity number of the register's current contents. */
312 /* The number of times the register has been altered in the current
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info *cse_reg_info_table;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
367 static int do_not_record;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
422 struct table_elt *next_same_hash;
423 struct table_elt *prev_same_hash;
424 struct table_elt *next_same_value;
425 struct table_elt *prev_same_value;
426 struct table_elt *first_same_value;
427 struct table_elt *related_value;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode) mode : 8;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P(N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
479 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
481 /* Get the number of times this register has been updated in this
484 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
486 /* Get the point at which REG was recorded in the table. */
488 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
490 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
493 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
495 /* Get the quantity number for REG. */
497 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
499 /* Determine if the quantity number for register X represents a valid index
500 into the qty_table. */
502 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
504 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
506 #define CHEAPER(X, Y) \
507 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
509 static struct table_elt *table[HASH_SIZE];
511 /* Chain of `struct table_elt's made so far for this function
512 but currently removed from the table. */
514 static struct table_elt *free_element_chain;
516 /* Set to the cost of a constant pool reference if one was found for a
517 symbolic constant. If this was found, it means we should try to
518 convert constants into constant pool entries if they don't fit in
521 static int constant_pool_entries_cost;
522 static int constant_pool_entries_regcost;
524 /* Trace a patch through the CFG. */
528 /* The basic block for this path entry. */
532 /* This data describes a block that will be processed by
533 cse_extended_basic_block. */
535 struct cse_basic_block_data
537 /* Total number of SETs in block. */
539 /* Size of current branch path, if any. */
541 /* Current path, indicating which basic_blocks will be processed. */
542 struct branch_path *path;
546 /* Pointers to the live in/live out bitmaps for the boundaries of the
548 static bitmap cse_ebb_live_in, cse_ebb_live_out;
550 /* A simple bitmap to track which basic blocks have been visited
551 already as part of an already processed extended basic block. */
552 static sbitmap cse_visited_basic_blocks;
554 static bool fixed_base_plus_p (rtx x);
555 static int notreg_cost (rtx, enum rtx_code);
556 static int approx_reg_cost_1 (rtx *, void *);
557 static int approx_reg_cost (rtx);
558 static int preferable (int, int, int, int);
559 static void new_basic_block (void);
560 static void make_new_qty (unsigned int, enum machine_mode);
561 static void make_regs_eqv (unsigned int, unsigned int);
562 static void delete_reg_equiv (unsigned int);
563 static int mention_regs (rtx);
564 static int insert_regs (rtx, struct table_elt *, int);
565 static void remove_from_table (struct table_elt *, unsigned);
566 static void remove_pseudo_from_table (rtx, unsigned);
567 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
568 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
569 static rtx lookup_as_function (rtx, enum rtx_code);
570 static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
571 enum machine_mode, int, int);
572 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
574 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
575 static void invalidate (rtx, enum machine_mode);
576 static bool cse_rtx_varies_p (const_rtx, bool);
577 static void remove_invalid_refs (unsigned int);
578 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
580 static void rehash_using_reg (rtx);
581 static void invalidate_memory (void);
582 static void invalidate_for_call (void);
583 static rtx use_related_value (rtx, struct table_elt *);
585 static inline unsigned canon_hash (rtx, enum machine_mode);
586 static inline unsigned safe_hash (rtx, enum machine_mode);
587 static inline unsigned hash_rtx_string (const char *);
589 static rtx canon_reg (rtx, rtx);
590 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
592 enum machine_mode *);
593 static rtx fold_rtx (rtx, rtx);
594 static rtx equiv_constant (rtx);
595 static void record_jump_equiv (rtx, bool);
596 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
598 static void cse_insn (rtx);
599 static void cse_prescan_path (struct cse_basic_block_data *);
600 static void invalidate_from_clobbers (rtx);
601 static rtx cse_process_notes (rtx, rtx, bool *);
602 static void cse_extended_basic_block (struct cse_basic_block_data *);
603 static void count_reg_usage (rtx, int *, rtx, int);
604 static int check_for_label_ref (rtx *, void *);
605 extern void dump_class (struct table_elt*);
606 static void get_cse_reg_info_1 (unsigned int regno);
607 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
608 static int check_dependence (rtx *, void *);
610 static void flush_hash_table (void);
611 static bool insn_live_p (rtx, int *);
612 static bool set_live_p (rtx, rtx, int *);
613 static int cse_change_cc_mode (rtx *, void *);
614 static void cse_change_cc_mode_insn (rtx, rtx);
615 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
616 static enum machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
620 #undef RTL_HOOKS_GEN_LOWPART
621 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
623 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
625 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
626 virtual regs here because the simplify_*_operation routines are called
627 by integrate.c, which is called before virtual register instantiation. */
630 fixed_base_plus_p (rtx x)
632 switch (GET_CODE (x))
635 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
637 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
639 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
640 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
645 if (!CONST_INT_P (XEXP (x, 1)))
647 return fixed_base_plus_p (XEXP (x, 0));
654 /* Dump the expressions in the equivalence class indicated by CLASSP.
655 This function is used only for debugging. */
657 dump_class (struct table_elt *classp)
659 struct table_elt *elt;
661 fprintf (stderr, "Equivalence chain for ");
662 print_rtl (stderr, classp->exp);
663 fprintf (stderr, ": \n");
665 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
667 print_rtl (stderr, elt->exp);
668 fprintf (stderr, "\n");
672 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
675 approx_reg_cost_1 (rtx *xp, void *data)
678 int *cost_p = (int *) data;
682 unsigned int regno = REGNO (x);
684 if (! CHEAP_REGNO (regno))
686 if (regno < FIRST_PSEUDO_REGISTER)
688 if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
700 /* Return an estimate of the cost of the registers used in an rtx.
701 This is mostly the number of different REG expressions in the rtx;
702 however for some exceptions like fixed registers we use a cost of
703 0. If any other hard register reference occurs, return MAX_COST. */
706 approx_reg_cost (rtx x)
710 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
716 /* Return a negative value if an rtx A, whose costs are given by COST_A
717 and REGCOST_A, is more desirable than an rtx B.
718 Return a positive value if A is less desirable, or 0 if the two are
721 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
723 /* First, get rid of cases involving expressions that are entirely
725 if (cost_a != cost_b)
727 if (cost_a == MAX_COST)
729 if (cost_b == MAX_COST)
733 /* Avoid extending lifetimes of hardregs. */
734 if (regcost_a != regcost_b)
736 if (regcost_a == MAX_COST)
738 if (regcost_b == MAX_COST)
742 /* Normal operation costs take precedence. */
743 if (cost_a != cost_b)
744 return cost_a - cost_b;
745 /* Only if these are identical consider effects on register pressure. */
746 if (regcost_a != regcost_b)
747 return regcost_a - regcost_b;
751 /* Internal function, to compute cost when X is not a register; called
752 from COST macro to keep it simple. */
755 notreg_cost (rtx x, enum rtx_code outer)
757 return ((GET_CODE (x) == SUBREG
758 && REG_P (SUBREG_REG (x))
759 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
760 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
761 && (GET_MODE_SIZE (GET_MODE (x))
762 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
763 && subreg_lowpart_p (x)
764 && TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x),
765 GET_MODE (SUBREG_REG (x))))
767 : rtx_cost (x, outer, optimize_this_for_speed_p) * 2);
771 /* Initialize CSE_REG_INFO_TABLE. */
774 init_cse_reg_info (unsigned int nregs)
776 /* Do we need to grow the table? */
777 if (nregs > cse_reg_info_table_size)
779 unsigned int new_size;
781 if (cse_reg_info_table_size < 2048)
783 /* Compute a new size that is a power of 2 and no smaller
784 than the large of NREGS and 64. */
785 new_size = (cse_reg_info_table_size
786 ? cse_reg_info_table_size : 64);
788 while (new_size < nregs)
793 /* If we need a big table, allocate just enough to hold
798 /* Reallocate the table with NEW_SIZE entries. */
799 free (cse_reg_info_table);
800 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
801 cse_reg_info_table_size = new_size;
802 cse_reg_info_table_first_uninitialized = 0;
805 /* Do we have all of the first NREGS entries initialized? */
806 if (cse_reg_info_table_first_uninitialized < nregs)
808 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
811 /* Put the old timestamp on newly allocated entries so that they
812 will all be considered out of date. We do not touch those
813 entries beyond the first NREGS entries to be nice to the
815 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
816 cse_reg_info_table[i].timestamp = old_timestamp;
818 cse_reg_info_table_first_uninitialized = nregs;
822 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
825 get_cse_reg_info_1 (unsigned int regno)
827 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
828 entry will be considered to have been initialized. */
829 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
831 /* Initialize the rest of the entry. */
832 cse_reg_info_table[regno].reg_tick = 1;
833 cse_reg_info_table[regno].reg_in_table = -1;
834 cse_reg_info_table[regno].subreg_ticked = -1;
835 cse_reg_info_table[regno].reg_qty = -regno - 1;
838 /* Find a cse_reg_info entry for REGNO. */
840 static inline struct cse_reg_info *
841 get_cse_reg_info (unsigned int regno)
843 struct cse_reg_info *p = &cse_reg_info_table[regno];
845 /* If this entry has not been initialized, go ahead and initialize
847 if (p->timestamp != cse_reg_info_timestamp)
848 get_cse_reg_info_1 (regno);
853 /* Clear the hash table and initialize each register with its own quantity,
854 for a new basic block. */
857 new_basic_block (void)
863 /* Invalidate cse_reg_info_table. */
864 cse_reg_info_timestamp++;
866 /* Clear out hash table state for this pass. */
867 CLEAR_HARD_REG_SET (hard_regs_in_table);
869 /* The per-quantity values used to be initialized here, but it is
870 much faster to initialize each as it is made in `make_new_qty'. */
872 for (i = 0; i < HASH_SIZE; i++)
874 struct table_elt *first;
879 struct table_elt *last = first;
883 while (last->next_same_hash != NULL)
884 last = last->next_same_hash;
886 /* Now relink this hash entire chain into
887 the free element list. */
889 last->next_same_hash = free_element_chain;
890 free_element_chain = first;
899 /* Say that register REG contains a quantity in mode MODE not in any
900 register before and initialize that quantity. */
903 make_new_qty (unsigned int reg, enum machine_mode mode)
906 struct qty_table_elem *ent;
907 struct reg_eqv_elem *eqv;
909 gcc_assert (next_qty < max_qty);
911 q = REG_QTY (reg) = next_qty++;
913 ent->first_reg = reg;
916 ent->const_rtx = ent->const_insn = NULL_RTX;
917 ent->comparison_code = UNKNOWN;
919 eqv = ®_eqv_table[reg];
920 eqv->next = eqv->prev = -1;
923 /* Make reg NEW equivalent to reg OLD.
924 OLD is not changing; NEW is. */
927 make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
929 unsigned int lastr, firstr;
930 int q = REG_QTY (old_reg);
931 struct qty_table_elem *ent;
935 /* Nothing should become eqv until it has a "non-invalid" qty number. */
936 gcc_assert (REGNO_QTY_VALID_P (old_reg));
938 REG_QTY (new_reg) = q;
939 firstr = ent->first_reg;
940 lastr = ent->last_reg;
942 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
943 hard regs. Among pseudos, if NEW will live longer than any other reg
944 of the same qty, and that is beyond the current basic block,
945 make it the new canonical replacement for this qty. */
946 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
947 /* Certain fixed registers might be of the class NO_REGS. This means
948 that not only can they not be allocated by the compiler, but
949 they cannot be used in substitutions or canonicalizations
951 && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
952 && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
953 || (new_reg >= FIRST_PSEUDO_REGISTER
954 && (firstr < FIRST_PSEUDO_REGISTER
955 || (bitmap_bit_p (cse_ebb_live_out, new_reg)
956 && !bitmap_bit_p (cse_ebb_live_out, firstr))
957 || (bitmap_bit_p (cse_ebb_live_in, new_reg)
958 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
960 reg_eqv_table[firstr].prev = new_reg;
961 reg_eqv_table[new_reg].next = firstr;
962 reg_eqv_table[new_reg].prev = -1;
963 ent->first_reg = new_reg;
967 /* If NEW is a hard reg (known to be non-fixed), insert at end.
968 Otherwise, insert before any non-fixed hard regs that are at the
969 end. Registers of class NO_REGS cannot be used as an
970 equivalent for anything. */
971 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
972 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
973 && new_reg >= FIRST_PSEUDO_REGISTER)
974 lastr = reg_eqv_table[lastr].prev;
975 reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
976 if (reg_eqv_table[lastr].next >= 0)
977 reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
979 qty_table[q].last_reg = new_reg;
980 reg_eqv_table[lastr].next = new_reg;
981 reg_eqv_table[new_reg].prev = lastr;
985 /* Remove REG from its equivalence class. */
988 delete_reg_equiv (unsigned int reg)
990 struct qty_table_elem *ent;
991 int q = REG_QTY (reg);
994 /* If invalid, do nothing. */
995 if (! REGNO_QTY_VALID_P (reg))
1000 p = reg_eqv_table[reg].prev;
1001 n = reg_eqv_table[reg].next;
1004 reg_eqv_table[n].prev = p;
1008 reg_eqv_table[p].next = n;
1012 REG_QTY (reg) = -reg - 1;
1015 /* Remove any invalid expressions from the hash table
1016 that refer to any of the registers contained in expression X.
1018 Make sure that newly inserted references to those registers
1019 as subexpressions will be considered valid.
1021 mention_regs is not called when a register itself
1022 is being stored in the table.
1024 Return 1 if we have done something that may have changed the hash code
1028 mention_regs (rtx x)
1038 code = GET_CODE (x);
1041 unsigned int regno = REGNO (x);
1042 unsigned int endregno = END_REGNO (x);
1045 for (i = regno; i < endregno; i++)
1047 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1048 remove_invalid_refs (i);
1050 REG_IN_TABLE (i) = REG_TICK (i);
1051 SUBREG_TICKED (i) = -1;
1057 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1058 pseudo if they don't use overlapping words. We handle only pseudos
1059 here for simplicity. */
1060 if (code == SUBREG && REG_P (SUBREG_REG (x))
1061 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1063 unsigned int i = REGNO (SUBREG_REG (x));
1065 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1067 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1068 the last store to this register really stored into this
1069 subreg, then remove the memory of this subreg.
1070 Otherwise, remove any memory of the entire register and
1071 all its subregs from the table. */
1072 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1073 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1074 remove_invalid_refs (i);
1076 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1079 REG_IN_TABLE (i) = REG_TICK (i);
1080 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1084 /* If X is a comparison or a COMPARE and either operand is a register
1085 that does not have a quantity, give it one. This is so that a later
1086 call to record_jump_equiv won't cause X to be assigned a different
1087 hash code and not found in the table after that call.
1089 It is not necessary to do this here, since rehash_using_reg can
1090 fix up the table later, but doing this here eliminates the need to
1091 call that expensive function in the most common case where the only
1092 use of the register is in the comparison. */
1094 if (code == COMPARE || COMPARISON_P (x))
1096 if (REG_P (XEXP (x, 0))
1097 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1098 if (insert_regs (XEXP (x, 0), NULL, 0))
1100 rehash_using_reg (XEXP (x, 0));
1104 if (REG_P (XEXP (x, 1))
1105 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1106 if (insert_regs (XEXP (x, 1), NULL, 0))
1108 rehash_using_reg (XEXP (x, 1));
1113 fmt = GET_RTX_FORMAT (code);
1114 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1116 changed |= mention_regs (XEXP (x, i));
1117 else if (fmt[i] == 'E')
1118 for (j = 0; j < XVECLEN (x, i); j++)
1119 changed |= mention_regs (XVECEXP (x, i, j));
1124 /* Update the register quantities for inserting X into the hash table
1125 with a value equivalent to CLASSP.
1126 (If the class does not contain a REG, it is irrelevant.)
1127 If MODIFIED is nonzero, X is a destination; it is being modified.
1128 Note that delete_reg_equiv should be called on a register
1129 before insert_regs is done on that register with MODIFIED != 0.
1131 Nonzero value means that elements of reg_qty have changed
1132 so X's hash code may be different. */
1135 insert_regs (rtx x, struct table_elt *classp, int modified)
1139 unsigned int regno = REGNO (x);
1142 /* If REGNO is in the equivalence table already but is of the
1143 wrong mode for that equivalence, don't do anything here. */
1145 qty_valid = REGNO_QTY_VALID_P (regno);
1148 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1150 if (ent->mode != GET_MODE (x))
1154 if (modified || ! qty_valid)
1157 for (classp = classp->first_same_value;
1159 classp = classp->next_same_value)
1160 if (REG_P (classp->exp)
1161 && GET_MODE (classp->exp) == GET_MODE (x))
1163 unsigned c_regno = REGNO (classp->exp);
1165 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1167 /* Suppose that 5 is hard reg and 100 and 101 are
1170 (set (reg:si 100) (reg:si 5))
1171 (set (reg:si 5) (reg:si 100))
1172 (set (reg:di 101) (reg:di 5))
1174 We would now set REG_QTY (101) = REG_QTY (5), but the
1175 entry for 5 is in SImode. When we use this later in
1176 copy propagation, we get the register in wrong mode. */
1177 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1180 make_regs_eqv (regno, c_regno);
1184 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1185 than REG_IN_TABLE to find out if there was only a single preceding
1186 invalidation - for the SUBREG - or another one, which would be
1187 for the full register. However, if we find here that REG_TICK
1188 indicates that the register is invalid, it means that it has
1189 been invalidated in a separate operation. The SUBREG might be used
1190 now (then this is a recursive call), or we might use the full REG
1191 now and a SUBREG of it later. So bump up REG_TICK so that
1192 mention_regs will do the right thing. */
1194 && REG_IN_TABLE (regno) >= 0
1195 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1197 make_new_qty (regno, GET_MODE (x));
1204 /* If X is a SUBREG, we will likely be inserting the inner register in the
1205 table. If that register doesn't have an assigned quantity number at
1206 this point but does later, the insertion that we will be doing now will
1207 not be accessible because its hash code will have changed. So assign
1208 a quantity number now. */
1210 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1211 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1213 insert_regs (SUBREG_REG (x), NULL, 0);
1218 return mention_regs (x);
1222 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1223 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1224 CST is equal to an anchor. */
1227 compute_const_anchors (rtx cst,
1228 HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1229 HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1231 HOST_WIDE_INT n = INTVAL (cst);
1233 *lower_base = n & ~(targetm.const_anchor - 1);
1234 if (*lower_base == n)
1238 (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1);
1239 *upper_offs = n - *upper_base;
1240 *lower_offs = n - *lower_base;
1244 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1247 insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1248 enum machine_mode mode)
1250 struct table_elt *elt;
1255 anchor_exp = GEN_INT (anchor);
1256 hash = HASH (anchor_exp, mode);
1257 elt = lookup (anchor_exp, hash, mode);
1259 elt = insert (anchor_exp, NULL, hash, mode);
1261 exp = plus_constant (reg, offs);
1262 /* REG has just been inserted and the hash codes recomputed. */
1264 hash = HASH (exp, mode);
1266 /* Use the cost of the register rather than the whole expression. When
1267 looking up constant anchors we will further offset the corresponding
1268 expression therefore it does not make sense to prefer REGs over
1269 reg-immediate additions. Prefer instead the oldest expression. Also
1270 don't prefer pseudos over hard regs so that we derive constants in
1271 argument registers from other argument registers rather than from the
1272 original pseudo that was used to synthesize the constant. */
1273 insert_with_costs (exp, elt, hash, mode, COST (reg), 1);
1276 /* The constant CST is equivalent to the register REG. Create
1277 equivalences between the two anchors of CST and the corresponding
1278 register-offset expressions using REG. */
1281 insert_const_anchors (rtx reg, rtx cst, enum machine_mode mode)
1283 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1285 if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1286 &upper_base, &upper_offs))
1289 /* Ignore anchors of value 0. Constants accessible from zero are
1291 if (lower_base != 0)
1292 insert_const_anchor (lower_base, reg, -lower_offs, mode);
1294 if (upper_base != 0)
1295 insert_const_anchor (upper_base, reg, -upper_offs, mode);
1298 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1299 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1300 valid expression. Return the cheapest and oldest of such expressions. In
1301 *OLD, return how old the resulting expression is compared to the other
1302 equivalent expressions. */
1305 find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1308 struct table_elt *elt;
1310 struct table_elt *match_elt;
1313 /* Find the cheapest and *oldest* expression to maximize the chance of
1314 reusing the same pseudo. */
1318 for (elt = anchor_elt->first_same_value, idx = 0;
1320 elt = elt->next_same_value, idx++)
1322 if (match_elt && CHEAPER (match_elt, elt))
1325 if (REG_P (elt->exp)
1326 || (GET_CODE (elt->exp) == PLUS
1327 && REG_P (XEXP (elt->exp, 0))
1328 && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1332 /* Ignore expressions that are no longer valid. */
1333 if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1336 x = plus_constant (elt->exp, offs);
1338 || (GET_CODE (x) == PLUS
1339 && IN_RANGE (INTVAL (XEXP (x, 1)),
1340 -targetm.const_anchor,
1341 targetm.const_anchor - 1)))
1353 /* Try to express the constant SRC_CONST using a register+offset expression
1354 derived from a constant anchor. Return it if successful or NULL_RTX,
1358 try_const_anchors (rtx src_const, enum machine_mode mode)
1360 struct table_elt *lower_elt, *upper_elt;
1361 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1362 rtx lower_anchor_rtx, upper_anchor_rtx;
1363 rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1364 unsigned lower_old, upper_old;
1366 if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1367 &upper_base, &upper_offs))
1370 lower_anchor_rtx = GEN_INT (lower_base);
1371 upper_anchor_rtx = GEN_INT (upper_base);
1372 lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1373 upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1376 lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1378 upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1385 /* Return the older expression. */
1386 return (upper_old > lower_old ? upper_exp : lower_exp);
1389 /* Look in or update the hash table. */
1391 /* Remove table element ELT from use in the table.
1392 HASH is its hash code, made using the HASH macro.
1393 It's an argument because often that is known in advance
1394 and we save much time not recomputing it. */
1397 remove_from_table (struct table_elt *elt, unsigned int hash)
1402 /* Mark this element as removed. See cse_insn. */
1403 elt->first_same_value = 0;
1405 /* Remove the table element from its equivalence class. */
1408 struct table_elt *prev = elt->prev_same_value;
1409 struct table_elt *next = elt->next_same_value;
1412 next->prev_same_value = prev;
1415 prev->next_same_value = next;
1418 struct table_elt *newfirst = next;
1421 next->first_same_value = newfirst;
1422 next = next->next_same_value;
1427 /* Remove the table element from its hash bucket. */
1430 struct table_elt *prev = elt->prev_same_hash;
1431 struct table_elt *next = elt->next_same_hash;
1434 next->prev_same_hash = prev;
1437 prev->next_same_hash = next;
1438 else if (table[hash] == elt)
1442 /* This entry is not in the proper hash bucket. This can happen
1443 when two classes were merged by `merge_equiv_classes'. Search
1444 for the hash bucket that it heads. This happens only very
1445 rarely, so the cost is acceptable. */
1446 for (hash = 0; hash < HASH_SIZE; hash++)
1447 if (table[hash] == elt)
1452 /* Remove the table element from its related-value circular chain. */
1454 if (elt->related_value != 0 && elt->related_value != elt)
1456 struct table_elt *p = elt->related_value;
1458 while (p->related_value != elt)
1459 p = p->related_value;
1460 p->related_value = elt->related_value;
1461 if (p->related_value == p)
1462 p->related_value = 0;
1465 /* Now add it to the free element chain. */
1466 elt->next_same_hash = free_element_chain;
1467 free_element_chain = elt;
1470 /* Same as above, but X is a pseudo-register. */
1473 remove_pseudo_from_table (rtx x, unsigned int hash)
1475 struct table_elt *elt;
1477 /* Because a pseudo-register can be referenced in more than one
1478 mode, we might have to remove more than one table entry. */
1479 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1480 remove_from_table (elt, hash);
1483 /* Look up X in the hash table and return its table element,
1484 or 0 if X is not in the table.
1486 MODE is the machine-mode of X, or if X is an integer constant
1487 with VOIDmode then MODE is the mode with which X will be used.
1489 Here we are satisfied to find an expression whose tree structure
1492 static struct table_elt *
1493 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1495 struct table_elt *p;
1497 for (p = table[hash]; p; p = p->next_same_hash)
1498 if (mode == p->mode && ((x == p->exp && REG_P (x))
1499 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1505 /* Like `lookup' but don't care whether the table element uses invalid regs.
1506 Also ignore discrepancies in the machine mode of a register. */
1508 static struct table_elt *
1509 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1511 struct table_elt *p;
1515 unsigned int regno = REGNO (x);
1517 /* Don't check the machine mode when comparing registers;
1518 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1519 for (p = table[hash]; p; p = p->next_same_hash)
1521 && REGNO (p->exp) == regno)
1526 for (p = table[hash]; p; p = p->next_same_hash)
1528 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1535 /* Look for an expression equivalent to X and with code CODE.
1536 If one is found, return that expression. */
1539 lookup_as_function (rtx x, enum rtx_code code)
1542 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1547 for (p = p->first_same_value; p; p = p->next_same_value)
1548 if (GET_CODE (p->exp) == code
1549 /* Make sure this is a valid entry in the table. */
1550 && exp_equiv_p (p->exp, p->exp, 1, false))
1556 /* Insert X in the hash table, assuming HASH is its hash code and
1557 CLASSP is an element of the class it should go in (or 0 if a new
1558 class should be made). COST is the code of X and reg_cost is the
1559 cost of registers in X. It is inserted at the proper position to
1560 keep the class in the order cheapest first.
1562 MODE is the machine-mode of X, or if X is an integer constant
1563 with VOIDmode then MODE is the mode with which X will be used.
1565 For elements of equal cheapness, the most recent one
1566 goes in front, except that the first element in the list
1567 remains first unless a cheaper element is added. The order of
1568 pseudo-registers does not matter, as canon_reg will be called to
1569 find the cheapest when a register is retrieved from the table.
1571 The in_memory field in the hash table element is set to 0.
1572 The caller must set it nonzero if appropriate.
1574 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1575 and if insert_regs returns a nonzero value
1576 you must then recompute its hash code before calling here.
1578 If necessary, update table showing constant values of quantities. */
1580 static struct table_elt *
1581 insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1582 enum machine_mode mode, int cost, int reg_cost)
1584 struct table_elt *elt;
1586 /* If X is a register and we haven't made a quantity for it,
1587 something is wrong. */
1588 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1590 /* If X is a hard register, show it is being put in the table. */
1591 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1592 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1594 /* Put an element for X into the right hash bucket. */
1596 elt = free_element_chain;
1598 free_element_chain = elt->next_same_hash;
1600 elt = XNEW (struct table_elt);
1603 elt->canon_exp = NULL_RTX;
1605 elt->regcost = reg_cost;
1606 elt->next_same_value = 0;
1607 elt->prev_same_value = 0;
1608 elt->next_same_hash = table[hash];
1609 elt->prev_same_hash = 0;
1610 elt->related_value = 0;
1613 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1616 table[hash]->prev_same_hash = elt;
1619 /* Put it into the proper value-class. */
1622 classp = classp->first_same_value;
1623 if (CHEAPER (elt, classp))
1624 /* Insert at the head of the class. */
1626 struct table_elt *p;
1627 elt->next_same_value = classp;
1628 classp->prev_same_value = elt;
1629 elt->first_same_value = elt;
1631 for (p = classp; p; p = p->next_same_value)
1632 p->first_same_value = elt;
1636 /* Insert not at head of the class. */
1637 /* Put it after the last element cheaper than X. */
1638 struct table_elt *p, *next;
1640 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1643 /* Put it after P and before NEXT. */
1644 elt->next_same_value = next;
1646 next->prev_same_value = elt;
1648 elt->prev_same_value = p;
1649 p->next_same_value = elt;
1650 elt->first_same_value = classp;
1654 elt->first_same_value = elt;
1656 /* If this is a constant being set equivalent to a register or a register
1657 being set equivalent to a constant, note the constant equivalence.
1659 If this is a constant, it cannot be equivalent to a different constant,
1660 and a constant is the only thing that can be cheaper than a register. So
1661 we know the register is the head of the class (before the constant was
1664 If this is a register that is not already known equivalent to a
1665 constant, we must check the entire class.
1667 If this is a register that is already known equivalent to an insn,
1668 update the qtys `const_insn' to show that `this_insn' is the latest
1669 insn making that quantity equivalent to the constant. */
1671 if (elt->is_const && classp && REG_P (classp->exp)
1674 int exp_q = REG_QTY (REGNO (classp->exp));
1675 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1677 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1678 exp_ent->const_insn = this_insn;
1683 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1686 struct table_elt *p;
1688 for (p = classp; p != 0; p = p->next_same_value)
1690 if (p->is_const && !REG_P (p->exp))
1692 int x_q = REG_QTY (REGNO (x));
1693 struct qty_table_elem *x_ent = &qty_table[x_q];
1696 = gen_lowpart (GET_MODE (x), p->exp);
1697 x_ent->const_insn = this_insn;
1704 && qty_table[REG_QTY (REGNO (x))].const_rtx
1705 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1706 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1708 /* If this is a constant with symbolic value,
1709 and it has a term with an explicit integer value,
1710 link it up with related expressions. */
1711 if (GET_CODE (x) == CONST)
1713 rtx subexp = get_related_value (x);
1715 struct table_elt *subelt, *subelt_prev;
1719 /* Get the integer-free subexpression in the hash table. */
1720 subhash = SAFE_HASH (subexp, mode);
1721 subelt = lookup (subexp, subhash, mode);
1723 subelt = insert (subexp, NULL, subhash, mode);
1724 /* Initialize SUBELT's circular chain if it has none. */
1725 if (subelt->related_value == 0)
1726 subelt->related_value = subelt;
1727 /* Find the element in the circular chain that precedes SUBELT. */
1728 subelt_prev = subelt;
1729 while (subelt_prev->related_value != subelt)
1730 subelt_prev = subelt_prev->related_value;
1731 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1732 This way the element that follows SUBELT is the oldest one. */
1733 elt->related_value = subelt_prev->related_value;
1734 subelt_prev->related_value = elt;
1741 /* Wrap insert_with_costs by passing the default costs. */
1743 static struct table_elt *
1744 insert (rtx x, struct table_elt *classp, unsigned int hash,
1745 enum machine_mode mode)
1748 insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x));
1752 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1753 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1754 the two classes equivalent.
1756 CLASS1 will be the surviving class; CLASS2 should not be used after this
1759 Any invalid entries in CLASS2 will not be copied. */
1762 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1764 struct table_elt *elt, *next, *new_elt;
1766 /* Ensure we start with the head of the classes. */
1767 class1 = class1->first_same_value;
1768 class2 = class2->first_same_value;
1770 /* If they were already equal, forget it. */
1771 if (class1 == class2)
1774 for (elt = class2; elt; elt = next)
1778 enum machine_mode mode = elt->mode;
1780 next = elt->next_same_value;
1782 /* Remove old entry, make a new one in CLASS1's class.
1783 Don't do this for invalid entries as we cannot find their
1784 hash code (it also isn't necessary). */
1785 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1787 bool need_rehash = false;
1789 hash_arg_in_memory = 0;
1790 hash = HASH (exp, mode);
1794 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1795 delete_reg_equiv (REGNO (exp));
1798 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1799 remove_pseudo_from_table (exp, hash);
1801 remove_from_table (elt, hash);
1803 if (insert_regs (exp, class1, 0) || need_rehash)
1805 rehash_using_reg (exp);
1806 hash = HASH (exp, mode);
1808 new_elt = insert (exp, class1, hash, mode);
1809 new_elt->in_memory = hash_arg_in_memory;
1814 /* Flush the entire hash table. */
1817 flush_hash_table (void)
1820 struct table_elt *p;
1822 for (i = 0; i < HASH_SIZE; i++)
1823 for (p = table[i]; p; p = table[i])
1825 /* Note that invalidate can remove elements
1826 after P in the current hash chain. */
1828 invalidate (p->exp, VOIDmode);
1830 remove_from_table (p, i);
1834 /* Function called for each rtx to check whether true dependence exist. */
1835 struct check_dependence_data
1837 enum machine_mode mode;
1843 check_dependence (rtx *x, void *data)
1845 struct check_dependence_data *d = (struct check_dependence_data *) data;
1846 if (*x && MEM_P (*x))
1847 return canon_true_dependence (d->exp, d->mode, d->addr, *x, NULL_RTX,
1853 /* Remove from the hash table, or mark as invalid, all expressions whose
1854 values could be altered by storing in X. X is a register, a subreg, or
1855 a memory reference with nonvarying address (because, when a memory
1856 reference with a varying address is stored in, all memory references are
1857 removed by invalidate_memory so specific invalidation is superfluous).
1858 FULL_MODE, if not VOIDmode, indicates that this much should be
1859 invalidated instead of just the amount indicated by the mode of X. This
1860 is only used for bitfield stores into memory.
1862 A nonvarying address may be just a register or just a symbol reference,
1863 or it may be either of those plus a numeric offset. */
1866 invalidate (rtx x, enum machine_mode full_mode)
1869 struct table_elt *p;
1872 switch (GET_CODE (x))
1876 /* If X is a register, dependencies on its contents are recorded
1877 through the qty number mechanism. Just change the qty number of
1878 the register, mark it as invalid for expressions that refer to it,
1879 and remove it itself. */
1880 unsigned int regno = REGNO (x);
1881 unsigned int hash = HASH (x, GET_MODE (x));
1883 /* Remove REGNO from any quantity list it might be on and indicate
1884 that its value might have changed. If it is a pseudo, remove its
1885 entry from the hash table.
1887 For a hard register, we do the first two actions above for any
1888 additional hard registers corresponding to X. Then, if any of these
1889 registers are in the table, we must remove any REG entries that
1890 overlap these registers. */
1892 delete_reg_equiv (regno);
1894 SUBREG_TICKED (regno) = -1;
1896 if (regno >= FIRST_PSEUDO_REGISTER)
1897 remove_pseudo_from_table (x, hash);
1900 HOST_WIDE_INT in_table
1901 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1902 unsigned int endregno = END_HARD_REGNO (x);
1903 unsigned int tregno, tendregno, rn;
1904 struct table_elt *p, *next;
1906 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1908 for (rn = regno + 1; rn < endregno; rn++)
1910 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1911 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1912 delete_reg_equiv (rn);
1914 SUBREG_TICKED (rn) = -1;
1918 for (hash = 0; hash < HASH_SIZE; hash++)
1919 for (p = table[hash]; p; p = next)
1921 next = p->next_same_hash;
1924 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1927 tregno = REGNO (p->exp);
1928 tendregno = END_HARD_REGNO (p->exp);
1929 if (tendregno > regno && tregno < endregno)
1930 remove_from_table (p, hash);
1937 invalidate (SUBREG_REG (x), VOIDmode);
1941 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1942 invalidate (XVECEXP (x, 0, i), VOIDmode);
1946 /* This is part of a disjoint return value; extract the location in
1947 question ignoring the offset. */
1948 invalidate (XEXP (x, 0), VOIDmode);
1952 addr = canon_rtx (get_addr (XEXP (x, 0)));
1953 /* Calculate the canonical version of X here so that
1954 true_dependence doesn't generate new RTL for X on each call. */
1957 /* Remove all hash table elements that refer to overlapping pieces of
1959 if (full_mode == VOIDmode)
1960 full_mode = GET_MODE (x);
1962 for (i = 0; i < HASH_SIZE; i++)
1964 struct table_elt *next;
1966 for (p = table[i]; p; p = next)
1968 next = p->next_same_hash;
1971 struct check_dependence_data d;
1973 /* Just canonicalize the expression once;
1974 otherwise each time we call invalidate
1975 true_dependence will canonicalize the
1976 expression again. */
1978 p->canon_exp = canon_rtx (p->exp);
1982 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1983 remove_from_table (p, i);
1994 /* Remove all expressions that refer to register REGNO,
1995 since they are already invalid, and we are about to
1996 mark that register valid again and don't want the old
1997 expressions to reappear as valid. */
2000 remove_invalid_refs (unsigned int regno)
2003 struct table_elt *p, *next;
2005 for (i = 0; i < HASH_SIZE; i++)
2006 for (p = table[i]; p; p = next)
2008 next = p->next_same_hash;
2010 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2011 remove_from_table (p, i);
2015 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2018 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
2019 enum machine_mode mode)
2022 struct table_elt *p, *next;
2023 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2025 for (i = 0; i < HASH_SIZE; i++)
2026 for (p = table[i]; p; p = next)
2029 next = p->next_same_hash;
2032 && (GET_CODE (exp) != SUBREG
2033 || !REG_P (SUBREG_REG (exp))
2034 || REGNO (SUBREG_REG (exp)) != regno
2035 || (((SUBREG_BYTE (exp)
2036 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2037 && SUBREG_BYTE (exp) <= end))
2038 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2039 remove_from_table (p, i);
2043 /* Recompute the hash codes of any valid entries in the hash table that
2044 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2046 This is called when we make a jump equivalence. */
2049 rehash_using_reg (rtx x)
2052 struct table_elt *p, *next;
2055 if (GET_CODE (x) == SUBREG)
2058 /* If X is not a register or if the register is known not to be in any
2059 valid entries in the table, we have no work to do. */
2062 || REG_IN_TABLE (REGNO (x)) < 0
2063 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2066 /* Scan all hash chains looking for valid entries that mention X.
2067 If we find one and it is in the wrong hash chain, move it. */
2069 for (i = 0; i < HASH_SIZE; i++)
2070 for (p = table[i]; p; p = next)
2072 next = p->next_same_hash;
2073 if (reg_mentioned_p (x, p->exp)
2074 && exp_equiv_p (p->exp, p->exp, 1, false)
2075 && i != (hash = SAFE_HASH (p->exp, p->mode)))
2077 if (p->next_same_hash)
2078 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2080 if (p->prev_same_hash)
2081 p->prev_same_hash->next_same_hash = p->next_same_hash;
2083 table[i] = p->next_same_hash;
2085 p->next_same_hash = table[hash];
2086 p->prev_same_hash = 0;
2088 table[hash]->prev_same_hash = p;
2094 /* Remove from the hash table any expression that is a call-clobbered
2095 register. Also update their TICK values. */
2098 invalidate_for_call (void)
2100 unsigned int regno, endregno;
2103 struct table_elt *p, *next;
2106 /* Go through all the hard registers. For each that is clobbered in
2107 a CALL_INSN, remove the register from quantity chains and update
2108 reg_tick if defined. Also see if any of these registers is currently
2111 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2112 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2114 delete_reg_equiv (regno);
2115 if (REG_TICK (regno) >= 0)
2118 SUBREG_TICKED (regno) = -1;
2121 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2124 /* In the case where we have no call-clobbered hard registers in the
2125 table, we are done. Otherwise, scan the table and remove any
2126 entry that overlaps a call-clobbered register. */
2129 for (hash = 0; hash < HASH_SIZE; hash++)
2130 for (p = table[hash]; p; p = next)
2132 next = p->next_same_hash;
2135 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2138 regno = REGNO (p->exp);
2139 endregno = END_HARD_REGNO (p->exp);
2141 for (i = regno; i < endregno; i++)
2142 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2144 remove_from_table (p, hash);
2150 /* Given an expression X of type CONST,
2151 and ELT which is its table entry (or 0 if it
2152 is not in the hash table),
2153 return an alternate expression for X as a register plus integer.
2154 If none can be found, return 0. */
2157 use_related_value (rtx x, struct table_elt *elt)
2159 struct table_elt *relt = 0;
2160 struct table_elt *p, *q;
2161 HOST_WIDE_INT offset;
2163 /* First, is there anything related known?
2164 If we have a table element, we can tell from that.
2165 Otherwise, must look it up. */
2167 if (elt != 0 && elt->related_value != 0)
2169 else if (elt == 0 && GET_CODE (x) == CONST)
2171 rtx subexp = get_related_value (x);
2173 relt = lookup (subexp,
2174 SAFE_HASH (subexp, GET_MODE (subexp)),
2181 /* Search all related table entries for one that has an
2182 equivalent register. */
2187 /* This loop is strange in that it is executed in two different cases.
2188 The first is when X is already in the table. Then it is searching
2189 the RELATED_VALUE list of X's class (RELT). The second case is when
2190 X is not in the table. Then RELT points to a class for the related
2193 Ensure that, whatever case we are in, that we ignore classes that have
2194 the same value as X. */
2196 if (rtx_equal_p (x, p->exp))
2199 for (q = p->first_same_value; q; q = q->next_same_value)
2206 p = p->related_value;
2208 /* We went all the way around, so there is nothing to be found.
2209 Alternatively, perhaps RELT was in the table for some other reason
2210 and it has no related values recorded. */
2211 if (p == relt || p == 0)
2218 offset = (get_integer_term (x) - get_integer_term (p->exp));
2219 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2220 return plus_constant (q->exp, offset);
2224 /* Hash a string. Just add its bytes up. */
2225 static inline unsigned
2226 hash_rtx_string (const char *ps)
2229 const unsigned char *p = (const unsigned char *) ps;
2238 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2239 When the callback returns true, we continue with the new rtx. */
2242 hash_rtx_cb (const_rtx x, enum machine_mode mode,
2243 int *do_not_record_p, int *hash_arg_in_memory_p,
2244 bool have_reg_qty, hash_rtx_callback_function cb)
2250 enum machine_mode newmode;
2253 /* Used to turn recursion into iteration. We can't rely on GCC's
2254 tail-recursion elimination since we need to keep accumulating values
2260 /* Invoke the callback first. */
2262 && ((*cb) (x, mode, &newx, &newmode)))
2264 hash += hash_rtx_cb (newx, newmode, do_not_record_p,
2265 hash_arg_in_memory_p, have_reg_qty, cb);
2269 code = GET_CODE (x);
2274 unsigned int regno = REGNO (x);
2276 if (do_not_record_p && !reload_completed)
2278 /* On some machines, we can't record any non-fixed hard register,
2279 because extending its life will cause reload problems. We
2280 consider ap, fp, sp, gp to be fixed for this purpose.
2282 We also consider CCmode registers to be fixed for this purpose;
2283 failure to do so leads to failure to simplify 0<100 type of
2286 On all machines, we can't record any global registers.
2287 Nor should we record any register that is in a small
2288 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2291 if (regno >= FIRST_PSEUDO_REGISTER)
2293 else if (x == frame_pointer_rtx
2294 || x == hard_frame_pointer_rtx
2295 || x == arg_pointer_rtx
2296 || x == stack_pointer_rtx
2297 || x == pic_offset_table_rtx)
2299 else if (global_regs[regno])
2301 else if (fixed_regs[regno])
2303 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2305 else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2307 else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2314 *do_not_record_p = 1;
2319 hash += ((unsigned int) REG << 7);
2320 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2324 /* We handle SUBREG of a REG specially because the underlying
2325 reg changes its hash value with every value change; we don't
2326 want to have to forget unrelated subregs when one subreg changes. */
2329 if (REG_P (SUBREG_REG (x)))
2331 hash += (((unsigned int) SUBREG << 7)
2332 + REGNO (SUBREG_REG (x))
2333 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2340 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2341 + (unsigned int) INTVAL (x));
2345 /* This is like the general case, except that it only counts
2346 the integers representing the constant. */
2347 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2348 if (GET_MODE (x) != VOIDmode)
2349 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2351 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2352 + (unsigned int) CONST_DOUBLE_HIGH (x));
2356 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2357 hash += fixed_hash (CONST_FIXED_VALUE (x));
2365 units = CONST_VECTOR_NUNITS (x);
2367 for (i = 0; i < units; ++i)
2369 elt = CONST_VECTOR_ELT (x, i);
2370 hash += hash_rtx_cb (elt, GET_MODE (elt),
2371 do_not_record_p, hash_arg_in_memory_p,
2378 /* Assume there is only one rtx object for any given label. */
2380 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2381 differences and differences between each stage's debugging dumps. */
2382 hash += (((unsigned int) LABEL_REF << 7)
2383 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2388 /* Don't hash on the symbol's address to avoid bootstrap differences.
2389 Different hash values may cause expressions to be recorded in
2390 different orders and thus different registers to be used in the
2391 final assembler. This also avoids differences in the dump files
2392 between various stages. */
2394 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2397 h += (h << 7) + *p++; /* ??? revisit */
2399 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2404 /* We don't record if marked volatile or if BLKmode since we don't
2405 know the size of the move. */
2406 if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2408 *do_not_record_p = 1;
2411 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2412 *hash_arg_in_memory_p = 1;
2414 /* Now that we have already found this special case,
2415 might as well speed it up as much as possible. */
2416 hash += (unsigned) MEM;
2421 /* A USE that mentions non-volatile memory needs special
2422 handling since the MEM may be BLKmode which normally
2423 prevents an entry from being made. Pure calls are
2424 marked by a USE which mentions BLKmode memory.
2425 See calls.c:emit_call_1. */
2426 if (MEM_P (XEXP (x, 0))
2427 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2429 hash += (unsigned) USE;
2432 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2433 *hash_arg_in_memory_p = 1;
2435 /* Now that we have already found this special case,
2436 might as well speed it up as much as possible. */
2437 hash += (unsigned) MEM;
2452 case UNSPEC_VOLATILE:
2453 if (do_not_record_p) {
2454 *do_not_record_p = 1;
2462 if (do_not_record_p && MEM_VOLATILE_P (x))
2464 *do_not_record_p = 1;
2469 /* We don't want to take the filename and line into account. */
2470 hash += (unsigned) code + (unsigned) GET_MODE (x)
2471 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2472 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2473 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2475 if (ASM_OPERANDS_INPUT_LENGTH (x))
2477 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2479 hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i),
2480 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2481 do_not_record_p, hash_arg_in_memory_p,
2484 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2487 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2488 x = ASM_OPERANDS_INPUT (x, 0);
2489 mode = GET_MODE (x);
2501 i = GET_RTX_LENGTH (code) - 1;
2502 hash += (unsigned) code + (unsigned) GET_MODE (x);
2503 fmt = GET_RTX_FORMAT (code);
2509 /* If we are about to do the last recursive call
2510 needed at this level, change it into iteration.
2511 This function is called enough to be worth it. */
2518 hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p,
2519 hash_arg_in_memory_p,
2524 for (j = 0; j < XVECLEN (x, i); j++)
2525 hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2526 hash_arg_in_memory_p,
2531 hash += hash_rtx_string (XSTR (x, i));
2535 hash += (unsigned int) XINT (x, i);
2550 /* Hash an rtx. We are careful to make sure the value is never negative.
2551 Equivalent registers hash identically.
2552 MODE is used in hashing for CONST_INTs only;
2553 otherwise the mode of X is used.
2555 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2557 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2558 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2560 Note that cse_insn knows that the hash code of a MEM expression
2561 is just (int) MEM plus the hash code of the address. */
2564 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2565 int *hash_arg_in_memory_p, bool have_reg_qty)
2567 return hash_rtx_cb (x, mode, do_not_record_p,
2568 hash_arg_in_memory_p, have_reg_qty, NULL);
2571 /* Hash an rtx X for cse via hash_rtx.
2572 Stores 1 in do_not_record if any subexpression is volatile.
2573 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2574 does not have the RTX_UNCHANGING_P bit set. */
2576 static inline unsigned
2577 canon_hash (rtx x, enum machine_mode mode)
2579 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2582 /* Like canon_hash but with no side effects, i.e. do_not_record
2583 and hash_arg_in_memory are not changed. */
2585 static inline unsigned
2586 safe_hash (rtx x, enum machine_mode mode)
2588 int dummy_do_not_record;
2589 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2592 /* Return 1 iff X and Y would canonicalize into the same thing,
2593 without actually constructing the canonicalization of either one.
2594 If VALIDATE is nonzero,
2595 we assume X is an expression being processed from the rtl
2596 and Y was found in the hash table. We check register refs
2597 in Y for being marked as valid.
2599 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2602 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2608 /* Note: it is incorrect to assume an expression is equivalent to itself
2609 if VALIDATE is nonzero. */
2610 if (x == y && !validate)
2613 if (x == 0 || y == 0)
2616 code = GET_CODE (x);
2617 if (code != GET_CODE (y))
2620 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2621 if (GET_MODE (x) != GET_MODE (y))
2624 /* MEMs refering to different address space are not equivalent. */
2625 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2638 return XEXP (x, 0) == XEXP (y, 0);
2641 return XSTR (x, 0) == XSTR (y, 0);
2645 return REGNO (x) == REGNO (y);
2648 unsigned int regno = REGNO (y);
2650 unsigned int endregno = END_REGNO (y);
2652 /* If the quantities are not the same, the expressions are not
2653 equivalent. If there are and we are not to validate, they
2654 are equivalent. Otherwise, ensure all regs are up-to-date. */
2656 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2662 for (i = regno; i < endregno; i++)
2663 if (REG_IN_TABLE (i) != REG_TICK (i))
2672 /* A volatile mem should not be considered equivalent to any
2674 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2677 /* Can't merge two expressions in different alias sets, since we
2678 can decide that the expression is transparent in a block when
2679 it isn't, due to it being set with the different alias set.
2681 Also, can't merge two expressions with different MEM_ATTRS.
2682 They could e.g. be two different entities allocated into the
2683 same space on the stack (see e.g. PR25130). In that case, the
2684 MEM addresses can be the same, even though the two MEMs are
2685 absolutely not equivalent.
2687 But because really all MEM attributes should be the same for
2688 equivalent MEMs, we just use the invariant that MEMs that have
2689 the same attributes share the same mem_attrs data structure. */
2690 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2695 /* For commutative operations, check both orders. */
2703 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2705 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2706 validate, for_gcse))
2707 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2709 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2710 validate, for_gcse)));
2713 /* We don't use the generic code below because we want to
2714 disregard filename and line numbers. */
2716 /* A volatile asm isn't equivalent to any other. */
2717 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2720 if (GET_MODE (x) != GET_MODE (y)
2721 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2722 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2723 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2724 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2725 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2728 if (ASM_OPERANDS_INPUT_LENGTH (x))
2730 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2731 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2732 ASM_OPERANDS_INPUT (y, i),
2734 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2735 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2745 /* Compare the elements. If any pair of corresponding elements
2746 fail to match, return 0 for the whole thing. */
2748 fmt = GET_RTX_FORMAT (code);
2749 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2754 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2755 validate, for_gcse))
2760 if (XVECLEN (x, i) != XVECLEN (y, i))
2762 for (j = 0; j < XVECLEN (x, i); j++)
2763 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2764 validate, for_gcse))
2769 if (strcmp (XSTR (x, i), XSTR (y, i)))
2774 if (XINT (x, i) != XINT (y, i))
2779 if (XWINT (x, i) != XWINT (y, i))
2795 /* Return 1 if X has a value that can vary even between two
2796 executions of the program. 0 means X can be compared reliably
2797 against certain constants or near-constants. */
2800 cse_rtx_varies_p (const_rtx x, bool from_alias)
2802 /* We need not check for X and the equivalence class being of the same
2803 mode because if X is equivalent to a constant in some mode, it
2804 doesn't vary in any mode. */
2807 && REGNO_QTY_VALID_P (REGNO (x)))
2809 int x_q = REG_QTY (REGNO (x));
2810 struct qty_table_elem *x_ent = &qty_table[x_q];
2812 if (GET_MODE (x) == x_ent->mode
2813 && x_ent->const_rtx != NULL_RTX)
2817 if (GET_CODE (x) == PLUS
2818 && CONST_INT_P (XEXP (x, 1))
2819 && REG_P (XEXP (x, 0))
2820 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2822 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2823 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2825 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2826 && x0_ent->const_rtx != NULL_RTX)
2830 /* This can happen as the result of virtual register instantiation, if
2831 the initial constant is too large to be a valid address. This gives
2832 us a three instruction sequence, load large offset into a register,
2833 load fp minus a constant into a register, then a MEM which is the
2834 sum of the two `constant' registers. */
2835 if (GET_CODE (x) == PLUS
2836 && REG_P (XEXP (x, 0))
2837 && REG_P (XEXP (x, 1))
2838 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2839 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2841 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2842 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2843 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2844 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2846 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2847 && x0_ent->const_rtx != NULL_RTX
2848 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2849 && x1_ent->const_rtx != NULL_RTX)
2853 return rtx_varies_p (x, from_alias);
2856 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2857 the result if necessary. INSN is as for canon_reg. */
2860 validate_canon_reg (rtx *xloc, rtx insn)
2864 rtx new_rtx = canon_reg (*xloc, insn);
2866 /* If replacing pseudo with hard reg or vice versa, ensure the
2867 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2868 gcc_assert (insn && new_rtx);
2869 validate_change (insn, xloc, new_rtx, 1);
2873 /* Canonicalize an expression:
2874 replace each register reference inside it
2875 with the "oldest" equivalent register.
2877 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2878 after we make our substitution. The calls are made with IN_GROUP nonzero
2879 so apply_change_group must be called upon the outermost return from this
2880 function (unless INSN is zero). The result of apply_change_group can
2881 generally be discarded since the changes we are making are optional. */
2884 canon_reg (rtx x, rtx insn)
2893 code = GET_CODE (x);
2913 struct qty_table_elem *ent;
2915 /* Never replace a hard reg, because hard regs can appear
2916 in more than one machine mode, and we must preserve the mode
2917 of each occurrence. Also, some hard regs appear in
2918 MEMs that are shared and mustn't be altered. Don't try to
2919 replace any reg that maps to a reg of class NO_REGS. */
2920 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2921 || ! REGNO_QTY_VALID_P (REGNO (x)))
2924 q = REG_QTY (REGNO (x));
2925 ent = &qty_table[q];
2926 first = ent->first_reg;
2927 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2928 : REGNO_REG_CLASS (first) == NO_REGS ? x
2929 : gen_rtx_REG (ent->mode, first));
2936 fmt = GET_RTX_FORMAT (code);
2937 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2942 validate_canon_reg (&XEXP (x, i), insn);
2943 else if (fmt[i] == 'E')
2944 for (j = 0; j < XVECLEN (x, i); j++)
2945 validate_canon_reg (&XVECEXP (x, i, j), insn);
2951 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2952 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2953 what values are being compared.
2955 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2956 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2957 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2958 compared to produce cc0.
2960 The return value is the comparison operator and is either the code of
2961 A or the code corresponding to the inverse of the comparison. */
2963 static enum rtx_code
2964 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2965 enum machine_mode *pmode1, enum machine_mode *pmode2)
2969 arg1 = *parg1, arg2 = *parg2;
2971 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2973 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2975 /* Set nonzero when we find something of interest. */
2977 int reverse_code = 0;
2978 struct table_elt *p = 0;
2980 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2981 On machines with CC0, this is the only case that can occur, since
2982 fold_rtx will return the COMPARE or item being compared with zero
2985 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2988 /* If ARG1 is a comparison operator and CODE is testing for
2989 STORE_FLAG_VALUE, get the inner arguments. */
2991 else if (COMPARISON_P (arg1))
2993 #ifdef FLOAT_STORE_FLAG_VALUE
2994 REAL_VALUE_TYPE fsfv;
2998 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2999 && code == LT && STORE_FLAG_VALUE == -1)
3000 #ifdef FLOAT_STORE_FLAG_VALUE
3001 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3002 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3003 REAL_VALUE_NEGATIVE (fsfv)))
3008 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3009 && code == GE && STORE_FLAG_VALUE == -1)
3010 #ifdef FLOAT_STORE_FLAG_VALUE
3011 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3012 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3013 REAL_VALUE_NEGATIVE (fsfv)))
3016 x = arg1, reverse_code = 1;
3019 /* ??? We could also check for
3021 (ne (and (eq (...) (const_int 1))) (const_int 0))
3023 and related forms, but let's wait until we see them occurring. */
3026 /* Look up ARG1 in the hash table and see if it has an equivalence
3027 that lets us see what is being compared. */
3028 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3031 p = p->first_same_value;
3033 /* If what we compare is already known to be constant, that is as
3035 We need to break the loop in this case, because otherwise we
3036 can have an infinite loop when looking at a reg that is known
3037 to be a constant which is the same as a comparison of a reg
3038 against zero which appears later in the insn stream, which in
3039 turn is constant and the same as the comparison of the first reg
3045 for (; p; p = p->next_same_value)
3047 enum machine_mode inner_mode = GET_MODE (p->exp);
3048 #ifdef FLOAT_STORE_FLAG_VALUE
3049 REAL_VALUE_TYPE fsfv;
3052 /* If the entry isn't valid, skip it. */
3053 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3056 if (GET_CODE (p->exp) == COMPARE
3057 /* Another possibility is that this machine has a compare insn
3058 that includes the comparison code. In that case, ARG1 would
3059 be equivalent to a comparison operation that would set ARG1 to
3060 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3061 ORIG_CODE is the actual comparison being done; if it is an EQ,
3062 we must reverse ORIG_CODE. On machine with a negative value
3063 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3066 && val_signbit_known_set_p (inner_mode,
3068 #ifdef FLOAT_STORE_FLAG_VALUE
3070 && SCALAR_FLOAT_MODE_P (inner_mode)
3071 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3072 REAL_VALUE_NEGATIVE (fsfv)))
3075 && COMPARISON_P (p->exp)))
3080 else if ((code == EQ
3082 && val_signbit_known_set_p (inner_mode,
3084 #ifdef FLOAT_STORE_FLAG_VALUE
3086 && SCALAR_FLOAT_MODE_P (inner_mode)
3087 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3088 REAL_VALUE_NEGATIVE (fsfv)))
3091 && COMPARISON_P (p->exp))
3098 /* If this non-trapping address, e.g. fp + constant, the
3099 equivalent is a better operand since it may let us predict
3100 the value of the comparison. */
3101 else if (!rtx_addr_can_trap_p (p->exp))
3108 /* If we didn't find a useful equivalence for ARG1, we are done.
3109 Otherwise, set up for the next iteration. */
3113 /* If we need to reverse the comparison, make sure that that is
3114 possible -- we can't necessarily infer the value of GE from LT
3115 with floating-point operands. */
3118 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3119 if (reversed == UNKNOWN)
3124 else if (COMPARISON_P (x))
3125 code = GET_CODE (x);
3126 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3129 /* Return our results. Return the modes from before fold_rtx
3130 because fold_rtx might produce const_int, and then it's too late. */
3131 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3132 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3137 /* If X is a nontrivial arithmetic operation on an argument for which
3138 a constant value can be determined, return the result of operating
3139 on that value, as a constant. Otherwise, return X, possibly with
3140 one or more operands changed to a forward-propagated constant.
3142 If X is a register whose contents are known, we do NOT return
3143 those contents here; equiv_constant is called to perform that task.
3144 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3146 INSN is the insn that we may be modifying. If it is 0, make a copy
3147 of X before modifying it. */
3150 fold_rtx (rtx x, rtx insn)
3153 enum machine_mode mode;
3159 /* Operands of X. */
3163 /* Constant equivalents of first three operands of X;
3164 0 when no such equivalent is known. */
3169 /* The mode of the first operand of X. We need this for sign and zero
3171 enum machine_mode mode_arg0;
3176 /* Try to perform some initial simplifications on X. */
3177 code = GET_CODE (x);
3182 if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3195 /* No use simplifying an EXPR_LIST
3196 since they are used only for lists of args
3197 in a function call's REG_EQUAL note. */
3203 return prev_insn_cc0;
3209 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3210 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3211 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3215 #ifdef NO_FUNCTION_CSE
3217 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3222 /* Anything else goes through the loop below. */
3227 mode = GET_MODE (x);
3231 mode_arg0 = VOIDmode;
3233 /* Try folding our operands.
3234 Then see which ones have constant values known. */
3236 fmt = GET_RTX_FORMAT (code);
3237 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3240 rtx folded_arg = XEXP (x, i), const_arg;
3241 enum machine_mode mode_arg = GET_MODE (folded_arg);
3243 switch (GET_CODE (folded_arg))
3248 const_arg = equiv_constant (folded_arg);
3258 const_arg = folded_arg;
3263 folded_arg = prev_insn_cc0;
3264 mode_arg = prev_insn_cc0_mode;
3265 const_arg = equiv_constant (folded_arg);
3270 folded_arg = fold_rtx (folded_arg, insn);
3271 const_arg = equiv_constant (folded_arg);
3275 /* For the first three operands, see if the operand
3276 is constant or equivalent to a constant. */
3280 folded_arg0 = folded_arg;
3281 const_arg0 = const_arg;
3282 mode_arg0 = mode_arg;
3285 folded_arg1 = folded_arg;
3286 const_arg1 = const_arg;
3289 const_arg2 = const_arg;
3293 /* Pick the least expensive of the argument and an equivalent constant
3296 && const_arg != folded_arg
3297 && COST_IN (const_arg, code) <= COST_IN (folded_arg, code)
3299 /* It's not safe to substitute the operand of a conversion
3300 operator with a constant, as the conversion's identity
3301 depends upon the mode of its operand. This optimization
3302 is handled by the call to simplify_unary_operation. */
3303 && (GET_RTX_CLASS (code) != RTX_UNARY
3304 || GET_MODE (const_arg) == mode_arg0
3305 || (code != ZERO_EXTEND
3306 && code != SIGN_EXTEND
3308 && code != FLOAT_TRUNCATE
3309 && code != FLOAT_EXTEND
3312 && code != UNSIGNED_FLOAT
3313 && code != UNSIGNED_FIX)))
3314 folded_arg = const_arg;
3316 if (folded_arg == XEXP (x, i))
3319 if (insn == NULL_RTX && !changed)
3322 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3327 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3328 consistent with the order in X. */
3329 if (canonicalize_change_group (insn, x))
3332 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3333 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3336 apply_change_group ();
3339 /* If X is an arithmetic operation, see if we can simplify it. */
3341 switch (GET_RTX_CLASS (code))
3345 /* We can't simplify extension ops unless we know the
3347 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3348 && mode_arg0 == VOIDmode)
3351 new_rtx = simplify_unary_operation (code, mode,
3352 const_arg0 ? const_arg0 : folded_arg0,
3358 case RTX_COMM_COMPARE:
3359 /* See what items are actually being compared and set FOLDED_ARG[01]
3360 to those values and CODE to the actual comparison code. If any are
3361 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3362 do anything if both operands are already known to be constant. */
3364 /* ??? Vector mode comparisons are not supported yet. */
3365 if (VECTOR_MODE_P (mode))
3368 if (const_arg0 == 0 || const_arg1 == 0)
3370 struct table_elt *p0, *p1;
3371 rtx true_rtx, false_rtx;
3372 enum machine_mode mode_arg1;
3374 if (SCALAR_FLOAT_MODE_P (mode))
3376 #ifdef FLOAT_STORE_FLAG_VALUE
3377 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3378 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3380 true_rtx = NULL_RTX;
3382 false_rtx = CONST0_RTX (mode);
3386 true_rtx = const_true_rtx;
3387 false_rtx = const0_rtx;
3390 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3391 &mode_arg0, &mode_arg1);
3393 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3394 what kinds of things are being compared, so we can't do
3395 anything with this comparison. */
3397 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3400 const_arg0 = equiv_constant (folded_arg0);
3401 const_arg1 = equiv_constant (folded_arg1);
3403 /* If we do not now have two constants being compared, see
3404 if we can nevertheless deduce some things about the
3406 if (const_arg0 == 0 || const_arg1 == 0)
3408 if (const_arg1 != NULL)
3410 rtx cheapest_simplification;
3413 struct table_elt *p;
3415 /* See if we can find an equivalent of folded_arg0
3416 that gets us a cheaper expression, possibly a
3417 constant through simplifications. */
3418 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3423 cheapest_simplification = x;
3424 cheapest_cost = COST (x);
3426 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3430 /* If the entry isn't valid, skip it. */
3431 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3434 /* Try to simplify using this equivalence. */
3436 = simplify_relational_operation (code, mode,
3441 if (simp_result == NULL)
3444 cost = COST (simp_result);
3445 if (cost < cheapest_cost)
3447 cheapest_cost = cost;
3448 cheapest_simplification = simp_result;
3452 /* If we have a cheaper expression now, use that
3453 and try folding it further, from the top. */
3454 if (cheapest_simplification != x)
3455 return fold_rtx (copy_rtx (cheapest_simplification),
3460 /* See if the two operands are the same. */
3462 if ((REG_P (folded_arg0)
3463 && REG_P (folded_arg1)
3464 && (REG_QTY (REGNO (folded_arg0))
3465 == REG_QTY (REGNO (folded_arg1))))
3466 || ((p0 = lookup (folded_arg0,
3467 SAFE_HASH (folded_arg0, mode_arg0),
3469 && (p1 = lookup (folded_arg1,
3470 SAFE_HASH (folded_arg1, mode_arg0),
3472 && p0->first_same_value == p1->first_same_value))
3473 folded_arg1 = folded_arg0;
3475 /* If FOLDED_ARG0 is a register, see if the comparison we are
3476 doing now is either the same as we did before or the reverse
3477 (we only check the reverse if not floating-point). */
3478 else if (REG_P (folded_arg0))
3480 int qty = REG_QTY (REGNO (folded_arg0));
3482 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3484 struct qty_table_elem *ent = &qty_table[qty];
3486 if ((comparison_dominates_p (ent->comparison_code, code)
3487 || (! FLOAT_MODE_P (mode_arg0)
3488 && comparison_dominates_p (ent->comparison_code,
3489 reverse_condition (code))))
3490 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3492 && rtx_equal_p (ent->comparison_const,
3494 || (REG_P (folded_arg1)
3495 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3497 if (comparison_dominates_p (ent->comparison_code, code))
3512 /* If we are comparing against zero, see if the first operand is
3513 equivalent to an IOR with a constant. If so, we may be able to
3514 determine the result of this comparison. */
3515 if (const_arg1 == const0_rtx && !const_arg0)
3517 rtx y = lookup_as_function (folded_arg0, IOR);
3521 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3522 && CONST_INT_P (inner_const)
3523 && INTVAL (inner_const) != 0)
3524 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3528 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3529 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3530 new_rtx = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3535 case RTX_COMM_ARITH:
3539 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3540 with that LABEL_REF as its second operand. If so, the result is
3541 the first operand of that MINUS. This handles switches with an
3542 ADDR_DIFF_VEC table. */
3543 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3546 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3547 : lookup_as_function (folded_arg0, MINUS);
3549 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3550 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3553 /* Now try for a CONST of a MINUS like the above. */
3554 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3555 : lookup_as_function (folded_arg0, CONST))) != 0
3556 && GET_CODE (XEXP (y, 0)) == MINUS
3557 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3558 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3559 return XEXP (XEXP (y, 0), 0);
3562 /* Likewise if the operands are in the other order. */
3563 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3566 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3567 : lookup_as_function (folded_arg1, MINUS);
3569 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3570 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3573 /* Now try for a CONST of a MINUS like the above. */
3574 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3575 : lookup_as_function (folded_arg1, CONST))) != 0
3576 && GET_CODE (XEXP (y, 0)) == MINUS
3577 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3578 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3579 return XEXP (XEXP (y, 0), 0);
3582 /* If second operand is a register equivalent to a negative
3583 CONST_INT, see if we can find a register equivalent to the
3584 positive constant. Make a MINUS if so. Don't do this for
3585 a non-negative constant since we might then alternate between
3586 choosing positive and negative constants. Having the positive
3587 constant previously-used is the more common case. Be sure
3588 the resulting constant is non-negative; if const_arg1 were
3589 the smallest negative number this would overflow: depending
3590 on the mode, this would either just be the same value (and
3591 hence not save anything) or be incorrect. */
3592 if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3593 && INTVAL (const_arg1) < 0
3594 /* This used to test
3596 -INTVAL (const_arg1) >= 0
3598 But The Sun V5.0 compilers mis-compiled that test. So
3599 instead we test for the problematic value in a more direct
3600 manner and hope the Sun compilers get it correct. */
3601 && INTVAL (const_arg1) !=
3602 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3603 && REG_P (folded_arg1))
3605 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3607 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3610 for (p = p->first_same_value; p; p = p->next_same_value)
3612 return simplify_gen_binary (MINUS, mode, folded_arg0,
3613 canon_reg (p->exp, NULL_RTX));
3618 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3619 If so, produce (PLUS Z C2-C). */
3620 if (const_arg1 != 0 && CONST_INT_P (const_arg1))
3622 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3623 if (y && CONST_INT_P (XEXP (y, 1)))
3624 return fold_rtx (plus_constant (copy_rtx (y),
3625 -INTVAL (const_arg1)),
3632 case SMIN: case SMAX: case UMIN: case UMAX:
3633 case IOR: case AND: case XOR:
3635 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3636 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3637 is known to be of similar form, we may be able to replace the
3638 operation with a combined operation. This may eliminate the
3639 intermediate operation if every use is simplified in this way.
3640 Note that the similar optimization done by combine.c only works
3641 if the intermediate operation's result has only one reference. */
3643 if (REG_P (folded_arg0)
3644 && const_arg1 && CONST_INT_P (const_arg1))
3647 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3648 rtx y, inner_const, new_const;
3649 rtx canon_const_arg1 = const_arg1;
3650 enum rtx_code associate_code;
3653 && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode)
3654 || INTVAL (const_arg1) < 0))
3656 if (SHIFT_COUNT_TRUNCATED)
3657 canon_const_arg1 = GEN_INT (INTVAL (const_arg1)
3658 & (GET_MODE_BITSIZE (mode)
3664 y = lookup_as_function (folded_arg0, code);
3668 /* If we have compiled a statement like
3669 "if (x == (x & mask1))", and now are looking at
3670 "x & mask2", we will have a case where the first operand
3671 of Y is the same as our first operand. Unless we detect
3672 this case, an infinite loop will result. */
3673 if (XEXP (y, 0) == folded_arg0)
3676 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3677 if (!inner_const || !CONST_INT_P (inner_const))
3680 /* Don't associate these operations if they are a PLUS with the
3681 same constant and it is a power of two. These might be doable
3682 with a pre- or post-increment. Similarly for two subtracts of
3683 identical powers of two with post decrement. */
3685 if (code == PLUS && const_arg1 == inner_const
3686 && ((HAVE_PRE_INCREMENT
3687 && exact_log2 (INTVAL (const_arg1)) >= 0)
3688 || (HAVE_POST_INCREMENT
3689 && exact_log2 (INTVAL (const_arg1)) >= 0)
3690 || (HAVE_PRE_DECREMENT
3691 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3692 || (HAVE_POST_DECREMENT
3693 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3696 /* ??? Vector mode shifts by scalar
3697 shift operand are not supported yet. */
3698 if (is_shift && VECTOR_MODE_P (mode))
3702 && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
3703 || INTVAL (inner_const) < 0))
3705 if (SHIFT_COUNT_TRUNCATED)
3706 inner_const = GEN_INT (INTVAL (inner_const)
3707 & (GET_MODE_BITSIZE (mode) - 1));
3712 /* Compute the code used to compose the constants. For example,
3713 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3715 associate_code = (is_shift || code == MINUS ? PLUS : code);
3717 new_const = simplify_binary_operation (associate_code, mode,
3724 /* If we are associating shift operations, don't let this
3725 produce a shift of the size of the object or larger.
3726 This could occur when we follow a sign-extend by a right
3727 shift on a machine that does a sign-extend as a pair
3731 && CONST_INT_P (new_const)
3732 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3734 /* As an exception, we can turn an ASHIFTRT of this
3735 form into a shift of the number of bits - 1. */
3736 if (code == ASHIFTRT)
3737 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3738 else if (!side_effects_p (XEXP (y, 0)))
3739 return CONST0_RTX (mode);
3744 y = copy_rtx (XEXP (y, 0));
3746 /* If Y contains our first operand (the most common way this
3747 can happen is if Y is a MEM), we would do into an infinite
3748 loop if we tried to fold it. So don't in that case. */
3750 if (! reg_mentioned_p (folded_arg0, y))
3751 y = fold_rtx (y, insn);
3753 return simplify_gen_binary (code, mode, y, new_const);
3757 case DIV: case UDIV:
3758 /* ??? The associative optimization performed immediately above is
3759 also possible for DIV and UDIV using associate_code of MULT.
3760 However, we would need extra code to verify that the
3761 multiplication does not overflow, that is, there is no overflow
3762 in the calculation of new_const. */
3769 new_rtx = simplify_binary_operation (code, mode,
3770 const_arg0 ? const_arg0 : folded_arg0,
3771 const_arg1 ? const_arg1 : folded_arg1);
3775 /* (lo_sum (high X) X) is simply X. */
3776 if (code == LO_SUM && const_arg0 != 0
3777 && GET_CODE (const_arg0) == HIGH
3778 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3783 case RTX_BITFIELD_OPS:
3784 new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3785 const_arg0 ? const_arg0 : folded_arg0,
3786 const_arg1 ? const_arg1 : folded_arg1,
3787 const_arg2 ? const_arg2 : XEXP (x, 2));
3794 return new_rtx ? new_rtx : x;
3797 /* Return a constant value currently equivalent to X.
3798 Return 0 if we don't know one. */
3801 equiv_constant (rtx x)
3804 && REGNO_QTY_VALID_P (REGNO (x)))
3806 int x_q = REG_QTY (REGNO (x));
3807 struct qty_table_elem *x_ent = &qty_table[x_q];
3809 if (x_ent->const_rtx)
3810 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3813 if (x == 0 || CONSTANT_P (x))
3816 if (GET_CODE (x) == SUBREG)
3818 enum machine_mode mode = GET_MODE (x);
3819 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3822 /* See if we previously assigned a constant value to this SUBREG. */
3823 if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3824 || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3825 || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3828 /* If we didn't and if doing so makes sense, see if we previously
3829 assigned a constant value to the enclosing word mode SUBREG. */
3830 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)
3831 && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode))
3833 int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode);
3834 if (byte >= 0 && (byte % UNITS_PER_WORD) == 0)
3836 rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3837 new_rtx = lookup_as_function (y, CONST_INT);
3839 return gen_lowpart (mode, new_rtx);
3843 /* Otherwise see if we already have a constant for the inner REG. */
3844 if (REG_P (SUBREG_REG (x))
3845 && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3846 return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3851 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3852 the hash table in case its value was seen before. */
3856 struct table_elt *elt;
3858 x = avoid_constant_pool_reference (x);
3862 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3866 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3867 if (elt->is_const && CONSTANT_P (elt->exp))
3874 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3877 In certain cases, this can cause us to add an equivalence. For example,
3878 if we are following the taken case of
3880 we can add the fact that `i' and '2' are now equivalent.
3882 In any case, we can record that this comparison was passed. If the same
3883 comparison is seen later, we will know its value. */
3886 record_jump_equiv (rtx insn, bool taken)
3888 int cond_known_true;
3891 enum machine_mode mode, mode0, mode1;
3892 int reversed_nonequality = 0;
3895 /* Ensure this is the right kind of insn. */
3896 gcc_assert (any_condjump_p (insn));
3898 set = pc_set (insn);
3900 /* See if this jump condition is known true or false. */
3902 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3904 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3906 /* Get the type of comparison being done and the operands being compared.
3907 If we had to reverse a non-equality condition, record that fact so we
3908 know that it isn't valid for floating-point. */
3909 code = GET_CODE (XEXP (SET_SRC (set), 0));
3910 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3911 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3913 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3914 if (! cond_known_true)
3916 code = reversed_comparison_code_parts (code, op0, op1, insn);
3918 /* Don't remember if we can't find the inverse. */
3919 if (code == UNKNOWN)
3923 /* The mode is the mode of the non-constant. */
3925 if (mode1 != VOIDmode)
3928 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3931 /* Yet another form of subreg creation. In this case, we want something in
3932 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3935 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3937 enum machine_mode op_mode = GET_MODE (op);
3938 if (op_mode == mode || op_mode == VOIDmode)
3940 return lowpart_subreg (mode, op, op_mode);
3943 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3944 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3945 Make any useful entries we can with that information. Called from
3946 above function and called recursively. */
3949 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3950 rtx op1, int reversed_nonequality)
3952 unsigned op0_hash, op1_hash;
3953 int op0_in_memory, op1_in_memory;
3954 struct table_elt *op0_elt, *op1_elt;
3956 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3957 we know that they are also equal in the smaller mode (this is also
3958 true for all smaller modes whether or not there is a SUBREG, but
3959 is not worth testing for with no SUBREG). */
3961 /* Note that GET_MODE (op0) may not equal MODE. */
3962 if (code == EQ && paradoxical_subreg_p (op0))
3964 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3965 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3967 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3968 reversed_nonequality);
3971 if (code == EQ && paradoxical_subreg_p (op1))
3973 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3974 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3976 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3977 reversed_nonequality);
3980 /* Similarly, if this is an NE comparison, and either is a SUBREG
3981 making a smaller mode, we know the whole thing is also NE. */
3983 /* Note that GET_MODE (op0) may not equal MODE;
3984 if we test MODE instead, we can get an infinite recursion
3985 alternating between two modes each wider than MODE. */
3987 if (code == NE && GET_CODE (op0) == SUBREG
3988 && subreg_lowpart_p (op0)
3989 && (GET_MODE_SIZE (GET_MODE (op0))
3990 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3992 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3993 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3995 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3996 reversed_nonequality);
3999 if (code == NE && GET_CODE (op1) == SUBREG
4000 && subreg_lowpart_p (op1)
4001 && (GET_MODE_SIZE (GET_MODE (op1))
4002 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4004 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4005 rtx tem = record_jump_cond_subreg (inner_mode, op0);
4007 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
4008 reversed_nonequality);
4011 /* Hash both operands. */
4014 hash_arg_in_memory = 0;
4015 op0_hash = HASH (op0, mode);
4016 op0_in_memory = hash_arg_in_memory;
4022 hash_arg_in_memory = 0;
4023 op1_hash = HASH (op1, mode);
4024 op1_in_memory = hash_arg_in_memory;
4029 /* Look up both operands. */
4030 op0_elt = lookup (op0, op0_hash, mode);
4031 op1_elt = lookup (op1, op1_hash, mode);
4033 /* If both operands are already equivalent or if they are not in the
4034 table but are identical, do nothing. */
4035 if ((op0_elt != 0 && op1_elt != 0
4036 && op0_elt->first_same_value == op1_elt->first_same_value)
4037 || op0 == op1 || rtx_equal_p (op0, op1))
4040 /* If we aren't setting two things equal all we can do is save this
4041 comparison. Similarly if this is floating-point. In the latter
4042 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4043 If we record the equality, we might inadvertently delete code
4044 whose intent was to change -0 to +0. */
4046 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4048 struct qty_table_elem *ent;
4051 /* If we reversed a floating-point comparison, if OP0 is not a
4052 register, or if OP1 is neither a register or constant, we can't
4056 op1 = equiv_constant (op1);
4058 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4059 || !REG_P (op0) || op1 == 0)
4062 /* Put OP0 in the hash table if it isn't already. This gives it a
4063 new quantity number. */
4066 if (insert_regs (op0, NULL, 0))
4068 rehash_using_reg (op0);
4069 op0_hash = HASH (op0, mode);
4071 /* If OP0 is contained in OP1, this changes its hash code
4072 as well. Faster to rehash than to check, except
4073 for the simple case of a constant. */
4074 if (! CONSTANT_P (op1))
4075 op1_hash = HASH (op1,mode);
4078 op0_elt = insert (op0, NULL, op0_hash, mode);
4079 op0_elt->in_memory = op0_in_memory;
4082 qty = REG_QTY (REGNO (op0));
4083 ent = &qty_table[qty];
4085 ent->comparison_code = code;
4088 /* Look it up again--in case op0 and op1 are the same. */
4089 op1_elt = lookup (op1, op1_hash, mode);
4091 /* Put OP1 in the hash table so it gets a new quantity number. */
4094 if (insert_regs (op1, NULL, 0))
4096 rehash_using_reg (op1);
4097 op1_hash = HASH (op1, mode);
4100 op1_elt = insert (op1, NULL, op1_hash, mode);
4101 op1_elt->in_memory = op1_in_memory;
4104 ent->comparison_const = NULL_RTX;
4105 ent->comparison_qty = REG_QTY (REGNO (op1));
4109 ent->comparison_const = op1;
4110 ent->comparison_qty = -1;
4116 /* If either side is still missing an equivalence, make it now,
4117 then merge the equivalences. */
4121 if (insert_regs (op0, NULL, 0))
4123 rehash_using_reg (op0);
4124 op0_hash = HASH (op0, mode);
4127 op0_elt = insert (op0, NULL, op0_hash, mode);
4128 op0_elt->in_memory = op0_in_memory;
4133 if (insert_regs (op1, NULL, 0))
4135 rehash_using_reg (op1);
4136 op1_hash = HASH (op1, mode);
4139 op1_elt = insert (op1, NULL, op1_hash, mode);
4140 op1_elt->in_memory = op1_in_memory;
4143 merge_equiv_classes (op0_elt, op1_elt);
4146 /* CSE processing for one instruction.
4147 First simplify sources and addresses of all assignments
4148 in the instruction, using previously-computed equivalents values.
4149 Then install the new sources and destinations in the table
4150 of available values. */
4152 /* Data on one SET contained in the instruction. */
4156 /* The SET rtx itself. */
4158 /* The SET_SRC of the rtx (the original value, if it is changing). */
4160 /* The hash-table element for the SET_SRC of the SET. */
4161 struct table_elt *src_elt;
4162 /* Hash value for the SET_SRC. */
4164 /* Hash value for the SET_DEST. */
4166 /* The SET_DEST, with SUBREG, etc., stripped. */
4168 /* Nonzero if the SET_SRC is in memory. */
4170 /* Nonzero if the SET_SRC contains something
4171 whose value cannot be predicted and understood. */
4173 /* Original machine mode, in case it becomes a CONST_INT.
4174 The size of this field should match the size of the mode
4175 field of struct rtx_def (see rtl.h). */
4176 ENUM_BITFIELD(machine_mode) mode : 8;
4177 /* A constant equivalent for SET_SRC, if any. */
4179 /* Hash value of constant equivalent for SET_SRC. */
4180 unsigned src_const_hash;
4181 /* Table entry for constant equivalent for SET_SRC, if any. */
4182 struct table_elt *src_const_elt;
4183 /* Table entry for the destination address. */
4184 struct table_elt *dest_addr_elt;
4190 rtx x = PATTERN (insn);
4196 struct table_elt *src_eqv_elt = 0;
4197 int src_eqv_volatile = 0;
4198 int src_eqv_in_memory = 0;
4199 unsigned src_eqv_hash = 0;
4201 struct set *sets = (struct set *) 0;
4205 /* Records what this insn does to set CC0. */
4207 this_insn_cc0_mode = VOIDmode;
4210 /* Find all the SETs and CLOBBERs in this instruction.
4211 Record all the SETs in the array `set' and count them.
4212 Also determine whether there is a CLOBBER that invalidates
4213 all memory references, or all references at varying addresses. */
4217 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4219 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4220 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4221 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4225 if (GET_CODE (x) == SET)
4227 sets = XALLOCA (struct set);
4230 /* Ignore SETs that are unconditional jumps.
4231 They never need cse processing, so this does not hurt.
4232 The reason is not efficiency but rather
4233 so that we can test at the end for instructions
4234 that have been simplified to unconditional jumps
4235 and not be misled by unchanged instructions
4236 that were unconditional jumps to begin with. */
4237 if (SET_DEST (x) == pc_rtx
4238 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4241 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4242 The hard function value register is used only once, to copy to
4243 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4244 Ensure we invalidate the destination register. On the 80386 no
4245 other code would invalidate it since it is a fixed_reg.
4246 We need not check the return of apply_change_group; see canon_reg. */
4248 else if (GET_CODE (SET_SRC (x)) == CALL)
4250 canon_reg (SET_SRC (x), insn);
4251 apply_change_group ();
4252 fold_rtx (SET_SRC (x), insn);
4253 invalidate (SET_DEST (x), VOIDmode);
4258 else if (GET_CODE (x) == PARALLEL)
4260 int lim = XVECLEN (x, 0);
4262 sets = XALLOCAVEC (struct set, lim);
4264 /* Find all regs explicitly clobbered in this insn,
4265 and ensure they are not replaced with any other regs
4266 elsewhere in this insn.
4267 When a reg that is clobbered is also used for input,
4268 we should presume that that is for a reason,
4269 and we should not substitute some other register
4270 which is not supposed to be clobbered.
4271 Therefore, this loop cannot be merged into the one below
4272 because a CALL may precede a CLOBBER and refer to the
4273 value clobbered. We must not let a canonicalization do
4274 anything in that case. */
4275 for (i = 0; i < lim; i++)
4277 rtx y = XVECEXP (x, 0, i);
4278 if (GET_CODE (y) == CLOBBER)
4280 rtx clobbered = XEXP (y, 0);
4282 if (REG_P (clobbered)
4283 || GET_CODE (clobbered) == SUBREG)
4284 invalidate (clobbered, VOIDmode);
4285 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4286 || GET_CODE (clobbered) == ZERO_EXTRACT)
4287 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4291 for (i = 0; i < lim; i++)
4293 rtx y = XVECEXP (x, 0, i);
4294 if (GET_CODE (y) == SET)
4296 /* As above, we ignore unconditional jumps and call-insns and
4297 ignore the result of apply_change_group. */
4298 if (GET_CODE (SET_SRC (y)) == CALL)
4300 canon_reg (SET_SRC (y), insn);
4301 apply_change_group ();
4302 fold_rtx (SET_SRC (y), insn);
4303 invalidate (SET_DEST (y), VOIDmode);
4305 else if (SET_DEST (y) == pc_rtx
4306 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4309 sets[n_sets++].rtl = y;
4311 else if (GET_CODE (y) == CLOBBER)
4313 /* If we clobber memory, canon the address.
4314 This does nothing when a register is clobbered
4315 because we have already invalidated the reg. */
4316 if (MEM_P (XEXP (y, 0)))
4317 canon_reg (XEXP (y, 0), insn);
4319 else if (GET_CODE (y) == USE
4320 && ! (REG_P (XEXP (y, 0))
4321 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4322 canon_reg (y, insn);
4323 else if (GET_CODE (y) == CALL)
4325 /* The result of apply_change_group can be ignored; see
4327 canon_reg (y, insn);
4328 apply_change_group ();
4333 else if (GET_CODE (x) == CLOBBER)
4335 if (MEM_P (XEXP (x, 0)))
4336 canon_reg (XEXP (x, 0), insn);
4338 /* Canonicalize a USE of a pseudo register or memory location. */
4339 else if (GET_CODE (x) == USE
4340 && ! (REG_P (XEXP (x, 0))
4341 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4342 canon_reg (x, insn);
4343 else if (GET_CODE (x) == ASM_OPERANDS)
4345 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4347 rtx input = ASM_OPERANDS_INPUT (x, i);
4348 if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER))
4350 input = canon_reg (input, insn);
4351 validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4355 else if (GET_CODE (x) == CALL)
4357 /* The result of apply_change_group can be ignored; see canon_reg. */
4358 canon_reg (x, insn);
4359 apply_change_group ();
4362 else if (DEBUG_INSN_P (insn))
4363 canon_reg (PATTERN (insn), insn);
4365 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4366 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4367 is handled specially for this case, and if it isn't set, then there will
4368 be no equivalence for the destination. */
4369 if (n_sets == 1 && REG_NOTES (insn) != 0
4370 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4371 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4372 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4374 /* The result of apply_change_group can be ignored; see canon_reg. */
4375 canon_reg (XEXP (tem, 0), insn);
4376 apply_change_group ();
4377 src_eqv = fold_rtx (XEXP (tem, 0), insn);
4378 XEXP (tem, 0) = copy_rtx (src_eqv);
4379 df_notes_rescan (insn);
4382 /* Canonicalize sources and addresses of destinations.
4383 We do this in a separate pass to avoid problems when a MATCH_DUP is
4384 present in the insn pattern. In that case, we want to ensure that
4385 we don't break the duplicate nature of the pattern. So we will replace
4386 both operands at the same time. Otherwise, we would fail to find an
4387 equivalent substitution in the loop calling validate_change below.
4389 We used to suppress canonicalization of DEST if it appears in SRC,
4390 but we don't do this any more. */
4392 for (i = 0; i < n_sets; i++)
4394 rtx dest = SET_DEST (sets[i].rtl);
4395 rtx src = SET_SRC (sets[i].rtl);
4396 rtx new_rtx = canon_reg (src, insn);
4398 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4400 if (GET_CODE (dest) == ZERO_EXTRACT)
4402 validate_change (insn, &XEXP (dest, 1),
4403 canon_reg (XEXP (dest, 1), insn), 1);
4404 validate_change (insn, &XEXP (dest, 2),
4405 canon_reg (XEXP (dest, 2), insn), 1);
4408 while (GET_CODE (dest) == SUBREG
4409 || GET_CODE (dest) == ZERO_EXTRACT
4410 || GET_CODE (dest) == STRICT_LOW_PART)
4411 dest = XEXP (dest, 0);
4414 canon_reg (dest, insn);
4417 /* Now that we have done all the replacements, we can apply the change
4418 group and see if they all work. Note that this will cause some
4419 canonicalizations that would have worked individually not to be applied
4420 because some other canonicalization didn't work, but this should not
4423 The result of apply_change_group can be ignored; see canon_reg. */
4425 apply_change_group ();
4427 /* Set sets[i].src_elt to the class each source belongs to.
4428 Detect assignments from or to volatile things
4429 and set set[i] to zero so they will be ignored
4430 in the rest of this function.
4432 Nothing in this loop changes the hash table or the register chains. */
4434 for (i = 0; i < n_sets; i++)
4436 bool repeat = false;
4439 struct table_elt *elt = 0, *p;
4440 enum machine_mode mode;
4443 rtx src_related = 0;
4444 bool src_related_is_const_anchor = false;
4445 struct table_elt *src_const_elt = 0;
4446 int src_cost = MAX_COST;
4447 int src_eqv_cost = MAX_COST;
4448 int src_folded_cost = MAX_COST;
4449 int src_related_cost = MAX_COST;
4450 int src_elt_cost = MAX_COST;
4451 int src_regcost = MAX_COST;
4452 int src_eqv_regcost = MAX_COST;
4453 int src_folded_regcost = MAX_COST;
4454 int src_related_regcost = MAX_COST;
4455 int src_elt_regcost = MAX_COST;
4456 /* Set nonzero if we need to call force_const_mem on with the
4457 contents of src_folded before using it. */
4458 int src_folded_force_flag = 0;
4460 dest = SET_DEST (sets[i].rtl);
4461 src = SET_SRC (sets[i].rtl);
4463 /* If SRC is a constant that has no machine mode,
4464 hash it with the destination's machine mode.
4465 This way we can keep different modes separate. */
4467 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4468 sets[i].mode = mode;
4472 enum machine_mode eqvmode = mode;
4473 if (GET_CODE (dest) == STRICT_LOW_PART)
4474 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4476 hash_arg_in_memory = 0;
4477 src_eqv_hash = HASH (src_eqv, eqvmode);
4479 /* Find the equivalence class for the equivalent expression. */
4482 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4484 src_eqv_volatile = do_not_record;
4485 src_eqv_in_memory = hash_arg_in_memory;
4488 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4489 value of the INNER register, not the destination. So it is not
4490 a valid substitution for the source. But save it for later. */
4491 if (GET_CODE (dest) == STRICT_LOW_PART)
4494 src_eqv_here = src_eqv;
4496 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4497 simplified result, which may not necessarily be valid. */
4498 src_folded = fold_rtx (src, insn);
4501 /* ??? This caused bad code to be generated for the m68k port with -O2.
4502 Suppose src is (CONST_INT -1), and that after truncation src_folded
4503 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4504 At the end we will add src and src_const to the same equivalence
4505 class. We now have 3 and -1 on the same equivalence class. This
4506 causes later instructions to be mis-optimized. */
4507 /* If storing a constant in a bitfield, pre-truncate the constant
4508 so we will be able to record it later. */
4509 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4511 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4513 if (CONST_INT_P (src)
4514 && CONST_INT_P (width)
4515 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4516 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4518 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4519 << INTVAL (width)) - 1));
4523 /* Compute SRC's hash code, and also notice if it
4524 should not be recorded at all. In that case,
4525 prevent any further processing of this assignment. */
4527 hash_arg_in_memory = 0;
4530 sets[i].src_hash = HASH (src, mode);
4531 sets[i].src_volatile = do_not_record;
4532 sets[i].src_in_memory = hash_arg_in_memory;
4534 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4535 a pseudo, do not record SRC. Using SRC as a replacement for
4536 anything else will be incorrect in that situation. Note that
4537 this usually occurs only for stack slots, in which case all the
4538 RTL would be referring to SRC, so we don't lose any optimization
4539 opportunities by not having SRC in the hash table. */
4542 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4544 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4545 sets[i].src_volatile = 1;
4548 /* It is no longer clear why we used to do this, but it doesn't
4549 appear to still be needed. So let's try without it since this
4550 code hurts cse'ing widened ops. */
4551 /* If source is a paradoxical subreg (such as QI treated as an SI),
4552 treat it as volatile. It may do the work of an SI in one context
4553 where the extra bits are not being used, but cannot replace an SI
4555 if (paradoxical_subreg_p (src))
4556 sets[i].src_volatile = 1;
4559 /* Locate all possible equivalent forms for SRC. Try to replace
4560 SRC in the insn with each cheaper equivalent.
4562 We have the following types of equivalents: SRC itself, a folded
4563 version, a value given in a REG_EQUAL note, or a value related
4566 Each of these equivalents may be part of an additional class
4567 of equivalents (if more than one is in the table, they must be in
4568 the same class; we check for this).
4570 If the source is volatile, we don't do any table lookups.
4572 We note any constant equivalent for possible later use in a
4575 if (!sets[i].src_volatile)
4576 elt = lookup (src, sets[i].src_hash, mode);
4578 sets[i].src_elt = elt;
4580 if (elt && src_eqv_here && src_eqv_elt)
4582 if (elt->first_same_value != src_eqv_elt->first_same_value)
4584 /* The REG_EQUAL is indicating that two formerly distinct
4585 classes are now equivalent. So merge them. */
4586 merge_equiv_classes (elt, src_eqv_elt);
4587 src_eqv_hash = HASH (src_eqv, elt->mode);
4588 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4594 else if (src_eqv_elt)
4597 /* Try to find a constant somewhere and record it in `src_const'.
4598 Record its table element, if any, in `src_const_elt'. Look in
4599 any known equivalences first. (If the constant is not in the
4600 table, also set `sets[i].src_const_hash'). */
4602 for (p = elt->first_same_value; p; p = p->next_same_value)
4606 src_const_elt = elt;
4611 && (CONSTANT_P (src_folded)
4612 /* Consider (minus (label_ref L1) (label_ref L2)) as
4613 "constant" here so we will record it. This allows us
4614 to fold switch statements when an ADDR_DIFF_VEC is used. */
4615 || (GET_CODE (src_folded) == MINUS
4616 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4617 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4618 src_const = src_folded, src_const_elt = elt;
4619 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4620 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4622 /* If we don't know if the constant is in the table, get its
4623 hash code and look it up. */
4624 if (src_const && src_const_elt == 0)
4626 sets[i].src_const_hash = HASH (src_const, mode);
4627 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4630 sets[i].src_const = src_const;
4631 sets[i].src_const_elt = src_const_elt;
4633 /* If the constant and our source are both in the table, mark them as
4634 equivalent. Otherwise, if a constant is in the table but the source
4635 isn't, set ELT to it. */
4636 if (src_const_elt && elt
4637 && src_const_elt->first_same_value != elt->first_same_value)
4638 merge_equiv_classes (elt, src_const_elt);
4639 else if (src_const_elt && elt == 0)
4640 elt = src_const_elt;
4642 /* See if there is a register linearly related to a constant
4643 equivalent of SRC. */
4645 && (GET_CODE (src_const) == CONST
4646 || (src_const_elt && src_const_elt->related_value != 0)))
4648 src_related = use_related_value (src_const, src_const_elt);
4651 struct table_elt *src_related_elt
4652 = lookup (src_related, HASH (src_related, mode), mode);
4653 if (src_related_elt && elt)
4655 if (elt->first_same_value
4656 != src_related_elt->first_same_value)
4657 /* This can occur when we previously saw a CONST
4658 involving a SYMBOL_REF and then see the SYMBOL_REF
4659 twice. Merge the involved classes. */
4660 merge_equiv_classes (elt, src_related_elt);
4663 src_related_elt = 0;
4665 else if (src_related_elt && elt == 0)
4666 elt = src_related_elt;
4670 /* See if we have a CONST_INT that is already in a register in a
4673 if (src_const && src_related == 0 && CONST_INT_P (src_const)
4674 && GET_MODE_CLASS (mode) == MODE_INT
4675 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4677 enum machine_mode wider_mode;
4679 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4680 wider_mode != VOIDmode
4681 && GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4682 && src_related == 0;
4683 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4685 struct table_elt *const_elt
4686 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4691 for (const_elt = const_elt->first_same_value;
4692 const_elt; const_elt = const_elt->next_same_value)
4693 if (REG_P (const_elt->exp))
4695 src_related = gen_lowpart (mode, const_elt->exp);
4701 /* Another possibility is that we have an AND with a constant in
4702 a mode narrower than a word. If so, it might have been generated
4703 as part of an "if" which would narrow the AND. If we already
4704 have done the AND in a wider mode, we can use a SUBREG of that
4707 if (flag_expensive_optimizations && ! src_related
4708 && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4709 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4711 enum machine_mode tmode;
4712 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4714 for (tmode = GET_MODE_WIDER_MODE (mode);
4715 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4716 tmode = GET_MODE_WIDER_MODE (tmode))
4718 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4719 struct table_elt *larger_elt;
4723 PUT_MODE (new_and, tmode);
4724 XEXP (new_and, 0) = inner;
4725 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4726 if (larger_elt == 0)
4729 for (larger_elt = larger_elt->first_same_value;
4730 larger_elt; larger_elt = larger_elt->next_same_value)
4731 if (REG_P (larger_elt->exp))
4734 = gen_lowpart (mode, larger_elt->exp);
4744 #ifdef LOAD_EXTEND_OP
4745 /* See if a MEM has already been loaded with a widening operation;
4746 if it has, we can use a subreg of that. Many CISC machines
4747 also have such operations, but this is only likely to be
4748 beneficial on these machines. */
4750 if (flag_expensive_optimizations && src_related == 0
4751 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4752 && GET_MODE_CLASS (mode) == MODE_INT
4753 && MEM_P (src) && ! do_not_record
4754 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4756 struct rtx_def memory_extend_buf;
4757 rtx memory_extend_rtx = &memory_extend_buf;
4758 enum machine_mode tmode;
4760 /* Set what we are trying to extend and the operation it might
4761 have been extended with. */
4762 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
4763 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4764 XEXP (memory_extend_rtx, 0) = src;
4766 for (tmode = GET_MODE_WIDER_MODE (mode);
4767 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4768 tmode = GET_MODE_WIDER_MODE (tmode))
4770 struct table_elt *larger_elt;
4772 PUT_MODE (memory_extend_rtx, tmode);
4773 larger_elt = lookup (memory_extend_rtx,
4774 HASH (memory_extend_rtx, tmode), tmode);
4775 if (larger_elt == 0)
4778 for (larger_elt = larger_elt->first_same_value;
4779 larger_elt; larger_elt = larger_elt->next_same_value)
4780 if (REG_P (larger_elt->exp))
4782 src_related = gen_lowpart (mode, larger_elt->exp);
4790 #endif /* LOAD_EXTEND_OP */
4792 /* Try to express the constant using a register+offset expression
4793 derived from a constant anchor. */
4795 if (targetm.const_anchor
4798 && GET_CODE (src_const) == CONST_INT)
4800 src_related = try_const_anchors (src_const, mode);
4801 src_related_is_const_anchor = src_related != NULL_RTX;
4805 if (src == src_folded)
4808 /* At this point, ELT, if nonzero, points to a class of expressions
4809 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4810 and SRC_RELATED, if nonzero, each contain additional equivalent
4811 expressions. Prune these latter expressions by deleting expressions
4812 already in the equivalence class.
4814 Check for an equivalent identical to the destination. If found,
4815 this is the preferred equivalent since it will likely lead to
4816 elimination of the insn. Indicate this by placing it in
4820 elt = elt->first_same_value;
4821 for (p = elt; p; p = p->next_same_value)
4823 enum rtx_code code = GET_CODE (p->exp);
4825 /* If the expression is not valid, ignore it. Then we do not
4826 have to check for validity below. In most cases, we can use
4827 `rtx_equal_p', since canonicalization has already been done. */
4828 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4831 /* Also skip paradoxical subregs, unless that's what we're
4833 if (paradoxical_subreg_p (p->exp)
4835 && GET_CODE (src) == SUBREG
4836 && GET_MODE (src) == GET_MODE (p->exp)
4837 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4838 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4841 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4843 else if (src_folded && GET_CODE (src_folded) == code
4844 && rtx_equal_p (src_folded, p->exp))
4846 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4847 && rtx_equal_p (src_eqv_here, p->exp))
4849 else if (src_related && GET_CODE (src_related) == code
4850 && rtx_equal_p (src_related, p->exp))
4853 /* This is the same as the destination of the insns, we want
4854 to prefer it. Copy it to src_related. The code below will
4855 then give it a negative cost. */
4856 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4860 /* Find the cheapest valid equivalent, trying all the available
4861 possibilities. Prefer items not in the hash table to ones
4862 that are when they are equal cost. Note that we can never
4863 worsen an insn as the current contents will also succeed.
4864 If we find an equivalent identical to the destination, use it as best,
4865 since this insn will probably be eliminated in that case. */
4868 if (rtx_equal_p (src, dest))
4869 src_cost = src_regcost = -1;
4872 src_cost = COST (src);
4873 src_regcost = approx_reg_cost (src);
4879 if (rtx_equal_p (src_eqv_here, dest))
4880 src_eqv_cost = src_eqv_regcost = -1;
4883 src_eqv_cost = COST (src_eqv_here);
4884 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4890 if (rtx_equal_p (src_folded, dest))
4891 src_folded_cost = src_folded_regcost = -1;
4894 src_folded_cost = COST (src_folded);
4895 src_folded_regcost = approx_reg_cost (src_folded);
4901 if (rtx_equal_p (src_related, dest))
4902 src_related_cost = src_related_regcost = -1;
4905 src_related_cost = COST (src_related);
4906 src_related_regcost = approx_reg_cost (src_related);
4908 /* If a const-anchor is used to synthesize a constant that
4909 normally requires multiple instructions then slightly prefer
4910 it over the original sequence. These instructions are likely
4911 to become redundant now. We can't compare against the cost
4912 of src_eqv_here because, on MIPS for example, multi-insn
4913 constants have zero cost; they are assumed to be hoisted from
4915 if (src_related_is_const_anchor
4916 && src_related_cost == src_cost
4922 /* If this was an indirect jump insn, a known label will really be
4923 cheaper even though it looks more expensive. */
4924 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
4925 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
4927 /* Terminate loop when replacement made. This must terminate since
4928 the current contents will be tested and will always be valid. */
4933 /* Skip invalid entries. */
4934 while (elt && !REG_P (elt->exp)
4935 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
4936 elt = elt->next_same_value;
4938 /* A paradoxical subreg would be bad here: it'll be the right
4939 size, but later may be adjusted so that the upper bits aren't
4940 what we want. So reject it. */
4942 && paradoxical_subreg_p (elt->exp)
4943 /* It is okay, though, if the rtx we're trying to match
4944 will ignore any of the bits we can't predict. */
4946 && GET_CODE (src) == SUBREG
4947 && GET_MODE (src) == GET_MODE (elt->exp)
4948 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4949 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
4951 elt = elt->next_same_value;
4957 src_elt_cost = elt->cost;
4958 src_elt_regcost = elt->regcost;
4961 /* Find cheapest and skip it for the next time. For items
4962 of equal cost, use this order:
4963 src_folded, src, src_eqv, src_related and hash table entry. */
4965 && preferable (src_folded_cost, src_folded_regcost,
4966 src_cost, src_regcost) <= 0
4967 && preferable (src_folded_cost, src_folded_regcost,
4968 src_eqv_cost, src_eqv_regcost) <= 0
4969 && preferable (src_folded_cost, src_folded_regcost,
4970 src_related_cost, src_related_regcost) <= 0
4971 && preferable (src_folded_cost, src_folded_regcost,
4972 src_elt_cost, src_elt_regcost) <= 0)
4974 trial = src_folded, src_folded_cost = MAX_COST;
4975 if (src_folded_force_flag)
4977 rtx forced = force_const_mem (mode, trial);
4983 && preferable (src_cost, src_regcost,
4984 src_eqv_cost, src_eqv_regcost) <= 0
4985 && preferable (src_cost, src_regcost,
4986 src_related_cost, src_related_regcost) <= 0
4987 && preferable (src_cost, src_regcost,
4988 src_elt_cost, src_elt_regcost) <= 0)
4989 trial = src, src_cost = MAX_COST;
4990 else if (src_eqv_here
4991 && preferable (src_eqv_cost, src_eqv_regcost,
4992 src_related_cost, src_related_regcost) <= 0
4993 && preferable (src_eqv_cost, src_eqv_regcost,
4994 src_elt_cost, src_elt_regcost) <= 0)
4995 trial = src_eqv_here, src_eqv_cost = MAX_COST;
4996 else if (src_related
4997 && preferable (src_related_cost, src_related_regcost,
4998 src_elt_cost, src_elt_regcost) <= 0)
4999 trial = src_related, src_related_cost = MAX_COST;
5003 elt = elt->next_same_value;
5004 src_elt_cost = MAX_COST;
5007 /* Avoid creation of overlapping memory moves. */
5008 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
5012 /* BLKmode moves are not handled by cse anyway. */
5013 if (GET_MODE (trial) == BLKmode)
5016 src = canon_rtx (trial);
5017 dest = canon_rtx (SET_DEST (sets[i].rtl));
5019 if (!MEM_P (src) || !MEM_P (dest)
5020 || !nonoverlapping_memrefs_p (src, dest, false))
5025 (set (reg:M N) (const_int A))
5026 (set (reg:M2 O) (const_int B))
5027 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5029 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5030 && CONST_INT_P (trial)
5031 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5032 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5033 && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5034 && (GET_MODE_BITSIZE (GET_MODE (SET_DEST (sets[i].rtl)))
5035 >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))
5036 && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5037 + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5038 <= HOST_BITS_PER_WIDE_INT))
5040 rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5041 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5042 rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5043 unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5044 struct table_elt *dest_elt
5045 = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5046 rtx dest_cst = NULL;
5049 for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5050 if (p->is_const && CONST_INT_P (p->exp))
5057 HOST_WIDE_INT val = INTVAL (dest_cst);
5060 if (BITS_BIG_ENDIAN)
5061 shift = GET_MODE_BITSIZE (GET_MODE (dest_reg))
5062 - INTVAL (pos) - INTVAL (width);
5064 shift = INTVAL (pos);
5065 if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5066 mask = ~(HOST_WIDE_INT) 0;
5068 mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1;
5069 val &= ~(mask << shift);
5070 val |= (INTVAL (trial) & mask) << shift;
5071 val = trunc_int_for_mode (val, GET_MODE (dest_reg));
5072 validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5074 validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5076 if (apply_change_group ())
5078 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5081 remove_note (insn, note);
5082 df_notes_rescan (insn);
5086 src_eqv_volatile = 0;
5087 src_eqv_in_memory = 0;
5095 /* We don't normally have an insn matching (set (pc) (pc)), so
5096 check for this separately here. We will delete such an
5099 For other cases such as a table jump or conditional jump
5100 where we know the ultimate target, go ahead and replace the
5101 operand. While that may not make a valid insn, we will
5102 reemit the jump below (and also insert any necessary
5104 if (n_sets == 1 && dest == pc_rtx
5106 || (GET_CODE (trial) == LABEL_REF
5107 && ! condjump_p (insn))))
5109 /* Don't substitute non-local labels, this confuses CFG. */
5110 if (GET_CODE (trial) == LABEL_REF
5111 && LABEL_REF_NONLOCAL_P (trial))
5114 SET_SRC (sets[i].rtl) = trial;
5115 cse_jumps_altered = true;
5119 /* Reject certain invalid forms of CONST that we create. */
5120 else if (CONSTANT_P (trial)
5121 && GET_CODE (trial) == CONST
5122 /* Reject cases that will cause decode_rtx_const to
5123 die. On the alpha when simplifying a switch, we
5124 get (const (truncate (minus (label_ref)
5126 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5127 /* Likewise on IA-64, except without the
5129 || (GET_CODE (XEXP (trial, 0)) == MINUS
5130 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5131 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5132 /* Do nothing for this case. */
5135 /* Look for a substitution that makes a valid insn. */
5136 else if (validate_unshare_change
5137 (insn, &SET_SRC (sets[i].rtl), trial, 0))
5139 rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5141 /* The result of apply_change_group can be ignored; see
5144 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5145 apply_change_group ();
5150 /* If we previously found constant pool entries for
5151 constants and this is a constant, try making a
5152 pool entry. Put it in src_folded unless we already have done
5153 this since that is where it likely came from. */
5155 else if (constant_pool_entries_cost
5156 && CONSTANT_P (trial)
5158 || (!MEM_P (src_folded)
5159 && ! src_folded_force_flag))
5160 && GET_MODE_CLASS (mode) != MODE_CC
5161 && mode != VOIDmode)
5163 src_folded_force_flag = 1;
5165 src_folded_cost = constant_pool_entries_cost;
5166 src_folded_regcost = constant_pool_entries_regcost;
5170 /* If we changed the insn too much, handle this set from scratch. */
5177 src = SET_SRC (sets[i].rtl);
5179 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5180 However, there is an important exception: If both are registers
5181 that are not the head of their equivalence class, replace SET_SRC
5182 with the head of the class. If we do not do this, we will have
5183 both registers live over a portion of the basic block. This way,
5184 their lifetimes will likely abut instead of overlapping. */
5186 && REGNO_QTY_VALID_P (REGNO (dest)))
5188 int dest_q = REG_QTY (REGNO (dest));
5189 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5191 if (dest_ent->mode == GET_MODE (dest)
5192 && dest_ent->first_reg != REGNO (dest)
5193 && REG_P (src) && REGNO (src) == REGNO (dest)
5194 /* Don't do this if the original insn had a hard reg as
5195 SET_SRC or SET_DEST. */
5196 && (!REG_P (sets[i].src)
5197 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5198 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5199 /* We can't call canon_reg here because it won't do anything if
5200 SRC is a hard register. */
5202 int src_q = REG_QTY (REGNO (src));
5203 struct qty_table_elem *src_ent = &qty_table[src_q];
5204 int first = src_ent->first_reg;
5206 = (first >= FIRST_PSEUDO_REGISTER
5207 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5209 /* We must use validate-change even for this, because this
5210 might be a special no-op instruction, suitable only to
5212 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5215 /* If we had a constant that is cheaper than what we are now
5216 setting SRC to, use that constant. We ignored it when we
5217 thought we could make this into a no-op. */
5218 if (src_const && COST (src_const) < COST (src)
5219 && validate_change (insn, &SET_SRC (sets[i].rtl),
5226 /* If we made a change, recompute SRC values. */
5227 if (src != sets[i].src)
5230 hash_arg_in_memory = 0;
5232 sets[i].src_hash = HASH (src, mode);
5233 sets[i].src_volatile = do_not_record;
5234 sets[i].src_in_memory = hash_arg_in_memory;
5235 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5238 /* If this is a single SET, we are setting a register, and we have an
5239 equivalent constant, we want to add a REG_NOTE. We don't want
5240 to write a REG_EQUAL note for a constant pseudo since verifying that
5241 that pseudo hasn't been eliminated is a pain. Such a note also
5242 won't help anything.
5244 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5245 which can be created for a reference to a compile time computable
5246 entry in a jump table. */
5248 if (n_sets == 1 && src_const && REG_P (dest)
5249 && !REG_P (src_const)
5250 && ! (GET_CODE (src_const) == CONST
5251 && GET_CODE (XEXP (src_const, 0)) == MINUS
5252 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5253 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5255 /* We only want a REG_EQUAL note if src_const != src. */
5256 if (! rtx_equal_p (src, src_const))
5258 /* Make sure that the rtx is not shared. */
5259 src_const = copy_rtx (src_const);
5261 /* Record the actual constant value in a REG_EQUAL note,
5262 making a new one if one does not already exist. */
5263 set_unique_reg_note (insn, REG_EQUAL, src_const);
5264 df_notes_rescan (insn);
5268 /* Now deal with the destination. */
5271 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5272 while (GET_CODE (dest) == SUBREG
5273 || GET_CODE (dest) == ZERO_EXTRACT
5274 || GET_CODE (dest) == STRICT_LOW_PART)
5275 dest = XEXP (dest, 0);
5277 sets[i].inner_dest = dest;
5281 #ifdef PUSH_ROUNDING
5282 /* Stack pushes invalidate the stack pointer. */
5283 rtx addr = XEXP (dest, 0);
5284 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5285 && XEXP (addr, 0) == stack_pointer_rtx)
5286 invalidate (stack_pointer_rtx, VOIDmode);
5288 dest = fold_rtx (dest, insn);
5291 /* Compute the hash code of the destination now,
5292 before the effects of this instruction are recorded,
5293 since the register values used in the address computation
5294 are those before this instruction. */
5295 sets[i].dest_hash = HASH (dest, mode);
5297 /* Don't enter a bit-field in the hash table
5298 because the value in it after the store
5299 may not equal what was stored, due to truncation. */
5301 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5303 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5305 if (src_const != 0 && CONST_INT_P (src_const)
5306 && CONST_INT_P (width)
5307 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5308 && ! (INTVAL (src_const)
5309 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5310 /* Exception: if the value is constant,
5311 and it won't be truncated, record it. */
5315 /* This is chosen so that the destination will be invalidated
5316 but no new value will be recorded.
5317 We must invalidate because sometimes constant
5318 values can be recorded for bitfields. */
5319 sets[i].src_elt = 0;
5320 sets[i].src_volatile = 1;
5326 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5328 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5330 /* One less use of the label this insn used to jump to. */
5331 delete_insn_and_edges (insn);
5332 cse_jumps_altered = true;
5333 /* No more processing for this set. */
5337 /* If this SET is now setting PC to a label, we know it used to
5338 be a conditional or computed branch. */
5339 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5340 && !LABEL_REF_NONLOCAL_P (src))
5342 /* We reemit the jump in as many cases as possible just in
5343 case the form of an unconditional jump is significantly
5344 different than a computed jump or conditional jump.
5346 If this insn has multiple sets, then reemitting the
5347 jump is nontrivial. So instead we just force rerecognition
5348 and hope for the best. */
5353 new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5354 JUMP_LABEL (new_rtx) = XEXP (src, 0);
5355 LABEL_NUSES (XEXP (src, 0))++;
5357 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5358 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5361 XEXP (note, 1) = NULL_RTX;
5362 REG_NOTES (new_rtx) = note;
5365 delete_insn_and_edges (insn);
5369 INSN_CODE (insn) = -1;
5371 /* Do not bother deleting any unreachable code, let jump do it. */
5372 cse_jumps_altered = true;
5376 /* If destination is volatile, invalidate it and then do no further
5377 processing for this assignment. */
5379 else if (do_not_record)
5381 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5382 invalidate (dest, VOIDmode);
5383 else if (MEM_P (dest))
5384 invalidate (dest, VOIDmode);
5385 else if (GET_CODE (dest) == STRICT_LOW_PART
5386 || GET_CODE (dest) == ZERO_EXTRACT)
5387 invalidate (XEXP (dest, 0), GET_MODE (dest));
5391 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5392 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5395 /* If setting CC0, record what it was set to, or a constant, if it
5396 is equivalent to a constant. If it is being set to a floating-point
5397 value, make a COMPARE with the appropriate constant of 0. If we
5398 don't do this, later code can interpret this as a test against
5399 const0_rtx, which can cause problems if we try to put it into an
5400 insn as a floating-point operand. */
5401 if (dest == cc0_rtx)
5403 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5404 this_insn_cc0_mode = mode;
5405 if (FLOAT_MODE_P (mode))
5406 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5412 /* Now enter all non-volatile source expressions in the hash table
5413 if they are not already present.
5414 Record their equivalence classes in src_elt.
5415 This way we can insert the corresponding destinations into
5416 the same classes even if the actual sources are no longer in them
5417 (having been invalidated). */
5419 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5420 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5422 struct table_elt *elt;
5423 struct table_elt *classp = sets[0].src_elt;
5424 rtx dest = SET_DEST (sets[0].rtl);
5425 enum machine_mode eqvmode = GET_MODE (dest);
5427 if (GET_CODE (dest) == STRICT_LOW_PART)
5429 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5432 if (insert_regs (src_eqv, classp, 0))
5434 rehash_using_reg (src_eqv);
5435 src_eqv_hash = HASH (src_eqv, eqvmode);
5437 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5438 elt->in_memory = src_eqv_in_memory;
5441 /* Check to see if src_eqv_elt is the same as a set source which
5442 does not yet have an elt, and if so set the elt of the set source
5444 for (i = 0; i < n_sets; i++)
5445 if (sets[i].rtl && sets[i].src_elt == 0
5446 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5447 sets[i].src_elt = src_eqv_elt;
5450 for (i = 0; i < n_sets; i++)
5451 if (sets[i].rtl && ! sets[i].src_volatile
5452 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5454 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5456 /* REG_EQUAL in setting a STRICT_LOW_PART
5457 gives an equivalent for the entire destination register,
5458 not just for the subreg being stored in now.
5459 This is a more interesting equivalence, so we arrange later
5460 to treat the entire reg as the destination. */
5461 sets[i].src_elt = src_eqv_elt;
5462 sets[i].src_hash = src_eqv_hash;
5466 /* Insert source and constant equivalent into hash table, if not
5468 struct table_elt *classp = src_eqv_elt;
5469 rtx src = sets[i].src;
5470 rtx dest = SET_DEST (sets[i].rtl);
5471 enum machine_mode mode
5472 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5474 /* It's possible that we have a source value known to be
5475 constant but don't have a REG_EQUAL note on the insn.
5476 Lack of a note will mean src_eqv_elt will be NULL. This
5477 can happen where we've generated a SUBREG to access a
5478 CONST_INT that is already in a register in a wider mode.
5479 Ensure that the source expression is put in the proper
5482 classp = sets[i].src_const_elt;
5484 if (sets[i].src_elt == 0)
5486 struct table_elt *elt;
5488 /* Note that these insert_regs calls cannot remove
5489 any of the src_elt's, because they would have failed to
5490 match if not still valid. */
5491 if (insert_regs (src, classp, 0))
5493 rehash_using_reg (src);
5494 sets[i].src_hash = HASH (src, mode);
5496 elt = insert (src, classp, sets[i].src_hash, mode);
5497 elt->in_memory = sets[i].src_in_memory;
5498 sets[i].src_elt = classp = elt;
5500 if (sets[i].src_const && sets[i].src_const_elt == 0
5501 && src != sets[i].src_const
5502 && ! rtx_equal_p (sets[i].src_const, src))
5503 sets[i].src_elt = insert (sets[i].src_const, classp,
5504 sets[i].src_const_hash, mode);
5507 else if (sets[i].src_elt == 0)
5508 /* If we did not insert the source into the hash table (e.g., it was
5509 volatile), note the equivalence class for the REG_EQUAL value, if any,
5510 so that the destination goes into that class. */
5511 sets[i].src_elt = src_eqv_elt;
5513 /* Record destination addresses in the hash table. This allows us to
5514 check if they are invalidated by other sets. */
5515 for (i = 0; i < n_sets; i++)
5519 rtx x = sets[i].inner_dest;
5520 struct table_elt *elt;
5521 enum machine_mode mode;
5527 mode = GET_MODE (x);
5528 hash = HASH (x, mode);
5529 elt = lookup (x, hash, mode);
5532 if (insert_regs (x, NULL, 0))
5534 rtx dest = SET_DEST (sets[i].rtl);
5536 rehash_using_reg (x);
5537 hash = HASH (x, mode);
5538 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5540 elt = insert (x, NULL, hash, mode);
5543 sets[i].dest_addr_elt = elt;
5546 sets[i].dest_addr_elt = NULL;
5550 invalidate_from_clobbers (x);
5552 /* Some registers are invalidated by subroutine calls. Memory is
5553 invalidated by non-constant calls. */
5557 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5558 invalidate_memory ();
5559 invalidate_for_call ();
5562 /* Now invalidate everything set by this instruction.
5563 If a SUBREG or other funny destination is being set,
5564 sets[i].rtl is still nonzero, so here we invalidate the reg
5565 a part of which is being set. */
5567 for (i = 0; i < n_sets; i++)
5570 /* We can't use the inner dest, because the mode associated with
5571 a ZERO_EXTRACT is significant. */
5572 rtx dest = SET_DEST (sets[i].rtl);
5574 /* Needed for registers to remove the register from its
5575 previous quantity's chain.
5576 Needed for memory if this is a nonvarying address, unless
5577 we have just done an invalidate_memory that covers even those. */
5578 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5579 invalidate (dest, VOIDmode);
5580 else if (MEM_P (dest))
5581 invalidate (dest, VOIDmode);
5582 else if (GET_CODE (dest) == STRICT_LOW_PART
5583 || GET_CODE (dest) == ZERO_EXTRACT)
5584 invalidate (XEXP (dest, 0), GET_MODE (dest));
5587 /* A volatile ASM invalidates everything. */
5588 if (NONJUMP_INSN_P (insn)
5589 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5590 && MEM_VOLATILE_P (PATTERN (insn)))
5591 flush_hash_table ();
5593 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5594 the regs restored by the longjmp come from a later time
5596 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5598 flush_hash_table ();
5602 /* Make sure registers mentioned in destinations
5603 are safe for use in an expression to be inserted.
5604 This removes from the hash table
5605 any invalid entry that refers to one of these registers.
5607 We don't care about the return value from mention_regs because
5608 we are going to hash the SET_DEST values unconditionally. */
5610 for (i = 0; i < n_sets; i++)
5614 rtx x = SET_DEST (sets[i].rtl);
5620 /* We used to rely on all references to a register becoming
5621 inaccessible when a register changes to a new quantity,
5622 since that changes the hash code. However, that is not
5623 safe, since after HASH_SIZE new quantities we get a
5624 hash 'collision' of a register with its own invalid
5625 entries. And since SUBREGs have been changed not to
5626 change their hash code with the hash code of the register,
5627 it wouldn't work any longer at all. So we have to check
5628 for any invalid references lying around now.
5629 This code is similar to the REG case in mention_regs,
5630 but it knows that reg_tick has been incremented, and
5631 it leaves reg_in_table as -1 . */
5632 unsigned int regno = REGNO (x);
5633 unsigned int endregno = END_REGNO (x);
5636 for (i = regno; i < endregno; i++)
5638 if (REG_IN_TABLE (i) >= 0)
5640 remove_invalid_refs (i);
5641 REG_IN_TABLE (i) = -1;
5648 /* We may have just removed some of the src_elt's from the hash table.
5649 So replace each one with the current head of the same class.
5650 Also check if destination addresses have been removed. */
5652 for (i = 0; i < n_sets; i++)
5655 if (sets[i].dest_addr_elt
5656 && sets[i].dest_addr_elt->first_same_value == 0)
5658 /* The elt was removed, which means this destination is not
5659 valid after this instruction. */
5660 sets[i].rtl = NULL_RTX;
5662 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5663 /* If elt was removed, find current head of same class,
5664 or 0 if nothing remains of that class. */
5666 struct table_elt *elt = sets[i].src_elt;
5668 while (elt && elt->prev_same_value)
5669 elt = elt->prev_same_value;
5671 while (elt && elt->first_same_value == 0)
5672 elt = elt->next_same_value;
5673 sets[i].src_elt = elt ? elt->first_same_value : 0;
5677 /* Now insert the destinations into their equivalence classes. */
5679 for (i = 0; i < n_sets; i++)
5682 rtx dest = SET_DEST (sets[i].rtl);
5683 struct table_elt *elt;
5685 /* Don't record value if we are not supposed to risk allocating
5686 floating-point values in registers that might be wider than
5688 if ((flag_float_store
5690 && FLOAT_MODE_P (GET_MODE (dest)))
5691 /* Don't record BLKmode values, because we don't know the
5692 size of it, and can't be sure that other BLKmode values
5693 have the same or smaller size. */
5694 || GET_MODE (dest) == BLKmode
5695 /* If we didn't put a REG_EQUAL value or a source into the hash
5696 table, there is no point is recording DEST. */
5697 || sets[i].src_elt == 0
5698 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5699 or SIGN_EXTEND, don't record DEST since it can cause
5700 some tracking to be wrong.
5702 ??? Think about this more later. */
5703 || (paradoxical_subreg_p (dest)
5704 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5705 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5708 /* STRICT_LOW_PART isn't part of the value BEING set,
5709 and neither is the SUBREG inside it.
5710 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5711 if (GET_CODE (dest) == STRICT_LOW_PART)
5712 dest = SUBREG_REG (XEXP (dest, 0));
5714 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5715 /* Registers must also be inserted into chains for quantities. */
5716 if (insert_regs (dest, sets[i].src_elt, 1))
5718 /* If `insert_regs' changes something, the hash code must be
5720 rehash_using_reg (dest);
5721 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5724 elt = insert (dest, sets[i].src_elt,
5725 sets[i].dest_hash, GET_MODE (dest));
5727 /* If this is a constant, insert the constant anchors with the
5728 equivalent register-offset expressions using register DEST. */
5729 if (targetm.const_anchor
5731 && SCALAR_INT_MODE_P (GET_MODE (dest))
5732 && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
5733 insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
5735 elt->in_memory = (MEM_P (sets[i].inner_dest)
5736 && !MEM_READONLY_P (sets[i].inner_dest));
5738 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5739 narrower than M2, and both M1 and M2 are the same number of words,
5740 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5741 make that equivalence as well.
5743 However, BAR may have equivalences for which gen_lowpart
5744 will produce a simpler value than gen_lowpart applied to
5745 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5746 BAR's equivalences. If we don't get a simplified form, make
5747 the SUBREG. It will not be used in an equivalence, but will
5748 cause two similar assignments to be detected.
5750 Note the loop below will find SUBREG_REG (DEST) since we have
5751 already entered SRC and DEST of the SET in the table. */
5753 if (GET_CODE (dest) == SUBREG
5754 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5756 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5757 && (GET_MODE_SIZE (GET_MODE (dest))
5758 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5759 && sets[i].src_elt != 0)
5761 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5762 struct table_elt *elt, *classp = 0;
5764 for (elt = sets[i].src_elt->first_same_value; elt;
5765 elt = elt->next_same_value)
5769 struct table_elt *src_elt;
5772 /* Ignore invalid entries. */
5773 if (!REG_P (elt->exp)
5774 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5777 /* We may have already been playing subreg games. If the
5778 mode is already correct for the destination, use it. */
5779 if (GET_MODE (elt->exp) == new_mode)
5783 /* Calculate big endian correction for the SUBREG_BYTE.
5784 We have already checked that M1 (GET_MODE (dest))
5785 is not narrower than M2 (new_mode). */
5786 if (BYTES_BIG_ENDIAN)
5787 byte = (GET_MODE_SIZE (GET_MODE (dest))
5788 - GET_MODE_SIZE (new_mode));
5790 new_src = simplify_gen_subreg (new_mode, elt->exp,
5791 GET_MODE (dest), byte);
5794 /* The call to simplify_gen_subreg fails if the value
5795 is VOIDmode, yet we can't do any simplification, e.g.
5796 for EXPR_LISTs denoting function call results.
5797 It is invalid to construct a SUBREG with a VOIDmode
5798 SUBREG_REG, hence a zero new_src means we can't do
5799 this substitution. */
5803 src_hash = HASH (new_src, new_mode);
5804 src_elt = lookup (new_src, src_hash, new_mode);
5806 /* Put the new source in the hash table is if isn't
5810 if (insert_regs (new_src, classp, 0))
5812 rehash_using_reg (new_src);
5813 src_hash = HASH (new_src, new_mode);
5815 src_elt = insert (new_src, classp, src_hash, new_mode);
5816 src_elt->in_memory = elt->in_memory;
5818 else if (classp && classp != src_elt->first_same_value)
5819 /* Show that two things that we've seen before are
5820 actually the same. */
5821 merge_equiv_classes (src_elt, classp);
5823 classp = src_elt->first_same_value;
5824 /* Ignore invalid entries. */
5826 && !REG_P (classp->exp)
5827 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5828 classp = classp->next_same_value;
5833 /* Special handling for (set REG0 REG1) where REG0 is the
5834 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5835 be used in the sequel, so (if easily done) change this insn to
5836 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5837 that computed their value. Then REG1 will become a dead store
5838 and won't cloud the situation for later optimizations.
5840 Do not make this change if REG1 is a hard register, because it will
5841 then be used in the sequel and we may be changing a two-operand insn
5842 into a three-operand insn.
5844 Also do not do this if we are operating on a copy of INSN. */
5846 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
5847 && NEXT_INSN (PREV_INSN (insn)) == insn
5848 && REG_P (SET_SRC (sets[0].rtl))
5849 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5850 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5852 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5853 struct qty_table_elem *src_ent = &qty_table[src_q];
5855 if (src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5857 /* Scan for the previous nonnote insn, but stop at a basic
5860 rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
5863 prev = PREV_INSN (prev);
5865 while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
5867 /* Do not swap the registers around if the previous instruction
5868 attaches a REG_EQUIV note to REG1.
5870 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5871 from the pseudo that originally shadowed an incoming argument
5872 to another register. Some uses of REG_EQUIV might rely on it
5873 being attached to REG1 rather than REG2.
5875 This section previously turned the REG_EQUIV into a REG_EQUAL
5876 note. We cannot do that because REG_EQUIV may provide an
5877 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5878 if (NONJUMP_INSN_P (prev)
5879 && GET_CODE (PATTERN (prev)) == SET
5880 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
5881 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
5883 rtx dest = SET_DEST (sets[0].rtl);
5884 rtx src = SET_SRC (sets[0].rtl);
5887 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
5888 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
5889 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
5890 apply_change_group ();
5892 /* If INSN has a REG_EQUAL note, and this note mentions
5893 REG0, then we must delete it, because the value in
5894 REG0 has changed. If the note's value is REG1, we must
5895 also delete it because that is now this insn's dest. */
5896 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5898 && (reg_mentioned_p (dest, XEXP (note, 0))
5899 || rtx_equal_p (src, XEXP (note, 0))))
5900 remove_note (insn, note);
5908 /* Remove from the hash table all expressions that reference memory. */
5911 invalidate_memory (void)
5914 struct table_elt *p, *next;
5916 for (i = 0; i < HASH_SIZE; i++)
5917 for (p = table[i]; p; p = next)
5919 next = p->next_same_hash;
5921 remove_from_table (p, i);
5925 /* Perform invalidation on the basis of everything about an insn
5926 except for invalidating the actual places that are SET in it.
5927 This includes the places CLOBBERed, and anything that might
5928 alias with something that is SET or CLOBBERed.
5930 X is the pattern of the insn. */
5933 invalidate_from_clobbers (rtx x)
5935 if (GET_CODE (x) == CLOBBER)
5937 rtx ref = XEXP (x, 0);
5940 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5942 invalidate (ref, VOIDmode);
5943 else if (GET_CODE (ref) == STRICT_LOW_PART
5944 || GET_CODE (ref) == ZERO_EXTRACT)
5945 invalidate (XEXP (ref, 0), GET_MODE (ref));
5948 else if (GET_CODE (x) == PARALLEL)
5951 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5953 rtx y = XVECEXP (x, 0, i);
5954 if (GET_CODE (y) == CLOBBER)
5956 rtx ref = XEXP (y, 0);
5957 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5959 invalidate (ref, VOIDmode);
5960 else if (GET_CODE (ref) == STRICT_LOW_PART
5961 || GET_CODE (ref) == ZERO_EXTRACT)
5962 invalidate (XEXP (ref, 0), GET_MODE (ref));
5968 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5969 and replace any registers in them with either an equivalent constant
5970 or the canonical form of the register. If we are inside an address,
5971 only do this if the address remains valid.
5973 OBJECT is 0 except when within a MEM in which case it is the MEM.
5975 Return the replacement for X. */
5978 cse_process_notes_1 (rtx x, rtx object, bool *changed)
5980 enum rtx_code code = GET_CODE (x);
5981 const char *fmt = GET_RTX_FORMAT (code);
5999 validate_change (x, &XEXP (x, 0),
6000 cse_process_notes (XEXP (x, 0), x, changed), 0);
6005 if (REG_NOTE_KIND (x) == REG_EQUAL)
6006 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
6008 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
6015 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
6016 /* We don't substitute VOIDmode constants into these rtx,
6017 since they would impede folding. */
6018 if (GET_MODE (new_rtx) != VOIDmode)
6019 validate_change (object, &XEXP (x, 0), new_rtx, 0);
6024 i = REG_QTY (REGNO (x));
6026 /* Return a constant or a constant register. */
6027 if (REGNO_QTY_VALID_P (REGNO (x)))
6029 struct qty_table_elem *ent = &qty_table[i];
6031 if (ent->const_rtx != NULL_RTX
6032 && (CONSTANT_P (ent->const_rtx)
6033 || REG_P (ent->const_rtx)))
6035 rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6037 return copy_rtx (new_rtx);
6041 /* Otherwise, canonicalize this register. */
6042 return canon_reg (x, NULL_RTX);
6048 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6050 validate_change (object, &XEXP (x, i),
6051 cse_process_notes (XEXP (x, i), object, changed), 0);
6057 cse_process_notes (rtx x, rtx object, bool *changed)
6059 rtx new_rtx = cse_process_notes_1 (x, object, changed);
6066 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6068 DATA is a pointer to a struct cse_basic_block_data, that is used to
6070 It is filled with a queue of basic blocks, starting with FIRST_BB
6071 and following a trace through the CFG.
6073 If all paths starting at FIRST_BB have been followed, or no new path
6074 starting at FIRST_BB can be constructed, this function returns FALSE.
6075 Otherwise, DATA->path is filled and the function returns TRUE indicating
6076 that a path to follow was found.
6078 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6079 block in the path will be FIRST_BB. */
6082 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6089 SET_BIT (cse_visited_basic_blocks, first_bb->index);
6091 /* See if there is a previous path. */
6092 path_size = data->path_size;
6094 /* There is a previous path. Make sure it started with FIRST_BB. */
6096 gcc_assert (data->path[0].bb == first_bb);
6098 /* There was only one basic block in the last path. Clear the path and
6099 return, so that paths starting at another basic block can be tried. */
6106 /* If the path was empty from the beginning, construct a new path. */
6108 data->path[path_size++].bb = first_bb;
6111 /* Otherwise, path_size must be equal to or greater than 2, because
6112 a previous path exists that is at least two basic blocks long.
6114 Update the previous branch path, if any. If the last branch was
6115 previously along the branch edge, take the fallthrough edge now. */
6116 while (path_size >= 2)
6118 basic_block last_bb_in_path, previous_bb_in_path;
6122 last_bb_in_path = data->path[path_size].bb;
6123 previous_bb_in_path = data->path[path_size - 1].bb;
6125 /* If we previously followed a path along the branch edge, try
6126 the fallthru edge now. */
6127 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6128 && any_condjump_p (BB_END (previous_bb_in_path))
6129 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6130 && e == BRANCH_EDGE (previous_bb_in_path))
6132 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6133 if (bb != EXIT_BLOCK_PTR
6134 && single_pred_p (bb)
6135 /* We used to assert here that we would only see blocks
6136 that we have not visited yet. But we may end up
6137 visiting basic blocks twice if the CFG has changed
6138 in this run of cse_main, because when the CFG changes
6139 the topological sort of the CFG also changes. A basic
6140 blocks that previously had more than two predecessors
6141 may now have a single predecessor, and become part of
6142 a path that starts at another basic block.
6144 We still want to visit each basic block only once, so
6145 halt the path here if we have already visited BB. */
6146 && !TEST_BIT (cse_visited_basic_blocks, bb->index))
6148 SET_BIT (cse_visited_basic_blocks, bb->index);
6149 data->path[path_size++].bb = bb;
6154 data->path[path_size].bb = NULL;
6157 /* If only one block remains in the path, bail. */
6165 /* Extend the path if possible. */
6168 bb = data->path[path_size - 1].bb;
6169 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
6171 if (single_succ_p (bb))
6172 e = single_succ_edge (bb);
6173 else if (EDGE_COUNT (bb->succs) == 2
6174 && any_condjump_p (BB_END (bb)))
6176 /* First try to follow the branch. If that doesn't lead
6177 to a useful path, follow the fallthru edge. */
6178 e = BRANCH_EDGE (bb);
6179 if (!single_pred_p (e->dest))
6180 e = FALLTHRU_EDGE (bb);
6186 && !((e->flags & EDGE_ABNORMAL_CALL) && cfun->has_nonlocal_label)
6187 && e->dest != EXIT_BLOCK_PTR
6188 && single_pred_p (e->dest)
6189 /* Avoid visiting basic blocks twice. The large comment
6190 above explains why this can happen. */
6191 && !TEST_BIT (cse_visited_basic_blocks, e->dest->index))
6193 basic_block bb2 = e->dest;
6194 SET_BIT (cse_visited_basic_blocks, bb2->index);
6195 data->path[path_size++].bb = bb2;
6204 data->path_size = path_size;
6205 return path_size != 0;
6208 /* Dump the path in DATA to file F. NSETS is the number of sets
6212 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6216 fprintf (f, ";; Following path with %d sets: ", nsets);
6217 for (path_entry = 0; path_entry < data->path_size; path_entry++)
6218 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6219 fputc ('\n', dump_file);
6224 /* Return true if BB has exception handling successor edges. */
6227 have_eh_succ_edges (basic_block bb)
6232 FOR_EACH_EDGE (e, ei, bb->succs)
6233 if (e->flags & EDGE_EH)
6240 /* Scan to the end of the path described by DATA. Return an estimate of
6241 the total number of SETs of all insns in the path. */
6244 cse_prescan_path (struct cse_basic_block_data *data)
6247 int path_size = data->path_size;
6250 /* Scan to end of each basic block in the path. */
6251 for (path_entry = 0; path_entry < path_size; path_entry++)
6256 bb = data->path[path_entry].bb;
6258 FOR_BB_INSNS (bb, insn)
6263 /* A PARALLEL can have lots of SETs in it,
6264 especially if it is really an ASM_OPERANDS. */
6265 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6266 nsets += XVECLEN (PATTERN (insn), 0);
6272 data->nsets = nsets;
6275 /* Process a single extended basic block described by EBB_DATA. */
6278 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6280 int path_size = ebb_data->path_size;
6284 /* Allocate the space needed by qty_table. */
6285 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6288 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6289 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6290 for (path_entry = 0; path_entry < path_size; path_entry++)
6295 bb = ebb_data->path[path_entry].bb;
6297 /* Invalidate recorded information for eh regs if there is an EH
6298 edge pointing to that bb. */
6299 if (bb_has_eh_pred (bb))
6303 for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++)
6305 df_ref def = *def_rec;
6306 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6307 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6311 optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6312 FOR_BB_INSNS (bb, insn)
6314 /* If we have processed 1,000 insns, flush the hash table to
6315 avoid extreme quadratic behavior. We must not include NOTEs
6316 in the count since there may be more of them when generating
6317 debugging information. If we clear the table at different
6318 times, code generated with -g -O might be different than code
6319 generated with -O but not -g.
6321 FIXME: This is a real kludge and needs to be done some other
6323 if (NONDEBUG_INSN_P (insn)
6324 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6326 flush_hash_table ();
6332 /* Process notes first so we have all notes in canonical forms
6333 when looking for duplicate operations. */
6334 if (REG_NOTES (insn))
6336 bool changed = false;
6337 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6338 NULL_RTX, &changed);
6340 df_notes_rescan (insn);
6345 /* If we haven't already found an insn where we added a LABEL_REF,
6347 if (INSN_P (insn) && !recorded_label_ref
6348 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6350 recorded_label_ref = true;
6353 if (NONDEBUG_INSN_P (insn))
6355 /* If the previous insn sets CC0 and this insn no
6356 longer references CC0, delete the previous insn.
6357 Here we use fact that nothing expects CC0 to be
6358 valid over an insn, which is true until the final
6362 prev_insn = prev_nonnote_nondebug_insn (insn);
6363 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6364 && (tem = single_set (prev_insn)) != NULL_RTX
6365 && SET_DEST (tem) == cc0_rtx
6366 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6367 delete_insn (prev_insn);
6369 /* If this insn is not the last insn in the basic
6370 block, it will be PREV_INSN(insn) in the next
6371 iteration. If we recorded any CC0-related
6372 information for this insn, remember it. */
6373 if (insn != BB_END (bb))
6375 prev_insn_cc0 = this_insn_cc0;
6376 prev_insn_cc0_mode = this_insn_cc0_mode;
6383 /* With non-call exceptions, we are not always able to update
6384 the CFG properly inside cse_insn. So clean up possibly
6385 redundant EH edges here. */
6386 if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6387 cse_cfg_altered |= purge_dead_edges (bb);
6389 /* If we changed a conditional jump, we may have terminated
6390 the path we are following. Check that by verifying that
6391 the edge we would take still exists. If the edge does
6392 not exist anymore, purge the remainder of the path.
6393 Note that this will cause us to return to the caller. */
6394 if (path_entry < path_size - 1)
6396 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6397 if (!find_edge (bb, next_bb))
6403 /* If we truncate the path, we must also reset the
6404 visited bit on the remaining blocks in the path,
6405 or we will never visit them at all. */
6406 RESET_BIT (cse_visited_basic_blocks,
6407 ebb_data->path[path_size].bb->index);
6408 ebb_data->path[path_size].bb = NULL;
6410 while (path_size - 1 != path_entry);
6411 ebb_data->path_size = path_size;
6415 /* If this is a conditional jump insn, record any known
6416 equivalences due to the condition being tested. */
6418 if (path_entry < path_size - 1
6420 && single_set (insn)
6421 && any_condjump_p (insn))
6423 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6424 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6425 record_jump_equiv (insn, taken);
6429 /* Clear the CC0-tracking related insns, they can't provide
6430 useful information across basic block boundaries. */
6435 gcc_assert (next_qty <= max_qty);
6441 /* Perform cse on the instructions of a function.
6442 F is the first instruction.
6443 NREGS is one plus the highest pseudo-reg number used in the instruction.
6445 Return 2 if jump optimizations should be redone due to simplifications
6446 in conditional jump instructions.
6447 Return 1 if the CFG should be cleaned up because it has been modified.
6448 Return 0 otherwise. */
6451 cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
6453 struct cse_basic_block_data ebb_data;
6455 int *rc_order = XNEWVEC (int, last_basic_block);
6458 df_set_flags (DF_LR_RUN_DCE);
6460 df_set_flags (DF_DEFER_INSN_RESCAN);
6462 reg_scan (get_insns (), max_reg_num ());
6463 init_cse_reg_info (nregs);
6465 ebb_data.path = XNEWVEC (struct branch_path,
6466 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6468 cse_cfg_altered = false;
6469 cse_jumps_altered = false;
6470 recorded_label_ref = false;
6471 constant_pool_entries_cost = 0;
6472 constant_pool_entries_regcost = 0;
6473 ebb_data.path_size = 0;
6475 rtl_hooks = cse_rtl_hooks;
6478 init_alias_analysis ();
6480 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6482 /* Set up the table of already visited basic blocks. */
6483 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block);
6484 sbitmap_zero (cse_visited_basic_blocks);
6486 /* Loop over basic blocks in reverse completion order (RPO),
6487 excluding the ENTRY and EXIT blocks. */
6488 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6490 while (i < n_blocks)
6492 /* Find the first block in the RPO queue that we have not yet
6493 processed before. */
6496 bb = BASIC_BLOCK (rc_order[i++]);
6498 while (TEST_BIT (cse_visited_basic_blocks, bb->index)
6501 /* Find all paths starting with BB, and process them. */
6502 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6504 /* Pre-scan the path. */
6505 cse_prescan_path (&ebb_data);
6507 /* If this basic block has no sets, skip it. */
6508 if (ebb_data.nsets == 0)
6511 /* Get a reasonable estimate for the maximum number of qty's
6512 needed for this path. For this, we take the number of sets
6513 and multiply that by MAX_RECOG_OPERANDS. */
6514 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6516 /* Dump the path we're about to process. */
6518 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6520 cse_extended_basic_block (&ebb_data);
6525 end_alias_analysis ();
6526 free (reg_eqv_table);
6527 free (ebb_data.path);
6528 sbitmap_free (cse_visited_basic_blocks);
6530 rtl_hooks = general_rtl_hooks;
6532 if (cse_jumps_altered || recorded_label_ref)
6534 else if (cse_cfg_altered)
6540 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6541 which there isn't a REG_LABEL_OPERAND note.
6542 Return one if so. DATA is the insn. */
6545 check_for_label_ref (rtx *rtl, void *data)
6547 rtx insn = (rtx) data;
6549 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6550 note for it, we must rerun jump since it needs to place the note. If
6551 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6552 don't do this since no REG_LABEL_OPERAND will be added. */
6553 return (GET_CODE (*rtl) == LABEL_REF
6554 && ! LABEL_REF_NONLOCAL_P (*rtl)
6556 || !label_is_jump_target_p (XEXP (*rtl, 0), insn))
6557 && LABEL_P (XEXP (*rtl, 0))
6558 && INSN_UID (XEXP (*rtl, 0)) != 0
6559 && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0)));
6562 /* Count the number of times registers are used (not set) in X.
6563 COUNTS is an array in which we accumulate the count, INCR is how much
6564 we count each register usage.
6566 Don't count a usage of DEST, which is the SET_DEST of a SET which
6567 contains X in its SET_SRC. This is because such a SET does not
6568 modify the liveness of DEST.
6569 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6570 We must then count uses of a SET_DEST regardless, because the insn can't be
6574 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6584 switch (code = GET_CODE (x))
6588 counts[REGNO (x)] += incr;
6603 /* If we are clobbering a MEM, mark any registers inside the address
6605 if (MEM_P (XEXP (x, 0)))
6606 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6610 /* Unless we are setting a REG, count everything in SET_DEST. */
6611 if (!REG_P (SET_DEST (x)))
6612 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6613 count_reg_usage (SET_SRC (x), counts,
6614 dest ? dest : SET_DEST (x),
6624 /* We expect dest to be NULL_RTX here. If the insn may trap,
6625 or if it cannot be deleted due to side-effects, mark this fact
6626 by setting DEST to pc_rtx. */
6627 if (insn_could_throw_p (x) || side_effects_p (PATTERN (x)))
6629 if (code == CALL_INSN)
6630 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6631 count_reg_usage (PATTERN (x), counts, dest, incr);
6633 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6636 note = find_reg_equal_equiv_note (x);
6639 rtx eqv = XEXP (note, 0);
6641 if (GET_CODE (eqv) == EXPR_LIST)
6642 /* This REG_EQUAL note describes the result of a function call.
6643 Process all the arguments. */
6646 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6647 eqv = XEXP (eqv, 1);
6649 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6651 count_reg_usage (eqv, counts, dest, incr);
6656 if (REG_NOTE_KIND (x) == REG_EQUAL
6657 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6658 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6659 involving registers in the address. */
6660 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6661 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6663 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6667 /* Iterate over just the inputs, not the constraints as well. */
6668 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6669 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6679 fmt = GET_RTX_FORMAT (code);
6680 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6683 count_reg_usage (XEXP (x, i), counts, dest, incr);
6684 else if (fmt[i] == 'E')
6685 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6686 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6690 /* Return true if X is a dead register. */
6693 is_dead_reg (rtx x, int *counts)
6696 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6697 && counts[REGNO (x)] == 0);
6700 /* Return true if set is live. */
6702 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6709 if (set_noop_p (set))
6713 else if (GET_CODE (SET_DEST (set)) == CC0
6714 && !side_effects_p (SET_SRC (set))
6715 && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX
6717 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6720 else if (!is_dead_reg (SET_DEST (set), counts)
6721 || side_effects_p (SET_SRC (set)))
6726 /* Return true if insn is live. */
6729 insn_live_p (rtx insn, int *counts)
6732 if (insn_could_throw_p (insn))
6734 else if (GET_CODE (PATTERN (insn)) == SET)
6735 return set_live_p (PATTERN (insn), insn, counts);
6736 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6738 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6740 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6742 if (GET_CODE (elt) == SET)
6744 if (set_live_p (elt, insn, counts))
6747 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6752 else if (DEBUG_INSN_P (insn))
6756 for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next))
6759 else if (!DEBUG_INSN_P (next))
6761 else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next))
6770 /* Count the number of stores into pseudo. Callback for note_stores. */
6773 count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6775 int *counts = (int *) data;
6776 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6777 counts[REGNO (x)]++;
6780 struct dead_debug_insn_data
6787 /* Return if a DEBUG_INSN needs to be reset because some dead
6788 pseudo doesn't have a replacement. Callback for for_each_rtx. */
6791 is_dead_debug_insn (rtx *loc, void *data)
6794 struct dead_debug_insn_data *ddid = (struct dead_debug_insn_data *) data;
6796 if (is_dead_reg (x, ddid->counts))
6798 if (ddid->replacements && ddid->replacements[REGNO (x)] != NULL_RTX)
6799 ddid->seen_repl = true;
6806 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6807 Callback for simplify_replace_fn_rtx. */
6810 replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
6812 rtx *replacements = (rtx *) data;
6815 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6816 && replacements[REGNO (x)] != NULL_RTX)
6818 if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
6819 return replacements[REGNO (x)];
6820 return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
6821 GET_MODE (replacements[REGNO (x)]));
6826 /* Scan all the insns and delete any that are dead; i.e., they store a register
6827 that is never used or they copy a register to itself.
6829 This is used to remove insns made obviously dead by cse, loop or other
6830 optimizations. It improves the heuristics in loop since it won't try to
6831 move dead invariants out of loops or make givs for dead quantities. The
6832 remaining passes of the compilation are also sped up. */
6835 delete_trivially_dead_insns (rtx insns, int nreg)
6839 rtx *replacements = NULL;
6842 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6843 /* First count the number of times each register is used. */
6844 if (MAY_HAVE_DEBUG_INSNS)
6846 counts = XCNEWVEC (int, nreg * 3);
6847 for (insn = insns; insn; insn = NEXT_INSN (insn))
6848 if (DEBUG_INSN_P (insn))
6849 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6851 else if (INSN_P (insn))
6853 count_reg_usage (insn, counts, NULL_RTX, 1);
6854 note_stores (PATTERN (insn), count_stores, counts + nreg * 2);
6856 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6857 First one counts how many times each pseudo is used outside
6858 of debug insns, second counts how many times each pseudo is
6859 used in debug insns and third counts how many times a pseudo
6864 counts = XCNEWVEC (int, nreg);
6865 for (insn = insns; insn; insn = NEXT_INSN (insn))
6867 count_reg_usage (insn, counts, NULL_RTX, 1);
6868 /* If no debug insns can be present, COUNTS is just an array
6869 which counts how many times each pseudo is used. */
6871 /* Go from the last insn to the first and delete insns that only set unused
6872 registers or copy a register to itself. As we delete an insn, remove
6873 usage counts for registers it uses.
6875 The first jump optimization pass may leave a real insn as the last
6876 insn in the function. We must not skip that insn or we may end
6877 up deleting code that is not really dead.
6879 If some otherwise unused register is only used in DEBUG_INSNs,
6880 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6881 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6882 has been created for the unused register, replace it with
6883 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6884 for (insn = get_last_insn (); insn; insn = prev)
6888 prev = PREV_INSN (insn);
6892 live_insn = insn_live_p (insn, counts);
6894 /* If this is a dead insn, delete it and show registers in it aren't
6897 if (! live_insn && dbg_cnt (delete_trivial_dead))
6899 if (DEBUG_INSN_P (insn))
6900 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6905 if (MAY_HAVE_DEBUG_INSNS
6906 && (set = single_set (insn)) != NULL_RTX
6907 && is_dead_reg (SET_DEST (set), counts)
6908 /* Used at least once in some DEBUG_INSN. */
6909 && counts[REGNO (SET_DEST (set)) + nreg] > 0
6910 /* And set exactly once. */
6911 && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
6912 && !side_effects_p (SET_SRC (set))
6913 && asm_noperands (PATTERN (insn)) < 0)
6917 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
6918 dval = make_debug_expr_from_rtl (SET_DEST (set));
6920 /* Emit a debug bind insn before the insn in which
6922 bind = gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
6923 DEBUG_EXPR_TREE_DECL (dval),
6925 VAR_INIT_STATUS_INITIALIZED);
6926 count_reg_usage (bind, counts + nreg, NULL_RTX, 1);
6928 bind = emit_debug_insn_before (bind, insn);
6929 df_insn_rescan (bind);
6931 if (replacements == NULL)
6932 replacements = XCNEWVEC (rtx, nreg);
6933 replacements[REGNO (SET_DEST (set))] = dval;
6936 count_reg_usage (insn, counts, NULL_RTX, -1);
6939 delete_insn_and_edges (insn);
6943 if (MAY_HAVE_DEBUG_INSNS)
6945 struct dead_debug_insn_data ddid;
6946 ddid.counts = counts;
6947 ddid.replacements = replacements;
6948 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
6949 if (DEBUG_INSN_P (insn))
6951 /* If this debug insn references a dead register that wasn't replaced
6952 with an DEBUG_EXPR, reset the DEBUG_INSN. */
6953 ddid.seen_repl = false;
6954 if (for_each_rtx (&INSN_VAR_LOCATION_LOC (insn),
6955 is_dead_debug_insn, &ddid))
6957 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
6958 df_insn_rescan (insn);
6960 else if (ddid.seen_repl)
6962 INSN_VAR_LOCATION_LOC (insn)
6963 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
6964 NULL_RTX, replace_dead_reg,
6966 df_insn_rescan (insn);
6969 free (replacements);
6972 if (dump_file && ndead)
6973 fprintf (dump_file, "Deleted %i trivially dead insns\n",
6977 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
6981 /* This function is called via for_each_rtx. The argument, NEWREG, is
6982 a condition code register with the desired mode. If we are looking
6983 at the same register in a different mode, replace it with
6987 cse_change_cc_mode (rtx *loc, void *data)
6989 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
6993 && REGNO (*loc) == REGNO (args->newreg)
6994 && GET_MODE (*loc) != GET_MODE (args->newreg))
6996 validate_change (args->insn, loc, args->newreg, 1);
7003 /* Change the mode of any reference to the register REGNO (NEWREG) to
7004 GET_MODE (NEWREG) in INSN. */
7007 cse_change_cc_mode_insn (rtx insn, rtx newreg)
7009 struct change_cc_mode_args args;
7016 args.newreg = newreg;
7018 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
7019 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args);
7021 /* If the following assertion was triggered, there is most probably
7022 something wrong with the cc_modes_compatible back end function.
7023 CC modes only can be considered compatible if the insn - with the mode
7024 replaced by any of the compatible modes - can still be recognized. */
7025 success = apply_change_group ();
7026 gcc_assert (success);
7029 /* Change the mode of any reference to the register REGNO (NEWREG) to
7030 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7031 any instruction which modifies NEWREG. */
7034 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7038 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7040 if (! INSN_P (insn))
7043 if (reg_set_p (newreg, insn))
7046 cse_change_cc_mode_insn (insn, newreg);
7050 /* BB is a basic block which finishes with CC_REG as a condition code
7051 register which is set to CC_SRC. Look through the successors of BB
7052 to find blocks which have a single predecessor (i.e., this one),
7053 and look through those blocks for an assignment to CC_REG which is
7054 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7055 permitted to change the mode of CC_SRC to a compatible mode. This
7056 returns VOIDmode if no equivalent assignments were found.
7057 Otherwise it returns the mode which CC_SRC should wind up with.
7058 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7059 but is passed unmodified down to recursive calls in order to prevent
7062 The main complexity in this function is handling the mode issues.
7063 We may have more than one duplicate which we can eliminate, and we
7064 try to find a mode which will work for multiple duplicates. */
7066 static enum machine_mode
7067 cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7068 bool can_change_mode)
7071 enum machine_mode mode;
7072 unsigned int insn_count;
7075 enum machine_mode modes[2];
7081 /* We expect to have two successors. Look at both before picking
7082 the final mode for the comparison. If we have more successors
7083 (i.e., some sort of table jump, although that seems unlikely),
7084 then we require all beyond the first two to use the same
7087 found_equiv = false;
7088 mode = GET_MODE (cc_src);
7090 FOR_EACH_EDGE (e, ei, bb->succs)
7095 if (e->flags & EDGE_COMPLEX)
7098 if (EDGE_COUNT (e->dest->preds) != 1
7099 || e->dest == EXIT_BLOCK_PTR
7100 /* Avoid endless recursion on unreachable blocks. */
7101 || e->dest == orig_bb)
7104 end = NEXT_INSN (BB_END (e->dest));
7105 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7109 if (! INSN_P (insn))
7112 /* If CC_SRC is modified, we have to stop looking for
7113 something which uses it. */
7114 if (modified_in_p (cc_src, insn))
7117 /* Check whether INSN sets CC_REG to CC_SRC. */
7118 set = single_set (insn);
7120 && REG_P (SET_DEST (set))
7121 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7124 enum machine_mode set_mode;
7125 enum machine_mode comp_mode;
7128 set_mode = GET_MODE (SET_SRC (set));
7129 comp_mode = set_mode;
7130 if (rtx_equal_p (cc_src, SET_SRC (set)))
7132 else if (GET_CODE (cc_src) == COMPARE
7133 && GET_CODE (SET_SRC (set)) == COMPARE
7135 && rtx_equal_p (XEXP (cc_src, 0),
7136 XEXP (SET_SRC (set), 0))
7137 && rtx_equal_p (XEXP (cc_src, 1),
7138 XEXP (SET_SRC (set), 1)))
7141 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7142 if (comp_mode != VOIDmode
7143 && (can_change_mode || comp_mode == mode))
7150 if (insn_count < ARRAY_SIZE (insns))
7152 insns[insn_count] = insn;
7153 modes[insn_count] = set_mode;
7154 last_insns[insn_count] = end;
7157 if (mode != comp_mode)
7159 gcc_assert (can_change_mode);
7162 /* The modified insn will be re-recognized later. */
7163 PUT_MODE (cc_src, mode);
7168 if (set_mode != mode)
7170 /* We found a matching expression in the
7171 wrong mode, but we don't have room to
7172 store it in the array. Punt. This case
7176 /* INSN sets CC_REG to a value equal to CC_SRC
7177 with the right mode. We can simply delete
7182 /* We found an instruction to delete. Keep looking,
7183 in the hopes of finding a three-way jump. */
7187 /* We found an instruction which sets the condition
7188 code, so don't look any farther. */
7192 /* If INSN sets CC_REG in some other way, don't look any
7194 if (reg_set_p (cc_reg, insn))
7198 /* If we fell off the bottom of the block, we can keep looking
7199 through successors. We pass CAN_CHANGE_MODE as false because
7200 we aren't prepared to handle compatibility between the
7201 further blocks and this block. */
7204 enum machine_mode submode;
7206 submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7207 if (submode != VOIDmode)
7209 gcc_assert (submode == mode);
7211 can_change_mode = false;
7219 /* Now INSN_COUNT is the number of instructions we found which set
7220 CC_REG to a value equivalent to CC_SRC. The instructions are in
7221 INSNS. The modes used by those instructions are in MODES. */
7224 for (i = 0; i < insn_count; ++i)
7226 if (modes[i] != mode)
7228 /* We need to change the mode of CC_REG in INSNS[i] and
7229 subsequent instructions. */
7232 if (GET_MODE (cc_reg) == mode)
7235 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7237 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7241 delete_insn_and_edges (insns[i]);
7247 /* If we have a fixed condition code register (or two), walk through
7248 the instructions and try to eliminate duplicate assignments. */
7251 cse_condition_code_reg (void)
7253 unsigned int cc_regno_1;
7254 unsigned int cc_regno_2;
7259 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7262 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7263 if (cc_regno_2 != INVALID_REGNUM)
7264 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7266 cc_reg_2 = NULL_RTX;
7275 enum machine_mode mode;
7276 enum machine_mode orig_mode;
7278 /* Look for blocks which end with a conditional jump based on a
7279 condition code register. Then look for the instruction which
7280 sets the condition code register. Then look through the
7281 successor blocks for instructions which set the condition
7282 code register to the same value. There are other possible
7283 uses of the condition code register, but these are by far the
7284 most common and the ones which we are most likely to be able
7287 last_insn = BB_END (bb);
7288 if (!JUMP_P (last_insn))
7291 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7293 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7298 cc_src_insn = NULL_RTX;
7300 for (insn = PREV_INSN (last_insn);
7301 insn && insn != PREV_INSN (BB_HEAD (bb));
7302 insn = PREV_INSN (insn))
7306 if (! INSN_P (insn))
7308 set = single_set (insn);
7310 && REG_P (SET_DEST (set))
7311 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7314 cc_src = SET_SRC (set);
7317 else if (reg_set_p (cc_reg, insn))
7324 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7327 /* Now CC_REG is a condition code register used for a
7328 conditional jump at the end of the block, and CC_SRC, in
7329 CC_SRC_INSN, is the value to which that condition code
7330 register is set, and CC_SRC is still meaningful at the end of
7333 orig_mode = GET_MODE (cc_src);
7334 mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7335 if (mode != VOIDmode)
7337 gcc_assert (mode == GET_MODE (cc_src));
7338 if (mode != orig_mode)
7340 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7342 cse_change_cc_mode_insn (cc_src_insn, newreg);
7344 /* Do the same in the following insns that use the
7345 current value of CC_REG within BB. */
7346 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7347 NEXT_INSN (last_insn),
7355 /* Perform common subexpression elimination. Nonzero value from
7356 `cse_main' means that jumps were simplified and some code may now
7357 be unreachable, so do jump optimization again. */
7359 gate_handle_cse (void)
7361 return optimize > 0;
7365 rest_of_handle_cse (void)
7370 dump_flow_info (dump_file, dump_flags);
7372 tem = cse_main (get_insns (), max_reg_num ());
7374 /* If we are not running more CSE passes, then we are no longer
7375 expecting CSE to be run. But always rerun it in a cheap mode. */
7376 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7380 timevar_push (TV_JUMP);
7381 rebuild_jump_labels (get_insns ());
7383 timevar_pop (TV_JUMP);
7385 else if (tem == 1 || optimize > 1)
7391 struct rtl_opt_pass pass_cse =
7396 gate_handle_cse, /* gate */
7397 rest_of_handle_cse, /* execute */
7400 0, /* static_pass_number */
7402 0, /* properties_required */
7403 0, /* properties_provided */
7404 0, /* properties_destroyed */
7405 0, /* todo_flags_start */
7406 TODO_df_finish | TODO_verify_rtl_sharing |
7408 TODO_verify_flow, /* todo_flags_finish */
7414 gate_handle_cse2 (void)
7416 return optimize > 0 && flag_rerun_cse_after_loop;
7419 /* Run second CSE pass after loop optimizations. */
7421 rest_of_handle_cse2 (void)
7426 dump_flow_info (dump_file, dump_flags);
7428 tem = cse_main (get_insns (), max_reg_num ());
7430 /* Run a pass to eliminate duplicated assignments to condition code
7431 registers. We have to run this after bypass_jumps, because it
7432 makes it harder for that pass to determine whether a jump can be
7434 cse_condition_code_reg ();
7436 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7440 timevar_push (TV_JUMP);
7441 rebuild_jump_labels (get_insns ());
7443 timevar_pop (TV_JUMP);
7448 cse_not_expected = 1;
7453 struct rtl_opt_pass pass_cse2 =
7458 gate_handle_cse2, /* gate */
7459 rest_of_handle_cse2, /* execute */
7462 0, /* static_pass_number */
7463 TV_CSE2, /* tv_id */
7464 0, /* properties_required */
7465 0, /* properties_provided */
7466 0, /* properties_destroyed */
7467 0, /* todo_flags_start */
7468 TODO_df_finish | TODO_verify_rtl_sharing |
7470 TODO_verify_flow /* todo_flags_finish */
7475 gate_handle_cse_after_global_opts (void)
7477 return optimize > 0 && flag_rerun_cse_after_global_opts;
7480 /* Run second CSE pass after loop optimizations. */
7482 rest_of_handle_cse_after_global_opts (void)
7487 /* We only want to do local CSE, so don't follow jumps. */
7488 save_cfj = flag_cse_follow_jumps;
7489 flag_cse_follow_jumps = 0;
7491 rebuild_jump_labels (get_insns ());
7492 tem = cse_main (get_insns (), max_reg_num ());
7493 purge_all_dead_edges ();
7494 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7496 cse_not_expected = !flag_rerun_cse_after_loop;
7498 /* If cse altered any jumps, rerun jump opts to clean things up. */
7501 timevar_push (TV_JUMP);
7502 rebuild_jump_labels (get_insns ());
7504 timevar_pop (TV_JUMP);
7509 flag_cse_follow_jumps = save_cfj;
7513 struct rtl_opt_pass pass_cse_after_global_opts =
7517 "cse_local", /* name */
7518 gate_handle_cse_after_global_opts, /* gate */
7519 rest_of_handle_cse_after_global_opts, /* execute */
7522 0, /* static_pass_number */
7524 0, /* properties_required */
7525 0, /* properties_provided */
7526 0, /* properties_destroyed */
7527 0, /* todo_flags_start */
7528 TODO_df_finish | TODO_verify_rtl_sharing |
7530 TODO_verify_flow /* todo_flags_finish */