1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
37 #include "splay-tree.h"
39 /* The basic idea of common subexpression elimination is to go
40 through the code, keeping a record of expressions that would
41 have the same value at the current scan point, and replacing
42 expressions encountered with the cheapest equivalent expression.
44 It is too complicated to keep track of the different possibilities
45 when control paths merge; so, at each label, we forget all that is
46 known and start fresh. This can be described as processing each
47 basic block separately. Note, however, that these are not quite
48 the same as the basic blocks found by a later pass and used for
49 data flow analysis and register packing. We do not need to start fresh
50 after a conditional jump instruction if there is no label there.
52 We use two data structures to record the equivalent expressions:
53 a hash table for most expressions, and several vectors together
54 with "quantity numbers" to record equivalent (pseudo) registers.
56 The use of the special data structure for registers is desirable
57 because it is faster. It is possible because registers references
58 contain a fairly small number, the register number, taken from
59 a contiguously allocated series, and two register references are
60 identical if they have the same number. General expressions
61 do not have any such thing, so the only way to retrieve the
62 information recorded on an expression other than a register
63 is to keep it in a hash table.
65 Registers and "quantity numbers":
67 At the start of each basic block, all of the (hardware and pseudo)
68 registers used in the function are given distinct quantity
69 numbers to indicate their contents. During scan, when the code
70 copies one register into another, we copy the quantity number.
71 When a register is loaded in any other way, we allocate a new
72 quantity number to describe the value generated by this operation.
73 `reg_qty' records what quantity a register is currently thought
76 All real quantity numbers are greater than or equal to `max_reg'.
77 If register N has not been assigned a quantity, reg_qty[N] will equal N.
79 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
80 variables should be referenced with an index below `max_reg'.
82 We also maintain a bidirectional chain of registers for each
83 quantity number. `qty_first_reg', `qty_last_reg',
84 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
86 The first register in a chain is the one whose lifespan is least local.
87 Among equals, it is the one that was seen first.
88 We replace any equivalent register with that one.
90 If two registers have the same quantity number, it must be true that
91 REG expressions with `qty_mode' must be in the hash table for both
92 registers and must be in the same class.
94 The converse is not true. Since hard registers may be referenced in
95 any mode, two REG expressions might be equivalent in the hash table
96 but not have the same quantity number if the quantity number of one
97 of the registers is not the same mode as those expressions.
99 Constants and quantity numbers
101 When a quantity has a known constant value, that value is stored
102 in the appropriate element of qty_const. This is in addition to
103 putting the constant in the hash table as is usual for non-regs.
105 Whether a reg or a constant is preferred is determined by the configuration
106 macro CONST_COSTS and will often depend on the constant value. In any
107 event, expressions containing constants can be simplified, by fold_rtx.
109 When a quantity has a known nearly constant value (such as an address
110 of a stack slot), that value is stored in the appropriate element
113 Integer constants don't have a machine mode. However, cse
114 determines the intended machine mode from the destination
115 of the instruction that moves the constant. The machine mode
116 is recorded in the hash table along with the actual RTL
117 constant expression so that different modes are kept separate.
121 To record known equivalences among expressions in general
122 we use a hash table called `table'. It has a fixed number of buckets
123 that contain chains of `struct table_elt' elements for expressions.
124 These chains connect the elements whose expressions have the same
127 Other chains through the same elements connect the elements which
128 currently have equivalent values.
130 Register references in an expression are canonicalized before hashing
131 the expression. This is done using `reg_qty' and `qty_first_reg'.
132 The hash code of a register reference is computed using the quantity
133 number, not the register number.
135 When the value of an expression changes, it is necessary to remove from the
136 hash table not just that expression but all expressions whose values
137 could be different as a result.
139 1. If the value changing is in memory, except in special cases
140 ANYTHING referring to memory could be changed. That is because
141 nobody knows where a pointer does not point.
142 The function `invalidate_memory' removes what is necessary.
144 The special cases are when the address is constant or is
145 a constant plus a fixed register such as the frame pointer
146 or a static chain pointer. When such addresses are stored in,
147 we can tell exactly which other such addresses must be invalidated
148 due to overlap. `invalidate' does this.
149 All expressions that refer to non-constant
150 memory addresses are also invalidated. `invalidate_memory' does this.
152 2. If the value changing is a register, all expressions
153 containing references to that register, and only those,
156 Because searching the entire hash table for expressions that contain
157 a register is very slow, we try to figure out when it isn't necessary.
158 Precisely, this is necessary only when expressions have been
159 entered in the hash table using this register, and then the value has
160 changed, and then another expression wants to be added to refer to
161 the register's new value. This sequence of circumstances is rare
162 within any one basic block.
164 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
165 reg_tick[i] is incremented whenever a value is stored in register i.
166 reg_in_table[i] holds -1 if no references to register i have been
167 entered in the table; otherwise, it contains the value reg_tick[i] had
168 when the references were entered. If we want to enter a reference
169 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
170 Until we want to enter a new entry, the mere fact that the two vectors
171 don't match makes the entries be ignored if anyone tries to match them.
173 Registers themselves are entered in the hash table as well as in
174 the equivalent-register chains. However, the vectors `reg_tick'
175 and `reg_in_table' do not apply to expressions which are simple
176 register references. These expressions are removed from the table
177 immediately when they become invalid, and this can be done even if
178 we do not immediately search for all the expressions that refer to
181 A CLOBBER rtx in an instruction invalidates its operand for further
182 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
183 invalidates everything that resides in memory.
187 Constant expressions that differ only by an additive integer
188 are called related. When a constant expression is put in
189 the table, the related expression with no constant term
190 is also entered. These are made to point at each other
191 so that it is possible to find out if there exists any
192 register equivalent to an expression related to a given expression. */
194 /* One plus largest register number used in this function. */
198 /* One plus largest instruction UID used in this function at time of
201 static int max_insn_uid;
203 /* Length of vectors indexed by quantity number.
204 We know in advance we will not need a quantity number this big. */
208 /* Next quantity number to be allocated.
209 This is 1 + the largest number needed so far. */
213 /* Indexed by quantity number, gives the first (or last) register
214 in the chain of registers that currently contain this quantity. */
216 static int *qty_first_reg;
217 static int *qty_last_reg;
219 /* Index by quantity number, gives the mode of the quantity. */
221 static enum machine_mode *qty_mode;
223 /* Indexed by quantity number, gives the rtx of the constant value of the
224 quantity, or zero if it does not have a known value.
225 A sum of the frame pointer (or arg pointer) plus a constant
226 can also be entered here. */
228 static rtx *qty_const;
230 /* Indexed by qty number, gives the insn that stored the constant value
231 recorded in `qty_const'. */
233 static rtx *qty_const_insn;
235 /* The next three variables are used to track when a comparison between a
236 quantity and some constant or register has been passed. In that case, we
237 know the results of the comparison in case we see it again. These variables
238 record a comparison that is known to be true. */
240 /* Indexed by qty number, gives the rtx code of a comparison with a known
241 result involving this quantity. If none, it is UNKNOWN. */
242 static enum rtx_code *qty_comparison_code;
244 /* Indexed by qty number, gives the constant being compared against in a
245 comparison of known result. If no such comparison, it is undefined.
246 If the comparison is not with a constant, it is zero. */
248 static rtx *qty_comparison_const;
250 /* Indexed by qty number, gives the quantity being compared against in a
251 comparison of known result. If no such comparison, if it undefined.
252 If the comparison is not with a register, it is -1. */
254 static int *qty_comparison_qty;
257 /* For machines that have a CC0, we do not record its value in the hash
258 table since its use is guaranteed to be the insn immediately following
259 its definition and any other insn is presumed to invalidate it.
261 Instead, we store below the value last assigned to CC0. If it should
262 happen to be a constant, it is stored in preference to the actual
263 assigned value. In case it is a constant, we store the mode in which
264 the constant should be interpreted. */
266 static rtx prev_insn_cc0;
267 static enum machine_mode prev_insn_cc0_mode;
270 /* Previous actual insn. 0 if at first insn of basic block. */
272 static rtx prev_insn;
274 /* Insn being scanned. */
276 static rtx this_insn;
278 /* Index by register number, gives the number of the next (or
279 previous) register in the chain of registers sharing the same
282 Or -1 if this register is at the end of the chain.
284 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
286 static int *reg_next_eqv;
287 static int *reg_prev_eqv;
289 struct cse_reg_info {
291 /* The number of times the register has been altered in the current
295 /* The next cse_reg_info structure in the free list. */
296 struct cse_reg_info* next;
299 /* The REG_TICK value at which rtx's containing this register are
300 valid in the hash table. If this does not equal the current
301 reg_tick value, such expressions existing in the hash table are
305 /* The quantity number of the register's current contents. */
309 /* A free list of cse_reg_info entries. */
310 static struct cse_reg_info *cse_reg_info_free_list;
312 /* A mapping from registers to cse_reg_info data structures. */
313 static splay_tree cse_reg_info_tree;
315 /* The last lookup we did into the cse_reg_info_tree. This allows us
316 to cache repeated lookups. */
317 static int cached_regno;
318 static struct cse_reg_info *cached_cse_reg_info;
320 /* A HARD_REG_SET containing all the hard registers for which there is
321 currently a REG expression in the hash table. Note the difference
322 from the above variables, which indicate if the REG is mentioned in some
323 expression in the table. */
325 static HARD_REG_SET hard_regs_in_table;
327 /* A HARD_REG_SET containing all the hard registers that are invalidated
330 static HARD_REG_SET regs_invalidated_by_call;
332 /* CUID of insn that starts the basic block currently being cse-processed. */
334 static int cse_basic_block_start;
336 /* CUID of insn that ends the basic block currently being cse-processed. */
338 static int cse_basic_block_end;
340 /* Vector mapping INSN_UIDs to cuids.
341 The cuids are like uids but increase monotonically always.
342 We use them to see whether a reg is used outside a given basic block. */
344 static int *uid_cuid;
346 /* Highest UID in UID_CUID. */
349 /* Get the cuid of an insn. */
351 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
353 /* Nonzero if cse has altered conditional jump insns
354 in such a way that jump optimization should be redone. */
356 static int cse_jumps_altered;
358 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
359 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
360 to put in the note. */
361 static int recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
367 static int do_not_record;
369 #ifdef LOAD_EXTEND_OP
371 /* Scratch rtl used when looking for load-extended copy of a MEM. */
372 static rtx memory_extend_rtx;
375 /* canon_hash stores 1 in hash_arg_in_memory
376 if it notices a reference to memory within the expression being hashed. */
378 static int hash_arg_in_memory;
380 /* canon_hash stores 1 in hash_arg_in_struct
381 if it notices a reference to memory that's part of a structure. */
383 static int hash_arg_in_struct;
385 /* The hash table contains buckets which are chains of `struct table_elt's,
386 each recording one expression's information.
387 That expression is in the `exp' field.
389 Those elements with the same hash code are chained in both directions
390 through the `next_same_hash' and `prev_same_hash' fields.
392 Each set of expressions with equivalent values
393 are on a two-way chain through the `next_same_value'
394 and `prev_same_value' fields, and all point with
395 the `first_same_value' field at the first element in
396 that chain. The chain is in order of increasing cost.
397 Each element's cost value is in its `cost' field.
399 The `in_memory' field is nonzero for elements that
400 involve any reference to memory. These elements are removed
401 whenever a write is done to an unidentified location in memory.
402 To be safe, we assume that a memory address is unidentified unless
403 the address is either a symbol constant or a constant plus
404 the frame pointer or argument pointer.
406 The `in_struct' field is nonzero for elements that
407 involve any reference to memory inside a structure or array.
409 The `related_value' field is used to connect related expressions
410 (that differ by adding an integer).
411 The related expressions are chained in a circular fashion.
412 `related_value' is zero for expressions for which this
415 The `cost' field stores the cost of this element's expression.
417 The `is_const' flag is set if the element is a constant (including
420 The `flag' field is used as a temporary during some search routines.
422 The `mode' field is usually the same as GET_MODE (`exp'), but
423 if `exp' is a CONST_INT and has no machine mode then the `mode'
424 field is the mode it was being used as. Each constant is
425 recorded separately for each mode it is used with. */
431 struct table_elt *next_same_hash;
432 struct table_elt *prev_same_hash;
433 struct table_elt *next_same_value;
434 struct table_elt *prev_same_value;
435 struct table_elt *first_same_value;
436 struct table_elt *related_value;
438 enum machine_mode mode;
445 /* We don't want a lot of buckets, because we rarely have very many
446 things stored in the hash table, and a lot of buckets slows
447 down a lot of loops that happen frequently. */
450 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
451 register (hard registers may require `do_not_record' to be set). */
454 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
455 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
456 : canon_hash (X, M) % NBUCKETS)
458 /* Determine whether register number N is considered a fixed register for CSE.
459 It is desirable to replace other regs with fixed regs, to reduce need for
461 A reg wins if it is either the frame pointer or designated as fixed,
462 but not if it is an overlapping register. */
463 #ifdef OVERLAPPING_REGNO_P
464 #define FIXED_REGNO_P(N) \
465 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N]) \
467 && ! OVERLAPPING_REGNO_P ((N)))
469 #define FIXED_REGNO_P(N) \
470 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
471 || fixed_regs[N] || global_regs[N])
474 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
475 hard registers and pointers into the frame are the cheapest with a cost
476 of 0. Next come pseudos with a cost of one and other hard registers with
477 a cost of 2. Aside from these special cases, call `rtx_cost'. */
479 #define CHEAP_REGNO(N) \
480 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
481 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
482 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
483 || ((N) < FIRST_PSEUDO_REGISTER \
484 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
486 /* A register is cheap if it is a user variable assigned to the register
487 or if its register number always corresponds to a cheap register. */
489 #define CHEAP_REG(N) \
490 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
491 || CHEAP_REGNO (REGNO (N)))
494 (GET_CODE (X) == REG \
495 ? (CHEAP_REG (X) ? 0 \
496 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
500 /* Get the info associated with register N. */
502 #define GET_CSE_REG_INFO(N) \
503 (((N) == cached_regno && cached_cse_reg_info) \
504 ? cached_cse_reg_info : get_cse_reg_info ((N)))
506 /* Get the number of times this register has been updated in this
509 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->variant.reg_tick)
511 /* Get the point at which REG was recorded in the table. */
513 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
515 /* Get the quantity number for REG. */
517 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
519 /* Determine if the quantity number for register X represents a valid index
520 into the `qty_...' variables. */
522 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
525 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
526 during CSE, such nodes are present. Using an ADDRESSOF node which
527 refers to the address of a REG is a good thing because we can then
528 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
529 #define CSE_ADDRESS_COST(RTX) \
530 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
531 ? -1 : ADDRESS_COST(RTX))
534 static struct table_elt *table[NBUCKETS];
536 /* Chain of `struct table_elt's made so far for this function
537 but currently removed from the table. */
539 static struct table_elt *free_element_chain;
541 /* Number of `struct table_elt' structures made so far for this function. */
543 static int n_elements_made;
545 /* Maximum value `n_elements_made' has had so far in this compilation
546 for functions previously processed. */
548 static int max_elements_made;
550 /* Surviving equivalence class when two equivalence classes are merged
551 by recording the effects of a jump in the last insn. Zero if the
552 last insn was not a conditional jump. */
554 static struct table_elt *last_jump_equiv_class;
556 /* Set to the cost of a constant pool reference if one was found for a
557 symbolic constant. If this was found, it means we should try to
558 convert constants into constant pool entries if they don't fit in
561 static int constant_pool_entries_cost;
563 /* Define maximum length of a branch path. */
565 #define PATHLENGTH 10
567 /* This data describes a block that will be processed by cse_basic_block. */
569 struct cse_basic_block_data {
570 /* Lowest CUID value of insns in block. */
572 /* Highest CUID value of insns in block. */
574 /* Total number of SETs in block. */
576 /* Last insn in the block. */
578 /* Size of current branch path, if any. */
580 /* Current branch path, indicating which branches will be taken. */
582 /* The branch insn. */
584 /* Whether it should be taken or not. AROUND is the same as taken
585 except that it is used when the destination label is not preceded
587 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
591 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
592 virtual regs here because the simplify_*_operation routines are called
593 by integrate.c, which is called before virtual register instantiation. */
595 #define FIXED_BASE_PLUS_P(X) \
596 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
597 || (X) == arg_pointer_rtx \
598 || (X) == virtual_stack_vars_rtx \
599 || (X) == virtual_incoming_args_rtx \
600 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
601 && (XEXP (X, 0) == frame_pointer_rtx \
602 || XEXP (X, 0) == hard_frame_pointer_rtx \
603 || XEXP (X, 0) == arg_pointer_rtx \
604 || XEXP (X, 0) == virtual_stack_vars_rtx \
605 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
606 || GET_CODE (X) == ADDRESSOF)
608 /* Similar, but also allows reference to the stack pointer.
610 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
611 arg_pointer_rtx by itself is nonzero, because on at least one machine,
612 the i960, the arg pointer is zero when it is unused. */
614 #define NONZERO_BASE_PLUS_P(X) \
615 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
616 || (X) == virtual_stack_vars_rtx \
617 || (X) == virtual_incoming_args_rtx \
618 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
619 && (XEXP (X, 0) == frame_pointer_rtx \
620 || XEXP (X, 0) == hard_frame_pointer_rtx \
621 || XEXP (X, 0) == arg_pointer_rtx \
622 || XEXP (X, 0) == virtual_stack_vars_rtx \
623 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
624 || (X) == stack_pointer_rtx \
625 || (X) == virtual_stack_dynamic_rtx \
626 || (X) == virtual_outgoing_args_rtx \
627 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
628 && (XEXP (X, 0) == stack_pointer_rtx \
629 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
630 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
631 || GET_CODE (X) == ADDRESSOF)
633 static int notreg_cost PROTO((rtx));
634 static void new_basic_block PROTO((void));
635 static void make_new_qty PROTO((int));
636 static void make_regs_eqv PROTO((int, int));
637 static void delete_reg_equiv PROTO((int));
638 static int mention_regs PROTO((rtx));
639 static int insert_regs PROTO((rtx, struct table_elt *, int));
640 static void free_element PROTO((struct table_elt *));
641 static void remove_from_table PROTO((struct table_elt *, unsigned));
642 static struct table_elt *get_element PROTO((void));
643 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
644 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
645 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
646 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
648 static void merge_equiv_classes PROTO((struct table_elt *,
649 struct table_elt *));
650 static void invalidate PROTO((rtx, enum machine_mode));
651 static int cse_rtx_varies_p PROTO((rtx));
652 static void remove_invalid_refs PROTO((int));
653 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
654 static void rehash_using_reg PROTO((rtx));
655 static void invalidate_memory PROTO((void));
656 static void invalidate_for_call PROTO((void));
657 static rtx use_related_value PROTO((rtx, struct table_elt *));
658 static unsigned canon_hash PROTO((rtx, enum machine_mode));
659 static unsigned safe_hash PROTO((rtx, enum machine_mode));
660 static int exp_equiv_p PROTO((rtx, rtx, int, int));
661 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
664 static int refers_to_p PROTO((rtx, rtx));
665 static rtx canon_reg PROTO((rtx, rtx));
666 static void find_best_addr PROTO((rtx, rtx *));
667 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
669 enum machine_mode *));
670 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
672 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
674 static rtx fold_rtx PROTO((rtx, rtx));
675 static rtx equiv_constant PROTO((rtx));
676 static void record_jump_equiv PROTO((rtx, int));
677 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
679 static void cse_insn PROTO((rtx, rtx));
680 static int note_mem_written PROTO((rtx));
681 static void invalidate_from_clobbers PROTO((rtx));
682 static rtx cse_process_notes PROTO((rtx, rtx));
683 static void cse_around_loop PROTO((rtx));
684 static void invalidate_skipped_set PROTO((rtx, rtx));
685 static void invalidate_skipped_block PROTO((rtx));
686 static void cse_check_loop_start PROTO((rtx, rtx));
687 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
688 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
689 static void count_reg_usage PROTO((rtx, int *, rtx, int));
690 extern void dump_class PROTO((struct table_elt*));
691 static void check_fold_consts PROTO((PTR));
692 static struct cse_reg_info* get_cse_reg_info PROTO((int));
693 static void free_cse_reg_info PROTO((splay_tree_value));
694 static void flush_hash_table PROTO((void));
696 extern int rtx_equal_function_value_matters;
698 /* Dump the expressions in the equivalence class indicated by CLASSP.
699 This function is used only for debugging. */
702 struct table_elt *classp;
704 struct table_elt *elt;
706 fprintf (stderr, "Equivalence chain for ");
707 print_rtl (stderr, classp->exp);
708 fprintf (stderr, ": \n");
710 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
712 print_rtl (stderr, elt->exp);
713 fprintf (stderr, "\n");
717 /* Return an estimate of the cost of computing rtx X.
718 One use is in cse, to decide which expression to keep in the hash table.
719 Another is in rtl generation, to pick the cheapest way to multiply.
720 Other uses like the latter are expected in the future. */
722 /* Internal function, to compute cost when X is not a register; called
723 from COST macro to keep it simple. */
729 return ((GET_CODE (x) == SUBREG
730 && GET_CODE (SUBREG_REG (x)) == REG
731 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
732 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
733 && (GET_MODE_SIZE (GET_MODE (x))
734 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
735 && subreg_lowpart_p (x)
736 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
737 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
738 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
739 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
741 : rtx_cost (x, SET) * 2);
744 /* Return the right cost to give to an operation
745 to make the cost of the corresponding register-to-register instruction
746 N times that of a fast register-to-register instruction. */
748 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
751 rtx_cost (x, outer_code)
753 enum rtx_code outer_code ATTRIBUTE_UNUSED;
756 register enum rtx_code code;
763 /* Compute the default costs of certain things.
764 Note that RTX_COSTS can override the defaults. */
770 /* Count multiplication by 2**n as a shift,
771 because if we are considering it, we would output it as a shift. */
772 if (GET_CODE (XEXP (x, 1)) == CONST_INT
773 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
776 total = COSTS_N_INSNS (5);
782 total = COSTS_N_INSNS (7);
785 /* Used in loop.c and combine.c as a marker. */
789 /* We don't want these to be used in substitutions because
790 we have no way of validating the resulting insn. So assign
791 anything containing an ASM_OPERANDS a very high cost. */
801 return ! CHEAP_REG (x);
804 /* If we can't tie these modes, make this expensive. The larger
805 the mode, the more expensive it is. */
806 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
807 return COSTS_N_INSNS (2
808 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
811 RTX_COSTS (x, code, outer_code);
814 CONST_COSTS (x, code, outer_code);
818 #ifdef DEFAULT_RTX_COSTS
819 DEFAULT_RTX_COSTS(x, code, outer_code);
824 /* Sum the costs of the sub-rtx's, plus cost of this operation,
825 which is already in total. */
827 fmt = GET_RTX_FORMAT (code);
828 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
830 total += rtx_cost (XEXP (x, i), code);
831 else if (fmt[i] == 'E')
832 for (j = 0; j < XVECLEN (x, i); j++)
833 total += rtx_cost (XVECEXP (x, i, j), code);
838 static struct cse_reg_info *
839 get_cse_reg_info (regno)
842 struct cse_reg_info *cri;
845 /* See if we already have this entry. */
846 n = splay_tree_lookup (cse_reg_info_tree,
847 (splay_tree_key) regno);
849 cri = (struct cse_reg_info *) (n->value);
852 /* Get a new cse_reg_info structure. */
853 if (cse_reg_info_free_list)
855 cri = cse_reg_info_free_list;
856 cse_reg_info_free_list = cri->variant.next;
859 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
862 cri->variant.reg_tick = 0;
863 cri->reg_in_table = -1;
864 cri->reg_qty = regno;
866 splay_tree_insert (cse_reg_info_tree,
867 (splay_tree_key) regno,
868 (splay_tree_value) cri);
871 /* Cache this lookup; we tend to be looking up information about the
872 same register several times in a row. */
873 cached_regno = regno;
874 cached_cse_reg_info = cri;
880 free_cse_reg_info (v)
883 struct cse_reg_info *cri = (struct cse_reg_info *) v;
885 cri->variant.next = cse_reg_info_free_list;
886 cse_reg_info_free_list = cri;
889 /* Clear the hash table and initialize each register with its own quantity,
890 for a new basic block. */
899 if (cse_reg_info_tree)
901 splay_tree_delete (cse_reg_info_tree);
902 cached_cse_reg_info = 0;
905 cse_reg_info_tree = splay_tree_new (splay_tree_compare_ints, 0,
908 CLEAR_HARD_REG_SET (hard_regs_in_table);
910 /* The per-quantity values used to be initialized here, but it is
911 much faster to initialize each as it is made in `make_new_qty'. */
913 for (i = 0; i < NBUCKETS; i++)
915 register struct table_elt *this, *next;
916 for (this = table[i]; this; this = next)
918 next = this->next_same_hash;
923 bzero ((char *) table, sizeof table);
932 /* Say that register REG contains a quantity not in any register before
933 and initialize that quantity. */
941 if (next_qty >= max_qty)
944 q = REG_QTY (reg) = next_qty++;
945 qty_first_reg[q] = reg;
946 qty_last_reg[q] = reg;
947 qty_const[q] = qty_const_insn[q] = 0;
948 qty_comparison_code[q] = UNKNOWN;
950 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
953 /* Make reg NEW equivalent to reg OLD.
954 OLD is not changing; NEW is. */
957 make_regs_eqv (new, old)
958 register int new, old;
960 register int lastr, firstr;
961 register int q = REG_QTY (old);
963 /* Nothing should become eqv until it has a "non-invalid" qty number. */
964 if (! REGNO_QTY_VALID_P (old))
968 firstr = qty_first_reg[q];
969 lastr = qty_last_reg[q];
971 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
972 hard regs. Among pseudos, if NEW will live longer than any other reg
973 of the same qty, and that is beyond the current basic block,
974 make it the new canonical replacement for this qty. */
975 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
976 /* Certain fixed registers might be of the class NO_REGS. This means
977 that not only can they not be allocated by the compiler, but
978 they cannot be used in substitutions or canonicalizations
980 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
981 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
982 || (new >= FIRST_PSEUDO_REGISTER
983 && (firstr < FIRST_PSEUDO_REGISTER
984 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
985 || (uid_cuid[REGNO_FIRST_UID (new)]
986 < cse_basic_block_start))
987 && (uid_cuid[REGNO_LAST_UID (new)]
988 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
990 reg_prev_eqv[firstr] = new;
991 reg_next_eqv[new] = firstr;
992 reg_prev_eqv[new] = -1;
993 qty_first_reg[q] = new;
997 /* If NEW is a hard reg (known to be non-fixed), insert at end.
998 Otherwise, insert before any non-fixed hard regs that are at the
999 end. Registers of class NO_REGS cannot be used as an
1000 equivalent for anything. */
1001 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1002 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1003 && new >= FIRST_PSEUDO_REGISTER)
1004 lastr = reg_prev_eqv[lastr];
1005 reg_next_eqv[new] = reg_next_eqv[lastr];
1006 if (reg_next_eqv[lastr] >= 0)
1007 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1009 qty_last_reg[q] = new;
1010 reg_next_eqv[lastr] = new;
1011 reg_prev_eqv[new] = lastr;
1015 /* Remove REG from its equivalence class. */
1018 delete_reg_equiv (reg)
1021 register int q = REG_QTY (reg);
1024 /* If invalid, do nothing. */
1028 p = reg_prev_eqv[reg];
1029 n = reg_next_eqv[reg];
1032 reg_prev_eqv[n] = p;
1034 qty_last_reg[q] = p;
1036 reg_next_eqv[p] = n;
1038 qty_first_reg[q] = n;
1040 REG_QTY (reg) = reg;
1043 /* Remove any invalid expressions from the hash table
1044 that refer to any of the registers contained in expression X.
1046 Make sure that newly inserted references to those registers
1047 as subexpressions will be considered valid.
1049 mention_regs is not called when a register itself
1050 is being stored in the table.
1052 Return 1 if we have done something that may have changed the hash code
1059 register enum rtx_code code;
1062 register int changed = 0;
1067 code = GET_CODE (x);
1070 register int regno = REGNO (x);
1071 register int endregno
1072 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1073 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1076 for (i = regno; i < endregno; i++)
1078 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1079 remove_invalid_refs (i);
1081 REG_IN_TABLE (i) = REG_TICK (i);
1087 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1088 pseudo if they don't use overlapping words. We handle only pseudos
1089 here for simplicity. */
1090 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1091 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1093 int i = REGNO (SUBREG_REG (x));
1095 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1097 /* If reg_tick has been incremented more than once since
1098 reg_in_table was last set, that means that the entire
1099 register has been set before, so discard anything memorized
1100 for the entrire register, including all SUBREG expressions. */
1101 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1102 remove_invalid_refs (i);
1104 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1107 REG_IN_TABLE (i) = REG_TICK (i);
1111 /* If X is a comparison or a COMPARE and either operand is a register
1112 that does not have a quantity, give it one. This is so that a later
1113 call to record_jump_equiv won't cause X to be assigned a different
1114 hash code and not found in the table after that call.
1116 It is not necessary to do this here, since rehash_using_reg can
1117 fix up the table later, but doing this here eliminates the need to
1118 call that expensive function in the most common case where the only
1119 use of the register is in the comparison. */
1121 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1123 if (GET_CODE (XEXP (x, 0)) == REG
1124 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1125 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1127 rehash_using_reg (XEXP (x, 0));
1131 if (GET_CODE (XEXP (x, 1)) == REG
1132 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1133 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1135 rehash_using_reg (XEXP (x, 1));
1140 fmt = GET_RTX_FORMAT (code);
1141 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1143 changed |= mention_regs (XEXP (x, i));
1144 else if (fmt[i] == 'E')
1145 for (j = 0; j < XVECLEN (x, i); j++)
1146 changed |= mention_regs (XVECEXP (x, i, j));
1151 /* Update the register quantities for inserting X into the hash table
1152 with a value equivalent to CLASSP.
1153 (If the class does not contain a REG, it is irrelevant.)
1154 If MODIFIED is nonzero, X is a destination; it is being modified.
1155 Note that delete_reg_equiv should be called on a register
1156 before insert_regs is done on that register with MODIFIED != 0.
1158 Nonzero value means that elements of reg_qty have changed
1159 so X's hash code may be different. */
1162 insert_regs (x, classp, modified)
1164 struct table_elt *classp;
1167 if (GET_CODE (x) == REG)
1169 register int regno = REGNO (x);
1171 /* If REGNO is in the equivalence table already but is of the
1172 wrong mode for that equivalence, don't do anything here. */
1174 if (REGNO_QTY_VALID_P (regno)
1175 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1178 if (modified || ! REGNO_QTY_VALID_P (regno))
1181 for (classp = classp->first_same_value;
1183 classp = classp->next_same_value)
1184 if (GET_CODE (classp->exp) == REG
1185 && GET_MODE (classp->exp) == GET_MODE (x))
1187 make_regs_eqv (regno, REGNO (classp->exp));
1191 make_new_qty (regno);
1192 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1199 /* If X is a SUBREG, we will likely be inserting the inner register in the
1200 table. If that register doesn't have an assigned quantity number at
1201 this point but does later, the insertion that we will be doing now will
1202 not be accessible because its hash code will have changed. So assign
1203 a quantity number now. */
1205 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1206 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1208 int regno = REGNO (SUBREG_REG (x));
1210 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1211 /* Mention_regs checks if REG_TICK is exactly one larger than
1212 REG_IN_TABLE to find out if there was only a single preceding
1213 invalidation - for the SUBREG - or another one, which would be
1214 for the full register. Since we don't invalidate the SUBREG
1215 here first, we might have to bump up REG_TICK so that mention_regs
1216 will do the right thing. */
1217 if (REG_IN_TABLE (regno) >= 0
1218 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1224 return mention_regs (x);
1227 /* Look in or update the hash table. */
1229 /* Put the element ELT on the list of free elements. */
1233 struct table_elt *elt;
1235 elt->next_same_hash = free_element_chain;
1236 free_element_chain = elt;
1239 /* Return an element that is free for use. */
1241 static struct table_elt *
1244 struct table_elt *elt = free_element_chain;
1247 free_element_chain = elt->next_same_hash;
1251 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1254 /* Remove table element ELT from use in the table.
1255 HASH is its hash code, made using the HASH macro.
1256 It's an argument because often that is known in advance
1257 and we save much time not recomputing it. */
1260 remove_from_table (elt, hash)
1261 register struct table_elt *elt;
1267 /* Mark this element as removed. See cse_insn. */
1268 elt->first_same_value = 0;
1270 /* Remove the table element from its equivalence class. */
1273 register struct table_elt *prev = elt->prev_same_value;
1274 register struct table_elt *next = elt->next_same_value;
1276 if (next) next->prev_same_value = prev;
1279 prev->next_same_value = next;
1282 register struct table_elt *newfirst = next;
1285 next->first_same_value = newfirst;
1286 next = next->next_same_value;
1291 /* Remove the table element from its hash bucket. */
1294 register struct table_elt *prev = elt->prev_same_hash;
1295 register struct table_elt *next = elt->next_same_hash;
1297 if (next) next->prev_same_hash = prev;
1300 prev->next_same_hash = next;
1301 else if (table[hash] == elt)
1305 /* This entry is not in the proper hash bucket. This can happen
1306 when two classes were merged by `merge_equiv_classes'. Search
1307 for the hash bucket that it heads. This happens only very
1308 rarely, so the cost is acceptable. */
1309 for (hash = 0; hash < NBUCKETS; hash++)
1310 if (table[hash] == elt)
1315 /* Remove the table element from its related-value circular chain. */
1317 if (elt->related_value != 0 && elt->related_value != elt)
1319 register struct table_elt *p = elt->related_value;
1320 while (p->related_value != elt)
1321 p = p->related_value;
1322 p->related_value = elt->related_value;
1323 if (p->related_value == p)
1324 p->related_value = 0;
1330 /* Look up X in the hash table and return its table element,
1331 or 0 if X is not in the table.
1333 MODE is the machine-mode of X, or if X is an integer constant
1334 with VOIDmode then MODE is the mode with which X will be used.
1336 Here we are satisfied to find an expression whose tree structure
1339 static struct table_elt *
1340 lookup (x, hash, mode)
1343 enum machine_mode mode;
1345 register struct table_elt *p;
1347 for (p = table[hash]; p; p = p->next_same_hash)
1348 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1349 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1355 /* Like `lookup' but don't care whether the table element uses invalid regs.
1356 Also ignore discrepancies in the machine mode of a register. */
1358 static struct table_elt *
1359 lookup_for_remove (x, hash, mode)
1362 enum machine_mode mode;
1364 register struct table_elt *p;
1366 if (GET_CODE (x) == REG)
1368 int regno = REGNO (x);
1369 /* Don't check the machine mode when comparing registers;
1370 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1371 for (p = table[hash]; p; p = p->next_same_hash)
1372 if (GET_CODE (p->exp) == REG
1373 && REGNO (p->exp) == regno)
1378 for (p = table[hash]; p; p = p->next_same_hash)
1379 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1386 /* Look for an expression equivalent to X and with code CODE.
1387 If one is found, return that expression. */
1390 lookup_as_function (x, code)
1394 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1396 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1397 long as we are narrowing. So if we looked in vain for a mode narrower
1398 than word_mode before, look for word_mode now. */
1399 if (p == 0 && code == CONST_INT
1400 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1403 PUT_MODE (x, word_mode);
1404 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1410 for (p = p->first_same_value; p; p = p->next_same_value)
1412 if (GET_CODE (p->exp) == code
1413 /* Make sure this is a valid entry in the table. */
1414 && exp_equiv_p (p->exp, p->exp, 1, 0))
1421 /* Insert X in the hash table, assuming HASH is its hash code
1422 and CLASSP is an element of the class it should go in
1423 (or 0 if a new class should be made).
1424 It is inserted at the proper position to keep the class in
1425 the order cheapest first.
1427 MODE is the machine-mode of X, or if X is an integer constant
1428 with VOIDmode then MODE is the mode with which X will be used.
1430 For elements of equal cheapness, the most recent one
1431 goes in front, except that the first element in the list
1432 remains first unless a cheaper element is added. The order of
1433 pseudo-registers does not matter, as canon_reg will be called to
1434 find the cheapest when a register is retrieved from the table.
1436 The in_memory field in the hash table element is set to 0.
1437 The caller must set it nonzero if appropriate.
1439 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1440 and if insert_regs returns a nonzero value
1441 you must then recompute its hash code before calling here.
1443 If necessary, update table showing constant values of quantities. */
1445 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1447 static struct table_elt *
1448 insert (x, classp, hash, mode)
1450 register struct table_elt *classp;
1452 enum machine_mode mode;
1454 register struct table_elt *elt;
1456 /* If X is a register and we haven't made a quantity for it,
1457 something is wrong. */
1458 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1461 /* If X is a hard register, show it is being put in the table. */
1462 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1464 int regno = REGNO (x);
1465 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1468 for (i = regno; i < endregno; i++)
1469 SET_HARD_REG_BIT (hard_regs_in_table, i);
1472 /* If X is a label, show we recorded it. */
1473 if (GET_CODE (x) == LABEL_REF
1474 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1475 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1476 recorded_label_ref = 1;
1478 /* Put an element for X into the right hash bucket. */
1480 elt = get_element ();
1482 elt->cost = COST (x);
1483 elt->next_same_value = 0;
1484 elt->prev_same_value = 0;
1485 elt->next_same_hash = table[hash];
1486 elt->prev_same_hash = 0;
1487 elt->related_value = 0;
1490 elt->is_const = (CONSTANT_P (x)
1491 /* GNU C++ takes advantage of this for `this'
1492 (and other const values). */
1493 || (RTX_UNCHANGING_P (x)
1494 && GET_CODE (x) == REG
1495 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1496 || FIXED_BASE_PLUS_P (x));
1499 table[hash]->prev_same_hash = elt;
1502 /* Put it into the proper value-class. */
1505 classp = classp->first_same_value;
1506 if (CHEAPER (elt, classp))
1507 /* Insert at the head of the class */
1509 register struct table_elt *p;
1510 elt->next_same_value = classp;
1511 classp->prev_same_value = elt;
1512 elt->first_same_value = elt;
1514 for (p = classp; p; p = p->next_same_value)
1515 p->first_same_value = elt;
1519 /* Insert not at head of the class. */
1520 /* Put it after the last element cheaper than X. */
1521 register struct table_elt *p, *next;
1522 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1524 /* Put it after P and before NEXT. */
1525 elt->next_same_value = next;
1527 next->prev_same_value = elt;
1528 elt->prev_same_value = p;
1529 p->next_same_value = elt;
1530 elt->first_same_value = classp;
1534 elt->first_same_value = elt;
1536 /* If this is a constant being set equivalent to a register or a register
1537 being set equivalent to a constant, note the constant equivalence.
1539 If this is a constant, it cannot be equivalent to a different constant,
1540 and a constant is the only thing that can be cheaper than a register. So
1541 we know the register is the head of the class (before the constant was
1544 If this is a register that is not already known equivalent to a
1545 constant, we must check the entire class.
1547 If this is a register that is already known equivalent to an insn,
1548 update `qty_const_insn' to show that `this_insn' is the latest
1549 insn making that quantity equivalent to the constant. */
1551 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1552 && GET_CODE (x) != REG)
1554 qty_const[REG_QTY (REGNO (classp->exp))]
1555 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1556 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1559 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1562 register struct table_elt *p;
1564 for (p = classp; p != 0; p = p->next_same_value)
1566 if (p->is_const && GET_CODE (p->exp) != REG)
1568 qty_const[REG_QTY (REGNO (x))]
1569 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1570 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1576 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1577 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1578 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1580 /* If this is a constant with symbolic value,
1581 and it has a term with an explicit integer value,
1582 link it up with related expressions. */
1583 if (GET_CODE (x) == CONST)
1585 rtx subexp = get_related_value (x);
1587 struct table_elt *subelt, *subelt_prev;
1591 /* Get the integer-free subexpression in the hash table. */
1592 subhash = safe_hash (subexp, mode) % NBUCKETS;
1593 subelt = lookup (subexp, subhash, mode);
1595 subelt = insert (subexp, NULL_PTR, subhash, mode);
1596 /* Initialize SUBELT's circular chain if it has none. */
1597 if (subelt->related_value == 0)
1598 subelt->related_value = subelt;
1599 /* Find the element in the circular chain that precedes SUBELT. */
1600 subelt_prev = subelt;
1601 while (subelt_prev->related_value != subelt)
1602 subelt_prev = subelt_prev->related_value;
1603 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1604 This way the element that follows SUBELT is the oldest one. */
1605 elt->related_value = subelt_prev->related_value;
1606 subelt_prev->related_value = elt;
1613 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1614 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1615 the two classes equivalent.
1617 CLASS1 will be the surviving class; CLASS2 should not be used after this
1620 Any invalid entries in CLASS2 will not be copied. */
1623 merge_equiv_classes (class1, class2)
1624 struct table_elt *class1, *class2;
1626 struct table_elt *elt, *next, *new;
1628 /* Ensure we start with the head of the classes. */
1629 class1 = class1->first_same_value;
1630 class2 = class2->first_same_value;
1632 /* If they were already equal, forget it. */
1633 if (class1 == class2)
1636 for (elt = class2; elt; elt = next)
1640 enum machine_mode mode = elt->mode;
1642 next = elt->next_same_value;
1644 /* Remove old entry, make a new one in CLASS1's class.
1645 Don't do this for invalid entries as we cannot find their
1646 hash code (it also isn't necessary). */
1647 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1649 hash_arg_in_memory = 0;
1650 hash_arg_in_struct = 0;
1651 hash = HASH (exp, mode);
1653 if (GET_CODE (exp) == REG)
1654 delete_reg_equiv (REGNO (exp));
1656 remove_from_table (elt, hash);
1658 if (insert_regs (exp, class1, 0))
1660 rehash_using_reg (exp);
1661 hash = HASH (exp, mode);
1663 new = insert (exp, class1, hash, mode);
1664 new->in_memory = hash_arg_in_memory;
1665 new->in_struct = hash_arg_in_struct;
1671 /* Flush the entire hash table. */
1677 struct table_elt *p;
1679 for (i = 0; i < NBUCKETS; i++)
1680 for (p = table[i]; p; p = table[i])
1682 /* Note that invalidate can remove elements
1683 after P in the current hash chain. */
1684 if (GET_CODE (p->exp) == REG)
1685 invalidate (p->exp, p->mode);
1687 remove_from_table (p, i);
1692 /* Remove from the hash table, or mark as invalid,
1693 all expressions whose values could be altered by storing in X.
1694 X is a register, a subreg, or a memory reference with nonvarying address
1695 (because, when a memory reference with a varying address is stored in,
1696 all memory references are removed by invalidate_memory
1697 so specific invalidation is superfluous).
1698 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1699 instead of just the amount indicated by the mode of X. This is only used
1700 for bitfield stores into memory.
1702 A nonvarying address may be just a register or just
1703 a symbol reference, or it may be either of those plus
1704 a numeric offset. */
1707 invalidate (x, full_mode)
1709 enum machine_mode full_mode;
1712 register struct table_elt *p;
1714 /* If X is a register, dependencies on its contents
1715 are recorded through the qty number mechanism.
1716 Just change the qty number of the register,
1717 mark it as invalid for expressions that refer to it,
1718 and remove it itself. */
1720 if (GET_CODE (x) == REG)
1722 register int regno = REGNO (x);
1723 register unsigned hash = HASH (x, GET_MODE (x));
1725 /* Remove REGNO from any quantity list it might be on and indicate
1726 that its value might have changed. If it is a pseudo, remove its
1727 entry from the hash table.
1729 For a hard register, we do the first two actions above for any
1730 additional hard registers corresponding to X. Then, if any of these
1731 registers are in the table, we must remove any REG entries that
1732 overlap these registers. */
1734 delete_reg_equiv (regno);
1737 if (regno >= FIRST_PSEUDO_REGISTER)
1739 /* Because a register can be referenced in more than one mode,
1740 we might have to remove more than one table entry. */
1742 struct table_elt *elt;
1744 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1745 remove_from_table (elt, hash);
1749 HOST_WIDE_INT in_table
1750 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1751 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1752 int tregno, tendregno;
1753 register struct table_elt *p, *next;
1755 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1757 for (i = regno + 1; i < endregno; i++)
1759 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1760 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1761 delete_reg_equiv (i);
1766 for (hash = 0; hash < NBUCKETS; hash++)
1767 for (p = table[hash]; p; p = next)
1769 next = p->next_same_hash;
1771 if (GET_CODE (p->exp) != REG
1772 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1775 tregno = REGNO (p->exp);
1777 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1778 if (tendregno > regno && tregno < endregno)
1779 remove_from_table (p, hash);
1786 if (GET_CODE (x) == SUBREG)
1788 if (GET_CODE (SUBREG_REG (x)) != REG)
1790 invalidate (SUBREG_REG (x), VOIDmode);
1794 /* If X is a parallel, invalidate all of its elements. */
1796 if (GET_CODE (x) == PARALLEL)
1798 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1799 invalidate (XVECEXP (x, 0, i), VOIDmode);
1803 /* If X is an expr_list, this is part of a disjoint return value;
1804 extract the location in question ignoring the offset. */
1806 if (GET_CODE (x) == EXPR_LIST)
1808 invalidate (XEXP (x, 0), VOIDmode);
1812 /* X is not a register; it must be a memory reference with
1813 a nonvarying address. Remove all hash table elements
1814 that refer to overlapping pieces of memory. */
1816 if (GET_CODE (x) != MEM)
1819 if (full_mode == VOIDmode)
1820 full_mode = GET_MODE (x);
1822 for (i = 0; i < NBUCKETS; i++)
1824 register struct table_elt *next;
1825 for (p = table[i]; p; p = next)
1827 next = p->next_same_hash;
1828 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1829 than checking all the aliases). */
1831 && (GET_CODE (p->exp) != MEM
1832 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1833 remove_from_table (p, i);
1838 /* Remove all expressions that refer to register REGNO,
1839 since they are already invalid, and we are about to
1840 mark that register valid again and don't want the old
1841 expressions to reappear as valid. */
1844 remove_invalid_refs (regno)
1848 register struct table_elt *p, *next;
1850 for (i = 0; i < NBUCKETS; i++)
1851 for (p = table[i]; p; p = next)
1853 next = p->next_same_hash;
1854 if (GET_CODE (p->exp) != REG
1855 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1856 remove_from_table (p, i);
1860 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1862 remove_invalid_subreg_refs (regno, word, mode)
1865 enum machine_mode mode;
1868 register struct table_elt *p, *next;
1869 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1871 for (i = 0; i < NBUCKETS; i++)
1872 for (p = table[i]; p; p = next)
1875 next = p->next_same_hash;
1878 if (GET_CODE (p->exp) != REG
1879 && (GET_CODE (exp) != SUBREG
1880 || GET_CODE (SUBREG_REG (exp)) != REG
1881 || REGNO (SUBREG_REG (exp)) != regno
1882 || (((SUBREG_WORD (exp)
1883 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1885 && SUBREG_WORD (exp) <= end))
1886 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1887 remove_from_table (p, i);
1891 /* Recompute the hash codes of any valid entries in the hash table that
1892 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1894 This is called when we make a jump equivalence. */
1897 rehash_using_reg (x)
1901 struct table_elt *p, *next;
1904 if (GET_CODE (x) == SUBREG)
1907 /* If X is not a register or if the register is known not to be in any
1908 valid entries in the table, we have no work to do. */
1910 if (GET_CODE (x) != REG
1911 || REG_IN_TABLE (REGNO (x)) < 0
1912 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1915 /* Scan all hash chains looking for valid entries that mention X.
1916 If we find one and it is in the wrong hash chain, move it. We can skip
1917 objects that are registers, since they are handled specially. */
1919 for (i = 0; i < NBUCKETS; i++)
1920 for (p = table[i]; p; p = next)
1922 next = p->next_same_hash;
1923 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1924 && exp_equiv_p (p->exp, p->exp, 1, 0)
1925 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1927 if (p->next_same_hash)
1928 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1930 if (p->prev_same_hash)
1931 p->prev_same_hash->next_same_hash = p->next_same_hash;
1933 table[i] = p->next_same_hash;
1935 p->next_same_hash = table[hash];
1936 p->prev_same_hash = 0;
1938 table[hash]->prev_same_hash = p;
1944 /* Remove from the hash table any expression that is a call-clobbered
1945 register. Also update their TICK values. */
1948 invalidate_for_call ()
1950 int regno, endregno;
1953 struct table_elt *p, *next;
1956 /* Go through all the hard registers. For each that is clobbered in
1957 a CALL_INSN, remove the register from quantity chains and update
1958 reg_tick if defined. Also see if any of these registers is currently
1961 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1962 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1964 delete_reg_equiv (regno);
1965 if (REG_TICK (regno) >= 0)
1968 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1971 /* In the case where we have no call-clobbered hard registers in the
1972 table, we are done. Otherwise, scan the table and remove any
1973 entry that overlaps a call-clobbered register. */
1976 for (hash = 0; hash < NBUCKETS; hash++)
1977 for (p = table[hash]; p; p = next)
1979 next = p->next_same_hash;
1983 remove_from_table (p, hash);
1987 if (GET_CODE (p->exp) != REG
1988 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1991 regno = REGNO (p->exp);
1992 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1994 for (i = regno; i < endregno; i++)
1995 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1997 remove_from_table (p, hash);
2003 /* Given an expression X of type CONST,
2004 and ELT which is its table entry (or 0 if it
2005 is not in the hash table),
2006 return an alternate expression for X as a register plus integer.
2007 If none can be found, return 0. */
2010 use_related_value (x, elt)
2012 struct table_elt *elt;
2014 register struct table_elt *relt = 0;
2015 register struct table_elt *p, *q;
2016 HOST_WIDE_INT offset;
2018 /* First, is there anything related known?
2019 If we have a table element, we can tell from that.
2020 Otherwise, must look it up. */
2022 if (elt != 0 && elt->related_value != 0)
2024 else if (elt == 0 && GET_CODE (x) == CONST)
2026 rtx subexp = get_related_value (x);
2028 relt = lookup (subexp,
2029 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2036 /* Search all related table entries for one that has an
2037 equivalent register. */
2042 /* This loop is strange in that it is executed in two different cases.
2043 The first is when X is already in the table. Then it is searching
2044 the RELATED_VALUE list of X's class (RELT). The second case is when
2045 X is not in the table. Then RELT points to a class for the related
2048 Ensure that, whatever case we are in, that we ignore classes that have
2049 the same value as X. */
2051 if (rtx_equal_p (x, p->exp))
2054 for (q = p->first_same_value; q; q = q->next_same_value)
2055 if (GET_CODE (q->exp) == REG)
2061 p = p->related_value;
2063 /* We went all the way around, so there is nothing to be found.
2064 Alternatively, perhaps RELT was in the table for some other reason
2065 and it has no related values recorded. */
2066 if (p == relt || p == 0)
2073 offset = (get_integer_term (x) - get_integer_term (p->exp));
2074 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2075 return plus_constant (q->exp, offset);
2078 /* Hash an rtx. We are careful to make sure the value is never negative.
2079 Equivalent registers hash identically.
2080 MODE is used in hashing for CONST_INTs only;
2081 otherwise the mode of X is used.
2083 Store 1 in do_not_record if any subexpression is volatile.
2085 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2086 which does not have the RTX_UNCHANGING_P bit set.
2087 In this case, also store 1 in hash_arg_in_struct
2088 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2090 Note that cse_insn knows that the hash code of a MEM expression
2091 is just (int) MEM plus the hash code of the address. */
2094 canon_hash (x, mode)
2096 enum machine_mode mode;
2099 register unsigned hash = 0;
2100 register enum rtx_code code;
2103 /* repeat is used to turn tail-recursion into iteration. */
2108 code = GET_CODE (x);
2113 register int regno = REGNO (x);
2115 /* On some machines, we can't record any non-fixed hard register,
2116 because extending its life will cause reload problems. We
2117 consider ap, fp, and sp to be fixed for this purpose.
2119 We also consider CCmode registers to be fixed for this purpose;
2120 failure to do so leads to failure to simplify 0<100 type of
2123 On all machines, we can't record any global registers. */
2125 if (regno < FIRST_PSEUDO_REGISTER
2126 && (global_regs[regno]
2127 || (SMALL_REGISTER_CLASSES
2128 && ! fixed_regs[regno]
2129 && regno != FRAME_POINTER_REGNUM
2130 && regno != HARD_FRAME_POINTER_REGNUM
2131 && regno != ARG_POINTER_REGNUM
2132 && regno != STACK_POINTER_REGNUM
2133 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2138 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2142 /* We handle SUBREG of a REG specially because the underlying
2143 reg changes its hash value with every value change; we don't
2144 want to have to forget unrelated subregs when one subreg changes. */
2147 if (GET_CODE (SUBREG_REG (x)) == REG)
2149 hash += (((unsigned) SUBREG << 7)
2150 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2158 unsigned HOST_WIDE_INT tem = INTVAL (x);
2159 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2164 /* This is like the general case, except that it only counts
2165 the integers representing the constant. */
2166 hash += (unsigned) code + (unsigned) GET_MODE (x);
2167 if (GET_MODE (x) != VOIDmode)
2168 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2170 unsigned tem = XINT (x, i);
2174 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2175 + (unsigned) CONST_DOUBLE_HIGH (x));
2178 /* Assume there is only one rtx object for any given label. */
2181 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2186 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2190 if (MEM_VOLATILE_P (x))
2195 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2197 hash_arg_in_memory = 1;
2198 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2200 /* Now that we have already found this special case,
2201 might as well speed it up as much as possible. */
2202 hash += (unsigned) MEM;
2213 case UNSPEC_VOLATILE:
2218 if (MEM_VOLATILE_P (x))
2229 i = GET_RTX_LENGTH (code) - 1;
2230 hash += (unsigned) code + (unsigned) GET_MODE (x);
2231 fmt = GET_RTX_FORMAT (code);
2236 rtx tem = XEXP (x, i);
2238 /* If we are about to do the last recursive call
2239 needed at this level, change it into iteration.
2240 This function is called enough to be worth it. */
2246 hash += canon_hash (tem, 0);
2248 else if (fmt[i] == 'E')
2249 for (j = 0; j < XVECLEN (x, i); j++)
2250 hash += canon_hash (XVECEXP (x, i, j), 0);
2251 else if (fmt[i] == 's')
2253 register unsigned char *p = (unsigned char *) XSTR (x, i);
2258 else if (fmt[i] == 'i')
2260 register unsigned tem = XINT (x, i);
2263 else if (fmt[i] == '0')
2271 /* Like canon_hash but with no side effects. */
2276 enum machine_mode mode;
2278 int save_do_not_record = do_not_record;
2279 int save_hash_arg_in_memory = hash_arg_in_memory;
2280 int save_hash_arg_in_struct = hash_arg_in_struct;
2281 unsigned hash = canon_hash (x, mode);
2282 hash_arg_in_memory = save_hash_arg_in_memory;
2283 hash_arg_in_struct = save_hash_arg_in_struct;
2284 do_not_record = save_do_not_record;
2288 /* Return 1 iff X and Y would canonicalize into the same thing,
2289 without actually constructing the canonicalization of either one.
2290 If VALIDATE is nonzero,
2291 we assume X is an expression being processed from the rtl
2292 and Y was found in the hash table. We check register refs
2293 in Y for being marked as valid.
2295 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2296 that is known to be in the register. Ordinarily, we don't allow them
2297 to match, because letting them match would cause unpredictable results
2298 in all the places that search a hash table chain for an equivalent
2299 for a given value. A possible equivalent that has different structure
2300 has its hash code computed from different data. Whether the hash code
2301 is the same as that of the given value is pure luck. */
2304 exp_equiv_p (x, y, validate, equal_values)
2310 register enum rtx_code code;
2313 /* Note: it is incorrect to assume an expression is equivalent to itself
2314 if VALIDATE is nonzero. */
2315 if (x == y && !validate)
2317 if (x == 0 || y == 0)
2320 code = GET_CODE (x);
2321 if (code != GET_CODE (y))
2326 /* If X is a constant and Y is a register or vice versa, they may be
2327 equivalent. We only have to validate if Y is a register. */
2328 if (CONSTANT_P (x) && GET_CODE (y) == REG
2329 && REGNO_QTY_VALID_P (REGNO (y))
2330 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2331 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2332 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2335 if (CONSTANT_P (y) && code == REG
2336 && REGNO_QTY_VALID_P (REGNO (x))
2337 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2338 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2344 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2345 if (GET_MODE (x) != GET_MODE (y))
2355 return INTVAL (x) == INTVAL (y);
2358 return XEXP (x, 0) == XEXP (y, 0);
2361 return XSTR (x, 0) == XSTR (y, 0);
2365 int regno = REGNO (y);
2367 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2368 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2371 /* If the quantities are not the same, the expressions are not
2372 equivalent. If there are and we are not to validate, they
2373 are equivalent. Otherwise, ensure all regs are up-to-date. */
2375 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2381 for (i = regno; i < endregno; i++)
2382 if (REG_IN_TABLE (i) != REG_TICK (i))
2388 /* For commutative operations, check both orders. */
2396 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2397 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2398 validate, equal_values))
2399 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2400 validate, equal_values)
2401 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2402 validate, equal_values)));
2408 /* Compare the elements. If any pair of corresponding elements
2409 fail to match, return 0 for the whole things. */
2411 fmt = GET_RTX_FORMAT (code);
2412 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2417 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2422 if (XVECLEN (x, i) != XVECLEN (y, i))
2424 for (j = 0; j < XVECLEN (x, i); j++)
2425 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2426 validate, equal_values))
2431 if (strcmp (XSTR (x, i), XSTR (y, i)))
2436 if (XINT (x, i) != XINT (y, i))
2441 if (XWINT (x, i) != XWINT (y, i))
2456 /* Return 1 iff any subexpression of X matches Y.
2457 Here we do not require that X or Y be valid (for registers referred to)
2458 for being in the hash table. */
2465 register enum rtx_code code;
2471 if (x == 0 || y == 0)
2474 code = GET_CODE (x);
2475 /* If X as a whole has the same code as Y, they may match.
2477 if (code == GET_CODE (y))
2479 if (exp_equiv_p (x, y, 0, 1))
2483 /* X does not match, so try its subexpressions. */
2485 fmt = GET_RTX_FORMAT (code);
2486 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2495 if (refers_to_p (XEXP (x, i), y))
2498 else if (fmt[i] == 'E')
2501 for (j = 0; j < XVECLEN (x, i); j++)
2502 if (refers_to_p (XVECEXP (x, i, j), y))
2509 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2510 set PBASE, PSTART, and PEND which correspond to the base of the address,
2511 the starting offset, and ending offset respectively.
2513 ADDR is known to be a nonvarying address. */
2515 /* ??? Despite what the comments say, this function is in fact frequently
2516 passed varying addresses. This does not appear to cause any problems. */
2519 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2523 HOST_WIDE_INT *pstart, *pend;
2526 HOST_WIDE_INT start, end;
2532 if (flag_pic && GET_CODE (base) == PLUS
2533 && XEXP (base, 0) == pic_offset_table_rtx)
2534 base = XEXP (base, 1);
2536 /* Registers with nonvarying addresses usually have constant equivalents;
2537 but the frame pointer register is also possible. */
2538 if (GET_CODE (base) == REG
2540 && REGNO_QTY_VALID_P (REGNO (base))
2541 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2542 && qty_const[REG_QTY (REGNO (base))] != 0)
2543 base = qty_const[REG_QTY (REGNO (base))];
2544 else if (GET_CODE (base) == PLUS
2545 && GET_CODE (XEXP (base, 1)) == CONST_INT
2546 && GET_CODE (XEXP (base, 0)) == REG
2548 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2549 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2550 == GET_MODE (XEXP (base, 0)))
2551 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2553 start = INTVAL (XEXP (base, 1));
2554 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2556 /* This can happen as the result of virtual register instantiation,
2557 if the initial offset is too large to be a valid address. */
2558 else if (GET_CODE (base) == PLUS
2559 && GET_CODE (XEXP (base, 0)) == REG
2560 && GET_CODE (XEXP (base, 1)) == REG
2562 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2563 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2564 == GET_MODE (XEXP (base, 0)))
2565 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2566 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2567 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2568 == GET_MODE (XEXP (base, 1)))
2569 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2571 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2572 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2574 /* One of the two values must be a constant. */
2575 if (GET_CODE (base) != CONST_INT)
2577 if (GET_CODE (tem) != CONST_INT)
2579 start = INTVAL (tem);
2583 start = INTVAL (base);
2588 /* Handle everything that we can find inside an address that has been
2589 viewed as constant. */
2593 /* If no part of this switch does a "continue", the code outside
2594 will exit this loop. */
2596 switch (GET_CODE (base))
2599 /* By definition, operand1 of a LO_SUM is the associated constant
2600 address. Use the associated constant address as the base
2602 base = XEXP (base, 1);
2606 /* Strip off CONST. */
2607 base = XEXP (base, 0);
2611 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2613 start += INTVAL (XEXP (base, 1));
2614 base = XEXP (base, 0);
2620 /* Handle the case of an AND which is the negative of a power of
2621 two. This is used to represent unaligned memory operations. */
2622 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2623 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2625 set_nonvarying_address_components (XEXP (base, 0), size,
2626 pbase, pstart, pend);
2628 /* Assume the worst misalignment. START is affected, but not
2629 END, so compensate but adjusting SIZE. Don't lose any
2630 constant we already had. */
2632 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2633 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2646 if (GET_CODE (base) == CONST_INT)
2648 start += INTVAL (base);
2654 /* Set the return values. */
2660 /* Return 1 if X has a value that can vary even between two
2661 executions of the program. 0 means X can be compared reliably
2662 against certain constants or near-constants. */
2665 cse_rtx_varies_p (x)
2668 /* We need not check for X and the equivalence class being of the same
2669 mode because if X is equivalent to a constant in some mode, it
2670 doesn't vary in any mode. */
2672 if (GET_CODE (x) == REG
2673 && REGNO_QTY_VALID_P (REGNO (x))
2674 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2675 && qty_const[REG_QTY (REGNO (x))] != 0)
2678 if (GET_CODE (x) == PLUS
2679 && GET_CODE (XEXP (x, 1)) == CONST_INT
2680 && GET_CODE (XEXP (x, 0)) == REG
2681 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2682 && (GET_MODE (XEXP (x, 0))
2683 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2684 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2687 /* This can happen as the result of virtual register instantiation, if
2688 the initial constant is too large to be a valid address. This gives
2689 us a three instruction sequence, load large offset into a register,
2690 load fp minus a constant into a register, then a MEM which is the
2691 sum of the two `constant' registers. */
2692 if (GET_CODE (x) == PLUS
2693 && GET_CODE (XEXP (x, 0)) == REG
2694 && GET_CODE (XEXP (x, 1)) == REG
2695 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2696 && (GET_MODE (XEXP (x, 0))
2697 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2698 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2699 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2700 && (GET_MODE (XEXP (x, 1))
2701 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2702 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2705 return rtx_varies_p (x);
2708 /* Canonicalize an expression:
2709 replace each register reference inside it
2710 with the "oldest" equivalent register.
2712 If INSN is non-zero and we are replacing a pseudo with a hard register
2713 or vice versa, validate_change is used to ensure that INSN remains valid
2714 after we make our substitution. The calls are made with IN_GROUP non-zero
2715 so apply_change_group must be called upon the outermost return from this
2716 function (unless INSN is zero). The result of apply_change_group can
2717 generally be discarded since the changes we are making are optional. */
2725 register enum rtx_code code;
2731 code = GET_CODE (x);
2749 /* Never replace a hard reg, because hard regs can appear
2750 in more than one machine mode, and we must preserve the mode
2751 of each occurrence. Also, some hard regs appear in
2752 MEMs that are shared and mustn't be altered. Don't try to
2753 replace any reg that maps to a reg of class NO_REGS. */
2754 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2755 || ! REGNO_QTY_VALID_P (REGNO (x)))
2758 first = qty_first_reg[REG_QTY (REGNO (x))];
2759 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2760 : REGNO_REG_CLASS (first) == NO_REGS ? x
2761 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2768 fmt = GET_RTX_FORMAT (code);
2769 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2775 rtx new = canon_reg (XEXP (x, i), insn);
2778 /* If replacing pseudo with hard reg or vice versa, ensure the
2779 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2780 if (insn != 0 && new != 0
2781 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2782 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2783 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2784 || (insn_code = recog_memoized (insn)) < 0
2785 || insn_n_dups[insn_code] > 0))
2786 validate_change (insn, &XEXP (x, i), new, 1);
2790 else if (fmt[i] == 'E')
2791 for (j = 0; j < XVECLEN (x, i); j++)
2792 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2798 /* LOC is a location within INSN that is an operand address (the contents of
2799 a MEM). Find the best equivalent address to use that is valid for this
2802 On most CISC machines, complicated address modes are costly, and rtx_cost
2803 is a good approximation for that cost. However, most RISC machines have
2804 only a few (usually only one) memory reference formats. If an address is
2805 valid at all, it is often just as cheap as any other address. Hence, for
2806 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2807 costs of various addresses. For two addresses of equal cost, choose the one
2808 with the highest `rtx_cost' value as that has the potential of eliminating
2809 the most insns. For equal costs, we choose the first in the equivalence
2810 class. Note that we ignore the fact that pseudo registers are cheaper
2811 than hard registers here because we would also prefer the pseudo registers.
2815 find_best_addr (insn, loc)
2819 struct table_elt *elt;
2822 struct table_elt *p;
2823 int found_better = 1;
2825 int save_do_not_record = do_not_record;
2826 int save_hash_arg_in_memory = hash_arg_in_memory;
2827 int save_hash_arg_in_struct = hash_arg_in_struct;
2832 /* Do not try to replace constant addresses or addresses of local and
2833 argument slots. These MEM expressions are made only once and inserted
2834 in many instructions, as well as being used to control symbol table
2835 output. It is not safe to clobber them.
2837 There are some uncommon cases where the address is already in a register
2838 for some reason, but we cannot take advantage of that because we have
2839 no easy way to unshare the MEM. In addition, looking up all stack
2840 addresses is costly. */
2841 if ((GET_CODE (addr) == PLUS
2842 && GET_CODE (XEXP (addr, 0)) == REG
2843 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2844 && (regno = REGNO (XEXP (addr, 0)),
2845 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2846 || regno == ARG_POINTER_REGNUM))
2847 || (GET_CODE (addr) == REG
2848 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2849 || regno == HARD_FRAME_POINTER_REGNUM
2850 || regno == ARG_POINTER_REGNUM))
2851 || GET_CODE (addr) == ADDRESSOF
2852 || CONSTANT_ADDRESS_P (addr))
2855 /* If this address is not simply a register, try to fold it. This will
2856 sometimes simplify the expression. Many simplifications
2857 will not be valid, but some, usually applying the associative rule, will
2858 be valid and produce better code. */
2859 if (GET_CODE (addr) != REG)
2861 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2865 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2866 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2867 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2869 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2871 && validate_change (insn, loc, folded, 0))
2875 /* If this address is not in the hash table, we can't look for equivalences
2876 of the whole address. Also, ignore if volatile. */
2879 hash = HASH (addr, Pmode);
2880 addr_volatile = do_not_record;
2881 do_not_record = save_do_not_record;
2882 hash_arg_in_memory = save_hash_arg_in_memory;
2883 hash_arg_in_struct = save_hash_arg_in_struct;
2888 elt = lookup (addr, hash, Pmode);
2890 #ifndef ADDRESS_COST
2893 int our_cost = elt->cost;
2895 /* Find the lowest cost below ours that works. */
2896 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2897 if (elt->cost < our_cost
2898 && (GET_CODE (elt->exp) == REG
2899 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2900 && validate_change (insn, loc,
2901 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2908 /* We need to find the best (under the criteria documented above) entry
2909 in the class that is valid. We use the `flag' field to indicate
2910 choices that were invalid and iterate until we can't find a better
2911 one that hasn't already been tried. */
2913 for (p = elt->first_same_value; p; p = p->next_same_value)
2916 while (found_better)
2918 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2919 int best_rtx_cost = (elt->cost + 1) >> 1;
2920 struct table_elt *best_elt = elt;
2923 for (p = elt->first_same_value; p; p = p->next_same_value)
2926 if ((GET_CODE (p->exp) == REG
2927 || exp_equiv_p (p->exp, p->exp, 1, 0))
2928 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2929 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2930 && (p->cost + 1) >> 1 > best_rtx_cost)))
2933 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2934 best_rtx_cost = (p->cost + 1) >> 1;
2941 if (validate_change (insn, loc,
2942 canon_reg (copy_rtx (best_elt->exp),
2951 /* If the address is a binary operation with the first operand a register
2952 and the second a constant, do the same as above, but looking for
2953 equivalences of the register. Then try to simplify before checking for
2954 the best address to use. This catches a few cases: First is when we
2955 have REG+const and the register is another REG+const. We can often merge
2956 the constants and eliminate one insn and one register. It may also be
2957 that a machine has a cheap REG+REG+const. Finally, this improves the
2958 code on the Alpha for unaligned byte stores. */
2960 if (flag_expensive_optimizations
2961 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2962 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2963 && GET_CODE (XEXP (*loc, 0)) == REG
2964 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2966 rtx c = XEXP (*loc, 1);
2969 hash = HASH (XEXP (*loc, 0), Pmode);
2970 do_not_record = save_do_not_record;
2971 hash_arg_in_memory = save_hash_arg_in_memory;
2972 hash_arg_in_struct = save_hash_arg_in_struct;
2974 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2978 /* We need to find the best (under the criteria documented above) entry
2979 in the class that is valid. We use the `flag' field to indicate
2980 choices that were invalid and iterate until we can't find a better
2981 one that hasn't already been tried. */
2983 for (p = elt->first_same_value; p; p = p->next_same_value)
2986 while (found_better)
2988 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2989 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2990 struct table_elt *best_elt = elt;
2991 rtx best_rtx = *loc;
2994 /* This is at worst case an O(n^2) algorithm, so limit our search
2995 to the first 32 elements on the list. This avoids trouble
2996 compiling code with very long basic blocks that can easily
2997 call cse_gen_binary so many times that we run out of memory. */
3000 for (p = elt->first_same_value, count = 0;
3002 p = p->next_same_value, count++)
3004 && (GET_CODE (p->exp) == REG
3005 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3007 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
3009 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3010 || (CSE_ADDRESS_COST (new) == best_addr_cost
3011 && (COST (new) + 1) >> 1 > best_rtx_cost)))
3014 best_addr_cost = CSE_ADDRESS_COST (new);
3015 best_rtx_cost = (COST (new) + 1) >> 1;
3023 if (validate_change (insn, loc,
3024 canon_reg (copy_rtx (best_rtx),
3035 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3036 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3037 what values are being compared.
3039 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3040 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3041 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3042 compared to produce cc0.
3044 The return value is the comparison operator and is either the code of
3045 A or the code corresponding to the inverse of the comparison. */
3047 static enum rtx_code
3048 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3051 enum machine_mode *pmode1, *pmode2;
3055 arg1 = *parg1, arg2 = *parg2;
3057 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3059 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3061 /* Set non-zero when we find something of interest. */
3063 int reverse_code = 0;
3064 struct table_elt *p = 0;
3066 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3067 On machines with CC0, this is the only case that can occur, since
3068 fold_rtx will return the COMPARE or item being compared with zero
3071 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3074 /* If ARG1 is a comparison operator and CODE is testing for
3075 STORE_FLAG_VALUE, get the inner arguments. */
3077 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3080 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3081 && code == LT && STORE_FLAG_VALUE == -1)
3082 #ifdef FLOAT_STORE_FLAG_VALUE
3083 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3084 && FLOAT_STORE_FLAG_VALUE < 0)
3089 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3090 && code == GE && STORE_FLAG_VALUE == -1)
3091 #ifdef FLOAT_STORE_FLAG_VALUE
3092 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3093 && FLOAT_STORE_FLAG_VALUE < 0)
3096 x = arg1, reverse_code = 1;
3099 /* ??? We could also check for
3101 (ne (and (eq (...) (const_int 1))) (const_int 0))
3103 and related forms, but let's wait until we see them occurring. */
3106 /* Look up ARG1 in the hash table and see if it has an equivalence
3107 that lets us see what is being compared. */
3108 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3110 if (p) p = p->first_same_value;
3112 for (; p; p = p->next_same_value)
3114 enum machine_mode inner_mode = GET_MODE (p->exp);
3116 /* If the entry isn't valid, skip it. */
3117 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3120 if (GET_CODE (p->exp) == COMPARE
3121 /* Another possibility is that this machine has a compare insn
3122 that includes the comparison code. In that case, ARG1 would
3123 be equivalent to a comparison operation that would set ARG1 to
3124 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3125 ORIG_CODE is the actual comparison being done; if it is an EQ,
3126 we must reverse ORIG_CODE. On machine with a negative value
3127 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3130 && GET_MODE_CLASS (inner_mode) == MODE_INT
3131 && (GET_MODE_BITSIZE (inner_mode)
3132 <= HOST_BITS_PER_WIDE_INT)
3133 && (STORE_FLAG_VALUE
3134 & ((HOST_WIDE_INT) 1
3135 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3136 #ifdef FLOAT_STORE_FLAG_VALUE
3138 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3139 && FLOAT_STORE_FLAG_VALUE < 0)
3142 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3147 else if ((code == EQ
3149 && GET_MODE_CLASS (inner_mode) == MODE_INT
3150 && (GET_MODE_BITSIZE (inner_mode)
3151 <= HOST_BITS_PER_WIDE_INT)
3152 && (STORE_FLAG_VALUE
3153 & ((HOST_WIDE_INT) 1
3154 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3155 #ifdef FLOAT_STORE_FLAG_VALUE
3157 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3158 && FLOAT_STORE_FLAG_VALUE < 0)
3161 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3168 /* If this is fp + constant, the equivalent is a better operand since
3169 it may let us predict the value of the comparison. */
3170 else if (NONZERO_BASE_PLUS_P (p->exp))
3177 /* If we didn't find a useful equivalence for ARG1, we are done.
3178 Otherwise, set up for the next iteration. */
3182 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3183 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3184 code = GET_CODE (x);
3187 code = reverse_condition (code);
3190 /* Return our results. Return the modes from before fold_rtx
3191 because fold_rtx might produce const_int, and then it's too late. */
3192 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3193 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3198 /* Try to simplify a unary operation CODE whose output mode is to be
3199 MODE with input operand OP whose mode was originally OP_MODE.
3200 Return zero if no simplification can be made. */
3203 simplify_unary_operation (code, mode, op, op_mode)
3205 enum machine_mode mode;
3207 enum machine_mode op_mode;
3209 register int width = GET_MODE_BITSIZE (mode);
3211 /* The order of these tests is critical so that, for example, we don't
3212 check the wrong mode (input vs. output) for a conversion operation,
3213 such as FIX. At some point, this should be simplified. */
3215 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3217 if (code == FLOAT && GET_MODE (op) == VOIDmode
3218 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3220 HOST_WIDE_INT hv, lv;
3223 if (GET_CODE (op) == CONST_INT)
3224 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3226 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3228 #ifdef REAL_ARITHMETIC
3229 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3233 d = (double) (~ hv);
3234 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3235 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3236 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3242 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3243 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3244 d += (double) (unsigned HOST_WIDE_INT) lv;
3246 #endif /* REAL_ARITHMETIC */
3247 d = real_value_truncate (mode, d);
3248 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3250 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3251 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3253 HOST_WIDE_INT hv, lv;
3256 if (GET_CODE (op) == CONST_INT)
3257 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3259 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3261 if (op_mode == VOIDmode)
3263 /* We don't know how to interpret negative-looking numbers in
3264 this case, so don't try to fold those. */
3268 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3271 hv = 0, lv &= GET_MODE_MASK (op_mode);
3273 #ifdef REAL_ARITHMETIC
3274 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3277 d = (double) (unsigned HOST_WIDE_INT) hv;
3278 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3279 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3280 d += (double) (unsigned HOST_WIDE_INT) lv;
3281 #endif /* REAL_ARITHMETIC */
3282 d = real_value_truncate (mode, d);
3283 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3287 if (GET_CODE (op) == CONST_INT
3288 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3290 register HOST_WIDE_INT arg0 = INTVAL (op);
3291 register HOST_WIDE_INT val;
3304 val = (arg0 >= 0 ? arg0 : - arg0);
3308 /* Don't use ffs here. Instead, get low order bit and then its
3309 number. If arg0 is zero, this will return 0, as desired. */
3310 arg0 &= GET_MODE_MASK (mode);
3311 val = exact_log2 (arg0 & (- arg0)) + 1;
3319 if (op_mode == VOIDmode)
3321 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3323 /* If we were really extending the mode,
3324 we would have to distinguish between zero-extension
3325 and sign-extension. */
3326 if (width != GET_MODE_BITSIZE (op_mode))
3330 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3331 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3337 if (op_mode == VOIDmode)
3339 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3341 /* If we were really extending the mode,
3342 we would have to distinguish between zero-extension
3343 and sign-extension. */
3344 if (width != GET_MODE_BITSIZE (op_mode))
3348 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3351 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3353 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3354 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3367 val = trunc_int_for_mode (val, mode);
3369 return GEN_INT (val);
3372 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3373 for a DImode operation on a CONST_INT. */
3374 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3375 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3377 HOST_WIDE_INT l1, h1, lv, hv;
3379 if (GET_CODE (op) == CONST_DOUBLE)
3380 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3382 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3392 neg_double (l1, h1, &lv, &hv);
3397 neg_double (l1, h1, &lv, &hv);
3405 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3407 lv = exact_log2 (l1 & (-l1)) + 1;
3411 /* This is just a change-of-mode, so do nothing. */
3416 if (op_mode == VOIDmode
3417 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3421 lv = l1 & GET_MODE_MASK (op_mode);
3425 if (op_mode == VOIDmode
3426 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3430 lv = l1 & GET_MODE_MASK (op_mode);
3431 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3432 && (lv & ((HOST_WIDE_INT) 1
3433 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3434 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3436 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3447 return immed_double_const (lv, hv, mode);
3450 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3451 else if (GET_CODE (op) == CONST_DOUBLE
3452 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3458 if (setjmp (handler))
3459 /* There used to be a warning here, but that is inadvisable.
3460 People may want to cause traps, and the natural way
3461 to do it should not get a warning. */
3464 set_float_handler (handler);
3466 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3471 d = REAL_VALUE_NEGATE (d);
3475 if (REAL_VALUE_NEGATIVE (d))
3476 d = REAL_VALUE_NEGATE (d);
3479 case FLOAT_TRUNCATE:
3480 d = real_value_truncate (mode, d);
3484 /* All this does is change the mode. */
3488 d = REAL_VALUE_RNDZINT (d);
3492 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3502 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3503 set_float_handler (NULL_PTR);
3507 else if (GET_CODE (op) == CONST_DOUBLE
3508 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3509 && GET_MODE_CLASS (mode) == MODE_INT
3510 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3516 if (setjmp (handler))
3519 set_float_handler (handler);
3521 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3526 val = REAL_VALUE_FIX (d);
3530 val = REAL_VALUE_UNSIGNED_FIX (d);
3537 set_float_handler (NULL_PTR);
3539 val = trunc_int_for_mode (val, mode);
3541 return GEN_INT (val);
3544 /* This was formerly used only for non-IEEE float.
3545 eggert@twinsun.com says it is safe for IEEE also. */
3548 /* There are some simplifications we can do even if the operands
3554 /* (not (not X)) == X, similarly for NEG. */
3555 if (GET_CODE (op) == code)
3556 return XEXP (op, 0);
3560 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3561 becomes just the MINUS if its mode is MODE. This allows
3562 folding switch statements on machines using casesi (such as
3564 if (GET_CODE (op) == TRUNCATE
3565 && GET_MODE (XEXP (op, 0)) == mode
3566 && GET_CODE (XEXP (op, 0)) == MINUS
3567 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3568 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3569 return XEXP (op, 0);
3571 #ifdef POINTERS_EXTEND_UNSIGNED
3572 if (! POINTERS_EXTEND_UNSIGNED
3573 && mode == Pmode && GET_MODE (op) == ptr_mode
3575 return convert_memory_address (Pmode, op);
3579 #ifdef POINTERS_EXTEND_UNSIGNED
3581 if (POINTERS_EXTEND_UNSIGNED
3582 && mode == Pmode && GET_MODE (op) == ptr_mode
3584 return convert_memory_address (Pmode, op);
3596 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3597 and OP1. Return 0 if no simplification is possible.
3599 Don't use this for relational operations such as EQ or LT.
3600 Use simplify_relational_operation instead. */
3603 simplify_binary_operation (code, mode, op0, op1)
3605 enum machine_mode mode;
3608 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3610 int width = GET_MODE_BITSIZE (mode);
3613 /* Relational operations don't work here. We must know the mode
3614 of the operands in order to do the comparison correctly.
3615 Assuming a full word can give incorrect results.
3616 Consider comparing 128 with -128 in QImode. */
3618 if (GET_RTX_CLASS (code) == '<')
3621 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3622 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3623 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3624 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3626 REAL_VALUE_TYPE f0, f1, value;
3629 if (setjmp (handler))
3632 set_float_handler (handler);
3634 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3635 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3636 f0 = real_value_truncate (mode, f0);
3637 f1 = real_value_truncate (mode, f1);
3639 #ifdef REAL_ARITHMETIC
3640 #ifndef REAL_INFINITY
3641 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3644 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3658 #ifndef REAL_INFINITY
3665 value = MIN (f0, f1);
3668 value = MAX (f0, f1);
3675 value = real_value_truncate (mode, value);
3676 set_float_handler (NULL_PTR);
3677 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3679 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3681 /* We can fold some multi-word operations. */
3682 if (GET_MODE_CLASS (mode) == MODE_INT
3683 && width == HOST_BITS_PER_WIDE_INT * 2
3684 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3685 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3687 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3689 if (GET_CODE (op0) == CONST_DOUBLE)
3690 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3692 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3694 if (GET_CODE (op1) == CONST_DOUBLE)
3695 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3697 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3702 /* A - B == A + (-B). */
3703 neg_double (l2, h2, &lv, &hv);
3706 /* .. fall through ... */
3709 add_double (l1, h1, l2, h2, &lv, &hv);
3713 mul_double (l1, h1, l2, h2, &lv, &hv);
3716 case DIV: case MOD: case UDIV: case UMOD:
3717 /* We'd need to include tree.h to do this and it doesn't seem worth
3722 lv = l1 & l2, hv = h1 & h2;
3726 lv = l1 | l2, hv = h1 | h2;
3730 lv = l1 ^ l2, hv = h1 ^ h2;
3736 && ((unsigned HOST_WIDE_INT) l1
3737 < (unsigned HOST_WIDE_INT) l2)))
3746 && ((unsigned HOST_WIDE_INT) l1
3747 > (unsigned HOST_WIDE_INT) l2)))
3754 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3756 && ((unsigned HOST_WIDE_INT) l1
3757 < (unsigned HOST_WIDE_INT) l2)))
3764 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3766 && ((unsigned HOST_WIDE_INT) l1
3767 > (unsigned HOST_WIDE_INT) l2)))
3773 case LSHIFTRT: case ASHIFTRT:
3775 case ROTATE: case ROTATERT:
3776 #ifdef SHIFT_COUNT_TRUNCATED
3777 if (SHIFT_COUNT_TRUNCATED)
3778 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3781 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3784 if (code == LSHIFTRT || code == ASHIFTRT)
3785 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3787 else if (code == ASHIFT)
3788 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3789 else if (code == ROTATE)
3790 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3791 else /* code == ROTATERT */
3792 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3799 return immed_double_const (lv, hv, mode);
3802 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3803 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3805 /* Even if we can't compute a constant result,
3806 there are some cases worth simplifying. */
3811 /* In IEEE floating point, x+0 is not the same as x. Similarly
3812 for the other optimizations below. */
3813 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3814 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3817 if (op1 == CONST0_RTX (mode))
3820 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3821 if (GET_CODE (op0) == NEG)
3822 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3823 else if (GET_CODE (op1) == NEG)
3824 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3826 /* Handle both-operands-constant cases. We can only add
3827 CONST_INTs to constants since the sum of relocatable symbols
3828 can't be handled by most assemblers. Don't add CONST_INT
3829 to CONST_INT since overflow won't be computed properly if wider
3830 than HOST_BITS_PER_WIDE_INT. */
3832 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3833 && GET_CODE (op1) == CONST_INT)
3834 return plus_constant (op0, INTVAL (op1));
3835 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3836 && GET_CODE (op0) == CONST_INT)
3837 return plus_constant (op1, INTVAL (op0));
3839 /* See if this is something like X * C - X or vice versa or
3840 if the multiplication is written as a shift. If so, we can
3841 distribute and make a new multiply, shift, or maybe just
3842 have X (if C is 2 in the example above). But don't make
3843 real multiply if we didn't have one before. */
3845 if (! FLOAT_MODE_P (mode))
3847 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3848 rtx lhs = op0, rhs = op1;
3851 if (GET_CODE (lhs) == NEG)
3852 coeff0 = -1, lhs = XEXP (lhs, 0);
3853 else if (GET_CODE (lhs) == MULT
3854 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3856 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3859 else if (GET_CODE (lhs) == ASHIFT
3860 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3861 && INTVAL (XEXP (lhs, 1)) >= 0
3862 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3864 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3865 lhs = XEXP (lhs, 0);
3868 if (GET_CODE (rhs) == NEG)
3869 coeff1 = -1, rhs = XEXP (rhs, 0);
3870 else if (GET_CODE (rhs) == MULT
3871 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3873 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3876 else if (GET_CODE (rhs) == ASHIFT
3877 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3878 && INTVAL (XEXP (rhs, 1)) >= 0
3879 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3881 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3882 rhs = XEXP (rhs, 0);
3885 if (rtx_equal_p (lhs, rhs))
3887 tem = cse_gen_binary (MULT, mode, lhs,
3888 GEN_INT (coeff0 + coeff1));
3889 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3893 /* If one of the operands is a PLUS or a MINUS, see if we can
3894 simplify this by the associative law.
3895 Don't use the associative law for floating point.
3896 The inaccuracy makes it nonassociative,
3897 and subtle programs can break if operations are associated. */
3899 if (INTEGRAL_MODE_P (mode)
3900 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3901 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3902 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3908 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3909 using cc0, in which case we want to leave it as a COMPARE
3910 so we can distinguish it from a register-register-copy.
3912 In IEEE floating point, x-0 is not the same as x. */
3914 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3915 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3916 && op1 == CONST0_RTX (mode))
3919 /* Do nothing here. */
3924 /* None of these optimizations can be done for IEEE
3926 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3927 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3930 /* We can't assume x-x is 0 even with non-IEEE floating point,
3931 but since it is zero except in very strange circumstances, we
3932 will treat it as zero with -ffast-math. */
3933 if (rtx_equal_p (op0, op1)
3934 && ! side_effects_p (op0)
3935 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3936 return CONST0_RTX (mode);
3938 /* Change subtraction from zero into negation. */
3939 if (op0 == CONST0_RTX (mode))
3940 return gen_rtx_NEG (mode, op1);
3942 /* (-1 - a) is ~a. */
3943 if (op0 == constm1_rtx)
3944 return gen_rtx_NOT (mode, op1);
3946 /* Subtracting 0 has no effect. */
3947 if (op1 == CONST0_RTX (mode))
3950 /* See if this is something like X * C - X or vice versa or
3951 if the multiplication is written as a shift. If so, we can
3952 distribute and make a new multiply, shift, or maybe just
3953 have X (if C is 2 in the example above). But don't make
3954 real multiply if we didn't have one before. */
3956 if (! FLOAT_MODE_P (mode))
3958 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3959 rtx lhs = op0, rhs = op1;
3962 if (GET_CODE (lhs) == NEG)
3963 coeff0 = -1, lhs = XEXP (lhs, 0);
3964 else if (GET_CODE (lhs) == MULT
3965 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3967 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3970 else if (GET_CODE (lhs) == ASHIFT
3971 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3972 && INTVAL (XEXP (lhs, 1)) >= 0
3973 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3975 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3976 lhs = XEXP (lhs, 0);
3979 if (GET_CODE (rhs) == NEG)
3980 coeff1 = - 1, rhs = XEXP (rhs, 0);
3981 else if (GET_CODE (rhs) == MULT
3982 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3984 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3987 else if (GET_CODE (rhs) == ASHIFT
3988 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3989 && INTVAL (XEXP (rhs, 1)) >= 0
3990 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3992 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3993 rhs = XEXP (rhs, 0);
3996 if (rtx_equal_p (lhs, rhs))
3998 tem = cse_gen_binary (MULT, mode, lhs,
3999 GEN_INT (coeff0 - coeff1));
4000 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
4004 /* (a - (-b)) -> (a + b). */
4005 if (GET_CODE (op1) == NEG)
4006 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
4008 /* If one of the operands is a PLUS or a MINUS, see if we can
4009 simplify this by the associative law.
4010 Don't use the associative law for floating point.
4011 The inaccuracy makes it nonassociative,
4012 and subtle programs can break if operations are associated. */
4014 if (INTEGRAL_MODE_P (mode)
4015 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
4016 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
4017 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
4020 /* Don't let a relocatable value get a negative coeff. */
4021 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
4022 return plus_constant (op0, - INTVAL (op1));
4024 /* (x - (x & y)) -> (x & ~y) */
4025 if (GET_CODE (op1) == AND)
4027 if (rtx_equal_p (op0, XEXP (op1, 0)))
4028 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
4029 if (rtx_equal_p (op0, XEXP (op1, 1)))
4030 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
4035 if (op1 == constm1_rtx)
4037 tem = simplify_unary_operation (NEG, mode, op0, mode);
4039 return tem ? tem : gen_rtx_NEG (mode, op0);
4042 /* In IEEE floating point, x*0 is not always 0. */
4043 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4044 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4045 && op1 == CONST0_RTX (mode)
4046 && ! side_effects_p (op0))
4049 /* In IEEE floating point, x*1 is not equivalent to x for nans.
4050 However, ANSI says we can drop signals,
4051 so we can do this anyway. */
4052 if (op1 == CONST1_RTX (mode))
4055 /* Convert multiply by constant power of two into shift unless
4056 we are still generating RTL. This test is a kludge. */
4057 if (GET_CODE (op1) == CONST_INT
4058 && (val = exact_log2 (INTVAL (op1))) >= 0
4059 /* If the mode is larger than the host word size, and the
4060 uppermost bit is set, then this isn't a power of two due
4061 to implicit sign extension. */
4062 && (width <= HOST_BITS_PER_WIDE_INT
4063 || val != HOST_BITS_PER_WIDE_INT - 1)
4064 && ! rtx_equal_function_value_matters)
4065 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
4067 if (GET_CODE (op1) == CONST_DOUBLE
4068 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
4072 int op1is2, op1ism1;
4074 if (setjmp (handler))
4077 set_float_handler (handler);
4078 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4079 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
4080 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
4081 set_float_handler (NULL_PTR);
4083 /* x*2 is x+x and x*(-1) is -x */
4084 if (op1is2 && GET_MODE (op0) == mode)
4085 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
4087 else if (op1ism1 && GET_MODE (op0) == mode)
4088 return gen_rtx_NEG (mode, op0);
4093 if (op1 == const0_rtx)
4095 if (GET_CODE (op1) == CONST_INT
4096 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4098 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4100 /* A | (~A) -> -1 */
4101 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4102 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4103 && ! side_effects_p (op0)
4104 && GET_MODE_CLASS (mode) != MODE_CC)
4109 if (op1 == const0_rtx)
4111 if (GET_CODE (op1) == CONST_INT
4112 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4113 return gen_rtx_NOT (mode, op0);
4114 if (op0 == op1 && ! side_effects_p (op0)
4115 && GET_MODE_CLASS (mode) != MODE_CC)
4120 if (op1 == const0_rtx && ! side_effects_p (op0))
4122 if (GET_CODE (op1) == CONST_INT
4123 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4125 if (op0 == op1 && ! side_effects_p (op0)
4126 && GET_MODE_CLASS (mode) != MODE_CC)
4129 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4130 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4131 && ! side_effects_p (op0)
4132 && GET_MODE_CLASS (mode) != MODE_CC)
4137 /* Convert divide by power of two into shift (divide by 1 handled
4139 if (GET_CODE (op1) == CONST_INT
4140 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
4141 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
4143 /* ... fall through ... */
4146 if (op1 == CONST1_RTX (mode))
4149 /* In IEEE floating point, 0/x is not always 0. */
4150 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4151 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4152 && op0 == CONST0_RTX (mode)
4153 && ! side_effects_p (op1))
4156 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4157 /* Change division by a constant into multiplication. Only do
4158 this with -ffast-math until an expert says it is safe in
4160 else if (GET_CODE (op1) == CONST_DOUBLE
4161 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
4162 && op1 != CONST0_RTX (mode)
4166 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4168 if (! REAL_VALUES_EQUAL (d, dconst0))
4170 #if defined (REAL_ARITHMETIC)
4171 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
4172 return gen_rtx_MULT (mode, op0,
4173 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
4175 return gen_rtx_MULT (mode, op0,
4176 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4184 /* Handle modulus by power of two (mod with 1 handled below). */
4185 if (GET_CODE (op1) == CONST_INT
4186 && exact_log2 (INTVAL (op1)) > 0)
4187 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
4189 /* ... fall through ... */
4192 if ((op0 == const0_rtx || op1 == const1_rtx)
4193 && ! side_effects_p (op0) && ! side_effects_p (op1))
4199 /* Rotating ~0 always results in ~0. */
4200 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4201 && INTVAL (op0) == GET_MODE_MASK (mode)
4202 && ! side_effects_p (op1))
4205 /* ... fall through ... */
4210 if (op1 == const0_rtx)
4212 if (op0 == const0_rtx && ! side_effects_p (op1))
4217 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4218 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4219 && ! side_effects_p (op0))
4221 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4226 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4228 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4229 && ! side_effects_p (op0))
4231 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4236 if (op1 == const0_rtx && ! side_effects_p (op0))
4238 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4243 if (op1 == constm1_rtx && ! side_effects_p (op0))
4245 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4256 /* Get the integer argument values in two forms:
4257 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4259 arg0 = INTVAL (op0);
4260 arg1 = INTVAL (op1);
4262 if (width < HOST_BITS_PER_WIDE_INT)
4264 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4265 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4268 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4269 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4272 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4273 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4281 /* Compute the value of the arithmetic. */
4286 val = arg0s + arg1s;
4290 val = arg0s - arg1s;
4294 val = arg0s * arg1s;
4300 val = arg0s / arg1s;
4306 val = arg0s % arg1s;
4312 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4318 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4334 /* If shift count is undefined, don't fold it; let the machine do
4335 what it wants. But truncate it if the machine will do that. */
4339 #ifdef SHIFT_COUNT_TRUNCATED
4340 if (SHIFT_COUNT_TRUNCATED)
4344 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4351 #ifdef SHIFT_COUNT_TRUNCATED
4352 if (SHIFT_COUNT_TRUNCATED)
4356 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4363 #ifdef SHIFT_COUNT_TRUNCATED
4364 if (SHIFT_COUNT_TRUNCATED)
4368 val = arg0s >> arg1;
4370 /* Bootstrap compiler may not have sign extended the right shift.
4371 Manually extend the sign to insure bootstrap cc matches gcc. */
4372 if (arg0s < 0 && arg1 > 0)
4373 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4382 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4383 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4391 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4392 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4396 /* Do nothing here. */
4400 val = arg0s <= arg1s ? arg0s : arg1s;
4404 val = ((unsigned HOST_WIDE_INT) arg0
4405 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4409 val = arg0s > arg1s ? arg0s : arg1s;
4413 val = ((unsigned HOST_WIDE_INT) arg0
4414 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4421 val = trunc_int_for_mode (val, mode);
4423 return GEN_INT (val);
4426 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4429 Rather than test for specific case, we do this by a brute-force method
4430 and do all possible simplifications until no more changes occur. Then
4431 we rebuild the operation. */
4434 simplify_plus_minus (code, mode, op0, op1)
4436 enum machine_mode mode;
4442 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4443 int first = 1, negate = 0, changed;
4446 bzero ((char *) ops, sizeof ops);
4448 /* Set up the two operands and then expand them until nothing has been
4449 changed. If we run out of room in our array, give up; this should
4450 almost never happen. */
4452 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4459 for (i = 0; i < n_ops; i++)
4460 switch (GET_CODE (ops[i]))
4467 ops[n_ops] = XEXP (ops[i], 1);
4468 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4469 ops[i] = XEXP (ops[i], 0);
4475 ops[i] = XEXP (ops[i], 0);
4476 negs[i] = ! negs[i];
4481 ops[i] = XEXP (ops[i], 0);
4487 /* ~a -> (-a - 1) */
4490 ops[n_ops] = constm1_rtx;
4491 negs[n_ops++] = negs[i];
4492 ops[i] = XEXP (ops[i], 0);
4493 negs[i] = ! negs[i];
4500 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4508 /* If we only have two operands, we can't do anything. */
4512 /* Now simplify each pair of operands until nothing changes. The first
4513 time through just simplify constants against each other. */
4520 for (i = 0; i < n_ops - 1; i++)
4521 for (j = i + 1; j < n_ops; j++)
4522 if (ops[i] != 0 && ops[j] != 0
4523 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4525 rtx lhs = ops[i], rhs = ops[j];
4526 enum rtx_code ncode = PLUS;
4528 if (negs[i] && ! negs[j])
4529 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4530 else if (! negs[i] && negs[j])
4533 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4536 ops[i] = tem, ops[j] = 0;
4537 negs[i] = negs[i] && negs[j];
4538 if (GET_CODE (tem) == NEG)
4539 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4541 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4542 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4550 /* Pack all the operands to the lower-numbered entries and give up if
4551 we didn't reduce the number of operands we had. Make sure we
4552 count a CONST as two operands. If we have the same number of
4553 operands, but have made more CONSTs than we had, this is also
4554 an improvement, so accept it. */
4556 for (i = 0, j = 0; j < n_ops; j++)
4559 ops[i] = ops[j], negs[i++] = negs[j];
4560 if (GET_CODE (ops[j]) == CONST)
4564 if (i + n_consts > input_ops
4565 || (i + n_consts == input_ops && n_consts <= input_consts))
4570 /* If we have a CONST_INT, put it last. */
4571 for (i = 0; i < n_ops - 1; i++)
4572 if (GET_CODE (ops[i]) == CONST_INT)
4574 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4575 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4578 /* Put a non-negated operand first. If there aren't any, make all
4579 operands positive and negate the whole thing later. */
4580 for (i = 0; i < n_ops && negs[i]; i++)
4585 for (i = 0; i < n_ops; i++)
4591 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4592 j = negs[0], negs[0] = negs[i], negs[i] = j;
4595 /* Now make the result by performing the requested operations. */
4597 for (i = 1; i < n_ops; i++)
4598 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4600 return negate ? gen_rtx_NEG (mode, result) : result;
4603 /* Make a binary operation by properly ordering the operands and
4604 seeing if the expression folds. */
4607 cse_gen_binary (code, mode, op0, op1)
4609 enum machine_mode mode;
4614 /* Put complex operands first and constants second if commutative. */
4615 if (GET_RTX_CLASS (code) == 'c'
4616 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4617 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4618 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4619 || (GET_CODE (op0) == SUBREG
4620 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4621 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4622 tem = op0, op0 = op1, op1 = tem;
4624 /* If this simplifies, do it. */
4625 tem = simplify_binary_operation (code, mode, op0, op1);
4630 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4631 just form the operation. */
4633 if (code == PLUS && GET_CODE (op1) == CONST_INT
4634 && GET_MODE (op0) != VOIDmode)
4635 return plus_constant (op0, INTVAL (op1));
4636 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4637 && GET_MODE (op0) != VOIDmode)
4638 return plus_constant (op0, - INTVAL (op1));
4640 return gen_rtx_fmt_ee (code, mode, op0, op1);
4648 int equal, op0lt, op1lt;
4652 check_fold_consts (data)
4655 struct cfc_args * args = (struct cfc_args *) data;
4656 REAL_VALUE_TYPE d0, d1;
4658 REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
4659 REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
4660 args->equal = REAL_VALUES_EQUAL (d0, d1);
4661 args->op0lt = REAL_VALUES_LESS (d0, d1);
4662 args->op1lt = REAL_VALUES_LESS (d1, d0);
4665 /* Like simplify_binary_operation except used for relational operators.
4666 MODE is the mode of the operands, not that of the result. If MODE
4667 is VOIDmode, both operands must also be VOIDmode and we compare the
4668 operands in "infinite precision".
4670 If no simplification is possible, this function returns zero. Otherwise,
4671 it returns either const_true_rtx or const0_rtx. */
4674 simplify_relational_operation (code, mode, op0, op1)
4676 enum machine_mode mode;
4679 int equal, op0lt, op0ltu, op1lt, op1ltu;
4682 /* If op0 is a compare, extract the comparison arguments from it. */
4683 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4684 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4686 /* We can't simplify MODE_CC values since we don't know what the
4687 actual comparison is. */
4688 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4695 /* For integer comparisons of A and B maybe we can simplify A - B and can
4696 then simplify a comparison of that with zero. If A and B are both either
4697 a register or a CONST_INT, this can't help; testing for these cases will
4698 prevent infinite recursion here and speed things up.
4700 If CODE is an unsigned comparison, then we can never do this optimization,
4701 because it gives an incorrect result if the subtraction wraps around zero.
4702 ANSI C defines unsigned operations such that they never overflow, and
4703 thus such cases can not be ignored. */
4705 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4706 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4707 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4708 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4709 && code != GTU && code != GEU && code != LTU && code != LEU)
4710 return simplify_relational_operation (signed_condition (code),
4711 mode, tem, const0_rtx);
4713 /* For non-IEEE floating-point, if the two operands are equal, we know the
4715 if (rtx_equal_p (op0, op1)
4716 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4717 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4718 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4720 /* If the operands are floating-point constants, see if we can fold
4722 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4723 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4724 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4726 struct cfc_args args;
4728 /* Setup input for check_fold_consts() */
4732 if (do_float_handler(check_fold_consts, (PTR) &args) == 0)
4733 /* We got an exception from check_fold_consts() */
4736 /* Receive output from check_fold_consts() */
4738 op0lt = op0ltu = args.op0lt;
4739 op1lt = op1ltu = args.op1lt;
4741 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4743 /* Otherwise, see if the operands are both integers. */
4744 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4745 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4746 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4748 int width = GET_MODE_BITSIZE (mode);
4749 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4750 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4752 /* Get the two words comprising each integer constant. */
4753 if (GET_CODE (op0) == CONST_DOUBLE)
4755 l0u = l0s = CONST_DOUBLE_LOW (op0);
4756 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4760 l0u = l0s = INTVAL (op0);
4761 h0u = h0s = l0s < 0 ? -1 : 0;
4764 if (GET_CODE (op1) == CONST_DOUBLE)
4766 l1u = l1s = CONST_DOUBLE_LOW (op1);
4767 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4771 l1u = l1s = INTVAL (op1);
4772 h1u = h1s = l1s < 0 ? -1 : 0;
4775 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4776 we have to sign or zero-extend the values. */
4777 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4778 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4780 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4782 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4783 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4785 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4786 l0s |= ((HOST_WIDE_INT) (-1) << width);
4788 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4789 l1s |= ((HOST_WIDE_INT) (-1) << width);
4792 equal = (h0u == h1u && l0u == l1u);
4793 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4794 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4795 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4796 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4799 /* Otherwise, there are some code-specific tests we can make. */
4805 /* References to the frame plus a constant or labels cannot
4806 be zero, but a SYMBOL_REF can due to #pragma weak. */
4807 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4808 || GET_CODE (op0) == LABEL_REF)
4809 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4810 /* On some machines, the ap reg can be 0 sometimes. */
4811 && op0 != arg_pointer_rtx
4818 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4819 || GET_CODE (op0) == LABEL_REF)
4820 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4821 && op0 != arg_pointer_rtx
4824 return const_true_rtx;
4828 /* Unsigned values are never negative. */
4829 if (op1 == const0_rtx)
4830 return const_true_rtx;
4834 if (op1 == const0_rtx)
4839 /* Unsigned values are never greater than the largest
4841 if (GET_CODE (op1) == CONST_INT
4842 && INTVAL (op1) == GET_MODE_MASK (mode)
4843 && INTEGRAL_MODE_P (mode))
4844 return const_true_rtx;
4848 if (GET_CODE (op1) == CONST_INT
4849 && INTVAL (op1) == GET_MODE_MASK (mode)
4850 && INTEGRAL_MODE_P (mode))
4861 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4866 return equal ? const_true_rtx : const0_rtx;
4868 return ! equal ? const_true_rtx : const0_rtx;
4870 return op0lt ? const_true_rtx : const0_rtx;
4872 return op1lt ? const_true_rtx : const0_rtx;
4874 return op0ltu ? const_true_rtx : const0_rtx;
4876 return op1ltu ? const_true_rtx : const0_rtx;
4878 return equal || op0lt ? const_true_rtx : const0_rtx;
4880 return equal || op1lt ? const_true_rtx : const0_rtx;
4882 return equal || op0ltu ? const_true_rtx : const0_rtx;
4884 return equal || op1ltu ? const_true_rtx : const0_rtx;
4890 /* Simplify CODE, an operation with result mode MODE and three operands,
4891 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4892 a constant. Return 0 if no simplifications is possible. */
4895 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4897 enum machine_mode mode, op0_mode;
4900 int width = GET_MODE_BITSIZE (mode);
4902 /* VOIDmode means "infinite" precision. */
4904 width = HOST_BITS_PER_WIDE_INT;
4910 if (GET_CODE (op0) == CONST_INT
4911 && GET_CODE (op1) == CONST_INT
4912 && GET_CODE (op2) == CONST_INT
4913 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4914 && width <= HOST_BITS_PER_WIDE_INT)
4916 /* Extracting a bit-field from a constant */
4917 HOST_WIDE_INT val = INTVAL (op0);
4919 if (BITS_BIG_ENDIAN)
4920 val >>= (GET_MODE_BITSIZE (op0_mode)
4921 - INTVAL (op2) - INTVAL (op1));
4923 val >>= INTVAL (op2);
4925 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4927 /* First zero-extend. */
4928 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4929 /* If desired, propagate sign bit. */
4930 if (code == SIGN_EXTRACT
4931 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4932 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4935 /* Clear the bits that don't belong in our mode,
4936 unless they and our sign bit are all one.
4937 So we get either a reasonable negative value or a reasonable
4938 unsigned value for this mode. */
4939 if (width < HOST_BITS_PER_WIDE_INT
4940 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4941 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4942 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4944 return GEN_INT (val);
4949 if (GET_CODE (op0) == CONST_INT)
4950 return op0 != const0_rtx ? op1 : op2;
4952 /* Convert a == b ? b : a to "a". */
4953 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4954 && rtx_equal_p (XEXP (op0, 0), op1)
4955 && rtx_equal_p (XEXP (op0, 1), op2))
4957 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4958 && rtx_equal_p (XEXP (op0, 1), op1)
4959 && rtx_equal_p (XEXP (op0, 0), op2))
4961 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4964 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4965 XEXP (op0, 0), XEXP (op0, 1));
4966 /* See if any simplifications were possible. */
4967 if (temp == const0_rtx)
4969 else if (temp == const1_rtx)
4981 /* If X is a nontrivial arithmetic operation on an argument
4982 for which a constant value can be determined, return
4983 the result of operating on that value, as a constant.
4984 Otherwise, return X, possibly with one or more operands
4985 modified by recursive calls to this function.
4987 If X is a register whose contents are known, we do NOT
4988 return those contents here. equiv_constant is called to
4991 INSN is the insn that we may be modifying. If it is 0, make a copy
4992 of X before modifying it. */
4999 register enum rtx_code code;
5000 register enum machine_mode mode;
5007 /* Folded equivalents of first two operands of X. */
5011 /* Constant equivalents of first three operands of X;
5012 0 when no such equivalent is known. */
5017 /* The mode of the first operand of X. We need this for sign and zero
5019 enum machine_mode mode_arg0;
5024 mode = GET_MODE (x);
5025 code = GET_CODE (x);
5034 /* No use simplifying an EXPR_LIST
5035 since they are used only for lists of args
5036 in a function call's REG_EQUAL note. */
5038 /* Changing anything inside an ADDRESSOF is incorrect; we don't
5039 want to (e.g.,) make (addressof (const_int 0)) just because
5040 the location is known to be zero. */
5046 return prev_insn_cc0;
5050 /* If the next insn is a CODE_LABEL followed by a jump table,
5051 PC's value is a LABEL_REF pointing to that label. That
5052 lets us fold switch statements on the Vax. */
5053 if (insn && GET_CODE (insn) == JUMP_INSN)
5055 rtx next = next_nonnote_insn (insn);
5057 if (next && GET_CODE (next) == CODE_LABEL
5058 && NEXT_INSN (next) != 0
5059 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
5060 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
5061 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
5062 return gen_rtx_LABEL_REF (Pmode, next);
5067 /* See if we previously assigned a constant value to this SUBREG. */
5068 if ((new = lookup_as_function (x, CONST_INT)) != 0
5069 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
5072 /* If this is a paradoxical SUBREG, we have no idea what value the
5073 extra bits would have. However, if the operand is equivalent
5074 to a SUBREG whose operand is the same as our mode, and all the
5075 modes are within a word, we can just use the inner operand
5076 because these SUBREGs just say how to treat the register.
5078 Similarly if we find an integer constant. */
5080 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
5082 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
5083 struct table_elt *elt;
5085 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
5086 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
5087 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
5089 for (elt = elt->first_same_value;
5090 elt; elt = elt->next_same_value)
5092 if (CONSTANT_P (elt->exp)
5093 && GET_MODE (elt->exp) == VOIDmode)
5096 if (GET_CODE (elt->exp) == SUBREG
5097 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5098 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5099 return copy_rtx (SUBREG_REG (elt->exp));
5105 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5106 We might be able to if the SUBREG is extracting a single word in an
5107 integral mode or extracting the low part. */
5109 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
5110 const_arg0 = equiv_constant (folded_arg0);
5112 folded_arg0 = const_arg0;
5114 if (folded_arg0 != SUBREG_REG (x))
5118 if (GET_MODE_CLASS (mode) == MODE_INT
5119 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5120 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
5121 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
5122 GET_MODE (SUBREG_REG (x)));
5123 if (new == 0 && subreg_lowpart_p (x))
5124 new = gen_lowpart_if_possible (mode, folded_arg0);
5129 /* If this is a narrowing SUBREG and our operand is a REG, see if
5130 we can find an equivalence for REG that is an arithmetic operation
5131 in a wider mode where both operands are paradoxical SUBREGs
5132 from objects of our result mode. In that case, we couldn't report
5133 an equivalent value for that operation, since we don't know what the
5134 extra bits will be. But we can find an equivalence for this SUBREG
5135 by folding that operation is the narrow mode. This allows us to
5136 fold arithmetic in narrow modes when the machine only supports
5137 word-sized arithmetic.
5139 Also look for a case where we have a SUBREG whose operand is the
5140 same as our result. If both modes are smaller than a word, we
5141 are simply interpreting a register in different modes and we
5142 can use the inner value. */
5144 if (GET_CODE (folded_arg0) == REG
5145 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
5146 && subreg_lowpart_p (x))
5148 struct table_elt *elt;
5150 /* We can use HASH here since we know that canon_hash won't be
5152 elt = lookup (folded_arg0,
5153 HASH (folded_arg0, GET_MODE (folded_arg0)),
5154 GET_MODE (folded_arg0));
5157 elt = elt->first_same_value;
5159 for (; elt; elt = elt->next_same_value)
5161 enum rtx_code eltcode = GET_CODE (elt->exp);
5163 /* Just check for unary and binary operations. */
5164 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
5165 && GET_CODE (elt->exp) != SIGN_EXTEND
5166 && GET_CODE (elt->exp) != ZERO_EXTEND
5167 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5168 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
5170 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
5172 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5173 op0 = fold_rtx (op0, NULL_RTX);
5175 op0 = equiv_constant (op0);
5177 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
5180 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
5181 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
5182 && eltcode != DIV && eltcode != MOD
5183 && eltcode != UDIV && eltcode != UMOD
5184 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
5185 && eltcode != ROTATE && eltcode != ROTATERT
5186 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5187 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
5189 || CONSTANT_P (XEXP (elt->exp, 0)))
5190 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
5191 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
5193 || CONSTANT_P (XEXP (elt->exp, 1))))
5195 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
5196 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
5198 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5199 op0 = fold_rtx (op0, NULL_RTX);
5202 op0 = equiv_constant (op0);
5204 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5205 op1 = fold_rtx (op1, NULL_RTX);
5208 op1 = equiv_constant (op1);
5210 /* If we are looking for the low SImode part of
5211 (ashift:DI c (const_int 32)), it doesn't work
5212 to compute that in SImode, because a 32-bit shift
5213 in SImode is unpredictable. We know the value is 0. */
5215 && GET_CODE (elt->exp) == ASHIFT
5216 && GET_CODE (op1) == CONST_INT
5217 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5219 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5221 /* If the count fits in the inner mode's width,
5222 but exceeds the outer mode's width,
5223 the value will get truncated to 0
5227 /* If the count exceeds even the inner mode's width,
5228 don't fold this expression. */
5231 else if (op0 && op1)
5232 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5236 else if (GET_CODE (elt->exp) == SUBREG
5237 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5238 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5240 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5241 new = copy_rtx (SUBREG_REG (elt->exp));
5252 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5253 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5254 new = lookup_as_function (XEXP (x, 0), code);
5256 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5260 /* If we are not actually processing an insn, don't try to find the
5261 best address. Not only don't we care, but we could modify the
5262 MEM in an invalid way since we have no insn to validate against. */
5264 find_best_addr (insn, &XEXP (x, 0));
5267 /* Even if we don't fold in the insn itself,
5268 we can safely do so here, in hopes of getting a constant. */
5269 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5271 HOST_WIDE_INT offset = 0;
5273 if (GET_CODE (addr) == REG
5274 && REGNO_QTY_VALID_P (REGNO (addr))
5275 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
5276 && qty_const[REG_QTY (REGNO (addr))] != 0)
5277 addr = qty_const[REG_QTY (REGNO (addr))];
5279 /* If address is constant, split it into a base and integer offset. */
5280 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5282 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5283 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5285 base = XEXP (XEXP (addr, 0), 0);
5286 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5288 else if (GET_CODE (addr) == LO_SUM
5289 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5290 base = XEXP (addr, 1);
5291 else if (GET_CODE (addr) == ADDRESSOF)
5292 return change_address (x, VOIDmode, addr);
5294 /* If this is a constant pool reference, we can fold it into its
5295 constant to allow better value tracking. */
5296 if (base && GET_CODE (base) == SYMBOL_REF
5297 && CONSTANT_POOL_ADDRESS_P (base))
5299 rtx constant = get_pool_constant (base);
5300 enum machine_mode const_mode = get_pool_mode (base);
5303 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5304 constant_pool_entries_cost = COST (constant);
5306 /* If we are loading the full constant, we have an equivalence. */
5307 if (offset == 0 && mode == const_mode)
5310 /* If this actually isn't a constant (weird!), we can't do
5311 anything. Otherwise, handle the two most common cases:
5312 extracting a word from a multi-word constant, and extracting
5313 the low-order bits. Other cases don't seem common enough to
5315 if (! CONSTANT_P (constant))
5318 if (GET_MODE_CLASS (mode) == MODE_INT
5319 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5320 && offset % UNITS_PER_WORD == 0
5321 && (new = operand_subword (constant,
5322 offset / UNITS_PER_WORD,
5323 0, const_mode)) != 0)
5326 if (((BYTES_BIG_ENDIAN
5327 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5328 || (! BYTES_BIG_ENDIAN && offset == 0))
5329 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5333 /* If this is a reference to a label at a known position in a jump
5334 table, we also know its value. */
5335 if (base && GET_CODE (base) == LABEL_REF)
5337 rtx label = XEXP (base, 0);
5338 rtx table_insn = NEXT_INSN (label);
5340 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5341 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5343 rtx table = PATTERN (table_insn);
5346 && (offset / GET_MODE_SIZE (GET_MODE (table))
5347 < XVECLEN (table, 0)))
5348 return XVECEXP (table, 0,
5349 offset / GET_MODE_SIZE (GET_MODE (table)));
5351 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5352 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5354 rtx table = PATTERN (table_insn);
5357 && (offset / GET_MODE_SIZE (GET_MODE (table))
5358 < XVECLEN (table, 1)))
5360 offset /= GET_MODE_SIZE (GET_MODE (table));
5361 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5364 if (GET_MODE (table) != Pmode)
5365 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5367 /* Indicate this is a constant. This isn't a
5368 valid form of CONST, but it will only be used
5369 to fold the next insns and then discarded, so
5372 Note this expression must be explicitly discarded,
5373 by cse_insn, else it may end up in a REG_EQUAL note
5374 and "escape" to cause problems elsewhere. */
5375 return gen_rtx_CONST (GET_MODE (new), new);
5384 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5385 validate_change (insn, &XVECEXP (x, 3, i),
5386 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5396 mode_arg0 = VOIDmode;
5398 /* Try folding our operands.
5399 Then see which ones have constant values known. */
5401 fmt = GET_RTX_FORMAT (code);
5402 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5405 rtx arg = XEXP (x, i);
5406 rtx folded_arg = arg, const_arg = 0;
5407 enum machine_mode mode_arg = GET_MODE (arg);
5408 rtx cheap_arg, expensive_arg;
5409 rtx replacements[2];
5412 /* Most arguments are cheap, so handle them specially. */
5413 switch (GET_CODE (arg))
5416 /* This is the same as calling equiv_constant; it is duplicated
5418 if (REGNO_QTY_VALID_P (REGNO (arg))
5419 && qty_const[REG_QTY (REGNO (arg))] != 0
5420 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
5421 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
5423 = gen_lowpart_if_possible (GET_MODE (arg),
5424 qty_const[REG_QTY (REGNO (arg))]);
5437 folded_arg = prev_insn_cc0;
5438 mode_arg = prev_insn_cc0_mode;
5439 const_arg = equiv_constant (folded_arg);
5444 folded_arg = fold_rtx (arg, insn);
5445 const_arg = equiv_constant (folded_arg);
5448 /* For the first three operands, see if the operand
5449 is constant or equivalent to a constant. */
5453 folded_arg0 = folded_arg;
5454 const_arg0 = const_arg;
5455 mode_arg0 = mode_arg;
5458 folded_arg1 = folded_arg;
5459 const_arg1 = const_arg;
5462 const_arg2 = const_arg;
5466 /* Pick the least expensive of the folded argument and an
5467 equivalent constant argument. */
5468 if (const_arg == 0 || const_arg == folded_arg
5469 || COST (const_arg) > COST (folded_arg))
5470 cheap_arg = folded_arg, expensive_arg = const_arg;
5472 cheap_arg = const_arg, expensive_arg = folded_arg;
5474 /* Try to replace the operand with the cheapest of the two
5475 possibilities. If it doesn't work and this is either of the first
5476 two operands of a commutative operation, try swapping them.
5477 If THAT fails, try the more expensive, provided it is cheaper
5478 than what is already there. */
5480 if (cheap_arg == XEXP (x, i))
5483 if (insn == 0 && ! copied)
5489 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5491 j < 2 && replacements[j]
5492 && COST (replacements[j]) < COST (XEXP (x, i));
5495 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5498 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5500 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5501 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5503 if (apply_change_group ())
5505 /* Swap them back to be invalid so that this loop can
5506 continue and flag them to be swapped back later. */
5509 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5521 /* Don't try to fold inside of a vector of expressions.
5522 Doing nothing is harmless. */
5526 /* If a commutative operation, place a constant integer as the second
5527 operand unless the first operand is also a constant integer. Otherwise,
5528 place any constant second unless the first operand is also a constant. */
5530 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5532 if (must_swap || (const_arg0
5534 || (GET_CODE (const_arg0) == CONST_INT
5535 && GET_CODE (const_arg1) != CONST_INT))))
5537 register rtx tem = XEXP (x, 0);
5539 if (insn == 0 && ! copied)
5545 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5546 validate_change (insn, &XEXP (x, 1), tem, 1);
5547 if (apply_change_group ())
5549 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5550 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5555 /* If X is an arithmetic operation, see if we can simplify it. */
5557 switch (GET_RTX_CLASS (code))
5563 /* We can't simplify extension ops unless we know the
5565 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5566 && mode_arg0 == VOIDmode)
5569 /* If we had a CONST, strip it off and put it back later if we
5571 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5572 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5574 new = simplify_unary_operation (code, mode,
5575 const_arg0 ? const_arg0 : folded_arg0,
5577 if (new != 0 && is_const)
5578 new = gen_rtx_CONST (mode, new);
5583 /* See what items are actually being compared and set FOLDED_ARG[01]
5584 to those values and CODE to the actual comparison code. If any are
5585 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5586 do anything if both operands are already known to be constant. */
5588 if (const_arg0 == 0 || const_arg1 == 0)
5590 struct table_elt *p0, *p1;
5591 rtx true = const_true_rtx, false = const0_rtx;
5592 enum machine_mode mode_arg1;
5594 #ifdef FLOAT_STORE_FLAG_VALUE
5595 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5597 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5599 false = CONST0_RTX (mode);
5603 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5604 &mode_arg0, &mode_arg1);
5605 const_arg0 = equiv_constant (folded_arg0);
5606 const_arg1 = equiv_constant (folded_arg1);
5608 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5609 what kinds of things are being compared, so we can't do
5610 anything with this comparison. */
5612 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5615 /* If we do not now have two constants being compared, see
5616 if we can nevertheless deduce some things about the
5618 if (const_arg0 == 0 || const_arg1 == 0)
5620 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5621 non-explicit constant? These aren't zero, but we
5622 don't know their sign. */
5623 if (const_arg1 == const0_rtx
5624 && (NONZERO_BASE_PLUS_P (folded_arg0)
5625 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5627 || GET_CODE (folded_arg0) == SYMBOL_REF
5629 || GET_CODE (folded_arg0) == LABEL_REF
5630 || GET_CODE (folded_arg0) == CONST))
5634 else if (code == NE)
5638 /* See if the two operands are the same. We don't do this
5639 for IEEE floating-point since we can't assume x == x
5640 since x might be a NaN. */
5642 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5643 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5644 && (folded_arg0 == folded_arg1
5645 || (GET_CODE (folded_arg0) == REG
5646 && GET_CODE (folded_arg1) == REG
5647 && (REG_QTY (REGNO (folded_arg0))
5648 == REG_QTY (REGNO (folded_arg1))))
5649 || ((p0 = lookup (folded_arg0,
5650 (safe_hash (folded_arg0, mode_arg0)
5651 % NBUCKETS), mode_arg0))
5652 && (p1 = lookup (folded_arg1,
5653 (safe_hash (folded_arg1, mode_arg0)
5654 % NBUCKETS), mode_arg0))
5655 && p0->first_same_value == p1->first_same_value)))
5656 return ((code == EQ || code == LE || code == GE
5657 || code == LEU || code == GEU)
5660 /* If FOLDED_ARG0 is a register, see if the comparison we are
5661 doing now is either the same as we did before or the reverse
5662 (we only check the reverse if not floating-point). */
5663 else if (GET_CODE (folded_arg0) == REG)
5665 int qty = REG_QTY (REGNO (folded_arg0));
5667 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5668 && (comparison_dominates_p (qty_comparison_code[qty], code)
5669 || (comparison_dominates_p (qty_comparison_code[qty],
5670 reverse_condition (code))
5671 && ! FLOAT_MODE_P (mode_arg0)))
5672 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5674 && rtx_equal_p (qty_comparison_const[qty],
5676 || (GET_CODE (folded_arg1) == REG
5677 && (REG_QTY (REGNO (folded_arg1))
5678 == qty_comparison_qty[qty]))))
5679 return (comparison_dominates_p (qty_comparison_code[qty],
5686 /* If we are comparing against zero, see if the first operand is
5687 equivalent to an IOR with a constant. If so, we may be able to
5688 determine the result of this comparison. */
5690 if (const_arg1 == const0_rtx)
5692 rtx y = lookup_as_function (folded_arg0, IOR);
5696 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5697 && GET_CODE (inner_const) == CONST_INT
5698 && INTVAL (inner_const) != 0)
5700 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5701 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5702 && (INTVAL (inner_const)
5703 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5704 rtx true = const_true_rtx, false = const0_rtx;
5706 #ifdef FLOAT_STORE_FLAG_VALUE
5707 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5709 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5711 false = CONST0_RTX (mode);
5735 new = simplify_relational_operation (code, mode_arg0,
5736 const_arg0 ? const_arg0 : folded_arg0,
5737 const_arg1 ? const_arg1 : folded_arg1);
5738 #ifdef FLOAT_STORE_FLAG_VALUE
5739 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5740 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5741 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5750 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5751 with that LABEL_REF as its second operand. If so, the result is
5752 the first operand of that MINUS. This handles switches with an
5753 ADDR_DIFF_VEC table. */
5754 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5757 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5758 : lookup_as_function (folded_arg0, MINUS);
5760 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5761 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5764 /* Now try for a CONST of a MINUS like the above. */
5765 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5766 : lookup_as_function (folded_arg0, CONST))) != 0
5767 && GET_CODE (XEXP (y, 0)) == MINUS
5768 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5769 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5770 return XEXP (XEXP (y, 0), 0);
5773 /* Likewise if the operands are in the other order. */
5774 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5777 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5778 : lookup_as_function (folded_arg1, MINUS);
5780 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5781 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5784 /* Now try for a CONST of a MINUS like the above. */
5785 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5786 : lookup_as_function (folded_arg1, CONST))) != 0
5787 && GET_CODE (XEXP (y, 0)) == MINUS
5788 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5789 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5790 return XEXP (XEXP (y, 0), 0);
5793 /* If second operand is a register equivalent to a negative
5794 CONST_INT, see if we can find a register equivalent to the
5795 positive constant. Make a MINUS if so. Don't do this for
5796 a non-negative constant since we might then alternate between
5797 chosing positive and negative constants. Having the positive
5798 constant previously-used is the more common case. Be sure
5799 the resulting constant is non-negative; if const_arg1 were
5800 the smallest negative number this would overflow: depending
5801 on the mode, this would either just be the same value (and
5802 hence not save anything) or be incorrect. */
5803 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5804 && INTVAL (const_arg1) < 0
5805 && - INTVAL (const_arg1) >= 0
5806 && GET_CODE (folded_arg1) == REG)
5808 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5810 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5814 for (p = p->first_same_value; p; p = p->next_same_value)
5815 if (GET_CODE (p->exp) == REG)
5816 return cse_gen_binary (MINUS, mode, folded_arg0,
5817 canon_reg (p->exp, NULL_RTX));
5822 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5823 If so, produce (PLUS Z C2-C). */
5824 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5826 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5827 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5828 return fold_rtx (plus_constant (copy_rtx (y),
5829 -INTVAL (const_arg1)),
5833 /* ... fall through ... */
5836 case SMIN: case SMAX: case UMIN: case UMAX:
5837 case IOR: case AND: case XOR:
5838 case MULT: case DIV: case UDIV:
5839 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5840 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5841 is known to be of similar form, we may be able to replace the
5842 operation with a combined operation. This may eliminate the
5843 intermediate operation if every use is simplified in this way.
5844 Note that the similar optimization done by combine.c only works
5845 if the intermediate operation's result has only one reference. */
5847 if (GET_CODE (folded_arg0) == REG
5848 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5851 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5852 rtx y = lookup_as_function (folded_arg0, code);
5854 enum rtx_code associate_code;
5858 || 0 == (inner_const
5859 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5860 || GET_CODE (inner_const) != CONST_INT
5861 /* If we have compiled a statement like
5862 "if (x == (x & mask1))", and now are looking at
5863 "x & mask2", we will have a case where the first operand
5864 of Y is the same as our first operand. Unless we detect
5865 this case, an infinite loop will result. */
5866 || XEXP (y, 0) == folded_arg0)
5869 /* Don't associate these operations if they are a PLUS with the
5870 same constant and it is a power of two. These might be doable
5871 with a pre- or post-increment. Similarly for two subtracts of
5872 identical powers of two with post decrement. */
5874 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5875 && ((HAVE_PRE_INCREMENT
5876 && exact_log2 (INTVAL (const_arg1)) >= 0)
5877 || (HAVE_POST_INCREMENT
5878 && exact_log2 (INTVAL (const_arg1)) >= 0)
5879 || (HAVE_PRE_DECREMENT
5880 && exact_log2 (- INTVAL (const_arg1)) >= 0)
5881 || (HAVE_POST_DECREMENT
5882 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
5885 /* Compute the code used to compose the constants. For example,
5886 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5889 = (code == MULT || code == DIV || code == UDIV ? MULT
5890 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5892 new_const = simplify_binary_operation (associate_code, mode,
5893 const_arg1, inner_const);
5898 /* If we are associating shift operations, don't let this
5899 produce a shift of the size of the object or larger.
5900 This could occur when we follow a sign-extend by a right
5901 shift on a machine that does a sign-extend as a pair
5904 if (is_shift && GET_CODE (new_const) == CONST_INT
5905 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5907 /* As an exception, we can turn an ASHIFTRT of this
5908 form into a shift of the number of bits - 1. */
5909 if (code == ASHIFTRT)
5910 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5915 y = copy_rtx (XEXP (y, 0));
5917 /* If Y contains our first operand (the most common way this
5918 can happen is if Y is a MEM), we would do into an infinite
5919 loop if we tried to fold it. So don't in that case. */
5921 if (! reg_mentioned_p (folded_arg0, y))
5922 y = fold_rtx (y, insn);
5924 return cse_gen_binary (code, mode, y, new_const);
5932 new = simplify_binary_operation (code, mode,
5933 const_arg0 ? const_arg0 : folded_arg0,
5934 const_arg1 ? const_arg1 : folded_arg1);
5938 /* (lo_sum (high X) X) is simply X. */
5939 if (code == LO_SUM && const_arg0 != 0
5940 && GET_CODE (const_arg0) == HIGH
5941 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5947 new = simplify_ternary_operation (code, mode, mode_arg0,
5948 const_arg0 ? const_arg0 : folded_arg0,
5949 const_arg1 ? const_arg1 : folded_arg1,
5950 const_arg2 ? const_arg2 : XEXP (x, 2));
5954 /* Always eliminate CONSTANT_P_RTX at this stage. */
5955 if (code == CONSTANT_P_RTX)
5956 return (const_arg0 ? const1_rtx : const0_rtx);
5960 return new ? new : x;
5963 /* Return a constant value currently equivalent to X.
5964 Return 0 if we don't know one. */
5970 if (GET_CODE (x) == REG
5971 && REGNO_QTY_VALID_P (REGNO (x))
5972 && qty_const[REG_QTY (REGNO (x))])
5973 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
5975 if (x == 0 || CONSTANT_P (x))
5978 /* If X is a MEM, try to fold it outside the context of any insn to see if
5979 it might be equivalent to a constant. That handles the case where it
5980 is a constant-pool reference. Then try to look it up in the hash table
5981 in case it is something whose value we have seen before. */
5983 if (GET_CODE (x) == MEM)
5985 struct table_elt *elt;
5987 x = fold_rtx (x, NULL_RTX);
5991 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5995 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5996 if (elt->is_const && CONSTANT_P (elt->exp))
6003 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
6004 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
6005 least-significant part of X.
6006 MODE specifies how big a part of X to return.
6008 If the requested operation cannot be done, 0 is returned.
6010 This is similar to gen_lowpart in emit-rtl.c. */
6013 gen_lowpart_if_possible (mode, x)
6014 enum machine_mode mode;
6017 rtx result = gen_lowpart_common (mode, x);
6021 else if (GET_CODE (x) == MEM)
6023 /* This is the only other case we handle. */
6024 register int offset = 0;
6027 if (WORDS_BIG_ENDIAN)
6028 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
6029 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
6030 if (BYTES_BIG_ENDIAN)
6031 /* Adjust the address so that the address-after-the-data is
6033 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
6034 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
6035 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
6036 if (! memory_address_p (mode, XEXP (new, 0)))
6038 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
6039 MEM_COPY_ATTRIBUTES (new, x);
6046 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
6047 branch. It will be zero if not.
6049 In certain cases, this can cause us to add an equivalence. For example,
6050 if we are following the taken case of
6052 we can add the fact that `i' and '2' are now equivalent.
6054 In any case, we can record that this comparison was passed. If the same
6055 comparison is seen later, we will know its value. */
6058 record_jump_equiv (insn, taken)
6062 int cond_known_true;
6064 enum machine_mode mode, mode0, mode1;
6065 int reversed_nonequality = 0;
6068 /* Ensure this is the right kind of insn. */
6069 if (! condjump_p (insn) || simplejump_p (insn))
6072 /* See if this jump condition is known true or false. */
6074 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
6076 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
6078 /* Get the type of comparison being done and the operands being compared.
6079 If we had to reverse a non-equality condition, record that fact so we
6080 know that it isn't valid for floating-point. */
6081 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
6082 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
6083 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
6085 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
6086 if (! cond_known_true)
6088 reversed_nonequality = (code != EQ && code != NE);
6089 code = reverse_condition (code);
6092 /* The mode is the mode of the non-constant. */
6094 if (mode1 != VOIDmode)
6097 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
6100 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6101 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6102 Make any useful entries we can with that information. Called from
6103 above function and called recursively. */
6106 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
6108 enum machine_mode mode;
6110 int reversed_nonequality;
6112 unsigned op0_hash, op1_hash;
6113 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
6114 struct table_elt *op0_elt, *op1_elt;
6116 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6117 we know that they are also equal in the smaller mode (this is also
6118 true for all smaller modes whether or not there is a SUBREG, but
6119 is not worth testing for with no SUBREG). */
6121 /* Note that GET_MODE (op0) may not equal MODE. */
6122 if (code == EQ && GET_CODE (op0) == SUBREG
6123 && (GET_MODE_SIZE (GET_MODE (op0))
6124 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6126 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6127 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6129 record_jump_cond (code, mode, SUBREG_REG (op0),
6130 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6131 reversed_nonequality);
6134 if (code == EQ && GET_CODE (op1) == SUBREG
6135 && (GET_MODE_SIZE (GET_MODE (op1))
6136 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6138 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6139 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6141 record_jump_cond (code, mode, SUBREG_REG (op1),
6142 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6143 reversed_nonequality);
6146 /* Similarly, if this is an NE comparison, and either is a SUBREG
6147 making a smaller mode, we know the whole thing is also NE. */
6149 /* Note that GET_MODE (op0) may not equal MODE;
6150 if we test MODE instead, we can get an infinite recursion
6151 alternating between two modes each wider than MODE. */
6153 if (code == NE && GET_CODE (op0) == SUBREG
6154 && subreg_lowpart_p (op0)
6155 && (GET_MODE_SIZE (GET_MODE (op0))
6156 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6158 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6159 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6161 record_jump_cond (code, mode, SUBREG_REG (op0),
6162 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6163 reversed_nonequality);
6166 if (code == NE && GET_CODE (op1) == SUBREG
6167 && subreg_lowpart_p (op1)
6168 && (GET_MODE_SIZE (GET_MODE (op1))
6169 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6171 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6172 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6174 record_jump_cond (code, mode, SUBREG_REG (op1),
6175 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6176 reversed_nonequality);
6179 /* Hash both operands. */
6182 hash_arg_in_memory = 0;
6183 hash_arg_in_struct = 0;
6184 op0_hash = HASH (op0, mode);
6185 op0_in_memory = hash_arg_in_memory;
6186 op0_in_struct = hash_arg_in_struct;
6192 hash_arg_in_memory = 0;
6193 hash_arg_in_struct = 0;
6194 op1_hash = HASH (op1, mode);
6195 op1_in_memory = hash_arg_in_memory;
6196 op1_in_struct = hash_arg_in_struct;
6201 /* Look up both operands. */
6202 op0_elt = lookup (op0, op0_hash, mode);
6203 op1_elt = lookup (op1, op1_hash, mode);
6205 /* If both operands are already equivalent or if they are not in the
6206 table but are identical, do nothing. */
6207 if ((op0_elt != 0 && op1_elt != 0
6208 && op0_elt->first_same_value == op1_elt->first_same_value)
6209 || op0 == op1 || rtx_equal_p (op0, op1))
6212 /* If we aren't setting two things equal all we can do is save this
6213 comparison. Similarly if this is floating-point. In the latter
6214 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6215 If we record the equality, we might inadvertently delete code
6216 whose intent was to change -0 to +0. */
6218 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6220 /* If we reversed a floating-point comparison, if OP0 is not a
6221 register, or if OP1 is neither a register or constant, we can't
6224 if (GET_CODE (op1) != REG)
6225 op1 = equiv_constant (op1);
6227 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6228 || GET_CODE (op0) != REG || op1 == 0)
6231 /* Put OP0 in the hash table if it isn't already. This gives it a
6232 new quantity number. */
6235 if (insert_regs (op0, NULL_PTR, 0))
6237 rehash_using_reg (op0);
6238 op0_hash = HASH (op0, mode);
6240 /* If OP0 is contained in OP1, this changes its hash code
6241 as well. Faster to rehash than to check, except
6242 for the simple case of a constant. */
6243 if (! CONSTANT_P (op1))
6244 op1_hash = HASH (op1,mode);
6247 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6248 op0_elt->in_memory = op0_in_memory;
6249 op0_elt->in_struct = op0_in_struct;
6252 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
6253 if (GET_CODE (op1) == REG)
6255 /* Look it up again--in case op0 and op1 are the same. */
6256 op1_elt = lookup (op1, op1_hash, mode);
6258 /* Put OP1 in the hash table so it gets a new quantity number. */
6261 if (insert_regs (op1, NULL_PTR, 0))
6263 rehash_using_reg (op1);
6264 op1_hash = HASH (op1, mode);
6267 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6268 op1_elt->in_memory = op1_in_memory;
6269 op1_elt->in_struct = op1_in_struct;
6272 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
6273 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
6277 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
6278 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
6284 /* If either side is still missing an equivalence, make it now,
6285 then merge the equivalences. */
6289 if (insert_regs (op0, NULL_PTR, 0))
6291 rehash_using_reg (op0);
6292 op0_hash = HASH (op0, mode);
6295 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6296 op0_elt->in_memory = op0_in_memory;
6297 op0_elt->in_struct = op0_in_struct;
6302 if (insert_regs (op1, NULL_PTR, 0))
6304 rehash_using_reg (op1);
6305 op1_hash = HASH (op1, mode);
6308 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6309 op1_elt->in_memory = op1_in_memory;
6310 op1_elt->in_struct = op1_in_struct;
6313 merge_equiv_classes (op0_elt, op1_elt);
6314 last_jump_equiv_class = op0_elt;
6317 /* CSE processing for one instruction.
6318 First simplify sources and addresses of all assignments
6319 in the instruction, using previously-computed equivalents values.
6320 Then install the new sources and destinations in the table
6321 of available values.
6323 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6324 the insn. It means that INSN is inside libcall block. In this
6325 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6327 /* Data on one SET contained in the instruction. */
6331 /* The SET rtx itself. */
6333 /* The SET_SRC of the rtx (the original value, if it is changing). */
6335 /* The hash-table element for the SET_SRC of the SET. */
6336 struct table_elt *src_elt;
6337 /* Hash value for the SET_SRC. */
6339 /* Hash value for the SET_DEST. */
6341 /* The SET_DEST, with SUBREG, etc., stripped. */
6343 /* Place where the pointer to the INNER_DEST was found. */
6344 rtx *inner_dest_loc;
6345 /* Nonzero if the SET_SRC is in memory. */
6347 /* Nonzero if the SET_SRC is in a structure. */
6349 /* Nonzero if the SET_SRC contains something
6350 whose value cannot be predicted and understood. */
6352 /* Original machine mode, in case it becomes a CONST_INT. */
6353 enum machine_mode mode;
6354 /* A constant equivalent for SET_SRC, if any. */
6356 /* Hash value of constant equivalent for SET_SRC. */
6357 unsigned src_const_hash;
6358 /* Table entry for constant equivalent for SET_SRC, if any. */
6359 struct table_elt *src_const_elt;
6363 cse_insn (insn, libcall_insn)
6367 register rtx x = PATTERN (insn);
6370 register int n_sets = 0;
6373 /* Records what this insn does to set CC0. */
6374 rtx this_insn_cc0 = 0;
6375 enum machine_mode this_insn_cc0_mode = VOIDmode;
6379 struct table_elt *src_eqv_elt = 0;
6380 int src_eqv_volatile;
6381 int src_eqv_in_memory;
6382 int src_eqv_in_struct;
6383 unsigned src_eqv_hash;
6389 /* Find all the SETs and CLOBBERs in this instruction.
6390 Record all the SETs in the array `set' and count them.
6391 Also determine whether there is a CLOBBER that invalidates
6392 all memory references, or all references at varying addresses. */
6394 if (GET_CODE (insn) == CALL_INSN)
6396 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6397 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6398 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6401 if (GET_CODE (x) == SET)
6403 sets = (struct set *) alloca (sizeof (struct set));
6406 /* Ignore SETs that are unconditional jumps.
6407 They never need cse processing, so this does not hurt.
6408 The reason is not efficiency but rather
6409 so that we can test at the end for instructions
6410 that have been simplified to unconditional jumps
6411 and not be misled by unchanged instructions
6412 that were unconditional jumps to begin with. */
6413 if (SET_DEST (x) == pc_rtx
6414 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6417 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6418 The hard function value register is used only once, to copy to
6419 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6420 Ensure we invalidate the destination register. On the 80386 no
6421 other code would invalidate it since it is a fixed_reg.
6422 We need not check the return of apply_change_group; see canon_reg. */
6424 else if (GET_CODE (SET_SRC (x)) == CALL)
6426 canon_reg (SET_SRC (x), insn);
6427 apply_change_group ();
6428 fold_rtx (SET_SRC (x), insn);
6429 invalidate (SET_DEST (x), VOIDmode);
6434 else if (GET_CODE (x) == PARALLEL)
6436 register int lim = XVECLEN (x, 0);
6438 sets = (struct set *) alloca (lim * sizeof (struct set));
6440 /* Find all regs explicitly clobbered in this insn,
6441 and ensure they are not replaced with any other regs
6442 elsewhere in this insn.
6443 When a reg that is clobbered is also used for input,
6444 we should presume that that is for a reason,
6445 and we should not substitute some other register
6446 which is not supposed to be clobbered.
6447 Therefore, this loop cannot be merged into the one below
6448 because a CALL may precede a CLOBBER and refer to the
6449 value clobbered. We must not let a canonicalization do
6450 anything in that case. */
6451 for (i = 0; i < lim; i++)
6453 register rtx y = XVECEXP (x, 0, i);
6454 if (GET_CODE (y) == CLOBBER)
6456 rtx clobbered = XEXP (y, 0);
6458 if (GET_CODE (clobbered) == REG
6459 || GET_CODE (clobbered) == SUBREG)
6460 invalidate (clobbered, VOIDmode);
6461 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6462 || GET_CODE (clobbered) == ZERO_EXTRACT)
6463 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6467 for (i = 0; i < lim; i++)
6469 register rtx y = XVECEXP (x, 0, i);
6470 if (GET_CODE (y) == SET)
6472 /* As above, we ignore unconditional jumps and call-insns and
6473 ignore the result of apply_change_group. */
6474 if (GET_CODE (SET_SRC (y)) == CALL)
6476 canon_reg (SET_SRC (y), insn);
6477 apply_change_group ();
6478 fold_rtx (SET_SRC (y), insn);
6479 invalidate (SET_DEST (y), VOIDmode);
6481 else if (SET_DEST (y) == pc_rtx
6482 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6485 sets[n_sets++].rtl = y;
6487 else if (GET_CODE (y) == CLOBBER)
6489 /* If we clobber memory, canon the address.
6490 This does nothing when a register is clobbered
6491 because we have already invalidated the reg. */
6492 if (GET_CODE (XEXP (y, 0)) == MEM)
6493 canon_reg (XEXP (y, 0), NULL_RTX);
6495 else if (GET_CODE (y) == USE
6496 && ! (GET_CODE (XEXP (y, 0)) == REG
6497 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6498 canon_reg (y, NULL_RTX);
6499 else if (GET_CODE (y) == CALL)
6501 /* The result of apply_change_group can be ignored; see
6503 canon_reg (y, insn);
6504 apply_change_group ();
6509 else if (GET_CODE (x) == CLOBBER)
6511 if (GET_CODE (XEXP (x, 0)) == MEM)
6512 canon_reg (XEXP (x, 0), NULL_RTX);
6515 /* Canonicalize a USE of a pseudo register or memory location. */
6516 else if (GET_CODE (x) == USE
6517 && ! (GET_CODE (XEXP (x, 0)) == REG
6518 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6519 canon_reg (XEXP (x, 0), NULL_RTX);
6520 else if (GET_CODE (x) == CALL)
6522 /* The result of apply_change_group can be ignored; see canon_reg. */
6523 canon_reg (x, insn);
6524 apply_change_group ();
6528 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6529 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6530 is handled specially for this case, and if it isn't set, then there will
6531 be no equivalence for the destination. */
6532 if (n_sets == 1 && REG_NOTES (insn) != 0
6533 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6534 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6535 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6536 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6538 /* Canonicalize sources and addresses of destinations.
6539 We do this in a separate pass to avoid problems when a MATCH_DUP is
6540 present in the insn pattern. In that case, we want to ensure that
6541 we don't break the duplicate nature of the pattern. So we will replace
6542 both operands at the same time. Otherwise, we would fail to find an
6543 equivalent substitution in the loop calling validate_change below.
6545 We used to suppress canonicalization of DEST if it appears in SRC,
6546 but we don't do this any more. */
6548 for (i = 0; i < n_sets; i++)
6550 rtx dest = SET_DEST (sets[i].rtl);
6551 rtx src = SET_SRC (sets[i].rtl);
6552 rtx new = canon_reg (src, insn);
6555 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6556 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6557 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6558 || (insn_code = recog_memoized (insn)) < 0
6559 || insn_n_dups[insn_code] > 0)
6560 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6562 SET_SRC (sets[i].rtl) = new;
6564 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6566 validate_change (insn, &XEXP (dest, 1),
6567 canon_reg (XEXP (dest, 1), insn), 1);
6568 validate_change (insn, &XEXP (dest, 2),
6569 canon_reg (XEXP (dest, 2), insn), 1);
6572 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6573 || GET_CODE (dest) == ZERO_EXTRACT
6574 || GET_CODE (dest) == SIGN_EXTRACT)
6575 dest = XEXP (dest, 0);
6577 if (GET_CODE (dest) == MEM)
6578 canon_reg (dest, insn);
6581 /* Now that we have done all the replacements, we can apply the change
6582 group and see if they all work. Note that this will cause some
6583 canonicalizations that would have worked individually not to be applied
6584 because some other canonicalization didn't work, but this should not
6587 The result of apply_change_group can be ignored; see canon_reg. */
6589 apply_change_group ();
6591 /* Set sets[i].src_elt to the class each source belongs to.
6592 Detect assignments from or to volatile things
6593 and set set[i] to zero so they will be ignored
6594 in the rest of this function.
6596 Nothing in this loop changes the hash table or the register chains. */
6598 for (i = 0; i < n_sets; i++)
6600 register rtx src, dest;
6601 register rtx src_folded;
6602 register struct table_elt *elt = 0, *p;
6603 enum machine_mode mode;
6606 rtx src_related = 0;
6607 struct table_elt *src_const_elt = 0;
6608 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6609 int src_related_cost = 10000, src_elt_cost = 10000;
6610 /* Set non-zero if we need to call force_const_mem on with the
6611 contents of src_folded before using it. */
6612 int src_folded_force_flag = 0;
6614 dest = SET_DEST (sets[i].rtl);
6615 src = SET_SRC (sets[i].rtl);
6617 /* If SRC is a constant that has no machine mode,
6618 hash it with the destination's machine mode.
6619 This way we can keep different modes separate. */
6621 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6622 sets[i].mode = mode;
6626 enum machine_mode eqvmode = mode;
6627 if (GET_CODE (dest) == STRICT_LOW_PART)
6628 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6630 hash_arg_in_memory = 0;
6631 hash_arg_in_struct = 0;
6632 src_eqv = fold_rtx (src_eqv, insn);
6633 src_eqv_hash = HASH (src_eqv, eqvmode);
6635 /* Find the equivalence class for the equivalent expression. */
6638 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6640 src_eqv_volatile = do_not_record;
6641 src_eqv_in_memory = hash_arg_in_memory;
6642 src_eqv_in_struct = hash_arg_in_struct;
6645 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6646 value of the INNER register, not the destination. So it is not
6647 a valid substitution for the source. But save it for later. */
6648 if (GET_CODE (dest) == STRICT_LOW_PART)
6651 src_eqv_here = src_eqv;
6653 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6654 simplified result, which may not necessarily be valid. */
6655 src_folded = fold_rtx (src, insn);
6658 /* ??? This caused bad code to be generated for the m68k port with -O2.
6659 Suppose src is (CONST_INT -1), and that after truncation src_folded
6660 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6661 At the end we will add src and src_const to the same equivalence
6662 class. We now have 3 and -1 on the same equivalence class. This
6663 causes later instructions to be mis-optimized. */
6664 /* If storing a constant in a bitfield, pre-truncate the constant
6665 so we will be able to record it later. */
6666 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6667 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6669 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6671 if (GET_CODE (src) == CONST_INT
6672 && GET_CODE (width) == CONST_INT
6673 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6674 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6676 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6677 << INTVAL (width)) - 1));
6681 /* Compute SRC's hash code, and also notice if it
6682 should not be recorded at all. In that case,
6683 prevent any further processing of this assignment. */
6685 hash_arg_in_memory = 0;
6686 hash_arg_in_struct = 0;
6689 sets[i].src_hash = HASH (src, mode);
6690 sets[i].src_volatile = do_not_record;
6691 sets[i].src_in_memory = hash_arg_in_memory;
6692 sets[i].src_in_struct = hash_arg_in_struct;
6694 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6695 a pseudo that is set more than once, do not record SRC. Using
6696 SRC as a replacement for anything else will be incorrect in that
6697 situation. Note that this usually occurs only for stack slots,
6698 in which case all the RTL would be referring to SRC, so we don't
6699 lose any optimization opportunities by not having SRC in the
6702 if (GET_CODE (src) == MEM
6703 && find_reg_note (insn, REG_EQUIV, src) != 0
6704 && GET_CODE (dest) == REG
6705 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6706 && REG_N_SETS (REGNO (dest)) != 1)
6707 sets[i].src_volatile = 1;
6710 /* It is no longer clear why we used to do this, but it doesn't
6711 appear to still be needed. So let's try without it since this
6712 code hurts cse'ing widened ops. */
6713 /* If source is a perverse subreg (such as QI treated as an SI),
6714 treat it as volatile. It may do the work of an SI in one context
6715 where the extra bits are not being used, but cannot replace an SI
6717 if (GET_CODE (src) == SUBREG
6718 && (GET_MODE_SIZE (GET_MODE (src))
6719 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6720 sets[i].src_volatile = 1;
6723 /* Locate all possible equivalent forms for SRC. Try to replace
6724 SRC in the insn with each cheaper equivalent.
6726 We have the following types of equivalents: SRC itself, a folded
6727 version, a value given in a REG_EQUAL note, or a value related
6730 Each of these equivalents may be part of an additional class
6731 of equivalents (if more than one is in the table, they must be in
6732 the same class; we check for this).
6734 If the source is volatile, we don't do any table lookups.
6736 We note any constant equivalent for possible later use in a
6739 if (!sets[i].src_volatile)
6740 elt = lookup (src, sets[i].src_hash, mode);
6742 sets[i].src_elt = elt;
6744 if (elt && src_eqv_here && src_eqv_elt)
6746 if (elt->first_same_value != src_eqv_elt->first_same_value)
6748 /* The REG_EQUAL is indicating that two formerly distinct
6749 classes are now equivalent. So merge them. */
6750 merge_equiv_classes (elt, src_eqv_elt);
6751 src_eqv_hash = HASH (src_eqv, elt->mode);
6752 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6758 else if (src_eqv_elt)
6761 /* Try to find a constant somewhere and record it in `src_const'.
6762 Record its table element, if any, in `src_const_elt'. Look in
6763 any known equivalences first. (If the constant is not in the
6764 table, also set `sets[i].src_const_hash'). */
6766 for (p = elt->first_same_value; p; p = p->next_same_value)
6770 src_const_elt = elt;
6775 && (CONSTANT_P (src_folded)
6776 /* Consider (minus (label_ref L1) (label_ref L2)) as
6777 "constant" here so we will record it. This allows us
6778 to fold switch statements when an ADDR_DIFF_VEC is used. */
6779 || (GET_CODE (src_folded) == MINUS
6780 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6781 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6782 src_const = src_folded, src_const_elt = elt;
6783 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6784 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6786 /* If we don't know if the constant is in the table, get its
6787 hash code and look it up. */
6788 if (src_const && src_const_elt == 0)
6790 sets[i].src_const_hash = HASH (src_const, mode);
6791 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6794 sets[i].src_const = src_const;
6795 sets[i].src_const_elt = src_const_elt;
6797 /* If the constant and our source are both in the table, mark them as
6798 equivalent. Otherwise, if a constant is in the table but the source
6799 isn't, set ELT to it. */
6800 if (src_const_elt && elt
6801 && src_const_elt->first_same_value != elt->first_same_value)
6802 merge_equiv_classes (elt, src_const_elt);
6803 else if (src_const_elt && elt == 0)
6804 elt = src_const_elt;
6806 /* See if there is a register linearly related to a constant
6807 equivalent of SRC. */
6809 && (GET_CODE (src_const) == CONST
6810 || (src_const_elt && src_const_elt->related_value != 0)))
6812 src_related = use_related_value (src_const, src_const_elt);
6815 struct table_elt *src_related_elt
6816 = lookup (src_related, HASH (src_related, mode), mode);
6817 if (src_related_elt && elt)
6819 if (elt->first_same_value
6820 != src_related_elt->first_same_value)
6821 /* This can occur when we previously saw a CONST
6822 involving a SYMBOL_REF and then see the SYMBOL_REF
6823 twice. Merge the involved classes. */
6824 merge_equiv_classes (elt, src_related_elt);
6827 src_related_elt = 0;
6829 else if (src_related_elt && elt == 0)
6830 elt = src_related_elt;
6834 /* See if we have a CONST_INT that is already in a register in a
6837 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6838 && GET_MODE_CLASS (mode) == MODE_INT
6839 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6841 enum machine_mode wider_mode;
6843 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6844 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6845 && src_related == 0;
6846 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6848 struct table_elt *const_elt
6849 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6854 for (const_elt = const_elt->first_same_value;
6855 const_elt; const_elt = const_elt->next_same_value)
6856 if (GET_CODE (const_elt->exp) == REG)
6858 src_related = gen_lowpart_if_possible (mode,
6865 /* Another possibility is that we have an AND with a constant in
6866 a mode narrower than a word. If so, it might have been generated
6867 as part of an "if" which would narrow the AND. If we already
6868 have done the AND in a wider mode, we can use a SUBREG of that
6871 if (flag_expensive_optimizations && ! src_related
6872 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6873 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6875 enum machine_mode tmode;
6876 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6878 for (tmode = GET_MODE_WIDER_MODE (mode);
6879 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6880 tmode = GET_MODE_WIDER_MODE (tmode))
6882 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6883 struct table_elt *larger_elt;
6887 PUT_MODE (new_and, tmode);
6888 XEXP (new_and, 0) = inner;
6889 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6890 if (larger_elt == 0)
6893 for (larger_elt = larger_elt->first_same_value;
6894 larger_elt; larger_elt = larger_elt->next_same_value)
6895 if (GET_CODE (larger_elt->exp) == REG)
6898 = gen_lowpart_if_possible (mode, larger_elt->exp);
6908 #ifdef LOAD_EXTEND_OP
6909 /* See if a MEM has already been loaded with a widening operation;
6910 if it has, we can use a subreg of that. Many CISC machines
6911 also have such operations, but this is only likely to be
6912 beneficial these machines. */
6914 if (flag_expensive_optimizations && src_related == 0
6915 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6916 && GET_MODE_CLASS (mode) == MODE_INT
6917 && GET_CODE (src) == MEM && ! do_not_record
6918 && LOAD_EXTEND_OP (mode) != NIL)
6920 enum machine_mode tmode;
6922 /* Set what we are trying to extend and the operation it might
6923 have been extended with. */
6924 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6925 XEXP (memory_extend_rtx, 0) = src;
6927 for (tmode = GET_MODE_WIDER_MODE (mode);
6928 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6929 tmode = GET_MODE_WIDER_MODE (tmode))
6931 struct table_elt *larger_elt;
6933 PUT_MODE (memory_extend_rtx, tmode);
6934 larger_elt = lookup (memory_extend_rtx,
6935 HASH (memory_extend_rtx, tmode), tmode);
6936 if (larger_elt == 0)
6939 for (larger_elt = larger_elt->first_same_value;
6940 larger_elt; larger_elt = larger_elt->next_same_value)
6941 if (GET_CODE (larger_elt->exp) == REG)
6943 src_related = gen_lowpart_if_possible (mode,
6952 #endif /* LOAD_EXTEND_OP */
6954 if (src == src_folded)
6957 /* At this point, ELT, if non-zero, points to a class of expressions
6958 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6959 and SRC_RELATED, if non-zero, each contain additional equivalent
6960 expressions. Prune these latter expressions by deleting expressions
6961 already in the equivalence class.
6963 Check for an equivalent identical to the destination. If found,
6964 this is the preferred equivalent since it will likely lead to
6965 elimination of the insn. Indicate this by placing it in
6968 if (elt) elt = elt->first_same_value;
6969 for (p = elt; p; p = p->next_same_value)
6971 enum rtx_code code = GET_CODE (p->exp);
6973 /* If the expression is not valid, ignore it. Then we do not
6974 have to check for validity below. In most cases, we can use
6975 `rtx_equal_p', since canonicalization has already been done. */
6976 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6979 /* Also skip paradoxical subregs, unless that's what we're
6982 && (GET_MODE_SIZE (GET_MODE (p->exp))
6983 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6985 && GET_CODE (src) == SUBREG
6986 && GET_MODE (src) == GET_MODE (p->exp)
6987 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6988 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
6991 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6993 else if (src_folded && GET_CODE (src_folded) == code
6994 && rtx_equal_p (src_folded, p->exp))
6996 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6997 && rtx_equal_p (src_eqv_here, p->exp))
6999 else if (src_related && GET_CODE (src_related) == code
7000 && rtx_equal_p (src_related, p->exp))
7003 /* This is the same as the destination of the insns, we want
7004 to prefer it. Copy it to src_related. The code below will
7005 then give it a negative cost. */
7006 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
7011 /* Find the cheapest valid equivalent, trying all the available
7012 possibilities. Prefer items not in the hash table to ones
7013 that are when they are equal cost. Note that we can never
7014 worsen an insn as the current contents will also succeed.
7015 If we find an equivalent identical to the destination, use it as best,
7016 since this insn will probably be eliminated in that case. */
7019 if (rtx_equal_p (src, dest))
7022 src_cost = COST (src);
7027 if (rtx_equal_p (src_eqv_here, dest))
7030 src_eqv_cost = COST (src_eqv_here);
7035 if (rtx_equal_p (src_folded, dest))
7036 src_folded_cost = -1;
7038 src_folded_cost = COST (src_folded);
7043 if (rtx_equal_p (src_related, dest))
7044 src_related_cost = -1;
7046 src_related_cost = COST (src_related);
7049 /* If this was an indirect jump insn, a known label will really be
7050 cheaper even though it looks more expensive. */
7051 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
7052 src_folded = src_const, src_folded_cost = -1;
7054 /* Terminate loop when replacement made. This must terminate since
7055 the current contents will be tested and will always be valid. */
7060 /* Skip invalid entries. */
7061 while (elt && GET_CODE (elt->exp) != REG
7062 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7063 elt = elt->next_same_value;
7065 /* A paradoxical subreg would be bad here: it'll be the right
7066 size, but later may be adjusted so that the upper bits aren't
7067 what we want. So reject it. */
7069 && GET_CODE (elt->exp) == SUBREG
7070 && (GET_MODE_SIZE (GET_MODE (elt->exp))
7071 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
7072 /* It is okay, though, if the rtx we're trying to match
7073 will ignore any of the bits we can't predict. */
7075 && GET_CODE (src) == SUBREG
7076 && GET_MODE (src) == GET_MODE (elt->exp)
7077 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7078 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
7080 elt = elt->next_same_value;
7084 if (elt) src_elt_cost = elt->cost;
7086 /* Find cheapest and skip it for the next time. For items
7087 of equal cost, use this order:
7088 src_folded, src, src_eqv, src_related and hash table entry. */
7089 if (src_folded_cost <= src_cost
7090 && src_folded_cost <= src_eqv_cost
7091 && src_folded_cost <= src_related_cost
7092 && src_folded_cost <= src_elt_cost)
7094 trial = src_folded, src_folded_cost = 10000;
7095 if (src_folded_force_flag)
7096 trial = force_const_mem (mode, trial);
7098 else if (src_cost <= src_eqv_cost
7099 && src_cost <= src_related_cost
7100 && src_cost <= src_elt_cost)
7101 trial = src, src_cost = 10000;
7102 else if (src_eqv_cost <= src_related_cost
7103 && src_eqv_cost <= src_elt_cost)
7104 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
7105 else if (src_related_cost <= src_elt_cost)
7106 trial = copy_rtx (src_related), src_related_cost = 10000;
7109 trial = copy_rtx (elt->exp);
7110 elt = elt->next_same_value;
7111 src_elt_cost = 10000;
7114 /* We don't normally have an insn matching (set (pc) (pc)), so
7115 check for this separately here. We will delete such an
7118 Tablejump insns contain a USE of the table, so simply replacing
7119 the operand with the constant won't match. This is simply an
7120 unconditional branch, however, and is therefore valid. Just
7121 insert the substitution here and we will delete and re-emit
7124 /* Keep track of the original SET_SRC so that we can fix notes
7125 on libcall instructions. */
7126 old_src = SET_SRC (sets[i].rtl);
7128 if (n_sets == 1 && dest == pc_rtx
7130 || (GET_CODE (trial) == LABEL_REF
7131 && ! condjump_p (insn))))
7133 /* If TRIAL is a label in front of a jump table, we are
7134 really falling through the switch (this is how casesi
7135 insns work), so we must branch around the table. */
7136 if (GET_CODE (trial) == CODE_LABEL
7137 && NEXT_INSN (trial) != 0
7138 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
7139 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
7140 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
7142 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
7144 SET_SRC (sets[i].rtl) = trial;
7145 cse_jumps_altered = 1;
7149 /* Look for a substitution that makes a valid insn. */
7150 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
7152 /* If we just made a substitution inside a libcall, then we
7153 need to make the same substitution in any notes attached
7154 to the RETVAL insn. */
7156 && (GET_CODE (old_src) == REG
7157 || GET_CODE (old_src) == SUBREG
7158 || GET_CODE (old_src) == MEM))
7159 replace_rtx (REG_NOTES (libcall_insn), old_src,
7160 canon_reg (SET_SRC (sets[i].rtl), insn));
7162 /* The result of apply_change_group can be ignored; see
7165 validate_change (insn, &SET_SRC (sets[i].rtl),
7166 canon_reg (SET_SRC (sets[i].rtl), insn),
7168 apply_change_group ();
7172 /* If we previously found constant pool entries for
7173 constants and this is a constant, try making a
7174 pool entry. Put it in src_folded unless we already have done
7175 this since that is where it likely came from. */
7177 else if (constant_pool_entries_cost
7178 && CONSTANT_P (trial)
7179 && ! (GET_CODE (trial) == CONST
7180 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
7182 || (GET_CODE (src_folded) != MEM
7183 && ! src_folded_force_flag))
7184 && GET_MODE_CLASS (mode) != MODE_CC
7185 && mode != VOIDmode)
7187 src_folded_force_flag = 1;
7189 src_folded_cost = constant_pool_entries_cost;
7193 src = SET_SRC (sets[i].rtl);
7195 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7196 However, there is an important exception: If both are registers
7197 that are not the head of their equivalence class, replace SET_SRC
7198 with the head of the class. If we do not do this, we will have
7199 both registers live over a portion of the basic block. This way,
7200 their lifetimes will likely abut instead of overlapping. */
7201 if (GET_CODE (dest) == REG
7202 && REGNO_QTY_VALID_P (REGNO (dest))
7203 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
7204 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
7205 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7206 /* Don't do this if the original insn had a hard reg as
7208 && (GET_CODE (sets[i].src) != REG
7209 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
7210 /* We can't call canon_reg here because it won't do anything if
7211 SRC is a hard register. */
7213 int first = qty_first_reg[REG_QTY (REGNO (src))];
7215 = (first >= FIRST_PSEUDO_REGISTER
7216 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7218 /* We must use validate-change even for this, because this
7219 might be a special no-op instruction, suitable only to
7221 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7224 /* If we had a constant that is cheaper than what we are now
7225 setting SRC to, use that constant. We ignored it when we
7226 thought we could make this into a no-op. */
7227 if (src_const && COST (src_const) < COST (src)
7228 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7234 /* If we made a change, recompute SRC values. */
7235 if (src != sets[i].src)
7238 hash_arg_in_memory = 0;
7239 hash_arg_in_struct = 0;
7241 sets[i].src_hash = HASH (src, mode);
7242 sets[i].src_volatile = do_not_record;
7243 sets[i].src_in_memory = hash_arg_in_memory;
7244 sets[i].src_in_struct = hash_arg_in_struct;
7245 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7248 /* If this is a single SET, we are setting a register, and we have an
7249 equivalent constant, we want to add a REG_NOTE. We don't want
7250 to write a REG_EQUAL note for a constant pseudo since verifying that
7251 that pseudo hasn't been eliminated is a pain. Such a note also
7252 won't help anything.
7254 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7255 which can be created for a reference to a compile time computable
7256 entry in a jump table. */
7258 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7259 && GET_CODE (src_const) != REG
7260 && ! (GET_CODE (src_const) == CONST
7261 && GET_CODE (XEXP (src_const, 0)) == MINUS
7262 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
7263 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7265 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7267 /* Make sure that the rtx is not shared with any other insn. */
7268 src_const = copy_rtx (src_const);
7270 /* Record the actual constant value in a REG_EQUAL note, making
7271 a new one if one does not already exist. */
7273 XEXP (tem, 0) = src_const;
7275 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7276 src_const, REG_NOTES (insn));
7278 /* If storing a constant value in a register that
7279 previously held the constant value 0,
7280 record this fact with a REG_WAS_0 note on this insn.
7282 Note that the *register* is required to have previously held 0,
7283 not just any register in the quantity and we must point to the
7284 insn that set that register to zero.
7286 Rather than track each register individually, we just see if
7287 the last set for this quantity was for this register. */
7289 if (REGNO_QTY_VALID_P (REGNO (dest))
7290 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
7292 /* See if we previously had a REG_WAS_0 note. */
7293 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7294 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
7296 if ((tem = single_set (const_insn)) != 0
7297 && rtx_equal_p (SET_DEST (tem), dest))
7300 XEXP (note, 0) = const_insn;
7302 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7309 /* Now deal with the destination. */
7311 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7313 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7314 to the MEM or REG within it. */
7315 while (GET_CODE (dest) == SIGN_EXTRACT
7316 || GET_CODE (dest) == ZERO_EXTRACT
7317 || GET_CODE (dest) == SUBREG
7318 || GET_CODE (dest) == STRICT_LOW_PART)
7320 sets[i].inner_dest_loc = &XEXP (dest, 0);
7321 dest = XEXP (dest, 0);
7324 sets[i].inner_dest = dest;
7326 if (GET_CODE (dest) == MEM)
7328 #ifdef PUSH_ROUNDING
7329 /* Stack pushes invalidate the stack pointer. */
7330 rtx addr = XEXP (dest, 0);
7331 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7332 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7333 && XEXP (addr, 0) == stack_pointer_rtx)
7334 invalidate (stack_pointer_rtx, Pmode);
7336 dest = fold_rtx (dest, insn);
7339 /* Compute the hash code of the destination now,
7340 before the effects of this instruction are recorded,
7341 since the register values used in the address computation
7342 are those before this instruction. */
7343 sets[i].dest_hash = HASH (dest, mode);
7345 /* Don't enter a bit-field in the hash table
7346 because the value in it after the store
7347 may not equal what was stored, due to truncation. */
7349 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7350 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7352 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7354 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7355 && GET_CODE (width) == CONST_INT
7356 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7357 && ! (INTVAL (src_const)
7358 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7359 /* Exception: if the value is constant,
7360 and it won't be truncated, record it. */
7364 /* This is chosen so that the destination will be invalidated
7365 but no new value will be recorded.
7366 We must invalidate because sometimes constant
7367 values can be recorded for bitfields. */
7368 sets[i].src_elt = 0;
7369 sets[i].src_volatile = 1;
7375 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7377 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7379 PUT_CODE (insn, NOTE);
7380 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7381 NOTE_SOURCE_FILE (insn) = 0;
7382 cse_jumps_altered = 1;
7383 /* One less use of the label this insn used to jump to. */
7384 if (JUMP_LABEL (insn) != 0)
7385 --LABEL_NUSES (JUMP_LABEL (insn));
7386 /* No more processing for this set. */
7390 /* If this SET is now setting PC to a label, we know it used to
7391 be a conditional or computed branch. So we see if we can follow
7392 it. If it was a computed branch, delete it and re-emit. */
7393 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7397 /* If this is not in the format for a simple branch and
7398 we are the only SET in it, re-emit it. */
7399 if (! simplejump_p (insn) && n_sets == 1)
7401 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7402 JUMP_LABEL (new) = XEXP (src, 0);
7403 LABEL_NUSES (XEXP (src, 0))++;
7408 /* Otherwise, force rerecognition, since it probably had
7409 a different pattern before.
7410 This shouldn't really be necessary, since whatever
7411 changed the source value above should have done this.
7412 Until the right place is found, might as well do this here. */
7413 INSN_CODE (insn) = -1;
7415 /* Now that we've converted this jump to an unconditional jump,
7416 there is dead code after it. Delete the dead code until we
7417 reach a BARRIER, the end of the function, or a label. Do
7418 not delete NOTEs except for NOTE_INSN_DELETED since later
7419 phases assume these notes are retained. */
7423 while (NEXT_INSN (p) != 0
7424 && GET_CODE (NEXT_INSN (p)) != BARRIER
7425 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7427 if (GET_CODE (NEXT_INSN (p)) != NOTE
7428 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7429 delete_insn (NEXT_INSN (p));
7434 /* If we don't have a BARRIER immediately after INSN, put one there.
7435 Much code assumes that there are no NOTEs between a JUMP_INSN and
7438 if (NEXT_INSN (insn) == 0
7439 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7440 emit_barrier_before (NEXT_INSN (insn));
7442 /* We might have two BARRIERs separated by notes. Delete the second
7445 if (p != insn && NEXT_INSN (p) != 0
7446 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7447 delete_insn (NEXT_INSN (p));
7449 cse_jumps_altered = 1;
7453 /* If destination is volatile, invalidate it and then do no further
7454 processing for this assignment. */
7456 else if (do_not_record)
7458 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7459 || GET_CODE (dest) == MEM)
7460 invalidate (dest, VOIDmode);
7461 else if (GET_CODE (dest) == STRICT_LOW_PART
7462 || GET_CODE (dest) == ZERO_EXTRACT)
7463 invalidate (XEXP (dest, 0), GET_MODE (dest));
7467 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7468 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7471 /* If setting CC0, record what it was set to, or a constant, if it
7472 is equivalent to a constant. If it is being set to a floating-point
7473 value, make a COMPARE with the appropriate constant of 0. If we
7474 don't do this, later code can interpret this as a test against
7475 const0_rtx, which can cause problems if we try to put it into an
7476 insn as a floating-point operand. */
7477 if (dest == cc0_rtx)
7479 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7480 this_insn_cc0_mode = mode;
7481 if (FLOAT_MODE_P (mode))
7482 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7488 /* Now enter all non-volatile source expressions in the hash table
7489 if they are not already present.
7490 Record their equivalence classes in src_elt.
7491 This way we can insert the corresponding destinations into
7492 the same classes even if the actual sources are no longer in them
7493 (having been invalidated). */
7495 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7496 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7498 register struct table_elt *elt;
7499 register struct table_elt *classp = sets[0].src_elt;
7500 rtx dest = SET_DEST (sets[0].rtl);
7501 enum machine_mode eqvmode = GET_MODE (dest);
7503 if (GET_CODE (dest) == STRICT_LOW_PART)
7505 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7508 if (insert_regs (src_eqv, classp, 0))
7510 rehash_using_reg (src_eqv);
7511 src_eqv_hash = HASH (src_eqv, eqvmode);
7513 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7514 elt->in_memory = src_eqv_in_memory;
7515 elt->in_struct = src_eqv_in_struct;
7518 /* Check to see if src_eqv_elt is the same as a set source which
7519 does not yet have an elt, and if so set the elt of the set source
7521 for (i = 0; i < n_sets; i++)
7522 if (sets[i].rtl && sets[i].src_elt == 0
7523 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7524 sets[i].src_elt = src_eqv_elt;
7527 for (i = 0; i < n_sets; i++)
7528 if (sets[i].rtl && ! sets[i].src_volatile
7529 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7531 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7533 /* REG_EQUAL in setting a STRICT_LOW_PART
7534 gives an equivalent for the entire destination register,
7535 not just for the subreg being stored in now.
7536 This is a more interesting equivalence, so we arrange later
7537 to treat the entire reg as the destination. */
7538 sets[i].src_elt = src_eqv_elt;
7539 sets[i].src_hash = src_eqv_hash;
7543 /* Insert source and constant equivalent into hash table, if not
7545 register struct table_elt *classp = src_eqv_elt;
7546 register rtx src = sets[i].src;
7547 register rtx dest = SET_DEST (sets[i].rtl);
7548 enum machine_mode mode
7549 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7551 /* Don't put a hard register source into the table if this is
7552 the last insn of a libcall. */
7553 if (sets[i].src_elt == 0
7554 && (GET_CODE (src) != REG
7555 || REGNO (src) >= FIRST_PSEUDO_REGISTER
7556 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX)))
7558 register struct table_elt *elt;
7560 /* Note that these insert_regs calls cannot remove
7561 any of the src_elt's, because they would have failed to
7562 match if not still valid. */
7563 if (insert_regs (src, classp, 0))
7565 rehash_using_reg (src);
7566 sets[i].src_hash = HASH (src, mode);
7568 elt = insert (src, classp, sets[i].src_hash, mode);
7569 elt->in_memory = sets[i].src_in_memory;
7570 elt->in_struct = sets[i].src_in_struct;
7571 sets[i].src_elt = classp = elt;
7574 if (sets[i].src_const && sets[i].src_const_elt == 0
7575 && src != sets[i].src_const
7576 && ! rtx_equal_p (sets[i].src_const, src))
7577 sets[i].src_elt = insert (sets[i].src_const, classp,
7578 sets[i].src_const_hash, mode);
7581 else if (sets[i].src_elt == 0)
7582 /* If we did not insert the source into the hash table (e.g., it was
7583 volatile), note the equivalence class for the REG_EQUAL value, if any,
7584 so that the destination goes into that class. */
7585 sets[i].src_elt = src_eqv_elt;
7587 invalidate_from_clobbers (x);
7589 /* Some registers are invalidated by subroutine calls. Memory is
7590 invalidated by non-constant calls. */
7592 if (GET_CODE (insn) == CALL_INSN)
7594 if (! CONST_CALL_P (insn))
7595 invalidate_memory ();
7596 invalidate_for_call ();
7599 /* Now invalidate everything set by this instruction.
7600 If a SUBREG or other funny destination is being set,
7601 sets[i].rtl is still nonzero, so here we invalidate the reg
7602 a part of which is being set. */
7604 for (i = 0; i < n_sets; i++)
7607 /* We can't use the inner dest, because the mode associated with
7608 a ZERO_EXTRACT is significant. */
7609 register rtx dest = SET_DEST (sets[i].rtl);
7611 /* Needed for registers to remove the register from its
7612 previous quantity's chain.
7613 Needed for memory if this is a nonvarying address, unless
7614 we have just done an invalidate_memory that covers even those. */
7615 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7616 || GET_CODE (dest) == MEM)
7617 invalidate (dest, VOIDmode);
7618 else if (GET_CODE (dest) == STRICT_LOW_PART
7619 || GET_CODE (dest) == ZERO_EXTRACT)
7620 invalidate (XEXP (dest, 0), GET_MODE (dest));
7623 /* A volatile ASM invalidates everything. */
7624 if (GET_CODE (insn) == INSN
7625 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
7626 && MEM_VOLATILE_P (PATTERN (insn)))
7627 flush_hash_table ();
7629 /* Make sure registers mentioned in destinations
7630 are safe for use in an expression to be inserted.
7631 This removes from the hash table
7632 any invalid entry that refers to one of these registers.
7634 We don't care about the return value from mention_regs because
7635 we are going to hash the SET_DEST values unconditionally. */
7637 for (i = 0; i < n_sets; i++)
7641 rtx x = SET_DEST (sets[i].rtl);
7643 if (GET_CODE (x) != REG)
7647 /* We used to rely on all references to a register becoming
7648 inaccessible when a register changes to a new quantity,
7649 since that changes the hash code. However, that is not
7650 safe, since after NBUCKETS new quantities we get a
7651 hash 'collision' of a register with its own invalid
7652 entries. And since SUBREGs have been changed not to
7653 change their hash code with the hash code of the register,
7654 it wouldn't work any longer at all. So we have to check
7655 for any invalid references lying around now.
7656 This code is similar to the REG case in mention_regs,
7657 but it knows that reg_tick has been incremented, and
7658 it leaves reg_in_table as -1 . */
7659 register int regno = REGNO (x);
7660 register int endregno
7661 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
7662 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
7665 for (i = regno; i < endregno; i++)
7667 if (REG_IN_TABLE (i) >= 0)
7669 remove_invalid_refs (i);
7670 REG_IN_TABLE (i) = -1;
7677 /* We may have just removed some of the src_elt's from the hash table.
7678 So replace each one with the current head of the same class. */
7680 for (i = 0; i < n_sets; i++)
7683 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7684 /* If elt was removed, find current head of same class,
7685 or 0 if nothing remains of that class. */
7687 register struct table_elt *elt = sets[i].src_elt;
7689 while (elt && elt->prev_same_value)
7690 elt = elt->prev_same_value;
7692 while (elt && elt->first_same_value == 0)
7693 elt = elt->next_same_value;
7694 sets[i].src_elt = elt ? elt->first_same_value : 0;
7698 /* Now insert the destinations into their equivalence classes. */
7700 for (i = 0; i < n_sets; i++)
7703 register rtx dest = SET_DEST (sets[i].rtl);
7704 rtx inner_dest = sets[i].inner_dest;
7705 register struct table_elt *elt;
7707 /* Don't record value if we are not supposed to risk allocating
7708 floating-point values in registers that might be wider than
7710 if ((flag_float_store
7711 && GET_CODE (dest) == MEM
7712 && FLOAT_MODE_P (GET_MODE (dest)))
7713 /* Don't record BLKmode values, because we don't know the
7714 size of it, and can't be sure that other BLKmode values
7715 have the same or smaller size. */
7716 || GET_MODE (dest) == BLKmode
7717 /* Don't record values of destinations set inside a libcall block
7718 since we might delete the libcall. Things should have been set
7719 up so we won't want to reuse such a value, but we play it safe
7722 /* If we didn't put a REG_EQUAL value or a source into the hash
7723 table, there is no point is recording DEST. */
7724 || sets[i].src_elt == 0
7725 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7726 or SIGN_EXTEND, don't record DEST since it can cause
7727 some tracking to be wrong.
7729 ??? Think about this more later. */
7730 || (GET_CODE (dest) == SUBREG
7731 && (GET_MODE_SIZE (GET_MODE (dest))
7732 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7733 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7734 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7737 /* STRICT_LOW_PART isn't part of the value BEING set,
7738 and neither is the SUBREG inside it.
7739 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7740 if (GET_CODE (dest) == STRICT_LOW_PART)
7741 dest = SUBREG_REG (XEXP (dest, 0));
7743 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7744 /* Registers must also be inserted into chains for quantities. */
7745 if (insert_regs (dest, sets[i].src_elt, 1))
7747 /* If `insert_regs' changes something, the hash code must be
7749 rehash_using_reg (dest);
7750 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7753 if (GET_CODE (inner_dest) == MEM
7754 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7755 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7756 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7757 Consider the case in which the address of the MEM is
7758 passed to a function, which alters the MEM. Then, if we
7759 later use Y instead of the MEM we'll miss the update. */
7760 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7762 elt = insert (dest, sets[i].src_elt,
7763 sets[i].dest_hash, GET_MODE (dest));
7765 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7766 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7767 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7772 /* This implicitly assumes a whole struct
7773 need not have MEM_IN_STRUCT_P.
7774 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7775 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7776 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7779 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7780 narrower than M2, and both M1 and M2 are the same number of words,
7781 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7782 make that equivalence as well.
7784 However, BAR may have equivalences for which gen_lowpart_if_possible
7785 will produce a simpler value than gen_lowpart_if_possible applied to
7786 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7787 BAR's equivalences. If we don't get a simplified form, make
7788 the SUBREG. It will not be used in an equivalence, but will
7789 cause two similar assignments to be detected.
7791 Note the loop below will find SUBREG_REG (DEST) since we have
7792 already entered SRC and DEST of the SET in the table. */
7794 if (GET_CODE (dest) == SUBREG
7795 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7797 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7798 && (GET_MODE_SIZE (GET_MODE (dest))
7799 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7800 && sets[i].src_elt != 0)
7802 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7803 struct table_elt *elt, *classp = 0;
7805 for (elt = sets[i].src_elt->first_same_value; elt;
7806 elt = elt->next_same_value)
7810 struct table_elt *src_elt;
7812 /* Ignore invalid entries. */
7813 if (GET_CODE (elt->exp) != REG
7814 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7817 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7819 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7821 src_hash = HASH (new_src, new_mode);
7822 src_elt = lookup (new_src, src_hash, new_mode);
7824 /* Put the new source in the hash table is if isn't
7828 if (insert_regs (new_src, classp, 0))
7830 rehash_using_reg (new_src);
7831 src_hash = HASH (new_src, new_mode);
7833 src_elt = insert (new_src, classp, src_hash, new_mode);
7834 src_elt->in_memory = elt->in_memory;
7835 src_elt->in_struct = elt->in_struct;
7837 else if (classp && classp != src_elt->first_same_value)
7838 /* Show that two things that we've seen before are
7839 actually the same. */
7840 merge_equiv_classes (src_elt, classp);
7842 classp = src_elt->first_same_value;
7843 /* Ignore invalid entries. */
7845 && GET_CODE (classp->exp) != REG
7846 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7847 classp = classp->next_same_value;
7852 /* Special handling for (set REG0 REG1)
7853 where REG0 is the "cheapest", cheaper than REG1.
7854 After cse, REG1 will probably not be used in the sequel,
7855 so (if easily done) change this insn to (set REG1 REG0) and
7856 replace REG1 with REG0 in the previous insn that computed their value.
7857 Then REG1 will become a dead store and won't cloud the situation
7858 for later optimizations.
7860 Do not make this change if REG1 is a hard register, because it will
7861 then be used in the sequel and we may be changing a two-operand insn
7862 into a three-operand insn.
7864 Also do not do this if we are operating on a copy of INSN.
7866 Also don't do this if INSN ends a libcall; this would cause an unrelated
7867 register to be set in the middle of a libcall, and we then get bad code
7868 if the libcall is deleted. */
7870 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7871 && NEXT_INSN (PREV_INSN (insn)) == insn
7872 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7873 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7874 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7875 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
7876 == REGNO (SET_DEST (sets[0].rtl)))
7877 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
7879 rtx prev = PREV_INSN (insn);
7880 while (prev && GET_CODE (prev) == NOTE)
7881 prev = PREV_INSN (prev);
7883 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7884 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7886 rtx dest = SET_DEST (sets[0].rtl);
7887 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7889 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7890 validate_change (insn, & SET_DEST (sets[0].rtl),
7891 SET_SRC (sets[0].rtl), 1);
7892 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7893 apply_change_group ();
7895 /* If REG1 was equivalent to a constant, REG0 is not. */
7897 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7899 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7900 any REG_WAS_0 note on INSN to PREV. */
7901 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7903 remove_note (prev, note);
7905 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7908 remove_note (insn, note);
7909 XEXP (note, 1) = REG_NOTES (prev);
7910 REG_NOTES (prev) = note;
7913 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7914 then we must delete it, because the value in REG0 has changed. */
7915 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7916 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7917 remove_note (insn, note);
7921 /* If this is a conditional jump insn, record any known equivalences due to
7922 the condition being tested. */
7924 last_jump_equiv_class = 0;
7925 if (GET_CODE (insn) == JUMP_INSN
7926 && n_sets == 1 && GET_CODE (x) == SET
7927 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7928 record_jump_equiv (insn, 0);
7931 /* If the previous insn set CC0 and this insn no longer references CC0,
7932 delete the previous insn. Here we use the fact that nothing expects CC0
7933 to be valid over an insn, which is true until the final pass. */
7934 if (prev_insn && GET_CODE (prev_insn) == INSN
7935 && (tem = single_set (prev_insn)) != 0
7936 && SET_DEST (tem) == cc0_rtx
7937 && ! reg_mentioned_p (cc0_rtx, x))
7939 PUT_CODE (prev_insn, NOTE);
7940 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7941 NOTE_SOURCE_FILE (prev_insn) = 0;
7944 prev_insn_cc0 = this_insn_cc0;
7945 prev_insn_cc0_mode = this_insn_cc0_mode;
7951 /* Remove from the hash table all expressions that reference memory. */
7953 invalidate_memory ()
7956 register struct table_elt *p, *next;
7958 for (i = 0; i < NBUCKETS; i++)
7959 for (p = table[i]; p; p = next)
7961 next = p->next_same_hash;
7963 remove_from_table (p, i);
7967 /* XXX ??? The name of this function bears little resemblance to
7968 what this function actually does. FIXME. */
7970 note_mem_written (addr)
7973 /* Pushing or popping the stack invalidates just the stack pointer. */
7974 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7975 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7976 && GET_CODE (XEXP (addr, 0)) == REG
7977 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7979 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
7980 REG_TICK (STACK_POINTER_REGNUM)++;
7982 /* This should be *very* rare. */
7983 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7984 invalidate (stack_pointer_rtx, VOIDmode);
7990 /* Perform invalidation on the basis of everything about an insn
7991 except for invalidating the actual places that are SET in it.
7992 This includes the places CLOBBERed, and anything that might
7993 alias with something that is SET or CLOBBERed.
7995 X is the pattern of the insn. */
7998 invalidate_from_clobbers (x)
8001 if (GET_CODE (x) == CLOBBER)
8003 rtx ref = XEXP (x, 0);
8006 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8007 || GET_CODE (ref) == MEM)
8008 invalidate (ref, VOIDmode);
8009 else if (GET_CODE (ref) == STRICT_LOW_PART
8010 || GET_CODE (ref) == ZERO_EXTRACT)
8011 invalidate (XEXP (ref, 0), GET_MODE (ref));
8014 else if (GET_CODE (x) == PARALLEL)
8017 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
8019 register rtx y = XVECEXP (x, 0, i);
8020 if (GET_CODE (y) == CLOBBER)
8022 rtx ref = XEXP (y, 0);
8023 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8024 || GET_CODE (ref) == MEM)
8025 invalidate (ref, VOIDmode);
8026 else if (GET_CODE (ref) == STRICT_LOW_PART
8027 || GET_CODE (ref) == ZERO_EXTRACT)
8028 invalidate (XEXP (ref, 0), GET_MODE (ref));
8034 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
8035 and replace any registers in them with either an equivalent constant
8036 or the canonical form of the register. If we are inside an address,
8037 only do this if the address remains valid.
8039 OBJECT is 0 except when within a MEM in which case it is the MEM.
8041 Return the replacement for X. */
8044 cse_process_notes (x, object)
8048 enum rtx_code code = GET_CODE (x);
8049 char *fmt = GET_RTX_FORMAT (code);
8065 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
8070 if (REG_NOTE_KIND (x) == REG_EQUAL)
8071 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
8073 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
8080 rtx new = cse_process_notes (XEXP (x, 0), object);
8081 /* We don't substitute VOIDmode constants into these rtx,
8082 since they would impede folding. */
8083 if (GET_MODE (new) != VOIDmode)
8084 validate_change (object, &XEXP (x, 0), new, 0);
8089 i = REG_QTY (REGNO (x));
8091 /* Return a constant or a constant register. */
8092 if (REGNO_QTY_VALID_P (REGNO (x))
8093 && qty_const[i] != 0
8094 && (CONSTANT_P (qty_const[i])
8095 || GET_CODE (qty_const[i]) == REG))
8097 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
8102 /* Otherwise, canonicalize this register. */
8103 return canon_reg (x, NULL_RTX);
8109 for (i = 0; i < GET_RTX_LENGTH (code); i++)
8111 validate_change (object, &XEXP (x, i),
8112 cse_process_notes (XEXP (x, i), object), 0);
8117 /* Find common subexpressions between the end test of a loop and the beginning
8118 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8120 Often we have a loop where an expression in the exit test is used
8121 in the body of the loop. For example "while (*p) *q++ = *p++;".
8122 Because of the way we duplicate the loop exit test in front of the loop,
8123 however, we don't detect that common subexpression. This will be caught
8124 when global cse is implemented, but this is a quite common case.
8126 This function handles the most common cases of these common expressions.
8127 It is called after we have processed the basic block ending with the
8128 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8129 jumps to a label used only once. */
8132 cse_around_loop (loop_start)
8137 struct table_elt *p;
8139 /* If the jump at the end of the loop doesn't go to the start, we don't
8141 for (insn = PREV_INSN (loop_start);
8142 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
8143 insn = PREV_INSN (insn))
8147 || GET_CODE (insn) != NOTE
8148 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
8151 /* If the last insn of the loop (the end test) was an NE comparison,
8152 we will interpret it as an EQ comparison, since we fell through
8153 the loop. Any equivalences resulting from that comparison are
8154 therefore not valid and must be invalidated. */
8155 if (last_jump_equiv_class)
8156 for (p = last_jump_equiv_class->first_same_value; p;
8157 p = p->next_same_value)
8159 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
8160 || (GET_CODE (p->exp) == SUBREG
8161 && GET_CODE (SUBREG_REG (p->exp)) == REG))
8162 invalidate (p->exp, VOIDmode);
8163 else if (GET_CODE (p->exp) == STRICT_LOW_PART
8164 || GET_CODE (p->exp) == ZERO_EXTRACT)
8165 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
8168 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8169 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8171 The only thing we do with SET_DEST is invalidate entries, so we
8172 can safely process each SET in order. It is slightly less efficient
8173 to do so, but we only want to handle the most common cases.
8175 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8176 These pseudos won't have valid entries in any of the tables indexed
8177 by register number, such as reg_qty. We avoid out-of-range array
8178 accesses by not processing any instructions created after cse started. */
8180 for (insn = NEXT_INSN (loop_start);
8181 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
8182 && INSN_UID (insn) < max_insn_uid
8183 && ! (GET_CODE (insn) == NOTE
8184 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
8185 insn = NEXT_INSN (insn))
8187 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8188 && (GET_CODE (PATTERN (insn)) == SET
8189 || GET_CODE (PATTERN (insn)) == CLOBBER))
8190 cse_set_around_loop (PATTERN (insn), insn, loop_start);
8191 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8192 && GET_CODE (PATTERN (insn)) == PARALLEL)
8193 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8194 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
8195 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
8196 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
8201 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8202 since they are done elsewhere. This function is called via note_stores. */
8205 invalidate_skipped_set (dest, set)
8209 enum rtx_code code = GET_CODE (dest);
8212 && ! note_mem_written (dest) /* If this is not a stack push ... */
8213 /* There are times when an address can appear varying and be a PLUS
8214 during this scan when it would be a fixed address were we to know
8215 the proper equivalences. So invalidate all memory if there is
8216 a BLKmode or nonscalar memory reference or a reference to a
8217 variable address. */
8218 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
8219 || cse_rtx_varies_p (XEXP (dest, 0))))
8221 invalidate_memory ();
8225 if (GET_CODE (set) == CLOBBER
8232 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
8233 invalidate (XEXP (dest, 0), GET_MODE (dest));
8234 else if (code == REG || code == SUBREG || code == MEM)
8235 invalidate (dest, VOIDmode);
8238 /* Invalidate all insns from START up to the end of the function or the
8239 next label. This called when we wish to CSE around a block that is
8240 conditionally executed. */
8243 invalidate_skipped_block (start)
8248 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
8249 insn = NEXT_INSN (insn))
8251 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
8254 if (GET_CODE (insn) == CALL_INSN)
8256 if (! CONST_CALL_P (insn))
8257 invalidate_memory ();
8258 invalidate_for_call ();
8261 invalidate_from_clobbers (PATTERN (insn));
8262 note_stores (PATTERN (insn), invalidate_skipped_set);
8266 /* Used for communication between the following two routines; contains a
8267 value to be checked for modification. */
8269 static rtx cse_check_loop_start_value;
8271 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8272 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8275 cse_check_loop_start (x, set)
8277 rtx set ATTRIBUTE_UNUSED;
8279 if (cse_check_loop_start_value == 0
8280 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8283 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8284 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8285 cse_check_loop_start_value = 0;
8288 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8289 a loop that starts with the label at LOOP_START.
8291 If X is a SET, we see if its SET_SRC is currently in our hash table.
8292 If so, we see if it has a value equal to some register used only in the
8293 loop exit code (as marked by jump.c).
8295 If those two conditions are true, we search backwards from the start of
8296 the loop to see if that same value was loaded into a register that still
8297 retains its value at the start of the loop.
8299 If so, we insert an insn after the load to copy the destination of that
8300 load into the equivalent register and (try to) replace our SET_SRC with that
8303 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8306 cse_set_around_loop (x, insn, loop_start)
8311 struct table_elt *src_elt;
8313 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8314 are setting PC or CC0 or whose SET_SRC is already a register. */
8315 if (GET_CODE (x) == SET
8316 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8317 && GET_CODE (SET_SRC (x)) != REG)
8319 src_elt = lookup (SET_SRC (x),
8320 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8321 GET_MODE (SET_DEST (x)));
8324 for (src_elt = src_elt->first_same_value; src_elt;
8325 src_elt = src_elt->next_same_value)
8326 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8327 && COST (src_elt->exp) < COST (SET_SRC (x)))
8331 /* Look for an insn in front of LOOP_START that sets
8332 something in the desired mode to SET_SRC (x) before we hit
8333 a label or CALL_INSN. */
8335 for (p = prev_nonnote_insn (loop_start);
8336 p && GET_CODE (p) != CALL_INSN
8337 && GET_CODE (p) != CODE_LABEL;
8338 p = prev_nonnote_insn (p))
8339 if ((set = single_set (p)) != 0
8340 && GET_CODE (SET_DEST (set)) == REG
8341 && GET_MODE (SET_DEST (set)) == src_elt->mode
8342 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8344 /* We now have to ensure that nothing between P
8345 and LOOP_START modified anything referenced in
8346 SET_SRC (x). We know that nothing within the loop
8347 can modify it, or we would have invalidated it in
8351 cse_check_loop_start_value = SET_SRC (x);
8352 for (q = p; q != loop_start; q = NEXT_INSN (q))
8353 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8354 note_stores (PATTERN (q), cse_check_loop_start);
8356 /* If nothing was changed and we can replace our
8357 SET_SRC, add an insn after P to copy its destination
8358 to what we will be replacing SET_SRC with. */
8359 if (cse_check_loop_start_value
8360 && validate_change (insn, &SET_SRC (x),
8363 /* If this creates new pseudos, this is unsafe,
8364 because the regno of new pseudo is unsuitable
8365 to index into reg_qty when cse_insn processes
8366 the new insn. Therefore, if a new pseudo was
8367 created, discard this optimization. */
8368 int nregs = max_reg_num ();
8370 = gen_move_insn (src_elt->exp, SET_DEST (set));
8371 if (nregs != max_reg_num ())
8373 if (! validate_change (insn, &SET_SRC (x),
8378 emit_insn_after (move, p);
8385 /* Now invalidate anything modified by X. */
8386 note_mem_written (SET_DEST (x));
8388 /* See comment on similar code in cse_insn for explanation of these tests. */
8389 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8390 || GET_CODE (SET_DEST (x)) == MEM)
8391 invalidate (SET_DEST (x), VOIDmode);
8392 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8393 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8394 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8397 /* Find the end of INSN's basic block and return its range,
8398 the total number of SETs in all the insns of the block, the last insn of the
8399 block, and the branch path.
8401 The branch path indicates which branches should be followed. If a non-zero
8402 path size is specified, the block should be rescanned and a different set
8403 of branches will be taken. The branch path is only used if
8404 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8406 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8407 used to describe the block. It is filled in with the information about
8408 the current block. The incoming structure's branch path, if any, is used
8409 to construct the output branch path. */
8412 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8414 struct cse_basic_block_data *data;
8421 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8422 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8423 int path_size = data->path_size;
8427 /* Update the previous branch path, if any. If the last branch was
8428 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8429 shorten the path by one and look at the previous branch. We know that
8430 at least one branch must have been taken if PATH_SIZE is non-zero. */
8431 while (path_size > 0)
8433 if (data->path[path_size - 1].status != NOT_TAKEN)
8435 data->path[path_size - 1].status = NOT_TAKEN;
8442 /* Scan to end of this basic block. */
8443 while (p && GET_CODE (p) != CODE_LABEL)
8445 /* Don't cse out the end of a loop. This makes a difference
8446 only for the unusual loops that always execute at least once;
8447 all other loops have labels there so we will stop in any case.
8448 Cse'ing out the end of the loop is dangerous because it
8449 might cause an invariant expression inside the loop
8450 to be reused after the end of the loop. This would make it
8451 hard to move the expression out of the loop in loop.c,
8452 especially if it is one of several equivalent expressions
8453 and loop.c would like to eliminate it.
8455 If we are running after loop.c has finished, we can ignore
8456 the NOTE_INSN_LOOP_END. */
8458 if (! after_loop && GET_CODE (p) == NOTE
8459 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8462 /* Don't cse over a call to setjmp; on some machines (eg vax)
8463 the regs restored by the longjmp come from
8464 a later time than the setjmp. */
8465 if (GET_CODE (p) == NOTE
8466 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8469 /* A PARALLEL can have lots of SETs in it,
8470 especially if it is really an ASM_OPERANDS. */
8471 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8472 && GET_CODE (PATTERN (p)) == PARALLEL)
8473 nsets += XVECLEN (PATTERN (p), 0);
8474 else if (GET_CODE (p) != NOTE)
8477 /* Ignore insns made by CSE; they cannot affect the boundaries of
8480 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8481 high_cuid = INSN_CUID (p);
8482 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8483 low_cuid = INSN_CUID (p);
8485 /* See if this insn is in our branch path. If it is and we are to
8487 if (path_entry < path_size && data->path[path_entry].branch == p)
8489 if (data->path[path_entry].status != NOT_TAKEN)
8492 /* Point to next entry in path, if any. */
8496 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8497 was specified, we haven't reached our maximum path length, there are
8498 insns following the target of the jump, this is the only use of the
8499 jump label, and the target label is preceded by a BARRIER.
8501 Alternatively, we can follow the jump if it branches around a
8502 block of code and there are no other branches into the block.
8503 In this case invalidate_skipped_block will be called to invalidate any
8504 registers set in the block when following the jump. */
8506 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8507 && GET_CODE (p) == JUMP_INSN
8508 && GET_CODE (PATTERN (p)) == SET
8509 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8510 && JUMP_LABEL (p) != 0
8511 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8512 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8514 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8515 if ((GET_CODE (q) != NOTE
8516 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8517 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8518 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8521 /* If we ran into a BARRIER, this code is an extension of the
8522 basic block when the branch is taken. */
8523 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8525 /* Don't allow ourself to keep walking around an
8526 always-executed loop. */
8527 if (next_real_insn (q) == next)
8533 /* Similarly, don't put a branch in our path more than once. */
8534 for (i = 0; i < path_entry; i++)
8535 if (data->path[i].branch == p)
8538 if (i != path_entry)
8541 data->path[path_entry].branch = p;
8542 data->path[path_entry++].status = TAKEN;
8544 /* This branch now ends our path. It was possible that we
8545 didn't see this branch the last time around (when the
8546 insn in front of the target was a JUMP_INSN that was
8547 turned into a no-op). */
8548 path_size = path_entry;
8551 /* Mark block so we won't scan it again later. */
8552 PUT_MODE (NEXT_INSN (p), QImode);
8554 /* Detect a branch around a block of code. */
8555 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8559 if (next_real_insn (q) == next)
8565 for (i = 0; i < path_entry; i++)
8566 if (data->path[i].branch == p)
8569 if (i != path_entry)
8572 /* This is no_labels_between_p (p, q) with an added check for
8573 reaching the end of a function (in case Q precedes P). */
8574 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8575 if (GET_CODE (tmp) == CODE_LABEL)
8580 data->path[path_entry].branch = p;
8581 data->path[path_entry++].status = AROUND;
8583 path_size = path_entry;
8586 /* Mark block so we won't scan it again later. */
8587 PUT_MODE (NEXT_INSN (p), QImode);
8594 data->low_cuid = low_cuid;
8595 data->high_cuid = high_cuid;
8596 data->nsets = nsets;
8599 /* If all jumps in the path are not taken, set our path length to zero
8600 so a rescan won't be done. */
8601 for (i = path_size - 1; i >= 0; i--)
8602 if (data->path[i].status != NOT_TAKEN)
8606 data->path_size = 0;
8608 data->path_size = path_size;
8610 /* End the current branch path. */
8611 data->path[path_size].branch = 0;
8614 /* Perform cse on the instructions of a function.
8615 F is the first instruction.
8616 NREGS is one plus the highest pseudo-reg number used in the instruction.
8618 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8619 (only if -frerun-cse-after-loop).
8621 Returns 1 if jump_optimize should be redone due to simplifications
8622 in conditional jump instructions. */
8625 cse_main (f, nregs, after_loop, file)
8631 struct cse_basic_block_data val;
8632 register rtx insn = f;
8635 cse_jumps_altered = 0;
8636 recorded_label_ref = 0;
8637 constant_pool_entries_cost = 0;
8641 init_alias_analysis ();
8645 max_insn_uid = get_max_uid ();
8647 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8648 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8650 #ifdef LOAD_EXTEND_OP
8652 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8653 and change the code and mode as appropriate. */
8654 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8657 /* Discard all the free elements of the previous function
8658 since they are allocated in the temporarily obstack. */
8659 bzero ((char *) table, sizeof table);
8660 free_element_chain = 0;
8661 n_elements_made = 0;
8663 /* Find the largest uid. */
8665 max_uid = get_max_uid ();
8666 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8667 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8669 /* Compute the mapping from uids to cuids.
8670 CUIDs are numbers assigned to insns, like uids,
8671 except that cuids increase monotonically through the code.
8672 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8673 between two insns is not affected by -g. */
8675 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8677 if (GET_CODE (insn) != NOTE
8678 || NOTE_LINE_NUMBER (insn) < 0)
8679 INSN_CUID (insn) = ++i;
8681 /* Give a line number note the same cuid as preceding insn. */
8682 INSN_CUID (insn) = i;
8685 /* Initialize which registers are clobbered by calls. */
8687 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8689 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8690 if ((call_used_regs[i]
8691 /* Used to check !fixed_regs[i] here, but that isn't safe;
8692 fixed regs are still call-clobbered, and sched can get
8693 confused if they can "live across calls".
8695 The frame pointer is always preserved across calls. The arg
8696 pointer is if it is fixed. The stack pointer usually is, unless
8697 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8698 will be present. If we are generating PIC code, the PIC offset
8699 table register is preserved across calls. */
8701 && i != STACK_POINTER_REGNUM
8702 && i != FRAME_POINTER_REGNUM
8703 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8704 && i != HARD_FRAME_POINTER_REGNUM
8706 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8707 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8709 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8710 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8714 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8716 /* Loop over basic blocks.
8717 Compute the maximum number of qty's needed for each basic block
8718 (which is 2 for each SET). */
8722 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8723 flag_cse_skip_blocks);
8725 /* If this basic block was already processed or has no sets, skip it. */
8726 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8728 PUT_MODE (insn, VOIDmode);
8729 insn = (val.last ? NEXT_INSN (val.last) : 0);
8734 cse_basic_block_start = val.low_cuid;
8735 cse_basic_block_end = val.high_cuid;
8736 max_qty = val.nsets * 2;
8739 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
8740 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8743 /* Make MAX_QTY bigger to give us room to optimize
8744 past the end of this basic block, if that should prove useful. */
8750 /* If this basic block is being extended by following certain jumps,
8751 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8752 Otherwise, we start after this basic block. */
8753 if (val.path_size > 0)
8754 cse_basic_block (insn, val.last, val.path, 0);
8757 int old_cse_jumps_altered = cse_jumps_altered;
8760 /* When cse changes a conditional jump to an unconditional
8761 jump, we want to reprocess the block, since it will give
8762 us a new branch path to investigate. */
8763 cse_jumps_altered = 0;
8764 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8765 if (cse_jumps_altered == 0
8766 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8769 cse_jumps_altered |= old_cse_jumps_altered;
8777 /* Tell refers_to_mem_p that qty_const info is not available. */
8780 if (max_elements_made < n_elements_made)
8781 max_elements_made = n_elements_made;
8783 return cse_jumps_altered || recorded_label_ref;
8786 /* Process a single basic block. FROM and TO and the limits of the basic
8787 block. NEXT_BRANCH points to the branch path when following jumps or
8788 a null path when not following jumps.
8790 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8791 loop. This is true when we are being called for the last time on a
8792 block and this CSE pass is before loop.c. */
8795 cse_basic_block (from, to, next_branch, around_loop)
8796 register rtx from, to;
8797 struct branch_path *next_branch;
8802 rtx libcall_insn = NULL_RTX;
8805 /* Each of these arrays is undefined before max_reg, so only allocate
8806 the space actually needed and adjust the start below. */
8808 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8809 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8810 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8811 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8812 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8814 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8815 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8816 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8818 qty_first_reg -= max_reg;
8819 qty_last_reg -= max_reg;
8820 qty_mode -= max_reg;
8821 qty_const -= max_reg;
8822 qty_const_insn -= max_reg;
8823 qty_comparison_code -= max_reg;
8824 qty_comparison_qty -= max_reg;
8825 qty_comparison_const -= max_reg;
8829 /* TO might be a label. If so, protect it from being deleted. */
8830 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8833 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8835 register enum rtx_code code = GET_CODE (insn);
8837 /* If we have processed 1,000 insns, flush the hash table to
8838 avoid extreme quadratic behavior. We must not include NOTEs
8839 in the count since there may be more or them when generating
8840 debugging information. If we clear the table at different
8841 times, code generated with -g -O might be different than code
8842 generated with -O but not -g.
8844 ??? This is a real kludge and needs to be done some other way.
8846 if (code != NOTE && num_insns++ > 1000)
8848 flush_hash_table ();
8852 /* See if this is a branch that is part of the path. If so, and it is
8853 to be taken, do so. */
8854 if (next_branch->branch == insn)
8856 enum taken status = next_branch++->status;
8857 if (status != NOT_TAKEN)
8859 if (status == TAKEN)
8860 record_jump_equiv (insn, 1);
8862 invalidate_skipped_block (NEXT_INSN (insn));
8864 /* Set the last insn as the jump insn; it doesn't affect cc0.
8865 Then follow this branch. */
8870 insn = JUMP_LABEL (insn);
8875 if (GET_MODE (insn) == QImode)
8876 PUT_MODE (insn, VOIDmode);
8878 if (GET_RTX_CLASS (code) == 'i')
8882 /* Process notes first so we have all notes in canonical forms when
8883 looking for duplicate operations. */
8885 if (REG_NOTES (insn))
8886 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8888 /* Track when we are inside in LIBCALL block. Inside such a block,
8889 we do not want to record destinations. The last insn of a
8890 LIBCALL block is not considered to be part of the block, since
8891 its destination is the result of the block and hence should be
8894 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
8895 libcall_insn = XEXP (p, 0);
8896 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8897 libcall_insn = NULL_RTX;
8899 cse_insn (insn, libcall_insn);
8902 /* If INSN is now an unconditional jump, skip to the end of our
8903 basic block by pretending that we just did the last insn in the
8904 basic block. If we are jumping to the end of our block, show
8905 that we can have one usage of TO. */
8907 if (simplejump_p (insn))
8912 if (JUMP_LABEL (insn) == to)
8915 /* Maybe TO was deleted because the jump is unconditional.
8916 If so, there is nothing left in this basic block. */
8917 /* ??? Perhaps it would be smarter to set TO
8918 to whatever follows this insn,
8919 and pretend the basic block had always ended here. */
8920 if (INSN_DELETED_P (to))
8923 insn = PREV_INSN (to);
8926 /* See if it is ok to keep on going past the label
8927 which used to end our basic block. Remember that we incremented
8928 the count of that label, so we decrement it here. If we made
8929 a jump unconditional, TO_USAGE will be one; in that case, we don't
8930 want to count the use in that jump. */
8932 if (to != 0 && NEXT_INSN (insn) == to
8933 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8935 struct cse_basic_block_data val;
8938 insn = NEXT_INSN (to);
8940 if (LABEL_NUSES (to) == 0)
8941 insn = delete_insn (to);
8943 /* If TO was the last insn in the function, we are done. */
8947 /* If TO was preceded by a BARRIER we are done with this block
8948 because it has no continuation. */
8949 prev = prev_nonnote_insn (to);
8950 if (prev && GET_CODE (prev) == BARRIER)
8953 /* Find the end of the following block. Note that we won't be
8954 following branches in this case. */
8957 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8959 /* If the tables we allocated have enough space left
8960 to handle all the SETs in the next basic block,
8961 continue through it. Otherwise, return,
8962 and that block will be scanned individually. */
8963 if (val.nsets * 2 + next_qty > max_qty)
8966 cse_basic_block_start = val.low_cuid;
8967 cse_basic_block_end = val.high_cuid;
8970 /* Prevent TO from being deleted if it is a label. */
8971 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8974 /* Back up so we process the first insn in the extension. */
8975 insn = PREV_INSN (insn);
8979 if (next_qty > max_qty)
8982 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8983 the previous insn is the only insn that branches to the head of a loop,
8984 we can cse into the loop. Don't do this if we changed the jump
8985 structure of a loop unless we aren't going to be following jumps. */
8987 if ((cse_jumps_altered == 0
8988 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8989 && around_loop && to != 0
8990 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8991 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8992 && JUMP_LABEL (PREV_INSN (to)) != 0
8993 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8994 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8996 return to ? NEXT_INSN (to) : 0;
8999 /* Count the number of times registers are used (not set) in X.
9000 COUNTS is an array in which we accumulate the count, INCR is how much
9001 we count each register usage.
9003 Don't count a usage of DEST, which is the SET_DEST of a SET which
9004 contains X in its SET_SRC. This is because such a SET does not
9005 modify the liveness of DEST. */
9008 count_reg_usage (x, counts, dest, incr)
9021 switch (code = GET_CODE (x))
9025 counts[REGNO (x)] += incr;
9038 /* If we are clobbering a MEM, mark any registers inside the address
9040 if (GET_CODE (XEXP (x, 0)) == MEM)
9041 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
9045 /* Unless we are setting a REG, count everything in SET_DEST. */
9046 if (GET_CODE (SET_DEST (x)) != REG)
9047 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
9049 /* If SRC has side-effects, then we can't delete this insn, so the
9050 usage of SET_DEST inside SRC counts.
9052 ??? Strictly-speaking, we might be preserving this insn
9053 because some other SET has side-effects, but that's hard
9054 to do and can't happen now. */
9055 count_reg_usage (SET_SRC (x), counts,
9056 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
9061 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
9063 /* ... falls through ... */
9066 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
9068 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9071 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
9076 if (REG_NOTE_KIND (x) == REG_EQUAL
9077 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
9078 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
9079 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
9086 fmt = GET_RTX_FORMAT (code);
9087 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9090 count_reg_usage (XEXP (x, i), counts, dest, incr);
9091 else if (fmt[i] == 'E')
9092 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9093 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
9097 /* Scan all the insns and delete any that are dead; i.e., they store a register
9098 that is never used or they copy a register to itself.
9100 This is used to remove insns made obviously dead by cse, loop or other
9101 optimizations. It improves the heuristics in loop since it won't try to
9102 move dead invariants out of loops or make givs for dead quantities. The
9103 remaining passes of the compilation are also sped up. */
9106 delete_trivially_dead_insns (insns, nreg)
9110 int *counts = (int *) alloca (nreg * sizeof (int));
9116 int in_libcall = 0, dead_libcall = 0;
9118 /* First count the number of times each register is used. */
9119 bzero ((char *) counts, sizeof (int) * nreg);
9120 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9121 count_reg_usage (insn, counts, NULL_RTX, 1);
9123 /* Go from the last insn to the first and delete insns that only set unused
9124 registers or copy a register to itself. As we delete an insn, remove
9125 usage counts for registers it uses. */
9126 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
9131 prev = prev_real_insn (insn);
9133 /* Don't delete any insns that are part of a libcall block unless
9134 we can delete the whole libcall block.
9136 Flow or loop might get confused if we did that. Remember
9137 that we are scanning backwards. */
9138 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9144 /* See if there's a REG_EQUAL note on this insn and try to
9145 replace the source with the REG_EQUAL expression.
9147 We assume that insns with REG_RETVALs can only be reg->reg
9148 copies at this point. */
9149 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
9152 rtx set = single_set (insn);
9154 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
9157 find_reg_note (insn, REG_RETVAL, NULL_RTX));
9162 else if (in_libcall)
9163 live_insn = ! dead_libcall;
9164 else if (GET_CODE (PATTERN (insn)) == SET)
9166 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
9167 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
9171 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
9172 && ! side_effects_p (SET_SRC (PATTERN (insn)))
9173 && ((tem = next_nonnote_insn (insn)) == 0
9174 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9175 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9178 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
9179 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
9180 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
9181 || side_effects_p (SET_SRC (PATTERN (insn))))
9184 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9185 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9187 rtx elt = XVECEXP (PATTERN (insn), 0, i);
9189 if (GET_CODE (elt) == SET)
9191 if (GET_CODE (SET_DEST (elt)) == REG
9192 && SET_DEST (elt) == SET_SRC (elt))
9196 else if (GET_CODE (SET_DEST (elt)) == CC0
9197 && ! side_effects_p (SET_SRC (elt))
9198 && ((tem = next_nonnote_insn (insn)) == 0
9199 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9200 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9203 else if (GET_CODE (SET_DEST (elt)) != REG
9204 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
9205 || counts[REGNO (SET_DEST (elt))] != 0
9206 || side_effects_p (SET_SRC (elt)))
9209 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
9215 /* If this is a dead insn, delete it and show registers in it aren't
9220 count_reg_usage (insn, counts, NULL_RTX, -1);
9224 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))