1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
30 #include "hard-reg-set.h"
33 #include "insn-config.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and several vectors together
59 with "quantity numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
85 variables should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. `qty_first_reg', `qty_last_reg',
89 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with `qty_mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate element of qty_const. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate element
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and `qty_first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
203 /* One plus largest instruction UID used in this function at time of
206 static int max_insn_uid;
208 /* Length of vectors indexed by quantity number.
209 We know in advance we will not need a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Indexed by quantity number, gives the first (or last) register
219 in the chain of registers that currently contain this quantity. */
221 static int *qty_first_reg;
222 static int *qty_last_reg;
224 /* Index by quantity number, gives the mode of the quantity. */
226 static enum machine_mode *qty_mode;
228 /* Indexed by quantity number, gives the rtx of the constant value of the
229 quantity, or zero if it does not have a known value.
230 A sum of the frame pointer (or arg pointer) plus a constant
231 can also be entered here. */
233 static rtx *qty_const;
235 /* Indexed by qty number, gives the insn that stored the constant value
236 recorded in `qty_const'. */
238 static rtx *qty_const_insn;
240 /* The next three variables are used to track when a comparison between a
241 quantity and some constant or register has been passed. In that case, we
242 know the results of the comparison in case we see it again. These variables
243 record a comparison that is known to be true. */
245 /* Indexed by qty number, gives the rtx code of a comparison with a known
246 result involving this quantity. If none, it is UNKNOWN. */
247 static enum rtx_code *qty_comparison_code;
249 /* Indexed by qty number, gives the constant being compared against in a
250 comparison of known result. If no such comparison, it is undefined.
251 If the comparison is not with a constant, it is zero. */
253 static rtx *qty_comparison_const;
255 /* Indexed by qty number, gives the quantity being compared against in a
256 comparison of known result. If no such comparison, if it undefined.
257 If the comparison is not with a register, it is -1. */
259 static int *qty_comparison_qty;
262 /* For machines that have a CC0, we do not record its value in the hash
263 table since its use is guaranteed to be the insn immediately following
264 its definition and any other insn is presumed to invalidate it.
266 Instead, we store below the value last assigned to CC0. If it should
267 happen to be a constant, it is stored in preference to the actual
268 assigned value. In case it is a constant, we store the mode in which
269 the constant should be interpreted. */
271 static rtx prev_insn_cc0;
272 static enum machine_mode prev_insn_cc0_mode;
275 /* Previous actual insn. 0 if at first insn of basic block. */
277 static rtx prev_insn;
279 /* Insn being scanned. */
281 static rtx this_insn;
283 /* Index by register number, gives the number of the next (or
284 previous) register in the chain of registers sharing the same
287 Or -1 if this register is at the end of the chain.
289 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
291 static int *reg_next_eqv;
292 static int *reg_prev_eqv;
294 struct cse_reg_info {
295 /* The number of times the register has been altered in the current
299 /* The next cse_reg_info structure in the free or used list. */
300 struct cse_reg_info* next;
302 /* The REG_TICK value at which rtx's containing this register are
303 valid in the hash table. If this does not equal the current
304 reg_tick value, such expressions existing in the hash table are
308 /* The quantity number of the register's current contents. */
315 /* A free list of cse_reg_info entries. */
316 static struct cse_reg_info *cse_reg_info_free_list;
318 /* A used list of cse_reg_info entries. */
319 static struct cse_reg_info *cse_reg_info_used_list;
320 static struct cse_reg_info *cse_reg_info_used_list_end;
322 /* A mapping from registers to cse_reg_info data structures. */
323 static hash_table_t cse_reg_info_tree;
325 /* The last lookup we did into the cse_reg_info_tree. This allows us
326 to cache repeated lookups. */
327 static int cached_regno;
328 static struct cse_reg_info *cached_cse_reg_info;
330 /* A HARD_REG_SET containing all the hard registers for which there is
331 currently a REG expression in the hash table. Note the difference
332 from the above variables, which indicate if the REG is mentioned in some
333 expression in the table. */
335 static HARD_REG_SET hard_regs_in_table;
337 /* A HARD_REG_SET containing all the hard registers that are invalidated
340 static HARD_REG_SET regs_invalidated_by_call;
342 /* CUID of insn that starts the basic block currently being cse-processed. */
344 static int cse_basic_block_start;
346 /* CUID of insn that ends the basic block currently being cse-processed. */
348 static int cse_basic_block_end;
350 /* Vector mapping INSN_UIDs to cuids.
351 The cuids are like uids but increase monotonically always.
352 We use them to see whether a reg is used outside a given basic block. */
354 static int *uid_cuid;
356 /* Highest UID in UID_CUID. */
359 /* Get the cuid of an insn. */
361 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
363 /* Nonzero if cse has altered conditional jump insns
364 in such a way that jump optimization should be redone. */
366 static int cse_jumps_altered;
368 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
369 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
370 to put in the note. */
371 static int recorded_label_ref;
373 /* canon_hash stores 1 in do_not_record
374 if it notices a reference to CC0, PC, or some other volatile
377 static int do_not_record;
379 #ifdef LOAD_EXTEND_OP
381 /* Scratch rtl used when looking for load-extended copy of a MEM. */
382 static rtx memory_extend_rtx;
385 /* canon_hash stores 1 in hash_arg_in_memory
386 if it notices a reference to memory within the expression being hashed. */
388 static int hash_arg_in_memory;
390 /* canon_hash stores 1 in hash_arg_in_struct
391 if it notices a reference to memory that's part of a structure. */
393 static int hash_arg_in_struct;
395 /* The hash table contains buckets which are chains of `struct table_elt's,
396 each recording one expression's information.
397 That expression is in the `exp' field.
399 Those elements with the same hash code are chained in both directions
400 through the `next_same_hash' and `prev_same_hash' fields.
402 Each set of expressions with equivalent values
403 are on a two-way chain through the `next_same_value'
404 and `prev_same_value' fields, and all point with
405 the `first_same_value' field at the first element in
406 that chain. The chain is in order of increasing cost.
407 Each element's cost value is in its `cost' field.
409 The `in_memory' field is nonzero for elements that
410 involve any reference to memory. These elements are removed
411 whenever a write is done to an unidentified location in memory.
412 To be safe, we assume that a memory address is unidentified unless
413 the address is either a symbol constant or a constant plus
414 the frame pointer or argument pointer.
416 The `in_struct' field is nonzero for elements that
417 involve any reference to memory inside a structure or array.
419 The `related_value' field is used to connect related expressions
420 (that differ by adding an integer).
421 The related expressions are chained in a circular fashion.
422 `related_value' is zero for expressions for which this
425 The `cost' field stores the cost of this element's expression.
427 The `is_const' flag is set if the element is a constant (including
430 The `flag' field is used as a temporary during some search routines.
432 The `mode' field is usually the same as GET_MODE (`exp'), but
433 if `exp' is a CONST_INT and has no machine mode then the `mode'
434 field is the mode it was being used as. Each constant is
435 recorded separately for each mode it is used with. */
441 struct table_elt *next_same_hash;
442 struct table_elt *prev_same_hash;
443 struct table_elt *next_same_value;
444 struct table_elt *prev_same_value;
445 struct table_elt *first_same_value;
446 struct table_elt *related_value;
448 enum machine_mode mode;
455 /* We don't want a lot of buckets, because we rarely have very many
456 things stored in the hash table, and a lot of buckets slows
457 down a lot of loops that happen frequently. */
460 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
461 register (hard registers may require `do_not_record' to be set). */
464 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
465 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
466 : canon_hash (X, M) % NBUCKETS)
468 /* Determine whether register number N is considered a fixed register for CSE.
469 It is desirable to replace other regs with fixed regs, to reduce need for
471 A reg wins if it is either the frame pointer or designated as fixed,
472 but not if it is an overlapping register. */
473 #ifdef OVERLAPPING_REGNO_P
474 #define FIXED_REGNO_P(N) \
475 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
476 || fixed_regs[N] || global_regs[N]) \
477 && ! OVERLAPPING_REGNO_P ((N)))
479 #define FIXED_REGNO_P(N) \
480 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
481 || fixed_regs[N] || global_regs[N])
484 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
485 hard registers and pointers into the frame are the cheapest with a cost
486 of 0. Next come pseudos with a cost of one and other hard registers with
487 a cost of 2. Aside from these special cases, call `rtx_cost'. */
489 #define CHEAP_REGNO(N) \
490 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
491 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
492 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
493 || ((N) < FIRST_PSEUDO_REGISTER \
494 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
496 /* A register is cheap if it is a user variable assigned to the register
497 or if its register number always corresponds to a cheap register. */
499 #define CHEAP_REG(N) \
500 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
501 || CHEAP_REGNO (REGNO (N)))
504 (GET_CODE (X) == REG \
505 ? (CHEAP_REG (X) ? 0 \
506 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
510 /* Get the info associated with register N. */
512 #define GET_CSE_REG_INFO(N) \
513 (((N) == cached_regno && cached_cse_reg_info) \
514 ? cached_cse_reg_info : get_cse_reg_info ((N)))
516 /* Get the number of times this register has been updated in this
519 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
521 /* Get the point at which REG was recorded in the table. */
523 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
525 /* Get the quantity number for REG. */
527 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
529 /* Determine if the quantity number for register X represents a valid index
530 into the `qty_...' variables. */
532 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
535 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
536 during CSE, such nodes are present. Using an ADDRESSOF node which
537 refers to the address of a REG is a good thing because we can then
538 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
539 #define CSE_ADDRESS_COST(RTX) \
540 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
541 ? -1 : ADDRESS_COST(RTX))
544 static struct table_elt *table[NBUCKETS];
546 /* Chain of `struct table_elt's made so far for this function
547 but currently removed from the table. */
549 static struct table_elt *free_element_chain;
551 /* Number of `struct table_elt' structures made so far for this function. */
553 static int n_elements_made;
555 /* Maximum value `n_elements_made' has had so far in this compilation
556 for functions previously processed. */
558 static int max_elements_made;
560 /* Surviving equivalence class when two equivalence classes are merged
561 by recording the effects of a jump in the last insn. Zero if the
562 last insn was not a conditional jump. */
564 static struct table_elt *last_jump_equiv_class;
566 /* Set to the cost of a constant pool reference if one was found for a
567 symbolic constant. If this was found, it means we should try to
568 convert constants into constant pool entries if they don't fit in
571 static int constant_pool_entries_cost;
573 /* Define maximum length of a branch path. */
575 #define PATHLENGTH 10
577 /* This data describes a block that will be processed by cse_basic_block. */
579 struct cse_basic_block_data {
580 /* Lowest CUID value of insns in block. */
582 /* Highest CUID value of insns in block. */
584 /* Total number of SETs in block. */
586 /* Last insn in the block. */
588 /* Size of current branch path, if any. */
590 /* Current branch path, indicating which branches will be taken. */
592 /* The branch insn. */
594 /* Whether it should be taken or not. AROUND is the same as taken
595 except that it is used when the destination label is not preceded
597 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
601 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
602 virtual regs here because the simplify_*_operation routines are called
603 by integrate.c, which is called before virtual register instantiation.
605 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
606 a header file so that their definitions can be shared with the
607 simplification routines in simplify-rtx.c. Until then, do not
608 change these macros without also changing the copy in simplify-rtx.c. */
610 #define FIXED_BASE_PLUS_P(X) \
611 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
612 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
613 || (X) == virtual_stack_vars_rtx \
614 || (X) == virtual_incoming_args_rtx \
615 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
616 && (XEXP (X, 0) == frame_pointer_rtx \
617 || XEXP (X, 0) == hard_frame_pointer_rtx \
618 || ((X) == arg_pointer_rtx \
619 && fixed_regs[ARG_POINTER_REGNUM]) \
620 || XEXP (X, 0) == virtual_stack_vars_rtx \
621 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
622 || GET_CODE (X) == ADDRESSOF)
624 /* Similar, but also allows reference to the stack pointer.
626 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
627 arg_pointer_rtx by itself is nonzero, because on at least one machine,
628 the i960, the arg pointer is zero when it is unused. */
630 #define NONZERO_BASE_PLUS_P(X) \
631 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
632 || (X) == virtual_stack_vars_rtx \
633 || (X) == virtual_incoming_args_rtx \
634 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
635 && (XEXP (X, 0) == frame_pointer_rtx \
636 || XEXP (X, 0) == hard_frame_pointer_rtx \
637 || ((X) == arg_pointer_rtx \
638 && fixed_regs[ARG_POINTER_REGNUM]) \
639 || XEXP (X, 0) == virtual_stack_vars_rtx \
640 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
641 || (X) == stack_pointer_rtx \
642 || (X) == virtual_stack_dynamic_rtx \
643 || (X) == virtual_outgoing_args_rtx \
644 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
645 && (XEXP (X, 0) == stack_pointer_rtx \
646 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
647 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
648 || GET_CODE (X) == ADDRESSOF)
650 static int notreg_cost PROTO((rtx));
651 static void new_basic_block PROTO((void));
652 static void make_new_qty PROTO((int));
653 static void make_regs_eqv PROTO((int, int));
654 static void delete_reg_equiv PROTO((int));
655 static int mention_regs PROTO((rtx));
656 static int insert_regs PROTO((rtx, struct table_elt *, int));
657 static void free_element PROTO((struct table_elt *));
658 static void remove_from_table PROTO((struct table_elt *, unsigned));
659 static struct table_elt *get_element PROTO((void));
660 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
661 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
662 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
663 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
665 static void merge_equiv_classes PROTO((struct table_elt *,
666 struct table_elt *));
667 static void invalidate PROTO((rtx, enum machine_mode));
668 static int cse_rtx_varies_p PROTO((rtx));
669 static void remove_invalid_refs PROTO((int));
670 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
671 static void rehash_using_reg PROTO((rtx));
672 static void invalidate_memory PROTO((void));
673 static void invalidate_for_call PROTO((void));
674 static rtx use_related_value PROTO((rtx, struct table_elt *));
675 static unsigned canon_hash PROTO((rtx, enum machine_mode));
676 static unsigned safe_hash PROTO((rtx, enum machine_mode));
677 static int exp_equiv_p PROTO((rtx, rtx, int, int));
678 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
681 static int refers_to_p PROTO((rtx, rtx));
682 static rtx canon_reg PROTO((rtx, rtx));
683 static void find_best_addr PROTO((rtx, rtx *));
684 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
686 enum machine_mode *));
687 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
689 static rtx fold_rtx PROTO((rtx, rtx));
690 static rtx equiv_constant PROTO((rtx));
691 static void record_jump_equiv PROTO((rtx, int));
692 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
694 static void cse_insn PROTO((rtx, rtx));
695 static int note_mem_written PROTO((rtx));
696 static void invalidate_from_clobbers PROTO((rtx));
697 static rtx cse_process_notes PROTO((rtx, rtx));
698 static void cse_around_loop PROTO((rtx));
699 static void invalidate_skipped_set PROTO((rtx, rtx, void *));
700 static void invalidate_skipped_block PROTO((rtx));
701 static void cse_check_loop_start PROTO((rtx, rtx, void *));
702 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
703 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
704 static void count_reg_usage PROTO((rtx, int *, rtx, int));
705 extern void dump_class PROTO((struct table_elt*));
706 static void check_fold_consts PROTO((PTR));
707 static struct cse_reg_info* get_cse_reg_info PROTO((int));
708 static unsigned int hash_cse_reg_info PROTO((hash_table_entry_t));
709 static int cse_reg_info_equal_p PROTO((hash_table_entry_t,
710 hash_table_entry_t));
712 static void flush_hash_table PROTO((void));
714 /* Dump the expressions in the equivalence class indicated by CLASSP.
715 This function is used only for debugging. */
718 struct table_elt *classp;
720 struct table_elt *elt;
722 fprintf (stderr, "Equivalence chain for ");
723 print_rtl (stderr, classp->exp);
724 fprintf (stderr, ": \n");
726 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
728 print_rtl (stderr, elt->exp);
729 fprintf (stderr, "\n");
733 /* Return an estimate of the cost of computing rtx X.
734 One use is in cse, to decide which expression to keep in the hash table.
735 Another is in rtl generation, to pick the cheapest way to multiply.
736 Other uses like the latter are expected in the future. */
738 /* Internal function, to compute cost when X is not a register; called
739 from COST macro to keep it simple. */
745 return ((GET_CODE (x) == SUBREG
746 && GET_CODE (SUBREG_REG (x)) == REG
747 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
748 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
749 && (GET_MODE_SIZE (GET_MODE (x))
750 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
751 && subreg_lowpart_p (x)
752 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
753 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
754 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
755 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
757 : rtx_cost (x, SET) * 2);
760 /* Return the right cost to give to an operation
761 to make the cost of the corresponding register-to-register instruction
762 N times that of a fast register-to-register instruction. */
764 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
767 rtx_cost (x, outer_code)
769 enum rtx_code outer_code ATTRIBUTE_UNUSED;
772 register enum rtx_code code;
773 register const char *fmt;
779 /* Compute the default costs of certain things.
780 Note that RTX_COSTS can override the defaults. */
786 /* Count multiplication by 2**n as a shift,
787 because if we are considering it, we would output it as a shift. */
788 if (GET_CODE (XEXP (x, 1)) == CONST_INT
789 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
792 total = COSTS_N_INSNS (5);
798 total = COSTS_N_INSNS (7);
801 /* Used in loop.c and combine.c as a marker. */
805 /* We don't want these to be used in substitutions because
806 we have no way of validating the resulting insn. So assign
807 anything containing an ASM_OPERANDS a very high cost. */
817 return ! CHEAP_REG (x);
820 /* If we can't tie these modes, make this expensive. The larger
821 the mode, the more expensive it is. */
822 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
823 return COSTS_N_INSNS (2
824 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
827 RTX_COSTS (x, code, outer_code);
830 CONST_COSTS (x, code, outer_code);
834 #ifdef DEFAULT_RTX_COSTS
835 DEFAULT_RTX_COSTS(x, code, outer_code);
840 /* Sum the costs of the sub-rtx's, plus cost of this operation,
841 which is already in total. */
843 fmt = GET_RTX_FORMAT (code);
844 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
846 total += rtx_cost (XEXP (x, i), code);
847 else if (fmt[i] == 'E')
848 for (j = 0; j < XVECLEN (x, i); j++)
849 total += rtx_cost (XVECEXP (x, i, j), code);
854 static struct cse_reg_info *
855 get_cse_reg_info (regno)
858 struct cse_reg_info *cri;
859 struct cse_reg_info **entry;
860 struct cse_reg_info temp;
862 /* See if we already have this entry. */
864 entry = (struct cse_reg_info **) find_hash_table_entry (cse_reg_info_tree,
871 /* Get a new cse_reg_info structure. */
872 if (cse_reg_info_free_list)
874 cri = cse_reg_info_free_list;
875 cse_reg_info_free_list = cri->next;
878 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
882 cri->reg_in_table = -1;
883 cri->reg_qty = regno;
885 cri->next = cse_reg_info_used_list;
886 cse_reg_info_used_list = cri;
887 if (!cse_reg_info_used_list_end)
888 cse_reg_info_used_list_end = cri;
893 /* Cache this lookup; we tend to be looking up information about the
894 same register several times in a row. */
895 cached_regno = regno;
896 cached_cse_reg_info = cri;
902 hash_cse_reg_info (el_ptr)
903 hash_table_entry_t el_ptr;
905 return ((const struct cse_reg_info *) el_ptr)->regno;
909 cse_reg_info_equal_p (el_ptr1, el_ptr2)
910 hash_table_entry_t el_ptr1;
911 hash_table_entry_t el_ptr2;
913 return (((const struct cse_reg_info *) el_ptr1)->regno
914 == ((const struct cse_reg_info *) el_ptr2)->regno);
917 /* Clear the hash table and initialize each register with its own quantity,
918 for a new basic block. */
927 if (cse_reg_info_tree)
929 delete_hash_table (cse_reg_info_tree);
930 if (cse_reg_info_used_list)
932 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
933 cse_reg_info_free_list = cse_reg_info_used_list;
934 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
936 cached_cse_reg_info = 0;
939 cse_reg_info_tree = create_hash_table (0, hash_cse_reg_info,
940 cse_reg_info_equal_p);
942 CLEAR_HARD_REG_SET (hard_regs_in_table);
944 /* The per-quantity values used to be initialized here, but it is
945 much faster to initialize each as it is made in `make_new_qty'. */
947 for (i = 0; i < NBUCKETS; i++)
949 register struct table_elt *this, *next;
950 for (this = table[i]; this; this = next)
952 next = this->next_same_hash;
957 bzero ((char *) table, sizeof table);
966 /* Say that register REG contains a quantity not in any register before
967 and initialize that quantity. */
975 if (next_qty >= max_qty)
978 q = REG_QTY (reg) = next_qty++;
979 qty_first_reg[q] = reg;
980 qty_last_reg[q] = reg;
981 qty_const[q] = qty_const_insn[q] = 0;
982 qty_comparison_code[q] = UNKNOWN;
984 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
987 /* Make reg NEW equivalent to reg OLD.
988 OLD is not changing; NEW is. */
991 make_regs_eqv (new, old)
992 register int new, old;
994 register int lastr, firstr;
995 register int q = REG_QTY (old);
997 /* Nothing should become eqv until it has a "non-invalid" qty number. */
998 if (! REGNO_QTY_VALID_P (old))
1002 firstr = qty_first_reg[q];
1003 lastr = qty_last_reg[q];
1005 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1006 hard regs. Among pseudos, if NEW will live longer than any other reg
1007 of the same qty, and that is beyond the current basic block,
1008 make it the new canonical replacement for this qty. */
1009 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1010 /* Certain fixed registers might be of the class NO_REGS. This means
1011 that not only can they not be allocated by the compiler, but
1012 they cannot be used in substitutions or canonicalizations
1014 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1015 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1016 || (new >= FIRST_PSEUDO_REGISTER
1017 && (firstr < FIRST_PSEUDO_REGISTER
1018 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1019 || (uid_cuid[REGNO_FIRST_UID (new)]
1020 < cse_basic_block_start))
1021 && (uid_cuid[REGNO_LAST_UID (new)]
1022 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1024 reg_prev_eqv[firstr] = new;
1025 reg_next_eqv[new] = firstr;
1026 reg_prev_eqv[new] = -1;
1027 qty_first_reg[q] = new;
1031 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1032 Otherwise, insert before any non-fixed hard regs that are at the
1033 end. Registers of class NO_REGS cannot be used as an
1034 equivalent for anything. */
1035 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1036 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1037 && new >= FIRST_PSEUDO_REGISTER)
1038 lastr = reg_prev_eqv[lastr];
1039 reg_next_eqv[new] = reg_next_eqv[lastr];
1040 if (reg_next_eqv[lastr] >= 0)
1041 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1043 qty_last_reg[q] = new;
1044 reg_next_eqv[lastr] = new;
1045 reg_prev_eqv[new] = lastr;
1049 /* Remove REG from its equivalence class. */
1052 delete_reg_equiv (reg)
1055 register int q = REG_QTY (reg);
1058 /* If invalid, do nothing. */
1062 p = reg_prev_eqv[reg];
1063 n = reg_next_eqv[reg];
1066 reg_prev_eqv[n] = p;
1068 qty_last_reg[q] = p;
1070 reg_next_eqv[p] = n;
1072 qty_first_reg[q] = n;
1074 REG_QTY (reg) = reg;
1077 /* Remove any invalid expressions from the hash table
1078 that refer to any of the registers contained in expression X.
1080 Make sure that newly inserted references to those registers
1081 as subexpressions will be considered valid.
1083 mention_regs is not called when a register itself
1084 is being stored in the table.
1086 Return 1 if we have done something that may have changed the hash code
1093 register enum rtx_code code;
1095 register const char *fmt;
1096 register int changed = 0;
1101 code = GET_CODE (x);
1104 register int regno = REGNO (x);
1105 register int endregno
1106 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1107 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1110 for (i = regno; i < endregno; i++)
1112 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1113 remove_invalid_refs (i);
1115 REG_IN_TABLE (i) = REG_TICK (i);
1121 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1122 pseudo if they don't use overlapping words. We handle only pseudos
1123 here for simplicity. */
1124 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1125 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1127 int i = REGNO (SUBREG_REG (x));
1129 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1131 /* If reg_tick has been incremented more than once since
1132 reg_in_table was last set, that means that the entire
1133 register has been set before, so discard anything memorized
1134 for the entrire register, including all SUBREG expressions. */
1135 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1136 remove_invalid_refs (i);
1138 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1141 REG_IN_TABLE (i) = REG_TICK (i);
1145 /* If X is a comparison or a COMPARE and either operand is a register
1146 that does not have a quantity, give it one. This is so that a later
1147 call to record_jump_equiv won't cause X to be assigned a different
1148 hash code and not found in the table after that call.
1150 It is not necessary to do this here, since rehash_using_reg can
1151 fix up the table later, but doing this here eliminates the need to
1152 call that expensive function in the most common case where the only
1153 use of the register is in the comparison. */
1155 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1157 if (GET_CODE (XEXP (x, 0)) == REG
1158 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1159 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1161 rehash_using_reg (XEXP (x, 0));
1165 if (GET_CODE (XEXP (x, 1)) == REG
1166 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1167 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1169 rehash_using_reg (XEXP (x, 1));
1174 fmt = GET_RTX_FORMAT (code);
1175 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1177 changed |= mention_regs (XEXP (x, i));
1178 else if (fmt[i] == 'E')
1179 for (j = 0; j < XVECLEN (x, i); j++)
1180 changed |= mention_regs (XVECEXP (x, i, j));
1185 /* Update the register quantities for inserting X into the hash table
1186 with a value equivalent to CLASSP.
1187 (If the class does not contain a REG, it is irrelevant.)
1188 If MODIFIED is nonzero, X is a destination; it is being modified.
1189 Note that delete_reg_equiv should be called on a register
1190 before insert_regs is done on that register with MODIFIED != 0.
1192 Nonzero value means that elements of reg_qty have changed
1193 so X's hash code may be different. */
1196 insert_regs (x, classp, modified)
1198 struct table_elt *classp;
1201 if (GET_CODE (x) == REG)
1203 register int regno = REGNO (x);
1205 /* If REGNO is in the equivalence table already but is of the
1206 wrong mode for that equivalence, don't do anything here. */
1208 if (REGNO_QTY_VALID_P (regno)
1209 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1212 if (modified || ! REGNO_QTY_VALID_P (regno))
1215 for (classp = classp->first_same_value;
1217 classp = classp->next_same_value)
1218 if (GET_CODE (classp->exp) == REG
1219 && GET_MODE (classp->exp) == GET_MODE (x))
1221 make_regs_eqv (regno, REGNO (classp->exp));
1225 make_new_qty (regno);
1226 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1233 /* If X is a SUBREG, we will likely be inserting the inner register in the
1234 table. If that register doesn't have an assigned quantity number at
1235 this point but does later, the insertion that we will be doing now will
1236 not be accessible because its hash code will have changed. So assign
1237 a quantity number now. */
1239 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1240 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1242 int regno = REGNO (SUBREG_REG (x));
1244 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1245 /* Mention_regs checks if REG_TICK is exactly one larger than
1246 REG_IN_TABLE to find out if there was only a single preceding
1247 invalidation - for the SUBREG - or another one, which would be
1248 for the full register. Since we don't invalidate the SUBREG
1249 here first, we might have to bump up REG_TICK so that mention_regs
1250 will do the right thing. */
1251 if (REG_IN_TABLE (regno) >= 0
1252 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1258 return mention_regs (x);
1261 /* Look in or update the hash table. */
1263 /* Put the element ELT on the list of free elements. */
1267 struct table_elt *elt;
1269 elt->next_same_hash = free_element_chain;
1270 free_element_chain = elt;
1273 /* Return an element that is free for use. */
1275 static struct table_elt *
1278 struct table_elt *elt = free_element_chain;
1281 free_element_chain = elt->next_same_hash;
1285 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1288 /* Remove table element ELT from use in the table.
1289 HASH is its hash code, made using the HASH macro.
1290 It's an argument because often that is known in advance
1291 and we save much time not recomputing it. */
1294 remove_from_table (elt, hash)
1295 register struct table_elt *elt;
1301 /* Mark this element as removed. See cse_insn. */
1302 elt->first_same_value = 0;
1304 /* Remove the table element from its equivalence class. */
1307 register struct table_elt *prev = elt->prev_same_value;
1308 register struct table_elt *next = elt->next_same_value;
1310 if (next) next->prev_same_value = prev;
1313 prev->next_same_value = next;
1316 register struct table_elt *newfirst = next;
1319 next->first_same_value = newfirst;
1320 next = next->next_same_value;
1325 /* Remove the table element from its hash bucket. */
1328 register struct table_elt *prev = elt->prev_same_hash;
1329 register struct table_elt *next = elt->next_same_hash;
1331 if (next) next->prev_same_hash = prev;
1334 prev->next_same_hash = next;
1335 else if (table[hash] == elt)
1339 /* This entry is not in the proper hash bucket. This can happen
1340 when two classes were merged by `merge_equiv_classes'. Search
1341 for the hash bucket that it heads. This happens only very
1342 rarely, so the cost is acceptable. */
1343 for (hash = 0; hash < NBUCKETS; hash++)
1344 if (table[hash] == elt)
1349 /* Remove the table element from its related-value circular chain. */
1351 if (elt->related_value != 0 && elt->related_value != elt)
1353 register struct table_elt *p = elt->related_value;
1354 while (p->related_value != elt)
1355 p = p->related_value;
1356 p->related_value = elt->related_value;
1357 if (p->related_value == p)
1358 p->related_value = 0;
1364 /* Look up X in the hash table and return its table element,
1365 or 0 if X is not in the table.
1367 MODE is the machine-mode of X, or if X is an integer constant
1368 with VOIDmode then MODE is the mode with which X will be used.
1370 Here we are satisfied to find an expression whose tree structure
1373 static struct table_elt *
1374 lookup (x, hash, mode)
1377 enum machine_mode mode;
1379 register struct table_elt *p;
1381 for (p = table[hash]; p; p = p->next_same_hash)
1382 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1383 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1389 /* Like `lookup' but don't care whether the table element uses invalid regs.
1390 Also ignore discrepancies in the machine mode of a register. */
1392 static struct table_elt *
1393 lookup_for_remove (x, hash, mode)
1396 enum machine_mode mode;
1398 register struct table_elt *p;
1400 if (GET_CODE (x) == REG)
1402 int regno = REGNO (x);
1403 /* Don't check the machine mode when comparing registers;
1404 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1405 for (p = table[hash]; p; p = p->next_same_hash)
1406 if (GET_CODE (p->exp) == REG
1407 && REGNO (p->exp) == regno)
1412 for (p = table[hash]; p; p = p->next_same_hash)
1413 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1420 /* Look for an expression equivalent to X and with code CODE.
1421 If one is found, return that expression. */
1424 lookup_as_function (x, code)
1428 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1430 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1431 long as we are narrowing. So if we looked in vain for a mode narrower
1432 than word_mode before, look for word_mode now. */
1433 if (p == 0 && code == CONST_INT
1434 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1437 PUT_MODE (x, word_mode);
1438 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1444 for (p = p->first_same_value; p; p = p->next_same_value)
1446 if (GET_CODE (p->exp) == code
1447 /* Make sure this is a valid entry in the table. */
1448 && exp_equiv_p (p->exp, p->exp, 1, 0))
1455 /* Insert X in the hash table, assuming HASH is its hash code
1456 and CLASSP is an element of the class it should go in
1457 (or 0 if a new class should be made).
1458 It is inserted at the proper position to keep the class in
1459 the order cheapest first.
1461 MODE is the machine-mode of X, or if X is an integer constant
1462 with VOIDmode then MODE is the mode with which X will be used.
1464 For elements of equal cheapness, the most recent one
1465 goes in front, except that the first element in the list
1466 remains first unless a cheaper element is added. The order of
1467 pseudo-registers does not matter, as canon_reg will be called to
1468 find the cheapest when a register is retrieved from the table.
1470 The in_memory field in the hash table element is set to 0.
1471 The caller must set it nonzero if appropriate.
1473 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1474 and if insert_regs returns a nonzero value
1475 you must then recompute its hash code before calling here.
1477 If necessary, update table showing constant values of quantities. */
1479 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1481 static struct table_elt *
1482 insert (x, classp, hash, mode)
1484 register struct table_elt *classp;
1486 enum machine_mode mode;
1488 register struct table_elt *elt;
1490 /* If X is a register and we haven't made a quantity for it,
1491 something is wrong. */
1492 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1495 /* If X is a hard register, show it is being put in the table. */
1496 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1498 int regno = REGNO (x);
1499 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1502 for (i = regno; i < endregno; i++)
1503 SET_HARD_REG_BIT (hard_regs_in_table, i);
1506 /* If X is a label, show we recorded it. */
1507 if (GET_CODE (x) == LABEL_REF
1508 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1509 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1510 recorded_label_ref = 1;
1512 /* Put an element for X into the right hash bucket. */
1514 elt = get_element ();
1516 elt->cost = COST (x);
1517 elt->next_same_value = 0;
1518 elt->prev_same_value = 0;
1519 elt->next_same_hash = table[hash];
1520 elt->prev_same_hash = 0;
1521 elt->related_value = 0;
1524 elt->is_const = (CONSTANT_P (x)
1525 /* GNU C++ takes advantage of this for `this'
1526 (and other const values). */
1527 || (RTX_UNCHANGING_P (x)
1528 && GET_CODE (x) == REG
1529 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1530 || FIXED_BASE_PLUS_P (x));
1533 table[hash]->prev_same_hash = elt;
1536 /* Put it into the proper value-class. */
1539 classp = classp->first_same_value;
1540 if (CHEAPER (elt, classp))
1541 /* Insert at the head of the class */
1543 register struct table_elt *p;
1544 elt->next_same_value = classp;
1545 classp->prev_same_value = elt;
1546 elt->first_same_value = elt;
1548 for (p = classp; p; p = p->next_same_value)
1549 p->first_same_value = elt;
1553 /* Insert not at head of the class. */
1554 /* Put it after the last element cheaper than X. */
1555 register struct table_elt *p, *next;
1556 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1558 /* Put it after P and before NEXT. */
1559 elt->next_same_value = next;
1561 next->prev_same_value = elt;
1562 elt->prev_same_value = p;
1563 p->next_same_value = elt;
1564 elt->first_same_value = classp;
1568 elt->first_same_value = elt;
1570 /* If this is a constant being set equivalent to a register or a register
1571 being set equivalent to a constant, note the constant equivalence.
1573 If this is a constant, it cannot be equivalent to a different constant,
1574 and a constant is the only thing that can be cheaper than a register. So
1575 we know the register is the head of the class (before the constant was
1578 If this is a register that is not already known equivalent to a
1579 constant, we must check the entire class.
1581 If this is a register that is already known equivalent to an insn,
1582 update `qty_const_insn' to show that `this_insn' is the latest
1583 insn making that quantity equivalent to the constant. */
1585 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1586 && GET_CODE (x) != REG)
1588 qty_const[REG_QTY (REGNO (classp->exp))]
1589 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1590 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1593 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1596 register struct table_elt *p;
1598 for (p = classp; p != 0; p = p->next_same_value)
1600 if (p->is_const && GET_CODE (p->exp) != REG)
1602 qty_const[REG_QTY (REGNO (x))]
1603 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1604 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1610 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1611 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1612 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1614 /* If this is a constant with symbolic value,
1615 and it has a term with an explicit integer value,
1616 link it up with related expressions. */
1617 if (GET_CODE (x) == CONST)
1619 rtx subexp = get_related_value (x);
1621 struct table_elt *subelt, *subelt_prev;
1625 /* Get the integer-free subexpression in the hash table. */
1626 subhash = safe_hash (subexp, mode) % NBUCKETS;
1627 subelt = lookup (subexp, subhash, mode);
1629 subelt = insert (subexp, NULL_PTR, subhash, mode);
1630 /* Initialize SUBELT's circular chain if it has none. */
1631 if (subelt->related_value == 0)
1632 subelt->related_value = subelt;
1633 /* Find the element in the circular chain that precedes SUBELT. */
1634 subelt_prev = subelt;
1635 while (subelt_prev->related_value != subelt)
1636 subelt_prev = subelt_prev->related_value;
1637 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1638 This way the element that follows SUBELT is the oldest one. */
1639 elt->related_value = subelt_prev->related_value;
1640 subelt_prev->related_value = elt;
1647 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1648 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1649 the two classes equivalent.
1651 CLASS1 will be the surviving class; CLASS2 should not be used after this
1654 Any invalid entries in CLASS2 will not be copied. */
1657 merge_equiv_classes (class1, class2)
1658 struct table_elt *class1, *class2;
1660 struct table_elt *elt, *next, *new;
1662 /* Ensure we start with the head of the classes. */
1663 class1 = class1->first_same_value;
1664 class2 = class2->first_same_value;
1666 /* If they were already equal, forget it. */
1667 if (class1 == class2)
1670 for (elt = class2; elt; elt = next)
1674 enum machine_mode mode = elt->mode;
1676 next = elt->next_same_value;
1678 /* Remove old entry, make a new one in CLASS1's class.
1679 Don't do this for invalid entries as we cannot find their
1680 hash code (it also isn't necessary). */
1681 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1683 hash_arg_in_memory = 0;
1684 hash_arg_in_struct = 0;
1685 hash = HASH (exp, mode);
1687 if (GET_CODE (exp) == REG)
1688 delete_reg_equiv (REGNO (exp));
1690 remove_from_table (elt, hash);
1692 if (insert_regs (exp, class1, 0))
1694 rehash_using_reg (exp);
1695 hash = HASH (exp, mode);
1697 new = insert (exp, class1, hash, mode);
1698 new->in_memory = hash_arg_in_memory;
1699 new->in_struct = hash_arg_in_struct;
1705 /* Flush the entire hash table. */
1711 struct table_elt *p;
1713 for (i = 0; i < NBUCKETS; i++)
1714 for (p = table[i]; p; p = table[i])
1716 /* Note that invalidate can remove elements
1717 after P in the current hash chain. */
1718 if (GET_CODE (p->exp) == REG)
1719 invalidate (p->exp, p->mode);
1721 remove_from_table (p, i);
1726 /* Remove from the hash table, or mark as invalid,
1727 all expressions whose values could be altered by storing in X.
1728 X is a register, a subreg, or a memory reference with nonvarying address
1729 (because, when a memory reference with a varying address is stored in,
1730 all memory references are removed by invalidate_memory
1731 so specific invalidation is superfluous).
1732 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1733 instead of just the amount indicated by the mode of X. This is only used
1734 for bitfield stores into memory.
1736 A nonvarying address may be just a register or just
1737 a symbol reference, or it may be either of those plus
1738 a numeric offset. */
1741 invalidate (x, full_mode)
1743 enum machine_mode full_mode;
1746 register struct table_elt *p;
1748 /* If X is a register, dependencies on its contents
1749 are recorded through the qty number mechanism.
1750 Just change the qty number of the register,
1751 mark it as invalid for expressions that refer to it,
1752 and remove it itself. */
1754 if (GET_CODE (x) == REG)
1756 register int regno = REGNO (x);
1757 register unsigned hash = HASH (x, GET_MODE (x));
1759 /* Remove REGNO from any quantity list it might be on and indicate
1760 that its value might have changed. If it is a pseudo, remove its
1761 entry from the hash table.
1763 For a hard register, we do the first two actions above for any
1764 additional hard registers corresponding to X. Then, if any of these
1765 registers are in the table, we must remove any REG entries that
1766 overlap these registers. */
1768 delete_reg_equiv (regno);
1771 if (regno >= FIRST_PSEUDO_REGISTER)
1773 /* Because a register can be referenced in more than one mode,
1774 we might have to remove more than one table entry. */
1776 struct table_elt *elt;
1778 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1779 remove_from_table (elt, hash);
1783 HOST_WIDE_INT in_table
1784 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1785 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1786 int tregno, tendregno;
1787 register struct table_elt *p, *next;
1789 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1791 for (i = regno + 1; i < endregno; i++)
1793 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1794 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1795 delete_reg_equiv (i);
1800 for (hash = 0; hash < NBUCKETS; hash++)
1801 for (p = table[hash]; p; p = next)
1803 next = p->next_same_hash;
1805 if (GET_CODE (p->exp) != REG
1806 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1809 tregno = REGNO (p->exp);
1811 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1812 if (tendregno > regno && tregno < endregno)
1813 remove_from_table (p, hash);
1820 if (GET_CODE (x) == SUBREG)
1822 if (GET_CODE (SUBREG_REG (x)) != REG)
1824 invalidate (SUBREG_REG (x), VOIDmode);
1828 /* If X is a parallel, invalidate all of its elements. */
1830 if (GET_CODE (x) == PARALLEL)
1832 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1833 invalidate (XVECEXP (x, 0, i), VOIDmode);
1837 /* If X is an expr_list, this is part of a disjoint return value;
1838 extract the location in question ignoring the offset. */
1840 if (GET_CODE (x) == EXPR_LIST)
1842 invalidate (XEXP (x, 0), VOIDmode);
1846 /* X is not a register; it must be a memory reference with
1847 a nonvarying address. Remove all hash table elements
1848 that refer to overlapping pieces of memory. */
1850 if (GET_CODE (x) != MEM)
1853 if (full_mode == VOIDmode)
1854 full_mode = GET_MODE (x);
1856 for (i = 0; i < NBUCKETS; i++)
1858 register struct table_elt *next;
1859 for (p = table[i]; p; p = next)
1861 next = p->next_same_hash;
1862 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1863 than checking all the aliases). */
1865 && (GET_CODE (p->exp) != MEM
1866 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1867 remove_from_table (p, i);
1872 /* Remove all expressions that refer to register REGNO,
1873 since they are already invalid, and we are about to
1874 mark that register valid again and don't want the old
1875 expressions to reappear as valid. */
1878 remove_invalid_refs (regno)
1882 register struct table_elt *p, *next;
1884 for (i = 0; i < NBUCKETS; i++)
1885 for (p = table[i]; p; p = next)
1887 next = p->next_same_hash;
1888 if (GET_CODE (p->exp) != REG
1889 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1890 remove_from_table (p, i);
1894 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1896 remove_invalid_subreg_refs (regno, word, mode)
1899 enum machine_mode mode;
1902 register struct table_elt *p, *next;
1903 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1905 for (i = 0; i < NBUCKETS; i++)
1906 for (p = table[i]; p; p = next)
1909 next = p->next_same_hash;
1912 if (GET_CODE (p->exp) != REG
1913 && (GET_CODE (exp) != SUBREG
1914 || GET_CODE (SUBREG_REG (exp)) != REG
1915 || REGNO (SUBREG_REG (exp)) != regno
1916 || (((SUBREG_WORD (exp)
1917 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1919 && SUBREG_WORD (exp) <= end))
1920 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1921 remove_from_table (p, i);
1925 /* Recompute the hash codes of any valid entries in the hash table that
1926 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1928 This is called when we make a jump equivalence. */
1931 rehash_using_reg (x)
1935 struct table_elt *p, *next;
1938 if (GET_CODE (x) == SUBREG)
1941 /* If X is not a register or if the register is known not to be in any
1942 valid entries in the table, we have no work to do. */
1944 if (GET_CODE (x) != REG
1945 || REG_IN_TABLE (REGNO (x)) < 0
1946 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1949 /* Scan all hash chains looking for valid entries that mention X.
1950 If we find one and it is in the wrong hash chain, move it. We can skip
1951 objects that are registers, since they are handled specially. */
1953 for (i = 0; i < NBUCKETS; i++)
1954 for (p = table[i]; p; p = next)
1956 next = p->next_same_hash;
1957 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1958 && exp_equiv_p (p->exp, p->exp, 1, 0)
1959 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1961 if (p->next_same_hash)
1962 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1964 if (p->prev_same_hash)
1965 p->prev_same_hash->next_same_hash = p->next_same_hash;
1967 table[i] = p->next_same_hash;
1969 p->next_same_hash = table[hash];
1970 p->prev_same_hash = 0;
1972 table[hash]->prev_same_hash = p;
1978 /* Remove from the hash table any expression that is a call-clobbered
1979 register. Also update their TICK values. */
1982 invalidate_for_call ()
1984 int regno, endregno;
1987 struct table_elt *p, *next;
1990 /* Go through all the hard registers. For each that is clobbered in
1991 a CALL_INSN, remove the register from quantity chains and update
1992 reg_tick if defined. Also see if any of these registers is currently
1995 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1996 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1998 delete_reg_equiv (regno);
1999 if (REG_TICK (regno) >= 0)
2002 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2005 /* In the case where we have no call-clobbered hard registers in the
2006 table, we are done. Otherwise, scan the table and remove any
2007 entry that overlaps a call-clobbered register. */
2010 for (hash = 0; hash < NBUCKETS; hash++)
2011 for (p = table[hash]; p; p = next)
2013 next = p->next_same_hash;
2015 if (GET_CODE (p->exp) != REG
2016 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2019 regno = REGNO (p->exp);
2020 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2022 for (i = regno; i < endregno; i++)
2023 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2025 remove_from_table (p, hash);
2031 /* Given an expression X of type CONST,
2032 and ELT which is its table entry (or 0 if it
2033 is not in the hash table),
2034 return an alternate expression for X as a register plus integer.
2035 If none can be found, return 0. */
2038 use_related_value (x, elt)
2040 struct table_elt *elt;
2042 register struct table_elt *relt = 0;
2043 register struct table_elt *p, *q;
2044 HOST_WIDE_INT offset;
2046 /* First, is there anything related known?
2047 If we have a table element, we can tell from that.
2048 Otherwise, must look it up. */
2050 if (elt != 0 && elt->related_value != 0)
2052 else if (elt == 0 && GET_CODE (x) == CONST)
2054 rtx subexp = get_related_value (x);
2056 relt = lookup (subexp,
2057 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2064 /* Search all related table entries for one that has an
2065 equivalent register. */
2070 /* This loop is strange in that it is executed in two different cases.
2071 The first is when X is already in the table. Then it is searching
2072 the RELATED_VALUE list of X's class (RELT). The second case is when
2073 X is not in the table. Then RELT points to a class for the related
2076 Ensure that, whatever case we are in, that we ignore classes that have
2077 the same value as X. */
2079 if (rtx_equal_p (x, p->exp))
2082 for (q = p->first_same_value; q; q = q->next_same_value)
2083 if (GET_CODE (q->exp) == REG)
2089 p = p->related_value;
2091 /* We went all the way around, so there is nothing to be found.
2092 Alternatively, perhaps RELT was in the table for some other reason
2093 and it has no related values recorded. */
2094 if (p == relt || p == 0)
2101 offset = (get_integer_term (x) - get_integer_term (p->exp));
2102 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2103 return plus_constant (q->exp, offset);
2106 /* Hash an rtx. We are careful to make sure the value is never negative.
2107 Equivalent registers hash identically.
2108 MODE is used in hashing for CONST_INTs only;
2109 otherwise the mode of X is used.
2111 Store 1 in do_not_record if any subexpression is volatile.
2113 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2114 which does not have the RTX_UNCHANGING_P bit set.
2115 In this case, also store 1 in hash_arg_in_struct
2116 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2118 Note that cse_insn knows that the hash code of a MEM expression
2119 is just (int) MEM plus the hash code of the address. */
2122 canon_hash (x, mode)
2124 enum machine_mode mode;
2127 register unsigned hash = 0;
2128 register enum rtx_code code;
2129 register const char *fmt;
2131 /* repeat is used to turn tail-recursion into iteration. */
2136 code = GET_CODE (x);
2141 register int regno = REGNO (x);
2143 /* On some machines, we can't record any non-fixed hard register,
2144 because extending its life will cause reload problems. We
2145 consider ap, fp, and sp to be fixed for this purpose.
2147 We also consider CCmode registers to be fixed for this purpose;
2148 failure to do so leads to failure to simplify 0<100 type of
2151 On all machines, we can't record any global registers. */
2153 if (regno < FIRST_PSEUDO_REGISTER
2154 && (global_regs[regno]
2155 || (SMALL_REGISTER_CLASSES
2156 && ! fixed_regs[regno]
2157 && regno != FRAME_POINTER_REGNUM
2158 && regno != HARD_FRAME_POINTER_REGNUM
2159 && regno != ARG_POINTER_REGNUM
2160 && regno != STACK_POINTER_REGNUM
2161 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2166 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2170 /* We handle SUBREG of a REG specially because the underlying
2171 reg changes its hash value with every value change; we don't
2172 want to have to forget unrelated subregs when one subreg changes. */
2175 if (GET_CODE (SUBREG_REG (x)) == REG)
2177 hash += (((unsigned) SUBREG << 7)
2178 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2186 unsigned HOST_WIDE_INT tem = INTVAL (x);
2187 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2192 /* This is like the general case, except that it only counts
2193 the integers representing the constant. */
2194 hash += (unsigned) code + (unsigned) GET_MODE (x);
2195 if (GET_MODE (x) != VOIDmode)
2196 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2198 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2202 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2203 + (unsigned) CONST_DOUBLE_HIGH (x));
2206 /* Assume there is only one rtx object for any given label. */
2209 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2214 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2218 if (MEM_VOLATILE_P (x))
2223 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2225 hash_arg_in_memory = 1;
2226 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2228 /* Now that we have already found this special case,
2229 might as well speed it up as much as possible. */
2230 hash += (unsigned) MEM;
2241 case UNSPEC_VOLATILE:
2246 if (MEM_VOLATILE_P (x))
2257 i = GET_RTX_LENGTH (code) - 1;
2258 hash += (unsigned) code + (unsigned) GET_MODE (x);
2259 fmt = GET_RTX_FORMAT (code);
2264 rtx tem = XEXP (x, i);
2266 /* If we are about to do the last recursive call
2267 needed at this level, change it into iteration.
2268 This function is called enough to be worth it. */
2274 hash += canon_hash (tem, 0);
2276 else if (fmt[i] == 'E')
2277 for (j = 0; j < XVECLEN (x, i); j++)
2278 hash += canon_hash (XVECEXP (x, i, j), 0);
2279 else if (fmt[i] == 's')
2281 register unsigned char *p = (unsigned char *) XSTR (x, i);
2286 else if (fmt[i] == 'i')
2288 register unsigned tem = XINT (x, i);
2291 else if (fmt[i] == '0' || fmt[i] == 't')
2299 /* Like canon_hash but with no side effects. */
2304 enum machine_mode mode;
2306 int save_do_not_record = do_not_record;
2307 int save_hash_arg_in_memory = hash_arg_in_memory;
2308 int save_hash_arg_in_struct = hash_arg_in_struct;
2309 unsigned hash = canon_hash (x, mode);
2310 hash_arg_in_memory = save_hash_arg_in_memory;
2311 hash_arg_in_struct = save_hash_arg_in_struct;
2312 do_not_record = save_do_not_record;
2316 /* Return 1 iff X and Y would canonicalize into the same thing,
2317 without actually constructing the canonicalization of either one.
2318 If VALIDATE is nonzero,
2319 we assume X is an expression being processed from the rtl
2320 and Y was found in the hash table. We check register refs
2321 in Y for being marked as valid.
2323 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2324 that is known to be in the register. Ordinarily, we don't allow them
2325 to match, because letting them match would cause unpredictable results
2326 in all the places that search a hash table chain for an equivalent
2327 for a given value. A possible equivalent that has different structure
2328 has its hash code computed from different data. Whether the hash code
2329 is the same as that of the given value is pure luck. */
2332 exp_equiv_p (x, y, validate, equal_values)
2338 register enum rtx_code code;
2339 register const char *fmt;
2341 /* Note: it is incorrect to assume an expression is equivalent to itself
2342 if VALIDATE is nonzero. */
2343 if (x == y && !validate)
2345 if (x == 0 || y == 0)
2348 code = GET_CODE (x);
2349 if (code != GET_CODE (y))
2354 /* If X is a constant and Y is a register or vice versa, they may be
2355 equivalent. We only have to validate if Y is a register. */
2356 if (CONSTANT_P (x) && GET_CODE (y) == REG
2357 && REGNO_QTY_VALID_P (REGNO (y))
2358 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2359 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2360 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2363 if (CONSTANT_P (y) && code == REG
2364 && REGNO_QTY_VALID_P (REGNO (x))
2365 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2366 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2372 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2373 if (GET_MODE (x) != GET_MODE (y))
2383 return INTVAL (x) == INTVAL (y);
2386 return XEXP (x, 0) == XEXP (y, 0);
2389 return XSTR (x, 0) == XSTR (y, 0);
2393 int regno = REGNO (y);
2395 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2396 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2399 /* If the quantities are not the same, the expressions are not
2400 equivalent. If there are and we are not to validate, they
2401 are equivalent. Otherwise, ensure all regs are up-to-date. */
2403 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2409 for (i = regno; i < endregno; i++)
2410 if (REG_IN_TABLE (i) != REG_TICK (i))
2416 /* For commutative operations, check both orders. */
2424 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2425 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2426 validate, equal_values))
2427 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2428 validate, equal_values)
2429 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2430 validate, equal_values)));
2436 /* Compare the elements. If any pair of corresponding elements
2437 fail to match, return 0 for the whole things. */
2439 fmt = GET_RTX_FORMAT (code);
2440 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2445 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2450 if (XVECLEN (x, i) != XVECLEN (y, i))
2452 for (j = 0; j < XVECLEN (x, i); j++)
2453 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2454 validate, equal_values))
2459 if (strcmp (XSTR (x, i), XSTR (y, i)))
2464 if (XINT (x, i) != XINT (y, i))
2469 if (XWINT (x, i) != XWINT (y, i))
2485 /* Return 1 iff any subexpression of X matches Y.
2486 Here we do not require that X or Y be valid (for registers referred to)
2487 for being in the hash table. */
2494 register enum rtx_code code;
2495 register const char *fmt;
2500 if (x == 0 || y == 0)
2503 code = GET_CODE (x);
2504 /* If X as a whole has the same code as Y, they may match.
2506 if (code == GET_CODE (y))
2508 if (exp_equiv_p (x, y, 0, 1))
2512 /* X does not match, so try its subexpressions. */
2514 fmt = GET_RTX_FORMAT (code);
2515 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2524 if (refers_to_p (XEXP (x, i), y))
2527 else if (fmt[i] == 'E')
2530 for (j = 0; j < XVECLEN (x, i); j++)
2531 if (refers_to_p (XVECEXP (x, i, j), y))
2538 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2539 set PBASE, PSTART, and PEND which correspond to the base of the address,
2540 the starting offset, and ending offset respectively.
2542 ADDR is known to be a nonvarying address. */
2544 /* ??? Despite what the comments say, this function is in fact frequently
2545 passed varying addresses. This does not appear to cause any problems. */
2548 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2552 HOST_WIDE_INT *pstart, *pend;
2555 HOST_WIDE_INT start, end;
2561 if (flag_pic && GET_CODE (base) == PLUS
2562 && XEXP (base, 0) == pic_offset_table_rtx)
2563 base = XEXP (base, 1);
2565 /* Registers with nonvarying addresses usually have constant equivalents;
2566 but the frame pointer register is also possible. */
2567 if (GET_CODE (base) == REG
2569 && REGNO_QTY_VALID_P (REGNO (base))
2570 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2571 && qty_const[REG_QTY (REGNO (base))] != 0)
2572 base = qty_const[REG_QTY (REGNO (base))];
2573 else if (GET_CODE (base) == PLUS
2574 && GET_CODE (XEXP (base, 1)) == CONST_INT
2575 && GET_CODE (XEXP (base, 0)) == REG
2577 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2578 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2579 == GET_MODE (XEXP (base, 0)))
2580 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2582 start = INTVAL (XEXP (base, 1));
2583 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2585 /* This can happen as the result of virtual register instantiation,
2586 if the initial offset is too large to be a valid address. */
2587 else if (GET_CODE (base) == PLUS
2588 && GET_CODE (XEXP (base, 0)) == REG
2589 && GET_CODE (XEXP (base, 1)) == REG
2591 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2592 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2593 == GET_MODE (XEXP (base, 0)))
2594 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2595 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2596 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2597 == GET_MODE (XEXP (base, 1)))
2598 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2600 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2601 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2603 /* One of the two values must be a constant. */
2604 if (GET_CODE (base) != CONST_INT)
2606 if (GET_CODE (tem) != CONST_INT)
2608 start = INTVAL (tem);
2612 start = INTVAL (base);
2617 /* Handle everything that we can find inside an address that has been
2618 viewed as constant. */
2622 /* If no part of this switch does a "continue", the code outside
2623 will exit this loop. */
2625 switch (GET_CODE (base))
2628 /* By definition, operand1 of a LO_SUM is the associated constant
2629 address. Use the associated constant address as the base
2631 base = XEXP (base, 1);
2635 /* Strip off CONST. */
2636 base = XEXP (base, 0);
2640 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2642 start += INTVAL (XEXP (base, 1));
2643 base = XEXP (base, 0);
2649 /* Handle the case of an AND which is the negative of a power of
2650 two. This is used to represent unaligned memory operations. */
2651 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2652 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2654 set_nonvarying_address_components (XEXP (base, 0), size,
2655 pbase, pstart, pend);
2657 /* Assume the worst misalignment. START is affected, but not
2658 END, so compensate but adjusting SIZE. Don't lose any
2659 constant we already had. */
2661 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2662 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2675 if (GET_CODE (base) == CONST_INT)
2677 start += INTVAL (base);
2683 /* Set the return values. */
2689 /* Return 1 if X has a value that can vary even between two
2690 executions of the program. 0 means X can be compared reliably
2691 against certain constants or near-constants. */
2694 cse_rtx_varies_p (x)
2697 /* We need not check for X and the equivalence class being of the same
2698 mode because if X is equivalent to a constant in some mode, it
2699 doesn't vary in any mode. */
2701 if (GET_CODE (x) == REG
2702 && REGNO_QTY_VALID_P (REGNO (x))
2703 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2704 && qty_const[REG_QTY (REGNO (x))] != 0)
2707 if (GET_CODE (x) == PLUS
2708 && GET_CODE (XEXP (x, 1)) == CONST_INT
2709 && GET_CODE (XEXP (x, 0)) == REG
2710 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2711 && (GET_MODE (XEXP (x, 0))
2712 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2713 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2716 /* This can happen as the result of virtual register instantiation, if
2717 the initial constant is too large to be a valid address. This gives
2718 us a three instruction sequence, load large offset into a register,
2719 load fp minus a constant into a register, then a MEM which is the
2720 sum of the two `constant' registers. */
2721 if (GET_CODE (x) == PLUS
2722 && GET_CODE (XEXP (x, 0)) == REG
2723 && GET_CODE (XEXP (x, 1)) == REG
2724 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2725 && (GET_MODE (XEXP (x, 0))
2726 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2727 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2728 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2729 && (GET_MODE (XEXP (x, 1))
2730 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2731 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2734 return rtx_varies_p (x);
2737 /* Canonicalize an expression:
2738 replace each register reference inside it
2739 with the "oldest" equivalent register.
2741 If INSN is non-zero and we are replacing a pseudo with a hard register
2742 or vice versa, validate_change is used to ensure that INSN remains valid
2743 after we make our substitution. The calls are made with IN_GROUP non-zero
2744 so apply_change_group must be called upon the outermost return from this
2745 function (unless INSN is zero). The result of apply_change_group can
2746 generally be discarded since the changes we are making are optional. */
2754 register enum rtx_code code;
2755 register const char *fmt;
2760 code = GET_CODE (x);
2778 /* Never replace a hard reg, because hard regs can appear
2779 in more than one machine mode, and we must preserve the mode
2780 of each occurrence. Also, some hard regs appear in
2781 MEMs that are shared and mustn't be altered. Don't try to
2782 replace any reg that maps to a reg of class NO_REGS. */
2783 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2784 || ! REGNO_QTY_VALID_P (REGNO (x)))
2787 first = qty_first_reg[REG_QTY (REGNO (x))];
2788 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2789 : REGNO_REG_CLASS (first) == NO_REGS ? x
2790 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2797 fmt = GET_RTX_FORMAT (code);
2798 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2804 rtx new = canon_reg (XEXP (x, i), insn);
2807 /* If replacing pseudo with hard reg or vice versa, ensure the
2808 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2809 if (insn != 0 && new != 0
2810 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2811 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2812 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2813 || (insn_code = recog_memoized (insn)) < 0
2814 || insn_data[insn_code].n_dups > 0))
2815 validate_change (insn, &XEXP (x, i), new, 1);
2819 else if (fmt[i] == 'E')
2820 for (j = 0; j < XVECLEN (x, i); j++)
2821 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2827 /* LOC is a location within INSN that is an operand address (the contents of
2828 a MEM). Find the best equivalent address to use that is valid for this
2831 On most CISC machines, complicated address modes are costly, and rtx_cost
2832 is a good approximation for that cost. However, most RISC machines have
2833 only a few (usually only one) memory reference formats. If an address is
2834 valid at all, it is often just as cheap as any other address. Hence, for
2835 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2836 costs of various addresses. For two addresses of equal cost, choose the one
2837 with the highest `rtx_cost' value as that has the potential of eliminating
2838 the most insns. For equal costs, we choose the first in the equivalence
2839 class. Note that we ignore the fact that pseudo registers are cheaper
2840 than hard registers here because we would also prefer the pseudo registers.
2844 find_best_addr (insn, loc)
2848 struct table_elt *elt;
2851 struct table_elt *p;
2852 int found_better = 1;
2854 int save_do_not_record = do_not_record;
2855 int save_hash_arg_in_memory = hash_arg_in_memory;
2856 int save_hash_arg_in_struct = hash_arg_in_struct;
2861 /* Do not try to replace constant addresses or addresses of local and
2862 argument slots. These MEM expressions are made only once and inserted
2863 in many instructions, as well as being used to control symbol table
2864 output. It is not safe to clobber them.
2866 There are some uncommon cases where the address is already in a register
2867 for some reason, but we cannot take advantage of that because we have
2868 no easy way to unshare the MEM. In addition, looking up all stack
2869 addresses is costly. */
2870 if ((GET_CODE (addr) == PLUS
2871 && GET_CODE (XEXP (addr, 0)) == REG
2872 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2873 && (regno = REGNO (XEXP (addr, 0)),
2874 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2875 || regno == ARG_POINTER_REGNUM))
2876 || (GET_CODE (addr) == REG
2877 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2878 || regno == HARD_FRAME_POINTER_REGNUM
2879 || regno == ARG_POINTER_REGNUM))
2880 || GET_CODE (addr) == ADDRESSOF
2881 || CONSTANT_ADDRESS_P (addr))
2884 /* If this address is not simply a register, try to fold it. This will
2885 sometimes simplify the expression. Many simplifications
2886 will not be valid, but some, usually applying the associative rule, will
2887 be valid and produce better code. */
2888 if (GET_CODE (addr) != REG)
2890 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2894 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2895 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2896 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2898 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2900 && validate_change (insn, loc, folded, 0))
2904 /* If this address is not in the hash table, we can't look for equivalences
2905 of the whole address. Also, ignore if volatile. */
2908 hash = HASH (addr, Pmode);
2909 addr_volatile = do_not_record;
2910 do_not_record = save_do_not_record;
2911 hash_arg_in_memory = save_hash_arg_in_memory;
2912 hash_arg_in_struct = save_hash_arg_in_struct;
2917 elt = lookup (addr, hash, Pmode);
2919 #ifndef ADDRESS_COST
2922 int our_cost = elt->cost;
2924 /* Find the lowest cost below ours that works. */
2925 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2926 if (elt->cost < our_cost
2927 && (GET_CODE (elt->exp) == REG
2928 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2929 && validate_change (insn, loc,
2930 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2937 /* We need to find the best (under the criteria documented above) entry
2938 in the class that is valid. We use the `flag' field to indicate
2939 choices that were invalid and iterate until we can't find a better
2940 one that hasn't already been tried. */
2942 for (p = elt->first_same_value; p; p = p->next_same_value)
2945 while (found_better)
2947 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2948 int best_rtx_cost = (elt->cost + 1) >> 1;
2949 struct table_elt *best_elt = elt;
2952 for (p = elt->first_same_value; p; p = p->next_same_value)
2955 if ((GET_CODE (p->exp) == REG
2956 || exp_equiv_p (p->exp, p->exp, 1, 0))
2957 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2958 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2959 && (p->cost + 1) >> 1 > best_rtx_cost)))
2962 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2963 best_rtx_cost = (p->cost + 1) >> 1;
2970 if (validate_change (insn, loc,
2971 canon_reg (copy_rtx (best_elt->exp),
2980 /* If the address is a binary operation with the first operand a register
2981 and the second a constant, do the same as above, but looking for
2982 equivalences of the register. Then try to simplify before checking for
2983 the best address to use. This catches a few cases: First is when we
2984 have REG+const and the register is another REG+const. We can often merge
2985 the constants and eliminate one insn and one register. It may also be
2986 that a machine has a cheap REG+REG+const. Finally, this improves the
2987 code on the Alpha for unaligned byte stores. */
2989 if (flag_expensive_optimizations
2990 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2991 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2992 && GET_CODE (XEXP (*loc, 0)) == REG
2993 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2995 rtx c = XEXP (*loc, 1);
2998 hash = HASH (XEXP (*loc, 0), Pmode);
2999 do_not_record = save_do_not_record;
3000 hash_arg_in_memory = save_hash_arg_in_memory;
3001 hash_arg_in_struct = save_hash_arg_in_struct;
3003 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3007 /* We need to find the best (under the criteria documented above) entry
3008 in the class that is valid. We use the `flag' field to indicate
3009 choices that were invalid and iterate until we can't find a better
3010 one that hasn't already been tried. */
3012 for (p = elt->first_same_value; p; p = p->next_same_value)
3015 while (found_better)
3017 int best_addr_cost = CSE_ADDRESS_COST (*loc);
3018 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3019 struct table_elt *best_elt = elt;
3020 rtx best_rtx = *loc;
3023 /* This is at worst case an O(n^2) algorithm, so limit our search
3024 to the first 32 elements on the list. This avoids trouble
3025 compiling code with very long basic blocks that can easily
3026 call simplify_gen_binary so many times that we run out of
3030 for (p = elt->first_same_value, count = 0;
3032 p = p->next_same_value, count++)
3034 && (GET_CODE (p->exp) == REG
3035 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3037 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3040 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3041 || (CSE_ADDRESS_COST (new) == best_addr_cost
3042 && (COST (new) + 1) >> 1 > best_rtx_cost)))
3045 best_addr_cost = CSE_ADDRESS_COST (new);
3046 best_rtx_cost = (COST (new) + 1) >> 1;
3054 if (validate_change (insn, loc,
3055 canon_reg (copy_rtx (best_rtx),
3066 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3067 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3068 what values are being compared.
3070 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3071 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3072 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3073 compared to produce cc0.
3075 The return value is the comparison operator and is either the code of
3076 A or the code corresponding to the inverse of the comparison. */
3078 static enum rtx_code
3079 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3082 enum machine_mode *pmode1, *pmode2;
3086 arg1 = *parg1, arg2 = *parg2;
3088 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3090 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3092 /* Set non-zero when we find something of interest. */
3094 int reverse_code = 0;
3095 struct table_elt *p = 0;
3097 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3098 On machines with CC0, this is the only case that can occur, since
3099 fold_rtx will return the COMPARE or item being compared with zero
3102 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3105 /* If ARG1 is a comparison operator and CODE is testing for
3106 STORE_FLAG_VALUE, get the inner arguments. */
3108 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3111 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3112 && code == LT && STORE_FLAG_VALUE == -1)
3113 #ifdef FLOAT_STORE_FLAG_VALUE
3114 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3115 && FLOAT_STORE_FLAG_VALUE < 0)
3120 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3121 && code == GE && STORE_FLAG_VALUE == -1)
3122 #ifdef FLOAT_STORE_FLAG_VALUE
3123 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3124 && FLOAT_STORE_FLAG_VALUE < 0)
3127 x = arg1, reverse_code = 1;
3130 /* ??? We could also check for
3132 (ne (and (eq (...) (const_int 1))) (const_int 0))
3134 and related forms, but let's wait until we see them occurring. */
3137 /* Look up ARG1 in the hash table and see if it has an equivalence
3138 that lets us see what is being compared. */
3139 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3141 if (p) p = p->first_same_value;
3143 for (; p; p = p->next_same_value)
3145 enum machine_mode inner_mode = GET_MODE (p->exp);
3147 /* If the entry isn't valid, skip it. */
3148 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3151 if (GET_CODE (p->exp) == COMPARE
3152 /* Another possibility is that this machine has a compare insn
3153 that includes the comparison code. In that case, ARG1 would
3154 be equivalent to a comparison operation that would set ARG1 to
3155 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3156 ORIG_CODE is the actual comparison being done; if it is an EQ,
3157 we must reverse ORIG_CODE. On machine with a negative value
3158 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3161 && GET_MODE_CLASS (inner_mode) == MODE_INT
3162 && (GET_MODE_BITSIZE (inner_mode)
3163 <= HOST_BITS_PER_WIDE_INT)
3164 && (STORE_FLAG_VALUE
3165 & ((HOST_WIDE_INT) 1
3166 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3167 #ifdef FLOAT_STORE_FLAG_VALUE
3169 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3170 && FLOAT_STORE_FLAG_VALUE < 0)
3173 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3178 else if ((code == EQ
3180 && GET_MODE_CLASS (inner_mode) == MODE_INT
3181 && (GET_MODE_BITSIZE (inner_mode)
3182 <= HOST_BITS_PER_WIDE_INT)
3183 && (STORE_FLAG_VALUE
3184 & ((HOST_WIDE_INT) 1
3185 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3186 #ifdef FLOAT_STORE_FLAG_VALUE
3188 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3189 && FLOAT_STORE_FLAG_VALUE < 0)
3192 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3199 /* If this is fp + constant, the equivalent is a better operand since
3200 it may let us predict the value of the comparison. */
3201 else if (NONZERO_BASE_PLUS_P (p->exp))
3208 /* If we didn't find a useful equivalence for ARG1, we are done.
3209 Otherwise, set up for the next iteration. */
3213 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3214 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3215 code = GET_CODE (x);
3218 code = reverse_condition (code);
3221 /* Return our results. Return the modes from before fold_rtx
3222 because fold_rtx might produce const_int, and then it's too late. */
3223 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3224 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3229 /* If X is a nontrivial arithmetic operation on an argument
3230 for which a constant value can be determined, return
3231 the result of operating on that value, as a constant.
3232 Otherwise, return X, possibly with one or more operands
3233 modified by recursive calls to this function.
3235 If X is a register whose contents are known, we do NOT
3236 return those contents here. equiv_constant is called to
3239 INSN is the insn that we may be modifying. If it is 0, make a copy
3240 of X before modifying it. */
3247 register enum rtx_code code;
3248 register enum machine_mode mode;
3249 register const char *fmt;
3255 /* Folded equivalents of first two operands of X. */
3259 /* Constant equivalents of first three operands of X;
3260 0 when no such equivalent is known. */
3265 /* The mode of the first operand of X. We need this for sign and zero
3267 enum machine_mode mode_arg0;
3272 mode = GET_MODE (x);
3273 code = GET_CODE (x);
3282 /* No use simplifying an EXPR_LIST
3283 since they are used only for lists of args
3284 in a function call's REG_EQUAL note. */
3286 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3287 want to (e.g.,) make (addressof (const_int 0)) just because
3288 the location is known to be zero. */
3294 return prev_insn_cc0;
3298 /* If the next insn is a CODE_LABEL followed by a jump table,
3299 PC's value is a LABEL_REF pointing to that label. That
3300 lets us fold switch statements on the Vax. */
3301 if (insn && GET_CODE (insn) == JUMP_INSN)
3303 rtx next = next_nonnote_insn (insn);
3305 if (next && GET_CODE (next) == CODE_LABEL
3306 && NEXT_INSN (next) != 0
3307 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3308 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3309 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3310 return gen_rtx_LABEL_REF (Pmode, next);
3315 /* See if we previously assigned a constant value to this SUBREG. */
3316 if ((new = lookup_as_function (x, CONST_INT)) != 0
3317 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3320 /* If this is a paradoxical SUBREG, we have no idea what value the
3321 extra bits would have. However, if the operand is equivalent
3322 to a SUBREG whose operand is the same as our mode, and all the
3323 modes are within a word, we can just use the inner operand
3324 because these SUBREGs just say how to treat the register.
3326 Similarly if we find an integer constant. */
3328 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3330 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3331 struct table_elt *elt;
3333 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3334 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3335 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3337 for (elt = elt->first_same_value;
3338 elt; elt = elt->next_same_value)
3340 if (CONSTANT_P (elt->exp)
3341 && GET_MODE (elt->exp) == VOIDmode)
3344 if (GET_CODE (elt->exp) == SUBREG
3345 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3346 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3347 return copy_rtx (SUBREG_REG (elt->exp));
3353 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3354 We might be able to if the SUBREG is extracting a single word in an
3355 integral mode or extracting the low part. */
3357 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3358 const_arg0 = equiv_constant (folded_arg0);
3360 folded_arg0 = const_arg0;
3362 if (folded_arg0 != SUBREG_REG (x))
3366 if (GET_MODE_CLASS (mode) == MODE_INT
3367 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3368 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3369 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3370 GET_MODE (SUBREG_REG (x)));
3371 if (new == 0 && subreg_lowpart_p (x))
3372 new = gen_lowpart_if_possible (mode, folded_arg0);
3377 /* If this is a narrowing SUBREG and our operand is a REG, see if
3378 we can find an equivalence for REG that is an arithmetic operation
3379 in a wider mode where both operands are paradoxical SUBREGs
3380 from objects of our result mode. In that case, we couldn't report
3381 an equivalent value for that operation, since we don't know what the
3382 extra bits will be. But we can find an equivalence for this SUBREG
3383 by folding that operation is the narrow mode. This allows us to
3384 fold arithmetic in narrow modes when the machine only supports
3385 word-sized arithmetic.
3387 Also look for a case where we have a SUBREG whose operand is the
3388 same as our result. If both modes are smaller than a word, we
3389 are simply interpreting a register in different modes and we
3390 can use the inner value. */
3392 if (GET_CODE (folded_arg0) == REG
3393 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3394 && subreg_lowpart_p (x))
3396 struct table_elt *elt;
3398 /* We can use HASH here since we know that canon_hash won't be
3400 elt = lookup (folded_arg0,
3401 HASH (folded_arg0, GET_MODE (folded_arg0)),
3402 GET_MODE (folded_arg0));
3405 elt = elt->first_same_value;
3407 for (; elt; elt = elt->next_same_value)
3409 enum rtx_code eltcode = GET_CODE (elt->exp);
3411 /* Just check for unary and binary operations. */
3412 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3413 && GET_CODE (elt->exp) != SIGN_EXTEND
3414 && GET_CODE (elt->exp) != ZERO_EXTEND
3415 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3416 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3418 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3420 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3421 op0 = fold_rtx (op0, NULL_RTX);
3423 op0 = equiv_constant (op0);
3425 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3428 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3429 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3430 && eltcode != DIV && eltcode != MOD
3431 && eltcode != UDIV && eltcode != UMOD
3432 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3433 && eltcode != ROTATE && eltcode != ROTATERT
3434 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3435 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3437 || CONSTANT_P (XEXP (elt->exp, 0)))
3438 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3439 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3441 || CONSTANT_P (XEXP (elt->exp, 1))))
3443 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3444 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3446 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3447 op0 = fold_rtx (op0, NULL_RTX);
3450 op0 = equiv_constant (op0);
3452 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3453 op1 = fold_rtx (op1, NULL_RTX);
3456 op1 = equiv_constant (op1);
3458 /* If we are looking for the low SImode part of
3459 (ashift:DI c (const_int 32)), it doesn't work
3460 to compute that in SImode, because a 32-bit shift
3461 in SImode is unpredictable. We know the value is 0. */
3463 && GET_CODE (elt->exp) == ASHIFT
3464 && GET_CODE (op1) == CONST_INT
3465 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3467 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3469 /* If the count fits in the inner mode's width,
3470 but exceeds the outer mode's width,
3471 the value will get truncated to 0
3475 /* If the count exceeds even the inner mode's width,
3476 don't fold this expression. */
3479 else if (op0 && op1)
3480 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3484 else if (GET_CODE (elt->exp) == SUBREG
3485 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3486 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3488 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3489 new = copy_rtx (SUBREG_REG (elt->exp));
3500 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3501 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3502 new = lookup_as_function (XEXP (x, 0), code);
3504 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3508 /* If we are not actually processing an insn, don't try to find the
3509 best address. Not only don't we care, but we could modify the
3510 MEM in an invalid way since we have no insn to validate against. */
3512 find_best_addr (insn, &XEXP (x, 0));
3515 /* Even if we don't fold in the insn itself,
3516 we can safely do so here, in hopes of getting a constant. */
3517 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3519 HOST_WIDE_INT offset = 0;
3521 if (GET_CODE (addr) == REG
3522 && REGNO_QTY_VALID_P (REGNO (addr))
3523 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
3524 && qty_const[REG_QTY (REGNO (addr))] != 0)
3525 addr = qty_const[REG_QTY (REGNO (addr))];
3527 /* If address is constant, split it into a base and integer offset. */
3528 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3530 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3531 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3533 base = XEXP (XEXP (addr, 0), 0);
3534 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3536 else if (GET_CODE (addr) == LO_SUM
3537 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3538 base = XEXP (addr, 1);
3539 else if (GET_CODE (addr) == ADDRESSOF)
3540 return change_address (x, VOIDmode, addr);
3542 /* If this is a constant pool reference, we can fold it into its
3543 constant to allow better value tracking. */
3544 if (base && GET_CODE (base) == SYMBOL_REF
3545 && CONSTANT_POOL_ADDRESS_P (base))
3547 rtx constant = get_pool_constant (base);
3548 enum machine_mode const_mode = get_pool_mode (base);
3551 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3552 constant_pool_entries_cost = COST (constant);
3554 /* If we are loading the full constant, we have an equivalence. */
3555 if (offset == 0 && mode == const_mode)
3558 /* If this actually isn't a constant (weird!), we can't do
3559 anything. Otherwise, handle the two most common cases:
3560 extracting a word from a multi-word constant, and extracting
3561 the low-order bits. Other cases don't seem common enough to
3563 if (! CONSTANT_P (constant))
3566 if (GET_MODE_CLASS (mode) == MODE_INT
3567 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3568 && offset % UNITS_PER_WORD == 0
3569 && (new = operand_subword (constant,
3570 offset / UNITS_PER_WORD,
3571 0, const_mode)) != 0)
3574 if (((BYTES_BIG_ENDIAN
3575 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3576 || (! BYTES_BIG_ENDIAN && offset == 0))
3577 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3581 /* If this is a reference to a label at a known position in a jump
3582 table, we also know its value. */
3583 if (base && GET_CODE (base) == LABEL_REF)
3585 rtx label = XEXP (base, 0);
3586 rtx table_insn = NEXT_INSN (label);
3588 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3589 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3591 rtx table = PATTERN (table_insn);
3594 && (offset / GET_MODE_SIZE (GET_MODE (table))
3595 < XVECLEN (table, 0)))
3596 return XVECEXP (table, 0,
3597 offset / GET_MODE_SIZE (GET_MODE (table)));
3599 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3600 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3602 rtx table = PATTERN (table_insn);
3605 && (offset / GET_MODE_SIZE (GET_MODE (table))
3606 < XVECLEN (table, 1)))
3608 offset /= GET_MODE_SIZE (GET_MODE (table));
3609 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3612 if (GET_MODE (table) != Pmode)
3613 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3615 /* Indicate this is a constant. This isn't a
3616 valid form of CONST, but it will only be used
3617 to fold the next insns and then discarded, so
3620 Note this expression must be explicitly discarded,
3621 by cse_insn, else it may end up in a REG_EQUAL note
3622 and "escape" to cause problems elsewhere. */
3623 return gen_rtx_CONST (GET_MODE (new), new);
3632 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3633 validate_change (insn, &XVECEXP (x, 3, i),
3634 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3644 mode_arg0 = VOIDmode;
3646 /* Try folding our operands.
3647 Then see which ones have constant values known. */
3649 fmt = GET_RTX_FORMAT (code);
3650 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3653 rtx arg = XEXP (x, i);
3654 rtx folded_arg = arg, const_arg = 0;
3655 enum machine_mode mode_arg = GET_MODE (arg);
3656 rtx cheap_arg, expensive_arg;
3657 rtx replacements[2];
3660 /* Most arguments are cheap, so handle them specially. */
3661 switch (GET_CODE (arg))
3664 /* This is the same as calling equiv_constant; it is duplicated
3666 if (REGNO_QTY_VALID_P (REGNO (arg))
3667 && qty_const[REG_QTY (REGNO (arg))] != 0
3668 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
3669 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
3671 = gen_lowpart_if_possible (GET_MODE (arg),
3672 qty_const[REG_QTY (REGNO (arg))]);
3685 folded_arg = prev_insn_cc0;
3686 mode_arg = prev_insn_cc0_mode;
3687 const_arg = equiv_constant (folded_arg);
3692 folded_arg = fold_rtx (arg, insn);
3693 const_arg = equiv_constant (folded_arg);
3696 /* For the first three operands, see if the operand
3697 is constant or equivalent to a constant. */
3701 folded_arg0 = folded_arg;
3702 const_arg0 = const_arg;
3703 mode_arg0 = mode_arg;
3706 folded_arg1 = folded_arg;
3707 const_arg1 = const_arg;
3710 const_arg2 = const_arg;
3714 /* Pick the least expensive of the folded argument and an
3715 equivalent constant argument. */
3716 if (const_arg == 0 || const_arg == folded_arg
3717 || COST (const_arg) > COST (folded_arg))
3718 cheap_arg = folded_arg, expensive_arg = const_arg;
3720 cheap_arg = const_arg, expensive_arg = folded_arg;
3722 /* Try to replace the operand with the cheapest of the two
3723 possibilities. If it doesn't work and this is either of the first
3724 two operands of a commutative operation, try swapping them.
3725 If THAT fails, try the more expensive, provided it is cheaper
3726 than what is already there. */
3728 if (cheap_arg == XEXP (x, i))
3731 if (insn == 0 && ! copied)
3737 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3739 j < 2 && replacements[j]
3740 && COST (replacements[j]) < COST (XEXP (x, i));
3743 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3746 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3748 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3749 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3751 if (apply_change_group ())
3753 /* Swap them back to be invalid so that this loop can
3754 continue and flag them to be swapped back later. */
3757 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3769 /* Don't try to fold inside of a vector of expressions.
3770 Doing nothing is harmless. */
3774 /* If a commutative operation, place a constant integer as the second
3775 operand unless the first operand is also a constant integer. Otherwise,
3776 place any constant second unless the first operand is also a constant. */
3778 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3780 if (must_swap || (const_arg0
3782 || (GET_CODE (const_arg0) == CONST_INT
3783 && GET_CODE (const_arg1) != CONST_INT))))
3785 register rtx tem = XEXP (x, 0);
3787 if (insn == 0 && ! copied)
3793 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3794 validate_change (insn, &XEXP (x, 1), tem, 1);
3795 if (apply_change_group ())
3797 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3798 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3803 /* If X is an arithmetic operation, see if we can simplify it. */
3805 switch (GET_RTX_CLASS (code))
3811 /* We can't simplify extension ops unless we know the
3813 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3814 && mode_arg0 == VOIDmode)
3817 /* If we had a CONST, strip it off and put it back later if we
3819 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3820 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3822 new = simplify_unary_operation (code, mode,
3823 const_arg0 ? const_arg0 : folded_arg0,
3825 if (new != 0 && is_const)
3826 new = gen_rtx_CONST (mode, new);
3831 /* See what items are actually being compared and set FOLDED_ARG[01]
3832 to those values and CODE to the actual comparison code. If any are
3833 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3834 do anything if both operands are already known to be constant. */
3836 if (const_arg0 == 0 || const_arg1 == 0)
3838 struct table_elt *p0, *p1;
3839 rtx true = const_true_rtx, false = const0_rtx;
3840 enum machine_mode mode_arg1;
3842 #ifdef FLOAT_STORE_FLAG_VALUE
3843 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3845 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3847 false = CONST0_RTX (mode);
3851 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3852 &mode_arg0, &mode_arg1);
3853 const_arg0 = equiv_constant (folded_arg0);
3854 const_arg1 = equiv_constant (folded_arg1);
3856 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3857 what kinds of things are being compared, so we can't do
3858 anything with this comparison. */
3860 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3863 /* If we do not now have two constants being compared, see
3864 if we can nevertheless deduce some things about the
3866 if (const_arg0 == 0 || const_arg1 == 0)
3868 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3869 non-explicit constant? These aren't zero, but we
3870 don't know their sign. */
3871 if (const_arg1 == const0_rtx
3872 && (NONZERO_BASE_PLUS_P (folded_arg0)
3873 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3875 || GET_CODE (folded_arg0) == SYMBOL_REF
3877 || GET_CODE (folded_arg0) == LABEL_REF
3878 || GET_CODE (folded_arg0) == CONST))
3882 else if (code == NE)
3886 /* See if the two operands are the same. We don't do this
3887 for IEEE floating-point since we can't assume x == x
3888 since x might be a NaN. */
3890 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3891 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3892 && (folded_arg0 == folded_arg1
3893 || (GET_CODE (folded_arg0) == REG
3894 && GET_CODE (folded_arg1) == REG
3895 && (REG_QTY (REGNO (folded_arg0))
3896 == REG_QTY (REGNO (folded_arg1))))
3897 || ((p0 = lookup (folded_arg0,
3898 (safe_hash (folded_arg0, mode_arg0)
3899 % NBUCKETS), mode_arg0))
3900 && (p1 = lookup (folded_arg1,
3901 (safe_hash (folded_arg1, mode_arg0)
3902 % NBUCKETS), mode_arg0))
3903 && p0->first_same_value == p1->first_same_value)))
3904 return ((code == EQ || code == LE || code == GE
3905 || code == LEU || code == GEU)
3908 /* If FOLDED_ARG0 is a register, see if the comparison we are
3909 doing now is either the same as we did before or the reverse
3910 (we only check the reverse if not floating-point). */
3911 else if (GET_CODE (folded_arg0) == REG)
3913 int qty = REG_QTY (REGNO (folded_arg0));
3915 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
3916 && (comparison_dominates_p (qty_comparison_code[qty], code)
3917 || (comparison_dominates_p (qty_comparison_code[qty],
3918 reverse_condition (code))
3919 && ! FLOAT_MODE_P (mode_arg0)))
3920 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
3922 && rtx_equal_p (qty_comparison_const[qty],
3924 || (GET_CODE (folded_arg1) == REG
3925 && (REG_QTY (REGNO (folded_arg1))
3926 == qty_comparison_qty[qty]))))
3927 return (comparison_dominates_p (qty_comparison_code[qty],
3934 /* If we are comparing against zero, see if the first operand is
3935 equivalent to an IOR with a constant. If so, we may be able to
3936 determine the result of this comparison. */
3938 if (const_arg1 == const0_rtx)
3940 rtx y = lookup_as_function (folded_arg0, IOR);
3944 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3945 && GET_CODE (inner_const) == CONST_INT
3946 && INTVAL (inner_const) != 0)
3948 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3949 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3950 && (INTVAL (inner_const)
3951 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3952 rtx true = const_true_rtx, false = const0_rtx;
3954 #ifdef FLOAT_STORE_FLAG_VALUE
3955 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3957 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3959 false = CONST0_RTX (mode);
3983 new = simplify_relational_operation (code, mode_arg0,
3984 const_arg0 ? const_arg0 : folded_arg0,
3985 const_arg1 ? const_arg1 : folded_arg1);
3986 #ifdef FLOAT_STORE_FLAG_VALUE
3987 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3988 new = ((new == const0_rtx) ? CONST0_RTX (mode)
3989 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
3998 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3999 with that LABEL_REF as its second operand. If so, the result is
4000 the first operand of that MINUS. This handles switches with an
4001 ADDR_DIFF_VEC table. */
4002 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4005 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4006 : lookup_as_function (folded_arg0, MINUS);
4008 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4009 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4012 /* Now try for a CONST of a MINUS like the above. */
4013 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4014 : lookup_as_function (folded_arg0, CONST))) != 0
4015 && GET_CODE (XEXP (y, 0)) == MINUS
4016 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4017 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
4018 return XEXP (XEXP (y, 0), 0);
4021 /* Likewise if the operands are in the other order. */
4022 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4025 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4026 : lookup_as_function (folded_arg1, MINUS);
4028 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4029 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4032 /* Now try for a CONST of a MINUS like the above. */
4033 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4034 : lookup_as_function (folded_arg1, CONST))) != 0
4035 && GET_CODE (XEXP (y, 0)) == MINUS
4036 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4037 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
4038 return XEXP (XEXP (y, 0), 0);
4041 /* If second operand is a register equivalent to a negative
4042 CONST_INT, see if we can find a register equivalent to the
4043 positive constant. Make a MINUS if so. Don't do this for
4044 a non-negative constant since we might then alternate between
4045 chosing positive and negative constants. Having the positive
4046 constant previously-used is the more common case. Be sure
4047 the resulting constant is non-negative; if const_arg1 were
4048 the smallest negative number this would overflow: depending
4049 on the mode, this would either just be the same value (and
4050 hence not save anything) or be incorrect. */
4051 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4052 && INTVAL (const_arg1) < 0
4053 /* This used to test
4055 - INTVAL (const_arg1) >= 0
4057 But The Sun V5.0 compilers mis-compiled that test. So
4058 instead we test for the problematic value in a more direct
4059 manner and hope the Sun compilers get it correct. */
4060 && INTVAL (const_arg1) !=
4061 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4062 && GET_CODE (folded_arg1) == REG)
4064 rtx new_const = GEN_INT (- INTVAL (const_arg1));
4066 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
4070 for (p = p->first_same_value; p; p = p->next_same_value)
4071 if (GET_CODE (p->exp) == REG)
4072 return simplify_gen_binary (MINUS, mode, folded_arg0,
4073 canon_reg (p->exp, NULL_RTX));
4078 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4079 If so, produce (PLUS Z C2-C). */
4080 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4082 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4083 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4084 return fold_rtx (plus_constant (copy_rtx (y),
4085 -INTVAL (const_arg1)),
4089 /* ... fall through ... */
4092 case SMIN: case SMAX: case UMIN: case UMAX:
4093 case IOR: case AND: case XOR:
4094 case MULT: case DIV: case UDIV:
4095 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4096 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4097 is known to be of similar form, we may be able to replace the
4098 operation with a combined operation. This may eliminate the
4099 intermediate operation if every use is simplified in this way.
4100 Note that the similar optimization done by combine.c only works
4101 if the intermediate operation's result has only one reference. */
4103 if (GET_CODE (folded_arg0) == REG
4104 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4107 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4108 rtx y = lookup_as_function (folded_arg0, code);
4110 enum rtx_code associate_code;
4114 || 0 == (inner_const
4115 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4116 || GET_CODE (inner_const) != CONST_INT
4117 /* If we have compiled a statement like
4118 "if (x == (x & mask1))", and now are looking at
4119 "x & mask2", we will have a case where the first operand
4120 of Y is the same as our first operand. Unless we detect
4121 this case, an infinite loop will result. */
4122 || XEXP (y, 0) == folded_arg0)
4125 /* Don't associate these operations if they are a PLUS with the
4126 same constant and it is a power of two. These might be doable
4127 with a pre- or post-increment. Similarly for two subtracts of
4128 identical powers of two with post decrement. */
4130 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4131 && ((HAVE_PRE_INCREMENT
4132 && exact_log2 (INTVAL (const_arg1)) >= 0)
4133 || (HAVE_POST_INCREMENT
4134 && exact_log2 (INTVAL (const_arg1)) >= 0)
4135 || (HAVE_PRE_DECREMENT
4136 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4137 || (HAVE_POST_DECREMENT
4138 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4141 /* Compute the code used to compose the constants. For example,
4142 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4145 = (code == MULT || code == DIV || code == UDIV ? MULT
4146 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4148 new_const = simplify_binary_operation (associate_code, mode,
4149 const_arg1, inner_const);
4154 /* If we are associating shift operations, don't let this
4155 produce a shift of the size of the object or larger.
4156 This could occur when we follow a sign-extend by a right
4157 shift on a machine that does a sign-extend as a pair
4160 if (is_shift && GET_CODE (new_const) == CONST_INT
4161 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4163 /* As an exception, we can turn an ASHIFTRT of this
4164 form into a shift of the number of bits - 1. */
4165 if (code == ASHIFTRT)
4166 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4171 y = copy_rtx (XEXP (y, 0));
4173 /* If Y contains our first operand (the most common way this
4174 can happen is if Y is a MEM), we would do into an infinite
4175 loop if we tried to fold it. So don't in that case. */
4177 if (! reg_mentioned_p (folded_arg0, y))
4178 y = fold_rtx (y, insn);
4180 return simplify_gen_binary (code, mode, y, new_const);
4188 new = simplify_binary_operation (code, mode,
4189 const_arg0 ? const_arg0 : folded_arg0,
4190 const_arg1 ? const_arg1 : folded_arg1);
4194 /* (lo_sum (high X) X) is simply X. */
4195 if (code == LO_SUM && const_arg0 != 0
4196 && GET_CODE (const_arg0) == HIGH
4197 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4203 new = simplify_ternary_operation (code, mode, mode_arg0,
4204 const_arg0 ? const_arg0 : folded_arg0,
4205 const_arg1 ? const_arg1 : folded_arg1,
4206 const_arg2 ? const_arg2 : XEXP (x, 2));
4210 /* Always eliminate CONSTANT_P_RTX at this stage. */
4211 if (code == CONSTANT_P_RTX)
4212 return (const_arg0 ? const1_rtx : const0_rtx);
4216 return new ? new : x;
4219 /* Return a constant value currently equivalent to X.
4220 Return 0 if we don't know one. */
4226 if (GET_CODE (x) == REG
4227 && REGNO_QTY_VALID_P (REGNO (x))
4228 && qty_const[REG_QTY (REGNO (x))])
4229 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
4231 if (x == 0 || CONSTANT_P (x))
4234 /* If X is a MEM, try to fold it outside the context of any insn to see if
4235 it might be equivalent to a constant. That handles the case where it
4236 is a constant-pool reference. Then try to look it up in the hash table
4237 in case it is something whose value we have seen before. */
4239 if (GET_CODE (x) == MEM)
4241 struct table_elt *elt;
4243 x = fold_rtx (x, NULL_RTX);
4247 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
4251 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4252 if (elt->is_const && CONSTANT_P (elt->exp))
4259 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4260 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4261 least-significant part of X.
4262 MODE specifies how big a part of X to return.
4264 If the requested operation cannot be done, 0 is returned.
4266 This is similar to gen_lowpart in emit-rtl.c. */
4269 gen_lowpart_if_possible (mode, x)
4270 enum machine_mode mode;
4273 rtx result = gen_lowpart_common (mode, x);
4277 else if (GET_CODE (x) == MEM)
4279 /* This is the only other case we handle. */
4280 register int offset = 0;
4283 if (WORDS_BIG_ENDIAN)
4284 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4285 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4286 if (BYTES_BIG_ENDIAN)
4287 /* Adjust the address so that the address-after-the-data is
4289 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4290 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4291 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4292 if (! memory_address_p (mode, XEXP (new, 0)))
4294 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4295 MEM_COPY_ATTRIBUTES (new, x);
4302 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4303 branch. It will be zero if not.
4305 In certain cases, this can cause us to add an equivalence. For example,
4306 if we are following the taken case of
4308 we can add the fact that `i' and '2' are now equivalent.
4310 In any case, we can record that this comparison was passed. If the same
4311 comparison is seen later, we will know its value. */
4314 record_jump_equiv (insn, taken)
4318 int cond_known_true;
4320 enum machine_mode mode, mode0, mode1;
4321 int reversed_nonequality = 0;
4324 /* Ensure this is the right kind of insn. */
4325 if (! condjump_p (insn) || simplejump_p (insn))
4328 /* See if this jump condition is known true or false. */
4330 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4332 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4334 /* Get the type of comparison being done and the operands being compared.
4335 If we had to reverse a non-equality condition, record that fact so we
4336 know that it isn't valid for floating-point. */
4337 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4338 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4339 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4341 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4342 if (! cond_known_true)
4344 reversed_nonequality = (code != EQ && code != NE);
4345 code = reverse_condition (code);
4348 /* The mode is the mode of the non-constant. */
4350 if (mode1 != VOIDmode)
4353 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4356 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4357 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4358 Make any useful entries we can with that information. Called from
4359 above function and called recursively. */
4362 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4364 enum machine_mode mode;
4366 int reversed_nonequality;
4368 unsigned op0_hash, op1_hash;
4369 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
4370 struct table_elt *op0_elt, *op1_elt;
4372 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4373 we know that they are also equal in the smaller mode (this is also
4374 true for all smaller modes whether or not there is a SUBREG, but
4375 is not worth testing for with no SUBREG). */
4377 /* Note that GET_MODE (op0) may not equal MODE. */
4378 if (code == EQ && GET_CODE (op0) == SUBREG
4379 && (GET_MODE_SIZE (GET_MODE (op0))
4380 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4382 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4383 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4385 record_jump_cond (code, mode, SUBREG_REG (op0),
4386 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4387 reversed_nonequality);
4390 if (code == EQ && GET_CODE (op1) == SUBREG
4391 && (GET_MODE_SIZE (GET_MODE (op1))
4392 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4394 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4395 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4397 record_jump_cond (code, mode, SUBREG_REG (op1),
4398 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4399 reversed_nonequality);
4402 /* Similarly, if this is an NE comparison, and either is a SUBREG
4403 making a smaller mode, we know the whole thing is also NE. */
4405 /* Note that GET_MODE (op0) may not equal MODE;
4406 if we test MODE instead, we can get an infinite recursion
4407 alternating between two modes each wider than MODE. */
4409 if (code == NE && GET_CODE (op0) == SUBREG
4410 && subreg_lowpart_p (op0)
4411 && (GET_MODE_SIZE (GET_MODE (op0))
4412 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4414 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4415 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4417 record_jump_cond (code, mode, SUBREG_REG (op0),
4418 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4419 reversed_nonequality);
4422 if (code == NE && GET_CODE (op1) == SUBREG
4423 && subreg_lowpart_p (op1)
4424 && (GET_MODE_SIZE (GET_MODE (op1))
4425 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4427 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4428 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4430 record_jump_cond (code, mode, SUBREG_REG (op1),
4431 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4432 reversed_nonequality);
4435 /* Hash both operands. */
4438 hash_arg_in_memory = 0;
4439 hash_arg_in_struct = 0;
4440 op0_hash = HASH (op0, mode);
4441 op0_in_memory = hash_arg_in_memory;
4442 op0_in_struct = hash_arg_in_struct;
4448 hash_arg_in_memory = 0;
4449 hash_arg_in_struct = 0;
4450 op1_hash = HASH (op1, mode);
4451 op1_in_memory = hash_arg_in_memory;
4452 op1_in_struct = hash_arg_in_struct;
4457 /* Look up both operands. */
4458 op0_elt = lookup (op0, op0_hash, mode);
4459 op1_elt = lookup (op1, op1_hash, mode);
4461 /* If both operands are already equivalent or if they are not in the
4462 table but are identical, do nothing. */
4463 if ((op0_elt != 0 && op1_elt != 0
4464 && op0_elt->first_same_value == op1_elt->first_same_value)
4465 || op0 == op1 || rtx_equal_p (op0, op1))
4468 /* If we aren't setting two things equal all we can do is save this
4469 comparison. Similarly if this is floating-point. In the latter
4470 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4471 If we record the equality, we might inadvertently delete code
4472 whose intent was to change -0 to +0. */
4474 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4476 /* If we reversed a floating-point comparison, if OP0 is not a
4477 register, or if OP1 is neither a register or constant, we can't
4480 if (GET_CODE (op1) != REG)
4481 op1 = equiv_constant (op1);
4483 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4484 || GET_CODE (op0) != REG || op1 == 0)
4487 /* Put OP0 in the hash table if it isn't already. This gives it a
4488 new quantity number. */
4491 if (insert_regs (op0, NULL_PTR, 0))
4493 rehash_using_reg (op0);
4494 op0_hash = HASH (op0, mode);
4496 /* If OP0 is contained in OP1, this changes its hash code
4497 as well. Faster to rehash than to check, except
4498 for the simple case of a constant. */
4499 if (! CONSTANT_P (op1))
4500 op1_hash = HASH (op1,mode);
4503 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4504 op0_elt->in_memory = op0_in_memory;
4505 op0_elt->in_struct = op0_in_struct;
4508 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
4509 if (GET_CODE (op1) == REG)
4511 /* Look it up again--in case op0 and op1 are the same. */
4512 op1_elt = lookup (op1, op1_hash, mode);
4514 /* Put OP1 in the hash table so it gets a new quantity number. */
4517 if (insert_regs (op1, NULL_PTR, 0))
4519 rehash_using_reg (op1);
4520 op1_hash = HASH (op1, mode);
4523 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4524 op1_elt->in_memory = op1_in_memory;
4525 op1_elt->in_struct = op1_in_struct;
4528 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
4529 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
4533 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
4534 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
4540 /* If either side is still missing an equivalence, make it now,
4541 then merge the equivalences. */
4545 if (insert_regs (op0, NULL_PTR, 0))
4547 rehash_using_reg (op0);
4548 op0_hash = HASH (op0, mode);
4551 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4552 op0_elt->in_memory = op0_in_memory;
4553 op0_elt->in_struct = op0_in_struct;
4558 if (insert_regs (op1, NULL_PTR, 0))
4560 rehash_using_reg (op1);
4561 op1_hash = HASH (op1, mode);
4564 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4565 op1_elt->in_memory = op1_in_memory;
4566 op1_elt->in_struct = op1_in_struct;
4569 merge_equiv_classes (op0_elt, op1_elt);
4570 last_jump_equiv_class = op0_elt;
4573 /* CSE processing for one instruction.
4574 First simplify sources and addresses of all assignments
4575 in the instruction, using previously-computed equivalents values.
4576 Then install the new sources and destinations in the table
4577 of available values.
4579 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4580 the insn. It means that INSN is inside libcall block. In this
4581 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4583 /* Data on one SET contained in the instruction. */
4587 /* The SET rtx itself. */
4589 /* The SET_SRC of the rtx (the original value, if it is changing). */
4591 /* The hash-table element for the SET_SRC of the SET. */
4592 struct table_elt *src_elt;
4593 /* Hash value for the SET_SRC. */
4595 /* Hash value for the SET_DEST. */
4597 /* The SET_DEST, with SUBREG, etc., stripped. */
4599 /* Nonzero if the SET_SRC is in memory. */
4601 /* Nonzero if the SET_SRC is in a structure. */
4603 /* Nonzero if the SET_SRC contains something
4604 whose value cannot be predicted and understood. */
4606 /* Original machine mode, in case it becomes a CONST_INT. */
4607 enum machine_mode mode;
4608 /* A constant equivalent for SET_SRC, if any. */
4610 /* Hash value of constant equivalent for SET_SRC. */
4611 unsigned src_const_hash;
4612 /* Table entry for constant equivalent for SET_SRC, if any. */
4613 struct table_elt *src_const_elt;
4617 cse_insn (insn, libcall_insn)
4621 register rtx x = PATTERN (insn);
4624 register int n_sets = 0;
4627 /* Records what this insn does to set CC0. */
4628 rtx this_insn_cc0 = 0;
4629 enum machine_mode this_insn_cc0_mode = VOIDmode;
4633 struct table_elt *src_eqv_elt = 0;
4634 int src_eqv_volatile = 0;
4635 int src_eqv_in_memory = 0;
4636 int src_eqv_in_struct = 0;
4637 unsigned src_eqv_hash = 0;
4639 struct set *sets = NULL_PTR;
4643 /* Find all the SETs and CLOBBERs in this instruction.
4644 Record all the SETs in the array `set' and count them.
4645 Also determine whether there is a CLOBBER that invalidates
4646 all memory references, or all references at varying addresses. */
4648 if (GET_CODE (insn) == CALL_INSN)
4650 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4651 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4652 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4655 if (GET_CODE (x) == SET)
4657 sets = (struct set *) alloca (sizeof (struct set));
4660 /* Ignore SETs that are unconditional jumps.
4661 They never need cse processing, so this does not hurt.
4662 The reason is not efficiency but rather
4663 so that we can test at the end for instructions
4664 that have been simplified to unconditional jumps
4665 and not be misled by unchanged instructions
4666 that were unconditional jumps to begin with. */
4667 if (SET_DEST (x) == pc_rtx
4668 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4671 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4672 The hard function value register is used only once, to copy to
4673 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4674 Ensure we invalidate the destination register. On the 80386 no
4675 other code would invalidate it since it is a fixed_reg.
4676 We need not check the return of apply_change_group; see canon_reg. */
4678 else if (GET_CODE (SET_SRC (x)) == CALL)
4680 canon_reg (SET_SRC (x), insn);
4681 apply_change_group ();
4682 fold_rtx (SET_SRC (x), insn);
4683 invalidate (SET_DEST (x), VOIDmode);
4688 else if (GET_CODE (x) == PARALLEL)
4690 register int lim = XVECLEN (x, 0);
4692 sets = (struct set *) alloca (lim * sizeof (struct set));
4694 /* Find all regs explicitly clobbered in this insn,
4695 and ensure they are not replaced with any other regs
4696 elsewhere in this insn.
4697 When a reg that is clobbered is also used for input,
4698 we should presume that that is for a reason,
4699 and we should not substitute some other register
4700 which is not supposed to be clobbered.
4701 Therefore, this loop cannot be merged into the one below
4702 because a CALL may precede a CLOBBER and refer to the
4703 value clobbered. We must not let a canonicalization do
4704 anything in that case. */
4705 for (i = 0; i < lim; i++)
4707 register rtx y = XVECEXP (x, 0, i);
4708 if (GET_CODE (y) == CLOBBER)
4710 rtx clobbered = XEXP (y, 0);
4712 if (GET_CODE (clobbered) == REG
4713 || GET_CODE (clobbered) == SUBREG)
4714 invalidate (clobbered, VOIDmode);
4715 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4716 || GET_CODE (clobbered) == ZERO_EXTRACT)
4717 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4721 for (i = 0; i < lim; i++)
4723 register rtx y = XVECEXP (x, 0, i);
4724 if (GET_CODE (y) == SET)
4726 /* As above, we ignore unconditional jumps and call-insns and
4727 ignore the result of apply_change_group. */
4728 if (GET_CODE (SET_SRC (y)) == CALL)
4730 canon_reg (SET_SRC (y), insn);
4731 apply_change_group ();
4732 fold_rtx (SET_SRC (y), insn);
4733 invalidate (SET_DEST (y), VOIDmode);
4735 else if (SET_DEST (y) == pc_rtx
4736 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4739 sets[n_sets++].rtl = y;
4741 else if (GET_CODE (y) == CLOBBER)
4743 /* If we clobber memory, canon the address.
4744 This does nothing when a register is clobbered
4745 because we have already invalidated the reg. */
4746 if (GET_CODE (XEXP (y, 0)) == MEM)
4747 canon_reg (XEXP (y, 0), NULL_RTX);
4749 else if (GET_CODE (y) == USE
4750 && ! (GET_CODE (XEXP (y, 0)) == REG
4751 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4752 canon_reg (y, NULL_RTX);
4753 else if (GET_CODE (y) == CALL)
4755 /* The result of apply_change_group can be ignored; see
4757 canon_reg (y, insn);
4758 apply_change_group ();
4763 else if (GET_CODE (x) == CLOBBER)
4765 if (GET_CODE (XEXP (x, 0)) == MEM)
4766 canon_reg (XEXP (x, 0), NULL_RTX);
4769 /* Canonicalize a USE of a pseudo register or memory location. */
4770 else if (GET_CODE (x) == USE
4771 && ! (GET_CODE (XEXP (x, 0)) == REG
4772 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4773 canon_reg (XEXP (x, 0), NULL_RTX);
4774 else if (GET_CODE (x) == CALL)
4776 /* The result of apply_change_group can be ignored; see canon_reg. */
4777 canon_reg (x, insn);
4778 apply_change_group ();
4782 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4783 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4784 is handled specially for this case, and if it isn't set, then there will
4785 be no equivalence for the destination. */
4786 if (n_sets == 1 && REG_NOTES (insn) != 0
4787 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4788 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4789 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4790 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4792 /* Canonicalize sources and addresses of destinations.
4793 We do this in a separate pass to avoid problems when a MATCH_DUP is
4794 present in the insn pattern. In that case, we want to ensure that
4795 we don't break the duplicate nature of the pattern. So we will replace
4796 both operands at the same time. Otherwise, we would fail to find an
4797 equivalent substitution in the loop calling validate_change below.
4799 We used to suppress canonicalization of DEST if it appears in SRC,
4800 but we don't do this any more. */
4802 for (i = 0; i < n_sets; i++)
4804 rtx dest = SET_DEST (sets[i].rtl);
4805 rtx src = SET_SRC (sets[i].rtl);
4806 rtx new = canon_reg (src, insn);
4809 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4810 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4811 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4812 || (insn_code = recog_memoized (insn)) < 0
4813 || insn_data[insn_code].n_dups > 0)
4814 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4816 SET_SRC (sets[i].rtl) = new;
4818 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4820 validate_change (insn, &XEXP (dest, 1),
4821 canon_reg (XEXP (dest, 1), insn), 1);
4822 validate_change (insn, &XEXP (dest, 2),
4823 canon_reg (XEXP (dest, 2), insn), 1);
4826 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4827 || GET_CODE (dest) == ZERO_EXTRACT
4828 || GET_CODE (dest) == SIGN_EXTRACT)
4829 dest = XEXP (dest, 0);
4831 if (GET_CODE (dest) == MEM)
4832 canon_reg (dest, insn);
4835 /* Now that we have done all the replacements, we can apply the change
4836 group and see if they all work. Note that this will cause some
4837 canonicalizations that would have worked individually not to be applied
4838 because some other canonicalization didn't work, but this should not
4841 The result of apply_change_group can be ignored; see canon_reg. */
4843 apply_change_group ();
4845 /* Set sets[i].src_elt to the class each source belongs to.
4846 Detect assignments from or to volatile things
4847 and set set[i] to zero so they will be ignored
4848 in the rest of this function.
4850 Nothing in this loop changes the hash table or the register chains. */
4852 for (i = 0; i < n_sets; i++)
4854 register rtx src, dest;
4855 register rtx src_folded;
4856 register struct table_elt *elt = 0, *p;
4857 enum machine_mode mode;
4860 rtx src_related = 0;
4861 struct table_elt *src_const_elt = 0;
4862 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4863 int src_related_cost = 10000, src_elt_cost = 10000;
4864 /* Set non-zero if we need to call force_const_mem on with the
4865 contents of src_folded before using it. */
4866 int src_folded_force_flag = 0;
4868 dest = SET_DEST (sets[i].rtl);
4869 src = SET_SRC (sets[i].rtl);
4871 /* If SRC is a constant that has no machine mode,
4872 hash it with the destination's machine mode.
4873 This way we can keep different modes separate. */
4875 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4876 sets[i].mode = mode;
4880 enum machine_mode eqvmode = mode;
4881 if (GET_CODE (dest) == STRICT_LOW_PART)
4882 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4884 hash_arg_in_memory = 0;
4885 hash_arg_in_struct = 0;
4886 src_eqv = fold_rtx (src_eqv, insn);
4887 src_eqv_hash = HASH (src_eqv, eqvmode);
4889 /* Find the equivalence class for the equivalent expression. */
4892 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4894 src_eqv_volatile = do_not_record;
4895 src_eqv_in_memory = hash_arg_in_memory;
4896 src_eqv_in_struct = hash_arg_in_struct;
4899 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4900 value of the INNER register, not the destination. So it is not
4901 a valid substitution for the source. But save it for later. */
4902 if (GET_CODE (dest) == STRICT_LOW_PART)
4905 src_eqv_here = src_eqv;
4907 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4908 simplified result, which may not necessarily be valid. */
4909 src_folded = fold_rtx (src, insn);
4912 /* ??? This caused bad code to be generated for the m68k port with -O2.
4913 Suppose src is (CONST_INT -1), and that after truncation src_folded
4914 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4915 At the end we will add src and src_const to the same equivalence
4916 class. We now have 3 and -1 on the same equivalence class. This
4917 causes later instructions to be mis-optimized. */
4918 /* If storing a constant in a bitfield, pre-truncate the constant
4919 so we will be able to record it later. */
4920 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4921 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4923 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4925 if (GET_CODE (src) == CONST_INT
4926 && GET_CODE (width) == CONST_INT
4927 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4928 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4930 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4931 << INTVAL (width)) - 1));
4935 /* Compute SRC's hash code, and also notice if it
4936 should not be recorded at all. In that case,
4937 prevent any further processing of this assignment. */
4939 hash_arg_in_memory = 0;
4940 hash_arg_in_struct = 0;
4943 sets[i].src_hash = HASH (src, mode);
4944 sets[i].src_volatile = do_not_record;
4945 sets[i].src_in_memory = hash_arg_in_memory;
4946 sets[i].src_in_struct = hash_arg_in_struct;
4948 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4949 a pseudo that is set more than once, do not record SRC. Using
4950 SRC as a replacement for anything else will be incorrect in that
4951 situation. Note that this usually occurs only for stack slots,
4952 in which case all the RTL would be referring to SRC, so we don't
4953 lose any optimization opportunities by not having SRC in the
4956 if (GET_CODE (src) == MEM
4957 && find_reg_note (insn, REG_EQUIV, src) != 0
4958 && GET_CODE (dest) == REG
4959 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4960 && REG_N_SETS (REGNO (dest)) != 1)
4961 sets[i].src_volatile = 1;
4964 /* It is no longer clear why we used to do this, but it doesn't
4965 appear to still be needed. So let's try without it since this
4966 code hurts cse'ing widened ops. */
4967 /* If source is a perverse subreg (such as QI treated as an SI),
4968 treat it as volatile. It may do the work of an SI in one context
4969 where the extra bits are not being used, but cannot replace an SI
4971 if (GET_CODE (src) == SUBREG
4972 && (GET_MODE_SIZE (GET_MODE (src))
4973 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4974 sets[i].src_volatile = 1;
4977 /* Locate all possible equivalent forms for SRC. Try to replace
4978 SRC in the insn with each cheaper equivalent.
4980 We have the following types of equivalents: SRC itself, a folded
4981 version, a value given in a REG_EQUAL note, or a value related
4984 Each of these equivalents may be part of an additional class
4985 of equivalents (if more than one is in the table, they must be in
4986 the same class; we check for this).
4988 If the source is volatile, we don't do any table lookups.
4990 We note any constant equivalent for possible later use in a
4993 if (!sets[i].src_volatile)
4994 elt = lookup (src, sets[i].src_hash, mode);
4996 sets[i].src_elt = elt;
4998 if (elt && src_eqv_here && src_eqv_elt)
5000 if (elt->first_same_value != src_eqv_elt->first_same_value)
5002 /* The REG_EQUAL is indicating that two formerly distinct
5003 classes are now equivalent. So merge them. */
5004 merge_equiv_classes (elt, src_eqv_elt);
5005 src_eqv_hash = HASH (src_eqv, elt->mode);
5006 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5012 else if (src_eqv_elt)
5015 /* Try to find a constant somewhere and record it in `src_const'.
5016 Record its table element, if any, in `src_const_elt'. Look in
5017 any known equivalences first. (If the constant is not in the
5018 table, also set `sets[i].src_const_hash'). */
5020 for (p = elt->first_same_value; p; p = p->next_same_value)
5024 src_const_elt = elt;
5029 && (CONSTANT_P (src_folded)
5030 /* Consider (minus (label_ref L1) (label_ref L2)) as
5031 "constant" here so we will record it. This allows us
5032 to fold switch statements when an ADDR_DIFF_VEC is used. */
5033 || (GET_CODE (src_folded) == MINUS
5034 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5035 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5036 src_const = src_folded, src_const_elt = elt;
5037 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5038 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5040 /* If we don't know if the constant is in the table, get its
5041 hash code and look it up. */
5042 if (src_const && src_const_elt == 0)
5044 sets[i].src_const_hash = HASH (src_const, mode);
5045 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5048 sets[i].src_const = src_const;
5049 sets[i].src_const_elt = src_const_elt;
5051 /* If the constant and our source are both in the table, mark them as
5052 equivalent. Otherwise, if a constant is in the table but the source
5053 isn't, set ELT to it. */
5054 if (src_const_elt && elt
5055 && src_const_elt->first_same_value != elt->first_same_value)
5056 merge_equiv_classes (elt, src_const_elt);
5057 else if (src_const_elt && elt == 0)
5058 elt = src_const_elt;
5060 /* See if there is a register linearly related to a constant
5061 equivalent of SRC. */
5063 && (GET_CODE (src_const) == CONST
5064 || (src_const_elt && src_const_elt->related_value != 0)))
5066 src_related = use_related_value (src_const, src_const_elt);
5069 struct table_elt *src_related_elt
5070 = lookup (src_related, HASH (src_related, mode), mode);
5071 if (src_related_elt && elt)
5073 if (elt->first_same_value
5074 != src_related_elt->first_same_value)
5075 /* This can occur when we previously saw a CONST
5076 involving a SYMBOL_REF and then see the SYMBOL_REF
5077 twice. Merge the involved classes. */
5078 merge_equiv_classes (elt, src_related_elt);
5081 src_related_elt = 0;
5083 else if (src_related_elt && elt == 0)
5084 elt = src_related_elt;
5088 /* See if we have a CONST_INT that is already in a register in a
5091 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5092 && GET_MODE_CLASS (mode) == MODE_INT
5093 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5095 enum machine_mode wider_mode;
5097 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5098 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5099 && src_related == 0;
5100 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5102 struct table_elt *const_elt
5103 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5108 for (const_elt = const_elt->first_same_value;
5109 const_elt; const_elt = const_elt->next_same_value)
5110 if (GET_CODE (const_elt->exp) == REG)
5112 src_related = gen_lowpart_if_possible (mode,
5119 /* Another possibility is that we have an AND with a constant in
5120 a mode narrower than a word. If so, it might have been generated
5121 as part of an "if" which would narrow the AND. If we already
5122 have done the AND in a wider mode, we can use a SUBREG of that
5125 if (flag_expensive_optimizations && ! src_related
5126 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5127 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5129 enum machine_mode tmode;
5130 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5132 for (tmode = GET_MODE_WIDER_MODE (mode);
5133 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5134 tmode = GET_MODE_WIDER_MODE (tmode))
5136 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5137 struct table_elt *larger_elt;
5141 PUT_MODE (new_and, tmode);
5142 XEXP (new_and, 0) = inner;
5143 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5144 if (larger_elt == 0)
5147 for (larger_elt = larger_elt->first_same_value;
5148 larger_elt; larger_elt = larger_elt->next_same_value)
5149 if (GET_CODE (larger_elt->exp) == REG)
5152 = gen_lowpart_if_possible (mode, larger_elt->exp);
5162 #ifdef LOAD_EXTEND_OP
5163 /* See if a MEM has already been loaded with a widening operation;
5164 if it has, we can use a subreg of that. Many CISC machines
5165 also have such operations, but this is only likely to be
5166 beneficial these machines. */
5168 if (flag_expensive_optimizations && src_related == 0
5169 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5170 && GET_MODE_CLASS (mode) == MODE_INT
5171 && GET_CODE (src) == MEM && ! do_not_record
5172 && LOAD_EXTEND_OP (mode) != NIL)
5174 enum machine_mode tmode;
5176 /* Set what we are trying to extend and the operation it might
5177 have been extended with. */
5178 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5179 XEXP (memory_extend_rtx, 0) = src;
5181 for (tmode = GET_MODE_WIDER_MODE (mode);
5182 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5183 tmode = GET_MODE_WIDER_MODE (tmode))
5185 struct table_elt *larger_elt;
5187 PUT_MODE (memory_extend_rtx, tmode);
5188 larger_elt = lookup (memory_extend_rtx,
5189 HASH (memory_extend_rtx, tmode), tmode);
5190 if (larger_elt == 0)
5193 for (larger_elt = larger_elt->first_same_value;
5194 larger_elt; larger_elt = larger_elt->next_same_value)
5195 if (GET_CODE (larger_elt->exp) == REG)
5197 src_related = gen_lowpart_if_possible (mode,
5206 #endif /* LOAD_EXTEND_OP */
5208 if (src == src_folded)
5211 /* At this point, ELT, if non-zero, points to a class of expressions
5212 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5213 and SRC_RELATED, if non-zero, each contain additional equivalent
5214 expressions. Prune these latter expressions by deleting expressions
5215 already in the equivalence class.
5217 Check for an equivalent identical to the destination. If found,
5218 this is the preferred equivalent since it will likely lead to
5219 elimination of the insn. Indicate this by placing it in
5222 if (elt) elt = elt->first_same_value;
5223 for (p = elt; p; p = p->next_same_value)
5225 enum rtx_code code = GET_CODE (p->exp);
5227 /* If the expression is not valid, ignore it. Then we do not
5228 have to check for validity below. In most cases, we can use
5229 `rtx_equal_p', since canonicalization has already been done. */
5230 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5233 /* Also skip paradoxical subregs, unless that's what we're
5236 && (GET_MODE_SIZE (GET_MODE (p->exp))
5237 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5239 && GET_CODE (src) == SUBREG
5240 && GET_MODE (src) == GET_MODE (p->exp)
5241 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5242 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5245 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5247 else if (src_folded && GET_CODE (src_folded) == code
5248 && rtx_equal_p (src_folded, p->exp))
5250 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5251 && rtx_equal_p (src_eqv_here, p->exp))
5253 else if (src_related && GET_CODE (src_related) == code
5254 && rtx_equal_p (src_related, p->exp))
5257 /* This is the same as the destination of the insns, we want
5258 to prefer it. Copy it to src_related. The code below will
5259 then give it a negative cost. */
5260 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5265 /* Find the cheapest valid equivalent, trying all the available
5266 possibilities. Prefer items not in the hash table to ones
5267 that are when they are equal cost. Note that we can never
5268 worsen an insn as the current contents will also succeed.
5269 If we find an equivalent identical to the destination, use it as best,
5270 since this insn will probably be eliminated in that case. */
5273 if (rtx_equal_p (src, dest))
5276 src_cost = COST (src);
5281 if (rtx_equal_p (src_eqv_here, dest))
5284 src_eqv_cost = COST (src_eqv_here);
5289 if (rtx_equal_p (src_folded, dest))
5290 src_folded_cost = -1;
5292 src_folded_cost = COST (src_folded);
5297 if (rtx_equal_p (src_related, dest))
5298 src_related_cost = -1;
5300 src_related_cost = COST (src_related);
5303 /* If this was an indirect jump insn, a known label will really be
5304 cheaper even though it looks more expensive. */
5305 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5306 src_folded = src_const, src_folded_cost = -1;
5308 /* Terminate loop when replacement made. This must terminate since
5309 the current contents will be tested and will always be valid. */
5314 /* Skip invalid entries. */
5315 while (elt && GET_CODE (elt->exp) != REG
5316 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5317 elt = elt->next_same_value;
5319 /* A paradoxical subreg would be bad here: it'll be the right
5320 size, but later may be adjusted so that the upper bits aren't
5321 what we want. So reject it. */
5323 && GET_CODE (elt->exp) == SUBREG
5324 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5325 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5326 /* It is okay, though, if the rtx we're trying to match
5327 will ignore any of the bits we can't predict. */
5329 && GET_CODE (src) == SUBREG
5330 && GET_MODE (src) == GET_MODE (elt->exp)
5331 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5332 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5334 elt = elt->next_same_value;
5338 if (elt) src_elt_cost = elt->cost;
5340 /* Find cheapest and skip it for the next time. For items
5341 of equal cost, use this order:
5342 src_folded, src, src_eqv, src_related and hash table entry. */
5343 if (src_folded_cost <= src_cost
5344 && src_folded_cost <= src_eqv_cost
5345 && src_folded_cost <= src_related_cost
5346 && src_folded_cost <= src_elt_cost)
5348 trial = src_folded, src_folded_cost = 10000;
5349 if (src_folded_force_flag)
5350 trial = force_const_mem (mode, trial);
5352 else if (src_cost <= src_eqv_cost
5353 && src_cost <= src_related_cost
5354 && src_cost <= src_elt_cost)
5355 trial = src, src_cost = 10000;
5356 else if (src_eqv_cost <= src_related_cost
5357 && src_eqv_cost <= src_elt_cost)
5358 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5359 else if (src_related_cost <= src_elt_cost)
5360 trial = copy_rtx (src_related), src_related_cost = 10000;
5363 trial = copy_rtx (elt->exp);
5364 elt = elt->next_same_value;
5365 src_elt_cost = 10000;
5368 /* We don't normally have an insn matching (set (pc) (pc)), so
5369 check for this separately here. We will delete such an
5372 Tablejump insns contain a USE of the table, so simply replacing
5373 the operand with the constant won't match. This is simply an
5374 unconditional branch, however, and is therefore valid. Just
5375 insert the substitution here and we will delete and re-emit
5378 /* Keep track of the original SET_SRC so that we can fix notes
5379 on libcall instructions. */
5380 old_src = SET_SRC (sets[i].rtl);
5382 if (n_sets == 1 && dest == pc_rtx
5384 || (GET_CODE (trial) == LABEL_REF
5385 && ! condjump_p (insn))))
5387 /* If TRIAL is a label in front of a jump table, we are
5388 really falling through the switch (this is how casesi
5389 insns work), so we must branch around the table. */
5390 if (GET_CODE (trial) == CODE_LABEL
5391 && NEXT_INSN (trial) != 0
5392 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
5393 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
5394 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
5396 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
5398 SET_SRC (sets[i].rtl) = trial;
5399 cse_jumps_altered = 1;
5403 /* Look for a substitution that makes a valid insn. */
5404 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5406 /* If we just made a substitution inside a libcall, then we
5407 need to make the same substitution in any notes attached
5408 to the RETVAL insn. */
5410 && (GET_CODE (old_src) == REG
5411 || GET_CODE (old_src) == SUBREG
5412 || GET_CODE (old_src) == MEM))
5413 replace_rtx (REG_NOTES (libcall_insn), old_src,
5414 canon_reg (SET_SRC (sets[i].rtl), insn));
5416 /* The result of apply_change_group can be ignored; see
5419 validate_change (insn, &SET_SRC (sets[i].rtl),
5420 canon_reg (SET_SRC (sets[i].rtl), insn),
5422 apply_change_group ();
5426 /* If we previously found constant pool entries for
5427 constants and this is a constant, try making a
5428 pool entry. Put it in src_folded unless we already have done
5429 this since that is where it likely came from. */
5431 else if (constant_pool_entries_cost
5432 && CONSTANT_P (trial)
5433 && ! (GET_CODE (trial) == CONST
5434 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5436 || (GET_CODE (src_folded) != MEM
5437 && ! src_folded_force_flag))
5438 && GET_MODE_CLASS (mode) != MODE_CC
5439 && mode != VOIDmode)
5441 src_folded_force_flag = 1;
5443 src_folded_cost = constant_pool_entries_cost;
5447 src = SET_SRC (sets[i].rtl);
5449 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5450 However, there is an important exception: If both are registers
5451 that are not the head of their equivalence class, replace SET_SRC
5452 with the head of the class. If we do not do this, we will have
5453 both registers live over a portion of the basic block. This way,
5454 their lifetimes will likely abut instead of overlapping. */
5455 if (GET_CODE (dest) == REG
5456 && REGNO_QTY_VALID_P (REGNO (dest))
5457 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
5458 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
5459 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5460 /* Don't do this if the original insn had a hard reg as
5461 SET_SRC or SET_DEST. */
5462 && (GET_CODE (sets[i].src) != REG
5463 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5464 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5465 /* We can't call canon_reg here because it won't do anything if
5466 SRC is a hard register. */
5468 int first = qty_first_reg[REG_QTY (REGNO (src))];
5470 = (first >= FIRST_PSEUDO_REGISTER
5471 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5473 /* We must use validate-change even for this, because this
5474 might be a special no-op instruction, suitable only to
5476 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5479 /* If we had a constant that is cheaper than what we are now
5480 setting SRC to, use that constant. We ignored it when we
5481 thought we could make this into a no-op. */
5482 if (src_const && COST (src_const) < COST (src)
5483 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5489 /* If we made a change, recompute SRC values. */
5490 if (src != sets[i].src)
5493 hash_arg_in_memory = 0;
5494 hash_arg_in_struct = 0;
5496 sets[i].src_hash = HASH (src, mode);
5497 sets[i].src_volatile = do_not_record;
5498 sets[i].src_in_memory = hash_arg_in_memory;
5499 sets[i].src_in_struct = hash_arg_in_struct;
5500 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5503 /* If this is a single SET, we are setting a register, and we have an
5504 equivalent constant, we want to add a REG_NOTE. We don't want
5505 to write a REG_EQUAL note for a constant pseudo since verifying that
5506 that pseudo hasn't been eliminated is a pain. Such a note also
5507 won't help anything.
5509 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5510 which can be created for a reference to a compile time computable
5511 entry in a jump table. */
5513 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5514 && GET_CODE (src_const) != REG
5515 && ! (GET_CODE (src_const) == CONST
5516 && GET_CODE (XEXP (src_const, 0)) == MINUS
5517 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5518 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5520 rtx simplified_src_const;
5521 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5523 /* Make sure that the rtx is not shared with any other insn. */
5524 src_const = copy_rtx (src_const);
5526 /* Try to simplify SRC_CONST.
5528 The primary purpose behind simplifying the note is to allow
5529 for easier removal of library call sequences later. Consider
5530 a udiv libcall where we can determine the second argument is
5531 a constant. SRC_CONST would look like:
5533 (udiv (reg) (const_int 2**n))
5535 That RTL expression will simplify into:
5537 (lshiftrt (reg) (const_int n))
5539 A target using library calls for division is more likely to
5540 have a lshiftrt insn. Thus, it is more likely that the libcall
5541 can be deleted in delete_trivially_dead_insns if we simplify
5543 simplified_src_const = simplify_rtx (src_const);
5544 src_const = simplified_src_const ? simplified_src_const : src_const;
5546 /* Record the actual constant value in a REG_EQUAL note, making
5547 a new one if one does not already exist. */
5549 XEXP (tem, 0) = src_const;
5551 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5552 src_const, REG_NOTES (insn));
5554 /* If storing a constant value in a register that
5555 previously held the constant value 0,
5556 record this fact with a REG_WAS_0 note on this insn.
5558 Note that the *register* is required to have previously held 0,
5559 not just any register in the quantity and we must point to the
5560 insn that set that register to zero.
5562 Rather than track each register individually, we just see if
5563 the last set for this quantity was for this register. */
5565 if (REGNO_QTY_VALID_P (REGNO (dest))
5566 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
5568 /* See if we previously had a REG_WAS_0 note. */
5569 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5570 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
5572 if ((tem = single_set (const_insn)) != 0
5573 && rtx_equal_p (SET_DEST (tem), dest))
5576 XEXP (note, 0) = const_insn;
5579 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5585 /* Now deal with the destination. */
5588 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5589 to the MEM or REG within it. */
5590 while (GET_CODE (dest) == SIGN_EXTRACT
5591 || GET_CODE (dest) == ZERO_EXTRACT
5592 || GET_CODE (dest) == SUBREG
5593 || GET_CODE (dest) == STRICT_LOW_PART)
5594 dest = XEXP (dest, 0);
5596 sets[i].inner_dest = dest;
5598 if (GET_CODE (dest) == MEM)
5600 #ifdef PUSH_ROUNDING
5601 /* Stack pushes invalidate the stack pointer. */
5602 rtx addr = XEXP (dest, 0);
5603 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5604 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5605 && XEXP (addr, 0) == stack_pointer_rtx)
5606 invalidate (stack_pointer_rtx, Pmode);
5608 dest = fold_rtx (dest, insn);
5611 /* Compute the hash code of the destination now,
5612 before the effects of this instruction are recorded,
5613 since the register values used in the address computation
5614 are those before this instruction. */
5615 sets[i].dest_hash = HASH (dest, mode);
5617 /* Don't enter a bit-field in the hash table
5618 because the value in it after the store
5619 may not equal what was stored, due to truncation. */
5621 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5622 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5624 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5626 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5627 && GET_CODE (width) == CONST_INT
5628 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5629 && ! (INTVAL (src_const)
5630 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5631 /* Exception: if the value is constant,
5632 and it won't be truncated, record it. */
5636 /* This is chosen so that the destination will be invalidated
5637 but no new value will be recorded.
5638 We must invalidate because sometimes constant
5639 values can be recorded for bitfields. */
5640 sets[i].src_elt = 0;
5641 sets[i].src_volatile = 1;
5647 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5649 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5651 /* One less use of the label this insn used to jump to. */
5652 if (JUMP_LABEL (insn) != 0)
5653 --LABEL_NUSES (JUMP_LABEL (insn));
5654 PUT_CODE (insn, NOTE);
5655 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5656 NOTE_SOURCE_FILE (insn) = 0;
5657 cse_jumps_altered = 1;
5658 /* No more processing for this set. */
5662 /* If this SET is now setting PC to a label, we know it used to
5663 be a conditional or computed branch. So we see if we can follow
5664 it. If it was a computed branch, delete it and re-emit. */
5665 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5667 /* If this is not in the format for a simple branch and
5668 we are the only SET in it, re-emit it. */
5669 if (! simplejump_p (insn) && n_sets == 1)
5671 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5672 JUMP_LABEL (new) = XEXP (src, 0);
5673 LABEL_NUSES (XEXP (src, 0))++;
5677 /* Otherwise, force rerecognition, since it probably had
5678 a different pattern before.
5679 This shouldn't really be necessary, since whatever
5680 changed the source value above should have done this.
5681 Until the right place is found, might as well do this here. */
5682 INSN_CODE (insn) = -1;
5684 never_reached_warning (insn);
5686 /* Now emit a BARRIER after the unconditional jump. Do not bother
5687 deleting any unreachable code, let jump/flow do that. */
5688 if (NEXT_INSN (insn) != 0
5689 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5690 emit_barrier_after (insn);
5692 cse_jumps_altered = 1;
5696 /* If destination is volatile, invalidate it and then do no further
5697 processing for this assignment. */
5699 else if (do_not_record)
5701 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5702 || GET_CODE (dest) == MEM)
5703 invalidate (dest, VOIDmode);
5704 else if (GET_CODE (dest) == STRICT_LOW_PART
5705 || GET_CODE (dest) == ZERO_EXTRACT)
5706 invalidate (XEXP (dest, 0), GET_MODE (dest));
5710 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5711 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5714 /* If setting CC0, record what it was set to, or a constant, if it
5715 is equivalent to a constant. If it is being set to a floating-point
5716 value, make a COMPARE with the appropriate constant of 0. If we
5717 don't do this, later code can interpret this as a test against
5718 const0_rtx, which can cause problems if we try to put it into an
5719 insn as a floating-point operand. */
5720 if (dest == cc0_rtx)
5722 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5723 this_insn_cc0_mode = mode;
5724 if (FLOAT_MODE_P (mode))
5725 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5731 /* Now enter all non-volatile source expressions in the hash table
5732 if they are not already present.
5733 Record their equivalence classes in src_elt.
5734 This way we can insert the corresponding destinations into
5735 the same classes even if the actual sources are no longer in them
5736 (having been invalidated). */
5738 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5739 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5741 register struct table_elt *elt;
5742 register struct table_elt *classp = sets[0].src_elt;
5743 rtx dest = SET_DEST (sets[0].rtl);
5744 enum machine_mode eqvmode = GET_MODE (dest);
5746 if (GET_CODE (dest) == STRICT_LOW_PART)
5748 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5751 if (insert_regs (src_eqv, classp, 0))
5753 rehash_using_reg (src_eqv);
5754 src_eqv_hash = HASH (src_eqv, eqvmode);
5756 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5757 elt->in_memory = src_eqv_in_memory;
5758 elt->in_struct = src_eqv_in_struct;
5761 /* Check to see if src_eqv_elt is the same as a set source which
5762 does not yet have an elt, and if so set the elt of the set source
5764 for (i = 0; i < n_sets; i++)
5765 if (sets[i].rtl && sets[i].src_elt == 0
5766 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5767 sets[i].src_elt = src_eqv_elt;
5770 for (i = 0; i < n_sets; i++)
5771 if (sets[i].rtl && ! sets[i].src_volatile
5772 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5774 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5776 /* REG_EQUAL in setting a STRICT_LOW_PART
5777 gives an equivalent for the entire destination register,
5778 not just for the subreg being stored in now.
5779 This is a more interesting equivalence, so we arrange later
5780 to treat the entire reg as the destination. */
5781 sets[i].src_elt = src_eqv_elt;
5782 sets[i].src_hash = src_eqv_hash;
5786 /* Insert source and constant equivalent into hash table, if not
5788 register struct table_elt *classp = src_eqv_elt;
5789 register rtx src = sets[i].src;
5790 register rtx dest = SET_DEST (sets[i].rtl);
5791 enum machine_mode mode
5792 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5794 /* Don't put a hard register source into the table if this is
5795 the last insn of a libcall. */
5796 if (sets[i].src_elt == 0
5797 && (GET_CODE (src) != REG
5798 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5799 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX)))
5801 register struct table_elt *elt;
5803 /* Note that these insert_regs calls cannot remove
5804 any of the src_elt's, because they would have failed to
5805 match if not still valid. */
5806 if (insert_regs (src, classp, 0))
5808 rehash_using_reg (src);
5809 sets[i].src_hash = HASH (src, mode);
5811 elt = insert (src, classp, sets[i].src_hash, mode);
5812 elt->in_memory = sets[i].src_in_memory;
5813 elt->in_struct = sets[i].src_in_struct;
5814 sets[i].src_elt = classp = elt;
5817 if (sets[i].src_const && sets[i].src_const_elt == 0
5818 && src != sets[i].src_const
5819 && ! rtx_equal_p (sets[i].src_const, src))
5820 sets[i].src_elt = insert (sets[i].src_const, classp,
5821 sets[i].src_const_hash, mode);
5824 else if (sets[i].src_elt == 0)
5825 /* If we did not insert the source into the hash table (e.g., it was
5826 volatile), note the equivalence class for the REG_EQUAL value, if any,
5827 so that the destination goes into that class. */
5828 sets[i].src_elt = src_eqv_elt;
5830 invalidate_from_clobbers (x);
5832 /* Some registers are invalidated by subroutine calls. Memory is
5833 invalidated by non-constant calls. */
5835 if (GET_CODE (insn) == CALL_INSN)
5837 if (! CONST_CALL_P (insn))
5838 invalidate_memory ();
5839 invalidate_for_call ();
5842 /* Now invalidate everything set by this instruction.
5843 If a SUBREG or other funny destination is being set,
5844 sets[i].rtl is still nonzero, so here we invalidate the reg
5845 a part of which is being set. */
5847 for (i = 0; i < n_sets; i++)
5850 /* We can't use the inner dest, because the mode associated with
5851 a ZERO_EXTRACT is significant. */
5852 register rtx dest = SET_DEST (sets[i].rtl);
5854 /* Needed for registers to remove the register from its
5855 previous quantity's chain.
5856 Needed for memory if this is a nonvarying address, unless
5857 we have just done an invalidate_memory that covers even those. */
5858 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5859 || GET_CODE (dest) == MEM)
5860 invalidate (dest, VOIDmode);
5861 else if (GET_CODE (dest) == STRICT_LOW_PART
5862 || GET_CODE (dest) == ZERO_EXTRACT)
5863 invalidate (XEXP (dest, 0), GET_MODE (dest));
5866 /* A volatile ASM invalidates everything. */
5867 if (GET_CODE (insn) == INSN
5868 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5869 && MEM_VOLATILE_P (PATTERN (insn)))
5870 flush_hash_table ();
5872 /* Make sure registers mentioned in destinations
5873 are safe for use in an expression to be inserted.
5874 This removes from the hash table
5875 any invalid entry that refers to one of these registers.
5877 We don't care about the return value from mention_regs because
5878 we are going to hash the SET_DEST values unconditionally. */
5880 for (i = 0; i < n_sets; i++)
5884 rtx x = SET_DEST (sets[i].rtl);
5886 if (GET_CODE (x) != REG)
5890 /* We used to rely on all references to a register becoming
5891 inaccessible when a register changes to a new quantity,
5892 since that changes the hash code. However, that is not
5893 safe, since after NBUCKETS new quantities we get a
5894 hash 'collision' of a register with its own invalid
5895 entries. And since SUBREGs have been changed not to
5896 change their hash code with the hash code of the register,
5897 it wouldn't work any longer at all. So we have to check
5898 for any invalid references lying around now.
5899 This code is similar to the REG case in mention_regs,
5900 but it knows that reg_tick has been incremented, and
5901 it leaves reg_in_table as -1 . */
5902 register int regno = REGNO (x);
5903 register int endregno
5904 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5905 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5908 for (i = regno; i < endregno; i++)
5910 if (REG_IN_TABLE (i) >= 0)
5912 remove_invalid_refs (i);
5913 REG_IN_TABLE (i) = -1;
5920 /* We may have just removed some of the src_elt's from the hash table.
5921 So replace each one with the current head of the same class. */
5923 for (i = 0; i < n_sets; i++)
5926 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5927 /* If elt was removed, find current head of same class,
5928 or 0 if nothing remains of that class. */
5930 register struct table_elt *elt = sets[i].src_elt;
5932 while (elt && elt->prev_same_value)
5933 elt = elt->prev_same_value;
5935 while (elt && elt->first_same_value == 0)
5936 elt = elt->next_same_value;
5937 sets[i].src_elt = elt ? elt->first_same_value : 0;
5941 /* Now insert the destinations into their equivalence classes. */
5943 for (i = 0; i < n_sets; i++)
5946 register rtx dest = SET_DEST (sets[i].rtl);
5947 rtx inner_dest = sets[i].inner_dest;
5948 register struct table_elt *elt;
5950 /* Don't record value if we are not supposed to risk allocating
5951 floating-point values in registers that might be wider than
5953 if ((flag_float_store
5954 && GET_CODE (dest) == MEM
5955 && FLOAT_MODE_P (GET_MODE (dest)))
5956 /* Don't record BLKmode values, because we don't know the
5957 size of it, and can't be sure that other BLKmode values
5958 have the same or smaller size. */
5959 || GET_MODE (dest) == BLKmode
5960 /* Don't record values of destinations set inside a libcall block
5961 since we might delete the libcall. Things should have been set
5962 up so we won't want to reuse such a value, but we play it safe
5965 /* If we didn't put a REG_EQUAL value or a source into the hash
5966 table, there is no point is recording DEST. */
5967 || sets[i].src_elt == 0
5968 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5969 or SIGN_EXTEND, don't record DEST since it can cause
5970 some tracking to be wrong.
5972 ??? Think about this more later. */
5973 || (GET_CODE (dest) == SUBREG
5974 && (GET_MODE_SIZE (GET_MODE (dest))
5975 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5976 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5977 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5980 /* STRICT_LOW_PART isn't part of the value BEING set,
5981 and neither is the SUBREG inside it.
5982 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5983 if (GET_CODE (dest) == STRICT_LOW_PART)
5984 dest = SUBREG_REG (XEXP (dest, 0));
5986 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5987 /* Registers must also be inserted into chains for quantities. */
5988 if (insert_regs (dest, sets[i].src_elt, 1))
5990 /* If `insert_regs' changes something, the hash code must be
5992 rehash_using_reg (dest);
5993 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5996 if (GET_CODE (inner_dest) == MEM
5997 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5998 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5999 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6000 Consider the case in which the address of the MEM is
6001 passed to a function, which alters the MEM. Then, if we
6002 later use Y instead of the MEM we'll miss the update. */
6003 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6005 elt = insert (dest, sets[i].src_elt,
6006 sets[i].dest_hash, GET_MODE (dest));
6008 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6009 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6010 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
6015 /* This implicitly assumes a whole struct
6016 need not have MEM_IN_STRUCT_P.
6017 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6018 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
6019 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
6022 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6023 narrower than M2, and both M1 and M2 are the same number of words,
6024 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6025 make that equivalence as well.
6027 However, BAR may have equivalences for which gen_lowpart_if_possible
6028 will produce a simpler value than gen_lowpart_if_possible applied to
6029 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6030 BAR's equivalences. If we don't get a simplified form, make
6031 the SUBREG. It will not be used in an equivalence, but will
6032 cause two similar assignments to be detected.
6034 Note the loop below will find SUBREG_REG (DEST) since we have
6035 already entered SRC and DEST of the SET in the table. */
6037 if (GET_CODE (dest) == SUBREG
6038 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6040 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
6041 && (GET_MODE_SIZE (GET_MODE (dest))
6042 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6043 && sets[i].src_elt != 0)
6045 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6046 struct table_elt *elt, *classp = 0;
6048 for (elt = sets[i].src_elt->first_same_value; elt;
6049 elt = elt->next_same_value)
6053 struct table_elt *src_elt;
6055 /* Ignore invalid entries. */
6056 if (GET_CODE (elt->exp) != REG
6057 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6060 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6062 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
6064 src_hash = HASH (new_src, new_mode);
6065 src_elt = lookup (new_src, src_hash, new_mode);
6067 /* Put the new source in the hash table is if isn't
6071 if (insert_regs (new_src, classp, 0))
6073 rehash_using_reg (new_src);
6074 src_hash = HASH (new_src, new_mode);
6076 src_elt = insert (new_src, classp, src_hash, new_mode);
6077 src_elt->in_memory = elt->in_memory;
6078 src_elt->in_struct = elt->in_struct;
6080 else if (classp && classp != src_elt->first_same_value)
6081 /* Show that two things that we've seen before are
6082 actually the same. */
6083 merge_equiv_classes (src_elt, classp);
6085 classp = src_elt->first_same_value;
6086 /* Ignore invalid entries. */
6088 && GET_CODE (classp->exp) != REG
6089 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6090 classp = classp->next_same_value;
6095 /* Special handling for (set REG0 REG1)
6096 where REG0 is the "cheapest", cheaper than REG1.
6097 After cse, REG1 will probably not be used in the sequel,
6098 so (if easily done) change this insn to (set REG1 REG0) and
6099 replace REG1 with REG0 in the previous insn that computed their value.
6100 Then REG1 will become a dead store and won't cloud the situation
6101 for later optimizations.
6103 Do not make this change if REG1 is a hard register, because it will
6104 then be used in the sequel and we may be changing a two-operand insn
6105 into a three-operand insn.
6107 Also do not do this if we are operating on a copy of INSN.
6109 Also don't do this if INSN ends a libcall; this would cause an unrelated
6110 register to be set in the middle of a libcall, and we then get bad code
6111 if the libcall is deleted. */
6113 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6114 && NEXT_INSN (PREV_INSN (insn)) == insn
6115 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6116 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6117 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
6118 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
6119 == REGNO (SET_DEST (sets[0].rtl)))
6120 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6122 rtx prev = PREV_INSN (insn);
6123 while (prev && GET_CODE (prev) == NOTE)
6124 prev = PREV_INSN (prev);
6126 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
6127 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
6129 rtx dest = SET_DEST (sets[0].rtl);
6130 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
6132 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
6133 validate_change (insn, & SET_DEST (sets[0].rtl),
6134 SET_SRC (sets[0].rtl), 1);
6135 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
6136 apply_change_group ();
6138 /* If REG1 was equivalent to a constant, REG0 is not. */
6140 PUT_REG_NOTE_KIND (note, REG_EQUAL);
6142 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6143 any REG_WAS_0 note on INSN to PREV. */
6144 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6146 remove_note (prev, note);
6148 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6151 remove_note (insn, note);
6152 XEXP (note, 1) = REG_NOTES (prev);
6153 REG_NOTES (prev) = note;
6156 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
6157 then we must delete it, because the value in REG0 has changed. */
6158 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6159 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
6160 remove_note (insn, note);
6164 /* If this is a conditional jump insn, record any known equivalences due to
6165 the condition being tested. */
6167 last_jump_equiv_class = 0;
6168 if (GET_CODE (insn) == JUMP_INSN
6169 && n_sets == 1 && GET_CODE (x) == SET
6170 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6171 record_jump_equiv (insn, 0);
6174 /* If the previous insn set CC0 and this insn no longer references CC0,
6175 delete the previous insn. Here we use the fact that nothing expects CC0
6176 to be valid over an insn, which is true until the final pass. */
6177 if (prev_insn && GET_CODE (prev_insn) == INSN
6178 && (tem = single_set (prev_insn)) != 0
6179 && SET_DEST (tem) == cc0_rtx
6180 && ! reg_mentioned_p (cc0_rtx, x))
6182 PUT_CODE (prev_insn, NOTE);
6183 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6184 NOTE_SOURCE_FILE (prev_insn) = 0;
6187 prev_insn_cc0 = this_insn_cc0;
6188 prev_insn_cc0_mode = this_insn_cc0_mode;
6194 /* Remove from the hash table all expressions that reference memory. */
6196 invalidate_memory ()
6199 register struct table_elt *p, *next;
6201 for (i = 0; i < NBUCKETS; i++)
6202 for (p = table[i]; p; p = next)
6204 next = p->next_same_hash;
6206 remove_from_table (p, i);
6210 /* XXX ??? The name of this function bears little resemblance to
6211 what this function actually does. FIXME. */
6213 note_mem_written (addr)
6216 /* Pushing or popping the stack invalidates just the stack pointer. */
6217 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6218 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6219 && GET_CODE (XEXP (addr, 0)) == REG
6220 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6222 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6223 REG_TICK (STACK_POINTER_REGNUM)++;
6225 /* This should be *very* rare. */
6226 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6227 invalidate (stack_pointer_rtx, VOIDmode);
6233 /* Perform invalidation on the basis of everything about an insn
6234 except for invalidating the actual places that are SET in it.
6235 This includes the places CLOBBERed, and anything that might
6236 alias with something that is SET or CLOBBERed.
6238 X is the pattern of the insn. */
6241 invalidate_from_clobbers (x)
6244 if (GET_CODE (x) == CLOBBER)
6246 rtx ref = XEXP (x, 0);
6249 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6250 || GET_CODE (ref) == MEM)
6251 invalidate (ref, VOIDmode);
6252 else if (GET_CODE (ref) == STRICT_LOW_PART
6253 || GET_CODE (ref) == ZERO_EXTRACT)
6254 invalidate (XEXP (ref, 0), GET_MODE (ref));
6257 else if (GET_CODE (x) == PARALLEL)
6260 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6262 register rtx y = XVECEXP (x, 0, i);
6263 if (GET_CODE (y) == CLOBBER)
6265 rtx ref = XEXP (y, 0);
6266 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6267 || GET_CODE (ref) == MEM)
6268 invalidate (ref, VOIDmode);
6269 else if (GET_CODE (ref) == STRICT_LOW_PART
6270 || GET_CODE (ref) == ZERO_EXTRACT)
6271 invalidate (XEXP (ref, 0), GET_MODE (ref));
6277 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6278 and replace any registers in them with either an equivalent constant
6279 or the canonical form of the register. If we are inside an address,
6280 only do this if the address remains valid.
6282 OBJECT is 0 except when within a MEM in which case it is the MEM.
6284 Return the replacement for X. */
6287 cse_process_notes (x, object)
6291 enum rtx_code code = GET_CODE (x);
6292 const char *fmt = GET_RTX_FORMAT (code);
6308 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6313 if (REG_NOTE_KIND (x) == REG_EQUAL)
6314 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6316 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6323 rtx new = cse_process_notes (XEXP (x, 0), object);
6324 /* We don't substitute VOIDmode constants into these rtx,
6325 since they would impede folding. */
6326 if (GET_MODE (new) != VOIDmode)
6327 validate_change (object, &XEXP (x, 0), new, 0);
6332 i = REG_QTY (REGNO (x));
6334 /* Return a constant or a constant register. */
6335 if (REGNO_QTY_VALID_P (REGNO (x))
6336 && qty_const[i] != 0
6337 && (CONSTANT_P (qty_const[i])
6338 || GET_CODE (qty_const[i]) == REG))
6340 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
6345 /* Otherwise, canonicalize this register. */
6346 return canon_reg (x, NULL_RTX);
6352 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6354 validate_change (object, &XEXP (x, i),
6355 cse_process_notes (XEXP (x, i), object), 0);
6360 /* Find common subexpressions between the end test of a loop and the beginning
6361 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6363 Often we have a loop where an expression in the exit test is used
6364 in the body of the loop. For example "while (*p) *q++ = *p++;".
6365 Because of the way we duplicate the loop exit test in front of the loop,
6366 however, we don't detect that common subexpression. This will be caught
6367 when global cse is implemented, but this is a quite common case.
6369 This function handles the most common cases of these common expressions.
6370 It is called after we have processed the basic block ending with the
6371 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6372 jumps to a label used only once. */
6375 cse_around_loop (loop_start)
6380 struct table_elt *p;
6382 /* If the jump at the end of the loop doesn't go to the start, we don't
6384 for (insn = PREV_INSN (loop_start);
6385 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6386 insn = PREV_INSN (insn))
6390 || GET_CODE (insn) != NOTE
6391 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6394 /* If the last insn of the loop (the end test) was an NE comparison,
6395 we will interpret it as an EQ comparison, since we fell through
6396 the loop. Any equivalences resulting from that comparison are
6397 therefore not valid and must be invalidated. */
6398 if (last_jump_equiv_class)
6399 for (p = last_jump_equiv_class->first_same_value; p;
6400 p = p->next_same_value)
6402 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6403 || (GET_CODE (p->exp) == SUBREG
6404 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6405 invalidate (p->exp, VOIDmode);
6406 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6407 || GET_CODE (p->exp) == ZERO_EXTRACT)
6408 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6411 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6412 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6414 The only thing we do with SET_DEST is invalidate entries, so we
6415 can safely process each SET in order. It is slightly less efficient
6416 to do so, but we only want to handle the most common cases.
6418 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6419 These pseudos won't have valid entries in any of the tables indexed
6420 by register number, such as reg_qty. We avoid out-of-range array
6421 accesses by not processing any instructions created after cse started. */
6423 for (insn = NEXT_INSN (loop_start);
6424 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6425 && INSN_UID (insn) < max_insn_uid
6426 && ! (GET_CODE (insn) == NOTE
6427 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6428 insn = NEXT_INSN (insn))
6430 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6431 && (GET_CODE (PATTERN (insn)) == SET
6432 || GET_CODE (PATTERN (insn)) == CLOBBER))
6433 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6434 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6435 && GET_CODE (PATTERN (insn)) == PARALLEL)
6436 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6437 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6438 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6439 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6444 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6445 since they are done elsewhere. This function is called via note_stores. */
6448 invalidate_skipped_set (dest, set, data)
6451 void *data ATTRIBUTE_UNUSED;
6453 enum rtx_code code = GET_CODE (dest);
6456 && ! note_mem_written (dest) /* If this is not a stack push ... */
6457 /* There are times when an address can appear varying and be a PLUS
6458 during this scan when it would be a fixed address were we to know
6459 the proper equivalences. So invalidate all memory if there is
6460 a BLKmode or nonscalar memory reference or a reference to a
6461 variable address. */
6462 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6463 || cse_rtx_varies_p (XEXP (dest, 0))))
6465 invalidate_memory ();
6469 if (GET_CODE (set) == CLOBBER
6476 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6477 invalidate (XEXP (dest, 0), GET_MODE (dest));
6478 else if (code == REG || code == SUBREG || code == MEM)
6479 invalidate (dest, VOIDmode);
6482 /* Invalidate all insns from START up to the end of the function or the
6483 next label. This called when we wish to CSE around a block that is
6484 conditionally executed. */
6487 invalidate_skipped_block (start)
6492 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6493 insn = NEXT_INSN (insn))
6495 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6498 if (GET_CODE (insn) == CALL_INSN)
6500 if (! CONST_CALL_P (insn))
6501 invalidate_memory ();
6502 invalidate_for_call ();
6505 invalidate_from_clobbers (PATTERN (insn));
6506 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6510 /* If modifying X will modify the value in *DATA (which is really an
6511 `rtx *'), indicate that fact by setting the pointed to value to
6515 cse_check_loop_start (x, set, data)
6517 rtx set ATTRIBUTE_UNUSED;
6520 rtx *cse_check_loop_start_value = (rtx *) data;
6522 if (*cse_check_loop_start_value == NULL_RTX
6523 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6526 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6527 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6528 *cse_check_loop_start_value = NULL_RTX;
6531 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6532 a loop that starts with the label at LOOP_START.
6534 If X is a SET, we see if its SET_SRC is currently in our hash table.
6535 If so, we see if it has a value equal to some register used only in the
6536 loop exit code (as marked by jump.c).
6538 If those two conditions are true, we search backwards from the start of
6539 the loop to see if that same value was loaded into a register that still
6540 retains its value at the start of the loop.
6542 If so, we insert an insn after the load to copy the destination of that
6543 load into the equivalent register and (try to) replace our SET_SRC with that
6546 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6549 cse_set_around_loop (x, insn, loop_start)
6554 struct table_elt *src_elt;
6556 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6557 are setting PC or CC0 or whose SET_SRC is already a register. */
6558 if (GET_CODE (x) == SET
6559 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6560 && GET_CODE (SET_SRC (x)) != REG)
6562 src_elt = lookup (SET_SRC (x),
6563 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6564 GET_MODE (SET_DEST (x)));
6567 for (src_elt = src_elt->first_same_value; src_elt;
6568 src_elt = src_elt->next_same_value)
6569 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6570 && COST (src_elt->exp) < COST (SET_SRC (x)))
6574 /* Look for an insn in front of LOOP_START that sets
6575 something in the desired mode to SET_SRC (x) before we hit
6576 a label or CALL_INSN. */
6578 for (p = prev_nonnote_insn (loop_start);
6579 p && GET_CODE (p) != CALL_INSN
6580 && GET_CODE (p) != CODE_LABEL;
6581 p = prev_nonnote_insn (p))
6582 if ((set = single_set (p)) != 0
6583 && GET_CODE (SET_DEST (set)) == REG
6584 && GET_MODE (SET_DEST (set)) == src_elt->mode
6585 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6587 /* We now have to ensure that nothing between P
6588 and LOOP_START modified anything referenced in
6589 SET_SRC (x). We know that nothing within the loop
6590 can modify it, or we would have invalidated it in
6593 rtx cse_check_loop_start_value = SET_SRC (x);
6594 for (q = p; q != loop_start; q = NEXT_INSN (q))
6595 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6596 note_stores (PATTERN (q),
6597 cse_check_loop_start,
6598 &cse_check_loop_start_value);
6600 /* If nothing was changed and we can replace our
6601 SET_SRC, add an insn after P to copy its destination
6602 to what we will be replacing SET_SRC with. */
6603 if (cse_check_loop_start_value
6604 && validate_change (insn, &SET_SRC (x),
6607 /* If this creates new pseudos, this is unsafe,
6608 because the regno of new pseudo is unsuitable
6609 to index into reg_qty when cse_insn processes
6610 the new insn. Therefore, if a new pseudo was
6611 created, discard this optimization. */
6612 int nregs = max_reg_num ();
6614 = gen_move_insn (src_elt->exp, SET_DEST (set));
6615 if (nregs != max_reg_num ())
6617 if (! validate_change (insn, &SET_SRC (x),
6622 emit_insn_after (move, p);
6629 /* Now invalidate anything modified by X. */
6630 note_mem_written (SET_DEST (x));
6632 /* See comment on similar code in cse_insn for explanation of these tests. */
6633 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6634 || GET_CODE (SET_DEST (x)) == MEM)
6635 invalidate (SET_DEST (x), VOIDmode);
6636 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6637 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6638 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6641 /* Find the end of INSN's basic block and return its range,
6642 the total number of SETs in all the insns of the block, the last insn of the
6643 block, and the branch path.
6645 The branch path indicates which branches should be followed. If a non-zero
6646 path size is specified, the block should be rescanned and a different set
6647 of branches will be taken. The branch path is only used if
6648 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6650 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6651 used to describe the block. It is filled in with the information about
6652 the current block. The incoming structure's branch path, if any, is used
6653 to construct the output branch path. */
6656 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6658 struct cse_basic_block_data *data;
6665 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6666 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6667 int path_size = data->path_size;
6671 /* Update the previous branch path, if any. If the last branch was
6672 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6673 shorten the path by one and look at the previous branch. We know that
6674 at least one branch must have been taken if PATH_SIZE is non-zero. */
6675 while (path_size > 0)
6677 if (data->path[path_size - 1].status != NOT_TAKEN)
6679 data->path[path_size - 1].status = NOT_TAKEN;
6686 /* If the first instruction is marked with QImode, that means we've
6687 already processed this block. Our caller will look at DATA->LAST
6688 to figure out where to go next. We want to return the next block
6689 in the instruction stream, not some branched-to block somewhere
6690 else. We accomplish this by pretending our called forbid us to
6691 follow jumps, or skip blocks. */
6692 if (GET_MODE (insn) == QImode)
6693 follow_jumps = skip_blocks = 0;
6695 /* Scan to end of this basic block. */
6696 while (p && GET_CODE (p) != CODE_LABEL)
6698 /* Don't cse out the end of a loop. This makes a difference
6699 only for the unusual loops that always execute at least once;
6700 all other loops have labels there so we will stop in any case.
6701 Cse'ing out the end of the loop is dangerous because it
6702 might cause an invariant expression inside the loop
6703 to be reused after the end of the loop. This would make it
6704 hard to move the expression out of the loop in loop.c,
6705 especially if it is one of several equivalent expressions
6706 and loop.c would like to eliminate it.
6708 If we are running after loop.c has finished, we can ignore
6709 the NOTE_INSN_LOOP_END. */
6711 if (! after_loop && GET_CODE (p) == NOTE
6712 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6715 /* Don't cse over a call to setjmp; on some machines (eg vax)
6716 the regs restored by the longjmp come from
6717 a later time than the setjmp. */
6718 if (GET_CODE (p) == NOTE
6719 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6722 /* A PARALLEL can have lots of SETs in it,
6723 especially if it is really an ASM_OPERANDS. */
6724 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6725 && GET_CODE (PATTERN (p)) == PARALLEL)
6726 nsets += XVECLEN (PATTERN (p), 0);
6727 else if (GET_CODE (p) != NOTE)
6730 /* Ignore insns made by CSE; they cannot affect the boundaries of
6733 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6734 high_cuid = INSN_CUID (p);
6735 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6736 low_cuid = INSN_CUID (p);
6738 /* See if this insn is in our branch path. If it is and we are to
6740 if (path_entry < path_size && data->path[path_entry].branch == p)
6742 if (data->path[path_entry].status != NOT_TAKEN)
6745 /* Point to next entry in path, if any. */
6749 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6750 was specified, we haven't reached our maximum path length, there are
6751 insns following the target of the jump, this is the only use of the
6752 jump label, and the target label is preceded by a BARRIER.
6754 Alternatively, we can follow the jump if it branches around a
6755 block of code and there are no other branches into the block.
6756 In this case invalidate_skipped_block will be called to invalidate any
6757 registers set in the block when following the jump. */
6759 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6760 && GET_CODE (p) == JUMP_INSN
6761 && GET_CODE (PATTERN (p)) == SET
6762 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6763 && JUMP_LABEL (p) != 0
6764 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6765 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6767 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6768 if ((GET_CODE (q) != NOTE
6769 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6770 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6771 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6774 /* If we ran into a BARRIER, this code is an extension of the
6775 basic block when the branch is taken. */
6776 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6778 /* Don't allow ourself to keep walking around an
6779 always-executed loop. */
6780 if (next_real_insn (q) == next)
6786 /* Similarly, don't put a branch in our path more than once. */
6787 for (i = 0; i < path_entry; i++)
6788 if (data->path[i].branch == p)
6791 if (i != path_entry)
6794 data->path[path_entry].branch = p;
6795 data->path[path_entry++].status = TAKEN;
6797 /* This branch now ends our path. It was possible that we
6798 didn't see this branch the last time around (when the
6799 insn in front of the target was a JUMP_INSN that was
6800 turned into a no-op). */
6801 path_size = path_entry;
6804 /* Mark block so we won't scan it again later. */
6805 PUT_MODE (NEXT_INSN (p), QImode);
6807 /* Detect a branch around a block of code. */
6808 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6812 if (next_real_insn (q) == next)
6818 for (i = 0; i < path_entry; i++)
6819 if (data->path[i].branch == p)
6822 if (i != path_entry)
6825 /* This is no_labels_between_p (p, q) with an added check for
6826 reaching the end of a function (in case Q precedes P). */
6827 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6828 if (GET_CODE (tmp) == CODE_LABEL)
6833 data->path[path_entry].branch = p;
6834 data->path[path_entry++].status = AROUND;
6836 path_size = path_entry;
6839 /* Mark block so we won't scan it again later. */
6840 PUT_MODE (NEXT_INSN (p), QImode);
6847 data->low_cuid = low_cuid;
6848 data->high_cuid = high_cuid;
6849 data->nsets = nsets;
6852 /* If all jumps in the path are not taken, set our path length to zero
6853 so a rescan won't be done. */
6854 for (i = path_size - 1; i >= 0; i--)
6855 if (data->path[i].status != NOT_TAKEN)
6859 data->path_size = 0;
6861 data->path_size = path_size;
6863 /* End the current branch path. */
6864 data->path[path_size].branch = 0;
6867 /* Perform cse on the instructions of a function.
6868 F is the first instruction.
6869 NREGS is one plus the highest pseudo-reg number used in the instruction.
6871 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6872 (only if -frerun-cse-after-loop).
6874 Returns 1 if jump_optimize should be redone due to simplifications
6875 in conditional jump instructions. */
6878 cse_main (f, nregs, after_loop, file)
6884 struct cse_basic_block_data val;
6885 register rtx insn = f;
6888 cse_jumps_altered = 0;
6889 recorded_label_ref = 0;
6890 constant_pool_entries_cost = 0;
6894 init_alias_analysis ();
6898 max_insn_uid = get_max_uid ();
6900 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
6901 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
6903 #ifdef LOAD_EXTEND_OP
6905 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6906 and change the code and mode as appropriate. */
6907 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6910 /* Discard all the free elements of the previous function
6911 since they are allocated in the temporarily obstack. */
6912 bzero ((char *) table, sizeof table);
6913 free_element_chain = 0;
6914 n_elements_made = 0;
6916 /* Find the largest uid. */
6918 max_uid = get_max_uid ();
6919 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
6920 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
6922 /* Compute the mapping from uids to cuids.
6923 CUIDs are numbers assigned to insns, like uids,
6924 except that cuids increase monotonically through the code.
6925 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6926 between two insns is not affected by -g. */
6928 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6930 if (GET_CODE (insn) != NOTE
6931 || NOTE_LINE_NUMBER (insn) < 0)
6932 INSN_CUID (insn) = ++i;
6934 /* Give a line number note the same cuid as preceding insn. */
6935 INSN_CUID (insn) = i;
6938 /* Initialize which registers are clobbered by calls. */
6940 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6942 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6943 if ((call_used_regs[i]
6944 /* Used to check !fixed_regs[i] here, but that isn't safe;
6945 fixed regs are still call-clobbered, and sched can get
6946 confused if they can "live across calls".
6948 The frame pointer is always preserved across calls. The arg
6949 pointer is if it is fixed. The stack pointer usually is, unless
6950 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6951 will be present. If we are generating PIC code, the PIC offset
6952 table register is preserved across calls. */
6954 && i != STACK_POINTER_REGNUM
6955 && i != FRAME_POINTER_REGNUM
6956 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6957 && i != HARD_FRAME_POINTER_REGNUM
6959 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6960 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6962 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6963 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6967 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6970 ggc_push_context ();
6972 /* Loop over basic blocks.
6973 Compute the maximum number of qty's needed for each basic block
6974 (which is 2 for each SET). */
6978 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6979 flag_cse_skip_blocks);
6981 /* If this basic block was already processed or has no sets, skip it. */
6982 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6984 PUT_MODE (insn, VOIDmode);
6985 insn = (val.last ? NEXT_INSN (val.last) : 0);
6990 cse_basic_block_start = val.low_cuid;
6991 cse_basic_block_end = val.high_cuid;
6992 max_qty = val.nsets * 2;
6995 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6996 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6999 /* Make MAX_QTY bigger to give us room to optimize
7000 past the end of this basic block, if that should prove useful. */
7006 /* If this basic block is being extended by following certain jumps,
7007 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7008 Otherwise, we start after this basic block. */
7009 if (val.path_size > 0)
7010 cse_basic_block (insn, val.last, val.path, 0);
7013 int old_cse_jumps_altered = cse_jumps_altered;
7016 /* When cse changes a conditional jump to an unconditional
7017 jump, we want to reprocess the block, since it will give
7018 us a new branch path to investigate. */
7019 cse_jumps_altered = 0;
7020 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7021 if (cse_jumps_altered == 0
7022 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7025 cse_jumps_altered |= old_cse_jumps_altered;
7039 /* Tell refers_to_mem_p that qty_const info is not available. */
7042 if (max_elements_made < n_elements_made)
7043 max_elements_made = n_elements_made;
7046 end_alias_analysis ();
7048 return cse_jumps_altered || recorded_label_ref;
7051 /* Process a single basic block. FROM and TO and the limits of the basic
7052 block. NEXT_BRANCH points to the branch path when following jumps or
7053 a null path when not following jumps.
7055 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7056 loop. This is true when we are being called for the last time on a
7057 block and this CSE pass is before loop.c. */
7060 cse_basic_block (from, to, next_branch, around_loop)
7061 register rtx from, to;
7062 struct branch_path *next_branch;
7067 rtx libcall_insn = NULL_RTX;
7070 /* Each of these arrays is undefined before max_reg, so only allocate
7071 the space actually needed and adjust the start below. */
7073 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7074 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7075 qty_mode = (enum machine_mode *) alloca ((max_qty - max_reg)
7076 * sizeof (enum machine_mode));
7077 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7078 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7080 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
7081 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7082 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7084 qty_first_reg -= max_reg;
7085 qty_last_reg -= max_reg;
7086 qty_mode -= max_reg;
7087 qty_const -= max_reg;
7088 qty_const_insn -= max_reg;
7089 qty_comparison_code -= max_reg;
7090 qty_comparison_qty -= max_reg;
7091 qty_comparison_const -= max_reg;
7095 /* TO might be a label. If so, protect it from being deleted. */
7096 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7099 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7101 register enum rtx_code code = GET_CODE (insn);
7103 /* If we have processed 1,000 insns, flush the hash table to
7104 avoid extreme quadratic behavior. We must not include NOTEs
7105 in the count since there may be more or them when generating
7106 debugging information. If we clear the table at different
7107 times, code generated with -g -O might be different than code
7108 generated with -O but not -g.
7110 ??? This is a real kludge and needs to be done some other way.
7112 if (code != NOTE && num_insns++ > 1000)
7114 flush_hash_table ();
7118 /* See if this is a branch that is part of the path. If so, and it is
7119 to be taken, do so. */
7120 if (next_branch->branch == insn)
7122 enum taken status = next_branch++->status;
7123 if (status != NOT_TAKEN)
7125 if (status == TAKEN)
7126 record_jump_equiv (insn, 1);
7128 invalidate_skipped_block (NEXT_INSN (insn));
7130 /* Set the last insn as the jump insn; it doesn't affect cc0.
7131 Then follow this branch. */
7136 insn = JUMP_LABEL (insn);
7141 if (GET_MODE (insn) == QImode)
7142 PUT_MODE (insn, VOIDmode);
7144 if (GET_RTX_CLASS (code) == 'i')
7148 /* Process notes first so we have all notes in canonical forms when
7149 looking for duplicate operations. */
7151 if (REG_NOTES (insn))
7152 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7154 /* Track when we are inside in LIBCALL block. Inside such a block,
7155 we do not want to record destinations. The last insn of a
7156 LIBCALL block is not considered to be part of the block, since
7157 its destination is the result of the block and hence should be
7160 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7161 libcall_insn = XEXP (p, 0);
7162 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7163 libcall_insn = NULL_RTX;
7165 cse_insn (insn, libcall_insn);
7168 /* If INSN is now an unconditional jump, skip to the end of our
7169 basic block by pretending that we just did the last insn in the
7170 basic block. If we are jumping to the end of our block, show
7171 that we can have one usage of TO. */
7173 if (simplejump_p (insn))
7178 if (JUMP_LABEL (insn) == to)
7181 /* Maybe TO was deleted because the jump is unconditional.
7182 If so, there is nothing left in this basic block. */
7183 /* ??? Perhaps it would be smarter to set TO
7184 to whatever follows this insn,
7185 and pretend the basic block had always ended here. */
7186 if (INSN_DELETED_P (to))
7189 insn = PREV_INSN (to);
7192 /* See if it is ok to keep on going past the label
7193 which used to end our basic block. Remember that we incremented
7194 the count of that label, so we decrement it here. If we made
7195 a jump unconditional, TO_USAGE will be one; in that case, we don't
7196 want to count the use in that jump. */
7198 if (to != 0 && NEXT_INSN (insn) == to
7199 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7201 struct cse_basic_block_data val;
7204 insn = NEXT_INSN (to);
7206 /* If TO was the last insn in the function, we are done. */
7210 /* If TO was preceded by a BARRIER we are done with this block
7211 because it has no continuation. */
7212 prev = prev_nonnote_insn (to);
7213 if (prev && GET_CODE (prev) == BARRIER)
7216 /* Find the end of the following block. Note that we won't be
7217 following branches in this case. */
7220 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7222 /* If the tables we allocated have enough space left
7223 to handle all the SETs in the next basic block,
7224 continue through it. Otherwise, return,
7225 and that block will be scanned individually. */
7226 if (val.nsets * 2 + next_qty > max_qty)
7229 cse_basic_block_start = val.low_cuid;
7230 cse_basic_block_end = val.high_cuid;
7233 /* Prevent TO from being deleted if it is a label. */
7234 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7237 /* Back up so we process the first insn in the extension. */
7238 insn = PREV_INSN (insn);
7242 if (next_qty > max_qty)
7245 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7246 the previous insn is the only insn that branches to the head of a loop,
7247 we can cse into the loop. Don't do this if we changed the jump
7248 structure of a loop unless we aren't going to be following jumps. */
7250 if ((cse_jumps_altered == 0
7251 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7252 && around_loop && to != 0
7253 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7254 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7255 && JUMP_LABEL (PREV_INSN (to)) != 0
7256 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7257 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7259 return to ? NEXT_INSN (to) : 0;
7262 /* Count the number of times registers are used (not set) in X.
7263 COUNTS is an array in which we accumulate the count, INCR is how much
7264 we count each register usage.
7266 Don't count a usage of DEST, which is the SET_DEST of a SET which
7267 contains X in its SET_SRC. This is because such a SET does not
7268 modify the liveness of DEST. */
7271 count_reg_usage (x, counts, dest, incr)
7284 switch (code = GET_CODE (x))
7288 counts[REGNO (x)] += incr;
7301 /* If we are clobbering a MEM, mark any registers inside the address
7303 if (GET_CODE (XEXP (x, 0)) == MEM)
7304 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7308 /* Unless we are setting a REG, count everything in SET_DEST. */
7309 if (GET_CODE (SET_DEST (x)) != REG)
7310 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7312 /* If SRC has side-effects, then we can't delete this insn, so the
7313 usage of SET_DEST inside SRC counts.
7315 ??? Strictly-speaking, we might be preserving this insn
7316 because some other SET has side-effects, but that's hard
7317 to do and can't happen now. */
7318 count_reg_usage (SET_SRC (x), counts,
7319 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7324 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7326 /* ... falls through ... */
7329 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7331 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7334 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7339 if (REG_NOTE_KIND (x) == REG_EQUAL
7340 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7341 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7342 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7349 fmt = GET_RTX_FORMAT (code);
7350 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7353 count_reg_usage (XEXP (x, i), counts, dest, incr);
7354 else if (fmt[i] == 'E')
7355 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7356 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7360 /* Scan all the insns and delete any that are dead; i.e., they store a register
7361 that is never used or they copy a register to itself.
7363 This is used to remove insns made obviously dead by cse, loop or other
7364 optimizations. It improves the heuristics in loop since it won't try to
7365 move dead invariants out of loops or make givs for dead quantities. The
7366 remaining passes of the compilation are also sped up. */
7369 delete_trivially_dead_insns (insns, nreg)
7373 int *counts = (int *) alloca (nreg * sizeof (int));
7379 int in_libcall = 0, dead_libcall = 0;
7381 /* First count the number of times each register is used. */
7382 bzero ((char *) counts, sizeof (int) * nreg);
7383 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7384 count_reg_usage (insn, counts, NULL_RTX, 1);
7386 /* Go from the last insn to the first and delete insns that only set unused
7387 registers or copy a register to itself. As we delete an insn, remove
7388 usage counts for registers it uses.
7390 The first jump optimization pass may leave a real insn as the last
7391 insn in the function. We must not skip that insn or we may end
7392 up deleting code that is not really dead. */
7393 insn = get_last_insn ();
7394 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7395 insn = prev_real_insn (insn);
7397 for ( ; insn; insn = prev)
7402 prev = prev_real_insn (insn);
7404 /* Don't delete any insns that are part of a libcall block unless
7405 we can delete the whole libcall block.
7407 Flow or loop might get confused if we did that. Remember
7408 that we are scanning backwards. */
7409 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7415 /* See if there's a REG_EQUAL note on this insn and try to
7416 replace the source with the REG_EQUAL expression.
7418 We assume that insns with REG_RETVALs can only be reg->reg
7419 copies at this point. */
7420 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7423 rtx set = single_set (insn);
7424 rtx new = simplify_rtx (XEXP (note, 0));
7427 new = XEXP (note, 0);
7429 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7432 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7437 else if (in_libcall)
7438 live_insn = ! dead_libcall;
7439 else if (GET_CODE (PATTERN (insn)) == SET)
7441 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
7442 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
7446 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7447 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7448 && ((tem = next_nonnote_insn (insn)) == 0
7449 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7450 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7453 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7454 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7455 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7456 || side_effects_p (SET_SRC (PATTERN (insn)))
7457 /* An ADDRESSOF expression can turn into a use of the
7458 internal arg pointer, so always consider the
7459 internal arg pointer live. If it is truly dead,
7460 flow will delete the initializing insn. */
7461 || (SET_DEST (PATTERN (insn))
7462 == current_function_internal_arg_pointer))
7465 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7466 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7468 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7470 if (GET_CODE (elt) == SET)
7472 if (GET_CODE (SET_DEST (elt)) == REG
7473 && SET_DEST (elt) == SET_SRC (elt))
7477 else if (GET_CODE (SET_DEST (elt)) == CC0
7478 && ! side_effects_p (SET_SRC (elt))
7479 && ((tem = next_nonnote_insn (insn)) == 0
7480 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7481 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7484 else if (GET_CODE (SET_DEST (elt)) != REG
7485 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7486 || counts[REGNO (SET_DEST (elt))] != 0
7487 || side_effects_p (SET_SRC (elt))
7488 /* An ADDRESSOF expression can turn into a use of the
7489 internal arg pointer, so always consider the
7490 internal arg pointer live. If it is truly dead,
7491 flow will delete the initializing insn. */
7493 == current_function_internal_arg_pointer))
7496 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7502 /* If this is a dead insn, delete it and show registers in it aren't
7507 count_reg_usage (insn, counts, NULL_RTX, -1);
7511 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))