1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 #include "splay-tree.h"
41 /* The basic idea of common subexpression elimination is to go
42 through the code, keeping a record of expressions that would
43 have the same value at the current scan point, and replacing
44 expressions encountered with the cheapest equivalent expression.
46 It is too complicated to keep track of the different possibilities
47 when control paths merge; so, at each label, we forget all that is
48 known and start fresh. This can be described as processing each
49 basic block separately. Note, however, that these are not quite
50 the same as the basic blocks found by a later pass and used for
51 data flow analysis and register packing. We do not need to start fresh
52 after a conditional jump instruction if there is no label there.
54 We use two data structures to record the equivalent expressions:
55 a hash table for most expressions, and several vectors together
56 with "quantity numbers" to record equivalent (pseudo) registers.
58 The use of the special data structure for registers is desirable
59 because it is faster. It is possible because registers references
60 contain a fairly small number, the register number, taken from
61 a contiguously allocated series, and two register references are
62 identical if they have the same number. General expressions
63 do not have any such thing, so the only way to retrieve the
64 information recorded on an expression other than a register
65 is to keep it in a hash table.
67 Registers and "quantity numbers":
69 At the start of each basic block, all of the (hardware and pseudo)
70 registers used in the function are given distinct quantity
71 numbers to indicate their contents. During scan, when the code
72 copies one register into another, we copy the quantity number.
73 When a register is loaded in any other way, we allocate a new
74 quantity number to describe the value generated by this operation.
75 `reg_qty' records what quantity a register is currently thought
78 All real quantity numbers are greater than or equal to `max_reg'.
79 If register N has not been assigned a quantity, reg_qty[N] will equal N.
81 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
82 variables should be referenced with an index below `max_reg'.
84 We also maintain a bidirectional chain of registers for each
85 quantity number. `qty_first_reg', `qty_last_reg',
86 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
88 The first register in a chain is the one whose lifespan is least local.
89 Among equals, it is the one that was seen first.
90 We replace any equivalent register with that one.
92 If two registers have the same quantity number, it must be true that
93 REG expressions with `qty_mode' must be in the hash table for both
94 registers and must be in the same class.
96 The converse is not true. Since hard registers may be referenced in
97 any mode, two REG expressions might be equivalent in the hash table
98 but not have the same quantity number if the quantity number of one
99 of the registers is not the same mode as those expressions.
101 Constants and quantity numbers
103 When a quantity has a known constant value, that value is stored
104 in the appropriate element of qty_const. This is in addition to
105 putting the constant in the hash table as is usual for non-regs.
107 Whether a reg or a constant is preferred is determined by the configuration
108 macro CONST_COSTS and will often depend on the constant value. In any
109 event, expressions containing constants can be simplified, by fold_rtx.
111 When a quantity has a known nearly constant value (such as an address
112 of a stack slot), that value is stored in the appropriate element
115 Integer constants don't have a machine mode. However, cse
116 determines the intended machine mode from the destination
117 of the instruction that moves the constant. The machine mode
118 is recorded in the hash table along with the actual RTL
119 constant expression so that different modes are kept separate.
123 To record known equivalences among expressions in general
124 we use a hash table called `table'. It has a fixed number of buckets
125 that contain chains of `struct table_elt' elements for expressions.
126 These chains connect the elements whose expressions have the same
129 Other chains through the same elements connect the elements which
130 currently have equivalent values.
132 Register references in an expression are canonicalized before hashing
133 the expression. This is done using `reg_qty' and `qty_first_reg'.
134 The hash code of a register reference is computed using the quantity
135 number, not the register number.
137 When the value of an expression changes, it is necessary to remove from the
138 hash table not just that expression but all expressions whose values
139 could be different as a result.
141 1. If the value changing is in memory, except in special cases
142 ANYTHING referring to memory could be changed. That is because
143 nobody knows where a pointer does not point.
144 The function `invalidate_memory' removes what is necessary.
146 The special cases are when the address is constant or is
147 a constant plus a fixed register such as the frame pointer
148 or a static chain pointer. When such addresses are stored in,
149 we can tell exactly which other such addresses must be invalidated
150 due to overlap. `invalidate' does this.
151 All expressions that refer to non-constant
152 memory addresses are also invalidated. `invalidate_memory' does this.
154 2. If the value changing is a register, all expressions
155 containing references to that register, and only those,
158 Because searching the entire hash table for expressions that contain
159 a register is very slow, we try to figure out when it isn't necessary.
160 Precisely, this is necessary only when expressions have been
161 entered in the hash table using this register, and then the value has
162 changed, and then another expression wants to be added to refer to
163 the register's new value. This sequence of circumstances is rare
164 within any one basic block.
166 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
167 reg_tick[i] is incremented whenever a value is stored in register i.
168 reg_in_table[i] holds -1 if no references to register i have been
169 entered in the table; otherwise, it contains the value reg_tick[i] had
170 when the references were entered. If we want to enter a reference
171 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
172 Until we want to enter a new entry, the mere fact that the two vectors
173 don't match makes the entries be ignored if anyone tries to match them.
175 Registers themselves are entered in the hash table as well as in
176 the equivalent-register chains. However, the vectors `reg_tick'
177 and `reg_in_table' do not apply to expressions which are simple
178 register references. These expressions are removed from the table
179 immediately when they become invalid, and this can be done even if
180 we do not immediately search for all the expressions that refer to
183 A CLOBBER rtx in an instruction invalidates its operand for further
184 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
185 invalidates everything that resides in memory.
189 Constant expressions that differ only by an additive integer
190 are called related. When a constant expression is put in
191 the table, the related expression with no constant term
192 is also entered. These are made to point at each other
193 so that it is possible to find out if there exists any
194 register equivalent to an expression related to a given expression. */
196 /* One plus largest register number used in this function. */
200 /* One plus largest instruction UID used in this function at time of
203 static int max_insn_uid;
205 /* Length of vectors indexed by quantity number.
206 We know in advance we will not need a quantity number this big. */
210 /* Next quantity number to be allocated.
211 This is 1 + the largest number needed so far. */
215 /* Indexed by quantity number, gives the first (or last) register
216 in the chain of registers that currently contain this quantity. */
218 static int *qty_first_reg;
219 static int *qty_last_reg;
221 /* Index by quantity number, gives the mode of the quantity. */
223 static enum machine_mode *qty_mode;
225 /* Indexed by quantity number, gives the rtx of the constant value of the
226 quantity, or zero if it does not have a known value.
227 A sum of the frame pointer (or arg pointer) plus a constant
228 can also be entered here. */
230 static rtx *qty_const;
232 /* Indexed by qty number, gives the insn that stored the constant value
233 recorded in `qty_const'. */
235 static rtx *qty_const_insn;
237 /* The next three variables are used to track when a comparison between a
238 quantity and some constant or register has been passed. In that case, we
239 know the results of the comparison in case we see it again. These variables
240 record a comparison that is known to be true. */
242 /* Indexed by qty number, gives the rtx code of a comparison with a known
243 result involving this quantity. If none, it is UNKNOWN. */
244 static enum rtx_code *qty_comparison_code;
246 /* Indexed by qty number, gives the constant being compared against in a
247 comparison of known result. If no such comparison, it is undefined.
248 If the comparison is not with a constant, it is zero. */
250 static rtx *qty_comparison_const;
252 /* Indexed by qty number, gives the quantity being compared against in a
253 comparison of known result. If no such comparison, if it undefined.
254 If the comparison is not with a register, it is -1. */
256 static int *qty_comparison_qty;
259 /* For machines that have a CC0, we do not record its value in the hash
260 table since its use is guaranteed to be the insn immediately following
261 its definition and any other insn is presumed to invalidate it.
263 Instead, we store below the value last assigned to CC0. If it should
264 happen to be a constant, it is stored in preference to the actual
265 assigned value. In case it is a constant, we store the mode in which
266 the constant should be interpreted. */
268 static rtx prev_insn_cc0;
269 static enum machine_mode prev_insn_cc0_mode;
272 /* Previous actual insn. 0 if at first insn of basic block. */
274 static rtx prev_insn;
276 /* Insn being scanned. */
278 static rtx this_insn;
280 /* Index by register number, gives the number of the next (or
281 previous) register in the chain of registers sharing the same
284 Or -1 if this register is at the end of the chain.
286 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
288 static int *reg_next_eqv;
289 static int *reg_prev_eqv;
291 struct cse_reg_info {
293 /* The number of times the register has been altered in the current
297 /* The next cse_reg_info structure in the free list. */
298 struct cse_reg_info* next;
301 /* The REG_TICK value at which rtx's containing this register are
302 valid in the hash table. If this does not equal the current
303 reg_tick value, such expressions existing in the hash table are
307 /* The quantity number of the register's current contents. */
311 /* A free list of cse_reg_info entries. */
312 static struct cse_reg_info *cse_reg_info_free_list;
314 /* A mapping from registers to cse_reg_info data structures. */
315 static splay_tree cse_reg_info_tree;
317 /* The last lookup we did into the cse_reg_info_tree. This allows us
318 to cache repeated lookups. */
319 static int cached_regno;
320 static struct cse_reg_info *cached_cse_reg_info;
322 /* A HARD_REG_SET containing all the hard registers for which there is
323 currently a REG expression in the hash table. Note the difference
324 from the above variables, which indicate if the REG is mentioned in some
325 expression in the table. */
327 static HARD_REG_SET hard_regs_in_table;
329 /* A HARD_REG_SET containing all the hard registers that are invalidated
332 static HARD_REG_SET regs_invalidated_by_call;
334 /* CUID of insn that starts the basic block currently being cse-processed. */
336 static int cse_basic_block_start;
338 /* CUID of insn that ends the basic block currently being cse-processed. */
340 static int cse_basic_block_end;
342 /* Vector mapping INSN_UIDs to cuids.
343 The cuids are like uids but increase monotonically always.
344 We use them to see whether a reg is used outside a given basic block. */
346 static int *uid_cuid;
348 /* Highest UID in UID_CUID. */
351 /* Get the cuid of an insn. */
353 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
355 /* Nonzero if cse has altered conditional jump insns
356 in such a way that jump optimization should be redone. */
358 static int cse_jumps_altered;
360 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
361 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
362 to put in the note. */
363 static int recorded_label_ref;
365 /* canon_hash stores 1 in do_not_record
366 if it notices a reference to CC0, PC, or some other volatile
369 static int do_not_record;
371 #ifdef LOAD_EXTEND_OP
373 /* Scratch rtl used when looking for load-extended copy of a MEM. */
374 static rtx memory_extend_rtx;
377 /* canon_hash stores 1 in hash_arg_in_memory
378 if it notices a reference to memory within the expression being hashed. */
380 static int hash_arg_in_memory;
382 /* canon_hash stores 1 in hash_arg_in_struct
383 if it notices a reference to memory that's part of a structure. */
385 static int hash_arg_in_struct;
387 /* The hash table contains buckets which are chains of `struct table_elt's,
388 each recording one expression's information.
389 That expression is in the `exp' field.
391 Those elements with the same hash code are chained in both directions
392 through the `next_same_hash' and `prev_same_hash' fields.
394 Each set of expressions with equivalent values
395 are on a two-way chain through the `next_same_value'
396 and `prev_same_value' fields, and all point with
397 the `first_same_value' field at the first element in
398 that chain. The chain is in order of increasing cost.
399 Each element's cost value is in its `cost' field.
401 The `in_memory' field is nonzero for elements that
402 involve any reference to memory. These elements are removed
403 whenever a write is done to an unidentified location in memory.
404 To be safe, we assume that a memory address is unidentified unless
405 the address is either a symbol constant or a constant plus
406 the frame pointer or argument pointer.
408 The `in_struct' field is nonzero for elements that
409 involve any reference to memory inside a structure or array.
411 The `related_value' field is used to connect related expressions
412 (that differ by adding an integer).
413 The related expressions are chained in a circular fashion.
414 `related_value' is zero for expressions for which this
417 The `cost' field stores the cost of this element's expression.
419 The `is_const' flag is set if the element is a constant (including
422 The `flag' field is used as a temporary during some search routines.
424 The `mode' field is usually the same as GET_MODE (`exp'), but
425 if `exp' is a CONST_INT and has no machine mode then the `mode'
426 field is the mode it was being used as. Each constant is
427 recorded separately for each mode it is used with. */
433 struct table_elt *next_same_hash;
434 struct table_elt *prev_same_hash;
435 struct table_elt *next_same_value;
436 struct table_elt *prev_same_value;
437 struct table_elt *first_same_value;
438 struct table_elt *related_value;
440 enum machine_mode mode;
447 /* We don't want a lot of buckets, because we rarely have very many
448 things stored in the hash table, and a lot of buckets slows
449 down a lot of loops that happen frequently. */
452 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
453 register (hard registers may require `do_not_record' to be set). */
456 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
457 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
458 : canon_hash (X, M) % NBUCKETS)
460 /* Determine whether register number N is considered a fixed register for CSE.
461 It is desirable to replace other regs with fixed regs, to reduce need for
463 A reg wins if it is either the frame pointer or designated as fixed,
464 but not if it is an overlapping register. */
465 #ifdef OVERLAPPING_REGNO_P
466 #define FIXED_REGNO_P(N) \
467 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
468 || fixed_regs[N] || global_regs[N]) \
469 && ! OVERLAPPING_REGNO_P ((N)))
471 #define FIXED_REGNO_P(N) \
472 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
473 || fixed_regs[N] || global_regs[N])
476 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
477 hard registers and pointers into the frame are the cheapest with a cost
478 of 0. Next come pseudos with a cost of one and other hard registers with
479 a cost of 2. Aside from these special cases, call `rtx_cost'. */
481 #define CHEAP_REGNO(N) \
482 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
483 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
484 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
485 || ((N) < FIRST_PSEUDO_REGISTER \
486 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
488 /* A register is cheap if it is a user variable assigned to the register
489 or if its register number always corresponds to a cheap register. */
491 #define CHEAP_REG(N) \
492 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
493 || CHEAP_REGNO (REGNO (N)))
496 (GET_CODE (X) == REG \
497 ? (CHEAP_REG (X) ? 0 \
498 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
502 /* Get the info associated with register N. */
504 #define GET_CSE_REG_INFO(N) \
505 (((N) == cached_regno && cached_cse_reg_info) \
506 ? cached_cse_reg_info : get_cse_reg_info ((N)))
508 /* Get the number of times this register has been updated in this
511 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->variant.reg_tick)
513 /* Get the point at which REG was recorded in the table. */
515 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
517 /* Get the quantity number for REG. */
519 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
521 /* Determine if the quantity number for register X represents a valid index
522 into the `qty_...' variables. */
524 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
527 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
528 during CSE, such nodes are present. Using an ADDRESSOF node which
529 refers to the address of a REG is a good thing because we can then
530 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
531 #define CSE_ADDRESS_COST(RTX) \
532 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
533 ? -1 : ADDRESS_COST(RTX))
536 static struct table_elt *table[NBUCKETS];
538 /* Chain of `struct table_elt's made so far for this function
539 but currently removed from the table. */
541 static struct table_elt *free_element_chain;
543 /* Number of `struct table_elt' structures made so far for this function. */
545 static int n_elements_made;
547 /* Maximum value `n_elements_made' has had so far in this compilation
548 for functions previously processed. */
550 static int max_elements_made;
552 /* Surviving equivalence class when two equivalence classes are merged
553 by recording the effects of a jump in the last insn. Zero if the
554 last insn was not a conditional jump. */
556 static struct table_elt *last_jump_equiv_class;
558 /* Set to the cost of a constant pool reference if one was found for a
559 symbolic constant. If this was found, it means we should try to
560 convert constants into constant pool entries if they don't fit in
563 static int constant_pool_entries_cost;
565 /* Define maximum length of a branch path. */
567 #define PATHLENGTH 10
569 /* This data describes a block that will be processed by cse_basic_block. */
571 struct cse_basic_block_data {
572 /* Lowest CUID value of insns in block. */
574 /* Highest CUID value of insns in block. */
576 /* Total number of SETs in block. */
578 /* Last insn in the block. */
580 /* Size of current branch path, if any. */
582 /* Current branch path, indicating which branches will be taken. */
584 /* The branch insn. */
586 /* Whether it should be taken or not. AROUND is the same as taken
587 except that it is used when the destination label is not preceded
589 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
593 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
594 virtual regs here because the simplify_*_operation routines are called
595 by integrate.c, which is called before virtual register instantiation. */
597 #define FIXED_BASE_PLUS_P(X) \
598 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
599 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
600 || (X) == virtual_stack_vars_rtx \
601 || (X) == virtual_incoming_args_rtx \
602 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
603 && (XEXP (X, 0) == frame_pointer_rtx \
604 || XEXP (X, 0) == hard_frame_pointer_rtx \
605 || ((X) == arg_pointer_rtx \
606 && fixed_regs[ARG_POINTER_REGNUM]) \
607 || XEXP (X, 0) == virtual_stack_vars_rtx \
608 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
609 || GET_CODE (X) == ADDRESSOF)
611 /* Similar, but also allows reference to the stack pointer.
613 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
614 arg_pointer_rtx by itself is nonzero, because on at least one machine,
615 the i960, the arg pointer is zero when it is unused. */
617 #define NONZERO_BASE_PLUS_P(X) \
618 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
619 || (X) == virtual_stack_vars_rtx \
620 || (X) == virtual_incoming_args_rtx \
621 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
622 && (XEXP (X, 0) == frame_pointer_rtx \
623 || XEXP (X, 0) == hard_frame_pointer_rtx \
624 || ((X) == arg_pointer_rtx \
625 && fixed_regs[ARG_POINTER_REGNUM]) \
626 || XEXP (X, 0) == virtual_stack_vars_rtx \
627 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
628 || (X) == stack_pointer_rtx \
629 || (X) == virtual_stack_dynamic_rtx \
630 || (X) == virtual_outgoing_args_rtx \
631 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
632 && (XEXP (X, 0) == stack_pointer_rtx \
633 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
634 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
635 || GET_CODE (X) == ADDRESSOF)
637 static int notreg_cost PROTO((rtx));
638 static void new_basic_block PROTO((void));
639 static void make_new_qty PROTO((int));
640 static void make_regs_eqv PROTO((int, int));
641 static void delete_reg_equiv PROTO((int));
642 static int mention_regs PROTO((rtx));
643 static int insert_regs PROTO((rtx, struct table_elt *, int));
644 static void free_element PROTO((struct table_elt *));
645 static void remove_from_table PROTO((struct table_elt *, unsigned));
646 static struct table_elt *get_element PROTO((void));
647 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
648 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
649 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
650 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
652 static void merge_equiv_classes PROTO((struct table_elt *,
653 struct table_elt *));
654 static void invalidate PROTO((rtx, enum machine_mode));
655 static int cse_rtx_varies_p PROTO((rtx));
656 static void remove_invalid_refs PROTO((int));
657 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
658 static void rehash_using_reg PROTO((rtx));
659 static void invalidate_memory PROTO((void));
660 static void invalidate_for_call PROTO((void));
661 static rtx use_related_value PROTO((rtx, struct table_elt *));
662 static unsigned canon_hash PROTO((rtx, enum machine_mode));
663 static unsigned safe_hash PROTO((rtx, enum machine_mode));
664 static int exp_equiv_p PROTO((rtx, rtx, int, int));
665 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
668 static int refers_to_p PROTO((rtx, rtx));
669 static rtx canon_reg PROTO((rtx, rtx));
670 static void find_best_addr PROTO((rtx, rtx *));
671 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
673 enum machine_mode *));
674 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
676 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
678 static rtx fold_rtx PROTO((rtx, rtx));
679 static rtx equiv_constant PROTO((rtx));
680 static void record_jump_equiv PROTO((rtx, int));
681 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
683 static void cse_insn PROTO((rtx, rtx));
684 static int note_mem_written PROTO((rtx));
685 static void invalidate_from_clobbers PROTO((rtx));
686 static rtx cse_process_notes PROTO((rtx, rtx));
687 static void cse_around_loop PROTO((rtx));
688 static void invalidate_skipped_set PROTO((rtx, rtx));
689 static void invalidate_skipped_block PROTO((rtx));
690 static void cse_check_loop_start PROTO((rtx, rtx));
691 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
692 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
693 static void count_reg_usage PROTO((rtx, int *, rtx, int));
694 extern void dump_class PROTO((struct table_elt*));
695 static void check_fold_consts PROTO((PTR));
696 static struct cse_reg_info* get_cse_reg_info PROTO((int));
697 static void free_cse_reg_info PROTO((splay_tree_value));
698 static void flush_hash_table PROTO((void));
700 /* Dump the expressions in the equivalence class indicated by CLASSP.
701 This function is used only for debugging. */
704 struct table_elt *classp;
706 struct table_elt *elt;
708 fprintf (stderr, "Equivalence chain for ");
709 print_rtl (stderr, classp->exp);
710 fprintf (stderr, ": \n");
712 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
714 print_rtl (stderr, elt->exp);
715 fprintf (stderr, "\n");
719 /* Return an estimate of the cost of computing rtx X.
720 One use is in cse, to decide which expression to keep in the hash table.
721 Another is in rtl generation, to pick the cheapest way to multiply.
722 Other uses like the latter are expected in the future. */
724 /* Internal function, to compute cost when X is not a register; called
725 from COST macro to keep it simple. */
731 return ((GET_CODE (x) == SUBREG
732 && GET_CODE (SUBREG_REG (x)) == REG
733 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
734 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
735 && (GET_MODE_SIZE (GET_MODE (x))
736 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
737 && subreg_lowpart_p (x)
738 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
739 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
740 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
741 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
743 : rtx_cost (x, SET) * 2);
746 /* Return the right cost to give to an operation
747 to make the cost of the corresponding register-to-register instruction
748 N times that of a fast register-to-register instruction. */
750 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
753 rtx_cost (x, outer_code)
755 enum rtx_code outer_code ATTRIBUTE_UNUSED;
758 register enum rtx_code code;
759 register const char *fmt;
765 /* Compute the default costs of certain things.
766 Note that RTX_COSTS can override the defaults. */
772 /* Count multiplication by 2**n as a shift,
773 because if we are considering it, we would output it as a shift. */
774 if (GET_CODE (XEXP (x, 1)) == CONST_INT
775 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
778 total = COSTS_N_INSNS (5);
784 total = COSTS_N_INSNS (7);
787 /* Used in loop.c and combine.c as a marker. */
791 /* We don't want these to be used in substitutions because
792 we have no way of validating the resulting insn. So assign
793 anything containing an ASM_OPERANDS a very high cost. */
803 return ! CHEAP_REG (x);
806 /* If we can't tie these modes, make this expensive. The larger
807 the mode, the more expensive it is. */
808 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
809 return COSTS_N_INSNS (2
810 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
813 RTX_COSTS (x, code, outer_code);
816 CONST_COSTS (x, code, outer_code);
820 #ifdef DEFAULT_RTX_COSTS
821 DEFAULT_RTX_COSTS(x, code, outer_code);
826 /* Sum the costs of the sub-rtx's, plus cost of this operation,
827 which is already in total. */
829 fmt = GET_RTX_FORMAT (code);
830 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
832 total += rtx_cost (XEXP (x, i), code);
833 else if (fmt[i] == 'E')
834 for (j = 0; j < XVECLEN (x, i); j++)
835 total += rtx_cost (XVECEXP (x, i, j), code);
840 static struct cse_reg_info *
841 get_cse_reg_info (regno)
844 struct cse_reg_info *cri;
847 /* See if we already have this entry. */
848 n = splay_tree_lookup (cse_reg_info_tree,
849 (splay_tree_key) regno);
851 cri = (struct cse_reg_info *) (n->value);
854 /* Get a new cse_reg_info structure. */
855 if (cse_reg_info_free_list)
857 cri = cse_reg_info_free_list;
858 cse_reg_info_free_list = cri->variant.next;
861 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
864 cri->variant.reg_tick = 0;
865 cri->reg_in_table = -1;
866 cri->reg_qty = regno;
868 splay_tree_insert (cse_reg_info_tree,
869 (splay_tree_key) regno,
870 (splay_tree_value) cri);
873 /* Cache this lookup; we tend to be looking up information about the
874 same register several times in a row. */
875 cached_regno = regno;
876 cached_cse_reg_info = cri;
882 free_cse_reg_info (v)
885 struct cse_reg_info *cri = (struct cse_reg_info *) v;
887 cri->variant.next = cse_reg_info_free_list;
888 cse_reg_info_free_list = cri;
891 /* Clear the hash table and initialize each register with its own quantity,
892 for a new basic block. */
901 if (cse_reg_info_tree)
903 splay_tree_delete (cse_reg_info_tree);
904 cached_cse_reg_info = 0;
907 cse_reg_info_tree = splay_tree_new (splay_tree_compare_ints, 0,
910 CLEAR_HARD_REG_SET (hard_regs_in_table);
912 /* The per-quantity values used to be initialized here, but it is
913 much faster to initialize each as it is made in `make_new_qty'. */
915 for (i = 0; i < NBUCKETS; i++)
917 register struct table_elt *this, *next;
918 for (this = table[i]; this; this = next)
920 next = this->next_same_hash;
925 bzero ((char *) table, sizeof table);
934 /* Say that register REG contains a quantity not in any register before
935 and initialize that quantity. */
943 if (next_qty >= max_qty)
946 q = REG_QTY (reg) = next_qty++;
947 qty_first_reg[q] = reg;
948 qty_last_reg[q] = reg;
949 qty_const[q] = qty_const_insn[q] = 0;
950 qty_comparison_code[q] = UNKNOWN;
952 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
955 /* Make reg NEW equivalent to reg OLD.
956 OLD is not changing; NEW is. */
959 make_regs_eqv (new, old)
960 register int new, old;
962 register int lastr, firstr;
963 register int q = REG_QTY (old);
965 /* Nothing should become eqv until it has a "non-invalid" qty number. */
966 if (! REGNO_QTY_VALID_P (old))
970 firstr = qty_first_reg[q];
971 lastr = qty_last_reg[q];
973 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
974 hard regs. Among pseudos, if NEW will live longer than any other reg
975 of the same qty, and that is beyond the current basic block,
976 make it the new canonical replacement for this qty. */
977 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
978 /* Certain fixed registers might be of the class NO_REGS. This means
979 that not only can they not be allocated by the compiler, but
980 they cannot be used in substitutions or canonicalizations
982 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
983 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
984 || (new >= FIRST_PSEUDO_REGISTER
985 && (firstr < FIRST_PSEUDO_REGISTER
986 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
987 || (uid_cuid[REGNO_FIRST_UID (new)]
988 < cse_basic_block_start))
989 && (uid_cuid[REGNO_LAST_UID (new)]
990 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
992 reg_prev_eqv[firstr] = new;
993 reg_next_eqv[new] = firstr;
994 reg_prev_eqv[new] = -1;
995 qty_first_reg[q] = new;
999 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1000 Otherwise, insert before any non-fixed hard regs that are at the
1001 end. Registers of class NO_REGS cannot be used as an
1002 equivalent for anything. */
1003 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1004 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1005 && new >= FIRST_PSEUDO_REGISTER)
1006 lastr = reg_prev_eqv[lastr];
1007 reg_next_eqv[new] = reg_next_eqv[lastr];
1008 if (reg_next_eqv[lastr] >= 0)
1009 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1011 qty_last_reg[q] = new;
1012 reg_next_eqv[lastr] = new;
1013 reg_prev_eqv[new] = lastr;
1017 /* Remove REG from its equivalence class. */
1020 delete_reg_equiv (reg)
1023 register int q = REG_QTY (reg);
1026 /* If invalid, do nothing. */
1030 p = reg_prev_eqv[reg];
1031 n = reg_next_eqv[reg];
1034 reg_prev_eqv[n] = p;
1036 qty_last_reg[q] = p;
1038 reg_next_eqv[p] = n;
1040 qty_first_reg[q] = n;
1042 REG_QTY (reg) = reg;
1045 /* Remove any invalid expressions from the hash table
1046 that refer to any of the registers contained in expression X.
1048 Make sure that newly inserted references to those registers
1049 as subexpressions will be considered valid.
1051 mention_regs is not called when a register itself
1052 is being stored in the table.
1054 Return 1 if we have done something that may have changed the hash code
1061 register enum rtx_code code;
1063 register const char *fmt;
1064 register int changed = 0;
1069 code = GET_CODE (x);
1072 register int regno = REGNO (x);
1073 register int endregno
1074 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1075 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1078 for (i = regno; i < endregno; i++)
1080 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1081 remove_invalid_refs (i);
1083 REG_IN_TABLE (i) = REG_TICK (i);
1089 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1090 pseudo if they don't use overlapping words. We handle only pseudos
1091 here for simplicity. */
1092 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1093 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1095 int i = REGNO (SUBREG_REG (x));
1097 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1099 /* If reg_tick has been incremented more than once since
1100 reg_in_table was last set, that means that the entire
1101 register has been set before, so discard anything memorized
1102 for the entrire register, including all SUBREG expressions. */
1103 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1104 remove_invalid_refs (i);
1106 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1109 REG_IN_TABLE (i) = REG_TICK (i);
1113 /* If X is a comparison or a COMPARE and either operand is a register
1114 that does not have a quantity, give it one. This is so that a later
1115 call to record_jump_equiv won't cause X to be assigned a different
1116 hash code and not found in the table after that call.
1118 It is not necessary to do this here, since rehash_using_reg can
1119 fix up the table later, but doing this here eliminates the need to
1120 call that expensive function in the most common case where the only
1121 use of the register is in the comparison. */
1123 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1125 if (GET_CODE (XEXP (x, 0)) == REG
1126 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1127 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1129 rehash_using_reg (XEXP (x, 0));
1133 if (GET_CODE (XEXP (x, 1)) == REG
1134 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1135 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1137 rehash_using_reg (XEXP (x, 1));
1142 fmt = GET_RTX_FORMAT (code);
1143 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1145 changed |= mention_regs (XEXP (x, i));
1146 else if (fmt[i] == 'E')
1147 for (j = 0; j < XVECLEN (x, i); j++)
1148 changed |= mention_regs (XVECEXP (x, i, j));
1153 /* Update the register quantities for inserting X into the hash table
1154 with a value equivalent to CLASSP.
1155 (If the class does not contain a REG, it is irrelevant.)
1156 If MODIFIED is nonzero, X is a destination; it is being modified.
1157 Note that delete_reg_equiv should be called on a register
1158 before insert_regs is done on that register with MODIFIED != 0.
1160 Nonzero value means that elements of reg_qty have changed
1161 so X's hash code may be different. */
1164 insert_regs (x, classp, modified)
1166 struct table_elt *classp;
1169 if (GET_CODE (x) == REG)
1171 register int regno = REGNO (x);
1173 /* If REGNO is in the equivalence table already but is of the
1174 wrong mode for that equivalence, don't do anything here. */
1176 if (REGNO_QTY_VALID_P (regno)
1177 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1180 if (modified || ! REGNO_QTY_VALID_P (regno))
1183 for (classp = classp->first_same_value;
1185 classp = classp->next_same_value)
1186 if (GET_CODE (classp->exp) == REG
1187 && GET_MODE (classp->exp) == GET_MODE (x))
1189 make_regs_eqv (regno, REGNO (classp->exp));
1193 make_new_qty (regno);
1194 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1201 /* If X is a SUBREG, we will likely be inserting the inner register in the
1202 table. If that register doesn't have an assigned quantity number at
1203 this point but does later, the insertion that we will be doing now will
1204 not be accessible because its hash code will have changed. So assign
1205 a quantity number now. */
1207 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1208 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1210 int regno = REGNO (SUBREG_REG (x));
1212 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1213 /* Mention_regs checks if REG_TICK is exactly one larger than
1214 REG_IN_TABLE to find out if there was only a single preceding
1215 invalidation - for the SUBREG - or another one, which would be
1216 for the full register. Since we don't invalidate the SUBREG
1217 here first, we might have to bump up REG_TICK so that mention_regs
1218 will do the right thing. */
1219 if (REG_IN_TABLE (regno) >= 0
1220 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1226 return mention_regs (x);
1229 /* Look in or update the hash table. */
1231 /* Put the element ELT on the list of free elements. */
1235 struct table_elt *elt;
1237 elt->next_same_hash = free_element_chain;
1238 free_element_chain = elt;
1241 /* Return an element that is free for use. */
1243 static struct table_elt *
1246 struct table_elt *elt = free_element_chain;
1249 free_element_chain = elt->next_same_hash;
1253 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1256 /* Remove table element ELT from use in the table.
1257 HASH is its hash code, made using the HASH macro.
1258 It's an argument because often that is known in advance
1259 and we save much time not recomputing it. */
1262 remove_from_table (elt, hash)
1263 register struct table_elt *elt;
1269 /* Mark this element as removed. See cse_insn. */
1270 elt->first_same_value = 0;
1272 /* Remove the table element from its equivalence class. */
1275 register struct table_elt *prev = elt->prev_same_value;
1276 register struct table_elt *next = elt->next_same_value;
1278 if (next) next->prev_same_value = prev;
1281 prev->next_same_value = next;
1284 register struct table_elt *newfirst = next;
1287 next->first_same_value = newfirst;
1288 next = next->next_same_value;
1293 /* Remove the table element from its hash bucket. */
1296 register struct table_elt *prev = elt->prev_same_hash;
1297 register struct table_elt *next = elt->next_same_hash;
1299 if (next) next->prev_same_hash = prev;
1302 prev->next_same_hash = next;
1303 else if (table[hash] == elt)
1307 /* This entry is not in the proper hash bucket. This can happen
1308 when two classes were merged by `merge_equiv_classes'. Search
1309 for the hash bucket that it heads. This happens only very
1310 rarely, so the cost is acceptable. */
1311 for (hash = 0; hash < NBUCKETS; hash++)
1312 if (table[hash] == elt)
1317 /* Remove the table element from its related-value circular chain. */
1319 if (elt->related_value != 0 && elt->related_value != elt)
1321 register struct table_elt *p = elt->related_value;
1322 while (p->related_value != elt)
1323 p = p->related_value;
1324 p->related_value = elt->related_value;
1325 if (p->related_value == p)
1326 p->related_value = 0;
1332 /* Look up X in the hash table and return its table element,
1333 or 0 if X is not in the table.
1335 MODE is the machine-mode of X, or if X is an integer constant
1336 with VOIDmode then MODE is the mode with which X will be used.
1338 Here we are satisfied to find an expression whose tree structure
1341 static struct table_elt *
1342 lookup (x, hash, mode)
1345 enum machine_mode mode;
1347 register struct table_elt *p;
1349 for (p = table[hash]; p; p = p->next_same_hash)
1350 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1351 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1357 /* Like `lookup' but don't care whether the table element uses invalid regs.
1358 Also ignore discrepancies in the machine mode of a register. */
1360 static struct table_elt *
1361 lookup_for_remove (x, hash, mode)
1364 enum machine_mode mode;
1366 register struct table_elt *p;
1368 if (GET_CODE (x) == REG)
1370 int regno = REGNO (x);
1371 /* Don't check the machine mode when comparing registers;
1372 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1373 for (p = table[hash]; p; p = p->next_same_hash)
1374 if (GET_CODE (p->exp) == REG
1375 && REGNO (p->exp) == regno)
1380 for (p = table[hash]; p; p = p->next_same_hash)
1381 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1388 /* Look for an expression equivalent to X and with code CODE.
1389 If one is found, return that expression. */
1392 lookup_as_function (x, code)
1396 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1398 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1399 long as we are narrowing. So if we looked in vain for a mode narrower
1400 than word_mode before, look for word_mode now. */
1401 if (p == 0 && code == CONST_INT
1402 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1405 PUT_MODE (x, word_mode);
1406 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1412 for (p = p->first_same_value; p; p = p->next_same_value)
1414 if (GET_CODE (p->exp) == code
1415 /* Make sure this is a valid entry in the table. */
1416 && exp_equiv_p (p->exp, p->exp, 1, 0))
1423 /* Insert X in the hash table, assuming HASH is its hash code
1424 and CLASSP is an element of the class it should go in
1425 (or 0 if a new class should be made).
1426 It is inserted at the proper position to keep the class in
1427 the order cheapest first.
1429 MODE is the machine-mode of X, or if X is an integer constant
1430 with VOIDmode then MODE is the mode with which X will be used.
1432 For elements of equal cheapness, the most recent one
1433 goes in front, except that the first element in the list
1434 remains first unless a cheaper element is added. The order of
1435 pseudo-registers does not matter, as canon_reg will be called to
1436 find the cheapest when a register is retrieved from the table.
1438 The in_memory field in the hash table element is set to 0.
1439 The caller must set it nonzero if appropriate.
1441 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1442 and if insert_regs returns a nonzero value
1443 you must then recompute its hash code before calling here.
1445 If necessary, update table showing constant values of quantities. */
1447 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1449 static struct table_elt *
1450 insert (x, classp, hash, mode)
1452 register struct table_elt *classp;
1454 enum machine_mode mode;
1456 register struct table_elt *elt;
1458 /* If X is a register and we haven't made a quantity for it,
1459 something is wrong. */
1460 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1463 /* If X is a hard register, show it is being put in the table. */
1464 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1466 int regno = REGNO (x);
1467 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1470 for (i = regno; i < endregno; i++)
1471 SET_HARD_REG_BIT (hard_regs_in_table, i);
1474 /* If X is a label, show we recorded it. */
1475 if (GET_CODE (x) == LABEL_REF
1476 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1477 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1478 recorded_label_ref = 1;
1480 /* Put an element for X into the right hash bucket. */
1482 elt = get_element ();
1484 elt->cost = COST (x);
1485 elt->next_same_value = 0;
1486 elt->prev_same_value = 0;
1487 elt->next_same_hash = table[hash];
1488 elt->prev_same_hash = 0;
1489 elt->related_value = 0;
1492 elt->is_const = (CONSTANT_P (x)
1493 /* GNU C++ takes advantage of this for `this'
1494 (and other const values). */
1495 || (RTX_UNCHANGING_P (x)
1496 && GET_CODE (x) == REG
1497 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1498 || FIXED_BASE_PLUS_P (x));
1501 table[hash]->prev_same_hash = elt;
1504 /* Put it into the proper value-class. */
1507 classp = classp->first_same_value;
1508 if (CHEAPER (elt, classp))
1509 /* Insert at the head of the class */
1511 register struct table_elt *p;
1512 elt->next_same_value = classp;
1513 classp->prev_same_value = elt;
1514 elt->first_same_value = elt;
1516 for (p = classp; p; p = p->next_same_value)
1517 p->first_same_value = elt;
1521 /* Insert not at head of the class. */
1522 /* Put it after the last element cheaper than X. */
1523 register struct table_elt *p, *next;
1524 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1526 /* Put it after P and before NEXT. */
1527 elt->next_same_value = next;
1529 next->prev_same_value = elt;
1530 elt->prev_same_value = p;
1531 p->next_same_value = elt;
1532 elt->first_same_value = classp;
1536 elt->first_same_value = elt;
1538 /* If this is a constant being set equivalent to a register or a register
1539 being set equivalent to a constant, note the constant equivalence.
1541 If this is a constant, it cannot be equivalent to a different constant,
1542 and a constant is the only thing that can be cheaper than a register. So
1543 we know the register is the head of the class (before the constant was
1546 If this is a register that is not already known equivalent to a
1547 constant, we must check the entire class.
1549 If this is a register that is already known equivalent to an insn,
1550 update `qty_const_insn' to show that `this_insn' is the latest
1551 insn making that quantity equivalent to the constant. */
1553 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1554 && GET_CODE (x) != REG)
1556 qty_const[REG_QTY (REGNO (classp->exp))]
1557 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1558 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1561 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1564 register struct table_elt *p;
1566 for (p = classp; p != 0; p = p->next_same_value)
1568 if (p->is_const && GET_CODE (p->exp) != REG)
1570 qty_const[REG_QTY (REGNO (x))]
1571 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1572 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1578 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1579 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1580 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1582 /* If this is a constant with symbolic value,
1583 and it has a term with an explicit integer value,
1584 link it up with related expressions. */
1585 if (GET_CODE (x) == CONST)
1587 rtx subexp = get_related_value (x);
1589 struct table_elt *subelt, *subelt_prev;
1593 /* Get the integer-free subexpression in the hash table. */
1594 subhash = safe_hash (subexp, mode) % NBUCKETS;
1595 subelt = lookup (subexp, subhash, mode);
1597 subelt = insert (subexp, NULL_PTR, subhash, mode);
1598 /* Initialize SUBELT's circular chain if it has none. */
1599 if (subelt->related_value == 0)
1600 subelt->related_value = subelt;
1601 /* Find the element in the circular chain that precedes SUBELT. */
1602 subelt_prev = subelt;
1603 while (subelt_prev->related_value != subelt)
1604 subelt_prev = subelt_prev->related_value;
1605 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1606 This way the element that follows SUBELT is the oldest one. */
1607 elt->related_value = subelt_prev->related_value;
1608 subelt_prev->related_value = elt;
1615 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1616 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1617 the two classes equivalent.
1619 CLASS1 will be the surviving class; CLASS2 should not be used after this
1622 Any invalid entries in CLASS2 will not be copied. */
1625 merge_equiv_classes (class1, class2)
1626 struct table_elt *class1, *class2;
1628 struct table_elt *elt, *next, *new;
1630 /* Ensure we start with the head of the classes. */
1631 class1 = class1->first_same_value;
1632 class2 = class2->first_same_value;
1634 /* If they were already equal, forget it. */
1635 if (class1 == class2)
1638 for (elt = class2; elt; elt = next)
1642 enum machine_mode mode = elt->mode;
1644 next = elt->next_same_value;
1646 /* Remove old entry, make a new one in CLASS1's class.
1647 Don't do this for invalid entries as we cannot find their
1648 hash code (it also isn't necessary). */
1649 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1651 hash_arg_in_memory = 0;
1652 hash_arg_in_struct = 0;
1653 hash = HASH (exp, mode);
1655 if (GET_CODE (exp) == REG)
1656 delete_reg_equiv (REGNO (exp));
1658 remove_from_table (elt, hash);
1660 if (insert_regs (exp, class1, 0))
1662 rehash_using_reg (exp);
1663 hash = HASH (exp, mode);
1665 new = insert (exp, class1, hash, mode);
1666 new->in_memory = hash_arg_in_memory;
1667 new->in_struct = hash_arg_in_struct;
1673 /* Flush the entire hash table. */
1679 struct table_elt *p;
1681 for (i = 0; i < NBUCKETS; i++)
1682 for (p = table[i]; p; p = table[i])
1684 /* Note that invalidate can remove elements
1685 after P in the current hash chain. */
1686 if (GET_CODE (p->exp) == REG)
1687 invalidate (p->exp, p->mode);
1689 remove_from_table (p, i);
1694 /* Remove from the hash table, or mark as invalid,
1695 all expressions whose values could be altered by storing in X.
1696 X is a register, a subreg, or a memory reference with nonvarying address
1697 (because, when a memory reference with a varying address is stored in,
1698 all memory references are removed by invalidate_memory
1699 so specific invalidation is superfluous).
1700 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1701 instead of just the amount indicated by the mode of X. This is only used
1702 for bitfield stores into memory.
1704 A nonvarying address may be just a register or just
1705 a symbol reference, or it may be either of those plus
1706 a numeric offset. */
1709 invalidate (x, full_mode)
1711 enum machine_mode full_mode;
1714 register struct table_elt *p;
1716 /* If X is a register, dependencies on its contents
1717 are recorded through the qty number mechanism.
1718 Just change the qty number of the register,
1719 mark it as invalid for expressions that refer to it,
1720 and remove it itself. */
1722 if (GET_CODE (x) == REG)
1724 register int regno = REGNO (x);
1725 register unsigned hash = HASH (x, GET_MODE (x));
1727 /* Remove REGNO from any quantity list it might be on and indicate
1728 that its value might have changed. If it is a pseudo, remove its
1729 entry from the hash table.
1731 For a hard register, we do the first two actions above for any
1732 additional hard registers corresponding to X. Then, if any of these
1733 registers are in the table, we must remove any REG entries that
1734 overlap these registers. */
1736 delete_reg_equiv (regno);
1739 if (regno >= FIRST_PSEUDO_REGISTER)
1741 /* Because a register can be referenced in more than one mode,
1742 we might have to remove more than one table entry. */
1744 struct table_elt *elt;
1746 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1747 remove_from_table (elt, hash);
1751 HOST_WIDE_INT in_table
1752 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1753 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1754 int tregno, tendregno;
1755 register struct table_elt *p, *next;
1757 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1759 for (i = regno + 1; i < endregno; i++)
1761 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1762 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1763 delete_reg_equiv (i);
1768 for (hash = 0; hash < NBUCKETS; hash++)
1769 for (p = table[hash]; p; p = next)
1771 next = p->next_same_hash;
1773 if (GET_CODE (p->exp) != REG
1774 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1777 tregno = REGNO (p->exp);
1779 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1780 if (tendregno > regno && tregno < endregno)
1781 remove_from_table (p, hash);
1788 if (GET_CODE (x) == SUBREG)
1790 if (GET_CODE (SUBREG_REG (x)) != REG)
1792 invalidate (SUBREG_REG (x), VOIDmode);
1796 /* If X is a parallel, invalidate all of its elements. */
1798 if (GET_CODE (x) == PARALLEL)
1800 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1801 invalidate (XVECEXP (x, 0, i), VOIDmode);
1805 /* If X is an expr_list, this is part of a disjoint return value;
1806 extract the location in question ignoring the offset. */
1808 if (GET_CODE (x) == EXPR_LIST)
1810 invalidate (XEXP (x, 0), VOIDmode);
1814 /* X is not a register; it must be a memory reference with
1815 a nonvarying address. Remove all hash table elements
1816 that refer to overlapping pieces of memory. */
1818 if (GET_CODE (x) != MEM)
1821 if (full_mode == VOIDmode)
1822 full_mode = GET_MODE (x);
1824 for (i = 0; i < NBUCKETS; i++)
1826 register struct table_elt *next;
1827 for (p = table[i]; p; p = next)
1829 next = p->next_same_hash;
1830 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1831 than checking all the aliases). */
1833 && (GET_CODE (p->exp) != MEM
1834 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1835 remove_from_table (p, i);
1840 /* Remove all expressions that refer to register REGNO,
1841 since they are already invalid, and we are about to
1842 mark that register valid again and don't want the old
1843 expressions to reappear as valid. */
1846 remove_invalid_refs (regno)
1850 register struct table_elt *p, *next;
1852 for (i = 0; i < NBUCKETS; i++)
1853 for (p = table[i]; p; p = next)
1855 next = p->next_same_hash;
1856 if (GET_CODE (p->exp) != REG
1857 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1858 remove_from_table (p, i);
1862 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1864 remove_invalid_subreg_refs (regno, word, mode)
1867 enum machine_mode mode;
1870 register struct table_elt *p, *next;
1871 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1873 for (i = 0; i < NBUCKETS; i++)
1874 for (p = table[i]; p; p = next)
1877 next = p->next_same_hash;
1880 if (GET_CODE (p->exp) != REG
1881 && (GET_CODE (exp) != SUBREG
1882 || GET_CODE (SUBREG_REG (exp)) != REG
1883 || REGNO (SUBREG_REG (exp)) != regno
1884 || (((SUBREG_WORD (exp)
1885 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1887 && SUBREG_WORD (exp) <= end))
1888 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1889 remove_from_table (p, i);
1893 /* Recompute the hash codes of any valid entries in the hash table that
1894 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1896 This is called when we make a jump equivalence. */
1899 rehash_using_reg (x)
1903 struct table_elt *p, *next;
1906 if (GET_CODE (x) == SUBREG)
1909 /* If X is not a register or if the register is known not to be in any
1910 valid entries in the table, we have no work to do. */
1912 if (GET_CODE (x) != REG
1913 || REG_IN_TABLE (REGNO (x)) < 0
1914 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1917 /* Scan all hash chains looking for valid entries that mention X.
1918 If we find one and it is in the wrong hash chain, move it. We can skip
1919 objects that are registers, since they are handled specially. */
1921 for (i = 0; i < NBUCKETS; i++)
1922 for (p = table[i]; p; p = next)
1924 next = p->next_same_hash;
1925 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1926 && exp_equiv_p (p->exp, p->exp, 1, 0)
1927 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1929 if (p->next_same_hash)
1930 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1932 if (p->prev_same_hash)
1933 p->prev_same_hash->next_same_hash = p->next_same_hash;
1935 table[i] = p->next_same_hash;
1937 p->next_same_hash = table[hash];
1938 p->prev_same_hash = 0;
1940 table[hash]->prev_same_hash = p;
1946 /* Remove from the hash table any expression that is a call-clobbered
1947 register. Also update their TICK values. */
1950 invalidate_for_call ()
1952 int regno, endregno;
1955 struct table_elt *p, *next;
1958 /* Go through all the hard registers. For each that is clobbered in
1959 a CALL_INSN, remove the register from quantity chains and update
1960 reg_tick if defined. Also see if any of these registers is currently
1963 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1964 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1966 delete_reg_equiv (regno);
1967 if (REG_TICK (regno) >= 0)
1970 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1973 /* In the case where we have no call-clobbered hard registers in the
1974 table, we are done. Otherwise, scan the table and remove any
1975 entry that overlaps a call-clobbered register. */
1978 for (hash = 0; hash < NBUCKETS; hash++)
1979 for (p = table[hash]; p; p = next)
1981 next = p->next_same_hash;
1985 remove_from_table (p, hash);
1989 if (GET_CODE (p->exp) != REG
1990 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1993 regno = REGNO (p->exp);
1994 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1996 for (i = regno; i < endregno; i++)
1997 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1999 remove_from_table (p, hash);
2005 /* Given an expression X of type CONST,
2006 and ELT which is its table entry (or 0 if it
2007 is not in the hash table),
2008 return an alternate expression for X as a register plus integer.
2009 If none can be found, return 0. */
2012 use_related_value (x, elt)
2014 struct table_elt *elt;
2016 register struct table_elt *relt = 0;
2017 register struct table_elt *p, *q;
2018 HOST_WIDE_INT offset;
2020 /* First, is there anything related known?
2021 If we have a table element, we can tell from that.
2022 Otherwise, must look it up. */
2024 if (elt != 0 && elt->related_value != 0)
2026 else if (elt == 0 && GET_CODE (x) == CONST)
2028 rtx subexp = get_related_value (x);
2030 relt = lookup (subexp,
2031 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2038 /* Search all related table entries for one that has an
2039 equivalent register. */
2044 /* This loop is strange in that it is executed in two different cases.
2045 The first is when X is already in the table. Then it is searching
2046 the RELATED_VALUE list of X's class (RELT). The second case is when
2047 X is not in the table. Then RELT points to a class for the related
2050 Ensure that, whatever case we are in, that we ignore classes that have
2051 the same value as X. */
2053 if (rtx_equal_p (x, p->exp))
2056 for (q = p->first_same_value; q; q = q->next_same_value)
2057 if (GET_CODE (q->exp) == REG)
2063 p = p->related_value;
2065 /* We went all the way around, so there is nothing to be found.
2066 Alternatively, perhaps RELT was in the table for some other reason
2067 and it has no related values recorded. */
2068 if (p == relt || p == 0)
2075 offset = (get_integer_term (x) - get_integer_term (p->exp));
2076 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2077 return plus_constant (q->exp, offset);
2080 /* Hash an rtx. We are careful to make sure the value is never negative.
2081 Equivalent registers hash identically.
2082 MODE is used in hashing for CONST_INTs only;
2083 otherwise the mode of X is used.
2085 Store 1 in do_not_record if any subexpression is volatile.
2087 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2088 which does not have the RTX_UNCHANGING_P bit set.
2089 In this case, also store 1 in hash_arg_in_struct
2090 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2092 Note that cse_insn knows that the hash code of a MEM expression
2093 is just (int) MEM plus the hash code of the address. */
2096 canon_hash (x, mode)
2098 enum machine_mode mode;
2101 register unsigned hash = 0;
2102 register enum rtx_code code;
2103 register const char *fmt;
2105 /* repeat is used to turn tail-recursion into iteration. */
2110 code = GET_CODE (x);
2115 register int regno = REGNO (x);
2117 /* On some machines, we can't record any non-fixed hard register,
2118 because extending its life will cause reload problems. We
2119 consider ap, fp, and sp to be fixed for this purpose.
2121 We also consider CCmode registers to be fixed for this purpose;
2122 failure to do so leads to failure to simplify 0<100 type of
2125 On all machines, we can't record any global registers. */
2127 if (regno < FIRST_PSEUDO_REGISTER
2128 && (global_regs[regno]
2129 || (SMALL_REGISTER_CLASSES
2130 && ! fixed_regs[regno]
2131 && regno != FRAME_POINTER_REGNUM
2132 && regno != HARD_FRAME_POINTER_REGNUM
2133 && regno != ARG_POINTER_REGNUM
2134 && regno != STACK_POINTER_REGNUM
2135 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2140 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2144 /* We handle SUBREG of a REG specially because the underlying
2145 reg changes its hash value with every value change; we don't
2146 want to have to forget unrelated subregs when one subreg changes. */
2149 if (GET_CODE (SUBREG_REG (x)) == REG)
2151 hash += (((unsigned) SUBREG << 7)
2152 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2160 unsigned HOST_WIDE_INT tem = INTVAL (x);
2161 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2166 /* This is like the general case, except that it only counts
2167 the integers representing the constant. */
2168 hash += (unsigned) code + (unsigned) GET_MODE (x);
2169 if (GET_MODE (x) != VOIDmode)
2170 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2172 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2176 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2177 + (unsigned) CONST_DOUBLE_HIGH (x));
2180 /* Assume there is only one rtx object for any given label. */
2183 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2188 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2192 if (MEM_VOLATILE_P (x))
2197 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2199 hash_arg_in_memory = 1;
2200 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2202 /* Now that we have already found this special case,
2203 might as well speed it up as much as possible. */
2204 hash += (unsigned) MEM;
2215 case UNSPEC_VOLATILE:
2220 if (MEM_VOLATILE_P (x))
2231 i = GET_RTX_LENGTH (code) - 1;
2232 hash += (unsigned) code + (unsigned) GET_MODE (x);
2233 fmt = GET_RTX_FORMAT (code);
2238 rtx tem = XEXP (x, i);
2240 /* If we are about to do the last recursive call
2241 needed at this level, change it into iteration.
2242 This function is called enough to be worth it. */
2248 hash += canon_hash (tem, 0);
2250 else if (fmt[i] == 'E')
2251 for (j = 0; j < XVECLEN (x, i); j++)
2252 hash += canon_hash (XVECEXP (x, i, j), 0);
2253 else if (fmt[i] == 's')
2255 register unsigned char *p = (unsigned char *) XSTR (x, i);
2260 else if (fmt[i] == 'i')
2262 register unsigned tem = XINT (x, i);
2265 else if (fmt[i] == '0' || fmt[i] == 't')
2273 /* Like canon_hash but with no side effects. */
2278 enum machine_mode mode;
2280 int save_do_not_record = do_not_record;
2281 int save_hash_arg_in_memory = hash_arg_in_memory;
2282 int save_hash_arg_in_struct = hash_arg_in_struct;
2283 unsigned hash = canon_hash (x, mode);
2284 hash_arg_in_memory = save_hash_arg_in_memory;
2285 hash_arg_in_struct = save_hash_arg_in_struct;
2286 do_not_record = save_do_not_record;
2290 /* Return 1 iff X and Y would canonicalize into the same thing,
2291 without actually constructing the canonicalization of either one.
2292 If VALIDATE is nonzero,
2293 we assume X is an expression being processed from the rtl
2294 and Y was found in the hash table. We check register refs
2295 in Y for being marked as valid.
2297 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2298 that is known to be in the register. Ordinarily, we don't allow them
2299 to match, because letting them match would cause unpredictable results
2300 in all the places that search a hash table chain for an equivalent
2301 for a given value. A possible equivalent that has different structure
2302 has its hash code computed from different data. Whether the hash code
2303 is the same as that of the given value is pure luck. */
2306 exp_equiv_p (x, y, validate, equal_values)
2312 register enum rtx_code code;
2313 register const char *fmt;
2315 /* Note: it is incorrect to assume an expression is equivalent to itself
2316 if VALIDATE is nonzero. */
2317 if (x == y && !validate)
2319 if (x == 0 || y == 0)
2322 code = GET_CODE (x);
2323 if (code != GET_CODE (y))
2328 /* If X is a constant and Y is a register or vice versa, they may be
2329 equivalent. We only have to validate if Y is a register. */
2330 if (CONSTANT_P (x) && GET_CODE (y) == REG
2331 && REGNO_QTY_VALID_P (REGNO (y))
2332 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2333 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2334 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2337 if (CONSTANT_P (y) && code == REG
2338 && REGNO_QTY_VALID_P (REGNO (x))
2339 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2340 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2346 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2347 if (GET_MODE (x) != GET_MODE (y))
2357 return INTVAL (x) == INTVAL (y);
2360 return XEXP (x, 0) == XEXP (y, 0);
2363 return XSTR (x, 0) == XSTR (y, 0);
2367 int regno = REGNO (y);
2369 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2370 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2373 /* If the quantities are not the same, the expressions are not
2374 equivalent. If there are and we are not to validate, they
2375 are equivalent. Otherwise, ensure all regs are up-to-date. */
2377 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2383 for (i = regno; i < endregno; i++)
2384 if (REG_IN_TABLE (i) != REG_TICK (i))
2390 /* For commutative operations, check both orders. */
2398 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2399 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2400 validate, equal_values))
2401 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2402 validate, equal_values)
2403 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2404 validate, equal_values)));
2410 /* Compare the elements. If any pair of corresponding elements
2411 fail to match, return 0 for the whole things. */
2413 fmt = GET_RTX_FORMAT (code);
2414 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2419 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2424 if (XVECLEN (x, i) != XVECLEN (y, i))
2426 for (j = 0; j < XVECLEN (x, i); j++)
2427 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2428 validate, equal_values))
2433 if (strcmp (XSTR (x, i), XSTR (y, i)))
2438 if (XINT (x, i) != XINT (y, i))
2443 if (XWINT (x, i) != XWINT (y, i))
2459 /* Return 1 iff any subexpression of X matches Y.
2460 Here we do not require that X or Y be valid (for registers referred to)
2461 for being in the hash table. */
2468 register enum rtx_code code;
2469 register const char *fmt;
2474 if (x == 0 || y == 0)
2477 code = GET_CODE (x);
2478 /* If X as a whole has the same code as Y, they may match.
2480 if (code == GET_CODE (y))
2482 if (exp_equiv_p (x, y, 0, 1))
2486 /* X does not match, so try its subexpressions. */
2488 fmt = GET_RTX_FORMAT (code);
2489 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2498 if (refers_to_p (XEXP (x, i), y))
2501 else if (fmt[i] == 'E')
2504 for (j = 0; j < XVECLEN (x, i); j++)
2505 if (refers_to_p (XVECEXP (x, i, j), y))
2512 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2513 set PBASE, PSTART, and PEND which correspond to the base of the address,
2514 the starting offset, and ending offset respectively.
2516 ADDR is known to be a nonvarying address. */
2518 /* ??? Despite what the comments say, this function is in fact frequently
2519 passed varying addresses. This does not appear to cause any problems. */
2522 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2526 HOST_WIDE_INT *pstart, *pend;
2529 HOST_WIDE_INT start, end;
2535 if (flag_pic && GET_CODE (base) == PLUS
2536 && XEXP (base, 0) == pic_offset_table_rtx)
2537 base = XEXP (base, 1);
2539 /* Registers with nonvarying addresses usually have constant equivalents;
2540 but the frame pointer register is also possible. */
2541 if (GET_CODE (base) == REG
2543 && REGNO_QTY_VALID_P (REGNO (base))
2544 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2545 && qty_const[REG_QTY (REGNO (base))] != 0)
2546 base = qty_const[REG_QTY (REGNO (base))];
2547 else if (GET_CODE (base) == PLUS
2548 && GET_CODE (XEXP (base, 1)) == CONST_INT
2549 && GET_CODE (XEXP (base, 0)) == REG
2551 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2552 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2553 == GET_MODE (XEXP (base, 0)))
2554 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2556 start = INTVAL (XEXP (base, 1));
2557 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2559 /* This can happen as the result of virtual register instantiation,
2560 if the initial offset is too large to be a valid address. */
2561 else if (GET_CODE (base) == PLUS
2562 && GET_CODE (XEXP (base, 0)) == REG
2563 && GET_CODE (XEXP (base, 1)) == REG
2565 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2566 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2567 == GET_MODE (XEXP (base, 0)))
2568 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2569 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2570 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2571 == GET_MODE (XEXP (base, 1)))
2572 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2574 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2575 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2577 /* One of the two values must be a constant. */
2578 if (GET_CODE (base) != CONST_INT)
2580 if (GET_CODE (tem) != CONST_INT)
2582 start = INTVAL (tem);
2586 start = INTVAL (base);
2591 /* Handle everything that we can find inside an address that has been
2592 viewed as constant. */
2596 /* If no part of this switch does a "continue", the code outside
2597 will exit this loop. */
2599 switch (GET_CODE (base))
2602 /* By definition, operand1 of a LO_SUM is the associated constant
2603 address. Use the associated constant address as the base
2605 base = XEXP (base, 1);
2609 /* Strip off CONST. */
2610 base = XEXP (base, 0);
2614 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2616 start += INTVAL (XEXP (base, 1));
2617 base = XEXP (base, 0);
2623 /* Handle the case of an AND which is the negative of a power of
2624 two. This is used to represent unaligned memory operations. */
2625 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2626 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2628 set_nonvarying_address_components (XEXP (base, 0), size,
2629 pbase, pstart, pend);
2631 /* Assume the worst misalignment. START is affected, but not
2632 END, so compensate but adjusting SIZE. Don't lose any
2633 constant we already had. */
2635 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2636 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2649 if (GET_CODE (base) == CONST_INT)
2651 start += INTVAL (base);
2657 /* Set the return values. */
2663 /* Return 1 if X has a value that can vary even between two
2664 executions of the program. 0 means X can be compared reliably
2665 against certain constants or near-constants. */
2668 cse_rtx_varies_p (x)
2671 /* We need not check for X and the equivalence class being of the same
2672 mode because if X is equivalent to a constant in some mode, it
2673 doesn't vary in any mode. */
2675 if (GET_CODE (x) == REG
2676 && REGNO_QTY_VALID_P (REGNO (x))
2677 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2678 && qty_const[REG_QTY (REGNO (x))] != 0)
2681 if (GET_CODE (x) == PLUS
2682 && GET_CODE (XEXP (x, 1)) == CONST_INT
2683 && GET_CODE (XEXP (x, 0)) == REG
2684 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2685 && (GET_MODE (XEXP (x, 0))
2686 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2687 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2690 /* This can happen as the result of virtual register instantiation, if
2691 the initial constant is too large to be a valid address. This gives
2692 us a three instruction sequence, load large offset into a register,
2693 load fp minus a constant into a register, then a MEM which is the
2694 sum of the two `constant' registers. */
2695 if (GET_CODE (x) == PLUS
2696 && GET_CODE (XEXP (x, 0)) == REG
2697 && GET_CODE (XEXP (x, 1)) == REG
2698 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2699 && (GET_MODE (XEXP (x, 0))
2700 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2701 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2702 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2703 && (GET_MODE (XEXP (x, 1))
2704 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2705 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2708 return rtx_varies_p (x);
2711 /* Canonicalize an expression:
2712 replace each register reference inside it
2713 with the "oldest" equivalent register.
2715 If INSN is non-zero and we are replacing a pseudo with a hard register
2716 or vice versa, validate_change is used to ensure that INSN remains valid
2717 after we make our substitution. The calls are made with IN_GROUP non-zero
2718 so apply_change_group must be called upon the outermost return from this
2719 function (unless INSN is zero). The result of apply_change_group can
2720 generally be discarded since the changes we are making are optional. */
2728 register enum rtx_code code;
2729 register const char *fmt;
2734 code = GET_CODE (x);
2752 /* Never replace a hard reg, because hard regs can appear
2753 in more than one machine mode, and we must preserve the mode
2754 of each occurrence. Also, some hard regs appear in
2755 MEMs that are shared and mustn't be altered. Don't try to
2756 replace any reg that maps to a reg of class NO_REGS. */
2757 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2758 || ! REGNO_QTY_VALID_P (REGNO (x)))
2761 first = qty_first_reg[REG_QTY (REGNO (x))];
2762 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2763 : REGNO_REG_CLASS (first) == NO_REGS ? x
2764 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2771 fmt = GET_RTX_FORMAT (code);
2772 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2778 rtx new = canon_reg (XEXP (x, i), insn);
2781 /* If replacing pseudo with hard reg or vice versa, ensure the
2782 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2783 if (insn != 0 && new != 0
2784 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2785 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2786 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2787 || (insn_code = recog_memoized (insn)) < 0
2788 || insn_data[insn_code].n_dups > 0))
2789 validate_change (insn, &XEXP (x, i), new, 1);
2793 else if (fmt[i] == 'E')
2794 for (j = 0; j < XVECLEN (x, i); j++)
2795 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2801 /* LOC is a location within INSN that is an operand address (the contents of
2802 a MEM). Find the best equivalent address to use that is valid for this
2805 On most CISC machines, complicated address modes are costly, and rtx_cost
2806 is a good approximation for that cost. However, most RISC machines have
2807 only a few (usually only one) memory reference formats. If an address is
2808 valid at all, it is often just as cheap as any other address. Hence, for
2809 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2810 costs of various addresses. For two addresses of equal cost, choose the one
2811 with the highest `rtx_cost' value as that has the potential of eliminating
2812 the most insns. For equal costs, we choose the first in the equivalence
2813 class. Note that we ignore the fact that pseudo registers are cheaper
2814 than hard registers here because we would also prefer the pseudo registers.
2818 find_best_addr (insn, loc)
2822 struct table_elt *elt;
2825 struct table_elt *p;
2826 int found_better = 1;
2828 int save_do_not_record = do_not_record;
2829 int save_hash_arg_in_memory = hash_arg_in_memory;
2830 int save_hash_arg_in_struct = hash_arg_in_struct;
2835 /* Do not try to replace constant addresses or addresses of local and
2836 argument slots. These MEM expressions are made only once and inserted
2837 in many instructions, as well as being used to control symbol table
2838 output. It is not safe to clobber them.
2840 There are some uncommon cases where the address is already in a register
2841 for some reason, but we cannot take advantage of that because we have
2842 no easy way to unshare the MEM. In addition, looking up all stack
2843 addresses is costly. */
2844 if ((GET_CODE (addr) == PLUS
2845 && GET_CODE (XEXP (addr, 0)) == REG
2846 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2847 && (regno = REGNO (XEXP (addr, 0)),
2848 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2849 || regno == ARG_POINTER_REGNUM))
2850 || (GET_CODE (addr) == REG
2851 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2852 || regno == HARD_FRAME_POINTER_REGNUM
2853 || regno == ARG_POINTER_REGNUM))
2854 || GET_CODE (addr) == ADDRESSOF
2855 || CONSTANT_ADDRESS_P (addr))
2858 /* If this address is not simply a register, try to fold it. This will
2859 sometimes simplify the expression. Many simplifications
2860 will not be valid, but some, usually applying the associative rule, will
2861 be valid and produce better code. */
2862 if (GET_CODE (addr) != REG)
2864 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2868 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2869 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2870 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2872 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2874 && validate_change (insn, loc, folded, 0))
2878 /* If this address is not in the hash table, we can't look for equivalences
2879 of the whole address. Also, ignore if volatile. */
2882 hash = HASH (addr, Pmode);
2883 addr_volatile = do_not_record;
2884 do_not_record = save_do_not_record;
2885 hash_arg_in_memory = save_hash_arg_in_memory;
2886 hash_arg_in_struct = save_hash_arg_in_struct;
2891 elt = lookup (addr, hash, Pmode);
2893 #ifndef ADDRESS_COST
2896 int our_cost = elt->cost;
2898 /* Find the lowest cost below ours that works. */
2899 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2900 if (elt->cost < our_cost
2901 && (GET_CODE (elt->exp) == REG
2902 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2903 && validate_change (insn, loc,
2904 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2911 /* We need to find the best (under the criteria documented above) entry
2912 in the class that is valid. We use the `flag' field to indicate
2913 choices that were invalid and iterate until we can't find a better
2914 one that hasn't already been tried. */
2916 for (p = elt->first_same_value; p; p = p->next_same_value)
2919 while (found_better)
2921 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2922 int best_rtx_cost = (elt->cost + 1) >> 1;
2923 struct table_elt *best_elt = elt;
2926 for (p = elt->first_same_value; p; p = p->next_same_value)
2929 if ((GET_CODE (p->exp) == REG
2930 || exp_equiv_p (p->exp, p->exp, 1, 0))
2931 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2932 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2933 && (p->cost + 1) >> 1 > best_rtx_cost)))
2936 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2937 best_rtx_cost = (p->cost + 1) >> 1;
2944 if (validate_change (insn, loc,
2945 canon_reg (copy_rtx (best_elt->exp),
2954 /* If the address is a binary operation with the first operand a register
2955 and the second a constant, do the same as above, but looking for
2956 equivalences of the register. Then try to simplify before checking for
2957 the best address to use. This catches a few cases: First is when we
2958 have REG+const and the register is another REG+const. We can often merge
2959 the constants and eliminate one insn and one register. It may also be
2960 that a machine has a cheap REG+REG+const. Finally, this improves the
2961 code on the Alpha for unaligned byte stores. */
2963 if (flag_expensive_optimizations
2964 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2965 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2966 && GET_CODE (XEXP (*loc, 0)) == REG
2967 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2969 rtx c = XEXP (*loc, 1);
2972 hash = HASH (XEXP (*loc, 0), Pmode);
2973 do_not_record = save_do_not_record;
2974 hash_arg_in_memory = save_hash_arg_in_memory;
2975 hash_arg_in_struct = save_hash_arg_in_struct;
2977 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2981 /* We need to find the best (under the criteria documented above) entry
2982 in the class that is valid. We use the `flag' field to indicate
2983 choices that were invalid and iterate until we can't find a better
2984 one that hasn't already been tried. */
2986 for (p = elt->first_same_value; p; p = p->next_same_value)
2989 while (found_better)
2991 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2992 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2993 struct table_elt *best_elt = elt;
2994 rtx best_rtx = *loc;
2997 /* This is at worst case an O(n^2) algorithm, so limit our search
2998 to the first 32 elements on the list. This avoids trouble
2999 compiling code with very long basic blocks that can easily
3000 call cse_gen_binary so many times that we run out of memory. */
3003 for (p = elt->first_same_value, count = 0;
3005 p = p->next_same_value, count++)
3007 && (GET_CODE (p->exp) == REG
3008 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3010 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
3012 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3013 || (CSE_ADDRESS_COST (new) == best_addr_cost
3014 && (COST (new) + 1) >> 1 > best_rtx_cost)))
3017 best_addr_cost = CSE_ADDRESS_COST (new);
3018 best_rtx_cost = (COST (new) + 1) >> 1;
3026 if (validate_change (insn, loc,
3027 canon_reg (copy_rtx (best_rtx),
3038 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3039 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3040 what values are being compared.
3042 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3043 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3044 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3045 compared to produce cc0.
3047 The return value is the comparison operator and is either the code of
3048 A or the code corresponding to the inverse of the comparison. */
3050 static enum rtx_code
3051 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3054 enum machine_mode *pmode1, *pmode2;
3058 arg1 = *parg1, arg2 = *parg2;
3060 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3062 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3064 /* Set non-zero when we find something of interest. */
3066 int reverse_code = 0;
3067 struct table_elt *p = 0;
3069 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3070 On machines with CC0, this is the only case that can occur, since
3071 fold_rtx will return the COMPARE or item being compared with zero
3074 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3077 /* If ARG1 is a comparison operator and CODE is testing for
3078 STORE_FLAG_VALUE, get the inner arguments. */
3080 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3083 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3084 && code == LT && STORE_FLAG_VALUE == -1)
3085 #ifdef FLOAT_STORE_FLAG_VALUE
3086 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3087 && FLOAT_STORE_FLAG_VALUE < 0)
3092 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3093 && code == GE && STORE_FLAG_VALUE == -1)
3094 #ifdef FLOAT_STORE_FLAG_VALUE
3095 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3096 && FLOAT_STORE_FLAG_VALUE < 0)
3099 x = arg1, reverse_code = 1;
3102 /* ??? We could also check for
3104 (ne (and (eq (...) (const_int 1))) (const_int 0))
3106 and related forms, but let's wait until we see them occurring. */
3109 /* Look up ARG1 in the hash table and see if it has an equivalence
3110 that lets us see what is being compared. */
3111 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3113 if (p) p = p->first_same_value;
3115 for (; p; p = p->next_same_value)
3117 enum machine_mode inner_mode = GET_MODE (p->exp);
3119 /* If the entry isn't valid, skip it. */
3120 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3123 if (GET_CODE (p->exp) == COMPARE
3124 /* Another possibility is that this machine has a compare insn
3125 that includes the comparison code. In that case, ARG1 would
3126 be equivalent to a comparison operation that would set ARG1 to
3127 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3128 ORIG_CODE is the actual comparison being done; if it is an EQ,
3129 we must reverse ORIG_CODE. On machine with a negative value
3130 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3133 && GET_MODE_CLASS (inner_mode) == MODE_INT
3134 && (GET_MODE_BITSIZE (inner_mode)
3135 <= HOST_BITS_PER_WIDE_INT)
3136 && (STORE_FLAG_VALUE
3137 & ((HOST_WIDE_INT) 1
3138 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3139 #ifdef FLOAT_STORE_FLAG_VALUE
3141 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3142 && FLOAT_STORE_FLAG_VALUE < 0)
3145 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3150 else if ((code == EQ
3152 && GET_MODE_CLASS (inner_mode) == MODE_INT
3153 && (GET_MODE_BITSIZE (inner_mode)
3154 <= HOST_BITS_PER_WIDE_INT)
3155 && (STORE_FLAG_VALUE
3156 & ((HOST_WIDE_INT) 1
3157 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3158 #ifdef FLOAT_STORE_FLAG_VALUE
3160 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3161 && FLOAT_STORE_FLAG_VALUE < 0)
3164 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3171 /* If this is fp + constant, the equivalent is a better operand since
3172 it may let us predict the value of the comparison. */
3173 else if (NONZERO_BASE_PLUS_P (p->exp))
3180 /* If we didn't find a useful equivalence for ARG1, we are done.
3181 Otherwise, set up for the next iteration. */
3185 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3186 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3187 code = GET_CODE (x);
3190 code = reverse_condition (code);
3193 /* Return our results. Return the modes from before fold_rtx
3194 because fold_rtx might produce const_int, and then it's too late. */
3195 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3196 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3201 /* Try to simplify a unary operation CODE whose output mode is to be
3202 MODE with input operand OP whose mode was originally OP_MODE.
3203 Return zero if no simplification can be made. */
3206 simplify_unary_operation (code, mode, op, op_mode)
3208 enum machine_mode mode;
3210 enum machine_mode op_mode;
3212 register int width = GET_MODE_BITSIZE (mode);
3214 /* The order of these tests is critical so that, for example, we don't
3215 check the wrong mode (input vs. output) for a conversion operation,
3216 such as FIX. At some point, this should be simplified. */
3218 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3220 if (code == FLOAT && GET_MODE (op) == VOIDmode
3221 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3223 HOST_WIDE_INT hv, lv;
3226 if (GET_CODE (op) == CONST_INT)
3227 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3229 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3231 #ifdef REAL_ARITHMETIC
3232 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3236 d = (double) (~ hv);
3237 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3238 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3239 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3245 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3246 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3247 d += (double) (unsigned HOST_WIDE_INT) lv;
3249 #endif /* REAL_ARITHMETIC */
3250 d = real_value_truncate (mode, d);
3251 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3253 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3254 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3256 HOST_WIDE_INT hv, lv;
3259 if (GET_CODE (op) == CONST_INT)
3260 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3262 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3264 if (op_mode == VOIDmode)
3266 /* We don't know how to interpret negative-looking numbers in
3267 this case, so don't try to fold those. */
3271 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3274 hv = 0, lv &= GET_MODE_MASK (op_mode);
3276 #ifdef REAL_ARITHMETIC
3277 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3280 d = (double) (unsigned HOST_WIDE_INT) hv;
3281 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3282 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3283 d += (double) (unsigned HOST_WIDE_INT) lv;
3284 #endif /* REAL_ARITHMETIC */
3285 d = real_value_truncate (mode, d);
3286 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3290 if (GET_CODE (op) == CONST_INT
3291 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3293 register HOST_WIDE_INT arg0 = INTVAL (op);
3294 register HOST_WIDE_INT val;
3307 val = (arg0 >= 0 ? arg0 : - arg0);
3311 /* Don't use ffs here. Instead, get low order bit and then its
3312 number. If arg0 is zero, this will return 0, as desired. */
3313 arg0 &= GET_MODE_MASK (mode);
3314 val = exact_log2 (arg0 & (- arg0)) + 1;
3322 if (op_mode == VOIDmode)
3324 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3326 /* If we were really extending the mode,
3327 we would have to distinguish between zero-extension
3328 and sign-extension. */
3329 if (width != GET_MODE_BITSIZE (op_mode))
3333 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3334 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3340 if (op_mode == VOIDmode)
3342 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3344 /* If we were really extending the mode,
3345 we would have to distinguish between zero-extension
3346 and sign-extension. */
3347 if (width != GET_MODE_BITSIZE (op_mode))
3351 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3354 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3356 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3357 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3370 val = trunc_int_for_mode (val, mode);
3372 return GEN_INT (val);
3375 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3376 for a DImode operation on a CONST_INT. */
3377 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3378 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3380 HOST_WIDE_INT l1, h1, lv, hv;
3382 if (GET_CODE (op) == CONST_DOUBLE)
3383 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3385 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3395 neg_double (l1, h1, &lv, &hv);
3400 neg_double (l1, h1, &lv, &hv);
3408 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3410 lv = exact_log2 (l1 & (-l1)) + 1;
3414 /* This is just a change-of-mode, so do nothing. */
3419 if (op_mode == VOIDmode
3420 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3424 lv = l1 & GET_MODE_MASK (op_mode);
3428 if (op_mode == VOIDmode
3429 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3433 lv = l1 & GET_MODE_MASK (op_mode);
3434 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3435 && (lv & ((HOST_WIDE_INT) 1
3436 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3437 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3439 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3450 return immed_double_const (lv, hv, mode);
3453 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3454 else if (GET_CODE (op) == CONST_DOUBLE
3455 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3461 if (setjmp (handler))
3462 /* There used to be a warning here, but that is inadvisable.
3463 People may want to cause traps, and the natural way
3464 to do it should not get a warning. */
3467 set_float_handler (handler);
3469 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3474 d = REAL_VALUE_NEGATE (d);
3478 if (REAL_VALUE_NEGATIVE (d))
3479 d = REAL_VALUE_NEGATE (d);
3482 case FLOAT_TRUNCATE:
3483 d = real_value_truncate (mode, d);
3487 /* All this does is change the mode. */
3491 d = REAL_VALUE_RNDZINT (d);
3495 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3505 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3506 set_float_handler (NULL_PTR);
3510 else if (GET_CODE (op) == CONST_DOUBLE
3511 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3512 && GET_MODE_CLASS (mode) == MODE_INT
3513 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3519 if (setjmp (handler))
3522 set_float_handler (handler);
3524 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3529 val = REAL_VALUE_FIX (d);
3533 val = REAL_VALUE_UNSIGNED_FIX (d);
3540 set_float_handler (NULL_PTR);
3542 val = trunc_int_for_mode (val, mode);
3544 return GEN_INT (val);
3547 /* This was formerly used only for non-IEEE float.
3548 eggert@twinsun.com says it is safe for IEEE also. */
3551 /* There are some simplifications we can do even if the operands
3557 /* (not (not X)) == X, similarly for NEG. */
3558 if (GET_CODE (op) == code)
3559 return XEXP (op, 0);
3563 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3564 becomes just the MINUS if its mode is MODE. This allows
3565 folding switch statements on machines using casesi (such as
3567 if (GET_CODE (op) == TRUNCATE
3568 && GET_MODE (XEXP (op, 0)) == mode
3569 && GET_CODE (XEXP (op, 0)) == MINUS
3570 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3571 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3572 return XEXP (op, 0);
3574 #ifdef POINTERS_EXTEND_UNSIGNED
3575 if (! POINTERS_EXTEND_UNSIGNED
3576 && mode == Pmode && GET_MODE (op) == ptr_mode
3578 return convert_memory_address (Pmode, op);
3582 #ifdef POINTERS_EXTEND_UNSIGNED
3584 if (POINTERS_EXTEND_UNSIGNED
3585 && mode == Pmode && GET_MODE (op) == ptr_mode
3587 return convert_memory_address (Pmode, op);
3599 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3600 and OP1. Return 0 if no simplification is possible.
3602 Don't use this for relational operations such as EQ or LT.
3603 Use simplify_relational_operation instead. */
3606 simplify_binary_operation (code, mode, op0, op1)
3608 enum machine_mode mode;
3611 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3613 int width = GET_MODE_BITSIZE (mode);
3616 /* Relational operations don't work here. We must know the mode
3617 of the operands in order to do the comparison correctly.
3618 Assuming a full word can give incorrect results.
3619 Consider comparing 128 with -128 in QImode. */
3621 if (GET_RTX_CLASS (code) == '<')
3624 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3625 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3626 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3627 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3629 REAL_VALUE_TYPE f0, f1, value;
3632 if (setjmp (handler))
3635 set_float_handler (handler);
3637 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3638 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3639 f0 = real_value_truncate (mode, f0);
3640 f1 = real_value_truncate (mode, f1);
3642 #ifdef REAL_ARITHMETIC
3643 #ifndef REAL_INFINITY
3644 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3647 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3661 #ifndef REAL_INFINITY
3668 value = MIN (f0, f1);
3671 value = MAX (f0, f1);
3678 value = real_value_truncate (mode, value);
3679 set_float_handler (NULL_PTR);
3680 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3682 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3684 /* We can fold some multi-word operations. */
3685 if (GET_MODE_CLASS (mode) == MODE_INT
3686 && width == HOST_BITS_PER_WIDE_INT * 2
3687 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3688 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3690 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3692 if (GET_CODE (op0) == CONST_DOUBLE)
3693 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3695 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3697 if (GET_CODE (op1) == CONST_DOUBLE)
3698 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3700 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3705 /* A - B == A + (-B). */
3706 neg_double (l2, h2, &lv, &hv);
3709 /* .. fall through ... */
3712 add_double (l1, h1, l2, h2, &lv, &hv);
3716 mul_double (l1, h1, l2, h2, &lv, &hv);
3719 case DIV: case MOD: case UDIV: case UMOD:
3720 /* We'd need to include tree.h to do this and it doesn't seem worth
3725 lv = l1 & l2, hv = h1 & h2;
3729 lv = l1 | l2, hv = h1 | h2;
3733 lv = l1 ^ l2, hv = h1 ^ h2;
3739 && ((unsigned HOST_WIDE_INT) l1
3740 < (unsigned HOST_WIDE_INT) l2)))
3749 && ((unsigned HOST_WIDE_INT) l1
3750 > (unsigned HOST_WIDE_INT) l2)))
3757 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3759 && ((unsigned HOST_WIDE_INT) l1
3760 < (unsigned HOST_WIDE_INT) l2)))
3767 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3769 && ((unsigned HOST_WIDE_INT) l1
3770 > (unsigned HOST_WIDE_INT) l2)))
3776 case LSHIFTRT: case ASHIFTRT:
3778 case ROTATE: case ROTATERT:
3779 #ifdef SHIFT_COUNT_TRUNCATED
3780 if (SHIFT_COUNT_TRUNCATED)
3781 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3784 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3787 if (code == LSHIFTRT || code == ASHIFTRT)
3788 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3790 else if (code == ASHIFT)
3791 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3792 else if (code == ROTATE)
3793 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3794 else /* code == ROTATERT */
3795 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3802 return immed_double_const (lv, hv, mode);
3805 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3806 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3808 /* Even if we can't compute a constant result,
3809 there are some cases worth simplifying. */
3814 /* In IEEE floating point, x+0 is not the same as x. Similarly
3815 for the other optimizations below. */
3816 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3817 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3820 if (op1 == CONST0_RTX (mode))
3823 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3824 if (GET_CODE (op0) == NEG)
3825 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3826 else if (GET_CODE (op1) == NEG)
3827 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3829 /* Handle both-operands-constant cases. We can only add
3830 CONST_INTs to constants since the sum of relocatable symbols
3831 can't be handled by most assemblers. Don't add CONST_INT
3832 to CONST_INT since overflow won't be computed properly if wider
3833 than HOST_BITS_PER_WIDE_INT. */
3835 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3836 && GET_CODE (op1) == CONST_INT)
3837 return plus_constant (op0, INTVAL (op1));
3838 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3839 && GET_CODE (op0) == CONST_INT)
3840 return plus_constant (op1, INTVAL (op0));
3842 /* See if this is something like X * C - X or vice versa or
3843 if the multiplication is written as a shift. If so, we can
3844 distribute and make a new multiply, shift, or maybe just
3845 have X (if C is 2 in the example above). But don't make
3846 real multiply if we didn't have one before. */
3848 if (! FLOAT_MODE_P (mode))
3850 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3851 rtx lhs = op0, rhs = op1;
3854 if (GET_CODE (lhs) == NEG)
3855 coeff0 = -1, lhs = XEXP (lhs, 0);
3856 else if (GET_CODE (lhs) == MULT
3857 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3859 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3862 else if (GET_CODE (lhs) == ASHIFT
3863 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3864 && INTVAL (XEXP (lhs, 1)) >= 0
3865 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3867 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3868 lhs = XEXP (lhs, 0);
3871 if (GET_CODE (rhs) == NEG)
3872 coeff1 = -1, rhs = XEXP (rhs, 0);
3873 else if (GET_CODE (rhs) == MULT
3874 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3876 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3879 else if (GET_CODE (rhs) == ASHIFT
3880 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3881 && INTVAL (XEXP (rhs, 1)) >= 0
3882 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3884 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3885 rhs = XEXP (rhs, 0);
3888 if (rtx_equal_p (lhs, rhs))
3890 tem = cse_gen_binary (MULT, mode, lhs,
3891 GEN_INT (coeff0 + coeff1));
3892 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3896 /* If one of the operands is a PLUS or a MINUS, see if we can
3897 simplify this by the associative law.
3898 Don't use the associative law for floating point.
3899 The inaccuracy makes it nonassociative,
3900 and subtle programs can break if operations are associated. */
3902 if (INTEGRAL_MODE_P (mode)
3903 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3904 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3905 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3911 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3912 using cc0, in which case we want to leave it as a COMPARE
3913 so we can distinguish it from a register-register-copy.
3915 In IEEE floating point, x-0 is not the same as x. */
3917 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3918 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3919 && op1 == CONST0_RTX (mode))
3922 /* Do nothing here. */
3927 /* None of these optimizations can be done for IEEE
3929 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3930 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3933 /* We can't assume x-x is 0 even with non-IEEE floating point,
3934 but since it is zero except in very strange circumstances, we
3935 will treat it as zero with -ffast-math. */
3936 if (rtx_equal_p (op0, op1)
3937 && ! side_effects_p (op0)
3938 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3939 return CONST0_RTX (mode);
3941 /* Change subtraction from zero into negation. */
3942 if (op0 == CONST0_RTX (mode))
3943 return gen_rtx_NEG (mode, op1);
3945 /* (-1 - a) is ~a. */
3946 if (op0 == constm1_rtx)
3947 return gen_rtx_NOT (mode, op1);
3949 /* Subtracting 0 has no effect. */
3950 if (op1 == CONST0_RTX (mode))
3953 /* See if this is something like X * C - X or vice versa or
3954 if the multiplication is written as a shift. If so, we can
3955 distribute and make a new multiply, shift, or maybe just
3956 have X (if C is 2 in the example above). But don't make
3957 real multiply if we didn't have one before. */
3959 if (! FLOAT_MODE_P (mode))
3961 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3962 rtx lhs = op0, rhs = op1;
3965 if (GET_CODE (lhs) == NEG)
3966 coeff0 = -1, lhs = XEXP (lhs, 0);
3967 else if (GET_CODE (lhs) == MULT
3968 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3970 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3973 else if (GET_CODE (lhs) == ASHIFT
3974 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3975 && INTVAL (XEXP (lhs, 1)) >= 0
3976 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3978 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3979 lhs = XEXP (lhs, 0);
3982 if (GET_CODE (rhs) == NEG)
3983 coeff1 = - 1, rhs = XEXP (rhs, 0);
3984 else if (GET_CODE (rhs) == MULT
3985 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3987 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3990 else if (GET_CODE (rhs) == ASHIFT
3991 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3992 && INTVAL (XEXP (rhs, 1)) >= 0
3993 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3995 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3996 rhs = XEXP (rhs, 0);
3999 if (rtx_equal_p (lhs, rhs))
4001 tem = cse_gen_binary (MULT, mode, lhs,
4002 GEN_INT (coeff0 - coeff1));
4003 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
4007 /* (a - (-b)) -> (a + b). */
4008 if (GET_CODE (op1) == NEG)
4009 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
4011 /* If one of the operands is a PLUS or a MINUS, see if we can
4012 simplify this by the associative law.
4013 Don't use the associative law for floating point.
4014 The inaccuracy makes it nonassociative,
4015 and subtle programs can break if operations are associated. */
4017 if (INTEGRAL_MODE_P (mode)
4018 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
4019 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
4020 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
4023 /* Don't let a relocatable value get a negative coeff. */
4024 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
4025 return plus_constant (op0, - INTVAL (op1));
4027 /* (x - (x & y)) -> (x & ~y) */
4028 if (GET_CODE (op1) == AND)
4030 if (rtx_equal_p (op0, XEXP (op1, 0)))
4031 return cse_gen_binary (AND, mode, op0,
4032 gen_rtx_NOT (mode, XEXP (op1, 1)));
4033 if (rtx_equal_p (op0, XEXP (op1, 1)))
4034 return cse_gen_binary (AND, mode, op0,
4035 gen_rtx_NOT (mode, XEXP (op1, 0)));
4040 if (op1 == constm1_rtx)
4042 tem = simplify_unary_operation (NEG, mode, op0, mode);
4044 return tem ? tem : gen_rtx_NEG (mode, op0);
4047 /* In IEEE floating point, x*0 is not always 0. */
4048 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4049 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4050 && op1 == CONST0_RTX (mode)
4051 && ! side_effects_p (op0))
4054 /* In IEEE floating point, x*1 is not equivalent to x for nans.
4055 However, ANSI says we can drop signals,
4056 so we can do this anyway. */
4057 if (op1 == CONST1_RTX (mode))
4060 /* Convert multiply by constant power of two into shift unless
4061 we are still generating RTL. This test is a kludge. */
4062 if (GET_CODE (op1) == CONST_INT
4063 && (val = exact_log2 (INTVAL (op1))) >= 0
4064 /* If the mode is larger than the host word size, and the
4065 uppermost bit is set, then this isn't a power of two due
4066 to implicit sign extension. */
4067 && (width <= HOST_BITS_PER_WIDE_INT
4068 || val != HOST_BITS_PER_WIDE_INT - 1)
4069 && ! rtx_equal_function_value_matters)
4070 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
4072 if (GET_CODE (op1) == CONST_DOUBLE
4073 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
4077 int op1is2, op1ism1;
4079 if (setjmp (handler))
4082 set_float_handler (handler);
4083 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4084 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
4085 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
4086 set_float_handler (NULL_PTR);
4088 /* x*2 is x+x and x*(-1) is -x */
4089 if (op1is2 && GET_MODE (op0) == mode)
4090 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
4092 else if (op1ism1 && GET_MODE (op0) == mode)
4093 return gen_rtx_NEG (mode, op0);
4098 if (op1 == const0_rtx)
4100 if (GET_CODE (op1) == CONST_INT
4101 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4103 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4105 /* A | (~A) -> -1 */
4106 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4107 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4108 && ! side_effects_p (op0)
4109 && GET_MODE_CLASS (mode) != MODE_CC)
4114 if (op1 == const0_rtx)
4116 if (GET_CODE (op1) == CONST_INT
4117 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4118 return gen_rtx_NOT (mode, op0);
4119 if (op0 == op1 && ! side_effects_p (op0)
4120 && GET_MODE_CLASS (mode) != MODE_CC)
4125 if (op1 == const0_rtx && ! side_effects_p (op0))
4127 if (GET_CODE (op1) == CONST_INT
4128 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4130 if (op0 == op1 && ! side_effects_p (op0)
4131 && GET_MODE_CLASS (mode) != MODE_CC)
4134 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4135 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4136 && ! side_effects_p (op0)
4137 && GET_MODE_CLASS (mode) != MODE_CC)
4142 /* Convert divide by power of two into shift (divide by 1 handled
4144 if (GET_CODE (op1) == CONST_INT
4145 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
4146 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
4148 /* ... fall through ... */
4151 if (op1 == CONST1_RTX (mode))
4154 /* In IEEE floating point, 0/x is not always 0. */
4155 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4156 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4157 && op0 == CONST0_RTX (mode)
4158 && ! side_effects_p (op1))
4161 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4162 /* Change division by a constant into multiplication. Only do
4163 this with -ffast-math until an expert says it is safe in
4165 else if (GET_CODE (op1) == CONST_DOUBLE
4166 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
4167 && op1 != CONST0_RTX (mode)
4171 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4173 if (! REAL_VALUES_EQUAL (d, dconst0))
4175 #if defined (REAL_ARITHMETIC)
4176 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
4177 return gen_rtx_MULT (mode, op0,
4178 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
4181 gen_rtx_MULT (mode, op0,
4182 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4190 /* Handle modulus by power of two (mod with 1 handled below). */
4191 if (GET_CODE (op1) == CONST_INT
4192 && exact_log2 (INTVAL (op1)) > 0)
4193 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
4195 /* ... fall through ... */
4198 if ((op0 == const0_rtx || op1 == const1_rtx)
4199 && ! side_effects_p (op0) && ! side_effects_p (op1))
4205 /* Rotating ~0 always results in ~0. */
4206 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4207 && (unsigned HOST_WIDE_INT) INTVAL (op0) == GET_MODE_MASK (mode)
4208 && ! side_effects_p (op1))
4211 /* ... fall through ... */
4216 if (op1 == const0_rtx)
4218 if (op0 == const0_rtx && ! side_effects_p (op1))
4223 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4224 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4225 && ! side_effects_p (op0))
4227 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4232 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4233 && ((unsigned HOST_WIDE_INT) INTVAL (op1)
4234 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4235 && ! side_effects_p (op0))
4237 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4242 if (op1 == const0_rtx && ! side_effects_p (op0))
4244 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4249 if (op1 == constm1_rtx && ! side_effects_p (op0))
4251 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4262 /* Get the integer argument values in two forms:
4263 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4265 arg0 = INTVAL (op0);
4266 arg1 = INTVAL (op1);
4268 if (width < HOST_BITS_PER_WIDE_INT)
4270 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4271 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4274 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4275 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4278 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4279 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4287 /* Compute the value of the arithmetic. */
4292 val = arg0s + arg1s;
4296 val = arg0s - arg1s;
4300 val = arg0s * arg1s;
4306 val = arg0s / arg1s;
4312 val = arg0s % arg1s;
4318 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4324 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4340 /* If shift count is undefined, don't fold it; let the machine do
4341 what it wants. But truncate it if the machine will do that. */
4345 #ifdef SHIFT_COUNT_TRUNCATED
4346 if (SHIFT_COUNT_TRUNCATED)
4350 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4357 #ifdef SHIFT_COUNT_TRUNCATED
4358 if (SHIFT_COUNT_TRUNCATED)
4362 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4369 #ifdef SHIFT_COUNT_TRUNCATED
4370 if (SHIFT_COUNT_TRUNCATED)
4374 val = arg0s >> arg1;
4376 /* Bootstrap compiler may not have sign extended the right shift.
4377 Manually extend the sign to insure bootstrap cc matches gcc. */
4378 if (arg0s < 0 && arg1 > 0)
4379 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4388 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4389 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4397 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4398 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4402 /* Do nothing here. */
4406 val = arg0s <= arg1s ? arg0s : arg1s;
4410 val = ((unsigned HOST_WIDE_INT) arg0
4411 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4415 val = arg0s > arg1s ? arg0s : arg1s;
4419 val = ((unsigned HOST_WIDE_INT) arg0
4420 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4427 val = trunc_int_for_mode (val, mode);
4429 return GEN_INT (val);
4432 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4435 Rather than test for specific case, we do this by a brute-force method
4436 and do all possible simplifications until no more changes occur. Then
4437 we rebuild the operation. */
4440 simplify_plus_minus (code, mode, op0, op1)
4442 enum machine_mode mode;
4448 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4449 int first = 1, negate = 0, changed;
4452 bzero ((char *) ops, sizeof ops);
4454 /* Set up the two operands and then expand them until nothing has been
4455 changed. If we run out of room in our array, give up; this should
4456 almost never happen. */
4458 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4465 for (i = 0; i < n_ops; i++)
4466 switch (GET_CODE (ops[i]))
4473 ops[n_ops] = XEXP (ops[i], 1);
4474 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4475 ops[i] = XEXP (ops[i], 0);
4481 ops[i] = XEXP (ops[i], 0);
4482 negs[i] = ! negs[i];
4487 ops[i] = XEXP (ops[i], 0);
4493 /* ~a -> (-a - 1) */
4496 ops[n_ops] = constm1_rtx;
4497 negs[n_ops++] = negs[i];
4498 ops[i] = XEXP (ops[i], 0);
4499 negs[i] = ! negs[i];
4506 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4514 /* If we only have two operands, we can't do anything. */
4518 /* Now simplify each pair of operands until nothing changes. The first
4519 time through just simplify constants against each other. */
4526 for (i = 0; i < n_ops - 1; i++)
4527 for (j = i + 1; j < n_ops; j++)
4528 if (ops[i] != 0 && ops[j] != 0
4529 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4531 rtx lhs = ops[i], rhs = ops[j];
4532 enum rtx_code ncode = PLUS;
4534 if (negs[i] && ! negs[j])
4535 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4536 else if (! negs[i] && negs[j])
4539 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4542 ops[i] = tem, ops[j] = 0;
4543 negs[i] = negs[i] && negs[j];
4544 if (GET_CODE (tem) == NEG)
4545 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4547 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4548 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4556 /* Pack all the operands to the lower-numbered entries and give up if
4557 we didn't reduce the number of operands we had. Make sure we
4558 count a CONST as two operands. If we have the same number of
4559 operands, but have made more CONSTs than we had, this is also
4560 an improvement, so accept it. */
4562 for (i = 0, j = 0; j < n_ops; j++)
4565 ops[i] = ops[j], negs[i++] = negs[j];
4566 if (GET_CODE (ops[j]) == CONST)
4570 if (i + n_consts > input_ops
4571 || (i + n_consts == input_ops && n_consts <= input_consts))
4576 /* If we have a CONST_INT, put it last. */
4577 for (i = 0; i < n_ops - 1; i++)
4578 if (GET_CODE (ops[i]) == CONST_INT)
4580 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4581 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4584 /* Put a non-negated operand first. If there aren't any, make all
4585 operands positive and negate the whole thing later. */
4586 for (i = 0; i < n_ops && negs[i]; i++)
4591 for (i = 0; i < n_ops; i++)
4597 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4598 j = negs[0], negs[0] = negs[i], negs[i] = j;
4601 /* Now make the result by performing the requested operations. */
4603 for (i = 1; i < n_ops; i++)
4604 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4606 return negate ? gen_rtx_NEG (mode, result) : result;
4609 /* Make a binary operation by properly ordering the operands and
4610 seeing if the expression folds. */
4613 cse_gen_binary (code, mode, op0, op1)
4615 enum machine_mode mode;
4620 /* Put complex operands first and constants second if commutative. */
4621 if (GET_RTX_CLASS (code) == 'c'
4622 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4623 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4624 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4625 || (GET_CODE (op0) == SUBREG
4626 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4627 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4628 tem = op0, op0 = op1, op1 = tem;
4630 /* If this simplifies, do it. */
4631 tem = simplify_binary_operation (code, mode, op0, op1);
4636 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4637 just form the operation. */
4639 if (code == PLUS && GET_CODE (op1) == CONST_INT
4640 && GET_MODE (op0) != VOIDmode)
4641 return plus_constant (op0, INTVAL (op1));
4642 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4643 && GET_MODE (op0) != VOIDmode)
4644 return plus_constant (op0, - INTVAL (op1));
4646 return gen_rtx_fmt_ee (code, mode, op0, op1);
4654 int equal, op0lt, op1lt;
4658 check_fold_consts (data)
4661 struct cfc_args * args = (struct cfc_args *) data;
4662 REAL_VALUE_TYPE d0, d1;
4664 REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
4665 REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
4666 args->equal = REAL_VALUES_EQUAL (d0, d1);
4667 args->op0lt = REAL_VALUES_LESS (d0, d1);
4668 args->op1lt = REAL_VALUES_LESS (d1, d0);
4671 /* Like simplify_binary_operation except used for relational operators.
4672 MODE is the mode of the operands, not that of the result. If MODE
4673 is VOIDmode, both operands must also be VOIDmode and we compare the
4674 operands in "infinite precision".
4676 If no simplification is possible, this function returns zero. Otherwise,
4677 it returns either const_true_rtx or const0_rtx. */
4680 simplify_relational_operation (code, mode, op0, op1)
4682 enum machine_mode mode;
4685 int equal, op0lt, op0ltu, op1lt, op1ltu;
4688 /* If op0 is a compare, extract the comparison arguments from it. */
4689 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4690 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4692 /* We can't simplify MODE_CC values since we don't know what the
4693 actual comparison is. */
4694 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4701 /* For integer comparisons of A and B maybe we can simplify A - B and can
4702 then simplify a comparison of that with zero. If A and B are both either
4703 a register or a CONST_INT, this can't help; testing for these cases will
4704 prevent infinite recursion here and speed things up.
4706 If CODE is an unsigned comparison, then we can never do this optimization,
4707 because it gives an incorrect result if the subtraction wraps around zero.
4708 ANSI C defines unsigned operations such that they never overflow, and
4709 thus such cases can not be ignored. */
4711 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4712 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4713 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4714 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4715 && code != GTU && code != GEU && code != LTU && code != LEU)
4716 return simplify_relational_operation (signed_condition (code),
4717 mode, tem, const0_rtx);
4719 /* For non-IEEE floating-point, if the two operands are equal, we know the
4721 if (rtx_equal_p (op0, op1)
4722 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4723 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4724 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4726 /* If the operands are floating-point constants, see if we can fold
4728 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4729 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4730 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4732 struct cfc_args args;
4734 /* Setup input for check_fold_consts() */
4738 if (do_float_handler(check_fold_consts, (PTR) &args) == 0)
4739 /* We got an exception from check_fold_consts() */
4742 /* Receive output from check_fold_consts() */
4744 op0lt = op0ltu = args.op0lt;
4745 op1lt = op1ltu = args.op1lt;
4747 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4749 /* Otherwise, see if the operands are both integers. */
4750 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4751 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4752 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4754 int width = GET_MODE_BITSIZE (mode);
4755 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4756 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4758 /* Get the two words comprising each integer constant. */
4759 if (GET_CODE (op0) == CONST_DOUBLE)
4761 l0u = l0s = CONST_DOUBLE_LOW (op0);
4762 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4766 l0u = l0s = INTVAL (op0);
4767 h0u = h0s = l0s < 0 ? -1 : 0;
4770 if (GET_CODE (op1) == CONST_DOUBLE)
4772 l1u = l1s = CONST_DOUBLE_LOW (op1);
4773 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4777 l1u = l1s = INTVAL (op1);
4778 h1u = h1s = l1s < 0 ? -1 : 0;
4781 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4782 we have to sign or zero-extend the values. */
4783 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4784 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4786 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4788 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4789 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4791 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4792 l0s |= ((HOST_WIDE_INT) (-1) << width);
4794 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4795 l1s |= ((HOST_WIDE_INT) (-1) << width);
4798 equal = (h0u == h1u && l0u == l1u);
4799 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4800 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4801 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4802 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4805 /* Otherwise, there are some code-specific tests we can make. */
4811 /* References to the frame plus a constant or labels cannot
4812 be zero, but a SYMBOL_REF can due to #pragma weak. */
4813 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4814 || GET_CODE (op0) == LABEL_REF)
4815 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4816 /* On some machines, the ap reg can be 0 sometimes. */
4817 && op0 != arg_pointer_rtx
4824 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4825 || GET_CODE (op0) == LABEL_REF)
4826 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4827 && op0 != arg_pointer_rtx
4830 return const_true_rtx;
4834 /* Unsigned values are never negative. */
4835 if (op1 == const0_rtx)
4836 return const_true_rtx;
4840 if (op1 == const0_rtx)
4845 /* Unsigned values are never greater than the largest
4847 if (GET_CODE (op1) == CONST_INT
4848 && (unsigned HOST_WIDE_INT) INTVAL (op1) == GET_MODE_MASK (mode)
4849 && INTEGRAL_MODE_P (mode))
4850 return const_true_rtx;
4854 if (GET_CODE (op1) == CONST_INT
4855 && (unsigned HOST_WIDE_INT) INTVAL (op1) == GET_MODE_MASK (mode)
4856 && INTEGRAL_MODE_P (mode))
4867 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4872 return equal ? const_true_rtx : const0_rtx;
4874 return ! equal ? const_true_rtx : const0_rtx;
4876 return op0lt ? const_true_rtx : const0_rtx;
4878 return op1lt ? const_true_rtx : const0_rtx;
4880 return op0ltu ? const_true_rtx : const0_rtx;
4882 return op1ltu ? const_true_rtx : const0_rtx;
4884 return equal || op0lt ? const_true_rtx : const0_rtx;
4886 return equal || op1lt ? const_true_rtx : const0_rtx;
4888 return equal || op0ltu ? const_true_rtx : const0_rtx;
4890 return equal || op1ltu ? const_true_rtx : const0_rtx;
4896 /* Simplify CODE, an operation with result mode MODE and three operands,
4897 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4898 a constant. Return 0 if no simplifications is possible. */
4901 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4903 enum machine_mode mode, op0_mode;
4906 int width = GET_MODE_BITSIZE (mode);
4908 /* VOIDmode means "infinite" precision. */
4910 width = HOST_BITS_PER_WIDE_INT;
4916 if (GET_CODE (op0) == CONST_INT
4917 && GET_CODE (op1) == CONST_INT
4918 && GET_CODE (op2) == CONST_INT
4919 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4920 && width <= HOST_BITS_PER_WIDE_INT)
4922 /* Extracting a bit-field from a constant */
4923 HOST_WIDE_INT val = INTVAL (op0);
4925 if (BITS_BIG_ENDIAN)
4926 val >>= (GET_MODE_BITSIZE (op0_mode)
4927 - INTVAL (op2) - INTVAL (op1));
4929 val >>= INTVAL (op2);
4931 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4933 /* First zero-extend. */
4934 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4935 /* If desired, propagate sign bit. */
4936 if (code == SIGN_EXTRACT
4937 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4938 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4941 /* Clear the bits that don't belong in our mode,
4942 unless they and our sign bit are all one.
4943 So we get either a reasonable negative value or a reasonable
4944 unsigned value for this mode. */
4945 if (width < HOST_BITS_PER_WIDE_INT
4946 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4947 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4948 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4950 return GEN_INT (val);
4955 if (GET_CODE (op0) == CONST_INT)
4956 return op0 != const0_rtx ? op1 : op2;
4958 /* Convert a == b ? b : a to "a". */
4959 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4960 && rtx_equal_p (XEXP (op0, 0), op1)
4961 && rtx_equal_p (XEXP (op0, 1), op2))
4963 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4964 && rtx_equal_p (XEXP (op0, 1), op1)
4965 && rtx_equal_p (XEXP (op0, 0), op2))
4967 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4970 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4971 XEXP (op0, 0), XEXP (op0, 1));
4972 /* See if any simplifications were possible. */
4973 if (temp == const0_rtx)
4975 else if (temp == const1_rtx)
4987 /* If X is a nontrivial arithmetic operation on an argument
4988 for which a constant value can be determined, return
4989 the result of operating on that value, as a constant.
4990 Otherwise, return X, possibly with one or more operands
4991 modified by recursive calls to this function.
4993 If X is a register whose contents are known, we do NOT
4994 return those contents here. equiv_constant is called to
4997 INSN is the insn that we may be modifying. If it is 0, make a copy
4998 of X before modifying it. */
5005 register enum rtx_code code;
5006 register enum machine_mode mode;
5007 register const char *fmt;
5013 /* Folded equivalents of first two operands of X. */
5017 /* Constant equivalents of first three operands of X;
5018 0 when no such equivalent is known. */
5023 /* The mode of the first operand of X. We need this for sign and zero
5025 enum machine_mode mode_arg0;
5030 mode = GET_MODE (x);
5031 code = GET_CODE (x);
5040 /* No use simplifying an EXPR_LIST
5041 since they are used only for lists of args
5042 in a function call's REG_EQUAL note. */
5044 /* Changing anything inside an ADDRESSOF is incorrect; we don't
5045 want to (e.g.,) make (addressof (const_int 0)) just because
5046 the location is known to be zero. */
5052 return prev_insn_cc0;
5056 /* If the next insn is a CODE_LABEL followed by a jump table,
5057 PC's value is a LABEL_REF pointing to that label. That
5058 lets us fold switch statements on the Vax. */
5059 if (insn && GET_CODE (insn) == JUMP_INSN)
5061 rtx next = next_nonnote_insn (insn);
5063 if (next && GET_CODE (next) == CODE_LABEL
5064 && NEXT_INSN (next) != 0
5065 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
5066 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
5067 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
5068 return gen_rtx_LABEL_REF (Pmode, next);
5073 /* See if we previously assigned a constant value to this SUBREG. */
5074 if ((new = lookup_as_function (x, CONST_INT)) != 0
5075 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
5078 /* If this is a paradoxical SUBREG, we have no idea what value the
5079 extra bits would have. However, if the operand is equivalent
5080 to a SUBREG whose operand is the same as our mode, and all the
5081 modes are within a word, we can just use the inner operand
5082 because these SUBREGs just say how to treat the register.
5084 Similarly if we find an integer constant. */
5086 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
5088 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
5089 struct table_elt *elt;
5091 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
5092 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
5093 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
5095 for (elt = elt->first_same_value;
5096 elt; elt = elt->next_same_value)
5098 if (CONSTANT_P (elt->exp)
5099 && GET_MODE (elt->exp) == VOIDmode)
5102 if (GET_CODE (elt->exp) == SUBREG
5103 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5104 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5105 return copy_rtx (SUBREG_REG (elt->exp));
5111 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5112 We might be able to if the SUBREG is extracting a single word in an
5113 integral mode or extracting the low part. */
5115 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
5116 const_arg0 = equiv_constant (folded_arg0);
5118 folded_arg0 = const_arg0;
5120 if (folded_arg0 != SUBREG_REG (x))
5124 if (GET_MODE_CLASS (mode) == MODE_INT
5125 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5126 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
5127 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
5128 GET_MODE (SUBREG_REG (x)));
5129 if (new == 0 && subreg_lowpart_p (x))
5130 new = gen_lowpart_if_possible (mode, folded_arg0);
5135 /* If this is a narrowing SUBREG and our operand is a REG, see if
5136 we can find an equivalence for REG that is an arithmetic operation
5137 in a wider mode where both operands are paradoxical SUBREGs
5138 from objects of our result mode. In that case, we couldn't report
5139 an equivalent value for that operation, since we don't know what the
5140 extra bits will be. But we can find an equivalence for this SUBREG
5141 by folding that operation is the narrow mode. This allows us to
5142 fold arithmetic in narrow modes when the machine only supports
5143 word-sized arithmetic.
5145 Also look for a case where we have a SUBREG whose operand is the
5146 same as our result. If both modes are smaller than a word, we
5147 are simply interpreting a register in different modes and we
5148 can use the inner value. */
5150 if (GET_CODE (folded_arg0) == REG
5151 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
5152 && subreg_lowpart_p (x))
5154 struct table_elt *elt;
5156 /* We can use HASH here since we know that canon_hash won't be
5158 elt = lookup (folded_arg0,
5159 HASH (folded_arg0, GET_MODE (folded_arg0)),
5160 GET_MODE (folded_arg0));
5163 elt = elt->first_same_value;
5165 for (; elt; elt = elt->next_same_value)
5167 enum rtx_code eltcode = GET_CODE (elt->exp);
5169 /* Just check for unary and binary operations. */
5170 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
5171 && GET_CODE (elt->exp) != SIGN_EXTEND
5172 && GET_CODE (elt->exp) != ZERO_EXTEND
5173 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5174 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
5176 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
5178 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5179 op0 = fold_rtx (op0, NULL_RTX);
5181 op0 = equiv_constant (op0);
5183 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
5186 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
5187 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
5188 && eltcode != DIV && eltcode != MOD
5189 && eltcode != UDIV && eltcode != UMOD
5190 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
5191 && eltcode != ROTATE && eltcode != ROTATERT
5192 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5193 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
5195 || CONSTANT_P (XEXP (elt->exp, 0)))
5196 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
5197 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
5199 || CONSTANT_P (XEXP (elt->exp, 1))))
5201 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
5202 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
5204 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5205 op0 = fold_rtx (op0, NULL_RTX);
5208 op0 = equiv_constant (op0);
5210 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5211 op1 = fold_rtx (op1, NULL_RTX);
5214 op1 = equiv_constant (op1);
5216 /* If we are looking for the low SImode part of
5217 (ashift:DI c (const_int 32)), it doesn't work
5218 to compute that in SImode, because a 32-bit shift
5219 in SImode is unpredictable. We know the value is 0. */
5221 && GET_CODE (elt->exp) == ASHIFT
5222 && GET_CODE (op1) == CONST_INT
5223 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5225 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5227 /* If the count fits in the inner mode's width,
5228 but exceeds the outer mode's width,
5229 the value will get truncated to 0
5233 /* If the count exceeds even the inner mode's width,
5234 don't fold this expression. */
5237 else if (op0 && op1)
5238 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5242 else if (GET_CODE (elt->exp) == SUBREG
5243 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5244 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5246 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5247 new = copy_rtx (SUBREG_REG (elt->exp));
5258 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5259 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5260 new = lookup_as_function (XEXP (x, 0), code);
5262 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5266 /* If we are not actually processing an insn, don't try to find the
5267 best address. Not only don't we care, but we could modify the
5268 MEM in an invalid way since we have no insn to validate against. */
5270 find_best_addr (insn, &XEXP (x, 0));
5273 /* Even if we don't fold in the insn itself,
5274 we can safely do so here, in hopes of getting a constant. */
5275 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5277 HOST_WIDE_INT offset = 0;
5279 if (GET_CODE (addr) == REG
5280 && REGNO_QTY_VALID_P (REGNO (addr))
5281 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
5282 && qty_const[REG_QTY (REGNO (addr))] != 0)
5283 addr = qty_const[REG_QTY (REGNO (addr))];
5285 /* If address is constant, split it into a base and integer offset. */
5286 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5288 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5289 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5291 base = XEXP (XEXP (addr, 0), 0);
5292 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5294 else if (GET_CODE (addr) == LO_SUM
5295 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5296 base = XEXP (addr, 1);
5297 else if (GET_CODE (addr) == ADDRESSOF)
5298 return change_address (x, VOIDmode, addr);
5300 /* If this is a constant pool reference, we can fold it into its
5301 constant to allow better value tracking. */
5302 if (base && GET_CODE (base) == SYMBOL_REF
5303 && CONSTANT_POOL_ADDRESS_P (base))
5305 rtx constant = get_pool_constant (base);
5306 enum machine_mode const_mode = get_pool_mode (base);
5309 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5310 constant_pool_entries_cost = COST (constant);
5312 /* If we are loading the full constant, we have an equivalence. */
5313 if (offset == 0 && mode == const_mode)
5316 /* If this actually isn't a constant (weird!), we can't do
5317 anything. Otherwise, handle the two most common cases:
5318 extracting a word from a multi-word constant, and extracting
5319 the low-order bits. Other cases don't seem common enough to
5321 if (! CONSTANT_P (constant))
5324 if (GET_MODE_CLASS (mode) == MODE_INT
5325 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5326 && offset % UNITS_PER_WORD == 0
5327 && (new = operand_subword (constant,
5328 offset / UNITS_PER_WORD,
5329 0, const_mode)) != 0)
5332 if (((BYTES_BIG_ENDIAN
5333 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5334 || (! BYTES_BIG_ENDIAN && offset == 0))
5335 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5339 /* If this is a reference to a label at a known position in a jump
5340 table, we also know its value. */
5341 if (base && GET_CODE (base) == LABEL_REF)
5343 rtx label = XEXP (base, 0);
5344 rtx table_insn = NEXT_INSN (label);
5346 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5347 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5349 rtx table = PATTERN (table_insn);
5352 && (offset / GET_MODE_SIZE (GET_MODE (table))
5353 < XVECLEN (table, 0)))
5354 return XVECEXP (table, 0,
5355 offset / GET_MODE_SIZE (GET_MODE (table)));
5357 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5358 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5360 rtx table = PATTERN (table_insn);
5363 && (offset / GET_MODE_SIZE (GET_MODE (table))
5364 < XVECLEN (table, 1)))
5366 offset /= GET_MODE_SIZE (GET_MODE (table));
5367 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5370 if (GET_MODE (table) != Pmode)
5371 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5373 /* Indicate this is a constant. This isn't a
5374 valid form of CONST, but it will only be used
5375 to fold the next insns and then discarded, so
5378 Note this expression must be explicitly discarded,
5379 by cse_insn, else it may end up in a REG_EQUAL note
5380 and "escape" to cause problems elsewhere. */
5381 return gen_rtx_CONST (GET_MODE (new), new);
5390 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5391 validate_change (insn, &XVECEXP (x, 3, i),
5392 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5402 mode_arg0 = VOIDmode;
5404 /* Try folding our operands.
5405 Then see which ones have constant values known. */
5407 fmt = GET_RTX_FORMAT (code);
5408 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5411 rtx arg = XEXP (x, i);
5412 rtx folded_arg = arg, const_arg = 0;
5413 enum machine_mode mode_arg = GET_MODE (arg);
5414 rtx cheap_arg, expensive_arg;
5415 rtx replacements[2];
5418 /* Most arguments are cheap, so handle them specially. */
5419 switch (GET_CODE (arg))
5422 /* This is the same as calling equiv_constant; it is duplicated
5424 if (REGNO_QTY_VALID_P (REGNO (arg))
5425 && qty_const[REG_QTY (REGNO (arg))] != 0
5426 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
5427 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
5429 = gen_lowpart_if_possible (GET_MODE (arg),
5430 qty_const[REG_QTY (REGNO (arg))]);
5443 folded_arg = prev_insn_cc0;
5444 mode_arg = prev_insn_cc0_mode;
5445 const_arg = equiv_constant (folded_arg);
5450 folded_arg = fold_rtx (arg, insn);
5451 const_arg = equiv_constant (folded_arg);
5454 /* For the first three operands, see if the operand
5455 is constant or equivalent to a constant. */
5459 folded_arg0 = folded_arg;
5460 const_arg0 = const_arg;
5461 mode_arg0 = mode_arg;
5464 folded_arg1 = folded_arg;
5465 const_arg1 = const_arg;
5468 const_arg2 = const_arg;
5472 /* Pick the least expensive of the folded argument and an
5473 equivalent constant argument. */
5474 if (const_arg == 0 || const_arg == folded_arg
5475 || COST (const_arg) > COST (folded_arg))
5476 cheap_arg = folded_arg, expensive_arg = const_arg;
5478 cheap_arg = const_arg, expensive_arg = folded_arg;
5480 /* Try to replace the operand with the cheapest of the two
5481 possibilities. If it doesn't work and this is either of the first
5482 two operands of a commutative operation, try swapping them.
5483 If THAT fails, try the more expensive, provided it is cheaper
5484 than what is already there. */
5486 if (cheap_arg == XEXP (x, i))
5489 if (insn == 0 && ! copied)
5495 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5497 j < 2 && replacements[j]
5498 && COST (replacements[j]) < COST (XEXP (x, i));
5501 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5504 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5506 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5507 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5509 if (apply_change_group ())
5511 /* Swap them back to be invalid so that this loop can
5512 continue and flag them to be swapped back later. */
5515 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5527 /* Don't try to fold inside of a vector of expressions.
5528 Doing nothing is harmless. */
5532 /* If a commutative operation, place a constant integer as the second
5533 operand unless the first operand is also a constant integer. Otherwise,
5534 place any constant second unless the first operand is also a constant. */
5536 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5538 if (must_swap || (const_arg0
5540 || (GET_CODE (const_arg0) == CONST_INT
5541 && GET_CODE (const_arg1) != CONST_INT))))
5543 register rtx tem = XEXP (x, 0);
5545 if (insn == 0 && ! copied)
5551 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5552 validate_change (insn, &XEXP (x, 1), tem, 1);
5553 if (apply_change_group ())
5555 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5556 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5561 /* If X is an arithmetic operation, see if we can simplify it. */
5563 switch (GET_RTX_CLASS (code))
5569 /* We can't simplify extension ops unless we know the
5571 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5572 && mode_arg0 == VOIDmode)
5575 /* If we had a CONST, strip it off and put it back later if we
5577 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5578 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5580 new = simplify_unary_operation (code, mode,
5581 const_arg0 ? const_arg0 : folded_arg0,
5583 if (new != 0 && is_const)
5584 new = gen_rtx_CONST (mode, new);
5589 /* See what items are actually being compared and set FOLDED_ARG[01]
5590 to those values and CODE to the actual comparison code. If any are
5591 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5592 do anything if both operands are already known to be constant. */
5594 if (const_arg0 == 0 || const_arg1 == 0)
5596 struct table_elt *p0, *p1;
5597 rtx true = const_true_rtx, false = const0_rtx;
5598 enum machine_mode mode_arg1;
5600 #ifdef FLOAT_STORE_FLAG_VALUE
5601 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5603 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5605 false = CONST0_RTX (mode);
5609 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5610 &mode_arg0, &mode_arg1);
5611 const_arg0 = equiv_constant (folded_arg0);
5612 const_arg1 = equiv_constant (folded_arg1);
5614 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5615 what kinds of things are being compared, so we can't do
5616 anything with this comparison. */
5618 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5621 /* If we do not now have two constants being compared, see
5622 if we can nevertheless deduce some things about the
5624 if (const_arg0 == 0 || const_arg1 == 0)
5626 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5627 non-explicit constant? These aren't zero, but we
5628 don't know their sign. */
5629 if (const_arg1 == const0_rtx
5630 && (NONZERO_BASE_PLUS_P (folded_arg0)
5631 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5633 || GET_CODE (folded_arg0) == SYMBOL_REF
5635 || GET_CODE (folded_arg0) == LABEL_REF
5636 || GET_CODE (folded_arg0) == CONST))
5640 else if (code == NE)
5644 /* See if the two operands are the same. We don't do this
5645 for IEEE floating-point since we can't assume x == x
5646 since x might be a NaN. */
5648 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5649 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5650 && (folded_arg0 == folded_arg1
5651 || (GET_CODE (folded_arg0) == REG
5652 && GET_CODE (folded_arg1) == REG
5653 && (REG_QTY (REGNO (folded_arg0))
5654 == REG_QTY (REGNO (folded_arg1))))
5655 || ((p0 = lookup (folded_arg0,
5656 (safe_hash (folded_arg0, mode_arg0)
5657 % NBUCKETS), mode_arg0))
5658 && (p1 = lookup (folded_arg1,
5659 (safe_hash (folded_arg1, mode_arg0)
5660 % NBUCKETS), mode_arg0))
5661 && p0->first_same_value == p1->first_same_value)))
5662 return ((code == EQ || code == LE || code == GE
5663 || code == LEU || code == GEU)
5666 /* If FOLDED_ARG0 is a register, see if the comparison we are
5667 doing now is either the same as we did before or the reverse
5668 (we only check the reverse if not floating-point). */
5669 else if (GET_CODE (folded_arg0) == REG)
5671 int qty = REG_QTY (REGNO (folded_arg0));
5673 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5674 && (comparison_dominates_p (qty_comparison_code[qty], code)
5675 || (comparison_dominates_p (qty_comparison_code[qty],
5676 reverse_condition (code))
5677 && ! FLOAT_MODE_P (mode_arg0)))
5678 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5680 && rtx_equal_p (qty_comparison_const[qty],
5682 || (GET_CODE (folded_arg1) == REG
5683 && (REG_QTY (REGNO (folded_arg1))
5684 == qty_comparison_qty[qty]))))
5685 return (comparison_dominates_p (qty_comparison_code[qty],
5692 /* If we are comparing against zero, see if the first operand is
5693 equivalent to an IOR with a constant. If so, we may be able to
5694 determine the result of this comparison. */
5696 if (const_arg1 == const0_rtx)
5698 rtx y = lookup_as_function (folded_arg0, IOR);
5702 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5703 && GET_CODE (inner_const) == CONST_INT
5704 && INTVAL (inner_const) != 0)
5706 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5707 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5708 && (INTVAL (inner_const)
5709 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5710 rtx true = const_true_rtx, false = const0_rtx;
5712 #ifdef FLOAT_STORE_FLAG_VALUE
5713 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5715 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5717 false = CONST0_RTX (mode);
5741 new = simplify_relational_operation (code, mode_arg0,
5742 const_arg0 ? const_arg0 : folded_arg0,
5743 const_arg1 ? const_arg1 : folded_arg1);
5744 #ifdef FLOAT_STORE_FLAG_VALUE
5745 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5746 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5747 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5756 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5757 with that LABEL_REF as its second operand. If so, the result is
5758 the first operand of that MINUS. This handles switches with an
5759 ADDR_DIFF_VEC table. */
5760 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5763 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5764 : lookup_as_function (folded_arg0, MINUS);
5766 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5767 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5770 /* Now try for a CONST of a MINUS like the above. */
5771 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5772 : lookup_as_function (folded_arg0, CONST))) != 0
5773 && GET_CODE (XEXP (y, 0)) == MINUS
5774 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5775 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5776 return XEXP (XEXP (y, 0), 0);
5779 /* Likewise if the operands are in the other order. */
5780 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5783 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5784 : lookup_as_function (folded_arg1, MINUS);
5786 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5787 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5790 /* Now try for a CONST of a MINUS like the above. */
5791 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5792 : lookup_as_function (folded_arg1, CONST))) != 0
5793 && GET_CODE (XEXP (y, 0)) == MINUS
5794 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5795 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5796 return XEXP (XEXP (y, 0), 0);
5799 /* If second operand is a register equivalent to a negative
5800 CONST_INT, see if we can find a register equivalent to the
5801 positive constant. Make a MINUS if so. Don't do this for
5802 a non-negative constant since we might then alternate between
5803 chosing positive and negative constants. Having the positive
5804 constant previously-used is the more common case. Be sure
5805 the resulting constant is non-negative; if const_arg1 were
5806 the smallest negative number this would overflow: depending
5807 on the mode, this would either just be the same value (and
5808 hence not save anything) or be incorrect. */
5809 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5810 && INTVAL (const_arg1) < 0
5811 /* This used to test
5813 - INTVAL (const_arg1) >= 0
5815 But The Sun V5.0 compilers mis-compiled that test. So
5816 instead we test for the problematic value in a more direct
5817 manner and hope the Sun compilers get it correct. */
5818 && INTVAL (const_arg1) !=
5819 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
5820 && GET_CODE (folded_arg1) == REG)
5822 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5824 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5828 for (p = p->first_same_value; p; p = p->next_same_value)
5829 if (GET_CODE (p->exp) == REG)
5830 return cse_gen_binary (MINUS, mode, folded_arg0,
5831 canon_reg (p->exp, NULL_RTX));
5836 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5837 If so, produce (PLUS Z C2-C). */
5838 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5840 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5841 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5842 return fold_rtx (plus_constant (copy_rtx (y),
5843 -INTVAL (const_arg1)),
5847 /* ... fall through ... */
5850 case SMIN: case SMAX: case UMIN: case UMAX:
5851 case IOR: case AND: case XOR:
5852 case MULT: case DIV: case UDIV:
5853 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5854 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5855 is known to be of similar form, we may be able to replace the
5856 operation with a combined operation. This may eliminate the
5857 intermediate operation if every use is simplified in this way.
5858 Note that the similar optimization done by combine.c only works
5859 if the intermediate operation's result has only one reference. */
5861 if (GET_CODE (folded_arg0) == REG
5862 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5865 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5866 rtx y = lookup_as_function (folded_arg0, code);
5868 enum rtx_code associate_code;
5872 || 0 == (inner_const
5873 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5874 || GET_CODE (inner_const) != CONST_INT
5875 /* If we have compiled a statement like
5876 "if (x == (x & mask1))", and now are looking at
5877 "x & mask2", we will have a case where the first operand
5878 of Y is the same as our first operand. Unless we detect
5879 this case, an infinite loop will result. */
5880 || XEXP (y, 0) == folded_arg0)
5883 /* Don't associate these operations if they are a PLUS with the
5884 same constant and it is a power of two. These might be doable
5885 with a pre- or post-increment. Similarly for two subtracts of
5886 identical powers of two with post decrement. */
5888 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5889 && ((HAVE_PRE_INCREMENT
5890 && exact_log2 (INTVAL (const_arg1)) >= 0)
5891 || (HAVE_POST_INCREMENT
5892 && exact_log2 (INTVAL (const_arg1)) >= 0)
5893 || (HAVE_PRE_DECREMENT
5894 && exact_log2 (- INTVAL (const_arg1)) >= 0)
5895 || (HAVE_POST_DECREMENT
5896 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
5899 /* Compute the code used to compose the constants. For example,
5900 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5903 = (code == MULT || code == DIV || code == UDIV ? MULT
5904 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5906 new_const = simplify_binary_operation (associate_code, mode,
5907 const_arg1, inner_const);
5912 /* If we are associating shift operations, don't let this
5913 produce a shift of the size of the object or larger.
5914 This could occur when we follow a sign-extend by a right
5915 shift on a machine that does a sign-extend as a pair
5918 if (is_shift && GET_CODE (new_const) == CONST_INT
5919 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5921 /* As an exception, we can turn an ASHIFTRT of this
5922 form into a shift of the number of bits - 1. */
5923 if (code == ASHIFTRT)
5924 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5929 y = copy_rtx (XEXP (y, 0));
5931 /* If Y contains our first operand (the most common way this
5932 can happen is if Y is a MEM), we would do into an infinite
5933 loop if we tried to fold it. So don't in that case. */
5935 if (! reg_mentioned_p (folded_arg0, y))
5936 y = fold_rtx (y, insn);
5938 return cse_gen_binary (code, mode, y, new_const);
5946 new = simplify_binary_operation (code, mode,
5947 const_arg0 ? const_arg0 : folded_arg0,
5948 const_arg1 ? const_arg1 : folded_arg1);
5952 /* (lo_sum (high X) X) is simply X. */
5953 if (code == LO_SUM && const_arg0 != 0
5954 && GET_CODE (const_arg0) == HIGH
5955 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5961 new = simplify_ternary_operation (code, mode, mode_arg0,
5962 const_arg0 ? const_arg0 : folded_arg0,
5963 const_arg1 ? const_arg1 : folded_arg1,
5964 const_arg2 ? const_arg2 : XEXP (x, 2));
5968 /* Always eliminate CONSTANT_P_RTX at this stage. */
5969 if (code == CONSTANT_P_RTX)
5970 return (const_arg0 ? const1_rtx : const0_rtx);
5974 return new ? new : x;
5977 /* Return a constant value currently equivalent to X.
5978 Return 0 if we don't know one. */
5984 if (GET_CODE (x) == REG
5985 && REGNO_QTY_VALID_P (REGNO (x))
5986 && qty_const[REG_QTY (REGNO (x))])
5987 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
5989 if (x == 0 || CONSTANT_P (x))
5992 /* If X is a MEM, try to fold it outside the context of any insn to see if
5993 it might be equivalent to a constant. That handles the case where it
5994 is a constant-pool reference. Then try to look it up in the hash table
5995 in case it is something whose value we have seen before. */
5997 if (GET_CODE (x) == MEM)
5999 struct table_elt *elt;
6001 x = fold_rtx (x, NULL_RTX);
6005 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
6009 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
6010 if (elt->is_const && CONSTANT_P (elt->exp))
6017 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
6018 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
6019 least-significant part of X.
6020 MODE specifies how big a part of X to return.
6022 If the requested operation cannot be done, 0 is returned.
6024 This is similar to gen_lowpart in emit-rtl.c. */
6027 gen_lowpart_if_possible (mode, x)
6028 enum machine_mode mode;
6031 rtx result = gen_lowpart_common (mode, x);
6035 else if (GET_CODE (x) == MEM)
6037 /* This is the only other case we handle. */
6038 register int offset = 0;
6041 if (WORDS_BIG_ENDIAN)
6042 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
6043 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
6044 if (BYTES_BIG_ENDIAN)
6045 /* Adjust the address so that the address-after-the-data is
6047 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
6048 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
6049 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
6050 if (! memory_address_p (mode, XEXP (new, 0)))
6052 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
6053 MEM_COPY_ATTRIBUTES (new, x);
6060 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
6061 branch. It will be zero if not.
6063 In certain cases, this can cause us to add an equivalence. For example,
6064 if we are following the taken case of
6066 we can add the fact that `i' and '2' are now equivalent.
6068 In any case, we can record that this comparison was passed. If the same
6069 comparison is seen later, we will know its value. */
6072 record_jump_equiv (insn, taken)
6076 int cond_known_true;
6078 enum machine_mode mode, mode0, mode1;
6079 int reversed_nonequality = 0;
6082 /* Ensure this is the right kind of insn. */
6083 if (! condjump_p (insn) || simplejump_p (insn))
6086 /* See if this jump condition is known true or false. */
6088 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
6090 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
6092 /* Get the type of comparison being done and the operands being compared.
6093 If we had to reverse a non-equality condition, record that fact so we
6094 know that it isn't valid for floating-point. */
6095 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
6096 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
6097 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
6099 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
6100 if (! cond_known_true)
6102 reversed_nonequality = (code != EQ && code != NE);
6103 code = reverse_condition (code);
6106 /* The mode is the mode of the non-constant. */
6108 if (mode1 != VOIDmode)
6111 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
6114 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6115 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6116 Make any useful entries we can with that information. Called from
6117 above function and called recursively. */
6120 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
6122 enum machine_mode mode;
6124 int reversed_nonequality;
6126 unsigned op0_hash, op1_hash;
6127 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
6128 struct table_elt *op0_elt, *op1_elt;
6130 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6131 we know that they are also equal in the smaller mode (this is also
6132 true for all smaller modes whether or not there is a SUBREG, but
6133 is not worth testing for with no SUBREG). */
6135 /* Note that GET_MODE (op0) may not equal MODE. */
6136 if (code == EQ && GET_CODE (op0) == SUBREG
6137 && (GET_MODE_SIZE (GET_MODE (op0))
6138 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6140 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6141 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6143 record_jump_cond (code, mode, SUBREG_REG (op0),
6144 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6145 reversed_nonequality);
6148 if (code == EQ && GET_CODE (op1) == SUBREG
6149 && (GET_MODE_SIZE (GET_MODE (op1))
6150 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6152 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6153 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6155 record_jump_cond (code, mode, SUBREG_REG (op1),
6156 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6157 reversed_nonequality);
6160 /* Similarly, if this is an NE comparison, and either is a SUBREG
6161 making a smaller mode, we know the whole thing is also NE. */
6163 /* Note that GET_MODE (op0) may not equal MODE;
6164 if we test MODE instead, we can get an infinite recursion
6165 alternating between two modes each wider than MODE. */
6167 if (code == NE && GET_CODE (op0) == SUBREG
6168 && subreg_lowpart_p (op0)
6169 && (GET_MODE_SIZE (GET_MODE (op0))
6170 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6172 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6173 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6175 record_jump_cond (code, mode, SUBREG_REG (op0),
6176 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6177 reversed_nonequality);
6180 if (code == NE && GET_CODE (op1) == SUBREG
6181 && subreg_lowpart_p (op1)
6182 && (GET_MODE_SIZE (GET_MODE (op1))
6183 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6185 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6186 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6188 record_jump_cond (code, mode, SUBREG_REG (op1),
6189 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6190 reversed_nonequality);
6193 /* Hash both operands. */
6196 hash_arg_in_memory = 0;
6197 hash_arg_in_struct = 0;
6198 op0_hash = HASH (op0, mode);
6199 op0_in_memory = hash_arg_in_memory;
6200 op0_in_struct = hash_arg_in_struct;
6206 hash_arg_in_memory = 0;
6207 hash_arg_in_struct = 0;
6208 op1_hash = HASH (op1, mode);
6209 op1_in_memory = hash_arg_in_memory;
6210 op1_in_struct = hash_arg_in_struct;
6215 /* Look up both operands. */
6216 op0_elt = lookup (op0, op0_hash, mode);
6217 op1_elt = lookup (op1, op1_hash, mode);
6219 /* If both operands are already equivalent or if they are not in the
6220 table but are identical, do nothing. */
6221 if ((op0_elt != 0 && op1_elt != 0
6222 && op0_elt->first_same_value == op1_elt->first_same_value)
6223 || op0 == op1 || rtx_equal_p (op0, op1))
6226 /* If we aren't setting two things equal all we can do is save this
6227 comparison. Similarly if this is floating-point. In the latter
6228 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6229 If we record the equality, we might inadvertently delete code
6230 whose intent was to change -0 to +0. */
6232 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6234 /* If we reversed a floating-point comparison, if OP0 is not a
6235 register, or if OP1 is neither a register or constant, we can't
6238 if (GET_CODE (op1) != REG)
6239 op1 = equiv_constant (op1);
6241 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6242 || GET_CODE (op0) != REG || op1 == 0)
6245 /* Put OP0 in the hash table if it isn't already. This gives it a
6246 new quantity number. */
6249 if (insert_regs (op0, NULL_PTR, 0))
6251 rehash_using_reg (op0);
6252 op0_hash = HASH (op0, mode);
6254 /* If OP0 is contained in OP1, this changes its hash code
6255 as well. Faster to rehash than to check, except
6256 for the simple case of a constant. */
6257 if (! CONSTANT_P (op1))
6258 op1_hash = HASH (op1,mode);
6261 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6262 op0_elt->in_memory = op0_in_memory;
6263 op0_elt->in_struct = op0_in_struct;
6266 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
6267 if (GET_CODE (op1) == REG)
6269 /* Look it up again--in case op0 and op1 are the same. */
6270 op1_elt = lookup (op1, op1_hash, mode);
6272 /* Put OP1 in the hash table so it gets a new quantity number. */
6275 if (insert_regs (op1, NULL_PTR, 0))
6277 rehash_using_reg (op1);
6278 op1_hash = HASH (op1, mode);
6281 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6282 op1_elt->in_memory = op1_in_memory;
6283 op1_elt->in_struct = op1_in_struct;
6286 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
6287 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
6291 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
6292 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
6298 /* If either side is still missing an equivalence, make it now,
6299 then merge the equivalences. */
6303 if (insert_regs (op0, NULL_PTR, 0))
6305 rehash_using_reg (op0);
6306 op0_hash = HASH (op0, mode);
6309 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6310 op0_elt->in_memory = op0_in_memory;
6311 op0_elt->in_struct = op0_in_struct;
6316 if (insert_regs (op1, NULL_PTR, 0))
6318 rehash_using_reg (op1);
6319 op1_hash = HASH (op1, mode);
6322 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6323 op1_elt->in_memory = op1_in_memory;
6324 op1_elt->in_struct = op1_in_struct;
6327 merge_equiv_classes (op0_elt, op1_elt);
6328 last_jump_equiv_class = op0_elt;
6331 /* CSE processing for one instruction.
6332 First simplify sources and addresses of all assignments
6333 in the instruction, using previously-computed equivalents values.
6334 Then install the new sources and destinations in the table
6335 of available values.
6337 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6338 the insn. It means that INSN is inside libcall block. In this
6339 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6341 /* Data on one SET contained in the instruction. */
6345 /* The SET rtx itself. */
6347 /* The SET_SRC of the rtx (the original value, if it is changing). */
6349 /* The hash-table element for the SET_SRC of the SET. */
6350 struct table_elt *src_elt;
6351 /* Hash value for the SET_SRC. */
6353 /* Hash value for the SET_DEST. */
6355 /* The SET_DEST, with SUBREG, etc., stripped. */
6357 /* Place where the pointer to the INNER_DEST was found. */
6358 rtx *inner_dest_loc;
6359 /* Nonzero if the SET_SRC is in memory. */
6361 /* Nonzero if the SET_SRC is in a structure. */
6363 /* Nonzero if the SET_SRC contains something
6364 whose value cannot be predicted and understood. */
6366 /* Original machine mode, in case it becomes a CONST_INT. */
6367 enum machine_mode mode;
6368 /* A constant equivalent for SET_SRC, if any. */
6370 /* Hash value of constant equivalent for SET_SRC. */
6371 unsigned src_const_hash;
6372 /* Table entry for constant equivalent for SET_SRC, if any. */
6373 struct table_elt *src_const_elt;
6377 cse_insn (insn, libcall_insn)
6381 register rtx x = PATTERN (insn);
6384 register int n_sets = 0;
6387 /* Records what this insn does to set CC0. */
6388 rtx this_insn_cc0 = 0;
6389 enum machine_mode this_insn_cc0_mode = VOIDmode;
6393 struct table_elt *src_eqv_elt = 0;
6394 int src_eqv_volatile = 0;
6395 int src_eqv_in_memory = 0;
6396 int src_eqv_in_struct = 0;
6397 unsigned src_eqv_hash = 0;
6399 struct set *sets = NULL_PTR;
6403 /* Find all the SETs and CLOBBERs in this instruction.
6404 Record all the SETs in the array `set' and count them.
6405 Also determine whether there is a CLOBBER that invalidates
6406 all memory references, or all references at varying addresses. */
6408 if (GET_CODE (insn) == CALL_INSN)
6410 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6411 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6412 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6415 if (GET_CODE (x) == SET)
6417 sets = (struct set *) alloca (sizeof (struct set));
6420 /* Ignore SETs that are unconditional jumps.
6421 They never need cse processing, so this does not hurt.
6422 The reason is not efficiency but rather
6423 so that we can test at the end for instructions
6424 that have been simplified to unconditional jumps
6425 and not be misled by unchanged instructions
6426 that were unconditional jumps to begin with. */
6427 if (SET_DEST (x) == pc_rtx
6428 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6431 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6432 The hard function value register is used only once, to copy to
6433 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6434 Ensure we invalidate the destination register. On the 80386 no
6435 other code would invalidate it since it is a fixed_reg.
6436 We need not check the return of apply_change_group; see canon_reg. */
6438 else if (GET_CODE (SET_SRC (x)) == CALL)
6440 canon_reg (SET_SRC (x), insn);
6441 apply_change_group ();
6442 fold_rtx (SET_SRC (x), insn);
6443 invalidate (SET_DEST (x), VOIDmode);
6448 else if (GET_CODE (x) == PARALLEL)
6450 register int lim = XVECLEN (x, 0);
6452 sets = (struct set *) alloca (lim * sizeof (struct set));
6454 /* Find all regs explicitly clobbered in this insn,
6455 and ensure they are not replaced with any other regs
6456 elsewhere in this insn.
6457 When a reg that is clobbered is also used for input,
6458 we should presume that that is for a reason,
6459 and we should not substitute some other register
6460 which is not supposed to be clobbered.
6461 Therefore, this loop cannot be merged into the one below
6462 because a CALL may precede a CLOBBER and refer to the
6463 value clobbered. We must not let a canonicalization do
6464 anything in that case. */
6465 for (i = 0; i < lim; i++)
6467 register rtx y = XVECEXP (x, 0, i);
6468 if (GET_CODE (y) == CLOBBER)
6470 rtx clobbered = XEXP (y, 0);
6472 if (GET_CODE (clobbered) == REG
6473 || GET_CODE (clobbered) == SUBREG)
6474 invalidate (clobbered, VOIDmode);
6475 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6476 || GET_CODE (clobbered) == ZERO_EXTRACT)
6477 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6481 for (i = 0; i < lim; i++)
6483 register rtx y = XVECEXP (x, 0, i);
6484 if (GET_CODE (y) == SET)
6486 /* As above, we ignore unconditional jumps and call-insns and
6487 ignore the result of apply_change_group. */
6488 if (GET_CODE (SET_SRC (y)) == CALL)
6490 canon_reg (SET_SRC (y), insn);
6491 apply_change_group ();
6492 fold_rtx (SET_SRC (y), insn);
6493 invalidate (SET_DEST (y), VOIDmode);
6495 else if (SET_DEST (y) == pc_rtx
6496 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6499 sets[n_sets++].rtl = y;
6501 else if (GET_CODE (y) == CLOBBER)
6503 /* If we clobber memory, canon the address.
6504 This does nothing when a register is clobbered
6505 because we have already invalidated the reg. */
6506 if (GET_CODE (XEXP (y, 0)) == MEM)
6507 canon_reg (XEXP (y, 0), NULL_RTX);
6509 else if (GET_CODE (y) == USE
6510 && ! (GET_CODE (XEXP (y, 0)) == REG
6511 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6512 canon_reg (y, NULL_RTX);
6513 else if (GET_CODE (y) == CALL)
6515 /* The result of apply_change_group can be ignored; see
6517 canon_reg (y, insn);
6518 apply_change_group ();
6523 else if (GET_CODE (x) == CLOBBER)
6525 if (GET_CODE (XEXP (x, 0)) == MEM)
6526 canon_reg (XEXP (x, 0), NULL_RTX);
6529 /* Canonicalize a USE of a pseudo register or memory location. */
6530 else if (GET_CODE (x) == USE
6531 && ! (GET_CODE (XEXP (x, 0)) == REG
6532 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6533 canon_reg (XEXP (x, 0), NULL_RTX);
6534 else if (GET_CODE (x) == CALL)
6536 /* The result of apply_change_group can be ignored; see canon_reg. */
6537 canon_reg (x, insn);
6538 apply_change_group ();
6542 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6543 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6544 is handled specially for this case, and if it isn't set, then there will
6545 be no equivalence for the destination. */
6546 if (n_sets == 1 && REG_NOTES (insn) != 0
6547 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6548 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6549 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6550 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6552 /* Canonicalize sources and addresses of destinations.
6553 We do this in a separate pass to avoid problems when a MATCH_DUP is
6554 present in the insn pattern. In that case, we want to ensure that
6555 we don't break the duplicate nature of the pattern. So we will replace
6556 both operands at the same time. Otherwise, we would fail to find an
6557 equivalent substitution in the loop calling validate_change below.
6559 We used to suppress canonicalization of DEST if it appears in SRC,
6560 but we don't do this any more. */
6562 for (i = 0; i < n_sets; i++)
6564 rtx dest = SET_DEST (sets[i].rtl);
6565 rtx src = SET_SRC (sets[i].rtl);
6566 rtx new = canon_reg (src, insn);
6569 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6570 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6571 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6572 || (insn_code = recog_memoized (insn)) < 0
6573 || insn_data[insn_code].n_dups > 0)
6574 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6576 SET_SRC (sets[i].rtl) = new;
6578 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6580 validate_change (insn, &XEXP (dest, 1),
6581 canon_reg (XEXP (dest, 1), insn), 1);
6582 validate_change (insn, &XEXP (dest, 2),
6583 canon_reg (XEXP (dest, 2), insn), 1);
6586 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6587 || GET_CODE (dest) == ZERO_EXTRACT
6588 || GET_CODE (dest) == SIGN_EXTRACT)
6589 dest = XEXP (dest, 0);
6591 if (GET_CODE (dest) == MEM)
6592 canon_reg (dest, insn);
6595 /* Now that we have done all the replacements, we can apply the change
6596 group and see if they all work. Note that this will cause some
6597 canonicalizations that would have worked individually not to be applied
6598 because some other canonicalization didn't work, but this should not
6601 The result of apply_change_group can be ignored; see canon_reg. */
6603 apply_change_group ();
6605 /* Set sets[i].src_elt to the class each source belongs to.
6606 Detect assignments from or to volatile things
6607 and set set[i] to zero so they will be ignored
6608 in the rest of this function.
6610 Nothing in this loop changes the hash table or the register chains. */
6612 for (i = 0; i < n_sets; i++)
6614 register rtx src, dest;
6615 register rtx src_folded;
6616 register struct table_elt *elt = 0, *p;
6617 enum machine_mode mode;
6620 rtx src_related = 0;
6621 struct table_elt *src_const_elt = 0;
6622 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6623 int src_related_cost = 10000, src_elt_cost = 10000;
6624 /* Set non-zero if we need to call force_const_mem on with the
6625 contents of src_folded before using it. */
6626 int src_folded_force_flag = 0;
6628 dest = SET_DEST (sets[i].rtl);
6629 src = SET_SRC (sets[i].rtl);
6631 /* If SRC is a constant that has no machine mode,
6632 hash it with the destination's machine mode.
6633 This way we can keep different modes separate. */
6635 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6636 sets[i].mode = mode;
6640 enum machine_mode eqvmode = mode;
6641 if (GET_CODE (dest) == STRICT_LOW_PART)
6642 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6644 hash_arg_in_memory = 0;
6645 hash_arg_in_struct = 0;
6646 src_eqv = fold_rtx (src_eqv, insn);
6647 src_eqv_hash = HASH (src_eqv, eqvmode);
6649 /* Find the equivalence class for the equivalent expression. */
6652 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6654 src_eqv_volatile = do_not_record;
6655 src_eqv_in_memory = hash_arg_in_memory;
6656 src_eqv_in_struct = hash_arg_in_struct;
6659 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6660 value of the INNER register, not the destination. So it is not
6661 a valid substitution for the source. But save it for later. */
6662 if (GET_CODE (dest) == STRICT_LOW_PART)
6665 src_eqv_here = src_eqv;
6667 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6668 simplified result, which may not necessarily be valid. */
6669 src_folded = fold_rtx (src, insn);
6672 /* ??? This caused bad code to be generated for the m68k port with -O2.
6673 Suppose src is (CONST_INT -1), and that after truncation src_folded
6674 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6675 At the end we will add src and src_const to the same equivalence
6676 class. We now have 3 and -1 on the same equivalence class. This
6677 causes later instructions to be mis-optimized. */
6678 /* If storing a constant in a bitfield, pre-truncate the constant
6679 so we will be able to record it later. */
6680 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6681 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6683 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6685 if (GET_CODE (src) == CONST_INT
6686 && GET_CODE (width) == CONST_INT
6687 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6688 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6690 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6691 << INTVAL (width)) - 1));
6695 /* Compute SRC's hash code, and also notice if it
6696 should not be recorded at all. In that case,
6697 prevent any further processing of this assignment. */
6699 hash_arg_in_memory = 0;
6700 hash_arg_in_struct = 0;
6703 sets[i].src_hash = HASH (src, mode);
6704 sets[i].src_volatile = do_not_record;
6705 sets[i].src_in_memory = hash_arg_in_memory;
6706 sets[i].src_in_struct = hash_arg_in_struct;
6708 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6709 a pseudo that is set more than once, do not record SRC. Using
6710 SRC as a replacement for anything else will be incorrect in that
6711 situation. Note that this usually occurs only for stack slots,
6712 in which case all the RTL would be referring to SRC, so we don't
6713 lose any optimization opportunities by not having SRC in the
6716 if (GET_CODE (src) == MEM
6717 && find_reg_note (insn, REG_EQUIV, src) != 0
6718 && GET_CODE (dest) == REG
6719 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6720 && REG_N_SETS (REGNO (dest)) != 1)
6721 sets[i].src_volatile = 1;
6724 /* It is no longer clear why we used to do this, but it doesn't
6725 appear to still be needed. So let's try without it since this
6726 code hurts cse'ing widened ops. */
6727 /* If source is a perverse subreg (such as QI treated as an SI),
6728 treat it as volatile. It may do the work of an SI in one context
6729 where the extra bits are not being used, but cannot replace an SI
6731 if (GET_CODE (src) == SUBREG
6732 && (GET_MODE_SIZE (GET_MODE (src))
6733 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6734 sets[i].src_volatile = 1;
6737 /* Locate all possible equivalent forms for SRC. Try to replace
6738 SRC in the insn with each cheaper equivalent.
6740 We have the following types of equivalents: SRC itself, a folded
6741 version, a value given in a REG_EQUAL note, or a value related
6744 Each of these equivalents may be part of an additional class
6745 of equivalents (if more than one is in the table, they must be in
6746 the same class; we check for this).
6748 If the source is volatile, we don't do any table lookups.
6750 We note any constant equivalent for possible later use in a
6753 if (!sets[i].src_volatile)
6754 elt = lookup (src, sets[i].src_hash, mode);
6756 sets[i].src_elt = elt;
6758 if (elt && src_eqv_here && src_eqv_elt)
6760 if (elt->first_same_value != src_eqv_elt->first_same_value)
6762 /* The REG_EQUAL is indicating that two formerly distinct
6763 classes are now equivalent. So merge them. */
6764 merge_equiv_classes (elt, src_eqv_elt);
6765 src_eqv_hash = HASH (src_eqv, elt->mode);
6766 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6772 else if (src_eqv_elt)
6775 /* Try to find a constant somewhere and record it in `src_const'.
6776 Record its table element, if any, in `src_const_elt'. Look in
6777 any known equivalences first. (If the constant is not in the
6778 table, also set `sets[i].src_const_hash'). */
6780 for (p = elt->first_same_value; p; p = p->next_same_value)
6784 src_const_elt = elt;
6789 && (CONSTANT_P (src_folded)
6790 /* Consider (minus (label_ref L1) (label_ref L2)) as
6791 "constant" here so we will record it. This allows us
6792 to fold switch statements when an ADDR_DIFF_VEC is used. */
6793 || (GET_CODE (src_folded) == MINUS
6794 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6795 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6796 src_const = src_folded, src_const_elt = elt;
6797 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6798 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6800 /* If we don't know if the constant is in the table, get its
6801 hash code and look it up. */
6802 if (src_const && src_const_elt == 0)
6804 sets[i].src_const_hash = HASH (src_const, mode);
6805 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6808 sets[i].src_const = src_const;
6809 sets[i].src_const_elt = src_const_elt;
6811 /* If the constant and our source are both in the table, mark them as
6812 equivalent. Otherwise, if a constant is in the table but the source
6813 isn't, set ELT to it. */
6814 if (src_const_elt && elt
6815 && src_const_elt->first_same_value != elt->first_same_value)
6816 merge_equiv_classes (elt, src_const_elt);
6817 else if (src_const_elt && elt == 0)
6818 elt = src_const_elt;
6820 /* See if there is a register linearly related to a constant
6821 equivalent of SRC. */
6823 && (GET_CODE (src_const) == CONST
6824 || (src_const_elt && src_const_elt->related_value != 0)))
6826 src_related = use_related_value (src_const, src_const_elt);
6829 struct table_elt *src_related_elt
6830 = lookup (src_related, HASH (src_related, mode), mode);
6831 if (src_related_elt && elt)
6833 if (elt->first_same_value
6834 != src_related_elt->first_same_value)
6835 /* This can occur when we previously saw a CONST
6836 involving a SYMBOL_REF and then see the SYMBOL_REF
6837 twice. Merge the involved classes. */
6838 merge_equiv_classes (elt, src_related_elt);
6841 src_related_elt = 0;
6843 else if (src_related_elt && elt == 0)
6844 elt = src_related_elt;
6848 /* See if we have a CONST_INT that is already in a register in a
6851 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6852 && GET_MODE_CLASS (mode) == MODE_INT
6853 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6855 enum machine_mode wider_mode;
6857 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6858 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6859 && src_related == 0;
6860 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6862 struct table_elt *const_elt
6863 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6868 for (const_elt = const_elt->first_same_value;
6869 const_elt; const_elt = const_elt->next_same_value)
6870 if (GET_CODE (const_elt->exp) == REG)
6872 src_related = gen_lowpart_if_possible (mode,
6879 /* Another possibility is that we have an AND with a constant in
6880 a mode narrower than a word. If so, it might have been generated
6881 as part of an "if" which would narrow the AND. If we already
6882 have done the AND in a wider mode, we can use a SUBREG of that
6885 if (flag_expensive_optimizations && ! src_related
6886 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6887 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6889 enum machine_mode tmode;
6890 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6892 for (tmode = GET_MODE_WIDER_MODE (mode);
6893 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6894 tmode = GET_MODE_WIDER_MODE (tmode))
6896 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6897 struct table_elt *larger_elt;
6901 PUT_MODE (new_and, tmode);
6902 XEXP (new_and, 0) = inner;
6903 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6904 if (larger_elt == 0)
6907 for (larger_elt = larger_elt->first_same_value;
6908 larger_elt; larger_elt = larger_elt->next_same_value)
6909 if (GET_CODE (larger_elt->exp) == REG)
6912 = gen_lowpart_if_possible (mode, larger_elt->exp);
6922 #ifdef LOAD_EXTEND_OP
6923 /* See if a MEM has already been loaded with a widening operation;
6924 if it has, we can use a subreg of that. Many CISC machines
6925 also have such operations, but this is only likely to be
6926 beneficial these machines. */
6928 if (flag_expensive_optimizations && src_related == 0
6929 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6930 && GET_MODE_CLASS (mode) == MODE_INT
6931 && GET_CODE (src) == MEM && ! do_not_record
6932 && LOAD_EXTEND_OP (mode) != NIL)
6934 enum machine_mode tmode;
6936 /* Set what we are trying to extend and the operation it might
6937 have been extended with. */
6938 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6939 XEXP (memory_extend_rtx, 0) = src;
6941 for (tmode = GET_MODE_WIDER_MODE (mode);
6942 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6943 tmode = GET_MODE_WIDER_MODE (tmode))
6945 struct table_elt *larger_elt;
6947 PUT_MODE (memory_extend_rtx, tmode);
6948 larger_elt = lookup (memory_extend_rtx,
6949 HASH (memory_extend_rtx, tmode), tmode);
6950 if (larger_elt == 0)
6953 for (larger_elt = larger_elt->first_same_value;
6954 larger_elt; larger_elt = larger_elt->next_same_value)
6955 if (GET_CODE (larger_elt->exp) == REG)
6957 src_related = gen_lowpart_if_possible (mode,
6966 #endif /* LOAD_EXTEND_OP */
6968 if (src == src_folded)
6971 /* At this point, ELT, if non-zero, points to a class of expressions
6972 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6973 and SRC_RELATED, if non-zero, each contain additional equivalent
6974 expressions. Prune these latter expressions by deleting expressions
6975 already in the equivalence class.
6977 Check for an equivalent identical to the destination. If found,
6978 this is the preferred equivalent since it will likely lead to
6979 elimination of the insn. Indicate this by placing it in
6982 if (elt) elt = elt->first_same_value;
6983 for (p = elt; p; p = p->next_same_value)
6985 enum rtx_code code = GET_CODE (p->exp);
6987 /* If the expression is not valid, ignore it. Then we do not
6988 have to check for validity below. In most cases, we can use
6989 `rtx_equal_p', since canonicalization has already been done. */
6990 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6993 /* Also skip paradoxical subregs, unless that's what we're
6996 && (GET_MODE_SIZE (GET_MODE (p->exp))
6997 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6999 && GET_CODE (src) == SUBREG
7000 && GET_MODE (src) == GET_MODE (p->exp)
7001 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7002 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
7005 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
7007 else if (src_folded && GET_CODE (src_folded) == code
7008 && rtx_equal_p (src_folded, p->exp))
7010 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
7011 && rtx_equal_p (src_eqv_here, p->exp))
7013 else if (src_related && GET_CODE (src_related) == code
7014 && rtx_equal_p (src_related, p->exp))
7017 /* This is the same as the destination of the insns, we want
7018 to prefer it. Copy it to src_related. The code below will
7019 then give it a negative cost. */
7020 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
7025 /* Find the cheapest valid equivalent, trying all the available
7026 possibilities. Prefer items not in the hash table to ones
7027 that are when they are equal cost. Note that we can never
7028 worsen an insn as the current contents will also succeed.
7029 If we find an equivalent identical to the destination, use it as best,
7030 since this insn will probably be eliminated in that case. */
7033 if (rtx_equal_p (src, dest))
7036 src_cost = COST (src);
7041 if (rtx_equal_p (src_eqv_here, dest))
7044 src_eqv_cost = COST (src_eqv_here);
7049 if (rtx_equal_p (src_folded, dest))
7050 src_folded_cost = -1;
7052 src_folded_cost = COST (src_folded);
7057 if (rtx_equal_p (src_related, dest))
7058 src_related_cost = -1;
7060 src_related_cost = COST (src_related);
7063 /* If this was an indirect jump insn, a known label will really be
7064 cheaper even though it looks more expensive. */
7065 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
7066 src_folded = src_const, src_folded_cost = -1;
7068 /* Terminate loop when replacement made. This must terminate since
7069 the current contents will be tested and will always be valid. */
7074 /* Skip invalid entries. */
7075 while (elt && GET_CODE (elt->exp) != REG
7076 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7077 elt = elt->next_same_value;
7079 /* A paradoxical subreg would be bad here: it'll be the right
7080 size, but later may be adjusted so that the upper bits aren't
7081 what we want. So reject it. */
7083 && GET_CODE (elt->exp) == SUBREG
7084 && (GET_MODE_SIZE (GET_MODE (elt->exp))
7085 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
7086 /* It is okay, though, if the rtx we're trying to match
7087 will ignore any of the bits we can't predict. */
7089 && GET_CODE (src) == SUBREG
7090 && GET_MODE (src) == GET_MODE (elt->exp)
7091 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7092 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
7094 elt = elt->next_same_value;
7098 if (elt) src_elt_cost = elt->cost;
7100 /* Find cheapest and skip it for the next time. For items
7101 of equal cost, use this order:
7102 src_folded, src, src_eqv, src_related and hash table entry. */
7103 if (src_folded_cost <= src_cost
7104 && src_folded_cost <= src_eqv_cost
7105 && src_folded_cost <= src_related_cost
7106 && src_folded_cost <= src_elt_cost)
7108 trial = src_folded, src_folded_cost = 10000;
7109 if (src_folded_force_flag)
7110 trial = force_const_mem (mode, trial);
7112 else if (src_cost <= src_eqv_cost
7113 && src_cost <= src_related_cost
7114 && src_cost <= src_elt_cost)
7115 trial = src, src_cost = 10000;
7116 else if (src_eqv_cost <= src_related_cost
7117 && src_eqv_cost <= src_elt_cost)
7118 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
7119 else if (src_related_cost <= src_elt_cost)
7120 trial = copy_rtx (src_related), src_related_cost = 10000;
7123 trial = copy_rtx (elt->exp);
7124 elt = elt->next_same_value;
7125 src_elt_cost = 10000;
7128 /* We don't normally have an insn matching (set (pc) (pc)), so
7129 check for this separately here. We will delete such an
7132 Tablejump insns contain a USE of the table, so simply replacing
7133 the operand with the constant won't match. This is simply an
7134 unconditional branch, however, and is therefore valid. Just
7135 insert the substitution here and we will delete and re-emit
7138 /* Keep track of the original SET_SRC so that we can fix notes
7139 on libcall instructions. */
7140 old_src = SET_SRC (sets[i].rtl);
7142 if (n_sets == 1 && dest == pc_rtx
7144 || (GET_CODE (trial) == LABEL_REF
7145 && ! condjump_p (insn))))
7147 /* If TRIAL is a label in front of a jump table, we are
7148 really falling through the switch (this is how casesi
7149 insns work), so we must branch around the table. */
7150 if (GET_CODE (trial) == CODE_LABEL
7151 && NEXT_INSN (trial) != 0
7152 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
7153 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
7154 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
7156 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
7158 SET_SRC (sets[i].rtl) = trial;
7159 cse_jumps_altered = 1;
7163 /* Look for a substitution that makes a valid insn. */
7164 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
7166 /* If we just made a substitution inside a libcall, then we
7167 need to make the same substitution in any notes attached
7168 to the RETVAL insn. */
7170 && (GET_CODE (old_src) == REG
7171 || GET_CODE (old_src) == SUBREG
7172 || GET_CODE (old_src) == MEM))
7173 replace_rtx (REG_NOTES (libcall_insn), old_src,
7174 canon_reg (SET_SRC (sets[i].rtl), insn));
7176 /* The result of apply_change_group can be ignored; see
7179 validate_change (insn, &SET_SRC (sets[i].rtl),
7180 canon_reg (SET_SRC (sets[i].rtl), insn),
7182 apply_change_group ();
7186 /* If we previously found constant pool entries for
7187 constants and this is a constant, try making a
7188 pool entry. Put it in src_folded unless we already have done
7189 this since that is where it likely came from. */
7191 else if (constant_pool_entries_cost
7192 && CONSTANT_P (trial)
7193 && ! (GET_CODE (trial) == CONST
7194 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
7196 || (GET_CODE (src_folded) != MEM
7197 && ! src_folded_force_flag))
7198 && GET_MODE_CLASS (mode) != MODE_CC
7199 && mode != VOIDmode)
7201 src_folded_force_flag = 1;
7203 src_folded_cost = constant_pool_entries_cost;
7207 src = SET_SRC (sets[i].rtl);
7209 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7210 However, there is an important exception: If both are registers
7211 that are not the head of their equivalence class, replace SET_SRC
7212 with the head of the class. If we do not do this, we will have
7213 both registers live over a portion of the basic block. This way,
7214 their lifetimes will likely abut instead of overlapping. */
7215 if (GET_CODE (dest) == REG
7216 && REGNO_QTY_VALID_P (REGNO (dest))
7217 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
7218 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
7219 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7220 /* Don't do this if the original insn had a hard reg as
7221 SET_SRC or SET_DEST. */
7222 && (GET_CODE (sets[i].src) != REG
7223 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
7224 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
7225 /* We can't call canon_reg here because it won't do anything if
7226 SRC is a hard register. */
7228 int first = qty_first_reg[REG_QTY (REGNO (src))];
7230 = (first >= FIRST_PSEUDO_REGISTER
7231 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7233 /* We must use validate-change even for this, because this
7234 might be a special no-op instruction, suitable only to
7236 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7239 /* If we had a constant that is cheaper than what we are now
7240 setting SRC to, use that constant. We ignored it when we
7241 thought we could make this into a no-op. */
7242 if (src_const && COST (src_const) < COST (src)
7243 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7249 /* If we made a change, recompute SRC values. */
7250 if (src != sets[i].src)
7253 hash_arg_in_memory = 0;
7254 hash_arg_in_struct = 0;
7256 sets[i].src_hash = HASH (src, mode);
7257 sets[i].src_volatile = do_not_record;
7258 sets[i].src_in_memory = hash_arg_in_memory;
7259 sets[i].src_in_struct = hash_arg_in_struct;
7260 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7263 /* If this is a single SET, we are setting a register, and we have an
7264 equivalent constant, we want to add a REG_NOTE. We don't want
7265 to write a REG_EQUAL note for a constant pseudo since verifying that
7266 that pseudo hasn't been eliminated is a pain. Such a note also
7267 won't help anything.
7269 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7270 which can be created for a reference to a compile time computable
7271 entry in a jump table. */
7273 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7274 && GET_CODE (src_const) != REG
7275 && ! (GET_CODE (src_const) == CONST
7276 && GET_CODE (XEXP (src_const, 0)) == MINUS
7277 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
7278 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7280 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7282 /* Make sure that the rtx is not shared with any other insn. */
7283 src_const = copy_rtx (src_const);
7285 /* Record the actual constant value in a REG_EQUAL note, making
7286 a new one if one does not already exist. */
7288 XEXP (tem, 0) = src_const;
7290 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7291 src_const, REG_NOTES (insn));
7293 /* If storing a constant value in a register that
7294 previously held the constant value 0,
7295 record this fact with a REG_WAS_0 note on this insn.
7297 Note that the *register* is required to have previously held 0,
7298 not just any register in the quantity and we must point to the
7299 insn that set that register to zero.
7301 Rather than track each register individually, we just see if
7302 the last set for this quantity was for this register. */
7304 if (REGNO_QTY_VALID_P (REGNO (dest))
7305 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
7307 /* See if we previously had a REG_WAS_0 note. */
7308 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7309 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
7311 if ((tem = single_set (const_insn)) != 0
7312 && rtx_equal_p (SET_DEST (tem), dest))
7315 XEXP (note, 0) = const_insn;
7318 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
7324 /* Now deal with the destination. */
7326 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7328 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7329 to the MEM or REG within it. */
7330 while (GET_CODE (dest) == SIGN_EXTRACT
7331 || GET_CODE (dest) == ZERO_EXTRACT
7332 || GET_CODE (dest) == SUBREG
7333 || GET_CODE (dest) == STRICT_LOW_PART)
7335 sets[i].inner_dest_loc = &XEXP (dest, 0);
7336 dest = XEXP (dest, 0);
7339 sets[i].inner_dest = dest;
7341 if (GET_CODE (dest) == MEM)
7343 #ifdef PUSH_ROUNDING
7344 /* Stack pushes invalidate the stack pointer. */
7345 rtx addr = XEXP (dest, 0);
7346 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7347 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7348 && XEXP (addr, 0) == stack_pointer_rtx)
7349 invalidate (stack_pointer_rtx, Pmode);
7351 dest = fold_rtx (dest, insn);
7354 /* Compute the hash code of the destination now,
7355 before the effects of this instruction are recorded,
7356 since the register values used in the address computation
7357 are those before this instruction. */
7358 sets[i].dest_hash = HASH (dest, mode);
7360 /* Don't enter a bit-field in the hash table
7361 because the value in it after the store
7362 may not equal what was stored, due to truncation. */
7364 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7365 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7367 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7369 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7370 && GET_CODE (width) == CONST_INT
7371 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7372 && ! (INTVAL (src_const)
7373 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7374 /* Exception: if the value is constant,
7375 and it won't be truncated, record it. */
7379 /* This is chosen so that the destination will be invalidated
7380 but no new value will be recorded.
7381 We must invalidate because sometimes constant
7382 values can be recorded for bitfields. */
7383 sets[i].src_elt = 0;
7384 sets[i].src_volatile = 1;
7390 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7392 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7394 /* One less use of the label this insn used to jump to. */
7395 if (JUMP_LABEL (insn) != 0)
7396 --LABEL_NUSES (JUMP_LABEL (insn));
7397 PUT_CODE (insn, NOTE);
7398 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7399 NOTE_SOURCE_FILE (insn) = 0;
7400 cse_jumps_altered = 1;
7401 /* No more processing for this set. */
7405 /* If this SET is now setting PC to a label, we know it used to
7406 be a conditional or computed branch. So we see if we can follow
7407 it. If it was a computed branch, delete it and re-emit. */
7408 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7412 /* If this is not in the format for a simple branch and
7413 we are the only SET in it, re-emit it. */
7414 if (! simplejump_p (insn) && n_sets == 1)
7416 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7417 JUMP_LABEL (new) = XEXP (src, 0);
7418 LABEL_NUSES (XEXP (src, 0))++;
7423 /* Otherwise, force rerecognition, since it probably had
7424 a different pattern before.
7425 This shouldn't really be necessary, since whatever
7426 changed the source value above should have done this.
7427 Until the right place is found, might as well do this here. */
7428 INSN_CODE (insn) = -1;
7430 /* Now that we've converted this jump to an unconditional jump,
7431 there is dead code after it. Delete the dead code until we
7432 reach a BARRIER, the end of the function, or a label. Do
7433 not delete NOTEs except for NOTE_INSN_DELETED since later
7434 phases assume these notes are retained. */
7436 never_reached_warning (insn);
7440 while (NEXT_INSN (p) != 0
7441 && GET_CODE (NEXT_INSN (p)) != BARRIER
7442 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7444 /* Note, we must update P with the return value from
7445 delete_insn, otherwise we could get an infinite loop
7446 if NEXT_INSN (p) had INSN_DELETED_P set. */
7447 if (GET_CODE (NEXT_INSN (p)) != NOTE
7448 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7449 p = PREV_INSN (delete_insn (NEXT_INSN (p)));
7454 /* If we don't have a BARRIER immediately after INSN, put one there.
7455 Much code assumes that there are no NOTEs between a JUMP_INSN and
7458 if (NEXT_INSN (insn) == 0
7459 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7460 emit_barrier_before (NEXT_INSN (insn));
7462 /* We might have two BARRIERs separated by notes. Delete the second
7465 if (p != insn && NEXT_INSN (p) != 0
7466 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7467 delete_insn (NEXT_INSN (p));
7469 cse_jumps_altered = 1;
7473 /* If destination is volatile, invalidate it and then do no further
7474 processing for this assignment. */
7476 else if (do_not_record)
7478 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7479 || GET_CODE (dest) == MEM)
7480 invalidate (dest, VOIDmode);
7481 else if (GET_CODE (dest) == STRICT_LOW_PART
7482 || GET_CODE (dest) == ZERO_EXTRACT)
7483 invalidate (XEXP (dest, 0), GET_MODE (dest));
7487 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7488 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7491 /* If setting CC0, record what it was set to, or a constant, if it
7492 is equivalent to a constant. If it is being set to a floating-point
7493 value, make a COMPARE with the appropriate constant of 0. If we
7494 don't do this, later code can interpret this as a test against
7495 const0_rtx, which can cause problems if we try to put it into an
7496 insn as a floating-point operand. */
7497 if (dest == cc0_rtx)
7499 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7500 this_insn_cc0_mode = mode;
7501 if (FLOAT_MODE_P (mode))
7502 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7508 /* Now enter all non-volatile source expressions in the hash table
7509 if they are not already present.
7510 Record their equivalence classes in src_elt.
7511 This way we can insert the corresponding destinations into
7512 the same classes even if the actual sources are no longer in them
7513 (having been invalidated). */
7515 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7516 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7518 register struct table_elt *elt;
7519 register struct table_elt *classp = sets[0].src_elt;
7520 rtx dest = SET_DEST (sets[0].rtl);
7521 enum machine_mode eqvmode = GET_MODE (dest);
7523 if (GET_CODE (dest) == STRICT_LOW_PART)
7525 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7528 if (insert_regs (src_eqv, classp, 0))
7530 rehash_using_reg (src_eqv);
7531 src_eqv_hash = HASH (src_eqv, eqvmode);
7533 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7534 elt->in_memory = src_eqv_in_memory;
7535 elt->in_struct = src_eqv_in_struct;
7538 /* Check to see if src_eqv_elt is the same as a set source which
7539 does not yet have an elt, and if so set the elt of the set source
7541 for (i = 0; i < n_sets; i++)
7542 if (sets[i].rtl && sets[i].src_elt == 0
7543 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7544 sets[i].src_elt = src_eqv_elt;
7547 for (i = 0; i < n_sets; i++)
7548 if (sets[i].rtl && ! sets[i].src_volatile
7549 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7551 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7553 /* REG_EQUAL in setting a STRICT_LOW_PART
7554 gives an equivalent for the entire destination register,
7555 not just for the subreg being stored in now.
7556 This is a more interesting equivalence, so we arrange later
7557 to treat the entire reg as the destination. */
7558 sets[i].src_elt = src_eqv_elt;
7559 sets[i].src_hash = src_eqv_hash;
7563 /* Insert source and constant equivalent into hash table, if not
7565 register struct table_elt *classp = src_eqv_elt;
7566 register rtx src = sets[i].src;
7567 register rtx dest = SET_DEST (sets[i].rtl);
7568 enum machine_mode mode
7569 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7571 /* Don't put a hard register source into the table if this is
7572 the last insn of a libcall. */
7573 if (sets[i].src_elt == 0
7574 && (GET_CODE (src) != REG
7575 || REGNO (src) >= FIRST_PSEUDO_REGISTER
7576 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX)))
7578 register struct table_elt *elt;
7580 /* Note that these insert_regs calls cannot remove
7581 any of the src_elt's, because they would have failed to
7582 match if not still valid. */
7583 if (insert_regs (src, classp, 0))
7585 rehash_using_reg (src);
7586 sets[i].src_hash = HASH (src, mode);
7588 elt = insert (src, classp, sets[i].src_hash, mode);
7589 elt->in_memory = sets[i].src_in_memory;
7590 elt->in_struct = sets[i].src_in_struct;
7591 sets[i].src_elt = classp = elt;
7594 if (sets[i].src_const && sets[i].src_const_elt == 0
7595 && src != sets[i].src_const
7596 && ! rtx_equal_p (sets[i].src_const, src))
7597 sets[i].src_elt = insert (sets[i].src_const, classp,
7598 sets[i].src_const_hash, mode);
7601 else if (sets[i].src_elt == 0)
7602 /* If we did not insert the source into the hash table (e.g., it was
7603 volatile), note the equivalence class for the REG_EQUAL value, if any,
7604 so that the destination goes into that class. */
7605 sets[i].src_elt = src_eqv_elt;
7607 invalidate_from_clobbers (x);
7609 /* Some registers are invalidated by subroutine calls. Memory is
7610 invalidated by non-constant calls. */
7612 if (GET_CODE (insn) == CALL_INSN)
7614 if (! CONST_CALL_P (insn))
7615 invalidate_memory ();
7616 invalidate_for_call ();
7619 /* Now invalidate everything set by this instruction.
7620 If a SUBREG or other funny destination is being set,
7621 sets[i].rtl is still nonzero, so here we invalidate the reg
7622 a part of which is being set. */
7624 for (i = 0; i < n_sets; i++)
7627 /* We can't use the inner dest, because the mode associated with
7628 a ZERO_EXTRACT is significant. */
7629 register rtx dest = SET_DEST (sets[i].rtl);
7631 /* Needed for registers to remove the register from its
7632 previous quantity's chain.
7633 Needed for memory if this is a nonvarying address, unless
7634 we have just done an invalidate_memory that covers even those. */
7635 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7636 || GET_CODE (dest) == MEM)
7637 invalidate (dest, VOIDmode);
7638 else if (GET_CODE (dest) == STRICT_LOW_PART
7639 || GET_CODE (dest) == ZERO_EXTRACT)
7640 invalidate (XEXP (dest, 0), GET_MODE (dest));
7643 /* A volatile ASM invalidates everything. */
7644 if (GET_CODE (insn) == INSN
7645 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
7646 && MEM_VOLATILE_P (PATTERN (insn)))
7647 flush_hash_table ();
7649 /* Make sure registers mentioned in destinations
7650 are safe for use in an expression to be inserted.
7651 This removes from the hash table
7652 any invalid entry that refers to one of these registers.
7654 We don't care about the return value from mention_regs because
7655 we are going to hash the SET_DEST values unconditionally. */
7657 for (i = 0; i < n_sets; i++)
7661 rtx x = SET_DEST (sets[i].rtl);
7663 if (GET_CODE (x) != REG)
7667 /* We used to rely on all references to a register becoming
7668 inaccessible when a register changes to a new quantity,
7669 since that changes the hash code. However, that is not
7670 safe, since after NBUCKETS new quantities we get a
7671 hash 'collision' of a register with its own invalid
7672 entries. And since SUBREGs have been changed not to
7673 change their hash code with the hash code of the register,
7674 it wouldn't work any longer at all. So we have to check
7675 for any invalid references lying around now.
7676 This code is similar to the REG case in mention_regs,
7677 but it knows that reg_tick has been incremented, and
7678 it leaves reg_in_table as -1 . */
7679 register int regno = REGNO (x);
7680 register int endregno
7681 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
7682 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
7685 for (i = regno; i < endregno; i++)
7687 if (REG_IN_TABLE (i) >= 0)
7689 remove_invalid_refs (i);
7690 REG_IN_TABLE (i) = -1;
7697 /* We may have just removed some of the src_elt's from the hash table.
7698 So replace each one with the current head of the same class. */
7700 for (i = 0; i < n_sets; i++)
7703 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7704 /* If elt was removed, find current head of same class,
7705 or 0 if nothing remains of that class. */
7707 register struct table_elt *elt = sets[i].src_elt;
7709 while (elt && elt->prev_same_value)
7710 elt = elt->prev_same_value;
7712 while (elt && elt->first_same_value == 0)
7713 elt = elt->next_same_value;
7714 sets[i].src_elt = elt ? elt->first_same_value : 0;
7718 /* Now insert the destinations into their equivalence classes. */
7720 for (i = 0; i < n_sets; i++)
7723 register rtx dest = SET_DEST (sets[i].rtl);
7724 rtx inner_dest = sets[i].inner_dest;
7725 register struct table_elt *elt;
7727 /* Don't record value if we are not supposed to risk allocating
7728 floating-point values in registers that might be wider than
7730 if ((flag_float_store
7731 && GET_CODE (dest) == MEM
7732 && FLOAT_MODE_P (GET_MODE (dest)))
7733 /* Don't record BLKmode values, because we don't know the
7734 size of it, and can't be sure that other BLKmode values
7735 have the same or smaller size. */
7736 || GET_MODE (dest) == BLKmode
7737 /* Don't record values of destinations set inside a libcall block
7738 since we might delete the libcall. Things should have been set
7739 up so we won't want to reuse such a value, but we play it safe
7742 /* If we didn't put a REG_EQUAL value or a source into the hash
7743 table, there is no point is recording DEST. */
7744 || sets[i].src_elt == 0
7745 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7746 or SIGN_EXTEND, don't record DEST since it can cause
7747 some tracking to be wrong.
7749 ??? Think about this more later. */
7750 || (GET_CODE (dest) == SUBREG
7751 && (GET_MODE_SIZE (GET_MODE (dest))
7752 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7753 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7754 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7757 /* STRICT_LOW_PART isn't part of the value BEING set,
7758 and neither is the SUBREG inside it.
7759 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7760 if (GET_CODE (dest) == STRICT_LOW_PART)
7761 dest = SUBREG_REG (XEXP (dest, 0));
7763 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7764 /* Registers must also be inserted into chains for quantities. */
7765 if (insert_regs (dest, sets[i].src_elt, 1))
7767 /* If `insert_regs' changes something, the hash code must be
7769 rehash_using_reg (dest);
7770 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7773 if (GET_CODE (inner_dest) == MEM
7774 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7775 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7776 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7777 Consider the case in which the address of the MEM is
7778 passed to a function, which alters the MEM. Then, if we
7779 later use Y instead of the MEM we'll miss the update. */
7780 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7782 elt = insert (dest, sets[i].src_elt,
7783 sets[i].dest_hash, GET_MODE (dest));
7785 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7786 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7787 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7792 /* This implicitly assumes a whole struct
7793 need not have MEM_IN_STRUCT_P.
7794 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7795 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7796 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7799 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7800 narrower than M2, and both M1 and M2 are the same number of words,
7801 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7802 make that equivalence as well.
7804 However, BAR may have equivalences for which gen_lowpart_if_possible
7805 will produce a simpler value than gen_lowpart_if_possible applied to
7806 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7807 BAR's equivalences. If we don't get a simplified form, make
7808 the SUBREG. It will not be used in an equivalence, but will
7809 cause two similar assignments to be detected.
7811 Note the loop below will find SUBREG_REG (DEST) since we have
7812 already entered SRC and DEST of the SET in the table. */
7814 if (GET_CODE (dest) == SUBREG
7815 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7817 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7818 && (GET_MODE_SIZE (GET_MODE (dest))
7819 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7820 && sets[i].src_elt != 0)
7822 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7823 struct table_elt *elt, *classp = 0;
7825 for (elt = sets[i].src_elt->first_same_value; elt;
7826 elt = elt->next_same_value)
7830 struct table_elt *src_elt;
7832 /* Ignore invalid entries. */
7833 if (GET_CODE (elt->exp) != REG
7834 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7837 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7839 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7841 src_hash = HASH (new_src, new_mode);
7842 src_elt = lookup (new_src, src_hash, new_mode);
7844 /* Put the new source in the hash table is if isn't
7848 if (insert_regs (new_src, classp, 0))
7850 rehash_using_reg (new_src);
7851 src_hash = HASH (new_src, new_mode);
7853 src_elt = insert (new_src, classp, src_hash, new_mode);
7854 src_elt->in_memory = elt->in_memory;
7855 src_elt->in_struct = elt->in_struct;
7857 else if (classp && classp != src_elt->first_same_value)
7858 /* Show that two things that we've seen before are
7859 actually the same. */
7860 merge_equiv_classes (src_elt, classp);
7862 classp = src_elt->first_same_value;
7863 /* Ignore invalid entries. */
7865 && GET_CODE (classp->exp) != REG
7866 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7867 classp = classp->next_same_value;
7872 /* Special handling for (set REG0 REG1)
7873 where REG0 is the "cheapest", cheaper than REG1.
7874 After cse, REG1 will probably not be used in the sequel,
7875 so (if easily done) change this insn to (set REG1 REG0) and
7876 replace REG1 with REG0 in the previous insn that computed their value.
7877 Then REG1 will become a dead store and won't cloud the situation
7878 for later optimizations.
7880 Do not make this change if REG1 is a hard register, because it will
7881 then be used in the sequel and we may be changing a two-operand insn
7882 into a three-operand insn.
7884 Also do not do this if we are operating on a copy of INSN.
7886 Also don't do this if INSN ends a libcall; this would cause an unrelated
7887 register to be set in the middle of a libcall, and we then get bad code
7888 if the libcall is deleted. */
7890 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7891 && NEXT_INSN (PREV_INSN (insn)) == insn
7892 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7893 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7894 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7895 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
7896 == REGNO (SET_DEST (sets[0].rtl)))
7897 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
7899 rtx prev = PREV_INSN (insn);
7900 while (prev && GET_CODE (prev) == NOTE)
7901 prev = PREV_INSN (prev);
7903 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7904 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7906 rtx dest = SET_DEST (sets[0].rtl);
7907 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7909 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7910 validate_change (insn, & SET_DEST (sets[0].rtl),
7911 SET_SRC (sets[0].rtl), 1);
7912 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7913 apply_change_group ();
7915 /* If REG1 was equivalent to a constant, REG0 is not. */
7917 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7919 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7920 any REG_WAS_0 note on INSN to PREV. */
7921 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7923 remove_note (prev, note);
7925 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7928 remove_note (insn, note);
7929 XEXP (note, 1) = REG_NOTES (prev);
7930 REG_NOTES (prev) = note;
7933 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7934 then we must delete it, because the value in REG0 has changed. */
7935 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7936 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7937 remove_note (insn, note);
7941 /* If this is a conditional jump insn, record any known equivalences due to
7942 the condition being tested. */
7944 last_jump_equiv_class = 0;
7945 if (GET_CODE (insn) == JUMP_INSN
7946 && n_sets == 1 && GET_CODE (x) == SET
7947 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7948 record_jump_equiv (insn, 0);
7951 /* If the previous insn set CC0 and this insn no longer references CC0,
7952 delete the previous insn. Here we use the fact that nothing expects CC0
7953 to be valid over an insn, which is true until the final pass. */
7954 if (prev_insn && GET_CODE (prev_insn) == INSN
7955 && (tem = single_set (prev_insn)) != 0
7956 && SET_DEST (tem) == cc0_rtx
7957 && ! reg_mentioned_p (cc0_rtx, x))
7959 PUT_CODE (prev_insn, NOTE);
7960 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7961 NOTE_SOURCE_FILE (prev_insn) = 0;
7964 prev_insn_cc0 = this_insn_cc0;
7965 prev_insn_cc0_mode = this_insn_cc0_mode;
7971 /* Remove from the hash table all expressions that reference memory. */
7973 invalidate_memory ()
7976 register struct table_elt *p, *next;
7978 for (i = 0; i < NBUCKETS; i++)
7979 for (p = table[i]; p; p = next)
7981 next = p->next_same_hash;
7983 remove_from_table (p, i);
7987 /* XXX ??? The name of this function bears little resemblance to
7988 what this function actually does. FIXME. */
7990 note_mem_written (addr)
7993 /* Pushing or popping the stack invalidates just the stack pointer. */
7994 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7995 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7996 && GET_CODE (XEXP (addr, 0)) == REG
7997 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7999 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
8000 REG_TICK (STACK_POINTER_REGNUM)++;
8002 /* This should be *very* rare. */
8003 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
8004 invalidate (stack_pointer_rtx, VOIDmode);
8010 /* Perform invalidation on the basis of everything about an insn
8011 except for invalidating the actual places that are SET in it.
8012 This includes the places CLOBBERed, and anything that might
8013 alias with something that is SET or CLOBBERed.
8015 X is the pattern of the insn. */
8018 invalidate_from_clobbers (x)
8021 if (GET_CODE (x) == CLOBBER)
8023 rtx ref = XEXP (x, 0);
8026 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8027 || GET_CODE (ref) == MEM)
8028 invalidate (ref, VOIDmode);
8029 else if (GET_CODE (ref) == STRICT_LOW_PART
8030 || GET_CODE (ref) == ZERO_EXTRACT)
8031 invalidate (XEXP (ref, 0), GET_MODE (ref));
8034 else if (GET_CODE (x) == PARALLEL)
8037 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
8039 register rtx y = XVECEXP (x, 0, i);
8040 if (GET_CODE (y) == CLOBBER)
8042 rtx ref = XEXP (y, 0);
8043 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8044 || GET_CODE (ref) == MEM)
8045 invalidate (ref, VOIDmode);
8046 else if (GET_CODE (ref) == STRICT_LOW_PART
8047 || GET_CODE (ref) == ZERO_EXTRACT)
8048 invalidate (XEXP (ref, 0), GET_MODE (ref));
8054 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
8055 and replace any registers in them with either an equivalent constant
8056 or the canonical form of the register. If we are inside an address,
8057 only do this if the address remains valid.
8059 OBJECT is 0 except when within a MEM in which case it is the MEM.
8061 Return the replacement for X. */
8064 cse_process_notes (x, object)
8068 enum rtx_code code = GET_CODE (x);
8069 const char *fmt = GET_RTX_FORMAT (code);
8085 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
8090 if (REG_NOTE_KIND (x) == REG_EQUAL)
8091 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
8093 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
8100 rtx new = cse_process_notes (XEXP (x, 0), object);
8101 /* We don't substitute VOIDmode constants into these rtx,
8102 since they would impede folding. */
8103 if (GET_MODE (new) != VOIDmode)
8104 validate_change (object, &XEXP (x, 0), new, 0);
8109 i = REG_QTY (REGNO (x));
8111 /* Return a constant or a constant register. */
8112 if (REGNO_QTY_VALID_P (REGNO (x))
8113 && qty_const[i] != 0
8114 && (CONSTANT_P (qty_const[i])
8115 || GET_CODE (qty_const[i]) == REG))
8117 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
8122 /* Otherwise, canonicalize this register. */
8123 return canon_reg (x, NULL_RTX);
8129 for (i = 0; i < GET_RTX_LENGTH (code); i++)
8131 validate_change (object, &XEXP (x, i),
8132 cse_process_notes (XEXP (x, i), object), 0);
8137 /* Find common subexpressions between the end test of a loop and the beginning
8138 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8140 Often we have a loop where an expression in the exit test is used
8141 in the body of the loop. For example "while (*p) *q++ = *p++;".
8142 Because of the way we duplicate the loop exit test in front of the loop,
8143 however, we don't detect that common subexpression. This will be caught
8144 when global cse is implemented, but this is a quite common case.
8146 This function handles the most common cases of these common expressions.
8147 It is called after we have processed the basic block ending with the
8148 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8149 jumps to a label used only once. */
8152 cse_around_loop (loop_start)
8157 struct table_elt *p;
8159 /* If the jump at the end of the loop doesn't go to the start, we don't
8161 for (insn = PREV_INSN (loop_start);
8162 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
8163 insn = PREV_INSN (insn))
8167 || GET_CODE (insn) != NOTE
8168 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
8171 /* If the last insn of the loop (the end test) was an NE comparison,
8172 we will interpret it as an EQ comparison, since we fell through
8173 the loop. Any equivalences resulting from that comparison are
8174 therefore not valid and must be invalidated. */
8175 if (last_jump_equiv_class)
8176 for (p = last_jump_equiv_class->first_same_value; p;
8177 p = p->next_same_value)
8179 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
8180 || (GET_CODE (p->exp) == SUBREG
8181 && GET_CODE (SUBREG_REG (p->exp)) == REG))
8182 invalidate (p->exp, VOIDmode);
8183 else if (GET_CODE (p->exp) == STRICT_LOW_PART
8184 || GET_CODE (p->exp) == ZERO_EXTRACT)
8185 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
8188 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8189 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8191 The only thing we do with SET_DEST is invalidate entries, so we
8192 can safely process each SET in order. It is slightly less efficient
8193 to do so, but we only want to handle the most common cases.
8195 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8196 These pseudos won't have valid entries in any of the tables indexed
8197 by register number, such as reg_qty. We avoid out-of-range array
8198 accesses by not processing any instructions created after cse started. */
8200 for (insn = NEXT_INSN (loop_start);
8201 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
8202 && INSN_UID (insn) < max_insn_uid
8203 && ! (GET_CODE (insn) == NOTE
8204 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
8205 insn = NEXT_INSN (insn))
8207 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8208 && (GET_CODE (PATTERN (insn)) == SET
8209 || GET_CODE (PATTERN (insn)) == CLOBBER))
8210 cse_set_around_loop (PATTERN (insn), insn, loop_start);
8211 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8212 && GET_CODE (PATTERN (insn)) == PARALLEL)
8213 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8214 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
8215 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
8216 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
8221 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8222 since they are done elsewhere. This function is called via note_stores. */
8225 invalidate_skipped_set (dest, set)
8229 enum rtx_code code = GET_CODE (dest);
8232 && ! note_mem_written (dest) /* If this is not a stack push ... */
8233 /* There are times when an address can appear varying and be a PLUS
8234 during this scan when it would be a fixed address were we to know
8235 the proper equivalences. So invalidate all memory if there is
8236 a BLKmode or nonscalar memory reference or a reference to a
8237 variable address. */
8238 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
8239 || cse_rtx_varies_p (XEXP (dest, 0))))
8241 invalidate_memory ();
8245 if (GET_CODE (set) == CLOBBER
8252 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
8253 invalidate (XEXP (dest, 0), GET_MODE (dest));
8254 else if (code == REG || code == SUBREG || code == MEM)
8255 invalidate (dest, VOIDmode);
8258 /* Invalidate all insns from START up to the end of the function or the
8259 next label. This called when we wish to CSE around a block that is
8260 conditionally executed. */
8263 invalidate_skipped_block (start)
8268 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
8269 insn = NEXT_INSN (insn))
8271 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
8274 if (GET_CODE (insn) == CALL_INSN)
8276 if (! CONST_CALL_P (insn))
8277 invalidate_memory ();
8278 invalidate_for_call ();
8281 invalidate_from_clobbers (PATTERN (insn));
8282 note_stores (PATTERN (insn), invalidate_skipped_set);
8286 /* Used for communication between the following two routines; contains a
8287 value to be checked for modification. */
8289 static rtx cse_check_loop_start_value;
8291 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8292 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8295 cse_check_loop_start (x, set)
8297 rtx set ATTRIBUTE_UNUSED;
8299 if (cse_check_loop_start_value == 0
8300 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8303 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8304 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8305 cse_check_loop_start_value = 0;
8308 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8309 a loop that starts with the label at LOOP_START.
8311 If X is a SET, we see if its SET_SRC is currently in our hash table.
8312 If so, we see if it has a value equal to some register used only in the
8313 loop exit code (as marked by jump.c).
8315 If those two conditions are true, we search backwards from the start of
8316 the loop to see if that same value was loaded into a register that still
8317 retains its value at the start of the loop.
8319 If so, we insert an insn after the load to copy the destination of that
8320 load into the equivalent register and (try to) replace our SET_SRC with that
8323 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8326 cse_set_around_loop (x, insn, loop_start)
8331 struct table_elt *src_elt;
8333 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8334 are setting PC or CC0 or whose SET_SRC is already a register. */
8335 if (GET_CODE (x) == SET
8336 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8337 && GET_CODE (SET_SRC (x)) != REG)
8339 src_elt = lookup (SET_SRC (x),
8340 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8341 GET_MODE (SET_DEST (x)));
8344 for (src_elt = src_elt->first_same_value; src_elt;
8345 src_elt = src_elt->next_same_value)
8346 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8347 && COST (src_elt->exp) < COST (SET_SRC (x)))
8351 /* Look for an insn in front of LOOP_START that sets
8352 something in the desired mode to SET_SRC (x) before we hit
8353 a label or CALL_INSN. */
8355 for (p = prev_nonnote_insn (loop_start);
8356 p && GET_CODE (p) != CALL_INSN
8357 && GET_CODE (p) != CODE_LABEL;
8358 p = prev_nonnote_insn (p))
8359 if ((set = single_set (p)) != 0
8360 && GET_CODE (SET_DEST (set)) == REG
8361 && GET_MODE (SET_DEST (set)) == src_elt->mode
8362 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8364 /* We now have to ensure that nothing between P
8365 and LOOP_START modified anything referenced in
8366 SET_SRC (x). We know that nothing within the loop
8367 can modify it, or we would have invalidated it in
8371 cse_check_loop_start_value = SET_SRC (x);
8372 for (q = p; q != loop_start; q = NEXT_INSN (q))
8373 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8374 note_stores (PATTERN (q), cse_check_loop_start);
8376 /* If nothing was changed and we can replace our
8377 SET_SRC, add an insn after P to copy its destination
8378 to what we will be replacing SET_SRC with. */
8379 if (cse_check_loop_start_value
8380 && validate_change (insn, &SET_SRC (x),
8383 /* If this creates new pseudos, this is unsafe,
8384 because the regno of new pseudo is unsuitable
8385 to index into reg_qty when cse_insn processes
8386 the new insn. Therefore, if a new pseudo was
8387 created, discard this optimization. */
8388 int nregs = max_reg_num ();
8390 = gen_move_insn (src_elt->exp, SET_DEST (set));
8391 if (nregs != max_reg_num ())
8393 if (! validate_change (insn, &SET_SRC (x),
8398 emit_insn_after (move, p);
8405 /* Now invalidate anything modified by X. */
8406 note_mem_written (SET_DEST (x));
8408 /* See comment on similar code in cse_insn for explanation of these tests. */
8409 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8410 || GET_CODE (SET_DEST (x)) == MEM)
8411 invalidate (SET_DEST (x), VOIDmode);
8412 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8413 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8414 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8417 /* Find the end of INSN's basic block and return its range,
8418 the total number of SETs in all the insns of the block, the last insn of the
8419 block, and the branch path.
8421 The branch path indicates which branches should be followed. If a non-zero
8422 path size is specified, the block should be rescanned and a different set
8423 of branches will be taken. The branch path is only used if
8424 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8426 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8427 used to describe the block. It is filled in with the information about
8428 the current block. The incoming structure's branch path, if any, is used
8429 to construct the output branch path. */
8432 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8434 struct cse_basic_block_data *data;
8441 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8442 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8443 int path_size = data->path_size;
8447 /* Update the previous branch path, if any. If the last branch was
8448 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8449 shorten the path by one and look at the previous branch. We know that
8450 at least one branch must have been taken if PATH_SIZE is non-zero. */
8451 while (path_size > 0)
8453 if (data->path[path_size - 1].status != NOT_TAKEN)
8455 data->path[path_size - 1].status = NOT_TAKEN;
8462 /* Scan to end of this basic block. */
8463 while (p && GET_CODE (p) != CODE_LABEL)
8465 /* Don't cse out the end of a loop. This makes a difference
8466 only for the unusual loops that always execute at least once;
8467 all other loops have labels there so we will stop in any case.
8468 Cse'ing out the end of the loop is dangerous because it
8469 might cause an invariant expression inside the loop
8470 to be reused after the end of the loop. This would make it
8471 hard to move the expression out of the loop in loop.c,
8472 especially if it is one of several equivalent expressions
8473 and loop.c would like to eliminate it.
8475 If we are running after loop.c has finished, we can ignore
8476 the NOTE_INSN_LOOP_END. */
8478 if (! after_loop && GET_CODE (p) == NOTE
8479 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8482 /* Don't cse over a call to setjmp; on some machines (eg vax)
8483 the regs restored by the longjmp come from
8484 a later time than the setjmp. */
8485 if (GET_CODE (p) == NOTE
8486 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8489 /* A PARALLEL can have lots of SETs in it,
8490 especially if it is really an ASM_OPERANDS. */
8491 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8492 && GET_CODE (PATTERN (p)) == PARALLEL)
8493 nsets += XVECLEN (PATTERN (p), 0);
8494 else if (GET_CODE (p) != NOTE)
8497 /* Ignore insns made by CSE; they cannot affect the boundaries of
8500 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8501 high_cuid = INSN_CUID (p);
8502 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8503 low_cuid = INSN_CUID (p);
8505 /* See if this insn is in our branch path. If it is and we are to
8507 if (path_entry < path_size && data->path[path_entry].branch == p)
8509 if (data->path[path_entry].status != NOT_TAKEN)
8512 /* Point to next entry in path, if any. */
8516 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8517 was specified, we haven't reached our maximum path length, there are
8518 insns following the target of the jump, this is the only use of the
8519 jump label, and the target label is preceded by a BARRIER.
8521 Alternatively, we can follow the jump if it branches around a
8522 block of code and there are no other branches into the block.
8523 In this case invalidate_skipped_block will be called to invalidate any
8524 registers set in the block when following the jump. */
8526 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8527 && GET_CODE (p) == JUMP_INSN
8528 && GET_CODE (PATTERN (p)) == SET
8529 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8530 && JUMP_LABEL (p) != 0
8531 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8532 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8534 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8535 if ((GET_CODE (q) != NOTE
8536 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8537 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8538 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8541 /* If we ran into a BARRIER, this code is an extension of the
8542 basic block when the branch is taken. */
8543 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8545 /* Don't allow ourself to keep walking around an
8546 always-executed loop. */
8547 if (next_real_insn (q) == next)
8553 /* Similarly, don't put a branch in our path more than once. */
8554 for (i = 0; i < path_entry; i++)
8555 if (data->path[i].branch == p)
8558 if (i != path_entry)
8561 data->path[path_entry].branch = p;
8562 data->path[path_entry++].status = TAKEN;
8564 /* This branch now ends our path. It was possible that we
8565 didn't see this branch the last time around (when the
8566 insn in front of the target was a JUMP_INSN that was
8567 turned into a no-op). */
8568 path_size = path_entry;
8571 /* Mark block so we won't scan it again later. */
8572 PUT_MODE (NEXT_INSN (p), QImode);
8574 /* Detect a branch around a block of code. */
8575 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8579 if (next_real_insn (q) == next)
8585 for (i = 0; i < path_entry; i++)
8586 if (data->path[i].branch == p)
8589 if (i != path_entry)
8592 /* This is no_labels_between_p (p, q) with an added check for
8593 reaching the end of a function (in case Q precedes P). */
8594 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8595 if (GET_CODE (tmp) == CODE_LABEL)
8600 data->path[path_entry].branch = p;
8601 data->path[path_entry++].status = AROUND;
8603 path_size = path_entry;
8606 /* Mark block so we won't scan it again later. */
8607 PUT_MODE (NEXT_INSN (p), QImode);
8614 data->low_cuid = low_cuid;
8615 data->high_cuid = high_cuid;
8616 data->nsets = nsets;
8619 /* If all jumps in the path are not taken, set our path length to zero
8620 so a rescan won't be done. */
8621 for (i = path_size - 1; i >= 0; i--)
8622 if (data->path[i].status != NOT_TAKEN)
8626 data->path_size = 0;
8628 data->path_size = path_size;
8630 /* End the current branch path. */
8631 data->path[path_size].branch = 0;
8634 /* Perform cse on the instructions of a function.
8635 F is the first instruction.
8636 NREGS is one plus the highest pseudo-reg number used in the instruction.
8638 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8639 (only if -frerun-cse-after-loop).
8641 Returns 1 if jump_optimize should be redone due to simplifications
8642 in conditional jump instructions. */
8645 cse_main (f, nregs, after_loop, file)
8651 struct cse_basic_block_data val;
8652 register rtx insn = f;
8655 cse_jumps_altered = 0;
8656 recorded_label_ref = 0;
8657 constant_pool_entries_cost = 0;
8661 init_alias_analysis ();
8665 max_insn_uid = get_max_uid ();
8667 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8668 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8670 #ifdef LOAD_EXTEND_OP
8672 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8673 and change the code and mode as appropriate. */
8674 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8677 /* Discard all the free elements of the previous function
8678 since they are allocated in the temporarily obstack. */
8679 bzero ((char *) table, sizeof table);
8680 free_element_chain = 0;
8681 n_elements_made = 0;
8683 /* Find the largest uid. */
8685 max_uid = get_max_uid ();
8686 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8687 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8689 /* Compute the mapping from uids to cuids.
8690 CUIDs are numbers assigned to insns, like uids,
8691 except that cuids increase monotonically through the code.
8692 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8693 between two insns is not affected by -g. */
8695 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8697 if (GET_CODE (insn) != NOTE
8698 || NOTE_LINE_NUMBER (insn) < 0)
8699 INSN_CUID (insn) = ++i;
8701 /* Give a line number note the same cuid as preceding insn. */
8702 INSN_CUID (insn) = i;
8705 /* Initialize which registers are clobbered by calls. */
8707 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8709 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8710 if ((call_used_regs[i]
8711 /* Used to check !fixed_regs[i] here, but that isn't safe;
8712 fixed regs are still call-clobbered, and sched can get
8713 confused if they can "live across calls".
8715 The frame pointer is always preserved across calls. The arg
8716 pointer is if it is fixed. The stack pointer usually is, unless
8717 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8718 will be present. If we are generating PIC code, the PIC offset
8719 table register is preserved across calls. */
8721 && i != STACK_POINTER_REGNUM
8722 && i != FRAME_POINTER_REGNUM
8723 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8724 && i != HARD_FRAME_POINTER_REGNUM
8726 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8727 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8729 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8730 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8734 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8737 ggc_push_context ();
8739 /* Loop over basic blocks.
8740 Compute the maximum number of qty's needed for each basic block
8741 (which is 2 for each SET). */
8745 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8746 flag_cse_skip_blocks);
8748 /* If this basic block was already processed or has no sets, skip it. */
8749 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8751 PUT_MODE (insn, VOIDmode);
8752 insn = (val.last ? NEXT_INSN (val.last) : 0);
8757 cse_basic_block_start = val.low_cuid;
8758 cse_basic_block_end = val.high_cuid;
8759 max_qty = val.nsets * 2;
8762 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
8763 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8766 /* Make MAX_QTY bigger to give us room to optimize
8767 past the end of this basic block, if that should prove useful. */
8773 /* If this basic block is being extended by following certain jumps,
8774 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8775 Otherwise, we start after this basic block. */
8776 if (val.path_size > 0)
8777 cse_basic_block (insn, val.last, val.path, 0);
8780 int old_cse_jumps_altered = cse_jumps_altered;
8783 /* When cse changes a conditional jump to an unconditional
8784 jump, we want to reprocess the block, since it will give
8785 us a new branch path to investigate. */
8786 cse_jumps_altered = 0;
8787 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8788 if (cse_jumps_altered == 0
8789 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8792 cse_jumps_altered |= old_cse_jumps_altered;
8806 /* Tell refers_to_mem_p that qty_const info is not available. */
8809 if (max_elements_made < n_elements_made)
8810 max_elements_made = n_elements_made;
8812 return cse_jumps_altered || recorded_label_ref;
8815 /* Process a single basic block. FROM and TO and the limits of the basic
8816 block. NEXT_BRANCH points to the branch path when following jumps or
8817 a null path when not following jumps.
8819 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8820 loop. This is true when we are being called for the last time on a
8821 block and this CSE pass is before loop.c. */
8824 cse_basic_block (from, to, next_branch, around_loop)
8825 register rtx from, to;
8826 struct branch_path *next_branch;
8831 rtx libcall_insn = NULL_RTX;
8834 /* Each of these arrays is undefined before max_reg, so only allocate
8835 the space actually needed and adjust the start below. */
8837 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8838 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8839 qty_mode = (enum machine_mode *) alloca ((max_qty - max_reg)
8840 * sizeof (enum machine_mode));
8841 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8842 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8844 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8845 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8846 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8848 qty_first_reg -= max_reg;
8849 qty_last_reg -= max_reg;
8850 qty_mode -= max_reg;
8851 qty_const -= max_reg;
8852 qty_const_insn -= max_reg;
8853 qty_comparison_code -= max_reg;
8854 qty_comparison_qty -= max_reg;
8855 qty_comparison_const -= max_reg;
8859 /* TO might be a label. If so, protect it from being deleted. */
8860 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8863 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8865 register enum rtx_code code = GET_CODE (insn);
8867 /* If we have processed 1,000 insns, flush the hash table to
8868 avoid extreme quadratic behavior. We must not include NOTEs
8869 in the count since there may be more or them when generating
8870 debugging information. If we clear the table at different
8871 times, code generated with -g -O might be different than code
8872 generated with -O but not -g.
8874 ??? This is a real kludge and needs to be done some other way.
8876 if (code != NOTE && num_insns++ > 1000)
8878 flush_hash_table ();
8882 /* See if this is a branch that is part of the path. If so, and it is
8883 to be taken, do so. */
8884 if (next_branch->branch == insn)
8886 enum taken status = next_branch++->status;
8887 if (status != NOT_TAKEN)
8889 if (status == TAKEN)
8890 record_jump_equiv (insn, 1);
8892 invalidate_skipped_block (NEXT_INSN (insn));
8894 /* Set the last insn as the jump insn; it doesn't affect cc0.
8895 Then follow this branch. */
8900 insn = JUMP_LABEL (insn);
8905 if (GET_MODE (insn) == QImode)
8906 PUT_MODE (insn, VOIDmode);
8908 if (GET_RTX_CLASS (code) == 'i')
8912 /* Process notes first so we have all notes in canonical forms when
8913 looking for duplicate operations. */
8915 if (REG_NOTES (insn))
8916 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8918 /* Track when we are inside in LIBCALL block. Inside such a block,
8919 we do not want to record destinations. The last insn of a
8920 LIBCALL block is not considered to be part of the block, since
8921 its destination is the result of the block and hence should be
8924 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
8925 libcall_insn = XEXP (p, 0);
8926 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8927 libcall_insn = NULL_RTX;
8929 cse_insn (insn, libcall_insn);
8932 /* If INSN is now an unconditional jump, skip to the end of our
8933 basic block by pretending that we just did the last insn in the
8934 basic block. If we are jumping to the end of our block, show
8935 that we can have one usage of TO. */
8937 if (simplejump_p (insn))
8942 if (JUMP_LABEL (insn) == to)
8945 /* Maybe TO was deleted because the jump is unconditional.
8946 If so, there is nothing left in this basic block. */
8947 /* ??? Perhaps it would be smarter to set TO
8948 to whatever follows this insn,
8949 and pretend the basic block had always ended here. */
8950 if (INSN_DELETED_P (to))
8953 insn = PREV_INSN (to);
8956 /* See if it is ok to keep on going past the label
8957 which used to end our basic block. Remember that we incremented
8958 the count of that label, so we decrement it here. If we made
8959 a jump unconditional, TO_USAGE will be one; in that case, we don't
8960 want to count the use in that jump. */
8962 if (to != 0 && NEXT_INSN (insn) == to
8963 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8965 struct cse_basic_block_data val;
8968 insn = NEXT_INSN (to);
8970 if (LABEL_NUSES (to) == 0)
8971 insn = delete_insn (to);
8973 /* If TO was the last insn in the function, we are done. */
8977 /* If TO was preceded by a BARRIER we are done with this block
8978 because it has no continuation. */
8979 prev = prev_nonnote_insn (to);
8980 if (prev && GET_CODE (prev) == BARRIER)
8983 /* Find the end of the following block. Note that we won't be
8984 following branches in this case. */
8987 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8989 /* If the tables we allocated have enough space left
8990 to handle all the SETs in the next basic block,
8991 continue through it. Otherwise, return,
8992 and that block will be scanned individually. */
8993 if (val.nsets * 2 + next_qty > max_qty)
8996 cse_basic_block_start = val.low_cuid;
8997 cse_basic_block_end = val.high_cuid;
9000 /* Prevent TO from being deleted if it is a label. */
9001 if (to != 0 && GET_CODE (to) == CODE_LABEL)
9004 /* Back up so we process the first insn in the extension. */
9005 insn = PREV_INSN (insn);
9009 if (next_qty > max_qty)
9012 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
9013 the previous insn is the only insn that branches to the head of a loop,
9014 we can cse into the loop. Don't do this if we changed the jump
9015 structure of a loop unless we aren't going to be following jumps. */
9017 if ((cse_jumps_altered == 0
9018 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
9019 && around_loop && to != 0
9020 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
9021 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
9022 && JUMP_LABEL (PREV_INSN (to)) != 0
9023 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
9024 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
9026 return to ? NEXT_INSN (to) : 0;
9029 /* Count the number of times registers are used (not set) in X.
9030 COUNTS is an array in which we accumulate the count, INCR is how much
9031 we count each register usage.
9033 Don't count a usage of DEST, which is the SET_DEST of a SET which
9034 contains X in its SET_SRC. This is because such a SET does not
9035 modify the liveness of DEST. */
9038 count_reg_usage (x, counts, dest, incr)
9051 switch (code = GET_CODE (x))
9055 counts[REGNO (x)] += incr;
9068 /* If we are clobbering a MEM, mark any registers inside the address
9070 if (GET_CODE (XEXP (x, 0)) == MEM)
9071 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
9075 /* Unless we are setting a REG, count everything in SET_DEST. */
9076 if (GET_CODE (SET_DEST (x)) != REG)
9077 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
9079 /* If SRC has side-effects, then we can't delete this insn, so the
9080 usage of SET_DEST inside SRC counts.
9082 ??? Strictly-speaking, we might be preserving this insn
9083 because some other SET has side-effects, but that's hard
9084 to do and can't happen now. */
9085 count_reg_usage (SET_SRC (x), counts,
9086 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
9091 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
9093 /* ... falls through ... */
9096 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
9098 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9101 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
9106 if (REG_NOTE_KIND (x) == REG_EQUAL
9107 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
9108 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
9109 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
9116 fmt = GET_RTX_FORMAT (code);
9117 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9120 count_reg_usage (XEXP (x, i), counts, dest, incr);
9121 else if (fmt[i] == 'E')
9122 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9123 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
9127 /* Scan all the insns and delete any that are dead; i.e., they store a register
9128 that is never used or they copy a register to itself.
9130 This is used to remove insns made obviously dead by cse, loop or other
9131 optimizations. It improves the heuristics in loop since it won't try to
9132 move dead invariants out of loops or make givs for dead quantities. The
9133 remaining passes of the compilation are also sped up. */
9136 delete_trivially_dead_insns (insns, nreg)
9140 int *counts = (int *) alloca (nreg * sizeof (int));
9146 int in_libcall = 0, dead_libcall = 0;
9148 /* First count the number of times each register is used. */
9149 bzero ((char *) counts, sizeof (int) * nreg);
9150 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9151 count_reg_usage (insn, counts, NULL_RTX, 1);
9153 /* Go from the last insn to the first and delete insns that only set unused
9154 registers or copy a register to itself. As we delete an insn, remove
9155 usage counts for registers it uses.
9157 The first jump optimization pass may leave a real insn as the last
9158 insn in the function. We must not skip that insn or we may end
9159 up deleting code that is not really dead. */
9160 insn = get_last_insn ();
9161 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
9162 insn = prev_real_insn (insn);
9164 for ( ; insn; insn = prev)
9169 prev = prev_real_insn (insn);
9171 /* Don't delete any insns that are part of a libcall block unless
9172 we can delete the whole libcall block.
9174 Flow or loop might get confused if we did that. Remember
9175 that we are scanning backwards. */
9176 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9182 /* See if there's a REG_EQUAL note on this insn and try to
9183 replace the source with the REG_EQUAL expression.
9185 We assume that insns with REG_RETVALs can only be reg->reg
9186 copies at this point. */
9187 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
9190 rtx set = single_set (insn);
9192 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
9195 find_reg_note (insn, REG_RETVAL, NULL_RTX));
9200 else if (in_libcall)
9201 live_insn = ! dead_libcall;
9202 else if (GET_CODE (PATTERN (insn)) == SET)
9204 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
9205 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
9209 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
9210 && ! side_effects_p (SET_SRC (PATTERN (insn)))
9211 && ((tem = next_nonnote_insn (insn)) == 0
9212 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9213 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9216 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
9217 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
9218 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
9219 || side_effects_p (SET_SRC (PATTERN (insn)))
9220 /* An ADDRESSOF expression can turn into a use of the
9221 internal arg pointer, so always consider the
9222 internal arg pointer live. If it is truly dead,
9223 flow will delete the initializing insn. */
9224 || (SET_DEST (PATTERN (insn))
9225 == current_function_internal_arg_pointer))
9228 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9229 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9231 rtx elt = XVECEXP (PATTERN (insn), 0, i);
9233 if (GET_CODE (elt) == SET)
9235 if (GET_CODE (SET_DEST (elt)) == REG
9236 && SET_DEST (elt) == SET_SRC (elt))
9240 else if (GET_CODE (SET_DEST (elt)) == CC0
9241 && ! side_effects_p (SET_SRC (elt))
9242 && ((tem = next_nonnote_insn (insn)) == 0
9243 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9244 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9247 else if (GET_CODE (SET_DEST (elt)) != REG
9248 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
9249 || counts[REGNO (SET_DEST (elt))] != 0
9250 || side_effects_p (SET_SRC (elt))
9251 /* An ADDRESSOF expression can turn into a use of the
9252 internal arg pointer, so always consider the
9253 internal arg pointer live. If it is truly dead,
9254 flow will delete the initializing insn. */
9256 == current_function_internal_arg_pointer))
9259 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
9265 /* If this is a dead insn, delete it and show registers in it aren't
9270 count_reg_usage (insn, counts, NULL_RTX, -1);
9274 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))