1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 /* stdio.h must precede rtl.h for FFS. */
31 #include "hard-reg-set.h"
34 #include "insn-config.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
203 /* One plus largest instruction UID used in this function at time of
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
307 /* The quantity number of the register's current contents. */
310 /* The number of times the register has been altered in the current
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
386 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
387 to put in the note. */
388 static int recorded_label_ref;
390 /* canon_hash stores 1 in do_not_record
391 if it notices a reference to CC0, PC, or some other volatile
394 static int do_not_record;
396 #ifdef LOAD_EXTEND_OP
398 /* Scratch rtl used when looking for load-extended copy of a MEM. */
399 static rtx memory_extend_rtx;
402 /* canon_hash stores 1 in hash_arg_in_memory
403 if it notices a reference to memory within the expression being hashed. */
405 static int hash_arg_in_memory;
407 /* The hash table contains buckets which are chains of `struct table_elt's,
408 each recording one expression's information.
409 That expression is in the `exp' field.
411 Those elements with the same hash code are chained in both directions
412 through the `next_same_hash' and `prev_same_hash' fields.
414 Each set of expressions with equivalent values
415 are on a two-way chain through the `next_same_value'
416 and `prev_same_value' fields, and all point with
417 the `first_same_value' field at the first element in
418 that chain. The chain is in order of increasing cost.
419 Each element's cost value is in its `cost' field.
421 The `in_memory' field is nonzero for elements that
422 involve any reference to memory. These elements are removed
423 whenever a write is done to an unidentified location in memory.
424 To be safe, we assume that a memory address is unidentified unless
425 the address is either a symbol constant or a constant plus
426 the frame pointer or argument pointer.
428 The `related_value' field is used to connect related expressions
429 (that differ by adding an integer).
430 The related expressions are chained in a circular fashion.
431 `related_value' is zero for expressions for which this
434 The `cost' field stores the cost of this element's expression.
436 The `is_const' flag is set if the element is a constant (including
439 The `flag' field is used as a temporary during some search routines.
441 The `mode' field is usually the same as GET_MODE (`exp'), but
442 if `exp' is a CONST_INT and has no machine mode then the `mode'
443 field is the mode it was being used as. Each constant is
444 recorded separately for each mode it is used with. */
450 struct table_elt *next_same_hash;
451 struct table_elt *prev_same_hash;
452 struct table_elt *next_same_value;
453 struct table_elt *prev_same_value;
454 struct table_elt *first_same_value;
455 struct table_elt *related_value;
457 enum machine_mode mode;
463 /* We don't want a lot of buckets, because we rarely have very many
464 things stored in the hash table, and a lot of buckets slows
465 down a lot of loops that happen frequently. */
467 #define HASH_SIZE (1 << HASH_SHIFT)
468 #define HASH_MASK (HASH_SIZE - 1)
470 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
471 register (hard registers may require `do_not_record' to be set). */
474 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
475 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
476 : canon_hash (X, M)) & HASH_MASK)
478 /* Determine whether register number N is considered a fixed register for CSE.
479 It is desirable to replace other regs with fixed regs, to reduce need for
481 A reg wins if it is either the frame pointer or designated as fixed. */
482 #define FIXED_REGNO_P(N) \
483 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
484 || fixed_regs[N] || global_regs[N])
486 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
487 hard registers and pointers into the frame are the cheapest with a cost
488 of 0. Next come pseudos with a cost of one and other hard registers with
489 a cost of 2. Aside from these special cases, call `rtx_cost'. */
491 #define CHEAP_REGNO(N) \
492 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
493 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
494 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
495 || ((N) < FIRST_PSEUDO_REGISTER \
496 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
498 /* A register is cheap if it is a user variable assigned to the register
499 or if its register number always corresponds to a cheap register. */
501 #define CHEAP_REG(N) \
502 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
503 || CHEAP_REGNO (REGNO (N)))
506 (GET_CODE (X) == REG \
507 ? (CHEAP_REG (X) ? 0 \
508 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
512 /* Get the info associated with register N. */
514 #define GET_CSE_REG_INFO(N) \
515 (((N) == cached_regno && cached_cse_reg_info) \
516 ? cached_cse_reg_info : get_cse_reg_info ((N)))
518 /* Get the number of times this register has been updated in this
521 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
523 /* Get the point at which REG was recorded in the table. */
525 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
527 /* Get the quantity number for REG. */
529 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
531 /* Determine if the quantity number for register X represents a valid index
532 into the qty_table. */
534 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
537 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
538 during CSE, such nodes are present. Using an ADDRESSOF node which
539 refers to the address of a REG is a good thing because we can then
540 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
541 #define CSE_ADDRESS_COST(RTX) \
542 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
543 ? -1 : ADDRESS_COST(RTX))
546 static struct table_elt *table[HASH_SIZE];
548 /* Chain of `struct table_elt's made so far for this function
549 but currently removed from the table. */
551 static struct table_elt *free_element_chain;
553 /* Number of `struct table_elt' structures made so far for this function. */
555 static int n_elements_made;
557 /* Maximum value `n_elements_made' has had so far in this compilation
558 for functions previously processed. */
560 static int max_elements_made;
562 /* Surviving equivalence class when two equivalence classes are merged
563 by recording the effects of a jump in the last insn. Zero if the
564 last insn was not a conditional jump. */
566 static struct table_elt *last_jump_equiv_class;
568 /* Set to the cost of a constant pool reference if one was found for a
569 symbolic constant. If this was found, it means we should try to
570 convert constants into constant pool entries if they don't fit in
573 static int constant_pool_entries_cost;
575 /* Define maximum length of a branch path. */
577 #define PATHLENGTH 10
579 /* This data describes a block that will be processed by cse_basic_block. */
581 struct cse_basic_block_data
583 /* Lowest CUID value of insns in block. */
585 /* Highest CUID value of insns in block. */
587 /* Total number of SETs in block. */
589 /* Last insn in the block. */
591 /* Size of current branch path, if any. */
593 /* Current branch path, indicating which branches will be taken. */
596 /* The branch insn. */
598 /* Whether it should be taken or not. AROUND is the same as taken
599 except that it is used when the destination label is not preceded
601 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
605 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
606 virtual regs here because the simplify_*_operation routines are called
607 by integrate.c, which is called before virtual register instantiation.
609 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
610 a header file so that their definitions can be shared with the
611 simplification routines in simplify-rtx.c. Until then, do not
612 change these macros without also changing the copy in simplify-rtx.c. */
614 #define FIXED_BASE_PLUS_P(X) \
615 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
616 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
617 || (X) == virtual_stack_vars_rtx \
618 || (X) == virtual_incoming_args_rtx \
619 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
620 && (XEXP (X, 0) == frame_pointer_rtx \
621 || XEXP (X, 0) == hard_frame_pointer_rtx \
622 || ((X) == arg_pointer_rtx \
623 && fixed_regs[ARG_POINTER_REGNUM]) \
624 || XEXP (X, 0) == virtual_stack_vars_rtx \
625 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
626 || GET_CODE (X) == ADDRESSOF)
628 /* Similar, but also allows reference to the stack pointer.
630 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
631 arg_pointer_rtx by itself is nonzero, because on at least one machine,
632 the i960, the arg pointer is zero when it is unused. */
634 #define NONZERO_BASE_PLUS_P(X) \
635 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
636 || (X) == virtual_stack_vars_rtx \
637 || (X) == virtual_incoming_args_rtx \
638 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
639 && (XEXP (X, 0) == frame_pointer_rtx \
640 || XEXP (X, 0) == hard_frame_pointer_rtx \
641 || ((X) == arg_pointer_rtx \
642 && fixed_regs[ARG_POINTER_REGNUM]) \
643 || XEXP (X, 0) == virtual_stack_vars_rtx \
644 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
645 || (X) == stack_pointer_rtx \
646 || (X) == virtual_stack_dynamic_rtx \
647 || (X) == virtual_outgoing_args_rtx \
648 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
649 && (XEXP (X, 0) == stack_pointer_rtx \
650 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
651 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
652 || GET_CODE (X) == ADDRESSOF)
654 static int notreg_cost PARAMS ((rtx));
655 static void new_basic_block PARAMS ((void));
656 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
657 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
658 static void delete_reg_equiv PARAMS ((unsigned int));
659 static int mention_regs PARAMS ((rtx));
660 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
661 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
662 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
663 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
664 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
665 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
667 static void merge_equiv_classes PARAMS ((struct table_elt *,
668 struct table_elt *));
669 static void invalidate PARAMS ((rtx, enum machine_mode));
670 static int cse_rtx_varies_p PARAMS ((rtx));
671 static void remove_invalid_refs PARAMS ((unsigned int));
672 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
674 static void rehash_using_reg PARAMS ((rtx));
675 static void invalidate_memory PARAMS ((void));
676 static void invalidate_for_call PARAMS ((void));
677 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
678 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
679 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
680 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
681 static rtx canon_reg PARAMS ((rtx, rtx));
682 static void find_best_addr PARAMS ((rtx, rtx *));
683 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
685 enum machine_mode *));
686 static rtx fold_rtx PARAMS ((rtx, rtx));
687 static rtx equiv_constant PARAMS ((rtx));
688 static void record_jump_equiv PARAMS ((rtx, int));
689 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
691 static void cse_insn PARAMS ((rtx, rtx));
692 static int addr_affects_sp_p PARAMS ((rtx));
693 static void invalidate_from_clobbers PARAMS ((rtx));
694 static rtx cse_process_notes PARAMS ((rtx, rtx));
695 static void cse_around_loop PARAMS ((rtx));
696 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
697 static void invalidate_skipped_block PARAMS ((rtx));
698 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
699 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
700 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
701 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
702 extern void dump_class PARAMS ((struct table_elt*));
703 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
705 static void flush_hash_table PARAMS ((void));
707 /* Dump the expressions in the equivalence class indicated by CLASSP.
708 This function is used only for debugging. */
711 struct table_elt *classp;
713 struct table_elt *elt;
715 fprintf (stderr, "Equivalence chain for ");
716 print_rtl (stderr, classp->exp);
717 fprintf (stderr, ": \n");
719 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
721 print_rtl (stderr, elt->exp);
722 fprintf (stderr, "\n");
726 /* Internal function, to compute cost when X is not a register; called
727 from COST macro to keep it simple. */
733 return ((GET_CODE (x) == SUBREG
734 && GET_CODE (SUBREG_REG (x)) == REG
735 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
736 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
737 && (GET_MODE_SIZE (GET_MODE (x))
738 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
739 && subreg_lowpart_p (x)
740 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
741 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
742 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
743 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
745 : rtx_cost (x, SET) * 2);
748 /* Return the right cost to give to an operation
749 to make the cost of the corresponding register-to-register instruction
750 N times that of a fast register-to-register instruction. */
752 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
754 /* Return an estimate of the cost of computing rtx X.
755 One use is in cse, to decide which expression to keep in the hash table.
756 Another is in rtl generation, to pick the cheapest way to multiply.
757 Other uses like the latter are expected in the future. */
760 rtx_cost (x, outer_code)
762 enum rtx_code outer_code ATTRIBUTE_UNUSED;
765 register enum rtx_code code;
766 register const char *fmt;
772 /* Compute the default costs of certain things.
773 Note that RTX_COSTS can override the defaults. */
779 /* Count multiplication by 2**n as a shift,
780 because if we are considering it, we would output it as a shift. */
781 if (GET_CODE (XEXP (x, 1)) == CONST_INT
782 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
785 total = COSTS_N_INSNS (5);
791 total = COSTS_N_INSNS (7);
794 /* Used in loop.c and combine.c as a marker. */
798 /* We don't want these to be used in substitutions because
799 we have no way of validating the resulting insn. So assign
800 anything containing an ASM_OPERANDS a very high cost. */
810 return ! CHEAP_REG (x);
813 /* If we can't tie these modes, make this expensive. The larger
814 the mode, the more expensive it is. */
815 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
816 return COSTS_N_INSNS (2
817 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
820 RTX_COSTS (x, code, outer_code);
823 CONST_COSTS (x, code, outer_code);
827 #ifdef DEFAULT_RTX_COSTS
828 DEFAULT_RTX_COSTS(x, code, outer_code);
833 /* Sum the costs of the sub-rtx's, plus cost of this operation,
834 which is already in total. */
836 fmt = GET_RTX_FORMAT (code);
837 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
839 total += rtx_cost (XEXP (x, i), code);
840 else if (fmt[i] == 'E')
841 for (j = 0; j < XVECLEN (x, i); j++)
842 total += rtx_cost (XVECEXP (x, i, j), code);
847 static struct cse_reg_info *
848 get_cse_reg_info (regno)
851 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
852 struct cse_reg_info *p;
854 for (p = *hash_head ; p != NULL; p = p->hash_next)
855 if (p->regno == regno)
860 /* Get a new cse_reg_info structure. */
861 if (cse_reg_info_free_list)
863 p = cse_reg_info_free_list;
864 cse_reg_info_free_list = p->next;
867 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
869 /* Insert into hash table. */
870 p->hash_next = *hash_head;
875 p->reg_in_table = -1;
878 p->next = cse_reg_info_used_list;
879 cse_reg_info_used_list = p;
880 if (!cse_reg_info_used_list_end)
881 cse_reg_info_used_list_end = p;
884 /* Cache this lookup; we tend to be looking up information about the
885 same register several times in a row. */
886 cached_regno = regno;
887 cached_cse_reg_info = p;
892 /* Clear the hash table and initialize each register with its own quantity,
893 for a new basic block. */
902 /* Clear out hash table state for this pass. */
904 bzero ((char *) reg_hash, sizeof reg_hash);
906 if (cse_reg_info_used_list)
908 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
909 cse_reg_info_free_list = cse_reg_info_used_list;
910 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
912 cached_cse_reg_info = 0;
914 CLEAR_HARD_REG_SET (hard_regs_in_table);
916 /* The per-quantity values used to be initialized here, but it is
917 much faster to initialize each as it is made in `make_new_qty'. */
919 for (i = 0; i < HASH_SIZE; i++)
921 struct table_elt *first;
926 struct table_elt *last = first;
930 while (last->next_same_hash != NULL)
931 last = last->next_same_hash;
933 /* Now relink this hash entire chain into
934 the free element list. */
936 last->next_same_hash = free_element_chain;
937 free_element_chain = first;
948 /* Say that register REG contains a quantity in mode MODE not in any
949 register before and initialize that quantity. */
952 make_new_qty (reg, mode)
954 enum machine_mode mode;
957 register struct qty_table_elem *ent;
958 register struct reg_eqv_elem *eqv;
960 if (next_qty >= max_qty)
963 q = REG_QTY (reg) = next_qty++;
965 ent->first_reg = reg;
968 ent->const_rtx = ent->const_insn = NULL_RTX;
969 ent->comparison_code = UNKNOWN;
971 eqv = ®_eqv_table[reg];
972 eqv->next = eqv->prev = -1;
975 /* Make reg NEW equivalent to reg OLD.
976 OLD is not changing; NEW is. */
979 make_regs_eqv (new, old)
980 unsigned int new, old;
982 unsigned int lastr, firstr;
983 int q = REG_QTY (old);
984 struct qty_table_elem *ent;
988 /* Nothing should become eqv until it has a "non-invalid" qty number. */
989 if (! REGNO_QTY_VALID_P (old))
993 firstr = ent->first_reg;
994 lastr = ent->last_reg;
996 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
997 hard regs. Among pseudos, if NEW will live longer than any other reg
998 of the same qty, and that is beyond the current basic block,
999 make it the new canonical replacement for this qty. */
1000 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1001 /* Certain fixed registers might be of the class NO_REGS. This means
1002 that not only can they not be allocated by the compiler, but
1003 they cannot be used in substitutions or canonicalizations
1005 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1006 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1007 || (new >= FIRST_PSEUDO_REGISTER
1008 && (firstr < FIRST_PSEUDO_REGISTER
1009 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1010 || (uid_cuid[REGNO_FIRST_UID (new)]
1011 < cse_basic_block_start))
1012 && (uid_cuid[REGNO_LAST_UID (new)]
1013 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1015 reg_eqv_table[firstr].prev = new;
1016 reg_eqv_table[new].next = firstr;
1017 reg_eqv_table[new].prev = -1;
1018 ent->first_reg = new;
1022 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1023 Otherwise, insert before any non-fixed hard regs that are at the
1024 end. Registers of class NO_REGS cannot be used as an
1025 equivalent for anything. */
1026 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1027 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1028 && new >= FIRST_PSEUDO_REGISTER)
1029 lastr = reg_eqv_table[lastr].prev;
1030 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1031 if (reg_eqv_table[lastr].next >= 0)
1032 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1034 qty_table[q].last_reg = new;
1035 reg_eqv_table[lastr].next = new;
1036 reg_eqv_table[new].prev = lastr;
1040 /* Remove REG from its equivalence class. */
1043 delete_reg_equiv (reg)
1046 register struct qty_table_elem *ent;
1047 register int q = REG_QTY (reg);
1050 /* If invalid, do nothing. */
1054 ent = &qty_table[q];
1056 p = reg_eqv_table[reg].prev;
1057 n = reg_eqv_table[reg].next;
1060 reg_eqv_table[n].prev = p;
1064 reg_eqv_table[p].next = n;
1068 REG_QTY (reg) = reg;
1071 /* Remove any invalid expressions from the hash table
1072 that refer to any of the registers contained in expression X.
1074 Make sure that newly inserted references to those registers
1075 as subexpressions will be considered valid.
1077 mention_regs is not called when a register itself
1078 is being stored in the table.
1080 Return 1 if we have done something that may have changed the hash code
1087 register enum rtx_code code;
1089 register const char *fmt;
1090 register int changed = 0;
1095 code = GET_CODE (x);
1098 unsigned int regno = REGNO (x);
1099 unsigned int endregno
1100 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1101 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1104 for (i = regno; i < endregno; i++)
1106 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1107 remove_invalid_refs (i);
1109 REG_IN_TABLE (i) = REG_TICK (i);
1115 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1116 pseudo if they don't use overlapping words. We handle only pseudos
1117 here for simplicity. */
1118 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1119 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1121 unsigned int i = REGNO (SUBREG_REG (x));
1123 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1125 /* If reg_tick has been incremented more than once since
1126 reg_in_table was last set, that means that the entire
1127 register has been set before, so discard anything memorized
1128 for the entrire register, including all SUBREG expressions. */
1129 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1130 remove_invalid_refs (i);
1132 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1135 REG_IN_TABLE (i) = REG_TICK (i);
1139 /* If X is a comparison or a COMPARE and either operand is a register
1140 that does not have a quantity, give it one. This is so that a later
1141 call to record_jump_equiv won't cause X to be assigned a different
1142 hash code and not found in the table after that call.
1144 It is not necessary to do this here, since rehash_using_reg can
1145 fix up the table later, but doing this here eliminates the need to
1146 call that expensive function in the most common case where the only
1147 use of the register is in the comparison. */
1149 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1151 if (GET_CODE (XEXP (x, 0)) == REG
1152 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1153 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1155 rehash_using_reg (XEXP (x, 0));
1159 if (GET_CODE (XEXP (x, 1)) == REG
1160 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1161 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1163 rehash_using_reg (XEXP (x, 1));
1168 fmt = GET_RTX_FORMAT (code);
1169 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1171 changed |= mention_regs (XEXP (x, i));
1172 else if (fmt[i] == 'E')
1173 for (j = 0; j < XVECLEN (x, i); j++)
1174 changed |= mention_regs (XVECEXP (x, i, j));
1179 /* Update the register quantities for inserting X into the hash table
1180 with a value equivalent to CLASSP.
1181 (If the class does not contain a REG, it is irrelevant.)
1182 If MODIFIED is nonzero, X is a destination; it is being modified.
1183 Note that delete_reg_equiv should be called on a register
1184 before insert_regs is done on that register with MODIFIED != 0.
1186 Nonzero value means that elements of reg_qty have changed
1187 so X's hash code may be different. */
1190 insert_regs (x, classp, modified)
1192 struct table_elt *classp;
1195 if (GET_CODE (x) == REG)
1197 unsigned int regno = REGNO (x);
1200 /* If REGNO is in the equivalence table already but is of the
1201 wrong mode for that equivalence, don't do anything here. */
1203 qty_valid = REGNO_QTY_VALID_P (regno);
1206 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1208 if (ent->mode != GET_MODE (x))
1212 if (modified || ! qty_valid)
1215 for (classp = classp->first_same_value;
1217 classp = classp->next_same_value)
1218 if (GET_CODE (classp->exp) == REG
1219 && GET_MODE (classp->exp) == GET_MODE (x))
1221 make_regs_eqv (regno, REGNO (classp->exp));
1225 make_new_qty (regno, GET_MODE (x));
1232 /* If X is a SUBREG, we will likely be inserting the inner register in the
1233 table. If that register doesn't have an assigned quantity number at
1234 this point but does later, the insertion that we will be doing now will
1235 not be accessible because its hash code will have changed. So assign
1236 a quantity number now. */
1238 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1239 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1241 unsigned int regno = REGNO (SUBREG_REG (x));
1243 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1244 /* Mention_regs checks if REG_TICK is exactly one larger than
1245 REG_IN_TABLE to find out if there was only a single preceding
1246 invalidation - for the SUBREG - or another one, which would be
1247 for the full register. Since we don't invalidate the SUBREG
1248 here first, we might have to bump up REG_TICK so that mention_regs
1249 will do the right thing. */
1250 if (REG_IN_TABLE (regno) >= 0
1251 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1257 return mention_regs (x);
1260 /* Look in or update the hash table. */
1262 /* Remove table element ELT from use in the table.
1263 HASH is its hash code, made using the HASH macro.
1264 It's an argument because often that is known in advance
1265 and we save much time not recomputing it. */
1268 remove_from_table (elt, hash)
1269 register struct table_elt *elt;
1275 /* Mark this element as removed. See cse_insn. */
1276 elt->first_same_value = 0;
1278 /* Remove the table element from its equivalence class. */
1281 register struct table_elt *prev = elt->prev_same_value;
1282 register struct table_elt *next = elt->next_same_value;
1284 if (next) next->prev_same_value = prev;
1287 prev->next_same_value = next;
1290 register struct table_elt *newfirst = next;
1293 next->first_same_value = newfirst;
1294 next = next->next_same_value;
1299 /* Remove the table element from its hash bucket. */
1302 register struct table_elt *prev = elt->prev_same_hash;
1303 register struct table_elt *next = elt->next_same_hash;
1305 if (next) next->prev_same_hash = prev;
1308 prev->next_same_hash = next;
1309 else if (table[hash] == elt)
1313 /* This entry is not in the proper hash bucket. This can happen
1314 when two classes were merged by `merge_equiv_classes'. Search
1315 for the hash bucket that it heads. This happens only very
1316 rarely, so the cost is acceptable. */
1317 for (hash = 0; hash < HASH_SIZE; hash++)
1318 if (table[hash] == elt)
1323 /* Remove the table element from its related-value circular chain. */
1325 if (elt->related_value != 0 && elt->related_value != elt)
1327 register struct table_elt *p = elt->related_value;
1329 while (p->related_value != elt)
1330 p = p->related_value;
1331 p->related_value = elt->related_value;
1332 if (p->related_value == p)
1333 p->related_value = 0;
1336 /* Now add it to the free element chain. */
1337 elt->next_same_hash = free_element_chain;
1338 free_element_chain = elt;
1341 /* Look up X in the hash table and return its table element,
1342 or 0 if X is not in the table.
1344 MODE is the machine-mode of X, or if X is an integer constant
1345 with VOIDmode then MODE is the mode with which X will be used.
1347 Here we are satisfied to find an expression whose tree structure
1350 static struct table_elt *
1351 lookup (x, hash, mode)
1354 enum machine_mode mode;
1356 register struct table_elt *p;
1358 for (p = table[hash]; p; p = p->next_same_hash)
1359 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1360 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1366 /* Like `lookup' but don't care whether the table element uses invalid regs.
1367 Also ignore discrepancies in the machine mode of a register. */
1369 static struct table_elt *
1370 lookup_for_remove (x, hash, mode)
1373 enum machine_mode mode;
1375 register struct table_elt *p;
1377 if (GET_CODE (x) == REG)
1379 unsigned int regno = REGNO (x);
1381 /* Don't check the machine mode when comparing registers;
1382 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1383 for (p = table[hash]; p; p = p->next_same_hash)
1384 if (GET_CODE (p->exp) == REG
1385 && REGNO (p->exp) == regno)
1390 for (p = table[hash]; p; p = p->next_same_hash)
1391 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1398 /* Look for an expression equivalent to X and with code CODE.
1399 If one is found, return that expression. */
1402 lookup_as_function (x, code)
1406 register struct table_elt *p
1407 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1409 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1410 long as we are narrowing. So if we looked in vain for a mode narrower
1411 than word_mode before, look for word_mode now. */
1412 if (p == 0 && code == CONST_INT
1413 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1416 PUT_MODE (x, word_mode);
1417 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1423 for (p = p->first_same_value; p; p = p->next_same_value)
1424 if (GET_CODE (p->exp) == code
1425 /* Make sure this is a valid entry in the table. */
1426 && exp_equiv_p (p->exp, p->exp, 1, 0))
1432 /* Insert X in the hash table, assuming HASH is its hash code
1433 and CLASSP is an element of the class it should go in
1434 (or 0 if a new class should be made).
1435 It is inserted at the proper position to keep the class in
1436 the order cheapest first.
1438 MODE is the machine-mode of X, or if X is an integer constant
1439 with VOIDmode then MODE is the mode with which X will be used.
1441 For elements of equal cheapness, the most recent one
1442 goes in front, except that the first element in the list
1443 remains first unless a cheaper element is added. The order of
1444 pseudo-registers does not matter, as canon_reg will be called to
1445 find the cheapest when a register is retrieved from the table.
1447 The in_memory field in the hash table element is set to 0.
1448 The caller must set it nonzero if appropriate.
1450 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1451 and if insert_regs returns a nonzero value
1452 you must then recompute its hash code before calling here.
1454 If necessary, update table showing constant values of quantities. */
1456 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1458 static struct table_elt *
1459 insert (x, classp, hash, mode)
1461 register struct table_elt *classp;
1463 enum machine_mode mode;
1465 register struct table_elt *elt;
1467 /* If X is a register and we haven't made a quantity for it,
1468 something is wrong. */
1469 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1472 /* If X is a hard register, show it is being put in the table. */
1473 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1475 unsigned int regno = REGNO (x);
1476 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1479 for (i = regno; i < endregno; i++)
1480 SET_HARD_REG_BIT (hard_regs_in_table, i);
1483 /* If X is a label, show we recorded it. */
1484 if (GET_CODE (x) == LABEL_REF
1485 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1486 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1487 recorded_label_ref = 1;
1489 /* Put an element for X into the right hash bucket. */
1491 elt = free_element_chain;
1493 free_element_chain = elt->next_same_hash;
1497 elt = (struct table_elt *) oballoc (sizeof (struct table_elt));
1501 elt->cost = COST (x);
1502 elt->next_same_value = 0;
1503 elt->prev_same_value = 0;
1504 elt->next_same_hash = table[hash];
1505 elt->prev_same_hash = 0;
1506 elt->related_value = 0;
1509 elt->is_const = (CONSTANT_P (x)
1510 /* GNU C++ takes advantage of this for `this'
1511 (and other const values). */
1512 || (RTX_UNCHANGING_P (x)
1513 && GET_CODE (x) == REG
1514 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1515 || FIXED_BASE_PLUS_P (x));
1518 table[hash]->prev_same_hash = elt;
1521 /* Put it into the proper value-class. */
1524 classp = classp->first_same_value;
1525 if (CHEAPER (elt, classp))
1526 /* Insert at the head of the class */
1528 register struct table_elt *p;
1529 elt->next_same_value = classp;
1530 classp->prev_same_value = elt;
1531 elt->first_same_value = elt;
1533 for (p = classp; p; p = p->next_same_value)
1534 p->first_same_value = elt;
1538 /* Insert not at head of the class. */
1539 /* Put it after the last element cheaper than X. */
1540 register struct table_elt *p, *next;
1542 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1545 /* Put it after P and before NEXT. */
1546 elt->next_same_value = next;
1548 next->prev_same_value = elt;
1550 elt->prev_same_value = p;
1551 p->next_same_value = elt;
1552 elt->first_same_value = classp;
1556 elt->first_same_value = elt;
1558 /* If this is a constant being set equivalent to a register or a register
1559 being set equivalent to a constant, note the constant equivalence.
1561 If this is a constant, it cannot be equivalent to a different constant,
1562 and a constant is the only thing that can be cheaper than a register. So
1563 we know the register is the head of the class (before the constant was
1566 If this is a register that is not already known equivalent to a
1567 constant, we must check the entire class.
1569 If this is a register that is already known equivalent to an insn,
1570 update the qtys `const_insn' to show that `this_insn' is the latest
1571 insn making that quantity equivalent to the constant. */
1573 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1574 && GET_CODE (x) != REG)
1576 int exp_q = REG_QTY (REGNO (classp->exp));
1577 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1579 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1580 exp_ent->const_insn = this_insn;
1583 else if (GET_CODE (x) == REG
1585 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1588 register struct table_elt *p;
1590 for (p = classp; p != 0; p = p->next_same_value)
1592 if (p->is_const && GET_CODE (p->exp) != REG)
1594 int x_q = REG_QTY (REGNO (x));
1595 struct qty_table_elem *x_ent = &qty_table[x_q];
1598 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1599 x_ent->const_insn = this_insn;
1605 else if (GET_CODE (x) == REG
1606 && qty_table[REG_QTY (REGNO (x))].const_rtx
1607 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1608 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1610 /* If this is a constant with symbolic value,
1611 and it has a term with an explicit integer value,
1612 link it up with related expressions. */
1613 if (GET_CODE (x) == CONST)
1615 rtx subexp = get_related_value (x);
1617 struct table_elt *subelt, *subelt_prev;
1621 /* Get the integer-free subexpression in the hash table. */
1622 subhash = safe_hash (subexp, mode) & HASH_MASK;
1623 subelt = lookup (subexp, subhash, mode);
1625 subelt = insert (subexp, NULL_PTR, subhash, mode);
1626 /* Initialize SUBELT's circular chain if it has none. */
1627 if (subelt->related_value == 0)
1628 subelt->related_value = subelt;
1629 /* Find the element in the circular chain that precedes SUBELT. */
1630 subelt_prev = subelt;
1631 while (subelt_prev->related_value != subelt)
1632 subelt_prev = subelt_prev->related_value;
1633 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1634 This way the element that follows SUBELT is the oldest one. */
1635 elt->related_value = subelt_prev->related_value;
1636 subelt_prev->related_value = elt;
1643 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1644 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1645 the two classes equivalent.
1647 CLASS1 will be the surviving class; CLASS2 should not be used after this
1650 Any invalid entries in CLASS2 will not be copied. */
1653 merge_equiv_classes (class1, class2)
1654 struct table_elt *class1, *class2;
1656 struct table_elt *elt, *next, *new;
1658 /* Ensure we start with the head of the classes. */
1659 class1 = class1->first_same_value;
1660 class2 = class2->first_same_value;
1662 /* If they were already equal, forget it. */
1663 if (class1 == class2)
1666 for (elt = class2; elt; elt = next)
1670 enum machine_mode mode = elt->mode;
1672 next = elt->next_same_value;
1674 /* Remove old entry, make a new one in CLASS1's class.
1675 Don't do this for invalid entries as we cannot find their
1676 hash code (it also isn't necessary). */
1677 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1679 hash_arg_in_memory = 0;
1680 hash = HASH (exp, mode);
1682 if (GET_CODE (exp) == REG)
1683 delete_reg_equiv (REGNO (exp));
1685 remove_from_table (elt, hash);
1687 if (insert_regs (exp, class1, 0))
1689 rehash_using_reg (exp);
1690 hash = HASH (exp, mode);
1692 new = insert (exp, class1, hash, mode);
1693 new->in_memory = hash_arg_in_memory;
1699 /* Flush the entire hash table. */
1705 struct table_elt *p;
1707 for (i = 0; i < HASH_SIZE; i++)
1708 for (p = table[i]; p; p = table[i])
1710 /* Note that invalidate can remove elements
1711 after P in the current hash chain. */
1712 if (GET_CODE (p->exp) == REG)
1713 invalidate (p->exp, p->mode);
1715 remove_from_table (p, i);
1719 /* Remove from the hash table, or mark as invalid, all expressions whose
1720 values could be altered by storing in X. X is a register, a subreg, or
1721 a memory reference with nonvarying address (because, when a memory
1722 reference with a varying address is stored in, all memory references are
1723 removed by invalidate_memory so specific invalidation is superfluous).
1724 FULL_MODE, if not VOIDmode, indicates that this much should be
1725 invalidated instead of just the amount indicated by the mode of X. This
1726 is only used for bitfield stores into memory.
1728 A nonvarying address may be just a register or just a symbol reference,
1729 or it may be either of those plus a numeric offset. */
1732 invalidate (x, full_mode)
1734 enum machine_mode full_mode;
1737 register struct table_elt *p;
1739 switch (GET_CODE (x))
1743 /* If X is a register, dependencies on its contents are recorded
1744 through the qty number mechanism. Just change the qty number of
1745 the register, mark it as invalid for expressions that refer to it,
1746 and remove it itself. */
1747 unsigned int regno = REGNO (x);
1748 unsigned int hash = HASH (x, GET_MODE (x));
1750 /* Remove REGNO from any quantity list it might be on and indicate
1751 that its value might have changed. If it is a pseudo, remove its
1752 entry from the hash table.
1754 For a hard register, we do the first two actions above for any
1755 additional hard registers corresponding to X. Then, if any of these
1756 registers are in the table, we must remove any REG entries that
1757 overlap these registers. */
1759 delete_reg_equiv (regno);
1762 if (regno >= FIRST_PSEUDO_REGISTER)
1764 /* Because a register can be referenced in more than one mode,
1765 we might have to remove more than one table entry. */
1766 struct table_elt *elt;
1768 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1769 remove_from_table (elt, hash);
1773 HOST_WIDE_INT in_table
1774 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1775 unsigned int endregno
1776 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1777 unsigned int tregno, tendregno, rn;
1778 register struct table_elt *p, *next;
1780 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1782 for (rn = regno + 1; rn < endregno; rn++)
1784 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1785 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1786 delete_reg_equiv (rn);
1791 for (hash = 0; hash < HASH_SIZE; hash++)
1792 for (p = table[hash]; p; p = next)
1794 next = p->next_same_hash;
1796 if (GET_CODE (p->exp) != REG
1797 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1800 tregno = REGNO (p->exp);
1802 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1803 if (tendregno > regno && tregno < endregno)
1804 remove_from_table (p, hash);
1811 invalidate (SUBREG_REG (x), VOIDmode);
1815 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1816 invalidate (XVECEXP (x, 0, i), VOIDmode);
1820 /* This is part of a disjoint return value; extract the location in
1821 question ignoring the offset. */
1822 invalidate (XEXP (x, 0), VOIDmode);
1826 /* Remove all hash table elements that refer to overlapping pieces of
1828 if (full_mode == VOIDmode)
1829 full_mode = GET_MODE (x);
1831 for (i = 0; i < HASH_SIZE; i++)
1833 register struct table_elt *next;
1835 for (p = table[i]; p; p = next)
1837 next = p->next_same_hash;
1839 && (GET_CODE (p->exp) != MEM
1840 || true_dependence (x, full_mode, p->exp,
1842 remove_from_table (p, i);
1852 /* Remove all expressions that refer to register REGNO,
1853 since they are already invalid, and we are about to
1854 mark that register valid again and don't want the old
1855 expressions to reappear as valid. */
1858 remove_invalid_refs (regno)
1862 struct table_elt *p, *next;
1864 for (i = 0; i < HASH_SIZE; i++)
1865 for (p = table[i]; p; p = next)
1867 next = p->next_same_hash;
1868 if (GET_CODE (p->exp) != REG
1869 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1870 remove_from_table (p, i);
1874 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1876 remove_invalid_subreg_refs (regno, word, mode)
1879 enum machine_mode mode;
1882 struct table_elt *p, *next;
1883 unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1885 for (i = 0; i < HASH_SIZE; i++)
1886 for (p = table[i]; p; p = next)
1889 next = p->next_same_hash;
1892 if (GET_CODE (p->exp) != REG
1893 && (GET_CODE (exp) != SUBREG
1894 || GET_CODE (SUBREG_REG (exp)) != REG
1895 || REGNO (SUBREG_REG (exp)) != regno
1896 || (((SUBREG_WORD (exp)
1897 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1899 && SUBREG_WORD (exp) <= end))
1900 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1901 remove_from_table (p, i);
1905 /* Recompute the hash codes of any valid entries in the hash table that
1906 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1908 This is called when we make a jump equivalence. */
1911 rehash_using_reg (x)
1915 struct table_elt *p, *next;
1918 if (GET_CODE (x) == SUBREG)
1921 /* If X is not a register or if the register is known not to be in any
1922 valid entries in the table, we have no work to do. */
1924 if (GET_CODE (x) != REG
1925 || REG_IN_TABLE (REGNO (x)) < 0
1926 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1929 /* Scan all hash chains looking for valid entries that mention X.
1930 If we find one and it is in the wrong hash chain, move it. We can skip
1931 objects that are registers, since they are handled specially. */
1933 for (i = 0; i < HASH_SIZE; i++)
1934 for (p = table[i]; p; p = next)
1936 next = p->next_same_hash;
1937 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1938 && exp_equiv_p (p->exp, p->exp, 1, 0)
1939 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1941 if (p->next_same_hash)
1942 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1944 if (p->prev_same_hash)
1945 p->prev_same_hash->next_same_hash = p->next_same_hash;
1947 table[i] = p->next_same_hash;
1949 p->next_same_hash = table[hash];
1950 p->prev_same_hash = 0;
1952 table[hash]->prev_same_hash = p;
1958 /* Remove from the hash table any expression that is a call-clobbered
1959 register. Also update their TICK values. */
1962 invalidate_for_call ()
1964 unsigned int regno, endregno;
1967 struct table_elt *p, *next;
1970 /* Go through all the hard registers. For each that is clobbered in
1971 a CALL_INSN, remove the register from quantity chains and update
1972 reg_tick if defined. Also see if any of these registers is currently
1975 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1976 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1978 delete_reg_equiv (regno);
1979 if (REG_TICK (regno) >= 0)
1982 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1985 /* In the case where we have no call-clobbered hard registers in the
1986 table, we are done. Otherwise, scan the table and remove any
1987 entry that overlaps a call-clobbered register. */
1990 for (hash = 0; hash < HASH_SIZE; hash++)
1991 for (p = table[hash]; p; p = next)
1993 next = p->next_same_hash;
1995 if (GET_CODE (p->exp) != REG
1996 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1999 regno = REGNO (p->exp);
2000 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2002 for (i = regno; i < endregno; i++)
2003 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2005 remove_from_table (p, hash);
2011 /* Given an expression X of type CONST,
2012 and ELT which is its table entry (or 0 if it
2013 is not in the hash table),
2014 return an alternate expression for X as a register plus integer.
2015 If none can be found, return 0. */
2018 use_related_value (x, elt)
2020 struct table_elt *elt;
2022 register struct table_elt *relt = 0;
2023 register struct table_elt *p, *q;
2024 HOST_WIDE_INT offset;
2026 /* First, is there anything related known?
2027 If we have a table element, we can tell from that.
2028 Otherwise, must look it up. */
2030 if (elt != 0 && elt->related_value != 0)
2032 else if (elt == 0 && GET_CODE (x) == CONST)
2034 rtx subexp = get_related_value (x);
2036 relt = lookup (subexp,
2037 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2044 /* Search all related table entries for one that has an
2045 equivalent register. */
2050 /* This loop is strange in that it is executed in two different cases.
2051 The first is when X is already in the table. Then it is searching
2052 the RELATED_VALUE list of X's class (RELT). The second case is when
2053 X is not in the table. Then RELT points to a class for the related
2056 Ensure that, whatever case we are in, that we ignore classes that have
2057 the same value as X. */
2059 if (rtx_equal_p (x, p->exp))
2062 for (q = p->first_same_value; q; q = q->next_same_value)
2063 if (GET_CODE (q->exp) == REG)
2069 p = p->related_value;
2071 /* We went all the way around, so there is nothing to be found.
2072 Alternatively, perhaps RELT was in the table for some other reason
2073 and it has no related values recorded. */
2074 if (p == relt || p == 0)
2081 offset = (get_integer_term (x) - get_integer_term (p->exp));
2082 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2083 return plus_constant (q->exp, offset);
2086 /* Hash an rtx. We are careful to make sure the value is never negative.
2087 Equivalent registers hash identically.
2088 MODE is used in hashing for CONST_INTs only;
2089 otherwise the mode of X is used.
2091 Store 1 in do_not_record if any subexpression is volatile.
2093 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2094 which does not have the RTX_UNCHANGING_P bit set.
2096 Note that cse_insn knows that the hash code of a MEM expression
2097 is just (int) MEM plus the hash code of the address. */
2100 canon_hash (x, mode)
2102 enum machine_mode mode;
2105 register unsigned hash = 0;
2106 register enum rtx_code code;
2107 register const char *fmt;
2109 /* repeat is used to turn tail-recursion into iteration. */
2114 code = GET_CODE (x);
2119 unsigned int regno = REGNO (x);
2121 /* On some machines, we can't record any non-fixed hard register,
2122 because extending its life will cause reload problems. We
2123 consider ap, fp, and sp to be fixed for this purpose.
2125 We also consider CCmode registers to be fixed for this purpose;
2126 failure to do so leads to failure to simplify 0<100 type of
2129 On all machines, we can't record any global registers. */
2131 if (regno < FIRST_PSEUDO_REGISTER
2132 && (global_regs[regno]
2133 || (SMALL_REGISTER_CLASSES
2134 && ! fixed_regs[regno]
2135 && regno != FRAME_POINTER_REGNUM
2136 && regno != HARD_FRAME_POINTER_REGNUM
2137 && regno != ARG_POINTER_REGNUM
2138 && regno != STACK_POINTER_REGNUM
2139 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2145 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2149 /* We handle SUBREG of a REG specially because the underlying
2150 reg changes its hash value with every value change; we don't
2151 want to have to forget unrelated subregs when one subreg changes. */
2154 if (GET_CODE (SUBREG_REG (x)) == REG)
2156 hash += (((unsigned) SUBREG << 7)
2157 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2165 unsigned HOST_WIDE_INT tem = INTVAL (x);
2166 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2171 /* This is like the general case, except that it only counts
2172 the integers representing the constant. */
2173 hash += (unsigned) code + (unsigned) GET_MODE (x);
2174 if (GET_MODE (x) != VOIDmode)
2175 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2177 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2181 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2182 + (unsigned) CONST_DOUBLE_HIGH (x));
2185 /* Assume there is only one rtx object for any given label. */
2188 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2193 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2197 /* We don't record if marked volatile or if BLKmode since we don't
2198 know the size of the move. */
2199 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2204 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2206 hash_arg_in_memory = 1;
2208 /* Now that we have already found this special case,
2209 might as well speed it up as much as possible. */
2210 hash += (unsigned) MEM;
2221 case UNSPEC_VOLATILE:
2226 if (MEM_VOLATILE_P (x))
2237 i = GET_RTX_LENGTH (code) - 1;
2238 hash += (unsigned) code + (unsigned) GET_MODE (x);
2239 fmt = GET_RTX_FORMAT (code);
2244 rtx tem = XEXP (x, i);
2246 /* If we are about to do the last recursive call
2247 needed at this level, change it into iteration.
2248 This function is called enough to be worth it. */
2254 hash += canon_hash (tem, 0);
2256 else if (fmt[i] == 'E')
2257 for (j = 0; j < XVECLEN (x, i); j++)
2258 hash += canon_hash (XVECEXP (x, i, j), 0);
2259 else if (fmt[i] == 's')
2261 register const unsigned char *p =
2262 (const unsigned char *) XSTR (x, i);
2268 else if (fmt[i] == 'i')
2270 register unsigned tem = XINT (x, i);
2273 else if (fmt[i] == '0' || fmt[i] == 't')
2281 /* Like canon_hash but with no side effects. */
2286 enum machine_mode mode;
2288 int save_do_not_record = do_not_record;
2289 int save_hash_arg_in_memory = hash_arg_in_memory;
2290 unsigned hash = canon_hash (x, mode);
2291 hash_arg_in_memory = save_hash_arg_in_memory;
2292 do_not_record = save_do_not_record;
2296 /* Return 1 iff X and Y would canonicalize into the same thing,
2297 without actually constructing the canonicalization of either one.
2298 If VALIDATE is nonzero,
2299 we assume X is an expression being processed from the rtl
2300 and Y was found in the hash table. We check register refs
2301 in Y for being marked as valid.
2303 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2304 that is known to be in the register. Ordinarily, we don't allow them
2305 to match, because letting them match would cause unpredictable results
2306 in all the places that search a hash table chain for an equivalent
2307 for a given value. A possible equivalent that has different structure
2308 has its hash code computed from different data. Whether the hash code
2309 is the same as that of the given value is pure luck. */
2312 exp_equiv_p (x, y, validate, equal_values)
2318 register enum rtx_code code;
2319 register const char *fmt;
2321 /* Note: it is incorrect to assume an expression is equivalent to itself
2322 if VALIDATE is nonzero. */
2323 if (x == y && !validate)
2325 if (x == 0 || y == 0)
2328 code = GET_CODE (x);
2329 if (code != GET_CODE (y))
2334 /* If X is a constant and Y is a register or vice versa, they may be
2335 equivalent. We only have to validate if Y is a register. */
2336 if (CONSTANT_P (x) && GET_CODE (y) == REG
2337 && REGNO_QTY_VALID_P (REGNO (y)))
2339 int y_q = REG_QTY (REGNO (y));
2340 struct qty_table_elem *y_ent = &qty_table[y_q];
2342 if (GET_MODE (y) == y_ent->mode
2343 && rtx_equal_p (x, y_ent->const_rtx)
2344 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2348 if (CONSTANT_P (y) && code == REG
2349 && REGNO_QTY_VALID_P (REGNO (x)))
2351 int x_q = REG_QTY (REGNO (x));
2352 struct qty_table_elem *x_ent = &qty_table[x_q];
2354 if (GET_MODE (x) == x_ent->mode
2355 && rtx_equal_p (y, x_ent->const_rtx))
2362 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2363 if (GET_MODE (x) != GET_MODE (y))
2374 return XEXP (x, 0) == XEXP (y, 0);
2377 return XSTR (x, 0) == XSTR (y, 0);
2381 unsigned int regno = REGNO (y);
2382 unsigned int endregno
2383 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2384 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2387 /* If the quantities are not the same, the expressions are not
2388 equivalent. If there are and we are not to validate, they
2389 are equivalent. Otherwise, ensure all regs are up-to-date. */
2391 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2397 for (i = regno; i < endregno; i++)
2398 if (REG_IN_TABLE (i) != REG_TICK (i))
2404 /* For commutative operations, check both orders. */
2412 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2413 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2414 validate, equal_values))
2415 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2416 validate, equal_values)
2417 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2418 validate, equal_values)));
2424 /* Compare the elements. If any pair of corresponding elements
2425 fail to match, return 0 for the whole things. */
2427 fmt = GET_RTX_FORMAT (code);
2428 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2433 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2438 if (XVECLEN (x, i) != XVECLEN (y, i))
2440 for (j = 0; j < XVECLEN (x, i); j++)
2441 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2442 validate, equal_values))
2447 if (strcmp (XSTR (x, i), XSTR (y, i)))
2452 if (XINT (x, i) != XINT (y, i))
2457 if (XWINT (x, i) != XWINT (y, i))
2473 /* Return 1 if X has a value that can vary even between two
2474 executions of the program. 0 means X can be compared reliably
2475 against certain constants or near-constants. */
2478 cse_rtx_varies_p (x)
2481 /* We need not check for X and the equivalence class being of the same
2482 mode because if X is equivalent to a constant in some mode, it
2483 doesn't vary in any mode. */
2485 if (GET_CODE (x) == REG
2486 && REGNO_QTY_VALID_P (REGNO (x)))
2488 int x_q = REG_QTY (REGNO (x));
2489 struct qty_table_elem *x_ent = &qty_table[x_q];
2491 if (GET_MODE (x) == x_ent->mode
2492 && x_ent->const_rtx != NULL_RTX)
2496 if (GET_CODE (x) == PLUS
2497 && GET_CODE (XEXP (x, 1)) == CONST_INT
2498 && GET_CODE (XEXP (x, 0)) == REG
2499 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2501 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2502 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2504 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2505 && x0_ent->const_rtx != NULL_RTX)
2509 /* This can happen as the result of virtual register instantiation, if
2510 the initial constant is too large to be a valid address. This gives
2511 us a three instruction sequence, load large offset into a register,
2512 load fp minus a constant into a register, then a MEM which is the
2513 sum of the two `constant' registers. */
2514 if (GET_CODE (x) == PLUS
2515 && GET_CODE (XEXP (x, 0)) == REG
2516 && GET_CODE (XEXP (x, 1)) == REG
2517 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2518 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2520 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2521 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2522 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2523 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2525 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2526 && x0_ent->const_rtx != NULL_RTX
2527 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2528 && x1_ent->const_rtx != NULL_RTX)
2532 return rtx_varies_p (x);
2535 /* Canonicalize an expression:
2536 replace each register reference inside it
2537 with the "oldest" equivalent register.
2539 If INSN is non-zero and we are replacing a pseudo with a hard register
2540 or vice versa, validate_change is used to ensure that INSN remains valid
2541 after we make our substitution. The calls are made with IN_GROUP non-zero
2542 so apply_change_group must be called upon the outermost return from this
2543 function (unless INSN is zero). The result of apply_change_group can
2544 generally be discarded since the changes we are making are optional. */
2552 register enum rtx_code code;
2553 register const char *fmt;
2558 code = GET_CODE (x);
2576 register struct qty_table_elem *ent;
2578 /* Never replace a hard reg, because hard regs can appear
2579 in more than one machine mode, and we must preserve the mode
2580 of each occurrence. Also, some hard regs appear in
2581 MEMs that are shared and mustn't be altered. Don't try to
2582 replace any reg that maps to a reg of class NO_REGS. */
2583 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2584 || ! REGNO_QTY_VALID_P (REGNO (x)))
2587 q = REG_QTY (REGNO(x));
2588 ent = &qty_table[q];
2589 first = ent->first_reg;
2590 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2591 : REGNO_REG_CLASS (first) == NO_REGS ? x
2592 : gen_rtx_REG (ent->mode, first));
2599 fmt = GET_RTX_FORMAT (code);
2600 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2606 rtx new = canon_reg (XEXP (x, i), insn);
2609 /* If replacing pseudo with hard reg or vice versa, ensure the
2610 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2611 if (insn != 0 && new != 0
2612 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2613 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2614 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2615 || (insn_code = recog_memoized (insn)) < 0
2616 || insn_data[insn_code].n_dups > 0))
2617 validate_change (insn, &XEXP (x, i), new, 1);
2621 else if (fmt[i] == 'E')
2622 for (j = 0; j < XVECLEN (x, i); j++)
2623 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2629 /* LOC is a location within INSN that is an operand address (the contents of
2630 a MEM). Find the best equivalent address to use that is valid for this
2633 On most CISC machines, complicated address modes are costly, and rtx_cost
2634 is a good approximation for that cost. However, most RISC machines have
2635 only a few (usually only one) memory reference formats. If an address is
2636 valid at all, it is often just as cheap as any other address. Hence, for
2637 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2638 costs of various addresses. For two addresses of equal cost, choose the one
2639 with the highest `rtx_cost' value as that has the potential of eliminating
2640 the most insns. For equal costs, we choose the first in the equivalence
2641 class. Note that we ignore the fact that pseudo registers are cheaper
2642 than hard registers here because we would also prefer the pseudo registers.
2646 find_best_addr (insn, loc)
2650 struct table_elt *elt;
2653 struct table_elt *p;
2654 int found_better = 1;
2656 int save_do_not_record = do_not_record;
2657 int save_hash_arg_in_memory = hash_arg_in_memory;
2662 /* Do not try to replace constant addresses or addresses of local and
2663 argument slots. These MEM expressions are made only once and inserted
2664 in many instructions, as well as being used to control symbol table
2665 output. It is not safe to clobber them.
2667 There are some uncommon cases where the address is already in a register
2668 for some reason, but we cannot take advantage of that because we have
2669 no easy way to unshare the MEM. In addition, looking up all stack
2670 addresses is costly. */
2671 if ((GET_CODE (addr) == PLUS
2672 && GET_CODE (XEXP (addr, 0)) == REG
2673 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2674 && (regno = REGNO (XEXP (addr, 0)),
2675 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2676 || regno == ARG_POINTER_REGNUM))
2677 || (GET_CODE (addr) == REG
2678 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2679 || regno == HARD_FRAME_POINTER_REGNUM
2680 || regno == ARG_POINTER_REGNUM))
2681 || GET_CODE (addr) == ADDRESSOF
2682 || CONSTANT_ADDRESS_P (addr))
2685 /* If this address is not simply a register, try to fold it. This will
2686 sometimes simplify the expression. Many simplifications
2687 will not be valid, but some, usually applying the associative rule, will
2688 be valid and produce better code. */
2689 if (GET_CODE (addr) != REG)
2691 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2695 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2696 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2697 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2699 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2701 && validate_change (insn, loc, folded, 0))
2705 /* If this address is not in the hash table, we can't look for equivalences
2706 of the whole address. Also, ignore if volatile. */
2709 hash = HASH (addr, Pmode);
2710 addr_volatile = do_not_record;
2711 do_not_record = save_do_not_record;
2712 hash_arg_in_memory = save_hash_arg_in_memory;
2717 elt = lookup (addr, hash, Pmode);
2719 #ifndef ADDRESS_COST
2722 int our_cost = elt->cost;
2724 /* Find the lowest cost below ours that works. */
2725 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2726 if (elt->cost < our_cost
2727 && (GET_CODE (elt->exp) == REG
2728 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2729 && validate_change (insn, loc,
2730 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2737 /* We need to find the best (under the criteria documented above) entry
2738 in the class that is valid. We use the `flag' field to indicate
2739 choices that were invalid and iterate until we can't find a better
2740 one that hasn't already been tried. */
2742 for (p = elt->first_same_value; p; p = p->next_same_value)
2745 while (found_better)
2747 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2748 int best_rtx_cost = (elt->cost + 1) >> 1;
2749 struct table_elt *best_elt = elt;
2752 for (p = elt->first_same_value; p; p = p->next_same_value)
2755 if ((GET_CODE (p->exp) == REG
2756 || exp_equiv_p (p->exp, p->exp, 1, 0))
2757 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2758 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2759 && (p->cost + 1) >> 1 > best_rtx_cost)))
2762 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2763 best_rtx_cost = (p->cost + 1) >> 1;
2770 if (validate_change (insn, loc,
2771 canon_reg (copy_rtx (best_elt->exp),
2780 /* If the address is a binary operation with the first operand a register
2781 and the second a constant, do the same as above, but looking for
2782 equivalences of the register. Then try to simplify before checking for
2783 the best address to use. This catches a few cases: First is when we
2784 have REG+const and the register is another REG+const. We can often merge
2785 the constants and eliminate one insn and one register. It may also be
2786 that a machine has a cheap REG+REG+const. Finally, this improves the
2787 code on the Alpha for unaligned byte stores. */
2789 if (flag_expensive_optimizations
2790 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2791 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2792 && GET_CODE (XEXP (*loc, 0)) == REG
2793 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2795 rtx c = XEXP (*loc, 1);
2798 hash = HASH (XEXP (*loc, 0), Pmode);
2799 do_not_record = save_do_not_record;
2800 hash_arg_in_memory = save_hash_arg_in_memory;
2802 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2806 /* We need to find the best (under the criteria documented above) entry
2807 in the class that is valid. We use the `flag' field to indicate
2808 choices that were invalid and iterate until we can't find a better
2809 one that hasn't already been tried. */
2811 for (p = elt->first_same_value; p; p = p->next_same_value)
2814 while (found_better)
2816 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2817 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2818 struct table_elt *best_elt = elt;
2819 rtx best_rtx = *loc;
2822 /* This is at worst case an O(n^2) algorithm, so limit our search
2823 to the first 32 elements on the list. This avoids trouble
2824 compiling code with very long basic blocks that can easily
2825 call simplify_gen_binary so many times that we run out of
2829 for (p = elt->first_same_value, count = 0;
2831 p = p->next_same_value, count++)
2833 && (GET_CODE (p->exp) == REG
2834 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2836 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2839 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2840 || (CSE_ADDRESS_COST (new) == best_addr_cost
2841 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2844 best_addr_cost = CSE_ADDRESS_COST (new);
2845 best_rtx_cost = (COST (new) + 1) >> 1;
2853 if (validate_change (insn, loc,
2854 canon_reg (copy_rtx (best_rtx),
2865 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2866 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2867 what values are being compared.
2869 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2870 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2871 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2872 compared to produce cc0.
2874 The return value is the comparison operator and is either the code of
2875 A or the code corresponding to the inverse of the comparison. */
2877 static enum rtx_code
2878 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2881 enum machine_mode *pmode1, *pmode2;
2885 arg1 = *parg1, arg2 = *parg2;
2887 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2889 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2891 /* Set non-zero when we find something of interest. */
2893 int reverse_code = 0;
2894 struct table_elt *p = 0;
2896 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2897 On machines with CC0, this is the only case that can occur, since
2898 fold_rtx will return the COMPARE or item being compared with zero
2901 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2904 /* If ARG1 is a comparison operator and CODE is testing for
2905 STORE_FLAG_VALUE, get the inner arguments. */
2907 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2910 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2911 && code == LT && STORE_FLAG_VALUE == -1)
2912 #ifdef FLOAT_STORE_FLAG_VALUE
2913 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2914 && (REAL_VALUE_NEGATIVE
2915 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2920 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2921 && code == GE && STORE_FLAG_VALUE == -1)
2922 #ifdef FLOAT_STORE_FLAG_VALUE
2923 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2924 && (REAL_VALUE_NEGATIVE
2925 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2928 x = arg1, reverse_code = 1;
2931 /* ??? We could also check for
2933 (ne (and (eq (...) (const_int 1))) (const_int 0))
2935 and related forms, but let's wait until we see them occurring. */
2938 /* Look up ARG1 in the hash table and see if it has an equivalence
2939 that lets us see what is being compared. */
2940 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
2942 if (p) p = p->first_same_value;
2944 for (; p; p = p->next_same_value)
2946 enum machine_mode inner_mode = GET_MODE (p->exp);
2948 /* If the entry isn't valid, skip it. */
2949 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2952 if (GET_CODE (p->exp) == COMPARE
2953 /* Another possibility is that this machine has a compare insn
2954 that includes the comparison code. In that case, ARG1 would
2955 be equivalent to a comparison operation that would set ARG1 to
2956 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2957 ORIG_CODE is the actual comparison being done; if it is an EQ,
2958 we must reverse ORIG_CODE. On machine with a negative value
2959 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2962 && GET_MODE_CLASS (inner_mode) == MODE_INT
2963 && (GET_MODE_BITSIZE (inner_mode)
2964 <= HOST_BITS_PER_WIDE_INT)
2965 && (STORE_FLAG_VALUE
2966 & ((HOST_WIDE_INT) 1
2967 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2968 #ifdef FLOAT_STORE_FLAG_VALUE
2970 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2971 && (REAL_VALUE_NEGATIVE
2972 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2975 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2980 else if ((code == EQ
2982 && GET_MODE_CLASS (inner_mode) == MODE_INT
2983 && (GET_MODE_BITSIZE (inner_mode)
2984 <= HOST_BITS_PER_WIDE_INT)
2985 && (STORE_FLAG_VALUE
2986 & ((HOST_WIDE_INT) 1
2987 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2988 #ifdef FLOAT_STORE_FLAG_VALUE
2990 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2991 && (REAL_VALUE_NEGATIVE
2992 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2995 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3002 /* If this is fp + constant, the equivalent is a better operand since
3003 it may let us predict the value of the comparison. */
3004 else if (NONZERO_BASE_PLUS_P (p->exp))
3011 /* If we didn't find a useful equivalence for ARG1, we are done.
3012 Otherwise, set up for the next iteration. */
3016 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3017 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3018 code = GET_CODE (x);
3021 code = reverse_condition (code);
3024 /* Return our results. Return the modes from before fold_rtx
3025 because fold_rtx might produce const_int, and then it's too late. */
3026 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3027 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3032 /* If X is a nontrivial arithmetic operation on an argument
3033 for which a constant value can be determined, return
3034 the result of operating on that value, as a constant.
3035 Otherwise, return X, possibly with one or more operands
3036 modified by recursive calls to this function.
3038 If X is a register whose contents are known, we do NOT
3039 return those contents here. equiv_constant is called to
3042 INSN is the insn that we may be modifying. If it is 0, make a copy
3043 of X before modifying it. */
3050 register enum rtx_code code;
3051 register enum machine_mode mode;
3052 register const char *fmt;
3058 /* Folded equivalents of first two operands of X. */
3062 /* Constant equivalents of first three operands of X;
3063 0 when no such equivalent is known. */
3068 /* The mode of the first operand of X. We need this for sign and zero
3070 enum machine_mode mode_arg0;
3075 mode = GET_MODE (x);
3076 code = GET_CODE (x);
3085 /* No use simplifying an EXPR_LIST
3086 since they are used only for lists of args
3087 in a function call's REG_EQUAL note. */
3089 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3090 want to (e.g.,) make (addressof (const_int 0)) just because
3091 the location is known to be zero. */
3097 return prev_insn_cc0;
3101 /* If the next insn is a CODE_LABEL followed by a jump table,
3102 PC's value is a LABEL_REF pointing to that label. That
3103 lets us fold switch statements on the Vax. */
3104 if (insn && GET_CODE (insn) == JUMP_INSN)
3106 rtx next = next_nonnote_insn (insn);
3108 if (next && GET_CODE (next) == CODE_LABEL
3109 && NEXT_INSN (next) != 0
3110 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3111 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3112 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3113 return gen_rtx_LABEL_REF (Pmode, next);
3118 /* See if we previously assigned a constant value to this SUBREG. */
3119 if ((new = lookup_as_function (x, CONST_INT)) != 0
3120 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3123 /* If this is a paradoxical SUBREG, we have no idea what value the
3124 extra bits would have. However, if the operand is equivalent
3125 to a SUBREG whose operand is the same as our mode, and all the
3126 modes are within a word, we can just use the inner operand
3127 because these SUBREGs just say how to treat the register.
3129 Similarly if we find an integer constant. */
3131 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3133 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3134 struct table_elt *elt;
3136 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3137 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3138 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3140 for (elt = elt->first_same_value;
3141 elt; elt = elt->next_same_value)
3143 if (CONSTANT_P (elt->exp)
3144 && GET_MODE (elt->exp) == VOIDmode)
3147 if (GET_CODE (elt->exp) == SUBREG
3148 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3149 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3150 return copy_rtx (SUBREG_REG (elt->exp));
3156 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3157 We might be able to if the SUBREG is extracting a single word in an
3158 integral mode or extracting the low part. */
3160 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3161 const_arg0 = equiv_constant (folded_arg0);
3163 folded_arg0 = const_arg0;
3165 if (folded_arg0 != SUBREG_REG (x))
3169 if (GET_MODE_CLASS (mode) == MODE_INT
3170 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3171 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3172 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3173 GET_MODE (SUBREG_REG (x)));
3174 if (new == 0 && subreg_lowpart_p (x))
3175 new = gen_lowpart_if_possible (mode, folded_arg0);
3180 /* If this is a narrowing SUBREG and our operand is a REG, see if
3181 we can find an equivalence for REG that is an arithmetic operation
3182 in a wider mode where both operands are paradoxical SUBREGs
3183 from objects of our result mode. In that case, we couldn't report
3184 an equivalent value for that operation, since we don't know what the
3185 extra bits will be. But we can find an equivalence for this SUBREG
3186 by folding that operation is the narrow mode. This allows us to
3187 fold arithmetic in narrow modes when the machine only supports
3188 word-sized arithmetic.
3190 Also look for a case where we have a SUBREG whose operand is the
3191 same as our result. If both modes are smaller than a word, we
3192 are simply interpreting a register in different modes and we
3193 can use the inner value. */
3195 if (GET_CODE (folded_arg0) == REG
3196 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3197 && subreg_lowpart_p (x))
3199 struct table_elt *elt;
3201 /* We can use HASH here since we know that canon_hash won't be
3203 elt = lookup (folded_arg0,
3204 HASH (folded_arg0, GET_MODE (folded_arg0)),
3205 GET_MODE (folded_arg0));
3208 elt = elt->first_same_value;
3210 for (; elt; elt = elt->next_same_value)
3212 enum rtx_code eltcode = GET_CODE (elt->exp);
3214 /* Just check for unary and binary operations. */
3215 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3216 && GET_CODE (elt->exp) != SIGN_EXTEND
3217 && GET_CODE (elt->exp) != ZERO_EXTEND
3218 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3219 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3221 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3223 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3224 op0 = fold_rtx (op0, NULL_RTX);
3226 op0 = equiv_constant (op0);
3228 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3231 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3232 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3233 && eltcode != DIV && eltcode != MOD
3234 && eltcode != UDIV && eltcode != UMOD
3235 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3236 && eltcode != ROTATE && eltcode != ROTATERT
3237 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3238 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3240 || CONSTANT_P (XEXP (elt->exp, 0)))
3241 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3242 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3244 || CONSTANT_P (XEXP (elt->exp, 1))))
3246 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3247 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3249 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3250 op0 = fold_rtx (op0, NULL_RTX);
3253 op0 = equiv_constant (op0);
3255 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3256 op1 = fold_rtx (op1, NULL_RTX);
3259 op1 = equiv_constant (op1);
3261 /* If we are looking for the low SImode part of
3262 (ashift:DI c (const_int 32)), it doesn't work
3263 to compute that in SImode, because a 32-bit shift
3264 in SImode is unpredictable. We know the value is 0. */
3266 && GET_CODE (elt->exp) == ASHIFT
3267 && GET_CODE (op1) == CONST_INT
3268 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3270 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3272 /* If the count fits in the inner mode's width,
3273 but exceeds the outer mode's width,
3274 the value will get truncated to 0
3278 /* If the count exceeds even the inner mode's width,
3279 don't fold this expression. */
3282 else if (op0 && op1)
3283 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3287 else if (GET_CODE (elt->exp) == SUBREG
3288 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3289 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3291 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3292 new = copy_rtx (SUBREG_REG (elt->exp));
3303 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3304 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3305 new = lookup_as_function (XEXP (x, 0), code);
3307 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3311 /* If we are not actually processing an insn, don't try to find the
3312 best address. Not only don't we care, but we could modify the
3313 MEM in an invalid way since we have no insn to validate against. */
3315 find_best_addr (insn, &XEXP (x, 0));
3318 /* Even if we don't fold in the insn itself,
3319 we can safely do so here, in hopes of getting a constant. */
3320 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3322 HOST_WIDE_INT offset = 0;
3324 if (GET_CODE (addr) == REG
3325 && REGNO_QTY_VALID_P (REGNO (addr)))
3327 int addr_q = REG_QTY (REGNO (addr));
3328 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3330 if (GET_MODE (addr) == addr_ent->mode
3331 && addr_ent->const_rtx != NULL_RTX)
3332 addr = addr_ent->const_rtx;
3335 /* If address is constant, split it into a base and integer offset. */
3336 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3338 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3339 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3341 base = XEXP (XEXP (addr, 0), 0);
3342 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3344 else if (GET_CODE (addr) == LO_SUM
3345 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3346 base = XEXP (addr, 1);
3347 else if (GET_CODE (addr) == ADDRESSOF)
3348 return change_address (x, VOIDmode, addr);
3350 /* If this is a constant pool reference, we can fold it into its
3351 constant to allow better value tracking. */
3352 if (base && GET_CODE (base) == SYMBOL_REF
3353 && CONSTANT_POOL_ADDRESS_P (base))
3355 rtx constant = get_pool_constant (base);
3356 enum machine_mode const_mode = get_pool_mode (base);
3359 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3360 constant_pool_entries_cost = COST (constant);
3362 /* If we are loading the full constant, we have an equivalence. */
3363 if (offset == 0 && mode == const_mode)
3366 /* If this actually isn't a constant (weird!), we can't do
3367 anything. Otherwise, handle the two most common cases:
3368 extracting a word from a multi-word constant, and extracting
3369 the low-order bits. Other cases don't seem common enough to
3371 if (! CONSTANT_P (constant))
3374 if (GET_MODE_CLASS (mode) == MODE_INT
3375 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3376 && offset % UNITS_PER_WORD == 0
3377 && (new = operand_subword (constant,
3378 offset / UNITS_PER_WORD,
3379 0, const_mode)) != 0)
3382 if (((BYTES_BIG_ENDIAN
3383 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3384 || (! BYTES_BIG_ENDIAN && offset == 0))
3385 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3389 /* If this is a reference to a label at a known position in a jump
3390 table, we also know its value. */
3391 if (base && GET_CODE (base) == LABEL_REF)
3393 rtx label = XEXP (base, 0);
3394 rtx table_insn = NEXT_INSN (label);
3396 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3397 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3399 rtx table = PATTERN (table_insn);
3402 && (offset / GET_MODE_SIZE (GET_MODE (table))
3403 < XVECLEN (table, 0)))
3404 return XVECEXP (table, 0,
3405 offset / GET_MODE_SIZE (GET_MODE (table)));
3407 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3408 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3410 rtx table = PATTERN (table_insn);
3413 && (offset / GET_MODE_SIZE (GET_MODE (table))
3414 < XVECLEN (table, 1)))
3416 offset /= GET_MODE_SIZE (GET_MODE (table));
3417 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3420 if (GET_MODE (table) != Pmode)
3421 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3423 /* Indicate this is a constant. This isn't a
3424 valid form of CONST, but it will only be used
3425 to fold the next insns and then discarded, so
3428 Note this expression must be explicitly discarded,
3429 by cse_insn, else it may end up in a REG_EQUAL note
3430 and "escape" to cause problems elsewhere. */
3431 return gen_rtx_CONST (GET_MODE (new), new);
3440 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3441 validate_change (insn, &XVECEXP (x, 3, i),
3442 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3452 mode_arg0 = VOIDmode;
3454 /* Try folding our operands.
3455 Then see which ones have constant values known. */
3457 fmt = GET_RTX_FORMAT (code);
3458 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3461 rtx arg = XEXP (x, i);
3462 rtx folded_arg = arg, const_arg = 0;
3463 enum machine_mode mode_arg = GET_MODE (arg);
3464 rtx cheap_arg, expensive_arg;
3465 rtx replacements[2];
3468 /* Most arguments are cheap, so handle them specially. */
3469 switch (GET_CODE (arg))
3472 /* This is the same as calling equiv_constant; it is duplicated
3474 if (REGNO_QTY_VALID_P (REGNO (arg)))
3476 int arg_q = REG_QTY (REGNO (arg));
3477 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3479 if (arg_ent->const_rtx != NULL_RTX
3480 && GET_CODE (arg_ent->const_rtx) != REG
3481 && GET_CODE (arg_ent->const_rtx) != PLUS)
3483 = gen_lowpart_if_possible (GET_MODE (arg),
3484 arg_ent->const_rtx);
3498 folded_arg = prev_insn_cc0;
3499 mode_arg = prev_insn_cc0_mode;
3500 const_arg = equiv_constant (folded_arg);
3505 folded_arg = fold_rtx (arg, insn);
3506 const_arg = equiv_constant (folded_arg);
3509 /* For the first three operands, see if the operand
3510 is constant or equivalent to a constant. */
3514 folded_arg0 = folded_arg;
3515 const_arg0 = const_arg;
3516 mode_arg0 = mode_arg;
3519 folded_arg1 = folded_arg;
3520 const_arg1 = const_arg;
3523 const_arg2 = const_arg;
3527 /* Pick the least expensive of the folded argument and an
3528 equivalent constant argument. */
3529 if (const_arg == 0 || const_arg == folded_arg
3530 || COST (const_arg) > COST (folded_arg))
3531 cheap_arg = folded_arg, expensive_arg = const_arg;
3533 cheap_arg = const_arg, expensive_arg = folded_arg;
3535 /* Try to replace the operand with the cheapest of the two
3536 possibilities. If it doesn't work and this is either of the first
3537 two operands of a commutative operation, try swapping them.
3538 If THAT fails, try the more expensive, provided it is cheaper
3539 than what is already there. */
3541 if (cheap_arg == XEXP (x, i))
3544 if (insn == 0 && ! copied)
3550 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3552 j < 2 && replacements[j]
3553 && COST (replacements[j]) < COST (XEXP (x, i));
3556 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3559 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3561 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3562 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3564 if (apply_change_group ())
3566 /* Swap them back to be invalid so that this loop can
3567 continue and flag them to be swapped back later. */
3570 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3582 /* Don't try to fold inside of a vector of expressions.
3583 Doing nothing is harmless. */
3587 /* If a commutative operation, place a constant integer as the second
3588 operand unless the first operand is also a constant integer. Otherwise,
3589 place any constant second unless the first operand is also a constant. */
3591 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3593 if (must_swap || (const_arg0
3595 || (GET_CODE (const_arg0) == CONST_INT
3596 && GET_CODE (const_arg1) != CONST_INT))))
3598 register rtx tem = XEXP (x, 0);
3600 if (insn == 0 && ! copied)
3606 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3607 validate_change (insn, &XEXP (x, 1), tem, 1);
3608 if (apply_change_group ())
3610 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3611 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3616 /* If X is an arithmetic operation, see if we can simplify it. */
3618 switch (GET_RTX_CLASS (code))
3624 /* We can't simplify extension ops unless we know the
3626 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3627 && mode_arg0 == VOIDmode)
3630 /* If we had a CONST, strip it off and put it back later if we
3632 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3633 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3635 new = simplify_unary_operation (code, mode,
3636 const_arg0 ? const_arg0 : folded_arg0,
3638 if (new != 0 && is_const)
3639 new = gen_rtx_CONST (mode, new);
3644 /* See what items are actually being compared and set FOLDED_ARG[01]
3645 to those values and CODE to the actual comparison code. If any are
3646 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3647 do anything if both operands are already known to be constant. */
3649 if (const_arg0 == 0 || const_arg1 == 0)
3651 struct table_elt *p0, *p1;
3652 rtx true = const_true_rtx, false = const0_rtx;
3653 enum machine_mode mode_arg1;
3655 #ifdef FLOAT_STORE_FLAG_VALUE
3656 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3658 true = (CONST_DOUBLE_FROM_REAL_VALUE
3659 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3660 false = CONST0_RTX (mode);
3664 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3665 &mode_arg0, &mode_arg1);
3666 const_arg0 = equiv_constant (folded_arg0);
3667 const_arg1 = equiv_constant (folded_arg1);
3669 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3670 what kinds of things are being compared, so we can't do
3671 anything with this comparison. */
3673 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3676 /* If we do not now have two constants being compared, see
3677 if we can nevertheless deduce some things about the
3679 if (const_arg0 == 0 || const_arg1 == 0)
3681 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3682 non-explicit constant? These aren't zero, but we
3683 don't know their sign. */
3684 if (const_arg1 == const0_rtx
3685 && (NONZERO_BASE_PLUS_P (folded_arg0)
3686 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3688 || GET_CODE (folded_arg0) == SYMBOL_REF
3690 || GET_CODE (folded_arg0) == LABEL_REF
3691 || GET_CODE (folded_arg0) == CONST))
3695 else if (code == NE)
3699 /* See if the two operands are the same. We don't do this
3700 for IEEE floating-point since we can't assume x == x
3701 since x might be a NaN. */
3703 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3704 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3705 && (folded_arg0 == folded_arg1
3706 || (GET_CODE (folded_arg0) == REG
3707 && GET_CODE (folded_arg1) == REG
3708 && (REG_QTY (REGNO (folded_arg0))
3709 == REG_QTY (REGNO (folded_arg1))))
3710 || ((p0 = lookup (folded_arg0,
3711 (safe_hash (folded_arg0, mode_arg0)
3712 & HASH_MASK), mode_arg0))
3713 && (p1 = lookup (folded_arg1,
3714 (safe_hash (folded_arg1, mode_arg0)
3715 & HASH_MASK), mode_arg0))
3716 && p0->first_same_value == p1->first_same_value)))
3717 return ((code == EQ || code == LE || code == GE
3718 || code == LEU || code == GEU)
3721 /* If FOLDED_ARG0 is a register, see if the comparison we are
3722 doing now is either the same as we did before or the reverse
3723 (we only check the reverse if not floating-point). */
3724 else if (GET_CODE (folded_arg0) == REG)
3726 int qty = REG_QTY (REGNO (folded_arg0));
3728 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3730 struct qty_table_elem *ent = &qty_table[qty];
3732 if ((comparison_dominates_p (ent->comparison_code, code)
3733 || (! FLOAT_MODE_P (mode_arg0)
3734 && comparison_dominates_p (ent->comparison_code,
3735 reverse_condition (code))))
3736 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3738 && rtx_equal_p (ent->comparison_const,
3740 || (GET_CODE (folded_arg1) == REG
3741 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3742 return (comparison_dominates_p (ent->comparison_code, code)
3749 /* If we are comparing against zero, see if the first operand is
3750 equivalent to an IOR with a constant. If so, we may be able to
3751 determine the result of this comparison. */
3753 if (const_arg1 == const0_rtx)
3755 rtx y = lookup_as_function (folded_arg0, IOR);
3759 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3760 && GET_CODE (inner_const) == CONST_INT
3761 && INTVAL (inner_const) != 0)
3763 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3764 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3765 && (INTVAL (inner_const)
3766 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3767 rtx true = const_true_rtx, false = const0_rtx;
3769 #ifdef FLOAT_STORE_FLAG_VALUE
3770 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3772 true = (CONST_DOUBLE_FROM_REAL_VALUE
3773 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3774 false = CONST0_RTX (mode);
3798 new = simplify_relational_operation (code, mode_arg0,
3799 const_arg0 ? const_arg0 : folded_arg0,
3800 const_arg1 ? const_arg1 : folded_arg1);
3801 #ifdef FLOAT_STORE_FLAG_VALUE
3802 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3804 if (new == const0_rtx)
3805 new = CONST0_RTX (mode);
3807 new = (CONST_DOUBLE_FROM_REAL_VALUE
3808 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3818 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3819 with that LABEL_REF as its second operand. If so, the result is
3820 the first operand of that MINUS. This handles switches with an
3821 ADDR_DIFF_VEC table. */
3822 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3825 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3826 : lookup_as_function (folded_arg0, MINUS);
3828 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3829 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3832 /* Now try for a CONST of a MINUS like the above. */
3833 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3834 : lookup_as_function (folded_arg0, CONST))) != 0
3835 && GET_CODE (XEXP (y, 0)) == MINUS
3836 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3837 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
3838 return XEXP (XEXP (y, 0), 0);
3841 /* Likewise if the operands are in the other order. */
3842 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3845 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3846 : lookup_as_function (folded_arg1, MINUS);
3848 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3849 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3852 /* Now try for a CONST of a MINUS like the above. */
3853 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3854 : lookup_as_function (folded_arg1, CONST))) != 0
3855 && GET_CODE (XEXP (y, 0)) == MINUS
3856 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3857 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
3858 return XEXP (XEXP (y, 0), 0);
3861 /* If second operand is a register equivalent to a negative
3862 CONST_INT, see if we can find a register equivalent to the
3863 positive constant. Make a MINUS if so. Don't do this for
3864 a non-negative constant since we might then alternate between
3865 chosing positive and negative constants. Having the positive
3866 constant previously-used is the more common case. Be sure
3867 the resulting constant is non-negative; if const_arg1 were
3868 the smallest negative number this would overflow: depending
3869 on the mode, this would either just be the same value (and
3870 hence not save anything) or be incorrect. */
3871 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3872 && INTVAL (const_arg1) < 0
3873 /* This used to test
3875 - INTVAL (const_arg1) >= 0
3877 But The Sun V5.0 compilers mis-compiled that test. So
3878 instead we test for the problematic value in a more direct
3879 manner and hope the Sun compilers get it correct. */
3880 && INTVAL (const_arg1) !=
3881 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3882 && GET_CODE (folded_arg1) == REG)
3884 rtx new_const = GEN_INT (- INTVAL (const_arg1));
3886 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
3890 for (p = p->first_same_value; p; p = p->next_same_value)
3891 if (GET_CODE (p->exp) == REG)
3892 return simplify_gen_binary (MINUS, mode, folded_arg0,
3893 canon_reg (p->exp, NULL_RTX));
3898 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3899 If so, produce (PLUS Z C2-C). */
3900 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3902 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3903 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3904 return fold_rtx (plus_constant (copy_rtx (y),
3905 -INTVAL (const_arg1)),
3909 /* ... fall through ... */
3912 case SMIN: case SMAX: case UMIN: case UMAX:
3913 case IOR: case AND: case XOR:
3914 case MULT: case DIV: case UDIV:
3915 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3916 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3917 is known to be of similar form, we may be able to replace the
3918 operation with a combined operation. This may eliminate the
3919 intermediate operation if every use is simplified in this way.
3920 Note that the similar optimization done by combine.c only works
3921 if the intermediate operation's result has only one reference. */
3923 if (GET_CODE (folded_arg0) == REG
3924 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3927 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3928 rtx y = lookup_as_function (folded_arg0, code);
3930 enum rtx_code associate_code;
3934 || 0 == (inner_const
3935 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
3936 || GET_CODE (inner_const) != CONST_INT
3937 /* If we have compiled a statement like
3938 "if (x == (x & mask1))", and now are looking at
3939 "x & mask2", we will have a case where the first operand
3940 of Y is the same as our first operand. Unless we detect
3941 this case, an infinite loop will result. */
3942 || XEXP (y, 0) == folded_arg0)
3945 /* Don't associate these operations if they are a PLUS with the
3946 same constant and it is a power of two. These might be doable
3947 with a pre- or post-increment. Similarly for two subtracts of
3948 identical powers of two with post decrement. */
3950 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
3951 && ((HAVE_PRE_INCREMENT
3952 && exact_log2 (INTVAL (const_arg1)) >= 0)
3953 || (HAVE_POST_INCREMENT
3954 && exact_log2 (INTVAL (const_arg1)) >= 0)
3955 || (HAVE_PRE_DECREMENT
3956 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3957 || (HAVE_POST_DECREMENT
3958 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3961 /* Compute the code used to compose the constants. For example,
3962 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
3965 = (code == MULT || code == DIV || code == UDIV ? MULT
3966 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
3968 new_const = simplify_binary_operation (associate_code, mode,
3969 const_arg1, inner_const);
3974 /* If we are associating shift operations, don't let this
3975 produce a shift of the size of the object or larger.
3976 This could occur when we follow a sign-extend by a right
3977 shift on a machine that does a sign-extend as a pair
3980 if (is_shift && GET_CODE (new_const) == CONST_INT
3981 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3983 /* As an exception, we can turn an ASHIFTRT of this
3984 form into a shift of the number of bits - 1. */
3985 if (code == ASHIFTRT)
3986 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3991 y = copy_rtx (XEXP (y, 0));
3993 /* If Y contains our first operand (the most common way this
3994 can happen is if Y is a MEM), we would do into an infinite
3995 loop if we tried to fold it. So don't in that case. */
3997 if (! reg_mentioned_p (folded_arg0, y))
3998 y = fold_rtx (y, insn);
4000 return simplify_gen_binary (code, mode, y, new_const);
4008 new = simplify_binary_operation (code, mode,
4009 const_arg0 ? const_arg0 : folded_arg0,
4010 const_arg1 ? const_arg1 : folded_arg1);
4014 /* (lo_sum (high X) X) is simply X. */
4015 if (code == LO_SUM && const_arg0 != 0
4016 && GET_CODE (const_arg0) == HIGH
4017 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4023 new = simplify_ternary_operation (code, mode, mode_arg0,
4024 const_arg0 ? const_arg0 : folded_arg0,
4025 const_arg1 ? const_arg1 : folded_arg1,
4026 const_arg2 ? const_arg2 : XEXP (x, 2));
4030 /* Always eliminate CONSTANT_P_RTX at this stage. */
4031 if (code == CONSTANT_P_RTX)
4032 return (const_arg0 ? const1_rtx : const0_rtx);
4036 return new ? new : x;
4039 /* Return a constant value currently equivalent to X.
4040 Return 0 if we don't know one. */
4046 if (GET_CODE (x) == REG
4047 && REGNO_QTY_VALID_P (REGNO (x)))
4049 int x_q = REG_QTY (REGNO (x));
4050 struct qty_table_elem *x_ent = &qty_table[x_q];
4052 if (x_ent->const_rtx)
4053 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4056 if (x == 0 || CONSTANT_P (x))
4059 /* If X is a MEM, try to fold it outside the context of any insn to see if
4060 it might be equivalent to a constant. That handles the case where it
4061 is a constant-pool reference. Then try to look it up in the hash table
4062 in case it is something whose value we have seen before. */
4064 if (GET_CODE (x) == MEM)
4066 struct table_elt *elt;
4068 x = fold_rtx (x, NULL_RTX);
4072 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4076 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4077 if (elt->is_const && CONSTANT_P (elt->exp))
4084 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4085 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4086 least-significant part of X.
4087 MODE specifies how big a part of X to return.
4089 If the requested operation cannot be done, 0 is returned.
4091 This is similar to gen_lowpart in emit-rtl.c. */
4094 gen_lowpart_if_possible (mode, x)
4095 enum machine_mode mode;
4098 rtx result = gen_lowpart_common (mode, x);
4102 else if (GET_CODE (x) == MEM)
4104 /* This is the only other case we handle. */
4105 register int offset = 0;
4108 if (WORDS_BIG_ENDIAN)
4109 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4110 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4111 if (BYTES_BIG_ENDIAN)
4112 /* Adjust the address so that the address-after-the-data is
4114 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4115 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4116 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4117 if (! memory_address_p (mode, XEXP (new, 0)))
4119 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4120 MEM_COPY_ATTRIBUTES (new, x);
4127 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4128 branch. It will be zero if not.
4130 In certain cases, this can cause us to add an equivalence. For example,
4131 if we are following the taken case of
4133 we can add the fact that `i' and '2' are now equivalent.
4135 In any case, we can record that this comparison was passed. If the same
4136 comparison is seen later, we will know its value. */
4139 record_jump_equiv (insn, taken)
4143 int cond_known_true;
4145 enum machine_mode mode, mode0, mode1;
4146 int reversed_nonequality = 0;
4149 /* Ensure this is the right kind of insn. */
4150 if (! condjump_p (insn) || simplejump_p (insn))
4153 /* See if this jump condition is known true or false. */
4155 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4157 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4159 /* Get the type of comparison being done and the operands being compared.
4160 If we had to reverse a non-equality condition, record that fact so we
4161 know that it isn't valid for floating-point. */
4162 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4163 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4164 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4166 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4167 if (! cond_known_true)
4169 reversed_nonequality = (code != EQ && code != NE);
4170 code = reverse_condition (code);
4172 /* Don't remember if we can't find the inverse. */
4173 if (code == UNKNOWN)
4177 /* The mode is the mode of the non-constant. */
4179 if (mode1 != VOIDmode)
4182 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4185 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4186 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4187 Make any useful entries we can with that information. Called from
4188 above function and called recursively. */
4191 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4193 enum machine_mode mode;
4195 int reversed_nonequality;
4197 unsigned op0_hash, op1_hash;
4198 int op0_in_memory, op1_in_memory;
4199 struct table_elt *op0_elt, *op1_elt;
4201 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4202 we know that they are also equal in the smaller mode (this is also
4203 true for all smaller modes whether or not there is a SUBREG, but
4204 is not worth testing for with no SUBREG). */
4206 /* Note that GET_MODE (op0) may not equal MODE. */
4207 if (code == EQ && GET_CODE (op0) == SUBREG
4208 && (GET_MODE_SIZE (GET_MODE (op0))
4209 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4211 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4212 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4214 record_jump_cond (code, mode, SUBREG_REG (op0),
4215 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4216 reversed_nonequality);
4219 if (code == EQ && GET_CODE (op1) == SUBREG
4220 && (GET_MODE_SIZE (GET_MODE (op1))
4221 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4223 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4224 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4226 record_jump_cond (code, mode, SUBREG_REG (op1),
4227 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4228 reversed_nonequality);
4231 /* Similarly, if this is an NE comparison, and either is a SUBREG
4232 making a smaller mode, we know the whole thing is also NE. */
4234 /* Note that GET_MODE (op0) may not equal MODE;
4235 if we test MODE instead, we can get an infinite recursion
4236 alternating between two modes each wider than MODE. */
4238 if (code == NE && GET_CODE (op0) == SUBREG
4239 && subreg_lowpart_p (op0)
4240 && (GET_MODE_SIZE (GET_MODE (op0))
4241 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4243 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4244 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4246 record_jump_cond (code, mode, SUBREG_REG (op0),
4247 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4248 reversed_nonequality);
4251 if (code == NE && GET_CODE (op1) == SUBREG
4252 && subreg_lowpart_p (op1)
4253 && (GET_MODE_SIZE (GET_MODE (op1))
4254 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4256 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4257 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4259 record_jump_cond (code, mode, SUBREG_REG (op1),
4260 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4261 reversed_nonequality);
4264 /* Hash both operands. */
4267 hash_arg_in_memory = 0;
4268 op0_hash = HASH (op0, mode);
4269 op0_in_memory = hash_arg_in_memory;
4275 hash_arg_in_memory = 0;
4276 op1_hash = HASH (op1, mode);
4277 op1_in_memory = hash_arg_in_memory;
4282 /* Look up both operands. */
4283 op0_elt = lookup (op0, op0_hash, mode);
4284 op1_elt = lookup (op1, op1_hash, mode);
4286 /* If both operands are already equivalent or if they are not in the
4287 table but are identical, do nothing. */
4288 if ((op0_elt != 0 && op1_elt != 0
4289 && op0_elt->first_same_value == op1_elt->first_same_value)
4290 || op0 == op1 || rtx_equal_p (op0, op1))
4293 /* If we aren't setting two things equal all we can do is save this
4294 comparison. Similarly if this is floating-point. In the latter
4295 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4296 If we record the equality, we might inadvertently delete code
4297 whose intent was to change -0 to +0. */
4299 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4301 struct qty_table_elem *ent;
4304 /* If we reversed a floating-point comparison, if OP0 is not a
4305 register, or if OP1 is neither a register or constant, we can't
4308 if (GET_CODE (op1) != REG)
4309 op1 = equiv_constant (op1);
4311 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4312 || GET_CODE (op0) != REG || op1 == 0)
4315 /* Put OP0 in the hash table if it isn't already. This gives it a
4316 new quantity number. */
4319 if (insert_regs (op0, NULL_PTR, 0))
4321 rehash_using_reg (op0);
4322 op0_hash = HASH (op0, mode);
4324 /* If OP0 is contained in OP1, this changes its hash code
4325 as well. Faster to rehash than to check, except
4326 for the simple case of a constant. */
4327 if (! CONSTANT_P (op1))
4328 op1_hash = HASH (op1,mode);
4331 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4332 op0_elt->in_memory = op0_in_memory;
4335 qty = REG_QTY (REGNO (op0));
4336 ent = &qty_table[qty];
4338 ent->comparison_code = code;
4339 if (GET_CODE (op1) == REG)
4341 /* Look it up again--in case op0 and op1 are the same. */
4342 op1_elt = lookup (op1, op1_hash, mode);
4344 /* Put OP1 in the hash table so it gets a new quantity number. */
4347 if (insert_regs (op1, NULL_PTR, 0))
4349 rehash_using_reg (op1);
4350 op1_hash = HASH (op1, mode);
4353 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4354 op1_elt->in_memory = op1_in_memory;
4357 ent->comparison_const = NULL_RTX;
4358 ent->comparison_qty = REG_QTY (REGNO (op1));
4362 ent->comparison_const = op1;
4363 ent->comparison_qty = -1;
4369 /* If either side is still missing an equivalence, make it now,
4370 then merge the equivalences. */
4374 if (insert_regs (op0, NULL_PTR, 0))
4376 rehash_using_reg (op0);
4377 op0_hash = HASH (op0, mode);
4380 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4381 op0_elt->in_memory = op0_in_memory;
4386 if (insert_regs (op1, NULL_PTR, 0))
4388 rehash_using_reg (op1);
4389 op1_hash = HASH (op1, mode);
4392 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4393 op1_elt->in_memory = op1_in_memory;
4396 merge_equiv_classes (op0_elt, op1_elt);
4397 last_jump_equiv_class = op0_elt;
4400 /* CSE processing for one instruction.
4401 First simplify sources and addresses of all assignments
4402 in the instruction, using previously-computed equivalents values.
4403 Then install the new sources and destinations in the table
4404 of available values.
4406 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4407 the insn. It means that INSN is inside libcall block. In this
4408 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4410 /* Data on one SET contained in the instruction. */
4414 /* The SET rtx itself. */
4416 /* The SET_SRC of the rtx (the original value, if it is changing). */
4418 /* The hash-table element for the SET_SRC of the SET. */
4419 struct table_elt *src_elt;
4420 /* Hash value for the SET_SRC. */
4422 /* Hash value for the SET_DEST. */
4424 /* The SET_DEST, with SUBREG, etc., stripped. */
4426 /* Nonzero if the SET_SRC is in memory. */
4428 /* Nonzero if the SET_SRC contains something
4429 whose value cannot be predicted and understood. */
4431 /* Original machine mode, in case it becomes a CONST_INT. */
4432 enum machine_mode mode;
4433 /* A constant equivalent for SET_SRC, if any. */
4435 /* Original SET_SRC value used for libcall notes. */
4437 /* Hash value of constant equivalent for SET_SRC. */
4438 unsigned src_const_hash;
4439 /* Table entry for constant equivalent for SET_SRC, if any. */
4440 struct table_elt *src_const_elt;
4444 cse_insn (insn, libcall_insn)
4448 register rtx x = PATTERN (insn);
4451 register int n_sets = 0;
4454 /* Records what this insn does to set CC0. */
4455 rtx this_insn_cc0 = 0;
4456 enum machine_mode this_insn_cc0_mode = VOIDmode;
4460 struct table_elt *src_eqv_elt = 0;
4461 int src_eqv_volatile = 0;
4462 int src_eqv_in_memory = 0;
4463 unsigned src_eqv_hash = 0;
4465 struct set *sets = (struct set *) NULL_PTR;
4469 /* Find all the SETs and CLOBBERs in this instruction.
4470 Record all the SETs in the array `set' and count them.
4471 Also determine whether there is a CLOBBER that invalidates
4472 all memory references, or all references at varying addresses. */
4474 if (GET_CODE (insn) == CALL_INSN)
4476 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4477 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4478 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4481 if (GET_CODE (x) == SET)
4483 sets = (struct set *) alloca (sizeof (struct set));
4486 /* Ignore SETs that are unconditional jumps.
4487 They never need cse processing, so this does not hurt.
4488 The reason is not efficiency but rather
4489 so that we can test at the end for instructions
4490 that have been simplified to unconditional jumps
4491 and not be misled by unchanged instructions
4492 that were unconditional jumps to begin with. */
4493 if (SET_DEST (x) == pc_rtx
4494 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4497 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4498 The hard function value register is used only once, to copy to
4499 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4500 Ensure we invalidate the destination register. On the 80386 no
4501 other code would invalidate it since it is a fixed_reg.
4502 We need not check the return of apply_change_group; see canon_reg. */
4504 else if (GET_CODE (SET_SRC (x)) == CALL)
4506 canon_reg (SET_SRC (x), insn);
4507 apply_change_group ();
4508 fold_rtx (SET_SRC (x), insn);
4509 invalidate (SET_DEST (x), VOIDmode);
4514 else if (GET_CODE (x) == PARALLEL)
4516 register int lim = XVECLEN (x, 0);
4518 sets = (struct set *) alloca (lim * sizeof (struct set));
4520 /* Find all regs explicitly clobbered in this insn,
4521 and ensure they are not replaced with any other regs
4522 elsewhere in this insn.
4523 When a reg that is clobbered is also used for input,
4524 we should presume that that is for a reason,
4525 and we should not substitute some other register
4526 which is not supposed to be clobbered.
4527 Therefore, this loop cannot be merged into the one below
4528 because a CALL may precede a CLOBBER and refer to the
4529 value clobbered. We must not let a canonicalization do
4530 anything in that case. */
4531 for (i = 0; i < lim; i++)
4533 register rtx y = XVECEXP (x, 0, i);
4534 if (GET_CODE (y) == CLOBBER)
4536 rtx clobbered = XEXP (y, 0);
4538 if (GET_CODE (clobbered) == REG
4539 || GET_CODE (clobbered) == SUBREG)
4540 invalidate (clobbered, VOIDmode);
4541 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4542 || GET_CODE (clobbered) == ZERO_EXTRACT)
4543 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4547 for (i = 0; i < lim; i++)
4549 register rtx y = XVECEXP (x, 0, i);
4550 if (GET_CODE (y) == SET)
4552 /* As above, we ignore unconditional jumps and call-insns and
4553 ignore the result of apply_change_group. */
4554 if (GET_CODE (SET_SRC (y)) == CALL)
4556 canon_reg (SET_SRC (y), insn);
4557 apply_change_group ();
4558 fold_rtx (SET_SRC (y), insn);
4559 invalidate (SET_DEST (y), VOIDmode);
4561 else if (SET_DEST (y) == pc_rtx
4562 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4565 sets[n_sets++].rtl = y;
4567 else if (GET_CODE (y) == CLOBBER)
4569 /* If we clobber memory, canon the address.
4570 This does nothing when a register is clobbered
4571 because we have already invalidated the reg. */
4572 if (GET_CODE (XEXP (y, 0)) == MEM)
4573 canon_reg (XEXP (y, 0), NULL_RTX);
4575 else if (GET_CODE (y) == USE
4576 && ! (GET_CODE (XEXP (y, 0)) == REG
4577 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4578 canon_reg (y, NULL_RTX);
4579 else if (GET_CODE (y) == CALL)
4581 /* The result of apply_change_group can be ignored; see
4583 canon_reg (y, insn);
4584 apply_change_group ();
4589 else if (GET_CODE (x) == CLOBBER)
4591 if (GET_CODE (XEXP (x, 0)) == MEM)
4592 canon_reg (XEXP (x, 0), NULL_RTX);
4595 /* Canonicalize a USE of a pseudo register or memory location. */
4596 else if (GET_CODE (x) == USE
4597 && ! (GET_CODE (XEXP (x, 0)) == REG
4598 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4599 canon_reg (XEXP (x, 0), NULL_RTX);
4600 else if (GET_CODE (x) == CALL)
4602 /* The result of apply_change_group can be ignored; see canon_reg. */
4603 canon_reg (x, insn);
4604 apply_change_group ();
4608 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4609 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4610 is handled specially for this case, and if it isn't set, then there will
4611 be no equivalence for the destination. */
4612 if (n_sets == 1 && REG_NOTES (insn) != 0
4613 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4614 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4615 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4616 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4618 /* Canonicalize sources and addresses of destinations.
4619 We do this in a separate pass to avoid problems when a MATCH_DUP is
4620 present in the insn pattern. In that case, we want to ensure that
4621 we don't break the duplicate nature of the pattern. So we will replace
4622 both operands at the same time. Otherwise, we would fail to find an
4623 equivalent substitution in the loop calling validate_change below.
4625 We used to suppress canonicalization of DEST if it appears in SRC,
4626 but we don't do this any more. */
4628 for (i = 0; i < n_sets; i++)
4630 rtx dest = SET_DEST (sets[i].rtl);
4631 rtx src = SET_SRC (sets[i].rtl);
4632 rtx new = canon_reg (src, insn);
4635 sets[i].orig_src = src;
4636 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4637 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4638 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4639 || (insn_code = recog_memoized (insn)) < 0
4640 || insn_data[insn_code].n_dups > 0)
4641 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4643 SET_SRC (sets[i].rtl) = new;
4645 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4647 validate_change (insn, &XEXP (dest, 1),
4648 canon_reg (XEXP (dest, 1), insn), 1);
4649 validate_change (insn, &XEXP (dest, 2),
4650 canon_reg (XEXP (dest, 2), insn), 1);
4653 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4654 || GET_CODE (dest) == ZERO_EXTRACT
4655 || GET_CODE (dest) == SIGN_EXTRACT)
4656 dest = XEXP (dest, 0);
4658 if (GET_CODE (dest) == MEM)
4659 canon_reg (dest, insn);
4662 /* Now that we have done all the replacements, we can apply the change
4663 group and see if they all work. Note that this will cause some
4664 canonicalizations that would have worked individually not to be applied
4665 because some other canonicalization didn't work, but this should not
4668 The result of apply_change_group can be ignored; see canon_reg. */
4670 apply_change_group ();
4672 /* Set sets[i].src_elt to the class each source belongs to.
4673 Detect assignments from or to volatile things
4674 and set set[i] to zero so they will be ignored
4675 in the rest of this function.
4677 Nothing in this loop changes the hash table or the register chains. */
4679 for (i = 0; i < n_sets; i++)
4681 register rtx src, dest;
4682 register rtx src_folded;
4683 register struct table_elt *elt = 0, *p;
4684 enum machine_mode mode;
4687 rtx src_related = 0;
4688 struct table_elt *src_const_elt = 0;
4689 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4690 int src_related_cost = 10000, src_elt_cost = 10000;
4691 /* Set non-zero if we need to call force_const_mem on with the
4692 contents of src_folded before using it. */
4693 int src_folded_force_flag = 0;
4695 dest = SET_DEST (sets[i].rtl);
4696 src = SET_SRC (sets[i].rtl);
4698 /* If SRC is a constant that has no machine mode,
4699 hash it with the destination's machine mode.
4700 This way we can keep different modes separate. */
4702 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4703 sets[i].mode = mode;
4707 enum machine_mode eqvmode = mode;
4708 if (GET_CODE (dest) == STRICT_LOW_PART)
4709 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4711 hash_arg_in_memory = 0;
4712 src_eqv = fold_rtx (src_eqv, insn);
4713 src_eqv_hash = HASH (src_eqv, eqvmode);
4715 /* Find the equivalence class for the equivalent expression. */
4718 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4720 src_eqv_volatile = do_not_record;
4721 src_eqv_in_memory = hash_arg_in_memory;
4724 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4725 value of the INNER register, not the destination. So it is not
4726 a valid substitution for the source. But save it for later. */
4727 if (GET_CODE (dest) == STRICT_LOW_PART)
4730 src_eqv_here = src_eqv;
4732 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4733 simplified result, which may not necessarily be valid. */
4734 src_folded = fold_rtx (src, insn);
4737 /* ??? This caused bad code to be generated for the m68k port with -O2.
4738 Suppose src is (CONST_INT -1), and that after truncation src_folded
4739 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4740 At the end we will add src and src_const to the same equivalence
4741 class. We now have 3 and -1 on the same equivalence class. This
4742 causes later instructions to be mis-optimized. */
4743 /* If storing a constant in a bitfield, pre-truncate the constant
4744 so we will be able to record it later. */
4745 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4746 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4748 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4750 if (GET_CODE (src) == CONST_INT
4751 && GET_CODE (width) == CONST_INT
4752 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4753 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4755 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4756 << INTVAL (width)) - 1));
4760 /* Compute SRC's hash code, and also notice if it
4761 should not be recorded at all. In that case,
4762 prevent any further processing of this assignment. */
4764 hash_arg_in_memory = 0;
4767 sets[i].src_hash = HASH (src, mode);
4768 sets[i].src_volatile = do_not_record;
4769 sets[i].src_in_memory = hash_arg_in_memory;
4771 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4772 a pseudo that is set more than once, do not record SRC. Using
4773 SRC as a replacement for anything else will be incorrect in that
4774 situation. Note that this usually occurs only for stack slots,
4775 in which case all the RTL would be referring to SRC, so we don't
4776 lose any optimization opportunities by not having SRC in the
4779 if (GET_CODE (src) == MEM
4780 && find_reg_note (insn, REG_EQUIV, src) != 0
4781 && GET_CODE (dest) == REG
4782 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4783 && REG_N_SETS (REGNO (dest)) != 1)
4784 sets[i].src_volatile = 1;
4787 /* It is no longer clear why we used to do this, but it doesn't
4788 appear to still be needed. So let's try without it since this
4789 code hurts cse'ing widened ops. */
4790 /* If source is a perverse subreg (such as QI treated as an SI),
4791 treat it as volatile. It may do the work of an SI in one context
4792 where the extra bits are not being used, but cannot replace an SI
4794 if (GET_CODE (src) == SUBREG
4795 && (GET_MODE_SIZE (GET_MODE (src))
4796 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4797 sets[i].src_volatile = 1;
4800 /* Locate all possible equivalent forms for SRC. Try to replace
4801 SRC in the insn with each cheaper equivalent.
4803 We have the following types of equivalents: SRC itself, a folded
4804 version, a value given in a REG_EQUAL note, or a value related
4807 Each of these equivalents may be part of an additional class
4808 of equivalents (if more than one is in the table, they must be in
4809 the same class; we check for this).
4811 If the source is volatile, we don't do any table lookups.
4813 We note any constant equivalent for possible later use in a
4816 if (!sets[i].src_volatile)
4817 elt = lookup (src, sets[i].src_hash, mode);
4819 sets[i].src_elt = elt;
4821 if (elt && src_eqv_here && src_eqv_elt)
4823 if (elt->first_same_value != src_eqv_elt->first_same_value)
4825 /* The REG_EQUAL is indicating that two formerly distinct
4826 classes are now equivalent. So merge them. */
4827 merge_equiv_classes (elt, src_eqv_elt);
4828 src_eqv_hash = HASH (src_eqv, elt->mode);
4829 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4835 else if (src_eqv_elt)
4838 /* Try to find a constant somewhere and record it in `src_const'.
4839 Record its table element, if any, in `src_const_elt'. Look in
4840 any known equivalences first. (If the constant is not in the
4841 table, also set `sets[i].src_const_hash'). */
4843 for (p = elt->first_same_value; p; p = p->next_same_value)
4847 src_const_elt = elt;
4852 && (CONSTANT_P (src_folded)
4853 /* Consider (minus (label_ref L1) (label_ref L2)) as
4854 "constant" here so we will record it. This allows us
4855 to fold switch statements when an ADDR_DIFF_VEC is used. */
4856 || (GET_CODE (src_folded) == MINUS
4857 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4858 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4859 src_const = src_folded, src_const_elt = elt;
4860 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4861 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4863 /* If we don't know if the constant is in the table, get its
4864 hash code and look it up. */
4865 if (src_const && src_const_elt == 0)
4867 sets[i].src_const_hash = HASH (src_const, mode);
4868 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4871 sets[i].src_const = src_const;
4872 sets[i].src_const_elt = src_const_elt;
4874 /* If the constant and our source are both in the table, mark them as
4875 equivalent. Otherwise, if a constant is in the table but the source
4876 isn't, set ELT to it. */
4877 if (src_const_elt && elt
4878 && src_const_elt->first_same_value != elt->first_same_value)
4879 merge_equiv_classes (elt, src_const_elt);
4880 else if (src_const_elt && elt == 0)
4881 elt = src_const_elt;
4883 /* See if there is a register linearly related to a constant
4884 equivalent of SRC. */
4886 && (GET_CODE (src_const) == CONST
4887 || (src_const_elt && src_const_elt->related_value != 0)))
4889 src_related = use_related_value (src_const, src_const_elt);
4892 struct table_elt *src_related_elt
4893 = lookup (src_related, HASH (src_related, mode), mode);
4894 if (src_related_elt && elt)
4896 if (elt->first_same_value
4897 != src_related_elt->first_same_value)
4898 /* This can occur when we previously saw a CONST
4899 involving a SYMBOL_REF and then see the SYMBOL_REF
4900 twice. Merge the involved classes. */
4901 merge_equiv_classes (elt, src_related_elt);
4904 src_related_elt = 0;
4906 else if (src_related_elt && elt == 0)
4907 elt = src_related_elt;
4911 /* See if we have a CONST_INT that is already in a register in a
4914 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4915 && GET_MODE_CLASS (mode) == MODE_INT
4916 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4918 enum machine_mode wider_mode;
4920 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4921 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4922 && src_related == 0;
4923 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4925 struct table_elt *const_elt
4926 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4931 for (const_elt = const_elt->first_same_value;
4932 const_elt; const_elt = const_elt->next_same_value)
4933 if (GET_CODE (const_elt->exp) == REG)
4935 src_related = gen_lowpart_if_possible (mode,
4942 /* Another possibility is that we have an AND with a constant in
4943 a mode narrower than a word. If so, it might have been generated
4944 as part of an "if" which would narrow the AND. If we already
4945 have done the AND in a wider mode, we can use a SUBREG of that
4948 if (flag_expensive_optimizations && ! src_related
4949 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4950 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4952 enum machine_mode tmode;
4953 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4955 for (tmode = GET_MODE_WIDER_MODE (mode);
4956 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4957 tmode = GET_MODE_WIDER_MODE (tmode))
4959 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
4960 struct table_elt *larger_elt;
4964 PUT_MODE (new_and, tmode);
4965 XEXP (new_and, 0) = inner;
4966 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4967 if (larger_elt == 0)
4970 for (larger_elt = larger_elt->first_same_value;
4971 larger_elt; larger_elt = larger_elt->next_same_value)
4972 if (GET_CODE (larger_elt->exp) == REG)
4975 = gen_lowpart_if_possible (mode, larger_elt->exp);
4985 #ifdef LOAD_EXTEND_OP
4986 /* See if a MEM has already been loaded with a widening operation;
4987 if it has, we can use a subreg of that. Many CISC machines
4988 also have such operations, but this is only likely to be
4989 beneficial these machines. */
4991 if (flag_expensive_optimizations && src_related == 0
4992 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4993 && GET_MODE_CLASS (mode) == MODE_INT
4994 && GET_CODE (src) == MEM && ! do_not_record
4995 && LOAD_EXTEND_OP (mode) != NIL)
4997 enum machine_mode tmode;
4999 /* Set what we are trying to extend and the operation it might
5000 have been extended with. */
5001 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5002 XEXP (memory_extend_rtx, 0) = src;
5004 for (tmode = GET_MODE_WIDER_MODE (mode);
5005 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5006 tmode = GET_MODE_WIDER_MODE (tmode))
5008 struct table_elt *larger_elt;
5010 PUT_MODE (memory_extend_rtx, tmode);
5011 larger_elt = lookup (memory_extend_rtx,
5012 HASH (memory_extend_rtx, tmode), tmode);
5013 if (larger_elt == 0)
5016 for (larger_elt = larger_elt->first_same_value;
5017 larger_elt; larger_elt = larger_elt->next_same_value)
5018 if (GET_CODE (larger_elt->exp) == REG)
5020 src_related = gen_lowpart_if_possible (mode,
5029 #endif /* LOAD_EXTEND_OP */
5031 if (src == src_folded)
5034 /* At this point, ELT, if non-zero, points to a class of expressions
5035 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5036 and SRC_RELATED, if non-zero, each contain additional equivalent
5037 expressions. Prune these latter expressions by deleting expressions
5038 already in the equivalence class.
5040 Check for an equivalent identical to the destination. If found,
5041 this is the preferred equivalent since it will likely lead to
5042 elimination of the insn. Indicate this by placing it in
5045 if (elt) elt = elt->first_same_value;
5046 for (p = elt; p; p = p->next_same_value)
5048 enum rtx_code code = GET_CODE (p->exp);
5050 /* If the expression is not valid, ignore it. Then we do not
5051 have to check for validity below. In most cases, we can use
5052 `rtx_equal_p', since canonicalization has already been done. */
5053 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5056 /* Also skip paradoxical subregs, unless that's what we're
5059 && (GET_MODE_SIZE (GET_MODE (p->exp))
5060 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5062 && GET_CODE (src) == SUBREG
5063 && GET_MODE (src) == GET_MODE (p->exp)
5064 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5065 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5068 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5070 else if (src_folded && GET_CODE (src_folded) == code
5071 && rtx_equal_p (src_folded, p->exp))
5073 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5074 && rtx_equal_p (src_eqv_here, p->exp))
5076 else if (src_related && GET_CODE (src_related) == code
5077 && rtx_equal_p (src_related, p->exp))
5080 /* This is the same as the destination of the insns, we want
5081 to prefer it. Copy it to src_related. The code below will
5082 then give it a negative cost. */
5083 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5088 /* Find the cheapest valid equivalent, trying all the available
5089 possibilities. Prefer items not in the hash table to ones
5090 that are when they are equal cost. Note that we can never
5091 worsen an insn as the current contents will also succeed.
5092 If we find an equivalent identical to the destination, use it as best,
5093 since this insn will probably be eliminated in that case. */
5096 if (rtx_equal_p (src, dest))
5099 src_cost = COST (src);
5104 if (rtx_equal_p (src_eqv_here, dest))
5107 src_eqv_cost = COST (src_eqv_here);
5112 if (rtx_equal_p (src_folded, dest))
5113 src_folded_cost = -1;
5115 src_folded_cost = COST (src_folded);
5120 if (rtx_equal_p (src_related, dest))
5121 src_related_cost = -1;
5123 src_related_cost = COST (src_related);
5126 /* If this was an indirect jump insn, a known label will really be
5127 cheaper even though it looks more expensive. */
5128 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5129 src_folded = src_const, src_folded_cost = -1;
5131 /* Terminate loop when replacement made. This must terminate since
5132 the current contents will be tested and will always be valid. */
5137 /* Skip invalid entries. */
5138 while (elt && GET_CODE (elt->exp) != REG
5139 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5140 elt = elt->next_same_value;
5142 /* A paradoxical subreg would be bad here: it'll be the right
5143 size, but later may be adjusted so that the upper bits aren't
5144 what we want. So reject it. */
5146 && GET_CODE (elt->exp) == SUBREG
5147 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5148 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5149 /* It is okay, though, if the rtx we're trying to match
5150 will ignore any of the bits we can't predict. */
5152 && GET_CODE (src) == SUBREG
5153 && GET_MODE (src) == GET_MODE (elt->exp)
5154 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5155 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5157 elt = elt->next_same_value;
5161 if (elt) src_elt_cost = elt->cost;
5163 /* Find cheapest and skip it for the next time. For items
5164 of equal cost, use this order:
5165 src_folded, src, src_eqv, src_related and hash table entry. */
5166 if (src_folded_cost <= src_cost
5167 && src_folded_cost <= src_eqv_cost
5168 && src_folded_cost <= src_related_cost
5169 && src_folded_cost <= src_elt_cost)
5171 trial = src_folded, src_folded_cost = 10000;
5172 if (src_folded_force_flag)
5173 trial = force_const_mem (mode, trial);
5175 else if (src_cost <= src_eqv_cost
5176 && src_cost <= src_related_cost
5177 && src_cost <= src_elt_cost)
5178 trial = src, src_cost = 10000;
5179 else if (src_eqv_cost <= src_related_cost
5180 && src_eqv_cost <= src_elt_cost)
5181 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5182 else if (src_related_cost <= src_elt_cost)
5183 trial = copy_rtx (src_related), src_related_cost = 10000;
5186 trial = copy_rtx (elt->exp);
5187 elt = elt->next_same_value;
5188 src_elt_cost = 10000;
5191 /* We don't normally have an insn matching (set (pc) (pc)), so
5192 check for this separately here. We will delete such an
5195 Tablejump insns contain a USE of the table, so simply replacing
5196 the operand with the constant won't match. This is simply an
5197 unconditional branch, however, and is therefore valid. Just
5198 insert the substitution here and we will delete and re-emit
5201 if (n_sets == 1 && dest == pc_rtx
5203 || (GET_CODE (trial) == LABEL_REF
5204 && ! condjump_p (insn))))
5206 if (trial == pc_rtx)
5208 SET_SRC (sets[i].rtl) = trial;
5209 cse_jumps_altered = 1;
5213 PATTERN (insn) = gen_jump (XEXP (trial, 0));
5214 INSN_CODE (insn) = -1;
5215 cse_jumps_altered = 1;
5219 /* Look for a substitution that makes a valid insn. */
5220 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5222 /* If we just made a substitution inside a libcall, then we
5223 need to make the same substitution in any notes attached
5224 to the RETVAL insn. */
5226 && (GET_CODE (sets[i].orig_src) == REG
5227 || GET_CODE (sets[i].orig_src) == SUBREG
5228 || GET_CODE (sets[i].orig_src) == MEM))
5229 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5230 canon_reg (SET_SRC (sets[i].rtl), insn));
5232 /* The result of apply_change_group can be ignored; see
5235 validate_change (insn, &SET_SRC (sets[i].rtl),
5236 canon_reg (SET_SRC (sets[i].rtl), insn),
5238 apply_change_group ();
5242 /* If we previously found constant pool entries for
5243 constants and this is a constant, try making a
5244 pool entry. Put it in src_folded unless we already have done
5245 this since that is where it likely came from. */
5247 else if (constant_pool_entries_cost
5248 && CONSTANT_P (trial)
5249 && ! (GET_CODE (trial) == CONST
5250 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5252 || (GET_CODE (src_folded) != MEM
5253 && ! src_folded_force_flag))
5254 && GET_MODE_CLASS (mode) != MODE_CC
5255 && mode != VOIDmode)
5257 src_folded_force_flag = 1;
5259 src_folded_cost = constant_pool_entries_cost;
5263 src = SET_SRC (sets[i].rtl);
5265 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5266 However, there is an important exception: If both are registers
5267 that are not the head of their equivalence class, replace SET_SRC
5268 with the head of the class. If we do not do this, we will have
5269 both registers live over a portion of the basic block. This way,
5270 their lifetimes will likely abut instead of overlapping. */
5271 if (GET_CODE (dest) == REG
5272 && REGNO_QTY_VALID_P (REGNO (dest)))
5274 int dest_q = REG_QTY (REGNO (dest));
5275 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5277 if (dest_ent->mode == GET_MODE (dest)
5278 && dest_ent->first_reg != REGNO (dest)
5279 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5280 /* Don't do this if the original insn had a hard reg as
5281 SET_SRC or SET_DEST. */
5282 && (GET_CODE (sets[i].src) != REG
5283 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5284 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5285 /* We can't call canon_reg here because it won't do anything if
5286 SRC is a hard register. */
5288 int src_q = REG_QTY (REGNO (src));
5289 struct qty_table_elem *src_ent = &qty_table[src_q];
5290 int first = src_ent->first_reg;
5292 = (first >= FIRST_PSEUDO_REGISTER
5293 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5295 /* We must use validate-change even for this, because this
5296 might be a special no-op instruction, suitable only to
5298 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5301 /* If we had a constant that is cheaper than what we are now
5302 setting SRC to, use that constant. We ignored it when we
5303 thought we could make this into a no-op. */
5304 if (src_const && COST (src_const) < COST (src)
5305 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5312 /* If we made a change, recompute SRC values. */
5313 if (src != sets[i].src)
5317 hash_arg_in_memory = 0;
5319 sets[i].src_hash = HASH (src, mode);
5320 sets[i].src_volatile = do_not_record;
5321 sets[i].src_in_memory = hash_arg_in_memory;
5322 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5325 /* If this is a single SET, we are setting a register, and we have an
5326 equivalent constant, we want to add a REG_NOTE. We don't want
5327 to write a REG_EQUAL note for a constant pseudo since verifying that
5328 that pseudo hasn't been eliminated is a pain. Such a note also
5329 won't help anything.
5331 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5332 which can be created for a reference to a compile time computable
5333 entry in a jump table. */
5335 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5336 && GET_CODE (src_const) != REG
5337 && ! (GET_CODE (src_const) == CONST
5338 && GET_CODE (XEXP (src_const, 0)) == MINUS
5339 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5340 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5342 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5344 /* Make sure that the rtx is not shared with any other insn. */
5345 src_const = copy_rtx (src_const);
5347 /* Record the actual constant value in a REG_EQUAL note, making
5348 a new one if one does not already exist. */
5350 XEXP (tem, 0) = src_const;
5352 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5353 src_const, REG_NOTES (insn));
5355 /* If storing a constant value in a register that
5356 previously held the constant value 0,
5357 record this fact with a REG_WAS_0 note on this insn.
5359 Note that the *register* is required to have previously held 0,
5360 not just any register in the quantity and we must point to the
5361 insn that set that register to zero.
5363 Rather than track each register individually, we just see if
5364 the last set for this quantity was for this register. */
5366 if (REGNO_QTY_VALID_P (REGNO (dest)))
5368 int dest_q = REG_QTY (REGNO (dest));
5369 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5371 if (dest_ent->const_rtx == const0_rtx)
5373 /* See if we previously had a REG_WAS_0 note. */
5374 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5375 rtx const_insn = dest_ent->const_insn;
5377 if ((tem = single_set (const_insn)) != 0
5378 && rtx_equal_p (SET_DEST (tem), dest))
5381 XEXP (note, 0) = const_insn;
5384 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5391 /* Now deal with the destination. */
5394 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5395 to the MEM or REG within it. */
5396 while (GET_CODE (dest) == SIGN_EXTRACT
5397 || GET_CODE (dest) == ZERO_EXTRACT
5398 || GET_CODE (dest) == SUBREG
5399 || GET_CODE (dest) == STRICT_LOW_PART)
5400 dest = XEXP (dest, 0);
5402 sets[i].inner_dest = dest;
5404 if (GET_CODE (dest) == MEM)
5406 #ifdef PUSH_ROUNDING
5407 /* Stack pushes invalidate the stack pointer. */
5408 rtx addr = XEXP (dest, 0);
5409 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5410 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5411 && XEXP (addr, 0) == stack_pointer_rtx)
5412 invalidate (stack_pointer_rtx, Pmode);
5414 dest = fold_rtx (dest, insn);
5417 /* Compute the hash code of the destination now,
5418 before the effects of this instruction are recorded,
5419 since the register values used in the address computation
5420 are those before this instruction. */
5421 sets[i].dest_hash = HASH (dest, mode);
5423 /* Don't enter a bit-field in the hash table
5424 because the value in it after the store
5425 may not equal what was stored, due to truncation. */
5427 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5428 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5430 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5432 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5433 && GET_CODE (width) == CONST_INT
5434 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5435 && ! (INTVAL (src_const)
5436 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5437 /* Exception: if the value is constant,
5438 and it won't be truncated, record it. */
5442 /* This is chosen so that the destination will be invalidated
5443 but no new value will be recorded.
5444 We must invalidate because sometimes constant
5445 values can be recorded for bitfields. */
5446 sets[i].src_elt = 0;
5447 sets[i].src_volatile = 1;
5453 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5455 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5457 /* One less use of the label this insn used to jump to. */
5458 if (JUMP_LABEL (insn) != 0)
5459 --LABEL_NUSES (JUMP_LABEL (insn));
5460 PUT_CODE (insn, NOTE);
5461 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5462 NOTE_SOURCE_FILE (insn) = 0;
5463 cse_jumps_altered = 1;
5464 /* No more processing for this set. */
5468 /* If this SET is now setting PC to a label, we know it used to
5469 be a conditional or computed branch. So we see if we can follow
5470 it. If it was a computed branch, delete it and re-emit. */
5471 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5473 /* If this is not in the format for a simple branch and
5474 we are the only SET in it, re-emit it. */
5475 if (! simplejump_p (insn) && n_sets == 1)
5477 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5478 JUMP_LABEL (new) = XEXP (src, 0);
5479 LABEL_NUSES (XEXP (src, 0))++;
5483 /* Otherwise, force rerecognition, since it probably had
5484 a different pattern before.
5485 This shouldn't really be necessary, since whatever
5486 changed the source value above should have done this.
5487 Until the right place is found, might as well do this here. */
5488 INSN_CODE (insn) = -1;
5490 never_reached_warning (insn);
5492 /* Now emit a BARRIER after the unconditional jump. Do not bother
5493 deleting any unreachable code, let jump/flow do that. */
5494 if (NEXT_INSN (insn) != 0
5495 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5496 emit_barrier_after (insn);
5498 cse_jumps_altered = 1;
5502 /* If destination is volatile, invalidate it and then do no further
5503 processing for this assignment. */
5505 else if (do_not_record)
5507 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5508 || GET_CODE (dest) == MEM)
5509 invalidate (dest, VOIDmode);
5510 else if (GET_CODE (dest) == STRICT_LOW_PART
5511 || GET_CODE (dest) == ZERO_EXTRACT)
5512 invalidate (XEXP (dest, 0), GET_MODE (dest));
5516 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5517 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5520 /* If setting CC0, record what it was set to, or a constant, if it
5521 is equivalent to a constant. If it is being set to a floating-point
5522 value, make a COMPARE with the appropriate constant of 0. If we
5523 don't do this, later code can interpret this as a test against
5524 const0_rtx, which can cause problems if we try to put it into an
5525 insn as a floating-point operand. */
5526 if (dest == cc0_rtx)
5528 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5529 this_insn_cc0_mode = mode;
5530 if (FLOAT_MODE_P (mode))
5531 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5537 /* Now enter all non-volatile source expressions in the hash table
5538 if they are not already present.
5539 Record their equivalence classes in src_elt.
5540 This way we can insert the corresponding destinations into
5541 the same classes even if the actual sources are no longer in them
5542 (having been invalidated). */
5544 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5545 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5547 register struct table_elt *elt;
5548 register struct table_elt *classp = sets[0].src_elt;
5549 rtx dest = SET_DEST (sets[0].rtl);
5550 enum machine_mode eqvmode = GET_MODE (dest);
5552 if (GET_CODE (dest) == STRICT_LOW_PART)
5554 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5557 if (insert_regs (src_eqv, classp, 0))
5559 rehash_using_reg (src_eqv);
5560 src_eqv_hash = HASH (src_eqv, eqvmode);
5562 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5563 elt->in_memory = src_eqv_in_memory;
5566 /* Check to see if src_eqv_elt is the same as a set source which
5567 does not yet have an elt, and if so set the elt of the set source
5569 for (i = 0; i < n_sets; i++)
5570 if (sets[i].rtl && sets[i].src_elt == 0
5571 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5572 sets[i].src_elt = src_eqv_elt;
5575 for (i = 0; i < n_sets; i++)
5576 if (sets[i].rtl && ! sets[i].src_volatile
5577 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5579 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5581 /* REG_EQUAL in setting a STRICT_LOW_PART
5582 gives an equivalent for the entire destination register,
5583 not just for the subreg being stored in now.
5584 This is a more interesting equivalence, so we arrange later
5585 to treat the entire reg as the destination. */
5586 sets[i].src_elt = src_eqv_elt;
5587 sets[i].src_hash = src_eqv_hash;
5591 /* Insert source and constant equivalent into hash table, if not
5593 register struct table_elt *classp = src_eqv_elt;
5594 register rtx src = sets[i].src;
5595 register rtx dest = SET_DEST (sets[i].rtl);
5596 enum machine_mode mode
5597 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5599 if (sets[i].src_elt == 0)
5601 /* Don't put a hard register source into the table if this is
5602 the last insn of a libcall. In this case, we only need
5603 to put src_eqv_elt in src_elt. */
5604 if (GET_CODE (src) != REG
5605 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5606 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5608 register struct table_elt *elt;
5610 /* Note that these insert_regs calls cannot remove
5611 any of the src_elt's, because they would have failed to
5612 match if not still valid. */
5613 if (insert_regs (src, classp, 0))
5615 rehash_using_reg (src);
5616 sets[i].src_hash = HASH (src, mode);
5618 elt = insert (src, classp, sets[i].src_hash, mode);
5619 elt->in_memory = sets[i].src_in_memory;
5620 sets[i].src_elt = classp = elt;
5623 sets[i].src_elt = classp;
5625 if (sets[i].src_const && sets[i].src_const_elt == 0
5626 && src != sets[i].src_const
5627 && ! rtx_equal_p (sets[i].src_const, src))
5628 sets[i].src_elt = insert (sets[i].src_const, classp,
5629 sets[i].src_const_hash, mode);
5632 else if (sets[i].src_elt == 0)
5633 /* If we did not insert the source into the hash table (e.g., it was
5634 volatile), note the equivalence class for the REG_EQUAL value, if any,
5635 so that the destination goes into that class. */
5636 sets[i].src_elt = src_eqv_elt;
5638 invalidate_from_clobbers (x);
5640 /* Some registers are invalidated by subroutine calls. Memory is
5641 invalidated by non-constant calls. */
5643 if (GET_CODE (insn) == CALL_INSN)
5645 if (! CONST_CALL_P (insn))
5646 invalidate_memory ();
5647 invalidate_for_call ();
5650 /* Now invalidate everything set by this instruction.
5651 If a SUBREG or other funny destination is being set,
5652 sets[i].rtl is still nonzero, so here we invalidate the reg
5653 a part of which is being set. */
5655 for (i = 0; i < n_sets; i++)
5658 /* We can't use the inner dest, because the mode associated with
5659 a ZERO_EXTRACT is significant. */
5660 register rtx dest = SET_DEST (sets[i].rtl);
5662 /* Needed for registers to remove the register from its
5663 previous quantity's chain.
5664 Needed for memory if this is a nonvarying address, unless
5665 we have just done an invalidate_memory that covers even those. */
5666 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5667 || GET_CODE (dest) == MEM)
5668 invalidate (dest, VOIDmode);
5669 else if (GET_CODE (dest) == STRICT_LOW_PART
5670 || GET_CODE (dest) == ZERO_EXTRACT)
5671 invalidate (XEXP (dest, 0), GET_MODE (dest));
5674 /* A volatile ASM invalidates everything. */
5675 if (GET_CODE (insn) == INSN
5676 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5677 && MEM_VOLATILE_P (PATTERN (insn)))
5678 flush_hash_table ();
5680 /* Make sure registers mentioned in destinations
5681 are safe for use in an expression to be inserted.
5682 This removes from the hash table
5683 any invalid entry that refers to one of these registers.
5685 We don't care about the return value from mention_regs because
5686 we are going to hash the SET_DEST values unconditionally. */
5688 for (i = 0; i < n_sets; i++)
5692 rtx x = SET_DEST (sets[i].rtl);
5694 if (GET_CODE (x) != REG)
5698 /* We used to rely on all references to a register becoming
5699 inaccessible when a register changes to a new quantity,
5700 since that changes the hash code. However, that is not
5701 safe, since after HASH_SIZE new quantities we get a
5702 hash 'collision' of a register with its own invalid
5703 entries. And since SUBREGs have been changed not to
5704 change their hash code with the hash code of the register,
5705 it wouldn't work any longer at all. So we have to check
5706 for any invalid references lying around now.
5707 This code is similar to the REG case in mention_regs,
5708 but it knows that reg_tick has been incremented, and
5709 it leaves reg_in_table as -1 . */
5710 unsigned int regno = REGNO (x);
5711 unsigned int endregno
5712 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5713 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5716 for (i = regno; i < endregno; i++)
5718 if (REG_IN_TABLE (i) >= 0)
5720 remove_invalid_refs (i);
5721 REG_IN_TABLE (i) = -1;
5728 /* We may have just removed some of the src_elt's from the hash table.
5729 So replace each one with the current head of the same class. */
5731 for (i = 0; i < n_sets; i++)
5734 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5735 /* If elt was removed, find current head of same class,
5736 or 0 if nothing remains of that class. */
5738 register struct table_elt *elt = sets[i].src_elt;
5740 while (elt && elt->prev_same_value)
5741 elt = elt->prev_same_value;
5743 while (elt && elt->first_same_value == 0)
5744 elt = elt->next_same_value;
5745 sets[i].src_elt = elt ? elt->first_same_value : 0;
5749 /* Now insert the destinations into their equivalence classes. */
5751 for (i = 0; i < n_sets; i++)
5754 register rtx dest = SET_DEST (sets[i].rtl);
5755 rtx inner_dest = sets[i].inner_dest;
5756 register struct table_elt *elt;
5758 /* Don't record value if we are not supposed to risk allocating
5759 floating-point values in registers that might be wider than
5761 if ((flag_float_store
5762 && GET_CODE (dest) == MEM
5763 && FLOAT_MODE_P (GET_MODE (dest)))
5764 /* Don't record BLKmode values, because we don't know the
5765 size of it, and can't be sure that other BLKmode values
5766 have the same or smaller size. */
5767 || GET_MODE (dest) == BLKmode
5768 /* Don't record values of destinations set inside a libcall block
5769 since we might delete the libcall. Things should have been set
5770 up so we won't want to reuse such a value, but we play it safe
5773 /* If we didn't put a REG_EQUAL value or a source into the hash
5774 table, there is no point is recording DEST. */
5775 || sets[i].src_elt == 0
5776 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5777 or SIGN_EXTEND, don't record DEST since it can cause
5778 some tracking to be wrong.
5780 ??? Think about this more later. */
5781 || (GET_CODE (dest) == SUBREG
5782 && (GET_MODE_SIZE (GET_MODE (dest))
5783 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5784 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5785 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5788 /* STRICT_LOW_PART isn't part of the value BEING set,
5789 and neither is the SUBREG inside it.
5790 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5791 if (GET_CODE (dest) == STRICT_LOW_PART)
5792 dest = SUBREG_REG (XEXP (dest, 0));
5794 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5795 /* Registers must also be inserted into chains for quantities. */
5796 if (insert_regs (dest, sets[i].src_elt, 1))
5798 /* If `insert_regs' changes something, the hash code must be
5800 rehash_using_reg (dest);
5801 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5804 if (GET_CODE (inner_dest) == MEM
5805 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5806 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5807 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5808 Consider the case in which the address of the MEM is
5809 passed to a function, which alters the MEM. Then, if we
5810 later use Y instead of the MEM we'll miss the update. */
5811 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5813 elt = insert (dest, sets[i].src_elt,
5814 sets[i].dest_hash, GET_MODE (dest));
5816 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5817 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5818 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5821 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5822 narrower than M2, and both M1 and M2 are the same number of words,
5823 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5824 make that equivalence as well.
5826 However, BAR may have equivalences for which gen_lowpart_if_possible
5827 will produce a simpler value than gen_lowpart_if_possible applied to
5828 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5829 BAR's equivalences. If we don't get a simplified form, make
5830 the SUBREG. It will not be used in an equivalence, but will
5831 cause two similar assignments to be detected.
5833 Note the loop below will find SUBREG_REG (DEST) since we have
5834 already entered SRC and DEST of the SET in the table. */
5836 if (GET_CODE (dest) == SUBREG
5837 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5839 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
5840 && (GET_MODE_SIZE (GET_MODE (dest))
5841 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5842 && sets[i].src_elt != 0)
5844 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5845 struct table_elt *elt, *classp = 0;
5847 for (elt = sets[i].src_elt->first_same_value; elt;
5848 elt = elt->next_same_value)
5852 struct table_elt *src_elt;
5854 /* Ignore invalid entries. */
5855 if (GET_CODE (elt->exp) != REG
5856 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5859 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
5861 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
5863 src_hash = HASH (new_src, new_mode);
5864 src_elt = lookup (new_src, src_hash, new_mode);
5866 /* Put the new source in the hash table is if isn't
5870 if (insert_regs (new_src, classp, 0))
5872 rehash_using_reg (new_src);
5873 src_hash = HASH (new_src, new_mode);
5875 src_elt = insert (new_src, classp, src_hash, new_mode);
5876 src_elt->in_memory = elt->in_memory;
5878 else if (classp && classp != src_elt->first_same_value)
5879 /* Show that two things that we've seen before are
5880 actually the same. */
5881 merge_equiv_classes (src_elt, classp);
5883 classp = src_elt->first_same_value;
5884 /* Ignore invalid entries. */
5886 && GET_CODE (classp->exp) != REG
5887 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
5888 classp = classp->next_same_value;
5893 /* Special handling for (set REG0 REG1)
5894 where REG0 is the "cheapest", cheaper than REG1.
5895 After cse, REG1 will probably not be used in the sequel,
5896 so (if easily done) change this insn to (set REG1 REG0) and
5897 replace REG1 with REG0 in the previous insn that computed their value.
5898 Then REG1 will become a dead store and won't cloud the situation
5899 for later optimizations.
5901 Do not make this change if REG1 is a hard register, because it will
5902 then be used in the sequel and we may be changing a two-operand insn
5903 into a three-operand insn.
5905 Also do not do this if we are operating on a copy of INSN.
5907 Also don't do this if INSN ends a libcall; this would cause an unrelated
5908 register to be set in the middle of a libcall, and we then get bad code
5909 if the libcall is deleted. */
5911 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
5912 && NEXT_INSN (PREV_INSN (insn)) == insn
5913 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
5914 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5915 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5917 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5918 struct qty_table_elem *src_ent = &qty_table[src_q];
5920 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5921 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5923 rtx prev = PREV_INSN (insn);
5924 while (prev && GET_CODE (prev) == NOTE)
5925 prev = PREV_INSN (prev);
5927 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
5928 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
5930 rtx dest = SET_DEST (sets[0].rtl);
5931 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
5933 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
5934 validate_change (insn, & SET_DEST (sets[0].rtl),
5935 SET_SRC (sets[0].rtl), 1);
5936 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
5937 apply_change_group ();
5939 /* If REG1 was equivalent to a constant, REG0 is not. */
5941 PUT_REG_NOTE_KIND (note, REG_EQUAL);
5943 /* If there was a REG_WAS_0 note on PREV, remove it. Move
5944 any REG_WAS_0 note on INSN to PREV. */
5945 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
5947 remove_note (prev, note);
5949 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5952 remove_note (insn, note);
5953 XEXP (note, 1) = REG_NOTES (prev);
5954 REG_NOTES (prev) = note;
5957 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
5958 then we must delete it, because the value in REG0 has changed. */
5959 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5960 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
5961 remove_note (insn, note);
5966 /* If this is a conditional jump insn, record any known equivalences due to
5967 the condition being tested. */
5969 last_jump_equiv_class = 0;
5970 if (GET_CODE (insn) == JUMP_INSN
5971 && n_sets == 1 && GET_CODE (x) == SET
5972 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
5973 record_jump_equiv (insn, 0);
5976 /* If the previous insn set CC0 and this insn no longer references CC0,
5977 delete the previous insn. Here we use the fact that nothing expects CC0
5978 to be valid over an insn, which is true until the final pass. */
5979 if (prev_insn && GET_CODE (prev_insn) == INSN
5980 && (tem = single_set (prev_insn)) != 0
5981 && SET_DEST (tem) == cc0_rtx
5982 && ! reg_mentioned_p (cc0_rtx, x))
5984 PUT_CODE (prev_insn, NOTE);
5985 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
5986 NOTE_SOURCE_FILE (prev_insn) = 0;
5989 prev_insn_cc0 = this_insn_cc0;
5990 prev_insn_cc0_mode = this_insn_cc0_mode;
5996 /* Remove from the hash table all expressions that reference memory. */
5999 invalidate_memory ()
6002 register struct table_elt *p, *next;
6004 for (i = 0; i < HASH_SIZE; i++)
6005 for (p = table[i]; p; p = next)
6007 next = p->next_same_hash;
6009 remove_from_table (p, i);
6013 /* If ADDR is an address that implicitly affects the stack pointer, return
6014 1 and update the register tables to show the effect. Else, return 0. */
6017 addr_affects_sp_p (addr)
6020 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6021 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6022 && GET_CODE (XEXP (addr, 0)) == REG
6023 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6025 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6026 REG_TICK (STACK_POINTER_REGNUM)++;
6028 /* This should be *very* rare. */
6029 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6030 invalidate (stack_pointer_rtx, VOIDmode);
6038 /* Perform invalidation on the basis of everything about an insn
6039 except for invalidating the actual places that are SET in it.
6040 This includes the places CLOBBERed, and anything that might
6041 alias with something that is SET or CLOBBERed.
6043 X is the pattern of the insn. */
6046 invalidate_from_clobbers (x)
6049 if (GET_CODE (x) == CLOBBER)
6051 rtx ref = XEXP (x, 0);
6054 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6055 || GET_CODE (ref) == MEM)
6056 invalidate (ref, VOIDmode);
6057 else if (GET_CODE (ref) == STRICT_LOW_PART
6058 || GET_CODE (ref) == ZERO_EXTRACT)
6059 invalidate (XEXP (ref, 0), GET_MODE (ref));
6062 else if (GET_CODE (x) == PARALLEL)
6065 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6067 register rtx y = XVECEXP (x, 0, i);
6068 if (GET_CODE (y) == CLOBBER)
6070 rtx ref = XEXP (y, 0);
6071 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6072 || GET_CODE (ref) == MEM)
6073 invalidate (ref, VOIDmode);
6074 else if (GET_CODE (ref) == STRICT_LOW_PART
6075 || GET_CODE (ref) == ZERO_EXTRACT)
6076 invalidate (XEXP (ref, 0), GET_MODE (ref));
6082 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6083 and replace any registers in them with either an equivalent constant
6084 or the canonical form of the register. If we are inside an address,
6085 only do this if the address remains valid.
6087 OBJECT is 0 except when within a MEM in which case it is the MEM.
6089 Return the replacement for X. */
6092 cse_process_notes (x, object)
6096 enum rtx_code code = GET_CODE (x);
6097 const char *fmt = GET_RTX_FORMAT (code);
6113 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6118 if (REG_NOTE_KIND (x) == REG_EQUAL)
6119 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6121 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6128 rtx new = cse_process_notes (XEXP (x, 0), object);
6129 /* We don't substitute VOIDmode constants into these rtx,
6130 since they would impede folding. */
6131 if (GET_MODE (new) != VOIDmode)
6132 validate_change (object, &XEXP (x, 0), new, 0);
6137 i = REG_QTY (REGNO (x));
6139 /* Return a constant or a constant register. */
6140 if (REGNO_QTY_VALID_P (REGNO (x)))
6142 struct qty_table_elem *ent = &qty_table[i];
6144 if (ent->const_rtx != NULL_RTX
6145 && (CONSTANT_P (ent->const_rtx)
6146 || GET_CODE (ent->const_rtx) == REG))
6148 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6154 /* Otherwise, canonicalize this register. */
6155 return canon_reg (x, NULL_RTX);
6161 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6163 validate_change (object, &XEXP (x, i),
6164 cse_process_notes (XEXP (x, i), object), 0);
6169 /* Find common subexpressions between the end test of a loop and the beginning
6170 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6172 Often we have a loop where an expression in the exit test is used
6173 in the body of the loop. For example "while (*p) *q++ = *p++;".
6174 Because of the way we duplicate the loop exit test in front of the loop,
6175 however, we don't detect that common subexpression. This will be caught
6176 when global cse is implemented, but this is a quite common case.
6178 This function handles the most common cases of these common expressions.
6179 It is called after we have processed the basic block ending with the
6180 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6181 jumps to a label used only once. */
6184 cse_around_loop (loop_start)
6189 struct table_elt *p;
6191 /* If the jump at the end of the loop doesn't go to the start, we don't
6193 for (insn = PREV_INSN (loop_start);
6194 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6195 insn = PREV_INSN (insn))
6199 || GET_CODE (insn) != NOTE
6200 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6203 /* If the last insn of the loop (the end test) was an NE comparison,
6204 we will interpret it as an EQ comparison, since we fell through
6205 the loop. Any equivalences resulting from that comparison are
6206 therefore not valid and must be invalidated. */
6207 if (last_jump_equiv_class)
6208 for (p = last_jump_equiv_class->first_same_value; p;
6209 p = p->next_same_value)
6211 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6212 || (GET_CODE (p->exp) == SUBREG
6213 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6214 invalidate (p->exp, VOIDmode);
6215 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6216 || GET_CODE (p->exp) == ZERO_EXTRACT)
6217 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6220 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6221 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6223 The only thing we do with SET_DEST is invalidate entries, so we
6224 can safely process each SET in order. It is slightly less efficient
6225 to do so, but we only want to handle the most common cases.
6227 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6228 These pseudos won't have valid entries in any of the tables indexed
6229 by register number, such as reg_qty. We avoid out-of-range array
6230 accesses by not processing any instructions created after cse started. */
6232 for (insn = NEXT_INSN (loop_start);
6233 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6234 && INSN_UID (insn) < max_insn_uid
6235 && ! (GET_CODE (insn) == NOTE
6236 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6237 insn = NEXT_INSN (insn))
6239 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6240 && (GET_CODE (PATTERN (insn)) == SET
6241 || GET_CODE (PATTERN (insn)) == CLOBBER))
6242 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6243 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6244 && GET_CODE (PATTERN (insn)) == PARALLEL)
6245 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6246 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6247 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6248 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6253 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6254 since they are done elsewhere. This function is called via note_stores. */
6257 invalidate_skipped_set (dest, set, data)
6260 void *data ATTRIBUTE_UNUSED;
6262 enum rtx_code code = GET_CODE (dest);
6265 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6266 /* There are times when an address can appear varying and be a PLUS
6267 during this scan when it would be a fixed address were we to know
6268 the proper equivalences. So invalidate all memory if there is
6269 a BLKmode or nonscalar memory reference or a reference to a
6270 variable address. */
6271 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6272 || cse_rtx_varies_p (XEXP (dest, 0))))
6274 invalidate_memory ();
6278 if (GET_CODE (set) == CLOBBER
6285 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6286 invalidate (XEXP (dest, 0), GET_MODE (dest));
6287 else if (code == REG || code == SUBREG || code == MEM)
6288 invalidate (dest, VOIDmode);
6291 /* Invalidate all insns from START up to the end of the function or the
6292 next label. This called when we wish to CSE around a block that is
6293 conditionally executed. */
6296 invalidate_skipped_block (start)
6301 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6302 insn = NEXT_INSN (insn))
6304 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6307 if (GET_CODE (insn) == CALL_INSN)
6309 if (! CONST_CALL_P (insn))
6310 invalidate_memory ();
6311 invalidate_for_call ();
6314 invalidate_from_clobbers (PATTERN (insn));
6315 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6319 /* If modifying X will modify the value in *DATA (which is really an
6320 `rtx *'), indicate that fact by setting the pointed to value to
6324 cse_check_loop_start (x, set, data)
6326 rtx set ATTRIBUTE_UNUSED;
6329 rtx *cse_check_loop_start_value = (rtx *) data;
6331 if (*cse_check_loop_start_value == NULL_RTX
6332 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6335 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6336 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6337 *cse_check_loop_start_value = NULL_RTX;
6340 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6341 a loop that starts with the label at LOOP_START.
6343 If X is a SET, we see if its SET_SRC is currently in our hash table.
6344 If so, we see if it has a value equal to some register used only in the
6345 loop exit code (as marked by jump.c).
6347 If those two conditions are true, we search backwards from the start of
6348 the loop to see if that same value was loaded into a register that still
6349 retains its value at the start of the loop.
6351 If so, we insert an insn after the load to copy the destination of that
6352 load into the equivalent register and (try to) replace our SET_SRC with that
6355 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6358 cse_set_around_loop (x, insn, loop_start)
6363 struct table_elt *src_elt;
6365 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6366 are setting PC or CC0 or whose SET_SRC is already a register. */
6367 if (GET_CODE (x) == SET
6368 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6369 && GET_CODE (SET_SRC (x)) != REG)
6371 src_elt = lookup (SET_SRC (x),
6372 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6373 GET_MODE (SET_DEST (x)));
6376 for (src_elt = src_elt->first_same_value; src_elt;
6377 src_elt = src_elt->next_same_value)
6378 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6379 && COST (src_elt->exp) < COST (SET_SRC (x)))
6383 /* Look for an insn in front of LOOP_START that sets
6384 something in the desired mode to SET_SRC (x) before we hit
6385 a label or CALL_INSN. */
6387 for (p = prev_nonnote_insn (loop_start);
6388 p && GET_CODE (p) != CALL_INSN
6389 && GET_CODE (p) != CODE_LABEL;
6390 p = prev_nonnote_insn (p))
6391 if ((set = single_set (p)) != 0
6392 && GET_CODE (SET_DEST (set)) == REG
6393 && GET_MODE (SET_DEST (set)) == src_elt->mode
6394 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6396 /* We now have to ensure that nothing between P
6397 and LOOP_START modified anything referenced in
6398 SET_SRC (x). We know that nothing within the loop
6399 can modify it, or we would have invalidated it in
6402 rtx cse_check_loop_start_value = SET_SRC (x);
6403 for (q = p; q != loop_start; q = NEXT_INSN (q))
6404 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6405 note_stores (PATTERN (q),
6406 cse_check_loop_start,
6407 &cse_check_loop_start_value);
6409 /* If nothing was changed and we can replace our
6410 SET_SRC, add an insn after P to copy its destination
6411 to what we will be replacing SET_SRC with. */
6412 if (cse_check_loop_start_value
6413 && validate_change (insn, &SET_SRC (x),
6416 /* If this creates new pseudos, this is unsafe,
6417 because the regno of new pseudo is unsuitable
6418 to index into reg_qty when cse_insn processes
6419 the new insn. Therefore, if a new pseudo was
6420 created, discard this optimization. */
6421 int nregs = max_reg_num ();
6423 = gen_move_insn (src_elt->exp, SET_DEST (set));
6424 if (nregs != max_reg_num ())
6426 if (! validate_change (insn, &SET_SRC (x),
6431 emit_insn_after (move, p);
6438 /* Deal with the destination of X affecting the stack pointer. */
6439 addr_affects_sp_p (SET_DEST (x));
6441 /* See comment on similar code in cse_insn for explanation of these
6443 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6444 || GET_CODE (SET_DEST (x)) == MEM)
6445 invalidate (SET_DEST (x), VOIDmode);
6446 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6447 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6448 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6451 /* Find the end of INSN's basic block and return its range,
6452 the total number of SETs in all the insns of the block, the last insn of the
6453 block, and the branch path.
6455 The branch path indicates which branches should be followed. If a non-zero
6456 path size is specified, the block should be rescanned and a different set
6457 of branches will be taken. The branch path is only used if
6458 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6460 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6461 used to describe the block. It is filled in with the information about
6462 the current block. The incoming structure's branch path, if any, is used
6463 to construct the output branch path. */
6466 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6468 struct cse_basic_block_data *data;
6475 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6476 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6477 int path_size = data->path_size;
6481 /* Update the previous branch path, if any. If the last branch was
6482 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6483 shorten the path by one and look at the previous branch. We know that
6484 at least one branch must have been taken if PATH_SIZE is non-zero. */
6485 while (path_size > 0)
6487 if (data->path[path_size - 1].status != NOT_TAKEN)
6489 data->path[path_size - 1].status = NOT_TAKEN;
6496 /* If the first instruction is marked with QImode, that means we've
6497 already processed this block. Our caller will look at DATA->LAST
6498 to figure out where to go next. We want to return the next block
6499 in the instruction stream, not some branched-to block somewhere
6500 else. We accomplish this by pretending our called forbid us to
6501 follow jumps, or skip blocks. */
6502 if (GET_MODE (insn) == QImode)
6503 follow_jumps = skip_blocks = 0;
6505 /* Scan to end of this basic block. */
6506 while (p && GET_CODE (p) != CODE_LABEL)
6508 /* Don't cse out the end of a loop. This makes a difference
6509 only for the unusual loops that always execute at least once;
6510 all other loops have labels there so we will stop in any case.
6511 Cse'ing out the end of the loop is dangerous because it
6512 might cause an invariant expression inside the loop
6513 to be reused after the end of the loop. This would make it
6514 hard to move the expression out of the loop in loop.c,
6515 especially if it is one of several equivalent expressions
6516 and loop.c would like to eliminate it.
6518 If we are running after loop.c has finished, we can ignore
6519 the NOTE_INSN_LOOP_END. */
6521 if (! after_loop && GET_CODE (p) == NOTE
6522 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6525 /* Don't cse over a call to setjmp; on some machines (eg vax)
6526 the regs restored by the longjmp come from
6527 a later time than the setjmp. */
6528 if (GET_CODE (p) == NOTE
6529 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6532 /* A PARALLEL can have lots of SETs in it,
6533 especially if it is really an ASM_OPERANDS. */
6534 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6535 && GET_CODE (PATTERN (p)) == PARALLEL)
6536 nsets += XVECLEN (PATTERN (p), 0);
6537 else if (GET_CODE (p) != NOTE)
6540 /* Ignore insns made by CSE; they cannot affect the boundaries of
6543 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6544 high_cuid = INSN_CUID (p);
6545 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6546 low_cuid = INSN_CUID (p);
6548 /* See if this insn is in our branch path. If it is and we are to
6550 if (path_entry < path_size && data->path[path_entry].branch == p)
6552 if (data->path[path_entry].status != NOT_TAKEN)
6555 /* Point to next entry in path, if any. */
6559 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6560 was specified, we haven't reached our maximum path length, there are
6561 insns following the target of the jump, this is the only use of the
6562 jump label, and the target label is preceded by a BARRIER.
6564 Alternatively, we can follow the jump if it branches around a
6565 block of code and there are no other branches into the block.
6566 In this case invalidate_skipped_block will be called to invalidate any
6567 registers set in the block when following the jump. */
6569 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6570 && GET_CODE (p) == JUMP_INSN
6571 && GET_CODE (PATTERN (p)) == SET
6572 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6573 && JUMP_LABEL (p) != 0
6574 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6575 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6577 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6578 if ((GET_CODE (q) != NOTE
6579 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6580 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6581 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6584 /* If we ran into a BARRIER, this code is an extension of the
6585 basic block when the branch is taken. */
6586 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6588 /* Don't allow ourself to keep walking around an
6589 always-executed loop. */
6590 if (next_real_insn (q) == next)
6596 /* Similarly, don't put a branch in our path more than once. */
6597 for (i = 0; i < path_entry; i++)
6598 if (data->path[i].branch == p)
6601 if (i != path_entry)
6604 data->path[path_entry].branch = p;
6605 data->path[path_entry++].status = TAKEN;
6607 /* This branch now ends our path. It was possible that we
6608 didn't see this branch the last time around (when the
6609 insn in front of the target was a JUMP_INSN that was
6610 turned into a no-op). */
6611 path_size = path_entry;
6614 /* Mark block so we won't scan it again later. */
6615 PUT_MODE (NEXT_INSN (p), QImode);
6617 /* Detect a branch around a block of code. */
6618 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6622 if (next_real_insn (q) == next)
6628 for (i = 0; i < path_entry; i++)
6629 if (data->path[i].branch == p)
6632 if (i != path_entry)
6635 /* This is no_labels_between_p (p, q) with an added check for
6636 reaching the end of a function (in case Q precedes P). */
6637 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6638 if (GET_CODE (tmp) == CODE_LABEL)
6643 data->path[path_entry].branch = p;
6644 data->path[path_entry++].status = AROUND;
6646 path_size = path_entry;
6649 /* Mark block so we won't scan it again later. */
6650 PUT_MODE (NEXT_INSN (p), QImode);
6657 data->low_cuid = low_cuid;
6658 data->high_cuid = high_cuid;
6659 data->nsets = nsets;
6662 /* If all jumps in the path are not taken, set our path length to zero
6663 so a rescan won't be done. */
6664 for (i = path_size - 1; i >= 0; i--)
6665 if (data->path[i].status != NOT_TAKEN)
6669 data->path_size = 0;
6671 data->path_size = path_size;
6673 /* End the current branch path. */
6674 data->path[path_size].branch = 0;
6677 /* Perform cse on the instructions of a function.
6678 F is the first instruction.
6679 NREGS is one plus the highest pseudo-reg number used in the instruction.
6681 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6682 (only if -frerun-cse-after-loop).
6684 Returns 1 if jump_optimize should be redone due to simplifications
6685 in conditional jump instructions. */
6688 cse_main (f, nregs, after_loop, file)
6694 struct cse_basic_block_data val;
6695 register rtx insn = f;
6698 cse_jumps_altered = 0;
6699 recorded_label_ref = 0;
6700 constant_pool_entries_cost = 0;
6704 init_alias_analysis ();
6708 max_insn_uid = get_max_uid ();
6710 reg_eqv_table = (struct reg_eqv_elem *)
6711 xmalloc (nregs * sizeof (struct reg_eqv_elem));
6713 #ifdef LOAD_EXTEND_OP
6715 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6716 and change the code and mode as appropriate. */
6717 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6720 /* Discard all the free elements of the previous function
6721 since they are allocated in the temporarily obstack. */
6722 bzero ((char *) table, sizeof table);
6723 free_element_chain = 0;
6724 n_elements_made = 0;
6726 /* Find the largest uid. */
6728 max_uid = get_max_uid ();
6729 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6731 /* Compute the mapping from uids to cuids.
6732 CUIDs are numbers assigned to insns, like uids,
6733 except that cuids increase monotonically through the code.
6734 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6735 between two insns is not affected by -g. */
6737 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6739 if (GET_CODE (insn) != NOTE
6740 || NOTE_LINE_NUMBER (insn) < 0)
6741 INSN_CUID (insn) = ++i;
6743 /* Give a line number note the same cuid as preceding insn. */
6744 INSN_CUID (insn) = i;
6747 /* Initialize which registers are clobbered by calls. */
6749 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6751 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6752 if ((call_used_regs[i]
6753 /* Used to check !fixed_regs[i] here, but that isn't safe;
6754 fixed regs are still call-clobbered, and sched can get
6755 confused if they can "live across calls".
6757 The frame pointer is always preserved across calls. The arg
6758 pointer is if it is fixed. The stack pointer usually is, unless
6759 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6760 will be present. If we are generating PIC code, the PIC offset
6761 table register is preserved across calls. */
6763 && i != STACK_POINTER_REGNUM
6764 && i != FRAME_POINTER_REGNUM
6765 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6766 && i != HARD_FRAME_POINTER_REGNUM
6768 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6769 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6771 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6772 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6776 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6779 ggc_push_context ();
6781 /* Loop over basic blocks.
6782 Compute the maximum number of qty's needed for each basic block
6783 (which is 2 for each SET). */
6788 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6789 flag_cse_skip_blocks);
6791 /* If this basic block was already processed or has no sets, skip it. */
6792 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6794 PUT_MODE (insn, VOIDmode);
6795 insn = (val.last ? NEXT_INSN (val.last) : 0);
6800 cse_basic_block_start = val.low_cuid;
6801 cse_basic_block_end = val.high_cuid;
6802 max_qty = val.nsets * 2;
6805 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6806 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6809 /* Make MAX_QTY bigger to give us room to optimize
6810 past the end of this basic block, if that should prove useful. */
6816 /* If this basic block is being extended by following certain jumps,
6817 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6818 Otherwise, we start after this basic block. */
6819 if (val.path_size > 0)
6820 cse_basic_block (insn, val.last, val.path, 0);
6823 int old_cse_jumps_altered = cse_jumps_altered;
6826 /* When cse changes a conditional jump to an unconditional
6827 jump, we want to reprocess the block, since it will give
6828 us a new branch path to investigate. */
6829 cse_jumps_altered = 0;
6830 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6831 if (cse_jumps_altered == 0
6832 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6835 cse_jumps_altered |= old_cse_jumps_altered;
6838 if (ggc_p && cse_altered)
6849 if (max_elements_made < n_elements_made)
6850 max_elements_made = n_elements_made;
6853 end_alias_analysis ();
6855 free (reg_eqv_table);
6857 return cse_jumps_altered || recorded_label_ref;
6860 /* Process a single basic block. FROM and TO and the limits of the basic
6861 block. NEXT_BRANCH points to the branch path when following jumps or
6862 a null path when not following jumps.
6864 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
6865 loop. This is true when we are being called for the last time on a
6866 block and this CSE pass is before loop.c. */
6869 cse_basic_block (from, to, next_branch, around_loop)
6870 register rtx from, to;
6871 struct branch_path *next_branch;
6876 rtx libcall_insn = NULL_RTX;
6879 /* This array is undefined before max_reg, so only allocate
6880 the space actually needed and adjust the start. */
6883 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
6884 * sizeof (struct qty_table_elem));
6885 qty_table -= max_reg;
6889 /* TO might be a label. If so, protect it from being deleted. */
6890 if (to != 0 && GET_CODE (to) == CODE_LABEL)
6893 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6895 register enum rtx_code code = GET_CODE (insn);
6897 /* If we have processed 1,000 insns, flush the hash table to
6898 avoid extreme quadratic behavior. We must not include NOTEs
6899 in the count since there may be more of them when generating
6900 debugging information. If we clear the table at different
6901 times, code generated with -g -O might be different than code
6902 generated with -O but not -g.
6904 ??? This is a real kludge and needs to be done some other way.
6906 if (code != NOTE && num_insns++ > 1000)
6908 flush_hash_table ();
6912 /* See if this is a branch that is part of the path. If so, and it is
6913 to be taken, do so. */
6914 if (next_branch->branch == insn)
6916 enum taken status = next_branch++->status;
6917 if (status != NOT_TAKEN)
6919 if (status == TAKEN)
6920 record_jump_equiv (insn, 1);
6922 invalidate_skipped_block (NEXT_INSN (insn));
6924 /* Set the last insn as the jump insn; it doesn't affect cc0.
6925 Then follow this branch. */
6930 insn = JUMP_LABEL (insn);
6935 if (GET_MODE (insn) == QImode)
6936 PUT_MODE (insn, VOIDmode);
6938 if (GET_RTX_CLASS (code) == 'i')
6942 /* Process notes first so we have all notes in canonical forms when
6943 looking for duplicate operations. */
6945 if (REG_NOTES (insn))
6946 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
6948 /* Track when we are inside in LIBCALL block. Inside such a block,
6949 we do not want to record destinations. The last insn of a
6950 LIBCALL block is not considered to be part of the block, since
6951 its destination is the result of the block and hence should be
6954 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6955 libcall_insn = XEXP (p, 0);
6956 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6957 libcall_insn = NULL_RTX;
6959 cse_insn (insn, libcall_insn);
6962 /* If INSN is now an unconditional jump, skip to the end of our
6963 basic block by pretending that we just did the last insn in the
6964 basic block. If we are jumping to the end of our block, show
6965 that we can have one usage of TO. */
6967 if (simplejump_p (insn))
6971 free (qty_table + max_reg);
6975 if (JUMP_LABEL (insn) == to)
6978 /* Maybe TO was deleted because the jump is unconditional.
6979 If so, there is nothing left in this basic block. */
6980 /* ??? Perhaps it would be smarter to set TO
6981 to whatever follows this insn,
6982 and pretend the basic block had always ended here. */
6983 if (INSN_DELETED_P (to))
6986 insn = PREV_INSN (to);
6989 /* See if it is ok to keep on going past the label
6990 which used to end our basic block. Remember that we incremented
6991 the count of that label, so we decrement it here. If we made
6992 a jump unconditional, TO_USAGE will be one; in that case, we don't
6993 want to count the use in that jump. */
6995 if (to != 0 && NEXT_INSN (insn) == to
6996 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
6998 struct cse_basic_block_data val;
7001 insn = NEXT_INSN (to);
7003 /* If TO was the last insn in the function, we are done. */
7006 free (qty_table + max_reg);
7010 /* If TO was preceded by a BARRIER we are done with this block
7011 because it has no continuation. */
7012 prev = prev_nonnote_insn (to);
7013 if (prev && GET_CODE (prev) == BARRIER)
7015 free (qty_table + max_reg);
7019 /* Find the end of the following block. Note that we won't be
7020 following branches in this case. */
7023 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7025 /* If the tables we allocated have enough space left
7026 to handle all the SETs in the next basic block,
7027 continue through it. Otherwise, return,
7028 and that block will be scanned individually. */
7029 if (val.nsets * 2 + next_qty > max_qty)
7032 cse_basic_block_start = val.low_cuid;
7033 cse_basic_block_end = val.high_cuid;
7036 /* Prevent TO from being deleted if it is a label. */
7037 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7040 /* Back up so we process the first insn in the extension. */
7041 insn = PREV_INSN (insn);
7045 if (next_qty > max_qty)
7048 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7049 the previous insn is the only insn that branches to the head of a loop,
7050 we can cse into the loop. Don't do this if we changed the jump
7051 structure of a loop unless we aren't going to be following jumps. */
7053 if ((cse_jumps_altered == 0
7054 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7055 && around_loop && to != 0
7056 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7057 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7058 && JUMP_LABEL (PREV_INSN (to)) != 0
7059 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7060 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7062 free (qty_table + max_reg);
7064 return to ? NEXT_INSN (to) : 0;
7067 /* Count the number of times registers are used (not set) in X.
7068 COUNTS is an array in which we accumulate the count, INCR is how much
7069 we count each register usage.
7071 Don't count a usage of DEST, which is the SET_DEST of a SET which
7072 contains X in its SET_SRC. This is because such a SET does not
7073 modify the liveness of DEST. */
7076 count_reg_usage (x, counts, dest, incr)
7089 switch (code = GET_CODE (x))
7093 counts[REGNO (x)] += incr;
7106 /* If we are clobbering a MEM, mark any registers inside the address
7108 if (GET_CODE (XEXP (x, 0)) == MEM)
7109 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7113 /* Unless we are setting a REG, count everything in SET_DEST. */
7114 if (GET_CODE (SET_DEST (x)) != REG)
7115 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7117 /* If SRC has side-effects, then we can't delete this insn, so the
7118 usage of SET_DEST inside SRC counts.
7120 ??? Strictly-speaking, we might be preserving this insn
7121 because some other SET has side-effects, but that's hard
7122 to do and can't happen now. */
7123 count_reg_usage (SET_SRC (x), counts,
7124 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7129 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7131 /* ... falls through ... */
7134 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7136 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7139 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7144 if (REG_NOTE_KIND (x) == REG_EQUAL
7145 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7146 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7147 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7154 fmt = GET_RTX_FORMAT (code);
7155 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7158 count_reg_usage (XEXP (x, i), counts, dest, incr);
7159 else if (fmt[i] == 'E')
7160 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7161 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7165 /* Scan all the insns and delete any that are dead; i.e., they store a register
7166 that is never used or they copy a register to itself.
7168 This is used to remove insns made obviously dead by cse, loop or other
7169 optimizations. It improves the heuristics in loop since it won't try to
7170 move dead invariants out of loops or make givs for dead quantities. The
7171 remaining passes of the compilation are also sped up. */
7174 delete_trivially_dead_insns (insns, nreg)
7184 int in_libcall = 0, dead_libcall = 0;
7186 /* First count the number of times each register is used. */
7187 counts = (int *) xcalloc (nreg, sizeof (int));
7188 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7189 count_reg_usage (insn, counts, NULL_RTX, 1);
7191 /* Go from the last insn to the first and delete insns that only set unused
7192 registers or copy a register to itself. As we delete an insn, remove
7193 usage counts for registers it uses.
7195 The first jump optimization pass may leave a real insn as the last
7196 insn in the function. We must not skip that insn or we may end
7197 up deleting code that is not really dead. */
7198 insn = get_last_insn ();
7199 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7200 insn = prev_real_insn (insn);
7202 for ( ; insn; insn = prev)
7207 prev = prev_real_insn (insn);
7209 /* Don't delete any insns that are part of a libcall block unless
7210 we can delete the whole libcall block.
7212 Flow or loop might get confused if we did that. Remember
7213 that we are scanning backwards. */
7214 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7220 /* See if there's a REG_EQUAL note on this insn and try to
7221 replace the source with the REG_EQUAL expression.
7223 We assume that insns with REG_RETVALs can only be reg->reg
7224 copies at this point. */
7225 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7228 rtx set = single_set (insn);
7229 rtx new = simplify_rtx (XEXP (note, 0));
7232 new = XEXP (note, 0);
7234 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7237 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7242 else if (in_libcall)
7243 live_insn = ! dead_libcall;
7244 else if (GET_CODE (PATTERN (insn)) == SET)
7246 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7247 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7248 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7249 SET_SRC (PATTERN (insn))))
7253 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7254 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7255 && ((tem = next_nonnote_insn (insn)) == 0
7256 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7257 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7260 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7261 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7262 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7263 || side_effects_p (SET_SRC (PATTERN (insn)))
7264 /* An ADDRESSOF expression can turn into a use of the
7265 internal arg pointer, so always consider the
7266 internal arg pointer live. If it is truly dead,
7267 flow will delete the initializing insn. */
7268 || (SET_DEST (PATTERN (insn))
7269 == current_function_internal_arg_pointer))
7272 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7273 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7275 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7277 if (GET_CODE (elt) == SET)
7279 if ((GET_CODE (SET_DEST (elt)) == REG
7280 || GET_CODE (SET_DEST (elt)) == SUBREG)
7281 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7285 else if (GET_CODE (SET_DEST (elt)) == CC0
7286 && ! side_effects_p (SET_SRC (elt))
7287 && ((tem = next_nonnote_insn (insn)) == 0
7288 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7289 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7292 else if (GET_CODE (SET_DEST (elt)) != REG
7293 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7294 || counts[REGNO (SET_DEST (elt))] != 0
7295 || side_effects_p (SET_SRC (elt))
7296 /* An ADDRESSOF expression can turn into a use of the
7297 internal arg pointer, so always consider the
7298 internal arg pointer live. If it is truly dead,
7299 flow will delete the initializing insn. */
7301 == current_function_internal_arg_pointer))
7304 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7310 /* If this is a dead insn, delete it and show registers in it aren't
7315 count_reg_usage (insn, counts, NULL_RTX, -1);
7319 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))