1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 /* The basic idea of common subexpression elimination is to go
39 through the code, keeping a record of expressions that would
40 have the same value at the current scan point, and replacing
41 expressions encountered with the cheapest equivalent expression.
43 It is too complicated to keep track of the different possibilities
44 when control paths merge; so, at each label, we forget all that is
45 known and start fresh. This can be described as processing each
46 basic block separately. Note, however, that these are not quite
47 the same as the basic blocks found by a later pass and used for
48 data flow analysis and register packing. We do not need to start fresh
49 after a conditional jump instruction if there is no label there.
51 We use two data structures to record the equivalent expressions:
52 a hash table for most expressions, and several vectors together
53 with "quantity numbers" to record equivalent (pseudo) registers.
55 The use of the special data structure for registers is desirable
56 because it is faster. It is possible because registers references
57 contain a fairly small number, the register number, taken from
58 a contiguously allocated series, and two register references are
59 identical if they have the same number. General expressions
60 do not have any such thing, so the only way to retrieve the
61 information recorded on an expression other than a register
62 is to keep it in a hash table.
64 Registers and "quantity numbers":
66 At the start of each basic block, all of the (hardware and pseudo)
67 registers used in the function are given distinct quantity
68 numbers to indicate their contents. During scan, when the code
69 copies one register into another, we copy the quantity number.
70 When a register is loaded in any other way, we allocate a new
71 quantity number to describe the value generated by this operation.
72 `reg_qty' records what quantity a register is currently thought
75 All real quantity numbers are greater than or equal to `max_reg'.
76 If register N has not been assigned a quantity, reg_qty[N] will equal N.
78 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
79 variables should be referenced with an index below `max_reg'.
81 We also maintain a bidirectional chain of registers for each
82 quantity number. `qty_first_reg', `qty_last_reg',
83 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
85 The first register in a chain is the one whose lifespan is least local.
86 Among equals, it is the one that was seen first.
87 We replace any equivalent register with that one.
89 If two registers have the same quantity number, it must be true that
90 REG expressions with `qty_mode' must be in the hash table for both
91 registers and must be in the same class.
93 The converse is not true. Since hard registers may be referenced in
94 any mode, two REG expressions might be equivalent in the hash table
95 but not have the same quantity number if the quantity number of one
96 of the registers is not the same mode as those expressions.
98 Constants and quantity numbers
100 When a quantity has a known constant value, that value is stored
101 in the appropriate element of qty_const. This is in addition to
102 putting the constant in the hash table as is usual for non-regs.
104 Whether a reg or a constant is preferred is determined by the configuration
105 macro CONST_COSTS and will often depend on the constant value. In any
106 event, expressions containing constants can be simplified, by fold_rtx.
108 When a quantity has a known nearly constant value (such as an address
109 of a stack slot), that value is stored in the appropriate element
112 Integer constants don't have a machine mode. However, cse
113 determines the intended machine mode from the destination
114 of the instruction that moves the constant. The machine mode
115 is recorded in the hash table along with the actual RTL
116 constant expression so that different modes are kept separate.
120 To record known equivalences among expressions in general
121 we use a hash table called `table'. It has a fixed number of buckets
122 that contain chains of `struct table_elt' elements for expressions.
123 These chains connect the elements whose expressions have the same
126 Other chains through the same elements connect the elements which
127 currently have equivalent values.
129 Register references in an expression are canonicalized before hashing
130 the expression. This is done using `reg_qty' and `qty_first_reg'.
131 The hash code of a register reference is computed using the quantity
132 number, not the register number.
134 When the value of an expression changes, it is necessary to remove from the
135 hash table not just that expression but all expressions whose values
136 could be different as a result.
138 1. If the value changing is in memory, except in special cases
139 ANYTHING referring to memory could be changed. That is because
140 nobody knows where a pointer does not point.
141 The function `invalidate_memory' removes what is necessary.
143 The special cases are when the address is constant or is
144 a constant plus a fixed register such as the frame pointer
145 or a static chain pointer. When such addresses are stored in,
146 we can tell exactly which other such addresses must be invalidated
147 due to overlap. `invalidate' does this.
148 All expressions that refer to non-constant
149 memory addresses are also invalidated. `invalidate_memory' does this.
151 2. If the value changing is a register, all expressions
152 containing references to that register, and only those,
155 Because searching the entire hash table for expressions that contain
156 a register is very slow, we try to figure out when it isn't necessary.
157 Precisely, this is necessary only when expressions have been
158 entered in the hash table using this register, and then the value has
159 changed, and then another expression wants to be added to refer to
160 the register's new value. This sequence of circumstances is rare
161 within any one basic block.
163 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
164 reg_tick[i] is incremented whenever a value is stored in register i.
165 reg_in_table[i] holds -1 if no references to register i have been
166 entered in the table; otherwise, it contains the value reg_tick[i] had
167 when the references were entered. If we want to enter a reference
168 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
169 Until we want to enter a new entry, the mere fact that the two vectors
170 don't match makes the entries be ignored if anyone tries to match them.
172 Registers themselves are entered in the hash table as well as in
173 the equivalent-register chains. However, the vectors `reg_tick'
174 and `reg_in_table' do not apply to expressions which are simple
175 register references. These expressions are removed from the table
176 immediately when they become invalid, and this can be done even if
177 we do not immediately search for all the expressions that refer to
180 A CLOBBER rtx in an instruction invalidates its operand for further
181 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
182 invalidates everything that resides in memory.
186 Constant expressions that differ only by an additive integer
187 are called related. When a constant expression is put in
188 the table, the related expression with no constant term
189 is also entered. These are made to point at each other
190 so that it is possible to find out if there exists any
191 register equivalent to an expression related to a given expression. */
193 /* One plus largest register number used in this function. */
197 /* One plus largest instruction UID used in this function at time of
200 static int max_insn_uid;
202 /* Length of vectors indexed by quantity number.
203 We know in advance we will not need a quantity number this big. */
207 /* Next quantity number to be allocated.
208 This is 1 + the largest number needed so far. */
212 /* Indexed by quantity number, gives the first (or last) register
213 in the chain of registers that currently contain this quantity. */
215 static int *qty_first_reg;
216 static int *qty_last_reg;
218 /* Index by quantity number, gives the mode of the quantity. */
220 static enum machine_mode *qty_mode;
222 /* Indexed by quantity number, gives the rtx of the constant value of the
223 quantity, or zero if it does not have a known value.
224 A sum of the frame pointer (or arg pointer) plus a constant
225 can also be entered here. */
227 static rtx *qty_const;
229 /* Indexed by qty number, gives the insn that stored the constant value
230 recorded in `qty_const'. */
232 static rtx *qty_const_insn;
234 /* The next three variables are used to track when a comparison between a
235 quantity and some constant or register has been passed. In that case, we
236 know the results of the comparison in case we see it again. These variables
237 record a comparison that is known to be true. */
239 /* Indexed by qty number, gives the rtx code of a comparison with a known
240 result involving this quantity. If none, it is UNKNOWN. */
241 static enum rtx_code *qty_comparison_code;
243 /* Indexed by qty number, gives the constant being compared against in a
244 comparison of known result. If no such comparison, it is undefined.
245 If the comparison is not with a constant, it is zero. */
247 static rtx *qty_comparison_const;
249 /* Indexed by qty number, gives the quantity being compared against in a
250 comparison of known result. If no such comparison, if it undefined.
251 If the comparison is not with a register, it is -1. */
253 static int *qty_comparison_qty;
256 /* For machines that have a CC0, we do not record its value in the hash
257 table since its use is guaranteed to be the insn immediately following
258 its definition and any other insn is presumed to invalidate it.
260 Instead, we store below the value last assigned to CC0. If it should
261 happen to be a constant, it is stored in preference to the actual
262 assigned value. In case it is a constant, we store the mode in which
263 the constant should be interpreted. */
265 static rtx prev_insn_cc0;
266 static enum machine_mode prev_insn_cc0_mode;
269 /* Previous actual insn. 0 if at first insn of basic block. */
271 static rtx prev_insn;
273 /* Insn being scanned. */
275 static rtx this_insn;
277 /* Index by register number, gives the quantity number
278 of the register's current contents. */
282 /* Index by register number, gives the number of the next (or
283 previous) register in the chain of registers sharing the same
286 Or -1 if this register is at the end of the chain.
288 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
290 static int *reg_next_eqv;
291 static int *reg_prev_eqv;
293 /* Index by register number, gives the number of times
294 that register has been altered in the current basic block. */
296 static int *reg_tick;
298 /* Index by register number, gives the reg_tick value at which
299 rtx's containing this register are valid in the hash table.
300 If this does not equal the current reg_tick value, such expressions
301 existing in the hash table are invalid.
302 If this is -1, no expressions containing this register have been
303 entered in the table. */
305 static int *reg_in_table;
307 /* A HARD_REG_SET containing all the hard registers for which there is
308 currently a REG expression in the hash table. Note the difference
309 from the above variables, which indicate if the REG is mentioned in some
310 expression in the table. */
312 static HARD_REG_SET hard_regs_in_table;
314 /* A HARD_REG_SET containing all the hard registers that are invalidated
317 static HARD_REG_SET regs_invalidated_by_call;
319 /* Two vectors of ints:
320 one containing max_reg -1's; the other max_reg + 500 (an approximation
321 for max_qty) elements where element i contains i.
322 These are used to initialize various other vectors fast. */
324 static int *all_minus_one;
325 static int *consec_ints;
327 /* CUID of insn that starts the basic block currently being cse-processed. */
329 static int cse_basic_block_start;
331 /* CUID of insn that ends the basic block currently being cse-processed. */
333 static int cse_basic_block_end;
335 /* Vector mapping INSN_UIDs to cuids.
336 The cuids are like uids but increase monotonically always.
337 We use them to see whether a reg is used outside a given basic block. */
339 static int *uid_cuid;
341 /* Highest UID in UID_CUID. */
344 /* Get the cuid of an insn. */
346 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
348 /* Nonzero if cse has altered conditional jump insns
349 in such a way that jump optimization should be redone. */
351 static int cse_jumps_altered;
353 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
354 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
355 to put in the note. */
356 static int recorded_label_ref;
358 /* canon_hash stores 1 in do_not_record
359 if it notices a reference to CC0, PC, or some other volatile
362 static int do_not_record;
364 #ifdef LOAD_EXTEND_OP
366 /* Scratch rtl used when looking for load-extended copy of a MEM. */
367 static rtx memory_extend_rtx;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory;
375 /* canon_hash stores 1 in hash_arg_in_struct
376 if it notices a reference to memory that's part of a structure. */
378 static int hash_arg_in_struct;
380 /* The hash table contains buckets which are chains of `struct table_elt's,
381 each recording one expression's information.
382 That expression is in the `exp' field.
384 Those elements with the same hash code are chained in both directions
385 through the `next_same_hash' and `prev_same_hash' fields.
387 Each set of expressions with equivalent values
388 are on a two-way chain through the `next_same_value'
389 and `prev_same_value' fields, and all point with
390 the `first_same_value' field at the first element in
391 that chain. The chain is in order of increasing cost.
392 Each element's cost value is in its `cost' field.
394 The `in_memory' field is nonzero for elements that
395 involve any reference to memory. These elements are removed
396 whenever a write is done to an unidentified location in memory.
397 To be safe, we assume that a memory address is unidentified unless
398 the address is either a symbol constant or a constant plus
399 the frame pointer or argument pointer.
401 The `in_struct' field is nonzero for elements that
402 involve any reference to memory inside a structure or array.
404 The `related_value' field is used to connect related expressions
405 (that differ by adding an integer).
406 The related expressions are chained in a circular fashion.
407 `related_value' is zero for expressions for which this
410 The `cost' field stores the cost of this element's expression.
412 The `is_const' flag is set if the element is a constant (including
415 The `flag' field is used as a temporary during some search routines.
417 The `mode' field is usually the same as GET_MODE (`exp'), but
418 if `exp' is a CONST_INT and has no machine mode then the `mode'
419 field is the mode it was being used as. Each constant is
420 recorded separately for each mode it is used with. */
426 struct table_elt *next_same_hash;
427 struct table_elt *prev_same_hash;
428 struct table_elt *next_same_value;
429 struct table_elt *prev_same_value;
430 struct table_elt *first_same_value;
431 struct table_elt *related_value;
433 enum machine_mode mode;
440 /* We don't want a lot of buckets, because we rarely have very many
441 things stored in the hash table, and a lot of buckets slows
442 down a lot of loops that happen frequently. */
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
451 : canon_hash (X, M) % NBUCKETS)
453 /* Determine whether register number N is considered a fixed register for CSE.
454 It is desirable to replace other regs with fixed regs, to reduce need for
456 A reg wins if it is either the frame pointer or designated as fixed,
457 but not if it is an overlapping register. */
458 #ifdef OVERLAPPING_REGNO_P
459 #define FIXED_REGNO_P(N) \
460 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
461 || fixed_regs[N] || global_regs[N]) \
462 && ! OVERLAPPING_REGNO_P ((N)))
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
476 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
477 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
478 || ((N) < FIRST_PSEUDO_REGISTER \
479 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
481 /* A register is cheap if it is a user variable assigned to the register
482 or if its register number always corresponds to a cheap register. */
484 #define CHEAP_REG(N) \
485 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
486 || CHEAP_REGNO (REGNO (N)))
489 (GET_CODE (X) == REG \
490 ? (CHEAP_REG (X) ? 0 \
491 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
495 /* Determine if the quantity number for register X represents a valid index
496 into the `qty_...' variables. */
498 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
501 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
502 during CSE, such nodes are present. Using an ADDRESSOF node which
503 refers to the address of a REG is a good thing because we can then
504 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
505 #define CSE_ADDRESS_COST(RTX) \
506 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
507 ? -1 : ADDRESS_COST(RTX))
510 static struct table_elt *table[NBUCKETS];
512 /* Chain of `struct table_elt's made so far for this function
513 but currently removed from the table. */
515 static struct table_elt *free_element_chain;
517 /* Number of `struct table_elt' structures made so far for this function. */
519 static int n_elements_made;
521 /* Maximum value `n_elements_made' has had so far in this compilation
522 for functions previously processed. */
524 static int max_elements_made;
526 /* Surviving equivalence class when two equivalence classes are merged
527 by recording the effects of a jump in the last insn. Zero if the
528 last insn was not a conditional jump. */
530 static struct table_elt *last_jump_equiv_class;
532 /* Set to the cost of a constant pool reference if one was found for a
533 symbolic constant. If this was found, it means we should try to
534 convert constants into constant pool entries if they don't fit in
537 static int constant_pool_entries_cost;
539 /* Define maximum length of a branch path. */
541 #define PATHLENGTH 10
543 /* This data describes a block that will be processed by cse_basic_block. */
545 struct cse_basic_block_data {
546 /* Lowest CUID value of insns in block. */
548 /* Highest CUID value of insns in block. */
550 /* Total number of SETs in block. */
552 /* Last insn in the block. */
554 /* Size of current branch path, if any. */
556 /* Current branch path, indicating which branches will be taken. */
558 /* The branch insn. */
560 /* Whether it should be taken or not. AROUND is the same as taken
561 except that it is used when the destination label is not preceded
563 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
567 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
568 virtual regs here because the simplify_*_operation routines are called
569 by integrate.c, which is called before virtual register instantiation. */
571 #define FIXED_BASE_PLUS_P(X) \
572 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
573 || (X) == arg_pointer_rtx \
574 || (X) == virtual_stack_vars_rtx \
575 || (X) == virtual_incoming_args_rtx \
576 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
577 && (XEXP (X, 0) == frame_pointer_rtx \
578 || XEXP (X, 0) == hard_frame_pointer_rtx \
579 || XEXP (X, 0) == arg_pointer_rtx \
580 || XEXP (X, 0) == virtual_stack_vars_rtx \
581 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
582 || GET_CODE (X) == ADDRESSOF)
584 /* Similar, but also allows reference to the stack pointer.
586 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
587 arg_pointer_rtx by itself is nonzero, because on at least one machine,
588 the i960, the arg pointer is zero when it is unused. */
590 #define NONZERO_BASE_PLUS_P(X) \
591 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
592 || (X) == virtual_stack_vars_rtx \
593 || (X) == virtual_incoming_args_rtx \
594 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
595 && (XEXP (X, 0) == frame_pointer_rtx \
596 || XEXP (X, 0) == hard_frame_pointer_rtx \
597 || XEXP (X, 0) == arg_pointer_rtx \
598 || XEXP (X, 0) == virtual_stack_vars_rtx \
599 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
600 || (X) == stack_pointer_rtx \
601 || (X) == virtual_stack_dynamic_rtx \
602 || (X) == virtual_outgoing_args_rtx \
603 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
604 && (XEXP (X, 0) == stack_pointer_rtx \
605 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
606 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
607 || GET_CODE (X) == ADDRESSOF)
609 static int notreg_cost PROTO((rtx));
610 static void new_basic_block PROTO((void));
611 static void make_new_qty PROTO((int));
612 static void make_regs_eqv PROTO((int, int));
613 static void delete_reg_equiv PROTO((int));
614 static int mention_regs PROTO((rtx));
615 static int insert_regs PROTO((rtx, struct table_elt *, int));
616 static void free_element PROTO((struct table_elt *));
617 static void remove_from_table PROTO((struct table_elt *, unsigned));
618 static struct table_elt *get_element PROTO((void));
619 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
620 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
621 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
622 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
624 static void merge_equiv_classes PROTO((struct table_elt *,
625 struct table_elt *));
626 static void invalidate PROTO((rtx, enum machine_mode));
627 static int cse_rtx_varies_p PROTO((rtx));
628 static void remove_invalid_refs PROTO((int));
629 static void rehash_using_reg PROTO((rtx));
630 static void invalidate_memory PROTO((void));
631 static void invalidate_for_call PROTO((void));
632 static rtx use_related_value PROTO((rtx, struct table_elt *));
633 static unsigned canon_hash PROTO((rtx, enum machine_mode));
634 static unsigned safe_hash PROTO((rtx, enum machine_mode));
635 static int exp_equiv_p PROTO((rtx, rtx, int, int));
636 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
639 static int refers_to_p PROTO((rtx, rtx));
640 static rtx canon_reg PROTO((rtx, rtx));
641 static void find_best_addr PROTO((rtx, rtx *));
642 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
644 enum machine_mode *));
645 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
647 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
649 static rtx fold_rtx PROTO((rtx, rtx));
650 static rtx equiv_constant PROTO((rtx));
651 static void record_jump_equiv PROTO((rtx, int));
652 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
654 static void cse_insn PROTO((rtx, rtx));
655 static int note_mem_written PROTO((rtx));
656 static void invalidate_from_clobbers PROTO((rtx));
657 static rtx cse_process_notes PROTO((rtx, rtx));
658 static void cse_around_loop PROTO((rtx));
659 static void invalidate_skipped_set PROTO((rtx, rtx));
660 static void invalidate_skipped_block PROTO((rtx));
661 static void cse_check_loop_start PROTO((rtx, rtx));
662 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
663 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
664 static void count_reg_usage PROTO((rtx, int *, rtx, int));
666 extern int rtx_equal_function_value_matters;
668 /* Return an estimate of the cost of computing rtx X.
669 One use is in cse, to decide which expression to keep in the hash table.
670 Another is in rtl generation, to pick the cheapest way to multiply.
671 Other uses like the latter are expected in the future. */
673 /* Internal function, to compute cost when X is not a register; called
674 from COST macro to keep it simple. */
680 return ((GET_CODE (x) == SUBREG
681 && GET_CODE (SUBREG_REG (x)) == REG
682 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
683 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
684 && (GET_MODE_SIZE (GET_MODE (x))
685 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
686 && subreg_lowpart_p (x)
687 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
688 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
689 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
690 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
692 : rtx_cost (x, SET) * 2);
695 /* Return the right cost to give to an operation
696 to make the cost of the corresponding register-to-register instruction
697 N times that of a fast register-to-register instruction. */
699 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
702 rtx_cost (x, outer_code)
704 enum rtx_code outer_code;
707 register enum rtx_code code;
714 /* Compute the default costs of certain things.
715 Note that RTX_COSTS can override the defaults. */
721 /* Count multiplication by 2**n as a shift,
722 because if we are considering it, we would output it as a shift. */
723 if (GET_CODE (XEXP (x, 1)) == CONST_INT
724 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
727 total = COSTS_N_INSNS (5);
733 total = COSTS_N_INSNS (7);
736 /* Used in loop.c and combine.c as a marker. */
740 /* We don't want these to be used in substitutions because
741 we have no way of validating the resulting insn. So assign
742 anything containing an ASM_OPERANDS a very high cost. */
752 return ! CHEAP_REG (x);
755 /* If we can't tie these modes, make this expensive. The larger
756 the mode, the more expensive it is. */
757 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
758 return COSTS_N_INSNS (2
759 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
762 RTX_COSTS (x, code, outer_code);
765 CONST_COSTS (x, code, outer_code);
769 #ifdef DEFAULT_RTX_COSTS
770 DEFAULT_RTX_COSTS(x, code, outer_code);
775 /* Sum the costs of the sub-rtx's, plus cost of this operation,
776 which is already in total. */
778 fmt = GET_RTX_FORMAT (code);
779 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
781 total += rtx_cost (XEXP (x, i), code);
782 else if (fmt[i] == 'E')
783 for (j = 0; j < XVECLEN (x, i); j++)
784 total += rtx_cost (XVECEXP (x, i, j), code);
789 /* Clear the hash table and initialize each register with its own quantity,
790 for a new basic block. */
799 bzero ((char *) reg_tick, max_reg * sizeof (int));
801 bcopy ((char *) all_minus_one, (char *) reg_in_table,
802 max_reg * sizeof (int));
803 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
804 CLEAR_HARD_REG_SET (hard_regs_in_table);
806 /* The per-quantity values used to be initialized here, but it is
807 much faster to initialize each as it is made in `make_new_qty'. */
809 for (i = 0; i < NBUCKETS; i++)
811 register struct table_elt *this, *next;
812 for (this = table[i]; this; this = next)
814 next = this->next_same_hash;
819 bzero ((char *) table, sizeof table);
828 /* Say that register REG contains a quantity not in any register before
829 and initialize that quantity. */
837 if (next_qty >= max_qty)
840 q = reg_qty[reg] = next_qty++;
841 qty_first_reg[q] = reg;
842 qty_last_reg[q] = reg;
843 qty_const[q] = qty_const_insn[q] = 0;
844 qty_comparison_code[q] = UNKNOWN;
846 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
849 /* Make reg NEW equivalent to reg OLD.
850 OLD is not changing; NEW is. */
853 make_regs_eqv (new, old)
854 register int new, old;
856 register int lastr, firstr;
857 register int q = reg_qty[old];
859 /* Nothing should become eqv until it has a "non-invalid" qty number. */
860 if (! REGNO_QTY_VALID_P (old))
864 firstr = qty_first_reg[q];
865 lastr = qty_last_reg[q];
867 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
868 hard regs. Among pseudos, if NEW will live longer than any other reg
869 of the same qty, and that is beyond the current basic block,
870 make it the new canonical replacement for this qty. */
871 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
872 /* Certain fixed registers might be of the class NO_REGS. This means
873 that not only can they not be allocated by the compiler, but
874 they cannot be used in substitutions or canonicalizations
876 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
877 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
878 || (new >= FIRST_PSEUDO_REGISTER
879 && (firstr < FIRST_PSEUDO_REGISTER
880 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
881 || (uid_cuid[REGNO_FIRST_UID (new)]
882 < cse_basic_block_start))
883 && (uid_cuid[REGNO_LAST_UID (new)]
884 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
886 reg_prev_eqv[firstr] = new;
887 reg_next_eqv[new] = firstr;
888 reg_prev_eqv[new] = -1;
889 qty_first_reg[q] = new;
893 /* If NEW is a hard reg (known to be non-fixed), insert at end.
894 Otherwise, insert before any non-fixed hard regs that are at the
895 end. Registers of class NO_REGS cannot be used as an
896 equivalent for anything. */
897 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
898 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
899 && new >= FIRST_PSEUDO_REGISTER)
900 lastr = reg_prev_eqv[lastr];
901 reg_next_eqv[new] = reg_next_eqv[lastr];
902 if (reg_next_eqv[lastr] >= 0)
903 reg_prev_eqv[reg_next_eqv[lastr]] = new;
905 qty_last_reg[q] = new;
906 reg_next_eqv[lastr] = new;
907 reg_prev_eqv[new] = lastr;
911 /* Remove REG from its equivalence class. */
914 delete_reg_equiv (reg)
917 register int q = reg_qty[reg];
920 /* If invalid, do nothing. */
924 p = reg_prev_eqv[reg];
925 n = reg_next_eqv[reg];
934 qty_first_reg[q] = n;
939 /* Remove any invalid expressions from the hash table
940 that refer to any of the registers contained in expression X.
942 Make sure that newly inserted references to those registers
943 as subexpressions will be considered valid.
945 mention_regs is not called when a register itself
946 is being stored in the table.
948 Return 1 if we have done something that may have changed the hash code
955 register enum rtx_code code;
958 register int changed = 0;
966 register int regno = REGNO (x);
967 register int endregno
968 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
969 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
972 for (i = regno; i < endregno; i++)
974 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
975 remove_invalid_refs (i);
977 reg_in_table[i] = reg_tick[i];
983 /* If X is a comparison or a COMPARE and either operand is a register
984 that does not have a quantity, give it one. This is so that a later
985 call to record_jump_equiv won't cause X to be assigned a different
986 hash code and not found in the table after that call.
988 It is not necessary to do this here, since rehash_using_reg can
989 fix up the table later, but doing this here eliminates the need to
990 call that expensive function in the most common case where the only
991 use of the register is in the comparison. */
993 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
995 if (GET_CODE (XEXP (x, 0)) == REG
996 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
997 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
999 rehash_using_reg (XEXP (x, 0));
1003 if (GET_CODE (XEXP (x, 1)) == REG
1004 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1005 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1007 rehash_using_reg (XEXP (x, 1));
1012 fmt = GET_RTX_FORMAT (code);
1013 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1015 changed |= mention_regs (XEXP (x, i));
1016 else if (fmt[i] == 'E')
1017 for (j = 0; j < XVECLEN (x, i); j++)
1018 changed |= mention_regs (XVECEXP (x, i, j));
1023 /* Update the register quantities for inserting X into the hash table
1024 with a value equivalent to CLASSP.
1025 (If the class does not contain a REG, it is irrelevant.)
1026 If MODIFIED is nonzero, X is a destination; it is being modified.
1027 Note that delete_reg_equiv should be called on a register
1028 before insert_regs is done on that register with MODIFIED != 0.
1030 Nonzero value means that elements of reg_qty have changed
1031 so X's hash code may be different. */
1034 insert_regs (x, classp, modified)
1036 struct table_elt *classp;
1039 if (GET_CODE (x) == REG)
1041 register int regno = REGNO (x);
1043 /* If REGNO is in the equivalence table already but is of the
1044 wrong mode for that equivalence, don't do anything here. */
1046 if (REGNO_QTY_VALID_P (regno)
1047 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1050 if (modified || ! REGNO_QTY_VALID_P (regno))
1053 for (classp = classp->first_same_value;
1055 classp = classp->next_same_value)
1056 if (GET_CODE (classp->exp) == REG
1057 && GET_MODE (classp->exp) == GET_MODE (x))
1059 make_regs_eqv (regno, REGNO (classp->exp));
1063 make_new_qty (regno);
1064 qty_mode[reg_qty[regno]] = GET_MODE (x);
1071 /* If X is a SUBREG, we will likely be inserting the inner register in the
1072 table. If that register doesn't have an assigned quantity number at
1073 this point but does later, the insertion that we will be doing now will
1074 not be accessible because its hash code will have changed. So assign
1075 a quantity number now. */
1077 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1078 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1080 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1081 mention_regs (SUBREG_REG (x));
1085 return mention_regs (x);
1088 /* Look in or update the hash table. */
1090 /* Put the element ELT on the list of free elements. */
1094 struct table_elt *elt;
1096 elt->next_same_hash = free_element_chain;
1097 free_element_chain = elt;
1100 /* Return an element that is free for use. */
1102 static struct table_elt *
1105 struct table_elt *elt = free_element_chain;
1108 free_element_chain = elt->next_same_hash;
1112 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1115 /* Remove table element ELT from use in the table.
1116 HASH is its hash code, made using the HASH macro.
1117 It's an argument because often that is known in advance
1118 and we save much time not recomputing it. */
1121 remove_from_table (elt, hash)
1122 register struct table_elt *elt;
1128 /* Mark this element as removed. See cse_insn. */
1129 elt->first_same_value = 0;
1131 /* Remove the table element from its equivalence class. */
1134 register struct table_elt *prev = elt->prev_same_value;
1135 register struct table_elt *next = elt->next_same_value;
1137 if (next) next->prev_same_value = prev;
1140 prev->next_same_value = next;
1143 register struct table_elt *newfirst = next;
1146 next->first_same_value = newfirst;
1147 next = next->next_same_value;
1152 /* Remove the table element from its hash bucket. */
1155 register struct table_elt *prev = elt->prev_same_hash;
1156 register struct table_elt *next = elt->next_same_hash;
1158 if (next) next->prev_same_hash = prev;
1161 prev->next_same_hash = next;
1162 else if (table[hash] == elt)
1166 /* This entry is not in the proper hash bucket. This can happen
1167 when two classes were merged by `merge_equiv_classes'. Search
1168 for the hash bucket that it heads. This happens only very
1169 rarely, so the cost is acceptable. */
1170 for (hash = 0; hash < NBUCKETS; hash++)
1171 if (table[hash] == elt)
1176 /* Remove the table element from its related-value circular chain. */
1178 if (elt->related_value != 0 && elt->related_value != elt)
1180 register struct table_elt *p = elt->related_value;
1181 while (p->related_value != elt)
1182 p = p->related_value;
1183 p->related_value = elt->related_value;
1184 if (p->related_value == p)
1185 p->related_value = 0;
1191 /* Look up X in the hash table and return its table element,
1192 or 0 if X is not in the table.
1194 MODE is the machine-mode of X, or if X is an integer constant
1195 with VOIDmode then MODE is the mode with which X will be used.
1197 Here we are satisfied to find an expression whose tree structure
1200 static struct table_elt *
1201 lookup (x, hash, mode)
1204 enum machine_mode mode;
1206 register struct table_elt *p;
1208 for (p = table[hash]; p; p = p->next_same_hash)
1209 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1210 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1216 /* Like `lookup' but don't care whether the table element uses invalid regs.
1217 Also ignore discrepancies in the machine mode of a register. */
1219 static struct table_elt *
1220 lookup_for_remove (x, hash, mode)
1223 enum machine_mode mode;
1225 register struct table_elt *p;
1227 if (GET_CODE (x) == REG)
1229 int regno = REGNO (x);
1230 /* Don't check the machine mode when comparing registers;
1231 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1232 for (p = table[hash]; p; p = p->next_same_hash)
1233 if (GET_CODE (p->exp) == REG
1234 && REGNO (p->exp) == regno)
1239 for (p = table[hash]; p; p = p->next_same_hash)
1240 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1247 /* Look for an expression equivalent to X and with code CODE.
1248 If one is found, return that expression. */
1251 lookup_as_function (x, code)
1255 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1260 for (p = p->first_same_value; p; p = p->next_same_value)
1262 if (GET_CODE (p->exp) == code
1263 /* Make sure this is a valid entry in the table. */
1264 && exp_equiv_p (p->exp, p->exp, 1, 0))
1271 /* Insert X in the hash table, assuming HASH is its hash code
1272 and CLASSP is an element of the class it should go in
1273 (or 0 if a new class should be made).
1274 It is inserted at the proper position to keep the class in
1275 the order cheapest first.
1277 MODE is the machine-mode of X, or if X is an integer constant
1278 with VOIDmode then MODE is the mode with which X will be used.
1280 For elements of equal cheapness, the most recent one
1281 goes in front, except that the first element in the list
1282 remains first unless a cheaper element is added. The order of
1283 pseudo-registers does not matter, as canon_reg will be called to
1284 find the cheapest when a register is retrieved from the table.
1286 The in_memory field in the hash table element is set to 0.
1287 The caller must set it nonzero if appropriate.
1289 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1290 and if insert_regs returns a nonzero value
1291 you must then recompute its hash code before calling here.
1293 If necessary, update table showing constant values of quantities. */
1295 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1297 static struct table_elt *
1298 insert (x, classp, hash, mode)
1300 register struct table_elt *classp;
1302 enum machine_mode mode;
1304 register struct table_elt *elt;
1306 /* If X is a register and we haven't made a quantity for it,
1307 something is wrong. */
1308 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1311 /* If X is a hard register, show it is being put in the table. */
1312 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1314 int regno = REGNO (x);
1315 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1318 for (i = regno; i < endregno; i++)
1319 SET_HARD_REG_BIT (hard_regs_in_table, i);
1322 /* If X is a label, show we recorded it. */
1323 if (GET_CODE (x) == LABEL_REF
1324 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1325 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1326 recorded_label_ref = 1;
1328 /* Put an element for X into the right hash bucket. */
1330 elt = get_element ();
1332 elt->cost = COST (x);
1333 elt->next_same_value = 0;
1334 elt->prev_same_value = 0;
1335 elt->next_same_hash = table[hash];
1336 elt->prev_same_hash = 0;
1337 elt->related_value = 0;
1340 elt->is_const = (CONSTANT_P (x)
1341 /* GNU C++ takes advantage of this for `this'
1342 (and other const values). */
1343 || (RTX_UNCHANGING_P (x)
1344 && GET_CODE (x) == REG
1345 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1346 || FIXED_BASE_PLUS_P (x));
1349 table[hash]->prev_same_hash = elt;
1352 /* Put it into the proper value-class. */
1355 classp = classp->first_same_value;
1356 if (CHEAPER (elt, classp))
1357 /* Insert at the head of the class */
1359 register struct table_elt *p;
1360 elt->next_same_value = classp;
1361 classp->prev_same_value = elt;
1362 elt->first_same_value = elt;
1364 for (p = classp; p; p = p->next_same_value)
1365 p->first_same_value = elt;
1369 /* Insert not at head of the class. */
1370 /* Put it after the last element cheaper than X. */
1371 register struct table_elt *p, *next;
1372 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1374 /* Put it after P and before NEXT. */
1375 elt->next_same_value = next;
1377 next->prev_same_value = elt;
1378 elt->prev_same_value = p;
1379 p->next_same_value = elt;
1380 elt->first_same_value = classp;
1384 elt->first_same_value = elt;
1386 /* If this is a constant being set equivalent to a register or a register
1387 being set equivalent to a constant, note the constant equivalence.
1389 If this is a constant, it cannot be equivalent to a different constant,
1390 and a constant is the only thing that can be cheaper than a register. So
1391 we know the register is the head of the class (before the constant was
1394 If this is a register that is not already known equivalent to a
1395 constant, we must check the entire class.
1397 If this is a register that is already known equivalent to an insn,
1398 update `qty_const_insn' to show that `this_insn' is the latest
1399 insn making that quantity equivalent to the constant. */
1401 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1402 && GET_CODE (x) != REG)
1404 qty_const[reg_qty[REGNO (classp->exp)]]
1405 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1406 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1409 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]
1412 register struct table_elt *p;
1414 for (p = classp; p != 0; p = p->next_same_value)
1416 if (p->is_const && GET_CODE (p->exp) != REG)
1418 qty_const[reg_qty[REGNO (x)]]
1419 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1420 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1426 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1427 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1428 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1430 /* If this is a constant with symbolic value,
1431 and it has a term with an explicit integer value,
1432 link it up with related expressions. */
1433 if (GET_CODE (x) == CONST)
1435 rtx subexp = get_related_value (x);
1437 struct table_elt *subelt, *subelt_prev;
1441 /* Get the integer-free subexpression in the hash table. */
1442 subhash = safe_hash (subexp, mode) % NBUCKETS;
1443 subelt = lookup (subexp, subhash, mode);
1445 subelt = insert (subexp, NULL_PTR, subhash, mode);
1446 /* Initialize SUBELT's circular chain if it has none. */
1447 if (subelt->related_value == 0)
1448 subelt->related_value = subelt;
1449 /* Find the element in the circular chain that precedes SUBELT. */
1450 subelt_prev = subelt;
1451 while (subelt_prev->related_value != subelt)
1452 subelt_prev = subelt_prev->related_value;
1453 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1454 This way the element that follows SUBELT is the oldest one. */
1455 elt->related_value = subelt_prev->related_value;
1456 subelt_prev->related_value = elt;
1463 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1464 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1465 the two classes equivalent.
1467 CLASS1 will be the surviving class; CLASS2 should not be used after this
1470 Any invalid entries in CLASS2 will not be copied. */
1473 merge_equiv_classes (class1, class2)
1474 struct table_elt *class1, *class2;
1476 struct table_elt *elt, *next, *new;
1478 /* Ensure we start with the head of the classes. */
1479 class1 = class1->first_same_value;
1480 class2 = class2->first_same_value;
1482 /* If they were already equal, forget it. */
1483 if (class1 == class2)
1486 for (elt = class2; elt; elt = next)
1490 enum machine_mode mode = elt->mode;
1492 next = elt->next_same_value;
1494 /* Remove old entry, make a new one in CLASS1's class.
1495 Don't do this for invalid entries as we cannot find their
1496 hash code (it also isn't necessary). */
1497 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1499 hash_arg_in_memory = 0;
1500 hash_arg_in_struct = 0;
1501 hash = HASH (exp, mode);
1503 if (GET_CODE (exp) == REG)
1504 delete_reg_equiv (REGNO (exp));
1506 remove_from_table (elt, hash);
1508 if (insert_regs (exp, class1, 0))
1510 rehash_using_reg (exp);
1511 hash = HASH (exp, mode);
1513 new = insert (exp, class1, hash, mode);
1514 new->in_memory = hash_arg_in_memory;
1515 new->in_struct = hash_arg_in_struct;
1520 /* Remove from the hash table, or mark as invalid,
1521 all expressions whose values could be altered by storing in X.
1522 X is a register, a subreg, or a memory reference with nonvarying address
1523 (because, when a memory reference with a varying address is stored in,
1524 all memory references are removed by invalidate_memory
1525 so specific invalidation is superfluous).
1526 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1527 instead of just the amount indicated by the mode of X. This is only used
1528 for bitfield stores into memory.
1530 A nonvarying address may be just a register or just
1531 a symbol reference, or it may be either of those plus
1532 a numeric offset. */
1535 invalidate (x, full_mode)
1537 enum machine_mode full_mode;
1540 register struct table_elt *p;
1542 /* If X is a register, dependencies on its contents
1543 are recorded through the qty number mechanism.
1544 Just change the qty number of the register,
1545 mark it as invalid for expressions that refer to it,
1546 and remove it itself. */
1548 if (GET_CODE (x) == REG)
1550 register int regno = REGNO (x);
1551 register unsigned hash = HASH (x, GET_MODE (x));
1553 /* Remove REGNO from any quantity list it might be on and indicate
1554 that its value might have changed. If it is a pseudo, remove its
1555 entry from the hash table.
1557 For a hard register, we do the first two actions above for any
1558 additional hard registers corresponding to X. Then, if any of these
1559 registers are in the table, we must remove any REG entries that
1560 overlap these registers. */
1562 delete_reg_equiv (regno);
1565 if (regno >= FIRST_PSEUDO_REGISTER)
1567 /* Because a register can be referenced in more than one mode,
1568 we might have to remove more than one table entry. */
1570 struct table_elt *elt;
1572 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1573 remove_from_table (elt, hash);
1577 HOST_WIDE_INT in_table
1578 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1579 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1580 int tregno, tendregno;
1581 register struct table_elt *p, *next;
1583 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1585 for (i = regno + 1; i < endregno; i++)
1587 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1588 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1589 delete_reg_equiv (i);
1594 for (hash = 0; hash < NBUCKETS; hash++)
1595 for (p = table[hash]; p; p = next)
1597 next = p->next_same_hash;
1599 if (GET_CODE (p->exp) != REG
1600 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1603 tregno = REGNO (p->exp);
1605 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1606 if (tendregno > regno && tregno < endregno)
1607 remove_from_table (p, hash);
1614 if (GET_CODE (x) == SUBREG)
1616 if (GET_CODE (SUBREG_REG (x)) != REG)
1618 invalidate (SUBREG_REG (x), VOIDmode);
1622 /* If X is a parallel, invalidate all of its elements. */
1624 if (GET_CODE (x) == PARALLEL)
1626 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1627 invalidate (XVECEXP (x, 0, i), VOIDmode);
1631 /* If X is an expr_list, this is part of a disjoint return value;
1632 extract the location in question ignoring the offset. */
1634 if (GET_CODE (x) == EXPR_LIST)
1636 invalidate (XEXP (x, 0), VOIDmode);
1640 /* X is not a register; it must be a memory reference with
1641 a nonvarying address. Remove all hash table elements
1642 that refer to overlapping pieces of memory. */
1644 if (GET_CODE (x) != MEM)
1647 if (full_mode == VOIDmode)
1648 full_mode = GET_MODE (x);
1650 for (i = 0; i < NBUCKETS; i++)
1652 register struct table_elt *next;
1653 for (p = table[i]; p; p = next)
1655 next = p->next_same_hash;
1656 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1657 than checking all the aliases). */
1659 && (GET_CODE (p->exp) != MEM
1660 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1661 remove_from_table (p, i);
1666 /* Remove all expressions that refer to register REGNO,
1667 since they are already invalid, and we are about to
1668 mark that register valid again and don't want the old
1669 expressions to reappear as valid. */
1672 remove_invalid_refs (regno)
1676 register struct table_elt *p, *next;
1678 for (i = 0; i < NBUCKETS; i++)
1679 for (p = table[i]; p; p = next)
1681 next = p->next_same_hash;
1682 if (GET_CODE (p->exp) != REG
1683 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1684 remove_from_table (p, i);
1688 /* Recompute the hash codes of any valid entries in the hash table that
1689 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1691 This is called when we make a jump equivalence. */
1694 rehash_using_reg (x)
1698 struct table_elt *p, *next;
1701 if (GET_CODE (x) == SUBREG)
1704 /* If X is not a register or if the register is known not to be in any
1705 valid entries in the table, we have no work to do. */
1707 if (GET_CODE (x) != REG
1708 || reg_in_table[REGNO (x)] < 0
1709 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1712 /* Scan all hash chains looking for valid entries that mention X.
1713 If we find one and it is in the wrong hash chain, move it. We can skip
1714 objects that are registers, since they are handled specially. */
1716 for (i = 0; i < NBUCKETS; i++)
1717 for (p = table[i]; p; p = next)
1719 next = p->next_same_hash;
1720 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1721 && exp_equiv_p (p->exp, p->exp, 1, 0)
1722 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1724 if (p->next_same_hash)
1725 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1727 if (p->prev_same_hash)
1728 p->prev_same_hash->next_same_hash = p->next_same_hash;
1730 table[i] = p->next_same_hash;
1732 p->next_same_hash = table[hash];
1733 p->prev_same_hash = 0;
1735 table[hash]->prev_same_hash = p;
1741 /* Remove from the hash table any expression that is a call-clobbered
1742 register. Also update their TICK values. */
1745 invalidate_for_call ()
1747 int regno, endregno;
1750 struct table_elt *p, *next;
1753 /* Go through all the hard registers. For each that is clobbered in
1754 a CALL_INSN, remove the register from quantity chains and update
1755 reg_tick if defined. Also see if any of these registers is currently
1758 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1759 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1761 delete_reg_equiv (regno);
1762 if (reg_tick[regno] >= 0)
1765 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1768 /* In the case where we have no call-clobbered hard registers in the
1769 table, we are done. Otherwise, scan the table and remove any
1770 entry that overlaps a call-clobbered register. */
1773 for (hash = 0; hash < NBUCKETS; hash++)
1774 for (p = table[hash]; p; p = next)
1776 next = p->next_same_hash;
1780 remove_from_table (p, hash);
1784 if (GET_CODE (p->exp) != REG
1785 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1788 regno = REGNO (p->exp);
1789 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1791 for (i = regno; i < endregno; i++)
1792 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1794 remove_from_table (p, hash);
1800 /* Given an expression X of type CONST,
1801 and ELT which is its table entry (or 0 if it
1802 is not in the hash table),
1803 return an alternate expression for X as a register plus integer.
1804 If none can be found, return 0. */
1807 use_related_value (x, elt)
1809 struct table_elt *elt;
1811 register struct table_elt *relt = 0;
1812 register struct table_elt *p, *q;
1813 HOST_WIDE_INT offset;
1815 /* First, is there anything related known?
1816 If we have a table element, we can tell from that.
1817 Otherwise, must look it up. */
1819 if (elt != 0 && elt->related_value != 0)
1821 else if (elt == 0 && GET_CODE (x) == CONST)
1823 rtx subexp = get_related_value (x);
1825 relt = lookup (subexp,
1826 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1833 /* Search all related table entries for one that has an
1834 equivalent register. */
1839 /* This loop is strange in that it is executed in two different cases.
1840 The first is when X is already in the table. Then it is searching
1841 the RELATED_VALUE list of X's class (RELT). The second case is when
1842 X is not in the table. Then RELT points to a class for the related
1845 Ensure that, whatever case we are in, that we ignore classes that have
1846 the same value as X. */
1848 if (rtx_equal_p (x, p->exp))
1851 for (q = p->first_same_value; q; q = q->next_same_value)
1852 if (GET_CODE (q->exp) == REG)
1858 p = p->related_value;
1860 /* We went all the way around, so there is nothing to be found.
1861 Alternatively, perhaps RELT was in the table for some other reason
1862 and it has no related values recorded. */
1863 if (p == relt || p == 0)
1870 offset = (get_integer_term (x) - get_integer_term (p->exp));
1871 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1872 return plus_constant (q->exp, offset);
1875 /* Hash an rtx. We are careful to make sure the value is never negative.
1876 Equivalent registers hash identically.
1877 MODE is used in hashing for CONST_INTs only;
1878 otherwise the mode of X is used.
1880 Store 1 in do_not_record if any subexpression is volatile.
1882 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1883 which does not have the RTX_UNCHANGING_P bit set.
1884 In this case, also store 1 in hash_arg_in_struct
1885 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1887 Note that cse_insn knows that the hash code of a MEM expression
1888 is just (int) MEM plus the hash code of the address. */
1891 canon_hash (x, mode)
1893 enum machine_mode mode;
1896 register unsigned hash = 0;
1897 register enum rtx_code code;
1900 /* repeat is used to turn tail-recursion into iteration. */
1905 code = GET_CODE (x);
1910 register int regno = REGNO (x);
1912 /* On some machines, we can't record any non-fixed hard register,
1913 because extending its life will cause reload problems. We
1914 consider ap, fp, and sp to be fixed for this purpose.
1915 On all machines, we can't record any global registers. */
1917 if (regno < FIRST_PSEUDO_REGISTER
1918 && (global_regs[regno]
1919 || (SMALL_REGISTER_CLASSES
1920 && ! fixed_regs[regno]
1921 && regno != FRAME_POINTER_REGNUM
1922 && regno != HARD_FRAME_POINTER_REGNUM
1923 && regno != ARG_POINTER_REGNUM
1924 && regno != STACK_POINTER_REGNUM)))
1929 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
1935 unsigned HOST_WIDE_INT tem = INTVAL (x);
1936 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
1941 /* This is like the general case, except that it only counts
1942 the integers representing the constant. */
1943 hash += (unsigned) code + (unsigned) GET_MODE (x);
1944 if (GET_MODE (x) != VOIDmode)
1945 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1947 unsigned tem = XINT (x, i);
1951 hash += ((unsigned) CONST_DOUBLE_LOW (x)
1952 + (unsigned) CONST_DOUBLE_HIGH (x));
1955 /* Assume there is only one rtx object for any given label. */
1958 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
1963 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
1967 if (MEM_VOLATILE_P (x))
1972 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
1974 hash_arg_in_memory = 1;
1975 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1977 /* Now that we have already found this special case,
1978 might as well speed it up as much as possible. */
1979 hash += (unsigned) MEM;
1990 case UNSPEC_VOLATILE:
1995 if (MEM_VOLATILE_P (x))
2006 i = GET_RTX_LENGTH (code) - 1;
2007 hash += (unsigned) code + (unsigned) GET_MODE (x);
2008 fmt = GET_RTX_FORMAT (code);
2013 rtx tem = XEXP (x, i);
2015 /* If we are about to do the last recursive call
2016 needed at this level, change it into iteration.
2017 This function is called enough to be worth it. */
2023 hash += canon_hash (tem, 0);
2025 else if (fmt[i] == 'E')
2026 for (j = 0; j < XVECLEN (x, i); j++)
2027 hash += canon_hash (XVECEXP (x, i, j), 0);
2028 else if (fmt[i] == 's')
2030 register unsigned char *p = (unsigned char *) XSTR (x, i);
2035 else if (fmt[i] == 'i')
2037 register unsigned tem = XINT (x, i);
2040 else if (fmt[i] == '0')
2048 /* Like canon_hash but with no side effects. */
2053 enum machine_mode mode;
2055 int save_do_not_record = do_not_record;
2056 int save_hash_arg_in_memory = hash_arg_in_memory;
2057 int save_hash_arg_in_struct = hash_arg_in_struct;
2058 unsigned hash = canon_hash (x, mode);
2059 hash_arg_in_memory = save_hash_arg_in_memory;
2060 hash_arg_in_struct = save_hash_arg_in_struct;
2061 do_not_record = save_do_not_record;
2065 /* Return 1 iff X and Y would canonicalize into the same thing,
2066 without actually constructing the canonicalization of either one.
2067 If VALIDATE is nonzero,
2068 we assume X is an expression being processed from the rtl
2069 and Y was found in the hash table. We check register refs
2070 in Y for being marked as valid.
2072 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2073 that is known to be in the register. Ordinarily, we don't allow them
2074 to match, because letting them match would cause unpredictable results
2075 in all the places that search a hash table chain for an equivalent
2076 for a given value. A possible equivalent that has different structure
2077 has its hash code computed from different data. Whether the hash code
2078 is the same as that of the given value is pure luck. */
2081 exp_equiv_p (x, y, validate, equal_values)
2087 register enum rtx_code code;
2090 /* Note: it is incorrect to assume an expression is equivalent to itself
2091 if VALIDATE is nonzero. */
2092 if (x == y && !validate)
2094 if (x == 0 || y == 0)
2097 code = GET_CODE (x);
2098 if (code != GET_CODE (y))
2103 /* If X is a constant and Y is a register or vice versa, they may be
2104 equivalent. We only have to validate if Y is a register. */
2105 if (CONSTANT_P (x) && GET_CODE (y) == REG
2106 && REGNO_QTY_VALID_P (REGNO (y))
2107 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2108 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2109 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2112 if (CONSTANT_P (y) && code == REG
2113 && REGNO_QTY_VALID_P (REGNO (x))
2114 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2115 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2121 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2122 if (GET_MODE (x) != GET_MODE (y))
2132 return INTVAL (x) == INTVAL (y);
2135 return XEXP (x, 0) == XEXP (y, 0);
2138 return XSTR (x, 0) == XSTR (y, 0);
2142 int regno = REGNO (y);
2144 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2145 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2148 /* If the quantities are not the same, the expressions are not
2149 equivalent. If there are and we are not to validate, they
2150 are equivalent. Otherwise, ensure all regs are up-to-date. */
2152 if (reg_qty[REGNO (x)] != reg_qty[regno])
2158 for (i = regno; i < endregno; i++)
2159 if (reg_in_table[i] != reg_tick[i])
2165 /* For commutative operations, check both orders. */
2173 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2174 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2175 validate, equal_values))
2176 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2177 validate, equal_values)
2178 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2179 validate, equal_values)));
2185 /* Compare the elements. If any pair of corresponding elements
2186 fail to match, return 0 for the whole things. */
2188 fmt = GET_RTX_FORMAT (code);
2189 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2194 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2199 if (XVECLEN (x, i) != XVECLEN (y, i))
2201 for (j = 0; j < XVECLEN (x, i); j++)
2202 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2203 validate, equal_values))
2208 if (strcmp (XSTR (x, i), XSTR (y, i)))
2213 if (XINT (x, i) != XINT (y, i))
2218 if (XWINT (x, i) != XWINT (y, i))
2233 /* Return 1 iff any subexpression of X matches Y.
2234 Here we do not require that X or Y be valid (for registers referred to)
2235 for being in the hash table. */
2242 register enum rtx_code code;
2248 if (x == 0 || y == 0)
2251 code = GET_CODE (x);
2252 /* If X as a whole has the same code as Y, they may match.
2254 if (code == GET_CODE (y))
2256 if (exp_equiv_p (x, y, 0, 1))
2260 /* X does not match, so try its subexpressions. */
2262 fmt = GET_RTX_FORMAT (code);
2263 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2272 if (refers_to_p (XEXP (x, i), y))
2275 else if (fmt[i] == 'E')
2278 for (j = 0; j < XVECLEN (x, i); j++)
2279 if (refers_to_p (XVECEXP (x, i, j), y))
2286 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2287 set PBASE, PSTART, and PEND which correspond to the base of the address,
2288 the starting offset, and ending offset respectively.
2290 ADDR is known to be a nonvarying address. */
2292 /* ??? Despite what the comments say, this function is in fact frequently
2293 passed varying addresses. This does not appear to cause any problems. */
2296 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2300 HOST_WIDE_INT *pstart, *pend;
2303 HOST_WIDE_INT start, end;
2309 if (flag_pic && GET_CODE (base) == PLUS
2310 && XEXP (base, 0) == pic_offset_table_rtx)
2311 base = XEXP (base, 1);
2313 /* Registers with nonvarying addresses usually have constant equivalents;
2314 but the frame pointer register is also possible. */
2315 if (GET_CODE (base) == REG
2317 && REGNO_QTY_VALID_P (REGNO (base))
2318 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2319 && qty_const[reg_qty[REGNO (base)]] != 0)
2320 base = qty_const[reg_qty[REGNO (base)]];
2321 else if (GET_CODE (base) == PLUS
2322 && GET_CODE (XEXP (base, 1)) == CONST_INT
2323 && GET_CODE (XEXP (base, 0)) == REG
2325 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2326 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2327 == GET_MODE (XEXP (base, 0)))
2328 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2330 start = INTVAL (XEXP (base, 1));
2331 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2333 /* This can happen as the result of virtual register instantiation,
2334 if the initial offset is too large to be a valid address. */
2335 else if (GET_CODE (base) == PLUS
2336 && GET_CODE (XEXP (base, 0)) == REG
2337 && GET_CODE (XEXP (base, 1)) == REG
2339 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2340 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2341 == GET_MODE (XEXP (base, 0)))
2342 && qty_const[reg_qty[REGNO (XEXP (base, 0))]]
2343 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2344 && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]]
2345 == GET_MODE (XEXP (base, 1)))
2346 && qty_const[reg_qty[REGNO (XEXP (base, 1))]])
2348 rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]];
2349 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2351 /* One of the two values must be a constant. */
2352 if (GET_CODE (base) != CONST_INT)
2354 if (GET_CODE (tem) != CONST_INT)
2356 start = INTVAL (tem);
2360 start = INTVAL (base);
2365 /* Handle everything that we can find inside an address that has been
2366 viewed as constant. */
2370 /* If no part of this switch does a "continue", the code outside
2371 will exit this loop. */
2373 switch (GET_CODE (base))
2376 /* By definition, operand1 of a LO_SUM is the associated constant
2377 address. Use the associated constant address as the base
2379 base = XEXP (base, 1);
2383 /* Strip off CONST. */
2384 base = XEXP (base, 0);
2388 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2390 start += INTVAL (XEXP (base, 1));
2391 base = XEXP (base, 0);
2397 /* Handle the case of an AND which is the negative of a power of
2398 two. This is used to represent unaligned memory operations. */
2399 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2400 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2402 set_nonvarying_address_components (XEXP (base, 0), size,
2403 pbase, pstart, pend);
2405 /* Assume the worst misalignment. START is affected, but not
2406 END, so compensate but adjusting SIZE. Don't lose any
2407 constant we already had. */
2409 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2410 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2423 if (GET_CODE (base) == CONST_INT)
2425 start += INTVAL (base);
2431 /* Set the return values. */
2437 /* Return 1 if X has a value that can vary even between two
2438 executions of the program. 0 means X can be compared reliably
2439 against certain constants or near-constants. */
2442 cse_rtx_varies_p (x)
2445 /* We need not check for X and the equivalence class being of the same
2446 mode because if X is equivalent to a constant in some mode, it
2447 doesn't vary in any mode. */
2449 if (GET_CODE (x) == REG
2450 && REGNO_QTY_VALID_P (REGNO (x))
2451 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2452 && qty_const[reg_qty[REGNO (x)]] != 0)
2455 if (GET_CODE (x) == PLUS
2456 && GET_CODE (XEXP (x, 1)) == CONST_INT
2457 && GET_CODE (XEXP (x, 0)) == REG
2458 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2459 && (GET_MODE (XEXP (x, 0))
2460 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2461 && qty_const[reg_qty[REGNO (XEXP (x, 0))]])
2464 /* This can happen as the result of virtual register instantiation, if
2465 the initial constant is too large to be a valid address. This gives
2466 us a three instruction sequence, load large offset into a register,
2467 load fp minus a constant into a register, then a MEM which is the
2468 sum of the two `constant' registers. */
2469 if (GET_CODE (x) == PLUS
2470 && GET_CODE (XEXP (x, 0)) == REG
2471 && GET_CODE (XEXP (x, 1)) == REG
2472 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2473 && (GET_MODE (XEXP (x, 0))
2474 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2475 && qty_const[reg_qty[REGNO (XEXP (x, 0))]]
2476 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2477 && (GET_MODE (XEXP (x, 1))
2478 == qty_mode[reg_qty[REGNO (XEXP (x, 1))]])
2479 && qty_const[reg_qty[REGNO (XEXP (x, 1))]])
2482 return rtx_varies_p (x);
2485 /* Canonicalize an expression:
2486 replace each register reference inside it
2487 with the "oldest" equivalent register.
2489 If INSN is non-zero and we are replacing a pseudo with a hard register
2490 or vice versa, validate_change is used to ensure that INSN remains valid
2491 after we make our substitution. The calls are made with IN_GROUP non-zero
2492 so apply_change_group must be called upon the outermost return from this
2493 function (unless INSN is zero). The result of apply_change_group can
2494 generally be discarded since the changes we are making are optional. */
2502 register enum rtx_code code;
2508 code = GET_CODE (x);
2526 /* Never replace a hard reg, because hard regs can appear
2527 in more than one machine mode, and we must preserve the mode
2528 of each occurrence. Also, some hard regs appear in
2529 MEMs that are shared and mustn't be altered. Don't try to
2530 replace any reg that maps to a reg of class NO_REGS. */
2531 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2532 || ! REGNO_QTY_VALID_P (REGNO (x)))
2535 first = qty_first_reg[reg_qty[REGNO (x)]];
2536 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2537 : REGNO_REG_CLASS (first) == NO_REGS ? x
2538 : gen_rtx_REG (qty_mode[reg_qty[REGNO (x)]], first));
2545 fmt = GET_RTX_FORMAT (code);
2546 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2552 rtx new = canon_reg (XEXP (x, i), insn);
2555 /* If replacing pseudo with hard reg or vice versa, ensure the
2556 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2557 if (insn != 0 && new != 0
2558 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2559 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2560 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2561 || (insn_code = recog_memoized (insn)) < 0
2562 || insn_n_dups[insn_code] > 0))
2563 validate_change (insn, &XEXP (x, i), new, 1);
2567 else if (fmt[i] == 'E')
2568 for (j = 0; j < XVECLEN (x, i); j++)
2569 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2575 /* LOC is a location within INSN that is an operand address (the contents of
2576 a MEM). Find the best equivalent address to use that is valid for this
2579 On most CISC machines, complicated address modes are costly, and rtx_cost
2580 is a good approximation for that cost. However, most RISC machines have
2581 only a few (usually only one) memory reference formats. If an address is
2582 valid at all, it is often just as cheap as any other address. Hence, for
2583 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2584 costs of various addresses. For two addresses of equal cost, choose the one
2585 with the highest `rtx_cost' value as that has the potential of eliminating
2586 the most insns. For equal costs, we choose the first in the equivalence
2587 class. Note that we ignore the fact that pseudo registers are cheaper
2588 than hard registers here because we would also prefer the pseudo registers.
2592 find_best_addr (insn, loc)
2596 struct table_elt *elt;
2599 struct table_elt *p;
2600 int found_better = 1;
2602 int save_do_not_record = do_not_record;
2603 int save_hash_arg_in_memory = hash_arg_in_memory;
2604 int save_hash_arg_in_struct = hash_arg_in_struct;
2609 /* Do not try to replace constant addresses or addresses of local and
2610 argument slots. These MEM expressions are made only once and inserted
2611 in many instructions, as well as being used to control symbol table
2612 output. It is not safe to clobber them.
2614 There are some uncommon cases where the address is already in a register
2615 for some reason, but we cannot take advantage of that because we have
2616 no easy way to unshare the MEM. In addition, looking up all stack
2617 addresses is costly. */
2618 if ((GET_CODE (addr) == PLUS
2619 && GET_CODE (XEXP (addr, 0)) == REG
2620 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2621 && (regno = REGNO (XEXP (addr, 0)),
2622 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2623 || regno == ARG_POINTER_REGNUM))
2624 || (GET_CODE (addr) == REG
2625 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2626 || regno == HARD_FRAME_POINTER_REGNUM
2627 || regno == ARG_POINTER_REGNUM))
2628 || GET_CODE (addr) == ADDRESSOF
2629 || CONSTANT_ADDRESS_P (addr))
2632 /* If this address is not simply a register, try to fold it. This will
2633 sometimes simplify the expression. Many simplifications
2634 will not be valid, but some, usually applying the associative rule, will
2635 be valid and produce better code. */
2636 if (GET_CODE (addr) != REG)
2638 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2642 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2643 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2644 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2646 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2648 && validate_change (insn, loc, folded, 0))
2652 /* If this address is not in the hash table, we can't look for equivalences
2653 of the whole address. Also, ignore if volatile. */
2656 hash = HASH (addr, Pmode);
2657 addr_volatile = do_not_record;
2658 do_not_record = save_do_not_record;
2659 hash_arg_in_memory = save_hash_arg_in_memory;
2660 hash_arg_in_struct = save_hash_arg_in_struct;
2665 elt = lookup (addr, hash, Pmode);
2667 #ifndef ADDRESS_COST
2670 int our_cost = elt->cost;
2672 /* Find the lowest cost below ours that works. */
2673 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2674 if (elt->cost < our_cost
2675 && (GET_CODE (elt->exp) == REG
2676 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2677 && validate_change (insn, loc,
2678 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2685 /* We need to find the best (under the criteria documented above) entry
2686 in the class that is valid. We use the `flag' field to indicate
2687 choices that were invalid and iterate until we can't find a better
2688 one that hasn't already been tried. */
2690 for (p = elt->first_same_value; p; p = p->next_same_value)
2693 while (found_better)
2695 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2696 int best_rtx_cost = (elt->cost + 1) >> 1;
2697 struct table_elt *best_elt = elt;
2700 for (p = elt->first_same_value; p; p = p->next_same_value)
2703 if ((GET_CODE (p->exp) == REG
2704 || exp_equiv_p (p->exp, p->exp, 1, 0))
2705 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2706 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2707 && (p->cost + 1) >> 1 > best_rtx_cost)))
2710 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2711 best_rtx_cost = (p->cost + 1) >> 1;
2718 if (validate_change (insn, loc,
2719 canon_reg (copy_rtx (best_elt->exp),
2728 /* If the address is a binary operation with the first operand a register
2729 and the second a constant, do the same as above, but looking for
2730 equivalences of the register. Then try to simplify before checking for
2731 the best address to use. This catches a few cases: First is when we
2732 have REG+const and the register is another REG+const. We can often merge
2733 the constants and eliminate one insn and one register. It may also be
2734 that a machine has a cheap REG+REG+const. Finally, this improves the
2735 code on the Alpha for unaligned byte stores. */
2737 if (flag_expensive_optimizations
2738 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2739 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2740 && GET_CODE (XEXP (*loc, 0)) == REG
2741 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2743 rtx c = XEXP (*loc, 1);
2746 hash = HASH (XEXP (*loc, 0), Pmode);
2747 do_not_record = save_do_not_record;
2748 hash_arg_in_memory = save_hash_arg_in_memory;
2749 hash_arg_in_struct = save_hash_arg_in_struct;
2751 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2755 /* We need to find the best (under the criteria documented above) entry
2756 in the class that is valid. We use the `flag' field to indicate
2757 choices that were invalid and iterate until we can't find a better
2758 one that hasn't already been tried. */
2760 for (p = elt->first_same_value; p; p = p->next_same_value)
2763 while (found_better)
2765 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2766 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2767 struct table_elt *best_elt = elt;
2768 rtx best_rtx = *loc;
2771 /* This is at worst case an O(n^2) algorithm, so limit our search
2772 to the first 32 elements on the list. This avoids trouble
2773 compiling code with very long basic blocks that can easily
2774 call cse_gen_binary so many times that we run out of memory. */
2777 for (p = elt->first_same_value, count = 0;
2779 p = p->next_same_value, count++)
2781 && (GET_CODE (p->exp) == REG
2782 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2784 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2786 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2787 || (CSE_ADDRESS_COST (new) == best_addr_cost
2788 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2791 best_addr_cost = CSE_ADDRESS_COST (new);
2792 best_rtx_cost = (COST (new) + 1) >> 1;
2800 if (validate_change (insn, loc,
2801 canon_reg (copy_rtx (best_rtx),
2812 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2813 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2814 what values are being compared.
2816 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2817 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2818 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2819 compared to produce cc0.
2821 The return value is the comparison operator and is either the code of
2822 A or the code corresponding to the inverse of the comparison. */
2824 static enum rtx_code
2825 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2828 enum machine_mode *pmode1, *pmode2;
2832 arg1 = *parg1, arg2 = *parg2;
2834 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2836 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2838 /* Set non-zero when we find something of interest. */
2840 int reverse_code = 0;
2841 struct table_elt *p = 0;
2843 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2844 On machines with CC0, this is the only case that can occur, since
2845 fold_rtx will return the COMPARE or item being compared with zero
2848 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2851 /* If ARG1 is a comparison operator and CODE is testing for
2852 STORE_FLAG_VALUE, get the inner arguments. */
2854 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2857 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2858 && code == LT && STORE_FLAG_VALUE == -1)
2859 #ifdef FLOAT_STORE_FLAG_VALUE
2860 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2861 && FLOAT_STORE_FLAG_VALUE < 0)
2866 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2867 && code == GE && STORE_FLAG_VALUE == -1)
2868 #ifdef FLOAT_STORE_FLAG_VALUE
2869 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2870 && FLOAT_STORE_FLAG_VALUE < 0)
2873 x = arg1, reverse_code = 1;
2876 /* ??? We could also check for
2878 (ne (and (eq (...) (const_int 1))) (const_int 0))
2880 and related forms, but let's wait until we see them occurring. */
2883 /* Look up ARG1 in the hash table and see if it has an equivalence
2884 that lets us see what is being compared. */
2885 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2887 if (p) p = p->first_same_value;
2889 for (; p; p = p->next_same_value)
2891 enum machine_mode inner_mode = GET_MODE (p->exp);
2893 /* If the entry isn't valid, skip it. */
2894 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2897 if (GET_CODE (p->exp) == COMPARE
2898 /* Another possibility is that this machine has a compare insn
2899 that includes the comparison code. In that case, ARG1 would
2900 be equivalent to a comparison operation that would set ARG1 to
2901 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2902 ORIG_CODE is the actual comparison being done; if it is an EQ,
2903 we must reverse ORIG_CODE. On machine with a negative value
2904 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2907 && GET_MODE_CLASS (inner_mode) == MODE_INT
2908 && (GET_MODE_BITSIZE (inner_mode)
2909 <= HOST_BITS_PER_WIDE_INT)
2910 && (STORE_FLAG_VALUE
2911 & ((HOST_WIDE_INT) 1
2912 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2913 #ifdef FLOAT_STORE_FLAG_VALUE
2915 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2916 && FLOAT_STORE_FLAG_VALUE < 0)
2919 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2924 else if ((code == EQ
2926 && GET_MODE_CLASS (inner_mode) == MODE_INT
2927 && (GET_MODE_BITSIZE (inner_mode)
2928 <= HOST_BITS_PER_WIDE_INT)
2929 && (STORE_FLAG_VALUE
2930 & ((HOST_WIDE_INT) 1
2931 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2932 #ifdef FLOAT_STORE_FLAG_VALUE
2934 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2935 && FLOAT_STORE_FLAG_VALUE < 0)
2938 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2945 /* If this is fp + constant, the equivalent is a better operand since
2946 it may let us predict the value of the comparison. */
2947 else if (NONZERO_BASE_PLUS_P (p->exp))
2954 /* If we didn't find a useful equivalence for ARG1, we are done.
2955 Otherwise, set up for the next iteration. */
2959 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2960 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2961 code = GET_CODE (x);
2964 code = reverse_condition (code);
2967 /* Return our results. Return the modes from before fold_rtx
2968 because fold_rtx might produce const_int, and then it's too late. */
2969 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2970 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2975 /* Try to simplify a unary operation CODE whose output mode is to be
2976 MODE with input operand OP whose mode was originally OP_MODE.
2977 Return zero if no simplification can be made. */
2980 simplify_unary_operation (code, mode, op, op_mode)
2982 enum machine_mode mode;
2984 enum machine_mode op_mode;
2986 register int width = GET_MODE_BITSIZE (mode);
2988 /* The order of these tests is critical so that, for example, we don't
2989 check the wrong mode (input vs. output) for a conversion operation,
2990 such as FIX. At some point, this should be simplified. */
2992 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2994 if (code == FLOAT && GET_MODE (op) == VOIDmode
2995 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2997 HOST_WIDE_INT hv, lv;
3000 if (GET_CODE (op) == CONST_INT)
3001 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3003 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3005 #ifdef REAL_ARITHMETIC
3006 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3010 d = (double) (~ hv);
3011 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3012 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3013 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3019 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3020 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3021 d += (double) (unsigned HOST_WIDE_INT) lv;
3023 #endif /* REAL_ARITHMETIC */
3024 d = real_value_truncate (mode, d);
3025 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3027 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3028 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3030 HOST_WIDE_INT hv, lv;
3033 if (GET_CODE (op) == CONST_INT)
3034 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3036 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3038 if (op_mode == VOIDmode)
3040 /* We don't know how to interpret negative-looking numbers in
3041 this case, so don't try to fold those. */
3045 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3048 hv = 0, lv &= GET_MODE_MASK (op_mode);
3050 #ifdef REAL_ARITHMETIC
3051 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3054 d = (double) (unsigned HOST_WIDE_INT) hv;
3055 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3056 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3057 d += (double) (unsigned HOST_WIDE_INT) lv;
3058 #endif /* REAL_ARITHMETIC */
3059 d = real_value_truncate (mode, d);
3060 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3064 if (GET_CODE (op) == CONST_INT
3065 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3067 register HOST_WIDE_INT arg0 = INTVAL (op);
3068 register HOST_WIDE_INT val;
3081 val = (arg0 >= 0 ? arg0 : - arg0);
3085 /* Don't use ffs here. Instead, get low order bit and then its
3086 number. If arg0 is zero, this will return 0, as desired. */
3087 arg0 &= GET_MODE_MASK (mode);
3088 val = exact_log2 (arg0 & (- arg0)) + 1;
3096 if (op_mode == VOIDmode)
3098 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3100 /* If we were really extending the mode,
3101 we would have to distinguish between zero-extension
3102 and sign-extension. */
3103 if (width != GET_MODE_BITSIZE (op_mode))
3107 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3108 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3114 if (op_mode == VOIDmode)
3116 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3118 /* If we were really extending the mode,
3119 we would have to distinguish between zero-extension
3120 and sign-extension. */
3121 if (width != GET_MODE_BITSIZE (op_mode))
3125 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3128 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3130 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3131 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3144 /* Clear the bits that don't belong in our mode,
3145 unless they and our sign bit are all one.
3146 So we get either a reasonable negative value or a reasonable
3147 unsigned value for this mode. */
3148 if (width < HOST_BITS_PER_WIDE_INT
3149 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3150 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3151 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3153 return GEN_INT (val);
3156 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3157 for a DImode operation on a CONST_INT. */
3158 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3159 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3161 HOST_WIDE_INT l1, h1, lv, hv;
3163 if (GET_CODE (op) == CONST_DOUBLE)
3164 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3166 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3176 neg_double (l1, h1, &lv, &hv);
3181 neg_double (l1, h1, &lv, &hv);
3189 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3191 lv = exact_log2 (l1 & (-l1)) + 1;
3195 /* This is just a change-of-mode, so do nothing. */
3200 if (op_mode == VOIDmode
3201 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3205 lv = l1 & GET_MODE_MASK (op_mode);
3209 if (op_mode == VOIDmode
3210 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3214 lv = l1 & GET_MODE_MASK (op_mode);
3215 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3216 && (lv & ((HOST_WIDE_INT) 1
3217 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3218 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3220 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3231 return immed_double_const (lv, hv, mode);
3234 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3235 else if (GET_CODE (op) == CONST_DOUBLE
3236 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3242 if (setjmp (handler))
3243 /* There used to be a warning here, but that is inadvisable.
3244 People may want to cause traps, and the natural way
3245 to do it should not get a warning. */
3248 set_float_handler (handler);
3250 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3255 d = REAL_VALUE_NEGATE (d);
3259 if (REAL_VALUE_NEGATIVE (d))
3260 d = REAL_VALUE_NEGATE (d);
3263 case FLOAT_TRUNCATE:
3264 d = real_value_truncate (mode, d);
3268 /* All this does is change the mode. */
3272 d = REAL_VALUE_RNDZINT (d);
3276 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3286 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3287 set_float_handler (NULL_PTR);
3291 else if (GET_CODE (op) == CONST_DOUBLE
3292 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3293 && GET_MODE_CLASS (mode) == MODE_INT
3294 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3300 if (setjmp (handler))
3303 set_float_handler (handler);
3305 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3310 val = REAL_VALUE_FIX (d);
3314 val = REAL_VALUE_UNSIGNED_FIX (d);
3321 set_float_handler (NULL_PTR);
3323 /* Clear the bits that don't belong in our mode,
3324 unless they and our sign bit are all one.
3325 So we get either a reasonable negative value or a reasonable
3326 unsigned value for this mode. */
3327 if (width < HOST_BITS_PER_WIDE_INT
3328 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3329 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3330 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3332 /* If this would be an entire word for the target, but is not for
3333 the host, then sign-extend on the host so that the number will look
3334 the same way on the host that it would on the target.
3336 For example, when building a 64 bit alpha hosted 32 bit sparc
3337 targeted compiler, then we want the 32 bit unsigned value -1 to be
3338 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3339 The later confuses the sparc backend. */
3341 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3342 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3343 val |= ((HOST_WIDE_INT) (-1) << width);
3345 return GEN_INT (val);
3348 /* This was formerly used only for non-IEEE float.
3349 eggert@twinsun.com says it is safe for IEEE also. */
3352 /* There are some simplifications we can do even if the operands
3358 /* (not (not X)) == X, similarly for NEG. */
3359 if (GET_CODE (op) == code)
3360 return XEXP (op, 0);
3364 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3365 becomes just the MINUS if its mode is MODE. This allows
3366 folding switch statements on machines using casesi (such as
3368 if (GET_CODE (op) == TRUNCATE
3369 && GET_MODE (XEXP (op, 0)) == mode
3370 && GET_CODE (XEXP (op, 0)) == MINUS
3371 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3372 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3373 return XEXP (op, 0);
3375 #ifdef POINTERS_EXTEND_UNSIGNED
3376 if (! POINTERS_EXTEND_UNSIGNED
3377 && mode == Pmode && GET_MODE (op) == ptr_mode
3379 return convert_memory_address (Pmode, op);
3383 #ifdef POINTERS_EXTEND_UNSIGNED
3385 if (POINTERS_EXTEND_UNSIGNED
3386 && mode == Pmode && GET_MODE (op) == ptr_mode
3388 return convert_memory_address (Pmode, op);
3400 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3401 and OP1. Return 0 if no simplification is possible.
3403 Don't use this for relational operations such as EQ or LT.
3404 Use simplify_relational_operation instead. */
3407 simplify_binary_operation (code, mode, op0, op1)
3409 enum machine_mode mode;
3412 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3414 int width = GET_MODE_BITSIZE (mode);
3417 /* Relational operations don't work here. We must know the mode
3418 of the operands in order to do the comparison correctly.
3419 Assuming a full word can give incorrect results.
3420 Consider comparing 128 with -128 in QImode. */
3422 if (GET_RTX_CLASS (code) == '<')
3425 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3426 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3427 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3428 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3430 REAL_VALUE_TYPE f0, f1, value;
3433 if (setjmp (handler))
3436 set_float_handler (handler);
3438 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3439 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3440 f0 = real_value_truncate (mode, f0);
3441 f1 = real_value_truncate (mode, f1);
3443 #ifdef REAL_ARITHMETIC
3444 #ifndef REAL_INFINITY
3445 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3448 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3462 #ifndef REAL_INFINITY
3469 value = MIN (f0, f1);
3472 value = MAX (f0, f1);
3479 value = real_value_truncate (mode, value);
3480 set_float_handler (NULL_PTR);
3481 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3483 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3485 /* We can fold some multi-word operations. */
3486 if (GET_MODE_CLASS (mode) == MODE_INT
3487 && width == HOST_BITS_PER_WIDE_INT * 2
3488 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3489 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3491 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3493 if (GET_CODE (op0) == CONST_DOUBLE)
3494 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3496 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3498 if (GET_CODE (op1) == CONST_DOUBLE)
3499 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3501 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3506 /* A - B == A + (-B). */
3507 neg_double (l2, h2, &lv, &hv);
3510 /* .. fall through ... */
3513 add_double (l1, h1, l2, h2, &lv, &hv);
3517 mul_double (l1, h1, l2, h2, &lv, &hv);
3520 case DIV: case MOD: case UDIV: case UMOD:
3521 /* We'd need to include tree.h to do this and it doesn't seem worth
3526 lv = l1 & l2, hv = h1 & h2;
3530 lv = l1 | l2, hv = h1 | h2;
3534 lv = l1 ^ l2, hv = h1 ^ h2;
3540 && ((unsigned HOST_WIDE_INT) l1
3541 < (unsigned HOST_WIDE_INT) l2)))
3550 && ((unsigned HOST_WIDE_INT) l1
3551 > (unsigned HOST_WIDE_INT) l2)))
3558 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3560 && ((unsigned HOST_WIDE_INT) l1
3561 < (unsigned HOST_WIDE_INT) l2)))
3568 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3570 && ((unsigned HOST_WIDE_INT) l1
3571 > (unsigned HOST_WIDE_INT) l2)))
3577 case LSHIFTRT: case ASHIFTRT:
3579 case ROTATE: case ROTATERT:
3580 #ifdef SHIFT_COUNT_TRUNCATED
3581 if (SHIFT_COUNT_TRUNCATED)
3582 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3585 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3588 if (code == LSHIFTRT || code == ASHIFTRT)
3589 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3591 else if (code == ASHIFT)
3592 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3593 else if (code == ROTATE)
3594 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3595 else /* code == ROTATERT */
3596 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3603 return immed_double_const (lv, hv, mode);
3606 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3607 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3609 /* Even if we can't compute a constant result,
3610 there are some cases worth simplifying. */
3615 /* In IEEE floating point, x+0 is not the same as x. Similarly
3616 for the other optimizations below. */
3617 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3618 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3621 if (op1 == CONST0_RTX (mode))
3624 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3625 if (GET_CODE (op0) == NEG)
3626 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3627 else if (GET_CODE (op1) == NEG)
3628 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3630 /* Handle both-operands-constant cases. We can only add
3631 CONST_INTs to constants since the sum of relocatable symbols
3632 can't be handled by most assemblers. Don't add CONST_INT
3633 to CONST_INT since overflow won't be computed properly if wider
3634 than HOST_BITS_PER_WIDE_INT. */
3636 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3637 && GET_CODE (op1) == CONST_INT)
3638 return plus_constant (op0, INTVAL (op1));
3639 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3640 && GET_CODE (op0) == CONST_INT)
3641 return plus_constant (op1, INTVAL (op0));
3643 /* See if this is something like X * C - X or vice versa or
3644 if the multiplication is written as a shift. If so, we can
3645 distribute and make a new multiply, shift, or maybe just
3646 have X (if C is 2 in the example above). But don't make
3647 real multiply if we didn't have one before. */
3649 if (! FLOAT_MODE_P (mode))
3651 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3652 rtx lhs = op0, rhs = op1;
3655 if (GET_CODE (lhs) == NEG)
3656 coeff0 = -1, lhs = XEXP (lhs, 0);
3657 else if (GET_CODE (lhs) == MULT
3658 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3660 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3663 else if (GET_CODE (lhs) == ASHIFT
3664 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3665 && INTVAL (XEXP (lhs, 1)) >= 0
3666 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3668 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3669 lhs = XEXP (lhs, 0);
3672 if (GET_CODE (rhs) == NEG)
3673 coeff1 = -1, rhs = XEXP (rhs, 0);
3674 else if (GET_CODE (rhs) == MULT
3675 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3677 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3680 else if (GET_CODE (rhs) == ASHIFT
3681 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3682 && INTVAL (XEXP (rhs, 1)) >= 0
3683 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3685 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3686 rhs = XEXP (rhs, 0);
3689 if (rtx_equal_p (lhs, rhs))
3691 tem = cse_gen_binary (MULT, mode, lhs,
3692 GEN_INT (coeff0 + coeff1));
3693 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3697 /* If one of the operands is a PLUS or a MINUS, see if we can
3698 simplify this by the associative law.
3699 Don't use the associative law for floating point.
3700 The inaccuracy makes it nonassociative,
3701 and subtle programs can break if operations are associated. */
3703 if (INTEGRAL_MODE_P (mode)
3704 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3705 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3706 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3712 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3713 using cc0, in which case we want to leave it as a COMPARE
3714 so we can distinguish it from a register-register-copy.
3716 In IEEE floating point, x-0 is not the same as x. */
3718 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3719 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3720 && op1 == CONST0_RTX (mode))
3723 /* Do nothing here. */
3728 /* None of these optimizations can be done for IEEE
3730 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3731 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3734 /* We can't assume x-x is 0 even with non-IEEE floating point,
3735 but since it is zero except in very strange circumstances, we
3736 will treat it as zero with -ffast-math. */
3737 if (rtx_equal_p (op0, op1)
3738 && ! side_effects_p (op0)
3739 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3740 return CONST0_RTX (mode);
3742 /* Change subtraction from zero into negation. */
3743 if (op0 == CONST0_RTX (mode))
3744 return gen_rtx_NEG (mode, op1);
3746 /* (-1 - a) is ~a. */
3747 if (op0 == constm1_rtx)
3748 return gen_rtx_NOT (mode, op1);
3750 /* Subtracting 0 has no effect. */
3751 if (op1 == CONST0_RTX (mode))
3754 /* See if this is something like X * C - X or vice versa or
3755 if the multiplication is written as a shift. If so, we can
3756 distribute and make a new multiply, shift, or maybe just
3757 have X (if C is 2 in the example above). But don't make
3758 real multiply if we didn't have one before. */
3760 if (! FLOAT_MODE_P (mode))
3762 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3763 rtx lhs = op0, rhs = op1;
3766 if (GET_CODE (lhs) == NEG)
3767 coeff0 = -1, lhs = XEXP (lhs, 0);
3768 else if (GET_CODE (lhs) == MULT
3769 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3771 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3774 else if (GET_CODE (lhs) == ASHIFT
3775 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3776 && INTVAL (XEXP (lhs, 1)) >= 0
3777 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3779 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3780 lhs = XEXP (lhs, 0);
3783 if (GET_CODE (rhs) == NEG)
3784 coeff1 = - 1, rhs = XEXP (rhs, 0);
3785 else if (GET_CODE (rhs) == MULT
3786 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3788 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3791 else if (GET_CODE (rhs) == ASHIFT
3792 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3793 && INTVAL (XEXP (rhs, 1)) >= 0
3794 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3796 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3797 rhs = XEXP (rhs, 0);
3800 if (rtx_equal_p (lhs, rhs))
3802 tem = cse_gen_binary (MULT, mode, lhs,
3803 GEN_INT (coeff0 - coeff1));
3804 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3808 /* (a - (-b)) -> (a + b). */
3809 if (GET_CODE (op1) == NEG)
3810 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3812 /* If one of the operands is a PLUS or a MINUS, see if we can
3813 simplify this by the associative law.
3814 Don't use the associative law for floating point.
3815 The inaccuracy makes it nonassociative,
3816 and subtle programs can break if operations are associated. */
3818 if (INTEGRAL_MODE_P (mode)
3819 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3820 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3821 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3824 /* Don't let a relocatable value get a negative coeff. */
3825 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3826 return plus_constant (op0, - INTVAL (op1));
3828 /* (x - (x & y)) -> (x & ~y) */
3829 if (GET_CODE (op1) == AND)
3831 if (rtx_equal_p (op0, XEXP (op1, 0)))
3832 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
3833 if (rtx_equal_p (op0, XEXP (op1, 1)))
3834 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
3839 if (op1 == constm1_rtx)
3841 tem = simplify_unary_operation (NEG, mode, op0, mode);
3843 return tem ? tem : gen_rtx_NEG (mode, op0);
3846 /* In IEEE floating point, x*0 is not always 0. */
3847 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3848 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3849 && op1 == CONST0_RTX (mode)
3850 && ! side_effects_p (op0))
3853 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3854 However, ANSI says we can drop signals,
3855 so we can do this anyway. */
3856 if (op1 == CONST1_RTX (mode))
3859 /* Convert multiply by constant power of two into shift unless
3860 we are still generating RTL. This test is a kludge. */
3861 if (GET_CODE (op1) == CONST_INT
3862 && (val = exact_log2 (INTVAL (op1))) >= 0
3863 /* If the mode is larger than the host word size, and the
3864 uppermost bit is set, then this isn't a power of two due
3865 to implicit sign extension. */
3866 && (width <= HOST_BITS_PER_WIDE_INT
3867 || val != HOST_BITS_PER_WIDE_INT - 1)
3868 && ! rtx_equal_function_value_matters)
3869 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
3871 if (GET_CODE (op1) == CONST_DOUBLE
3872 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3876 int op1is2, op1ism1;
3878 if (setjmp (handler))
3881 set_float_handler (handler);
3882 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3883 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3884 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3885 set_float_handler (NULL_PTR);
3887 /* x*2 is x+x and x*(-1) is -x */
3888 if (op1is2 && GET_MODE (op0) == mode)
3889 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
3891 else if (op1ism1 && GET_MODE (op0) == mode)
3892 return gen_rtx_NEG (mode, op0);
3897 if (op1 == const0_rtx)
3899 if (GET_CODE (op1) == CONST_INT
3900 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3902 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3904 /* A | (~A) -> -1 */
3905 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3906 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3907 && ! side_effects_p (op0)
3908 && GET_MODE_CLASS (mode) != MODE_CC)
3913 if (op1 == const0_rtx)
3915 if (GET_CODE (op1) == CONST_INT
3916 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3917 return gen_rtx_NOT (mode, op0);
3918 if (op0 == op1 && ! side_effects_p (op0)
3919 && GET_MODE_CLASS (mode) != MODE_CC)
3924 if (op1 == const0_rtx && ! side_effects_p (op0))
3926 if (GET_CODE (op1) == CONST_INT
3927 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3929 if (op0 == op1 && ! side_effects_p (op0)
3930 && GET_MODE_CLASS (mode) != MODE_CC)
3933 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3934 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3935 && ! side_effects_p (op0)
3936 && GET_MODE_CLASS (mode) != MODE_CC)
3941 /* Convert divide by power of two into shift (divide by 1 handled
3943 if (GET_CODE (op1) == CONST_INT
3944 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3945 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
3947 /* ... fall through ... */
3950 if (op1 == CONST1_RTX (mode))
3953 /* In IEEE floating point, 0/x is not always 0. */
3954 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3955 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3956 && op0 == CONST0_RTX (mode)
3957 && ! side_effects_p (op1))
3960 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3961 /* Change division by a constant into multiplication. Only do
3962 this with -ffast-math until an expert says it is safe in
3964 else if (GET_CODE (op1) == CONST_DOUBLE
3965 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3966 && op1 != CONST0_RTX (mode)
3970 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3972 if (! REAL_VALUES_EQUAL (d, dconst0))
3974 #if defined (REAL_ARITHMETIC)
3975 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
3976 return gen_rtx_MULT (mode, op0,
3977 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3979 return gen_rtx_MULT (mode, op0,
3980 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3988 /* Handle modulus by power of two (mod with 1 handled below). */
3989 if (GET_CODE (op1) == CONST_INT
3990 && exact_log2 (INTVAL (op1)) > 0)
3991 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
3993 /* ... fall through ... */
3996 if ((op0 == const0_rtx || op1 == const1_rtx)
3997 && ! side_effects_p (op0) && ! side_effects_p (op1))
4003 /* Rotating ~0 always results in ~0. */
4004 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4005 && INTVAL (op0) == GET_MODE_MASK (mode)
4006 && ! side_effects_p (op1))
4009 /* ... fall through ... */
4014 if (op1 == const0_rtx)
4016 if (op0 == const0_rtx && ! side_effects_p (op1))
4021 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4022 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4023 && ! side_effects_p (op0))
4025 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4030 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4032 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4033 && ! side_effects_p (op0))
4035 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4040 if (op1 == const0_rtx && ! side_effects_p (op0))
4042 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4047 if (op1 == constm1_rtx && ! side_effects_p (op0))
4049 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4060 /* Get the integer argument values in two forms:
4061 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4063 arg0 = INTVAL (op0);
4064 arg1 = INTVAL (op1);
4066 if (width < HOST_BITS_PER_WIDE_INT)
4068 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4069 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4072 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4073 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4076 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4077 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4085 /* Compute the value of the arithmetic. */
4090 val = arg0s + arg1s;
4094 val = arg0s - arg1s;
4098 val = arg0s * arg1s;
4104 val = arg0s / arg1s;
4110 val = arg0s % arg1s;
4116 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4122 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4138 /* If shift count is undefined, don't fold it; let the machine do
4139 what it wants. But truncate it if the machine will do that. */
4143 #ifdef SHIFT_COUNT_TRUNCATED
4144 if (SHIFT_COUNT_TRUNCATED)
4148 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4155 #ifdef SHIFT_COUNT_TRUNCATED
4156 if (SHIFT_COUNT_TRUNCATED)
4160 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4167 #ifdef SHIFT_COUNT_TRUNCATED
4168 if (SHIFT_COUNT_TRUNCATED)
4172 val = arg0s >> arg1;
4174 /* Bootstrap compiler may not have sign extended the right shift.
4175 Manually extend the sign to insure bootstrap cc matches gcc. */
4176 if (arg0s < 0 && arg1 > 0)
4177 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4186 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4187 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4195 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4196 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4200 /* Do nothing here. */
4204 val = arg0s <= arg1s ? arg0s : arg1s;
4208 val = ((unsigned HOST_WIDE_INT) arg0
4209 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4213 val = arg0s > arg1s ? arg0s : arg1s;
4217 val = ((unsigned HOST_WIDE_INT) arg0
4218 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4225 /* Clear the bits that don't belong in our mode, unless they and our sign
4226 bit are all one. So we get either a reasonable negative value or a
4227 reasonable unsigned value for this mode. */
4228 if (width < HOST_BITS_PER_WIDE_INT
4229 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4230 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4231 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4233 /* If this would be an entire word for the target, but is not for
4234 the host, then sign-extend on the host so that the number will look
4235 the same way on the host that it would on the target.
4237 For example, when building a 64 bit alpha hosted 32 bit sparc
4238 targeted compiler, then we want the 32 bit unsigned value -1 to be
4239 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4240 The later confuses the sparc backend. */
4242 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4243 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4244 val |= ((HOST_WIDE_INT) (-1) << width);
4246 return GEN_INT (val);
4249 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4252 Rather than test for specific case, we do this by a brute-force method
4253 and do all possible simplifications until no more changes occur. Then
4254 we rebuild the operation. */
4257 simplify_plus_minus (code, mode, op0, op1)
4259 enum machine_mode mode;
4265 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4266 int first = 1, negate = 0, changed;
4269 bzero ((char *) ops, sizeof ops);
4271 /* Set up the two operands and then expand them until nothing has been
4272 changed. If we run out of room in our array, give up; this should
4273 almost never happen. */
4275 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4282 for (i = 0; i < n_ops; i++)
4283 switch (GET_CODE (ops[i]))
4290 ops[n_ops] = XEXP (ops[i], 1);
4291 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4292 ops[i] = XEXP (ops[i], 0);
4298 ops[i] = XEXP (ops[i], 0);
4299 negs[i] = ! negs[i];
4304 ops[i] = XEXP (ops[i], 0);
4310 /* ~a -> (-a - 1) */
4313 ops[n_ops] = constm1_rtx;
4314 negs[n_ops++] = negs[i];
4315 ops[i] = XEXP (ops[i], 0);
4316 negs[i] = ! negs[i];
4323 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4331 /* If we only have two operands, we can't do anything. */
4335 /* Now simplify each pair of operands until nothing changes. The first
4336 time through just simplify constants against each other. */
4343 for (i = 0; i < n_ops - 1; i++)
4344 for (j = i + 1; j < n_ops; j++)
4345 if (ops[i] != 0 && ops[j] != 0
4346 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4348 rtx lhs = ops[i], rhs = ops[j];
4349 enum rtx_code ncode = PLUS;
4351 if (negs[i] && ! negs[j])
4352 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4353 else if (! negs[i] && negs[j])
4356 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4359 ops[i] = tem, ops[j] = 0;
4360 negs[i] = negs[i] && negs[j];
4361 if (GET_CODE (tem) == NEG)
4362 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4364 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4365 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4373 /* Pack all the operands to the lower-numbered entries and give up if
4374 we didn't reduce the number of operands we had. Make sure we
4375 count a CONST as two operands. If we have the same number of
4376 operands, but have made more CONSTs than we had, this is also
4377 an improvement, so accept it. */
4379 for (i = 0, j = 0; j < n_ops; j++)
4382 ops[i] = ops[j], negs[i++] = negs[j];
4383 if (GET_CODE (ops[j]) == CONST)
4387 if (i + n_consts > input_ops
4388 || (i + n_consts == input_ops && n_consts <= input_consts))
4393 /* If we have a CONST_INT, put it last. */
4394 for (i = 0; i < n_ops - 1; i++)
4395 if (GET_CODE (ops[i]) == CONST_INT)
4397 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4398 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4401 /* Put a non-negated operand first. If there aren't any, make all
4402 operands positive and negate the whole thing later. */
4403 for (i = 0; i < n_ops && negs[i]; i++)
4408 for (i = 0; i < n_ops; i++)
4414 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4415 j = negs[0], negs[0] = negs[i], negs[i] = j;
4418 /* Now make the result by performing the requested operations. */
4420 for (i = 1; i < n_ops; i++)
4421 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4423 return negate ? gen_rtx_NEG (mode, result) : result;
4426 /* Make a binary operation by properly ordering the operands and
4427 seeing if the expression folds. */
4430 cse_gen_binary (code, mode, op0, op1)
4432 enum machine_mode mode;
4437 /* Put complex operands first and constants second if commutative. */
4438 if (GET_RTX_CLASS (code) == 'c'
4439 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4440 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4441 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4442 || (GET_CODE (op0) == SUBREG
4443 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4444 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4445 tem = op0, op0 = op1, op1 = tem;
4447 /* If this simplifies, do it. */
4448 tem = simplify_binary_operation (code, mode, op0, op1);
4453 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4454 just form the operation. */
4456 if (code == PLUS && GET_CODE (op1) == CONST_INT
4457 && GET_MODE (op0) != VOIDmode)
4458 return plus_constant (op0, INTVAL (op1));
4459 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4460 && GET_MODE (op0) != VOIDmode)
4461 return plus_constant (op0, - INTVAL (op1));
4463 return gen_rtx_fmt_ee (code, mode, op0, op1);
4466 /* Like simplify_binary_operation except used for relational operators.
4467 MODE is the mode of the operands, not that of the result. If MODE
4468 is VOIDmode, both operands must also be VOIDmode and we compare the
4469 operands in "infinite precision".
4471 If no simplification is possible, this function returns zero. Otherwise,
4472 it returns either const_true_rtx or const0_rtx. */
4475 simplify_relational_operation (code, mode, op0, op1)
4477 enum machine_mode mode;
4480 int equal, op0lt, op0ltu, op1lt, op1ltu;
4483 /* If op0 is a compare, extract the comparison arguments from it. */
4484 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4485 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4487 /* We can't simplify MODE_CC values since we don't know what the
4488 actual comparison is. */
4489 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4496 /* For integer comparisons of A and B maybe we can simplify A - B and can
4497 then simplify a comparison of that with zero. If A and B are both either
4498 a register or a CONST_INT, this can't help; testing for these cases will
4499 prevent infinite recursion here and speed things up.
4501 If CODE is an unsigned comparison, then we can never do this optimization,
4502 because it gives an incorrect result if the subtraction wraps around zero.
4503 ANSI C defines unsigned operations such that they never overflow, and
4504 thus such cases can not be ignored. */
4506 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4507 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4508 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4509 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4510 && code != GTU && code != GEU && code != LTU && code != LEU)
4511 return simplify_relational_operation (signed_condition (code),
4512 mode, tem, const0_rtx);
4514 /* For non-IEEE floating-point, if the two operands are equal, we know the
4516 if (rtx_equal_p (op0, op1)
4517 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4518 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4519 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4521 /* If the operands are floating-point constants, see if we can fold
4523 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4524 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4525 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4527 REAL_VALUE_TYPE d0, d1;
4530 if (setjmp (handler))
4533 set_float_handler (handler);
4534 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4535 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4536 equal = REAL_VALUES_EQUAL (d0, d1);
4537 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4538 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4539 set_float_handler (NULL_PTR);
4541 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4543 /* Otherwise, see if the operands are both integers. */
4544 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4545 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4546 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4548 int width = GET_MODE_BITSIZE (mode);
4549 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4550 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4552 /* Get the two words comprising each integer constant. */
4553 if (GET_CODE (op0) == CONST_DOUBLE)
4555 l0u = l0s = CONST_DOUBLE_LOW (op0);
4556 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4560 l0u = l0s = INTVAL (op0);
4561 h0u = h0s = l0s < 0 ? -1 : 0;
4564 if (GET_CODE (op1) == CONST_DOUBLE)
4566 l1u = l1s = CONST_DOUBLE_LOW (op1);
4567 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4571 l1u = l1s = INTVAL (op1);
4572 h1u = h1s = l1s < 0 ? -1 : 0;
4575 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4576 we have to sign or zero-extend the values. */
4577 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4578 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4580 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4582 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4583 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4585 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4586 l0s |= ((HOST_WIDE_INT) (-1) << width);
4588 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4589 l1s |= ((HOST_WIDE_INT) (-1) << width);
4592 equal = (h0u == h1u && l0u == l1u);
4593 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4594 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4595 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4596 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4599 /* Otherwise, there are some code-specific tests we can make. */
4605 /* References to the frame plus a constant or labels cannot
4606 be zero, but a SYMBOL_REF can due to #pragma weak. */
4607 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4608 || GET_CODE (op0) == LABEL_REF)
4609 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4610 /* On some machines, the ap reg can be 0 sometimes. */
4611 && op0 != arg_pointer_rtx
4618 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4619 || GET_CODE (op0) == LABEL_REF)
4620 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4621 && op0 != arg_pointer_rtx
4624 return const_true_rtx;
4628 /* Unsigned values are never negative. */
4629 if (op1 == const0_rtx)
4630 return const_true_rtx;
4634 if (op1 == const0_rtx)
4639 /* Unsigned values are never greater than the largest
4641 if (GET_CODE (op1) == CONST_INT
4642 && INTVAL (op1) == GET_MODE_MASK (mode)
4643 && INTEGRAL_MODE_P (mode))
4644 return const_true_rtx;
4648 if (GET_CODE (op1) == CONST_INT
4649 && INTVAL (op1) == GET_MODE_MASK (mode)
4650 && INTEGRAL_MODE_P (mode))
4661 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4666 return equal ? const_true_rtx : const0_rtx;
4668 return ! equal ? const_true_rtx : const0_rtx;
4670 return op0lt ? const_true_rtx : const0_rtx;
4672 return op1lt ? const_true_rtx : const0_rtx;
4674 return op0ltu ? const_true_rtx : const0_rtx;
4676 return op1ltu ? const_true_rtx : const0_rtx;
4678 return equal || op0lt ? const_true_rtx : const0_rtx;
4680 return equal || op1lt ? const_true_rtx : const0_rtx;
4682 return equal || op0ltu ? const_true_rtx : const0_rtx;
4684 return equal || op1ltu ? const_true_rtx : const0_rtx;
4690 /* Simplify CODE, an operation with result mode MODE and three operands,
4691 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4692 a constant. Return 0 if no simplifications is possible. */
4695 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4697 enum machine_mode mode, op0_mode;
4700 int width = GET_MODE_BITSIZE (mode);
4702 /* VOIDmode means "infinite" precision. */
4704 width = HOST_BITS_PER_WIDE_INT;
4710 if (GET_CODE (op0) == CONST_INT
4711 && GET_CODE (op1) == CONST_INT
4712 && GET_CODE (op2) == CONST_INT
4713 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4714 && width <= HOST_BITS_PER_WIDE_INT)
4716 /* Extracting a bit-field from a constant */
4717 HOST_WIDE_INT val = INTVAL (op0);
4719 if (BITS_BIG_ENDIAN)
4720 val >>= (GET_MODE_BITSIZE (op0_mode)
4721 - INTVAL (op2) - INTVAL (op1));
4723 val >>= INTVAL (op2);
4725 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4727 /* First zero-extend. */
4728 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4729 /* If desired, propagate sign bit. */
4730 if (code == SIGN_EXTRACT
4731 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4732 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4735 /* Clear the bits that don't belong in our mode,
4736 unless they and our sign bit are all one.
4737 So we get either a reasonable negative value or a reasonable
4738 unsigned value for this mode. */
4739 if (width < HOST_BITS_PER_WIDE_INT
4740 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4741 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4742 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4744 return GEN_INT (val);
4749 if (GET_CODE (op0) == CONST_INT)
4750 return op0 != const0_rtx ? op1 : op2;
4752 /* Convert a == b ? b : a to "a". */
4753 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4754 && rtx_equal_p (XEXP (op0, 0), op1)
4755 && rtx_equal_p (XEXP (op0, 1), op2))
4757 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4758 && rtx_equal_p (XEXP (op0, 1), op1)
4759 && rtx_equal_p (XEXP (op0, 0), op2))
4761 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4764 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4765 XEXP (op0, 0), XEXP (op0, 1));
4766 /* See if any simplifications were possible. */
4767 if (temp == const0_rtx)
4769 else if (temp == const1_rtx)
4781 /* If X is a nontrivial arithmetic operation on an argument
4782 for which a constant value can be determined, return
4783 the result of operating on that value, as a constant.
4784 Otherwise, return X, possibly with one or more operands
4785 modified by recursive calls to this function.
4787 If X is a register whose contents are known, we do NOT
4788 return those contents here. equiv_constant is called to
4791 INSN is the insn that we may be modifying. If it is 0, make a copy
4792 of X before modifying it. */
4799 register enum rtx_code code;
4800 register enum machine_mode mode;
4807 /* Folded equivalents of first two operands of X. */
4811 /* Constant equivalents of first three operands of X;
4812 0 when no such equivalent is known. */
4817 /* The mode of the first operand of X. We need this for sign and zero
4819 enum machine_mode mode_arg0;
4824 mode = GET_MODE (x);
4825 code = GET_CODE (x);
4834 /* No use simplifying an EXPR_LIST
4835 since they are used only for lists of args
4836 in a function call's REG_EQUAL note. */
4838 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4839 want to (e.g.,) make (addressof (const_int 0)) just because
4840 the location is known to be zero. */
4846 return prev_insn_cc0;
4850 /* If the next insn is a CODE_LABEL followed by a jump table,
4851 PC's value is a LABEL_REF pointing to that label. That
4852 lets us fold switch statements on the Vax. */
4853 if (insn && GET_CODE (insn) == JUMP_INSN)
4855 rtx next = next_nonnote_insn (insn);
4857 if (next && GET_CODE (next) == CODE_LABEL
4858 && NEXT_INSN (next) != 0
4859 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4860 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4861 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4862 return gen_rtx_LABEL_REF (Pmode, next);
4867 /* See if we previously assigned a constant value to this SUBREG. */
4868 if ((new = lookup_as_function (x, CONST_INT)) != 0
4869 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4872 /* If this is a paradoxical SUBREG, we have no idea what value the
4873 extra bits would have. However, if the operand is equivalent
4874 to a SUBREG whose operand is the same as our mode, and all the
4875 modes are within a word, we can just use the inner operand
4876 because these SUBREGs just say how to treat the register.
4878 Similarly if we find an integer constant. */
4880 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4882 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4883 struct table_elt *elt;
4885 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4886 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4887 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4889 for (elt = elt->first_same_value;
4890 elt; elt = elt->next_same_value)
4892 if (CONSTANT_P (elt->exp)
4893 && GET_MODE (elt->exp) == VOIDmode)
4896 if (GET_CODE (elt->exp) == SUBREG
4897 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4898 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4899 return copy_rtx (SUBREG_REG (elt->exp));
4905 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4906 We might be able to if the SUBREG is extracting a single word in an
4907 integral mode or extracting the low part. */
4909 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4910 const_arg0 = equiv_constant (folded_arg0);
4912 folded_arg0 = const_arg0;
4914 if (folded_arg0 != SUBREG_REG (x))
4918 if (GET_MODE_CLASS (mode) == MODE_INT
4919 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4920 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4921 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4922 GET_MODE (SUBREG_REG (x)));
4923 if (new == 0 && subreg_lowpart_p (x))
4924 new = gen_lowpart_if_possible (mode, folded_arg0);
4929 /* If this is a narrowing SUBREG and our operand is a REG, see if
4930 we can find an equivalence for REG that is an arithmetic operation
4931 in a wider mode where both operands are paradoxical SUBREGs
4932 from objects of our result mode. In that case, we couldn't report
4933 an equivalent value for that operation, since we don't know what the
4934 extra bits will be. But we can find an equivalence for this SUBREG
4935 by folding that operation is the narrow mode. This allows us to
4936 fold arithmetic in narrow modes when the machine only supports
4937 word-sized arithmetic.
4939 Also look for a case where we have a SUBREG whose operand is the
4940 same as our result. If both modes are smaller than a word, we
4941 are simply interpreting a register in different modes and we
4942 can use the inner value. */
4944 if (GET_CODE (folded_arg0) == REG
4945 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4946 && subreg_lowpart_p (x))
4948 struct table_elt *elt;
4950 /* We can use HASH here since we know that canon_hash won't be
4952 elt = lookup (folded_arg0,
4953 HASH (folded_arg0, GET_MODE (folded_arg0)),
4954 GET_MODE (folded_arg0));
4957 elt = elt->first_same_value;
4959 for (; elt; elt = elt->next_same_value)
4961 enum rtx_code eltcode = GET_CODE (elt->exp);
4963 /* Just check for unary and binary operations. */
4964 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4965 && GET_CODE (elt->exp) != SIGN_EXTEND
4966 && GET_CODE (elt->exp) != ZERO_EXTEND
4967 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4968 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4970 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4972 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4973 op0 = fold_rtx (op0, NULL_RTX);
4975 op0 = equiv_constant (op0);
4977 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4980 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4981 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4982 && eltcode != DIV && eltcode != MOD
4983 && eltcode != UDIV && eltcode != UMOD
4984 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4985 && eltcode != ROTATE && eltcode != ROTATERT
4986 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4987 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4989 || CONSTANT_P (XEXP (elt->exp, 0)))
4990 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4991 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4993 || CONSTANT_P (XEXP (elt->exp, 1))))
4995 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4996 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4998 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4999 op0 = fold_rtx (op0, NULL_RTX);
5002 op0 = equiv_constant (op0);
5004 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5005 op1 = fold_rtx (op1, NULL_RTX);
5008 op1 = equiv_constant (op1);
5010 /* If we are looking for the low SImode part of
5011 (ashift:DI c (const_int 32)), it doesn't work
5012 to compute that in SImode, because a 32-bit shift
5013 in SImode is unpredictable. We know the value is 0. */
5015 && GET_CODE (elt->exp) == ASHIFT
5016 && GET_CODE (op1) == CONST_INT
5017 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5019 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5021 /* If the count fits in the inner mode's width,
5022 but exceeds the outer mode's width,
5023 the value will get truncated to 0
5027 /* If the count exceeds even the inner mode's width,
5028 don't fold this expression. */
5031 else if (op0 && op1)
5032 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5036 else if (GET_CODE (elt->exp) == SUBREG
5037 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5038 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5040 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5041 new = copy_rtx (SUBREG_REG (elt->exp));
5052 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5053 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5054 new = lookup_as_function (XEXP (x, 0), code);
5056 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5060 /* If we are not actually processing an insn, don't try to find the
5061 best address. Not only don't we care, but we could modify the
5062 MEM in an invalid way since we have no insn to validate against. */
5064 find_best_addr (insn, &XEXP (x, 0));
5067 /* Even if we don't fold in the insn itself,
5068 we can safely do so here, in hopes of getting a constant. */
5069 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5071 HOST_WIDE_INT offset = 0;
5073 if (GET_CODE (addr) == REG
5074 && REGNO_QTY_VALID_P (REGNO (addr))
5075 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
5076 && qty_const[reg_qty[REGNO (addr)]] != 0)
5077 addr = qty_const[reg_qty[REGNO (addr)]];
5079 /* If address is constant, split it into a base and integer offset. */
5080 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5082 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5083 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5085 base = XEXP (XEXP (addr, 0), 0);
5086 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5088 else if (GET_CODE (addr) == LO_SUM
5089 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5090 base = XEXP (addr, 1);
5091 else if (GET_CODE (addr) == ADDRESSOF)
5092 return change_address (x, VOIDmode, addr);
5094 /* If this is a constant pool reference, we can fold it into its
5095 constant to allow better value tracking. */
5096 if (base && GET_CODE (base) == SYMBOL_REF
5097 && CONSTANT_POOL_ADDRESS_P (base))
5099 rtx constant = get_pool_constant (base);
5100 enum machine_mode const_mode = get_pool_mode (base);
5103 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5104 constant_pool_entries_cost = COST (constant);
5106 /* If we are loading the full constant, we have an equivalence. */
5107 if (offset == 0 && mode == const_mode)
5110 /* If this actually isn't a constant (weird!), we can't do
5111 anything. Otherwise, handle the two most common cases:
5112 extracting a word from a multi-word constant, and extracting
5113 the low-order bits. Other cases don't seem common enough to
5115 if (! CONSTANT_P (constant))
5118 if (GET_MODE_CLASS (mode) == MODE_INT
5119 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5120 && offset % UNITS_PER_WORD == 0
5121 && (new = operand_subword (constant,
5122 offset / UNITS_PER_WORD,
5123 0, const_mode)) != 0)
5126 if (((BYTES_BIG_ENDIAN
5127 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5128 || (! BYTES_BIG_ENDIAN && offset == 0))
5129 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5133 /* If this is a reference to a label at a known position in a jump
5134 table, we also know its value. */
5135 if (base && GET_CODE (base) == LABEL_REF)
5137 rtx label = XEXP (base, 0);
5138 rtx table_insn = NEXT_INSN (label);
5140 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5141 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5143 rtx table = PATTERN (table_insn);
5146 && (offset / GET_MODE_SIZE (GET_MODE (table))
5147 < XVECLEN (table, 0)))
5148 return XVECEXP (table, 0,
5149 offset / GET_MODE_SIZE (GET_MODE (table)));
5151 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5152 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5154 rtx table = PATTERN (table_insn);
5157 && (offset / GET_MODE_SIZE (GET_MODE (table))
5158 < XVECLEN (table, 1)))
5160 offset /= GET_MODE_SIZE (GET_MODE (table));
5161 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5164 if (GET_MODE (table) != Pmode)
5165 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5167 /* Indicate this is a constant. This isn't a
5168 valid form of CONST, but it will only be used
5169 to fold the next insns and then discarded, so
5170 it should be safe. */
5171 return gen_rtx_CONST (GET_MODE (new), new);
5180 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5181 validate_change (insn, &XVECEXP (x, 3, i),
5182 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5192 mode_arg0 = VOIDmode;
5194 /* Try folding our operands.
5195 Then see which ones have constant values known. */
5197 fmt = GET_RTX_FORMAT (code);
5198 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5201 rtx arg = XEXP (x, i);
5202 rtx folded_arg = arg, const_arg = 0;
5203 enum machine_mode mode_arg = GET_MODE (arg);
5204 rtx cheap_arg, expensive_arg;
5205 rtx replacements[2];
5208 /* Most arguments are cheap, so handle them specially. */
5209 switch (GET_CODE (arg))
5212 /* This is the same as calling equiv_constant; it is duplicated
5214 if (REGNO_QTY_VALID_P (REGNO (arg))
5215 && qty_const[reg_qty[REGNO (arg)]] != 0
5216 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5217 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5219 = gen_lowpart_if_possible (GET_MODE (arg),
5220 qty_const[reg_qty[REGNO (arg)]]);
5233 folded_arg = prev_insn_cc0;
5234 mode_arg = prev_insn_cc0_mode;
5235 const_arg = equiv_constant (folded_arg);
5240 folded_arg = fold_rtx (arg, insn);
5241 const_arg = equiv_constant (folded_arg);
5244 /* For the first three operands, see if the operand
5245 is constant or equivalent to a constant. */
5249 folded_arg0 = folded_arg;
5250 const_arg0 = const_arg;
5251 mode_arg0 = mode_arg;
5254 folded_arg1 = folded_arg;
5255 const_arg1 = const_arg;
5258 const_arg2 = const_arg;
5262 /* Pick the least expensive of the folded argument and an
5263 equivalent constant argument. */
5264 if (const_arg == 0 || const_arg == folded_arg
5265 || COST (const_arg) > COST (folded_arg))
5266 cheap_arg = folded_arg, expensive_arg = const_arg;
5268 cheap_arg = const_arg, expensive_arg = folded_arg;
5270 /* Try to replace the operand with the cheapest of the two
5271 possibilities. If it doesn't work and this is either of the first
5272 two operands of a commutative operation, try swapping them.
5273 If THAT fails, try the more expensive, provided it is cheaper
5274 than what is already there. */
5276 if (cheap_arg == XEXP (x, i))
5279 if (insn == 0 && ! copied)
5285 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5287 j < 2 && replacements[j]
5288 && COST (replacements[j]) < COST (XEXP (x, i));
5291 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5294 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5296 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5297 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5299 if (apply_change_group ())
5301 /* Swap them back to be invalid so that this loop can
5302 continue and flag them to be swapped back later. */
5305 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5317 /* Don't try to fold inside of a vector of expressions.
5318 Doing nothing is harmless. */
5322 /* If a commutative operation, place a constant integer as the second
5323 operand unless the first operand is also a constant integer. Otherwise,
5324 place any constant second unless the first operand is also a constant. */
5326 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5328 if (must_swap || (const_arg0
5330 || (GET_CODE (const_arg0) == CONST_INT
5331 && GET_CODE (const_arg1) != CONST_INT))))
5333 register rtx tem = XEXP (x, 0);
5335 if (insn == 0 && ! copied)
5341 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5342 validate_change (insn, &XEXP (x, 1), tem, 1);
5343 if (apply_change_group ())
5345 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5346 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5351 /* If X is an arithmetic operation, see if we can simplify it. */
5353 switch (GET_RTX_CLASS (code))
5359 /* We can't simplify extension ops unless we know the
5361 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5362 && mode_arg0 == VOIDmode)
5365 /* If we had a CONST, strip it off and put it back later if we
5367 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5368 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5370 new = simplify_unary_operation (code, mode,
5371 const_arg0 ? const_arg0 : folded_arg0,
5373 if (new != 0 && is_const)
5374 new = gen_rtx_CONST (mode, new);
5379 /* See what items are actually being compared and set FOLDED_ARG[01]
5380 to those values and CODE to the actual comparison code. If any are
5381 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5382 do anything if both operands are already known to be constant. */
5384 if (const_arg0 == 0 || const_arg1 == 0)
5386 struct table_elt *p0, *p1;
5387 rtx true = const_true_rtx, false = const0_rtx;
5388 enum machine_mode mode_arg1;
5390 #ifdef FLOAT_STORE_FLAG_VALUE
5391 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5393 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5395 false = CONST0_RTX (mode);
5399 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5400 &mode_arg0, &mode_arg1);
5401 const_arg0 = equiv_constant (folded_arg0);
5402 const_arg1 = equiv_constant (folded_arg1);
5404 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5405 what kinds of things are being compared, so we can't do
5406 anything with this comparison. */
5408 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5411 /* If we do not now have two constants being compared, see
5412 if we can nevertheless deduce some things about the
5414 if (const_arg0 == 0 || const_arg1 == 0)
5416 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5417 non-explicit constant? These aren't zero, but we
5418 don't know their sign. */
5419 if (const_arg1 == const0_rtx
5420 && (NONZERO_BASE_PLUS_P (folded_arg0)
5421 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5423 || GET_CODE (folded_arg0) == SYMBOL_REF
5425 || GET_CODE (folded_arg0) == LABEL_REF
5426 || GET_CODE (folded_arg0) == CONST))
5430 else if (code == NE)
5434 /* See if the two operands are the same. We don't do this
5435 for IEEE floating-point since we can't assume x == x
5436 since x might be a NaN. */
5438 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5439 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5440 && (folded_arg0 == folded_arg1
5441 || (GET_CODE (folded_arg0) == REG
5442 && GET_CODE (folded_arg1) == REG
5443 && (reg_qty[REGNO (folded_arg0)]
5444 == reg_qty[REGNO (folded_arg1)]))
5445 || ((p0 = lookup (folded_arg0,
5446 (safe_hash (folded_arg0, mode_arg0)
5447 % NBUCKETS), mode_arg0))
5448 && (p1 = lookup (folded_arg1,
5449 (safe_hash (folded_arg1, mode_arg0)
5450 % NBUCKETS), mode_arg0))
5451 && p0->first_same_value == p1->first_same_value)))
5452 return ((code == EQ || code == LE || code == GE
5453 || code == LEU || code == GEU)
5456 /* If FOLDED_ARG0 is a register, see if the comparison we are
5457 doing now is either the same as we did before or the reverse
5458 (we only check the reverse if not floating-point). */
5459 else if (GET_CODE (folded_arg0) == REG)
5461 int qty = reg_qty[REGNO (folded_arg0)];
5463 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5464 && (comparison_dominates_p (qty_comparison_code[qty], code)
5465 || (comparison_dominates_p (qty_comparison_code[qty],
5466 reverse_condition (code))
5467 && ! FLOAT_MODE_P (mode_arg0)))
5468 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5470 && rtx_equal_p (qty_comparison_const[qty],
5472 || (GET_CODE (folded_arg1) == REG
5473 && (reg_qty[REGNO (folded_arg1)]
5474 == qty_comparison_qty[qty]))))
5475 return (comparison_dominates_p (qty_comparison_code[qty],
5482 /* If we are comparing against zero, see if the first operand is
5483 equivalent to an IOR with a constant. If so, we may be able to
5484 determine the result of this comparison. */
5486 if (const_arg1 == const0_rtx)
5488 rtx y = lookup_as_function (folded_arg0, IOR);
5492 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5493 && GET_CODE (inner_const) == CONST_INT
5494 && INTVAL (inner_const) != 0)
5496 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5497 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5498 && (INTVAL (inner_const)
5499 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5500 rtx true = const_true_rtx, false = const0_rtx;
5502 #ifdef FLOAT_STORE_FLAG_VALUE
5503 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5505 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5507 false = CONST0_RTX (mode);
5531 new = simplify_relational_operation (code, mode_arg0,
5532 const_arg0 ? const_arg0 : folded_arg0,
5533 const_arg1 ? const_arg1 : folded_arg1);
5534 #ifdef FLOAT_STORE_FLAG_VALUE
5535 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5536 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5537 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5546 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5547 with that LABEL_REF as its second operand. If so, the result is
5548 the first operand of that MINUS. This handles switches with an
5549 ADDR_DIFF_VEC table. */
5550 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5553 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5554 : lookup_as_function (folded_arg0, MINUS);
5556 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5557 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5560 /* Now try for a CONST of a MINUS like the above. */
5561 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5562 : lookup_as_function (folded_arg0, CONST))) != 0
5563 && GET_CODE (XEXP (y, 0)) == MINUS
5564 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5565 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5566 return XEXP (XEXP (y, 0), 0);
5569 /* Likewise if the operands are in the other order. */
5570 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5573 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5574 : lookup_as_function (folded_arg1, MINUS);
5576 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5577 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5580 /* Now try for a CONST of a MINUS like the above. */
5581 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5582 : lookup_as_function (folded_arg1, CONST))) != 0
5583 && GET_CODE (XEXP (y, 0)) == MINUS
5584 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5585 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5586 return XEXP (XEXP (y, 0), 0);
5589 /* If second operand is a register equivalent to a negative
5590 CONST_INT, see if we can find a register equivalent to the
5591 positive constant. Make a MINUS if so. Don't do this for
5592 a non-negative constant since we might then alternate between
5593 chosing positive and negative constants. Having the positive
5594 constant previously-used is the more common case. Be sure
5595 the resulting constant is non-negative; if const_arg1 were
5596 the smallest negative number this would overflow: depending
5597 on the mode, this would either just be the same value (and
5598 hence not save anything) or be incorrect. */
5599 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5600 && INTVAL (const_arg1) < 0
5601 && - INTVAL (const_arg1) >= 0
5602 && GET_CODE (folded_arg1) == REG)
5604 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5606 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5610 for (p = p->first_same_value; p; p = p->next_same_value)
5611 if (GET_CODE (p->exp) == REG)
5612 return cse_gen_binary (MINUS, mode, folded_arg0,
5613 canon_reg (p->exp, NULL_RTX));
5618 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5619 If so, produce (PLUS Z C2-C). */
5620 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5622 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5623 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5624 return fold_rtx (plus_constant (copy_rtx (y),
5625 -INTVAL (const_arg1)),
5629 /* ... fall through ... */
5632 case SMIN: case SMAX: case UMIN: case UMAX:
5633 case IOR: case AND: case XOR:
5634 case MULT: case DIV: case UDIV:
5635 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5636 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5637 is known to be of similar form, we may be able to replace the
5638 operation with a combined operation. This may eliminate the
5639 intermediate operation if every use is simplified in this way.
5640 Note that the similar optimization done by combine.c only works
5641 if the intermediate operation's result has only one reference. */
5643 if (GET_CODE (folded_arg0) == REG
5644 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5647 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5648 rtx y = lookup_as_function (folded_arg0, code);
5650 enum rtx_code associate_code;
5654 || 0 == (inner_const
5655 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5656 || GET_CODE (inner_const) != CONST_INT
5657 /* If we have compiled a statement like
5658 "if (x == (x & mask1))", and now are looking at
5659 "x & mask2", we will have a case where the first operand
5660 of Y is the same as our first operand. Unless we detect
5661 this case, an infinite loop will result. */
5662 || XEXP (y, 0) == folded_arg0)
5665 /* Don't associate these operations if they are a PLUS with the
5666 same constant and it is a power of two. These might be doable
5667 with a pre- or post-increment. Similarly for two subtracts of
5668 identical powers of two with post decrement. */
5670 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5672 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5673 || exact_log2 (INTVAL (const_arg1)) >= 0
5675 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5676 || exact_log2 (- INTVAL (const_arg1)) >= 0
5681 /* Compute the code used to compose the constants. For example,
5682 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5685 = (code == MULT || code == DIV || code == UDIV ? MULT
5686 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5688 new_const = simplify_binary_operation (associate_code, mode,
5689 const_arg1, inner_const);
5694 /* If we are associating shift operations, don't let this
5695 produce a shift of the size of the object or larger.
5696 This could occur when we follow a sign-extend by a right
5697 shift on a machine that does a sign-extend as a pair
5700 if (is_shift && GET_CODE (new_const) == CONST_INT
5701 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5703 /* As an exception, we can turn an ASHIFTRT of this
5704 form into a shift of the number of bits - 1. */
5705 if (code == ASHIFTRT)
5706 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5711 y = copy_rtx (XEXP (y, 0));
5713 /* If Y contains our first operand (the most common way this
5714 can happen is if Y is a MEM), we would do into an infinite
5715 loop if we tried to fold it. So don't in that case. */
5717 if (! reg_mentioned_p (folded_arg0, y))
5718 y = fold_rtx (y, insn);
5720 return cse_gen_binary (code, mode, y, new_const);
5728 new = simplify_binary_operation (code, mode,
5729 const_arg0 ? const_arg0 : folded_arg0,
5730 const_arg1 ? const_arg1 : folded_arg1);
5734 /* (lo_sum (high X) X) is simply X. */
5735 if (code == LO_SUM && const_arg0 != 0
5736 && GET_CODE (const_arg0) == HIGH
5737 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5743 new = simplify_ternary_operation (code, mode, mode_arg0,
5744 const_arg0 ? const_arg0 : folded_arg0,
5745 const_arg1 ? const_arg1 : folded_arg1,
5746 const_arg2 ? const_arg2 : XEXP (x, 2));
5750 /* Always eliminate CONSTANT_P_RTX at this stage. */
5751 if (code == CONSTANT_P_RTX)
5752 return (const_arg0 ? const1_rtx : const0_rtx);
5756 return new ? new : x;
5759 /* Return a constant value currently equivalent to X.
5760 Return 0 if we don't know one. */
5766 if (GET_CODE (x) == REG
5767 && REGNO_QTY_VALID_P (REGNO (x))
5768 && qty_const[reg_qty[REGNO (x)]])
5769 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5771 if (x != 0 && CONSTANT_P (x))
5774 /* If X is a MEM, try to fold it outside the context of any insn to see if
5775 it might be equivalent to a constant. That handles the case where it
5776 is a constant-pool reference. Then try to look it up in the hash table
5777 in case it is something whose value we have seen before. */
5779 if (GET_CODE (x) == MEM)
5781 struct table_elt *elt;
5783 x = fold_rtx (x, NULL_RTX);
5787 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5791 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5792 if (elt->is_const && CONSTANT_P (elt->exp))
5799 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5800 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5801 least-significant part of X.
5802 MODE specifies how big a part of X to return.
5804 If the requested operation cannot be done, 0 is returned.
5806 This is similar to gen_lowpart in emit-rtl.c. */
5809 gen_lowpart_if_possible (mode, x)
5810 enum machine_mode mode;
5813 rtx result = gen_lowpart_common (mode, x);
5817 else if (GET_CODE (x) == MEM)
5819 /* This is the only other case we handle. */
5820 register int offset = 0;
5823 if (WORDS_BIG_ENDIAN)
5824 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5825 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5826 if (BYTES_BIG_ENDIAN)
5827 /* Adjust the address so that the address-after-the-data is
5829 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5830 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5831 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
5832 if (! memory_address_p (mode, XEXP (new, 0)))
5834 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5835 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5836 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5843 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5844 branch. It will be zero if not.
5846 In certain cases, this can cause us to add an equivalence. For example,
5847 if we are following the taken case of
5849 we can add the fact that `i' and '2' are now equivalent.
5851 In any case, we can record that this comparison was passed. If the same
5852 comparison is seen later, we will know its value. */
5855 record_jump_equiv (insn, taken)
5859 int cond_known_true;
5861 enum machine_mode mode, mode0, mode1;
5862 int reversed_nonequality = 0;
5865 /* Ensure this is the right kind of insn. */
5866 if (! condjump_p (insn) || simplejump_p (insn))
5869 /* See if this jump condition is known true or false. */
5871 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5873 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5875 /* Get the type of comparison being done and the operands being compared.
5876 If we had to reverse a non-equality condition, record that fact so we
5877 know that it isn't valid for floating-point. */
5878 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5879 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5880 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5882 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5883 if (! cond_known_true)
5885 reversed_nonequality = (code != EQ && code != NE);
5886 code = reverse_condition (code);
5889 /* The mode is the mode of the non-constant. */
5891 if (mode1 != VOIDmode)
5894 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5897 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5898 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5899 Make any useful entries we can with that information. Called from
5900 above function and called recursively. */
5903 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5905 enum machine_mode mode;
5907 int reversed_nonequality;
5909 unsigned op0_hash, op1_hash;
5910 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5911 struct table_elt *op0_elt, *op1_elt;
5913 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5914 we know that they are also equal in the smaller mode (this is also
5915 true for all smaller modes whether or not there is a SUBREG, but
5916 is not worth testing for with no SUBREG. */
5918 /* Note that GET_MODE (op0) may not equal MODE. */
5919 if (code == EQ && GET_CODE (op0) == SUBREG
5920 && (GET_MODE_SIZE (GET_MODE (op0))
5921 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5923 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5924 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5926 record_jump_cond (code, mode, SUBREG_REG (op0),
5927 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5928 reversed_nonequality);
5931 if (code == EQ && GET_CODE (op1) == SUBREG
5932 && (GET_MODE_SIZE (GET_MODE (op1))
5933 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5935 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5936 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5938 record_jump_cond (code, mode, SUBREG_REG (op1),
5939 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5940 reversed_nonequality);
5943 /* Similarly, if this is an NE comparison, and either is a SUBREG
5944 making a smaller mode, we know the whole thing is also NE. */
5946 /* Note that GET_MODE (op0) may not equal MODE;
5947 if we test MODE instead, we can get an infinite recursion
5948 alternating between two modes each wider than MODE. */
5950 if (code == NE && GET_CODE (op0) == SUBREG
5951 && subreg_lowpart_p (op0)
5952 && (GET_MODE_SIZE (GET_MODE (op0))
5953 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5955 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5956 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5958 record_jump_cond (code, mode, SUBREG_REG (op0),
5959 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5960 reversed_nonequality);
5963 if (code == NE && GET_CODE (op1) == SUBREG
5964 && subreg_lowpart_p (op1)
5965 && (GET_MODE_SIZE (GET_MODE (op1))
5966 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5968 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5969 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5971 record_jump_cond (code, mode, SUBREG_REG (op1),
5972 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5973 reversed_nonequality);
5976 /* Hash both operands. */
5979 hash_arg_in_memory = 0;
5980 hash_arg_in_struct = 0;
5981 op0_hash = HASH (op0, mode);
5982 op0_in_memory = hash_arg_in_memory;
5983 op0_in_struct = hash_arg_in_struct;
5989 hash_arg_in_memory = 0;
5990 hash_arg_in_struct = 0;
5991 op1_hash = HASH (op1, mode);
5992 op1_in_memory = hash_arg_in_memory;
5993 op1_in_struct = hash_arg_in_struct;
5998 /* Look up both operands. */
5999 op0_elt = lookup (op0, op0_hash, mode);
6000 op1_elt = lookup (op1, op1_hash, mode);
6002 /* If both operands are already equivalent or if they are not in the
6003 table but are identical, do nothing. */
6004 if ((op0_elt != 0 && op1_elt != 0
6005 && op0_elt->first_same_value == op1_elt->first_same_value)
6006 || op0 == op1 || rtx_equal_p (op0, op1))
6009 /* If we aren't setting two things equal all we can do is save this
6010 comparison. Similarly if this is floating-point. In the latter
6011 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6012 If we record the equality, we might inadvertently delete code
6013 whose intent was to change -0 to +0. */
6015 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6017 /* If we reversed a floating-point comparison, if OP0 is not a
6018 register, or if OP1 is neither a register or constant, we can't
6021 if (GET_CODE (op1) != REG)
6022 op1 = equiv_constant (op1);
6024 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6025 || GET_CODE (op0) != REG || op1 == 0)
6028 /* Put OP0 in the hash table if it isn't already. This gives it a
6029 new quantity number. */
6032 if (insert_regs (op0, NULL_PTR, 0))
6034 rehash_using_reg (op0);
6035 op0_hash = HASH (op0, mode);
6037 /* If OP0 is contained in OP1, this changes its hash code
6038 as well. Faster to rehash than to check, except
6039 for the simple case of a constant. */
6040 if (! CONSTANT_P (op1))
6041 op1_hash = HASH (op1,mode);
6044 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6045 op0_elt->in_memory = op0_in_memory;
6046 op0_elt->in_struct = op0_in_struct;
6049 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
6050 if (GET_CODE (op1) == REG)
6052 /* Look it up again--in case op0 and op1 are the same. */
6053 op1_elt = lookup (op1, op1_hash, mode);
6055 /* Put OP1 in the hash table so it gets a new quantity number. */
6058 if (insert_regs (op1, NULL_PTR, 0))
6060 rehash_using_reg (op1);
6061 op1_hash = HASH (op1, mode);
6064 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6065 op1_elt->in_memory = op1_in_memory;
6066 op1_elt->in_struct = op1_in_struct;
6069 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
6070 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
6074 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
6075 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
6081 /* If either side is still missing an equivalence, make it now,
6082 then merge the equivalences. */
6086 if (insert_regs (op0, NULL_PTR, 0))
6088 rehash_using_reg (op0);
6089 op0_hash = HASH (op0, mode);
6092 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6093 op0_elt->in_memory = op0_in_memory;
6094 op0_elt->in_struct = op0_in_struct;
6099 if (insert_regs (op1, NULL_PTR, 0))
6101 rehash_using_reg (op1);
6102 op1_hash = HASH (op1, mode);
6105 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6106 op1_elt->in_memory = op1_in_memory;
6107 op1_elt->in_struct = op1_in_struct;
6110 merge_equiv_classes (op0_elt, op1_elt);
6111 last_jump_equiv_class = op0_elt;
6114 /* CSE processing for one instruction.
6115 First simplify sources and addresses of all assignments
6116 in the instruction, using previously-computed equivalents values.
6117 Then install the new sources and destinations in the table
6118 of available values.
6120 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6121 the insn. It means that INSN is inside libcall block. In this
6122 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6124 /* Data on one SET contained in the instruction. */
6128 /* The SET rtx itself. */
6130 /* The SET_SRC of the rtx (the original value, if it is changing). */
6132 /* The hash-table element for the SET_SRC of the SET. */
6133 struct table_elt *src_elt;
6134 /* Hash value for the SET_SRC. */
6136 /* Hash value for the SET_DEST. */
6138 /* The SET_DEST, with SUBREG, etc., stripped. */
6140 /* Place where the pointer to the INNER_DEST was found. */
6141 rtx *inner_dest_loc;
6142 /* Nonzero if the SET_SRC is in memory. */
6144 /* Nonzero if the SET_SRC is in a structure. */
6146 /* Nonzero if the SET_SRC contains something
6147 whose value cannot be predicted and understood. */
6149 /* Original machine mode, in case it becomes a CONST_INT. */
6150 enum machine_mode mode;
6151 /* A constant equivalent for SET_SRC, if any. */
6153 /* Hash value of constant equivalent for SET_SRC. */
6154 unsigned src_const_hash;
6155 /* Table entry for constant equivalent for SET_SRC, if any. */
6156 struct table_elt *src_const_elt;
6160 cse_insn (insn, libcall_insn)
6164 register rtx x = PATTERN (insn);
6167 register int n_sets = 0;
6170 /* Records what this insn does to set CC0. */
6171 rtx this_insn_cc0 = 0;
6172 enum machine_mode this_insn_cc0_mode = VOIDmode;
6176 struct table_elt *src_eqv_elt = 0;
6177 int src_eqv_volatile;
6178 int src_eqv_in_memory;
6179 int src_eqv_in_struct;
6180 unsigned src_eqv_hash;
6186 /* Find all the SETs and CLOBBERs in this instruction.
6187 Record all the SETs in the array `set' and count them.
6188 Also determine whether there is a CLOBBER that invalidates
6189 all memory references, or all references at varying addresses. */
6191 if (GET_CODE (insn) == CALL_INSN)
6193 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6194 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6195 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6198 if (GET_CODE (x) == SET)
6200 sets = (struct set *) alloca (sizeof (struct set));
6203 /* Ignore SETs that are unconditional jumps.
6204 They never need cse processing, so this does not hurt.
6205 The reason is not efficiency but rather
6206 so that we can test at the end for instructions
6207 that have been simplified to unconditional jumps
6208 and not be misled by unchanged instructions
6209 that were unconditional jumps to begin with. */
6210 if (SET_DEST (x) == pc_rtx
6211 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6214 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6215 The hard function value register is used only once, to copy to
6216 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6217 Ensure we invalidate the destination register. On the 80386 no
6218 other code would invalidate it since it is a fixed_reg.
6219 We need not check the return of apply_change_group; see canon_reg. */
6221 else if (GET_CODE (SET_SRC (x)) == CALL)
6223 canon_reg (SET_SRC (x), insn);
6224 apply_change_group ();
6225 fold_rtx (SET_SRC (x), insn);
6226 invalidate (SET_DEST (x), VOIDmode);
6231 else if (GET_CODE (x) == PARALLEL)
6233 register int lim = XVECLEN (x, 0);
6235 sets = (struct set *) alloca (lim * sizeof (struct set));
6237 /* Find all regs explicitly clobbered in this insn,
6238 and ensure they are not replaced with any other regs
6239 elsewhere in this insn.
6240 When a reg that is clobbered is also used for input,
6241 we should presume that that is for a reason,
6242 and we should not substitute some other register
6243 which is not supposed to be clobbered.
6244 Therefore, this loop cannot be merged into the one below
6245 because a CALL may precede a CLOBBER and refer to the
6246 value clobbered. We must not let a canonicalization do
6247 anything in that case. */
6248 for (i = 0; i < lim; i++)
6250 register rtx y = XVECEXP (x, 0, i);
6251 if (GET_CODE (y) == CLOBBER)
6253 rtx clobbered = XEXP (y, 0);
6255 if (GET_CODE (clobbered) == REG
6256 || GET_CODE (clobbered) == SUBREG)
6257 invalidate (clobbered, VOIDmode);
6258 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6259 || GET_CODE (clobbered) == ZERO_EXTRACT)
6260 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6264 for (i = 0; i < lim; i++)
6266 register rtx y = XVECEXP (x, 0, i);
6267 if (GET_CODE (y) == SET)
6269 /* As above, we ignore unconditional jumps and call-insns and
6270 ignore the result of apply_change_group. */
6271 if (GET_CODE (SET_SRC (y)) == CALL)
6273 canon_reg (SET_SRC (y), insn);
6274 apply_change_group ();
6275 fold_rtx (SET_SRC (y), insn);
6276 invalidate (SET_DEST (y), VOIDmode);
6278 else if (SET_DEST (y) == pc_rtx
6279 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6282 sets[n_sets++].rtl = y;
6284 else if (GET_CODE (y) == CLOBBER)
6286 /* If we clobber memory, canon the address.
6287 This does nothing when a register is clobbered
6288 because we have already invalidated the reg. */
6289 if (GET_CODE (XEXP (y, 0)) == MEM)
6290 canon_reg (XEXP (y, 0), NULL_RTX);
6292 else if (GET_CODE (y) == USE
6293 && ! (GET_CODE (XEXP (y, 0)) == REG
6294 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6295 canon_reg (y, NULL_RTX);
6296 else if (GET_CODE (y) == CALL)
6298 /* The result of apply_change_group can be ignored; see
6300 canon_reg (y, insn);
6301 apply_change_group ();
6306 else if (GET_CODE (x) == CLOBBER)
6308 if (GET_CODE (XEXP (x, 0)) == MEM)
6309 canon_reg (XEXP (x, 0), NULL_RTX);
6312 /* Canonicalize a USE of a pseudo register or memory location. */
6313 else if (GET_CODE (x) == USE
6314 && ! (GET_CODE (XEXP (x, 0)) == REG
6315 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6316 canon_reg (XEXP (x, 0), NULL_RTX);
6317 else if (GET_CODE (x) == CALL)
6319 /* The result of apply_change_group can be ignored; see canon_reg. */
6320 canon_reg (x, insn);
6321 apply_change_group ();
6325 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6326 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6327 is handled specially for this case, and if it isn't set, then there will
6328 be no equivalence for the destination. */
6329 if (n_sets == 1 && REG_NOTES (insn) != 0
6330 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6331 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6332 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6333 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6335 /* Canonicalize sources and addresses of destinations.
6336 We do this in a separate pass to avoid problems when a MATCH_DUP is
6337 present in the insn pattern. In that case, we want to ensure that
6338 we don't break the duplicate nature of the pattern. So we will replace
6339 both operands at the same time. Otherwise, we would fail to find an
6340 equivalent substitution in the loop calling validate_change below.
6342 We used to suppress canonicalization of DEST if it appears in SRC,
6343 but we don't do this any more. */
6345 for (i = 0; i < n_sets; i++)
6347 rtx dest = SET_DEST (sets[i].rtl);
6348 rtx src = SET_SRC (sets[i].rtl);
6349 rtx new = canon_reg (src, insn);
6352 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6353 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6354 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6355 || (insn_code = recog_memoized (insn)) < 0
6356 || insn_n_dups[insn_code] > 0)
6357 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6359 SET_SRC (sets[i].rtl) = new;
6361 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6363 validate_change (insn, &XEXP (dest, 1),
6364 canon_reg (XEXP (dest, 1), insn), 1);
6365 validate_change (insn, &XEXP (dest, 2),
6366 canon_reg (XEXP (dest, 2), insn), 1);
6369 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6370 || GET_CODE (dest) == ZERO_EXTRACT
6371 || GET_CODE (dest) == SIGN_EXTRACT)
6372 dest = XEXP (dest, 0);
6374 if (GET_CODE (dest) == MEM)
6375 canon_reg (dest, insn);
6378 /* Now that we have done all the replacements, we can apply the change
6379 group and see if they all work. Note that this will cause some
6380 canonicalizations that would have worked individually not to be applied
6381 because some other canonicalization didn't work, but this should not
6384 The result of apply_change_group can be ignored; see canon_reg. */
6386 apply_change_group ();
6388 /* Set sets[i].src_elt to the class each source belongs to.
6389 Detect assignments from or to volatile things
6390 and set set[i] to zero so they will be ignored
6391 in the rest of this function.
6393 Nothing in this loop changes the hash table or the register chains. */
6395 for (i = 0; i < n_sets; i++)
6397 register rtx src, dest;
6398 register rtx src_folded;
6399 register struct table_elt *elt = 0, *p;
6400 enum machine_mode mode;
6403 rtx src_related = 0;
6404 struct table_elt *src_const_elt = 0;
6405 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6406 int src_related_cost = 10000, src_elt_cost = 10000;
6407 /* Set non-zero if we need to call force_const_mem on with the
6408 contents of src_folded before using it. */
6409 int src_folded_force_flag = 0;
6411 dest = SET_DEST (sets[i].rtl);
6412 src = SET_SRC (sets[i].rtl);
6414 /* If SRC is a constant that has no machine mode,
6415 hash it with the destination's machine mode.
6416 This way we can keep different modes separate. */
6418 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6419 sets[i].mode = mode;
6423 enum machine_mode eqvmode = mode;
6424 if (GET_CODE (dest) == STRICT_LOW_PART)
6425 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6427 hash_arg_in_memory = 0;
6428 hash_arg_in_struct = 0;
6429 src_eqv = fold_rtx (src_eqv, insn);
6430 src_eqv_hash = HASH (src_eqv, eqvmode);
6432 /* Find the equivalence class for the equivalent expression. */
6435 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6437 src_eqv_volatile = do_not_record;
6438 src_eqv_in_memory = hash_arg_in_memory;
6439 src_eqv_in_struct = hash_arg_in_struct;
6442 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6443 value of the INNER register, not the destination. So it is not
6444 a valid substitution for the source. But save it for later. */
6445 if (GET_CODE (dest) == STRICT_LOW_PART)
6448 src_eqv_here = src_eqv;
6450 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6451 simplified result, which may not necessarily be valid. */
6452 src_folded = fold_rtx (src, insn);
6455 /* ??? This caused bad code to be generated for the m68k port with -O2.
6456 Suppose src is (CONST_INT -1), and that after truncation src_folded
6457 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6458 At the end we will add src and src_const to the same equivalence
6459 class. We now have 3 and -1 on the same equivalence class. This
6460 causes later instructions to be mis-optimized. */
6461 /* If storing a constant in a bitfield, pre-truncate the constant
6462 so we will be able to record it later. */
6463 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6464 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6466 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6468 if (GET_CODE (src) == CONST_INT
6469 && GET_CODE (width) == CONST_INT
6470 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6471 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6473 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6474 << INTVAL (width)) - 1));
6478 /* Compute SRC's hash code, and also notice if it
6479 should not be recorded at all. In that case,
6480 prevent any further processing of this assignment. */
6482 hash_arg_in_memory = 0;
6483 hash_arg_in_struct = 0;
6486 sets[i].src_hash = HASH (src, mode);
6487 sets[i].src_volatile = do_not_record;
6488 sets[i].src_in_memory = hash_arg_in_memory;
6489 sets[i].src_in_struct = hash_arg_in_struct;
6491 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6492 a pseudo that is set more than once, do not record SRC. Using
6493 SRC as a replacement for anything else will be incorrect in that
6494 situation. Note that this usually occurs only for stack slots,
6495 in which case all the RTL would be referring to SRC, so we don't
6496 lose any optimization opportunities by not having SRC in the
6499 if (GET_CODE (src) == MEM
6500 && find_reg_note (insn, REG_EQUIV, src) != 0
6501 && GET_CODE (dest) == REG
6502 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6503 && REG_N_SETS (REGNO (dest)) != 1)
6504 sets[i].src_volatile = 1;
6507 /* It is no longer clear why we used to do this, but it doesn't
6508 appear to still be needed. So let's try without it since this
6509 code hurts cse'ing widened ops. */
6510 /* If source is a perverse subreg (such as QI treated as an SI),
6511 treat it as volatile. It may do the work of an SI in one context
6512 where the extra bits are not being used, but cannot replace an SI
6514 if (GET_CODE (src) == SUBREG
6515 && (GET_MODE_SIZE (GET_MODE (src))
6516 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6517 sets[i].src_volatile = 1;
6520 /* Locate all possible equivalent forms for SRC. Try to replace
6521 SRC in the insn with each cheaper equivalent.
6523 We have the following types of equivalents: SRC itself, a folded
6524 version, a value given in a REG_EQUAL note, or a value related
6527 Each of these equivalents may be part of an additional class
6528 of equivalents (if more than one is in the table, they must be in
6529 the same class; we check for this).
6531 If the source is volatile, we don't do any table lookups.
6533 We note any constant equivalent for possible later use in a
6536 if (!sets[i].src_volatile)
6537 elt = lookup (src, sets[i].src_hash, mode);
6539 sets[i].src_elt = elt;
6541 if (elt && src_eqv_here && src_eqv_elt)
6543 if (elt->first_same_value != src_eqv_elt->first_same_value)
6545 /* The REG_EQUAL is indicating that two formerly distinct
6546 classes are now equivalent. So merge them. */
6547 merge_equiv_classes (elt, src_eqv_elt);
6548 src_eqv_hash = HASH (src_eqv, elt->mode);
6549 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6555 else if (src_eqv_elt)
6558 /* Try to find a constant somewhere and record it in `src_const'.
6559 Record its table element, if any, in `src_const_elt'. Look in
6560 any known equivalences first. (If the constant is not in the
6561 table, also set `sets[i].src_const_hash'). */
6563 for (p = elt->first_same_value; p; p = p->next_same_value)
6567 src_const_elt = elt;
6572 && (CONSTANT_P (src_folded)
6573 /* Consider (minus (label_ref L1) (label_ref L2)) as
6574 "constant" here so we will record it. This allows us
6575 to fold switch statements when an ADDR_DIFF_VEC is used. */
6576 || (GET_CODE (src_folded) == MINUS
6577 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6578 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6579 src_const = src_folded, src_const_elt = elt;
6580 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6581 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6583 /* If we don't know if the constant is in the table, get its
6584 hash code and look it up. */
6585 if (src_const && src_const_elt == 0)
6587 sets[i].src_const_hash = HASH (src_const, mode);
6588 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6591 sets[i].src_const = src_const;
6592 sets[i].src_const_elt = src_const_elt;
6594 /* If the constant and our source are both in the table, mark them as
6595 equivalent. Otherwise, if a constant is in the table but the source
6596 isn't, set ELT to it. */
6597 if (src_const_elt && elt
6598 && src_const_elt->first_same_value != elt->first_same_value)
6599 merge_equiv_classes (elt, src_const_elt);
6600 else if (src_const_elt && elt == 0)
6601 elt = src_const_elt;
6603 /* See if there is a register linearly related to a constant
6604 equivalent of SRC. */
6606 && (GET_CODE (src_const) == CONST
6607 || (src_const_elt && src_const_elt->related_value != 0)))
6609 src_related = use_related_value (src_const, src_const_elt);
6612 struct table_elt *src_related_elt
6613 = lookup (src_related, HASH (src_related, mode), mode);
6614 if (src_related_elt && elt)
6616 if (elt->first_same_value
6617 != src_related_elt->first_same_value)
6618 /* This can occur when we previously saw a CONST
6619 involving a SYMBOL_REF and then see the SYMBOL_REF
6620 twice. Merge the involved classes. */
6621 merge_equiv_classes (elt, src_related_elt);
6624 src_related_elt = 0;
6626 else if (src_related_elt && elt == 0)
6627 elt = src_related_elt;
6631 /* See if we have a CONST_INT that is already in a register in a
6634 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6635 && GET_MODE_CLASS (mode) == MODE_INT
6636 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6638 enum machine_mode wider_mode;
6640 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6641 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6642 && src_related == 0;
6643 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6645 struct table_elt *const_elt
6646 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6651 for (const_elt = const_elt->first_same_value;
6652 const_elt; const_elt = const_elt->next_same_value)
6653 if (GET_CODE (const_elt->exp) == REG)
6655 src_related = gen_lowpart_if_possible (mode,
6662 /* Another possibility is that we have an AND with a constant in
6663 a mode narrower than a word. If so, it might have been generated
6664 as part of an "if" which would narrow the AND. If we already
6665 have done the AND in a wider mode, we can use a SUBREG of that
6668 if (flag_expensive_optimizations && ! src_related
6669 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6670 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6672 enum machine_mode tmode;
6673 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6675 for (tmode = GET_MODE_WIDER_MODE (mode);
6676 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6677 tmode = GET_MODE_WIDER_MODE (tmode))
6679 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6680 struct table_elt *larger_elt;
6684 PUT_MODE (new_and, tmode);
6685 XEXP (new_and, 0) = inner;
6686 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6687 if (larger_elt == 0)
6690 for (larger_elt = larger_elt->first_same_value;
6691 larger_elt; larger_elt = larger_elt->next_same_value)
6692 if (GET_CODE (larger_elt->exp) == REG)
6695 = gen_lowpart_if_possible (mode, larger_elt->exp);
6705 #ifdef LOAD_EXTEND_OP
6706 /* See if a MEM has already been loaded with a widening operation;
6707 if it has, we can use a subreg of that. Many CISC machines
6708 also have such operations, but this is only likely to be
6709 beneficial these machines. */
6711 if (flag_expensive_optimizations && src_related == 0
6712 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6713 && GET_MODE_CLASS (mode) == MODE_INT
6714 && GET_CODE (src) == MEM && ! do_not_record
6715 && LOAD_EXTEND_OP (mode) != NIL)
6717 enum machine_mode tmode;
6719 /* Set what we are trying to extend and the operation it might
6720 have been extended with. */
6721 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6722 XEXP (memory_extend_rtx, 0) = src;
6724 for (tmode = GET_MODE_WIDER_MODE (mode);
6725 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6726 tmode = GET_MODE_WIDER_MODE (tmode))
6728 struct table_elt *larger_elt;
6730 PUT_MODE (memory_extend_rtx, tmode);
6731 larger_elt = lookup (memory_extend_rtx,
6732 HASH (memory_extend_rtx, tmode), tmode);
6733 if (larger_elt == 0)
6736 for (larger_elt = larger_elt->first_same_value;
6737 larger_elt; larger_elt = larger_elt->next_same_value)
6738 if (GET_CODE (larger_elt->exp) == REG)
6740 src_related = gen_lowpart_if_possible (mode,
6749 #endif /* LOAD_EXTEND_OP */
6751 if (src == src_folded)
6754 /* At this point, ELT, if non-zero, points to a class of expressions
6755 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6756 and SRC_RELATED, if non-zero, each contain additional equivalent
6757 expressions. Prune these latter expressions by deleting expressions
6758 already in the equivalence class.
6760 Check for an equivalent identical to the destination. If found,
6761 this is the preferred equivalent since it will likely lead to
6762 elimination of the insn. Indicate this by placing it in
6765 if (elt) elt = elt->first_same_value;
6766 for (p = elt; p; p = p->next_same_value)
6768 enum rtx_code code = GET_CODE (p->exp);
6770 /* If the expression is not valid, ignore it. Then we do not
6771 have to check for validity below. In most cases, we can use
6772 `rtx_equal_p', since canonicalization has already been done. */
6773 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6776 /* Also skip paradoxical subregs, unless that's what we're
6779 && (GET_MODE_SIZE (GET_MODE (p->exp))
6780 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6782 && GET_CODE (src) == SUBREG
6783 && GET_MODE (src) == GET_MODE (p->exp)
6784 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6785 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
6788 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6790 else if (src_folded && GET_CODE (src_folded) == code
6791 && rtx_equal_p (src_folded, p->exp))
6793 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6794 && rtx_equal_p (src_eqv_here, p->exp))
6796 else if (src_related && GET_CODE (src_related) == code
6797 && rtx_equal_p (src_related, p->exp))
6800 /* This is the same as the destination of the insns, we want
6801 to prefer it. Copy it to src_related. The code below will
6802 then give it a negative cost. */
6803 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6808 /* Find the cheapest valid equivalent, trying all the available
6809 possibilities. Prefer items not in the hash table to ones
6810 that are when they are equal cost. Note that we can never
6811 worsen an insn as the current contents will also succeed.
6812 If we find an equivalent identical to the destination, use it as best,
6813 since this insn will probably be eliminated in that case. */
6816 if (rtx_equal_p (src, dest))
6819 src_cost = COST (src);
6824 if (rtx_equal_p (src_eqv_here, dest))
6827 src_eqv_cost = COST (src_eqv_here);
6832 if (rtx_equal_p (src_folded, dest))
6833 src_folded_cost = -1;
6835 src_folded_cost = COST (src_folded);
6840 if (rtx_equal_p (src_related, dest))
6841 src_related_cost = -1;
6843 src_related_cost = COST (src_related);
6846 /* If this was an indirect jump insn, a known label will really be
6847 cheaper even though it looks more expensive. */
6848 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6849 src_folded = src_const, src_folded_cost = -1;
6851 /* Terminate loop when replacement made. This must terminate since
6852 the current contents will be tested and will always be valid. */
6857 /* Skip invalid entries. */
6858 while (elt && GET_CODE (elt->exp) != REG
6859 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6860 elt = elt->next_same_value;
6862 /* A paradoxical subreg would be bad here: it'll be the right
6863 size, but later may be adjusted so that the upper bits aren't
6864 what we want. So reject it. */
6866 && GET_CODE (elt->exp) == SUBREG
6867 && (GET_MODE_SIZE (GET_MODE (elt->exp))
6868 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
6869 /* It is okay, though, if the rtx we're trying to match
6870 will ignore any of the bits we can't predict. */
6872 && GET_CODE (src) == SUBREG
6873 && GET_MODE (src) == GET_MODE (elt->exp)
6874 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6875 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
6877 elt = elt->next_same_value;
6881 if (elt) src_elt_cost = elt->cost;
6883 /* Find cheapest and skip it for the next time. For items
6884 of equal cost, use this order:
6885 src_folded, src, src_eqv, src_related and hash table entry. */
6886 if (src_folded_cost <= src_cost
6887 && src_folded_cost <= src_eqv_cost
6888 && src_folded_cost <= src_related_cost
6889 && src_folded_cost <= src_elt_cost)
6891 trial = src_folded, src_folded_cost = 10000;
6892 if (src_folded_force_flag)
6893 trial = force_const_mem (mode, trial);
6895 else if (src_cost <= src_eqv_cost
6896 && src_cost <= src_related_cost
6897 && src_cost <= src_elt_cost)
6898 trial = src, src_cost = 10000;
6899 else if (src_eqv_cost <= src_related_cost
6900 && src_eqv_cost <= src_elt_cost)
6901 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6902 else if (src_related_cost <= src_elt_cost)
6903 trial = copy_rtx (src_related), src_related_cost = 10000;
6906 trial = copy_rtx (elt->exp);
6907 elt = elt->next_same_value;
6908 src_elt_cost = 10000;
6911 /* We don't normally have an insn matching (set (pc) (pc)), so
6912 check for this separately here. We will delete such an
6915 Tablejump insns contain a USE of the table, so simply replacing
6916 the operand with the constant won't match. This is simply an
6917 unconditional branch, however, and is therefore valid. Just
6918 insert the substitution here and we will delete and re-emit
6921 /* Keep track of the original SET_SRC so that we can fix notes
6922 on libcall instructions. */
6923 old_src = SET_SRC (sets[i].rtl);
6925 if (n_sets == 1 && dest == pc_rtx
6927 || (GET_CODE (trial) == LABEL_REF
6928 && ! condjump_p (insn))))
6930 /* If TRIAL is a label in front of a jump table, we are
6931 really falling through the switch (this is how casesi
6932 insns work), so we must branch around the table. */
6933 if (GET_CODE (trial) == CODE_LABEL
6934 && NEXT_INSN (trial) != 0
6935 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6936 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6937 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6939 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
6941 SET_SRC (sets[i].rtl) = trial;
6942 cse_jumps_altered = 1;
6946 /* Look for a substitution that makes a valid insn. */
6947 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6949 /* If we just made a substitution inside a libcall, then we
6950 need to make the same substitution in any notes attached
6951 to the RETVAL insn. */
6953 && (GET_CODE (old_src) == REG
6954 || GET_CODE (old_src) == SUBREG
6955 || GET_CODE (old_src) == MEM))
6956 replace_rtx (REG_NOTES (libcall_insn), old_src,
6957 canon_reg (SET_SRC (sets[i].rtl), insn));
6959 /* The result of apply_change_group can be ignored; see
6962 validate_change (insn, &SET_SRC (sets[i].rtl),
6963 canon_reg (SET_SRC (sets[i].rtl), insn),
6965 apply_change_group ();
6969 /* If we previously found constant pool entries for
6970 constants and this is a constant, try making a
6971 pool entry. Put it in src_folded unless we already have done
6972 this since that is where it likely came from. */
6974 else if (constant_pool_entries_cost
6975 && CONSTANT_P (trial)
6976 && ! (GET_CODE (trial) == CONST
6977 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
6979 || (GET_CODE (src_folded) != MEM
6980 && ! src_folded_force_flag))
6981 && GET_MODE_CLASS (mode) != MODE_CC
6982 && mode != VOIDmode)
6984 src_folded_force_flag = 1;
6986 src_folded_cost = constant_pool_entries_cost;
6990 src = SET_SRC (sets[i].rtl);
6992 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6993 However, there is an important exception: If both are registers
6994 that are not the head of their equivalence class, replace SET_SRC
6995 with the head of the class. If we do not do this, we will have
6996 both registers live over a portion of the basic block. This way,
6997 their lifetimes will likely abut instead of overlapping. */
6998 if (GET_CODE (dest) == REG
6999 && REGNO_QTY_VALID_P (REGNO (dest))
7000 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
7001 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
7002 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7003 /* Don't do this if the original insn had a hard reg as
7005 && (GET_CODE (sets[i].src) != REG
7006 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
7007 /* We can't call canon_reg here because it won't do anything if
7008 SRC is a hard register. */
7010 int first = qty_first_reg[reg_qty[REGNO (src)]];
7012 = (first >= FIRST_PSEUDO_REGISTER
7013 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7015 /* We must use validate-change even for this, because this
7016 might be a special no-op instruction, suitable only to
7018 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7021 /* If we had a constant that is cheaper than what we are now
7022 setting SRC to, use that constant. We ignored it when we
7023 thought we could make this into a no-op. */
7024 if (src_const && COST (src_const) < COST (src)
7025 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7031 /* If we made a change, recompute SRC values. */
7032 if (src != sets[i].src)
7035 hash_arg_in_memory = 0;
7036 hash_arg_in_struct = 0;
7038 sets[i].src_hash = HASH (src, mode);
7039 sets[i].src_volatile = do_not_record;
7040 sets[i].src_in_memory = hash_arg_in_memory;
7041 sets[i].src_in_struct = hash_arg_in_struct;
7042 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7045 /* If this is a single SET, we are setting a register, and we have an
7046 equivalent constant, we want to add a REG_NOTE. We don't want
7047 to write a REG_EQUAL note for a constant pseudo since verifying that
7048 that pseudo hasn't been eliminated is a pain. Such a note also
7049 won't help anything. */
7050 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7051 && GET_CODE (src_const) != REG)
7053 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7055 /* Record the actual constant value in a REG_EQUAL note, making
7056 a new one if one does not already exist. */
7058 XEXP (tem, 0) = src_const;
7060 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7061 src_const, REG_NOTES (insn));
7063 /* If storing a constant value in a register that
7064 previously held the constant value 0,
7065 record this fact with a REG_WAS_0 note on this insn.
7067 Note that the *register* is required to have previously held 0,
7068 not just any register in the quantity and we must point to the
7069 insn that set that register to zero.
7071 Rather than track each register individually, we just see if
7072 the last set for this quantity was for this register. */
7074 if (REGNO_QTY_VALID_P (REGNO (dest))
7075 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
7077 /* See if we previously had a REG_WAS_0 note. */
7078 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7079 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
7081 if ((tem = single_set (const_insn)) != 0
7082 && rtx_equal_p (SET_DEST (tem), dest))
7085 XEXP (note, 0) = const_insn;
7087 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7094 /* Now deal with the destination. */
7096 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7098 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7099 to the MEM or REG within it. */
7100 while (GET_CODE (dest) == SIGN_EXTRACT
7101 || GET_CODE (dest) == ZERO_EXTRACT
7102 || GET_CODE (dest) == SUBREG
7103 || GET_CODE (dest) == STRICT_LOW_PART)
7105 sets[i].inner_dest_loc = &XEXP (dest, 0);
7106 dest = XEXP (dest, 0);
7109 sets[i].inner_dest = dest;
7111 if (GET_CODE (dest) == MEM)
7113 #ifdef PUSH_ROUNDING
7114 /* Stack pushes invalidate the stack pointer. */
7115 rtx addr = XEXP (dest, 0);
7116 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7117 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7118 && XEXP (addr, 0) == stack_pointer_rtx)
7119 invalidate (stack_pointer_rtx, Pmode);
7121 dest = fold_rtx (dest, insn);
7124 /* Compute the hash code of the destination now,
7125 before the effects of this instruction are recorded,
7126 since the register values used in the address computation
7127 are those before this instruction. */
7128 sets[i].dest_hash = HASH (dest, mode);
7130 /* Don't enter a bit-field in the hash table
7131 because the value in it after the store
7132 may not equal what was stored, due to truncation. */
7134 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7135 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7137 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7139 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7140 && GET_CODE (width) == CONST_INT
7141 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7142 && ! (INTVAL (src_const)
7143 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7144 /* Exception: if the value is constant,
7145 and it won't be truncated, record it. */
7149 /* This is chosen so that the destination will be invalidated
7150 but no new value will be recorded.
7151 We must invalidate because sometimes constant
7152 values can be recorded for bitfields. */
7153 sets[i].src_elt = 0;
7154 sets[i].src_volatile = 1;
7160 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7162 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7164 PUT_CODE (insn, NOTE);
7165 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7166 NOTE_SOURCE_FILE (insn) = 0;
7167 cse_jumps_altered = 1;
7168 /* One less use of the label this insn used to jump to. */
7169 if (JUMP_LABEL (insn) != 0)
7170 --LABEL_NUSES (JUMP_LABEL (insn));
7171 /* No more processing for this set. */
7175 /* If this SET is now setting PC to a label, we know it used to
7176 be a conditional or computed branch. So we see if we can follow
7177 it. If it was a computed branch, delete it and re-emit. */
7178 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7182 /* If this is not in the format for a simple branch and
7183 we are the only SET in it, re-emit it. */
7184 if (! simplejump_p (insn) && n_sets == 1)
7186 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7187 JUMP_LABEL (new) = XEXP (src, 0);
7188 LABEL_NUSES (XEXP (src, 0))++;
7193 /* Otherwise, force rerecognition, since it probably had
7194 a different pattern before.
7195 This shouldn't really be necessary, since whatever
7196 changed the source value above should have done this.
7197 Until the right place is found, might as well do this here. */
7198 INSN_CODE (insn) = -1;
7200 /* Now that we've converted this jump to an unconditional jump,
7201 there is dead code after it. Delete the dead code until we
7202 reach a BARRIER, the end of the function, or a label. Do
7203 not delete NOTEs except for NOTE_INSN_DELETED since later
7204 phases assume these notes are retained. */
7208 while (NEXT_INSN (p) != 0
7209 && GET_CODE (NEXT_INSN (p)) != BARRIER
7210 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7212 if (GET_CODE (NEXT_INSN (p)) != NOTE
7213 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7214 delete_insn (NEXT_INSN (p));
7219 /* If we don't have a BARRIER immediately after INSN, put one there.
7220 Much code assumes that there are no NOTEs between a JUMP_INSN and
7223 if (NEXT_INSN (insn) == 0
7224 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7225 emit_barrier_before (NEXT_INSN (insn));
7227 /* We might have two BARRIERs separated by notes. Delete the second
7230 if (p != insn && NEXT_INSN (p) != 0
7231 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7232 delete_insn (NEXT_INSN (p));
7234 cse_jumps_altered = 1;
7238 /* If destination is volatile, invalidate it and then do no further
7239 processing for this assignment. */
7241 else if (do_not_record)
7243 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7244 || GET_CODE (dest) == MEM)
7245 invalidate (dest, VOIDmode);
7246 else if (GET_CODE (dest) == STRICT_LOW_PART
7247 || GET_CODE (dest) == ZERO_EXTRACT)
7248 invalidate (XEXP (dest, 0), GET_MODE (dest));
7252 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7253 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7256 /* If setting CC0, record what it was set to, or a constant, if it
7257 is equivalent to a constant. If it is being set to a floating-point
7258 value, make a COMPARE with the appropriate constant of 0. If we
7259 don't do this, later code can interpret this as a test against
7260 const0_rtx, which can cause problems if we try to put it into an
7261 insn as a floating-point operand. */
7262 if (dest == cc0_rtx)
7264 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7265 this_insn_cc0_mode = mode;
7266 if (FLOAT_MODE_P (mode))
7267 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7273 /* Now enter all non-volatile source expressions in the hash table
7274 if they are not already present.
7275 Record their equivalence classes in src_elt.
7276 This way we can insert the corresponding destinations into
7277 the same classes even if the actual sources are no longer in them
7278 (having been invalidated). */
7280 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7281 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7283 register struct table_elt *elt;
7284 register struct table_elt *classp = sets[0].src_elt;
7285 rtx dest = SET_DEST (sets[0].rtl);
7286 enum machine_mode eqvmode = GET_MODE (dest);
7288 if (GET_CODE (dest) == STRICT_LOW_PART)
7290 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7293 if (insert_regs (src_eqv, classp, 0))
7295 rehash_using_reg (src_eqv);
7296 src_eqv_hash = HASH (src_eqv, eqvmode);
7298 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7299 elt->in_memory = src_eqv_in_memory;
7300 elt->in_struct = src_eqv_in_struct;
7303 /* Check to see if src_eqv_elt is the same as a set source which
7304 does not yet have an elt, and if so set the elt of the set source
7306 for (i = 0; i < n_sets; i++)
7307 if (sets[i].rtl && sets[i].src_elt == 0
7308 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7309 sets[i].src_elt = src_eqv_elt;
7312 for (i = 0; i < n_sets; i++)
7313 if (sets[i].rtl && ! sets[i].src_volatile
7314 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7316 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7318 /* REG_EQUAL in setting a STRICT_LOW_PART
7319 gives an equivalent for the entire destination register,
7320 not just for the subreg being stored in now.
7321 This is a more interesting equivalence, so we arrange later
7322 to treat the entire reg as the destination. */
7323 sets[i].src_elt = src_eqv_elt;
7324 sets[i].src_hash = src_eqv_hash;
7328 /* Insert source and constant equivalent into hash table, if not
7330 register struct table_elt *classp = src_eqv_elt;
7331 register rtx src = sets[i].src;
7332 register rtx dest = SET_DEST (sets[i].rtl);
7333 enum machine_mode mode
7334 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7336 if (sets[i].src_elt == 0)
7338 register struct table_elt *elt;
7340 /* Note that these insert_regs calls cannot remove
7341 any of the src_elt's, because they would have failed to
7342 match if not still valid. */
7343 if (insert_regs (src, classp, 0))
7345 rehash_using_reg (src);
7346 sets[i].src_hash = HASH (src, mode);
7348 elt = insert (src, classp, sets[i].src_hash, mode);
7349 elt->in_memory = sets[i].src_in_memory;
7350 elt->in_struct = sets[i].src_in_struct;
7351 sets[i].src_elt = classp = elt;
7354 if (sets[i].src_const && sets[i].src_const_elt == 0
7355 && src != sets[i].src_const
7356 && ! rtx_equal_p (sets[i].src_const, src))
7357 sets[i].src_elt = insert (sets[i].src_const, classp,
7358 sets[i].src_const_hash, mode);
7361 else if (sets[i].src_elt == 0)
7362 /* If we did not insert the source into the hash table (e.g., it was
7363 volatile), note the equivalence class for the REG_EQUAL value, if any,
7364 so that the destination goes into that class. */
7365 sets[i].src_elt = src_eqv_elt;
7367 invalidate_from_clobbers (x);
7369 /* Some registers are invalidated by subroutine calls. Memory is
7370 invalidated by non-constant calls. */
7372 if (GET_CODE (insn) == CALL_INSN)
7374 if (! CONST_CALL_P (insn))
7375 invalidate_memory ();
7376 invalidate_for_call ();
7379 /* Now invalidate everything set by this instruction.
7380 If a SUBREG or other funny destination is being set,
7381 sets[i].rtl is still nonzero, so here we invalidate the reg
7382 a part of which is being set. */
7384 for (i = 0; i < n_sets; i++)
7387 /* We can't use the inner dest, because the mode associated with
7388 a ZERO_EXTRACT is significant. */
7389 register rtx dest = SET_DEST (sets[i].rtl);
7391 /* Needed for registers to remove the register from its
7392 previous quantity's chain.
7393 Needed for memory if this is a nonvarying address, unless
7394 we have just done an invalidate_memory that covers even those. */
7395 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7396 || GET_CODE (dest) == MEM)
7397 invalidate (dest, VOIDmode);
7398 else if (GET_CODE (dest) == STRICT_LOW_PART
7399 || GET_CODE (dest) == ZERO_EXTRACT)
7400 invalidate (XEXP (dest, 0), GET_MODE (dest));
7403 /* Make sure registers mentioned in destinations
7404 are safe for use in an expression to be inserted.
7405 This removes from the hash table
7406 any invalid entry that refers to one of these registers.
7408 We don't care about the return value from mention_regs because
7409 we are going to hash the SET_DEST values unconditionally. */
7411 for (i = 0; i < n_sets; i++)
7412 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
7413 mention_regs (SET_DEST (sets[i].rtl));
7415 /* We may have just removed some of the src_elt's from the hash table.
7416 So replace each one with the current head of the same class. */
7418 for (i = 0; i < n_sets; i++)
7421 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7422 /* If elt was removed, find current head of same class,
7423 or 0 if nothing remains of that class. */
7425 register struct table_elt *elt = sets[i].src_elt;
7427 while (elt && elt->prev_same_value)
7428 elt = elt->prev_same_value;
7430 while (elt && elt->first_same_value == 0)
7431 elt = elt->next_same_value;
7432 sets[i].src_elt = elt ? elt->first_same_value : 0;
7436 /* Now insert the destinations into their equivalence classes. */
7438 for (i = 0; i < n_sets; i++)
7441 register rtx dest = SET_DEST (sets[i].rtl);
7442 rtx inner_dest = sets[i].inner_dest;
7443 register struct table_elt *elt;
7445 /* Don't record value if we are not supposed to risk allocating
7446 floating-point values in registers that might be wider than
7448 if ((flag_float_store
7449 && GET_CODE (dest) == MEM
7450 && FLOAT_MODE_P (GET_MODE (dest)))
7451 /* Don't record BLKmode values, because we don't know the
7452 size of it, and can't be sure that other BLKmode values
7453 have the same or smaller size. */
7454 || GET_MODE (dest) == BLKmode
7455 /* Don't record values of destinations set inside a libcall block
7456 since we might delete the libcall. Things should have been set
7457 up so we won't want to reuse such a value, but we play it safe
7460 /* If we didn't put a REG_EQUAL value or a source into the hash
7461 table, there is no point is recording DEST. */
7462 || sets[i].src_elt == 0
7463 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7464 or SIGN_EXTEND, don't record DEST since it can cause
7465 some tracking to be wrong.
7467 ??? Think about this more later. */
7468 || (GET_CODE (dest) == SUBREG
7469 && (GET_MODE_SIZE (GET_MODE (dest))
7470 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7471 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7472 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7475 /* STRICT_LOW_PART isn't part of the value BEING set,
7476 and neither is the SUBREG inside it.
7477 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7478 if (GET_CODE (dest) == STRICT_LOW_PART)
7479 dest = SUBREG_REG (XEXP (dest, 0));
7481 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7482 /* Registers must also be inserted into chains for quantities. */
7483 if (insert_regs (dest, sets[i].src_elt, 1))
7485 /* If `insert_regs' changes something, the hash code must be
7487 rehash_using_reg (dest);
7488 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7491 if (GET_CODE (inner_dest) == MEM
7492 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7493 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7494 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7495 Consider the case in which the address of the MEM is
7496 passed to a function, which alters the MEM. Then, if we
7497 later use Y instead of the MEM we'll miss the update. */
7498 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7500 elt = insert (dest, sets[i].src_elt,
7501 sets[i].dest_hash, GET_MODE (dest));
7503 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7504 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7505 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7510 /* This implicitly assumes a whole struct
7511 need not have MEM_IN_STRUCT_P.
7512 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7513 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7514 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7517 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7518 narrower than M2, and both M1 and M2 are the same number of words,
7519 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7520 make that equivalence as well.
7522 However, BAR may have equivalences for which gen_lowpart_if_possible
7523 will produce a simpler value than gen_lowpart_if_possible applied to
7524 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7525 BAR's equivalences. If we don't get a simplified form, make
7526 the SUBREG. It will not be used in an equivalence, but will
7527 cause two similar assignments to be detected.
7529 Note the loop below will find SUBREG_REG (DEST) since we have
7530 already entered SRC and DEST of the SET in the table. */
7532 if (GET_CODE (dest) == SUBREG
7533 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7535 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7536 && (GET_MODE_SIZE (GET_MODE (dest))
7537 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7538 && sets[i].src_elt != 0)
7540 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7541 struct table_elt *elt, *classp = 0;
7543 for (elt = sets[i].src_elt->first_same_value; elt;
7544 elt = elt->next_same_value)
7548 struct table_elt *src_elt;
7550 /* Ignore invalid entries. */
7551 if (GET_CODE (elt->exp) != REG
7552 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7555 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7557 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7559 src_hash = HASH (new_src, new_mode);
7560 src_elt = lookup (new_src, src_hash, new_mode);
7562 /* Put the new source in the hash table is if isn't
7566 if (insert_regs (new_src, classp, 0))
7568 rehash_using_reg (new_src);
7569 src_hash = HASH (new_src, new_mode);
7571 src_elt = insert (new_src, classp, src_hash, new_mode);
7572 src_elt->in_memory = elt->in_memory;
7573 src_elt->in_struct = elt->in_struct;
7575 else if (classp && classp != src_elt->first_same_value)
7576 /* Show that two things that we've seen before are
7577 actually the same. */
7578 merge_equiv_classes (src_elt, classp);
7580 classp = src_elt->first_same_value;
7581 /* Ignore invalid entries. */
7583 && GET_CODE (classp->exp) != REG
7584 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7585 classp = classp->next_same_value;
7590 /* Special handling for (set REG0 REG1)
7591 where REG0 is the "cheapest", cheaper than REG1.
7592 After cse, REG1 will probably not be used in the sequel,
7593 so (if easily done) change this insn to (set REG1 REG0) and
7594 replace REG1 with REG0 in the previous insn that computed their value.
7595 Then REG1 will become a dead store and won't cloud the situation
7596 for later optimizations.
7598 Do not make this change if REG1 is a hard register, because it will
7599 then be used in the sequel and we may be changing a two-operand insn
7600 into a three-operand insn.
7602 Also do not do this if we are operating on a copy of INSN. */
7604 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7605 && NEXT_INSN (PREV_INSN (insn)) == insn
7606 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7607 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7608 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7609 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7610 == REGNO (SET_DEST (sets[0].rtl))))
7612 rtx prev = PREV_INSN (insn);
7613 while (prev && GET_CODE (prev) == NOTE)
7614 prev = PREV_INSN (prev);
7616 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7617 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7619 rtx dest = SET_DEST (sets[0].rtl);
7620 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7622 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7623 validate_change (insn, & SET_DEST (sets[0].rtl),
7624 SET_SRC (sets[0].rtl), 1);
7625 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7626 apply_change_group ();
7628 /* If REG1 was equivalent to a constant, REG0 is not. */
7630 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7632 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7633 any REG_WAS_0 note on INSN to PREV. */
7634 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7636 remove_note (prev, note);
7638 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7641 remove_note (insn, note);
7642 XEXP (note, 1) = REG_NOTES (prev);
7643 REG_NOTES (prev) = note;
7646 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7647 then we must delete it, because the value in REG0 has changed. */
7648 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7649 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7650 remove_note (insn, note);
7654 /* If this is a conditional jump insn, record any known equivalences due to
7655 the condition being tested. */
7657 last_jump_equiv_class = 0;
7658 if (GET_CODE (insn) == JUMP_INSN
7659 && n_sets == 1 && GET_CODE (x) == SET
7660 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7661 record_jump_equiv (insn, 0);
7664 /* If the previous insn set CC0 and this insn no longer references CC0,
7665 delete the previous insn. Here we use the fact that nothing expects CC0
7666 to be valid over an insn, which is true until the final pass. */
7667 if (prev_insn && GET_CODE (prev_insn) == INSN
7668 && (tem = single_set (prev_insn)) != 0
7669 && SET_DEST (tem) == cc0_rtx
7670 && ! reg_mentioned_p (cc0_rtx, x))
7672 PUT_CODE (prev_insn, NOTE);
7673 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7674 NOTE_SOURCE_FILE (prev_insn) = 0;
7677 prev_insn_cc0 = this_insn_cc0;
7678 prev_insn_cc0_mode = this_insn_cc0_mode;
7684 /* Remove from the ahsh table all expressions that reference memory. */
7686 invalidate_memory ()
7689 register struct table_elt *p, *next;
7691 for (i = 0; i < NBUCKETS; i++)
7692 for (p = table[i]; p; p = next)
7694 next = p->next_same_hash;
7696 remove_from_table (p, i);
7700 /* XXX ??? The name of this function bears little resemblance to
7701 what this function actually does. FIXME. */
7703 note_mem_written (addr)
7706 /* Pushing or popping the stack invalidates just the stack pointer. */
7707 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7708 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7709 && GET_CODE (XEXP (addr, 0)) == REG
7710 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7712 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7713 reg_tick[STACK_POINTER_REGNUM]++;
7715 /* This should be *very* rare. */
7716 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7717 invalidate (stack_pointer_rtx, VOIDmode);
7723 /* Perform invalidation on the basis of everything about an insn
7724 except for invalidating the actual places that are SET in it.
7725 This includes the places CLOBBERed, and anything that might
7726 alias with something that is SET or CLOBBERed.
7728 X is the pattern of the insn. */
7731 invalidate_from_clobbers (x)
7734 if (GET_CODE (x) == CLOBBER)
7736 rtx ref = XEXP (x, 0);
7739 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7740 || GET_CODE (ref) == MEM)
7741 invalidate (ref, VOIDmode);
7742 else if (GET_CODE (ref) == STRICT_LOW_PART
7743 || GET_CODE (ref) == ZERO_EXTRACT)
7744 invalidate (XEXP (ref, 0), GET_MODE (ref));
7747 else if (GET_CODE (x) == PARALLEL)
7750 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7752 register rtx y = XVECEXP (x, 0, i);
7753 if (GET_CODE (y) == CLOBBER)
7755 rtx ref = XEXP (y, 0);
7756 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7757 || GET_CODE (ref) == MEM)
7758 invalidate (ref, VOIDmode);
7759 else if (GET_CODE (ref) == STRICT_LOW_PART
7760 || GET_CODE (ref) == ZERO_EXTRACT)
7761 invalidate (XEXP (ref, 0), GET_MODE (ref));
7767 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7768 and replace any registers in them with either an equivalent constant
7769 or the canonical form of the register. If we are inside an address,
7770 only do this if the address remains valid.
7772 OBJECT is 0 except when within a MEM in which case it is the MEM.
7774 Return the replacement for X. */
7777 cse_process_notes (x, object)
7781 enum rtx_code code = GET_CODE (x);
7782 char *fmt = GET_RTX_FORMAT (code);
7798 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7803 if (REG_NOTE_KIND (x) == REG_EQUAL)
7804 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7806 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7813 rtx new = cse_process_notes (XEXP (x, 0), object);
7814 /* We don't substitute VOIDmode constants into these rtx,
7815 since they would impede folding. */
7816 if (GET_MODE (new) != VOIDmode)
7817 validate_change (object, &XEXP (x, 0), new, 0);
7822 i = reg_qty[REGNO (x)];
7824 /* Return a constant or a constant register. */
7825 if (REGNO_QTY_VALID_P (REGNO (x))
7826 && qty_const[i] != 0
7827 && (CONSTANT_P (qty_const[i])
7828 || GET_CODE (qty_const[i]) == REG))
7830 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7835 /* Otherwise, canonicalize this register. */
7836 return canon_reg (x, NULL_RTX);
7842 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7844 validate_change (object, &XEXP (x, i),
7845 cse_process_notes (XEXP (x, i), object), 0);
7850 /* Find common subexpressions between the end test of a loop and the beginning
7851 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7853 Often we have a loop where an expression in the exit test is used
7854 in the body of the loop. For example "while (*p) *q++ = *p++;".
7855 Because of the way we duplicate the loop exit test in front of the loop,
7856 however, we don't detect that common subexpression. This will be caught
7857 when global cse is implemented, but this is a quite common case.
7859 This function handles the most common cases of these common expressions.
7860 It is called after we have processed the basic block ending with the
7861 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7862 jumps to a label used only once. */
7865 cse_around_loop (loop_start)
7870 struct table_elt *p;
7872 /* If the jump at the end of the loop doesn't go to the start, we don't
7874 for (insn = PREV_INSN (loop_start);
7875 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7876 insn = PREV_INSN (insn))
7880 || GET_CODE (insn) != NOTE
7881 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7884 /* If the last insn of the loop (the end test) was an NE comparison,
7885 we will interpret it as an EQ comparison, since we fell through
7886 the loop. Any equivalences resulting from that comparison are
7887 therefore not valid and must be invalidated. */
7888 if (last_jump_equiv_class)
7889 for (p = last_jump_equiv_class->first_same_value; p;
7890 p = p->next_same_value)
7892 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7893 || (GET_CODE (p->exp) == SUBREG
7894 && GET_CODE (SUBREG_REG (p->exp)) == REG))
7895 invalidate (p->exp, VOIDmode);
7896 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7897 || GET_CODE (p->exp) == ZERO_EXTRACT)
7898 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
7901 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7902 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7904 The only thing we do with SET_DEST is invalidate entries, so we
7905 can safely process each SET in order. It is slightly less efficient
7906 to do so, but we only want to handle the most common cases.
7908 The gen_move_insn call in cse_set_around_loop may create new pseudos.
7909 These pseudos won't have valid entries in any of the tables indexed
7910 by register number, such as reg_qty. We avoid out-of-range array
7911 accesses by not processing any instructions created after cse started. */
7913 for (insn = NEXT_INSN (loop_start);
7914 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7915 && INSN_UID (insn) < max_insn_uid
7916 && ! (GET_CODE (insn) == NOTE
7917 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7918 insn = NEXT_INSN (insn))
7920 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7921 && (GET_CODE (PATTERN (insn)) == SET
7922 || GET_CODE (PATTERN (insn)) == CLOBBER))
7923 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7924 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7925 && GET_CODE (PATTERN (insn)) == PARALLEL)
7926 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7927 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7928 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7929 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7934 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7935 since they are done elsewhere. This function is called via note_stores. */
7938 invalidate_skipped_set (dest, set)
7942 enum rtx_code code = GET_CODE (dest);
7945 && ! note_mem_written (dest) /* If this is not a stack push ... */
7946 /* There are times when an address can appear varying and be a PLUS
7947 during this scan when it would be a fixed address were we to know
7948 the proper equivalences. So invalidate all memory if there is
7949 a BLKmode or nonscalar memory reference or a reference to a
7950 variable address. */
7951 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
7952 || cse_rtx_varies_p (XEXP (dest, 0))))
7954 invalidate_memory ();
7958 if (GET_CODE (set) == CLOBBER
7965 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
7966 invalidate (XEXP (dest, 0), GET_MODE (dest));
7967 else if (code == REG || code == SUBREG || code == MEM)
7968 invalidate (dest, VOIDmode);
7971 /* Invalidate all insns from START up to the end of the function or the
7972 next label. This called when we wish to CSE around a block that is
7973 conditionally executed. */
7976 invalidate_skipped_block (start)
7981 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7982 insn = NEXT_INSN (insn))
7984 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7987 if (GET_CODE (insn) == CALL_INSN)
7989 if (! CONST_CALL_P (insn))
7990 invalidate_memory ();
7991 invalidate_for_call ();
7994 note_stores (PATTERN (insn), invalidate_skipped_set);
7998 /* Used for communication between the following two routines; contains a
7999 value to be checked for modification. */
8001 static rtx cse_check_loop_start_value;
8003 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8004 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8007 cse_check_loop_start (x, set)
8009 rtx set ATTRIBUTE_UNUSED;
8011 if (cse_check_loop_start_value == 0
8012 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8015 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8016 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8017 cse_check_loop_start_value = 0;
8020 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8021 a loop that starts with the label at LOOP_START.
8023 If X is a SET, we see if its SET_SRC is currently in our hash table.
8024 If so, we see if it has a value equal to some register used only in the
8025 loop exit code (as marked by jump.c).
8027 If those two conditions are true, we search backwards from the start of
8028 the loop to see if that same value was loaded into a register that still
8029 retains its value at the start of the loop.
8031 If so, we insert an insn after the load to copy the destination of that
8032 load into the equivalent register and (try to) replace our SET_SRC with that
8035 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8038 cse_set_around_loop (x, insn, loop_start)
8043 struct table_elt *src_elt;
8045 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8046 are setting PC or CC0 or whose SET_SRC is already a register. */
8047 if (GET_CODE (x) == SET
8048 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8049 && GET_CODE (SET_SRC (x)) != REG)
8051 src_elt = lookup (SET_SRC (x),
8052 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8053 GET_MODE (SET_DEST (x)));
8056 for (src_elt = src_elt->first_same_value; src_elt;
8057 src_elt = src_elt->next_same_value)
8058 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8059 && COST (src_elt->exp) < COST (SET_SRC (x)))
8063 /* Look for an insn in front of LOOP_START that sets
8064 something in the desired mode to SET_SRC (x) before we hit
8065 a label or CALL_INSN. */
8067 for (p = prev_nonnote_insn (loop_start);
8068 p && GET_CODE (p) != CALL_INSN
8069 && GET_CODE (p) != CODE_LABEL;
8070 p = prev_nonnote_insn (p))
8071 if ((set = single_set (p)) != 0
8072 && GET_CODE (SET_DEST (set)) == REG
8073 && GET_MODE (SET_DEST (set)) == src_elt->mode
8074 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8076 /* We now have to ensure that nothing between P
8077 and LOOP_START modified anything referenced in
8078 SET_SRC (x). We know that nothing within the loop
8079 can modify it, or we would have invalidated it in
8083 cse_check_loop_start_value = SET_SRC (x);
8084 for (q = p; q != loop_start; q = NEXT_INSN (q))
8085 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8086 note_stores (PATTERN (q), cse_check_loop_start);
8088 /* If nothing was changed and we can replace our
8089 SET_SRC, add an insn after P to copy its destination
8090 to what we will be replacing SET_SRC with. */
8091 if (cse_check_loop_start_value
8092 && validate_change (insn, &SET_SRC (x),
8095 /* If this creates new pseudos, this is unsafe,
8096 because the regno of new pseudo is unsuitable
8097 to index into reg_qty when cse_insn processes
8098 the new insn. Therefore, if a new pseudo was
8099 created, discard this optimization. */
8100 int nregs = max_reg_num ();
8102 = gen_move_insn (src_elt->exp, SET_DEST (set));
8103 if (nregs != max_reg_num ())
8105 if (! validate_change (insn, &SET_SRC (x),
8110 emit_insn_after (move, p);
8117 /* Now invalidate anything modified by X. */
8118 note_mem_written (SET_DEST (x));
8120 /* See comment on similar code in cse_insn for explanation of these tests. */
8121 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8122 || GET_CODE (SET_DEST (x)) == MEM)
8123 invalidate (SET_DEST (x), VOIDmode);
8124 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8125 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8126 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8129 /* Find the end of INSN's basic block and return its range,
8130 the total number of SETs in all the insns of the block, the last insn of the
8131 block, and the branch path.
8133 The branch path indicates which branches should be followed. If a non-zero
8134 path size is specified, the block should be rescanned and a different set
8135 of branches will be taken. The branch path is only used if
8136 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8138 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8139 used to describe the block. It is filled in with the information about
8140 the current block. The incoming structure's branch path, if any, is used
8141 to construct the output branch path. */
8144 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8146 struct cse_basic_block_data *data;
8153 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8154 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8155 int path_size = data->path_size;
8159 /* Update the previous branch path, if any. If the last branch was
8160 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8161 shorten the path by one and look at the previous branch. We know that
8162 at least one branch must have been taken if PATH_SIZE is non-zero. */
8163 while (path_size > 0)
8165 if (data->path[path_size - 1].status != NOT_TAKEN)
8167 data->path[path_size - 1].status = NOT_TAKEN;
8174 /* Scan to end of this basic block. */
8175 while (p && GET_CODE (p) != CODE_LABEL)
8177 /* Don't cse out the end of a loop. This makes a difference
8178 only for the unusual loops that always execute at least once;
8179 all other loops have labels there so we will stop in any case.
8180 Cse'ing out the end of the loop is dangerous because it
8181 might cause an invariant expression inside the loop
8182 to be reused after the end of the loop. This would make it
8183 hard to move the expression out of the loop in loop.c,
8184 especially if it is one of several equivalent expressions
8185 and loop.c would like to eliminate it.
8187 If we are running after loop.c has finished, we can ignore
8188 the NOTE_INSN_LOOP_END. */
8190 if (! after_loop && GET_CODE (p) == NOTE
8191 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8194 /* Don't cse over a call to setjmp; on some machines (eg vax)
8195 the regs restored by the longjmp come from
8196 a later time than the setjmp. */
8197 if (GET_CODE (p) == NOTE
8198 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8201 /* A PARALLEL can have lots of SETs in it,
8202 especially if it is really an ASM_OPERANDS. */
8203 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8204 && GET_CODE (PATTERN (p)) == PARALLEL)
8205 nsets += XVECLEN (PATTERN (p), 0);
8206 else if (GET_CODE (p) != NOTE)
8209 /* Ignore insns made by CSE; they cannot affect the boundaries of
8212 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8213 high_cuid = INSN_CUID (p);
8214 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8215 low_cuid = INSN_CUID (p);
8217 /* See if this insn is in our branch path. If it is and we are to
8219 if (path_entry < path_size && data->path[path_entry].branch == p)
8221 if (data->path[path_entry].status != NOT_TAKEN)
8224 /* Point to next entry in path, if any. */
8228 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8229 was specified, we haven't reached our maximum path length, there are
8230 insns following the target of the jump, this is the only use of the
8231 jump label, and the target label is preceded by a BARRIER.
8233 Alternatively, we can follow the jump if it branches around a
8234 block of code and there are no other branches into the block.
8235 In this case invalidate_skipped_block will be called to invalidate any
8236 registers set in the block when following the jump. */
8238 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8239 && GET_CODE (p) == JUMP_INSN
8240 && GET_CODE (PATTERN (p)) == SET
8241 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8242 && JUMP_LABEL (p) != 0
8243 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8244 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8246 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8247 if ((GET_CODE (q) != NOTE
8248 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8249 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8250 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8253 /* If we ran into a BARRIER, this code is an extension of the
8254 basic block when the branch is taken. */
8255 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8257 /* Don't allow ourself to keep walking around an
8258 always-executed loop. */
8259 if (next_real_insn (q) == next)
8265 /* Similarly, don't put a branch in our path more than once. */
8266 for (i = 0; i < path_entry; i++)
8267 if (data->path[i].branch == p)
8270 if (i != path_entry)
8273 data->path[path_entry].branch = p;
8274 data->path[path_entry++].status = TAKEN;
8276 /* This branch now ends our path. It was possible that we
8277 didn't see this branch the last time around (when the
8278 insn in front of the target was a JUMP_INSN that was
8279 turned into a no-op). */
8280 path_size = path_entry;
8283 /* Mark block so we won't scan it again later. */
8284 PUT_MODE (NEXT_INSN (p), QImode);
8286 /* Detect a branch around a block of code. */
8287 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8291 if (next_real_insn (q) == next)
8297 for (i = 0; i < path_entry; i++)
8298 if (data->path[i].branch == p)
8301 if (i != path_entry)
8304 /* This is no_labels_between_p (p, q) with an added check for
8305 reaching the end of a function (in case Q precedes P). */
8306 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8307 if (GET_CODE (tmp) == CODE_LABEL)
8312 data->path[path_entry].branch = p;
8313 data->path[path_entry++].status = AROUND;
8315 path_size = path_entry;
8318 /* Mark block so we won't scan it again later. */
8319 PUT_MODE (NEXT_INSN (p), QImode);
8326 data->low_cuid = low_cuid;
8327 data->high_cuid = high_cuid;
8328 data->nsets = nsets;
8331 /* If all jumps in the path are not taken, set our path length to zero
8332 so a rescan won't be done. */
8333 for (i = path_size - 1; i >= 0; i--)
8334 if (data->path[i].status != NOT_TAKEN)
8338 data->path_size = 0;
8340 data->path_size = path_size;
8342 /* End the current branch path. */
8343 data->path[path_size].branch = 0;
8346 /* Perform cse on the instructions of a function.
8347 F is the first instruction.
8348 NREGS is one plus the highest pseudo-reg number used in the instruction.
8350 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8351 (only if -frerun-cse-after-loop).
8353 Returns 1 if jump_optimize should be redone due to simplifications
8354 in conditional jump instructions. */
8357 cse_main (f, nregs, after_loop, file)
8363 struct cse_basic_block_data val;
8364 register rtx insn = f;
8367 cse_jumps_altered = 0;
8368 recorded_label_ref = 0;
8369 constant_pool_entries_cost = 0;
8373 init_alias_analysis ();
8377 max_insn_uid = get_max_uid ();
8379 all_minus_one = (int *) alloca (nregs * sizeof (int));
8380 consec_ints = (int *) alloca (nregs * sizeof (int));
8382 for (i = 0; i < nregs; i++)
8384 all_minus_one[i] = -1;
8388 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8389 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8390 reg_qty = (int *) alloca (nregs * sizeof (int));
8391 reg_in_table = (int *) alloca (nregs * sizeof (int));
8392 reg_tick = (int *) alloca (nregs * sizeof (int));
8394 #ifdef LOAD_EXTEND_OP
8396 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8397 and change the code and mode as appropriate. */
8398 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8401 /* Discard all the free elements of the previous function
8402 since they are allocated in the temporarily obstack. */
8403 bzero ((char *) table, sizeof table);
8404 free_element_chain = 0;
8405 n_elements_made = 0;
8407 /* Find the largest uid. */
8409 max_uid = get_max_uid ();
8410 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8411 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8413 /* Compute the mapping from uids to cuids.
8414 CUIDs are numbers assigned to insns, like uids,
8415 except that cuids increase monotonically through the code.
8416 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8417 between two insns is not affected by -g. */
8419 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8421 if (GET_CODE (insn) != NOTE
8422 || NOTE_LINE_NUMBER (insn) < 0)
8423 INSN_CUID (insn) = ++i;
8425 /* Give a line number note the same cuid as preceding insn. */
8426 INSN_CUID (insn) = i;
8429 /* Initialize which registers are clobbered by calls. */
8431 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8433 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8434 if ((call_used_regs[i]
8435 /* Used to check !fixed_regs[i] here, but that isn't safe;
8436 fixed regs are still call-clobbered, and sched can get
8437 confused if they can "live across calls".
8439 The frame pointer is always preserved across calls. The arg
8440 pointer is if it is fixed. The stack pointer usually is, unless
8441 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8442 will be present. If we are generating PIC code, the PIC offset
8443 table register is preserved across calls. */
8445 && i != STACK_POINTER_REGNUM
8446 && i != FRAME_POINTER_REGNUM
8447 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8448 && i != HARD_FRAME_POINTER_REGNUM
8450 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8451 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8453 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8454 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8458 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8460 /* Loop over basic blocks.
8461 Compute the maximum number of qty's needed for each basic block
8462 (which is 2 for each SET). */
8466 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8467 flag_cse_skip_blocks);
8469 /* If this basic block was already processed or has no sets, skip it. */
8470 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8472 PUT_MODE (insn, VOIDmode);
8473 insn = (val.last ? NEXT_INSN (val.last) : 0);
8478 cse_basic_block_start = val.low_cuid;
8479 cse_basic_block_end = val.high_cuid;
8480 max_qty = val.nsets * 2;
8483 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
8484 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8487 /* Make MAX_QTY bigger to give us room to optimize
8488 past the end of this basic block, if that should prove useful. */
8494 /* If this basic block is being extended by following certain jumps,
8495 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8496 Otherwise, we start after this basic block. */
8497 if (val.path_size > 0)
8498 cse_basic_block (insn, val.last, val.path, 0);
8501 int old_cse_jumps_altered = cse_jumps_altered;
8504 /* When cse changes a conditional jump to an unconditional
8505 jump, we want to reprocess the block, since it will give
8506 us a new branch path to investigate. */
8507 cse_jumps_altered = 0;
8508 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8509 if (cse_jumps_altered == 0
8510 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8513 cse_jumps_altered |= old_cse_jumps_altered;
8521 /* Tell refers_to_mem_p that qty_const info is not available. */
8524 if (max_elements_made < n_elements_made)
8525 max_elements_made = n_elements_made;
8527 return cse_jumps_altered || recorded_label_ref;
8530 /* Process a single basic block. FROM and TO and the limits of the basic
8531 block. NEXT_BRANCH points to the branch path when following jumps or
8532 a null path when not following jumps.
8534 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8535 loop. This is true when we are being called for the last time on a
8536 block and this CSE pass is before loop.c. */
8539 cse_basic_block (from, to, next_branch, around_loop)
8540 register rtx from, to;
8541 struct branch_path *next_branch;
8546 rtx libcall_insn = NULL_RTX;
8549 /* Each of these arrays is undefined before max_reg, so only allocate
8550 the space actually needed and adjust the start below. */
8552 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8553 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8554 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8555 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8556 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8558 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8559 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8560 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8562 qty_first_reg -= max_reg;
8563 qty_last_reg -= max_reg;
8564 qty_mode -= max_reg;
8565 qty_const -= max_reg;
8566 qty_const_insn -= max_reg;
8567 qty_comparison_code -= max_reg;
8568 qty_comparison_qty -= max_reg;
8569 qty_comparison_const -= max_reg;
8573 /* TO might be a label. If so, protect it from being deleted. */
8574 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8577 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8579 register enum rtx_code code = GET_CODE (insn);
8581 struct table_elt *p, *next;
8583 /* If we have processed 1,000 insns, flush the hash table to
8584 avoid extreme quadratic behavior. We must not include NOTEs
8585 in the count since there may be more or them when generating
8586 debugging information. If we clear the table at different
8587 times, code generated with -g -O might be different than code
8588 generated with -O but not -g.
8590 ??? This is a real kludge and needs to be done some other way.
8592 if (code != NOTE && num_insns++ > 1000)
8594 for (i = 0; i < NBUCKETS; i++)
8595 for (p = table[i]; p; p = next)
8597 next = p->next_same_hash;
8599 if (GET_CODE (p->exp) == REG)
8600 invalidate (p->exp, p->mode);
8602 remove_from_table (p, i);
8608 /* See if this is a branch that is part of the path. If so, and it is
8609 to be taken, do so. */
8610 if (next_branch->branch == insn)
8612 enum taken status = next_branch++->status;
8613 if (status != NOT_TAKEN)
8615 if (status == TAKEN)
8616 record_jump_equiv (insn, 1);
8618 invalidate_skipped_block (NEXT_INSN (insn));
8620 /* Set the last insn as the jump insn; it doesn't affect cc0.
8621 Then follow this branch. */
8626 insn = JUMP_LABEL (insn);
8631 if (GET_MODE (insn) == QImode)
8632 PUT_MODE (insn, VOIDmode);
8634 if (GET_RTX_CLASS (code) == 'i')
8638 /* Process notes first so we have all notes in canonical forms when
8639 looking for duplicate operations. */
8641 if (REG_NOTES (insn))
8642 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8644 /* Track when we are inside in LIBCALL block. Inside such a block,
8645 we do not want to record destinations. The last insn of a
8646 LIBCALL block is not considered to be part of the block, since
8647 its destination is the result of the block and hence should be
8650 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
8651 libcall_insn = XEXP (p, 0);
8652 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8653 libcall_insn = NULL_RTX;
8655 cse_insn (insn, libcall_insn);
8658 /* If INSN is now an unconditional jump, skip to the end of our
8659 basic block by pretending that we just did the last insn in the
8660 basic block. If we are jumping to the end of our block, show
8661 that we can have one usage of TO. */
8663 if (simplejump_p (insn))
8668 if (JUMP_LABEL (insn) == to)
8671 /* Maybe TO was deleted because the jump is unconditional.
8672 If so, there is nothing left in this basic block. */
8673 /* ??? Perhaps it would be smarter to set TO
8674 to whatever follows this insn,
8675 and pretend the basic block had always ended here. */
8676 if (INSN_DELETED_P (to))
8679 insn = PREV_INSN (to);
8682 /* See if it is ok to keep on going past the label
8683 which used to end our basic block. Remember that we incremented
8684 the count of that label, so we decrement it here. If we made
8685 a jump unconditional, TO_USAGE will be one; in that case, we don't
8686 want to count the use in that jump. */
8688 if (to != 0 && NEXT_INSN (insn) == to
8689 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8691 struct cse_basic_block_data val;
8694 insn = NEXT_INSN (to);
8696 if (LABEL_NUSES (to) == 0)
8697 insn = delete_insn (to);
8699 /* If TO was the last insn in the function, we are done. */
8703 /* If TO was preceded by a BARRIER we are done with this block
8704 because it has no continuation. */
8705 prev = prev_nonnote_insn (to);
8706 if (prev && GET_CODE (prev) == BARRIER)
8709 /* Find the end of the following block. Note that we won't be
8710 following branches in this case. */
8713 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8715 /* If the tables we allocated have enough space left
8716 to handle all the SETs in the next basic block,
8717 continue through it. Otherwise, return,
8718 and that block will be scanned individually. */
8719 if (val.nsets * 2 + next_qty > max_qty)
8722 cse_basic_block_start = val.low_cuid;
8723 cse_basic_block_end = val.high_cuid;
8726 /* Prevent TO from being deleted if it is a label. */
8727 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8730 /* Back up so we process the first insn in the extension. */
8731 insn = PREV_INSN (insn);
8735 if (next_qty > max_qty)
8738 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8739 the previous insn is the only insn that branches to the head of a loop,
8740 we can cse into the loop. Don't do this if we changed the jump
8741 structure of a loop unless we aren't going to be following jumps. */
8743 if ((cse_jumps_altered == 0
8744 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8745 && around_loop && to != 0
8746 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8747 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8748 && JUMP_LABEL (PREV_INSN (to)) != 0
8749 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8750 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8752 return to ? NEXT_INSN (to) : 0;
8755 /* Count the number of times registers are used (not set) in X.
8756 COUNTS is an array in which we accumulate the count, INCR is how much
8757 we count each register usage.
8759 Don't count a usage of DEST, which is the SET_DEST of a SET which
8760 contains X in its SET_SRC. This is because such a SET does not
8761 modify the liveness of DEST. */
8764 count_reg_usage (x, counts, dest, incr)
8777 switch (code = GET_CODE (x))
8781 counts[REGNO (x)] += incr;
8794 /* If we are clobbering a MEM, mark any registers inside the address
8796 if (GET_CODE (XEXP (x, 0)) == MEM)
8797 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
8801 /* Unless we are setting a REG, count everything in SET_DEST. */
8802 if (GET_CODE (SET_DEST (x)) != REG)
8803 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8805 /* If SRC has side-effects, then we can't delete this insn, so the
8806 usage of SET_DEST inside SRC counts.
8808 ??? Strictly-speaking, we might be preserving this insn
8809 because some other SET has side-effects, but that's hard
8810 to do and can't happen now. */
8811 count_reg_usage (SET_SRC (x), counts,
8812 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8817 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8819 /* ... falls through ... */
8822 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8824 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8827 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
8832 if (REG_NOTE_KIND (x) == REG_EQUAL
8833 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
8834 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
8835 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
8842 fmt = GET_RTX_FORMAT (code);
8843 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8846 count_reg_usage (XEXP (x, i), counts, dest, incr);
8847 else if (fmt[i] == 'E')
8848 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8849 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
8853 /* Scan all the insns and delete any that are dead; i.e., they store a register
8854 that is never used or they copy a register to itself.
8856 This is used to remove insns made obviously dead by cse, loop or other
8857 optimizations. It improves the heuristics in loop since it won't try to
8858 move dead invariants out of loops or make givs for dead quantities. The
8859 remaining passes of the compilation are also sped up. */
8862 delete_trivially_dead_insns (insns, nreg)
8866 int *counts = (int *) alloca (nreg * sizeof (int));
8872 int in_libcall = 0, dead_libcall = 0;
8874 /* First count the number of times each register is used. */
8875 bzero ((char *) counts, sizeof (int) * nreg);
8876 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8877 count_reg_usage (insn, counts, NULL_RTX, 1);
8879 /* Go from the last insn to the first and delete insns that only set unused
8880 registers or copy a register to itself. As we delete an insn, remove
8881 usage counts for registers it uses. */
8882 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8887 prev = prev_real_insn (insn);
8889 /* Don't delete any insns that are part of a libcall block unless
8890 we can delete the whole libcall block.
8892 Flow or loop might get confused if we did that. Remember
8893 that we are scanning backwards. */
8894 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8900 /* See if there's a REG_EQUAL note on this insn and try to
8901 replace the source with the REG_EQUAL expression.
8903 We assume that insns with REG_RETVALs can only be reg->reg
8904 copies at this point. */
8905 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
8908 rtx set = single_set (insn);
8910 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
8913 find_reg_note (insn, REG_RETVAL, NULL_RTX));
8918 else if (in_libcall)
8919 live_insn = ! dead_libcall;
8920 else if (GET_CODE (PATTERN (insn)) == SET)
8922 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8923 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8927 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8928 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8929 && ((tem = next_nonnote_insn (insn)) == 0
8930 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8931 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8934 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8935 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8936 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8937 || side_effects_p (SET_SRC (PATTERN (insn))))
8940 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8941 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8943 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8945 if (GET_CODE (elt) == SET)
8947 if (GET_CODE (SET_DEST (elt)) == REG
8948 && SET_DEST (elt) == SET_SRC (elt))
8952 else if (GET_CODE (SET_DEST (elt)) == CC0
8953 && ! side_effects_p (SET_SRC (elt))
8954 && ((tem = next_nonnote_insn (insn)) == 0
8955 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8956 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8959 else if (GET_CODE (SET_DEST (elt)) != REG
8960 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8961 || counts[REGNO (SET_DEST (elt))] != 0
8962 || side_effects_p (SET_SRC (elt)))
8965 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8971 /* If this is a dead insn, delete it and show registers in it aren't
8976 count_reg_usage (insn, counts, NULL_RTX, -1);
8980 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))