1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
37 /* The basic idea of common subexpression elimination is to go
38 through the code, keeping a record of expressions that would
39 have the same value at the current scan point, and replacing
40 expressions encountered with the cheapest equivalent expression.
42 It is too complicated to keep track of the different possibilities
43 when control paths merge; so, at each label, we forget all that is
44 known and start fresh. This can be described as processing each
45 basic block separately. Note, however, that these are not quite
46 the same as the basic blocks found by a later pass and used for
47 data flow analysis and register packing. We do not need to start fresh
48 after a conditional jump instruction if there is no label there.
50 We use two data structures to record the equivalent expressions:
51 a hash table for most expressions, and several vectors together
52 with "quantity numbers" to record equivalent (pseudo) registers.
54 The use of the special data structure for registers is desirable
55 because it is faster. It is possible because registers references
56 contain a fairly small number, the register number, taken from
57 a contiguously allocated series, and two register references are
58 identical if they have the same number. General expressions
59 do not have any such thing, so the only way to retrieve the
60 information recorded on an expression other than a register
61 is to keep it in a hash table.
63 Registers and "quantity numbers":
65 At the start of each basic block, all of the (hardware and pseudo)
66 registers used in the function are given distinct quantity
67 numbers to indicate their contents. During scan, when the code
68 copies one register into another, we copy the quantity number.
69 When a register is loaded in any other way, we allocate a new
70 quantity number to describe the value generated by this operation.
71 `reg_qty' records what quantity a register is currently thought
74 All real quantity numbers are greater than or equal to `max_reg'.
75 If register N has not been assigned a quantity, reg_qty[N] will equal N.
77 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
78 variables should be referenced with an index below `max_reg'.
80 We also maintain a bidirectional chain of registers for each
81 quantity number. `qty_first_reg', `qty_last_reg',
82 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
84 The first register in a chain is the one whose lifespan is least local.
85 Among equals, it is the one that was seen first.
86 We replace any equivalent register with that one.
88 If two registers have the same quantity number, it must be true that
89 REG expressions with `qty_mode' must be in the hash table for both
90 registers and must be in the same class.
92 The converse is not true. Since hard registers may be referenced in
93 any mode, two REG expressions might be equivalent in the hash table
94 but not have the same quantity number if the quantity number of one
95 of the registers is not the same mode as those expressions.
97 Constants and quantity numbers
99 When a quantity has a known constant value, that value is stored
100 in the appropriate element of qty_const. This is in addition to
101 putting the constant in the hash table as is usual for non-regs.
103 Whether a reg or a constant is preferred is determined by the configuration
104 macro CONST_COSTS and will often depend on the constant value. In any
105 event, expressions containing constants can be simplified, by fold_rtx.
107 When a quantity has a known nearly constant value (such as an address
108 of a stack slot), that value is stored in the appropriate element
111 Integer constants don't have a machine mode. However, cse
112 determines the intended machine mode from the destination
113 of the instruction that moves the constant. The machine mode
114 is recorded in the hash table along with the actual RTL
115 constant expression so that different modes are kept separate.
119 To record known equivalences among expressions in general
120 we use a hash table called `table'. It has a fixed number of buckets
121 that contain chains of `struct table_elt' elements for expressions.
122 These chains connect the elements whose expressions have the same
125 Other chains through the same elements connect the elements which
126 currently have equivalent values.
128 Register references in an expression are canonicalized before hashing
129 the expression. This is done using `reg_qty' and `qty_first_reg'.
130 The hash code of a register reference is computed using the quantity
131 number, not the register number.
133 When the value of an expression changes, it is necessary to remove from the
134 hash table not just that expression but all expressions whose values
135 could be different as a result.
137 1. If the value changing is in memory, except in special cases
138 ANYTHING referring to memory could be changed. That is because
139 nobody knows where a pointer does not point.
140 The function `invalidate_memory' removes what is necessary.
142 The special cases are when the address is constant or is
143 a constant plus a fixed register such as the frame pointer
144 or a static chain pointer. When such addresses are stored in,
145 we can tell exactly which other such addresses must be invalidated
146 due to overlap. `invalidate' does this.
147 All expressions that refer to non-constant
148 memory addresses are also invalidated. `invalidate_memory' does this.
150 2. If the value changing is a register, all expressions
151 containing references to that register, and only those,
154 Because searching the entire hash table for expressions that contain
155 a register is very slow, we try to figure out when it isn't necessary.
156 Precisely, this is necessary only when expressions have been
157 entered in the hash table using this register, and then the value has
158 changed, and then another expression wants to be added to refer to
159 the register's new value. This sequence of circumstances is rare
160 within any one basic block.
162 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
163 reg_tick[i] is incremented whenever a value is stored in register i.
164 reg_in_table[i] holds -1 if no references to register i have been
165 entered in the table; otherwise, it contains the value reg_tick[i] had
166 when the references were entered. If we want to enter a reference
167 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
168 Until we want to enter a new entry, the mere fact that the two vectors
169 don't match makes the entries be ignored if anyone tries to match them.
171 Registers themselves are entered in the hash table as well as in
172 the equivalent-register chains. However, the vectors `reg_tick'
173 and `reg_in_table' do not apply to expressions which are simple
174 register references. These expressions are removed from the table
175 immediately when they become invalid, and this can be done even if
176 we do not immediately search for all the expressions that refer to
179 A CLOBBER rtx in an instruction invalidates its operand for further
180 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
181 invalidates everything that resides in memory.
185 Constant expressions that differ only by an additive integer
186 are called related. When a constant expression is put in
187 the table, the related expression with no constant term
188 is also entered. These are made to point at each other
189 so that it is possible to find out if there exists any
190 register equivalent to an expression related to a given expression. */
192 /* One plus largest register number used in this function. */
196 /* One plus largest instruction UID used in this function at time of
199 static int max_insn_uid;
201 /* Length of vectors indexed by quantity number.
202 We know in advance we will not need a quantity number this big. */
206 /* Next quantity number to be allocated.
207 This is 1 + the largest number needed so far. */
211 /* Indexed by quantity number, gives the first (or last) register
212 in the chain of registers that currently contain this quantity. */
214 static int *qty_first_reg;
215 static int *qty_last_reg;
217 /* Index by quantity number, gives the mode of the quantity. */
219 static enum machine_mode *qty_mode;
221 /* Indexed by quantity number, gives the rtx of the constant value of the
222 quantity, or zero if it does not have a known value.
223 A sum of the frame pointer (or arg pointer) plus a constant
224 can also be entered here. */
226 static rtx *qty_const;
228 /* Indexed by qty number, gives the insn that stored the constant value
229 recorded in `qty_const'. */
231 static rtx *qty_const_insn;
233 /* The next three variables are used to track when a comparison between a
234 quantity and some constant or register has been passed. In that case, we
235 know the results of the comparison in case we see it again. These variables
236 record a comparison that is known to be true. */
238 /* Indexed by qty number, gives the rtx code of a comparison with a known
239 result involving this quantity. If none, it is UNKNOWN. */
240 static enum rtx_code *qty_comparison_code;
242 /* Indexed by qty number, gives the constant being compared against in a
243 comparison of known result. If no such comparison, it is undefined.
244 If the comparison is not with a constant, it is zero. */
246 static rtx *qty_comparison_const;
248 /* Indexed by qty number, gives the quantity being compared against in a
249 comparison of known result. If no such comparison, if it undefined.
250 If the comparison is not with a register, it is -1. */
252 static int *qty_comparison_qty;
255 /* For machines that have a CC0, we do not record its value in the hash
256 table since its use is guaranteed to be the insn immediately following
257 its definition and any other insn is presumed to invalidate it.
259 Instead, we store below the value last assigned to CC0. If it should
260 happen to be a constant, it is stored in preference to the actual
261 assigned value. In case it is a constant, we store the mode in which
262 the constant should be interpreted. */
264 static rtx prev_insn_cc0;
265 static enum machine_mode prev_insn_cc0_mode;
268 /* Previous actual insn. 0 if at first insn of basic block. */
270 static rtx prev_insn;
272 /* Insn being scanned. */
274 static rtx this_insn;
276 /* Index by register number, gives the quantity number
277 of the register's current contents. */
281 /* Index by register number, gives the number of the next (or
282 previous) register in the chain of registers sharing the same
285 Or -1 if this register is at the end of the chain.
287 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
289 static int *reg_next_eqv;
290 static int *reg_prev_eqv;
292 /* Index by register number, gives the number of times
293 that register has been altered in the current basic block. */
295 static int *reg_tick;
297 /* Index by register number, gives the reg_tick value at which
298 rtx's containing this register are valid in the hash table.
299 If this does not equal the current reg_tick value, such expressions
300 existing in the hash table are invalid.
301 If this is -1, no expressions containing this register have been
302 entered in the table. */
304 static int *reg_in_table;
306 /* A HARD_REG_SET containing all the hard registers for which there is
307 currently a REG expression in the hash table. Note the difference
308 from the above variables, which indicate if the REG is mentioned in some
309 expression in the table. */
311 static HARD_REG_SET hard_regs_in_table;
313 /* A HARD_REG_SET containing all the hard registers that are invalidated
316 static HARD_REG_SET regs_invalidated_by_call;
318 /* Two vectors of ints:
319 one containing max_reg -1's; the other max_reg + 500 (an approximation
320 for max_qty) elements where element i contains i.
321 These are used to initialize various other vectors fast. */
323 static int *all_minus_one;
324 static int *consec_ints;
326 /* CUID of insn that starts the basic block currently being cse-processed. */
328 static int cse_basic_block_start;
330 /* CUID of insn that ends the basic block currently being cse-processed. */
332 static int cse_basic_block_end;
334 /* Vector mapping INSN_UIDs to cuids.
335 The cuids are like uids but increase monotonically always.
336 We use them to see whether a reg is used outside a given basic block. */
338 static int *uid_cuid;
340 /* Highest UID in UID_CUID. */
343 /* Get the cuid of an insn. */
345 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
347 /* Nonzero if cse has altered conditional jump insns
348 in such a way that jump optimization should be redone. */
350 static int cse_jumps_altered;
352 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
353 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
354 to put in the note. */
355 static int recorded_label_ref;
357 /* canon_hash stores 1 in do_not_record
358 if it notices a reference to CC0, PC, or some other volatile
361 static int do_not_record;
363 #ifdef LOAD_EXTEND_OP
365 /* Scratch rtl used when looking for load-extended copy of a MEM. */
366 static rtx memory_extend_rtx;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* canon_hash stores 1 in hash_arg_in_struct
375 if it notices a reference to memory that's part of a structure. */
377 static int hash_arg_in_struct;
379 /* The hash table contains buckets which are chains of `struct table_elt's,
380 each recording one expression's information.
381 That expression is in the `exp' field.
383 Those elements with the same hash code are chained in both directions
384 through the `next_same_hash' and `prev_same_hash' fields.
386 Each set of expressions with equivalent values
387 are on a two-way chain through the `next_same_value'
388 and `prev_same_value' fields, and all point with
389 the `first_same_value' field at the first element in
390 that chain. The chain is in order of increasing cost.
391 Each element's cost value is in its `cost' field.
393 The `in_memory' field is nonzero for elements that
394 involve any reference to memory. These elements are removed
395 whenever a write is done to an unidentified location in memory.
396 To be safe, we assume that a memory address is unidentified unless
397 the address is either a symbol constant or a constant plus
398 the frame pointer or argument pointer.
400 The `in_struct' field is nonzero for elements that
401 involve any reference to memory inside a structure or array.
403 The `related_value' field is used to connect related expressions
404 (that differ by adding an integer).
405 The related expressions are chained in a circular fashion.
406 `related_value' is zero for expressions for which this
409 The `cost' field stores the cost of this element's expression.
411 The `is_const' flag is set if the element is a constant (including
414 The `flag' field is used as a temporary during some search routines.
416 The `mode' field is usually the same as GET_MODE (`exp'), but
417 if `exp' is a CONST_INT and has no machine mode then the `mode'
418 field is the mode it was being used as. Each constant is
419 recorded separately for each mode it is used with. */
425 struct table_elt *next_same_hash;
426 struct table_elt *prev_same_hash;
427 struct table_elt *next_same_value;
428 struct table_elt *prev_same_value;
429 struct table_elt *first_same_value;
430 struct table_elt *related_value;
432 enum machine_mode mode;
439 /* We don't want a lot of buckets, because we rarely have very many
440 things stored in the hash table, and a lot of buckets slows
441 down a lot of loops that happen frequently. */
444 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
445 register (hard registers may require `do_not_record' to be set). */
448 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
449 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
450 : canon_hash (X, M) % NBUCKETS)
452 /* Determine whether register number N is considered a fixed register for CSE.
453 It is desirable to replace other regs with fixed regs, to reduce need for
455 A reg wins if it is either the frame pointer or designated as fixed,
456 but not if it is an overlapping register. */
457 #ifdef OVERLAPPING_REGNO_P
458 #define FIXED_REGNO_P(N) \
459 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
460 || fixed_regs[N] || global_regs[N]) \
461 && ! OVERLAPPING_REGNO_P ((N)))
463 #define FIXED_REGNO_P(N) \
464 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
465 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
475 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
476 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
477 || ((N) < FIRST_PSEUDO_REGISTER \
478 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
480 /* A register is cheap if it is a user variable assigned to the register
481 or if its register number always corresponds to a cheap register. */
483 #define CHEAP_REG(N) \
484 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
485 || CHEAP_REGNO (REGNO (N)))
488 (GET_CODE (X) == REG \
489 ? (CHEAP_REG (X) ? 0 \
490 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
494 /* Determine if the quantity number for register X represents a valid index
495 into the `qty_...' variables. */
497 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
499 static struct table_elt *table[NBUCKETS];
501 /* Chain of `struct table_elt's made so far for this function
502 but currently removed from the table. */
504 static struct table_elt *free_element_chain;
506 /* Number of `struct table_elt' structures made so far for this function. */
508 static int n_elements_made;
510 /* Maximum value `n_elements_made' has had so far in this compilation
511 for functions previously processed. */
513 static int max_elements_made;
515 /* Surviving equivalence class when two equivalence classes are merged
516 by recording the effects of a jump in the last insn. Zero if the
517 last insn was not a conditional jump. */
519 static struct table_elt *last_jump_equiv_class;
521 /* Set to the cost of a constant pool reference if one was found for a
522 symbolic constant. If this was found, it means we should try to
523 convert constants into constant pool entries if they don't fit in
526 static int constant_pool_entries_cost;
528 /* Define maximum length of a branch path. */
530 #define PATHLENGTH 10
532 /* This data describes a block that will be processed by cse_basic_block. */
534 struct cse_basic_block_data {
535 /* Lowest CUID value of insns in block. */
537 /* Highest CUID value of insns in block. */
539 /* Total number of SETs in block. */
541 /* Last insn in the block. */
543 /* Size of current branch path, if any. */
545 /* Current branch path, indicating which branches will be taken. */
547 /* The branch insn. */
549 /* Whether it should be taken or not. AROUND is the same as taken
550 except that it is used when the destination label is not preceded
552 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
556 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
557 virtual regs here because the simplify_*_operation routines are called
558 by integrate.c, which is called before virtual register instantiation. */
560 #define FIXED_BASE_PLUS_P(X) \
561 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
562 || (X) == arg_pointer_rtx \
563 || (X) == virtual_stack_vars_rtx \
564 || (X) == virtual_incoming_args_rtx \
565 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
566 && (XEXP (X, 0) == frame_pointer_rtx \
567 || XEXP (X, 0) == hard_frame_pointer_rtx \
568 || XEXP (X, 0) == arg_pointer_rtx \
569 || XEXP (X, 0) == virtual_stack_vars_rtx \
570 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
571 || GET_CODE (X) == ADDRESSOF)
573 /* Similar, but also allows reference to the stack pointer.
575 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
576 arg_pointer_rtx by itself is nonzero, because on at least one machine,
577 the i960, the arg pointer is zero when it is unused. */
579 #define NONZERO_BASE_PLUS_P(X) \
580 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
581 || (X) == virtual_stack_vars_rtx \
582 || (X) == virtual_incoming_args_rtx \
583 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
584 && (XEXP (X, 0) == frame_pointer_rtx \
585 || XEXP (X, 0) == hard_frame_pointer_rtx \
586 || XEXP (X, 0) == arg_pointer_rtx \
587 || XEXP (X, 0) == virtual_stack_vars_rtx \
588 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
589 || (X) == stack_pointer_rtx \
590 || (X) == virtual_stack_dynamic_rtx \
591 || (X) == virtual_outgoing_args_rtx \
592 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
593 && (XEXP (X, 0) == stack_pointer_rtx \
594 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
595 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
596 || GET_CODE (X) == ADDRESSOF)
598 static int notreg_cost PROTO((rtx));
599 static void new_basic_block PROTO((void));
600 static void make_new_qty PROTO((int));
601 static void make_regs_eqv PROTO((int, int));
602 static void delete_reg_equiv PROTO((int));
603 static int mention_regs PROTO((rtx));
604 static int insert_regs PROTO((rtx, struct table_elt *, int));
605 static void free_element PROTO((struct table_elt *));
606 static void remove_from_table PROTO((struct table_elt *, unsigned));
607 static struct table_elt *get_element PROTO((void));
608 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
609 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
610 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
611 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
613 static void merge_equiv_classes PROTO((struct table_elt *,
614 struct table_elt *));
615 static void invalidate PROTO((rtx, enum machine_mode));
616 static int cse_rtx_varies_p PROTO((rtx));
617 static void remove_invalid_refs PROTO((int));
618 static void rehash_using_reg PROTO((rtx));
619 static void invalidate_memory PROTO((void));
620 static void invalidate_for_call PROTO((void));
621 static rtx use_related_value PROTO((rtx, struct table_elt *));
622 static unsigned canon_hash PROTO((rtx, enum machine_mode));
623 static unsigned safe_hash PROTO((rtx, enum machine_mode));
624 static int exp_equiv_p PROTO((rtx, rtx, int, int));
625 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
628 static int refers_to_p PROTO((rtx, rtx));
629 static rtx canon_reg PROTO((rtx, rtx));
630 static void find_best_addr PROTO((rtx, rtx *));
631 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
633 enum machine_mode *));
634 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
636 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
638 static rtx fold_rtx PROTO((rtx, rtx));
639 static rtx equiv_constant PROTO((rtx));
640 static void record_jump_equiv PROTO((rtx, int));
641 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
643 static void cse_insn PROTO((rtx, int));
644 static int note_mem_written PROTO((rtx));
645 static void invalidate_from_clobbers PROTO((rtx));
646 static rtx cse_process_notes PROTO((rtx, rtx));
647 static void cse_around_loop PROTO((rtx));
648 static void invalidate_skipped_set PROTO((rtx, rtx));
649 static void invalidate_skipped_block PROTO((rtx));
650 static void cse_check_loop_start PROTO((rtx, rtx));
651 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
652 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
653 static void count_reg_usage PROTO((rtx, int *, rtx, int));
655 extern int rtx_equal_function_value_matters;
657 /* Return an estimate of the cost of computing rtx X.
658 One use is in cse, to decide which expression to keep in the hash table.
659 Another is in rtl generation, to pick the cheapest way to multiply.
660 Other uses like the latter are expected in the future. */
662 /* Internal function, to compute cost when X is not a register; called
663 from COST macro to keep it simple. */
669 return ((GET_CODE (x) == SUBREG
670 && GET_CODE (SUBREG_REG (x)) == REG
671 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
672 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
673 && (GET_MODE_SIZE (GET_MODE (x))
674 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
675 && subreg_lowpart_p (x)
676 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
677 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
678 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
679 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
681 : rtx_cost (x, SET) * 2);
684 /* Return the right cost to give to an operation
685 to make the cost of the corresponding register-to-register instruction
686 N times that of a fast register-to-register instruction. */
688 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
691 rtx_cost (x, outer_code)
693 enum rtx_code outer_code;
696 register enum rtx_code code;
703 /* Compute the default costs of certain things.
704 Note that RTX_COSTS can override the defaults. */
710 /* Count multiplication by 2**n as a shift,
711 because if we are considering it, we would output it as a shift. */
712 if (GET_CODE (XEXP (x, 1)) == CONST_INT
713 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
716 total = COSTS_N_INSNS (5);
722 total = COSTS_N_INSNS (7);
725 /* Used in loop.c and combine.c as a marker. */
729 /* We don't want these to be used in substitutions because
730 we have no way of validating the resulting insn. So assign
731 anything containing an ASM_OPERANDS a very high cost. */
741 return ! CHEAP_REG (x);
744 /* If we can't tie these modes, make this expensive. The larger
745 the mode, the more expensive it is. */
746 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
747 return COSTS_N_INSNS (2
748 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
751 RTX_COSTS (x, code, outer_code);
754 CONST_COSTS (x, code, outer_code);
758 #ifdef DEFAULT_RTX_COSTS
759 DEFAULT_RTX_COSTS(x, code, outer_code);
764 /* Sum the costs of the sub-rtx's, plus cost of this operation,
765 which is already in total. */
767 fmt = GET_RTX_FORMAT (code);
768 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
770 total += rtx_cost (XEXP (x, i), code);
771 else if (fmt[i] == 'E')
772 for (j = 0; j < XVECLEN (x, i); j++)
773 total += rtx_cost (XVECEXP (x, i, j), code);
778 /* Clear the hash table and initialize each register with its own quantity,
779 for a new basic block. */
788 bzero ((char *) reg_tick, max_reg * sizeof (int));
790 bcopy ((char *) all_minus_one, (char *) reg_in_table,
791 max_reg * sizeof (int));
792 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
793 CLEAR_HARD_REG_SET (hard_regs_in_table);
795 /* The per-quantity values used to be initialized here, but it is
796 much faster to initialize each as it is made in `make_new_qty'. */
798 for (i = 0; i < NBUCKETS; i++)
800 register struct table_elt *this, *next;
801 for (this = table[i]; this; this = next)
803 next = this->next_same_hash;
808 bzero ((char *) table, sizeof table);
817 /* Say that register REG contains a quantity not in any register before
818 and initialize that quantity. */
826 if (next_qty >= max_qty)
829 q = reg_qty[reg] = next_qty++;
830 qty_first_reg[q] = reg;
831 qty_last_reg[q] = reg;
832 qty_const[q] = qty_const_insn[q] = 0;
833 qty_comparison_code[q] = UNKNOWN;
835 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
838 /* Make reg NEW equivalent to reg OLD.
839 OLD is not changing; NEW is. */
842 make_regs_eqv (new, old)
843 register int new, old;
845 register int lastr, firstr;
846 register int q = reg_qty[old];
848 /* Nothing should become eqv until it has a "non-invalid" qty number. */
849 if (! REGNO_QTY_VALID_P (old))
853 firstr = qty_first_reg[q];
854 lastr = qty_last_reg[q];
856 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
857 hard regs. Among pseudos, if NEW will live longer than any other reg
858 of the same qty, and that is beyond the current basic block,
859 make it the new canonical replacement for this qty. */
860 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
861 /* Certain fixed registers might be of the class NO_REGS. This means
862 that not only can they not be allocated by the compiler, but
863 they cannot be used in substitutions or canonicalizations
865 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
866 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
867 || (new >= FIRST_PSEUDO_REGISTER
868 && (firstr < FIRST_PSEUDO_REGISTER
869 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
870 || (uid_cuid[REGNO_FIRST_UID (new)]
871 < cse_basic_block_start))
872 && (uid_cuid[REGNO_LAST_UID (new)]
873 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
875 reg_prev_eqv[firstr] = new;
876 reg_next_eqv[new] = firstr;
877 reg_prev_eqv[new] = -1;
878 qty_first_reg[q] = new;
882 /* If NEW is a hard reg (known to be non-fixed), insert at end.
883 Otherwise, insert before any non-fixed hard regs that are at the
884 end. Registers of class NO_REGS cannot be used as an
885 equivalent for anything. */
886 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
887 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
888 && new >= FIRST_PSEUDO_REGISTER)
889 lastr = reg_prev_eqv[lastr];
890 reg_next_eqv[new] = reg_next_eqv[lastr];
891 if (reg_next_eqv[lastr] >= 0)
892 reg_prev_eqv[reg_next_eqv[lastr]] = new;
894 qty_last_reg[q] = new;
895 reg_next_eqv[lastr] = new;
896 reg_prev_eqv[new] = lastr;
900 /* Remove REG from its equivalence class. */
903 delete_reg_equiv (reg)
906 register int q = reg_qty[reg];
909 /* If invalid, do nothing. */
913 p = reg_prev_eqv[reg];
914 n = reg_next_eqv[reg];
923 qty_first_reg[q] = n;
928 /* Remove any invalid expressions from the hash table
929 that refer to any of the registers contained in expression X.
931 Make sure that newly inserted references to those registers
932 as subexpressions will be considered valid.
934 mention_regs is not called when a register itself
935 is being stored in the table.
937 Return 1 if we have done something that may have changed the hash code
944 register enum rtx_code code;
947 register int changed = 0;
955 register int regno = REGNO (x);
956 register int endregno
957 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
958 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
961 for (i = regno; i < endregno; i++)
963 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
964 remove_invalid_refs (i);
966 reg_in_table[i] = reg_tick[i];
972 /* If X is a comparison or a COMPARE and either operand is a register
973 that does not have a quantity, give it one. This is so that a later
974 call to record_jump_equiv won't cause X to be assigned a different
975 hash code and not found in the table after that call.
977 It is not necessary to do this here, since rehash_using_reg can
978 fix up the table later, but doing this here eliminates the need to
979 call that expensive function in the most common case where the only
980 use of the register is in the comparison. */
982 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
984 if (GET_CODE (XEXP (x, 0)) == REG
985 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
986 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
988 rehash_using_reg (XEXP (x, 0));
992 if (GET_CODE (XEXP (x, 1)) == REG
993 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
994 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
996 rehash_using_reg (XEXP (x, 1));
1001 fmt = GET_RTX_FORMAT (code);
1002 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1004 changed |= mention_regs (XEXP (x, i));
1005 else if (fmt[i] == 'E')
1006 for (j = 0; j < XVECLEN (x, i); j++)
1007 changed |= mention_regs (XVECEXP (x, i, j));
1012 /* Update the register quantities for inserting X into the hash table
1013 with a value equivalent to CLASSP.
1014 (If the class does not contain a REG, it is irrelevant.)
1015 If MODIFIED is nonzero, X is a destination; it is being modified.
1016 Note that delete_reg_equiv should be called on a register
1017 before insert_regs is done on that register with MODIFIED != 0.
1019 Nonzero value means that elements of reg_qty have changed
1020 so X's hash code may be different. */
1023 insert_regs (x, classp, modified)
1025 struct table_elt *classp;
1028 if (GET_CODE (x) == REG)
1030 register int regno = REGNO (x);
1032 /* If REGNO is in the equivalence table already but is of the
1033 wrong mode for that equivalence, don't do anything here. */
1035 if (REGNO_QTY_VALID_P (regno)
1036 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1039 if (modified || ! REGNO_QTY_VALID_P (regno))
1042 for (classp = classp->first_same_value;
1044 classp = classp->next_same_value)
1045 if (GET_CODE (classp->exp) == REG
1046 && GET_MODE (classp->exp) == GET_MODE (x))
1048 make_regs_eqv (regno, REGNO (classp->exp));
1052 make_new_qty (regno);
1053 qty_mode[reg_qty[regno]] = GET_MODE (x);
1060 /* If X is a SUBREG, we will likely be inserting the inner register in the
1061 table. If that register doesn't have an assigned quantity number at
1062 this point but does later, the insertion that we will be doing now will
1063 not be accessible because its hash code will have changed. So assign
1064 a quantity number now. */
1066 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1067 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1069 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1070 mention_regs (SUBREG_REG (x));
1074 return mention_regs (x);
1077 /* Look in or update the hash table. */
1079 /* Put the element ELT on the list of free elements. */
1083 struct table_elt *elt;
1085 elt->next_same_hash = free_element_chain;
1086 free_element_chain = elt;
1089 /* Return an element that is free for use. */
1091 static struct table_elt *
1094 struct table_elt *elt = free_element_chain;
1097 free_element_chain = elt->next_same_hash;
1101 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1104 /* Remove table element ELT from use in the table.
1105 HASH is its hash code, made using the HASH macro.
1106 It's an argument because often that is known in advance
1107 and we save much time not recomputing it. */
1110 remove_from_table (elt, hash)
1111 register struct table_elt *elt;
1117 /* Mark this element as removed. See cse_insn. */
1118 elt->first_same_value = 0;
1120 /* Remove the table element from its equivalence class. */
1123 register struct table_elt *prev = elt->prev_same_value;
1124 register struct table_elt *next = elt->next_same_value;
1126 if (next) next->prev_same_value = prev;
1129 prev->next_same_value = next;
1132 register struct table_elt *newfirst = next;
1135 next->first_same_value = newfirst;
1136 next = next->next_same_value;
1141 /* Remove the table element from its hash bucket. */
1144 register struct table_elt *prev = elt->prev_same_hash;
1145 register struct table_elt *next = elt->next_same_hash;
1147 if (next) next->prev_same_hash = prev;
1150 prev->next_same_hash = next;
1151 else if (table[hash] == elt)
1155 /* This entry is not in the proper hash bucket. This can happen
1156 when two classes were merged by `merge_equiv_classes'. Search
1157 for the hash bucket that it heads. This happens only very
1158 rarely, so the cost is acceptable. */
1159 for (hash = 0; hash < NBUCKETS; hash++)
1160 if (table[hash] == elt)
1165 /* Remove the table element from its related-value circular chain. */
1167 if (elt->related_value != 0 && elt->related_value != elt)
1169 register struct table_elt *p = elt->related_value;
1170 while (p->related_value != elt)
1171 p = p->related_value;
1172 p->related_value = elt->related_value;
1173 if (p->related_value == p)
1174 p->related_value = 0;
1180 /* Look up X in the hash table and return its table element,
1181 or 0 if X is not in the table.
1183 MODE is the machine-mode of X, or if X is an integer constant
1184 with VOIDmode then MODE is the mode with which X will be used.
1186 Here we are satisfied to find an expression whose tree structure
1189 static struct table_elt *
1190 lookup (x, hash, mode)
1193 enum machine_mode mode;
1195 register struct table_elt *p;
1197 for (p = table[hash]; p; p = p->next_same_hash)
1198 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1199 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1205 /* Like `lookup' but don't care whether the table element uses invalid regs.
1206 Also ignore discrepancies in the machine mode of a register. */
1208 static struct table_elt *
1209 lookup_for_remove (x, hash, mode)
1212 enum machine_mode mode;
1214 register struct table_elt *p;
1216 if (GET_CODE (x) == REG)
1218 int regno = REGNO (x);
1219 /* Don't check the machine mode when comparing registers;
1220 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1221 for (p = table[hash]; p; p = p->next_same_hash)
1222 if (GET_CODE (p->exp) == REG
1223 && REGNO (p->exp) == regno)
1228 for (p = table[hash]; p; p = p->next_same_hash)
1229 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1236 /* Look for an expression equivalent to X and with code CODE.
1237 If one is found, return that expression. */
1240 lookup_as_function (x, code)
1244 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1249 for (p = p->first_same_value; p; p = p->next_same_value)
1251 if (GET_CODE (p->exp) == code
1252 /* Make sure this is a valid entry in the table. */
1253 && exp_equiv_p (p->exp, p->exp, 1, 0))
1260 /* Insert X in the hash table, assuming HASH is its hash code
1261 and CLASSP is an element of the class it should go in
1262 (or 0 if a new class should be made).
1263 It is inserted at the proper position to keep the class in
1264 the order cheapest first.
1266 MODE is the machine-mode of X, or if X is an integer constant
1267 with VOIDmode then MODE is the mode with which X will be used.
1269 For elements of equal cheapness, the most recent one
1270 goes in front, except that the first element in the list
1271 remains first unless a cheaper element is added. The order of
1272 pseudo-registers does not matter, as canon_reg will be called to
1273 find the cheapest when a register is retrieved from the table.
1275 The in_memory field in the hash table element is set to 0.
1276 The caller must set it nonzero if appropriate.
1278 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1279 and if insert_regs returns a nonzero value
1280 you must then recompute its hash code before calling here.
1282 If necessary, update table showing constant values of quantities. */
1284 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1286 static struct table_elt *
1287 insert (x, classp, hash, mode)
1289 register struct table_elt *classp;
1291 enum machine_mode mode;
1293 register struct table_elt *elt;
1295 /* If X is a register and we haven't made a quantity for it,
1296 something is wrong. */
1297 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1300 /* If X is a hard register, show it is being put in the table. */
1301 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1303 int regno = REGNO (x);
1304 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1307 for (i = regno; i < endregno; i++)
1308 SET_HARD_REG_BIT (hard_regs_in_table, i);
1311 /* If X is a label, show we recorded it. */
1312 if (GET_CODE (x) == LABEL_REF
1313 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1314 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1315 recorded_label_ref = 1;
1317 /* Put an element for X into the right hash bucket. */
1319 elt = get_element ();
1321 elt->cost = COST (x);
1322 elt->next_same_value = 0;
1323 elt->prev_same_value = 0;
1324 elt->next_same_hash = table[hash];
1325 elt->prev_same_hash = 0;
1326 elt->related_value = 0;
1329 elt->is_const = (CONSTANT_P (x)
1330 /* GNU C++ takes advantage of this for `this'
1331 (and other const values). */
1332 || (RTX_UNCHANGING_P (x)
1333 && GET_CODE (x) == REG
1334 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1335 || FIXED_BASE_PLUS_P (x));
1338 table[hash]->prev_same_hash = elt;
1341 /* Put it into the proper value-class. */
1344 classp = classp->first_same_value;
1345 if (CHEAPER (elt, classp))
1346 /* Insert at the head of the class */
1348 register struct table_elt *p;
1349 elt->next_same_value = classp;
1350 classp->prev_same_value = elt;
1351 elt->first_same_value = elt;
1353 for (p = classp; p; p = p->next_same_value)
1354 p->first_same_value = elt;
1358 /* Insert not at head of the class. */
1359 /* Put it after the last element cheaper than X. */
1360 register struct table_elt *p, *next;
1361 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1363 /* Put it after P and before NEXT. */
1364 elt->next_same_value = next;
1366 next->prev_same_value = elt;
1367 elt->prev_same_value = p;
1368 p->next_same_value = elt;
1369 elt->first_same_value = classp;
1373 elt->first_same_value = elt;
1375 /* If this is a constant being set equivalent to a register or a register
1376 being set equivalent to a constant, note the constant equivalence.
1378 If this is a constant, it cannot be equivalent to a different constant,
1379 and a constant is the only thing that can be cheaper than a register. So
1380 we know the register is the head of the class (before the constant was
1383 If this is a register that is not already known equivalent to a
1384 constant, we must check the entire class.
1386 If this is a register that is already known equivalent to an insn,
1387 update `qty_const_insn' to show that `this_insn' is the latest
1388 insn making that quantity equivalent to the constant. */
1390 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1391 && GET_CODE (x) != REG)
1393 qty_const[reg_qty[REGNO (classp->exp)]]
1394 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1395 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1398 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]
1401 register struct table_elt *p;
1403 for (p = classp; p != 0; p = p->next_same_value)
1405 if (p->is_const && GET_CODE (p->exp) != REG)
1407 qty_const[reg_qty[REGNO (x)]]
1408 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1409 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1415 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1416 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1417 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1419 /* If this is a constant with symbolic value,
1420 and it has a term with an explicit integer value,
1421 link it up with related expressions. */
1422 if (GET_CODE (x) == CONST)
1424 rtx subexp = get_related_value (x);
1426 struct table_elt *subelt, *subelt_prev;
1430 /* Get the integer-free subexpression in the hash table. */
1431 subhash = safe_hash (subexp, mode) % NBUCKETS;
1432 subelt = lookup (subexp, subhash, mode);
1434 subelt = insert (subexp, NULL_PTR, subhash, mode);
1435 /* Initialize SUBELT's circular chain if it has none. */
1436 if (subelt->related_value == 0)
1437 subelt->related_value = subelt;
1438 /* Find the element in the circular chain that precedes SUBELT. */
1439 subelt_prev = subelt;
1440 while (subelt_prev->related_value != subelt)
1441 subelt_prev = subelt_prev->related_value;
1442 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1443 This way the element that follows SUBELT is the oldest one. */
1444 elt->related_value = subelt_prev->related_value;
1445 subelt_prev->related_value = elt;
1452 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1453 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1454 the two classes equivalent.
1456 CLASS1 will be the surviving class; CLASS2 should not be used after this
1459 Any invalid entries in CLASS2 will not be copied. */
1462 merge_equiv_classes (class1, class2)
1463 struct table_elt *class1, *class2;
1465 struct table_elt *elt, *next, *new;
1467 /* Ensure we start with the head of the classes. */
1468 class1 = class1->first_same_value;
1469 class2 = class2->first_same_value;
1471 /* If they were already equal, forget it. */
1472 if (class1 == class2)
1475 for (elt = class2; elt; elt = next)
1479 enum machine_mode mode = elt->mode;
1481 next = elt->next_same_value;
1483 /* Remove old entry, make a new one in CLASS1's class.
1484 Don't do this for invalid entries as we cannot find their
1485 hash code (it also isn't necessary). */
1486 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1488 hash_arg_in_memory = 0;
1489 hash_arg_in_struct = 0;
1490 hash = HASH (exp, mode);
1492 if (GET_CODE (exp) == REG)
1493 delete_reg_equiv (REGNO (exp));
1495 remove_from_table (elt, hash);
1497 if (insert_regs (exp, class1, 0))
1499 rehash_using_reg (exp);
1500 hash = HASH (exp, mode);
1502 new = insert (exp, class1, hash, mode);
1503 new->in_memory = hash_arg_in_memory;
1504 new->in_struct = hash_arg_in_struct;
1509 /* Remove from the hash table, or mark as invalid,
1510 all expressions whose values could be altered by storing in X.
1511 X is a register, a subreg, or a memory reference with nonvarying address
1512 (because, when a memory reference with a varying address is stored in,
1513 all memory references are removed by invalidate_memory
1514 so specific invalidation is superfluous).
1515 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1516 instead of just the amount indicated by the mode of X. This is only used
1517 for bitfield stores into memory.
1519 A nonvarying address may be just a register or just
1520 a symbol reference, or it may be either of those plus
1521 a numeric offset. */
1524 invalidate (x, full_mode)
1526 enum machine_mode full_mode;
1529 register struct table_elt *p;
1531 /* If X is a register, dependencies on its contents
1532 are recorded through the qty number mechanism.
1533 Just change the qty number of the register,
1534 mark it as invalid for expressions that refer to it,
1535 and remove it itself. */
1537 if (GET_CODE (x) == REG)
1539 register int regno = REGNO (x);
1540 register unsigned hash = HASH (x, GET_MODE (x));
1542 /* Remove REGNO from any quantity list it might be on and indicate
1543 that it's value might have changed. If it is a pseudo, remove its
1544 entry from the hash table.
1546 For a hard register, we do the first two actions above for any
1547 additional hard registers corresponding to X. Then, if any of these
1548 registers are in the table, we must remove any REG entries that
1549 overlap these registers. */
1551 delete_reg_equiv (regno);
1554 if (regno >= FIRST_PSEUDO_REGISTER)
1556 /* Because a register can be referenced in more than one mode,
1557 we might have to remove more than one table entry. */
1559 struct table_elt *elt;
1561 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1562 remove_from_table (elt, hash);
1566 HOST_WIDE_INT in_table
1567 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1568 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1569 int tregno, tendregno;
1570 register struct table_elt *p, *next;
1572 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1574 for (i = regno + 1; i < endregno; i++)
1576 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1577 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1578 delete_reg_equiv (i);
1583 for (hash = 0; hash < NBUCKETS; hash++)
1584 for (p = table[hash]; p; p = next)
1586 next = p->next_same_hash;
1588 if (GET_CODE (p->exp) != REG
1589 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1592 tregno = REGNO (p->exp);
1594 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1595 if (tendregno > regno && tregno < endregno)
1596 remove_from_table (p, hash);
1603 if (GET_CODE (x) == SUBREG)
1605 if (GET_CODE (SUBREG_REG (x)) != REG)
1607 invalidate (SUBREG_REG (x), VOIDmode);
1611 /* X is not a register; it must be a memory reference with
1612 a nonvarying address. Remove all hash table elements
1613 that refer to overlapping pieces of memory. */
1615 if (GET_CODE (x) != MEM)
1618 if (full_mode == VOIDmode)
1619 full_mode = GET_MODE (x);
1621 for (i = 0; i < NBUCKETS; i++)
1623 register struct table_elt *next;
1624 for (p = table[i]; p; p = next)
1626 next = p->next_same_hash;
1627 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1628 than checking all the aliases). */
1630 && (GET_CODE (p->exp) != MEM
1631 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1632 remove_from_table (p, i);
1637 /* Remove all expressions that refer to register REGNO,
1638 since they are already invalid, and we are about to
1639 mark that register valid again and don't want the old
1640 expressions to reappear as valid. */
1643 remove_invalid_refs (regno)
1647 register struct table_elt *p, *next;
1649 for (i = 0; i < NBUCKETS; i++)
1650 for (p = table[i]; p; p = next)
1652 next = p->next_same_hash;
1653 if (GET_CODE (p->exp) != REG
1654 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1655 remove_from_table (p, i);
1659 /* Recompute the hash codes of any valid entries in the hash table that
1660 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1662 This is called when we make a jump equivalence. */
1665 rehash_using_reg (x)
1669 struct table_elt *p, *next;
1672 if (GET_CODE (x) == SUBREG)
1675 /* If X is not a register or if the register is known not to be in any
1676 valid entries in the table, we have no work to do. */
1678 if (GET_CODE (x) != REG
1679 || reg_in_table[REGNO (x)] < 0
1680 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1683 /* Scan all hash chains looking for valid entries that mention X.
1684 If we find one and it is in the wrong hash chain, move it. We can skip
1685 objects that are registers, since they are handled specially. */
1687 for (i = 0; i < NBUCKETS; i++)
1688 for (p = table[i]; p; p = next)
1690 next = p->next_same_hash;
1691 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1692 && exp_equiv_p (p->exp, p->exp, 1, 0)
1693 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1695 if (p->next_same_hash)
1696 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1698 if (p->prev_same_hash)
1699 p->prev_same_hash->next_same_hash = p->next_same_hash;
1701 table[i] = p->next_same_hash;
1703 p->next_same_hash = table[hash];
1704 p->prev_same_hash = 0;
1706 table[hash]->prev_same_hash = p;
1712 /* Remove from the hash table any expression that is a call-clobbered
1713 register. Also update their TICK values. */
1716 invalidate_for_call ()
1718 int regno, endregno;
1721 struct table_elt *p, *next;
1724 /* Go through all the hard registers. For each that is clobbered in
1725 a CALL_INSN, remove the register from quantity chains and update
1726 reg_tick if defined. Also see if any of these registers is currently
1729 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1730 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1732 delete_reg_equiv (regno);
1733 if (reg_tick[regno] >= 0)
1736 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1739 /* In the case where we have no call-clobbered hard registers in the
1740 table, we are done. Otherwise, scan the table and remove any
1741 entry that overlaps a call-clobbered register. */
1744 for (hash = 0; hash < NBUCKETS; hash++)
1745 for (p = table[hash]; p; p = next)
1747 next = p->next_same_hash;
1751 remove_from_table (p, hash);
1755 if (GET_CODE (p->exp) != REG
1756 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1759 regno = REGNO (p->exp);
1760 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1762 for (i = regno; i < endregno; i++)
1763 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1765 remove_from_table (p, hash);
1771 /* Given an expression X of type CONST,
1772 and ELT which is its table entry (or 0 if it
1773 is not in the hash table),
1774 return an alternate expression for X as a register plus integer.
1775 If none can be found, return 0. */
1778 use_related_value (x, elt)
1780 struct table_elt *elt;
1782 register struct table_elt *relt = 0;
1783 register struct table_elt *p, *q;
1784 HOST_WIDE_INT offset;
1786 /* First, is there anything related known?
1787 If we have a table element, we can tell from that.
1788 Otherwise, must look it up. */
1790 if (elt != 0 && elt->related_value != 0)
1792 else if (elt == 0 && GET_CODE (x) == CONST)
1794 rtx subexp = get_related_value (x);
1796 relt = lookup (subexp,
1797 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1804 /* Search all related table entries for one that has an
1805 equivalent register. */
1810 /* This loop is strange in that it is executed in two different cases.
1811 The first is when X is already in the table. Then it is searching
1812 the RELATED_VALUE list of X's class (RELT). The second case is when
1813 X is not in the table. Then RELT points to a class for the related
1816 Ensure that, whatever case we are in, that we ignore classes that have
1817 the same value as X. */
1819 if (rtx_equal_p (x, p->exp))
1822 for (q = p->first_same_value; q; q = q->next_same_value)
1823 if (GET_CODE (q->exp) == REG)
1829 p = p->related_value;
1831 /* We went all the way around, so there is nothing to be found.
1832 Alternatively, perhaps RELT was in the table for some other reason
1833 and it has no related values recorded. */
1834 if (p == relt || p == 0)
1841 offset = (get_integer_term (x) - get_integer_term (p->exp));
1842 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1843 return plus_constant (q->exp, offset);
1846 /* Hash an rtx. We are careful to make sure the value is never negative.
1847 Equivalent registers hash identically.
1848 MODE is used in hashing for CONST_INTs only;
1849 otherwise the mode of X is used.
1851 Store 1 in do_not_record if any subexpression is volatile.
1853 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1854 which does not have the RTX_UNCHANGING_P bit set.
1855 In this case, also store 1 in hash_arg_in_struct
1856 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1858 Note that cse_insn knows that the hash code of a MEM expression
1859 is just (int) MEM plus the hash code of the address. */
1862 canon_hash (x, mode)
1864 enum machine_mode mode;
1867 register unsigned hash = 0;
1868 register enum rtx_code code;
1871 /* repeat is used to turn tail-recursion into iteration. */
1876 code = GET_CODE (x);
1881 register int regno = REGNO (x);
1883 /* On some machines, we can't record any non-fixed hard register,
1884 because extending its life will cause reload problems. We
1885 consider ap, fp, and sp to be fixed for this purpose.
1886 On all machines, we can't record any global registers. */
1888 if (regno < FIRST_PSEUDO_REGISTER
1889 && (global_regs[regno]
1890 || (SMALL_REGISTER_CLASSES
1891 && ! fixed_regs[regno]
1892 && regno != FRAME_POINTER_REGNUM
1893 && regno != HARD_FRAME_POINTER_REGNUM
1894 && regno != ARG_POINTER_REGNUM
1895 && regno != STACK_POINTER_REGNUM)))
1900 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
1906 unsigned HOST_WIDE_INT tem = INTVAL (x);
1907 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
1912 /* This is like the general case, except that it only counts
1913 the integers representing the constant. */
1914 hash += (unsigned) code + (unsigned) GET_MODE (x);
1915 if (GET_MODE (x) != VOIDmode)
1916 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1918 unsigned tem = XINT (x, i);
1922 hash += ((unsigned) CONST_DOUBLE_LOW (x)
1923 + (unsigned) CONST_DOUBLE_HIGH (x));
1926 /* Assume there is only one rtx object for any given label. */
1929 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
1934 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
1938 if (MEM_VOLATILE_P (x))
1943 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
1945 hash_arg_in_memory = 1;
1946 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1948 /* Now that we have already found this special case,
1949 might as well speed it up as much as possible. */
1950 hash += (unsigned) MEM;
1961 case UNSPEC_VOLATILE:
1966 if (MEM_VOLATILE_P (x))
1977 i = GET_RTX_LENGTH (code) - 1;
1978 hash += (unsigned) code + (unsigned) GET_MODE (x);
1979 fmt = GET_RTX_FORMAT (code);
1984 rtx tem = XEXP (x, i);
1986 /* If we are about to do the last recursive call
1987 needed at this level, change it into iteration.
1988 This function is called enough to be worth it. */
1994 hash += canon_hash (tem, 0);
1996 else if (fmt[i] == 'E')
1997 for (j = 0; j < XVECLEN (x, i); j++)
1998 hash += canon_hash (XVECEXP (x, i, j), 0);
1999 else if (fmt[i] == 's')
2001 register unsigned char *p = (unsigned char *) XSTR (x, i);
2006 else if (fmt[i] == 'i')
2008 register unsigned tem = XINT (x, i);
2011 else if (fmt[i] == '0')
2019 /* Like canon_hash but with no side effects. */
2024 enum machine_mode mode;
2026 int save_do_not_record = do_not_record;
2027 int save_hash_arg_in_memory = hash_arg_in_memory;
2028 int save_hash_arg_in_struct = hash_arg_in_struct;
2029 unsigned hash = canon_hash (x, mode);
2030 hash_arg_in_memory = save_hash_arg_in_memory;
2031 hash_arg_in_struct = save_hash_arg_in_struct;
2032 do_not_record = save_do_not_record;
2036 /* Return 1 iff X and Y would canonicalize into the same thing,
2037 without actually constructing the canonicalization of either one.
2038 If VALIDATE is nonzero,
2039 we assume X is an expression being processed from the rtl
2040 and Y was found in the hash table. We check register refs
2041 in Y for being marked as valid.
2043 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2044 that is known to be in the register. Ordinarily, we don't allow them
2045 to match, because letting them match would cause unpredictable results
2046 in all the places that search a hash table chain for an equivalent
2047 for a given value. A possible equivalent that has different structure
2048 has its hash code computed from different data. Whether the hash code
2049 is the same as that of the the given value is pure luck. */
2052 exp_equiv_p (x, y, validate, equal_values)
2058 register enum rtx_code code;
2061 /* Note: it is incorrect to assume an expression is equivalent to itself
2062 if VALIDATE is nonzero. */
2063 if (x == y && !validate)
2065 if (x == 0 || y == 0)
2068 code = GET_CODE (x);
2069 if (code != GET_CODE (y))
2074 /* If X is a constant and Y is a register or vice versa, they may be
2075 equivalent. We only have to validate if Y is a register. */
2076 if (CONSTANT_P (x) && GET_CODE (y) == REG
2077 && REGNO_QTY_VALID_P (REGNO (y))
2078 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2079 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2080 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2083 if (CONSTANT_P (y) && code == REG
2084 && REGNO_QTY_VALID_P (REGNO (x))
2085 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2086 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2092 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2093 if (GET_MODE (x) != GET_MODE (y))
2103 return INTVAL (x) == INTVAL (y);
2106 return XEXP (x, 0) == XEXP (y, 0);
2109 return XSTR (x, 0) == XSTR (y, 0);
2113 int regno = REGNO (y);
2115 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2116 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2119 /* If the quantities are not the same, the expressions are not
2120 equivalent. If there are and we are not to validate, they
2121 are equivalent. Otherwise, ensure all regs are up-to-date. */
2123 if (reg_qty[REGNO (x)] != reg_qty[regno])
2129 for (i = regno; i < endregno; i++)
2130 if (reg_in_table[i] != reg_tick[i])
2136 /* For commutative operations, check both orders. */
2144 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2145 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2146 validate, equal_values))
2147 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2148 validate, equal_values)
2149 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2150 validate, equal_values)));
2156 /* Compare the elements. If any pair of corresponding elements
2157 fail to match, return 0 for the whole things. */
2159 fmt = GET_RTX_FORMAT (code);
2160 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2165 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2170 if (XVECLEN (x, i) != XVECLEN (y, i))
2172 for (j = 0; j < XVECLEN (x, i); j++)
2173 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2174 validate, equal_values))
2179 if (strcmp (XSTR (x, i), XSTR (y, i)))
2184 if (XINT (x, i) != XINT (y, i))
2189 if (XWINT (x, i) != XWINT (y, i))
2204 /* Return 1 iff any subexpression of X matches Y.
2205 Here we do not require that X or Y be valid (for registers referred to)
2206 for being in the hash table. */
2213 register enum rtx_code code;
2219 if (x == 0 || y == 0)
2222 code = GET_CODE (x);
2223 /* If X as a whole has the same code as Y, they may match.
2225 if (code == GET_CODE (y))
2227 if (exp_equiv_p (x, y, 0, 1))
2231 /* X does not match, so try its subexpressions. */
2233 fmt = GET_RTX_FORMAT (code);
2234 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2243 if (refers_to_p (XEXP (x, i), y))
2246 else if (fmt[i] == 'E')
2249 for (j = 0; j < XVECLEN (x, i); j++)
2250 if (refers_to_p (XVECEXP (x, i, j), y))
2257 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2258 set PBASE, PSTART, and PEND which correspond to the base of the address,
2259 the starting offset, and ending offset respectively.
2261 ADDR is known to be a nonvarying address. */
2263 /* ??? Despite what the comments say, this function is in fact frequently
2264 passed varying addresses. This does not appear to cause any problems. */
2267 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2271 HOST_WIDE_INT *pstart, *pend;
2274 HOST_WIDE_INT start, end;
2280 /* Registers with nonvarying addresses usually have constant equivalents;
2281 but the frame pointer register is also possible. */
2282 if (GET_CODE (base) == REG
2284 && REGNO_QTY_VALID_P (REGNO (base))
2285 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2286 && qty_const[reg_qty[REGNO (base)]] != 0)
2287 base = qty_const[reg_qty[REGNO (base)]];
2288 else if (GET_CODE (base) == PLUS
2289 && GET_CODE (XEXP (base, 1)) == CONST_INT
2290 && GET_CODE (XEXP (base, 0)) == REG
2292 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2293 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2294 == GET_MODE (XEXP (base, 0)))
2295 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2297 start = INTVAL (XEXP (base, 1));
2298 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2300 /* This can happen as the result of virtual register instantiation,
2301 if the initial offset is too large to be a valid address. */
2302 else if (GET_CODE (base) == PLUS
2303 && GET_CODE (XEXP (base, 0)) == REG
2304 && GET_CODE (XEXP (base, 1)) == REG
2306 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2307 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2308 == GET_MODE (XEXP (base, 0)))
2309 && qty_const[reg_qty[REGNO (XEXP (base, 0))]]
2310 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2311 && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]]
2312 == GET_MODE (XEXP (base, 1)))
2313 && qty_const[reg_qty[REGNO (XEXP (base, 1))]])
2315 rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]];
2316 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2318 /* One of the two values must be a constant. */
2319 if (GET_CODE (base) != CONST_INT)
2321 if (GET_CODE (tem) != CONST_INT)
2323 start = INTVAL (tem);
2327 start = INTVAL (base);
2332 /* Handle everything that we can find inside an address that has been
2333 viewed as constant. */
2337 /* If no part of this switch does a "continue", the code outside
2338 will exit this loop. */
2340 switch (GET_CODE (base))
2343 /* By definition, operand1 of a LO_SUM is the associated constant
2344 address. Use the associated constant address as the base
2346 base = XEXP (base, 1);
2350 /* Strip off CONST. */
2351 base = XEXP (base, 0);
2355 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2357 start += INTVAL (XEXP (base, 1));
2358 base = XEXP (base, 0);
2364 /* Handle the case of an AND which is the negative of a power of
2365 two. This is used to represent unaligned memory operations. */
2366 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2367 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2369 set_nonvarying_address_components (XEXP (base, 0), size,
2370 pbase, pstart, pend);
2372 /* Assume the worst misalignment. START is affected, but not
2373 END, so compensate but adjusting SIZE. Don't lose any
2374 constant we already had. */
2376 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2377 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2390 if (GET_CODE (base) == CONST_INT)
2392 start += INTVAL (base);
2398 /* Set the return values. */
2404 /* Return 1 if X has a value that can vary even between two
2405 executions of the program. 0 means X can be compared reliably
2406 against certain constants or near-constants. */
2409 cse_rtx_varies_p (x)
2412 /* We need not check for X and the equivalence class being of the same
2413 mode because if X is equivalent to a constant in some mode, it
2414 doesn't vary in any mode. */
2416 if (GET_CODE (x) == REG
2417 && REGNO_QTY_VALID_P (REGNO (x))
2418 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2419 && qty_const[reg_qty[REGNO (x)]] != 0)
2422 if (GET_CODE (x) == PLUS
2423 && GET_CODE (XEXP (x, 1)) == CONST_INT
2424 && GET_CODE (XEXP (x, 0)) == REG
2425 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2426 && (GET_MODE (XEXP (x, 0))
2427 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2428 && qty_const[reg_qty[REGNO (XEXP (x, 0))]])
2431 /* This can happen as the result of virtual register instantiation, if
2432 the initial constant is too large to be a valid address. This gives
2433 us a three instruction sequence, load large offset into a register,
2434 load fp minus a constant into a register, then a MEM which is the
2435 sum of the two `constant' registers. */
2436 if (GET_CODE (x) == PLUS
2437 && GET_CODE (XEXP (x, 0)) == REG
2438 && GET_CODE (XEXP (x, 1)) == REG
2439 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2440 && (GET_MODE (XEXP (x, 0))
2441 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2442 && qty_const[reg_qty[REGNO (XEXP (x, 0))]]
2443 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2444 && (GET_MODE (XEXP (x, 1))
2445 == qty_mode[reg_qty[REGNO (XEXP (x, 1))]])
2446 && qty_const[reg_qty[REGNO (XEXP (x, 1))]])
2449 return rtx_varies_p (x);
2452 /* Canonicalize an expression:
2453 replace each register reference inside it
2454 with the "oldest" equivalent register.
2456 If INSN is non-zero and we are replacing a pseudo with a hard register
2457 or vice versa, validate_change is used to ensure that INSN remains valid
2458 after we make our substitution. The calls are made with IN_GROUP non-zero
2459 so apply_change_group must be called upon the outermost return from this
2460 function (unless INSN is zero). The result of apply_change_group can
2461 generally be discarded since the changes we are making are optional. */
2469 register enum rtx_code code;
2475 code = GET_CODE (x);
2493 /* Never replace a hard reg, because hard regs can appear
2494 in more than one machine mode, and we must preserve the mode
2495 of each occurrence. Also, some hard regs appear in
2496 MEMs that are shared and mustn't be altered. Don't try to
2497 replace any reg that maps to a reg of class NO_REGS. */
2498 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2499 || ! REGNO_QTY_VALID_P (REGNO (x)))
2502 first = qty_first_reg[reg_qty[REGNO (x)]];
2503 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2504 : REGNO_REG_CLASS (first) == NO_REGS ? x
2505 : gen_rtx_REG (qty_mode[reg_qty[REGNO (x)]], first));
2512 fmt = GET_RTX_FORMAT (code);
2513 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2519 rtx new = canon_reg (XEXP (x, i), insn);
2522 /* If replacing pseudo with hard reg or vice versa, ensure the
2523 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2524 if (insn != 0 && new != 0
2525 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2526 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2527 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2528 || (insn_code = recog_memoized (insn)) < 0
2529 || insn_n_dups[insn_code] > 0))
2530 validate_change (insn, &XEXP (x, i), new, 1);
2534 else if (fmt[i] == 'E')
2535 for (j = 0; j < XVECLEN (x, i); j++)
2536 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2542 /* LOC is a location within INSN that is an operand address (the contents of
2543 a MEM). Find the best equivalent address to use that is valid for this
2546 On most CISC machines, complicated address modes are costly, and rtx_cost
2547 is a good approximation for that cost. However, most RISC machines have
2548 only a few (usually only one) memory reference formats. If an address is
2549 valid at all, it is often just as cheap as any other address. Hence, for
2550 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2551 costs of various addresses. For two addresses of equal cost, choose the one
2552 with the highest `rtx_cost' value as that has the potential of eliminating
2553 the most insns. For equal costs, we choose the first in the equivalence
2554 class. Note that we ignore the fact that pseudo registers are cheaper
2555 than hard registers here because we would also prefer the pseudo registers.
2559 find_best_addr (insn, loc)
2563 struct table_elt *elt, *p;
2565 int found_better = 1;
2566 int save_do_not_record = do_not_record;
2567 int save_hash_arg_in_memory = hash_arg_in_memory;
2568 int save_hash_arg_in_struct = hash_arg_in_struct;
2573 /* Do not try to replace constant addresses or addresses of local and
2574 argument slots. These MEM expressions are made only once and inserted
2575 in many instructions, as well as being used to control symbol table
2576 output. It is not safe to clobber them.
2578 There are some uncommon cases where the address is already in a register
2579 for some reason, but we cannot take advantage of that because we have
2580 no easy way to unshare the MEM. In addition, looking up all stack
2581 addresses is costly. */
2582 if ((GET_CODE (addr) == PLUS
2583 && GET_CODE (XEXP (addr, 0)) == REG
2584 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2585 && (regno = REGNO (XEXP (addr, 0)),
2586 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2587 || regno == ARG_POINTER_REGNUM))
2588 || (GET_CODE (addr) == REG
2589 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2590 || regno == HARD_FRAME_POINTER_REGNUM
2591 || regno == ARG_POINTER_REGNUM))
2592 || GET_CODE (addr) == ADDRESSOF
2593 || CONSTANT_ADDRESS_P (addr))
2596 /* If this address is not simply a register, try to fold it. This will
2597 sometimes simplify the expression. Many simplifications
2598 will not be valid, but some, usually applying the associative rule, will
2599 be valid and produce better code. */
2600 if (GET_CODE (addr) != REG)
2602 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2606 && (ADDRESS_COST (folded) < ADDRESS_COST (addr)
2607 || (ADDRESS_COST (folded) == ADDRESS_COST (addr)
2608 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2610 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2612 && validate_change (insn, loc, folded, 0))
2616 /* If this address is not in the hash table, we can't look for equivalences
2617 of the whole address. Also, ignore if volatile. */
2620 hash = HASH (addr, Pmode);
2621 addr_volatile = do_not_record;
2622 do_not_record = save_do_not_record;
2623 hash_arg_in_memory = save_hash_arg_in_memory;
2624 hash_arg_in_struct = save_hash_arg_in_struct;
2629 elt = lookup (addr, hash, Pmode);
2631 #ifndef ADDRESS_COST
2634 int our_cost = elt->cost;
2636 /* Find the lowest cost below ours that works. */
2637 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2638 if (elt->cost < our_cost
2639 && (GET_CODE (elt->exp) == REG
2640 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2641 && validate_change (insn, loc,
2642 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2649 /* We need to find the best (under the criteria documented above) entry
2650 in the class that is valid. We use the `flag' field to indicate
2651 choices that were invalid and iterate until we can't find a better
2652 one that hasn't already been tried. */
2654 for (p = elt->first_same_value; p; p = p->next_same_value)
2657 while (found_better)
2659 int best_addr_cost = ADDRESS_COST (*loc);
2660 int best_rtx_cost = (elt->cost + 1) >> 1;
2661 struct table_elt *best_elt = elt;
2664 for (p = elt->first_same_value; p; p = p->next_same_value)
2666 && (GET_CODE (p->exp) == REG
2667 || exp_equiv_p (p->exp, p->exp, 1, 0))
2668 && (ADDRESS_COST (p->exp) < best_addr_cost
2669 || (ADDRESS_COST (p->exp) == best_addr_cost
2670 && (p->cost + 1) >> 1 > best_rtx_cost)))
2673 best_addr_cost = ADDRESS_COST (p->exp);
2674 best_rtx_cost = (p->cost + 1) >> 1;
2680 if (validate_change (insn, loc,
2681 canon_reg (copy_rtx (best_elt->exp),
2690 /* If the address is a binary operation with the first operand a register
2691 and the second a constant, do the same as above, but looking for
2692 equivalences of the register. Then try to simplify before checking for
2693 the best address to use. This catches a few cases: First is when we
2694 have REG+const and the register is another REG+const. We can often merge
2695 the constants and eliminate one insn and one register. It may also be
2696 that a machine has a cheap REG+REG+const. Finally, this improves the
2697 code on the Alpha for unaligned byte stores. */
2699 if (flag_expensive_optimizations
2700 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2701 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2702 && GET_CODE (XEXP (*loc, 0)) == REG
2703 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2705 rtx c = XEXP (*loc, 1);
2708 hash = HASH (XEXP (*loc, 0), Pmode);
2709 do_not_record = save_do_not_record;
2710 hash_arg_in_memory = save_hash_arg_in_memory;
2711 hash_arg_in_struct = save_hash_arg_in_struct;
2713 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2717 /* We need to find the best (under the criteria documented above) entry
2718 in the class that is valid. We use the `flag' field to indicate
2719 choices that were invalid and iterate until we can't find a better
2720 one that hasn't already been tried. */
2722 for (p = elt->first_same_value; p; p = p->next_same_value)
2725 while (found_better)
2727 int best_addr_cost = ADDRESS_COST (*loc);
2728 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2729 struct table_elt *best_elt = elt;
2730 rtx best_rtx = *loc;
2733 /* This is at worst case an O(n^2) algorithm, so limit our search
2734 to the first 32 elements on the list. This avoids trouble
2735 compiling code with very long basic blocks that can easily
2736 call cse_gen_binary so many times that we run out of memory. */
2739 for (p = elt->first_same_value, count = 0;
2741 p = p->next_same_value, count++)
2743 && (GET_CODE (p->exp) == REG
2744 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2746 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2748 if ((ADDRESS_COST (new) < best_addr_cost
2749 || (ADDRESS_COST (new) == best_addr_cost
2750 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2753 best_addr_cost = ADDRESS_COST (new);
2754 best_rtx_cost = (COST (new) + 1) >> 1;
2762 if (validate_change (insn, loc,
2763 canon_reg (copy_rtx (best_rtx),
2774 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2775 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2776 what values are being compared.
2778 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2779 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2780 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2781 compared to produce cc0.
2783 The return value is the comparison operator and is either the code of
2784 A or the code corresponding to the inverse of the comparison. */
2786 static enum rtx_code
2787 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2790 enum machine_mode *pmode1, *pmode2;
2794 arg1 = *parg1, arg2 = *parg2;
2796 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2798 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2800 /* Set non-zero when we find something of interest. */
2802 int reverse_code = 0;
2803 struct table_elt *p = 0;
2805 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2806 On machines with CC0, this is the only case that can occur, since
2807 fold_rtx will return the COMPARE or item being compared with zero
2810 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2813 /* If ARG1 is a comparison operator and CODE is testing for
2814 STORE_FLAG_VALUE, get the inner arguments. */
2816 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2819 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2820 && code == LT && STORE_FLAG_VALUE == -1)
2821 #ifdef FLOAT_STORE_FLAG_VALUE
2822 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2823 && FLOAT_STORE_FLAG_VALUE < 0)
2828 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2829 && code == GE && STORE_FLAG_VALUE == -1)
2830 #ifdef FLOAT_STORE_FLAG_VALUE
2831 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2832 && FLOAT_STORE_FLAG_VALUE < 0)
2835 x = arg1, reverse_code = 1;
2838 /* ??? We could also check for
2840 (ne (and (eq (...) (const_int 1))) (const_int 0))
2842 and related forms, but let's wait until we see them occurring. */
2845 /* Look up ARG1 in the hash table and see if it has an equivalence
2846 that lets us see what is being compared. */
2847 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2849 if (p) p = p->first_same_value;
2851 for (; p; p = p->next_same_value)
2853 enum machine_mode inner_mode = GET_MODE (p->exp);
2855 /* If the entry isn't valid, skip it. */
2856 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2859 if (GET_CODE (p->exp) == COMPARE
2860 /* Another possibility is that this machine has a compare insn
2861 that includes the comparison code. In that case, ARG1 would
2862 be equivalent to a comparison operation that would set ARG1 to
2863 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2864 ORIG_CODE is the actual comparison being done; if it is an EQ,
2865 we must reverse ORIG_CODE. On machine with a negative value
2866 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2869 && GET_MODE_CLASS (inner_mode) == MODE_INT
2870 && (GET_MODE_BITSIZE (inner_mode)
2871 <= HOST_BITS_PER_WIDE_INT)
2872 && (STORE_FLAG_VALUE
2873 & ((HOST_WIDE_INT) 1
2874 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2875 #ifdef FLOAT_STORE_FLAG_VALUE
2877 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2878 && FLOAT_STORE_FLAG_VALUE < 0)
2881 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2886 else if ((code == EQ
2888 && GET_MODE_CLASS (inner_mode) == MODE_INT
2889 && (GET_MODE_BITSIZE (inner_mode)
2890 <= HOST_BITS_PER_WIDE_INT)
2891 && (STORE_FLAG_VALUE
2892 & ((HOST_WIDE_INT) 1
2893 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2894 #ifdef FLOAT_STORE_FLAG_VALUE
2896 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2897 && FLOAT_STORE_FLAG_VALUE < 0)
2900 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2907 /* If this is fp + constant, the equivalent is a better operand since
2908 it may let us predict the value of the comparison. */
2909 else if (NONZERO_BASE_PLUS_P (p->exp))
2916 /* If we didn't find a useful equivalence for ARG1, we are done.
2917 Otherwise, set up for the next iteration. */
2921 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2922 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2923 code = GET_CODE (x);
2926 code = reverse_condition (code);
2929 /* Return our results. Return the modes from before fold_rtx
2930 because fold_rtx might produce const_int, and then it's too late. */
2931 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2932 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2937 /* Try to simplify a unary operation CODE whose output mode is to be
2938 MODE with input operand OP whose mode was originally OP_MODE.
2939 Return zero if no simplification can be made. */
2942 simplify_unary_operation (code, mode, op, op_mode)
2944 enum machine_mode mode;
2946 enum machine_mode op_mode;
2948 register int width = GET_MODE_BITSIZE (mode);
2950 /* The order of these tests is critical so that, for example, we don't
2951 check the wrong mode (input vs. output) for a conversion operation,
2952 such as FIX. At some point, this should be simplified. */
2954 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2956 if (code == FLOAT && GET_MODE (op) == VOIDmode
2957 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2959 HOST_WIDE_INT hv, lv;
2962 if (GET_CODE (op) == CONST_INT)
2963 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
2965 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
2967 #ifdef REAL_ARITHMETIC
2968 REAL_VALUE_FROM_INT (d, lv, hv, mode);
2972 d = (double) (~ hv);
2973 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2974 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2975 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
2981 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2982 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2983 d += (double) (unsigned HOST_WIDE_INT) lv;
2985 #endif /* REAL_ARITHMETIC */
2986 d = real_value_truncate (mode, d);
2987 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2989 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
2990 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2992 HOST_WIDE_INT hv, lv;
2995 if (GET_CODE (op) == CONST_INT)
2996 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
2998 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3000 if (op_mode == VOIDmode)
3002 /* We don't know how to interpret negative-looking numbers in
3003 this case, so don't try to fold those. */
3007 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3010 hv = 0, lv &= GET_MODE_MASK (op_mode);
3012 #ifdef REAL_ARITHMETIC
3013 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3016 d = (double) (unsigned HOST_WIDE_INT) hv;
3017 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3018 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3019 d += (double) (unsigned HOST_WIDE_INT) lv;
3020 #endif /* REAL_ARITHMETIC */
3021 d = real_value_truncate (mode, d);
3022 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3026 if (GET_CODE (op) == CONST_INT
3027 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3029 register HOST_WIDE_INT arg0 = INTVAL (op);
3030 register HOST_WIDE_INT val;
3043 val = (arg0 >= 0 ? arg0 : - arg0);
3047 /* Don't use ffs here. Instead, get low order bit and then its
3048 number. If arg0 is zero, this will return 0, as desired. */
3049 arg0 &= GET_MODE_MASK (mode);
3050 val = exact_log2 (arg0 & (- arg0)) + 1;
3058 if (op_mode == VOIDmode)
3060 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3062 /* If we were really extending the mode,
3063 we would have to distinguish between zero-extension
3064 and sign-extension. */
3065 if (width != GET_MODE_BITSIZE (op_mode))
3069 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3070 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3076 if (op_mode == VOIDmode)
3078 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3080 /* If we were really extending the mode,
3081 we would have to distinguish between zero-extension
3082 and sign-extension. */
3083 if (width != GET_MODE_BITSIZE (op_mode))
3087 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3090 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3092 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3093 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3106 /* Clear the bits that don't belong in our mode,
3107 unless they and our sign bit are all one.
3108 So we get either a reasonable negative value or a reasonable
3109 unsigned value for this mode. */
3110 if (width < HOST_BITS_PER_WIDE_INT
3111 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3112 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3113 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3115 return GEN_INT (val);
3118 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3119 for a DImode operation on a CONST_INT. */
3120 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3121 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3123 HOST_WIDE_INT l1, h1, lv, hv;
3125 if (GET_CODE (op) == CONST_DOUBLE)
3126 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3128 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3138 neg_double (l1, h1, &lv, &hv);
3143 neg_double (l1, h1, &lv, &hv);
3151 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3153 lv = exact_log2 (l1 & (-l1)) + 1;
3157 /* This is just a change-of-mode, so do nothing. */
3162 if (op_mode == VOIDmode
3163 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3167 lv = l1 & GET_MODE_MASK (op_mode);
3171 if (op_mode == VOIDmode
3172 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3176 lv = l1 & GET_MODE_MASK (op_mode);
3177 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3178 && (lv & ((HOST_WIDE_INT) 1
3179 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3180 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3182 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3193 return immed_double_const (lv, hv, mode);
3196 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3197 else if (GET_CODE (op) == CONST_DOUBLE
3198 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3204 if (setjmp (handler))
3205 /* There used to be a warning here, but that is inadvisable.
3206 People may want to cause traps, and the natural way
3207 to do it should not get a warning. */
3210 set_float_handler (handler);
3212 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3217 d = REAL_VALUE_NEGATE (d);
3221 if (REAL_VALUE_NEGATIVE (d))
3222 d = REAL_VALUE_NEGATE (d);
3225 case FLOAT_TRUNCATE:
3226 d = real_value_truncate (mode, d);
3230 /* All this does is change the mode. */
3234 d = REAL_VALUE_RNDZINT (d);
3238 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3248 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3249 set_float_handler (NULL_PTR);
3253 else if (GET_CODE (op) == CONST_DOUBLE
3254 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3255 && GET_MODE_CLASS (mode) == MODE_INT
3256 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3262 if (setjmp (handler))
3265 set_float_handler (handler);
3267 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3272 val = REAL_VALUE_FIX (d);
3276 val = REAL_VALUE_UNSIGNED_FIX (d);
3283 set_float_handler (NULL_PTR);
3285 /* Clear the bits that don't belong in our mode,
3286 unless they and our sign bit are all one.
3287 So we get either a reasonable negative value or a reasonable
3288 unsigned value for this mode. */
3289 if (width < HOST_BITS_PER_WIDE_INT
3290 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3291 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3292 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3294 /* If this would be an entire word for the target, but is not for
3295 the host, then sign-extend on the host so that the number will look
3296 the same way on the host that it would on the target.
3298 For example, when building a 64 bit alpha hosted 32 bit sparc
3299 targeted compiler, then we want the 32 bit unsigned value -1 to be
3300 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3301 The later confuses the sparc backend. */
3303 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3304 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3305 val |= ((HOST_WIDE_INT) (-1) << width);
3307 return GEN_INT (val);
3310 /* This was formerly used only for non-IEEE float.
3311 eggert@twinsun.com says it is safe for IEEE also. */
3314 /* There are some simplifications we can do even if the operands
3320 /* (not (not X)) == X, similarly for NEG. */
3321 if (GET_CODE (op) == code)
3322 return XEXP (op, 0);
3326 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3327 becomes just the MINUS if its mode is MODE. This allows
3328 folding switch statements on machines using casesi (such as
3330 if (GET_CODE (op) == TRUNCATE
3331 && GET_MODE (XEXP (op, 0)) == mode
3332 && GET_CODE (XEXP (op, 0)) == MINUS
3333 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3334 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3335 return XEXP (op, 0);
3337 #ifdef POINTERS_EXTEND_UNSIGNED
3338 if (! POINTERS_EXTEND_UNSIGNED
3339 && mode == Pmode && GET_MODE (op) == ptr_mode
3341 return convert_memory_address (Pmode, op);
3345 #ifdef POINTERS_EXTEND_UNSIGNED
3347 if (POINTERS_EXTEND_UNSIGNED
3348 && mode == Pmode && GET_MODE (op) == ptr_mode
3350 return convert_memory_address (Pmode, op);
3362 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3363 and OP1. Return 0 if no simplification is possible.
3365 Don't use this for relational operations such as EQ or LT.
3366 Use simplify_relational_operation instead. */
3369 simplify_binary_operation (code, mode, op0, op1)
3371 enum machine_mode mode;
3374 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3376 int width = GET_MODE_BITSIZE (mode);
3379 /* Relational operations don't work here. We must know the mode
3380 of the operands in order to do the comparison correctly.
3381 Assuming a full word can give incorrect results.
3382 Consider comparing 128 with -128 in QImode. */
3384 if (GET_RTX_CLASS (code) == '<')
3387 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3388 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3389 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3390 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3392 REAL_VALUE_TYPE f0, f1, value;
3395 if (setjmp (handler))
3398 set_float_handler (handler);
3400 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3401 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3402 f0 = real_value_truncate (mode, f0);
3403 f1 = real_value_truncate (mode, f1);
3405 #ifdef REAL_ARITHMETIC
3406 #ifndef REAL_INFINITY
3407 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3410 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3424 #ifndef REAL_INFINITY
3431 value = MIN (f0, f1);
3434 value = MAX (f0, f1);
3441 value = real_value_truncate (mode, value);
3442 set_float_handler (NULL_PTR);
3443 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3445 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3447 /* We can fold some multi-word operations. */
3448 if (GET_MODE_CLASS (mode) == MODE_INT
3449 && width == HOST_BITS_PER_WIDE_INT * 2
3450 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3451 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3453 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3455 if (GET_CODE (op0) == CONST_DOUBLE)
3456 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3458 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3460 if (GET_CODE (op1) == CONST_DOUBLE)
3461 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3463 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3468 /* A - B == A + (-B). */
3469 neg_double (l2, h2, &lv, &hv);
3472 /* .. fall through ... */
3475 add_double (l1, h1, l2, h2, &lv, &hv);
3479 mul_double (l1, h1, l2, h2, &lv, &hv);
3482 case DIV: case MOD: case UDIV: case UMOD:
3483 /* We'd need to include tree.h to do this and it doesn't seem worth
3488 lv = l1 & l2, hv = h1 & h2;
3492 lv = l1 | l2, hv = h1 | h2;
3496 lv = l1 ^ l2, hv = h1 ^ h2;
3502 && ((unsigned HOST_WIDE_INT) l1
3503 < (unsigned HOST_WIDE_INT) l2)))
3512 && ((unsigned HOST_WIDE_INT) l1
3513 > (unsigned HOST_WIDE_INT) l2)))
3520 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3522 && ((unsigned HOST_WIDE_INT) l1
3523 < (unsigned HOST_WIDE_INT) l2)))
3530 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3532 && ((unsigned HOST_WIDE_INT) l1
3533 > (unsigned HOST_WIDE_INT) l2)))
3539 case LSHIFTRT: case ASHIFTRT:
3541 case ROTATE: case ROTATERT:
3542 #ifdef SHIFT_COUNT_TRUNCATED
3543 if (SHIFT_COUNT_TRUNCATED)
3544 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3547 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3550 if (code == LSHIFTRT || code == ASHIFTRT)
3551 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3553 else if (code == ASHIFT)
3554 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3555 else if (code == ROTATE)
3556 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3557 else /* code == ROTATERT */
3558 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3565 return immed_double_const (lv, hv, mode);
3568 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3569 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3571 /* Even if we can't compute a constant result,
3572 there are some cases worth simplifying. */
3577 /* In IEEE floating point, x+0 is not the same as x. Similarly
3578 for the other optimizations below. */
3579 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3580 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3583 if (op1 == CONST0_RTX (mode))
3586 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3587 if (GET_CODE (op0) == NEG)
3588 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3589 else if (GET_CODE (op1) == NEG)
3590 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3592 /* Handle both-operands-constant cases. We can only add
3593 CONST_INTs to constants since the sum of relocatable symbols
3594 can't be handled by most assemblers. Don't add CONST_INT
3595 to CONST_INT since overflow won't be computed properly if wider
3596 than HOST_BITS_PER_WIDE_INT. */
3598 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3599 && GET_CODE (op1) == CONST_INT)
3600 return plus_constant (op0, INTVAL (op1));
3601 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3602 && GET_CODE (op0) == CONST_INT)
3603 return plus_constant (op1, INTVAL (op0));
3605 /* See if this is something like X * C - X or vice versa or
3606 if the multiplication is written as a shift. If so, we can
3607 distribute and make a new multiply, shift, or maybe just
3608 have X (if C is 2 in the example above). But don't make
3609 real multiply if we didn't have one before. */
3611 if (! FLOAT_MODE_P (mode))
3613 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3614 rtx lhs = op0, rhs = op1;
3617 if (GET_CODE (lhs) == NEG)
3618 coeff0 = -1, lhs = XEXP (lhs, 0);
3619 else if (GET_CODE (lhs) == MULT
3620 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3622 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3625 else if (GET_CODE (lhs) == ASHIFT
3626 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3627 && INTVAL (XEXP (lhs, 1)) >= 0
3628 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3630 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3631 lhs = XEXP (lhs, 0);
3634 if (GET_CODE (rhs) == NEG)
3635 coeff1 = -1, rhs = XEXP (rhs, 0);
3636 else if (GET_CODE (rhs) == MULT
3637 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3639 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3642 else if (GET_CODE (rhs) == ASHIFT
3643 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3644 && INTVAL (XEXP (rhs, 1)) >= 0
3645 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3647 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3648 rhs = XEXP (rhs, 0);
3651 if (rtx_equal_p (lhs, rhs))
3653 tem = cse_gen_binary (MULT, mode, lhs,
3654 GEN_INT (coeff0 + coeff1));
3655 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3659 /* If one of the operands is a PLUS or a MINUS, see if we can
3660 simplify this by the associative law.
3661 Don't use the associative law for floating point.
3662 The inaccuracy makes it nonassociative,
3663 and subtle programs can break if operations are associated. */
3665 if (INTEGRAL_MODE_P (mode)
3666 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3667 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3668 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3674 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3675 using cc0, in which case we want to leave it as a COMPARE
3676 so we can distinguish it from a register-register-copy.
3678 In IEEE floating point, x-0 is not the same as x. */
3680 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3681 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3682 && op1 == CONST0_RTX (mode))
3685 /* Do nothing here. */
3690 /* None of these optimizations can be done for IEEE
3692 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3693 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3696 /* We can't assume x-x is 0 even with non-IEEE floating point,
3697 but since it is zero except in very strange circumstances, we
3698 will treat it as zero with -ffast-math. */
3699 if (rtx_equal_p (op0, op1)
3700 && ! side_effects_p (op0)
3701 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3702 return CONST0_RTX (mode);
3704 /* Change subtraction from zero into negation. */
3705 if (op0 == CONST0_RTX (mode))
3706 return gen_rtx_NEG (mode, op1);
3708 /* (-1 - a) is ~a. */
3709 if (op0 == constm1_rtx)
3710 return gen_rtx_NOT (mode, op1);
3712 /* Subtracting 0 has no effect. */
3713 if (op1 == CONST0_RTX (mode))
3716 /* See if this is something like X * C - X or vice versa or
3717 if the multiplication is written as a shift. If so, we can
3718 distribute and make a new multiply, shift, or maybe just
3719 have X (if C is 2 in the example above). But don't make
3720 real multiply if we didn't have one before. */
3722 if (! FLOAT_MODE_P (mode))
3724 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3725 rtx lhs = op0, rhs = op1;
3728 if (GET_CODE (lhs) == NEG)
3729 coeff0 = -1, lhs = XEXP (lhs, 0);
3730 else if (GET_CODE (lhs) == MULT
3731 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3733 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3736 else if (GET_CODE (lhs) == ASHIFT
3737 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3738 && INTVAL (XEXP (lhs, 1)) >= 0
3739 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3741 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3742 lhs = XEXP (lhs, 0);
3745 if (GET_CODE (rhs) == NEG)
3746 coeff1 = - 1, rhs = XEXP (rhs, 0);
3747 else if (GET_CODE (rhs) == MULT
3748 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3750 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3753 else if (GET_CODE (rhs) == ASHIFT
3754 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3755 && INTVAL (XEXP (rhs, 1)) >= 0
3756 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3758 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3759 rhs = XEXP (rhs, 0);
3762 if (rtx_equal_p (lhs, rhs))
3764 tem = cse_gen_binary (MULT, mode, lhs,
3765 GEN_INT (coeff0 - coeff1));
3766 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3770 /* (a - (-b)) -> (a + b). */
3771 if (GET_CODE (op1) == NEG)
3772 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3774 /* If one of the operands is a PLUS or a MINUS, see if we can
3775 simplify this by the associative law.
3776 Don't use the associative law for floating point.
3777 The inaccuracy makes it nonassociative,
3778 and subtle programs can break if operations are associated. */
3780 if (INTEGRAL_MODE_P (mode)
3781 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3782 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3783 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3786 /* Don't let a relocatable value get a negative coeff. */
3787 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3788 return plus_constant (op0, - INTVAL (op1));
3790 /* (x - (x & y)) -> (x & ~y) */
3791 if (GET_CODE (op1) == AND)
3793 if (rtx_equal_p (op0, XEXP (op1, 0)))
3794 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
3795 if (rtx_equal_p (op0, XEXP (op1, 1)))
3796 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
3801 if (op1 == constm1_rtx)
3803 tem = simplify_unary_operation (NEG, mode, op0, mode);
3805 return tem ? tem : gen_rtx_NEG (mode, op0);
3808 /* In IEEE floating point, x*0 is not always 0. */
3809 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3810 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3811 && op1 == CONST0_RTX (mode)
3812 && ! side_effects_p (op0))
3815 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3816 However, ANSI says we can drop signals,
3817 so we can do this anyway. */
3818 if (op1 == CONST1_RTX (mode))
3821 /* Convert multiply by constant power of two into shift unless
3822 we are still generating RTL. This test is a kludge. */
3823 if (GET_CODE (op1) == CONST_INT
3824 && (val = exact_log2 (INTVAL (op1))) >= 0
3825 /* If the mode is larger than the host word size, and the
3826 uppermost bit is set, then this isn't a power of two due
3827 to implicit sign extension. */
3828 && (width <= HOST_BITS_PER_WIDE_INT
3829 || val != HOST_BITS_PER_WIDE_INT - 1)
3830 && ! rtx_equal_function_value_matters)
3831 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
3833 if (GET_CODE (op1) == CONST_DOUBLE
3834 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3838 int op1is2, op1ism1;
3840 if (setjmp (handler))
3843 set_float_handler (handler);
3844 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3845 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3846 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3847 set_float_handler (NULL_PTR);
3849 /* x*2 is x+x and x*(-1) is -x */
3850 if (op1is2 && GET_MODE (op0) == mode)
3851 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
3853 else if (op1ism1 && GET_MODE (op0) == mode)
3854 return gen_rtx_NEG (mode, op0);
3859 if (op1 == const0_rtx)
3861 if (GET_CODE (op1) == CONST_INT
3862 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3864 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3866 /* A | (~A) -> -1 */
3867 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3868 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3869 && ! side_effects_p (op0)
3870 && GET_MODE_CLASS (mode) != MODE_CC)
3875 if (op1 == const0_rtx)
3877 if (GET_CODE (op1) == CONST_INT
3878 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3879 return gen_rtx_NOT (mode, op0);
3880 if (op0 == op1 && ! side_effects_p (op0)
3881 && GET_MODE_CLASS (mode) != MODE_CC)
3886 if (op1 == const0_rtx && ! side_effects_p (op0))
3888 if (GET_CODE (op1) == CONST_INT
3889 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3891 if (op0 == op1 && ! side_effects_p (op0)
3892 && GET_MODE_CLASS (mode) != MODE_CC)
3895 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3896 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3897 && ! side_effects_p (op0)
3898 && GET_MODE_CLASS (mode) != MODE_CC)
3903 /* Convert divide by power of two into shift (divide by 1 handled
3905 if (GET_CODE (op1) == CONST_INT
3906 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3907 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
3909 /* ... fall through ... */
3912 if (op1 == CONST1_RTX (mode))
3915 /* In IEEE floating point, 0/x is not always 0. */
3916 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3917 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3918 && op0 == CONST0_RTX (mode)
3919 && ! side_effects_p (op1))
3922 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3923 /* Change division by a constant into multiplication. Only do
3924 this with -ffast-math until an expert says it is safe in
3926 else if (GET_CODE (op1) == CONST_DOUBLE
3927 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3928 && op1 != CONST0_RTX (mode)
3932 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3934 if (! REAL_VALUES_EQUAL (d, dconst0))
3936 #if defined (REAL_ARITHMETIC)
3937 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
3938 return gen_rtx_MULT (mode, op0,
3939 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3941 return gen_rtx_MULT (mode, op0,
3942 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3950 /* Handle modulus by power of two (mod with 1 handled below). */
3951 if (GET_CODE (op1) == CONST_INT
3952 && exact_log2 (INTVAL (op1)) > 0)
3953 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
3955 /* ... fall through ... */
3958 if ((op0 == const0_rtx || op1 == const1_rtx)
3959 && ! side_effects_p (op0) && ! side_effects_p (op1))
3965 /* Rotating ~0 always results in ~0. */
3966 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
3967 && INTVAL (op0) == GET_MODE_MASK (mode)
3968 && ! side_effects_p (op1))
3971 /* ... fall through ... */
3976 if (op1 == const0_rtx)
3978 if (op0 == const0_rtx && ! side_effects_p (op1))
3983 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3984 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
3985 && ! side_effects_p (op0))
3987 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3992 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3994 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
3995 && ! side_effects_p (op0))
3997 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4002 if (op1 == const0_rtx && ! side_effects_p (op0))
4004 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4009 if (op1 == constm1_rtx && ! side_effects_p (op0))
4011 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4022 /* Get the integer argument values in two forms:
4023 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4025 arg0 = INTVAL (op0);
4026 arg1 = INTVAL (op1);
4028 if (width < HOST_BITS_PER_WIDE_INT)
4030 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4031 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4034 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4035 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4038 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4039 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4047 /* Compute the value of the arithmetic. */
4052 val = arg0s + arg1s;
4056 val = arg0s - arg1s;
4060 val = arg0s * arg1s;
4066 val = arg0s / arg1s;
4072 val = arg0s % arg1s;
4078 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4084 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4100 /* If shift count is undefined, don't fold it; let the machine do
4101 what it wants. But truncate it if the machine will do that. */
4105 #ifdef SHIFT_COUNT_TRUNCATED
4106 if (SHIFT_COUNT_TRUNCATED)
4110 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4117 #ifdef SHIFT_COUNT_TRUNCATED
4118 if (SHIFT_COUNT_TRUNCATED)
4122 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4129 #ifdef SHIFT_COUNT_TRUNCATED
4130 if (SHIFT_COUNT_TRUNCATED)
4134 val = arg0s >> arg1;
4136 /* Bootstrap compiler may not have sign extended the right shift.
4137 Manually extend the sign to insure bootstrap cc matches gcc. */
4138 if (arg0s < 0 && arg1 > 0)
4139 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4148 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4149 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4157 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4158 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4162 /* Do nothing here. */
4166 val = arg0s <= arg1s ? arg0s : arg1s;
4170 val = ((unsigned HOST_WIDE_INT) arg0
4171 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4175 val = arg0s > arg1s ? arg0s : arg1s;
4179 val = ((unsigned HOST_WIDE_INT) arg0
4180 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4187 /* Clear the bits that don't belong in our mode, unless they and our sign
4188 bit are all one. So we get either a reasonable negative value or a
4189 reasonable unsigned value for this mode. */
4190 if (width < HOST_BITS_PER_WIDE_INT
4191 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4192 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4193 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4195 /* If this would be an entire word for the target, but is not for
4196 the host, then sign-extend on the host so that the number will look
4197 the same way on the host that it would on the target.
4199 For example, when building a 64 bit alpha hosted 32 bit sparc
4200 targeted compiler, then we want the 32 bit unsigned value -1 to be
4201 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4202 The later confuses the sparc backend. */
4204 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4205 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4206 val |= ((HOST_WIDE_INT) (-1) << width);
4208 return GEN_INT (val);
4211 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4214 Rather than test for specific case, we do this by a brute-force method
4215 and do all possible simplifications until no more changes occur. Then
4216 we rebuild the operation. */
4219 simplify_plus_minus (code, mode, op0, op1)
4221 enum machine_mode mode;
4227 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4228 int first = 1, negate = 0, changed;
4231 bzero ((char *) ops, sizeof ops);
4233 /* Set up the two operands and then expand them until nothing has been
4234 changed. If we run out of room in our array, give up; this should
4235 almost never happen. */
4237 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4244 for (i = 0; i < n_ops; i++)
4245 switch (GET_CODE (ops[i]))
4252 ops[n_ops] = XEXP (ops[i], 1);
4253 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4254 ops[i] = XEXP (ops[i], 0);
4260 ops[i] = XEXP (ops[i], 0);
4261 negs[i] = ! negs[i];
4266 ops[i] = XEXP (ops[i], 0);
4272 /* ~a -> (-a - 1) */
4275 ops[n_ops] = constm1_rtx;
4276 negs[n_ops++] = negs[i];
4277 ops[i] = XEXP (ops[i], 0);
4278 negs[i] = ! negs[i];
4285 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4293 /* If we only have two operands, we can't do anything. */
4297 /* Now simplify each pair of operands until nothing changes. The first
4298 time through just simplify constants against each other. */
4305 for (i = 0; i < n_ops - 1; i++)
4306 for (j = i + 1; j < n_ops; j++)
4307 if (ops[i] != 0 && ops[j] != 0
4308 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4310 rtx lhs = ops[i], rhs = ops[j];
4311 enum rtx_code ncode = PLUS;
4313 if (negs[i] && ! negs[j])
4314 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4315 else if (! negs[i] && negs[j])
4318 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4321 ops[i] = tem, ops[j] = 0;
4322 negs[i] = negs[i] && negs[j];
4323 if (GET_CODE (tem) == NEG)
4324 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4326 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4327 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4335 /* Pack all the operands to the lower-numbered entries and give up if
4336 we didn't reduce the number of operands we had. Make sure we
4337 count a CONST as two operands. If we have the same number of
4338 operands, but have made more CONSTs than we had, this is also
4339 an improvement, so accept it. */
4341 for (i = 0, j = 0; j < n_ops; j++)
4344 ops[i] = ops[j], negs[i++] = negs[j];
4345 if (GET_CODE (ops[j]) == CONST)
4349 if (i + n_consts > input_ops
4350 || (i + n_consts == input_ops && n_consts <= input_consts))
4355 /* If we have a CONST_INT, put it last. */
4356 for (i = 0; i < n_ops - 1; i++)
4357 if (GET_CODE (ops[i]) == CONST_INT)
4359 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4360 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4363 /* Put a non-negated operand first. If there aren't any, make all
4364 operands positive and negate the whole thing later. */
4365 for (i = 0; i < n_ops && negs[i]; i++)
4370 for (i = 0; i < n_ops; i++)
4376 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4377 j = negs[0], negs[0] = negs[i], negs[i] = j;
4380 /* Now make the result by performing the requested operations. */
4382 for (i = 1; i < n_ops; i++)
4383 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4385 return negate ? gen_rtx_NEG (mode, result) : result;
4388 /* Make a binary operation by properly ordering the operands and
4389 seeing if the expression folds. */
4392 cse_gen_binary (code, mode, op0, op1)
4394 enum machine_mode mode;
4399 /* Put complex operands first and constants second if commutative. */
4400 if (GET_RTX_CLASS (code) == 'c'
4401 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4402 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4403 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4404 || (GET_CODE (op0) == SUBREG
4405 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4406 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4407 tem = op0, op0 = op1, op1 = tem;
4409 /* If this simplifies, do it. */
4410 tem = simplify_binary_operation (code, mode, op0, op1);
4415 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4416 just form the operation. */
4418 if (code == PLUS && GET_CODE (op1) == CONST_INT
4419 && GET_MODE (op0) != VOIDmode)
4420 return plus_constant (op0, INTVAL (op1));
4421 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4422 && GET_MODE (op0) != VOIDmode)
4423 return plus_constant (op0, - INTVAL (op1));
4425 return gen_rtx_fmt_ee (code, mode, op0, op1);
4428 /* Like simplify_binary_operation except used for relational operators.
4429 MODE is the mode of the operands, not that of the result. If MODE
4430 is VOIDmode, both operands must also be VOIDmode and we compare the
4431 operands in "infinite precision".
4433 If no simplification is possible, this function returns zero. Otherwise,
4434 it returns either const_true_rtx or const0_rtx. */
4437 simplify_relational_operation (code, mode, op0, op1)
4439 enum machine_mode mode;
4442 int equal, op0lt, op0ltu, op1lt, op1ltu;
4445 /* If op0 is a compare, extract the comparison arguments from it. */
4446 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4447 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4449 /* We can't simplify MODE_CC values since we don't know what the
4450 actual comparison is. */
4451 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4458 /* For integer comparisons of A and B maybe we can simplify A - B and can
4459 then simplify a comparison of that with zero. If A and B are both either
4460 a register or a CONST_INT, this can't help; testing for these cases will
4461 prevent infinite recursion here and speed things up.
4463 If CODE is an unsigned comparison, then we can never do this optimization,
4464 because it gives an incorrect result if the subtraction wraps around zero.
4465 ANSI C defines unsigned operations such that they never overflow, and
4466 thus such cases can not be ignored. */
4468 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4469 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4470 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4471 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4472 && code != GTU && code != GEU && code != LTU && code != LEU)
4473 return simplify_relational_operation (signed_condition (code),
4474 mode, tem, const0_rtx);
4476 /* For non-IEEE floating-point, if the two operands are equal, we know the
4478 if (rtx_equal_p (op0, op1)
4479 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4480 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4481 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4483 /* If the operands are floating-point constants, see if we can fold
4485 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4486 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4487 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4489 REAL_VALUE_TYPE d0, d1;
4492 if (setjmp (handler))
4495 set_float_handler (handler);
4496 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4497 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4498 equal = REAL_VALUES_EQUAL (d0, d1);
4499 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4500 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4501 set_float_handler (NULL_PTR);
4503 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4505 /* Otherwise, see if the operands are both integers. */
4506 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4507 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4508 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4510 int width = GET_MODE_BITSIZE (mode);
4511 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4512 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4514 /* Get the two words comprising each integer constant. */
4515 if (GET_CODE (op0) == CONST_DOUBLE)
4517 l0u = l0s = CONST_DOUBLE_LOW (op0);
4518 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4522 l0u = l0s = INTVAL (op0);
4523 h0u = h0s = l0s < 0 ? -1 : 0;
4526 if (GET_CODE (op1) == CONST_DOUBLE)
4528 l1u = l1s = CONST_DOUBLE_LOW (op1);
4529 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4533 l1u = l1s = INTVAL (op1);
4534 h1u = h1s = l1s < 0 ? -1 : 0;
4537 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4538 we have to sign or zero-extend the values. */
4539 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4540 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4542 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4544 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4545 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4547 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4548 l0s |= ((HOST_WIDE_INT) (-1) << width);
4550 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4551 l1s |= ((HOST_WIDE_INT) (-1) << width);
4554 equal = (h0u == h1u && l0u == l1u);
4555 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4556 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4557 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4558 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4561 /* Otherwise, there are some code-specific tests we can make. */
4567 /* References to the frame plus a constant or labels cannot
4568 be zero, but a SYMBOL_REF can due to #pragma weak. */
4569 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4570 || GET_CODE (op0) == LABEL_REF)
4571 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4572 /* On some machines, the ap reg can be 0 sometimes. */
4573 && op0 != arg_pointer_rtx
4580 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4581 || GET_CODE (op0) == LABEL_REF)
4582 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4583 && op0 != arg_pointer_rtx
4586 return const_true_rtx;
4590 /* Unsigned values are never negative. */
4591 if (op1 == const0_rtx)
4592 return const_true_rtx;
4596 if (op1 == const0_rtx)
4601 /* Unsigned values are never greater than the largest
4603 if (GET_CODE (op1) == CONST_INT
4604 && INTVAL (op1) == GET_MODE_MASK (mode)
4605 && INTEGRAL_MODE_P (mode))
4606 return const_true_rtx;
4610 if (GET_CODE (op1) == CONST_INT
4611 && INTVAL (op1) == GET_MODE_MASK (mode)
4612 && INTEGRAL_MODE_P (mode))
4623 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4628 return equal ? const_true_rtx : const0_rtx;
4630 return ! equal ? const_true_rtx : const0_rtx;
4632 return op0lt ? const_true_rtx : const0_rtx;
4634 return op1lt ? const_true_rtx : const0_rtx;
4636 return op0ltu ? const_true_rtx : const0_rtx;
4638 return op1ltu ? const_true_rtx : const0_rtx;
4640 return equal || op0lt ? const_true_rtx : const0_rtx;
4642 return equal || op1lt ? const_true_rtx : const0_rtx;
4644 return equal || op0ltu ? const_true_rtx : const0_rtx;
4646 return equal || op1ltu ? const_true_rtx : const0_rtx;
4652 /* Simplify CODE, an operation with result mode MODE and three operands,
4653 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4654 a constant. Return 0 if no simplifications is possible. */
4657 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4659 enum machine_mode mode, op0_mode;
4662 int width = GET_MODE_BITSIZE (mode);
4664 /* VOIDmode means "infinite" precision. */
4666 width = HOST_BITS_PER_WIDE_INT;
4672 if (GET_CODE (op0) == CONST_INT
4673 && GET_CODE (op1) == CONST_INT
4674 && GET_CODE (op2) == CONST_INT
4675 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4676 && width <= HOST_BITS_PER_WIDE_INT)
4678 /* Extracting a bit-field from a constant */
4679 HOST_WIDE_INT val = INTVAL (op0);
4681 if (BITS_BIG_ENDIAN)
4682 val >>= (GET_MODE_BITSIZE (op0_mode)
4683 - INTVAL (op2) - INTVAL (op1));
4685 val >>= INTVAL (op2);
4687 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4689 /* First zero-extend. */
4690 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4691 /* If desired, propagate sign bit. */
4692 if (code == SIGN_EXTRACT
4693 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4694 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4697 /* Clear the bits that don't belong in our mode,
4698 unless they and our sign bit are all one.
4699 So we get either a reasonable negative value or a reasonable
4700 unsigned value for this mode. */
4701 if (width < HOST_BITS_PER_WIDE_INT
4702 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4703 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4704 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4706 return GEN_INT (val);
4711 if (GET_CODE (op0) == CONST_INT)
4712 return op0 != const0_rtx ? op1 : op2;
4714 /* Convert a == b ? b : a to "a". */
4715 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4716 && rtx_equal_p (XEXP (op0, 0), op1)
4717 && rtx_equal_p (XEXP (op0, 1), op2))
4719 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4720 && rtx_equal_p (XEXP (op0, 1), op1)
4721 && rtx_equal_p (XEXP (op0, 0), op2))
4723 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4726 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4727 XEXP (op0, 0), XEXP (op0, 1));
4728 /* See if any simplifications were possible. */
4729 if (temp == const0_rtx)
4731 else if (temp == const1_rtx)
4743 /* If X is a nontrivial arithmetic operation on an argument
4744 for which a constant value can be determined, return
4745 the result of operating on that value, as a constant.
4746 Otherwise, return X, possibly with one or more operands
4747 modified by recursive calls to this function.
4749 If X is a register whose contents are known, we do NOT
4750 return those contents here. equiv_constant is called to
4753 INSN is the insn that we may be modifying. If it is 0, make a copy
4754 of X before modifying it. */
4761 register enum rtx_code code;
4762 register enum machine_mode mode;
4769 /* Folded equivalents of first two operands of X. */
4773 /* Constant equivalents of first three operands of X;
4774 0 when no such equivalent is known. */
4779 /* The mode of the first operand of X. We need this for sign and zero
4781 enum machine_mode mode_arg0;
4786 mode = GET_MODE (x);
4787 code = GET_CODE (x);
4796 /* No use simplifying an EXPR_LIST
4797 since they are used only for lists of args
4798 in a function call's REG_EQUAL note. */
4800 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4801 want to (e.g.,) make (addressof (const_int 0)) just because
4802 the location is known to be zero. */
4808 return prev_insn_cc0;
4812 /* If the next insn is a CODE_LABEL followed by a jump table,
4813 PC's value is a LABEL_REF pointing to that label. That
4814 lets us fold switch statements on the Vax. */
4815 if (insn && GET_CODE (insn) == JUMP_INSN)
4817 rtx next = next_nonnote_insn (insn);
4819 if (next && GET_CODE (next) == CODE_LABEL
4820 && NEXT_INSN (next) != 0
4821 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4822 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4823 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4824 return gen_rtx_LABEL_REF (Pmode, next);
4829 /* See if we previously assigned a constant value to this SUBREG. */
4830 if ((new = lookup_as_function (x, CONST_INT)) != 0
4831 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4834 /* If this is a paradoxical SUBREG, we have no idea what value the
4835 extra bits would have. However, if the operand is equivalent
4836 to a SUBREG whose operand is the same as our mode, and all the
4837 modes are within a word, we can just use the inner operand
4838 because these SUBREGs just say how to treat the register.
4840 Similarly if we find an integer constant. */
4842 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4844 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4845 struct table_elt *elt;
4847 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4848 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4849 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4851 for (elt = elt->first_same_value;
4852 elt; elt = elt->next_same_value)
4854 if (CONSTANT_P (elt->exp)
4855 && GET_MODE (elt->exp) == VOIDmode)
4858 if (GET_CODE (elt->exp) == SUBREG
4859 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4860 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4861 return copy_rtx (SUBREG_REG (elt->exp));
4867 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4868 We might be able to if the SUBREG is extracting a single word in an
4869 integral mode or extracting the low part. */
4871 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4872 const_arg0 = equiv_constant (folded_arg0);
4874 folded_arg0 = const_arg0;
4876 if (folded_arg0 != SUBREG_REG (x))
4880 if (GET_MODE_CLASS (mode) == MODE_INT
4881 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4882 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4883 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4884 GET_MODE (SUBREG_REG (x)));
4885 if (new == 0 && subreg_lowpart_p (x))
4886 new = gen_lowpart_if_possible (mode, folded_arg0);
4891 /* If this is a narrowing SUBREG and our operand is a REG, see if
4892 we can find an equivalence for REG that is an arithmetic operation
4893 in a wider mode where both operands are paradoxical SUBREGs
4894 from objects of our result mode. In that case, we couldn't report
4895 an equivalent value for that operation, since we don't know what the
4896 extra bits will be. But we can find an equivalence for this SUBREG
4897 by folding that operation is the narrow mode. This allows us to
4898 fold arithmetic in narrow modes when the machine only supports
4899 word-sized arithmetic.
4901 Also look for a case where we have a SUBREG whose operand is the
4902 same as our result. If both modes are smaller than a word, we
4903 are simply interpreting a register in different modes and we
4904 can use the inner value. */
4906 if (GET_CODE (folded_arg0) == REG
4907 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4908 && subreg_lowpart_p (x))
4910 struct table_elt *elt;
4912 /* We can use HASH here since we know that canon_hash won't be
4914 elt = lookup (folded_arg0,
4915 HASH (folded_arg0, GET_MODE (folded_arg0)),
4916 GET_MODE (folded_arg0));
4919 elt = elt->first_same_value;
4921 for (; elt; elt = elt->next_same_value)
4923 enum rtx_code eltcode = GET_CODE (elt->exp);
4925 /* Just check for unary and binary operations. */
4926 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4927 && GET_CODE (elt->exp) != SIGN_EXTEND
4928 && GET_CODE (elt->exp) != ZERO_EXTEND
4929 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4930 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4932 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4934 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4935 op0 = fold_rtx (op0, NULL_RTX);
4937 op0 = equiv_constant (op0);
4939 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4942 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4943 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4944 && eltcode != DIV && eltcode != MOD
4945 && eltcode != UDIV && eltcode != UMOD
4946 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4947 && eltcode != ROTATE && eltcode != ROTATERT
4948 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4949 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4951 || CONSTANT_P (XEXP (elt->exp, 0)))
4952 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4953 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4955 || CONSTANT_P (XEXP (elt->exp, 1))))
4957 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4958 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4960 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4961 op0 = fold_rtx (op0, NULL_RTX);
4964 op0 = equiv_constant (op0);
4966 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
4967 op1 = fold_rtx (op1, NULL_RTX);
4970 op1 = equiv_constant (op1);
4972 /* If we are looking for the low SImode part of
4973 (ashift:DI c (const_int 32)), it doesn't work
4974 to compute that in SImode, because a 32-bit shift
4975 in SImode is unpredictable. We know the value is 0. */
4977 && GET_CODE (elt->exp) == ASHIFT
4978 && GET_CODE (op1) == CONST_INT
4979 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
4981 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
4983 /* If the count fits in the inner mode's width,
4984 but exceeds the outer mode's width,
4985 the value will get truncated to 0
4989 /* If the count exceeds even the inner mode's width,
4990 don't fold this expression. */
4993 else if (op0 && op1)
4994 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
4998 else if (GET_CODE (elt->exp) == SUBREG
4999 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5000 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5002 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5003 new = copy_rtx (SUBREG_REG (elt->exp));
5014 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5015 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5016 new = lookup_as_function (XEXP (x, 0), code);
5018 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5022 /* If we are not actually processing an insn, don't try to find the
5023 best address. Not only don't we care, but we could modify the
5024 MEM in an invalid way since we have no insn to validate against. */
5026 find_best_addr (insn, &XEXP (x, 0));
5029 /* Even if we don't fold in the insn itself,
5030 we can safely do so here, in hopes of getting a constant. */
5031 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5033 HOST_WIDE_INT offset = 0;
5035 if (GET_CODE (addr) == REG
5036 && REGNO_QTY_VALID_P (REGNO (addr))
5037 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
5038 && qty_const[reg_qty[REGNO (addr)]] != 0)
5039 addr = qty_const[reg_qty[REGNO (addr)]];
5041 /* If address is constant, split it into a base and integer offset. */
5042 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5044 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5045 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5047 base = XEXP (XEXP (addr, 0), 0);
5048 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5050 else if (GET_CODE (addr) == LO_SUM
5051 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5052 base = XEXP (addr, 1);
5053 else if (GET_CODE (addr) == ADDRESSOF)
5054 return change_address (x, VOIDmode, addr);
5056 /* If this is a constant pool reference, we can fold it into its
5057 constant to allow better value tracking. */
5058 if (base && GET_CODE (base) == SYMBOL_REF
5059 && CONSTANT_POOL_ADDRESS_P (base))
5061 rtx constant = get_pool_constant (base);
5062 enum machine_mode const_mode = get_pool_mode (base);
5065 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5066 constant_pool_entries_cost = COST (constant);
5068 /* If we are loading the full constant, we have an equivalence. */
5069 if (offset == 0 && mode == const_mode)
5072 /* If this actually isn't a constant (weird!), we can't do
5073 anything. Otherwise, handle the two most common cases:
5074 extracting a word from a multi-word constant, and extracting
5075 the low-order bits. Other cases don't seem common enough to
5077 if (! CONSTANT_P (constant))
5080 if (GET_MODE_CLASS (mode) == MODE_INT
5081 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5082 && offset % UNITS_PER_WORD == 0
5083 && (new = operand_subword (constant,
5084 offset / UNITS_PER_WORD,
5085 0, const_mode)) != 0)
5088 if (((BYTES_BIG_ENDIAN
5089 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5090 || (! BYTES_BIG_ENDIAN && offset == 0))
5091 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5095 /* If this is a reference to a label at a known position in a jump
5096 table, we also know its value. */
5097 if (base && GET_CODE (base) == LABEL_REF)
5099 rtx label = XEXP (base, 0);
5100 rtx table_insn = NEXT_INSN (label);
5102 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5103 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5105 rtx table = PATTERN (table_insn);
5108 && (offset / GET_MODE_SIZE (GET_MODE (table))
5109 < XVECLEN (table, 0)))
5110 return XVECEXP (table, 0,
5111 offset / GET_MODE_SIZE (GET_MODE (table)));
5113 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5114 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5116 rtx table = PATTERN (table_insn);
5119 && (offset / GET_MODE_SIZE (GET_MODE (table))
5120 < XVECLEN (table, 1)))
5122 offset /= GET_MODE_SIZE (GET_MODE (table));
5123 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5126 if (GET_MODE (table) != Pmode)
5127 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5129 /* Indicate this is a constant. This isn't a
5130 valid form of CONST, but it will only be used
5131 to fold the next insns and then discarded, so
5132 it should be safe. */
5133 return gen_rtx_CONST (GET_MODE (new), new);
5142 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5143 validate_change (insn, &XVECEXP (x, 3, i),
5144 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5154 mode_arg0 = VOIDmode;
5156 /* Try folding our operands.
5157 Then see which ones have constant values known. */
5159 fmt = GET_RTX_FORMAT (code);
5160 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5163 rtx arg = XEXP (x, i);
5164 rtx folded_arg = arg, const_arg = 0;
5165 enum machine_mode mode_arg = GET_MODE (arg);
5166 rtx cheap_arg, expensive_arg;
5167 rtx replacements[2];
5170 /* Most arguments are cheap, so handle them specially. */
5171 switch (GET_CODE (arg))
5174 /* This is the same as calling equiv_constant; it is duplicated
5176 if (REGNO_QTY_VALID_P (REGNO (arg))
5177 && qty_const[reg_qty[REGNO (arg)]] != 0
5178 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5179 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5181 = gen_lowpart_if_possible (GET_MODE (arg),
5182 qty_const[reg_qty[REGNO (arg)]]);
5195 folded_arg = prev_insn_cc0;
5196 mode_arg = prev_insn_cc0_mode;
5197 const_arg = equiv_constant (folded_arg);
5202 folded_arg = fold_rtx (arg, insn);
5203 const_arg = equiv_constant (folded_arg);
5206 /* For the first three operands, see if the operand
5207 is constant or equivalent to a constant. */
5211 folded_arg0 = folded_arg;
5212 const_arg0 = const_arg;
5213 mode_arg0 = mode_arg;
5216 folded_arg1 = folded_arg;
5217 const_arg1 = const_arg;
5220 const_arg2 = const_arg;
5224 /* Pick the least expensive of the folded argument and an
5225 equivalent constant argument. */
5226 if (const_arg == 0 || const_arg == folded_arg
5227 || COST (const_arg) > COST (folded_arg))
5228 cheap_arg = folded_arg, expensive_arg = const_arg;
5230 cheap_arg = const_arg, expensive_arg = folded_arg;
5232 /* Try to replace the operand with the cheapest of the two
5233 possibilities. If it doesn't work and this is either of the first
5234 two operands of a commutative operation, try swapping them.
5235 If THAT fails, try the more expensive, provided it is cheaper
5236 than what is already there. */
5238 if (cheap_arg == XEXP (x, i))
5241 if (insn == 0 && ! copied)
5247 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5249 j < 2 && replacements[j]
5250 && COST (replacements[j]) < COST (XEXP (x, i));
5253 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5256 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5258 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5259 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5261 if (apply_change_group ())
5263 /* Swap them back to be invalid so that this loop can
5264 continue and flag them to be swapped back later. */
5267 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5279 /* Don't try to fold inside of a vector of expressions.
5280 Doing nothing is harmless. */
5284 /* If a commutative operation, place a constant integer as the second
5285 operand unless the first operand is also a constant integer. Otherwise,
5286 place any constant second unless the first operand is also a constant. */
5288 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5290 if (must_swap || (const_arg0
5292 || (GET_CODE (const_arg0) == CONST_INT
5293 && GET_CODE (const_arg1) != CONST_INT))))
5295 register rtx tem = XEXP (x, 0);
5297 if (insn == 0 && ! copied)
5303 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5304 validate_change (insn, &XEXP (x, 1), tem, 1);
5305 if (apply_change_group ())
5307 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5308 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5313 /* If X is an arithmetic operation, see if we can simplify it. */
5315 switch (GET_RTX_CLASS (code))
5321 /* We can't simplify extension ops unless we know the
5323 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5324 && mode_arg0 == VOIDmode)
5327 /* If we had a CONST, strip it off and put it back later if we
5329 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5330 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5332 new = simplify_unary_operation (code, mode,
5333 const_arg0 ? const_arg0 : folded_arg0,
5335 if (new != 0 && is_const)
5336 new = gen_rtx_CONST (mode, new);
5341 /* See what items are actually being compared and set FOLDED_ARG[01]
5342 to those values and CODE to the actual comparison code. If any are
5343 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5344 do anything if both operands are already known to be constant. */
5346 if (const_arg0 == 0 || const_arg1 == 0)
5348 struct table_elt *p0, *p1;
5349 rtx true = const_true_rtx, false = const0_rtx;
5350 enum machine_mode mode_arg1;
5352 #ifdef FLOAT_STORE_FLAG_VALUE
5353 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5355 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5357 false = CONST0_RTX (mode);
5361 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5362 &mode_arg0, &mode_arg1);
5363 const_arg0 = equiv_constant (folded_arg0);
5364 const_arg1 = equiv_constant (folded_arg1);
5366 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5367 what kinds of things are being compared, so we can't do
5368 anything with this comparison. */
5370 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5373 /* If we do not now have two constants being compared, see
5374 if we can nevertheless deduce some things about the
5376 if (const_arg0 == 0 || const_arg1 == 0)
5378 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5379 non-explicit constant? These aren't zero, but we
5380 don't know their sign. */
5381 if (const_arg1 == const0_rtx
5382 && (NONZERO_BASE_PLUS_P (folded_arg0)
5383 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5385 || GET_CODE (folded_arg0) == SYMBOL_REF
5387 || GET_CODE (folded_arg0) == LABEL_REF
5388 || GET_CODE (folded_arg0) == CONST))
5392 else if (code == NE)
5396 /* See if the two operands are the same. We don't do this
5397 for IEEE floating-point since we can't assume x == x
5398 since x might be a NaN. */
5400 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5401 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5402 && (folded_arg0 == folded_arg1
5403 || (GET_CODE (folded_arg0) == REG
5404 && GET_CODE (folded_arg1) == REG
5405 && (reg_qty[REGNO (folded_arg0)]
5406 == reg_qty[REGNO (folded_arg1)]))
5407 || ((p0 = lookup (folded_arg0,
5408 (safe_hash (folded_arg0, mode_arg0)
5409 % NBUCKETS), mode_arg0))
5410 && (p1 = lookup (folded_arg1,
5411 (safe_hash (folded_arg1, mode_arg0)
5412 % NBUCKETS), mode_arg0))
5413 && p0->first_same_value == p1->first_same_value)))
5414 return ((code == EQ || code == LE || code == GE
5415 || code == LEU || code == GEU)
5418 /* If FOLDED_ARG0 is a register, see if the comparison we are
5419 doing now is either the same as we did before or the reverse
5420 (we only check the reverse if not floating-point). */
5421 else if (GET_CODE (folded_arg0) == REG)
5423 int qty = reg_qty[REGNO (folded_arg0)];
5425 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5426 && (comparison_dominates_p (qty_comparison_code[qty], code)
5427 || (comparison_dominates_p (qty_comparison_code[qty],
5428 reverse_condition (code))
5429 && ! FLOAT_MODE_P (mode_arg0)))
5430 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5432 && rtx_equal_p (qty_comparison_const[qty],
5434 || (GET_CODE (folded_arg1) == REG
5435 && (reg_qty[REGNO (folded_arg1)]
5436 == qty_comparison_qty[qty]))))
5437 return (comparison_dominates_p (qty_comparison_code[qty],
5444 /* If we are comparing against zero, see if the first operand is
5445 equivalent to an IOR with a constant. If so, we may be able to
5446 determine the result of this comparison. */
5448 if (const_arg1 == const0_rtx)
5450 rtx y = lookup_as_function (folded_arg0, IOR);
5454 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5455 && GET_CODE (inner_const) == CONST_INT
5456 && INTVAL (inner_const) != 0)
5458 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5459 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5460 && (INTVAL (inner_const)
5461 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5462 rtx true = const_true_rtx, false = const0_rtx;
5464 #ifdef FLOAT_STORE_FLAG_VALUE
5465 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5467 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5469 false = CONST0_RTX (mode);
5493 new = simplify_relational_operation (code, mode_arg0,
5494 const_arg0 ? const_arg0 : folded_arg0,
5495 const_arg1 ? const_arg1 : folded_arg1);
5496 #ifdef FLOAT_STORE_FLAG_VALUE
5497 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5498 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5499 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5508 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5509 with that LABEL_REF as its second operand. If so, the result is
5510 the first operand of that MINUS. This handles switches with an
5511 ADDR_DIFF_VEC table. */
5512 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5515 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5516 : lookup_as_function (folded_arg0, MINUS);
5518 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5519 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5522 /* Now try for a CONST of a MINUS like the above. */
5523 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5524 : lookup_as_function (folded_arg0, CONST))) != 0
5525 && GET_CODE (XEXP (y, 0)) == MINUS
5526 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5527 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5528 return XEXP (XEXP (y, 0), 0);
5531 /* Likewise if the operands are in the other order. */
5532 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5535 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5536 : lookup_as_function (folded_arg1, MINUS);
5538 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5539 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5542 /* Now try for a CONST of a MINUS like the above. */
5543 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5544 : lookup_as_function (folded_arg1, CONST))) != 0
5545 && GET_CODE (XEXP (y, 0)) == MINUS
5546 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5547 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5548 return XEXP (XEXP (y, 0), 0);
5551 /* If second operand is a register equivalent to a negative
5552 CONST_INT, see if we can find a register equivalent to the
5553 positive constant. Make a MINUS if so. Don't do this for
5554 a non-negative constant since we might then alternate between
5555 chosing positive and negative constants. Having the positive
5556 constant previously-used is the more common case. Be sure
5557 the resulting constant is non-negative; if const_arg1 were
5558 the smallest negative number this would overflow: depending
5559 on the mode, this would either just be the same value (and
5560 hence not save anything) or be incorrect. */
5561 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5562 && INTVAL (const_arg1) < 0
5563 && - INTVAL (const_arg1) >= 0
5564 && GET_CODE (folded_arg1) == REG)
5566 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5568 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5572 for (p = p->first_same_value; p; p = p->next_same_value)
5573 if (GET_CODE (p->exp) == REG)
5574 return cse_gen_binary (MINUS, mode, folded_arg0,
5575 canon_reg (p->exp, NULL_RTX));
5580 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5581 If so, produce (PLUS Z C2-C). */
5582 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5584 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5585 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5586 return fold_rtx (plus_constant (copy_rtx (y),
5587 -INTVAL (const_arg1)),
5591 /* ... fall through ... */
5594 case SMIN: case SMAX: case UMIN: case UMAX:
5595 case IOR: case AND: case XOR:
5596 case MULT: case DIV: case UDIV:
5597 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5598 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5599 is known to be of similar form, we may be able to replace the
5600 operation with a combined operation. This may eliminate the
5601 intermediate operation if every use is simplified in this way.
5602 Note that the similar optimization done by combine.c only works
5603 if the intermediate operation's result has only one reference. */
5605 if (GET_CODE (folded_arg0) == REG
5606 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5609 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5610 rtx y = lookup_as_function (folded_arg0, code);
5612 enum rtx_code associate_code;
5616 || 0 == (inner_const
5617 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5618 || GET_CODE (inner_const) != CONST_INT
5619 /* If we have compiled a statement like
5620 "if (x == (x & mask1))", and now are looking at
5621 "x & mask2", we will have a case where the first operand
5622 of Y is the same as our first operand. Unless we detect
5623 this case, an infinite loop will result. */
5624 || XEXP (y, 0) == folded_arg0)
5627 /* Don't associate these operations if they are a PLUS with the
5628 same constant and it is a power of two. These might be doable
5629 with a pre- or post-increment. Similarly for two subtracts of
5630 identical powers of two with post decrement. */
5632 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5634 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5635 || exact_log2 (INTVAL (const_arg1)) >= 0
5637 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5638 || exact_log2 (- INTVAL (const_arg1)) >= 0
5643 /* Compute the code used to compose the constants. For example,
5644 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5647 = (code == MULT || code == DIV || code == UDIV ? MULT
5648 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5650 new_const = simplify_binary_operation (associate_code, mode,
5651 const_arg1, inner_const);
5656 /* If we are associating shift operations, don't let this
5657 produce a shift of the size of the object or larger.
5658 This could occur when we follow a sign-extend by a right
5659 shift on a machine that does a sign-extend as a pair
5662 if (is_shift && GET_CODE (new_const) == CONST_INT
5663 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5665 /* As an exception, we can turn an ASHIFTRT of this
5666 form into a shift of the number of bits - 1. */
5667 if (code == ASHIFTRT)
5668 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5673 y = copy_rtx (XEXP (y, 0));
5675 /* If Y contains our first operand (the most common way this
5676 can happen is if Y is a MEM), we would do into an infinite
5677 loop if we tried to fold it. So don't in that case. */
5679 if (! reg_mentioned_p (folded_arg0, y))
5680 y = fold_rtx (y, insn);
5682 return cse_gen_binary (code, mode, y, new_const);
5690 new = simplify_binary_operation (code, mode,
5691 const_arg0 ? const_arg0 : folded_arg0,
5692 const_arg1 ? const_arg1 : folded_arg1);
5696 /* (lo_sum (high X) X) is simply X. */
5697 if (code == LO_SUM && const_arg0 != 0
5698 && GET_CODE (const_arg0) == HIGH
5699 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5705 new = simplify_ternary_operation (code, mode, mode_arg0,
5706 const_arg0 ? const_arg0 : folded_arg0,
5707 const_arg1 ? const_arg1 : folded_arg1,
5708 const_arg2 ? const_arg2 : XEXP (x, 2));
5712 return new ? new : x;
5715 /* Return a constant value currently equivalent to X.
5716 Return 0 if we don't know one. */
5722 if (GET_CODE (x) == REG
5723 && REGNO_QTY_VALID_P (REGNO (x))
5724 && qty_const[reg_qty[REGNO (x)]])
5725 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5727 if (x != 0 && CONSTANT_P (x))
5730 /* If X is a MEM, try to fold it outside the context of any insn to see if
5731 it might be equivalent to a constant. That handles the case where it
5732 is a constant-pool reference. Then try to look it up in the hash table
5733 in case it is something whose value we have seen before. */
5735 if (GET_CODE (x) == MEM)
5737 struct table_elt *elt;
5739 x = fold_rtx (x, NULL_RTX);
5743 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5747 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5748 if (elt->is_const && CONSTANT_P (elt->exp))
5755 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5756 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5757 least-significant part of X.
5758 MODE specifies how big a part of X to return.
5760 If the requested operation cannot be done, 0 is returned.
5762 This is similar to gen_lowpart in emit-rtl.c. */
5765 gen_lowpart_if_possible (mode, x)
5766 enum machine_mode mode;
5769 rtx result = gen_lowpart_common (mode, x);
5773 else if (GET_CODE (x) == MEM)
5775 /* This is the only other case we handle. */
5776 register int offset = 0;
5779 if (WORDS_BIG_ENDIAN)
5780 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5781 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5782 if (BYTES_BIG_ENDIAN)
5783 /* Adjust the address so that the address-after-the-data is
5785 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5786 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5787 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
5788 if (! memory_address_p (mode, XEXP (new, 0)))
5790 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5791 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5792 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5799 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5800 branch. It will be zero if not.
5802 In certain cases, this can cause us to add an equivalence. For example,
5803 if we are following the taken case of
5805 we can add the fact that `i' and '2' are now equivalent.
5807 In any case, we can record that this comparison was passed. If the same
5808 comparison is seen later, we will know its value. */
5811 record_jump_equiv (insn, taken)
5815 int cond_known_true;
5817 enum machine_mode mode, mode0, mode1;
5818 int reversed_nonequality = 0;
5821 /* Ensure this is the right kind of insn. */
5822 if (! condjump_p (insn) || simplejump_p (insn))
5825 /* See if this jump condition is known true or false. */
5827 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5829 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5831 /* Get the type of comparison being done and the operands being compared.
5832 If we had to reverse a non-equality condition, record that fact so we
5833 know that it isn't valid for floating-point. */
5834 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5835 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5836 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5838 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5839 if (! cond_known_true)
5841 reversed_nonequality = (code != EQ && code != NE);
5842 code = reverse_condition (code);
5845 /* The mode is the mode of the non-constant. */
5847 if (mode1 != VOIDmode)
5850 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5853 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5854 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5855 Make any useful entries we can with that information. Called from
5856 above function and called recursively. */
5859 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5861 enum machine_mode mode;
5863 int reversed_nonequality;
5865 unsigned op0_hash, op1_hash;
5866 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5867 struct table_elt *op0_elt, *op1_elt;
5869 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5870 we know that they are also equal in the smaller mode (this is also
5871 true for all smaller modes whether or not there is a SUBREG, but
5872 is not worth testing for with no SUBREG. */
5874 /* Note that GET_MODE (op0) may not equal MODE. */
5875 if (code == EQ && GET_CODE (op0) == SUBREG
5876 && (GET_MODE_SIZE (GET_MODE (op0))
5877 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5879 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5880 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5882 record_jump_cond (code, mode, SUBREG_REG (op0),
5883 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5884 reversed_nonequality);
5887 if (code == EQ && GET_CODE (op1) == SUBREG
5888 && (GET_MODE_SIZE (GET_MODE (op1))
5889 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5891 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5892 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5894 record_jump_cond (code, mode, SUBREG_REG (op1),
5895 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5896 reversed_nonequality);
5899 /* Similarly, if this is an NE comparison, and either is a SUBREG
5900 making a smaller mode, we know the whole thing is also NE. */
5902 /* Note that GET_MODE (op0) may not equal MODE;
5903 if we test MODE instead, we can get an infinite recursion
5904 alternating between two modes each wider than MODE. */
5906 if (code == NE && GET_CODE (op0) == SUBREG
5907 && subreg_lowpart_p (op0)
5908 && (GET_MODE_SIZE (GET_MODE (op0))
5909 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5911 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5912 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5914 record_jump_cond (code, mode, SUBREG_REG (op0),
5915 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5916 reversed_nonequality);
5919 if (code == NE && GET_CODE (op1) == SUBREG
5920 && subreg_lowpart_p (op1)
5921 && (GET_MODE_SIZE (GET_MODE (op1))
5922 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5924 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5925 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5927 record_jump_cond (code, mode, SUBREG_REG (op1),
5928 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5929 reversed_nonequality);
5932 /* Hash both operands. */
5935 hash_arg_in_memory = 0;
5936 hash_arg_in_struct = 0;
5937 op0_hash = HASH (op0, mode);
5938 op0_in_memory = hash_arg_in_memory;
5939 op0_in_struct = hash_arg_in_struct;
5945 hash_arg_in_memory = 0;
5946 hash_arg_in_struct = 0;
5947 op1_hash = HASH (op1, mode);
5948 op1_in_memory = hash_arg_in_memory;
5949 op1_in_struct = hash_arg_in_struct;
5954 /* Look up both operands. */
5955 op0_elt = lookup (op0, op0_hash, mode);
5956 op1_elt = lookup (op1, op1_hash, mode);
5958 /* If both operands are already equivalent or if they are not in the
5959 table but are identical, do nothing. */
5960 if ((op0_elt != 0 && op1_elt != 0
5961 && op0_elt->first_same_value == op1_elt->first_same_value)
5962 || op0 == op1 || rtx_equal_p (op0, op1))
5965 /* If we aren't setting two things equal all we can do is save this
5966 comparison. Similarly if this is floating-point. In the latter
5967 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5968 If we record the equality, we might inadvertently delete code
5969 whose intent was to change -0 to +0. */
5971 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
5973 /* If we reversed a floating-point comparison, if OP0 is not a
5974 register, or if OP1 is neither a register or constant, we can't
5977 if (GET_CODE (op1) != REG)
5978 op1 = equiv_constant (op1);
5980 if ((reversed_nonequality && FLOAT_MODE_P (mode))
5981 || GET_CODE (op0) != REG || op1 == 0)
5984 /* Put OP0 in the hash table if it isn't already. This gives it a
5985 new quantity number. */
5988 if (insert_regs (op0, NULL_PTR, 0))
5990 rehash_using_reg (op0);
5991 op0_hash = HASH (op0, mode);
5993 /* If OP0 is contained in OP1, this changes its hash code
5994 as well. Faster to rehash than to check, except
5995 for the simple case of a constant. */
5996 if (! CONSTANT_P (op1))
5997 op1_hash = HASH (op1,mode);
6000 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6001 op0_elt->in_memory = op0_in_memory;
6002 op0_elt->in_struct = op0_in_struct;
6005 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
6006 if (GET_CODE (op1) == REG)
6008 /* Look it up again--in case op0 and op1 are the same. */
6009 op1_elt = lookup (op1, op1_hash, mode);
6011 /* Put OP1 in the hash table so it gets a new quantity number. */
6014 if (insert_regs (op1, NULL_PTR, 0))
6016 rehash_using_reg (op1);
6017 op1_hash = HASH (op1, mode);
6020 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6021 op1_elt->in_memory = op1_in_memory;
6022 op1_elt->in_struct = op1_in_struct;
6025 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
6026 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
6030 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
6031 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
6037 /* If either side is still missing an equivalence, make it now,
6038 then merge the equivalences. */
6042 if (insert_regs (op0, NULL_PTR, 0))
6044 rehash_using_reg (op0);
6045 op0_hash = HASH (op0, mode);
6048 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6049 op0_elt->in_memory = op0_in_memory;
6050 op0_elt->in_struct = op0_in_struct;
6055 if (insert_regs (op1, NULL_PTR, 0))
6057 rehash_using_reg (op1);
6058 op1_hash = HASH (op1, mode);
6061 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6062 op1_elt->in_memory = op1_in_memory;
6063 op1_elt->in_struct = op1_in_struct;
6066 merge_equiv_classes (op0_elt, op1_elt);
6067 last_jump_equiv_class = op0_elt;
6070 /* CSE processing for one instruction.
6071 First simplify sources and addresses of all assignments
6072 in the instruction, using previously-computed equivalents values.
6073 Then install the new sources and destinations in the table
6074 of available values.
6076 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6079 /* Data on one SET contained in the instruction. */
6083 /* The SET rtx itself. */
6085 /* The SET_SRC of the rtx (the original value, if it is changing). */
6087 /* The hash-table element for the SET_SRC of the SET. */
6088 struct table_elt *src_elt;
6089 /* Hash value for the SET_SRC. */
6091 /* Hash value for the SET_DEST. */
6093 /* The SET_DEST, with SUBREG, etc., stripped. */
6095 /* Place where the pointer to the INNER_DEST was found. */
6096 rtx *inner_dest_loc;
6097 /* Nonzero if the SET_SRC is in memory. */
6099 /* Nonzero if the SET_SRC is in a structure. */
6101 /* Nonzero if the SET_SRC contains something
6102 whose value cannot be predicted and understood. */
6104 /* Original machine mode, in case it becomes a CONST_INT. */
6105 enum machine_mode mode;
6106 /* A constant equivalent for SET_SRC, if any. */
6108 /* Hash value of constant equivalent for SET_SRC. */
6109 unsigned src_const_hash;
6110 /* Table entry for constant equivalent for SET_SRC, if any. */
6111 struct table_elt *src_const_elt;
6115 cse_insn (insn, in_libcall_block)
6117 int in_libcall_block;
6119 register rtx x = PATTERN (insn);
6122 register int n_sets = 0;
6125 /* Records what this insn does to set CC0. */
6126 rtx this_insn_cc0 = 0;
6127 enum machine_mode this_insn_cc0_mode = VOIDmode;
6131 struct table_elt *src_eqv_elt = 0;
6132 int src_eqv_volatile;
6133 int src_eqv_in_memory;
6134 int src_eqv_in_struct;
6135 unsigned src_eqv_hash;
6141 /* Find all the SETs and CLOBBERs in this instruction.
6142 Record all the SETs in the array `set' and count them.
6143 Also determine whether there is a CLOBBER that invalidates
6144 all memory references, or all references at varying addresses. */
6146 if (GET_CODE (insn) == CALL_INSN)
6148 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6149 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6150 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6153 if (GET_CODE (x) == SET)
6155 sets = (struct set *) alloca (sizeof (struct set));
6158 /* Ignore SETs that are unconditional jumps.
6159 They never need cse processing, so this does not hurt.
6160 The reason is not efficiency but rather
6161 so that we can test at the end for instructions
6162 that have been simplified to unconditional jumps
6163 and not be misled by unchanged instructions
6164 that were unconditional jumps to begin with. */
6165 if (SET_DEST (x) == pc_rtx
6166 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6169 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6170 The hard function value register is used only once, to copy to
6171 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6172 Ensure we invalidate the destination register. On the 80386 no
6173 other code would invalidate it since it is a fixed_reg.
6174 We need not check the return of apply_change_group; see canon_reg. */
6176 else if (GET_CODE (SET_SRC (x)) == CALL)
6178 canon_reg (SET_SRC (x), insn);
6179 apply_change_group ();
6180 fold_rtx (SET_SRC (x), insn);
6181 invalidate (SET_DEST (x), VOIDmode);
6186 else if (GET_CODE (x) == PARALLEL)
6188 register int lim = XVECLEN (x, 0);
6190 sets = (struct set *) alloca (lim * sizeof (struct set));
6192 /* Find all regs explicitly clobbered in this insn,
6193 and ensure they are not replaced with any other regs
6194 elsewhere in this insn.
6195 When a reg that is clobbered is also used for input,
6196 we should presume that that is for a reason,
6197 and we should not substitute some other register
6198 which is not supposed to be clobbered.
6199 Therefore, this loop cannot be merged into the one below
6200 because a CALL may precede a CLOBBER and refer to the
6201 value clobbered. We must not let a canonicalization do
6202 anything in that case. */
6203 for (i = 0; i < lim; i++)
6205 register rtx y = XVECEXP (x, 0, i);
6206 if (GET_CODE (y) == CLOBBER)
6208 rtx clobbered = XEXP (y, 0);
6210 if (GET_CODE (clobbered) == REG
6211 || GET_CODE (clobbered) == SUBREG)
6212 invalidate (clobbered, VOIDmode);
6213 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6214 || GET_CODE (clobbered) == ZERO_EXTRACT)
6215 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6219 for (i = 0; i < lim; i++)
6221 register rtx y = XVECEXP (x, 0, i);
6222 if (GET_CODE (y) == SET)
6224 /* As above, we ignore unconditional jumps and call-insns and
6225 ignore the result of apply_change_group. */
6226 if (GET_CODE (SET_SRC (y)) == CALL)
6228 canon_reg (SET_SRC (y), insn);
6229 apply_change_group ();
6230 fold_rtx (SET_SRC (y), insn);
6231 invalidate (SET_DEST (y), VOIDmode);
6233 else if (SET_DEST (y) == pc_rtx
6234 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6237 sets[n_sets++].rtl = y;
6239 else if (GET_CODE (y) == CLOBBER)
6241 /* If we clobber memory, canon the address.
6242 This does nothing when a register is clobbered
6243 because we have already invalidated the reg. */
6244 if (GET_CODE (XEXP (y, 0)) == MEM)
6245 canon_reg (XEXP (y, 0), NULL_RTX);
6247 else if (GET_CODE (y) == USE
6248 && ! (GET_CODE (XEXP (y, 0)) == REG
6249 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6250 canon_reg (y, NULL_RTX);
6251 else if (GET_CODE (y) == CALL)
6253 /* The result of apply_change_group can be ignored; see
6255 canon_reg (y, insn);
6256 apply_change_group ();
6261 else if (GET_CODE (x) == CLOBBER)
6263 if (GET_CODE (XEXP (x, 0)) == MEM)
6264 canon_reg (XEXP (x, 0), NULL_RTX);
6267 /* Canonicalize a USE of a pseudo register or memory location. */
6268 else if (GET_CODE (x) == USE
6269 && ! (GET_CODE (XEXP (x, 0)) == REG
6270 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6271 canon_reg (XEXP (x, 0), NULL_RTX);
6272 else if (GET_CODE (x) == CALL)
6274 /* The result of apply_change_group can be ignored; see canon_reg. */
6275 canon_reg (x, insn);
6276 apply_change_group ();
6280 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6281 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6282 is handled specially for this case, and if it isn't set, then there will
6283 be no equivalence for the destination. */
6284 if (n_sets == 1 && REG_NOTES (insn) != 0
6285 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6286 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6287 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6288 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6290 /* Canonicalize sources and addresses of destinations.
6291 We do this in a separate pass to avoid problems when a MATCH_DUP is
6292 present in the insn pattern. In that case, we want to ensure that
6293 we don't break the duplicate nature of the pattern. So we will replace
6294 both operands at the same time. Otherwise, we would fail to find an
6295 equivalent substitution in the loop calling validate_change below.
6297 We used to suppress canonicalization of DEST if it appears in SRC,
6298 but we don't do this any more. */
6300 for (i = 0; i < n_sets; i++)
6302 rtx dest = SET_DEST (sets[i].rtl);
6303 rtx src = SET_SRC (sets[i].rtl);
6304 rtx new = canon_reg (src, insn);
6307 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6308 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6309 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6310 || (insn_code = recog_memoized (insn)) < 0
6311 || insn_n_dups[insn_code] > 0)
6312 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6314 SET_SRC (sets[i].rtl) = new;
6316 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6318 validate_change (insn, &XEXP (dest, 1),
6319 canon_reg (XEXP (dest, 1), insn), 1);
6320 validate_change (insn, &XEXP (dest, 2),
6321 canon_reg (XEXP (dest, 2), insn), 1);
6324 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6325 || GET_CODE (dest) == ZERO_EXTRACT
6326 || GET_CODE (dest) == SIGN_EXTRACT)
6327 dest = XEXP (dest, 0);
6329 if (GET_CODE (dest) == MEM)
6330 canon_reg (dest, insn);
6333 /* Now that we have done all the replacements, we can apply the change
6334 group and see if they all work. Note that this will cause some
6335 canonicalizations that would have worked individually not to be applied
6336 because some other canonicalization didn't work, but this should not
6339 The result of apply_change_group can be ignored; see canon_reg. */
6341 apply_change_group ();
6343 /* Set sets[i].src_elt to the class each source belongs to.
6344 Detect assignments from or to volatile things
6345 and set set[i] to zero so they will be ignored
6346 in the rest of this function.
6348 Nothing in this loop changes the hash table or the register chains. */
6350 for (i = 0; i < n_sets; i++)
6352 register rtx src, dest;
6353 register rtx src_folded;
6354 register struct table_elt *elt = 0, *p;
6355 enum machine_mode mode;
6358 rtx src_related = 0;
6359 struct table_elt *src_const_elt = 0;
6360 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6361 int src_related_cost = 10000, src_elt_cost = 10000;
6362 /* Set non-zero if we need to call force_const_mem on with the
6363 contents of src_folded before using it. */
6364 int src_folded_force_flag = 0;
6366 dest = SET_DEST (sets[i].rtl);
6367 src = SET_SRC (sets[i].rtl);
6369 /* If SRC is a constant that has no machine mode,
6370 hash it with the destination's machine mode.
6371 This way we can keep different modes separate. */
6373 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6374 sets[i].mode = mode;
6378 enum machine_mode eqvmode = mode;
6379 if (GET_CODE (dest) == STRICT_LOW_PART)
6380 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6382 hash_arg_in_memory = 0;
6383 hash_arg_in_struct = 0;
6384 src_eqv = fold_rtx (src_eqv, insn);
6385 src_eqv_hash = HASH (src_eqv, eqvmode);
6387 /* Find the equivalence class for the equivalent expression. */
6390 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6392 src_eqv_volatile = do_not_record;
6393 src_eqv_in_memory = hash_arg_in_memory;
6394 src_eqv_in_struct = hash_arg_in_struct;
6397 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6398 value of the INNER register, not the destination. So it is not
6399 a valid substitution for the source. But save it for later. */
6400 if (GET_CODE (dest) == STRICT_LOW_PART)
6403 src_eqv_here = src_eqv;
6405 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6406 simplified result, which may not necessarily be valid. */
6407 src_folded = fold_rtx (src, insn);
6410 /* ??? This caused bad code to be generated for the m68k port with -O2.
6411 Suppose src is (CONST_INT -1), and that after truncation src_folded
6412 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6413 At the end we will add src and src_const to the same equivalence
6414 class. We now have 3 and -1 on the same equivalence class. This
6415 causes later instructions to be mis-optimized. */
6416 /* If storing a constant in a bitfield, pre-truncate the constant
6417 so we will be able to record it later. */
6418 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6419 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6421 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6423 if (GET_CODE (src) == CONST_INT
6424 && GET_CODE (width) == CONST_INT
6425 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6426 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6428 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6429 << INTVAL (width)) - 1));
6433 /* Compute SRC's hash code, and also notice if it
6434 should not be recorded at all. In that case,
6435 prevent any further processing of this assignment. */
6437 hash_arg_in_memory = 0;
6438 hash_arg_in_struct = 0;
6441 sets[i].src_hash = HASH (src, mode);
6442 sets[i].src_volatile = do_not_record;
6443 sets[i].src_in_memory = hash_arg_in_memory;
6444 sets[i].src_in_struct = hash_arg_in_struct;
6446 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6447 a pseudo that is set more than once, do not record SRC. Using
6448 SRC as a replacement for anything else will be incorrect in that
6449 situation. Note that this usually occurs only for stack slots,
6450 in which case all the RTL would be referring to SRC, so we don't
6451 lose any optimization opportunities by not having SRC in the
6454 if (GET_CODE (src) == MEM
6455 && find_reg_note (insn, REG_EQUIV, src) != 0
6456 && GET_CODE (dest) == REG
6457 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6458 && REG_N_SETS (REGNO (dest)) != 1)
6459 sets[i].src_volatile = 1;
6462 /* It is no longer clear why we used to do this, but it doesn't
6463 appear to still be needed. So let's try without it since this
6464 code hurts cse'ing widened ops. */
6465 /* If source is a perverse subreg (such as QI treated as an SI),
6466 treat it as volatile. It may do the work of an SI in one context
6467 where the extra bits are not being used, but cannot replace an SI
6469 if (GET_CODE (src) == SUBREG
6470 && (GET_MODE_SIZE (GET_MODE (src))
6471 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6472 sets[i].src_volatile = 1;
6475 /* Locate all possible equivalent forms for SRC. Try to replace
6476 SRC in the insn with each cheaper equivalent.
6478 We have the following types of equivalents: SRC itself, a folded
6479 version, a value given in a REG_EQUAL note, or a value related
6482 Each of these equivalents may be part of an additional class
6483 of equivalents (if more than one is in the table, they must be in
6484 the same class; we check for this).
6486 If the source is volatile, we don't do any table lookups.
6488 We note any constant equivalent for possible later use in a
6491 if (!sets[i].src_volatile)
6492 elt = lookup (src, sets[i].src_hash, mode);
6494 sets[i].src_elt = elt;
6496 if (elt && src_eqv_here && src_eqv_elt)
6498 if (elt->first_same_value != src_eqv_elt->first_same_value)
6500 /* The REG_EQUAL is indicating that two formerly distinct
6501 classes are now equivalent. So merge them. */
6502 merge_equiv_classes (elt, src_eqv_elt);
6503 src_eqv_hash = HASH (src_eqv, elt->mode);
6504 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6510 else if (src_eqv_elt)
6513 /* Try to find a constant somewhere and record it in `src_const'.
6514 Record its table element, if any, in `src_const_elt'. Look in
6515 any known equivalences first. (If the constant is not in the
6516 table, also set `sets[i].src_const_hash'). */
6518 for (p = elt->first_same_value; p; p = p->next_same_value)
6522 src_const_elt = elt;
6527 && (CONSTANT_P (src_folded)
6528 /* Consider (minus (label_ref L1) (label_ref L2)) as
6529 "constant" here so we will record it. This allows us
6530 to fold switch statements when an ADDR_DIFF_VEC is used. */
6531 || (GET_CODE (src_folded) == MINUS
6532 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6533 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6534 src_const = src_folded, src_const_elt = elt;
6535 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6536 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6538 /* If we don't know if the constant is in the table, get its
6539 hash code and look it up. */
6540 if (src_const && src_const_elt == 0)
6542 sets[i].src_const_hash = HASH (src_const, mode);
6543 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6546 sets[i].src_const = src_const;
6547 sets[i].src_const_elt = src_const_elt;
6549 /* If the constant and our source are both in the table, mark them as
6550 equivalent. Otherwise, if a constant is in the table but the source
6551 isn't, set ELT to it. */
6552 if (src_const_elt && elt
6553 && src_const_elt->first_same_value != elt->first_same_value)
6554 merge_equiv_classes (elt, src_const_elt);
6555 else if (src_const_elt && elt == 0)
6556 elt = src_const_elt;
6558 /* See if there is a register linearly related to a constant
6559 equivalent of SRC. */
6561 && (GET_CODE (src_const) == CONST
6562 || (src_const_elt && src_const_elt->related_value != 0)))
6564 src_related = use_related_value (src_const, src_const_elt);
6567 struct table_elt *src_related_elt
6568 = lookup (src_related, HASH (src_related, mode), mode);
6569 if (src_related_elt && elt)
6571 if (elt->first_same_value
6572 != src_related_elt->first_same_value)
6573 /* This can occur when we previously saw a CONST
6574 involving a SYMBOL_REF and then see the SYMBOL_REF
6575 twice. Merge the involved classes. */
6576 merge_equiv_classes (elt, src_related_elt);
6579 src_related_elt = 0;
6581 else if (src_related_elt && elt == 0)
6582 elt = src_related_elt;
6586 /* See if we have a CONST_INT that is already in a register in a
6589 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6590 && GET_MODE_CLASS (mode) == MODE_INT
6591 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6593 enum machine_mode wider_mode;
6595 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6596 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6597 && src_related == 0;
6598 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6600 struct table_elt *const_elt
6601 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6606 for (const_elt = const_elt->first_same_value;
6607 const_elt; const_elt = const_elt->next_same_value)
6608 if (GET_CODE (const_elt->exp) == REG)
6610 src_related = gen_lowpart_if_possible (mode,
6617 /* Another possibility is that we have an AND with a constant in
6618 a mode narrower than a word. If so, it might have been generated
6619 as part of an "if" which would narrow the AND. If we already
6620 have done the AND in a wider mode, we can use a SUBREG of that
6623 if (flag_expensive_optimizations && ! src_related
6624 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6625 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6627 enum machine_mode tmode;
6628 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6630 for (tmode = GET_MODE_WIDER_MODE (mode);
6631 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6632 tmode = GET_MODE_WIDER_MODE (tmode))
6634 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6635 struct table_elt *larger_elt;
6639 PUT_MODE (new_and, tmode);
6640 XEXP (new_and, 0) = inner;
6641 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6642 if (larger_elt == 0)
6645 for (larger_elt = larger_elt->first_same_value;
6646 larger_elt; larger_elt = larger_elt->next_same_value)
6647 if (GET_CODE (larger_elt->exp) == REG)
6650 = gen_lowpart_if_possible (mode, larger_elt->exp);
6660 #ifdef LOAD_EXTEND_OP
6661 /* See if a MEM has already been loaded with a widening operation;
6662 if it has, we can use a subreg of that. Many CISC machines
6663 also have such operations, but this is only likely to be
6664 beneficial these machines. */
6666 if (flag_expensive_optimizations && src_related == 0
6667 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6668 && GET_MODE_CLASS (mode) == MODE_INT
6669 && GET_CODE (src) == MEM && ! do_not_record
6670 && LOAD_EXTEND_OP (mode) != NIL)
6672 enum machine_mode tmode;
6674 /* Set what we are trying to extend and the operation it might
6675 have been extended with. */
6676 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6677 XEXP (memory_extend_rtx, 0) = src;
6679 for (tmode = GET_MODE_WIDER_MODE (mode);
6680 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6681 tmode = GET_MODE_WIDER_MODE (tmode))
6683 struct table_elt *larger_elt;
6685 PUT_MODE (memory_extend_rtx, tmode);
6686 larger_elt = lookup (memory_extend_rtx,
6687 HASH (memory_extend_rtx, tmode), tmode);
6688 if (larger_elt == 0)
6691 for (larger_elt = larger_elt->first_same_value;
6692 larger_elt; larger_elt = larger_elt->next_same_value)
6693 if (GET_CODE (larger_elt->exp) == REG)
6695 src_related = gen_lowpart_if_possible (mode,
6704 #endif /* LOAD_EXTEND_OP */
6706 if (src == src_folded)
6709 /* At this point, ELT, if non-zero, points to a class of expressions
6710 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6711 and SRC_RELATED, if non-zero, each contain additional equivalent
6712 expressions. Prune these latter expressions by deleting expressions
6713 already in the equivalence class.
6715 Check for an equivalent identical to the destination. If found,
6716 this is the preferred equivalent since it will likely lead to
6717 elimination of the insn. Indicate this by placing it in
6720 if (elt) elt = elt->first_same_value;
6721 for (p = elt; p; p = p->next_same_value)
6723 enum rtx_code code = GET_CODE (p->exp);
6725 /* If the expression is not valid, ignore it. Then we do not
6726 have to check for validity below. In most cases, we can use
6727 `rtx_equal_p', since canonicalization has already been done. */
6728 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6731 /* Also skip paradoxical subregs, unless that's what we're
6734 && (GET_MODE_SIZE (GET_MODE (p->exp))
6735 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6737 && GET_CODE (src) == SUBREG
6738 && GET_MODE (src) == GET_MODE (p->exp)
6739 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6740 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
6743 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6745 else if (src_folded && GET_CODE (src_folded) == code
6746 && rtx_equal_p (src_folded, p->exp))
6748 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6749 && rtx_equal_p (src_eqv_here, p->exp))
6751 else if (src_related && GET_CODE (src_related) == code
6752 && rtx_equal_p (src_related, p->exp))
6755 /* This is the same as the destination of the insns, we want
6756 to prefer it. Copy it to src_related. The code below will
6757 then give it a negative cost. */
6758 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6763 /* Find the cheapest valid equivalent, trying all the available
6764 possibilities. Prefer items not in the hash table to ones
6765 that are when they are equal cost. Note that we can never
6766 worsen an insn as the current contents will also succeed.
6767 If we find an equivalent identical to the destination, use it as best,
6768 since this insn will probably be eliminated in that case. */
6771 if (rtx_equal_p (src, dest))
6774 src_cost = COST (src);
6779 if (rtx_equal_p (src_eqv_here, dest))
6782 src_eqv_cost = COST (src_eqv_here);
6787 if (rtx_equal_p (src_folded, dest))
6788 src_folded_cost = -1;
6790 src_folded_cost = COST (src_folded);
6795 if (rtx_equal_p (src_related, dest))
6796 src_related_cost = -1;
6798 src_related_cost = COST (src_related);
6801 /* If this was an indirect jump insn, a known label will really be
6802 cheaper even though it looks more expensive. */
6803 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6804 src_folded = src_const, src_folded_cost = -1;
6806 /* Terminate loop when replacement made. This must terminate since
6807 the current contents will be tested and will always be valid. */
6812 /* Skip invalid entries. */
6813 while (elt && GET_CODE (elt->exp) != REG
6814 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6815 elt = elt->next_same_value;
6817 /* A paradoxical subreg would be bad here: it'll be the right
6818 size, but later may be adjusted so that the upper bits aren't
6819 what we want. So reject it. */
6821 && GET_CODE (elt->exp) == SUBREG
6822 && (GET_MODE_SIZE (GET_MODE (elt->exp))
6823 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
6824 /* It is okay, though, if the rtx we're trying to match
6825 will ignore any of the bits we can't predict. */
6827 && GET_CODE (src) == SUBREG
6828 && GET_MODE (src) == GET_MODE (elt->exp)
6829 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6830 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
6832 elt = elt->next_same_value;
6836 if (elt) src_elt_cost = elt->cost;
6838 /* Find cheapest and skip it for the next time. For items
6839 of equal cost, use this order:
6840 src_folded, src, src_eqv, src_related and hash table entry. */
6841 if (src_folded_cost <= src_cost
6842 && src_folded_cost <= src_eqv_cost
6843 && src_folded_cost <= src_related_cost
6844 && src_folded_cost <= src_elt_cost)
6846 trial = src_folded, src_folded_cost = 10000;
6847 if (src_folded_force_flag)
6848 trial = force_const_mem (mode, trial);
6850 else if (src_cost <= src_eqv_cost
6851 && src_cost <= src_related_cost
6852 && src_cost <= src_elt_cost)
6853 trial = src, src_cost = 10000;
6854 else if (src_eqv_cost <= src_related_cost
6855 && src_eqv_cost <= src_elt_cost)
6856 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6857 else if (src_related_cost <= src_elt_cost)
6858 trial = copy_rtx (src_related), src_related_cost = 10000;
6861 trial = copy_rtx (elt->exp);
6862 elt = elt->next_same_value;
6863 src_elt_cost = 10000;
6866 /* We don't normally have an insn matching (set (pc) (pc)), so
6867 check for this separately here. We will delete such an
6870 Tablejump insns contain a USE of the table, so simply replacing
6871 the operand with the constant won't match. This is simply an
6872 unconditional branch, however, and is therefore valid. Just
6873 insert the substitution here and we will delete and re-emit
6876 if (n_sets == 1 && dest == pc_rtx
6878 || (GET_CODE (trial) == LABEL_REF
6879 && ! condjump_p (insn))))
6881 /* If TRIAL is a label in front of a jump table, we are
6882 really falling through the switch (this is how casesi
6883 insns work), so we must branch around the table. */
6884 if (GET_CODE (trial) == CODE_LABEL
6885 && NEXT_INSN (trial) != 0
6886 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6887 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6888 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6890 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
6892 SET_SRC (sets[i].rtl) = trial;
6893 cse_jumps_altered = 1;
6897 /* Look for a substitution that makes a valid insn. */
6898 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6900 /* The result of apply_change_group can be ignored; see
6903 validate_change (insn, &SET_SRC (sets[i].rtl),
6904 canon_reg (SET_SRC (sets[i].rtl), insn),
6906 apply_change_group ();
6910 /* If we previously found constant pool entries for
6911 constants and this is a constant, try making a
6912 pool entry. Put it in src_folded unless we already have done
6913 this since that is where it likely came from. */
6915 else if (constant_pool_entries_cost
6916 && CONSTANT_P (trial)
6917 && ! (GET_CODE (trial) == CONST
6918 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
6920 || (GET_CODE (src_folded) != MEM
6921 && ! src_folded_force_flag))
6922 && GET_MODE_CLASS (mode) != MODE_CC
6923 && mode != VOIDmode)
6925 src_folded_force_flag = 1;
6927 src_folded_cost = constant_pool_entries_cost;
6931 src = SET_SRC (sets[i].rtl);
6933 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6934 However, there is an important exception: If both are registers
6935 that are not the head of their equivalence class, replace SET_SRC
6936 with the head of the class. If we do not do this, we will have
6937 both registers live over a portion of the basic block. This way,
6938 their lifetimes will likely abut instead of overlapping. */
6939 if (GET_CODE (dest) == REG
6940 && REGNO_QTY_VALID_P (REGNO (dest))
6941 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6942 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6943 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6944 /* Don't do this if the original insn had a hard reg as
6946 && (GET_CODE (sets[i].src) != REG
6947 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6948 /* We can't call canon_reg here because it won't do anything if
6949 SRC is a hard register. */
6951 int first = qty_first_reg[reg_qty[REGNO (src)]];
6953 src = SET_SRC (sets[i].rtl)
6954 = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6955 : gen_rtx_REG (GET_MODE (src), first);
6957 /* If we had a constant that is cheaper than what we are now
6958 setting SRC to, use that constant. We ignored it when we
6959 thought we could make this into a no-op. */
6960 if (src_const && COST (src_const) < COST (src)
6961 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6965 /* If we made a change, recompute SRC values. */
6966 if (src != sets[i].src)
6969 hash_arg_in_memory = 0;
6970 hash_arg_in_struct = 0;
6972 sets[i].src_hash = HASH (src, mode);
6973 sets[i].src_volatile = do_not_record;
6974 sets[i].src_in_memory = hash_arg_in_memory;
6975 sets[i].src_in_struct = hash_arg_in_struct;
6976 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
6979 /* If this is a single SET, we are setting a register, and we have an
6980 equivalent constant, we want to add a REG_NOTE. We don't want
6981 to write a REG_EQUAL note for a constant pseudo since verifying that
6982 that pseudo hasn't been eliminated is a pain. Such a note also
6983 won't help anything. */
6984 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
6985 && GET_CODE (src_const) != REG)
6987 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6989 /* Record the actual constant value in a REG_EQUAL note, making
6990 a new one if one does not already exist. */
6992 XEXP (tem, 0) = src_const;
6994 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
6995 src_const, REG_NOTES (insn));
6997 /* If storing a constant value in a register that
6998 previously held the constant value 0,
6999 record this fact with a REG_WAS_0 note on this insn.
7001 Note that the *register* is required to have previously held 0,
7002 not just any register in the quantity and we must point to the
7003 insn that set that register to zero.
7005 Rather than track each register individually, we just see if
7006 the last set for this quantity was for this register. */
7008 if (REGNO_QTY_VALID_P (REGNO (dest))
7009 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
7011 /* See if we previously had a REG_WAS_0 note. */
7012 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7013 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
7015 if ((tem = single_set (const_insn)) != 0
7016 && rtx_equal_p (SET_DEST (tem), dest))
7019 XEXP (note, 0) = const_insn;
7021 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7028 /* Now deal with the destination. */
7030 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7032 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7033 to the MEM or REG within it. */
7034 while (GET_CODE (dest) == SIGN_EXTRACT
7035 || GET_CODE (dest) == ZERO_EXTRACT
7036 || GET_CODE (dest) == SUBREG
7037 || GET_CODE (dest) == STRICT_LOW_PART)
7039 sets[i].inner_dest_loc = &XEXP (dest, 0);
7040 dest = XEXP (dest, 0);
7043 sets[i].inner_dest = dest;
7045 if (GET_CODE (dest) == MEM)
7047 #ifdef PUSH_ROUNDING
7048 /* Stack pushes invalidate the stack pointer. */
7049 rtx addr = XEXP (dest, 0);
7050 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7051 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7052 && XEXP (addr, 0) == stack_pointer_rtx)
7053 invalidate (stack_pointer_rtx, Pmode);
7055 dest = fold_rtx (dest, insn);
7058 /* Compute the hash code of the destination now,
7059 before the effects of this instruction are recorded,
7060 since the register values used in the address computation
7061 are those before this instruction. */
7062 sets[i].dest_hash = HASH (dest, mode);
7064 /* Don't enter a bit-field in the hash table
7065 because the value in it after the store
7066 may not equal what was stored, due to truncation. */
7068 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7069 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7071 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7073 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7074 && GET_CODE (width) == CONST_INT
7075 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7076 && ! (INTVAL (src_const)
7077 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7078 /* Exception: if the value is constant,
7079 and it won't be truncated, record it. */
7083 /* This is chosen so that the destination will be invalidated
7084 but no new value will be recorded.
7085 We must invalidate because sometimes constant
7086 values can be recorded for bitfields. */
7087 sets[i].src_elt = 0;
7088 sets[i].src_volatile = 1;
7094 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7096 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7098 PUT_CODE (insn, NOTE);
7099 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7100 NOTE_SOURCE_FILE (insn) = 0;
7101 cse_jumps_altered = 1;
7102 /* One less use of the label this insn used to jump to. */
7103 if (JUMP_LABEL (insn) != 0)
7104 --LABEL_NUSES (JUMP_LABEL (insn));
7105 /* No more processing for this set. */
7109 /* If this SET is now setting PC to a label, we know it used to
7110 be a conditional or computed branch. So we see if we can follow
7111 it. If it was a computed branch, delete it and re-emit. */
7112 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7116 /* If this is not in the format for a simple branch and
7117 we are the only SET in it, re-emit it. */
7118 if (! simplejump_p (insn) && n_sets == 1)
7120 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7121 JUMP_LABEL (new) = XEXP (src, 0);
7122 LABEL_NUSES (XEXP (src, 0))++;
7127 /* Otherwise, force rerecognition, since it probably had
7128 a different pattern before.
7129 This shouldn't really be necessary, since whatever
7130 changed the source value above should have done this.
7131 Until the right place is found, might as well do this here. */
7132 INSN_CODE (insn) = -1;
7134 /* Now that we've converted this jump to an unconditional jump,
7135 there is dead code after it. Delete the dead code until we
7136 reach a BARRIER, the end of the function, or a label. Do
7137 not delete NOTEs except for NOTE_INSN_DELETED since later
7138 phases assume these notes are retained. */
7142 while (NEXT_INSN (p) != 0
7143 && GET_CODE (NEXT_INSN (p)) != BARRIER
7144 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7146 if (GET_CODE (NEXT_INSN (p)) != NOTE
7147 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7148 delete_insn (NEXT_INSN (p));
7153 /* If we don't have a BARRIER immediately after INSN, put one there.
7154 Much code assumes that there are no NOTEs between a JUMP_INSN and
7157 if (NEXT_INSN (insn) == 0
7158 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7159 emit_barrier_before (NEXT_INSN (insn));
7161 /* We might have two BARRIERs separated by notes. Delete the second
7164 if (p != insn && NEXT_INSN (p) != 0
7165 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7166 delete_insn (NEXT_INSN (p));
7168 cse_jumps_altered = 1;
7172 /* If destination is volatile, invalidate it and then do no further
7173 processing for this assignment. */
7175 else if (do_not_record)
7177 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7178 || GET_CODE (dest) == MEM)
7179 invalidate (dest, VOIDmode);
7180 else if (GET_CODE (dest) == STRICT_LOW_PART
7181 || GET_CODE (dest) == ZERO_EXTRACT)
7182 invalidate (XEXP (dest, 0), GET_MODE (dest));
7186 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7187 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7190 /* If setting CC0, record what it was set to, or a constant, if it
7191 is equivalent to a constant. If it is being set to a floating-point
7192 value, make a COMPARE with the appropriate constant of 0. If we
7193 don't do this, later code can interpret this as a test against
7194 const0_rtx, which can cause problems if we try to put it into an
7195 insn as a floating-point operand. */
7196 if (dest == cc0_rtx)
7198 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7199 this_insn_cc0_mode = mode;
7200 if (FLOAT_MODE_P (mode))
7201 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7207 /* Now enter all non-volatile source expressions in the hash table
7208 if they are not already present.
7209 Record their equivalence classes in src_elt.
7210 This way we can insert the corresponding destinations into
7211 the same classes even if the actual sources are no longer in them
7212 (having been invalidated). */
7214 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7215 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7217 register struct table_elt *elt;
7218 register struct table_elt *classp = sets[0].src_elt;
7219 rtx dest = SET_DEST (sets[0].rtl);
7220 enum machine_mode eqvmode = GET_MODE (dest);
7222 if (GET_CODE (dest) == STRICT_LOW_PART)
7224 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7227 if (insert_regs (src_eqv, classp, 0))
7229 rehash_using_reg (src_eqv);
7230 src_eqv_hash = HASH (src_eqv, eqvmode);
7232 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7233 elt->in_memory = src_eqv_in_memory;
7234 elt->in_struct = src_eqv_in_struct;
7237 /* Check to see if src_eqv_elt is the same as a set source which
7238 does not yet have an elt, and if so set the elt of the set source
7240 for (i = 0; i < n_sets; i++)
7241 if (sets[i].rtl && sets[i].src_elt == 0
7242 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7243 sets[i].src_elt = src_eqv_elt;
7246 for (i = 0; i < n_sets; i++)
7247 if (sets[i].rtl && ! sets[i].src_volatile
7248 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7250 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7252 /* REG_EQUAL in setting a STRICT_LOW_PART
7253 gives an equivalent for the entire destination register,
7254 not just for the subreg being stored in now.
7255 This is a more interesting equivalence, so we arrange later
7256 to treat the entire reg as the destination. */
7257 sets[i].src_elt = src_eqv_elt;
7258 sets[i].src_hash = src_eqv_hash;
7262 /* Insert source and constant equivalent into hash table, if not
7264 register struct table_elt *classp = src_eqv_elt;
7265 register rtx src = sets[i].src;
7266 register rtx dest = SET_DEST (sets[i].rtl);
7267 enum machine_mode mode
7268 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7270 if (sets[i].src_elt == 0)
7272 register struct table_elt *elt;
7274 /* Note that these insert_regs calls cannot remove
7275 any of the src_elt's, because they would have failed to
7276 match if not still valid. */
7277 if (insert_regs (src, classp, 0))
7279 rehash_using_reg (src);
7280 sets[i].src_hash = HASH (src, mode);
7282 elt = insert (src, classp, sets[i].src_hash, mode);
7283 elt->in_memory = sets[i].src_in_memory;
7284 elt->in_struct = sets[i].src_in_struct;
7285 sets[i].src_elt = classp = elt;
7288 if (sets[i].src_const && sets[i].src_const_elt == 0
7289 && src != sets[i].src_const
7290 && ! rtx_equal_p (sets[i].src_const, src))
7291 sets[i].src_elt = insert (sets[i].src_const, classp,
7292 sets[i].src_const_hash, mode);
7295 else if (sets[i].src_elt == 0)
7296 /* If we did not insert the source into the hash table (e.g., it was
7297 volatile), note the equivalence class for the REG_EQUAL value, if any,
7298 so that the destination goes into that class. */
7299 sets[i].src_elt = src_eqv_elt;
7301 invalidate_from_clobbers (x);
7303 /* Some registers are invalidated by subroutine calls. Memory is
7304 invalidated by non-constant calls. */
7306 if (GET_CODE (insn) == CALL_INSN)
7308 if (! CONST_CALL_P (insn))
7309 invalidate_memory ();
7310 invalidate_for_call ();
7313 /* Now invalidate everything set by this instruction.
7314 If a SUBREG or other funny destination is being set,
7315 sets[i].rtl is still nonzero, so here we invalidate the reg
7316 a part of which is being set. */
7318 for (i = 0; i < n_sets; i++)
7321 /* We can't use the inner dest, because the mode associated with
7322 a ZERO_EXTRACT is significant. */
7323 register rtx dest = SET_DEST (sets[i].rtl);
7325 /* Needed for registers to remove the register from its
7326 previous quantity's chain.
7327 Needed for memory if this is a nonvarying address, unless
7328 we have just done an invalidate_memory that covers even those. */
7329 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7330 || GET_CODE (dest) == MEM)
7331 invalidate (dest, VOIDmode);
7332 else if (GET_CODE (dest) == STRICT_LOW_PART
7333 || GET_CODE (dest) == ZERO_EXTRACT)
7334 invalidate (XEXP (dest, 0), GET_MODE (dest));
7337 /* Make sure registers mentioned in destinations
7338 are safe for use in an expression to be inserted.
7339 This removes from the hash table
7340 any invalid entry that refers to one of these registers.
7342 We don't care about the return value from mention_regs because
7343 we are going to hash the SET_DEST values unconditionally. */
7345 for (i = 0; i < n_sets; i++)
7346 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
7347 mention_regs (SET_DEST (sets[i].rtl));
7349 /* We may have just removed some of the src_elt's from the hash table.
7350 So replace each one with the current head of the same class. */
7352 for (i = 0; i < n_sets; i++)
7355 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7356 /* If elt was removed, find current head of same class,
7357 or 0 if nothing remains of that class. */
7359 register struct table_elt *elt = sets[i].src_elt;
7361 while (elt && elt->prev_same_value)
7362 elt = elt->prev_same_value;
7364 while (elt && elt->first_same_value == 0)
7365 elt = elt->next_same_value;
7366 sets[i].src_elt = elt ? elt->first_same_value : 0;
7370 /* Now insert the destinations into their equivalence classes. */
7372 for (i = 0; i < n_sets; i++)
7375 register rtx dest = SET_DEST (sets[i].rtl);
7376 register struct table_elt *elt;
7378 /* Don't record value if we are not supposed to risk allocating
7379 floating-point values in registers that might be wider than
7381 if ((flag_float_store
7382 && GET_CODE (dest) == MEM
7383 && FLOAT_MODE_P (GET_MODE (dest)))
7384 /* Don't record BLKmode values, because we don't know the
7385 size of it, and can't be sure that other BLKmode values
7386 have the same or smaller size. */
7387 || GET_MODE (dest) == BLKmode
7388 /* Don't record values of destinations set inside a libcall block
7389 since we might delete the libcall. Things should have been set
7390 up so we won't want to reuse such a value, but we play it safe
7393 /* If we didn't put a REG_EQUAL value or a source into the hash
7394 table, there is no point is recording DEST. */
7395 || sets[i].src_elt == 0
7396 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7397 or SIGN_EXTEND, don't record DEST since it can cause
7398 some tracking to be wrong.
7400 ??? Think about this more later. */
7401 || (GET_CODE (dest) == SUBREG
7402 && (GET_MODE_SIZE (GET_MODE (dest))
7403 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7404 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7405 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7408 /* STRICT_LOW_PART isn't part of the value BEING set,
7409 and neither is the SUBREG inside it.
7410 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7411 if (GET_CODE (dest) == STRICT_LOW_PART)
7412 dest = SUBREG_REG (XEXP (dest, 0));
7414 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7415 /* Registers must also be inserted into chains for quantities. */
7416 if (insert_regs (dest, sets[i].src_elt, 1))
7418 /* If `insert_regs' changes something, the hash code must be
7420 rehash_using_reg (dest);
7421 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7424 elt = insert (dest, sets[i].src_elt,
7425 sets[i].dest_hash, GET_MODE (dest));
7426 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7427 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7428 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7433 /* This implicitly assumes a whole struct
7434 need not have MEM_IN_STRUCT_P.
7435 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7436 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7437 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7440 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7441 narrower than M2, and both M1 and M2 are the same number of words,
7442 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7443 make that equivalence as well.
7445 However, BAR may have equivalences for which gen_lowpart_if_possible
7446 will produce a simpler value than gen_lowpart_if_possible applied to
7447 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7448 BAR's equivalences. If we don't get a simplified form, make
7449 the SUBREG. It will not be used in an equivalence, but will
7450 cause two similar assignments to be detected.
7452 Note the loop below will find SUBREG_REG (DEST) since we have
7453 already entered SRC and DEST of the SET in the table. */
7455 if (GET_CODE (dest) == SUBREG
7456 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7458 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7459 && (GET_MODE_SIZE (GET_MODE (dest))
7460 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7461 && sets[i].src_elt != 0)
7463 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7464 struct table_elt *elt, *classp = 0;
7466 for (elt = sets[i].src_elt->first_same_value; elt;
7467 elt = elt->next_same_value)
7471 struct table_elt *src_elt;
7473 /* Ignore invalid entries. */
7474 if (GET_CODE (elt->exp) != REG
7475 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7478 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7480 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7482 src_hash = HASH (new_src, new_mode);
7483 src_elt = lookup (new_src, src_hash, new_mode);
7485 /* Put the new source in the hash table is if isn't
7489 if (insert_regs (new_src, classp, 0))
7491 rehash_using_reg (new_src);
7492 src_hash = HASH (new_src, new_mode);
7494 src_elt = insert (new_src, classp, src_hash, new_mode);
7495 src_elt->in_memory = elt->in_memory;
7496 src_elt->in_struct = elt->in_struct;
7498 else if (classp && classp != src_elt->first_same_value)
7499 /* Show that two things that we've seen before are
7500 actually the same. */
7501 merge_equiv_classes (src_elt, classp);
7503 classp = src_elt->first_same_value;
7504 /* Ignore invalid entries. */
7506 && GET_CODE (classp->exp) != REG
7507 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7508 classp = classp->next_same_value;
7513 /* Special handling for (set REG0 REG1)
7514 where REG0 is the "cheapest", cheaper than REG1.
7515 After cse, REG1 will probably not be used in the sequel,
7516 so (if easily done) change this insn to (set REG1 REG0) and
7517 replace REG1 with REG0 in the previous insn that computed their value.
7518 Then REG1 will become a dead store and won't cloud the situation
7519 for later optimizations.
7521 Do not make this change if REG1 is a hard register, because it will
7522 then be used in the sequel and we may be changing a two-operand insn
7523 into a three-operand insn.
7525 Also do not do this if we are operating on a copy of INSN. */
7527 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7528 && NEXT_INSN (PREV_INSN (insn)) == insn
7529 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7530 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7531 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7532 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7533 == REGNO (SET_DEST (sets[0].rtl))))
7535 rtx prev = PREV_INSN (insn);
7536 while (prev && GET_CODE (prev) == NOTE)
7537 prev = PREV_INSN (prev);
7539 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7540 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7542 rtx dest = SET_DEST (sets[0].rtl);
7543 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7545 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7546 validate_change (insn, & SET_DEST (sets[0].rtl),
7547 SET_SRC (sets[0].rtl), 1);
7548 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7549 apply_change_group ();
7551 /* If REG1 was equivalent to a constant, REG0 is not. */
7553 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7555 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7556 any REG_WAS_0 note on INSN to PREV. */
7557 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7559 remove_note (prev, note);
7561 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7564 remove_note (insn, note);
7565 XEXP (note, 1) = REG_NOTES (prev);
7566 REG_NOTES (prev) = note;
7569 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7570 then we must delete it, because the value in REG0 has changed. */
7571 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7572 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7573 remove_note (insn, note);
7577 /* If this is a conditional jump insn, record any known equivalences due to
7578 the condition being tested. */
7580 last_jump_equiv_class = 0;
7581 if (GET_CODE (insn) == JUMP_INSN
7582 && n_sets == 1 && GET_CODE (x) == SET
7583 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7584 record_jump_equiv (insn, 0);
7587 /* If the previous insn set CC0 and this insn no longer references CC0,
7588 delete the previous insn. Here we use the fact that nothing expects CC0
7589 to be valid over an insn, which is true until the final pass. */
7590 if (prev_insn && GET_CODE (prev_insn) == INSN
7591 && (tem = single_set (prev_insn)) != 0
7592 && SET_DEST (tem) == cc0_rtx
7593 && ! reg_mentioned_p (cc0_rtx, x))
7595 PUT_CODE (prev_insn, NOTE);
7596 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7597 NOTE_SOURCE_FILE (prev_insn) = 0;
7600 prev_insn_cc0 = this_insn_cc0;
7601 prev_insn_cc0_mode = this_insn_cc0_mode;
7607 /* Remove from the ahsh table all expressions that reference memory. */
7609 invalidate_memory ()
7612 register struct table_elt *p, *next;
7614 for (i = 0; i < NBUCKETS; i++)
7615 for (p = table[i]; p; p = next)
7617 next = p->next_same_hash;
7619 remove_from_table (p, i);
7623 /* XXX ??? The name of this function bears little resemblance to
7624 what this function actually does. FIXME. */
7626 note_mem_written (addr)
7629 /* Pushing or popping the stack invalidates just the stack pointer. */
7630 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7631 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7632 && GET_CODE (XEXP (addr, 0)) == REG
7633 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7635 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7636 reg_tick[STACK_POINTER_REGNUM]++;
7638 /* This should be *very* rare. */
7639 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7640 invalidate (stack_pointer_rtx, VOIDmode);
7646 /* Perform invalidation on the basis of everything about an insn
7647 except for invalidating the actual places that are SET in it.
7648 This includes the places CLOBBERed, and anything that might
7649 alias with something that is SET or CLOBBERed.
7651 X is the pattern of the insn. */
7654 invalidate_from_clobbers (x)
7657 if (GET_CODE (x) == CLOBBER)
7659 rtx ref = XEXP (x, 0);
7662 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7663 || GET_CODE (ref) == MEM)
7664 invalidate (ref, VOIDmode);
7665 else if (GET_CODE (ref) == STRICT_LOW_PART
7666 || GET_CODE (ref) == ZERO_EXTRACT)
7667 invalidate (XEXP (ref, 0), GET_MODE (ref));
7670 else if (GET_CODE (x) == PARALLEL)
7673 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7675 register rtx y = XVECEXP (x, 0, i);
7676 if (GET_CODE (y) == CLOBBER)
7678 rtx ref = XEXP (y, 0);
7679 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7680 || GET_CODE (ref) == MEM)
7681 invalidate (ref, VOIDmode);
7682 else if (GET_CODE (ref) == STRICT_LOW_PART
7683 || GET_CODE (ref) == ZERO_EXTRACT)
7684 invalidate (XEXP (ref, 0), GET_MODE (ref));
7690 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7691 and replace any registers in them with either an equivalent constant
7692 or the canonical form of the register. If we are inside an address,
7693 only do this if the address remains valid.
7695 OBJECT is 0 except when within a MEM in which case it is the MEM.
7697 Return the replacement for X. */
7700 cse_process_notes (x, object)
7704 enum rtx_code code = GET_CODE (x);
7705 char *fmt = GET_RTX_FORMAT (code);
7721 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7726 if (REG_NOTE_KIND (x) == REG_EQUAL)
7727 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7729 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7736 rtx new = cse_process_notes (XEXP (x, 0), object);
7737 /* We don't substitute VOIDmode constants into these rtx,
7738 since they would impede folding. */
7739 if (GET_MODE (new) != VOIDmode)
7740 validate_change (object, &XEXP (x, 0), new, 0);
7745 i = reg_qty[REGNO (x)];
7747 /* Return a constant or a constant register. */
7748 if (REGNO_QTY_VALID_P (REGNO (x))
7749 && qty_const[i] != 0
7750 && (CONSTANT_P (qty_const[i])
7751 || GET_CODE (qty_const[i]) == REG))
7753 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7758 /* Otherwise, canonicalize this register. */
7759 return canon_reg (x, NULL_RTX);
7765 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7767 validate_change (object, &XEXP (x, i),
7768 cse_process_notes (XEXP (x, i), object), 0);
7773 /* Find common subexpressions between the end test of a loop and the beginning
7774 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7776 Often we have a loop where an expression in the exit test is used
7777 in the body of the loop. For example "while (*p) *q++ = *p++;".
7778 Because of the way we duplicate the loop exit test in front of the loop,
7779 however, we don't detect that common subexpression. This will be caught
7780 when global cse is implemented, but this is a quite common case.
7782 This function handles the most common cases of these common expressions.
7783 It is called after we have processed the basic block ending with the
7784 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7785 jumps to a label used only once. */
7788 cse_around_loop (loop_start)
7793 struct table_elt *p;
7795 /* If the jump at the end of the loop doesn't go to the start, we don't
7797 for (insn = PREV_INSN (loop_start);
7798 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7799 insn = PREV_INSN (insn))
7803 || GET_CODE (insn) != NOTE
7804 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7807 /* If the last insn of the loop (the end test) was an NE comparison,
7808 we will interpret it as an EQ comparison, since we fell through
7809 the loop. Any equivalences resulting from that comparison are
7810 therefore not valid and must be invalidated. */
7811 if (last_jump_equiv_class)
7812 for (p = last_jump_equiv_class->first_same_value; p;
7813 p = p->next_same_value)
7815 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7816 || (GET_CODE (p->exp) == SUBREG
7817 && GET_CODE (SUBREG_REG (p->exp)) == REG))
7818 invalidate (p->exp, VOIDmode);
7819 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7820 || GET_CODE (p->exp) == ZERO_EXTRACT)
7821 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
7824 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7825 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7827 The only thing we do with SET_DEST is invalidate entries, so we
7828 can safely process each SET in order. It is slightly less efficient
7829 to do so, but we only want to handle the most common cases.
7831 The gen_move_insn call in cse_set_around_loop may create new pseudos.
7832 These pseudos won't have valid entries in any of the tables indexed
7833 by register number, such as reg_qty. We avoid out-of-range array
7834 accesses by not processing any instructions created after cse started. */
7836 for (insn = NEXT_INSN (loop_start);
7837 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7838 && INSN_UID (insn) < max_insn_uid
7839 && ! (GET_CODE (insn) == NOTE
7840 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7841 insn = NEXT_INSN (insn))
7843 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7844 && (GET_CODE (PATTERN (insn)) == SET
7845 || GET_CODE (PATTERN (insn)) == CLOBBER))
7846 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7847 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7848 && GET_CODE (PATTERN (insn)) == PARALLEL)
7849 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7850 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7851 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7852 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7857 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7858 since they are done elsewhere. This function is called via note_stores. */
7861 invalidate_skipped_set (dest, set)
7865 enum rtx_code code = GET_CODE (dest);
7868 && ! note_mem_written (dest) /* If this is not a stack push ... */
7869 /* There are times when an address can appear varying and be a PLUS
7870 during this scan when it would be a fixed address were we to know
7871 the proper equivalences. So invalidate all memory if there is
7872 a BLKmode or nonscalar memory reference or a reference to a
7873 variable address. */
7874 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
7875 || cse_rtx_varies_p (XEXP (dest, 0))))
7877 invalidate_memory ();
7881 if (GET_CODE (set) == CLOBBER
7888 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
7889 invalidate (XEXP (dest, 0), GET_MODE (dest));
7890 else if (code == REG || code == SUBREG || code == MEM)
7891 invalidate (dest, VOIDmode);
7894 /* Invalidate all insns from START up to the end of the function or the
7895 next label. This called when we wish to CSE around a block that is
7896 conditionally executed. */
7899 invalidate_skipped_block (start)
7904 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7905 insn = NEXT_INSN (insn))
7907 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7910 if (GET_CODE (insn) == CALL_INSN)
7912 if (! CONST_CALL_P (insn))
7913 invalidate_memory ();
7914 invalidate_for_call ();
7917 note_stores (PATTERN (insn), invalidate_skipped_set);
7921 /* Used for communication between the following two routines; contains a
7922 value to be checked for modification. */
7924 static rtx cse_check_loop_start_value;
7926 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7927 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7930 cse_check_loop_start (x, set)
7934 if (cse_check_loop_start_value == 0
7935 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7938 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7939 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7940 cse_check_loop_start_value = 0;
7943 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7944 a loop that starts with the label at LOOP_START.
7946 If X is a SET, we see if its SET_SRC is currently in our hash table.
7947 If so, we see if it has a value equal to some register used only in the
7948 loop exit code (as marked by jump.c).
7950 If those two conditions are true, we search backwards from the start of
7951 the loop to see if that same value was loaded into a register that still
7952 retains its value at the start of the loop.
7954 If so, we insert an insn after the load to copy the destination of that
7955 load into the equivalent register and (try to) replace our SET_SRC with that
7958 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7961 cse_set_around_loop (x, insn, loop_start)
7966 struct table_elt *src_elt;
7968 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7969 are setting PC or CC0 or whose SET_SRC is already a register. */
7970 if (GET_CODE (x) == SET
7971 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
7972 && GET_CODE (SET_SRC (x)) != REG)
7974 src_elt = lookup (SET_SRC (x),
7975 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
7976 GET_MODE (SET_DEST (x)));
7979 for (src_elt = src_elt->first_same_value; src_elt;
7980 src_elt = src_elt->next_same_value)
7981 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
7982 && COST (src_elt->exp) < COST (SET_SRC (x)))
7986 /* Look for an insn in front of LOOP_START that sets
7987 something in the desired mode to SET_SRC (x) before we hit
7988 a label or CALL_INSN. */
7990 for (p = prev_nonnote_insn (loop_start);
7991 p && GET_CODE (p) != CALL_INSN
7992 && GET_CODE (p) != CODE_LABEL;
7993 p = prev_nonnote_insn (p))
7994 if ((set = single_set (p)) != 0
7995 && GET_CODE (SET_DEST (set)) == REG
7996 && GET_MODE (SET_DEST (set)) == src_elt->mode
7997 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
7999 /* We now have to ensure that nothing between P
8000 and LOOP_START modified anything referenced in
8001 SET_SRC (x). We know that nothing within the loop
8002 can modify it, or we would have invalidated it in
8006 cse_check_loop_start_value = SET_SRC (x);
8007 for (q = p; q != loop_start; q = NEXT_INSN (q))
8008 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8009 note_stores (PATTERN (q), cse_check_loop_start);
8011 /* If nothing was changed and we can replace our
8012 SET_SRC, add an insn after P to copy its destination
8013 to what we will be replacing SET_SRC with. */
8014 if (cse_check_loop_start_value
8015 && validate_change (insn, &SET_SRC (x),
8017 emit_insn_after (gen_move_insn (src_elt->exp,
8025 /* Now invalidate anything modified by X. */
8026 note_mem_written (SET_DEST (x));
8028 /* See comment on similar code in cse_insn for explanation of these tests. */
8029 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8030 || GET_CODE (SET_DEST (x)) == MEM)
8031 invalidate (SET_DEST (x), VOIDmode);
8032 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8033 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8034 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8037 /* Find the end of INSN's basic block and return its range,
8038 the total number of SETs in all the insns of the block, the last insn of the
8039 block, and the branch path.
8041 The branch path indicates which branches should be followed. If a non-zero
8042 path size is specified, the block should be rescanned and a different set
8043 of branches will be taken. The branch path is only used if
8044 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8046 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8047 used to describe the block. It is filled in with the information about
8048 the current block. The incoming structure's branch path, if any, is used
8049 to construct the output branch path. */
8052 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8054 struct cse_basic_block_data *data;
8061 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8062 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8063 int path_size = data->path_size;
8067 /* Update the previous branch path, if any. If the last branch was
8068 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8069 shorten the path by one and look at the previous branch. We know that
8070 at least one branch must have been taken if PATH_SIZE is non-zero. */
8071 while (path_size > 0)
8073 if (data->path[path_size - 1].status != NOT_TAKEN)
8075 data->path[path_size - 1].status = NOT_TAKEN;
8082 /* Scan to end of this basic block. */
8083 while (p && GET_CODE (p) != CODE_LABEL)
8085 /* Don't cse out the end of a loop. This makes a difference
8086 only for the unusual loops that always execute at least once;
8087 all other loops have labels there so we will stop in any case.
8088 Cse'ing out the end of the loop is dangerous because it
8089 might cause an invariant expression inside the loop
8090 to be reused after the end of the loop. This would make it
8091 hard to move the expression out of the loop in loop.c,
8092 especially if it is one of several equivalent expressions
8093 and loop.c would like to eliminate it.
8095 If we are running after loop.c has finished, we can ignore
8096 the NOTE_INSN_LOOP_END. */
8098 if (! after_loop && GET_CODE (p) == NOTE
8099 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8102 /* Don't cse over a call to setjmp; on some machines (eg vax)
8103 the regs restored by the longjmp come from
8104 a later time than the setjmp. */
8105 if (GET_CODE (p) == NOTE
8106 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8109 /* A PARALLEL can have lots of SETs in it,
8110 especially if it is really an ASM_OPERANDS. */
8111 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8112 && GET_CODE (PATTERN (p)) == PARALLEL)
8113 nsets += XVECLEN (PATTERN (p), 0);
8114 else if (GET_CODE (p) != NOTE)
8117 /* Ignore insns made by CSE; they cannot affect the boundaries of
8120 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8121 high_cuid = INSN_CUID (p);
8122 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8123 low_cuid = INSN_CUID (p);
8125 /* See if this insn is in our branch path. If it is and we are to
8127 if (path_entry < path_size && data->path[path_entry].branch == p)
8129 if (data->path[path_entry].status != NOT_TAKEN)
8132 /* Point to next entry in path, if any. */
8136 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8137 was specified, we haven't reached our maximum path length, there are
8138 insns following the target of the jump, this is the only use of the
8139 jump label, and the target label is preceded by a BARRIER.
8141 Alternatively, we can follow the jump if it branches around a
8142 block of code and there are no other branches into the block.
8143 In this case invalidate_skipped_block will be called to invalidate any
8144 registers set in the block when following the jump. */
8146 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8147 && GET_CODE (p) == JUMP_INSN
8148 && GET_CODE (PATTERN (p)) == SET
8149 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8150 && JUMP_LABEL (p) != 0
8151 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8152 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8154 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8155 if ((GET_CODE (q) != NOTE
8156 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8157 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8158 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8161 /* If we ran into a BARRIER, this code is an extension of the
8162 basic block when the branch is taken. */
8163 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8165 /* Don't allow ourself to keep walking around an
8166 always-executed loop. */
8167 if (next_real_insn (q) == next)
8173 /* Similarly, don't put a branch in our path more than once. */
8174 for (i = 0; i < path_entry; i++)
8175 if (data->path[i].branch == p)
8178 if (i != path_entry)
8181 data->path[path_entry].branch = p;
8182 data->path[path_entry++].status = TAKEN;
8184 /* This branch now ends our path. It was possible that we
8185 didn't see this branch the last time around (when the
8186 insn in front of the target was a JUMP_INSN that was
8187 turned into a no-op). */
8188 path_size = path_entry;
8191 /* Mark block so we won't scan it again later. */
8192 PUT_MODE (NEXT_INSN (p), QImode);
8194 /* Detect a branch around a block of code. */
8195 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8199 if (next_real_insn (q) == next)
8205 for (i = 0; i < path_entry; i++)
8206 if (data->path[i].branch == p)
8209 if (i != path_entry)
8212 /* This is no_labels_between_p (p, q) with an added check for
8213 reaching the end of a function (in case Q precedes P). */
8214 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8215 if (GET_CODE (tmp) == CODE_LABEL)
8220 data->path[path_entry].branch = p;
8221 data->path[path_entry++].status = AROUND;
8223 path_size = path_entry;
8226 /* Mark block so we won't scan it again later. */
8227 PUT_MODE (NEXT_INSN (p), QImode);
8234 data->low_cuid = low_cuid;
8235 data->high_cuid = high_cuid;
8236 data->nsets = nsets;
8239 /* If all jumps in the path are not taken, set our path length to zero
8240 so a rescan won't be done. */
8241 for (i = path_size - 1; i >= 0; i--)
8242 if (data->path[i].status != NOT_TAKEN)
8246 data->path_size = 0;
8248 data->path_size = path_size;
8250 /* End the current branch path. */
8251 data->path[path_size].branch = 0;
8254 /* Perform cse on the instructions of a function.
8255 F is the first instruction.
8256 NREGS is one plus the highest pseudo-reg number used in the instruction.
8258 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8259 (only if -frerun-cse-after-loop).
8261 Returns 1 if jump_optimize should be redone due to simplifications
8262 in conditional jump instructions. */
8265 cse_main (f, nregs, after_loop, file)
8271 struct cse_basic_block_data val;
8272 register rtx insn = f;
8275 cse_jumps_altered = 0;
8276 recorded_label_ref = 0;
8277 constant_pool_entries_cost = 0;
8281 init_alias_analysis ();
8285 max_insn_uid = get_max_uid ();
8287 all_minus_one = (int *) alloca (nregs * sizeof (int));
8288 consec_ints = (int *) alloca (nregs * sizeof (int));
8290 for (i = 0; i < nregs; i++)
8292 all_minus_one[i] = -1;
8296 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8297 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8298 reg_qty = (int *) alloca (nregs * sizeof (int));
8299 reg_in_table = (int *) alloca (nregs * sizeof (int));
8300 reg_tick = (int *) alloca (nregs * sizeof (int));
8302 #ifdef LOAD_EXTEND_OP
8304 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8305 and change the code and mode as appropriate. */
8306 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8309 /* Discard all the free elements of the previous function
8310 since they are allocated in the temporarily obstack. */
8311 bzero ((char *) table, sizeof table);
8312 free_element_chain = 0;
8313 n_elements_made = 0;
8315 /* Find the largest uid. */
8317 max_uid = get_max_uid ();
8318 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8319 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8321 /* Compute the mapping from uids to cuids.
8322 CUIDs are numbers assigned to insns, like uids,
8323 except that cuids increase monotonically through the code.
8324 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8325 between two insns is not affected by -g. */
8327 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8329 if (GET_CODE (insn) != NOTE
8330 || NOTE_LINE_NUMBER (insn) < 0)
8331 INSN_CUID (insn) = ++i;
8333 /* Give a line number note the same cuid as preceding insn. */
8334 INSN_CUID (insn) = i;
8337 /* Initialize which registers are clobbered by calls. */
8339 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8341 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8342 if ((call_used_regs[i]
8343 /* Used to check !fixed_regs[i] here, but that isn't safe;
8344 fixed regs are still call-clobbered, and sched can get
8345 confused if they can "live across calls".
8347 The frame pointer is always preserved across calls. The arg
8348 pointer is if it is fixed. The stack pointer usually is, unless
8349 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8350 will be present. If we are generating PIC code, the PIC offset
8351 table register is preserved across calls. */
8353 && i != STACK_POINTER_REGNUM
8354 && i != FRAME_POINTER_REGNUM
8355 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8356 && i != HARD_FRAME_POINTER_REGNUM
8358 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8359 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8361 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8362 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8366 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8368 /* Loop over basic blocks.
8369 Compute the maximum number of qty's needed for each basic block
8370 (which is 2 for each SET). */
8374 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8375 flag_cse_skip_blocks);
8377 /* If this basic block was already processed or has no sets, skip it. */
8378 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8380 PUT_MODE (insn, VOIDmode);
8381 insn = (val.last ? NEXT_INSN (val.last) : 0);
8386 cse_basic_block_start = val.low_cuid;
8387 cse_basic_block_end = val.high_cuid;
8388 max_qty = val.nsets * 2;
8391 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
8392 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8395 /* Make MAX_QTY bigger to give us room to optimize
8396 past the end of this basic block, if that should prove useful. */
8402 /* If this basic block is being extended by following certain jumps,
8403 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8404 Otherwise, we start after this basic block. */
8405 if (val.path_size > 0)
8406 cse_basic_block (insn, val.last, val.path, 0);
8409 int old_cse_jumps_altered = cse_jumps_altered;
8412 /* When cse changes a conditional jump to an unconditional
8413 jump, we want to reprocess the block, since it will give
8414 us a new branch path to investigate. */
8415 cse_jumps_altered = 0;
8416 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8417 if (cse_jumps_altered == 0
8418 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8421 cse_jumps_altered |= old_cse_jumps_altered;
8429 /* Tell refers_to_mem_p that qty_const info is not available. */
8432 if (max_elements_made < n_elements_made)
8433 max_elements_made = n_elements_made;
8435 return cse_jumps_altered || recorded_label_ref;
8438 /* Process a single basic block. FROM and TO and the limits of the basic
8439 block. NEXT_BRANCH points to the branch path when following jumps or
8440 a null path when not following jumps.
8442 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8443 loop. This is true when we are being called for the last time on a
8444 block and this CSE pass is before loop.c. */
8447 cse_basic_block (from, to, next_branch, around_loop)
8448 register rtx from, to;
8449 struct branch_path *next_branch;
8454 int in_libcall_block = 0;
8457 /* Each of these arrays is undefined before max_reg, so only allocate
8458 the space actually needed and adjust the start below. */
8460 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8461 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8462 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8463 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8464 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8466 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8467 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8468 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8470 qty_first_reg -= max_reg;
8471 qty_last_reg -= max_reg;
8472 qty_mode -= max_reg;
8473 qty_const -= max_reg;
8474 qty_const_insn -= max_reg;
8475 qty_comparison_code -= max_reg;
8476 qty_comparison_qty -= max_reg;
8477 qty_comparison_const -= max_reg;
8481 /* TO might be a label. If so, protect it from being deleted. */
8482 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8485 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8487 register enum rtx_code code;
8489 struct table_elt *p, *next;
8491 /* If we have processed 1,000 insns, flush the hash table to avoid
8492 extreme quadratic behavior.
8494 ??? This is a real kludge and needs to be done some other way.
8496 if (num_insns++ > 1000)
8498 for (i = 0; i < NBUCKETS; i++)
8499 for (p = table[i]; p; p = next)
8501 next = p->next_same_hash;
8503 if (GET_CODE (p->exp) == REG)
8504 invalidate (p->exp, p->mode);
8506 remove_from_table (p, i);
8512 /* See if this is a branch that is part of the path. If so, and it is
8513 to be taken, do so. */
8514 if (next_branch->branch == insn)
8516 enum taken status = next_branch++->status;
8517 if (status != NOT_TAKEN)
8519 if (status == TAKEN)
8520 record_jump_equiv (insn, 1);
8522 invalidate_skipped_block (NEXT_INSN (insn));
8524 /* Set the last insn as the jump insn; it doesn't affect cc0.
8525 Then follow this branch. */
8530 insn = JUMP_LABEL (insn);
8535 code = GET_CODE (insn);
8536 if (GET_MODE (insn) == QImode)
8537 PUT_MODE (insn, VOIDmode);
8539 if (GET_RTX_CLASS (code) == 'i')
8541 /* Process notes first so we have all notes in canonical forms when
8542 looking for duplicate operations. */
8544 if (REG_NOTES (insn))
8545 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8547 /* Track when we are inside in LIBCALL block. Inside such a block,
8548 we do not want to record destinations. The last insn of a
8549 LIBCALL block is not considered to be part of the block, since
8550 its destination is the result of the block and hence should be
8553 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
8554 in_libcall_block = 1;
8555 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8556 in_libcall_block = 0;
8558 cse_insn (insn, in_libcall_block);
8561 /* If INSN is now an unconditional jump, skip to the end of our
8562 basic block by pretending that we just did the last insn in the
8563 basic block. If we are jumping to the end of our block, show
8564 that we can have one usage of TO. */
8566 if (simplejump_p (insn))
8571 if (JUMP_LABEL (insn) == to)
8574 /* Maybe TO was deleted because the jump is unconditional.
8575 If so, there is nothing left in this basic block. */
8576 /* ??? Perhaps it would be smarter to set TO
8577 to whatever follows this insn,
8578 and pretend the basic block had always ended here. */
8579 if (INSN_DELETED_P (to))
8582 insn = PREV_INSN (to);
8585 /* See if it is ok to keep on going past the label
8586 which used to end our basic block. Remember that we incremented
8587 the count of that label, so we decrement it here. If we made
8588 a jump unconditional, TO_USAGE will be one; in that case, we don't
8589 want to count the use in that jump. */
8591 if (to != 0 && NEXT_INSN (insn) == to
8592 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8594 struct cse_basic_block_data val;
8597 insn = NEXT_INSN (to);
8599 if (LABEL_NUSES (to) == 0)
8600 insn = delete_insn (to);
8602 /* If TO was the last insn in the function, we are done. */
8606 /* If TO was preceded by a BARRIER we are done with this block
8607 because it has no continuation. */
8608 prev = prev_nonnote_insn (to);
8609 if (prev && GET_CODE (prev) == BARRIER)
8612 /* Find the end of the following block. Note that we won't be
8613 following branches in this case. */
8616 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8618 /* If the tables we allocated have enough space left
8619 to handle all the SETs in the next basic block,
8620 continue through it. Otherwise, return,
8621 and that block will be scanned individually. */
8622 if (val.nsets * 2 + next_qty > max_qty)
8625 cse_basic_block_start = val.low_cuid;
8626 cse_basic_block_end = val.high_cuid;
8629 /* Prevent TO from being deleted if it is a label. */
8630 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8633 /* Back up so we process the first insn in the extension. */
8634 insn = PREV_INSN (insn);
8638 if (next_qty > max_qty)
8641 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8642 the previous insn is the only insn that branches to the head of a loop,
8643 we can cse into the loop. Don't do this if we changed the jump
8644 structure of a loop unless we aren't going to be following jumps. */
8646 if ((cse_jumps_altered == 0
8647 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8648 && around_loop && to != 0
8649 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8650 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8651 && JUMP_LABEL (PREV_INSN (to)) != 0
8652 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8653 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8655 return to ? NEXT_INSN (to) : 0;
8658 /* Count the number of times registers are used (not set) in X.
8659 COUNTS is an array in which we accumulate the count, INCR is how much
8660 we count each register usage.
8662 Don't count a usage of DEST, which is the SET_DEST of a SET which
8663 contains X in its SET_SRC. This is because such a SET does not
8664 modify the liveness of DEST. */
8667 count_reg_usage (x, counts, dest, incr)
8680 switch (code = GET_CODE (x))
8684 counts[REGNO (x)] += incr;
8698 /* Unless we are setting a REG, count everything in SET_DEST. */
8699 if (GET_CODE (SET_DEST (x)) != REG)
8700 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8702 /* If SRC has side-effects, then we can't delete this insn, so the
8703 usage of SET_DEST inside SRC counts.
8705 ??? Strictly-speaking, we might be preserving this insn
8706 because some other SET has side-effects, but that's hard
8707 to do and can't happen now. */
8708 count_reg_usage (SET_SRC (x), counts,
8709 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8714 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8716 /* ... falls through ... */
8719 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8721 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8724 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
8729 if (REG_NOTE_KIND (x) == REG_EQUAL
8730 || GET_CODE (XEXP (x,0)) == USE)
8731 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
8732 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
8739 fmt = GET_RTX_FORMAT (code);
8740 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8743 count_reg_usage (XEXP (x, i), counts, dest, incr);
8744 else if (fmt[i] == 'E')
8745 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8746 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
8750 /* Scan all the insns and delete any that are dead; i.e., they store a register
8751 that is never used or they copy a register to itself.
8753 This is used to remove insns made obviously dead by cse. It improves the
8754 heuristics in loop since it won't try to move dead invariants out of loops
8755 or make givs for dead quantities. The remaining passes of the compilation
8756 are also sped up. */
8759 delete_dead_from_cse (insns, nreg)
8763 int *counts = (int *) alloca (nreg * sizeof (int));
8769 int in_libcall = 0, dead_libcall = 0;
8771 /* First count the number of times each register is used. */
8772 bzero ((char *) counts, sizeof (int) * nreg);
8773 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8774 count_reg_usage (insn, counts, NULL_RTX, 1);
8776 /* Go from the last insn to the first and delete insns that only set unused
8777 registers or copy a register to itself. As we delete an insn, remove
8778 usage counts for registers it uses. */
8779 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8784 prev = prev_real_insn (insn);
8786 /* Don't delete any insns that are part of a libcall block unless
8787 we can delete the whole libcall block.
8789 Flow or loop might get confused if we did that. Remember
8790 that we are scanning backwards. */
8791 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8797 /* See if there's a REG_EQUAL note on this insn and try to
8798 replace the source with the REG_EQUAL expression.
8800 We assume that insns with REG_RETVALs can only be reg->reg
8801 copies at this point. */
8802 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
8805 rtx set = single_set (insn);
8807 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
8810 find_reg_note (insn, REG_RETVAL, NULL_RTX));
8815 else if (in_libcall)
8816 live_insn = ! dead_libcall;
8817 else if (GET_CODE (PATTERN (insn)) == SET)
8819 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8820 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8824 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8825 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8826 && ((tem = next_nonnote_insn (insn)) == 0
8827 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8828 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8831 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8832 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8833 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8834 || side_effects_p (SET_SRC (PATTERN (insn))))
8837 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8838 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8840 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8842 if (GET_CODE (elt) == SET)
8844 if (GET_CODE (SET_DEST (elt)) == REG
8845 && SET_DEST (elt) == SET_SRC (elt))
8849 else if (GET_CODE (SET_DEST (elt)) == CC0
8850 && ! side_effects_p (SET_SRC (elt))
8851 && ((tem = next_nonnote_insn (insn)) == 0
8852 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8853 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8856 else if (GET_CODE (SET_DEST (elt)) != REG
8857 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8858 || counts[REGNO (SET_DEST (elt))] != 0
8859 || side_effects_p (SET_SRC (elt)))
8862 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8868 /* If this is a dead insn, delete it and show registers in it aren't
8873 count_reg_usage (insn, counts, NULL_RTX, -1);
8877 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))