1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
35 #include "insn-config.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `reg_qty' records what quantity a register is currently thought
86 All real quantity numbers are greater than or equal to `max_reg'.
87 If register N has not been assigned a quantity, reg_qty[N] will equal N.
89 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
90 entries should be referenced with an index below `max_reg'.
92 We also maintain a bidirectional chain of registers for each
93 quantity number. The `qty_table` members `first_reg' and `last_reg',
94 and `reg_eqv_table' members `next' and `prev' hold these chains.
96 The first register in a chain is the one whose lifespan is least local.
97 Among equals, it is the one that was seen first.
98 We replace any equivalent register with that one.
100 If two registers have the same quantity number, it must be true that
101 REG expressions with qty_table `mode' must be in the hash table for both
102 registers and must be in the same class.
104 The converse is not true. Since hard registers may be referenced in
105 any mode, two REG expressions might be equivalent in the hash table
106 but not have the same quantity number if the quantity number of one
107 of the registers is not the same mode as those expressions.
109 Constants and quantity numbers
111 When a quantity has a known constant value, that value is stored
112 in the appropriate qty_table `const_rtx'. This is in addition to
113 putting the constant in the hash table as is usual for non-regs.
115 Whether a reg or a constant is preferred is determined by the configuration
116 macro CONST_COSTS and will often depend on the constant value. In any
117 event, expressions containing constants can be simplified, by fold_rtx.
119 When a quantity has a known nearly constant value (such as an address
120 of a stack slot), that value is stored in the appropriate qty_table
123 Integer constants don't have a machine mode. However, cse
124 determines the intended machine mode from the destination
125 of the instruction that moves the constant. The machine mode
126 is recorded in the hash table along with the actual RTL
127 constant expression so that different modes are kept separate.
131 To record known equivalences among expressions in general
132 we use a hash table called `table'. It has a fixed number of buckets
133 that contain chains of `struct table_elt' elements for expressions.
134 These chains connect the elements whose expressions have the same
137 Other chains through the same elements connect the elements which
138 currently have equivalent values.
140 Register references in an expression are canonicalized before hashing
141 the expression. This is done using `reg_qty' and qty_table `first_reg'.
142 The hash code of a register reference is computed using the quantity
143 number, not the register number.
145 When the value of an expression changes, it is necessary to remove from the
146 hash table not just that expression but all expressions whose values
147 could be different as a result.
149 1. If the value changing is in memory, except in special cases
150 ANYTHING referring to memory could be changed. That is because
151 nobody knows where a pointer does not point.
152 The function `invalidate_memory' removes what is necessary.
154 The special cases are when the address is constant or is
155 a constant plus a fixed register such as the frame pointer
156 or a static chain pointer. When such addresses are stored in,
157 we can tell exactly which other such addresses must be invalidated
158 due to overlap. `invalidate' does this.
159 All expressions that refer to non-constant
160 memory addresses are also invalidated. `invalidate_memory' does this.
162 2. If the value changing is a register, all expressions
163 containing references to that register, and only those,
166 Because searching the entire hash table for expressions that contain
167 a register is very slow, we try to figure out when it isn't necessary.
168 Precisely, this is necessary only when expressions have been
169 entered in the hash table using this register, and then the value has
170 changed, and then another expression wants to be added to refer to
171 the register's new value. This sequence of circumstances is rare
172 within any one basic block.
174 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
175 reg_tick[i] is incremented whenever a value is stored in register i.
176 reg_in_table[i] holds -1 if no references to register i have been
177 entered in the table; otherwise, it contains the value reg_tick[i] had
178 when the references were entered. If we want to enter a reference
179 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
180 Until we want to enter a new entry, the mere fact that the two vectors
181 don't match makes the entries be ignored if anyone tries to match them.
183 Registers themselves are entered in the hash table as well as in
184 the equivalent-register chains. However, the vectors `reg_tick'
185 and `reg_in_table' do not apply to expressions which are simple
186 register references. These expressions are removed from the table
187 immediately when they become invalid, and this can be done even if
188 we do not immediately search for all the expressions that refer to
191 A CLOBBER rtx in an instruction invalidates its operand for further
192 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
193 invalidates everything that resides in memory.
197 Constant expressions that differ only by an additive integer
198 are called related. When a constant expression is put in
199 the table, the related expression with no constant term
200 is also entered. These are made to point at each other
201 so that it is possible to find out if there exists any
202 register equivalent to an expression related to a given expression. */
204 /* One plus largest register number used in this function. */
208 /* One plus largest instruction UID used in this function at time of
211 static int max_insn_uid;
213 /* Length of qty_table vector. We know in advance we will not need
214 a quantity number this big. */
218 /* Next quantity number to be allocated.
219 This is 1 + the largest number needed so far. */
223 /* Per-qty information tracking.
225 `first_reg' and `last_reg' track the head and tail of the
226 chain of registers which currently contain this quantity.
228 `mode' contains the machine mode of this quantity.
230 `const_rtx' holds the rtx of the constant value of this
231 quantity, if known. A summations of the frame/arg pointer
232 and a constant can also be entered here. When this holds
233 a known value, `const_insn' is the insn which stored the
236 `comparison_{code,const,qty}' are used to track when a
237 comparison between a quantity and some constant or register has
238 been passed. In such a case, we know the results of the comparison
239 in case we see it again. These members record a comparison that
240 is known to be true. `comparison_code' holds the rtx code of such
241 a comparison, else it is set to UNKNOWN and the other two
242 comparison members are undefined. `comparison_const' holds
243 the constant being compared against, or zero if the comparison
244 is not against a constant. `comparison_qty' holds the quantity
245 being compared against when the result is known. If the comparison
246 is not with a register, `comparison_qty' is -1. */
248 struct qty_table_elem
252 rtx comparison_const;
254 unsigned int first_reg, last_reg;
255 /* The sizes of these fields should match the sizes of the
256 code and mode fields of struct rtx_def (see rtl.h). */
257 ENUM_BITFIELD(rtx_code) comparison_code : 16;
258 ENUM_BITFIELD(machine_mode) mode : 8;
261 /* The table of all qtys, indexed by qty number. */
262 static struct qty_table_elem *qty_table;
265 /* For machines that have a CC0, we do not record its value in the hash
266 table since its use is guaranteed to be the insn immediately following
267 its definition and any other insn is presumed to invalidate it.
269 Instead, we store below the value last assigned to CC0. If it should
270 happen to be a constant, it is stored in preference to the actual
271 assigned value. In case it is a constant, we store the mode in which
272 the constant should be interpreted. */
274 static rtx prev_insn_cc0;
275 static enum machine_mode prev_insn_cc0_mode;
277 /* Previous actual insn. 0 if at first insn of basic block. */
279 static rtx prev_insn;
282 /* Insn being scanned. */
284 static rtx this_insn;
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
290 Or -1 if this register is at the end of the chain.
292 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
294 /* Per-register equivalence chain. */
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem *reg_eqv_table;
305 /* Next in hash chain. */
306 struct cse_reg_info *hash_next;
308 /* The next cse_reg_info structure in the free or used list. */
309 struct cse_reg_info *next;
314 /* The quantity number of the register's current contents. */
317 /* The number of times the register has been altered in the current
321 /* The REG_TICK value at which rtx's containing this register are
322 valid in the hash table. If this does not equal the current
323 reg_tick value, such expressions existing in the hash table are
327 /* The SUBREG that was set when REG_TICK was last incremented. Set
328 to -1 if the last store was to the whole register, not a subreg. */
329 unsigned int subreg_ticked;
332 /* A free list of cse_reg_info entries. */
333 static struct cse_reg_info *cse_reg_info_free_list;
335 /* A used list of cse_reg_info entries. */
336 static struct cse_reg_info *cse_reg_info_used_list;
337 static struct cse_reg_info *cse_reg_info_used_list_end;
339 /* A mapping from registers to cse_reg_info data structures. */
340 #define REGHASH_SHIFT 7
341 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
342 #define REGHASH_MASK (REGHASH_SIZE - 1)
343 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
345 #define REGHASH_FN(REGNO) \
346 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
348 /* The last lookup we did into the cse_reg_info_tree. This allows us
349 to cache repeated lookups. */
350 static unsigned int cached_regno;
351 static struct cse_reg_info *cached_cse_reg_info;
353 /* A HARD_REG_SET containing all the hard registers for which there is
354 currently a REG expression in the hash table. Note the difference
355 from the above variables, which indicate if the REG is mentioned in some
356 expression in the table. */
358 static HARD_REG_SET hard_regs_in_table;
360 /* CUID of insn that starts the basic block currently being cse-processed. */
362 static int cse_basic_block_start;
364 /* CUID of insn that ends the basic block currently being cse-processed. */
366 static int cse_basic_block_end;
368 /* Vector mapping INSN_UIDs to cuids.
369 The cuids are like uids but increase monotonically always.
370 We use them to see whether a reg is used outside a given basic block. */
372 static int *uid_cuid;
374 /* Highest UID in UID_CUID. */
377 /* Get the cuid of an insn. */
379 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
381 /* Nonzero if this pass has made changes, and therefore it's
382 worthwhile to run the garbage collector. */
384 static int cse_altered;
386 /* Nonzero if cse has altered conditional jump insns
387 in such a way that jump optimization should be redone. */
389 static int cse_jumps_altered;
391 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
392 REG_LABEL, we have to rerun jump after CSE to put in the note. */
393 static int recorded_label_ref;
395 /* canon_hash stores 1 in do_not_record
396 if it notices a reference to CC0, PC, or some other volatile
399 static int do_not_record;
401 #ifdef LOAD_EXTEND_OP
403 /* Scratch rtl used when looking for load-extended copy of a MEM. */
404 static rtx memory_extend_rtx;
407 /* canon_hash stores 1 in hash_arg_in_memory
408 if it notices a reference to memory within the expression being hashed. */
410 static int hash_arg_in_memory;
412 /* The hash table contains buckets which are chains of `struct table_elt's,
413 each recording one expression's information.
414 That expression is in the `exp' field.
416 The canon_exp field contains a canonical (from the point of view of
417 alias analysis) version of the `exp' field.
419 Those elements with the same hash code are chained in both directions
420 through the `next_same_hash' and `prev_same_hash' fields.
422 Each set of expressions with equivalent values
423 are on a two-way chain through the `next_same_value'
424 and `prev_same_value' fields, and all point with
425 the `first_same_value' field at the first element in
426 that chain. The chain is in order of increasing cost.
427 Each element's cost value is in its `cost' field.
429 The `in_memory' field is nonzero for elements that
430 involve any reference to memory. These elements are removed
431 whenever a write is done to an unidentified location in memory.
432 To be safe, we assume that a memory address is unidentified unless
433 the address is either a symbol constant or a constant plus
434 the frame pointer or argument pointer.
436 The `related_value' field is used to connect related expressions
437 (that differ by adding an integer).
438 The related expressions are chained in a circular fashion.
439 `related_value' is zero for expressions for which this
442 The `cost' field stores the cost of this element's expression.
443 The `regcost' field stores the value returned by approx_reg_cost for
444 this element's expression.
446 The `is_const' flag is set if the element is a constant (including
449 The `flag' field is used as a temporary during some search routines.
451 The `mode' field is usually the same as GET_MODE (`exp'), but
452 if `exp' is a CONST_INT and has no machine mode then the `mode'
453 field is the mode it was being used as. Each constant is
454 recorded separately for each mode it is used with. */
460 struct table_elt *next_same_hash;
461 struct table_elt *prev_same_hash;
462 struct table_elt *next_same_value;
463 struct table_elt *prev_same_value;
464 struct table_elt *first_same_value;
465 struct table_elt *related_value;
468 /* The size of this field should match the size
469 of the mode field of struct rtx_def (see rtl.h). */
470 ENUM_BITFIELD(machine_mode) mode : 8;
476 /* We don't want a lot of buckets, because we rarely have very many
477 things stored in the hash table, and a lot of buckets slows
478 down a lot of loops that happen frequently. */
480 #define HASH_SIZE (1 << HASH_SHIFT)
481 #define HASH_MASK (HASH_SIZE - 1)
483 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
484 register (hard registers may require `do_not_record' to be set). */
487 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
488 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
489 : canon_hash (X, M)) & HASH_MASK)
491 /* Determine whether register number N is considered a fixed register for the
492 purpose of approximating register costs.
493 It is desirable to replace other regs with fixed regs, to reduce need for
495 A reg wins if it is either the frame pointer or designated as fixed. */
496 #define FIXED_REGNO_P(N) \
497 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
498 || fixed_regs[N] || global_regs[N])
500 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
501 hard registers and pointers into the frame are the cheapest with a cost
502 of 0. Next come pseudos with a cost of one and other hard registers with
503 a cost of 2. Aside from these special cases, call `rtx_cost'. */
505 #define CHEAP_REGNO(N) \
506 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
507 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
508 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
509 || ((N) < FIRST_PSEUDO_REGISTER \
510 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
512 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
513 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
515 /* Get the info associated with register N. */
517 #define GET_CSE_REG_INFO(N) \
518 (((N) == cached_regno && cached_cse_reg_info) \
519 ? cached_cse_reg_info : get_cse_reg_info ((N)))
521 /* Get the number of times this register has been updated in this
524 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
526 /* Get the point at which REG was recorded in the table. */
528 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
530 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
533 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
535 /* Get the quantity number for REG. */
537 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
539 /* Determine if the quantity number for register X represents a valid index
540 into the qty_table. */
542 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
544 static struct table_elt *table[HASH_SIZE];
546 /* Chain of `struct table_elt's made so far for this function
547 but currently removed from the table. */
549 static struct table_elt *free_element_chain;
551 /* Number of `struct table_elt' structures made so far for this function. */
553 static int n_elements_made;
555 /* Maximum value `n_elements_made' has had so far in this compilation
556 for functions previously processed. */
558 static int max_elements_made;
560 /* Surviving equivalence class when two equivalence classes are merged
561 by recording the effects of a jump in the last insn. Zero if the
562 last insn was not a conditional jump. */
564 static struct table_elt *last_jump_equiv_class;
566 /* Set to the cost of a constant pool reference if one was found for a
567 symbolic constant. If this was found, it means we should try to
568 convert constants into constant pool entries if they don't fit in
571 static int constant_pool_entries_cost;
572 static int constant_pool_entries_regcost;
574 /* This data describes a block that will be processed by cse_basic_block. */
576 struct cse_basic_block_data
578 /* Lowest CUID value of insns in block. */
580 /* Highest CUID value of insns in block. */
582 /* Total number of SETs in block. */
584 /* Last insn in the block. */
586 /* Size of current branch path, if any. */
588 /* Current branch path, indicating which branches will be taken. */
591 /* The branch insn. */
593 /* Whether it should be taken or not. AROUND is the same as taken
594 except that it is used when the destination label is not preceded
596 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
600 static bool fixed_base_plus_p (rtx x);
601 static int notreg_cost (rtx, enum rtx_code);
602 static int approx_reg_cost_1 (rtx *, void *);
603 static int approx_reg_cost (rtx);
604 static int preferable (int, int, int, int);
605 static void new_basic_block (void);
606 static void make_new_qty (unsigned int, enum machine_mode);
607 static void make_regs_eqv (unsigned int, unsigned int);
608 static void delete_reg_equiv (unsigned int);
609 static int mention_regs (rtx);
610 static int insert_regs (rtx, struct table_elt *, int);
611 static void remove_from_table (struct table_elt *, unsigned);
612 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
613 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
614 static rtx lookup_as_function (rtx, enum rtx_code);
615 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
617 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
618 static void invalidate (rtx, enum machine_mode);
619 static int cse_rtx_varies_p (rtx, int);
620 static void remove_invalid_refs (unsigned int);
621 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
623 static void rehash_using_reg (rtx);
624 static void invalidate_memory (void);
625 static void invalidate_for_call (void);
626 static rtx use_related_value (rtx, struct table_elt *);
627 static unsigned canon_hash (rtx, enum machine_mode);
628 static unsigned canon_hash_string (const char *);
629 static unsigned safe_hash (rtx, enum machine_mode);
630 static int exp_equiv_p (rtx, rtx, int, int);
631 static rtx canon_reg (rtx, rtx);
632 static void find_best_addr (rtx, rtx *, enum machine_mode);
633 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
635 enum machine_mode *);
636 static rtx fold_rtx (rtx, rtx);
637 static rtx equiv_constant (rtx);
638 static void record_jump_equiv (rtx, int);
639 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
641 static void cse_insn (rtx, rtx);
642 static void cse_end_of_basic_block (rtx, struct cse_basic_block_data *,
644 static int addr_affects_sp_p (rtx);
645 static void invalidate_from_clobbers (rtx);
646 static rtx cse_process_notes (rtx, rtx);
647 static void cse_around_loop (rtx);
648 static void invalidate_skipped_set (rtx, rtx, void *);
649 static void invalidate_skipped_block (rtx);
650 static void cse_check_loop_start (rtx, rtx, void *);
651 static void cse_set_around_loop (rtx, rtx, rtx);
652 static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
653 static void count_reg_usage (rtx, int *, int);
654 static int check_for_label_ref (rtx *, void *);
655 extern void dump_class (struct table_elt*);
656 static struct cse_reg_info * get_cse_reg_info (unsigned int);
657 static int check_dependence (rtx *, void *);
659 static void flush_hash_table (void);
660 static bool insn_live_p (rtx, int *);
661 static bool set_live_p (rtx, rtx, int *);
662 static bool dead_libcall_p (rtx, int *);
663 static int cse_change_cc_mode (rtx *, void *);
664 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
665 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
667 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
668 virtual regs here because the simplify_*_operation routines are called
669 by integrate.c, which is called before virtual register instantiation. */
672 fixed_base_plus_p (rtx x)
674 switch (GET_CODE (x))
677 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
679 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
681 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
682 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
687 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
689 return fixed_base_plus_p (XEXP (x, 0));
699 /* Dump the expressions in the equivalence class indicated by CLASSP.
700 This function is used only for debugging. */
702 dump_class (struct table_elt *classp)
704 struct table_elt *elt;
706 fprintf (stderr, "Equivalence chain for ");
707 print_rtl (stderr, classp->exp);
708 fprintf (stderr, ": \n");
710 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
712 print_rtl (stderr, elt->exp);
713 fprintf (stderr, "\n");
717 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
720 approx_reg_cost_1 (rtx *xp, void *data)
725 if (x && GET_CODE (x) == REG)
727 unsigned int regno = REGNO (x);
729 if (! CHEAP_REGNO (regno))
731 if (regno < FIRST_PSEUDO_REGISTER)
733 if (SMALL_REGISTER_CLASSES)
745 /* Return an estimate of the cost of the registers used in an rtx.
746 This is mostly the number of different REG expressions in the rtx;
747 however for some exceptions like fixed registers we use a cost of
748 0. If any other hard register reference occurs, return MAX_COST. */
751 approx_reg_cost (rtx x)
755 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
761 /* Return a negative value if an rtx A, whose costs are given by COST_A
762 and REGCOST_A, is more desirable than an rtx B.
763 Return a positive value if A is less desirable, or 0 if the two are
766 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
768 /* First, get rid of cases involving expressions that are entirely
770 if (cost_a != cost_b)
772 if (cost_a == MAX_COST)
774 if (cost_b == MAX_COST)
778 /* Avoid extending lifetimes of hardregs. */
779 if (regcost_a != regcost_b)
781 if (regcost_a == MAX_COST)
783 if (regcost_b == MAX_COST)
787 /* Normal operation costs take precedence. */
788 if (cost_a != cost_b)
789 return cost_a - cost_b;
790 /* Only if these are identical consider effects on register pressure. */
791 if (regcost_a != regcost_b)
792 return regcost_a - regcost_b;
796 /* Internal function, to compute cost when X is not a register; called
797 from COST macro to keep it simple. */
800 notreg_cost (rtx x, enum rtx_code outer)
802 return ((GET_CODE (x) == SUBREG
803 && GET_CODE (SUBREG_REG (x)) == REG
804 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
805 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
806 && (GET_MODE_SIZE (GET_MODE (x))
807 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
808 && subreg_lowpart_p (x)
809 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
810 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
812 : rtx_cost (x, outer) * 2);
816 static struct cse_reg_info *
817 get_cse_reg_info (unsigned int regno)
819 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
820 struct cse_reg_info *p;
822 for (p = *hash_head; p != NULL; p = p->hash_next)
823 if (p->regno == regno)
828 /* Get a new cse_reg_info structure. */
829 if (cse_reg_info_free_list)
831 p = cse_reg_info_free_list;
832 cse_reg_info_free_list = p->next;
835 p = xmalloc (sizeof (struct cse_reg_info));
837 /* Insert into hash table. */
838 p->hash_next = *hash_head;
843 p->reg_in_table = -1;
844 p->subreg_ticked = -1;
847 p->next = cse_reg_info_used_list;
848 cse_reg_info_used_list = p;
849 if (!cse_reg_info_used_list_end)
850 cse_reg_info_used_list_end = p;
853 /* Cache this lookup; we tend to be looking up information about the
854 same register several times in a row. */
855 cached_regno = regno;
856 cached_cse_reg_info = p;
861 /* Clear the hash table and initialize each register with its own quantity,
862 for a new basic block. */
865 new_basic_block (void)
871 /* Clear out hash table state for this pass. */
873 memset (reg_hash, 0, sizeof reg_hash);
875 if (cse_reg_info_used_list)
877 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
878 cse_reg_info_free_list = cse_reg_info_used_list;
879 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
881 cached_cse_reg_info = 0;
883 CLEAR_HARD_REG_SET (hard_regs_in_table);
885 /* The per-quantity values used to be initialized here, but it is
886 much faster to initialize each as it is made in `make_new_qty'. */
888 for (i = 0; i < HASH_SIZE; i++)
890 struct table_elt *first;
895 struct table_elt *last = first;
899 while (last->next_same_hash != NULL)
900 last = last->next_same_hash;
902 /* Now relink this hash entire chain into
903 the free element list. */
905 last->next_same_hash = free_element_chain;
906 free_element_chain = first;
916 /* Say that register REG contains a quantity in mode MODE not in any
917 register before and initialize that quantity. */
920 make_new_qty (unsigned int reg, enum machine_mode mode)
923 struct qty_table_elem *ent;
924 struct reg_eqv_elem *eqv;
926 if (next_qty >= max_qty)
929 q = REG_QTY (reg) = next_qty++;
931 ent->first_reg = reg;
934 ent->const_rtx = ent->const_insn = NULL_RTX;
935 ent->comparison_code = UNKNOWN;
937 eqv = ®_eqv_table[reg];
938 eqv->next = eqv->prev = -1;
941 /* Make reg NEW equivalent to reg OLD.
942 OLD is not changing; NEW is. */
945 make_regs_eqv (unsigned int new, unsigned int old)
947 unsigned int lastr, firstr;
948 int q = REG_QTY (old);
949 struct qty_table_elem *ent;
953 /* Nothing should become eqv until it has a "non-invalid" qty number. */
954 if (! REGNO_QTY_VALID_P (old))
958 firstr = ent->first_reg;
959 lastr = ent->last_reg;
961 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
962 hard regs. Among pseudos, if NEW will live longer than any other reg
963 of the same qty, and that is beyond the current basic block,
964 make it the new canonical replacement for this qty. */
965 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
966 /* Certain fixed registers might be of the class NO_REGS. This means
967 that not only can they not be allocated by the compiler, but
968 they cannot be used in substitutions or canonicalizations
970 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
971 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
972 || (new >= FIRST_PSEUDO_REGISTER
973 && (firstr < FIRST_PSEUDO_REGISTER
974 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
975 || (uid_cuid[REGNO_FIRST_UID (new)]
976 < cse_basic_block_start))
977 && (uid_cuid[REGNO_LAST_UID (new)]
978 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
980 reg_eqv_table[firstr].prev = new;
981 reg_eqv_table[new].next = firstr;
982 reg_eqv_table[new].prev = -1;
983 ent->first_reg = new;
987 /* If NEW is a hard reg (known to be non-fixed), insert at end.
988 Otherwise, insert before any non-fixed hard regs that are at the
989 end. Registers of class NO_REGS cannot be used as an
990 equivalent for anything. */
991 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
992 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
993 && new >= FIRST_PSEUDO_REGISTER)
994 lastr = reg_eqv_table[lastr].prev;
995 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
996 if (reg_eqv_table[lastr].next >= 0)
997 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
999 qty_table[q].last_reg = new;
1000 reg_eqv_table[lastr].next = new;
1001 reg_eqv_table[new].prev = lastr;
1005 /* Remove REG from its equivalence class. */
1008 delete_reg_equiv (unsigned int reg)
1010 struct qty_table_elem *ent;
1011 int q = REG_QTY (reg);
1014 /* If invalid, do nothing. */
1018 ent = &qty_table[q];
1020 p = reg_eqv_table[reg].prev;
1021 n = reg_eqv_table[reg].next;
1024 reg_eqv_table[n].prev = p;
1028 reg_eqv_table[p].next = n;
1032 REG_QTY (reg) = reg;
1035 /* Remove any invalid expressions from the hash table
1036 that refer to any of the registers contained in expression X.
1038 Make sure that newly inserted references to those registers
1039 as subexpressions will be considered valid.
1041 mention_regs is not called when a register itself
1042 is being stored in the table.
1044 Return 1 if we have done something that may have changed the hash code
1048 mention_regs (rtx x)
1058 code = GET_CODE (x);
1061 unsigned int regno = REGNO (x);
1062 unsigned int endregno
1063 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1064 : hard_regno_nregs[regno][GET_MODE (x)]);
1067 for (i = regno; i < endregno; i++)
1069 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1070 remove_invalid_refs (i);
1072 REG_IN_TABLE (i) = REG_TICK (i);
1073 SUBREG_TICKED (i) = -1;
1079 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1080 pseudo if they don't use overlapping words. We handle only pseudos
1081 here for simplicity. */
1082 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1083 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1085 unsigned int i = REGNO (SUBREG_REG (x));
1087 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1089 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1090 the last store to this register really stored into this
1091 subreg, then remove the memory of this subreg.
1092 Otherwise, remove any memory of the entire register and
1093 all its subregs from the table. */
1094 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1095 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1096 remove_invalid_refs (i);
1098 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1101 REG_IN_TABLE (i) = REG_TICK (i);
1102 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1106 /* If X is a comparison or a COMPARE and either operand is a register
1107 that does not have a quantity, give it one. This is so that a later
1108 call to record_jump_equiv won't cause X to be assigned a different
1109 hash code and not found in the table after that call.
1111 It is not necessary to do this here, since rehash_using_reg can
1112 fix up the table later, but doing this here eliminates the need to
1113 call that expensive function in the most common case where the only
1114 use of the register is in the comparison. */
1116 if (code == COMPARE || COMPARISON_P (x))
1118 if (GET_CODE (XEXP (x, 0)) == REG
1119 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1120 if (insert_regs (XEXP (x, 0), NULL, 0))
1122 rehash_using_reg (XEXP (x, 0));
1126 if (GET_CODE (XEXP (x, 1)) == REG
1127 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1128 if (insert_regs (XEXP (x, 1), NULL, 0))
1130 rehash_using_reg (XEXP (x, 1));
1135 fmt = GET_RTX_FORMAT (code);
1136 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1138 changed |= mention_regs (XEXP (x, i));
1139 else if (fmt[i] == 'E')
1140 for (j = 0; j < XVECLEN (x, i); j++)
1141 changed |= mention_regs (XVECEXP (x, i, j));
1146 /* Update the register quantities for inserting X into the hash table
1147 with a value equivalent to CLASSP.
1148 (If the class does not contain a REG, it is irrelevant.)
1149 If MODIFIED is nonzero, X is a destination; it is being modified.
1150 Note that delete_reg_equiv should be called on a register
1151 before insert_regs is done on that register with MODIFIED != 0.
1153 Nonzero value means that elements of reg_qty have changed
1154 so X's hash code may be different. */
1157 insert_regs (rtx x, struct table_elt *classp, int modified)
1159 if (GET_CODE (x) == REG)
1161 unsigned int regno = REGNO (x);
1164 /* If REGNO is in the equivalence table already but is of the
1165 wrong mode for that equivalence, don't do anything here. */
1167 qty_valid = REGNO_QTY_VALID_P (regno);
1170 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1172 if (ent->mode != GET_MODE (x))
1176 if (modified || ! qty_valid)
1179 for (classp = classp->first_same_value;
1181 classp = classp->next_same_value)
1182 if (GET_CODE (classp->exp) == REG
1183 && GET_MODE (classp->exp) == GET_MODE (x))
1185 make_regs_eqv (regno, REGNO (classp->exp));
1189 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1190 than REG_IN_TABLE to find out if there was only a single preceding
1191 invalidation - for the SUBREG - or another one, which would be
1192 for the full register. However, if we find here that REG_TICK
1193 indicates that the register is invalid, it means that it has
1194 been invalidated in a separate operation. The SUBREG might be used
1195 now (then this is a recursive call), or we might use the full REG
1196 now and a SUBREG of it later. So bump up REG_TICK so that
1197 mention_regs will do the right thing. */
1199 && REG_IN_TABLE (regno) >= 0
1200 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1202 make_new_qty (regno, GET_MODE (x));
1209 /* If X is a SUBREG, we will likely be inserting the inner register in the
1210 table. If that register doesn't have an assigned quantity number at
1211 this point but does later, the insertion that we will be doing now will
1212 not be accessible because its hash code will have changed. So assign
1213 a quantity number now. */
1215 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1216 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1218 insert_regs (SUBREG_REG (x), NULL, 0);
1223 return mention_regs (x);
1226 /* Look in or update the hash table. */
1228 /* Remove table element ELT from use in the table.
1229 HASH is its hash code, made using the HASH macro.
1230 It's an argument because often that is known in advance
1231 and we save much time not recomputing it. */
1234 remove_from_table (struct table_elt *elt, unsigned int hash)
1239 /* Mark this element as removed. See cse_insn. */
1240 elt->first_same_value = 0;
1242 /* Remove the table element from its equivalence class. */
1245 struct table_elt *prev = elt->prev_same_value;
1246 struct table_elt *next = elt->next_same_value;
1249 next->prev_same_value = prev;
1252 prev->next_same_value = next;
1255 struct table_elt *newfirst = next;
1258 next->first_same_value = newfirst;
1259 next = next->next_same_value;
1264 /* Remove the table element from its hash bucket. */
1267 struct table_elt *prev = elt->prev_same_hash;
1268 struct table_elt *next = elt->next_same_hash;
1271 next->prev_same_hash = prev;
1274 prev->next_same_hash = next;
1275 else if (table[hash] == elt)
1279 /* This entry is not in the proper hash bucket. This can happen
1280 when two classes were merged by `merge_equiv_classes'. Search
1281 for the hash bucket that it heads. This happens only very
1282 rarely, so the cost is acceptable. */
1283 for (hash = 0; hash < HASH_SIZE; hash++)
1284 if (table[hash] == elt)
1289 /* Remove the table element from its related-value circular chain. */
1291 if (elt->related_value != 0 && elt->related_value != elt)
1293 struct table_elt *p = elt->related_value;
1295 while (p->related_value != elt)
1296 p = p->related_value;
1297 p->related_value = elt->related_value;
1298 if (p->related_value == p)
1299 p->related_value = 0;
1302 /* Now add it to the free element chain. */
1303 elt->next_same_hash = free_element_chain;
1304 free_element_chain = elt;
1307 /* Look up X in the hash table and return its table element,
1308 or 0 if X is not in the table.
1310 MODE is the machine-mode of X, or if X is an integer constant
1311 with VOIDmode then MODE is the mode with which X will be used.
1313 Here we are satisfied to find an expression whose tree structure
1316 static struct table_elt *
1317 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1319 struct table_elt *p;
1321 for (p = table[hash]; p; p = p->next_same_hash)
1322 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1323 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1329 /* Like `lookup' but don't care whether the table element uses invalid regs.
1330 Also ignore discrepancies in the machine mode of a register. */
1332 static struct table_elt *
1333 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1335 struct table_elt *p;
1337 if (GET_CODE (x) == REG)
1339 unsigned int regno = REGNO (x);
1341 /* Don't check the machine mode when comparing registers;
1342 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1343 for (p = table[hash]; p; p = p->next_same_hash)
1344 if (GET_CODE (p->exp) == REG
1345 && REGNO (p->exp) == regno)
1350 for (p = table[hash]; p; p = p->next_same_hash)
1351 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1358 /* Look for an expression equivalent to X and with code CODE.
1359 If one is found, return that expression. */
1362 lookup_as_function (rtx x, enum rtx_code code)
1365 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1367 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1368 long as we are narrowing. So if we looked in vain for a mode narrower
1369 than word_mode before, look for word_mode now. */
1370 if (p == 0 && code == CONST_INT
1371 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1374 PUT_MODE (x, word_mode);
1375 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1381 for (p = p->first_same_value; p; p = p->next_same_value)
1382 if (GET_CODE (p->exp) == code
1383 /* Make sure this is a valid entry in the table. */
1384 && exp_equiv_p (p->exp, p->exp, 1, 0))
1390 /* Insert X in the hash table, assuming HASH is its hash code
1391 and CLASSP is an element of the class it should go in
1392 (or 0 if a new class should be made).
1393 It is inserted at the proper position to keep the class in
1394 the order cheapest first.
1396 MODE is the machine-mode of X, or if X is an integer constant
1397 with VOIDmode then MODE is the mode with which X will be used.
1399 For elements of equal cheapness, the most recent one
1400 goes in front, except that the first element in the list
1401 remains first unless a cheaper element is added. The order of
1402 pseudo-registers does not matter, as canon_reg will be called to
1403 find the cheapest when a register is retrieved from the table.
1405 The in_memory field in the hash table element is set to 0.
1406 The caller must set it nonzero if appropriate.
1408 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1409 and if insert_regs returns a nonzero value
1410 you must then recompute its hash code before calling here.
1412 If necessary, update table showing constant values of quantities. */
1414 #define CHEAPER(X, Y) \
1415 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1417 static struct table_elt *
1418 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1420 struct table_elt *elt;
1422 /* If X is a register and we haven't made a quantity for it,
1423 something is wrong. */
1424 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1427 /* If X is a hard register, show it is being put in the table. */
1428 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1430 unsigned int regno = REGNO (x);
1431 unsigned int endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
1434 for (i = regno; i < endregno; i++)
1435 SET_HARD_REG_BIT (hard_regs_in_table, i);
1438 /* Put an element for X into the right hash bucket. */
1440 elt = free_element_chain;
1442 free_element_chain = elt->next_same_hash;
1446 elt = xmalloc (sizeof (struct table_elt));
1450 elt->canon_exp = NULL_RTX;
1451 elt->cost = COST (x);
1452 elt->regcost = approx_reg_cost (x);
1453 elt->next_same_value = 0;
1454 elt->prev_same_value = 0;
1455 elt->next_same_hash = table[hash];
1456 elt->prev_same_hash = 0;
1457 elt->related_value = 0;
1460 elt->is_const = (CONSTANT_P (x)
1461 /* GNU C++ takes advantage of this for `this'
1462 (and other const values). */
1463 || (GET_CODE (x) == REG
1464 && RTX_UNCHANGING_P (x)
1465 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1466 || fixed_base_plus_p (x));
1469 table[hash]->prev_same_hash = elt;
1472 /* Put it into the proper value-class. */
1475 classp = classp->first_same_value;
1476 if (CHEAPER (elt, classp))
1477 /* Insert at the head of the class. */
1479 struct table_elt *p;
1480 elt->next_same_value = classp;
1481 classp->prev_same_value = elt;
1482 elt->first_same_value = elt;
1484 for (p = classp; p; p = p->next_same_value)
1485 p->first_same_value = elt;
1489 /* Insert not at head of the class. */
1490 /* Put it after the last element cheaper than X. */
1491 struct table_elt *p, *next;
1493 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1496 /* Put it after P and before NEXT. */
1497 elt->next_same_value = next;
1499 next->prev_same_value = elt;
1501 elt->prev_same_value = p;
1502 p->next_same_value = elt;
1503 elt->first_same_value = classp;
1507 elt->first_same_value = elt;
1509 /* If this is a constant being set equivalent to a register or a register
1510 being set equivalent to a constant, note the constant equivalence.
1512 If this is a constant, it cannot be equivalent to a different constant,
1513 and a constant is the only thing that can be cheaper than a register. So
1514 we know the register is the head of the class (before the constant was
1517 If this is a register that is not already known equivalent to a
1518 constant, we must check the entire class.
1520 If this is a register that is already known equivalent to an insn,
1521 update the qtys `const_insn' to show that `this_insn' is the latest
1522 insn making that quantity equivalent to the constant. */
1524 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1525 && GET_CODE (x) != REG)
1527 int exp_q = REG_QTY (REGNO (classp->exp));
1528 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1530 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1531 exp_ent->const_insn = this_insn;
1534 else if (GET_CODE (x) == REG
1536 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1539 struct table_elt *p;
1541 for (p = classp; p != 0; p = p->next_same_value)
1543 if (p->is_const && GET_CODE (p->exp) != REG)
1545 int x_q = REG_QTY (REGNO (x));
1546 struct qty_table_elem *x_ent = &qty_table[x_q];
1549 = gen_lowpart (GET_MODE (x), p->exp);
1550 x_ent->const_insn = this_insn;
1556 else if (GET_CODE (x) == REG
1557 && qty_table[REG_QTY (REGNO (x))].const_rtx
1558 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1559 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1561 /* If this is a constant with symbolic value,
1562 and it has a term with an explicit integer value,
1563 link it up with related expressions. */
1564 if (GET_CODE (x) == CONST)
1566 rtx subexp = get_related_value (x);
1568 struct table_elt *subelt, *subelt_prev;
1572 /* Get the integer-free subexpression in the hash table. */
1573 subhash = safe_hash (subexp, mode) & HASH_MASK;
1574 subelt = lookup (subexp, subhash, mode);
1576 subelt = insert (subexp, NULL, subhash, mode);
1577 /* Initialize SUBELT's circular chain if it has none. */
1578 if (subelt->related_value == 0)
1579 subelt->related_value = subelt;
1580 /* Find the element in the circular chain that precedes SUBELT. */
1581 subelt_prev = subelt;
1582 while (subelt_prev->related_value != subelt)
1583 subelt_prev = subelt_prev->related_value;
1584 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1585 This way the element that follows SUBELT is the oldest one. */
1586 elt->related_value = subelt_prev->related_value;
1587 subelt_prev->related_value = elt;
1594 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1595 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1596 the two classes equivalent.
1598 CLASS1 will be the surviving class; CLASS2 should not be used after this
1601 Any invalid entries in CLASS2 will not be copied. */
1604 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1606 struct table_elt *elt, *next, *new;
1608 /* Ensure we start with the head of the classes. */
1609 class1 = class1->first_same_value;
1610 class2 = class2->first_same_value;
1612 /* If they were already equal, forget it. */
1613 if (class1 == class2)
1616 for (elt = class2; elt; elt = next)
1620 enum machine_mode mode = elt->mode;
1622 next = elt->next_same_value;
1624 /* Remove old entry, make a new one in CLASS1's class.
1625 Don't do this for invalid entries as we cannot find their
1626 hash code (it also isn't necessary). */
1627 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1629 hash_arg_in_memory = 0;
1630 hash = HASH (exp, mode);
1632 if (GET_CODE (exp) == REG)
1633 delete_reg_equiv (REGNO (exp));
1635 remove_from_table (elt, hash);
1637 if (insert_regs (exp, class1, 0))
1639 rehash_using_reg (exp);
1640 hash = HASH (exp, mode);
1642 new = insert (exp, class1, hash, mode);
1643 new->in_memory = hash_arg_in_memory;
1648 /* Flush the entire hash table. */
1651 flush_hash_table (void)
1654 struct table_elt *p;
1656 for (i = 0; i < HASH_SIZE; i++)
1657 for (p = table[i]; p; p = table[i])
1659 /* Note that invalidate can remove elements
1660 after P in the current hash chain. */
1661 if (GET_CODE (p->exp) == REG)
1662 invalidate (p->exp, p->mode);
1664 remove_from_table (p, i);
1668 /* Function called for each rtx to check whether true dependence exist. */
1669 struct check_dependence_data
1671 enum machine_mode mode;
1677 check_dependence (rtx *x, void *data)
1679 struct check_dependence_data *d = (struct check_dependence_data *) data;
1680 if (*x && GET_CODE (*x) == MEM)
1681 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1687 /* Remove from the hash table, or mark as invalid, all expressions whose
1688 values could be altered by storing in X. X is a register, a subreg, or
1689 a memory reference with nonvarying address (because, when a memory
1690 reference with a varying address is stored in, all memory references are
1691 removed by invalidate_memory so specific invalidation is superfluous).
1692 FULL_MODE, if not VOIDmode, indicates that this much should be
1693 invalidated instead of just the amount indicated by the mode of X. This
1694 is only used for bitfield stores into memory.
1696 A nonvarying address may be just a register or just a symbol reference,
1697 or it may be either of those plus a numeric offset. */
1700 invalidate (rtx x, enum machine_mode full_mode)
1703 struct table_elt *p;
1706 switch (GET_CODE (x))
1710 /* If X is a register, dependencies on its contents are recorded
1711 through the qty number mechanism. Just change the qty number of
1712 the register, mark it as invalid for expressions that refer to it,
1713 and remove it itself. */
1714 unsigned int regno = REGNO (x);
1715 unsigned int hash = HASH (x, GET_MODE (x));
1717 /* Remove REGNO from any quantity list it might be on and indicate
1718 that its value might have changed. If it is a pseudo, remove its
1719 entry from the hash table.
1721 For a hard register, we do the first two actions above for any
1722 additional hard registers corresponding to X. Then, if any of these
1723 registers are in the table, we must remove any REG entries that
1724 overlap these registers. */
1726 delete_reg_equiv (regno);
1728 SUBREG_TICKED (regno) = -1;
1730 if (regno >= FIRST_PSEUDO_REGISTER)
1732 /* Because a register can be referenced in more than one mode,
1733 we might have to remove more than one table entry. */
1734 struct table_elt *elt;
1736 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1737 remove_from_table (elt, hash);
1741 HOST_WIDE_INT in_table
1742 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1743 unsigned int endregno
1744 = regno + hard_regno_nregs[regno][GET_MODE (x)];
1745 unsigned int tregno, tendregno, rn;
1746 struct table_elt *p, *next;
1748 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1750 for (rn = regno + 1; rn < endregno; rn++)
1752 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1753 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1754 delete_reg_equiv (rn);
1756 SUBREG_TICKED (rn) = -1;
1760 for (hash = 0; hash < HASH_SIZE; hash++)
1761 for (p = table[hash]; p; p = next)
1763 next = p->next_same_hash;
1765 if (GET_CODE (p->exp) != REG
1766 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1769 tregno = REGNO (p->exp);
1771 = tregno + hard_regno_nregs[tregno][GET_MODE (p->exp)];
1772 if (tendregno > regno && tregno < endregno)
1773 remove_from_table (p, hash);
1780 invalidate (SUBREG_REG (x), VOIDmode);
1784 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1785 invalidate (XVECEXP (x, 0, i), VOIDmode);
1789 /* This is part of a disjoint return value; extract the location in
1790 question ignoring the offset. */
1791 invalidate (XEXP (x, 0), VOIDmode);
1795 addr = canon_rtx (get_addr (XEXP (x, 0)));
1796 /* Calculate the canonical version of X here so that
1797 true_dependence doesn't generate new RTL for X on each call. */
1800 /* Remove all hash table elements that refer to overlapping pieces of
1802 if (full_mode == VOIDmode)
1803 full_mode = GET_MODE (x);
1805 for (i = 0; i < HASH_SIZE; i++)
1807 struct table_elt *next;
1809 for (p = table[i]; p; p = next)
1811 next = p->next_same_hash;
1814 struct check_dependence_data d;
1816 /* Just canonicalize the expression once;
1817 otherwise each time we call invalidate
1818 true_dependence will canonicalize the
1819 expression again. */
1821 p->canon_exp = canon_rtx (p->exp);
1825 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1826 remove_from_table (p, i);
1837 /* Remove all expressions that refer to register REGNO,
1838 since they are already invalid, and we are about to
1839 mark that register valid again and don't want the old
1840 expressions to reappear as valid. */
1843 remove_invalid_refs (unsigned int regno)
1846 struct table_elt *p, *next;
1848 for (i = 0; i < HASH_SIZE; i++)
1849 for (p = table[i]; p; p = next)
1851 next = p->next_same_hash;
1852 if (GET_CODE (p->exp) != REG
1853 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1854 remove_from_table (p, i);
1858 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1861 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1862 enum machine_mode mode)
1865 struct table_elt *p, *next;
1866 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1868 for (i = 0; i < HASH_SIZE; i++)
1869 for (p = table[i]; p; p = next)
1872 next = p->next_same_hash;
1874 if (GET_CODE (exp) != REG
1875 && (GET_CODE (exp) != SUBREG
1876 || GET_CODE (SUBREG_REG (exp)) != REG
1877 || REGNO (SUBREG_REG (exp)) != regno
1878 || (((SUBREG_BYTE (exp)
1879 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1880 && SUBREG_BYTE (exp) <= end))
1881 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1882 remove_from_table (p, i);
1886 /* Recompute the hash codes of any valid entries in the hash table that
1887 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1889 This is called when we make a jump equivalence. */
1892 rehash_using_reg (rtx x)
1895 struct table_elt *p, *next;
1898 if (GET_CODE (x) == SUBREG)
1901 /* If X is not a register or if the register is known not to be in any
1902 valid entries in the table, we have no work to do. */
1904 if (GET_CODE (x) != REG
1905 || REG_IN_TABLE (REGNO (x)) < 0
1906 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1909 /* Scan all hash chains looking for valid entries that mention X.
1910 If we find one and it is in the wrong hash chain, move it. We can skip
1911 objects that are registers, since they are handled specially. */
1913 for (i = 0; i < HASH_SIZE; i++)
1914 for (p = table[i]; p; p = next)
1916 next = p->next_same_hash;
1917 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1918 && exp_equiv_p (p->exp, p->exp, 1, 0)
1919 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1921 if (p->next_same_hash)
1922 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1924 if (p->prev_same_hash)
1925 p->prev_same_hash->next_same_hash = p->next_same_hash;
1927 table[i] = p->next_same_hash;
1929 p->next_same_hash = table[hash];
1930 p->prev_same_hash = 0;
1932 table[hash]->prev_same_hash = p;
1938 /* Remove from the hash table any expression that is a call-clobbered
1939 register. Also update their TICK values. */
1942 invalidate_for_call (void)
1944 unsigned int regno, endregno;
1947 struct table_elt *p, *next;
1950 /* Go through all the hard registers. For each that is clobbered in
1951 a CALL_INSN, remove the register from quantity chains and update
1952 reg_tick if defined. Also see if any of these registers is currently
1955 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1956 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1958 delete_reg_equiv (regno);
1959 if (REG_TICK (regno) >= 0)
1962 SUBREG_TICKED (regno) = -1;
1965 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1968 /* In the case where we have no call-clobbered hard registers in the
1969 table, we are done. Otherwise, scan the table and remove any
1970 entry that overlaps a call-clobbered register. */
1973 for (hash = 0; hash < HASH_SIZE; hash++)
1974 for (p = table[hash]; p; p = next)
1976 next = p->next_same_hash;
1978 if (GET_CODE (p->exp) != REG
1979 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1982 regno = REGNO (p->exp);
1983 endregno = regno + hard_regno_nregs[regno][GET_MODE (p->exp)];
1985 for (i = regno; i < endregno; i++)
1986 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1988 remove_from_table (p, hash);
1994 /* Given an expression X of type CONST,
1995 and ELT which is its table entry (or 0 if it
1996 is not in the hash table),
1997 return an alternate expression for X as a register plus integer.
1998 If none can be found, return 0. */
2001 use_related_value (rtx x, struct table_elt *elt)
2003 struct table_elt *relt = 0;
2004 struct table_elt *p, *q;
2005 HOST_WIDE_INT offset;
2007 /* First, is there anything related known?
2008 If we have a table element, we can tell from that.
2009 Otherwise, must look it up. */
2011 if (elt != 0 && elt->related_value != 0)
2013 else if (elt == 0 && GET_CODE (x) == CONST)
2015 rtx subexp = get_related_value (x);
2017 relt = lookup (subexp,
2018 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2025 /* Search all related table entries for one that has an
2026 equivalent register. */
2031 /* This loop is strange in that it is executed in two different cases.
2032 The first is when X is already in the table. Then it is searching
2033 the RELATED_VALUE list of X's class (RELT). The second case is when
2034 X is not in the table. Then RELT points to a class for the related
2037 Ensure that, whatever case we are in, that we ignore classes that have
2038 the same value as X. */
2040 if (rtx_equal_p (x, p->exp))
2043 for (q = p->first_same_value; q; q = q->next_same_value)
2044 if (GET_CODE (q->exp) == REG)
2050 p = p->related_value;
2052 /* We went all the way around, so there is nothing to be found.
2053 Alternatively, perhaps RELT was in the table for some other reason
2054 and it has no related values recorded. */
2055 if (p == relt || p == 0)
2062 offset = (get_integer_term (x) - get_integer_term (p->exp));
2063 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2064 return plus_constant (q->exp, offset);
2067 /* Hash a string. Just add its bytes up. */
2068 static inline unsigned
2069 canon_hash_string (const char *ps)
2072 const unsigned char *p = (const unsigned char *) ps;
2081 /* Hash an rtx. We are careful to make sure the value is never negative.
2082 Equivalent registers hash identically.
2083 MODE is used in hashing for CONST_INTs only;
2084 otherwise the mode of X is used.
2086 Store 1 in do_not_record if any subexpression is volatile.
2088 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2089 which does not have the RTX_UNCHANGING_P bit set.
2091 Note that cse_insn knows that the hash code of a MEM expression
2092 is just (int) MEM plus the hash code of the address. */
2095 canon_hash (rtx x, enum machine_mode mode)
2102 /* repeat is used to turn tail-recursion into iteration. */
2107 code = GET_CODE (x);
2112 unsigned int regno = REGNO (x);
2115 /* On some machines, we can't record any non-fixed hard register,
2116 because extending its life will cause reload problems. We
2117 consider ap, fp, sp, gp to be fixed for this purpose.
2119 We also consider CCmode registers to be fixed for this purpose;
2120 failure to do so leads to failure to simplify 0<100 type of
2123 On all machines, we can't record any global registers.
2124 Nor should we record any register that is in a small
2125 class, as defined by CLASS_LIKELY_SPILLED_P. */
2127 if (regno >= FIRST_PSEUDO_REGISTER)
2129 else if (x == frame_pointer_rtx
2130 || x == hard_frame_pointer_rtx
2131 || x == arg_pointer_rtx
2132 || x == stack_pointer_rtx
2133 || x == pic_offset_table_rtx)
2135 else if (global_regs[regno])
2137 else if (fixed_regs[regno])
2139 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2141 else if (SMALL_REGISTER_CLASSES)
2143 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2154 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2158 /* We handle SUBREG of a REG specially because the underlying
2159 reg changes its hash value with every value change; we don't
2160 want to have to forget unrelated subregs when one subreg changes. */
2163 if (GET_CODE (SUBREG_REG (x)) == REG)
2165 hash += (((unsigned) SUBREG << 7)
2166 + REGNO (SUBREG_REG (x))
2167 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2175 unsigned HOST_WIDE_INT tem = INTVAL (x);
2176 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2181 /* This is like the general case, except that it only counts
2182 the integers representing the constant. */
2183 hash += (unsigned) code + (unsigned) GET_MODE (x);
2184 if (GET_MODE (x) != VOIDmode)
2185 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2187 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2188 + (unsigned) CONST_DOUBLE_HIGH (x));
2196 units = CONST_VECTOR_NUNITS (x);
2198 for (i = 0; i < units; ++i)
2200 elt = CONST_VECTOR_ELT (x, i);
2201 hash += canon_hash (elt, GET_MODE (elt));
2207 /* Assume there is only one rtx object for any given label. */
2209 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2213 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2217 /* We don't record if marked volatile or if BLKmode since we don't
2218 know the size of the move. */
2219 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2224 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2225 hash_arg_in_memory = 1;
2227 /* Now that we have already found this special case,
2228 might as well speed it up as much as possible. */
2229 hash += (unsigned) MEM;
2234 /* A USE that mentions non-volatile memory needs special
2235 handling since the MEM may be BLKmode which normally
2236 prevents an entry from being made. Pure calls are
2237 marked by a USE which mentions BLKmode memory. */
2238 if (GET_CODE (XEXP (x, 0)) == MEM
2239 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2241 hash += (unsigned) USE;
2244 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2245 hash_arg_in_memory = 1;
2247 /* Now that we have already found this special case,
2248 might as well speed it up as much as possible. */
2249 hash += (unsigned) MEM;
2264 case UNSPEC_VOLATILE:
2269 if (MEM_VOLATILE_P (x))
2276 /* We don't want to take the filename and line into account. */
2277 hash += (unsigned) code + (unsigned) GET_MODE (x)
2278 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2279 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2280 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2282 if (ASM_OPERANDS_INPUT_LENGTH (x))
2284 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2286 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2287 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2288 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2292 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2293 x = ASM_OPERANDS_INPUT (x, 0);
2294 mode = GET_MODE (x);
2306 i = GET_RTX_LENGTH (code) - 1;
2307 hash += (unsigned) code + (unsigned) GET_MODE (x);
2308 fmt = GET_RTX_FORMAT (code);
2313 rtx tem = XEXP (x, i);
2315 /* If we are about to do the last recursive call
2316 needed at this level, change it into iteration.
2317 This function is called enough to be worth it. */
2323 hash += canon_hash (tem, 0);
2325 else if (fmt[i] == 'E')
2326 for (j = 0; j < XVECLEN (x, i); j++)
2327 hash += canon_hash (XVECEXP (x, i, j), 0);
2328 else if (fmt[i] == 's')
2329 hash += canon_hash_string (XSTR (x, i));
2330 else if (fmt[i] == 'i')
2332 unsigned tem = XINT (x, i);
2335 else if (fmt[i] == '0' || fmt[i] == 't')
2344 /* Like canon_hash but with no side effects. */
2347 safe_hash (rtx x, enum machine_mode mode)
2349 int save_do_not_record = do_not_record;
2350 int save_hash_arg_in_memory = hash_arg_in_memory;
2351 unsigned hash = canon_hash (x, mode);
2352 hash_arg_in_memory = save_hash_arg_in_memory;
2353 do_not_record = save_do_not_record;
2357 /* Return 1 iff X and Y would canonicalize into the same thing,
2358 without actually constructing the canonicalization of either one.
2359 If VALIDATE is nonzero,
2360 we assume X is an expression being processed from the rtl
2361 and Y was found in the hash table. We check register refs
2362 in Y for being marked as valid.
2364 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2365 that is known to be in the register. Ordinarily, we don't allow them
2366 to match, because letting them match would cause unpredictable results
2367 in all the places that search a hash table chain for an equivalent
2368 for a given value. A possible equivalent that has different structure
2369 has its hash code computed from different data. Whether the hash code
2370 is the same as that of the given value is pure luck. */
2373 exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
2379 /* Note: it is incorrect to assume an expression is equivalent to itself
2380 if VALIDATE is nonzero. */
2381 if (x == y && !validate)
2383 if (x == 0 || y == 0)
2386 code = GET_CODE (x);
2387 if (code != GET_CODE (y))
2392 /* If X is a constant and Y is a register or vice versa, they may be
2393 equivalent. We only have to validate if Y is a register. */
2394 if (CONSTANT_P (x) && GET_CODE (y) == REG
2395 && REGNO_QTY_VALID_P (REGNO (y)))
2397 int y_q = REG_QTY (REGNO (y));
2398 struct qty_table_elem *y_ent = &qty_table[y_q];
2400 if (GET_MODE (y) == y_ent->mode
2401 && rtx_equal_p (x, y_ent->const_rtx)
2402 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2406 if (CONSTANT_P (y) && code == REG
2407 && REGNO_QTY_VALID_P (REGNO (x)))
2409 int x_q = REG_QTY (REGNO (x));
2410 struct qty_table_elem *x_ent = &qty_table[x_q];
2412 if (GET_MODE (x) == x_ent->mode
2413 && rtx_equal_p (y, x_ent->const_rtx))
2420 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2421 if (GET_MODE (x) != GET_MODE (y))
2432 return XEXP (x, 0) == XEXP (y, 0);
2435 return XSTR (x, 0) == XSTR (y, 0);
2439 unsigned int regno = REGNO (y);
2440 unsigned int endregno
2441 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2442 : hard_regno_nregs[regno][GET_MODE (y)]);
2445 /* If the quantities are not the same, the expressions are not
2446 equivalent. If there are and we are not to validate, they
2447 are equivalent. Otherwise, ensure all regs are up-to-date. */
2449 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2455 for (i = regno; i < endregno; i++)
2456 if (REG_IN_TABLE (i) != REG_TICK (i))
2462 /* For commutative operations, check both orders. */
2470 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2471 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2472 validate, equal_values))
2473 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2474 validate, equal_values)
2475 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2476 validate, equal_values)));
2479 /* We don't use the generic code below because we want to
2480 disregard filename and line numbers. */
2482 /* A volatile asm isn't equivalent to any other. */
2483 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2486 if (GET_MODE (x) != GET_MODE (y)
2487 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2488 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2489 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2490 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2491 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2494 if (ASM_OPERANDS_INPUT_LENGTH (x))
2496 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2497 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2498 ASM_OPERANDS_INPUT (y, i),
2499 validate, equal_values)
2500 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2501 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2511 /* Compare the elements. If any pair of corresponding elements
2512 fail to match, return 0 for the whole things. */
2514 fmt = GET_RTX_FORMAT (code);
2515 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2520 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2525 if (XVECLEN (x, i) != XVECLEN (y, i))
2527 for (j = 0; j < XVECLEN (x, i); j++)
2528 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2529 validate, equal_values))
2534 if (strcmp (XSTR (x, i), XSTR (y, i)))
2539 if (XINT (x, i) != XINT (y, i))
2544 if (XWINT (x, i) != XWINT (y, i))
2560 /* Return 1 if X has a value that can vary even between two
2561 executions of the program. 0 means X can be compared reliably
2562 against certain constants or near-constants. */
2565 cse_rtx_varies_p (rtx x, int from_alias)
2567 /* We need not check for X and the equivalence class being of the same
2568 mode because if X is equivalent to a constant in some mode, it
2569 doesn't vary in any mode. */
2571 if (GET_CODE (x) == REG
2572 && REGNO_QTY_VALID_P (REGNO (x)))
2574 int x_q = REG_QTY (REGNO (x));
2575 struct qty_table_elem *x_ent = &qty_table[x_q];
2577 if (GET_MODE (x) == x_ent->mode
2578 && x_ent->const_rtx != NULL_RTX)
2582 if (GET_CODE (x) == PLUS
2583 && GET_CODE (XEXP (x, 1)) == CONST_INT
2584 && GET_CODE (XEXP (x, 0)) == REG
2585 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2587 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2588 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2590 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2591 && x0_ent->const_rtx != NULL_RTX)
2595 /* This can happen as the result of virtual register instantiation, if
2596 the initial constant is too large to be a valid address. This gives
2597 us a three instruction sequence, load large offset into a register,
2598 load fp minus a constant into a register, then a MEM which is the
2599 sum of the two `constant' registers. */
2600 if (GET_CODE (x) == PLUS
2601 && GET_CODE (XEXP (x, 0)) == REG
2602 && GET_CODE (XEXP (x, 1)) == REG
2603 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2604 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2606 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2607 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2608 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2609 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2611 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2612 && x0_ent->const_rtx != NULL_RTX
2613 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2614 && x1_ent->const_rtx != NULL_RTX)
2618 return rtx_varies_p (x, from_alias);
2621 /* Canonicalize an expression:
2622 replace each register reference inside it
2623 with the "oldest" equivalent register.
2625 If INSN is nonzero and we are replacing a pseudo with a hard register
2626 or vice versa, validate_change is used to ensure that INSN remains valid
2627 after we make our substitution. The calls are made with IN_GROUP nonzero
2628 so apply_change_group must be called upon the outermost return from this
2629 function (unless INSN is zero). The result of apply_change_group can
2630 generally be discarded since the changes we are making are optional. */
2633 canon_reg (rtx x, rtx insn)
2642 code = GET_CODE (x);
2661 struct qty_table_elem *ent;
2663 /* Never replace a hard reg, because hard regs can appear
2664 in more than one machine mode, and we must preserve the mode
2665 of each occurrence. Also, some hard regs appear in
2666 MEMs that are shared and mustn't be altered. Don't try to
2667 replace any reg that maps to a reg of class NO_REGS. */
2668 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2669 || ! REGNO_QTY_VALID_P (REGNO (x)))
2672 q = REG_QTY (REGNO (x));
2673 ent = &qty_table[q];
2674 first = ent->first_reg;
2675 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2676 : REGNO_REG_CLASS (first) == NO_REGS ? x
2677 : gen_rtx_REG (ent->mode, first));
2684 fmt = GET_RTX_FORMAT (code);
2685 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2691 rtx new = canon_reg (XEXP (x, i), insn);
2694 /* If replacing pseudo with hard reg or vice versa, ensure the
2695 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2696 if (insn != 0 && new != 0
2697 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2698 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2699 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2700 || (insn_code = recog_memoized (insn)) < 0
2701 || insn_data[insn_code].n_dups > 0))
2702 validate_change (insn, &XEXP (x, i), new, 1);
2706 else if (fmt[i] == 'E')
2707 for (j = 0; j < XVECLEN (x, i); j++)
2708 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2714 /* LOC is a location within INSN that is an operand address (the contents of
2715 a MEM). Find the best equivalent address to use that is valid for this
2718 On most CISC machines, complicated address modes are costly, and rtx_cost
2719 is a good approximation for that cost. However, most RISC machines have
2720 only a few (usually only one) memory reference formats. If an address is
2721 valid at all, it is often just as cheap as any other address. Hence, for
2722 RISC machines, we use `address_cost' to compare the costs of various
2723 addresses. For two addresses of equal cost, choose the one with the
2724 highest `rtx_cost' value as that has the potential of eliminating the
2725 most insns. For equal costs, we choose the first in the equivalence
2726 class. Note that we ignore the fact that pseudo registers are cheaper than
2727 hard registers here because we would also prefer the pseudo registers. */
2730 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2732 struct table_elt *elt;
2734 struct table_elt *p;
2735 int found_better = 1;
2736 int save_do_not_record = do_not_record;
2737 int save_hash_arg_in_memory = hash_arg_in_memory;
2742 /* Do not try to replace constant addresses or addresses of local and
2743 argument slots. These MEM expressions are made only once and inserted
2744 in many instructions, as well as being used to control symbol table
2745 output. It is not safe to clobber them.
2747 There are some uncommon cases where the address is already in a register
2748 for some reason, but we cannot take advantage of that because we have
2749 no easy way to unshare the MEM. In addition, looking up all stack
2750 addresses is costly. */
2751 if ((GET_CODE (addr) == PLUS
2752 && GET_CODE (XEXP (addr, 0)) == REG
2753 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2754 && (regno = REGNO (XEXP (addr, 0)),
2755 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2756 || regno == ARG_POINTER_REGNUM))
2757 || (GET_CODE (addr) == REG
2758 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2759 || regno == HARD_FRAME_POINTER_REGNUM
2760 || regno == ARG_POINTER_REGNUM))
2761 || GET_CODE (addr) == ADDRESSOF
2762 || CONSTANT_ADDRESS_P (addr))
2765 /* If this address is not simply a register, try to fold it. This will
2766 sometimes simplify the expression. Many simplifications
2767 will not be valid, but some, usually applying the associative rule, will
2768 be valid and produce better code. */
2769 if (GET_CODE (addr) != REG)
2771 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2772 int addr_folded_cost = address_cost (folded, mode);
2773 int addr_cost = address_cost (addr, mode);
2775 if ((addr_folded_cost < addr_cost
2776 || (addr_folded_cost == addr_cost
2777 /* ??? The rtx_cost comparison is left over from an older
2778 version of this code. It is probably no longer helpful. */
2779 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2780 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2781 && validate_change (insn, loc, folded, 0))
2785 /* If this address is not in the hash table, we can't look for equivalences
2786 of the whole address. Also, ignore if volatile. */
2789 hash = HASH (addr, Pmode);
2790 addr_volatile = do_not_record;
2791 do_not_record = save_do_not_record;
2792 hash_arg_in_memory = save_hash_arg_in_memory;
2797 elt = lookup (addr, hash, Pmode);
2801 /* We need to find the best (under the criteria documented above) entry
2802 in the class that is valid. We use the `flag' field to indicate
2803 choices that were invalid and iterate until we can't find a better
2804 one that hasn't already been tried. */
2806 for (p = elt->first_same_value; p; p = p->next_same_value)
2809 while (found_better)
2811 int best_addr_cost = address_cost (*loc, mode);
2812 int best_rtx_cost = (elt->cost + 1) >> 1;
2814 struct table_elt *best_elt = elt;
2817 for (p = elt->first_same_value; p; p = p->next_same_value)
2820 if ((GET_CODE (p->exp) == REG
2821 || exp_equiv_p (p->exp, p->exp, 1, 0))
2822 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2823 || (exp_cost == best_addr_cost
2824 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2827 best_addr_cost = exp_cost;
2828 best_rtx_cost = (p->cost + 1) >> 1;
2835 if (validate_change (insn, loc,
2836 canon_reg (copy_rtx (best_elt->exp),
2845 /* If the address is a binary operation with the first operand a register
2846 and the second a constant, do the same as above, but looking for
2847 equivalences of the register. Then try to simplify before checking for
2848 the best address to use. This catches a few cases: First is when we
2849 have REG+const and the register is another REG+const. We can often merge
2850 the constants and eliminate one insn and one register. It may also be
2851 that a machine has a cheap REG+REG+const. Finally, this improves the
2852 code on the Alpha for unaligned byte stores. */
2854 if (flag_expensive_optimizations
2855 && ARITHMETIC_P (*loc)
2856 && GET_CODE (XEXP (*loc, 0)) == REG)
2858 rtx op1 = XEXP (*loc, 1);
2861 hash = HASH (XEXP (*loc, 0), Pmode);
2862 do_not_record = save_do_not_record;
2863 hash_arg_in_memory = save_hash_arg_in_memory;
2865 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2869 /* We need to find the best (under the criteria documented above) entry
2870 in the class that is valid. We use the `flag' field to indicate
2871 choices that were invalid and iterate until we can't find a better
2872 one that hasn't already been tried. */
2874 for (p = elt->first_same_value; p; p = p->next_same_value)
2877 while (found_better)
2879 int best_addr_cost = address_cost (*loc, mode);
2880 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2881 struct table_elt *best_elt = elt;
2882 rtx best_rtx = *loc;
2885 /* This is at worst case an O(n^2) algorithm, so limit our search
2886 to the first 32 elements on the list. This avoids trouble
2887 compiling code with very long basic blocks that can easily
2888 call simplify_gen_binary so many times that we run out of
2892 for (p = elt->first_same_value, count = 0;
2894 p = p->next_same_value, count++)
2896 && (GET_CODE (p->exp) == REG
2897 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2899 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2902 new_cost = address_cost (new, mode);
2904 if (new_cost < best_addr_cost
2905 || (new_cost == best_addr_cost
2906 && (COST (new) + 1) >> 1 > best_rtx_cost))
2909 best_addr_cost = new_cost;
2910 best_rtx_cost = (COST (new) + 1) >> 1;
2918 if (validate_change (insn, loc,
2919 canon_reg (copy_rtx (best_rtx),
2929 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2930 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2931 what values are being compared.
2933 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2934 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2935 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2936 compared to produce cc0.
2938 The return value is the comparison operator and is either the code of
2939 A or the code corresponding to the inverse of the comparison. */
2941 static enum rtx_code
2942 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2943 enum machine_mode *pmode1, enum machine_mode *pmode2)
2947 arg1 = *parg1, arg2 = *parg2;
2949 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2951 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2953 /* Set nonzero when we find something of interest. */
2955 int reverse_code = 0;
2956 struct table_elt *p = 0;
2958 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2959 On machines with CC0, this is the only case that can occur, since
2960 fold_rtx will return the COMPARE or item being compared with zero
2963 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2966 /* If ARG1 is a comparison operator and CODE is testing for
2967 STORE_FLAG_VALUE, get the inner arguments. */
2969 else if (COMPARISON_P (arg1))
2971 #ifdef FLOAT_STORE_FLAG_VALUE
2972 REAL_VALUE_TYPE fsfv;
2976 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2977 && code == LT && STORE_FLAG_VALUE == -1)
2978 #ifdef FLOAT_STORE_FLAG_VALUE
2979 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2980 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2981 REAL_VALUE_NEGATIVE (fsfv)))
2986 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2987 && code == GE && STORE_FLAG_VALUE == -1)
2988 #ifdef FLOAT_STORE_FLAG_VALUE
2989 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2990 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
2991 REAL_VALUE_NEGATIVE (fsfv)))
2994 x = arg1, reverse_code = 1;
2997 /* ??? We could also check for
2999 (ne (and (eq (...) (const_int 1))) (const_int 0))
3001 and related forms, but let's wait until we see them occurring. */
3004 /* Look up ARG1 in the hash table and see if it has an equivalence
3005 that lets us see what is being compared. */
3006 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3010 p = p->first_same_value;
3012 /* If what we compare is already known to be constant, that is as
3014 We need to break the loop in this case, because otherwise we
3015 can have an infinite loop when looking at a reg that is known
3016 to be a constant which is the same as a comparison of a reg
3017 against zero which appears later in the insn stream, which in
3018 turn is constant and the same as the comparison of the first reg
3024 for (; p; p = p->next_same_value)
3026 enum machine_mode inner_mode = GET_MODE (p->exp);
3027 #ifdef FLOAT_STORE_FLAG_VALUE
3028 REAL_VALUE_TYPE fsfv;
3031 /* If the entry isn't valid, skip it. */
3032 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3035 if (GET_CODE (p->exp) == COMPARE
3036 /* Another possibility is that this machine has a compare insn
3037 that includes the comparison code. In that case, ARG1 would
3038 be equivalent to a comparison operation that would set ARG1 to
3039 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3040 ORIG_CODE is the actual comparison being done; if it is an EQ,
3041 we must reverse ORIG_CODE. On machine with a negative value
3042 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3045 && GET_MODE_CLASS (inner_mode) == MODE_INT
3046 && (GET_MODE_BITSIZE (inner_mode)
3047 <= HOST_BITS_PER_WIDE_INT)
3048 && (STORE_FLAG_VALUE
3049 & ((HOST_WIDE_INT) 1
3050 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3051 #ifdef FLOAT_STORE_FLAG_VALUE
3053 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3054 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3055 REAL_VALUE_NEGATIVE (fsfv)))
3058 && COMPARISON_P (p->exp)))
3063 else if ((code == EQ
3065 && GET_MODE_CLASS (inner_mode) == MODE_INT
3066 && (GET_MODE_BITSIZE (inner_mode)
3067 <= HOST_BITS_PER_WIDE_INT)
3068 && (STORE_FLAG_VALUE
3069 & ((HOST_WIDE_INT) 1
3070 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3071 #ifdef FLOAT_STORE_FLAG_VALUE
3073 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3074 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3075 REAL_VALUE_NEGATIVE (fsfv)))
3078 && COMPARISON_P (p->exp))
3085 /* If this non-trapping address, e.g. fp + constant, the
3086 equivalent is a better operand since it may let us predict
3087 the value of the comparison. */
3088 else if (!rtx_addr_can_trap_p (p->exp))
3095 /* If we didn't find a useful equivalence for ARG1, we are done.
3096 Otherwise, set up for the next iteration. */
3100 /* If we need to reverse the comparison, make sure that that is
3101 possible -- we can't necessarily infer the value of GE from LT
3102 with floating-point operands. */
3105 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3106 if (reversed == UNKNOWN)
3111 else if (COMPARISON_P (x))
3112 code = GET_CODE (x);
3113 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3116 /* Return our results. Return the modes from before fold_rtx
3117 because fold_rtx might produce const_int, and then it's too late. */
3118 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3119 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3124 /* If X is a nontrivial arithmetic operation on an argument
3125 for which a constant value can be determined, return
3126 the result of operating on that value, as a constant.
3127 Otherwise, return X, possibly with one or more operands
3128 modified by recursive calls to this function.
3130 If X is a register whose contents are known, we do NOT
3131 return those contents here. equiv_constant is called to
3134 INSN is the insn that we may be modifying. If it is 0, make a copy
3135 of X before modifying it. */
3138 fold_rtx (rtx x, rtx insn)
3141 enum machine_mode mode;
3148 /* Folded equivalents of first two operands of X. */
3152 /* Constant equivalents of first three operands of X;
3153 0 when no such equivalent is known. */
3158 /* The mode of the first operand of X. We need this for sign and zero
3160 enum machine_mode mode_arg0;
3165 mode = GET_MODE (x);
3166 code = GET_CODE (x);
3176 /* No use simplifying an EXPR_LIST
3177 since they are used only for lists of args
3178 in a function call's REG_EQUAL note. */
3180 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3181 want to (e.g.,) make (addressof (const_int 0)) just because
3182 the location is known to be zero. */
3188 return prev_insn_cc0;
3192 /* If the next insn is a CODE_LABEL followed by a jump table,
3193 PC's value is a LABEL_REF pointing to that label. That
3194 lets us fold switch statements on the VAX. */
3197 if (insn && tablejump_p (insn, &next, NULL))
3198 return gen_rtx_LABEL_REF (Pmode, next);
3203 /* See if we previously assigned a constant value to this SUBREG. */
3204 if ((new = lookup_as_function (x, CONST_INT)) != 0
3205 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3208 /* If this is a paradoxical SUBREG, we have no idea what value the
3209 extra bits would have. However, if the operand is equivalent
3210 to a SUBREG whose operand is the same as our mode, and all the
3211 modes are within a word, we can just use the inner operand
3212 because these SUBREGs just say how to treat the register.
3214 Similarly if we find an integer constant. */
3216 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3218 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3219 struct table_elt *elt;
3221 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3222 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3223 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3225 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3227 if (CONSTANT_P (elt->exp)
3228 && GET_MODE (elt->exp) == VOIDmode)
3231 if (GET_CODE (elt->exp) == SUBREG
3232 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3233 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3234 return copy_rtx (SUBREG_REG (elt->exp));
3240 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3241 We might be able to if the SUBREG is extracting a single word in an
3242 integral mode or extracting the low part. */
3244 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3245 const_arg0 = equiv_constant (folded_arg0);
3247 folded_arg0 = const_arg0;
3249 if (folded_arg0 != SUBREG_REG (x))
3251 new = simplify_subreg (mode, folded_arg0,
3252 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3257 if (GET_CODE (folded_arg0) == REG
3258 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
3260 struct table_elt *elt;
3262 /* We can use HASH here since we know that canon_hash won't be
3264 elt = lookup (folded_arg0,
3265 HASH (folded_arg0, GET_MODE (folded_arg0)),
3266 GET_MODE (folded_arg0));
3269 elt = elt->first_same_value;
3271 if (subreg_lowpart_p (x))
3272 /* If this is a narrowing SUBREG and our operand is a REG, see
3273 if we can find an equivalence for REG that is an arithmetic
3274 operation in a wider mode where both operands are paradoxical
3275 SUBREGs from objects of our result mode. In that case, we
3276 couldn-t report an equivalent value for that operation, since we
3277 don't know what the extra bits will be. But we can find an
3278 equivalence for this SUBREG by folding that operation in the
3279 narrow mode. This allows us to fold arithmetic in narrow modes
3280 when the machine only supports word-sized arithmetic.
3282 Also look for a case where we have a SUBREG whose operand
3283 is the same as our result. If both modes are smaller
3284 than a word, we are simply interpreting a register in
3285 different modes and we can use the inner value. */
3287 for (; elt; elt = elt->next_same_value)
3289 enum rtx_code eltcode = GET_CODE (elt->exp);
3291 /* Just check for unary and binary operations. */
3292 if (UNARY_P (elt->exp)
3293 && eltcode != SIGN_EXTEND
3294 && eltcode != ZERO_EXTEND
3295 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3296 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3297 && (GET_MODE_CLASS (mode)
3298 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3300 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3302 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3303 op0 = fold_rtx (op0, NULL_RTX);
3305 op0 = equiv_constant (op0);
3307 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3310 else if (ARITHMETIC_P (elt->exp)
3311 && eltcode != DIV && eltcode != MOD
3312 && eltcode != UDIV && eltcode != UMOD
3313 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3314 && eltcode != ROTATE && eltcode != ROTATERT
3315 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3316 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3318 || CONSTANT_P (XEXP (elt->exp, 0)))
3319 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3320 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3322 || CONSTANT_P (XEXP (elt->exp, 1))))
3324 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3325 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3327 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3328 op0 = fold_rtx (op0, NULL_RTX);
3331 op0 = equiv_constant (op0);
3333 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3334 op1 = fold_rtx (op1, NULL_RTX);
3337 op1 = equiv_constant (op1);
3339 /* If we are looking for the low SImode part of
3340 (ashift:DI c (const_int 32)), it doesn't work
3341 to compute that in SImode, because a 32-bit shift
3342 in SImode is unpredictable. We know the value is 0. */
3344 && GET_CODE (elt->exp) == ASHIFT
3345 && GET_CODE (op1) == CONST_INT
3346 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3349 < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3350 /* If the count fits in the inner mode's width,
3351 but exceeds the outer mode's width,
3352 the value will get truncated to 0
3354 new = CONST0_RTX (mode);
3356 /* If the count exceeds even the inner mode's width,
3357 don't fold this expression. */
3360 else if (op0 && op1)
3361 new = simplify_binary_operation (GET_CODE (elt->exp), mode, op0, op1);
3364 else if (GET_CODE (elt->exp) == SUBREG
3365 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3366 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3368 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3369 new = copy_rtx (SUBREG_REG (elt->exp));
3375 /* A SUBREG resulting from a zero extension may fold to zero if
3376 it extracts higher bits than the ZERO_EXTEND's source bits.
3377 FIXME: if combine tried to, er, combine these instructions,
3378 this transformation may be moved to simplify_subreg. */
3379 for (; elt; elt = elt->next_same_value)
3381 if (GET_CODE (elt->exp) == ZERO_EXTEND
3383 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt->exp, 0))))
3384 return CONST0_RTX (mode);
3392 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3393 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3394 new = lookup_as_function (XEXP (x, 0), code);
3396 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3400 /* If we are not actually processing an insn, don't try to find the
3401 best address. Not only don't we care, but we could modify the
3402 MEM in an invalid way since we have no insn to validate against. */
3404 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3407 /* Even if we don't fold in the insn itself,
3408 we can safely do so here, in hopes of getting a constant. */
3409 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3411 HOST_WIDE_INT offset = 0;
3413 if (GET_CODE (addr) == REG
3414 && REGNO_QTY_VALID_P (REGNO (addr)))
3416 int addr_q = REG_QTY (REGNO (addr));
3417 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3419 if (GET_MODE (addr) == addr_ent->mode
3420 && addr_ent->const_rtx != NULL_RTX)
3421 addr = addr_ent->const_rtx;
3424 /* If address is constant, split it into a base and integer offset. */
3425 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3427 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3428 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3430 base = XEXP (XEXP (addr, 0), 0);
3431 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3433 else if (GET_CODE (addr) == LO_SUM
3434 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3435 base = XEXP (addr, 1);
3436 else if (GET_CODE (addr) == ADDRESSOF)
3437 return change_address (x, VOIDmode, addr);
3439 /* If this is a constant pool reference, we can fold it into its
3440 constant to allow better value tracking. */
3441 if (base && GET_CODE (base) == SYMBOL_REF
3442 && CONSTANT_POOL_ADDRESS_P (base))
3444 rtx constant = get_pool_constant (base);
3445 enum machine_mode const_mode = get_pool_mode (base);
3448 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3450 constant_pool_entries_cost = COST (constant);
3451 constant_pool_entries_regcost = approx_reg_cost (constant);
3454 /* If we are loading the full constant, we have an equivalence. */
3455 if (offset == 0 && mode == const_mode)
3458 /* If this actually isn't a constant (weird!), we can't do
3459 anything. Otherwise, handle the two most common cases:
3460 extracting a word from a multi-word constant, and extracting
3461 the low-order bits. Other cases don't seem common enough to
3463 if (! CONSTANT_P (constant))
3466 if (GET_MODE_CLASS (mode) == MODE_INT
3467 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3468 && offset % UNITS_PER_WORD == 0
3469 && (new = operand_subword (constant,
3470 offset / UNITS_PER_WORD,
3471 0, const_mode)) != 0)
3474 if (((BYTES_BIG_ENDIAN
3475 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3476 || (! BYTES_BIG_ENDIAN && offset == 0))
3477 && (new = gen_lowpart (mode, constant)) != 0)
3481 /* If this is a reference to a label at a known position in a jump
3482 table, we also know its value. */
3483 if (base && GET_CODE (base) == LABEL_REF)
3485 rtx label = XEXP (base, 0);
3486 rtx table_insn = NEXT_INSN (label);
3488 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3489 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3491 rtx table = PATTERN (table_insn);
3494 && (offset / GET_MODE_SIZE (GET_MODE (table))
3495 < XVECLEN (table, 0)))
3496 return XVECEXP (table, 0,
3497 offset / GET_MODE_SIZE (GET_MODE (table)));
3499 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3500 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3502 rtx table = PATTERN (table_insn);
3505 && (offset / GET_MODE_SIZE (GET_MODE (table))
3506 < XVECLEN (table, 1)))
3508 offset /= GET_MODE_SIZE (GET_MODE (table));
3509 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3512 if (GET_MODE (table) != Pmode)
3513 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3515 /* Indicate this is a constant. This isn't a
3516 valid form of CONST, but it will only be used
3517 to fold the next insns and then discarded, so
3520 Note this expression must be explicitly discarded,
3521 by cse_insn, else it may end up in a REG_EQUAL note
3522 and "escape" to cause problems elsewhere. */
3523 return gen_rtx_CONST (GET_MODE (new), new);
3531 #ifdef NO_FUNCTION_CSE
3533 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3539 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3540 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3541 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3551 mode_arg0 = VOIDmode;
3553 /* Try folding our operands.
3554 Then see which ones have constant values known. */
3556 fmt = GET_RTX_FORMAT (code);
3557 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3560 rtx arg = XEXP (x, i);
3561 rtx folded_arg = arg, const_arg = 0;
3562 enum machine_mode mode_arg = GET_MODE (arg);
3563 rtx cheap_arg, expensive_arg;
3564 rtx replacements[2];
3566 int old_cost = COST_IN (XEXP (x, i), code);
3568 /* Most arguments are cheap, so handle them specially. */
3569 switch (GET_CODE (arg))
3572 /* This is the same as calling equiv_constant; it is duplicated
3574 if (REGNO_QTY_VALID_P (REGNO (arg)))
3576 int arg_q = REG_QTY (REGNO (arg));
3577 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3579 if (arg_ent->const_rtx != NULL_RTX
3580 && GET_CODE (arg_ent->const_rtx) != REG
3581 && GET_CODE (arg_ent->const_rtx) != PLUS)
3583 = gen_lowpart (GET_MODE (arg),
3584 arg_ent->const_rtx);
3599 folded_arg = prev_insn_cc0;
3600 mode_arg = prev_insn_cc0_mode;
3601 const_arg = equiv_constant (folded_arg);
3606 folded_arg = fold_rtx (arg, insn);
3607 const_arg = equiv_constant (folded_arg);
3610 /* For the first three operands, see if the operand
3611 is constant or equivalent to a constant. */
3615 folded_arg0 = folded_arg;
3616 const_arg0 = const_arg;
3617 mode_arg0 = mode_arg;
3620 folded_arg1 = folded_arg;
3621 const_arg1 = const_arg;
3624 const_arg2 = const_arg;
3628 /* Pick the least expensive of the folded argument and an
3629 equivalent constant argument. */
3630 if (const_arg == 0 || const_arg == folded_arg
3631 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3632 cheap_arg = folded_arg, expensive_arg = const_arg;
3634 cheap_arg = const_arg, expensive_arg = folded_arg;
3636 /* Try to replace the operand with the cheapest of the two
3637 possibilities. If it doesn't work and this is either of the first
3638 two operands of a commutative operation, try swapping them.
3639 If THAT fails, try the more expensive, provided it is cheaper
3640 than what is already there. */
3642 if (cheap_arg == XEXP (x, i))
3645 if (insn == 0 && ! copied)
3651 /* Order the replacements from cheapest to most expensive. */
3652 replacements[0] = cheap_arg;
3653 replacements[1] = expensive_arg;
3655 for (j = 0; j < 2 && replacements[j]; j++)
3657 int new_cost = COST_IN (replacements[j], code);
3659 /* Stop if what existed before was cheaper. Prefer constants
3660 in the case of a tie. */
3661 if (new_cost > old_cost
3662 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3665 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3668 if (GET_RTX_CLASS (code) == RTX_COMM_COMPARE
3669 || GET_RTX_CLASS (code) == RTX_COMM_ARITH)
3671 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3672 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3674 if (apply_change_group ())
3676 /* Swap them back to be invalid so that this loop can
3677 continue and flag them to be swapped back later. */
3680 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3692 /* Don't try to fold inside of a vector of expressions.
3693 Doing nothing is harmless. */
3697 /* If a commutative operation, place a constant integer as the second
3698 operand unless the first operand is also a constant integer. Otherwise,
3699 place any constant second unless the first operand is also a constant. */
3701 if (COMMUTATIVE_P (x))
3704 || swap_commutative_operands_p (const_arg0 ? const_arg0
3706 const_arg1 ? const_arg1
3709 rtx tem = XEXP (x, 0);
3711 if (insn == 0 && ! copied)
3717 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3718 validate_change (insn, &XEXP (x, 1), tem, 1);
3719 if (apply_change_group ())
3721 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3722 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3727 /* If X is an arithmetic operation, see if we can simplify it. */
3729 switch (GET_RTX_CLASS (code))
3735 /* We can't simplify extension ops unless we know the
3737 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3738 && mode_arg0 == VOIDmode)
3741 /* If we had a CONST, strip it off and put it back later if we
3743 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3744 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3746 new = simplify_unary_operation (code, mode,
3747 const_arg0 ? const_arg0 : folded_arg0,
3749 if (new != 0 && is_const)
3750 new = gen_rtx_CONST (mode, new);
3755 case RTX_COMM_COMPARE:
3756 /* See what items are actually being compared and set FOLDED_ARG[01]
3757 to those values and CODE to the actual comparison code. If any are
3758 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3759 do anything if both operands are already known to be constant. */
3761 if (const_arg0 == 0 || const_arg1 == 0)
3763 struct table_elt *p0, *p1;
3764 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3765 enum machine_mode mode_arg1;
3767 #ifdef FLOAT_STORE_FLAG_VALUE
3768 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3770 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3771 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3772 false_rtx = CONST0_RTX (mode);
3776 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3777 &mode_arg0, &mode_arg1);
3778 const_arg0 = equiv_constant (folded_arg0);
3779 const_arg1 = equiv_constant (folded_arg1);
3781 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3782 what kinds of things are being compared, so we can't do
3783 anything with this comparison. */
3785 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3788 /* If we do not now have two constants being compared, see
3789 if we can nevertheless deduce some things about the
3791 if (const_arg0 == 0 || const_arg1 == 0)
3793 /* Some addresses are known to be nonzero. We don't know
3794 their sign, but equality comparisons are known. */
3795 if (const_arg1 == const0_rtx
3796 && nonzero_address_p (folded_arg0))
3800 else if (code == NE)
3804 /* See if the two operands are the same. */
3806 if (folded_arg0 == folded_arg1
3807 || (GET_CODE (folded_arg0) == REG
3808 && GET_CODE (folded_arg1) == REG
3809 && (REG_QTY (REGNO (folded_arg0))
3810 == REG_QTY (REGNO (folded_arg1))))
3811 || ((p0 = lookup (folded_arg0,
3812 (safe_hash (folded_arg0, mode_arg0)
3813 & HASH_MASK), mode_arg0))
3814 && (p1 = lookup (folded_arg1,
3815 (safe_hash (folded_arg1, mode_arg0)
3816 & HASH_MASK), mode_arg0))
3817 && p0->first_same_value == p1->first_same_value))
3819 /* Sadly two equal NaNs are not equivalent. */
3820 if (!HONOR_NANS (mode_arg0))
3821 return ((code == EQ || code == LE || code == GE
3822 || code == LEU || code == GEU || code == UNEQ
3823 || code == UNLE || code == UNGE
3825 ? true_rtx : false_rtx);
3826 /* Take care for the FP compares we can resolve. */
3827 if (code == UNEQ || code == UNLE || code == UNGE)
3829 if (code == LTGT || code == LT || code == GT)
3833 /* If FOLDED_ARG0 is a register, see if the comparison we are
3834 doing now is either the same as we did before or the reverse
3835 (we only check the reverse if not floating-point). */
3836 else if (GET_CODE (folded_arg0) == REG)
3838 int qty = REG_QTY (REGNO (folded_arg0));
3840 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3842 struct qty_table_elem *ent = &qty_table[qty];
3844 if ((comparison_dominates_p (ent->comparison_code, code)
3845 || (! FLOAT_MODE_P (mode_arg0)
3846 && comparison_dominates_p (ent->comparison_code,
3847 reverse_condition (code))))
3848 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3850 && rtx_equal_p (ent->comparison_const,
3852 || (GET_CODE (folded_arg1) == REG
3853 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3854 return (comparison_dominates_p (ent->comparison_code, code)
3855 ? true_rtx : false_rtx);
3861 /* If we are comparing against zero, see if the first operand is
3862 equivalent to an IOR with a constant. If so, we may be able to
3863 determine the result of this comparison. */
3865 if (const_arg1 == const0_rtx)
3867 rtx y = lookup_as_function (folded_arg0, IOR);
3871 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3872 && GET_CODE (inner_const) == CONST_INT
3873 && INTVAL (inner_const) != 0)
3875 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3876 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3877 && (INTVAL (inner_const)
3878 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3879 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3881 #ifdef FLOAT_STORE_FLAG_VALUE
3882 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3884 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3885 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3886 false_rtx = CONST0_RTX (mode);
3910 new = simplify_relational_operation (code,
3911 (mode_arg0 != VOIDmode
3913 : (GET_MODE (const_arg0
3917 ? GET_MODE (const_arg0
3920 : GET_MODE (const_arg1
3923 const_arg0 ? const_arg0 : folded_arg0,
3924 const_arg1 ? const_arg1 : folded_arg1);
3925 #ifdef FLOAT_STORE_FLAG_VALUE
3926 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3928 if (new == const0_rtx)
3929 new = CONST0_RTX (mode);
3931 new = (CONST_DOUBLE_FROM_REAL_VALUE
3932 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3938 case RTX_COMM_ARITH:
3942 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3943 with that LABEL_REF as its second operand. If so, the result is
3944 the first operand of that MINUS. This handles switches with an
3945 ADDR_DIFF_VEC table. */
3946 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3949 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3950 : lookup_as_function (folded_arg0, MINUS);
3952 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3953 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3956 /* Now try for a CONST of a MINUS like the above. */
3957 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3958 : lookup_as_function (folded_arg0, CONST))) != 0
3959 && GET_CODE (XEXP (y, 0)) == MINUS
3960 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3961 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3962 return XEXP (XEXP (y, 0), 0);
3965 /* Likewise if the operands are in the other order. */
3966 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3969 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3970 : lookup_as_function (folded_arg1, MINUS);
3972 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3973 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3976 /* Now try for a CONST of a MINUS like the above. */
3977 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3978 : lookup_as_function (folded_arg1, CONST))) != 0
3979 && GET_CODE (XEXP (y, 0)) == MINUS
3980 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3981 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3982 return XEXP (XEXP (y, 0), 0);
3985 /* If second operand is a register equivalent to a negative
3986 CONST_INT, see if we can find a register equivalent to the
3987 positive constant. Make a MINUS if so. Don't do this for
3988 a non-negative constant since we might then alternate between
3989 choosing positive and negative constants. Having the positive
3990 constant previously-used is the more common case. Be sure
3991 the resulting constant is non-negative; if const_arg1 were
3992 the smallest negative number this would overflow: depending
3993 on the mode, this would either just be the same value (and
3994 hence not save anything) or be incorrect. */
3995 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3996 && INTVAL (const_arg1) < 0
3997 /* This used to test
3999 -INTVAL (const_arg1) >= 0
4001 But The Sun V5.0 compilers mis-compiled that test. So
4002 instead we test for the problematic value in a more direct
4003 manner and hope the Sun compilers get it correct. */
4004 && INTVAL (const_arg1) !=
4005 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4006 && GET_CODE (folded_arg1) == REG)
4008 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4010 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4014 for (p = p->first_same_value; p; p = p->next_same_value)
4015 if (GET_CODE (p->exp) == REG)
4016 return simplify_gen_binary (MINUS, mode, folded_arg0,
4017 canon_reg (p->exp, NULL_RTX));
4022 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4023 If so, produce (PLUS Z C2-C). */
4024 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4026 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4027 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4028 return fold_rtx (plus_constant (copy_rtx (y),
4029 -INTVAL (const_arg1)),
4036 case SMIN: case SMAX: case UMIN: case UMAX:
4037 case IOR: case AND: case XOR:
4039 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4040 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4041 is known to be of similar form, we may be able to replace the
4042 operation with a combined operation. This may eliminate the
4043 intermediate operation if every use is simplified in this way.
4044 Note that the similar optimization done by combine.c only works
4045 if the intermediate operation's result has only one reference. */
4047 if (GET_CODE (folded_arg0) == REG
4048 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4051 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4052 rtx y = lookup_as_function (folded_arg0, code);
4054 enum rtx_code associate_code;
4058 || 0 == (inner_const
4059 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4060 || GET_CODE (inner_const) != CONST_INT
4061 /* If we have compiled a statement like
4062 "if (x == (x & mask1))", and now are looking at
4063 "x & mask2", we will have a case where the first operand
4064 of Y is the same as our first operand. Unless we detect
4065 this case, an infinite loop will result. */
4066 || XEXP (y, 0) == folded_arg0)
4069 /* Don't associate these operations if they are a PLUS with the
4070 same constant and it is a power of two. These might be doable
4071 with a pre- or post-increment. Similarly for two subtracts of
4072 identical powers of two with post decrement. */
4074 if (code == PLUS && const_arg1 == inner_const
4075 && ((HAVE_PRE_INCREMENT
4076 && exact_log2 (INTVAL (const_arg1)) >= 0)
4077 || (HAVE_POST_INCREMENT
4078 && exact_log2 (INTVAL (const_arg1)) >= 0)
4079 || (HAVE_PRE_DECREMENT
4080 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4081 || (HAVE_POST_DECREMENT
4082 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4085 /* Compute the code used to compose the constants. For example,
4086 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4088 associate_code = (is_shift || code == MINUS ? PLUS : code);
4090 new_const = simplify_binary_operation (associate_code, mode,
4091 const_arg1, inner_const);
4096 /* If we are associating shift operations, don't let this
4097 produce a shift of the size of the object or larger.
4098 This could occur when we follow a sign-extend by a right
4099 shift on a machine that does a sign-extend as a pair
4102 if (is_shift && GET_CODE (new_const) == CONST_INT
4103 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4105 /* As an exception, we can turn an ASHIFTRT of this
4106 form into a shift of the number of bits - 1. */
4107 if (code == ASHIFTRT)
4108 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4113 y = copy_rtx (XEXP (y, 0));
4115 /* If Y contains our first operand (the most common way this
4116 can happen is if Y is a MEM), we would do into an infinite
4117 loop if we tried to fold it. So don't in that case. */
4119 if (! reg_mentioned_p (folded_arg0, y))
4120 y = fold_rtx (y, insn);
4122 return simplify_gen_binary (code, mode, y, new_const);
4126 case DIV: case UDIV:
4127 /* ??? The associative optimization performed immediately above is
4128 also possible for DIV and UDIV using associate_code of MULT.
4129 However, we would need extra code to verify that the
4130 multiplication does not overflow, that is, there is no overflow
4131 in the calculation of new_const. */
4138 new = simplify_binary_operation (code, mode,
4139 const_arg0 ? const_arg0 : folded_arg0,
4140 const_arg1 ? const_arg1 : folded_arg1);
4144 /* (lo_sum (high X) X) is simply X. */
4145 if (code == LO_SUM && const_arg0 != 0
4146 && GET_CODE (const_arg0) == HIGH
4147 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4152 case RTX_BITFIELD_OPS:
4153 new = simplify_ternary_operation (code, mode, mode_arg0,
4154 const_arg0 ? const_arg0 : folded_arg0,
4155 const_arg1 ? const_arg1 : folded_arg1,
4156 const_arg2 ? const_arg2 : XEXP (x, 2));
4160 /* Eliminate CONSTANT_P_RTX if its constant. */
4161 if (code == CONSTANT_P_RTX)
4165 if (optimize == 0 || !flag_gcse)
4174 return new ? new : x;
4177 /* Return a constant value currently equivalent to X.
4178 Return 0 if we don't know one. */
4181 equiv_constant (rtx x)
4183 if (GET_CODE (x) == REG
4184 && REGNO_QTY_VALID_P (REGNO (x)))
4186 int x_q = REG_QTY (REGNO (x));
4187 struct qty_table_elem *x_ent = &qty_table[x_q];
4189 if (x_ent->const_rtx)
4190 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
4193 if (x == 0 || CONSTANT_P (x))
4196 /* If X is a MEM, try to fold it outside the context of any insn to see if
4197 it might be equivalent to a constant. That handles the case where it
4198 is a constant-pool reference. Then try to look it up in the hash table
4199 in case it is something whose value we have seen before. */
4201 if (GET_CODE (x) == MEM)
4203 struct table_elt *elt;
4205 x = fold_rtx (x, NULL_RTX);
4209 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4213 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4214 if (elt->is_const && CONSTANT_P (elt->exp))
4221 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4222 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4223 least-significant part of X.
4224 MODE specifies how big a part of X to return.
4226 If the requested operation cannot be done, 0 is returned.
4228 This is similar to gen_lowpart_general in emit-rtl.c. */
4231 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4233 rtx result = gen_lowpart_common (mode, x);
4237 else if (GET_CODE (x) == MEM)
4239 /* This is the only other case we handle. */
4243 if (WORDS_BIG_ENDIAN)
4244 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4245 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4246 if (BYTES_BIG_ENDIAN)
4247 /* Adjust the address so that the address-after-the-data is
4249 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4250 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4252 new = adjust_address_nv (x, mode, offset);
4253 if (! memory_address_p (mode, XEXP (new, 0)))
4262 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4263 branch. It will be zero if not.
4265 In certain cases, this can cause us to add an equivalence. For example,
4266 if we are following the taken case of
4268 we can add the fact that `i' and '2' are now equivalent.
4270 In any case, we can record that this comparison was passed. If the same
4271 comparison is seen later, we will know its value. */
4274 record_jump_equiv (rtx insn, int taken)
4276 int cond_known_true;
4279 enum machine_mode mode, mode0, mode1;
4280 int reversed_nonequality = 0;
4283 /* Ensure this is the right kind of insn. */
4284 if (! any_condjump_p (insn))
4286 set = pc_set (insn);
4288 /* See if this jump condition is known true or false. */
4290 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4292 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4294 /* Get the type of comparison being done and the operands being compared.
4295 If we had to reverse a non-equality condition, record that fact so we
4296 know that it isn't valid for floating-point. */
4297 code = GET_CODE (XEXP (SET_SRC (set), 0));
4298 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4299 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4301 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4302 if (! cond_known_true)
4304 code = reversed_comparison_code_parts (code, op0, op1, insn);
4306 /* Don't remember if we can't find the inverse. */
4307 if (code == UNKNOWN)
4311 /* The mode is the mode of the non-constant. */
4313 if (mode1 != VOIDmode)
4316 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4319 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4320 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4321 Make any useful entries we can with that information. Called from
4322 above function and called recursively. */
4325 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4326 rtx op1, int reversed_nonequality)
4328 unsigned op0_hash, op1_hash;
4329 int op0_in_memory, op1_in_memory;
4330 struct table_elt *op0_elt, *op1_elt;
4332 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4333 we know that they are also equal in the smaller mode (this is also
4334 true for all smaller modes whether or not there is a SUBREG, but
4335 is not worth testing for with no SUBREG). */
4337 /* Note that GET_MODE (op0) may not equal MODE. */
4338 if (code == EQ && GET_CODE (op0) == SUBREG
4339 && (GET_MODE_SIZE (GET_MODE (op0))
4340 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4342 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4343 rtx tem = gen_lowpart (inner_mode, op1);
4345 record_jump_cond (code, mode, SUBREG_REG (op0),
4346 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4347 reversed_nonequality);
4350 if (code == EQ && GET_CODE (op1) == SUBREG
4351 && (GET_MODE_SIZE (GET_MODE (op1))
4352 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4354 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4355 rtx tem = gen_lowpart (inner_mode, op0);
4357 record_jump_cond (code, mode, SUBREG_REG (op1),
4358 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4359 reversed_nonequality);
4362 /* Similarly, if this is an NE comparison, and either is a SUBREG
4363 making a smaller mode, we know the whole thing is also NE. */
4365 /* Note that GET_MODE (op0) may not equal MODE;
4366 if we test MODE instead, we can get an infinite recursion
4367 alternating between two modes each wider than MODE. */
4369 if (code == NE && GET_CODE (op0) == SUBREG
4370 && subreg_lowpart_p (op0)
4371 && (GET_MODE_SIZE (GET_MODE (op0))
4372 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4374 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4375 rtx tem = gen_lowpart (inner_mode, op1);
4377 record_jump_cond (code, mode, SUBREG_REG (op0),
4378 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4379 reversed_nonequality);
4382 if (code == NE && GET_CODE (op1) == SUBREG
4383 && subreg_lowpart_p (op1)
4384 && (GET_MODE_SIZE (GET_MODE (op1))
4385 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4387 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4388 rtx tem = gen_lowpart (inner_mode, op0);
4390 record_jump_cond (code, mode, SUBREG_REG (op1),
4391 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4392 reversed_nonequality);
4395 /* Hash both operands. */
4398 hash_arg_in_memory = 0;
4399 op0_hash = HASH (op0, mode);
4400 op0_in_memory = hash_arg_in_memory;
4406 hash_arg_in_memory = 0;
4407 op1_hash = HASH (op1, mode);
4408 op1_in_memory = hash_arg_in_memory;
4413 /* Look up both operands. */
4414 op0_elt = lookup (op0, op0_hash, mode);
4415 op1_elt = lookup (op1, op1_hash, mode);
4417 /* If both operands are already equivalent or if they are not in the
4418 table but are identical, do nothing. */
4419 if ((op0_elt != 0 && op1_elt != 0
4420 && op0_elt->first_same_value == op1_elt->first_same_value)
4421 || op0 == op1 || rtx_equal_p (op0, op1))
4424 /* If we aren't setting two things equal all we can do is save this
4425 comparison. Similarly if this is floating-point. In the latter
4426 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4427 If we record the equality, we might inadvertently delete code
4428 whose intent was to change -0 to +0. */
4430 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4432 struct qty_table_elem *ent;
4435 /* If we reversed a floating-point comparison, if OP0 is not a
4436 register, or if OP1 is neither a register or constant, we can't
4439 if (GET_CODE (op1) != REG)
4440 op1 = equiv_constant (op1);
4442 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4443 || GET_CODE (op0) != REG || op1 == 0)
4446 /* Put OP0 in the hash table if it isn't already. This gives it a
4447 new quantity number. */
4450 if (insert_regs (op0, NULL, 0))
4452 rehash_using_reg (op0);
4453 op0_hash = HASH (op0, mode);
4455 /* If OP0 is contained in OP1, this changes its hash code
4456 as well. Faster to rehash than to check, except
4457 for the simple case of a constant. */
4458 if (! CONSTANT_P (op1))
4459 op1_hash = HASH (op1,mode);
4462 op0_elt = insert (op0, NULL, op0_hash, mode);
4463 op0_elt->in_memory = op0_in_memory;
4466 qty = REG_QTY (REGNO (op0));
4467 ent = &qty_table[qty];
4469 ent->comparison_code = code;
4470 if (GET_CODE (op1) == REG)
4472 /* Look it up again--in case op0 and op1 are the same. */
4473 op1_elt = lookup (op1, op1_hash, mode);
4475 /* Put OP1 in the hash table so it gets a new quantity number. */
4478 if (insert_regs (op1, NULL, 0))
4480 rehash_using_reg (op1);
4481 op1_hash = HASH (op1, mode);
4484 op1_elt = insert (op1, NULL, op1_hash, mode);
4485 op1_elt->in_memory = op1_in_memory;
4488 ent->comparison_const = NULL_RTX;
4489 ent->comparison_qty = REG_QTY (REGNO (op1));
4493 ent->comparison_const = op1;
4494 ent->comparison_qty = -1;
4500 /* If either side is still missing an equivalence, make it now,
4501 then merge the equivalences. */
4505 if (insert_regs (op0, NULL, 0))
4507 rehash_using_reg (op0);
4508 op0_hash = HASH (op0, mode);
4511 op0_elt = insert (op0, NULL, op0_hash, mode);
4512 op0_elt->in_memory = op0_in_memory;
4517 if (insert_regs (op1, NULL, 0))
4519 rehash_using_reg (op1);
4520 op1_hash = HASH (op1, mode);
4523 op1_elt = insert (op1, NULL, op1_hash, mode);
4524 op1_elt->in_memory = op1_in_memory;
4527 merge_equiv_classes (op0_elt, op1_elt);
4528 last_jump_equiv_class = op0_elt;
4531 /* CSE processing for one instruction.
4532 First simplify sources and addresses of all assignments
4533 in the instruction, using previously-computed equivalents values.
4534 Then install the new sources and destinations in the table
4535 of available values.
4537 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4538 the insn. It means that INSN is inside libcall block. In this
4539 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4541 /* Data on one SET contained in the instruction. */
4545 /* The SET rtx itself. */
4547 /* The SET_SRC of the rtx (the original value, if it is changing). */
4549 /* The hash-table element for the SET_SRC of the SET. */
4550 struct table_elt *src_elt;
4551 /* Hash value for the SET_SRC. */
4553 /* Hash value for the SET_DEST. */
4555 /* The SET_DEST, with SUBREG, etc., stripped. */
4557 /* Nonzero if the SET_SRC is in memory. */
4559 /* Nonzero if the SET_SRC contains something
4560 whose value cannot be predicted and understood. */
4562 /* Original machine mode, in case it becomes a CONST_INT.
4563 The size of this field should match the size of the mode
4564 field of struct rtx_def (see rtl.h). */
4565 ENUM_BITFIELD(machine_mode) mode : 8;
4566 /* A constant equivalent for SET_SRC, if any. */
4568 /* Original SET_SRC value used for libcall notes. */
4570 /* Hash value of constant equivalent for SET_SRC. */
4571 unsigned src_const_hash;
4572 /* Table entry for constant equivalent for SET_SRC, if any. */
4573 struct table_elt *src_const_elt;
4577 cse_insn (rtx insn, rtx libcall_insn)
4579 rtx x = PATTERN (insn);
4585 /* Records what this insn does to set CC0. */
4586 rtx this_insn_cc0 = 0;
4587 enum machine_mode this_insn_cc0_mode = VOIDmode;
4591 struct table_elt *src_eqv_elt = 0;
4592 int src_eqv_volatile = 0;
4593 int src_eqv_in_memory = 0;
4594 unsigned src_eqv_hash = 0;
4596 struct set *sets = (struct set *) 0;
4600 /* Find all the SETs and CLOBBERs in this instruction.
4601 Record all the SETs in the array `set' and count them.
4602 Also determine whether there is a CLOBBER that invalidates
4603 all memory references, or all references at varying addresses. */
4605 if (GET_CODE (insn) == CALL_INSN)
4607 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4609 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4610 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4611 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4615 if (GET_CODE (x) == SET)
4617 sets = alloca (sizeof (struct set));
4620 /* Ignore SETs that are unconditional jumps.
4621 They never need cse processing, so this does not hurt.
4622 The reason is not efficiency but rather
4623 so that we can test at the end for instructions
4624 that have been simplified to unconditional jumps
4625 and not be misled by unchanged instructions
4626 that were unconditional jumps to begin with. */
4627 if (SET_DEST (x) == pc_rtx
4628 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4631 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4632 The hard function value register is used only once, to copy to
4633 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4634 Ensure we invalidate the destination register. On the 80386 no
4635 other code would invalidate it since it is a fixed_reg.
4636 We need not check the return of apply_change_group; see canon_reg. */
4638 else if (GET_CODE (SET_SRC (x)) == CALL)
4640 canon_reg (SET_SRC (x), insn);
4641 apply_change_group ();
4642 fold_rtx (SET_SRC (x), insn);
4643 invalidate (SET_DEST (x), VOIDmode);
4648 else if (GET_CODE (x) == PARALLEL)
4650 int lim = XVECLEN (x, 0);
4652 sets = alloca (lim * sizeof (struct set));
4654 /* Find all regs explicitly clobbered in this insn,
4655 and ensure they are not replaced with any other regs
4656 elsewhere in this insn.
4657 When a reg that is clobbered is also used for input,
4658 we should presume that that is for a reason,
4659 and we should not substitute some other register
4660 which is not supposed to be clobbered.
4661 Therefore, this loop cannot be merged into the one below
4662 because a CALL may precede a CLOBBER and refer to the
4663 value clobbered. We must not let a canonicalization do
4664 anything in that case. */
4665 for (i = 0; i < lim; i++)
4667 rtx y = XVECEXP (x, 0, i);
4668 if (GET_CODE (y) == CLOBBER)
4670 rtx clobbered = XEXP (y, 0);
4672 if (GET_CODE (clobbered) == REG
4673 || GET_CODE (clobbered) == SUBREG)
4674 invalidate (clobbered, VOIDmode);
4675 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4676 || GET_CODE (clobbered) == ZERO_EXTRACT)
4677 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4681 for (i = 0; i < lim; i++)
4683 rtx y = XVECEXP (x, 0, i);
4684 if (GET_CODE (y) == SET)
4686 /* As above, we ignore unconditional jumps and call-insns and
4687 ignore the result of apply_change_group. */
4688 if (GET_CODE (SET_SRC (y)) == CALL)
4690 canon_reg (SET_SRC (y), insn);
4691 apply_change_group ();
4692 fold_rtx (SET_SRC (y), insn);
4693 invalidate (SET_DEST (y), VOIDmode);
4695 else if (SET_DEST (y) == pc_rtx
4696 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4699 sets[n_sets++].rtl = y;
4701 else if (GET_CODE (y) == CLOBBER)
4703 /* If we clobber memory, canon the address.
4704 This does nothing when a register is clobbered
4705 because we have already invalidated the reg. */
4706 if (GET_CODE (XEXP (y, 0)) == MEM)
4707 canon_reg (XEXP (y, 0), NULL_RTX);
4709 else if (GET_CODE (y) == USE
4710 && ! (GET_CODE (XEXP (y, 0)) == REG
4711 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4712 canon_reg (y, NULL_RTX);
4713 else if (GET_CODE (y) == CALL)
4715 /* The result of apply_change_group can be ignored; see
4717 canon_reg (y, insn);
4718 apply_change_group ();
4723 else if (GET_CODE (x) == CLOBBER)
4725 if (GET_CODE (XEXP (x, 0)) == MEM)
4726 canon_reg (XEXP (x, 0), NULL_RTX);
4729 /* Canonicalize a USE of a pseudo register or memory location. */
4730 else if (GET_CODE (x) == USE
4731 && ! (GET_CODE (XEXP (x, 0)) == REG
4732 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4733 canon_reg (XEXP (x, 0), NULL_RTX);
4734 else if (GET_CODE (x) == CALL)
4736 /* The result of apply_change_group can be ignored; see canon_reg. */
4737 canon_reg (x, insn);
4738 apply_change_group ();
4742 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4743 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4744 is handled specially for this case, and if it isn't set, then there will
4745 be no equivalence for the destination. */
4746 if (n_sets == 1 && REG_NOTES (insn) != 0
4747 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4748 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4749 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4751 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4752 XEXP (tem, 0) = src_eqv;
4755 /* Canonicalize sources and addresses of destinations.
4756 We do this in a separate pass to avoid problems when a MATCH_DUP is
4757 present in the insn pattern. In that case, we want to ensure that
4758 we don't break the duplicate nature of the pattern. So we will replace
4759 both operands at the same time. Otherwise, we would fail to find an
4760 equivalent substitution in the loop calling validate_change below.
4762 We used to suppress canonicalization of DEST if it appears in SRC,
4763 but we don't do this any more. */
4765 for (i = 0; i < n_sets; i++)
4767 rtx dest = SET_DEST (sets[i].rtl);
4768 rtx src = SET_SRC (sets[i].rtl);
4769 rtx new = canon_reg (src, insn);
4772 sets[i].orig_src = src;
4773 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4774 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4775 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4776 || (insn_code = recog_memoized (insn)) < 0
4777 || insn_data[insn_code].n_dups > 0)
4778 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4780 SET_SRC (sets[i].rtl) = new;
4782 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4784 validate_change (insn, &XEXP (dest, 1),
4785 canon_reg (XEXP (dest, 1), insn), 1);
4786 validate_change (insn, &XEXP (dest, 2),
4787 canon_reg (XEXP (dest, 2), insn), 1);
4790 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4791 || GET_CODE (dest) == ZERO_EXTRACT
4792 || GET_CODE (dest) == SIGN_EXTRACT)
4793 dest = XEXP (dest, 0);
4795 if (GET_CODE (dest) == MEM)
4796 canon_reg (dest, insn);
4799 /* Now that we have done all the replacements, we can apply the change
4800 group and see if they all work. Note that this will cause some
4801 canonicalizations that would have worked individually not to be applied
4802 because some other canonicalization didn't work, but this should not
4805 The result of apply_change_group can be ignored; see canon_reg. */
4807 apply_change_group ();
4809 /* Set sets[i].src_elt to the class each source belongs to.
4810 Detect assignments from or to volatile things
4811 and set set[i] to zero so they will be ignored
4812 in the rest of this function.
4814 Nothing in this loop changes the hash table or the register chains. */
4816 for (i = 0; i < n_sets; i++)
4820 struct table_elt *elt = 0, *p;
4821 enum machine_mode mode;
4824 rtx src_related = 0;
4825 struct table_elt *src_const_elt = 0;
4826 int src_cost = MAX_COST;
4827 int src_eqv_cost = MAX_COST;
4828 int src_folded_cost = MAX_COST;
4829 int src_related_cost = MAX_COST;
4830 int src_elt_cost = MAX_COST;
4831 int src_regcost = MAX_COST;
4832 int src_eqv_regcost = MAX_COST;
4833 int src_folded_regcost = MAX_COST;
4834 int src_related_regcost = MAX_COST;
4835 int src_elt_regcost = MAX_COST;
4836 /* Set nonzero if we need to call force_const_mem on with the
4837 contents of src_folded before using it. */
4838 int src_folded_force_flag = 0;
4840 dest = SET_DEST (sets[i].rtl);
4841 src = SET_SRC (sets[i].rtl);
4843 /* If SRC is a constant that has no machine mode,
4844 hash it with the destination's machine mode.
4845 This way we can keep different modes separate. */
4847 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4848 sets[i].mode = mode;
4852 enum machine_mode eqvmode = mode;
4853 if (GET_CODE (dest) == STRICT_LOW_PART)
4854 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4856 hash_arg_in_memory = 0;
4857 src_eqv_hash = HASH (src_eqv, eqvmode);
4859 /* Find the equivalence class for the equivalent expression. */
4862 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4864 src_eqv_volatile = do_not_record;
4865 src_eqv_in_memory = hash_arg_in_memory;
4868 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4869 value of the INNER register, not the destination. So it is not
4870 a valid substitution for the source. But save it for later. */
4871 if (GET_CODE (dest) == STRICT_LOW_PART)
4874 src_eqv_here = src_eqv;
4876 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4877 simplified result, which may not necessarily be valid. */
4878 src_folded = fold_rtx (src, insn);
4881 /* ??? This caused bad code to be generated for the m68k port with -O2.
4882 Suppose src is (CONST_INT -1), and that after truncation src_folded
4883 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4884 At the end we will add src and src_const to the same equivalence
4885 class. We now have 3 and -1 on the same equivalence class. This
4886 causes later instructions to be mis-optimized. */
4887 /* If storing a constant in a bitfield, pre-truncate the constant
4888 so we will be able to record it later. */
4889 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4890 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4892 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4894 if (GET_CODE (src) == CONST_INT
4895 && GET_CODE (width) == CONST_INT
4896 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4897 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4899 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4900 << INTVAL (width)) - 1));
4904 /* Compute SRC's hash code, and also notice if it
4905 should not be recorded at all. In that case,
4906 prevent any further processing of this assignment. */
4908 hash_arg_in_memory = 0;
4911 sets[i].src_hash = HASH (src, mode);
4912 sets[i].src_volatile = do_not_record;
4913 sets[i].src_in_memory = hash_arg_in_memory;
4915 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4916 a pseudo, do not record SRC. Using SRC as a replacement for
4917 anything else will be incorrect in that situation. Note that
4918 this usually occurs only for stack slots, in which case all the
4919 RTL would be referring to SRC, so we don't lose any optimization
4920 opportunities by not having SRC in the hash table. */
4922 if (GET_CODE (src) == MEM
4923 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4924 && GET_CODE (dest) == REG
4925 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4926 sets[i].src_volatile = 1;
4929 /* It is no longer clear why we used to do this, but it doesn't
4930 appear to still be needed. So let's try without it since this
4931 code hurts cse'ing widened ops. */
4932 /* If source is a paradoxical subreg (such as QI treated as an SI),
4933 treat it as volatile. It may do the work of an SI in one context
4934 where the extra bits are not being used, but cannot replace an SI
4936 if (GET_CODE (src) == SUBREG
4937 && (GET_MODE_SIZE (GET_MODE (src))
4938 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4939 sets[i].src_volatile = 1;
4942 /* Locate all possible equivalent forms for SRC. Try to replace
4943 SRC in the insn with each cheaper equivalent.
4945 We have the following types of equivalents: SRC itself, a folded
4946 version, a value given in a REG_EQUAL note, or a value related
4949 Each of these equivalents may be part of an additional class
4950 of equivalents (if more than one is in the table, they must be in
4951 the same class; we check for this).
4953 If the source is volatile, we don't do any table lookups.
4955 We note any constant equivalent for possible later use in a
4958 if (!sets[i].src_volatile)
4959 elt = lookup (src, sets[i].src_hash, mode);
4961 sets[i].src_elt = elt;
4963 if (elt && src_eqv_here && src_eqv_elt)
4965 if (elt->first_same_value != src_eqv_elt->first_same_value)
4967 /* The REG_EQUAL is indicating that two formerly distinct
4968 classes are now equivalent. So merge them. */
4969 merge_equiv_classes (elt, src_eqv_elt);
4970 src_eqv_hash = HASH (src_eqv, elt->mode);
4971 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4977 else if (src_eqv_elt)
4980 /* Try to find a constant somewhere and record it in `src_const'.
4981 Record its table element, if any, in `src_const_elt'. Look in
4982 any known equivalences first. (If the constant is not in the
4983 table, also set `sets[i].src_const_hash'). */
4985 for (p = elt->first_same_value; p; p = p->next_same_value)
4989 src_const_elt = elt;
4994 && (CONSTANT_P (src_folded)
4995 /* Consider (minus (label_ref L1) (label_ref L2)) as
4996 "constant" here so we will record it. This allows us
4997 to fold switch statements when an ADDR_DIFF_VEC is used. */
4998 || (GET_CODE (src_folded) == MINUS
4999 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5000 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5001 src_const = src_folded, src_const_elt = elt;
5002 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5003 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5005 /* If we don't know if the constant is in the table, get its
5006 hash code and look it up. */
5007 if (src_const && src_const_elt == 0)
5009 sets[i].src_const_hash = HASH (src_const, mode);
5010 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5013 sets[i].src_const = src_const;
5014 sets[i].src_const_elt = src_const_elt;
5016 /* If the constant and our source are both in the table, mark them as
5017 equivalent. Otherwise, if a constant is in the table but the source
5018 isn't, set ELT to it. */
5019 if (src_const_elt && elt
5020 && src_const_elt->first_same_value != elt->first_same_value)
5021 merge_equiv_classes (elt, src_const_elt);
5022 else if (src_const_elt && elt == 0)
5023 elt = src_const_elt;
5025 /* See if there is a register linearly related to a constant
5026 equivalent of SRC. */
5028 && (GET_CODE (src_const) == CONST
5029 || (src_const_elt && src_const_elt->related_value != 0)))
5031 src_related = use_related_value (src_const, src_const_elt);
5034 struct table_elt *src_related_elt
5035 = lookup (src_related, HASH (src_related, mode), mode);
5036 if (src_related_elt && elt)
5038 if (elt->first_same_value
5039 != src_related_elt->first_same_value)
5040 /* This can occur when we previously saw a CONST
5041 involving a SYMBOL_REF and then see the SYMBOL_REF
5042 twice. Merge the involved classes. */
5043 merge_equiv_classes (elt, src_related_elt);
5046 src_related_elt = 0;
5048 else if (src_related_elt && elt == 0)
5049 elt = src_related_elt;
5053 /* See if we have a CONST_INT that is already in a register in a
5056 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5057 && GET_MODE_CLASS (mode) == MODE_INT
5058 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5060 enum machine_mode wider_mode;
5062 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5063 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5064 && src_related == 0;
5065 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5067 struct table_elt *const_elt
5068 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5073 for (const_elt = const_elt->first_same_value;
5074 const_elt; const_elt = const_elt->next_same_value)
5075 if (GET_CODE (const_elt->exp) == REG)
5077 src_related = gen_lowpart (mode,
5084 /* Another possibility is that we have an AND with a constant in
5085 a mode narrower than a word. If so, it might have been generated
5086 as part of an "if" which would narrow the AND. If we already
5087 have done the AND in a wider mode, we can use a SUBREG of that
5090 if (flag_expensive_optimizations && ! src_related
5091 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5092 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5094 enum machine_mode tmode;
5095 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5097 for (tmode = GET_MODE_WIDER_MODE (mode);
5098 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5099 tmode = GET_MODE_WIDER_MODE (tmode))
5101 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
5102 struct table_elt *larger_elt;
5106 PUT_MODE (new_and, tmode);
5107 XEXP (new_and, 0) = inner;
5108 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5109 if (larger_elt == 0)
5112 for (larger_elt = larger_elt->first_same_value;
5113 larger_elt; larger_elt = larger_elt->next_same_value)
5114 if (GET_CODE (larger_elt->exp) == REG)
5117 = gen_lowpart (mode, larger_elt->exp);
5127 #ifdef LOAD_EXTEND_OP
5128 /* See if a MEM has already been loaded with a widening operation;
5129 if it has, we can use a subreg of that. Many CISC machines
5130 also have such operations, but this is only likely to be
5131 beneficial these machines. */
5133 if (flag_expensive_optimizations && src_related == 0
5134 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5135 && GET_MODE_CLASS (mode) == MODE_INT
5136 && GET_CODE (src) == MEM && ! do_not_record
5137 && LOAD_EXTEND_OP (mode) != NIL)
5139 enum machine_mode tmode;
5141 /* Set what we are trying to extend and the operation it might
5142 have been extended with. */
5143 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5144 XEXP (memory_extend_rtx, 0) = src;
5146 for (tmode = GET_MODE_WIDER_MODE (mode);
5147 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5148 tmode = GET_MODE_WIDER_MODE (tmode))
5150 struct table_elt *larger_elt;
5152 PUT_MODE (memory_extend_rtx, tmode);
5153 larger_elt = lookup (memory_extend_rtx,
5154 HASH (memory_extend_rtx, tmode), tmode);
5155 if (larger_elt == 0)
5158 for (larger_elt = larger_elt->first_same_value;
5159 larger_elt; larger_elt = larger_elt->next_same_value)
5160 if (GET_CODE (larger_elt->exp) == REG)
5162 src_related = gen_lowpart (mode,
5171 #endif /* LOAD_EXTEND_OP */
5173 if (src == src_folded)
5176 /* At this point, ELT, if nonzero, points to a class of expressions
5177 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5178 and SRC_RELATED, if nonzero, each contain additional equivalent
5179 expressions. Prune these latter expressions by deleting expressions
5180 already in the equivalence class.
5182 Check for an equivalent identical to the destination. If found,
5183 this is the preferred equivalent since it will likely lead to
5184 elimination of the insn. Indicate this by placing it in
5188 elt = elt->first_same_value;
5189 for (p = elt; p; p = p->next_same_value)
5191 enum rtx_code code = GET_CODE (p->exp);
5193 /* If the expression is not valid, ignore it. Then we do not
5194 have to check for validity below. In most cases, we can use
5195 `rtx_equal_p', since canonicalization has already been done. */
5196 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5199 /* Also skip paradoxical subregs, unless that's what we're
5202 && (GET_MODE_SIZE (GET_MODE (p->exp))
5203 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5205 && GET_CODE (src) == SUBREG
5206 && GET_MODE (src) == GET_MODE (p->exp)
5207 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5208 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5211 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5213 else if (src_folded && GET_CODE (src_folded) == code
5214 && rtx_equal_p (src_folded, p->exp))
5216 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5217 && rtx_equal_p (src_eqv_here, p->exp))
5219 else if (src_related && GET_CODE (src_related) == code
5220 && rtx_equal_p (src_related, p->exp))
5223 /* This is the same as the destination of the insns, we want
5224 to prefer it. Copy it to src_related. The code below will
5225 then give it a negative cost. */
5226 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5230 /* Find the cheapest valid equivalent, trying all the available
5231 possibilities. Prefer items not in the hash table to ones
5232 that are when they are equal cost. Note that we can never
5233 worsen an insn as the current contents will also succeed.
5234 If we find an equivalent identical to the destination, use it as best,
5235 since this insn will probably be eliminated in that case. */
5238 if (rtx_equal_p (src, dest))
5239 src_cost = src_regcost = -1;
5242 src_cost = COST (src);
5243 src_regcost = approx_reg_cost (src);
5249 if (rtx_equal_p (src_eqv_here, dest))
5250 src_eqv_cost = src_eqv_regcost = -1;
5253 src_eqv_cost = COST (src_eqv_here);
5254 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5260 if (rtx_equal_p (src_folded, dest))
5261 src_folded_cost = src_folded_regcost = -1;
5264 src_folded_cost = COST (src_folded);
5265 src_folded_regcost = approx_reg_cost (src_folded);
5271 if (rtx_equal_p (src_related, dest))
5272 src_related_cost = src_related_regcost = -1;
5275 src_related_cost = COST (src_related);
5276 src_related_regcost = approx_reg_cost (src_related);
5280 /* If this was an indirect jump insn, a known label will really be
5281 cheaper even though it looks more expensive. */
5282 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5283 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5285 /* Terminate loop when replacement made. This must terminate since
5286 the current contents will be tested and will always be valid. */
5291 /* Skip invalid entries. */
5292 while (elt && GET_CODE (elt->exp) != REG
5293 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5294 elt = elt->next_same_value;
5296 /* A paradoxical subreg would be bad here: it'll be the right
5297 size, but later may be adjusted so that the upper bits aren't
5298 what we want. So reject it. */
5300 && GET_CODE (elt->exp) == SUBREG
5301 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5302 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5303 /* It is okay, though, if the rtx we're trying to match
5304 will ignore any of the bits we can't predict. */
5306 && GET_CODE (src) == SUBREG
5307 && GET_MODE (src) == GET_MODE (elt->exp)
5308 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5309 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5311 elt = elt->next_same_value;
5317 src_elt_cost = elt->cost;
5318 src_elt_regcost = elt->regcost;
5321 /* Find cheapest and skip it for the next time. For items
5322 of equal cost, use this order:
5323 src_folded, src, src_eqv, src_related and hash table entry. */
5325 && preferable (src_folded_cost, src_folded_regcost,
5326 src_cost, src_regcost) <= 0
5327 && preferable (src_folded_cost, src_folded_regcost,
5328 src_eqv_cost, src_eqv_regcost) <= 0
5329 && preferable (src_folded_cost, src_folded_regcost,
5330 src_related_cost, src_related_regcost) <= 0
5331 && preferable (src_folded_cost, src_folded_regcost,
5332 src_elt_cost, src_elt_regcost) <= 0)
5334 trial = src_folded, src_folded_cost = MAX_COST;
5335 if (src_folded_force_flag)
5337 rtx forced = force_const_mem (mode, trial);
5343 && preferable (src_cost, src_regcost,
5344 src_eqv_cost, src_eqv_regcost) <= 0
5345 && preferable (src_cost, src_regcost,
5346 src_related_cost, src_related_regcost) <= 0
5347 && preferable (src_cost, src_regcost,
5348 src_elt_cost, src_elt_regcost) <= 0)
5349 trial = src, src_cost = MAX_COST;
5350 else if (src_eqv_here
5351 && preferable (src_eqv_cost, src_eqv_regcost,
5352 src_related_cost, src_related_regcost) <= 0
5353 && preferable (src_eqv_cost, src_eqv_regcost,
5354 src_elt_cost, src_elt_regcost) <= 0)
5355 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5356 else if (src_related
5357 && preferable (src_related_cost, src_related_regcost,
5358 src_elt_cost, src_elt_regcost) <= 0)
5359 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5362 trial = copy_rtx (elt->exp);
5363 elt = elt->next_same_value;
5364 src_elt_cost = MAX_COST;
5367 /* We don't normally have an insn matching (set (pc) (pc)), so
5368 check for this separately here. We will delete such an
5371 For other cases such as a table jump or conditional jump
5372 where we know the ultimate target, go ahead and replace the
5373 operand. While that may not make a valid insn, we will
5374 reemit the jump below (and also insert any necessary
5376 if (n_sets == 1 && dest == pc_rtx
5378 || (GET_CODE (trial) == LABEL_REF
5379 && ! condjump_p (insn))))
5381 SET_SRC (sets[i].rtl) = trial;
5382 cse_jumps_altered = 1;
5386 /* Look for a substitution that makes a valid insn. */
5387 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5389 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5391 /* If we just made a substitution inside a libcall, then we
5392 need to make the same substitution in any notes attached
5393 to the RETVAL insn. */
5395 && (GET_CODE (sets[i].orig_src) == REG
5396 || GET_CODE (sets[i].orig_src) == SUBREG
5397 || GET_CODE (sets[i].orig_src) == MEM))
5398 simplify_replace_rtx (REG_NOTES (libcall_insn),
5399 sets[i].orig_src, copy_rtx (new));
5401 /* The result of apply_change_group can be ignored; see
5404 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5405 apply_change_group ();
5409 /* If we previously found constant pool entries for
5410 constants and this is a constant, try making a
5411 pool entry. Put it in src_folded unless we already have done
5412 this since that is where it likely came from. */
5414 else if (constant_pool_entries_cost
5415 && CONSTANT_P (trial)
5416 /* Reject cases that will abort in decode_rtx_const.
5417 On the alpha when simplifying a switch, we get
5418 (const (truncate (minus (label_ref) (label_ref)))). */
5419 && ! (GET_CODE (trial) == CONST
5420 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5421 /* Likewise on IA-64, except without the truncate. */
5422 && ! (GET_CODE (trial) == CONST
5423 && GET_CODE (XEXP (trial, 0)) == MINUS
5424 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5425 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5427 || (GET_CODE (src_folded) != MEM
5428 && ! src_folded_force_flag))
5429 && GET_MODE_CLASS (mode) != MODE_CC
5430 && mode != VOIDmode)
5432 src_folded_force_flag = 1;
5434 src_folded_cost = constant_pool_entries_cost;
5435 src_folded_regcost = constant_pool_entries_regcost;
5439 src = SET_SRC (sets[i].rtl);
5441 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5442 However, there is an important exception: If both are registers
5443 that are not the head of their equivalence class, replace SET_SRC
5444 with the head of the class. If we do not do this, we will have
5445 both registers live over a portion of the basic block. This way,
5446 their lifetimes will likely abut instead of overlapping. */
5447 if (GET_CODE (dest) == REG
5448 && REGNO_QTY_VALID_P (REGNO (dest)))
5450 int dest_q = REG_QTY (REGNO (dest));
5451 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5453 if (dest_ent->mode == GET_MODE (dest)
5454 && dest_ent->first_reg != REGNO (dest)
5455 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5456 /* Don't do this if the original insn had a hard reg as
5457 SET_SRC or SET_DEST. */
5458 && (GET_CODE (sets[i].src) != REG
5459 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5460 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5461 /* We can't call canon_reg here because it won't do anything if
5462 SRC is a hard register. */
5464 int src_q = REG_QTY (REGNO (src));
5465 struct qty_table_elem *src_ent = &qty_table[src_q];
5466 int first = src_ent->first_reg;
5468 = (first >= FIRST_PSEUDO_REGISTER
5469 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5471 /* We must use validate-change even for this, because this
5472 might be a special no-op instruction, suitable only to
5474 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5477 /* If we had a constant that is cheaper than what we are now
5478 setting SRC to, use that constant. We ignored it when we
5479 thought we could make this into a no-op. */
5480 if (src_const && COST (src_const) < COST (src)
5481 && validate_change (insn, &SET_SRC (sets[i].rtl),
5488 /* If we made a change, recompute SRC values. */
5489 if (src != sets[i].src)
5493 hash_arg_in_memory = 0;
5495 sets[i].src_hash = HASH (src, mode);
5496 sets[i].src_volatile = do_not_record;
5497 sets[i].src_in_memory = hash_arg_in_memory;
5498 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5501 /* If this is a single SET, we are setting a register, and we have an
5502 equivalent constant, we want to add a REG_NOTE. We don't want
5503 to write a REG_EQUAL note for a constant pseudo since verifying that
5504 that pseudo hasn't been eliminated is a pain. Such a note also
5505 won't help anything.
5507 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5508 which can be created for a reference to a compile time computable
5509 entry in a jump table. */
5511 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5512 && GET_CODE (src_const) != REG
5513 && ! (GET_CODE (src_const) == CONST
5514 && GET_CODE (XEXP (src_const, 0)) == MINUS
5515 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5516 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5518 /* We only want a REG_EQUAL note if src_const != src. */
5519 if (! rtx_equal_p (src, src_const))
5521 /* Make sure that the rtx is not shared. */
5522 src_const = copy_rtx (src_const);
5524 /* Record the actual constant value in a REG_EQUAL note,
5525 making a new one if one does not already exist. */
5526 set_unique_reg_note (insn, REG_EQUAL, src_const);
5530 /* Now deal with the destination. */
5533 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5534 to the MEM or REG within it. */
5535 while (GET_CODE (dest) == SIGN_EXTRACT
5536 || GET_CODE (dest) == ZERO_EXTRACT
5537 || GET_CODE (dest) == SUBREG
5538 || GET_CODE (dest) == STRICT_LOW_PART)
5539 dest = XEXP (dest, 0);
5541 sets[i].inner_dest = dest;
5543 if (GET_CODE (dest) == MEM)
5545 #ifdef PUSH_ROUNDING
5546 /* Stack pushes invalidate the stack pointer. */
5547 rtx addr = XEXP (dest, 0);
5548 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5549 && XEXP (addr, 0) == stack_pointer_rtx)
5550 invalidate (stack_pointer_rtx, Pmode);
5552 dest = fold_rtx (dest, insn);
5555 /* Compute the hash code of the destination now,
5556 before the effects of this instruction are recorded,
5557 since the register values used in the address computation
5558 are those before this instruction. */
5559 sets[i].dest_hash = HASH (dest, mode);
5561 /* Don't enter a bit-field in the hash table
5562 because the value in it after the store
5563 may not equal what was stored, due to truncation. */
5565 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5566 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5568 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5570 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5571 && GET_CODE (width) == CONST_INT
5572 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5573 && ! (INTVAL (src_const)
5574 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5575 /* Exception: if the value is constant,
5576 and it won't be truncated, record it. */
5580 /* This is chosen so that the destination will be invalidated
5581 but no new value will be recorded.
5582 We must invalidate because sometimes constant
5583 values can be recorded for bitfields. */
5584 sets[i].src_elt = 0;
5585 sets[i].src_volatile = 1;
5591 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5593 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5595 /* One less use of the label this insn used to jump to. */
5597 cse_jumps_altered = 1;
5598 /* No more processing for this set. */
5602 /* If this SET is now setting PC to a label, we know it used to
5603 be a conditional or computed branch. */
5604 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5606 /* Now emit a BARRIER after the unconditional jump. */
5607 if (NEXT_INSN (insn) == 0
5608 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5609 emit_barrier_after (insn);
5611 /* We reemit the jump in as many cases as possible just in
5612 case the form of an unconditional jump is significantly
5613 different than a computed jump or conditional jump.
5615 If this insn has multiple sets, then reemitting the
5616 jump is nontrivial. So instead we just force rerecognition
5617 and hope for the best. */
5622 new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5623 JUMP_LABEL (new) = XEXP (src, 0);
5624 LABEL_NUSES (XEXP (src, 0))++;
5626 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5627 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5630 XEXP (note, 1) = NULL_RTX;
5631 REG_NOTES (new) = note;
5637 /* Now emit a BARRIER after the unconditional jump. */
5638 if (NEXT_INSN (insn) == 0
5639 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5640 emit_barrier_after (insn);
5643 INSN_CODE (insn) = -1;
5645 never_reached_warning (insn, NULL);
5647 /* Do not bother deleting any unreachable code,
5648 let jump/flow do that. */
5650 cse_jumps_altered = 1;
5654 /* If destination is volatile, invalidate it and then do no further
5655 processing for this assignment. */
5657 else if (do_not_record)
5659 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5660 invalidate (dest, VOIDmode);
5661 else if (GET_CODE (dest) == MEM)
5663 /* Outgoing arguments for a libcall don't
5664 affect any recorded expressions. */
5665 if (! libcall_insn || insn == libcall_insn)
5666 invalidate (dest, VOIDmode);
5668 else if (GET_CODE (dest) == STRICT_LOW_PART
5669 || GET_CODE (dest) == ZERO_EXTRACT)
5670 invalidate (XEXP (dest, 0), GET_MODE (dest));
5674 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5675 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5678 /* If setting CC0, record what it was set to, or a constant, if it
5679 is equivalent to a constant. If it is being set to a floating-point
5680 value, make a COMPARE with the appropriate constant of 0. If we
5681 don't do this, later code can interpret this as a test against
5682 const0_rtx, which can cause problems if we try to put it into an
5683 insn as a floating-point operand. */
5684 if (dest == cc0_rtx)
5686 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5687 this_insn_cc0_mode = mode;
5688 if (FLOAT_MODE_P (mode))
5689 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5695 /* Now enter all non-volatile source expressions in the hash table
5696 if they are not already present.
5697 Record their equivalence classes in src_elt.
5698 This way we can insert the corresponding destinations into
5699 the same classes even if the actual sources are no longer in them
5700 (having been invalidated). */
5702 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5703 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5705 struct table_elt *elt;
5706 struct table_elt *classp = sets[0].src_elt;
5707 rtx dest = SET_DEST (sets[0].rtl);
5708 enum machine_mode eqvmode = GET_MODE (dest);
5710 if (GET_CODE (dest) == STRICT_LOW_PART)
5712 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5715 if (insert_regs (src_eqv, classp, 0))
5717 rehash_using_reg (src_eqv);
5718 src_eqv_hash = HASH (src_eqv, eqvmode);
5720 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5721 elt->in_memory = src_eqv_in_memory;
5724 /* Check to see if src_eqv_elt is the same as a set source which
5725 does not yet have an elt, and if so set the elt of the set source
5727 for (i = 0; i < n_sets; i++)
5728 if (sets[i].rtl && sets[i].src_elt == 0
5729 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5730 sets[i].src_elt = src_eqv_elt;
5733 for (i = 0; i < n_sets; i++)
5734 if (sets[i].rtl && ! sets[i].src_volatile
5735 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5737 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5739 /* REG_EQUAL in setting a STRICT_LOW_PART
5740 gives an equivalent for the entire destination register,
5741 not just for the subreg being stored in now.
5742 This is a more interesting equivalence, so we arrange later
5743 to treat the entire reg as the destination. */
5744 sets[i].src_elt = src_eqv_elt;
5745 sets[i].src_hash = src_eqv_hash;
5749 /* Insert source and constant equivalent into hash table, if not
5751 struct table_elt *classp = src_eqv_elt;
5752 rtx src = sets[i].src;
5753 rtx dest = SET_DEST (sets[i].rtl);
5754 enum machine_mode mode
5755 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5757 /* It's possible that we have a source value known to be
5758 constant but don't have a REG_EQUAL note on the insn.
5759 Lack of a note will mean src_eqv_elt will be NULL. This
5760 can happen where we've generated a SUBREG to access a
5761 CONST_INT that is already in a register in a wider mode.
5762 Ensure that the source expression is put in the proper
5765 classp = sets[i].src_const_elt;
5767 if (sets[i].src_elt == 0)
5769 /* Don't put a hard register source into the table if this is
5770 the last insn of a libcall. In this case, we only need
5771 to put src_eqv_elt in src_elt. */
5772 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5774 struct table_elt *elt;
5776 /* Note that these insert_regs calls cannot remove
5777 any of the src_elt's, because they would have failed to
5778 match if not still valid. */
5779 if (insert_regs (src, classp, 0))
5781 rehash_using_reg (src);
5782 sets[i].src_hash = HASH (src, mode);
5784 elt = insert (src, classp, sets[i].src_hash, mode);
5785 elt->in_memory = sets[i].src_in_memory;
5786 sets[i].src_elt = classp = elt;
5789 sets[i].src_elt = classp;
5791 if (sets[i].src_const && sets[i].src_const_elt == 0
5792 && src != sets[i].src_const
5793 && ! rtx_equal_p (sets[i].src_const, src))
5794 sets[i].src_elt = insert (sets[i].src_const, classp,
5795 sets[i].src_const_hash, mode);
5798 else if (sets[i].src_elt == 0)
5799 /* If we did not insert the source into the hash table (e.g., it was
5800 volatile), note the equivalence class for the REG_EQUAL value, if any,
5801 so that the destination goes into that class. */
5802 sets[i].src_elt = src_eqv_elt;
5804 invalidate_from_clobbers (x);
5806 /* Some registers are invalidated by subroutine calls. Memory is
5807 invalidated by non-constant calls. */
5809 if (GET_CODE (insn) == CALL_INSN)
5811 if (! CONST_OR_PURE_CALL_P (insn))
5812 invalidate_memory ();
5813 invalidate_for_call ();
5816 /* Now invalidate everything set by this instruction.
5817 If a SUBREG or other funny destination is being set,
5818 sets[i].rtl is still nonzero, so here we invalidate the reg
5819 a part of which is being set. */
5821 for (i = 0; i < n_sets; i++)
5824 /* We can't use the inner dest, because the mode associated with
5825 a ZERO_EXTRACT is significant. */
5826 rtx dest = SET_DEST (sets[i].rtl);
5828 /* Needed for registers to remove the register from its
5829 previous quantity's chain.
5830 Needed for memory if this is a nonvarying address, unless
5831 we have just done an invalidate_memory that covers even those. */
5832 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5833 invalidate (dest, VOIDmode);
5834 else if (GET_CODE (dest) == MEM)
5836 /* Outgoing arguments for a libcall don't
5837 affect any recorded expressions. */
5838 if (! libcall_insn || insn == libcall_insn)
5839 invalidate (dest, VOIDmode);
5841 else if (GET_CODE (dest) == STRICT_LOW_PART
5842 || GET_CODE (dest) == ZERO_EXTRACT)
5843 invalidate (XEXP (dest, 0), GET_MODE (dest));
5846 /* A volatile ASM invalidates everything. */
5847 if (GET_CODE (insn) == INSN
5848 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5849 && MEM_VOLATILE_P (PATTERN (insn)))
5850 flush_hash_table ();
5852 /* Make sure registers mentioned in destinations
5853 are safe for use in an expression to be inserted.
5854 This removes from the hash table
5855 any invalid entry that refers to one of these registers.
5857 We don't care about the return value from mention_regs because
5858 we are going to hash the SET_DEST values unconditionally. */
5860 for (i = 0; i < n_sets; i++)
5864 rtx x = SET_DEST (sets[i].rtl);
5866 if (GET_CODE (x) != REG)
5870 /* We used to rely on all references to a register becoming
5871 inaccessible when a register changes to a new quantity,
5872 since that changes the hash code. However, that is not
5873 safe, since after HASH_SIZE new quantities we get a
5874 hash 'collision' of a register with its own invalid
5875 entries. And since SUBREGs have been changed not to
5876 change their hash code with the hash code of the register,
5877 it wouldn't work any longer at all. So we have to check
5878 for any invalid references lying around now.
5879 This code is similar to the REG case in mention_regs,
5880 but it knows that reg_tick has been incremented, and
5881 it leaves reg_in_table as -1 . */
5882 unsigned int regno = REGNO (x);
5883 unsigned int endregno
5884 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5885 : hard_regno_nregs[regno][GET_MODE (x)]);
5888 for (i = regno; i < endregno; i++)
5890 if (REG_IN_TABLE (i) >= 0)
5892 remove_invalid_refs (i);
5893 REG_IN_TABLE (i) = -1;
5900 /* We may have just removed some of the src_elt's from the hash table.
5901 So replace each one with the current head of the same class. */
5903 for (i = 0; i < n_sets; i++)
5906 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5907 /* If elt was removed, find current head of same class,
5908 or 0 if nothing remains of that class. */
5910 struct table_elt *elt = sets[i].src_elt;
5912 while (elt && elt->prev_same_value)
5913 elt = elt->prev_same_value;
5915 while (elt && elt->first_same_value == 0)
5916 elt = elt->next_same_value;
5917 sets[i].src_elt = elt ? elt->first_same_value : 0;
5921 /* Now insert the destinations into their equivalence classes. */
5923 for (i = 0; i < n_sets; i++)
5926 rtx dest = SET_DEST (sets[i].rtl);
5927 rtx inner_dest = sets[i].inner_dest;
5928 struct table_elt *elt;
5930 /* Don't record value if we are not supposed to risk allocating
5931 floating-point values in registers that might be wider than
5933 if ((flag_float_store
5934 && GET_CODE (dest) == MEM
5935 && FLOAT_MODE_P (GET_MODE (dest)))
5936 /* Don't record BLKmode values, because we don't know the
5937 size of it, and can't be sure that other BLKmode values
5938 have the same or smaller size. */
5939 || GET_MODE (dest) == BLKmode
5940 /* Don't record values of destinations set inside a libcall block
5941 since we might delete the libcall. Things should have been set
5942 up so we won't want to reuse such a value, but we play it safe
5945 /* If we didn't put a REG_EQUAL value or a source into the hash
5946 table, there is no point is recording DEST. */
5947 || sets[i].src_elt == 0
5948 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5949 or SIGN_EXTEND, don't record DEST since it can cause
5950 some tracking to be wrong.
5952 ??? Think about this more later. */
5953 || (GET_CODE (dest) == SUBREG
5954 && (GET_MODE_SIZE (GET_MODE (dest))
5955 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5956 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5957 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5960 /* STRICT_LOW_PART isn't part of the value BEING set,
5961 and neither is the SUBREG inside it.
5962 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5963 if (GET_CODE (dest) == STRICT_LOW_PART)
5964 dest = SUBREG_REG (XEXP (dest, 0));
5966 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5967 /* Registers must also be inserted into chains for quantities. */
5968 if (insert_regs (dest, sets[i].src_elt, 1))
5970 /* If `insert_regs' changes something, the hash code must be
5972 rehash_using_reg (dest);
5973 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5976 if (GET_CODE (inner_dest) == MEM
5977 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5978 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5979 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5980 Consider the case in which the address of the MEM is
5981 passed to a function, which alters the MEM. Then, if we
5982 later use Y instead of the MEM we'll miss the update. */
5983 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5985 elt = insert (dest, sets[i].src_elt,
5986 sets[i].dest_hash, GET_MODE (dest));
5988 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5989 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5990 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
5993 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5994 narrower than M2, and both M1 and M2 are the same number of words,
5995 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5996 make that equivalence as well.
5998 However, BAR may have equivalences for which gen_lowpart
5999 will produce a simpler value than gen_lowpart applied to
6000 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6001 BAR's equivalences. If we don't get a simplified form, make
6002 the SUBREG. It will not be used in an equivalence, but will
6003 cause two similar assignments to be detected.
6005 Note the loop below will find SUBREG_REG (DEST) since we have
6006 already entered SRC and DEST of the SET in the table. */
6008 if (GET_CODE (dest) == SUBREG
6009 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6011 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6012 && (GET_MODE_SIZE (GET_MODE (dest))
6013 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6014 && sets[i].src_elt != 0)
6016 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6017 struct table_elt *elt, *classp = 0;
6019 for (elt = sets[i].src_elt->first_same_value; elt;
6020 elt = elt->next_same_value)
6024 struct table_elt *src_elt;
6027 /* Ignore invalid entries. */
6028 if (GET_CODE (elt->exp) != REG
6029 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6032 /* We may have already been playing subreg games. If the
6033 mode is already correct for the destination, use it. */
6034 if (GET_MODE (elt->exp) == new_mode)
6038 /* Calculate big endian correction for the SUBREG_BYTE.
6039 We have already checked that M1 (GET_MODE (dest))
6040 is not narrower than M2 (new_mode). */
6041 if (BYTES_BIG_ENDIAN)
6042 byte = (GET_MODE_SIZE (GET_MODE (dest))
6043 - GET_MODE_SIZE (new_mode));
6045 new_src = simplify_gen_subreg (new_mode, elt->exp,
6046 GET_MODE (dest), byte);
6049 /* The call to simplify_gen_subreg fails if the value
6050 is VOIDmode, yet we can't do any simplification, e.g.
6051 for EXPR_LISTs denoting function call results.
6052 It is invalid to construct a SUBREG with a VOIDmode
6053 SUBREG_REG, hence a zero new_src means we can't do
6054 this substitution. */
6058 src_hash = HASH (new_src, new_mode);
6059 src_elt = lookup (new_src, src_hash, new_mode);
6061 /* Put the new source in the hash table is if isn't
6065 if (insert_regs (new_src, classp, 0))
6067 rehash_using_reg (new_src);
6068 src_hash = HASH (new_src, new_mode);
6070 src_elt = insert (new_src, classp, src_hash, new_mode);
6071 src_elt->in_memory = elt->in_memory;
6073 else if (classp && classp != src_elt->first_same_value)
6074 /* Show that two things that we've seen before are
6075 actually the same. */
6076 merge_equiv_classes (src_elt, classp);
6078 classp = src_elt->first_same_value;
6079 /* Ignore invalid entries. */
6081 && GET_CODE (classp->exp) != REG
6082 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6083 classp = classp->next_same_value;
6088 /* Special handling for (set REG0 REG1) where REG0 is the
6089 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6090 be used in the sequel, so (if easily done) change this insn to
6091 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6092 that computed their value. Then REG1 will become a dead store
6093 and won't cloud the situation for later optimizations.
6095 Do not make this change if REG1 is a hard register, because it will
6096 then be used in the sequel and we may be changing a two-operand insn
6097 into a three-operand insn.
6099 Also do not do this if we are operating on a copy of INSN.
6101 Also don't do this if INSN ends a libcall; this would cause an unrelated
6102 register to be set in the middle of a libcall, and we then get bad code
6103 if the libcall is deleted. */
6105 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6106 && NEXT_INSN (PREV_INSN (insn)) == insn
6107 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6108 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6109 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6111 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6112 struct qty_table_elem *src_ent = &qty_table[src_q];
6114 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6115 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6118 /* Scan for the previous nonnote insn, but stop at a basic
6122 prev = PREV_INSN (prev);
6124 while (prev && GET_CODE (prev) == NOTE
6125 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6127 /* Do not swap the registers around if the previous instruction
6128 attaches a REG_EQUIV note to REG1.
6130 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6131 from the pseudo that originally shadowed an incoming argument
6132 to another register. Some uses of REG_EQUIV might rely on it
6133 being attached to REG1 rather than REG2.
6135 This section previously turned the REG_EQUIV into a REG_EQUAL
6136 note. We cannot do that because REG_EQUIV may provide an
6137 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6139 if (prev != 0 && GET_CODE (prev) == INSN
6140 && GET_CODE (PATTERN (prev)) == SET
6141 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6142 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6144 rtx dest = SET_DEST (sets[0].rtl);
6145 rtx src = SET_SRC (sets[0].rtl);
6148 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6149 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6150 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6151 apply_change_group ();
6153 /* If INSN has a REG_EQUAL note, and this note mentions
6154 REG0, then we must delete it, because the value in
6155 REG0 has changed. If the note's value is REG1, we must
6156 also delete it because that is now this insn's dest. */
6157 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6159 && (reg_mentioned_p (dest, XEXP (note, 0))
6160 || rtx_equal_p (src, XEXP (note, 0))))
6161 remove_note (insn, note);
6166 /* If this is a conditional jump insn, record any known equivalences due to
6167 the condition being tested. */
6169 last_jump_equiv_class = 0;
6170 if (GET_CODE (insn) == JUMP_INSN
6171 && n_sets == 1 && GET_CODE (x) == SET
6172 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6173 record_jump_equiv (insn, 0);
6176 /* If the previous insn set CC0 and this insn no longer references CC0,
6177 delete the previous insn. Here we use the fact that nothing expects CC0
6178 to be valid over an insn, which is true until the final pass. */
6179 if (prev_insn && GET_CODE (prev_insn) == INSN
6180 && (tem = single_set (prev_insn)) != 0
6181 && SET_DEST (tem) == cc0_rtx
6182 && ! reg_mentioned_p (cc0_rtx, x))
6183 delete_insn (prev_insn);
6185 prev_insn_cc0 = this_insn_cc0;
6186 prev_insn_cc0_mode = this_insn_cc0_mode;
6191 /* Remove from the hash table all expressions that reference memory. */
6194 invalidate_memory (void)
6197 struct table_elt *p, *next;
6199 for (i = 0; i < HASH_SIZE; i++)
6200 for (p = table[i]; p; p = next)
6202 next = p->next_same_hash;
6204 remove_from_table (p, i);
6208 /* If ADDR is an address that implicitly affects the stack pointer, return
6209 1 and update the register tables to show the effect. Else, return 0. */
6212 addr_affects_sp_p (rtx addr)
6214 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
6215 && GET_CODE (XEXP (addr, 0)) == REG
6216 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6218 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6220 REG_TICK (STACK_POINTER_REGNUM)++;
6221 /* Is it possible to use a subreg of SP? */
6222 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6225 /* This should be *very* rare. */
6226 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6227 invalidate (stack_pointer_rtx, VOIDmode);
6235 /* Perform invalidation on the basis of everything about an insn
6236 except for invalidating the actual places that are SET in it.
6237 This includes the places CLOBBERed, and anything that might
6238 alias with something that is SET or CLOBBERed.
6240 X is the pattern of the insn. */
6243 invalidate_from_clobbers (rtx x)
6245 if (GET_CODE (x) == CLOBBER)
6247 rtx ref = XEXP (x, 0);
6250 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6251 || GET_CODE (ref) == MEM)
6252 invalidate (ref, VOIDmode);
6253 else if (GET_CODE (ref) == STRICT_LOW_PART
6254 || GET_CODE (ref) == ZERO_EXTRACT)
6255 invalidate (XEXP (ref, 0), GET_MODE (ref));
6258 else if (GET_CODE (x) == PARALLEL)
6261 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6263 rtx y = XVECEXP (x, 0, i);
6264 if (GET_CODE (y) == CLOBBER)
6266 rtx ref = XEXP (y, 0);
6267 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6268 || GET_CODE (ref) == MEM)
6269 invalidate (ref, VOIDmode);
6270 else if (GET_CODE (ref) == STRICT_LOW_PART
6271 || GET_CODE (ref) == ZERO_EXTRACT)
6272 invalidate (XEXP (ref, 0), GET_MODE (ref));
6278 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6279 and replace any registers in them with either an equivalent constant
6280 or the canonical form of the register. If we are inside an address,
6281 only do this if the address remains valid.
6283 OBJECT is 0 except when within a MEM in which case it is the MEM.
6285 Return the replacement for X. */
6288 cse_process_notes (rtx x, rtx object)
6290 enum rtx_code code = GET_CODE (x);
6291 const char *fmt = GET_RTX_FORMAT (code);
6308 validate_change (x, &XEXP (x, 0),
6309 cse_process_notes (XEXP (x, 0), x), 0);
6314 if (REG_NOTE_KIND (x) == REG_EQUAL)
6315 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6317 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6324 rtx new = cse_process_notes (XEXP (x, 0), object);
6325 /* We don't substitute VOIDmode constants into these rtx,
6326 since they would impede folding. */
6327 if (GET_MODE (new) != VOIDmode)
6328 validate_change (object, &XEXP (x, 0), new, 0);
6333 i = REG_QTY (REGNO (x));
6335 /* Return a constant or a constant register. */
6336 if (REGNO_QTY_VALID_P (REGNO (x)))
6338 struct qty_table_elem *ent = &qty_table[i];
6340 if (ent->const_rtx != NULL_RTX
6341 && (CONSTANT_P (ent->const_rtx)
6342 || GET_CODE (ent->const_rtx) == REG))
6344 rtx new = gen_lowpart (GET_MODE (x), ent->const_rtx);
6350 /* Otherwise, canonicalize this register. */
6351 return canon_reg (x, NULL_RTX);
6357 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6359 validate_change (object, &XEXP (x, i),
6360 cse_process_notes (XEXP (x, i), object), 0);
6365 /* Find common subexpressions between the end test of a loop and the beginning
6366 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6368 Often we have a loop where an expression in the exit test is used
6369 in the body of the loop. For example "while (*p) *q++ = *p++;".
6370 Because of the way we duplicate the loop exit test in front of the loop,
6371 however, we don't detect that common subexpression. This will be caught
6372 when global cse is implemented, but this is a quite common case.
6374 This function handles the most common cases of these common expressions.
6375 It is called after we have processed the basic block ending with the
6376 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6377 jumps to a label used only once. */
6380 cse_around_loop (rtx loop_start)
6384 struct table_elt *p;
6386 /* If the jump at the end of the loop doesn't go to the start, we don't
6388 for (insn = PREV_INSN (loop_start);
6389 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6390 insn = PREV_INSN (insn))
6394 || GET_CODE (insn) != NOTE
6395 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6398 /* If the last insn of the loop (the end test) was an NE comparison,
6399 we will interpret it as an EQ comparison, since we fell through
6400 the loop. Any equivalences resulting from that comparison are
6401 therefore not valid and must be invalidated. */
6402 if (last_jump_equiv_class)
6403 for (p = last_jump_equiv_class->first_same_value; p;
6404 p = p->next_same_value)
6406 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6407 || (GET_CODE (p->exp) == SUBREG
6408 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6409 invalidate (p->exp, VOIDmode);
6410 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6411 || GET_CODE (p->exp) == ZERO_EXTRACT)
6412 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6415 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6416 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6418 The only thing we do with SET_DEST is invalidate entries, so we
6419 can safely process each SET in order. It is slightly less efficient
6420 to do so, but we only want to handle the most common cases.
6422 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6423 These pseudos won't have valid entries in any of the tables indexed
6424 by register number, such as reg_qty. We avoid out-of-range array
6425 accesses by not processing any instructions created after cse started. */
6427 for (insn = NEXT_INSN (loop_start);
6428 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6429 && INSN_UID (insn) < max_insn_uid
6430 && ! (GET_CODE (insn) == NOTE
6431 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6432 insn = NEXT_INSN (insn))
6435 && (GET_CODE (PATTERN (insn)) == SET
6436 || GET_CODE (PATTERN (insn)) == CLOBBER))
6437 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6438 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6439 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6440 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6441 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6442 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6447 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6448 since they are done elsewhere. This function is called via note_stores. */
6451 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6453 enum rtx_code code = GET_CODE (dest);
6456 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6457 /* There are times when an address can appear varying and be a PLUS
6458 during this scan when it would be a fixed address were we to know
6459 the proper equivalences. So invalidate all memory if there is
6460 a BLKmode or nonscalar memory reference or a reference to a
6461 variable address. */
6462 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6463 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6465 invalidate_memory ();
6469 if (GET_CODE (set) == CLOBBER
6474 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6475 invalidate (XEXP (dest, 0), GET_MODE (dest));
6476 else if (code == REG || code == SUBREG || code == MEM)
6477 invalidate (dest, VOIDmode);
6480 /* Invalidate all insns from START up to the end of the function or the
6481 next label. This called when we wish to CSE around a block that is
6482 conditionally executed. */
6485 invalidate_skipped_block (rtx start)
6489 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6490 insn = NEXT_INSN (insn))
6492 if (! INSN_P (insn))
6495 if (GET_CODE (insn) == CALL_INSN)
6497 if (! CONST_OR_PURE_CALL_P (insn))
6498 invalidate_memory ();
6499 invalidate_for_call ();
6502 invalidate_from_clobbers (PATTERN (insn));
6503 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6507 /* If modifying X will modify the value in *DATA (which is really an
6508 `rtx *'), indicate that fact by setting the pointed to value to
6512 cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
6514 rtx *cse_check_loop_start_value = (rtx *) data;
6516 if (*cse_check_loop_start_value == NULL_RTX
6517 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6520 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6521 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6522 *cse_check_loop_start_value = NULL_RTX;
6525 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6526 a loop that starts with the label at LOOP_START.
6528 If X is a SET, we see if its SET_SRC is currently in our hash table.
6529 If so, we see if it has a value equal to some register used only in the
6530 loop exit code (as marked by jump.c).
6532 If those two conditions are true, we search backwards from the start of
6533 the loop to see if that same value was loaded into a register that still
6534 retains its value at the start of the loop.
6536 If so, we insert an insn after the load to copy the destination of that
6537 load into the equivalent register and (try to) replace our SET_SRC with that
6540 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6543 cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
6545 struct table_elt *src_elt;
6547 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6548 are setting PC or CC0 or whose SET_SRC is already a register. */
6549 if (GET_CODE (x) == SET
6550 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6551 && GET_CODE (SET_SRC (x)) != REG)
6553 src_elt = lookup (SET_SRC (x),
6554 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6555 GET_MODE (SET_DEST (x)));
6558 for (src_elt = src_elt->first_same_value; src_elt;
6559 src_elt = src_elt->next_same_value)
6560 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6561 && COST (src_elt->exp) < COST (SET_SRC (x)))
6565 /* Look for an insn in front of LOOP_START that sets
6566 something in the desired mode to SET_SRC (x) before we hit
6567 a label or CALL_INSN. */
6569 for (p = prev_nonnote_insn (loop_start);
6570 p && GET_CODE (p) != CALL_INSN
6571 && GET_CODE (p) != CODE_LABEL;
6572 p = prev_nonnote_insn (p))
6573 if ((set = single_set (p)) != 0
6574 && GET_CODE (SET_DEST (set)) == REG
6575 && GET_MODE (SET_DEST (set)) == src_elt->mode
6576 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6578 /* We now have to ensure that nothing between P
6579 and LOOP_START modified anything referenced in
6580 SET_SRC (x). We know that nothing within the loop
6581 can modify it, or we would have invalidated it in
6584 rtx cse_check_loop_start_value = SET_SRC (x);
6585 for (q = p; q != loop_start; q = NEXT_INSN (q))
6587 note_stores (PATTERN (q),
6588 cse_check_loop_start,
6589 &cse_check_loop_start_value);
6591 /* If nothing was changed and we can replace our
6592 SET_SRC, add an insn after P to copy its destination
6593 to what we will be replacing SET_SRC with. */
6594 if (cse_check_loop_start_value
6596 && !can_throw_internal (insn)
6597 && validate_change (insn, &SET_SRC (x),
6600 /* If this creates new pseudos, this is unsafe,
6601 because the regno of new pseudo is unsuitable
6602 to index into reg_qty when cse_insn processes
6603 the new insn. Therefore, if a new pseudo was
6604 created, discard this optimization. */
6605 int nregs = max_reg_num ();
6607 = gen_move_insn (src_elt->exp, SET_DEST (set));
6608 if (nregs != max_reg_num ())
6610 if (! validate_change (insn, &SET_SRC (x),
6616 if (CONSTANT_P (SET_SRC (set))
6617 && ! find_reg_equal_equiv_note (insn))
6618 set_unique_reg_note (insn, REG_EQUAL,
6620 if (control_flow_insn_p (p))
6621 /* p can cause a control flow transfer so it
6622 is the last insn of a basic block. We can't
6623 therefore use emit_insn_after. */
6624 emit_insn_before (move, next_nonnote_insn (p));
6626 emit_insn_after (move, p);
6634 /* Deal with the destination of X affecting the stack pointer. */
6635 addr_affects_sp_p (SET_DEST (x));
6637 /* See comment on similar code in cse_insn for explanation of these
6639 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6640 || GET_CODE (SET_DEST (x)) == MEM)
6641 invalidate (SET_DEST (x), VOIDmode);
6642 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6643 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6644 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6647 /* Find the end of INSN's basic block and return its range,
6648 the total number of SETs in all the insns of the block, the last insn of the
6649 block, and the branch path.
6651 The branch path indicates which branches should be followed. If a nonzero
6652 path size is specified, the block should be rescanned and a different set
6653 of branches will be taken. The branch path is only used if
6654 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6656 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6657 used to describe the block. It is filled in with the information about
6658 the current block. The incoming structure's branch path, if any, is used
6659 to construct the output branch path. */
6662 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6663 int follow_jumps, int after_loop, int skip_blocks)
6667 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6668 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6669 int path_size = data->path_size;
6673 /* Update the previous branch path, if any. If the last branch was
6674 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6675 shorten the path by one and look at the previous branch. We know that
6676 at least one branch must have been taken if PATH_SIZE is nonzero. */
6677 while (path_size > 0)
6679 if (data->path[path_size - 1].status != NOT_TAKEN)
6681 data->path[path_size - 1].status = NOT_TAKEN;
6688 /* If the first instruction is marked with QImode, that means we've
6689 already processed this block. Our caller will look at DATA->LAST
6690 to figure out where to go next. We want to return the next block
6691 in the instruction stream, not some branched-to block somewhere
6692 else. We accomplish this by pretending our called forbid us to
6693 follow jumps, or skip blocks. */
6694 if (GET_MODE (insn) == QImode)
6695 follow_jumps = skip_blocks = 0;
6697 /* Scan to end of this basic block. */
6698 while (p && GET_CODE (p) != CODE_LABEL)
6700 /* Don't cse out the end of a loop. This makes a difference
6701 only for the unusual loops that always execute at least once;
6702 all other loops have labels there so we will stop in any case.
6703 Cse'ing out the end of the loop is dangerous because it
6704 might cause an invariant expression inside the loop
6705 to be reused after the end of the loop. This would make it
6706 hard to move the expression out of the loop in loop.c,
6707 especially if it is one of several equivalent expressions
6708 and loop.c would like to eliminate it.
6710 If we are running after loop.c has finished, we can ignore
6711 the NOTE_INSN_LOOP_END. */
6713 if (! after_loop && GET_CODE (p) == NOTE
6714 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6717 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6718 the regs restored by the longjmp come from
6719 a later time than the setjmp. */
6720 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6721 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6724 /* A PARALLEL can have lots of SETs in it,
6725 especially if it is really an ASM_OPERANDS. */
6726 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6727 nsets += XVECLEN (PATTERN (p), 0);
6728 else if (GET_CODE (p) != NOTE)
6731 /* Ignore insns made by CSE; they cannot affect the boundaries of
6734 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6735 high_cuid = INSN_CUID (p);
6736 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6737 low_cuid = INSN_CUID (p);
6739 /* See if this insn is in our branch path. If it is and we are to
6741 if (path_entry < path_size && data->path[path_entry].branch == p)
6743 if (data->path[path_entry].status != NOT_TAKEN)
6746 /* Point to next entry in path, if any. */
6750 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6751 was specified, we haven't reached our maximum path length, there are
6752 insns following the target of the jump, this is the only use of the
6753 jump label, and the target label is preceded by a BARRIER.
6755 Alternatively, we can follow the jump if it branches around a
6756 block of code and there are no other branches into the block.
6757 In this case invalidate_skipped_block will be called to invalidate any
6758 registers set in the block when following the jump. */
6760 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6761 && GET_CODE (p) == JUMP_INSN
6762 && GET_CODE (PATTERN (p)) == SET
6763 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6764 && JUMP_LABEL (p) != 0
6765 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6766 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6768 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6769 if ((GET_CODE (q) != NOTE
6770 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6771 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6772 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6773 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6776 /* If we ran into a BARRIER, this code is an extension of the
6777 basic block when the branch is taken. */
6778 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6780 /* Don't allow ourself to keep walking around an
6781 always-executed loop. */
6782 if (next_real_insn (q) == next)
6788 /* Similarly, don't put a branch in our path more than once. */
6789 for (i = 0; i < path_entry; i++)
6790 if (data->path[i].branch == p)
6793 if (i != path_entry)
6796 data->path[path_entry].branch = p;
6797 data->path[path_entry++].status = TAKEN;
6799 /* This branch now ends our path. It was possible that we
6800 didn't see this branch the last time around (when the
6801 insn in front of the target was a JUMP_INSN that was
6802 turned into a no-op). */
6803 path_size = path_entry;
6806 /* Mark block so we won't scan it again later. */
6807 PUT_MODE (NEXT_INSN (p), QImode);
6809 /* Detect a branch around a block of code. */
6810 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6814 if (next_real_insn (q) == next)
6820 for (i = 0; i < path_entry; i++)
6821 if (data->path[i].branch == p)
6824 if (i != path_entry)
6827 /* This is no_labels_between_p (p, q) with an added check for
6828 reaching the end of a function (in case Q precedes P). */
6829 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6830 if (GET_CODE (tmp) == CODE_LABEL)
6835 data->path[path_entry].branch = p;
6836 data->path[path_entry++].status = AROUND;
6838 path_size = path_entry;
6841 /* Mark block so we won't scan it again later. */
6842 PUT_MODE (NEXT_INSN (p), QImode);
6849 data->low_cuid = low_cuid;
6850 data->high_cuid = high_cuid;
6851 data->nsets = nsets;
6854 /* If all jumps in the path are not taken, set our path length to zero
6855 so a rescan won't be done. */
6856 for (i = path_size - 1; i >= 0; i--)
6857 if (data->path[i].status != NOT_TAKEN)
6861 data->path_size = 0;
6863 data->path_size = path_size;
6865 /* End the current branch path. */
6866 data->path[path_size].branch = 0;
6869 /* Perform cse on the instructions of a function.
6870 F is the first instruction.
6871 NREGS is one plus the highest pseudo-reg number used in the instruction.
6873 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6874 (only if -frerun-cse-after-loop).
6876 Returns 1 if jump_optimize should be redone due to simplifications
6877 in conditional jump instructions. */
6880 cse_main (rtx f, int nregs, int after_loop, FILE *file)
6882 struct cse_basic_block_data val;
6886 val.path = xmalloc (sizeof (struct branch_path)
6887 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6889 cse_jumps_altered = 0;
6890 recorded_label_ref = 0;
6891 constant_pool_entries_cost = 0;
6892 constant_pool_entries_regcost = 0;
6894 gen_lowpart = gen_lowpart_if_possible;
6897 init_alias_analysis ();
6901 max_insn_uid = get_max_uid ();
6903 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
6905 #ifdef LOAD_EXTEND_OP
6907 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6908 and change the code and mode as appropriate. */
6909 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6912 /* Reset the counter indicating how many elements have been made
6914 n_elements_made = 0;
6916 /* Find the largest uid. */
6918 max_uid = get_max_uid ();
6919 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
6921 /* Compute the mapping from uids to cuids.
6922 CUIDs are numbers assigned to insns, like uids,
6923 except that cuids increase monotonically through the code.
6924 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6925 between two insns is not affected by -g. */
6927 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6929 if (GET_CODE (insn) != NOTE
6930 || NOTE_LINE_NUMBER (insn) < 0)
6931 INSN_CUID (insn) = ++i;
6933 /* Give a line number note the same cuid as preceding insn. */
6934 INSN_CUID (insn) = i;
6937 ggc_push_context ();
6939 /* Loop over basic blocks.
6940 Compute the maximum number of qty's needed for each basic block
6941 (which is 2 for each SET). */
6946 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6947 flag_cse_skip_blocks);
6949 /* If this basic block was already processed or has no sets, skip it. */
6950 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6952 PUT_MODE (insn, VOIDmode);
6953 insn = (val.last ? NEXT_INSN (val.last) : 0);
6958 cse_basic_block_start = val.low_cuid;
6959 cse_basic_block_end = val.high_cuid;
6960 max_qty = val.nsets * 2;
6963 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6964 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6967 /* Make MAX_QTY bigger to give us room to optimize
6968 past the end of this basic block, if that should prove useful. */
6974 /* If this basic block is being extended by following certain jumps,
6975 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6976 Otherwise, we start after this basic block. */
6977 if (val.path_size > 0)
6978 cse_basic_block (insn, val.last, val.path, 0);
6981 int old_cse_jumps_altered = cse_jumps_altered;
6984 /* When cse changes a conditional jump to an unconditional
6985 jump, we want to reprocess the block, since it will give
6986 us a new branch path to investigate. */
6987 cse_jumps_altered = 0;
6988 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6989 if (cse_jumps_altered == 0
6990 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6993 cse_jumps_altered |= old_cse_jumps_altered;
7006 if (max_elements_made < n_elements_made)
7007 max_elements_made = n_elements_made;
7010 end_alias_analysis ();
7012 free (reg_eqv_table);
7014 gen_lowpart = gen_lowpart_general;
7016 return cse_jumps_altered || recorded_label_ref;
7019 /* Process a single basic block. FROM and TO and the limits of the basic
7020 block. NEXT_BRANCH points to the branch path when following jumps or
7021 a null path when not following jumps.
7023 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7024 loop. This is true when we are being called for the last time on a
7025 block and this CSE pass is before loop.c. */
7028 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7033 rtx libcall_insn = NULL_RTX;
7035 int no_conflict = 0;
7037 /* This array is undefined before max_reg, so only allocate
7038 the space actually needed and adjust the start. */
7040 qty_table = xmalloc ((max_qty - max_reg) * sizeof (struct qty_table_elem));
7041 qty_table -= max_reg;
7045 /* TO might be a label. If so, protect it from being deleted. */
7046 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7049 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7051 enum rtx_code code = GET_CODE (insn);
7053 /* If we have processed 1,000 insns, flush the hash table to
7054 avoid extreme quadratic behavior. We must not include NOTEs
7055 in the count since there may be more of them when generating
7056 debugging information. If we clear the table at different
7057 times, code generated with -g -O might be different than code
7058 generated with -O but not -g.
7060 ??? This is a real kludge and needs to be done some other way.
7062 if (code != NOTE && num_insns++ > 1000)
7064 flush_hash_table ();
7068 /* See if this is a branch that is part of the path. If so, and it is
7069 to be taken, do so. */
7070 if (next_branch->branch == insn)
7072 enum taken status = next_branch++->status;
7073 if (status != NOT_TAKEN)
7075 if (status == TAKEN)
7076 record_jump_equiv (insn, 1);
7078 invalidate_skipped_block (NEXT_INSN (insn));
7080 /* Set the last insn as the jump insn; it doesn't affect cc0.
7081 Then follow this branch. */
7086 insn = JUMP_LABEL (insn);
7091 if (GET_MODE (insn) == QImode)
7092 PUT_MODE (insn, VOIDmode);
7094 if (GET_RTX_CLASS (code) == RTX_INSN)
7098 /* Process notes first so we have all notes in canonical forms when
7099 looking for duplicate operations. */
7101 if (REG_NOTES (insn))
7102 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7104 /* Track when we are inside in LIBCALL block. Inside such a block,
7105 we do not want to record destinations. The last insn of a
7106 LIBCALL block is not considered to be part of the block, since
7107 its destination is the result of the block and hence should be
7110 if (REG_NOTES (insn) != 0)
7112 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7113 libcall_insn = XEXP (p, 0);
7114 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7116 /* Keep libcall_insn for the last SET insn of a no-conflict
7117 block to prevent changing the destination. */
7123 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
7127 cse_insn (insn, libcall_insn);
7129 if (no_conflict == -1)
7135 /* If we haven't already found an insn where we added a LABEL_REF,
7137 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7138 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7140 recorded_label_ref = 1;
7143 /* If INSN is now an unconditional jump, skip to the end of our
7144 basic block by pretending that we just did the last insn in the
7145 basic block. If we are jumping to the end of our block, show
7146 that we can have one usage of TO. */
7148 if (any_uncondjump_p (insn))
7152 free (qty_table + max_reg);
7156 if (JUMP_LABEL (insn) == to)
7159 /* Maybe TO was deleted because the jump is unconditional.
7160 If so, there is nothing left in this basic block. */
7161 /* ??? Perhaps it would be smarter to set TO
7162 to whatever follows this insn,
7163 and pretend the basic block had always ended here. */
7164 if (INSN_DELETED_P (to))
7167 insn = PREV_INSN (to);
7170 /* See if it is ok to keep on going past the label
7171 which used to end our basic block. Remember that we incremented
7172 the count of that label, so we decrement it here. If we made
7173 a jump unconditional, TO_USAGE will be one; in that case, we don't
7174 want to count the use in that jump. */
7176 if (to != 0 && NEXT_INSN (insn) == to
7177 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7179 struct cse_basic_block_data val;
7182 insn = NEXT_INSN (to);
7184 /* If TO was the last insn in the function, we are done. */
7187 free (qty_table + max_reg);
7191 /* If TO was preceded by a BARRIER we are done with this block
7192 because it has no continuation. */
7193 prev = prev_nonnote_insn (to);
7194 if (prev && GET_CODE (prev) == BARRIER)
7196 free (qty_table + max_reg);
7200 /* Find the end of the following block. Note that we won't be
7201 following branches in this case. */
7204 val.path = xmalloc (sizeof (struct branch_path)
7205 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7206 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7209 /* If the tables we allocated have enough space left
7210 to handle all the SETs in the next basic block,
7211 continue through it. Otherwise, return,
7212 and that block will be scanned individually. */
7213 if (val.nsets * 2 + next_qty > max_qty)
7216 cse_basic_block_start = val.low_cuid;
7217 cse_basic_block_end = val.high_cuid;
7220 /* Prevent TO from being deleted if it is a label. */
7221 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7224 /* Back up so we process the first insn in the extension. */
7225 insn = PREV_INSN (insn);
7229 if (next_qty > max_qty)
7232 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7233 the previous insn is the only insn that branches to the head of a loop,
7234 we can cse into the loop. Don't do this if we changed the jump
7235 structure of a loop unless we aren't going to be following jumps. */
7237 insn = prev_nonnote_insn (to);
7238 if ((cse_jumps_altered == 0
7239 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7240 && around_loop && to != 0
7241 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7242 && GET_CODE (insn) == JUMP_INSN
7243 && JUMP_LABEL (insn) != 0
7244 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7245 cse_around_loop (JUMP_LABEL (insn));
7247 free (qty_table + max_reg);
7249 return to ? NEXT_INSN (to) : 0;
7252 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7253 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7256 check_for_label_ref (rtx *rtl, void *data)
7258 rtx insn = (rtx) data;
7260 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7261 we must rerun jump since it needs to place the note. If this is a
7262 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7263 since no REG_LABEL will be added. */
7264 return (GET_CODE (*rtl) == LABEL_REF
7265 && ! LABEL_REF_NONLOCAL_P (*rtl)
7266 && LABEL_P (XEXP (*rtl, 0))
7267 && INSN_UID (XEXP (*rtl, 0)) != 0
7268 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7271 /* Count the number of times registers are used (not set) in X.
7272 COUNTS is an array in which we accumulate the count, INCR is how much
7273 we count each register usage. */
7276 count_reg_usage (rtx x, int *counts, int incr)
7286 switch (code = GET_CODE (x))
7289 counts[REGNO (x)] += incr;
7303 /* If we are clobbering a MEM, mark any registers inside the address
7305 if (GET_CODE (XEXP (x, 0)) == MEM)
7306 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7310 /* Unless we are setting a REG, count everything in SET_DEST. */
7311 if (GET_CODE (SET_DEST (x)) != REG)
7312 count_reg_usage (SET_DEST (x), counts, incr);
7313 count_reg_usage (SET_SRC (x), counts, incr);
7317 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7322 count_reg_usage (PATTERN (x), counts, incr);
7324 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7327 note = find_reg_equal_equiv_note (x);
7330 rtx eqv = XEXP (note, 0);
7332 if (GET_CODE (eqv) == EXPR_LIST)
7333 /* This REG_EQUAL note describes the result of a function call.
7334 Process all the arguments. */
7337 count_reg_usage (XEXP (eqv, 0), counts, incr);
7338 eqv = XEXP (eqv, 1);
7340 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7342 count_reg_usage (eqv, counts, incr);
7347 if (REG_NOTE_KIND (x) == REG_EQUAL
7348 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7349 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7350 involving registers in the address. */
7351 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7352 count_reg_usage (XEXP (x, 0), counts, incr);
7354 count_reg_usage (XEXP (x, 1), counts, incr);
7358 /* Iterate over just the inputs, not the constraints as well. */
7359 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7360 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7370 fmt = GET_RTX_FORMAT (code);
7371 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7374 count_reg_usage (XEXP (x, i), counts, incr);
7375 else if (fmt[i] == 'E')
7376 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7377 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7381 /* Return true if set is live. */
7383 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7390 if (set_noop_p (set))
7394 else if (GET_CODE (SET_DEST (set)) == CC0
7395 && !side_effects_p (SET_SRC (set))
7396 && ((tem = next_nonnote_insn (insn)) == 0
7398 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7401 else if (GET_CODE (SET_DEST (set)) != REG
7402 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7403 || counts[REGNO (SET_DEST (set))] != 0
7404 || side_effects_p (SET_SRC (set))
7405 /* An ADDRESSOF expression can turn into a use of the
7406 internal arg pointer, so always consider the
7407 internal arg pointer live. If it is truly dead,
7408 flow will delete the initializing insn. */
7409 || (SET_DEST (set) == current_function_internal_arg_pointer))
7414 /* Return true if insn is live. */
7417 insn_live_p (rtx insn, int *counts)
7420 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7422 else if (GET_CODE (PATTERN (insn)) == SET)
7423 return set_live_p (PATTERN (insn), insn, counts);
7424 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7426 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7428 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7430 if (GET_CODE (elt) == SET)
7432 if (set_live_p (elt, insn, counts))
7435 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7444 /* Return true if libcall is dead as a whole. */
7447 dead_libcall_p (rtx insn, int *counts)
7451 /* See if there's a REG_EQUAL note on this insn and try to
7452 replace the source with the REG_EQUAL expression.
7454 We assume that insns with REG_RETVALs can only be reg->reg
7455 copies at this point. */
7456 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7460 set = single_set (insn);
7464 new = simplify_rtx (XEXP (note, 0));
7466 new = XEXP (note, 0);
7468 /* While changing insn, we must update the counts accordingly. */
7469 count_reg_usage (insn, counts, -1);
7471 if (validate_change (insn, &SET_SRC (set), new, 0))
7473 count_reg_usage (insn, counts, 1);
7474 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7475 remove_note (insn, note);
7479 if (CONSTANT_P (new))
7481 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7482 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7484 count_reg_usage (insn, counts, 1);
7485 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7486 remove_note (insn, note);
7491 count_reg_usage (insn, counts, 1);
7495 /* Scan all the insns and delete any that are dead; i.e., they store a register
7496 that is never used or they copy a register to itself.
7498 This is used to remove insns made obviously dead by cse, loop or other
7499 optimizations. It improves the heuristics in loop since it won't try to
7500 move dead invariants out of loops or make givs for dead quantities. The
7501 remaining passes of the compilation are also sped up. */
7504 delete_trivially_dead_insns (rtx insns, int nreg)
7508 int in_libcall = 0, dead_libcall = 0;
7509 int ndead = 0, nlastdead, niterations = 0;
7511 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7512 /* First count the number of times each register is used. */
7513 counts = xcalloc (nreg, sizeof (int));
7514 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7515 count_reg_usage (insn, counts, 1);
7521 /* Go from the last insn to the first and delete insns that only set unused
7522 registers or copy a register to itself. As we delete an insn, remove
7523 usage counts for registers it uses.
7525 The first jump optimization pass may leave a real insn as the last
7526 insn in the function. We must not skip that insn or we may end
7527 up deleting code that is not really dead. */
7528 insn = get_last_insn ();
7529 if (! INSN_P (insn))
7530 insn = prev_real_insn (insn);
7532 for (; insn; insn = prev)
7536 prev = prev_real_insn (insn);
7538 /* Don't delete any insns that are part of a libcall block unless
7539 we can delete the whole libcall block.
7541 Flow or loop might get confused if we did that. Remember
7542 that we are scanning backwards. */
7543 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7547 dead_libcall = dead_libcall_p (insn, counts);
7549 else if (in_libcall)
7550 live_insn = ! dead_libcall;
7552 live_insn = insn_live_p (insn, counts);
7554 /* If this is a dead insn, delete it and show registers in it aren't
7559 count_reg_usage (insn, counts, -1);
7560 delete_insn_and_edges (insn);
7564 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7571 while (ndead != nlastdead);
7573 if (dump_file && ndead)
7574 fprintf (dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7575 ndead, niterations);
7578 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7582 /* This function is called via for_each_rtx. The argument, NEWREG, is
7583 a condition code register with the desired mode. If we are looking
7584 at the same register in a different mode, replace it with
7588 cse_change_cc_mode (rtx *loc, void *data)
7590 rtx newreg = (rtx) data;
7593 && GET_CODE (*loc) == REG
7594 && REGNO (*loc) == REGNO (newreg)
7595 && GET_MODE (*loc) != GET_MODE (newreg))
7603 /* Change the mode of any reference to the register REGNO (NEWREG) to
7604 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7605 any instruction which modifies NEWREG. */
7608 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7612 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7614 if (! INSN_P (insn))
7617 if (reg_set_p (newreg, insn))
7620 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, newreg);
7621 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, newreg);
7625 /* BB is a basic block which finishes with CC_REG as a condition code
7626 register which is set to CC_SRC. Look through the successors of BB
7627 to find blocks which have a single predecessor (i.e., this one),
7628 and look through those blocks for an assignment to CC_REG which is
7629 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7630 permitted to change the mode of CC_SRC to a compatible mode. This
7631 returns VOIDmode if no equivalent assignments were found.
7632 Otherwise it returns the mode which CC_SRC should wind up with.
7634 The main complexity in this function is handling the mode issues.
7635 We may have more than one duplicate which we can eliminate, and we
7636 try to find a mode which will work for multiple duplicates. */
7638 static enum machine_mode
7639 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7642 enum machine_mode mode;
7643 unsigned int insn_count;
7646 enum machine_mode modes[2];
7651 /* We expect to have two successors. Look at both before picking
7652 the final mode for the comparison. If we have more successors
7653 (i.e., some sort of table jump, although that seems unlikely),
7654 then we require all beyond the first two to use the same
7657 found_equiv = false;
7658 mode = GET_MODE (cc_src);
7660 for (e = bb->succ; e; e = e->succ_next)
7665 if (e->flags & EDGE_COMPLEX)
7669 || e->dest->pred->pred_next
7670 || e->dest == EXIT_BLOCK_PTR)
7673 end = NEXT_INSN (BB_END (e->dest));
7674 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7678 if (! INSN_P (insn))
7681 /* If CC_SRC is modified, we have to stop looking for
7682 something which uses it. */
7683 if (modified_in_p (cc_src, insn))
7686 /* Check whether INSN sets CC_REG to CC_SRC. */
7687 set = single_set (insn);
7689 && GET_CODE (SET_DEST (set)) == REG
7690 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7693 enum machine_mode set_mode;
7694 enum machine_mode comp_mode;
7697 set_mode = GET_MODE (SET_SRC (set));
7698 comp_mode = set_mode;
7699 if (rtx_equal_p (cc_src, SET_SRC (set)))
7701 else if (GET_CODE (cc_src) == COMPARE
7702 && GET_CODE (SET_SRC (set)) == COMPARE
7704 && rtx_equal_p (XEXP (cc_src, 0),
7705 XEXP (SET_SRC (set), 0))
7706 && rtx_equal_p (XEXP (cc_src, 1),
7707 XEXP (SET_SRC (set), 1)))
7710 comp_mode = (*targetm.cc_modes_compatible) (mode, set_mode);
7711 if (comp_mode != VOIDmode
7712 && (can_change_mode || comp_mode == mode))
7719 if (insn_count < ARRAY_SIZE (insns))
7721 insns[insn_count] = insn;
7722 modes[insn_count] = set_mode;
7723 last_insns[insn_count] = end;
7726 if (mode != comp_mode)
7728 if (! can_change_mode)
7731 PUT_MODE (cc_src, mode);
7736 if (set_mode != mode)
7738 /* We found a matching expression in the
7739 wrong mode, but we don't have room to
7740 store it in the array. Punt. This case
7744 /* INSN sets CC_REG to a value equal to CC_SRC
7745 with the right mode. We can simply delete
7750 /* We found an instruction to delete. Keep looking,
7751 in the hopes of finding a three-way jump. */
7755 /* We found an instruction which sets the condition
7756 code, so don't look any farther. */
7760 /* If INSN sets CC_REG in some other way, don't look any
7762 if (reg_set_p (cc_reg, insn))
7766 /* If we fell off the bottom of the block, we can keep looking
7767 through successors. We pass CAN_CHANGE_MODE as false because
7768 we aren't prepared to handle compatibility between the
7769 further blocks and this block. */
7772 enum machine_mode submode;
7774 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7775 if (submode != VOIDmode)
7777 if (submode != mode)
7780 can_change_mode = false;
7788 /* Now INSN_COUNT is the number of instructions we found which set
7789 CC_REG to a value equivalent to CC_SRC. The instructions are in
7790 INSNS. The modes used by those instructions are in MODES. */
7793 for (i = 0; i < insn_count; ++i)
7795 if (modes[i] != mode)
7797 /* We need to change the mode of CC_REG in INSNS[i] and
7798 subsequent instructions. */
7801 if (GET_MODE (cc_reg) == mode)
7804 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7806 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7810 delete_insn (insns[i]);
7816 /* If we have a fixed condition code register (or two), walk through
7817 the instructions and try to eliminate duplicate assignments. */
7820 cse_condition_code_reg (void)
7822 unsigned int cc_regno_1;
7823 unsigned int cc_regno_2;
7828 if (! (*targetm.fixed_condition_code_regs) (&cc_regno_1, &cc_regno_2))
7831 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7832 if (cc_regno_2 != INVALID_REGNUM)
7833 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7835 cc_reg_2 = NULL_RTX;
7844 enum machine_mode mode;
7845 enum machine_mode orig_mode;
7847 /* Look for blocks which end with a conditional jump based on a
7848 condition code register. Then look for the instruction which
7849 sets the condition code register. Then look through the
7850 successor blocks for instructions which set the condition
7851 code register to the same value. There are other possible
7852 uses of the condition code register, but these are by far the
7853 most common and the ones which we are most likely to be able
7856 last_insn = BB_END (bb);
7857 if (GET_CODE (last_insn) != JUMP_INSN)
7860 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7862 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7867 cc_src_insn = NULL_RTX;
7869 for (insn = PREV_INSN (last_insn);
7870 insn && insn != PREV_INSN (BB_HEAD (bb));
7871 insn = PREV_INSN (insn))
7875 if (! INSN_P (insn))
7877 set = single_set (insn);
7879 && GET_CODE (SET_DEST (set)) == REG
7880 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7883 cc_src = SET_SRC (set);
7886 else if (reg_set_p (cc_reg, insn))
7893 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7896 /* Now CC_REG is a condition code register used for a
7897 conditional jump at the end of the block, and CC_SRC, in
7898 CC_SRC_INSN, is the value to which that condition code
7899 register is set, and CC_SRC is still meaningful at the end of
7902 orig_mode = GET_MODE (cc_src);
7903 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
7904 if (mode != VOIDmode)
7906 if (mode != GET_MODE (cc_src))
7908 if (mode != orig_mode)
7910 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7912 /* Change the mode of CC_REG in CC_SRC_INSN to
7913 GET_MODE (NEWREG). */
7914 for_each_rtx (&PATTERN (cc_src_insn), cse_change_cc_mode,
7916 for_each_rtx (®_NOTES (cc_src_insn), cse_change_cc_mode,
7919 /* Do the same in the following insns that use the
7920 current value of CC_REG within BB. */
7921 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7922 NEXT_INSN (last_insn),