1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 /* stdio.h must precede rtl.h for FFS. */
31 #include "hard-reg-set.h"
34 #include "insn-config.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
203 /* One plus largest instruction UID used in this function at time of
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const;
249 unsigned int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
307 /* The quantity number of the register's current contents. */
310 /* The number of times the register has been altered in the current
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static unsigned int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if this pass has made changes, and therefore it's
376 worthwhile to run the garbage collector. */
378 static int cse_altered;
380 /* Nonzero if cse has altered conditional jump insns
381 in such a way that jump optimization should be redone. */
383 static int cse_jumps_altered;
385 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
386 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
387 to put in the note. */
388 static int recorded_label_ref;
390 /* canon_hash stores 1 in do_not_record
391 if it notices a reference to CC0, PC, or some other volatile
394 static int do_not_record;
396 #ifdef LOAD_EXTEND_OP
398 /* Scratch rtl used when looking for load-extended copy of a MEM. */
399 static rtx memory_extend_rtx;
402 /* canon_hash stores 1 in hash_arg_in_memory
403 if it notices a reference to memory within the expression being hashed. */
405 static int hash_arg_in_memory;
407 /* The hash table contains buckets which are chains of `struct table_elt's,
408 each recording one expression's information.
409 That expression is in the `exp' field.
411 The canon_exp field contains a canonical (from the point of view of
412 alias analysis) version of the `exp' field.
414 Those elements with the same hash code are chained in both directions
415 through the `next_same_hash' and `prev_same_hash' fields.
417 Each set of expressions with equivalent values
418 are on a two-way chain through the `next_same_value'
419 and `prev_same_value' fields, and all point with
420 the `first_same_value' field at the first element in
421 that chain. The chain is in order of increasing cost.
422 Each element's cost value is in its `cost' field.
424 The `in_memory' field is nonzero for elements that
425 involve any reference to memory. These elements are removed
426 whenever a write is done to an unidentified location in memory.
427 To be safe, we assume that a memory address is unidentified unless
428 the address is either a symbol constant or a constant plus
429 the frame pointer or argument pointer.
431 The `related_value' field is used to connect related expressions
432 (that differ by adding an integer).
433 The related expressions are chained in a circular fashion.
434 `related_value' is zero for expressions for which this
437 The `cost' field stores the cost of this element's expression.
439 The `is_const' flag is set if the element is a constant (including
442 The `flag' field is used as a temporary during some search routines.
444 The `mode' field is usually the same as GET_MODE (`exp'), but
445 if `exp' is a CONST_INT and has no machine mode then the `mode'
446 field is the mode it was being used as. Each constant is
447 recorded separately for each mode it is used with. */
454 struct table_elt *next_same_hash;
455 struct table_elt *prev_same_hash;
456 struct table_elt *next_same_value;
457 struct table_elt *prev_same_value;
458 struct table_elt *first_same_value;
459 struct table_elt *related_value;
461 enum machine_mode mode;
467 /* We don't want a lot of buckets, because we rarely have very many
468 things stored in the hash table, and a lot of buckets slows
469 down a lot of loops that happen frequently. */
471 #define HASH_SIZE (1 << HASH_SHIFT)
472 #define HASH_MASK (HASH_SIZE - 1)
474 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
475 register (hard registers may require `do_not_record' to be set). */
478 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
479 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
480 : canon_hash (X, M)) & HASH_MASK)
482 /* Determine whether register number N is considered a fixed register for CSE.
483 It is desirable to replace other regs with fixed regs, to reduce need for
485 A reg wins if it is either the frame pointer or designated as fixed. */
486 #define FIXED_REGNO_P(N) \
487 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
488 || fixed_regs[N] || global_regs[N])
490 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
491 hard registers and pointers into the frame are the cheapest with a cost
492 of 0. Next come pseudos with a cost of one and other hard registers with
493 a cost of 2. Aside from these special cases, call `rtx_cost'. */
495 #define CHEAP_REGNO(N) \
496 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
497 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
498 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
499 || ((N) < FIRST_PSEUDO_REGISTER \
500 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
502 /* A register is cheap if it is a user variable assigned to the register
503 or if its register number always corresponds to a cheap register. */
505 #define CHEAP_REG(N) \
506 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
507 || CHEAP_REGNO (REGNO (N)))
510 (GET_CODE (X) == REG \
511 ? (CHEAP_REG (X) ? 0 \
512 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
516 /* Get the info associated with register N. */
518 #define GET_CSE_REG_INFO(N) \
519 (((N) == cached_regno && cached_cse_reg_info) \
520 ? cached_cse_reg_info : get_cse_reg_info ((N)))
522 /* Get the number of times this register has been updated in this
525 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
527 /* Get the point at which REG was recorded in the table. */
529 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
531 /* Get the quantity number for REG. */
533 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
535 /* Determine if the quantity number for register X represents a valid index
536 into the qty_table. */
538 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
541 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
542 during CSE, such nodes are present. Using an ADDRESSOF node which
543 refers to the address of a REG is a good thing because we can then
544 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
545 #define CSE_ADDRESS_COST(RTX) \
546 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
547 ? -1 : ADDRESS_COST(RTX))
550 static struct table_elt *table[HASH_SIZE];
552 /* Chain of `struct table_elt's made so far for this function
553 but currently removed from the table. */
555 static struct table_elt *free_element_chain;
557 /* Number of `struct table_elt' structures made so far for this function. */
559 static int n_elements_made;
561 /* Maximum value `n_elements_made' has had so far in this compilation
562 for functions previously processed. */
564 static int max_elements_made;
566 /* Surviving equivalence class when two equivalence classes are merged
567 by recording the effects of a jump in the last insn. Zero if the
568 last insn was not a conditional jump. */
570 static struct table_elt *last_jump_equiv_class;
572 /* Set to the cost of a constant pool reference if one was found for a
573 symbolic constant. If this was found, it means we should try to
574 convert constants into constant pool entries if they don't fit in
577 static int constant_pool_entries_cost;
579 /* Define maximum length of a branch path. */
581 #define PATHLENGTH 10
583 /* This data describes a block that will be processed by cse_basic_block. */
585 struct cse_basic_block_data
587 /* Lowest CUID value of insns in block. */
589 /* Highest CUID value of insns in block. */
591 /* Total number of SETs in block. */
593 /* Last insn in the block. */
595 /* Size of current branch path, if any. */
597 /* Current branch path, indicating which branches will be taken. */
600 /* The branch insn. */
602 /* Whether it should be taken or not. AROUND is the same as taken
603 except that it is used when the destination label is not preceded
605 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
609 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
610 virtual regs here because the simplify_*_operation routines are called
611 by integrate.c, which is called before virtual register instantiation.
613 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
614 a header file so that their definitions can be shared with the
615 simplification routines in simplify-rtx.c. Until then, do not
616 change these macros without also changing the copy in simplify-rtx.c. */
618 #define FIXED_BASE_PLUS_P(X) \
619 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
620 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
621 || (X) == virtual_stack_vars_rtx \
622 || (X) == virtual_incoming_args_rtx \
623 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
624 && (XEXP (X, 0) == frame_pointer_rtx \
625 || XEXP (X, 0) == hard_frame_pointer_rtx \
626 || ((X) == arg_pointer_rtx \
627 && fixed_regs[ARG_POINTER_REGNUM]) \
628 || XEXP (X, 0) == virtual_stack_vars_rtx \
629 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
630 || GET_CODE (X) == ADDRESSOF)
632 /* Similar, but also allows reference to the stack pointer.
634 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
635 arg_pointer_rtx by itself is nonzero, because on at least one machine,
636 the i960, the arg pointer is zero when it is unused. */
638 #define NONZERO_BASE_PLUS_P(X) \
639 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
640 || (X) == virtual_stack_vars_rtx \
641 || (X) == virtual_incoming_args_rtx \
642 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
643 && (XEXP (X, 0) == frame_pointer_rtx \
644 || XEXP (X, 0) == hard_frame_pointer_rtx \
645 || ((X) == arg_pointer_rtx \
646 && fixed_regs[ARG_POINTER_REGNUM]) \
647 || XEXP (X, 0) == virtual_stack_vars_rtx \
648 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
649 || (X) == stack_pointer_rtx \
650 || (X) == virtual_stack_dynamic_rtx \
651 || (X) == virtual_outgoing_args_rtx \
652 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
653 && (XEXP (X, 0) == stack_pointer_rtx \
654 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
655 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
656 || GET_CODE (X) == ADDRESSOF)
658 static int notreg_cost PARAMS ((rtx));
659 static void new_basic_block PARAMS ((void));
660 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
661 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
662 static void delete_reg_equiv PARAMS ((unsigned int));
663 static int mention_regs PARAMS ((rtx));
664 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
665 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
666 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
667 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
668 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
669 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
671 static void merge_equiv_classes PARAMS ((struct table_elt *,
672 struct table_elt *));
673 static void invalidate PARAMS ((rtx, enum machine_mode));
674 static int cse_rtx_varies_p PARAMS ((rtx));
675 static void remove_invalid_refs PARAMS ((unsigned int));
676 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
678 static void rehash_using_reg PARAMS ((rtx));
679 static void invalidate_memory PARAMS ((void));
680 static void invalidate_for_call PARAMS ((void));
681 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
682 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
683 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
684 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
685 static rtx canon_reg PARAMS ((rtx, rtx));
686 static void find_best_addr PARAMS ((rtx, rtx *));
687 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
689 enum machine_mode *));
690 static rtx fold_rtx PARAMS ((rtx, rtx));
691 static rtx equiv_constant PARAMS ((rtx));
692 static void record_jump_equiv PARAMS ((rtx, int));
693 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
695 static void cse_insn PARAMS ((rtx, rtx));
696 static int addr_affects_sp_p PARAMS ((rtx));
697 static void invalidate_from_clobbers PARAMS ((rtx));
698 static rtx cse_process_notes PARAMS ((rtx, rtx));
699 static void cse_around_loop PARAMS ((rtx));
700 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
701 static void invalidate_skipped_block PARAMS ((rtx));
702 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
703 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
704 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
705 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
706 extern void dump_class PARAMS ((struct table_elt*));
707 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
708 static int check_dependence PARAMS ((rtx *, void *));
710 static void flush_hash_table PARAMS ((void));
712 /* Dump the expressions in the equivalence class indicated by CLASSP.
713 This function is used only for debugging. */
716 struct table_elt *classp;
718 struct table_elt *elt;
720 fprintf (stderr, "Equivalence chain for ");
721 print_rtl (stderr, classp->exp);
722 fprintf (stderr, ": \n");
724 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
726 print_rtl (stderr, elt->exp);
727 fprintf (stderr, "\n");
731 /* Internal function, to compute cost when X is not a register; called
732 from COST macro to keep it simple. */
738 return ((GET_CODE (x) == SUBREG
739 && GET_CODE (SUBREG_REG (x)) == REG
740 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
741 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
742 && (GET_MODE_SIZE (GET_MODE (x))
743 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
744 && subreg_lowpart_p (x)
745 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
746 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
747 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
748 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
750 : rtx_cost (x, SET) * 2);
753 /* Return the right cost to give to an operation
754 to make the cost of the corresponding register-to-register instruction
755 N times that of a fast register-to-register instruction. */
757 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
759 /* Return an estimate of the cost of computing rtx X.
760 One use is in cse, to decide which expression to keep in the hash table.
761 Another is in rtl generation, to pick the cheapest way to multiply.
762 Other uses like the latter are expected in the future. */
765 rtx_cost (x, outer_code)
767 enum rtx_code outer_code ATTRIBUTE_UNUSED;
770 register enum rtx_code code;
771 register const char *fmt;
777 /* Compute the default costs of certain things.
778 Note that RTX_COSTS can override the defaults. */
784 /* Count multiplication by 2**n as a shift,
785 because if we are considering it, we would output it as a shift. */
786 if (GET_CODE (XEXP (x, 1)) == CONST_INT
787 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
790 total = COSTS_N_INSNS (5);
796 total = COSTS_N_INSNS (7);
799 /* Used in loop.c and combine.c as a marker. */
803 /* We don't want these to be used in substitutions because
804 we have no way of validating the resulting insn. So assign
805 anything containing an ASM_OPERANDS a very high cost. */
815 return ! CHEAP_REG (x);
818 /* If we can't tie these modes, make this expensive. The larger
819 the mode, the more expensive it is. */
820 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
821 return COSTS_N_INSNS (2
822 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
825 RTX_COSTS (x, code, outer_code);
828 CONST_COSTS (x, code, outer_code);
832 #ifdef DEFAULT_RTX_COSTS
833 DEFAULT_RTX_COSTS(x, code, outer_code);
838 /* Sum the costs of the sub-rtx's, plus cost of this operation,
839 which is already in total. */
841 fmt = GET_RTX_FORMAT (code);
842 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
844 total += rtx_cost (XEXP (x, i), code);
845 else if (fmt[i] == 'E')
846 for (j = 0; j < XVECLEN (x, i); j++)
847 total += rtx_cost (XVECEXP (x, i, j), code);
852 static struct cse_reg_info *
853 get_cse_reg_info (regno)
856 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
857 struct cse_reg_info *p;
859 for (p = *hash_head ; p != NULL; p = p->hash_next)
860 if (p->regno == regno)
865 /* Get a new cse_reg_info structure. */
866 if (cse_reg_info_free_list)
868 p = cse_reg_info_free_list;
869 cse_reg_info_free_list = p->next;
872 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
874 /* Insert into hash table. */
875 p->hash_next = *hash_head;
880 p->reg_in_table = -1;
883 p->next = cse_reg_info_used_list;
884 cse_reg_info_used_list = p;
885 if (!cse_reg_info_used_list_end)
886 cse_reg_info_used_list_end = p;
889 /* Cache this lookup; we tend to be looking up information about the
890 same register several times in a row. */
891 cached_regno = regno;
892 cached_cse_reg_info = p;
897 /* Clear the hash table and initialize each register with its own quantity,
898 for a new basic block. */
907 /* Clear out hash table state for this pass. */
909 bzero ((char *) reg_hash, sizeof reg_hash);
911 if (cse_reg_info_used_list)
913 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
914 cse_reg_info_free_list = cse_reg_info_used_list;
915 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
917 cached_cse_reg_info = 0;
919 CLEAR_HARD_REG_SET (hard_regs_in_table);
921 /* The per-quantity values used to be initialized here, but it is
922 much faster to initialize each as it is made in `make_new_qty'. */
924 for (i = 0; i < HASH_SIZE; i++)
926 struct table_elt *first;
931 struct table_elt *last = first;
935 while (last->next_same_hash != NULL)
936 last = last->next_same_hash;
938 /* Now relink this hash entire chain into
939 the free element list. */
941 last->next_same_hash = free_element_chain;
942 free_element_chain = first;
953 /* Say that register REG contains a quantity in mode MODE not in any
954 register before and initialize that quantity. */
957 make_new_qty (reg, mode)
959 enum machine_mode mode;
962 register struct qty_table_elem *ent;
963 register struct reg_eqv_elem *eqv;
965 if (next_qty >= max_qty)
968 q = REG_QTY (reg) = next_qty++;
970 ent->first_reg = reg;
973 ent->const_rtx = ent->const_insn = NULL_RTX;
974 ent->comparison_code = UNKNOWN;
976 eqv = ®_eqv_table[reg];
977 eqv->next = eqv->prev = -1;
980 /* Make reg NEW equivalent to reg OLD.
981 OLD is not changing; NEW is. */
984 make_regs_eqv (new, old)
985 unsigned int new, old;
987 unsigned int lastr, firstr;
988 int q = REG_QTY (old);
989 struct qty_table_elem *ent;
993 /* Nothing should become eqv until it has a "non-invalid" qty number. */
994 if (! REGNO_QTY_VALID_P (old))
998 firstr = ent->first_reg;
999 lastr = ent->last_reg;
1001 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1002 hard regs. Among pseudos, if NEW will live longer than any other reg
1003 of the same qty, and that is beyond the current basic block,
1004 make it the new canonical replacement for this qty. */
1005 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1006 /* Certain fixed registers might be of the class NO_REGS. This means
1007 that not only can they not be allocated by the compiler, but
1008 they cannot be used in substitutions or canonicalizations
1010 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1011 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1012 || (new >= FIRST_PSEUDO_REGISTER
1013 && (firstr < FIRST_PSEUDO_REGISTER
1014 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1015 || (uid_cuid[REGNO_FIRST_UID (new)]
1016 < cse_basic_block_start))
1017 && (uid_cuid[REGNO_LAST_UID (new)]
1018 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1020 reg_eqv_table[firstr].prev = new;
1021 reg_eqv_table[new].next = firstr;
1022 reg_eqv_table[new].prev = -1;
1023 ent->first_reg = new;
1027 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1028 Otherwise, insert before any non-fixed hard regs that are at the
1029 end. Registers of class NO_REGS cannot be used as an
1030 equivalent for anything. */
1031 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1032 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1033 && new >= FIRST_PSEUDO_REGISTER)
1034 lastr = reg_eqv_table[lastr].prev;
1035 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1036 if (reg_eqv_table[lastr].next >= 0)
1037 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1039 qty_table[q].last_reg = new;
1040 reg_eqv_table[lastr].next = new;
1041 reg_eqv_table[new].prev = lastr;
1045 /* Remove REG from its equivalence class. */
1048 delete_reg_equiv (reg)
1051 register struct qty_table_elem *ent;
1052 register int q = REG_QTY (reg);
1055 /* If invalid, do nothing. */
1059 ent = &qty_table[q];
1061 p = reg_eqv_table[reg].prev;
1062 n = reg_eqv_table[reg].next;
1065 reg_eqv_table[n].prev = p;
1069 reg_eqv_table[p].next = n;
1073 REG_QTY (reg) = reg;
1076 /* Remove any invalid expressions from the hash table
1077 that refer to any of the registers contained in expression X.
1079 Make sure that newly inserted references to those registers
1080 as subexpressions will be considered valid.
1082 mention_regs is not called when a register itself
1083 is being stored in the table.
1085 Return 1 if we have done something that may have changed the hash code
1092 register enum rtx_code code;
1094 register const char *fmt;
1095 register int changed = 0;
1100 code = GET_CODE (x);
1103 unsigned int regno = REGNO (x);
1104 unsigned int endregno
1105 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1106 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1109 for (i = regno; i < endregno; i++)
1111 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1112 remove_invalid_refs (i);
1114 REG_IN_TABLE (i) = REG_TICK (i);
1120 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1121 pseudo if they don't use overlapping words. We handle only pseudos
1122 here for simplicity. */
1123 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1124 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1126 unsigned int i = REGNO (SUBREG_REG (x));
1128 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1130 /* If reg_tick has been incremented more than once since
1131 reg_in_table was last set, that means that the entire
1132 register has been set before, so discard anything memorized
1133 for the entrire register, including all SUBREG expressions. */
1134 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1135 remove_invalid_refs (i);
1137 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1140 REG_IN_TABLE (i) = REG_TICK (i);
1144 /* If X is a comparison or a COMPARE and either operand is a register
1145 that does not have a quantity, give it one. This is so that a later
1146 call to record_jump_equiv won't cause X to be assigned a different
1147 hash code and not found in the table after that call.
1149 It is not necessary to do this here, since rehash_using_reg can
1150 fix up the table later, but doing this here eliminates the need to
1151 call that expensive function in the most common case where the only
1152 use of the register is in the comparison. */
1154 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1156 if (GET_CODE (XEXP (x, 0)) == REG
1157 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1158 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1160 rehash_using_reg (XEXP (x, 0));
1164 if (GET_CODE (XEXP (x, 1)) == REG
1165 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1166 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1168 rehash_using_reg (XEXP (x, 1));
1173 fmt = GET_RTX_FORMAT (code);
1174 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1176 changed |= mention_regs (XEXP (x, i));
1177 else if (fmt[i] == 'E')
1178 for (j = 0; j < XVECLEN (x, i); j++)
1179 changed |= mention_regs (XVECEXP (x, i, j));
1184 /* Update the register quantities for inserting X into the hash table
1185 with a value equivalent to CLASSP.
1186 (If the class does not contain a REG, it is irrelevant.)
1187 If MODIFIED is nonzero, X is a destination; it is being modified.
1188 Note that delete_reg_equiv should be called on a register
1189 before insert_regs is done on that register with MODIFIED != 0.
1191 Nonzero value means that elements of reg_qty have changed
1192 so X's hash code may be different. */
1195 insert_regs (x, classp, modified)
1197 struct table_elt *classp;
1200 if (GET_CODE (x) == REG)
1202 unsigned int regno = REGNO (x);
1205 /* If REGNO is in the equivalence table already but is of the
1206 wrong mode for that equivalence, don't do anything here. */
1208 qty_valid = REGNO_QTY_VALID_P (regno);
1211 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1213 if (ent->mode != GET_MODE (x))
1217 if (modified || ! qty_valid)
1220 for (classp = classp->first_same_value;
1222 classp = classp->next_same_value)
1223 if (GET_CODE (classp->exp) == REG
1224 && GET_MODE (classp->exp) == GET_MODE (x))
1226 make_regs_eqv (regno, REGNO (classp->exp));
1230 make_new_qty (regno, GET_MODE (x));
1237 /* If X is a SUBREG, we will likely be inserting the inner register in the
1238 table. If that register doesn't have an assigned quantity number at
1239 this point but does later, the insertion that we will be doing now will
1240 not be accessible because its hash code will have changed. So assign
1241 a quantity number now. */
1243 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1244 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1246 unsigned int regno = REGNO (SUBREG_REG (x));
1248 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1249 /* Mention_regs checks if REG_TICK is exactly one larger than
1250 REG_IN_TABLE to find out if there was only a single preceding
1251 invalidation - for the SUBREG - or another one, which would be
1252 for the full register. Since we don't invalidate the SUBREG
1253 here first, we might have to bump up REG_TICK so that mention_regs
1254 will do the right thing. */
1255 if (REG_IN_TABLE (regno) >= 0
1256 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1262 return mention_regs (x);
1265 /* Look in or update the hash table. */
1267 /* Remove table element ELT from use in the table.
1268 HASH is its hash code, made using the HASH macro.
1269 It's an argument because often that is known in advance
1270 and we save much time not recomputing it. */
1273 remove_from_table (elt, hash)
1274 register struct table_elt *elt;
1280 /* Mark this element as removed. See cse_insn. */
1281 elt->first_same_value = 0;
1283 /* Remove the table element from its equivalence class. */
1286 register struct table_elt *prev = elt->prev_same_value;
1287 register struct table_elt *next = elt->next_same_value;
1289 if (next) next->prev_same_value = prev;
1292 prev->next_same_value = next;
1295 register struct table_elt *newfirst = next;
1298 next->first_same_value = newfirst;
1299 next = next->next_same_value;
1304 /* Remove the table element from its hash bucket. */
1307 register struct table_elt *prev = elt->prev_same_hash;
1308 register struct table_elt *next = elt->next_same_hash;
1310 if (next) next->prev_same_hash = prev;
1313 prev->next_same_hash = next;
1314 else if (table[hash] == elt)
1318 /* This entry is not in the proper hash bucket. This can happen
1319 when two classes were merged by `merge_equiv_classes'. Search
1320 for the hash bucket that it heads. This happens only very
1321 rarely, so the cost is acceptable. */
1322 for (hash = 0; hash < HASH_SIZE; hash++)
1323 if (table[hash] == elt)
1328 /* Remove the table element from its related-value circular chain. */
1330 if (elt->related_value != 0 && elt->related_value != elt)
1332 register struct table_elt *p = elt->related_value;
1334 while (p->related_value != elt)
1335 p = p->related_value;
1336 p->related_value = elt->related_value;
1337 if (p->related_value == p)
1338 p->related_value = 0;
1341 /* Now add it to the free element chain. */
1342 elt->next_same_hash = free_element_chain;
1343 free_element_chain = elt;
1346 /* Look up X in the hash table and return its table element,
1347 or 0 if X is not in the table.
1349 MODE is the machine-mode of X, or if X is an integer constant
1350 with VOIDmode then MODE is the mode with which X will be used.
1352 Here we are satisfied to find an expression whose tree structure
1355 static struct table_elt *
1356 lookup (x, hash, mode)
1359 enum machine_mode mode;
1361 register struct table_elt *p;
1363 for (p = table[hash]; p; p = p->next_same_hash)
1364 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1365 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1371 /* Like `lookup' but don't care whether the table element uses invalid regs.
1372 Also ignore discrepancies in the machine mode of a register. */
1374 static struct table_elt *
1375 lookup_for_remove (x, hash, mode)
1378 enum machine_mode mode;
1380 register struct table_elt *p;
1382 if (GET_CODE (x) == REG)
1384 unsigned int regno = REGNO (x);
1386 /* Don't check the machine mode when comparing registers;
1387 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1388 for (p = table[hash]; p; p = p->next_same_hash)
1389 if (GET_CODE (p->exp) == REG
1390 && REGNO (p->exp) == regno)
1395 for (p = table[hash]; p; p = p->next_same_hash)
1396 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1403 /* Look for an expression equivalent to X and with code CODE.
1404 If one is found, return that expression. */
1407 lookup_as_function (x, code)
1411 register struct table_elt *p
1412 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1414 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1415 long as we are narrowing. So if we looked in vain for a mode narrower
1416 than word_mode before, look for word_mode now. */
1417 if (p == 0 && code == CONST_INT
1418 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1421 PUT_MODE (x, word_mode);
1422 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1428 for (p = p->first_same_value; p; p = p->next_same_value)
1429 if (GET_CODE (p->exp) == code
1430 /* Make sure this is a valid entry in the table. */
1431 && exp_equiv_p (p->exp, p->exp, 1, 0))
1437 /* Insert X in the hash table, assuming HASH is its hash code
1438 and CLASSP is an element of the class it should go in
1439 (or 0 if a new class should be made).
1440 It is inserted at the proper position to keep the class in
1441 the order cheapest first.
1443 MODE is the machine-mode of X, or if X is an integer constant
1444 with VOIDmode then MODE is the mode with which X will be used.
1446 For elements of equal cheapness, the most recent one
1447 goes in front, except that the first element in the list
1448 remains first unless a cheaper element is added. The order of
1449 pseudo-registers does not matter, as canon_reg will be called to
1450 find the cheapest when a register is retrieved from the table.
1452 The in_memory field in the hash table element is set to 0.
1453 The caller must set it nonzero if appropriate.
1455 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1456 and if insert_regs returns a nonzero value
1457 you must then recompute its hash code before calling here.
1459 If necessary, update table showing constant values of quantities. */
1461 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1463 static struct table_elt *
1464 insert (x, classp, hash, mode)
1466 register struct table_elt *classp;
1468 enum machine_mode mode;
1470 register struct table_elt *elt;
1472 /* If X is a register and we haven't made a quantity for it,
1473 something is wrong. */
1474 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1477 /* If X is a hard register, show it is being put in the table. */
1478 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1480 unsigned int regno = REGNO (x);
1481 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1484 for (i = regno; i < endregno; i++)
1485 SET_HARD_REG_BIT (hard_regs_in_table, i);
1488 /* If X is a label, show we recorded it. */
1489 if (GET_CODE (x) == LABEL_REF
1490 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1491 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1492 recorded_label_ref = 1;
1494 /* Put an element for X into the right hash bucket. */
1496 elt = free_element_chain;
1498 free_element_chain = elt->next_same_hash;
1502 elt = (struct table_elt *) oballoc (sizeof (struct table_elt));
1506 elt->canon_exp = NULL_RTX;
1507 elt->cost = COST (x);
1508 elt->next_same_value = 0;
1509 elt->prev_same_value = 0;
1510 elt->next_same_hash = table[hash];
1511 elt->prev_same_hash = 0;
1512 elt->related_value = 0;
1515 elt->is_const = (CONSTANT_P (x)
1516 /* GNU C++ takes advantage of this for `this'
1517 (and other const values). */
1518 || (RTX_UNCHANGING_P (x)
1519 && GET_CODE (x) == REG
1520 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1521 || FIXED_BASE_PLUS_P (x));
1524 table[hash]->prev_same_hash = elt;
1527 /* Put it into the proper value-class. */
1530 classp = classp->first_same_value;
1531 if (CHEAPER (elt, classp))
1532 /* Insert at the head of the class */
1534 register struct table_elt *p;
1535 elt->next_same_value = classp;
1536 classp->prev_same_value = elt;
1537 elt->first_same_value = elt;
1539 for (p = classp; p; p = p->next_same_value)
1540 p->first_same_value = elt;
1544 /* Insert not at head of the class. */
1545 /* Put it after the last element cheaper than X. */
1546 register struct table_elt *p, *next;
1548 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1551 /* Put it after P and before NEXT. */
1552 elt->next_same_value = next;
1554 next->prev_same_value = elt;
1556 elt->prev_same_value = p;
1557 p->next_same_value = elt;
1558 elt->first_same_value = classp;
1562 elt->first_same_value = elt;
1564 /* If this is a constant being set equivalent to a register or a register
1565 being set equivalent to a constant, note the constant equivalence.
1567 If this is a constant, it cannot be equivalent to a different constant,
1568 and a constant is the only thing that can be cheaper than a register. So
1569 we know the register is the head of the class (before the constant was
1572 If this is a register that is not already known equivalent to a
1573 constant, we must check the entire class.
1575 If this is a register that is already known equivalent to an insn,
1576 update the qtys `const_insn' to show that `this_insn' is the latest
1577 insn making that quantity equivalent to the constant. */
1579 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1580 && GET_CODE (x) != REG)
1582 int exp_q = REG_QTY (REGNO (classp->exp));
1583 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1585 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1586 exp_ent->const_insn = this_insn;
1589 else if (GET_CODE (x) == REG
1591 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1594 register struct table_elt *p;
1596 for (p = classp; p != 0; p = p->next_same_value)
1598 if (p->is_const && GET_CODE (p->exp) != REG)
1600 int x_q = REG_QTY (REGNO (x));
1601 struct qty_table_elem *x_ent = &qty_table[x_q];
1604 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1605 x_ent->const_insn = this_insn;
1611 else if (GET_CODE (x) == REG
1612 && qty_table[REG_QTY (REGNO (x))].const_rtx
1613 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1614 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1616 /* If this is a constant with symbolic value,
1617 and it has a term with an explicit integer value,
1618 link it up with related expressions. */
1619 if (GET_CODE (x) == CONST)
1621 rtx subexp = get_related_value (x);
1623 struct table_elt *subelt, *subelt_prev;
1627 /* Get the integer-free subexpression in the hash table. */
1628 subhash = safe_hash (subexp, mode) & HASH_MASK;
1629 subelt = lookup (subexp, subhash, mode);
1631 subelt = insert (subexp, NULL_PTR, subhash, mode);
1632 /* Initialize SUBELT's circular chain if it has none. */
1633 if (subelt->related_value == 0)
1634 subelt->related_value = subelt;
1635 /* Find the element in the circular chain that precedes SUBELT. */
1636 subelt_prev = subelt;
1637 while (subelt_prev->related_value != subelt)
1638 subelt_prev = subelt_prev->related_value;
1639 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1640 This way the element that follows SUBELT is the oldest one. */
1641 elt->related_value = subelt_prev->related_value;
1642 subelt_prev->related_value = elt;
1649 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1650 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1651 the two classes equivalent.
1653 CLASS1 will be the surviving class; CLASS2 should not be used after this
1656 Any invalid entries in CLASS2 will not be copied. */
1659 merge_equiv_classes (class1, class2)
1660 struct table_elt *class1, *class2;
1662 struct table_elt *elt, *next, *new;
1664 /* Ensure we start with the head of the classes. */
1665 class1 = class1->first_same_value;
1666 class2 = class2->first_same_value;
1668 /* If they were already equal, forget it. */
1669 if (class1 == class2)
1672 for (elt = class2; elt; elt = next)
1676 enum machine_mode mode = elt->mode;
1678 next = elt->next_same_value;
1680 /* Remove old entry, make a new one in CLASS1's class.
1681 Don't do this for invalid entries as we cannot find their
1682 hash code (it also isn't necessary). */
1683 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1685 hash_arg_in_memory = 0;
1686 hash = HASH (exp, mode);
1688 if (GET_CODE (exp) == REG)
1689 delete_reg_equiv (REGNO (exp));
1691 remove_from_table (elt, hash);
1693 if (insert_regs (exp, class1, 0))
1695 rehash_using_reg (exp);
1696 hash = HASH (exp, mode);
1698 new = insert (exp, class1, hash, mode);
1699 new->in_memory = hash_arg_in_memory;
1705 /* Flush the entire hash table. */
1711 struct table_elt *p;
1713 for (i = 0; i < HASH_SIZE; i++)
1714 for (p = table[i]; p; p = table[i])
1716 /* Note that invalidate can remove elements
1717 after P in the current hash chain. */
1718 if (GET_CODE (p->exp) == REG)
1719 invalidate (p->exp, p->mode);
1721 remove_from_table (p, i);
1725 /* Function called for each rtx to check whether true dependence exist. */
1726 struct check_dependence_data
1728 enum machine_mode mode;
1732 check_dependence (x, data)
1736 struct check_dependence_data *d = (struct check_dependence_data *) data;
1737 if (*x && GET_CODE (*x) == MEM)
1738 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1743 /* Remove from the hash table, or mark as invalid, all expressions whose
1744 values could be altered by storing in X. X is a register, a subreg, or
1745 a memory reference with nonvarying address (because, when a memory
1746 reference with a varying address is stored in, all memory references are
1747 removed by invalidate_memory so specific invalidation is superfluous).
1748 FULL_MODE, if not VOIDmode, indicates that this much should be
1749 invalidated instead of just the amount indicated by the mode of X. This
1750 is only used for bitfield stores into memory.
1752 A nonvarying address may be just a register or just a symbol reference,
1753 or it may be either of those plus a numeric offset. */
1756 invalidate (x, full_mode)
1758 enum machine_mode full_mode;
1761 register struct table_elt *p;
1763 switch (GET_CODE (x))
1767 /* If X is a register, dependencies on its contents are recorded
1768 through the qty number mechanism. Just change the qty number of
1769 the register, mark it as invalid for expressions that refer to it,
1770 and remove it itself. */
1771 unsigned int regno = REGNO (x);
1772 unsigned int hash = HASH (x, GET_MODE (x));
1774 /* Remove REGNO from any quantity list it might be on and indicate
1775 that its value might have changed. If it is a pseudo, remove its
1776 entry from the hash table.
1778 For a hard register, we do the first two actions above for any
1779 additional hard registers corresponding to X. Then, if any of these
1780 registers are in the table, we must remove any REG entries that
1781 overlap these registers. */
1783 delete_reg_equiv (regno);
1786 if (regno >= FIRST_PSEUDO_REGISTER)
1788 /* Because a register can be referenced in more than one mode,
1789 we might have to remove more than one table entry. */
1790 struct table_elt *elt;
1792 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1793 remove_from_table (elt, hash);
1797 HOST_WIDE_INT in_table
1798 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1799 unsigned int endregno
1800 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1801 unsigned int tregno, tendregno, rn;
1802 register struct table_elt *p, *next;
1804 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1806 for (rn = regno + 1; rn < endregno; rn++)
1808 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1809 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1810 delete_reg_equiv (rn);
1815 for (hash = 0; hash < HASH_SIZE; hash++)
1816 for (p = table[hash]; p; p = next)
1818 next = p->next_same_hash;
1820 if (GET_CODE (p->exp) != REG
1821 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1824 tregno = REGNO (p->exp);
1826 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1827 if (tendregno > regno && tregno < endregno)
1828 remove_from_table (p, hash);
1835 invalidate (SUBREG_REG (x), VOIDmode);
1839 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1840 invalidate (XVECEXP (x, 0, i), VOIDmode);
1844 /* This is part of a disjoint return value; extract the location in
1845 question ignoring the offset. */
1846 invalidate (XEXP (x, 0), VOIDmode);
1850 /* Calculate the canonical version of X here so that
1851 true_dependence doesn't generate new RTL for X on each call. */
1854 /* Remove all hash table elements that refer to overlapping pieces of
1856 if (full_mode == VOIDmode)
1857 full_mode = GET_MODE (x);
1859 for (i = 0; i < HASH_SIZE; i++)
1861 register struct table_elt *next;
1863 for (p = table[i]; p; p = next)
1865 next = p->next_same_hash;
1868 struct check_dependence_data d;
1870 /* Just canonicalize the expression once;
1871 otherwise each time we call invalidate
1872 true_dependence will canonicalize the
1873 expression again. */
1875 p->canon_exp = canon_rtx (p->exp);
1878 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1879 remove_from_table (p, i);
1890 /* Remove all expressions that refer to register REGNO,
1891 since they are already invalid, and we are about to
1892 mark that register valid again and don't want the old
1893 expressions to reappear as valid. */
1896 remove_invalid_refs (regno)
1900 struct table_elt *p, *next;
1902 for (i = 0; i < HASH_SIZE; i++)
1903 for (p = table[i]; p; p = next)
1905 next = p->next_same_hash;
1906 if (GET_CODE (p->exp) != REG
1907 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1908 remove_from_table (p, i);
1912 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1914 remove_invalid_subreg_refs (regno, word, mode)
1917 enum machine_mode mode;
1920 struct table_elt *p, *next;
1921 unsigned int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1923 for (i = 0; i < HASH_SIZE; i++)
1924 for (p = table[i]; p; p = next)
1927 next = p->next_same_hash;
1930 if (GET_CODE (p->exp) != REG
1931 && (GET_CODE (exp) != SUBREG
1932 || GET_CODE (SUBREG_REG (exp)) != REG
1933 || REGNO (SUBREG_REG (exp)) != regno
1934 || (((SUBREG_WORD (exp)
1935 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1937 && SUBREG_WORD (exp) <= end))
1938 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1939 remove_from_table (p, i);
1943 /* Recompute the hash codes of any valid entries in the hash table that
1944 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1946 This is called when we make a jump equivalence. */
1949 rehash_using_reg (x)
1953 struct table_elt *p, *next;
1956 if (GET_CODE (x) == SUBREG)
1959 /* If X is not a register or if the register is known not to be in any
1960 valid entries in the table, we have no work to do. */
1962 if (GET_CODE (x) != REG
1963 || REG_IN_TABLE (REGNO (x)) < 0
1964 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1967 /* Scan all hash chains looking for valid entries that mention X.
1968 If we find one and it is in the wrong hash chain, move it. We can skip
1969 objects that are registers, since they are handled specially. */
1971 for (i = 0; i < HASH_SIZE; i++)
1972 for (p = table[i]; p; p = next)
1974 next = p->next_same_hash;
1975 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1976 && exp_equiv_p (p->exp, p->exp, 1, 0)
1977 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1979 if (p->next_same_hash)
1980 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1982 if (p->prev_same_hash)
1983 p->prev_same_hash->next_same_hash = p->next_same_hash;
1985 table[i] = p->next_same_hash;
1987 p->next_same_hash = table[hash];
1988 p->prev_same_hash = 0;
1990 table[hash]->prev_same_hash = p;
1996 /* Remove from the hash table any expression that is a call-clobbered
1997 register. Also update their TICK values. */
2000 invalidate_for_call ()
2002 unsigned int regno, endregno;
2005 struct table_elt *p, *next;
2008 /* Go through all the hard registers. For each that is clobbered in
2009 a CALL_INSN, remove the register from quantity chains and update
2010 reg_tick if defined. Also see if any of these registers is currently
2013 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2014 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2016 delete_reg_equiv (regno);
2017 if (REG_TICK (regno) >= 0)
2020 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2023 /* In the case where we have no call-clobbered hard registers in the
2024 table, we are done. Otherwise, scan the table and remove any
2025 entry that overlaps a call-clobbered register. */
2028 for (hash = 0; hash < HASH_SIZE; hash++)
2029 for (p = table[hash]; p; p = next)
2031 next = p->next_same_hash;
2033 if (GET_CODE (p->exp) != REG
2034 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2037 regno = REGNO (p->exp);
2038 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2040 for (i = regno; i < endregno; i++)
2041 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2043 remove_from_table (p, hash);
2049 /* Given an expression X of type CONST,
2050 and ELT which is its table entry (or 0 if it
2051 is not in the hash table),
2052 return an alternate expression for X as a register plus integer.
2053 If none can be found, return 0. */
2056 use_related_value (x, elt)
2058 struct table_elt *elt;
2060 register struct table_elt *relt = 0;
2061 register struct table_elt *p, *q;
2062 HOST_WIDE_INT offset;
2064 /* First, is there anything related known?
2065 If we have a table element, we can tell from that.
2066 Otherwise, must look it up. */
2068 if (elt != 0 && elt->related_value != 0)
2070 else if (elt == 0 && GET_CODE (x) == CONST)
2072 rtx subexp = get_related_value (x);
2074 relt = lookup (subexp,
2075 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2082 /* Search all related table entries for one that has an
2083 equivalent register. */
2088 /* This loop is strange in that it is executed in two different cases.
2089 The first is when X is already in the table. Then it is searching
2090 the RELATED_VALUE list of X's class (RELT). The second case is when
2091 X is not in the table. Then RELT points to a class for the related
2094 Ensure that, whatever case we are in, that we ignore classes that have
2095 the same value as X. */
2097 if (rtx_equal_p (x, p->exp))
2100 for (q = p->first_same_value; q; q = q->next_same_value)
2101 if (GET_CODE (q->exp) == REG)
2107 p = p->related_value;
2109 /* We went all the way around, so there is nothing to be found.
2110 Alternatively, perhaps RELT was in the table for some other reason
2111 and it has no related values recorded. */
2112 if (p == relt || p == 0)
2119 offset = (get_integer_term (x) - get_integer_term (p->exp));
2120 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2121 return plus_constant (q->exp, offset);
2124 /* Hash an rtx. We are careful to make sure the value is never negative.
2125 Equivalent registers hash identically.
2126 MODE is used in hashing for CONST_INTs only;
2127 otherwise the mode of X is used.
2129 Store 1 in do_not_record if any subexpression is volatile.
2131 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2132 which does not have the RTX_UNCHANGING_P bit set.
2134 Note that cse_insn knows that the hash code of a MEM expression
2135 is just (int) MEM plus the hash code of the address. */
2138 canon_hash (x, mode)
2140 enum machine_mode mode;
2143 register unsigned hash = 0;
2144 register enum rtx_code code;
2145 register const char *fmt;
2147 /* repeat is used to turn tail-recursion into iteration. */
2152 code = GET_CODE (x);
2157 unsigned int regno = REGNO (x);
2159 /* On some machines, we can't record any non-fixed hard register,
2160 because extending its life will cause reload problems. We
2161 consider ap, fp, and sp to be fixed for this purpose.
2163 We also consider CCmode registers to be fixed for this purpose;
2164 failure to do so leads to failure to simplify 0<100 type of
2167 On all machines, we can't record any global registers. */
2169 if (regno < FIRST_PSEUDO_REGISTER
2170 && (global_regs[regno]
2171 || (SMALL_REGISTER_CLASSES
2172 && ! fixed_regs[regno]
2173 && regno != FRAME_POINTER_REGNUM
2174 && regno != HARD_FRAME_POINTER_REGNUM
2175 && regno != ARG_POINTER_REGNUM
2176 && regno != STACK_POINTER_REGNUM
2177 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2183 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2187 /* We handle SUBREG of a REG specially because the underlying
2188 reg changes its hash value with every value change; we don't
2189 want to have to forget unrelated subregs when one subreg changes. */
2192 if (GET_CODE (SUBREG_REG (x)) == REG)
2194 hash += (((unsigned) SUBREG << 7)
2195 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2203 unsigned HOST_WIDE_INT tem = INTVAL (x);
2204 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2209 /* This is like the general case, except that it only counts
2210 the integers representing the constant. */
2211 hash += (unsigned) code + (unsigned) GET_MODE (x);
2212 if (GET_MODE (x) != VOIDmode)
2213 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2215 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2219 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2220 + (unsigned) CONST_DOUBLE_HIGH (x));
2223 /* Assume there is only one rtx object for any given label. */
2226 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2231 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2235 /* We don't record if marked volatile or if BLKmode since we don't
2236 know the size of the move. */
2237 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2242 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2244 hash_arg_in_memory = 1;
2246 /* Now that we have already found this special case,
2247 might as well speed it up as much as possible. */
2248 hash += (unsigned) MEM;
2259 case UNSPEC_VOLATILE:
2264 if (MEM_VOLATILE_P (x))
2275 i = GET_RTX_LENGTH (code) - 1;
2276 hash += (unsigned) code + (unsigned) GET_MODE (x);
2277 fmt = GET_RTX_FORMAT (code);
2282 rtx tem = XEXP (x, i);
2284 /* If we are about to do the last recursive call
2285 needed at this level, change it into iteration.
2286 This function is called enough to be worth it. */
2292 hash += canon_hash (tem, 0);
2294 else if (fmt[i] == 'E')
2295 for (j = 0; j < XVECLEN (x, i); j++)
2296 hash += canon_hash (XVECEXP (x, i, j), 0);
2297 else if (fmt[i] == 's')
2299 register const unsigned char *p =
2300 (const unsigned char *) XSTR (x, i);
2306 else if (fmt[i] == 'i')
2308 register unsigned tem = XINT (x, i);
2311 else if (fmt[i] == '0' || fmt[i] == 't')
2319 /* Like canon_hash but with no side effects. */
2324 enum machine_mode mode;
2326 int save_do_not_record = do_not_record;
2327 int save_hash_arg_in_memory = hash_arg_in_memory;
2328 unsigned hash = canon_hash (x, mode);
2329 hash_arg_in_memory = save_hash_arg_in_memory;
2330 do_not_record = save_do_not_record;
2334 /* Return 1 iff X and Y would canonicalize into the same thing,
2335 without actually constructing the canonicalization of either one.
2336 If VALIDATE is nonzero,
2337 we assume X is an expression being processed from the rtl
2338 and Y was found in the hash table. We check register refs
2339 in Y for being marked as valid.
2341 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2342 that is known to be in the register. Ordinarily, we don't allow them
2343 to match, because letting them match would cause unpredictable results
2344 in all the places that search a hash table chain for an equivalent
2345 for a given value. A possible equivalent that has different structure
2346 has its hash code computed from different data. Whether the hash code
2347 is the same as that of the given value is pure luck. */
2350 exp_equiv_p (x, y, validate, equal_values)
2356 register enum rtx_code code;
2357 register const char *fmt;
2359 /* Note: it is incorrect to assume an expression is equivalent to itself
2360 if VALIDATE is nonzero. */
2361 if (x == y && !validate)
2363 if (x == 0 || y == 0)
2366 code = GET_CODE (x);
2367 if (code != GET_CODE (y))
2372 /* If X is a constant and Y is a register or vice versa, they may be
2373 equivalent. We only have to validate if Y is a register. */
2374 if (CONSTANT_P (x) && GET_CODE (y) == REG
2375 && REGNO_QTY_VALID_P (REGNO (y)))
2377 int y_q = REG_QTY (REGNO (y));
2378 struct qty_table_elem *y_ent = &qty_table[y_q];
2380 if (GET_MODE (y) == y_ent->mode
2381 && rtx_equal_p (x, y_ent->const_rtx)
2382 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2386 if (CONSTANT_P (y) && code == REG
2387 && REGNO_QTY_VALID_P (REGNO (x)))
2389 int x_q = REG_QTY (REGNO (x));
2390 struct qty_table_elem *x_ent = &qty_table[x_q];
2392 if (GET_MODE (x) == x_ent->mode
2393 && rtx_equal_p (y, x_ent->const_rtx))
2400 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2401 if (GET_MODE (x) != GET_MODE (y))
2412 return XEXP (x, 0) == XEXP (y, 0);
2415 return XSTR (x, 0) == XSTR (y, 0);
2419 unsigned int regno = REGNO (y);
2420 unsigned int endregno
2421 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2422 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2425 /* If the quantities are not the same, the expressions are not
2426 equivalent. If there are and we are not to validate, they
2427 are equivalent. Otherwise, ensure all regs are up-to-date. */
2429 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2435 for (i = regno; i < endregno; i++)
2436 if (REG_IN_TABLE (i) != REG_TICK (i))
2442 /* For commutative operations, check both orders. */
2450 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2451 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2452 validate, equal_values))
2453 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2454 validate, equal_values)
2455 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2456 validate, equal_values)));
2462 /* Compare the elements. If any pair of corresponding elements
2463 fail to match, return 0 for the whole things. */
2465 fmt = GET_RTX_FORMAT (code);
2466 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2471 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2476 if (XVECLEN (x, i) != XVECLEN (y, i))
2478 for (j = 0; j < XVECLEN (x, i); j++)
2479 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2480 validate, equal_values))
2485 if (strcmp (XSTR (x, i), XSTR (y, i)))
2490 if (XINT (x, i) != XINT (y, i))
2495 if (XWINT (x, i) != XWINT (y, i))
2511 /* Return 1 if X has a value that can vary even between two
2512 executions of the program. 0 means X can be compared reliably
2513 against certain constants or near-constants. */
2516 cse_rtx_varies_p (x)
2519 /* We need not check for X and the equivalence class being of the same
2520 mode because if X is equivalent to a constant in some mode, it
2521 doesn't vary in any mode. */
2523 if (GET_CODE (x) == REG
2524 && REGNO_QTY_VALID_P (REGNO (x)))
2526 int x_q = REG_QTY (REGNO (x));
2527 struct qty_table_elem *x_ent = &qty_table[x_q];
2529 if (GET_MODE (x) == x_ent->mode
2530 && x_ent->const_rtx != NULL_RTX)
2534 if (GET_CODE (x) == PLUS
2535 && GET_CODE (XEXP (x, 1)) == CONST_INT
2536 && GET_CODE (XEXP (x, 0)) == REG
2537 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2539 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2540 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2542 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2543 && x0_ent->const_rtx != NULL_RTX)
2547 /* This can happen as the result of virtual register instantiation, if
2548 the initial constant is too large to be a valid address. This gives
2549 us a three instruction sequence, load large offset into a register,
2550 load fp minus a constant into a register, then a MEM which is the
2551 sum of the two `constant' registers. */
2552 if (GET_CODE (x) == PLUS
2553 && GET_CODE (XEXP (x, 0)) == REG
2554 && GET_CODE (XEXP (x, 1)) == REG
2555 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2556 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2558 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2559 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2560 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2561 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2563 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2564 && x0_ent->const_rtx != NULL_RTX
2565 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2566 && x1_ent->const_rtx != NULL_RTX)
2570 return rtx_varies_p (x);
2573 /* Canonicalize an expression:
2574 replace each register reference inside it
2575 with the "oldest" equivalent register.
2577 If INSN is non-zero and we are replacing a pseudo with a hard register
2578 or vice versa, validate_change is used to ensure that INSN remains valid
2579 after we make our substitution. The calls are made with IN_GROUP non-zero
2580 so apply_change_group must be called upon the outermost return from this
2581 function (unless INSN is zero). The result of apply_change_group can
2582 generally be discarded since the changes we are making are optional. */
2590 register enum rtx_code code;
2591 register const char *fmt;
2596 code = GET_CODE (x);
2614 register struct qty_table_elem *ent;
2616 /* Never replace a hard reg, because hard regs can appear
2617 in more than one machine mode, and we must preserve the mode
2618 of each occurrence. Also, some hard regs appear in
2619 MEMs that are shared and mustn't be altered. Don't try to
2620 replace any reg that maps to a reg of class NO_REGS. */
2621 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2622 || ! REGNO_QTY_VALID_P (REGNO (x)))
2625 q = REG_QTY (REGNO(x));
2626 ent = &qty_table[q];
2627 first = ent->first_reg;
2628 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2629 : REGNO_REG_CLASS (first) == NO_REGS ? x
2630 : gen_rtx_REG (ent->mode, first));
2637 fmt = GET_RTX_FORMAT (code);
2638 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2644 rtx new = canon_reg (XEXP (x, i), insn);
2647 /* If replacing pseudo with hard reg or vice versa, ensure the
2648 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2649 if (insn != 0 && new != 0
2650 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2651 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2652 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2653 || (insn_code = recog_memoized (insn)) < 0
2654 || insn_data[insn_code].n_dups > 0))
2655 validate_change (insn, &XEXP (x, i), new, 1);
2659 else if (fmt[i] == 'E')
2660 for (j = 0; j < XVECLEN (x, i); j++)
2661 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2667 /* LOC is a location within INSN that is an operand address (the contents of
2668 a MEM). Find the best equivalent address to use that is valid for this
2671 On most CISC machines, complicated address modes are costly, and rtx_cost
2672 is a good approximation for that cost. However, most RISC machines have
2673 only a few (usually only one) memory reference formats. If an address is
2674 valid at all, it is often just as cheap as any other address. Hence, for
2675 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2676 costs of various addresses. For two addresses of equal cost, choose the one
2677 with the highest `rtx_cost' value as that has the potential of eliminating
2678 the most insns. For equal costs, we choose the first in the equivalence
2679 class. Note that we ignore the fact that pseudo registers are cheaper
2680 than hard registers here because we would also prefer the pseudo registers.
2684 find_best_addr (insn, loc)
2688 struct table_elt *elt;
2691 struct table_elt *p;
2692 int found_better = 1;
2694 int save_do_not_record = do_not_record;
2695 int save_hash_arg_in_memory = hash_arg_in_memory;
2700 /* Do not try to replace constant addresses or addresses of local and
2701 argument slots. These MEM expressions are made only once and inserted
2702 in many instructions, as well as being used to control symbol table
2703 output. It is not safe to clobber them.
2705 There are some uncommon cases where the address is already in a register
2706 for some reason, but we cannot take advantage of that because we have
2707 no easy way to unshare the MEM. In addition, looking up all stack
2708 addresses is costly. */
2709 if ((GET_CODE (addr) == PLUS
2710 && GET_CODE (XEXP (addr, 0)) == REG
2711 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2712 && (regno = REGNO (XEXP (addr, 0)),
2713 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2714 || regno == ARG_POINTER_REGNUM))
2715 || (GET_CODE (addr) == REG
2716 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2717 || regno == HARD_FRAME_POINTER_REGNUM
2718 || regno == ARG_POINTER_REGNUM))
2719 || GET_CODE (addr) == ADDRESSOF
2720 || CONSTANT_ADDRESS_P (addr))
2723 /* If this address is not simply a register, try to fold it. This will
2724 sometimes simplify the expression. Many simplifications
2725 will not be valid, but some, usually applying the associative rule, will
2726 be valid and produce better code. */
2727 if (GET_CODE (addr) != REG)
2729 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2733 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2734 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2735 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2737 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2739 && validate_change (insn, loc, folded, 0))
2743 /* If this address is not in the hash table, we can't look for equivalences
2744 of the whole address. Also, ignore if volatile. */
2747 hash = HASH (addr, Pmode);
2748 addr_volatile = do_not_record;
2749 do_not_record = save_do_not_record;
2750 hash_arg_in_memory = save_hash_arg_in_memory;
2755 elt = lookup (addr, hash, Pmode);
2757 #ifndef ADDRESS_COST
2760 int our_cost = elt->cost;
2762 /* Find the lowest cost below ours that works. */
2763 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2764 if (elt->cost < our_cost
2765 && (GET_CODE (elt->exp) == REG
2766 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2767 && validate_change (insn, loc,
2768 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2775 /* We need to find the best (under the criteria documented above) entry
2776 in the class that is valid. We use the `flag' field to indicate
2777 choices that were invalid and iterate until we can't find a better
2778 one that hasn't already been tried. */
2780 for (p = elt->first_same_value; p; p = p->next_same_value)
2783 while (found_better)
2785 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2786 int best_rtx_cost = (elt->cost + 1) >> 1;
2787 struct table_elt *best_elt = elt;
2790 for (p = elt->first_same_value; p; p = p->next_same_value)
2793 if ((GET_CODE (p->exp) == REG
2794 || exp_equiv_p (p->exp, p->exp, 1, 0))
2795 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2796 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2797 && (p->cost + 1) >> 1 > best_rtx_cost)))
2800 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2801 best_rtx_cost = (p->cost + 1) >> 1;
2808 if (validate_change (insn, loc,
2809 canon_reg (copy_rtx (best_elt->exp),
2818 /* If the address is a binary operation with the first operand a register
2819 and the second a constant, do the same as above, but looking for
2820 equivalences of the register. Then try to simplify before checking for
2821 the best address to use. This catches a few cases: First is when we
2822 have REG+const and the register is another REG+const. We can often merge
2823 the constants and eliminate one insn and one register. It may also be
2824 that a machine has a cheap REG+REG+const. Finally, this improves the
2825 code on the Alpha for unaligned byte stores. */
2827 if (flag_expensive_optimizations
2828 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2829 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2830 && GET_CODE (XEXP (*loc, 0)) == REG
2831 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2833 rtx c = XEXP (*loc, 1);
2836 hash = HASH (XEXP (*loc, 0), Pmode);
2837 do_not_record = save_do_not_record;
2838 hash_arg_in_memory = save_hash_arg_in_memory;
2840 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2844 /* We need to find the best (under the criteria documented above) entry
2845 in the class that is valid. We use the `flag' field to indicate
2846 choices that were invalid and iterate until we can't find a better
2847 one that hasn't already been tried. */
2849 for (p = elt->first_same_value; p; p = p->next_same_value)
2852 while (found_better)
2854 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2855 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2856 struct table_elt *best_elt = elt;
2857 rtx best_rtx = *loc;
2860 /* This is at worst case an O(n^2) algorithm, so limit our search
2861 to the first 32 elements on the list. This avoids trouble
2862 compiling code with very long basic blocks that can easily
2863 call simplify_gen_binary so many times that we run out of
2867 for (p = elt->first_same_value, count = 0;
2869 p = p->next_same_value, count++)
2871 && (GET_CODE (p->exp) == REG
2872 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2874 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2877 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2878 || (CSE_ADDRESS_COST (new) == best_addr_cost
2879 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2882 best_addr_cost = CSE_ADDRESS_COST (new);
2883 best_rtx_cost = (COST (new) + 1) >> 1;
2891 if (validate_change (insn, loc,
2892 canon_reg (copy_rtx (best_rtx),
2903 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2904 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2905 what values are being compared.
2907 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2908 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2909 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2910 compared to produce cc0.
2912 The return value is the comparison operator and is either the code of
2913 A or the code corresponding to the inverse of the comparison. */
2915 static enum rtx_code
2916 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2919 enum machine_mode *pmode1, *pmode2;
2923 arg1 = *parg1, arg2 = *parg2;
2925 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2927 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2929 /* Set non-zero when we find something of interest. */
2931 int reverse_code = 0;
2932 struct table_elt *p = 0;
2934 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2935 On machines with CC0, this is the only case that can occur, since
2936 fold_rtx will return the COMPARE or item being compared with zero
2939 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2942 /* If ARG1 is a comparison operator and CODE is testing for
2943 STORE_FLAG_VALUE, get the inner arguments. */
2945 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2948 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2949 && code == LT && STORE_FLAG_VALUE == -1)
2950 #ifdef FLOAT_STORE_FLAG_VALUE
2951 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2952 && (REAL_VALUE_NEGATIVE
2953 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2958 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2959 && code == GE && STORE_FLAG_VALUE == -1)
2960 #ifdef FLOAT_STORE_FLAG_VALUE
2961 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2962 && (REAL_VALUE_NEGATIVE
2963 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
2966 x = arg1, reverse_code = 1;
2969 /* ??? We could also check for
2971 (ne (and (eq (...) (const_int 1))) (const_int 0))
2973 and related forms, but let's wait until we see them occurring. */
2976 /* Look up ARG1 in the hash table and see if it has an equivalence
2977 that lets us see what is being compared. */
2978 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
2980 if (p) p = p->first_same_value;
2982 for (; p; p = p->next_same_value)
2984 enum machine_mode inner_mode = GET_MODE (p->exp);
2986 /* If the entry isn't valid, skip it. */
2987 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2990 if (GET_CODE (p->exp) == COMPARE
2991 /* Another possibility is that this machine has a compare insn
2992 that includes the comparison code. In that case, ARG1 would
2993 be equivalent to a comparison operation that would set ARG1 to
2994 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2995 ORIG_CODE is the actual comparison being done; if it is an EQ,
2996 we must reverse ORIG_CODE. On machine with a negative value
2997 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3000 && GET_MODE_CLASS (inner_mode) == MODE_INT
3001 && (GET_MODE_BITSIZE (inner_mode)
3002 <= HOST_BITS_PER_WIDE_INT)
3003 && (STORE_FLAG_VALUE
3004 & ((HOST_WIDE_INT) 1
3005 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3006 #ifdef FLOAT_STORE_FLAG_VALUE
3008 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3009 && (REAL_VALUE_NEGATIVE
3010 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3013 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3018 else if ((code == EQ
3020 && GET_MODE_CLASS (inner_mode) == MODE_INT
3021 && (GET_MODE_BITSIZE (inner_mode)
3022 <= HOST_BITS_PER_WIDE_INT)
3023 && (STORE_FLAG_VALUE
3024 & ((HOST_WIDE_INT) 1
3025 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3026 #ifdef FLOAT_STORE_FLAG_VALUE
3028 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3029 && (REAL_VALUE_NEGATIVE
3030 (FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)))))
3033 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3040 /* If this is fp + constant, the equivalent is a better operand since
3041 it may let us predict the value of the comparison. */
3042 else if (NONZERO_BASE_PLUS_P (p->exp))
3049 /* If we didn't find a useful equivalence for ARG1, we are done.
3050 Otherwise, set up for the next iteration. */
3054 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3055 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3056 code = GET_CODE (x);
3059 code = reverse_condition (code);
3062 /* Return our results. Return the modes from before fold_rtx
3063 because fold_rtx might produce const_int, and then it's too late. */
3064 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3065 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3070 /* If X is a nontrivial arithmetic operation on an argument
3071 for which a constant value can be determined, return
3072 the result of operating on that value, as a constant.
3073 Otherwise, return X, possibly with one or more operands
3074 modified by recursive calls to this function.
3076 If X is a register whose contents are known, we do NOT
3077 return those contents here. equiv_constant is called to
3080 INSN is the insn that we may be modifying. If it is 0, make a copy
3081 of X before modifying it. */
3088 register enum rtx_code code;
3089 register enum machine_mode mode;
3090 register const char *fmt;
3096 /* Folded equivalents of first two operands of X. */
3100 /* Constant equivalents of first three operands of X;
3101 0 when no such equivalent is known. */
3106 /* The mode of the first operand of X. We need this for sign and zero
3108 enum machine_mode mode_arg0;
3113 mode = GET_MODE (x);
3114 code = GET_CODE (x);
3123 /* No use simplifying an EXPR_LIST
3124 since they are used only for lists of args
3125 in a function call's REG_EQUAL note. */
3127 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3128 want to (e.g.,) make (addressof (const_int 0)) just because
3129 the location is known to be zero. */
3135 return prev_insn_cc0;
3139 /* If the next insn is a CODE_LABEL followed by a jump table,
3140 PC's value is a LABEL_REF pointing to that label. That
3141 lets us fold switch statements on the Vax. */
3142 if (insn && GET_CODE (insn) == JUMP_INSN)
3144 rtx next = next_nonnote_insn (insn);
3146 if (next && GET_CODE (next) == CODE_LABEL
3147 && NEXT_INSN (next) != 0
3148 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3149 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3150 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3151 return gen_rtx_LABEL_REF (Pmode, next);
3156 /* See if we previously assigned a constant value to this SUBREG. */
3157 if ((new = lookup_as_function (x, CONST_INT)) != 0
3158 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3161 /* If this is a paradoxical SUBREG, we have no idea what value the
3162 extra bits would have. However, if the operand is equivalent
3163 to a SUBREG whose operand is the same as our mode, and all the
3164 modes are within a word, we can just use the inner operand
3165 because these SUBREGs just say how to treat the register.
3167 Similarly if we find an integer constant. */
3169 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3171 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3172 struct table_elt *elt;
3174 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3175 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3176 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3178 for (elt = elt->first_same_value;
3179 elt; elt = elt->next_same_value)
3181 if (CONSTANT_P (elt->exp)
3182 && GET_MODE (elt->exp) == VOIDmode)
3185 if (GET_CODE (elt->exp) == SUBREG
3186 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3187 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3188 return copy_rtx (SUBREG_REG (elt->exp));
3194 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3195 We might be able to if the SUBREG is extracting a single word in an
3196 integral mode or extracting the low part. */
3198 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3199 const_arg0 = equiv_constant (folded_arg0);
3201 folded_arg0 = const_arg0;
3203 if (folded_arg0 != SUBREG_REG (x))
3207 if (GET_MODE_CLASS (mode) == MODE_INT
3208 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3209 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3210 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3211 GET_MODE (SUBREG_REG (x)));
3212 if (new == 0 && subreg_lowpart_p (x))
3213 new = gen_lowpart_if_possible (mode, folded_arg0);
3218 /* If this is a narrowing SUBREG and our operand is a REG, see if
3219 we can find an equivalence for REG that is an arithmetic operation
3220 in a wider mode where both operands are paradoxical SUBREGs
3221 from objects of our result mode. In that case, we couldn't report
3222 an equivalent value for that operation, since we don't know what the
3223 extra bits will be. But we can find an equivalence for this SUBREG
3224 by folding that operation is the narrow mode. This allows us to
3225 fold arithmetic in narrow modes when the machine only supports
3226 word-sized arithmetic.
3228 Also look for a case where we have a SUBREG whose operand is the
3229 same as our result. If both modes are smaller than a word, we
3230 are simply interpreting a register in different modes and we
3231 can use the inner value. */
3233 if (GET_CODE (folded_arg0) == REG
3234 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3235 && subreg_lowpart_p (x))
3237 struct table_elt *elt;
3239 /* We can use HASH here since we know that canon_hash won't be
3241 elt = lookup (folded_arg0,
3242 HASH (folded_arg0, GET_MODE (folded_arg0)),
3243 GET_MODE (folded_arg0));
3246 elt = elt->first_same_value;
3248 for (; elt; elt = elt->next_same_value)
3250 enum rtx_code eltcode = GET_CODE (elt->exp);
3252 /* Just check for unary and binary operations. */
3253 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3254 && GET_CODE (elt->exp) != SIGN_EXTEND
3255 && GET_CODE (elt->exp) != ZERO_EXTEND
3256 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3257 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3259 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3261 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3262 op0 = fold_rtx (op0, NULL_RTX);
3264 op0 = equiv_constant (op0);
3266 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3269 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3270 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3271 && eltcode != DIV && eltcode != MOD
3272 && eltcode != UDIV && eltcode != UMOD
3273 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3274 && eltcode != ROTATE && eltcode != ROTATERT
3275 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3276 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3278 || CONSTANT_P (XEXP (elt->exp, 0)))
3279 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3280 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3282 || CONSTANT_P (XEXP (elt->exp, 1))))
3284 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3285 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3287 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3288 op0 = fold_rtx (op0, NULL_RTX);
3291 op0 = equiv_constant (op0);
3293 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3294 op1 = fold_rtx (op1, NULL_RTX);
3297 op1 = equiv_constant (op1);
3299 /* If we are looking for the low SImode part of
3300 (ashift:DI c (const_int 32)), it doesn't work
3301 to compute that in SImode, because a 32-bit shift
3302 in SImode is unpredictable. We know the value is 0. */
3304 && GET_CODE (elt->exp) == ASHIFT
3305 && GET_CODE (op1) == CONST_INT
3306 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3308 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3310 /* If the count fits in the inner mode's width,
3311 but exceeds the outer mode's width,
3312 the value will get truncated to 0
3316 /* If the count exceeds even the inner mode's width,
3317 don't fold this expression. */
3320 else if (op0 && op1)
3321 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3325 else if (GET_CODE (elt->exp) == SUBREG
3326 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3327 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3329 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3330 new = copy_rtx (SUBREG_REG (elt->exp));
3341 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3342 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3343 new = lookup_as_function (XEXP (x, 0), code);
3345 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3349 /* If we are not actually processing an insn, don't try to find the
3350 best address. Not only don't we care, but we could modify the
3351 MEM in an invalid way since we have no insn to validate against. */
3353 find_best_addr (insn, &XEXP (x, 0));
3356 /* Even if we don't fold in the insn itself,
3357 we can safely do so here, in hopes of getting a constant. */
3358 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3360 HOST_WIDE_INT offset = 0;
3362 if (GET_CODE (addr) == REG
3363 && REGNO_QTY_VALID_P (REGNO (addr)))
3365 int addr_q = REG_QTY (REGNO (addr));
3366 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3368 if (GET_MODE (addr) == addr_ent->mode
3369 && addr_ent->const_rtx != NULL_RTX)
3370 addr = addr_ent->const_rtx;
3373 /* If address is constant, split it into a base and integer offset. */
3374 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3376 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3377 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3379 base = XEXP (XEXP (addr, 0), 0);
3380 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3382 else if (GET_CODE (addr) == LO_SUM
3383 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3384 base = XEXP (addr, 1);
3385 else if (GET_CODE (addr) == ADDRESSOF)
3386 return change_address (x, VOIDmode, addr);
3388 /* If this is a constant pool reference, we can fold it into its
3389 constant to allow better value tracking. */
3390 if (base && GET_CODE (base) == SYMBOL_REF
3391 && CONSTANT_POOL_ADDRESS_P (base))
3393 rtx constant = get_pool_constant (base);
3394 enum machine_mode const_mode = get_pool_mode (base);
3397 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3398 constant_pool_entries_cost = COST (constant);
3400 /* If we are loading the full constant, we have an equivalence. */
3401 if (offset == 0 && mode == const_mode)
3404 /* If this actually isn't a constant (weird!), we can't do
3405 anything. Otherwise, handle the two most common cases:
3406 extracting a word from a multi-word constant, and extracting
3407 the low-order bits. Other cases don't seem common enough to
3409 if (! CONSTANT_P (constant))
3412 if (GET_MODE_CLASS (mode) == MODE_INT
3413 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3414 && offset % UNITS_PER_WORD == 0
3415 && (new = operand_subword (constant,
3416 offset / UNITS_PER_WORD,
3417 0, const_mode)) != 0)
3420 if (((BYTES_BIG_ENDIAN
3421 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3422 || (! BYTES_BIG_ENDIAN && offset == 0))
3423 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3427 /* If this is a reference to a label at a known position in a jump
3428 table, we also know its value. */
3429 if (base && GET_CODE (base) == LABEL_REF)
3431 rtx label = XEXP (base, 0);
3432 rtx table_insn = NEXT_INSN (label);
3434 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3435 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3437 rtx table = PATTERN (table_insn);
3440 && (offset / GET_MODE_SIZE (GET_MODE (table))
3441 < XVECLEN (table, 0)))
3442 return XVECEXP (table, 0,
3443 offset / GET_MODE_SIZE (GET_MODE (table)));
3445 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3446 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3448 rtx table = PATTERN (table_insn);
3451 && (offset / GET_MODE_SIZE (GET_MODE (table))
3452 < XVECLEN (table, 1)))
3454 offset /= GET_MODE_SIZE (GET_MODE (table));
3455 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3458 if (GET_MODE (table) != Pmode)
3459 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3461 /* Indicate this is a constant. This isn't a
3462 valid form of CONST, but it will only be used
3463 to fold the next insns and then discarded, so
3466 Note this expression must be explicitly discarded,
3467 by cse_insn, else it may end up in a REG_EQUAL note
3468 and "escape" to cause problems elsewhere. */
3469 return gen_rtx_CONST (GET_MODE (new), new);
3478 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3479 validate_change (insn, &XVECEXP (x, 3, i),
3480 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3490 mode_arg0 = VOIDmode;
3492 /* Try folding our operands.
3493 Then see which ones have constant values known. */
3495 fmt = GET_RTX_FORMAT (code);
3496 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3499 rtx arg = XEXP (x, i);
3500 rtx folded_arg = arg, const_arg = 0;
3501 enum machine_mode mode_arg = GET_MODE (arg);
3502 rtx cheap_arg, expensive_arg;
3503 rtx replacements[2];
3506 /* Most arguments are cheap, so handle them specially. */
3507 switch (GET_CODE (arg))
3510 /* This is the same as calling equiv_constant; it is duplicated
3512 if (REGNO_QTY_VALID_P (REGNO (arg)))
3514 int arg_q = REG_QTY (REGNO (arg));
3515 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3517 if (arg_ent->const_rtx != NULL_RTX
3518 && GET_CODE (arg_ent->const_rtx) != REG
3519 && GET_CODE (arg_ent->const_rtx) != PLUS)
3521 = gen_lowpart_if_possible (GET_MODE (arg),
3522 arg_ent->const_rtx);
3536 folded_arg = prev_insn_cc0;
3537 mode_arg = prev_insn_cc0_mode;
3538 const_arg = equiv_constant (folded_arg);
3543 folded_arg = fold_rtx (arg, insn);
3544 const_arg = equiv_constant (folded_arg);
3547 /* For the first three operands, see if the operand
3548 is constant or equivalent to a constant. */
3552 folded_arg0 = folded_arg;
3553 const_arg0 = const_arg;
3554 mode_arg0 = mode_arg;
3557 folded_arg1 = folded_arg;
3558 const_arg1 = const_arg;
3561 const_arg2 = const_arg;
3565 /* Pick the least expensive of the folded argument and an
3566 equivalent constant argument. */
3567 if (const_arg == 0 || const_arg == folded_arg
3568 || COST (const_arg) > COST (folded_arg))
3569 cheap_arg = folded_arg, expensive_arg = const_arg;
3571 cheap_arg = const_arg, expensive_arg = folded_arg;
3573 /* Try to replace the operand with the cheapest of the two
3574 possibilities. If it doesn't work and this is either of the first
3575 two operands of a commutative operation, try swapping them.
3576 If THAT fails, try the more expensive, provided it is cheaper
3577 than what is already there. */
3579 if (cheap_arg == XEXP (x, i))
3582 if (insn == 0 && ! copied)
3588 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3590 j < 2 && replacements[j]
3591 && COST (replacements[j]) < COST (XEXP (x, i));
3594 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3597 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3599 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3600 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3602 if (apply_change_group ())
3604 /* Swap them back to be invalid so that this loop can
3605 continue and flag them to be swapped back later. */
3608 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3620 /* Don't try to fold inside of a vector of expressions.
3621 Doing nothing is harmless. */
3625 /* If a commutative operation, place a constant integer as the second
3626 operand unless the first operand is also a constant integer. Otherwise,
3627 place any constant second unless the first operand is also a constant. */
3629 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3631 if (must_swap || (const_arg0
3633 || (GET_CODE (const_arg0) == CONST_INT
3634 && GET_CODE (const_arg1) != CONST_INT))))
3636 register rtx tem = XEXP (x, 0);
3638 if (insn == 0 && ! copied)
3644 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3645 validate_change (insn, &XEXP (x, 1), tem, 1);
3646 if (apply_change_group ())
3648 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3649 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3654 /* If X is an arithmetic operation, see if we can simplify it. */
3656 switch (GET_RTX_CLASS (code))
3662 /* We can't simplify extension ops unless we know the
3664 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3665 && mode_arg0 == VOIDmode)
3668 /* If we had a CONST, strip it off and put it back later if we
3670 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3671 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3673 new = simplify_unary_operation (code, mode,
3674 const_arg0 ? const_arg0 : folded_arg0,
3676 if (new != 0 && is_const)
3677 new = gen_rtx_CONST (mode, new);
3682 /* See what items are actually being compared and set FOLDED_ARG[01]
3683 to those values and CODE to the actual comparison code. If any are
3684 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3685 do anything if both operands are already known to be constant. */
3687 if (const_arg0 == 0 || const_arg1 == 0)
3689 struct table_elt *p0, *p1;
3690 rtx true = const_true_rtx, false = const0_rtx;
3691 enum machine_mode mode_arg1;
3693 #ifdef FLOAT_STORE_FLAG_VALUE
3694 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3696 true = (CONST_DOUBLE_FROM_REAL_VALUE
3697 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3698 false = CONST0_RTX (mode);
3702 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3703 &mode_arg0, &mode_arg1);
3704 const_arg0 = equiv_constant (folded_arg0);
3705 const_arg1 = equiv_constant (folded_arg1);
3707 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3708 what kinds of things are being compared, so we can't do
3709 anything with this comparison. */
3711 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3714 /* If we do not now have two constants being compared, see
3715 if we can nevertheless deduce some things about the
3717 if (const_arg0 == 0 || const_arg1 == 0)
3719 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3720 non-explicit constant? These aren't zero, but we
3721 don't know their sign. */
3722 if (const_arg1 == const0_rtx
3723 && (NONZERO_BASE_PLUS_P (folded_arg0)
3724 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3726 || GET_CODE (folded_arg0) == SYMBOL_REF
3728 || GET_CODE (folded_arg0) == LABEL_REF
3729 || GET_CODE (folded_arg0) == CONST))
3733 else if (code == NE)
3737 /* See if the two operands are the same. We don't do this
3738 for IEEE floating-point since we can't assume x == x
3739 since x might be a NaN. */
3741 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3742 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3743 && (folded_arg0 == folded_arg1
3744 || (GET_CODE (folded_arg0) == REG
3745 && GET_CODE (folded_arg1) == REG
3746 && (REG_QTY (REGNO (folded_arg0))
3747 == REG_QTY (REGNO (folded_arg1))))
3748 || ((p0 = lookup (folded_arg0,
3749 (safe_hash (folded_arg0, mode_arg0)
3750 & HASH_MASK), mode_arg0))
3751 && (p1 = lookup (folded_arg1,
3752 (safe_hash (folded_arg1, mode_arg0)
3753 & HASH_MASK), mode_arg0))
3754 && p0->first_same_value == p1->first_same_value)))
3755 return ((code == EQ || code == LE || code == GE
3756 || code == LEU || code == GEU)
3759 /* If FOLDED_ARG0 is a register, see if the comparison we are
3760 doing now is either the same as we did before or the reverse
3761 (we only check the reverse if not floating-point). */
3762 else if (GET_CODE (folded_arg0) == REG)
3764 int qty = REG_QTY (REGNO (folded_arg0));
3766 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3768 struct qty_table_elem *ent = &qty_table[qty];
3770 if ((comparison_dominates_p (ent->comparison_code, code)
3771 || (! FLOAT_MODE_P (mode_arg0)
3772 && comparison_dominates_p (ent->comparison_code,
3773 reverse_condition (code))))
3774 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3776 && rtx_equal_p (ent->comparison_const,
3778 || (GET_CODE (folded_arg1) == REG
3779 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3780 return (comparison_dominates_p (ent->comparison_code, code)
3787 /* If we are comparing against zero, see if the first operand is
3788 equivalent to an IOR with a constant. If so, we may be able to
3789 determine the result of this comparison. */
3791 if (const_arg1 == const0_rtx)
3793 rtx y = lookup_as_function (folded_arg0, IOR);
3797 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3798 && GET_CODE (inner_const) == CONST_INT
3799 && INTVAL (inner_const) != 0)
3801 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3802 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3803 && (INTVAL (inner_const)
3804 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3805 rtx true = const_true_rtx, false = const0_rtx;
3807 #ifdef FLOAT_STORE_FLAG_VALUE
3808 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3810 true = (CONST_DOUBLE_FROM_REAL_VALUE
3811 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3812 false = CONST0_RTX (mode);
3836 new = simplify_relational_operation (code, mode_arg0,
3837 const_arg0 ? const_arg0 : folded_arg0,
3838 const_arg1 ? const_arg1 : folded_arg1);
3839 #ifdef FLOAT_STORE_FLAG_VALUE
3840 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3842 if (new == const0_rtx)
3843 new = CONST0_RTX (mode);
3845 new = (CONST_DOUBLE_FROM_REAL_VALUE
3846 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3856 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3857 with that LABEL_REF as its second operand. If so, the result is
3858 the first operand of that MINUS. This handles switches with an
3859 ADDR_DIFF_VEC table. */
3860 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3863 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3864 : lookup_as_function (folded_arg0, MINUS);
3866 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3867 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3870 /* Now try for a CONST of a MINUS like the above. */
3871 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3872 : lookup_as_function (folded_arg0, CONST))) != 0
3873 && GET_CODE (XEXP (y, 0)) == MINUS
3874 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3875 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
3876 return XEXP (XEXP (y, 0), 0);
3879 /* Likewise if the operands are in the other order. */
3880 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3883 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3884 : lookup_as_function (folded_arg1, MINUS);
3886 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3887 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3890 /* Now try for a CONST of a MINUS like the above. */
3891 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3892 : lookup_as_function (folded_arg1, CONST))) != 0
3893 && GET_CODE (XEXP (y, 0)) == MINUS
3894 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3895 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
3896 return XEXP (XEXP (y, 0), 0);
3899 /* If second operand is a register equivalent to a negative
3900 CONST_INT, see if we can find a register equivalent to the
3901 positive constant. Make a MINUS if so. Don't do this for
3902 a non-negative constant since we might then alternate between
3903 chosing positive and negative constants. Having the positive
3904 constant previously-used is the more common case. Be sure
3905 the resulting constant is non-negative; if const_arg1 were
3906 the smallest negative number this would overflow: depending
3907 on the mode, this would either just be the same value (and
3908 hence not save anything) or be incorrect. */
3909 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3910 && INTVAL (const_arg1) < 0
3911 /* This used to test
3913 - INTVAL (const_arg1) >= 0
3915 But The Sun V5.0 compilers mis-compiled that test. So
3916 instead we test for the problematic value in a more direct
3917 manner and hope the Sun compilers get it correct. */
3918 && INTVAL (const_arg1) !=
3919 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3920 && GET_CODE (folded_arg1) == REG)
3922 rtx new_const = GEN_INT (- INTVAL (const_arg1));
3924 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
3928 for (p = p->first_same_value; p; p = p->next_same_value)
3929 if (GET_CODE (p->exp) == REG)
3930 return simplify_gen_binary (MINUS, mode, folded_arg0,
3931 canon_reg (p->exp, NULL_RTX));
3936 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3937 If so, produce (PLUS Z C2-C). */
3938 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3940 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3941 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3942 return fold_rtx (plus_constant (copy_rtx (y),
3943 -INTVAL (const_arg1)),
3947 /* ... fall through ... */
3950 case SMIN: case SMAX: case UMIN: case UMAX:
3951 case IOR: case AND: case XOR:
3952 case MULT: case DIV: case UDIV:
3953 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3954 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3955 is known to be of similar form, we may be able to replace the
3956 operation with a combined operation. This may eliminate the
3957 intermediate operation if every use is simplified in this way.
3958 Note that the similar optimization done by combine.c only works
3959 if the intermediate operation's result has only one reference. */
3961 if (GET_CODE (folded_arg0) == REG
3962 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3965 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3966 rtx y = lookup_as_function (folded_arg0, code);
3968 enum rtx_code associate_code;
3972 || 0 == (inner_const
3973 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
3974 || GET_CODE (inner_const) != CONST_INT
3975 /* If we have compiled a statement like
3976 "if (x == (x & mask1))", and now are looking at
3977 "x & mask2", we will have a case where the first operand
3978 of Y is the same as our first operand. Unless we detect
3979 this case, an infinite loop will result. */
3980 || XEXP (y, 0) == folded_arg0)
3983 /* Don't associate these operations if they are a PLUS with the
3984 same constant and it is a power of two. These might be doable
3985 with a pre- or post-increment. Similarly for two subtracts of
3986 identical powers of two with post decrement. */
3988 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
3989 && ((HAVE_PRE_INCREMENT
3990 && exact_log2 (INTVAL (const_arg1)) >= 0)
3991 || (HAVE_POST_INCREMENT
3992 && exact_log2 (INTVAL (const_arg1)) >= 0)
3993 || (HAVE_PRE_DECREMENT
3994 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3995 || (HAVE_POST_DECREMENT
3996 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3999 /* Compute the code used to compose the constants. For example,
4000 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4003 = (code == MULT || code == DIV || code == UDIV ? MULT
4004 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4006 new_const = simplify_binary_operation (associate_code, mode,
4007 const_arg1, inner_const);
4012 /* If we are associating shift operations, don't let this
4013 produce a shift of the size of the object or larger.
4014 This could occur when we follow a sign-extend by a right
4015 shift on a machine that does a sign-extend as a pair
4018 if (is_shift && GET_CODE (new_const) == CONST_INT
4019 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4021 /* As an exception, we can turn an ASHIFTRT of this
4022 form into a shift of the number of bits - 1. */
4023 if (code == ASHIFTRT)
4024 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4029 y = copy_rtx (XEXP (y, 0));
4031 /* If Y contains our first operand (the most common way this
4032 can happen is if Y is a MEM), we would do into an infinite
4033 loop if we tried to fold it. So don't in that case. */
4035 if (! reg_mentioned_p (folded_arg0, y))
4036 y = fold_rtx (y, insn);
4038 return simplify_gen_binary (code, mode, y, new_const);
4046 new = simplify_binary_operation (code, mode,
4047 const_arg0 ? const_arg0 : folded_arg0,
4048 const_arg1 ? const_arg1 : folded_arg1);
4052 /* (lo_sum (high X) X) is simply X. */
4053 if (code == LO_SUM && const_arg0 != 0
4054 && GET_CODE (const_arg0) == HIGH
4055 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4061 new = simplify_ternary_operation (code, mode, mode_arg0,
4062 const_arg0 ? const_arg0 : folded_arg0,
4063 const_arg1 ? const_arg1 : folded_arg1,
4064 const_arg2 ? const_arg2 : XEXP (x, 2));
4068 /* Always eliminate CONSTANT_P_RTX at this stage. */
4069 if (code == CONSTANT_P_RTX)
4070 return (const_arg0 ? const1_rtx : const0_rtx);
4074 return new ? new : x;
4077 /* Return a constant value currently equivalent to X.
4078 Return 0 if we don't know one. */
4084 if (GET_CODE (x) == REG
4085 && REGNO_QTY_VALID_P (REGNO (x)))
4087 int x_q = REG_QTY (REGNO (x));
4088 struct qty_table_elem *x_ent = &qty_table[x_q];
4090 if (x_ent->const_rtx)
4091 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4094 if (x == 0 || CONSTANT_P (x))
4097 /* If X is a MEM, try to fold it outside the context of any insn to see if
4098 it might be equivalent to a constant. That handles the case where it
4099 is a constant-pool reference. Then try to look it up in the hash table
4100 in case it is something whose value we have seen before. */
4102 if (GET_CODE (x) == MEM)
4104 struct table_elt *elt;
4106 x = fold_rtx (x, NULL_RTX);
4110 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4114 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4115 if (elt->is_const && CONSTANT_P (elt->exp))
4122 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4123 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4124 least-significant part of X.
4125 MODE specifies how big a part of X to return.
4127 If the requested operation cannot be done, 0 is returned.
4129 This is similar to gen_lowpart in emit-rtl.c. */
4132 gen_lowpart_if_possible (mode, x)
4133 enum machine_mode mode;
4136 rtx result = gen_lowpart_common (mode, x);
4140 else if (GET_CODE (x) == MEM)
4142 /* This is the only other case we handle. */
4143 register int offset = 0;
4146 if (WORDS_BIG_ENDIAN)
4147 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4148 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4149 if (BYTES_BIG_ENDIAN)
4150 /* Adjust the address so that the address-after-the-data is
4152 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4153 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4154 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4155 if (! memory_address_p (mode, XEXP (new, 0)))
4157 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4158 MEM_COPY_ATTRIBUTES (new, x);
4165 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4166 branch. It will be zero if not.
4168 In certain cases, this can cause us to add an equivalence. For example,
4169 if we are following the taken case of
4171 we can add the fact that `i' and '2' are now equivalent.
4173 In any case, we can record that this comparison was passed. If the same
4174 comparison is seen later, we will know its value. */
4177 record_jump_equiv (insn, taken)
4181 int cond_known_true;
4183 enum machine_mode mode, mode0, mode1;
4184 int reversed_nonequality = 0;
4187 /* Ensure this is the right kind of insn. */
4188 if (! condjump_p (insn) || simplejump_p (insn))
4191 /* See if this jump condition is known true or false. */
4193 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4195 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4197 /* Get the type of comparison being done and the operands being compared.
4198 If we had to reverse a non-equality condition, record that fact so we
4199 know that it isn't valid for floating-point. */
4200 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4201 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4202 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4204 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4205 if (! cond_known_true)
4207 reversed_nonequality = (code != EQ && code != NE);
4208 code = reverse_condition (code);
4210 /* Don't remember if we can't find the inverse. */
4211 if (code == UNKNOWN)
4215 /* The mode is the mode of the non-constant. */
4217 if (mode1 != VOIDmode)
4220 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4223 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4224 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4225 Make any useful entries we can with that information. Called from
4226 above function and called recursively. */
4229 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4231 enum machine_mode mode;
4233 int reversed_nonequality;
4235 unsigned op0_hash, op1_hash;
4236 int op0_in_memory, op1_in_memory;
4237 struct table_elt *op0_elt, *op1_elt;
4239 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4240 we know that they are also equal in the smaller mode (this is also
4241 true for all smaller modes whether or not there is a SUBREG, but
4242 is not worth testing for with no SUBREG). */
4244 /* Note that GET_MODE (op0) may not equal MODE. */
4245 if (code == EQ && GET_CODE (op0) == SUBREG
4246 && (GET_MODE_SIZE (GET_MODE (op0))
4247 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4249 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4250 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4252 record_jump_cond (code, mode, SUBREG_REG (op0),
4253 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4254 reversed_nonequality);
4257 if (code == EQ && GET_CODE (op1) == SUBREG
4258 && (GET_MODE_SIZE (GET_MODE (op1))
4259 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4261 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4262 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4264 record_jump_cond (code, mode, SUBREG_REG (op1),
4265 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4266 reversed_nonequality);
4269 /* Similarly, if this is an NE comparison, and either is a SUBREG
4270 making a smaller mode, we know the whole thing is also NE. */
4272 /* Note that GET_MODE (op0) may not equal MODE;
4273 if we test MODE instead, we can get an infinite recursion
4274 alternating between two modes each wider than MODE. */
4276 if (code == NE && GET_CODE (op0) == SUBREG
4277 && subreg_lowpart_p (op0)
4278 && (GET_MODE_SIZE (GET_MODE (op0))
4279 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4281 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4282 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4284 record_jump_cond (code, mode, SUBREG_REG (op0),
4285 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4286 reversed_nonequality);
4289 if (code == NE && GET_CODE (op1) == SUBREG
4290 && subreg_lowpart_p (op1)
4291 && (GET_MODE_SIZE (GET_MODE (op1))
4292 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4294 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4295 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4297 record_jump_cond (code, mode, SUBREG_REG (op1),
4298 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4299 reversed_nonequality);
4302 /* Hash both operands. */
4305 hash_arg_in_memory = 0;
4306 op0_hash = HASH (op0, mode);
4307 op0_in_memory = hash_arg_in_memory;
4313 hash_arg_in_memory = 0;
4314 op1_hash = HASH (op1, mode);
4315 op1_in_memory = hash_arg_in_memory;
4320 /* Look up both operands. */
4321 op0_elt = lookup (op0, op0_hash, mode);
4322 op1_elt = lookup (op1, op1_hash, mode);
4324 /* If both operands are already equivalent or if they are not in the
4325 table but are identical, do nothing. */
4326 if ((op0_elt != 0 && op1_elt != 0
4327 && op0_elt->first_same_value == op1_elt->first_same_value)
4328 || op0 == op1 || rtx_equal_p (op0, op1))
4331 /* If we aren't setting two things equal all we can do is save this
4332 comparison. Similarly if this is floating-point. In the latter
4333 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4334 If we record the equality, we might inadvertently delete code
4335 whose intent was to change -0 to +0. */
4337 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4339 struct qty_table_elem *ent;
4342 /* If we reversed a floating-point comparison, if OP0 is not a
4343 register, or if OP1 is neither a register or constant, we can't
4346 if (GET_CODE (op1) != REG)
4347 op1 = equiv_constant (op1);
4349 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4350 || GET_CODE (op0) != REG || op1 == 0)
4353 /* Put OP0 in the hash table if it isn't already. This gives it a
4354 new quantity number. */
4357 if (insert_regs (op0, NULL_PTR, 0))
4359 rehash_using_reg (op0);
4360 op0_hash = HASH (op0, mode);
4362 /* If OP0 is contained in OP1, this changes its hash code
4363 as well. Faster to rehash than to check, except
4364 for the simple case of a constant. */
4365 if (! CONSTANT_P (op1))
4366 op1_hash = HASH (op1,mode);
4369 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4370 op0_elt->in_memory = op0_in_memory;
4373 qty = REG_QTY (REGNO (op0));
4374 ent = &qty_table[qty];
4376 ent->comparison_code = code;
4377 if (GET_CODE (op1) == REG)
4379 /* Look it up again--in case op0 and op1 are the same. */
4380 op1_elt = lookup (op1, op1_hash, mode);
4382 /* Put OP1 in the hash table so it gets a new quantity number. */
4385 if (insert_regs (op1, NULL_PTR, 0))
4387 rehash_using_reg (op1);
4388 op1_hash = HASH (op1, mode);
4391 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4392 op1_elt->in_memory = op1_in_memory;
4395 ent->comparison_const = NULL_RTX;
4396 ent->comparison_qty = REG_QTY (REGNO (op1));
4400 ent->comparison_const = op1;
4401 ent->comparison_qty = -1;
4407 /* If either side is still missing an equivalence, make it now,
4408 then merge the equivalences. */
4412 if (insert_regs (op0, NULL_PTR, 0))
4414 rehash_using_reg (op0);
4415 op0_hash = HASH (op0, mode);
4418 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4419 op0_elt->in_memory = op0_in_memory;
4424 if (insert_regs (op1, NULL_PTR, 0))
4426 rehash_using_reg (op1);
4427 op1_hash = HASH (op1, mode);
4430 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4431 op1_elt->in_memory = op1_in_memory;
4434 merge_equiv_classes (op0_elt, op1_elt);
4435 last_jump_equiv_class = op0_elt;
4438 /* CSE processing for one instruction.
4439 First simplify sources and addresses of all assignments
4440 in the instruction, using previously-computed equivalents values.
4441 Then install the new sources and destinations in the table
4442 of available values.
4444 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4445 the insn. It means that INSN is inside libcall block. In this
4446 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4448 /* Data on one SET contained in the instruction. */
4452 /* The SET rtx itself. */
4454 /* The SET_SRC of the rtx (the original value, if it is changing). */
4456 /* The hash-table element for the SET_SRC of the SET. */
4457 struct table_elt *src_elt;
4458 /* Hash value for the SET_SRC. */
4460 /* Hash value for the SET_DEST. */
4462 /* The SET_DEST, with SUBREG, etc., stripped. */
4464 /* Nonzero if the SET_SRC is in memory. */
4466 /* Nonzero if the SET_SRC contains something
4467 whose value cannot be predicted and understood. */
4469 /* Original machine mode, in case it becomes a CONST_INT. */
4470 enum machine_mode mode;
4471 /* A constant equivalent for SET_SRC, if any. */
4473 /* Original SET_SRC value used for libcall notes. */
4475 /* Hash value of constant equivalent for SET_SRC. */
4476 unsigned src_const_hash;
4477 /* Table entry for constant equivalent for SET_SRC, if any. */
4478 struct table_elt *src_const_elt;
4482 cse_insn (insn, libcall_insn)
4486 register rtx x = PATTERN (insn);
4489 register int n_sets = 0;
4492 /* Records what this insn does to set CC0. */
4493 rtx this_insn_cc0 = 0;
4494 enum machine_mode this_insn_cc0_mode = VOIDmode;
4498 struct table_elt *src_eqv_elt = 0;
4499 int src_eqv_volatile = 0;
4500 int src_eqv_in_memory = 0;
4501 unsigned src_eqv_hash = 0;
4503 struct set *sets = (struct set *) NULL_PTR;
4507 /* Find all the SETs and CLOBBERs in this instruction.
4508 Record all the SETs in the array `set' and count them.
4509 Also determine whether there is a CLOBBER that invalidates
4510 all memory references, or all references at varying addresses. */
4512 if (GET_CODE (insn) == CALL_INSN)
4514 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4515 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4516 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4519 if (GET_CODE (x) == SET)
4521 sets = (struct set *) alloca (sizeof (struct set));
4524 /* Ignore SETs that are unconditional jumps.
4525 They never need cse processing, so this does not hurt.
4526 The reason is not efficiency but rather
4527 so that we can test at the end for instructions
4528 that have been simplified to unconditional jumps
4529 and not be misled by unchanged instructions
4530 that were unconditional jumps to begin with. */
4531 if (SET_DEST (x) == pc_rtx
4532 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4535 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4536 The hard function value register is used only once, to copy to
4537 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4538 Ensure we invalidate the destination register. On the 80386 no
4539 other code would invalidate it since it is a fixed_reg.
4540 We need not check the return of apply_change_group; see canon_reg. */
4542 else if (GET_CODE (SET_SRC (x)) == CALL)
4544 canon_reg (SET_SRC (x), insn);
4545 apply_change_group ();
4546 fold_rtx (SET_SRC (x), insn);
4547 invalidate (SET_DEST (x), VOIDmode);
4552 else if (GET_CODE (x) == PARALLEL)
4554 register int lim = XVECLEN (x, 0);
4556 sets = (struct set *) alloca (lim * sizeof (struct set));
4558 /* Find all regs explicitly clobbered in this insn,
4559 and ensure they are not replaced with any other regs
4560 elsewhere in this insn.
4561 When a reg that is clobbered is also used for input,
4562 we should presume that that is for a reason,
4563 and we should not substitute some other register
4564 which is not supposed to be clobbered.
4565 Therefore, this loop cannot be merged into the one below
4566 because a CALL may precede a CLOBBER and refer to the
4567 value clobbered. We must not let a canonicalization do
4568 anything in that case. */
4569 for (i = 0; i < lim; i++)
4571 register rtx y = XVECEXP (x, 0, i);
4572 if (GET_CODE (y) == CLOBBER)
4574 rtx clobbered = XEXP (y, 0);
4576 if (GET_CODE (clobbered) == REG
4577 || GET_CODE (clobbered) == SUBREG)
4578 invalidate (clobbered, VOIDmode);
4579 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4580 || GET_CODE (clobbered) == ZERO_EXTRACT)
4581 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4585 for (i = 0; i < lim; i++)
4587 register rtx y = XVECEXP (x, 0, i);
4588 if (GET_CODE (y) == SET)
4590 /* As above, we ignore unconditional jumps and call-insns and
4591 ignore the result of apply_change_group. */
4592 if (GET_CODE (SET_SRC (y)) == CALL)
4594 canon_reg (SET_SRC (y), insn);
4595 apply_change_group ();
4596 fold_rtx (SET_SRC (y), insn);
4597 invalidate (SET_DEST (y), VOIDmode);
4599 else if (SET_DEST (y) == pc_rtx
4600 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4603 sets[n_sets++].rtl = y;
4605 else if (GET_CODE (y) == CLOBBER)
4607 /* If we clobber memory, canon the address.
4608 This does nothing when a register is clobbered
4609 because we have already invalidated the reg. */
4610 if (GET_CODE (XEXP (y, 0)) == MEM)
4611 canon_reg (XEXP (y, 0), NULL_RTX);
4613 else if (GET_CODE (y) == USE
4614 && ! (GET_CODE (XEXP (y, 0)) == REG
4615 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4616 canon_reg (y, NULL_RTX);
4617 else if (GET_CODE (y) == CALL)
4619 /* The result of apply_change_group can be ignored; see
4621 canon_reg (y, insn);
4622 apply_change_group ();
4627 else if (GET_CODE (x) == CLOBBER)
4629 if (GET_CODE (XEXP (x, 0)) == MEM)
4630 canon_reg (XEXP (x, 0), NULL_RTX);
4633 /* Canonicalize a USE of a pseudo register or memory location. */
4634 else if (GET_CODE (x) == USE
4635 && ! (GET_CODE (XEXP (x, 0)) == REG
4636 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4637 canon_reg (XEXP (x, 0), NULL_RTX);
4638 else if (GET_CODE (x) == CALL)
4640 /* The result of apply_change_group can be ignored; see canon_reg. */
4641 canon_reg (x, insn);
4642 apply_change_group ();
4646 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4647 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4648 is handled specially for this case, and if it isn't set, then there will
4649 be no equivalence for the destination. */
4650 if (n_sets == 1 && REG_NOTES (insn) != 0
4651 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4652 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4653 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4654 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4656 /* Canonicalize sources and addresses of destinations.
4657 We do this in a separate pass to avoid problems when a MATCH_DUP is
4658 present in the insn pattern. In that case, we want to ensure that
4659 we don't break the duplicate nature of the pattern. So we will replace
4660 both operands at the same time. Otherwise, we would fail to find an
4661 equivalent substitution in the loop calling validate_change below.
4663 We used to suppress canonicalization of DEST if it appears in SRC,
4664 but we don't do this any more. */
4666 for (i = 0; i < n_sets; i++)
4668 rtx dest = SET_DEST (sets[i].rtl);
4669 rtx src = SET_SRC (sets[i].rtl);
4670 rtx new = canon_reg (src, insn);
4673 sets[i].orig_src = src;
4674 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4675 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4676 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4677 || (insn_code = recog_memoized (insn)) < 0
4678 || insn_data[insn_code].n_dups > 0)
4679 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4681 SET_SRC (sets[i].rtl) = new;
4683 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4685 validate_change (insn, &XEXP (dest, 1),
4686 canon_reg (XEXP (dest, 1), insn), 1);
4687 validate_change (insn, &XEXP (dest, 2),
4688 canon_reg (XEXP (dest, 2), insn), 1);
4691 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4692 || GET_CODE (dest) == ZERO_EXTRACT
4693 || GET_CODE (dest) == SIGN_EXTRACT)
4694 dest = XEXP (dest, 0);
4696 if (GET_CODE (dest) == MEM)
4697 canon_reg (dest, insn);
4700 /* Now that we have done all the replacements, we can apply the change
4701 group and see if they all work. Note that this will cause some
4702 canonicalizations that would have worked individually not to be applied
4703 because some other canonicalization didn't work, but this should not
4706 The result of apply_change_group can be ignored; see canon_reg. */
4708 apply_change_group ();
4710 /* Set sets[i].src_elt to the class each source belongs to.
4711 Detect assignments from or to volatile things
4712 and set set[i] to zero so they will be ignored
4713 in the rest of this function.
4715 Nothing in this loop changes the hash table or the register chains. */
4717 for (i = 0; i < n_sets; i++)
4719 register rtx src, dest;
4720 register rtx src_folded;
4721 register struct table_elt *elt = 0, *p;
4722 enum machine_mode mode;
4725 rtx src_related = 0;
4726 struct table_elt *src_const_elt = 0;
4727 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4728 int src_related_cost = 10000, src_elt_cost = 10000;
4729 /* Set non-zero if we need to call force_const_mem on with the
4730 contents of src_folded before using it. */
4731 int src_folded_force_flag = 0;
4733 dest = SET_DEST (sets[i].rtl);
4734 src = SET_SRC (sets[i].rtl);
4736 /* If SRC is a constant that has no machine mode,
4737 hash it with the destination's machine mode.
4738 This way we can keep different modes separate. */
4740 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4741 sets[i].mode = mode;
4745 enum machine_mode eqvmode = mode;
4746 if (GET_CODE (dest) == STRICT_LOW_PART)
4747 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4749 hash_arg_in_memory = 0;
4750 src_eqv = fold_rtx (src_eqv, insn);
4751 src_eqv_hash = HASH (src_eqv, eqvmode);
4753 /* Find the equivalence class for the equivalent expression. */
4756 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4758 src_eqv_volatile = do_not_record;
4759 src_eqv_in_memory = hash_arg_in_memory;
4762 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4763 value of the INNER register, not the destination. So it is not
4764 a valid substitution for the source. But save it for later. */
4765 if (GET_CODE (dest) == STRICT_LOW_PART)
4768 src_eqv_here = src_eqv;
4770 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4771 simplified result, which may not necessarily be valid. */
4772 src_folded = fold_rtx (src, insn);
4775 /* ??? This caused bad code to be generated for the m68k port with -O2.
4776 Suppose src is (CONST_INT -1), and that after truncation src_folded
4777 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4778 At the end we will add src and src_const to the same equivalence
4779 class. We now have 3 and -1 on the same equivalence class. This
4780 causes later instructions to be mis-optimized. */
4781 /* If storing a constant in a bitfield, pre-truncate the constant
4782 so we will be able to record it later. */
4783 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4784 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4786 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4788 if (GET_CODE (src) == CONST_INT
4789 && GET_CODE (width) == CONST_INT
4790 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4791 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4793 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4794 << INTVAL (width)) - 1));
4798 /* Compute SRC's hash code, and also notice if it
4799 should not be recorded at all. In that case,
4800 prevent any further processing of this assignment. */
4802 hash_arg_in_memory = 0;
4805 sets[i].src_hash = HASH (src, mode);
4806 sets[i].src_volatile = do_not_record;
4807 sets[i].src_in_memory = hash_arg_in_memory;
4809 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4810 a pseudo that is set more than once, do not record SRC. Using
4811 SRC as a replacement for anything else will be incorrect in that
4812 situation. Note that this usually occurs only for stack slots,
4813 in which case all the RTL would be referring to SRC, so we don't
4814 lose any optimization opportunities by not having SRC in the
4817 if (GET_CODE (src) == MEM
4818 && find_reg_note (insn, REG_EQUIV, src) != 0
4819 && GET_CODE (dest) == REG
4820 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4821 && REG_N_SETS (REGNO (dest)) != 1)
4822 sets[i].src_volatile = 1;
4825 /* It is no longer clear why we used to do this, but it doesn't
4826 appear to still be needed. So let's try without it since this
4827 code hurts cse'ing widened ops. */
4828 /* If source is a perverse subreg (such as QI treated as an SI),
4829 treat it as volatile. It may do the work of an SI in one context
4830 where the extra bits are not being used, but cannot replace an SI
4832 if (GET_CODE (src) == SUBREG
4833 && (GET_MODE_SIZE (GET_MODE (src))
4834 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4835 sets[i].src_volatile = 1;
4838 /* Locate all possible equivalent forms for SRC. Try to replace
4839 SRC in the insn with each cheaper equivalent.
4841 We have the following types of equivalents: SRC itself, a folded
4842 version, a value given in a REG_EQUAL note, or a value related
4845 Each of these equivalents may be part of an additional class
4846 of equivalents (if more than one is in the table, they must be in
4847 the same class; we check for this).
4849 If the source is volatile, we don't do any table lookups.
4851 We note any constant equivalent for possible later use in a
4854 if (!sets[i].src_volatile)
4855 elt = lookup (src, sets[i].src_hash, mode);
4857 sets[i].src_elt = elt;
4859 if (elt && src_eqv_here && src_eqv_elt)
4861 if (elt->first_same_value != src_eqv_elt->first_same_value)
4863 /* The REG_EQUAL is indicating that two formerly distinct
4864 classes are now equivalent. So merge them. */
4865 merge_equiv_classes (elt, src_eqv_elt);
4866 src_eqv_hash = HASH (src_eqv, elt->mode);
4867 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4873 else if (src_eqv_elt)
4876 /* Try to find a constant somewhere and record it in `src_const'.
4877 Record its table element, if any, in `src_const_elt'. Look in
4878 any known equivalences first. (If the constant is not in the
4879 table, also set `sets[i].src_const_hash'). */
4881 for (p = elt->first_same_value; p; p = p->next_same_value)
4885 src_const_elt = elt;
4890 && (CONSTANT_P (src_folded)
4891 /* Consider (minus (label_ref L1) (label_ref L2)) as
4892 "constant" here so we will record it. This allows us
4893 to fold switch statements when an ADDR_DIFF_VEC is used. */
4894 || (GET_CODE (src_folded) == MINUS
4895 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4896 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4897 src_const = src_folded, src_const_elt = elt;
4898 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4899 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4901 /* If we don't know if the constant is in the table, get its
4902 hash code and look it up. */
4903 if (src_const && src_const_elt == 0)
4905 sets[i].src_const_hash = HASH (src_const, mode);
4906 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4909 sets[i].src_const = src_const;
4910 sets[i].src_const_elt = src_const_elt;
4912 /* If the constant and our source are both in the table, mark them as
4913 equivalent. Otherwise, if a constant is in the table but the source
4914 isn't, set ELT to it. */
4915 if (src_const_elt && elt
4916 && src_const_elt->first_same_value != elt->first_same_value)
4917 merge_equiv_classes (elt, src_const_elt);
4918 else if (src_const_elt && elt == 0)
4919 elt = src_const_elt;
4921 /* See if there is a register linearly related to a constant
4922 equivalent of SRC. */
4924 && (GET_CODE (src_const) == CONST
4925 || (src_const_elt && src_const_elt->related_value != 0)))
4927 src_related = use_related_value (src_const, src_const_elt);
4930 struct table_elt *src_related_elt
4931 = lookup (src_related, HASH (src_related, mode), mode);
4932 if (src_related_elt && elt)
4934 if (elt->first_same_value
4935 != src_related_elt->first_same_value)
4936 /* This can occur when we previously saw a CONST
4937 involving a SYMBOL_REF and then see the SYMBOL_REF
4938 twice. Merge the involved classes. */
4939 merge_equiv_classes (elt, src_related_elt);
4942 src_related_elt = 0;
4944 else if (src_related_elt && elt == 0)
4945 elt = src_related_elt;
4949 /* See if we have a CONST_INT that is already in a register in a
4952 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4953 && GET_MODE_CLASS (mode) == MODE_INT
4954 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4956 enum machine_mode wider_mode;
4958 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4959 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4960 && src_related == 0;
4961 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4963 struct table_elt *const_elt
4964 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4969 for (const_elt = const_elt->first_same_value;
4970 const_elt; const_elt = const_elt->next_same_value)
4971 if (GET_CODE (const_elt->exp) == REG)
4973 src_related = gen_lowpart_if_possible (mode,
4980 /* Another possibility is that we have an AND with a constant in
4981 a mode narrower than a word. If so, it might have been generated
4982 as part of an "if" which would narrow the AND. If we already
4983 have done the AND in a wider mode, we can use a SUBREG of that
4986 if (flag_expensive_optimizations && ! src_related
4987 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4988 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4990 enum machine_mode tmode;
4991 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4993 for (tmode = GET_MODE_WIDER_MODE (mode);
4994 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4995 tmode = GET_MODE_WIDER_MODE (tmode))
4997 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
4998 struct table_elt *larger_elt;
5002 PUT_MODE (new_and, tmode);
5003 XEXP (new_and, 0) = inner;
5004 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5005 if (larger_elt == 0)
5008 for (larger_elt = larger_elt->first_same_value;
5009 larger_elt; larger_elt = larger_elt->next_same_value)
5010 if (GET_CODE (larger_elt->exp) == REG)
5013 = gen_lowpart_if_possible (mode, larger_elt->exp);
5023 #ifdef LOAD_EXTEND_OP
5024 /* See if a MEM has already been loaded with a widening operation;
5025 if it has, we can use a subreg of that. Many CISC machines
5026 also have such operations, but this is only likely to be
5027 beneficial these machines. */
5029 if (flag_expensive_optimizations && src_related == 0
5030 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5031 && GET_MODE_CLASS (mode) == MODE_INT
5032 && GET_CODE (src) == MEM && ! do_not_record
5033 && LOAD_EXTEND_OP (mode) != NIL)
5035 enum machine_mode tmode;
5037 /* Set what we are trying to extend and the operation it might
5038 have been extended with. */
5039 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5040 XEXP (memory_extend_rtx, 0) = src;
5042 for (tmode = GET_MODE_WIDER_MODE (mode);
5043 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5044 tmode = GET_MODE_WIDER_MODE (tmode))
5046 struct table_elt *larger_elt;
5048 PUT_MODE (memory_extend_rtx, tmode);
5049 larger_elt = lookup (memory_extend_rtx,
5050 HASH (memory_extend_rtx, tmode), tmode);
5051 if (larger_elt == 0)
5054 for (larger_elt = larger_elt->first_same_value;
5055 larger_elt; larger_elt = larger_elt->next_same_value)
5056 if (GET_CODE (larger_elt->exp) == REG)
5058 src_related = gen_lowpart_if_possible (mode,
5067 #endif /* LOAD_EXTEND_OP */
5069 if (src == src_folded)
5072 /* At this point, ELT, if non-zero, points to a class of expressions
5073 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5074 and SRC_RELATED, if non-zero, each contain additional equivalent
5075 expressions. Prune these latter expressions by deleting expressions
5076 already in the equivalence class.
5078 Check for an equivalent identical to the destination. If found,
5079 this is the preferred equivalent since it will likely lead to
5080 elimination of the insn. Indicate this by placing it in
5083 if (elt) elt = elt->first_same_value;
5084 for (p = elt; p; p = p->next_same_value)
5086 enum rtx_code code = GET_CODE (p->exp);
5088 /* If the expression is not valid, ignore it. Then we do not
5089 have to check for validity below. In most cases, we can use
5090 `rtx_equal_p', since canonicalization has already been done. */
5091 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5094 /* Also skip paradoxical subregs, unless that's what we're
5097 && (GET_MODE_SIZE (GET_MODE (p->exp))
5098 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5100 && GET_CODE (src) == SUBREG
5101 && GET_MODE (src) == GET_MODE (p->exp)
5102 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5103 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5106 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5108 else if (src_folded && GET_CODE (src_folded) == code
5109 && rtx_equal_p (src_folded, p->exp))
5111 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5112 && rtx_equal_p (src_eqv_here, p->exp))
5114 else if (src_related && GET_CODE (src_related) == code
5115 && rtx_equal_p (src_related, p->exp))
5118 /* This is the same as the destination of the insns, we want
5119 to prefer it. Copy it to src_related. The code below will
5120 then give it a negative cost. */
5121 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5126 /* Find the cheapest valid equivalent, trying all the available
5127 possibilities. Prefer items not in the hash table to ones
5128 that are when they are equal cost. Note that we can never
5129 worsen an insn as the current contents will also succeed.
5130 If we find an equivalent identical to the destination, use it as best,
5131 since this insn will probably be eliminated in that case. */
5134 if (rtx_equal_p (src, dest))
5137 src_cost = COST (src);
5142 if (rtx_equal_p (src_eqv_here, dest))
5145 src_eqv_cost = COST (src_eqv_here);
5150 if (rtx_equal_p (src_folded, dest))
5151 src_folded_cost = -1;
5153 src_folded_cost = COST (src_folded);
5158 if (rtx_equal_p (src_related, dest))
5159 src_related_cost = -1;
5161 src_related_cost = COST (src_related);
5164 /* If this was an indirect jump insn, a known label will really be
5165 cheaper even though it looks more expensive. */
5166 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5167 src_folded = src_const, src_folded_cost = -1;
5169 /* Terminate loop when replacement made. This must terminate since
5170 the current contents will be tested and will always be valid. */
5175 /* Skip invalid entries. */
5176 while (elt && GET_CODE (elt->exp) != REG
5177 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5178 elt = elt->next_same_value;
5180 /* A paradoxical subreg would be bad here: it'll be the right
5181 size, but later may be adjusted so that the upper bits aren't
5182 what we want. So reject it. */
5184 && GET_CODE (elt->exp) == SUBREG
5185 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5186 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5187 /* It is okay, though, if the rtx we're trying to match
5188 will ignore any of the bits we can't predict. */
5190 && GET_CODE (src) == SUBREG
5191 && GET_MODE (src) == GET_MODE (elt->exp)
5192 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5193 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5195 elt = elt->next_same_value;
5199 if (elt) src_elt_cost = elt->cost;
5201 /* Find cheapest and skip it for the next time. For items
5202 of equal cost, use this order:
5203 src_folded, src, src_eqv, src_related and hash table entry. */
5204 if (src_folded_cost <= src_cost
5205 && src_folded_cost <= src_eqv_cost
5206 && src_folded_cost <= src_related_cost
5207 && src_folded_cost <= src_elt_cost)
5209 trial = src_folded, src_folded_cost = 10000;
5210 if (src_folded_force_flag)
5211 trial = force_const_mem (mode, trial);
5213 else if (src_cost <= src_eqv_cost
5214 && src_cost <= src_related_cost
5215 && src_cost <= src_elt_cost)
5216 trial = src, src_cost = 10000;
5217 else if (src_eqv_cost <= src_related_cost
5218 && src_eqv_cost <= src_elt_cost)
5219 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5220 else if (src_related_cost <= src_elt_cost)
5221 trial = copy_rtx (src_related), src_related_cost = 10000;
5224 trial = copy_rtx (elt->exp);
5225 elt = elt->next_same_value;
5226 src_elt_cost = 10000;
5229 /* We don't normally have an insn matching (set (pc) (pc)), so
5230 check for this separately here. We will delete such an
5233 Tablejump insns contain a USE of the table, so simply replacing
5234 the operand with the constant won't match. This is simply an
5235 unconditional branch, however, and is therefore valid. Just
5236 insert the substitution here and we will delete and re-emit
5239 if (n_sets == 1 && dest == pc_rtx
5241 || (GET_CODE (trial) == LABEL_REF
5242 && ! condjump_p (insn))))
5244 if (trial == pc_rtx)
5246 SET_SRC (sets[i].rtl) = trial;
5247 cse_jumps_altered = 1;
5251 PATTERN (insn) = gen_jump (XEXP (trial, 0));
5252 INSN_CODE (insn) = -1;
5253 cse_jumps_altered = 1;
5257 /* Look for a substitution that makes a valid insn. */
5258 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5260 /* If we just made a substitution inside a libcall, then we
5261 need to make the same substitution in any notes attached
5262 to the RETVAL insn. */
5264 && (GET_CODE (sets[i].orig_src) == REG
5265 || GET_CODE (sets[i].orig_src) == SUBREG
5266 || GET_CODE (sets[i].orig_src) == MEM))
5267 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5268 canon_reg (SET_SRC (sets[i].rtl), insn));
5270 /* The result of apply_change_group can be ignored; see
5273 validate_change (insn, &SET_SRC (sets[i].rtl),
5274 canon_reg (SET_SRC (sets[i].rtl), insn),
5276 apply_change_group ();
5280 /* If we previously found constant pool entries for
5281 constants and this is a constant, try making a
5282 pool entry. Put it in src_folded unless we already have done
5283 this since that is where it likely came from. */
5285 else if (constant_pool_entries_cost
5286 && CONSTANT_P (trial)
5287 && ! (GET_CODE (trial) == CONST
5288 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5290 || (GET_CODE (src_folded) != MEM
5291 && ! src_folded_force_flag))
5292 && GET_MODE_CLASS (mode) != MODE_CC
5293 && mode != VOIDmode)
5295 src_folded_force_flag = 1;
5297 src_folded_cost = constant_pool_entries_cost;
5301 src = SET_SRC (sets[i].rtl);
5303 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5304 However, there is an important exception: If both are registers
5305 that are not the head of their equivalence class, replace SET_SRC
5306 with the head of the class. If we do not do this, we will have
5307 both registers live over a portion of the basic block. This way,
5308 their lifetimes will likely abut instead of overlapping. */
5309 if (GET_CODE (dest) == REG
5310 && REGNO_QTY_VALID_P (REGNO (dest)))
5312 int dest_q = REG_QTY (REGNO (dest));
5313 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5315 if (dest_ent->mode == GET_MODE (dest)
5316 && dest_ent->first_reg != REGNO (dest)
5317 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5318 /* Don't do this if the original insn had a hard reg as
5319 SET_SRC or SET_DEST. */
5320 && (GET_CODE (sets[i].src) != REG
5321 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5322 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5323 /* We can't call canon_reg here because it won't do anything if
5324 SRC is a hard register. */
5326 int src_q = REG_QTY (REGNO (src));
5327 struct qty_table_elem *src_ent = &qty_table[src_q];
5328 int first = src_ent->first_reg;
5330 = (first >= FIRST_PSEUDO_REGISTER
5331 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5333 /* We must use validate-change even for this, because this
5334 might be a special no-op instruction, suitable only to
5336 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5339 /* If we had a constant that is cheaper than what we are now
5340 setting SRC to, use that constant. We ignored it when we
5341 thought we could make this into a no-op. */
5342 if (src_const && COST (src_const) < COST (src)
5343 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5350 /* If we made a change, recompute SRC values. */
5351 if (src != sets[i].src)
5355 hash_arg_in_memory = 0;
5357 sets[i].src_hash = HASH (src, mode);
5358 sets[i].src_volatile = do_not_record;
5359 sets[i].src_in_memory = hash_arg_in_memory;
5360 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5363 /* If this is a single SET, we are setting a register, and we have an
5364 equivalent constant, we want to add a REG_NOTE. We don't want
5365 to write a REG_EQUAL note for a constant pseudo since verifying that
5366 that pseudo hasn't been eliminated is a pain. Such a note also
5367 won't help anything.
5369 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5370 which can be created for a reference to a compile time computable
5371 entry in a jump table. */
5373 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5374 && GET_CODE (src_const) != REG
5375 && ! (GET_CODE (src_const) == CONST
5376 && GET_CODE (XEXP (src_const, 0)) == MINUS
5377 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5378 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5380 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5382 /* Make sure that the rtx is not shared with any other insn. */
5383 src_const = copy_rtx (src_const);
5385 /* Record the actual constant value in a REG_EQUAL note, making
5386 a new one if one does not already exist. */
5388 XEXP (tem, 0) = src_const;
5390 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5391 src_const, REG_NOTES (insn));
5393 /* If storing a constant value in a register that
5394 previously held the constant value 0,
5395 record this fact with a REG_WAS_0 note on this insn.
5397 Note that the *register* is required to have previously held 0,
5398 not just any register in the quantity and we must point to the
5399 insn that set that register to zero.
5401 Rather than track each register individually, we just see if
5402 the last set for this quantity was for this register. */
5404 if (REGNO_QTY_VALID_P (REGNO (dest)))
5406 int dest_q = REG_QTY (REGNO (dest));
5407 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5409 if (dest_ent->const_rtx == const0_rtx)
5411 /* See if we previously had a REG_WAS_0 note. */
5412 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5413 rtx const_insn = dest_ent->const_insn;
5415 if ((tem = single_set (const_insn)) != 0
5416 && rtx_equal_p (SET_DEST (tem), dest))
5419 XEXP (note, 0) = const_insn;
5422 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5429 /* Now deal with the destination. */
5432 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5433 to the MEM or REG within it. */
5434 while (GET_CODE (dest) == SIGN_EXTRACT
5435 || GET_CODE (dest) == ZERO_EXTRACT
5436 || GET_CODE (dest) == SUBREG
5437 || GET_CODE (dest) == STRICT_LOW_PART)
5438 dest = XEXP (dest, 0);
5440 sets[i].inner_dest = dest;
5442 if (GET_CODE (dest) == MEM)
5444 #ifdef PUSH_ROUNDING
5445 /* Stack pushes invalidate the stack pointer. */
5446 rtx addr = XEXP (dest, 0);
5447 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5448 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5449 && XEXP (addr, 0) == stack_pointer_rtx)
5450 invalidate (stack_pointer_rtx, Pmode);
5452 dest = fold_rtx (dest, insn);
5455 /* Compute the hash code of the destination now,
5456 before the effects of this instruction are recorded,
5457 since the register values used in the address computation
5458 are those before this instruction. */
5459 sets[i].dest_hash = HASH (dest, mode);
5461 /* Don't enter a bit-field in the hash table
5462 because the value in it after the store
5463 may not equal what was stored, due to truncation. */
5465 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5466 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5468 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5470 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5471 && GET_CODE (width) == CONST_INT
5472 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5473 && ! (INTVAL (src_const)
5474 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5475 /* Exception: if the value is constant,
5476 and it won't be truncated, record it. */
5480 /* This is chosen so that the destination will be invalidated
5481 but no new value will be recorded.
5482 We must invalidate because sometimes constant
5483 values can be recorded for bitfields. */
5484 sets[i].src_elt = 0;
5485 sets[i].src_volatile = 1;
5491 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5493 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5495 /* One less use of the label this insn used to jump to. */
5496 if (JUMP_LABEL (insn) != 0)
5497 --LABEL_NUSES (JUMP_LABEL (insn));
5498 PUT_CODE (insn, NOTE);
5499 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5500 NOTE_SOURCE_FILE (insn) = 0;
5501 cse_jumps_altered = 1;
5502 /* No more processing for this set. */
5506 /* If this SET is now setting PC to a label, we know it used to
5507 be a conditional or computed branch. So we see if we can follow
5508 it. If it was a computed branch, delete it and re-emit. */
5509 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5511 /* If this is not in the format for a simple branch and
5512 we are the only SET in it, re-emit it. */
5513 if (! simplejump_p (insn) && n_sets == 1)
5515 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5516 JUMP_LABEL (new) = XEXP (src, 0);
5517 LABEL_NUSES (XEXP (src, 0))++;
5521 /* Otherwise, force rerecognition, since it probably had
5522 a different pattern before.
5523 This shouldn't really be necessary, since whatever
5524 changed the source value above should have done this.
5525 Until the right place is found, might as well do this here. */
5526 INSN_CODE (insn) = -1;
5528 never_reached_warning (insn);
5530 /* Now emit a BARRIER after the unconditional jump. Do not bother
5531 deleting any unreachable code, let jump/flow do that. */
5532 if (NEXT_INSN (insn) != 0
5533 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5534 emit_barrier_after (insn);
5536 cse_jumps_altered = 1;
5540 /* If destination is volatile, invalidate it and then do no further
5541 processing for this assignment. */
5543 else if (do_not_record)
5545 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5546 || GET_CODE (dest) == MEM)
5547 invalidate (dest, VOIDmode);
5548 else if (GET_CODE (dest) == STRICT_LOW_PART
5549 || GET_CODE (dest) == ZERO_EXTRACT)
5550 invalidate (XEXP (dest, 0), GET_MODE (dest));
5554 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5555 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5558 /* If setting CC0, record what it was set to, or a constant, if it
5559 is equivalent to a constant. If it is being set to a floating-point
5560 value, make a COMPARE with the appropriate constant of 0. If we
5561 don't do this, later code can interpret this as a test against
5562 const0_rtx, which can cause problems if we try to put it into an
5563 insn as a floating-point operand. */
5564 if (dest == cc0_rtx)
5566 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5567 this_insn_cc0_mode = mode;
5568 if (FLOAT_MODE_P (mode))
5569 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5575 /* Now enter all non-volatile source expressions in the hash table
5576 if they are not already present.
5577 Record their equivalence classes in src_elt.
5578 This way we can insert the corresponding destinations into
5579 the same classes even if the actual sources are no longer in them
5580 (having been invalidated). */
5582 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5583 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5585 register struct table_elt *elt;
5586 register struct table_elt *classp = sets[0].src_elt;
5587 rtx dest = SET_DEST (sets[0].rtl);
5588 enum machine_mode eqvmode = GET_MODE (dest);
5590 if (GET_CODE (dest) == STRICT_LOW_PART)
5592 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5595 if (insert_regs (src_eqv, classp, 0))
5597 rehash_using_reg (src_eqv);
5598 src_eqv_hash = HASH (src_eqv, eqvmode);
5600 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5601 elt->in_memory = src_eqv_in_memory;
5604 /* Check to see if src_eqv_elt is the same as a set source which
5605 does not yet have an elt, and if so set the elt of the set source
5607 for (i = 0; i < n_sets; i++)
5608 if (sets[i].rtl && sets[i].src_elt == 0
5609 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5610 sets[i].src_elt = src_eqv_elt;
5613 for (i = 0; i < n_sets; i++)
5614 if (sets[i].rtl && ! sets[i].src_volatile
5615 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5617 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5619 /* REG_EQUAL in setting a STRICT_LOW_PART
5620 gives an equivalent for the entire destination register,
5621 not just for the subreg being stored in now.
5622 This is a more interesting equivalence, so we arrange later
5623 to treat the entire reg as the destination. */
5624 sets[i].src_elt = src_eqv_elt;
5625 sets[i].src_hash = src_eqv_hash;
5629 /* Insert source and constant equivalent into hash table, if not
5631 register struct table_elt *classp = src_eqv_elt;
5632 register rtx src = sets[i].src;
5633 register rtx dest = SET_DEST (sets[i].rtl);
5634 enum machine_mode mode
5635 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5637 if (sets[i].src_elt == 0)
5639 /* Don't put a hard register source into the table if this is
5640 the last insn of a libcall. In this case, we only need
5641 to put src_eqv_elt in src_elt. */
5642 if (GET_CODE (src) != REG
5643 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5644 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5646 register struct table_elt *elt;
5648 /* Note that these insert_regs calls cannot remove
5649 any of the src_elt's, because they would have failed to
5650 match if not still valid. */
5651 if (insert_regs (src, classp, 0))
5653 rehash_using_reg (src);
5654 sets[i].src_hash = HASH (src, mode);
5656 elt = insert (src, classp, sets[i].src_hash, mode);
5657 elt->in_memory = sets[i].src_in_memory;
5658 sets[i].src_elt = classp = elt;
5661 sets[i].src_elt = classp;
5663 if (sets[i].src_const && sets[i].src_const_elt == 0
5664 && src != sets[i].src_const
5665 && ! rtx_equal_p (sets[i].src_const, src))
5666 sets[i].src_elt = insert (sets[i].src_const, classp,
5667 sets[i].src_const_hash, mode);
5670 else if (sets[i].src_elt == 0)
5671 /* If we did not insert the source into the hash table (e.g., it was
5672 volatile), note the equivalence class for the REG_EQUAL value, if any,
5673 so that the destination goes into that class. */
5674 sets[i].src_elt = src_eqv_elt;
5676 invalidate_from_clobbers (x);
5678 /* Some registers are invalidated by subroutine calls. Memory is
5679 invalidated by non-constant calls. */
5681 if (GET_CODE (insn) == CALL_INSN)
5683 if (! CONST_CALL_P (insn))
5684 invalidate_memory ();
5685 invalidate_for_call ();
5688 /* Now invalidate everything set by this instruction.
5689 If a SUBREG or other funny destination is being set,
5690 sets[i].rtl is still nonzero, so here we invalidate the reg
5691 a part of which is being set. */
5693 for (i = 0; i < n_sets; i++)
5696 /* We can't use the inner dest, because the mode associated with
5697 a ZERO_EXTRACT is significant. */
5698 register rtx dest = SET_DEST (sets[i].rtl);
5700 /* Needed for registers to remove the register from its
5701 previous quantity's chain.
5702 Needed for memory if this is a nonvarying address, unless
5703 we have just done an invalidate_memory that covers even those. */
5704 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5705 || GET_CODE (dest) == MEM)
5706 invalidate (dest, VOIDmode);
5707 else if (GET_CODE (dest) == STRICT_LOW_PART
5708 || GET_CODE (dest) == ZERO_EXTRACT)
5709 invalidate (XEXP (dest, 0), GET_MODE (dest));
5712 /* A volatile ASM invalidates everything. */
5713 if (GET_CODE (insn) == INSN
5714 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5715 && MEM_VOLATILE_P (PATTERN (insn)))
5716 flush_hash_table ();
5718 /* Make sure registers mentioned in destinations
5719 are safe for use in an expression to be inserted.
5720 This removes from the hash table
5721 any invalid entry that refers to one of these registers.
5723 We don't care about the return value from mention_regs because
5724 we are going to hash the SET_DEST values unconditionally. */
5726 for (i = 0; i < n_sets; i++)
5730 rtx x = SET_DEST (sets[i].rtl);
5732 if (GET_CODE (x) != REG)
5736 /* We used to rely on all references to a register becoming
5737 inaccessible when a register changes to a new quantity,
5738 since that changes the hash code. However, that is not
5739 safe, since after HASH_SIZE new quantities we get a
5740 hash 'collision' of a register with its own invalid
5741 entries. And since SUBREGs have been changed not to
5742 change their hash code with the hash code of the register,
5743 it wouldn't work any longer at all. So we have to check
5744 for any invalid references lying around now.
5745 This code is similar to the REG case in mention_regs,
5746 but it knows that reg_tick has been incremented, and
5747 it leaves reg_in_table as -1 . */
5748 unsigned int regno = REGNO (x);
5749 unsigned int endregno
5750 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5751 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5754 for (i = regno; i < endregno; i++)
5756 if (REG_IN_TABLE (i) >= 0)
5758 remove_invalid_refs (i);
5759 REG_IN_TABLE (i) = -1;
5766 /* We may have just removed some of the src_elt's from the hash table.
5767 So replace each one with the current head of the same class. */
5769 for (i = 0; i < n_sets; i++)
5772 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5773 /* If elt was removed, find current head of same class,
5774 or 0 if nothing remains of that class. */
5776 register struct table_elt *elt = sets[i].src_elt;
5778 while (elt && elt->prev_same_value)
5779 elt = elt->prev_same_value;
5781 while (elt && elt->first_same_value == 0)
5782 elt = elt->next_same_value;
5783 sets[i].src_elt = elt ? elt->first_same_value : 0;
5787 /* Now insert the destinations into their equivalence classes. */
5789 for (i = 0; i < n_sets; i++)
5792 register rtx dest = SET_DEST (sets[i].rtl);
5793 rtx inner_dest = sets[i].inner_dest;
5794 register struct table_elt *elt;
5796 /* Don't record value if we are not supposed to risk allocating
5797 floating-point values in registers that might be wider than
5799 if ((flag_float_store
5800 && GET_CODE (dest) == MEM
5801 && FLOAT_MODE_P (GET_MODE (dest)))
5802 /* Don't record BLKmode values, because we don't know the
5803 size of it, and can't be sure that other BLKmode values
5804 have the same or smaller size. */
5805 || GET_MODE (dest) == BLKmode
5806 /* Don't record values of destinations set inside a libcall block
5807 since we might delete the libcall. Things should have been set
5808 up so we won't want to reuse such a value, but we play it safe
5811 /* If we didn't put a REG_EQUAL value or a source into the hash
5812 table, there is no point is recording DEST. */
5813 || sets[i].src_elt == 0
5814 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5815 or SIGN_EXTEND, don't record DEST since it can cause
5816 some tracking to be wrong.
5818 ??? Think about this more later. */
5819 || (GET_CODE (dest) == SUBREG
5820 && (GET_MODE_SIZE (GET_MODE (dest))
5821 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5822 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5823 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5826 /* STRICT_LOW_PART isn't part of the value BEING set,
5827 and neither is the SUBREG inside it.
5828 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5829 if (GET_CODE (dest) == STRICT_LOW_PART)
5830 dest = SUBREG_REG (XEXP (dest, 0));
5832 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5833 /* Registers must also be inserted into chains for quantities. */
5834 if (insert_regs (dest, sets[i].src_elt, 1))
5836 /* If `insert_regs' changes something, the hash code must be
5838 rehash_using_reg (dest);
5839 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5842 if (GET_CODE (inner_dest) == MEM
5843 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5844 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5845 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5846 Consider the case in which the address of the MEM is
5847 passed to a function, which alters the MEM. Then, if we
5848 later use Y instead of the MEM we'll miss the update. */
5849 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5851 elt = insert (dest, sets[i].src_elt,
5852 sets[i].dest_hash, GET_MODE (dest));
5854 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5855 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5856 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5859 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5860 narrower than M2, and both M1 and M2 are the same number of words,
5861 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5862 make that equivalence as well.
5864 However, BAR may have equivalences for which gen_lowpart_if_possible
5865 will produce a simpler value than gen_lowpart_if_possible applied to
5866 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5867 BAR's equivalences. If we don't get a simplified form, make
5868 the SUBREG. It will not be used in an equivalence, but will
5869 cause two similar assignments to be detected.
5871 Note the loop below will find SUBREG_REG (DEST) since we have
5872 already entered SRC and DEST of the SET in the table. */
5874 if (GET_CODE (dest) == SUBREG
5875 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5877 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
5878 && (GET_MODE_SIZE (GET_MODE (dest))
5879 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5880 && sets[i].src_elt != 0)
5882 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5883 struct table_elt *elt, *classp = 0;
5885 for (elt = sets[i].src_elt->first_same_value; elt;
5886 elt = elt->next_same_value)
5890 struct table_elt *src_elt;
5892 /* Ignore invalid entries. */
5893 if (GET_CODE (elt->exp) != REG
5894 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5897 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
5899 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
5901 src_hash = HASH (new_src, new_mode);
5902 src_elt = lookup (new_src, src_hash, new_mode);
5904 /* Put the new source in the hash table is if isn't
5908 if (insert_regs (new_src, classp, 0))
5910 rehash_using_reg (new_src);
5911 src_hash = HASH (new_src, new_mode);
5913 src_elt = insert (new_src, classp, src_hash, new_mode);
5914 src_elt->in_memory = elt->in_memory;
5916 else if (classp && classp != src_elt->first_same_value)
5917 /* Show that two things that we've seen before are
5918 actually the same. */
5919 merge_equiv_classes (src_elt, classp);
5921 classp = src_elt->first_same_value;
5922 /* Ignore invalid entries. */
5924 && GET_CODE (classp->exp) != REG
5925 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
5926 classp = classp->next_same_value;
5931 /* Special handling for (set REG0 REG1)
5932 where REG0 is the "cheapest", cheaper than REG1.
5933 After cse, REG1 will probably not be used in the sequel,
5934 so (if easily done) change this insn to (set REG1 REG0) and
5935 replace REG1 with REG0 in the previous insn that computed their value.
5936 Then REG1 will become a dead store and won't cloud the situation
5937 for later optimizations.
5939 Do not make this change if REG1 is a hard register, because it will
5940 then be used in the sequel and we may be changing a two-operand insn
5941 into a three-operand insn.
5943 Also do not do this if we are operating on a copy of INSN.
5945 Also don't do this if INSN ends a libcall; this would cause an unrelated
5946 register to be set in the middle of a libcall, and we then get bad code
5947 if the libcall is deleted. */
5949 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
5950 && NEXT_INSN (PREV_INSN (insn)) == insn
5951 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
5952 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5953 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5955 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5956 struct qty_table_elem *src_ent = &qty_table[src_q];
5958 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5959 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5961 rtx prev = PREV_INSN (insn);
5962 while (prev && GET_CODE (prev) == NOTE)
5963 prev = PREV_INSN (prev);
5965 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
5966 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
5968 rtx dest = SET_DEST (sets[0].rtl);
5969 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
5971 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
5972 validate_change (insn, & SET_DEST (sets[0].rtl),
5973 SET_SRC (sets[0].rtl), 1);
5974 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
5975 apply_change_group ();
5977 /* If REG1 was equivalent to a constant, REG0 is not. */
5979 PUT_REG_NOTE_KIND (note, REG_EQUAL);
5981 /* If there was a REG_WAS_0 note on PREV, remove it. Move
5982 any REG_WAS_0 note on INSN to PREV. */
5983 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
5985 remove_note (prev, note);
5987 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5990 remove_note (insn, note);
5991 XEXP (note, 1) = REG_NOTES (prev);
5992 REG_NOTES (prev) = note;
5995 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
5996 then we must delete it, because the value in REG0 has changed. */
5997 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5998 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
5999 remove_note (insn, note);
6004 /* If this is a conditional jump insn, record any known equivalences due to
6005 the condition being tested. */
6007 last_jump_equiv_class = 0;
6008 if (GET_CODE (insn) == JUMP_INSN
6009 && n_sets == 1 && GET_CODE (x) == SET
6010 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6011 record_jump_equiv (insn, 0);
6014 /* If the previous insn set CC0 and this insn no longer references CC0,
6015 delete the previous insn. Here we use the fact that nothing expects CC0
6016 to be valid over an insn, which is true until the final pass. */
6017 if (prev_insn && GET_CODE (prev_insn) == INSN
6018 && (tem = single_set (prev_insn)) != 0
6019 && SET_DEST (tem) == cc0_rtx
6020 && ! reg_mentioned_p (cc0_rtx, x))
6022 PUT_CODE (prev_insn, NOTE);
6023 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6024 NOTE_SOURCE_FILE (prev_insn) = 0;
6027 prev_insn_cc0 = this_insn_cc0;
6028 prev_insn_cc0_mode = this_insn_cc0_mode;
6034 /* Remove from the hash table all expressions that reference memory. */
6037 invalidate_memory ()
6040 register struct table_elt *p, *next;
6042 for (i = 0; i < HASH_SIZE; i++)
6043 for (p = table[i]; p; p = next)
6045 next = p->next_same_hash;
6047 remove_from_table (p, i);
6051 /* If ADDR is an address that implicitly affects the stack pointer, return
6052 1 and update the register tables to show the effect. Else, return 0. */
6055 addr_affects_sp_p (addr)
6058 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6059 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6060 && GET_CODE (XEXP (addr, 0)) == REG
6061 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6063 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6064 REG_TICK (STACK_POINTER_REGNUM)++;
6066 /* This should be *very* rare. */
6067 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6068 invalidate (stack_pointer_rtx, VOIDmode);
6076 /* Perform invalidation on the basis of everything about an insn
6077 except for invalidating the actual places that are SET in it.
6078 This includes the places CLOBBERed, and anything that might
6079 alias with something that is SET or CLOBBERed.
6081 X is the pattern of the insn. */
6084 invalidate_from_clobbers (x)
6087 if (GET_CODE (x) == CLOBBER)
6089 rtx ref = XEXP (x, 0);
6092 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6093 || GET_CODE (ref) == MEM)
6094 invalidate (ref, VOIDmode);
6095 else if (GET_CODE (ref) == STRICT_LOW_PART
6096 || GET_CODE (ref) == ZERO_EXTRACT)
6097 invalidate (XEXP (ref, 0), GET_MODE (ref));
6100 else if (GET_CODE (x) == PARALLEL)
6103 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6105 register rtx y = XVECEXP (x, 0, i);
6106 if (GET_CODE (y) == CLOBBER)
6108 rtx ref = XEXP (y, 0);
6109 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6110 || GET_CODE (ref) == MEM)
6111 invalidate (ref, VOIDmode);
6112 else if (GET_CODE (ref) == STRICT_LOW_PART
6113 || GET_CODE (ref) == ZERO_EXTRACT)
6114 invalidate (XEXP (ref, 0), GET_MODE (ref));
6120 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6121 and replace any registers in them with either an equivalent constant
6122 or the canonical form of the register. If we are inside an address,
6123 only do this if the address remains valid.
6125 OBJECT is 0 except when within a MEM in which case it is the MEM.
6127 Return the replacement for X. */
6130 cse_process_notes (x, object)
6134 enum rtx_code code = GET_CODE (x);
6135 const char *fmt = GET_RTX_FORMAT (code);
6151 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6156 if (REG_NOTE_KIND (x) == REG_EQUAL)
6157 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6159 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6166 rtx new = cse_process_notes (XEXP (x, 0), object);
6167 /* We don't substitute VOIDmode constants into these rtx,
6168 since they would impede folding. */
6169 if (GET_MODE (new) != VOIDmode)
6170 validate_change (object, &XEXP (x, 0), new, 0);
6175 i = REG_QTY (REGNO (x));
6177 /* Return a constant or a constant register. */
6178 if (REGNO_QTY_VALID_P (REGNO (x)))
6180 struct qty_table_elem *ent = &qty_table[i];
6182 if (ent->const_rtx != NULL_RTX
6183 && (CONSTANT_P (ent->const_rtx)
6184 || GET_CODE (ent->const_rtx) == REG))
6186 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6192 /* Otherwise, canonicalize this register. */
6193 return canon_reg (x, NULL_RTX);
6199 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6201 validate_change (object, &XEXP (x, i),
6202 cse_process_notes (XEXP (x, i), object), 0);
6207 /* Find common subexpressions between the end test of a loop and the beginning
6208 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6210 Often we have a loop where an expression in the exit test is used
6211 in the body of the loop. For example "while (*p) *q++ = *p++;".
6212 Because of the way we duplicate the loop exit test in front of the loop,
6213 however, we don't detect that common subexpression. This will be caught
6214 when global cse is implemented, but this is a quite common case.
6216 This function handles the most common cases of these common expressions.
6217 It is called after we have processed the basic block ending with the
6218 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6219 jumps to a label used only once. */
6222 cse_around_loop (loop_start)
6227 struct table_elt *p;
6229 /* If the jump at the end of the loop doesn't go to the start, we don't
6231 for (insn = PREV_INSN (loop_start);
6232 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6233 insn = PREV_INSN (insn))
6237 || GET_CODE (insn) != NOTE
6238 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6241 /* If the last insn of the loop (the end test) was an NE comparison,
6242 we will interpret it as an EQ comparison, since we fell through
6243 the loop. Any equivalences resulting from that comparison are
6244 therefore not valid and must be invalidated. */
6245 if (last_jump_equiv_class)
6246 for (p = last_jump_equiv_class->first_same_value; p;
6247 p = p->next_same_value)
6249 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6250 || (GET_CODE (p->exp) == SUBREG
6251 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6252 invalidate (p->exp, VOIDmode);
6253 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6254 || GET_CODE (p->exp) == ZERO_EXTRACT)
6255 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6258 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6259 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6261 The only thing we do with SET_DEST is invalidate entries, so we
6262 can safely process each SET in order. It is slightly less efficient
6263 to do so, but we only want to handle the most common cases.
6265 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6266 These pseudos won't have valid entries in any of the tables indexed
6267 by register number, such as reg_qty. We avoid out-of-range array
6268 accesses by not processing any instructions created after cse started. */
6270 for (insn = NEXT_INSN (loop_start);
6271 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6272 && INSN_UID (insn) < max_insn_uid
6273 && ! (GET_CODE (insn) == NOTE
6274 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6275 insn = NEXT_INSN (insn))
6277 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6278 && (GET_CODE (PATTERN (insn)) == SET
6279 || GET_CODE (PATTERN (insn)) == CLOBBER))
6280 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6281 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6282 && GET_CODE (PATTERN (insn)) == PARALLEL)
6283 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6284 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6285 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6286 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6291 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6292 since they are done elsewhere. This function is called via note_stores. */
6295 invalidate_skipped_set (dest, set, data)
6298 void *data ATTRIBUTE_UNUSED;
6300 enum rtx_code code = GET_CODE (dest);
6303 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6304 /* There are times when an address can appear varying and be a PLUS
6305 during this scan when it would be a fixed address were we to know
6306 the proper equivalences. So invalidate all memory if there is
6307 a BLKmode or nonscalar memory reference or a reference to a
6308 variable address. */
6309 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6310 || cse_rtx_varies_p (XEXP (dest, 0))))
6312 invalidate_memory ();
6316 if (GET_CODE (set) == CLOBBER
6323 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6324 invalidate (XEXP (dest, 0), GET_MODE (dest));
6325 else if (code == REG || code == SUBREG || code == MEM)
6326 invalidate (dest, VOIDmode);
6329 /* Invalidate all insns from START up to the end of the function or the
6330 next label. This called when we wish to CSE around a block that is
6331 conditionally executed. */
6334 invalidate_skipped_block (start)
6339 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6340 insn = NEXT_INSN (insn))
6342 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6345 if (GET_CODE (insn) == CALL_INSN)
6347 if (! CONST_CALL_P (insn))
6348 invalidate_memory ();
6349 invalidate_for_call ();
6352 invalidate_from_clobbers (PATTERN (insn));
6353 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6357 /* If modifying X will modify the value in *DATA (which is really an
6358 `rtx *'), indicate that fact by setting the pointed to value to
6362 cse_check_loop_start (x, set, data)
6364 rtx set ATTRIBUTE_UNUSED;
6367 rtx *cse_check_loop_start_value = (rtx *) data;
6369 if (*cse_check_loop_start_value == NULL_RTX
6370 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6373 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6374 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6375 *cse_check_loop_start_value = NULL_RTX;
6378 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6379 a loop that starts with the label at LOOP_START.
6381 If X is a SET, we see if its SET_SRC is currently in our hash table.
6382 If so, we see if it has a value equal to some register used only in the
6383 loop exit code (as marked by jump.c).
6385 If those two conditions are true, we search backwards from the start of
6386 the loop to see if that same value was loaded into a register that still
6387 retains its value at the start of the loop.
6389 If so, we insert an insn after the load to copy the destination of that
6390 load into the equivalent register and (try to) replace our SET_SRC with that
6393 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6396 cse_set_around_loop (x, insn, loop_start)
6401 struct table_elt *src_elt;
6403 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6404 are setting PC or CC0 or whose SET_SRC is already a register. */
6405 if (GET_CODE (x) == SET
6406 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6407 && GET_CODE (SET_SRC (x)) != REG)
6409 src_elt = lookup (SET_SRC (x),
6410 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6411 GET_MODE (SET_DEST (x)));
6414 for (src_elt = src_elt->first_same_value; src_elt;
6415 src_elt = src_elt->next_same_value)
6416 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6417 && COST (src_elt->exp) < COST (SET_SRC (x)))
6421 /* Look for an insn in front of LOOP_START that sets
6422 something in the desired mode to SET_SRC (x) before we hit
6423 a label or CALL_INSN. */
6425 for (p = prev_nonnote_insn (loop_start);
6426 p && GET_CODE (p) != CALL_INSN
6427 && GET_CODE (p) != CODE_LABEL;
6428 p = prev_nonnote_insn (p))
6429 if ((set = single_set (p)) != 0
6430 && GET_CODE (SET_DEST (set)) == REG
6431 && GET_MODE (SET_DEST (set)) == src_elt->mode
6432 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6434 /* We now have to ensure that nothing between P
6435 and LOOP_START modified anything referenced in
6436 SET_SRC (x). We know that nothing within the loop
6437 can modify it, or we would have invalidated it in
6440 rtx cse_check_loop_start_value = SET_SRC (x);
6441 for (q = p; q != loop_start; q = NEXT_INSN (q))
6442 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6443 note_stores (PATTERN (q),
6444 cse_check_loop_start,
6445 &cse_check_loop_start_value);
6447 /* If nothing was changed and we can replace our
6448 SET_SRC, add an insn after P to copy its destination
6449 to what we will be replacing SET_SRC with. */
6450 if (cse_check_loop_start_value
6451 && validate_change (insn, &SET_SRC (x),
6454 /* If this creates new pseudos, this is unsafe,
6455 because the regno of new pseudo is unsuitable
6456 to index into reg_qty when cse_insn processes
6457 the new insn. Therefore, if a new pseudo was
6458 created, discard this optimization. */
6459 int nregs = max_reg_num ();
6461 = gen_move_insn (src_elt->exp, SET_DEST (set));
6462 if (nregs != max_reg_num ())
6464 if (! validate_change (insn, &SET_SRC (x),
6469 emit_insn_after (move, p);
6476 /* Deal with the destination of X affecting the stack pointer. */
6477 addr_affects_sp_p (SET_DEST (x));
6479 /* See comment on similar code in cse_insn for explanation of these
6481 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6482 || GET_CODE (SET_DEST (x)) == MEM)
6483 invalidate (SET_DEST (x), VOIDmode);
6484 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6485 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6486 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6489 /* Find the end of INSN's basic block and return its range,
6490 the total number of SETs in all the insns of the block, the last insn of the
6491 block, and the branch path.
6493 The branch path indicates which branches should be followed. If a non-zero
6494 path size is specified, the block should be rescanned and a different set
6495 of branches will be taken. The branch path is only used if
6496 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6498 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6499 used to describe the block. It is filled in with the information about
6500 the current block. The incoming structure's branch path, if any, is used
6501 to construct the output branch path. */
6504 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6506 struct cse_basic_block_data *data;
6513 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6514 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6515 int path_size = data->path_size;
6519 /* Update the previous branch path, if any. If the last branch was
6520 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6521 shorten the path by one and look at the previous branch. We know that
6522 at least one branch must have been taken if PATH_SIZE is non-zero. */
6523 while (path_size > 0)
6525 if (data->path[path_size - 1].status != NOT_TAKEN)
6527 data->path[path_size - 1].status = NOT_TAKEN;
6534 /* If the first instruction is marked with QImode, that means we've
6535 already processed this block. Our caller will look at DATA->LAST
6536 to figure out where to go next. We want to return the next block
6537 in the instruction stream, not some branched-to block somewhere
6538 else. We accomplish this by pretending our called forbid us to
6539 follow jumps, or skip blocks. */
6540 if (GET_MODE (insn) == QImode)
6541 follow_jumps = skip_blocks = 0;
6543 /* Scan to end of this basic block. */
6544 while (p && GET_CODE (p) != CODE_LABEL)
6546 /* Don't cse out the end of a loop. This makes a difference
6547 only for the unusual loops that always execute at least once;
6548 all other loops have labels there so we will stop in any case.
6549 Cse'ing out the end of the loop is dangerous because it
6550 might cause an invariant expression inside the loop
6551 to be reused after the end of the loop. This would make it
6552 hard to move the expression out of the loop in loop.c,
6553 especially if it is one of several equivalent expressions
6554 and loop.c would like to eliminate it.
6556 If we are running after loop.c has finished, we can ignore
6557 the NOTE_INSN_LOOP_END. */
6559 if (! after_loop && GET_CODE (p) == NOTE
6560 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6563 /* Don't cse over a call to setjmp; on some machines (eg vax)
6564 the regs restored by the longjmp come from
6565 a later time than the setjmp. */
6566 if (GET_CODE (p) == NOTE
6567 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6570 /* A PARALLEL can have lots of SETs in it,
6571 especially if it is really an ASM_OPERANDS. */
6572 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6573 && GET_CODE (PATTERN (p)) == PARALLEL)
6574 nsets += XVECLEN (PATTERN (p), 0);
6575 else if (GET_CODE (p) != NOTE)
6578 /* Ignore insns made by CSE; they cannot affect the boundaries of
6581 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6582 high_cuid = INSN_CUID (p);
6583 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6584 low_cuid = INSN_CUID (p);
6586 /* See if this insn is in our branch path. If it is and we are to
6588 if (path_entry < path_size && data->path[path_entry].branch == p)
6590 if (data->path[path_entry].status != NOT_TAKEN)
6593 /* Point to next entry in path, if any. */
6597 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6598 was specified, we haven't reached our maximum path length, there are
6599 insns following the target of the jump, this is the only use of the
6600 jump label, and the target label is preceded by a BARRIER.
6602 Alternatively, we can follow the jump if it branches around a
6603 block of code and there are no other branches into the block.
6604 In this case invalidate_skipped_block will be called to invalidate any
6605 registers set in the block when following the jump. */
6607 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6608 && GET_CODE (p) == JUMP_INSN
6609 && GET_CODE (PATTERN (p)) == SET
6610 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6611 && JUMP_LABEL (p) != 0
6612 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6613 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6615 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6616 if ((GET_CODE (q) != NOTE
6617 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6618 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6619 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6622 /* If we ran into a BARRIER, this code is an extension of the
6623 basic block when the branch is taken. */
6624 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6626 /* Don't allow ourself to keep walking around an
6627 always-executed loop. */
6628 if (next_real_insn (q) == next)
6634 /* Similarly, don't put a branch in our path more than once. */
6635 for (i = 0; i < path_entry; i++)
6636 if (data->path[i].branch == p)
6639 if (i != path_entry)
6642 data->path[path_entry].branch = p;
6643 data->path[path_entry++].status = TAKEN;
6645 /* This branch now ends our path. It was possible that we
6646 didn't see this branch the last time around (when the
6647 insn in front of the target was a JUMP_INSN that was
6648 turned into a no-op). */
6649 path_size = path_entry;
6652 /* Mark block so we won't scan it again later. */
6653 PUT_MODE (NEXT_INSN (p), QImode);
6655 /* Detect a branch around a block of code. */
6656 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6660 if (next_real_insn (q) == next)
6666 for (i = 0; i < path_entry; i++)
6667 if (data->path[i].branch == p)
6670 if (i != path_entry)
6673 /* This is no_labels_between_p (p, q) with an added check for
6674 reaching the end of a function (in case Q precedes P). */
6675 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6676 if (GET_CODE (tmp) == CODE_LABEL)
6681 data->path[path_entry].branch = p;
6682 data->path[path_entry++].status = AROUND;
6684 path_size = path_entry;
6687 /* Mark block so we won't scan it again later. */
6688 PUT_MODE (NEXT_INSN (p), QImode);
6695 data->low_cuid = low_cuid;
6696 data->high_cuid = high_cuid;
6697 data->nsets = nsets;
6700 /* If all jumps in the path are not taken, set our path length to zero
6701 so a rescan won't be done. */
6702 for (i = path_size - 1; i >= 0; i--)
6703 if (data->path[i].status != NOT_TAKEN)
6707 data->path_size = 0;
6709 data->path_size = path_size;
6711 /* End the current branch path. */
6712 data->path[path_size].branch = 0;
6715 /* Perform cse on the instructions of a function.
6716 F is the first instruction.
6717 NREGS is one plus the highest pseudo-reg number used in the instruction.
6719 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6720 (only if -frerun-cse-after-loop).
6722 Returns 1 if jump_optimize should be redone due to simplifications
6723 in conditional jump instructions. */
6726 cse_main (f, nregs, after_loop, file)
6732 struct cse_basic_block_data val;
6733 register rtx insn = f;
6736 cse_jumps_altered = 0;
6737 recorded_label_ref = 0;
6738 constant_pool_entries_cost = 0;
6742 init_alias_analysis ();
6746 max_insn_uid = get_max_uid ();
6748 reg_eqv_table = (struct reg_eqv_elem *)
6749 xmalloc (nregs * sizeof (struct reg_eqv_elem));
6751 #ifdef LOAD_EXTEND_OP
6753 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6754 and change the code and mode as appropriate. */
6755 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6758 /* Discard all the free elements of the previous function
6759 since they are allocated in the temporarily obstack. */
6760 bzero ((char *) table, sizeof table);
6761 free_element_chain = 0;
6762 n_elements_made = 0;
6764 /* Find the largest uid. */
6766 max_uid = get_max_uid ();
6767 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6769 /* Compute the mapping from uids to cuids.
6770 CUIDs are numbers assigned to insns, like uids,
6771 except that cuids increase monotonically through the code.
6772 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6773 between two insns is not affected by -g. */
6775 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6777 if (GET_CODE (insn) != NOTE
6778 || NOTE_LINE_NUMBER (insn) < 0)
6779 INSN_CUID (insn) = ++i;
6781 /* Give a line number note the same cuid as preceding insn. */
6782 INSN_CUID (insn) = i;
6785 /* Initialize which registers are clobbered by calls. */
6787 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6789 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6790 if ((call_used_regs[i]
6791 /* Used to check !fixed_regs[i] here, but that isn't safe;
6792 fixed regs are still call-clobbered, and sched can get
6793 confused if they can "live across calls".
6795 The frame pointer is always preserved across calls. The arg
6796 pointer is if it is fixed. The stack pointer usually is, unless
6797 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6798 will be present. If we are generating PIC code, the PIC offset
6799 table register is preserved across calls. */
6801 && i != STACK_POINTER_REGNUM
6802 && i != FRAME_POINTER_REGNUM
6803 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6804 && i != HARD_FRAME_POINTER_REGNUM
6806 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6807 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6809 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6810 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6814 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6817 ggc_push_context ();
6819 /* Loop over basic blocks.
6820 Compute the maximum number of qty's needed for each basic block
6821 (which is 2 for each SET). */
6826 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6827 flag_cse_skip_blocks);
6829 /* If this basic block was already processed or has no sets, skip it. */
6830 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6832 PUT_MODE (insn, VOIDmode);
6833 insn = (val.last ? NEXT_INSN (val.last) : 0);
6838 cse_basic_block_start = val.low_cuid;
6839 cse_basic_block_end = val.high_cuid;
6840 max_qty = val.nsets * 2;
6843 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6844 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6847 /* Make MAX_QTY bigger to give us room to optimize
6848 past the end of this basic block, if that should prove useful. */
6854 /* If this basic block is being extended by following certain jumps,
6855 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6856 Otherwise, we start after this basic block. */
6857 if (val.path_size > 0)
6858 cse_basic_block (insn, val.last, val.path, 0);
6861 int old_cse_jumps_altered = cse_jumps_altered;
6864 /* When cse changes a conditional jump to an unconditional
6865 jump, we want to reprocess the block, since it will give
6866 us a new branch path to investigate. */
6867 cse_jumps_altered = 0;
6868 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6869 if (cse_jumps_altered == 0
6870 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6873 cse_jumps_altered |= old_cse_jumps_altered;
6876 if (ggc_p && cse_altered)
6887 if (max_elements_made < n_elements_made)
6888 max_elements_made = n_elements_made;
6891 end_alias_analysis ();
6893 free (reg_eqv_table);
6895 return cse_jumps_altered || recorded_label_ref;
6898 /* Process a single basic block. FROM and TO and the limits of the basic
6899 block. NEXT_BRANCH points to the branch path when following jumps or
6900 a null path when not following jumps.
6902 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
6903 loop. This is true when we are being called for the last time on a
6904 block and this CSE pass is before loop.c. */
6907 cse_basic_block (from, to, next_branch, around_loop)
6908 register rtx from, to;
6909 struct branch_path *next_branch;
6914 rtx libcall_insn = NULL_RTX;
6917 /* This array is undefined before max_reg, so only allocate
6918 the space actually needed and adjust the start. */
6921 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
6922 * sizeof (struct qty_table_elem));
6923 qty_table -= max_reg;
6927 /* TO might be a label. If so, protect it from being deleted. */
6928 if (to != 0 && GET_CODE (to) == CODE_LABEL)
6931 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6933 register enum rtx_code code = GET_CODE (insn);
6935 /* If we have processed 1,000 insns, flush the hash table to
6936 avoid extreme quadratic behavior. We must not include NOTEs
6937 in the count since there may be more of them when generating
6938 debugging information. If we clear the table at different
6939 times, code generated with -g -O might be different than code
6940 generated with -O but not -g.
6942 ??? This is a real kludge and needs to be done some other way.
6944 if (code != NOTE && num_insns++ > 1000)
6946 flush_hash_table ();
6950 /* See if this is a branch that is part of the path. If so, and it is
6951 to be taken, do so. */
6952 if (next_branch->branch == insn)
6954 enum taken status = next_branch++->status;
6955 if (status != NOT_TAKEN)
6957 if (status == TAKEN)
6958 record_jump_equiv (insn, 1);
6960 invalidate_skipped_block (NEXT_INSN (insn));
6962 /* Set the last insn as the jump insn; it doesn't affect cc0.
6963 Then follow this branch. */
6968 insn = JUMP_LABEL (insn);
6973 if (GET_MODE (insn) == QImode)
6974 PUT_MODE (insn, VOIDmode);
6976 if (GET_RTX_CLASS (code) == 'i')
6980 /* Process notes first so we have all notes in canonical forms when
6981 looking for duplicate operations. */
6983 if (REG_NOTES (insn))
6984 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
6986 /* Track when we are inside in LIBCALL block. Inside such a block,
6987 we do not want to record destinations. The last insn of a
6988 LIBCALL block is not considered to be part of the block, since
6989 its destination is the result of the block and hence should be
6992 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6993 libcall_insn = XEXP (p, 0);
6994 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6995 libcall_insn = NULL_RTX;
6997 cse_insn (insn, libcall_insn);
7000 /* If INSN is now an unconditional jump, skip to the end of our
7001 basic block by pretending that we just did the last insn in the
7002 basic block. If we are jumping to the end of our block, show
7003 that we can have one usage of TO. */
7005 if (simplejump_p (insn))
7009 free (qty_table + max_reg);
7013 if (JUMP_LABEL (insn) == to)
7016 /* Maybe TO was deleted because the jump is unconditional.
7017 If so, there is nothing left in this basic block. */
7018 /* ??? Perhaps it would be smarter to set TO
7019 to whatever follows this insn,
7020 and pretend the basic block had always ended here. */
7021 if (INSN_DELETED_P (to))
7024 insn = PREV_INSN (to);
7027 /* See if it is ok to keep on going past the label
7028 which used to end our basic block. Remember that we incremented
7029 the count of that label, so we decrement it here. If we made
7030 a jump unconditional, TO_USAGE will be one; in that case, we don't
7031 want to count the use in that jump. */
7033 if (to != 0 && NEXT_INSN (insn) == to
7034 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7036 struct cse_basic_block_data val;
7039 insn = NEXT_INSN (to);
7041 /* If TO was the last insn in the function, we are done. */
7044 free (qty_table + max_reg);
7048 /* If TO was preceded by a BARRIER we are done with this block
7049 because it has no continuation. */
7050 prev = prev_nonnote_insn (to);
7051 if (prev && GET_CODE (prev) == BARRIER)
7053 free (qty_table + max_reg);
7057 /* Find the end of the following block. Note that we won't be
7058 following branches in this case. */
7061 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7063 /* If the tables we allocated have enough space left
7064 to handle all the SETs in the next basic block,
7065 continue through it. Otherwise, return,
7066 and that block will be scanned individually. */
7067 if (val.nsets * 2 + next_qty > max_qty)
7070 cse_basic_block_start = val.low_cuid;
7071 cse_basic_block_end = val.high_cuid;
7074 /* Prevent TO from being deleted if it is a label. */
7075 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7078 /* Back up so we process the first insn in the extension. */
7079 insn = PREV_INSN (insn);
7083 if (next_qty > max_qty)
7086 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7087 the previous insn is the only insn that branches to the head of a loop,
7088 we can cse into the loop. Don't do this if we changed the jump
7089 structure of a loop unless we aren't going to be following jumps. */
7091 if ((cse_jumps_altered == 0
7092 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7093 && around_loop && to != 0
7094 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7095 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7096 && JUMP_LABEL (PREV_INSN (to)) != 0
7097 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7098 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7100 free (qty_table + max_reg);
7102 return to ? NEXT_INSN (to) : 0;
7105 /* Count the number of times registers are used (not set) in X.
7106 COUNTS is an array in which we accumulate the count, INCR is how much
7107 we count each register usage.
7109 Don't count a usage of DEST, which is the SET_DEST of a SET which
7110 contains X in its SET_SRC. This is because such a SET does not
7111 modify the liveness of DEST. */
7114 count_reg_usage (x, counts, dest, incr)
7127 switch (code = GET_CODE (x))
7131 counts[REGNO (x)] += incr;
7144 /* If we are clobbering a MEM, mark any registers inside the address
7146 if (GET_CODE (XEXP (x, 0)) == MEM)
7147 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7151 /* Unless we are setting a REG, count everything in SET_DEST. */
7152 if (GET_CODE (SET_DEST (x)) != REG)
7153 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7155 /* If SRC has side-effects, then we can't delete this insn, so the
7156 usage of SET_DEST inside SRC counts.
7158 ??? Strictly-speaking, we might be preserving this insn
7159 because some other SET has side-effects, but that's hard
7160 to do and can't happen now. */
7161 count_reg_usage (SET_SRC (x), counts,
7162 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7167 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7169 /* ... falls through ... */
7172 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7174 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7177 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7182 if (REG_NOTE_KIND (x) == REG_EQUAL
7183 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7184 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7185 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7192 fmt = GET_RTX_FORMAT (code);
7193 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7196 count_reg_usage (XEXP (x, i), counts, dest, incr);
7197 else if (fmt[i] == 'E')
7198 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7199 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7203 /* Scan all the insns and delete any that are dead; i.e., they store a register
7204 that is never used or they copy a register to itself.
7206 This is used to remove insns made obviously dead by cse, loop or other
7207 optimizations. It improves the heuristics in loop since it won't try to
7208 move dead invariants out of loops or make givs for dead quantities. The
7209 remaining passes of the compilation are also sped up. */
7212 delete_trivially_dead_insns (insns, nreg)
7222 int in_libcall = 0, dead_libcall = 0;
7224 /* First count the number of times each register is used. */
7225 counts = (int *) xcalloc (nreg, sizeof (int));
7226 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7227 count_reg_usage (insn, counts, NULL_RTX, 1);
7229 /* Go from the last insn to the first and delete insns that only set unused
7230 registers or copy a register to itself. As we delete an insn, remove
7231 usage counts for registers it uses.
7233 The first jump optimization pass may leave a real insn as the last
7234 insn in the function. We must not skip that insn or we may end
7235 up deleting code that is not really dead. */
7236 insn = get_last_insn ();
7237 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7238 insn = prev_real_insn (insn);
7240 for ( ; insn; insn = prev)
7245 prev = prev_real_insn (insn);
7247 /* Don't delete any insns that are part of a libcall block unless
7248 we can delete the whole libcall block.
7250 Flow or loop might get confused if we did that. Remember
7251 that we are scanning backwards. */
7252 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7258 /* See if there's a REG_EQUAL note on this insn and try to
7259 replace the source with the REG_EQUAL expression.
7261 We assume that insns with REG_RETVALs can only be reg->reg
7262 copies at this point. */
7263 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7266 rtx set = single_set (insn);
7267 rtx new = simplify_rtx (XEXP (note, 0));
7270 new = XEXP (note, 0);
7272 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7275 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7280 else if (in_libcall)
7281 live_insn = ! dead_libcall;
7282 else if (GET_CODE (PATTERN (insn)) == SET)
7284 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7285 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7286 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7287 SET_SRC (PATTERN (insn))))
7289 else if (GET_CODE (SET_DEST (PATTERN (insn))) == STRICT_LOW_PART
7290 && rtx_equal_p (XEXP (SET_DEST (PATTERN (insn)), 0),
7291 SET_SRC (PATTERN (insn))))
7295 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7296 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7297 && ((tem = next_nonnote_insn (insn)) == 0
7298 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7299 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7302 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7303 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7304 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7305 || side_effects_p (SET_SRC (PATTERN (insn)))
7306 /* An ADDRESSOF expression can turn into a use of the
7307 internal arg pointer, so always consider the
7308 internal arg pointer live. If it is truly dead,
7309 flow will delete the initializing insn. */
7310 || (SET_DEST (PATTERN (insn))
7311 == current_function_internal_arg_pointer))
7314 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7315 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7317 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7319 if (GET_CODE (elt) == SET)
7321 if ((GET_CODE (SET_DEST (elt)) == REG
7322 || GET_CODE (SET_DEST (elt)) == SUBREG)
7323 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7327 else if (GET_CODE (SET_DEST (elt)) == CC0
7328 && ! side_effects_p (SET_SRC (elt))
7329 && ((tem = next_nonnote_insn (insn)) == 0
7330 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7331 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7334 else if (GET_CODE (SET_DEST (elt)) != REG
7335 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7336 || counts[REGNO (SET_DEST (elt))] != 0
7337 || side_effects_p (SET_SRC (elt))
7338 /* An ADDRESSOF expression can turn into a use of the
7339 internal arg pointer, so always consider the
7340 internal arg pointer live. If it is truly dead,
7341 flow will delete the initializing insn. */
7343 == current_function_internal_arg_pointer))
7346 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7352 /* If this is a dead insn, delete it and show registers in it aren't
7357 count_reg_usage (insn, counts, NULL_RTX, -1);
7361 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))