1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Must precede rtl.h for FFS. */
27 #include "hard-reg-set.h"
30 #include "insn-config.h"
35 /* The basic idea of common subexpression elimination is to go
36 through the code, keeping a record of expressions that would
37 have the same value at the current scan point, and replacing
38 expressions encountered with the cheapest equivalent expression.
40 It is too complicated to keep track of the different possibilities
41 when control paths merge; so, at each label, we forget all that is
42 known and start fresh. This can be described as processing each
43 basic block separately. Note, however, that these are not quite
44 the same as the basic blocks found by a later pass and used for
45 data flow analysis and register packing. We do not need to start fresh
46 after a conditional jump instruction if there is no label there.
48 We use two data structures to record the equivalent expressions:
49 a hash table for most expressions, and several vectors together
50 with "quantity numbers" to record equivalent (pseudo) registers.
52 The use of the special data structure for registers is desirable
53 because it is faster. It is possible because registers references
54 contain a fairly small number, the register number, taken from
55 a contiguously allocated series, and two register references are
56 identical if they have the same number. General expressions
57 do not have any such thing, so the only way to retrieve the
58 information recorded on an expression other than a register
59 is to keep it in a hash table.
61 Registers and "quantity numbers":
63 At the start of each basic block, all of the (hardware and pseudo)
64 registers used in the function are given distinct quantity
65 numbers to indicate their contents. During scan, when the code
66 copies one register into another, we copy the quantity number.
67 When a register is loaded in any other way, we allocate a new
68 quantity number to describe the value generated by this operation.
69 `reg_qty' records what quantity a register is currently thought
72 All real quantity numbers are greater than or equal to `max_reg'.
73 If register N has not been assigned a quantity, reg_qty[N] will equal N.
75 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
76 variables should be referenced with an index below `max_reg'.
78 We also maintain a bidirectional chain of registers for each
79 quantity number. `qty_first_reg', `qty_last_reg',
80 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
82 The first register in a chain is the one whose lifespan is least local.
83 Among equals, it is the one that was seen first.
84 We replace any equivalent register with that one.
86 If two registers have the same quantity number, it must be true that
87 REG expressions with `qty_mode' must be in the hash table for both
88 registers and must be in the same class.
90 The converse is not true. Since hard registers may be referenced in
91 any mode, two REG expressions might be equivalent in the hash table
92 but not have the same quantity number if the quantity number of one
93 of the registers is not the same mode as those expressions.
95 Constants and quantity numbers
97 When a quantity has a known constant value, that value is stored
98 in the appropriate element of qty_const. This is in addition to
99 putting the constant in the hash table as is usual for non-regs.
101 Whether a reg or a constant is preferred is determined by the configuration
102 macro CONST_COSTS and will often depend on the constant value. In any
103 event, expressions containing constants can be simplified, by fold_rtx.
105 When a quantity has a known nearly constant value (such as an address
106 of a stack slot), that value is stored in the appropriate element
109 Integer constants don't have a machine mode. However, cse
110 determines the intended machine mode from the destination
111 of the instruction that moves the constant. The machine mode
112 is recorded in the hash table along with the actual RTL
113 constant expression so that different modes are kept separate.
117 To record known equivalences among expressions in general
118 we use a hash table called `table'. It has a fixed number of buckets
119 that contain chains of `struct table_elt' elements for expressions.
120 These chains connect the elements whose expressions have the same
123 Other chains through the same elements connect the elements which
124 currently have equivalent values.
126 Register references in an expression are canonicalized before hashing
127 the expression. This is done using `reg_qty' and `qty_first_reg'.
128 The hash code of a register reference is computed using the quantity
129 number, not the register number.
131 When the value of an expression changes, it is necessary to remove from the
132 hash table not just that expression but all expressions whose values
133 could be different as a result.
135 1. If the value changing is in memory, except in special cases
136 ANYTHING referring to memory could be changed. That is because
137 nobody knows where a pointer does not point.
138 The function `invalidate_memory' removes what is necessary.
140 The special cases are when the address is constant or is
141 a constant plus a fixed register such as the frame pointer
142 or a static chain pointer. When such addresses are stored in,
143 we can tell exactly which other such addresses must be invalidated
144 due to overlap. `invalidate' does this.
145 All expressions that refer to non-constant
146 memory addresses are also invalidated. `invalidate_memory' does this.
148 2. If the value changing is a register, all expressions
149 containing references to that register, and only those,
152 Because searching the entire hash table for expressions that contain
153 a register is very slow, we try to figure out when it isn't necessary.
154 Precisely, this is necessary only when expressions have been
155 entered in the hash table using this register, and then the value has
156 changed, and then another expression wants to be added to refer to
157 the register's new value. This sequence of circumstances is rare
158 within any one basic block.
160 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
161 reg_tick[i] is incremented whenever a value is stored in register i.
162 reg_in_table[i] holds -1 if no references to register i have been
163 entered in the table; otherwise, it contains the value reg_tick[i] had
164 when the references were entered. If we want to enter a reference
165 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
166 Until we want to enter a new entry, the mere fact that the two vectors
167 don't match makes the entries be ignored if anyone tries to match them.
169 Registers themselves are entered in the hash table as well as in
170 the equivalent-register chains. However, the vectors `reg_tick'
171 and `reg_in_table' do not apply to expressions which are simple
172 register references. These expressions are removed from the table
173 immediately when they become invalid, and this can be done even if
174 we do not immediately search for all the expressions that refer to
177 A CLOBBER rtx in an instruction invalidates its operand for further
178 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
179 invalidates everything that resides in memory.
183 Constant expressions that differ only by an additive integer
184 are called related. When a constant expression is put in
185 the table, the related expression with no constant term
186 is also entered. These are made to point at each other
187 so that it is possible to find out if there exists any
188 register equivalent to an expression related to a given expression. */
190 /* One plus largest register number used in this function. */
194 /* Length of vectors indexed by quantity number.
195 We know in advance we will not need a quantity number this big. */
199 /* Next quantity number to be allocated.
200 This is 1 + the largest number needed so far. */
204 /* Indexed by quantity number, gives the first (or last) (pseudo) register
205 in the chain of registers that currently contain this quantity. */
207 static int *qty_first_reg;
208 static int *qty_last_reg;
210 /* Index by quantity number, gives the mode of the quantity. */
212 static enum machine_mode *qty_mode;
214 /* Indexed by quantity number, gives the rtx of the constant value of the
215 quantity, or zero if it does not have a known value.
216 A sum of the frame pointer (or arg pointer) plus a constant
217 can also be entered here. */
219 static rtx *qty_const;
221 /* Indexed by qty number, gives the insn that stored the constant value
222 recorded in `qty_const'. */
224 static rtx *qty_const_insn;
226 /* The next three variables are used to track when a comparison between a
227 quantity and some constant or register has been passed. In that case, we
228 know the results of the comparison in case we see it again. These variables
229 record a comparison that is known to be true. */
231 /* Indexed by qty number, gives the rtx code of a comparison with a known
232 result involving this quantity. If none, it is UNKNOWN. */
233 static enum rtx_code *qty_comparison_code;
235 /* Indexed by qty number, gives the constant being compared against in a
236 comparison of known result. If no such comparison, it is undefined.
237 If the comparison is not with a constant, it is zero. */
239 static rtx *qty_comparison_const;
241 /* Indexed by qty number, gives the quantity being compared against in a
242 comparison of known result. If no such comparison, if it undefined.
243 If the comparison is not with a register, it is -1. */
245 static int *qty_comparison_qty;
248 /* For machines that have a CC0, we do not record its value in the hash
249 table since its use is guaranteed to be the insn immediately following
250 its definition and any other insn is presumed to invalidate it.
252 Instead, we store below the value last assigned to CC0. If it should
253 happen to be a constant, it is stored in preference to the actual
254 assigned value. In case it is a constant, we store the mode in which
255 the constant should be interpreted. */
257 static rtx prev_insn_cc0;
258 static enum machine_mode prev_insn_cc0_mode;
261 /* Previous actual insn. 0 if at first insn of basic block. */
263 static rtx prev_insn;
265 /* Insn being scanned. */
267 static rtx this_insn;
269 /* Index by (pseudo) register number, gives the quantity number
270 of the register's current contents. */
274 /* Index by (pseudo) register number, gives the number of the next (or
275 previous) (pseudo) register in the chain of registers sharing the same
278 Or -1 if this register is at the end of the chain.
280 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
282 static int *reg_next_eqv;
283 static int *reg_prev_eqv;
285 /* Index by (pseudo) register number, gives the number of times
286 that register has been altered in the current basic block. */
288 static int *reg_tick;
290 /* Index by (pseudo) register number, gives the reg_tick value at which
291 rtx's containing this register are valid in the hash table.
292 If this does not equal the current reg_tick value, such expressions
293 existing in the hash table are invalid.
294 If this is -1, no expressions containing this register have been
295 entered in the table. */
297 static int *reg_in_table;
299 /* A HARD_REG_SET containing all the hard registers for which there is
300 currently a REG expression in the hash table. Note the difference
301 from the above variables, which indicate if the REG is mentioned in some
302 expression in the table. */
304 static HARD_REG_SET hard_regs_in_table;
306 /* A HARD_REG_SET containing all the hard registers that are invalidated
309 static HARD_REG_SET regs_invalidated_by_call;
311 /* Two vectors of ints:
312 one containing max_reg -1's; the other max_reg + 500 (an approximation
313 for max_qty) elements where element i contains i.
314 These are used to initialize various other vectors fast. */
316 static int *all_minus_one;
317 static int *consec_ints;
319 /* CUID of insn that starts the basic block currently being cse-processed. */
321 static int cse_basic_block_start;
323 /* CUID of insn that ends the basic block currently being cse-processed. */
325 static int cse_basic_block_end;
327 /* Vector mapping INSN_UIDs to cuids.
328 The cuids are like uids but increase monotonically always.
329 We use them to see whether a reg is used outside a given basic block. */
331 static int *uid_cuid;
333 /* Highest UID in UID_CUID. */
336 /* Get the cuid of an insn. */
338 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
340 /* Nonzero if cse has altered conditional jump insns
341 in such a way that jump optimization should be redone. */
343 static int cse_jumps_altered;
345 /* canon_hash stores 1 in do_not_record
346 if it notices a reference to CC0, PC, or some other volatile
349 static int do_not_record;
351 /* canon_hash stores 1 in hash_arg_in_memory
352 if it notices a reference to memory within the expression being hashed. */
354 static int hash_arg_in_memory;
356 /* canon_hash stores 1 in hash_arg_in_struct
357 if it notices a reference to memory that's part of a structure. */
359 static int hash_arg_in_struct;
361 /* The hash table contains buckets which are chains of `struct table_elt's,
362 each recording one expression's information.
363 That expression is in the `exp' field.
365 Those elements with the same hash code are chained in both directions
366 through the `next_same_hash' and `prev_same_hash' fields.
368 Each set of expressions with equivalent values
369 are on a two-way chain through the `next_same_value'
370 and `prev_same_value' fields, and all point with
371 the `first_same_value' field at the first element in
372 that chain. The chain is in order of increasing cost.
373 Each element's cost value is in its `cost' field.
375 The `in_memory' field is nonzero for elements that
376 involve any reference to memory. These elements are removed
377 whenever a write is done to an unidentified location in memory.
378 To be safe, we assume that a memory address is unidentified unless
379 the address is either a symbol constant or a constant plus
380 the frame pointer or argument pointer.
382 The `in_struct' field is nonzero for elements that
383 involve any reference to memory inside a structure or array.
385 The `related_value' field is used to connect related expressions
386 (that differ by adding an integer).
387 The related expressions are chained in a circular fashion.
388 `related_value' is zero for expressions for which this
391 The `cost' field stores the cost of this element's expression.
393 The `is_const' flag is set if the element is a constant (including
396 The `flag' field is used as a temporary during some search routines.
398 The `mode' field is usually the same as GET_MODE (`exp'), but
399 if `exp' is a CONST_INT and has no machine mode then the `mode'
400 field is the mode it was being used as. Each constant is
401 recorded separately for each mode it is used with. */
407 struct table_elt *next_same_hash;
408 struct table_elt *prev_same_hash;
409 struct table_elt *next_same_value;
410 struct table_elt *prev_same_value;
411 struct table_elt *first_same_value;
412 struct table_elt *related_value;
414 enum machine_mode mode;
423 /* We don't want a lot of buckets, because we rarely have very many
424 things stored in the hash table, and a lot of buckets slows
425 down a lot of loops that happen frequently. */
428 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
429 register (hard registers may require `do_not_record' to be set). */
432 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
433 ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
434 : canon_hash (X, M) % NBUCKETS)
436 /* Determine whether register number N is considered a fixed register for CSE.
437 It is desirable to replace other regs with fixed regs, to reduce need for
439 A reg wins if it is either the frame pointer or designated as fixed,
440 but not if it is an overlapping register. */
441 #ifdef OVERLAPPING_REGNO_P
442 #define FIXED_REGNO_P(N) \
443 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
445 && ! OVERLAPPING_REGNO_P ((N)))
447 #define FIXED_REGNO_P(N) \
448 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
452 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
453 hard registers and pointers into the frame are the cheapest with a cost
454 of 0. Next come pseudos with a cost of one and other hard registers with
455 a cost of 2. Aside from these special cases, call `rtx_cost'. */
457 #define CHEAP_REG(N) \
458 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
459 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
460 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
461 || ((N) < FIRST_PSEUDO_REGISTER \
462 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
465 (GET_CODE (X) == REG \
466 ? (CHEAP_REG (REGNO (X)) ? 0 \
467 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
469 : rtx_cost (X, SET) * 2)
471 /* Determine if the quantity number for register X represents a valid index
472 into the `qty_...' variables. */
474 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
476 static struct table_elt *table[NBUCKETS];
478 /* Chain of `struct table_elt's made so far for this function
479 but currently removed from the table. */
481 static struct table_elt *free_element_chain;
483 /* Number of `struct table_elt' structures made so far for this function. */
485 static int n_elements_made;
487 /* Maximum value `n_elements_made' has had so far in this compilation
488 for functions previously processed. */
490 static int max_elements_made;
492 /* Surviving equivalence class when two equivalence classes are merged
493 by recording the effects of a jump in the last insn. Zero if the
494 last insn was not a conditional jump. */
496 static struct table_elt *last_jump_equiv_class;
498 /* Set to the cost of a constant pool reference if one was found for a
499 symbolic constant. If this was found, it means we should try to
500 convert constants into constant pool entries if they don't fit in
503 static int constant_pool_entries_cost;
505 /* Bits describing what kind of values in memory must be invalidated
506 for a particular instruction. If all three bits are zero,
507 no memory refs need to be invalidated. Each bit is more powerful
508 than the preceding ones, and if a bit is set then the preceding
511 Here is how the bits are set:
512 Pushing onto the stack invalidates only the stack pointer,
513 writing at a fixed address invalidates only variable addresses,
514 writing in a structure element at variable address
515 invalidates all but scalar variables,
516 and writing in anything else at variable address invalidates everything. */
520 int sp : 1; /* Invalidate stack pointer. */
521 int var : 1; /* Invalidate variable addresses. */
522 int nonscalar : 1; /* Invalidate all but scalar variables. */
523 int all : 1; /* Invalidate all memory refs. */
526 /* Define maximum length of a branch path. */
528 #define PATHLENGTH 10
530 /* This data describes a block that will be processed by cse_basic_block. */
532 struct cse_basic_block_data {
533 /* Lowest CUID value of insns in block. */
535 /* Highest CUID value of insns in block. */
537 /* Total number of SETs in block. */
539 /* Last insn in the block. */
541 /* Size of current branch path, if any. */
543 /* Current branch path, indicating which branches will be taken. */
545 /* The branch insn. */
547 /* Whether it should be taken or not. AROUND is the same as taken
548 except that it is used when the destination label is not preceded
550 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
554 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
555 virtual regs here because the simplify_*_operation routines are called
556 by integrate.c, which is called before virtual register instantiation. */
558 #define FIXED_BASE_PLUS_P(X) \
559 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
560 || (X) == arg_pointer_rtx \
561 || (X) == virtual_stack_vars_rtx \
562 || (X) == virtual_incoming_args_rtx \
563 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
564 && (XEXP (X, 0) == frame_pointer_rtx \
565 || XEXP (X, 0) == hard_frame_pointer_rtx \
566 || XEXP (X, 0) == arg_pointer_rtx \
567 || XEXP (X, 0) == virtual_stack_vars_rtx \
568 || XEXP (X, 0) == virtual_incoming_args_rtx)))
570 /* Similar, but also allows reference to the stack pointer.
572 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
573 arg_pointer_rtx by itself is nonzero, because on at least one machine,
574 the i960, the arg pointer is zero when it is unused. */
576 #define NONZERO_BASE_PLUS_P(X) \
577 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
578 || (X) == virtual_stack_vars_rtx \
579 || (X) == virtual_incoming_args_rtx \
580 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
581 && (XEXP (X, 0) == frame_pointer_rtx \
582 || XEXP (X, 0) == hard_frame_pointer_rtx \
583 || XEXP (X, 0) == arg_pointer_rtx \
584 || XEXP (X, 0) == virtual_stack_vars_rtx \
585 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
586 || (X) == stack_pointer_rtx \
587 || (X) == virtual_stack_dynamic_rtx \
588 || (X) == virtual_outgoing_args_rtx \
589 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
590 && (XEXP (X, 0) == stack_pointer_rtx \
591 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
592 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
594 static void new_basic_block PROTO((void));
595 static void make_new_qty PROTO((int));
596 static void make_regs_eqv PROTO((int, int));
597 static void delete_reg_equiv PROTO((int));
598 static int mention_regs PROTO((rtx));
599 static int insert_regs PROTO((rtx, struct table_elt *, int));
600 static void free_element PROTO((struct table_elt *));
601 static void remove_from_table PROTO((struct table_elt *, int));
602 static struct table_elt *get_element PROTO((void));
603 static struct table_elt *lookup PROTO((rtx, int, enum machine_mode)),
604 *lookup_for_remove PROTO((rtx, int, enum machine_mode));
605 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
606 static struct table_elt *insert PROTO((rtx, struct table_elt *, int,
608 static void merge_equiv_classes PROTO((struct table_elt *,
609 struct table_elt *));
610 static void invalidate PROTO((rtx));
611 static void remove_invalid_refs PROTO((int));
612 static void rehash_using_reg PROTO((rtx));
613 static void invalidate_memory PROTO((struct write_data *));
614 static void invalidate_for_call PROTO((void));
615 static rtx use_related_value PROTO((rtx, struct table_elt *));
616 static int canon_hash PROTO((rtx, enum machine_mode));
617 static int safe_hash PROTO((rtx, enum machine_mode));
618 static int exp_equiv_p PROTO((rtx, rtx, int, int));
619 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
622 static int refers_to_p PROTO((rtx, rtx));
623 static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT,
625 static int cse_rtx_addr_varies_p PROTO((rtx));
626 static rtx canon_reg PROTO((rtx, rtx));
627 static void find_best_addr PROTO((rtx, rtx *));
628 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
630 enum machine_mode *));
631 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
633 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
635 static rtx fold_rtx PROTO((rtx, rtx));
636 static rtx equiv_constant PROTO((rtx));
637 static void record_jump_equiv PROTO((rtx, int));
638 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
640 static void cse_insn PROTO((rtx, int));
641 static void note_mem_written PROTO((rtx, struct write_data *));
642 static void invalidate_from_clobbers PROTO((struct write_data *, rtx));
643 static rtx cse_process_notes PROTO((rtx, rtx));
644 static void cse_around_loop PROTO((rtx));
645 static void invalidate_skipped_set PROTO((rtx, rtx));
646 static void invalidate_skipped_block PROTO((rtx));
647 static void cse_check_loop_start PROTO((rtx, rtx));
648 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
649 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
650 static void count_reg_usage PROTO((rtx, int *, int));
652 /* Return an estimate of the cost of computing rtx X.
653 One use is in cse, to decide which expression to keep in the hash table.
654 Another is in rtl generation, to pick the cheapest way to multiply.
655 Other uses like the latter are expected in the future. */
657 /* Return the right cost to give to an operation
658 to make the cost of the corresponding register-to-register instruction
659 N times that of a fast register-to-register instruction. */
661 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
664 rtx_cost (x, outer_code)
666 enum rtx_code outer_code;
669 register enum rtx_code code;
676 /* Compute the default costs of certain things.
677 Note that RTX_COSTS can override the defaults. */
683 /* Count multiplication by 2**n as a shift,
684 because if we are considering it, we would output it as a shift. */
685 if (GET_CODE (XEXP (x, 1)) == CONST_INT
686 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
689 total = COSTS_N_INSNS (5);
695 total = COSTS_N_INSNS (7);
698 /* Used in loop.c and combine.c as a marker. */
702 /* We don't want these to be used in substitutions because
703 we have no way of validating the resulting insn. So assign
704 anything containing an ASM_OPERANDS a very high cost. */
714 return ! CHEAP_REG (REGNO (x));
717 /* If we can't tie these modes, make this expensive. The larger
718 the mode, the more expensive it is. */
719 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
720 return COSTS_N_INSNS (2
721 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
724 RTX_COSTS (x, code, outer_code);
726 CONST_COSTS (x, code, outer_code);
729 /* Sum the costs of the sub-rtx's, plus cost of this operation,
730 which is already in total. */
732 fmt = GET_RTX_FORMAT (code);
733 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
735 total += rtx_cost (XEXP (x, i), code);
736 else if (fmt[i] == 'E')
737 for (j = 0; j < XVECLEN (x, i); j++)
738 total += rtx_cost (XVECEXP (x, i, j), code);
743 /* Clear the hash table and initialize each register with its own quantity,
744 for a new basic block. */
753 bzero (reg_tick, max_reg * sizeof (int));
755 bcopy (all_minus_one, reg_in_table, max_reg * sizeof (int));
756 bcopy (consec_ints, reg_qty, max_reg * sizeof (int));
757 CLEAR_HARD_REG_SET (hard_regs_in_table);
759 /* The per-quantity values used to be initialized here, but it is
760 much faster to initialize each as it is made in `make_new_qty'. */
762 for (i = 0; i < NBUCKETS; i++)
764 register struct table_elt *this, *next;
765 for (this = table[i]; this; this = next)
767 next = this->next_same_hash;
772 bzero (table, sizeof table);
781 /* Say that register REG contains a quantity not in any register before
782 and initialize that quantity. */
790 if (next_qty >= max_qty)
793 q = reg_qty[reg] = next_qty++;
794 qty_first_reg[q] = reg;
795 qty_last_reg[q] = reg;
796 qty_const[q] = qty_const_insn[q] = 0;
797 qty_comparison_code[q] = UNKNOWN;
799 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
802 /* Make reg NEW equivalent to reg OLD.
803 OLD is not changing; NEW is. */
806 make_regs_eqv (new, old)
807 register int new, old;
809 register int lastr, firstr;
810 register int q = reg_qty[old];
812 /* Nothing should become eqv until it has a "non-invalid" qty number. */
813 if (! REGNO_QTY_VALID_P (old))
817 firstr = qty_first_reg[q];
818 lastr = qty_last_reg[q];
820 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
821 hard regs. Among pseudos, if NEW will live longer than any other reg
822 of the same qty, and that is beyond the current basic block,
823 make it the new canonical replacement for this qty. */
824 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
825 /* Certain fixed registers might be of the class NO_REGS. This means
826 that not only can they not be allocated by the compiler, but
827 they cannot be used in substitutions or canonicalizations
829 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
830 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
831 || (new >= FIRST_PSEUDO_REGISTER
832 && (firstr < FIRST_PSEUDO_REGISTER
833 || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end
834 || (uid_cuid[regno_first_uid[new]]
835 < cse_basic_block_start))
836 && (uid_cuid[regno_last_uid[new]]
837 > uid_cuid[regno_last_uid[firstr]]))))))
839 reg_prev_eqv[firstr] = new;
840 reg_next_eqv[new] = firstr;
841 reg_prev_eqv[new] = -1;
842 qty_first_reg[q] = new;
846 /* If NEW is a hard reg (known to be non-fixed), insert at end.
847 Otherwise, insert before any non-fixed hard regs that are at the
848 end. Registers of class NO_REGS cannot be used as an
849 equivalent for anything. */
850 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
851 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
852 && new >= FIRST_PSEUDO_REGISTER)
853 lastr = reg_prev_eqv[lastr];
854 reg_next_eqv[new] = reg_next_eqv[lastr];
855 if (reg_next_eqv[lastr] >= 0)
856 reg_prev_eqv[reg_next_eqv[lastr]] = new;
858 qty_last_reg[q] = new;
859 reg_next_eqv[lastr] = new;
860 reg_prev_eqv[new] = lastr;
864 /* Remove REG from its equivalence class. */
867 delete_reg_equiv (reg)
870 register int n = reg_next_eqv[reg];
871 register int p = reg_prev_eqv[reg];
872 register int q = reg_qty[reg];
874 /* If invalid, do nothing. N and P above are undefined in that case. */
885 qty_first_reg[q] = n;
890 /* Remove any invalid expressions from the hash table
891 that refer to any of the registers contained in expression X.
893 Make sure that newly inserted references to those registers
894 as subexpressions will be considered valid.
896 mention_regs is not called when a register itself
897 is being stored in the table.
899 Return 1 if we have done something that may have changed the hash code
906 register enum rtx_code code;
909 register int changed = 0;
917 register int regno = REGNO (x);
918 register int endregno
919 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
920 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
923 for (i = regno; i < endregno; i++)
925 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
926 remove_invalid_refs (i);
928 reg_in_table[i] = reg_tick[i];
934 /* If X is a comparison or a COMPARE and either operand is a register
935 that does not have a quantity, give it one. This is so that a later
936 call to record_jump_equiv won't cause X to be assigned a different
937 hash code and not found in the table after that call.
939 It is not necessary to do this here, since rehash_using_reg can
940 fix up the table later, but doing this here eliminates the need to
941 call that expensive function in the most common case where the only
942 use of the register is in the comparison. */
944 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
946 if (GET_CODE (XEXP (x, 0)) == REG
947 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
948 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
950 rehash_using_reg (XEXP (x, 0));
954 if (GET_CODE (XEXP (x, 1)) == REG
955 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
956 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
958 rehash_using_reg (XEXP (x, 1));
963 fmt = GET_RTX_FORMAT (code);
964 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
966 changed |= mention_regs (XEXP (x, i));
967 else if (fmt[i] == 'E')
968 for (j = 0; j < XVECLEN (x, i); j++)
969 changed |= mention_regs (XVECEXP (x, i, j));
974 /* Update the register quantities for inserting X into the hash table
975 with a value equivalent to CLASSP.
976 (If the class does not contain a REG, it is irrelevant.)
977 If MODIFIED is nonzero, X is a destination; it is being modified.
978 Note that delete_reg_equiv should be called on a register
979 before insert_regs is done on that register with MODIFIED != 0.
981 Nonzero value means that elements of reg_qty have changed
982 so X's hash code may be different. */
985 insert_regs (x, classp, modified)
987 struct table_elt *classp;
990 if (GET_CODE (x) == REG)
992 register int regno = REGNO (x);
994 /* If REGNO is in the equivalence table already but is of the
995 wrong mode for that equivalence, don't do anything here. */
997 if (REGNO_QTY_VALID_P (regno)
998 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1001 if (modified || ! REGNO_QTY_VALID_P (regno))
1004 for (classp = classp->first_same_value;
1006 classp = classp->next_same_value)
1007 if (GET_CODE (classp->exp) == REG
1008 && GET_MODE (classp->exp) == GET_MODE (x))
1010 make_regs_eqv (regno, REGNO (classp->exp));
1014 make_new_qty (regno);
1015 qty_mode[reg_qty[regno]] = GET_MODE (x);
1022 /* If X is a SUBREG, we will likely be inserting the inner register in the
1023 table. If that register doesn't have an assigned quantity number at
1024 this point but does later, the insertion that we will be doing now will
1025 not be accessible because its hash code will have changed. So assign
1026 a quantity number now. */
1028 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1029 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1031 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1032 mention_regs (SUBREG_REG (x));
1036 return mention_regs (x);
1039 /* Look in or update the hash table. */
1041 /* Put the element ELT on the list of free elements. */
1045 struct table_elt *elt;
1047 elt->next_same_hash = free_element_chain;
1048 free_element_chain = elt;
1051 /* Return an element that is free for use. */
1053 static struct table_elt *
1056 struct table_elt *elt = free_element_chain;
1059 free_element_chain = elt->next_same_hash;
1063 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1066 /* Remove table element ELT from use in the table.
1067 HASH is its hash code, made using the HASH macro.
1068 It's an argument because often that is known in advance
1069 and we save much time not recomputing it. */
1072 remove_from_table (elt, hash)
1073 register struct table_elt *elt;
1079 /* Mark this element as removed. See cse_insn. */
1080 elt->first_same_value = 0;
1082 /* Remove the table element from its equivalence class. */
1085 register struct table_elt *prev = elt->prev_same_value;
1086 register struct table_elt *next = elt->next_same_value;
1088 if (next) next->prev_same_value = prev;
1091 prev->next_same_value = next;
1094 register struct table_elt *newfirst = next;
1097 next->first_same_value = newfirst;
1098 next = next->next_same_value;
1103 /* Remove the table element from its hash bucket. */
1106 register struct table_elt *prev = elt->prev_same_hash;
1107 register struct table_elt *next = elt->next_same_hash;
1109 if (next) next->prev_same_hash = prev;
1112 prev->next_same_hash = next;
1113 else if (table[hash] == elt)
1117 /* This entry is not in the proper hash bucket. This can happen
1118 when two classes were merged by `merge_equiv_classes'. Search
1119 for the hash bucket that it heads. This happens only very
1120 rarely, so the cost is acceptable. */
1121 for (hash = 0; hash < NBUCKETS; hash++)
1122 if (table[hash] == elt)
1127 /* Remove the table element from its related-value circular chain. */
1129 if (elt->related_value != 0 && elt->related_value != elt)
1131 register struct table_elt *p = elt->related_value;
1132 while (p->related_value != elt)
1133 p = p->related_value;
1134 p->related_value = elt->related_value;
1135 if (p->related_value == p)
1136 p->related_value = 0;
1142 /* Look up X in the hash table and return its table element,
1143 or 0 if X is not in the table.
1145 MODE is the machine-mode of X, or if X is an integer constant
1146 with VOIDmode then MODE is the mode with which X will be used.
1148 Here we are satisfied to find an expression whose tree structure
1151 static struct table_elt *
1152 lookup (x, hash, mode)
1155 enum machine_mode mode;
1157 register struct table_elt *p;
1159 for (p = table[hash]; p; p = p->next_same_hash)
1160 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1161 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1167 /* Like `lookup' but don't care whether the table element uses invalid regs.
1168 Also ignore discrepancies in the machine mode of a register. */
1170 static struct table_elt *
1171 lookup_for_remove (x, hash, mode)
1174 enum machine_mode mode;
1176 register struct table_elt *p;
1178 if (GET_CODE (x) == REG)
1180 int regno = REGNO (x);
1181 /* Don't check the machine mode when comparing registers;
1182 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1183 for (p = table[hash]; p; p = p->next_same_hash)
1184 if (GET_CODE (p->exp) == REG
1185 && REGNO (p->exp) == regno)
1190 for (p = table[hash]; p; p = p->next_same_hash)
1191 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1198 /* Look for an expression equivalent to X and with code CODE.
1199 If one is found, return that expression. */
1202 lookup_as_function (x, code)
1206 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1211 for (p = p->first_same_value; p; p = p->next_same_value)
1213 if (GET_CODE (p->exp) == code
1214 /* Make sure this is a valid entry in the table. */
1215 && exp_equiv_p (p->exp, p->exp, 1, 0))
1222 /* Insert X in the hash table, assuming HASH is its hash code
1223 and CLASSP is an element of the class it should go in
1224 (or 0 if a new class should be made).
1225 It is inserted at the proper position to keep the class in
1226 the order cheapest first.
1228 MODE is the machine-mode of X, or if X is an integer constant
1229 with VOIDmode then MODE is the mode with which X will be used.
1231 For elements of equal cheapness, the most recent one
1232 goes in front, except that the first element in the list
1233 remains first unless a cheaper element is added. The order of
1234 pseudo-registers does not matter, as canon_reg will be called to
1235 find the cheapest when a register is retrieved from the table.
1237 The in_memory field in the hash table element is set to 0.
1238 The caller must set it nonzero if appropriate.
1240 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1241 and if insert_regs returns a nonzero value
1242 you must then recompute its hash code before calling here.
1244 If necessary, update table showing constant values of quantities. */
1246 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1248 static struct table_elt *
1249 insert (x, classp, hash, mode)
1251 register struct table_elt *classp;
1253 enum machine_mode mode;
1255 register struct table_elt *elt;
1257 /* If X is a register and we haven't made a quantity for it,
1258 something is wrong. */
1259 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1262 /* If X is a hard register, show it is being put in the table. */
1263 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1265 int regno = REGNO (x);
1266 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1269 for (i = regno; i < endregno; i++)
1270 SET_HARD_REG_BIT (hard_regs_in_table, i);
1274 /* Put an element for X into the right hash bucket. */
1276 elt = get_element ();
1278 elt->cost = COST (x);
1279 elt->next_same_value = 0;
1280 elt->prev_same_value = 0;
1281 elt->next_same_hash = table[hash];
1282 elt->prev_same_hash = 0;
1283 elt->related_value = 0;
1286 elt->is_const = (CONSTANT_P (x)
1287 /* GNU C++ takes advantage of this for `this'
1288 (and other const values). */
1289 || (RTX_UNCHANGING_P (x)
1290 && GET_CODE (x) == REG
1291 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1292 || FIXED_BASE_PLUS_P (x));
1295 table[hash]->prev_same_hash = elt;
1298 /* Put it into the proper value-class. */
1301 classp = classp->first_same_value;
1302 if (CHEAPER (elt, classp))
1303 /* Insert at the head of the class */
1305 register struct table_elt *p;
1306 elt->next_same_value = classp;
1307 classp->prev_same_value = elt;
1308 elt->first_same_value = elt;
1310 for (p = classp; p; p = p->next_same_value)
1311 p->first_same_value = elt;
1315 /* Insert not at head of the class. */
1316 /* Put it after the last element cheaper than X. */
1317 register struct table_elt *p, *next;
1318 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1320 /* Put it after P and before NEXT. */
1321 elt->next_same_value = next;
1323 next->prev_same_value = elt;
1324 elt->prev_same_value = p;
1325 p->next_same_value = elt;
1326 elt->first_same_value = classp;
1330 elt->first_same_value = elt;
1332 /* If this is a constant being set equivalent to a register or a register
1333 being set equivalent to a constant, note the constant equivalence.
1335 If this is a constant, it cannot be equivalent to a different constant,
1336 and a constant is the only thing that can be cheaper than a register. So
1337 we know the register is the head of the class (before the constant was
1340 If this is a register that is not already known equivalent to a
1341 constant, we must check the entire class.
1343 If this is a register that is already known equivalent to an insn,
1344 update `qty_const_insn' to show that `this_insn' is the latest
1345 insn making that quantity equivalent to the constant. */
1347 if (elt->is_const && classp && GET_CODE (classp->exp) == REG)
1349 qty_const[reg_qty[REGNO (classp->exp)]]
1350 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1351 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1354 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]])
1356 register struct table_elt *p;
1358 for (p = classp; p != 0; p = p->next_same_value)
1362 qty_const[reg_qty[REGNO (x)]]
1363 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1364 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1370 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1371 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1372 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1374 /* If this is a constant with symbolic value,
1375 and it has a term with an explicit integer value,
1376 link it up with related expressions. */
1377 if (GET_CODE (x) == CONST)
1379 rtx subexp = get_related_value (x);
1381 struct table_elt *subelt, *subelt_prev;
1385 /* Get the integer-free subexpression in the hash table. */
1386 subhash = safe_hash (subexp, mode) % NBUCKETS;
1387 subelt = lookup (subexp, subhash, mode);
1389 subelt = insert (subexp, NULL_PTR, subhash, mode);
1390 /* Initialize SUBELT's circular chain if it has none. */
1391 if (subelt->related_value == 0)
1392 subelt->related_value = subelt;
1393 /* Find the element in the circular chain that precedes SUBELT. */
1394 subelt_prev = subelt;
1395 while (subelt_prev->related_value != subelt)
1396 subelt_prev = subelt_prev->related_value;
1397 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1398 This way the element that follows SUBELT is the oldest one. */
1399 elt->related_value = subelt_prev->related_value;
1400 subelt_prev->related_value = elt;
1407 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1408 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1409 the two classes equivalent.
1411 CLASS1 will be the surviving class; CLASS2 should not be used after this
1414 Any invalid entries in CLASS2 will not be copied. */
1417 merge_equiv_classes (class1, class2)
1418 struct table_elt *class1, *class2;
1420 struct table_elt *elt, *next, *new;
1422 /* Ensure we start with the head of the classes. */
1423 class1 = class1->first_same_value;
1424 class2 = class2->first_same_value;
1426 /* If they were already equal, forget it. */
1427 if (class1 == class2)
1430 for (elt = class2; elt; elt = next)
1434 enum machine_mode mode = elt->mode;
1436 next = elt->next_same_value;
1438 /* Remove old entry, make a new one in CLASS1's class.
1439 Don't do this for invalid entries as we cannot find their
1440 hash code (it also isn't necessary). */
1441 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1443 hash_arg_in_memory = 0;
1444 hash_arg_in_struct = 0;
1445 hash = HASH (exp, mode);
1447 if (GET_CODE (exp) == REG)
1448 delete_reg_equiv (REGNO (exp));
1450 remove_from_table (elt, hash);
1452 if (insert_regs (exp, class1, 0))
1453 hash = HASH (exp, mode);
1454 new = insert (exp, class1, hash, mode);
1455 new->in_memory = hash_arg_in_memory;
1456 new->in_struct = hash_arg_in_struct;
1461 /* Remove from the hash table, or mark as invalid,
1462 all expressions whose values could be altered by storing in X.
1463 X is a register, a subreg, or a memory reference with nonvarying address
1464 (because, when a memory reference with a varying address is stored in,
1465 all memory references are removed by invalidate_memory
1466 so specific invalidation is superfluous).
1468 A nonvarying address may be just a register or just
1469 a symbol reference, or it may be either of those plus
1470 a numeric offset. */
1477 register struct table_elt *p;
1479 HOST_WIDE_INT start, end;
1481 /* If X is a register, dependencies on its contents
1482 are recorded through the qty number mechanism.
1483 Just change the qty number of the register,
1484 mark it as invalid for expressions that refer to it,
1485 and remove it itself. */
1487 if (GET_CODE (x) == REG)
1489 register int regno = REGNO (x);
1490 register int hash = HASH (x, GET_MODE (x));
1492 /* Remove REGNO from any quantity list it might be on and indicate
1493 that it's value might have changed. If it is a pseudo, remove its
1494 entry from the hash table.
1496 For a hard register, we do the first two actions above for any
1497 additional hard registers corresponding to X. Then, if any of these
1498 registers are in the table, we must remove any REG entries that
1499 overlap these registers. */
1501 delete_reg_equiv (regno);
1504 if (regno >= FIRST_PSEUDO_REGISTER)
1505 remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash);
1508 HOST_WIDE_INT in_table
1509 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1510 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1511 int tregno, tendregno;
1512 register struct table_elt *p, *next;
1514 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1516 for (i = regno + 1; i < endregno; i++)
1518 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1519 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1520 delete_reg_equiv (i);
1525 for (hash = 0; hash < NBUCKETS; hash++)
1526 for (p = table[hash]; p; p = next)
1528 next = p->next_same_hash;
1530 if (GET_CODE (p->exp) != REG
1531 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1534 tregno = REGNO (p->exp);
1536 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1537 if (tendregno > regno && tregno < endregno)
1538 remove_from_table (p, hash);
1545 if (GET_CODE (x) == SUBREG)
1547 if (GET_CODE (SUBREG_REG (x)) != REG)
1549 invalidate (SUBREG_REG (x));
1553 /* X is not a register; it must be a memory reference with
1554 a nonvarying address. Remove all hash table elements
1555 that refer to overlapping pieces of memory. */
1557 if (GET_CODE (x) != MEM)
1560 set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (GET_MODE (x)),
1561 &base, &start, &end);
1563 for (i = 0; i < NBUCKETS; i++)
1565 register struct table_elt *next;
1566 for (p = table[i]; p; p = next)
1568 next = p->next_same_hash;
1569 if (refers_to_mem_p (p->exp, base, start, end))
1570 remove_from_table (p, i);
1575 /* Remove all expressions that refer to register REGNO,
1576 since they are already invalid, and we are about to
1577 mark that register valid again and don't want the old
1578 expressions to reappear as valid. */
1581 remove_invalid_refs (regno)
1585 register struct table_elt *p, *next;
1587 for (i = 0; i < NBUCKETS; i++)
1588 for (p = table[i]; p; p = next)
1590 next = p->next_same_hash;
1591 if (GET_CODE (p->exp) != REG
1592 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1593 remove_from_table (p, i);
1597 /* Recompute the hash codes of any valid entries in the hash table that
1598 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1600 This is called when we make a jump equivalence. */
1603 rehash_using_reg (x)
1607 struct table_elt *p, *next;
1610 if (GET_CODE (x) == SUBREG)
1613 /* If X is not a register or if the register is known not to be in any
1614 valid entries in the table, we have no work to do. */
1616 if (GET_CODE (x) != REG
1617 || reg_in_table[REGNO (x)] < 0
1618 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1621 /* Scan all hash chains looking for valid entries that mention X.
1622 If we find one and it is in the wrong hash chain, move it. We can skip
1623 objects that are registers, since they are handled specially. */
1625 for (i = 0; i < NBUCKETS; i++)
1626 for (p = table[i]; p; p = next)
1628 next = p->next_same_hash;
1629 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1630 && exp_equiv_p (p->exp, p->exp, 1, 0)
1631 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1633 if (p->next_same_hash)
1634 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1636 if (p->prev_same_hash)
1637 p->prev_same_hash->next_same_hash = p->next_same_hash;
1639 table[i] = p->next_same_hash;
1641 p->next_same_hash = table[hash];
1642 p->prev_same_hash = 0;
1644 table[hash]->prev_same_hash = p;
1650 /* Remove from the hash table all expressions that reference memory,
1651 or some of them as specified by *WRITES. */
1654 invalidate_memory (writes)
1655 struct write_data *writes;
1658 register struct table_elt *p, *next;
1659 int all = writes->all;
1660 int nonscalar = writes->nonscalar;
1662 for (i = 0; i < NBUCKETS; i++)
1663 for (p = table[i]; p; p = next)
1665 next = p->next_same_hash;
1668 || (nonscalar && p->in_struct)
1669 || cse_rtx_addr_varies_p (p->exp)))
1670 remove_from_table (p, i);
1674 /* Remove from the hash table any expression that is a call-clobbered
1675 register. Also update their TICK values. */
1678 invalidate_for_call ()
1680 int regno, endregno;
1683 struct table_elt *p, *next;
1686 /* Go through all the hard registers. For each that is clobbered in
1687 a CALL_INSN, remove the register from quantity chains and update
1688 reg_tick if defined. Also see if any of these registers is currently
1691 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1692 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1694 delete_reg_equiv (regno);
1695 if (reg_tick[regno] >= 0)
1698 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1701 /* In the case where we have no call-clobbered hard registers in the
1702 table, we are done. Otherwise, scan the table and remove any
1703 entry that overlaps a call-clobbered register. */
1706 for (hash = 0; hash < NBUCKETS; hash++)
1707 for (p = table[hash]; p; p = next)
1709 next = p->next_same_hash;
1711 if (GET_CODE (p->exp) != REG
1712 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1715 regno = REGNO (p->exp);
1716 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1718 for (i = regno; i < endregno; i++)
1719 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1721 remove_from_table (p, hash);
1727 /* Given an expression X of type CONST,
1728 and ELT which is its table entry (or 0 if it
1729 is not in the hash table),
1730 return an alternate expression for X as a register plus integer.
1731 If none can be found, return 0. */
1734 use_related_value (x, elt)
1736 struct table_elt *elt;
1738 register struct table_elt *relt = 0;
1739 register struct table_elt *p, *q;
1740 HOST_WIDE_INT offset;
1742 /* First, is there anything related known?
1743 If we have a table element, we can tell from that.
1744 Otherwise, must look it up. */
1746 if (elt != 0 && elt->related_value != 0)
1748 else if (elt == 0 && GET_CODE (x) == CONST)
1750 rtx subexp = get_related_value (x);
1752 relt = lookup (subexp,
1753 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1760 /* Search all related table entries for one that has an
1761 equivalent register. */
1766 /* This loop is strange in that it is executed in two different cases.
1767 The first is when X is already in the table. Then it is searching
1768 the RELATED_VALUE list of X's class (RELT). The second case is when
1769 X is not in the table. Then RELT points to a class for the related
1772 Ensure that, whatever case we are in, that we ignore classes that have
1773 the same value as X. */
1775 if (rtx_equal_p (x, p->exp))
1778 for (q = p->first_same_value; q; q = q->next_same_value)
1779 if (GET_CODE (q->exp) == REG)
1785 p = p->related_value;
1787 /* We went all the way around, so there is nothing to be found.
1788 Alternatively, perhaps RELT was in the table for some other reason
1789 and it has no related values recorded. */
1790 if (p == relt || p == 0)
1797 offset = (get_integer_term (x) - get_integer_term (p->exp));
1798 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1799 return plus_constant (q->exp, offset);
1802 /* Hash an rtx. We are careful to make sure the value is never negative.
1803 Equivalent registers hash identically.
1804 MODE is used in hashing for CONST_INTs only;
1805 otherwise the mode of X is used.
1807 Store 1 in do_not_record if any subexpression is volatile.
1809 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1810 which does not have the RTX_UNCHANGING_P bit set.
1811 In this case, also store 1 in hash_arg_in_struct
1812 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1814 Note that cse_insn knows that the hash code of a MEM expression
1815 is just (int) MEM plus the hash code of the address. */
1818 canon_hash (x, mode)
1820 enum machine_mode mode;
1823 register int hash = 0;
1824 register enum rtx_code code;
1827 /* repeat is used to turn tail-recursion into iteration. */
1832 code = GET_CODE (x);
1837 register int regno = REGNO (x);
1839 /* On some machines, we can't record any non-fixed hard register,
1840 because extending its life will cause reload problems. We
1841 consider ap, fp, and sp to be fixed for this purpose.
1842 On all machines, we can't record any global registers. */
1844 if (regno < FIRST_PSEUDO_REGISTER
1845 && (global_regs[regno]
1846 #ifdef SMALL_REGISTER_CLASSES
1847 || (! fixed_regs[regno]
1848 && regno != FRAME_POINTER_REGNUM
1849 && regno != HARD_FRAME_POINTER_REGNUM
1850 && regno != ARG_POINTER_REGNUM
1851 && regno != STACK_POINTER_REGNUM)
1858 return hash + ((int) REG << 7) + reg_qty[regno];
1862 hash += ((int) mode + ((int) CONST_INT << 7)
1863 + INTVAL (x) + (INTVAL (x) >> HASHBITS));
1864 return ((1 << HASHBITS) - 1) & hash;
1867 /* This is like the general case, except that it only counts
1868 the integers representing the constant. */
1869 hash += (int) code + (int) GET_MODE (x);
1872 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1874 int tem = XINT (x, i);
1875 hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1880 /* Assume there is only one rtx object for any given label. */
1882 /* Use `and' to ensure a positive number. */
1883 return (hash + ((HOST_WIDE_INT) LABEL_REF << 7)
1884 + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1)));
1887 return (hash + ((HOST_WIDE_INT) SYMBOL_REF << 7)
1888 + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1)));
1891 if (MEM_VOLATILE_P (x))
1896 if (! RTX_UNCHANGING_P (x))
1898 hash_arg_in_memory = 1;
1899 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1901 /* Now that we have already found this special case,
1902 might as well speed it up as much as possible. */
1914 case UNSPEC_VOLATILE:
1919 if (MEM_VOLATILE_P (x))
1926 i = GET_RTX_LENGTH (code) - 1;
1927 hash += (int) code + (int) GET_MODE (x);
1928 fmt = GET_RTX_FORMAT (code);
1933 rtx tem = XEXP (x, i);
1936 /* If the operand is a REG that is equivalent to a constant, hash
1937 as if we were hashing the constant, since we will be comparing
1939 if (tem != 0 && GET_CODE (tem) == REG
1940 && REGNO_QTY_VALID_P (REGNO (tem))
1941 && qty_mode[reg_qty[REGNO (tem)]] == GET_MODE (tem)
1942 && (tem1 = qty_const[reg_qty[REGNO (tem)]]) != 0
1943 && CONSTANT_P (tem1))
1946 /* If we are about to do the last recursive call
1947 needed at this level, change it into iteration.
1948 This function is called enough to be worth it. */
1954 hash += canon_hash (tem, 0);
1956 else if (fmt[i] == 'E')
1957 for (j = 0; j < XVECLEN (x, i); j++)
1958 hash += canon_hash (XVECEXP (x, i, j), 0);
1959 else if (fmt[i] == 's')
1961 register char *p = XSTR (x, i);
1965 register int tem = *p++;
1966 hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1969 else if (fmt[i] == 'i')
1971 register int tem = XINT (x, i);
1972 hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1980 /* Like canon_hash but with no side effects. */
1985 enum machine_mode mode;
1987 int save_do_not_record = do_not_record;
1988 int save_hash_arg_in_memory = hash_arg_in_memory;
1989 int save_hash_arg_in_struct = hash_arg_in_struct;
1990 int hash = canon_hash (x, mode);
1991 hash_arg_in_memory = save_hash_arg_in_memory;
1992 hash_arg_in_struct = save_hash_arg_in_struct;
1993 do_not_record = save_do_not_record;
1997 /* Return 1 iff X and Y would canonicalize into the same thing,
1998 without actually constructing the canonicalization of either one.
1999 If VALIDATE is nonzero,
2000 we assume X is an expression being processed from the rtl
2001 and Y was found in the hash table. We check register refs
2002 in Y for being marked as valid.
2004 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2005 that is known to be in the register. Ordinarily, we don't allow them
2006 to match, because letting them match would cause unpredictable results
2007 in all the places that search a hash table chain for an equivalent
2008 for a given value. A possible equivalent that has different structure
2009 has its hash code computed from different data. Whether the hash code
2010 is the same as that of the the given value is pure luck. */
2013 exp_equiv_p (x, y, validate, equal_values)
2019 register enum rtx_code code;
2022 /* Note: it is incorrect to assume an expression is equivalent to itself
2023 if VALIDATE is nonzero. */
2024 if (x == y && !validate)
2026 if (x == 0 || y == 0)
2029 code = GET_CODE (x);
2030 if (code != GET_CODE (y))
2035 /* If X is a constant and Y is a register or vice versa, they may be
2036 equivalent. We only have to validate if Y is a register. */
2037 if (CONSTANT_P (x) && GET_CODE (y) == REG
2038 && REGNO_QTY_VALID_P (REGNO (y))
2039 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2040 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2041 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2044 if (CONSTANT_P (y) && code == REG
2045 && REGNO_QTY_VALID_P (REGNO (x))
2046 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2047 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2053 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2054 if (GET_MODE (x) != GET_MODE (y))
2064 return INTVAL (x) == INTVAL (y);
2068 return XEXP (x, 0) == XEXP (y, 0);
2072 int regno = REGNO (y);
2074 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2075 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2078 /* If the quantities are not the same, the expressions are not
2079 equivalent. If there are and we are not to validate, they
2080 are equivalent. Otherwise, ensure all regs are up-to-date. */
2082 if (reg_qty[REGNO (x)] != reg_qty[regno])
2088 for (i = regno; i < endregno; i++)
2089 if (reg_in_table[i] != reg_tick[i])
2095 /* For commutative operations, check both orders. */
2103 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2104 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2105 validate, equal_values))
2106 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2107 validate, equal_values)
2108 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2109 validate, equal_values)));
2112 /* Compare the elements. If any pair of corresponding elements
2113 fail to match, return 0 for the whole things. */
2115 fmt = GET_RTX_FORMAT (code);
2116 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2121 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2126 if (XVECLEN (x, i) != XVECLEN (y, i))
2128 for (j = 0; j < XVECLEN (x, i); j++)
2129 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2130 validate, equal_values))
2135 if (strcmp (XSTR (x, i), XSTR (y, i)))
2140 if (XINT (x, i) != XINT (y, i))
2145 if (XWINT (x, i) != XWINT (y, i))
2160 /* Return 1 iff any subexpression of X matches Y.
2161 Here we do not require that X or Y be valid (for registers referred to)
2162 for being in the hash table. */
2169 register enum rtx_code code;
2175 if (x == 0 || y == 0)
2178 code = GET_CODE (x);
2179 /* If X as a whole has the same code as Y, they may match.
2181 if (code == GET_CODE (y))
2183 if (exp_equiv_p (x, y, 0, 1))
2187 /* X does not match, so try its subexpressions. */
2189 fmt = GET_RTX_FORMAT (code);
2190 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2199 if (refers_to_p (XEXP (x, i), y))
2202 else if (fmt[i] == 'E')
2205 for (j = 0; j < XVECLEN (x, i); j++)
2206 if (refers_to_p (XVECEXP (x, i, j), y))
2213 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2214 set PBASE, PSTART, and PEND which correspond to the base of the address,
2215 the starting offset, and ending offset respectively.
2217 ADDR is known to be a nonvarying address.
2219 cse_address_varies_p returns zero for nonvarying addresses. */
2222 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2226 HOST_WIDE_INT *pstart, *pend;
2235 /* Registers with nonvarying addresses usually have constant equivalents;
2236 but the frame pointer register is also possible. */
2237 if (GET_CODE (base) == REG
2239 && REGNO_QTY_VALID_P (REGNO (base))
2240 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2241 && qty_const[reg_qty[REGNO (base)]] != 0)
2242 base = qty_const[reg_qty[REGNO (base)]];
2243 else if (GET_CODE (base) == PLUS
2244 && GET_CODE (XEXP (base, 1)) == CONST_INT
2245 && GET_CODE (XEXP (base, 0)) == REG
2247 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2248 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2249 == GET_MODE (XEXP (base, 0)))
2250 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2252 start = INTVAL (XEXP (base, 1));
2253 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2256 /* By definition, operand1 of a LO_SUM is the associated constant
2257 address. Use the associated constant address as the base instead. */
2258 if (GET_CODE (base) == LO_SUM)
2259 base = XEXP (base, 1);
2261 /* Strip off CONST. */
2262 if (GET_CODE (base) == CONST)
2263 base = XEXP (base, 0);
2265 if (GET_CODE (base) == PLUS
2266 && GET_CODE (XEXP (base, 1)) == CONST_INT)
2268 start += INTVAL (XEXP (base, 1));
2269 base = XEXP (base, 0);
2274 /* Set the return values. */
2280 /* Return 1 iff any subexpression of X refers to memory
2281 at an address of BASE plus some offset
2282 such that any of the bytes' offsets fall between START (inclusive)
2283 and END (exclusive).
2285 The value is undefined if X is a varying address (as determined by
2286 cse_rtx_addr_varies_p). This function is not used in such cases.
2288 When used in the cse pass, `qty_const' is nonzero, and it is used
2289 to treat an address that is a register with a known constant value
2290 as if it were that constant value.
2291 In the loop pass, `qty_const' is zero, so this is not done. */
2294 refers_to_mem_p (x, base, start, end)
2296 HOST_WIDE_INT start, end;
2298 register HOST_WIDE_INT i;
2299 register enum rtx_code code;
2302 if (GET_CODE (base) == CONST_INT)
2304 start += INTVAL (base);
2305 end += INTVAL (base);
2313 code = GET_CODE (x);
2316 register rtx addr = XEXP (x, 0); /* Get the address. */
2318 HOST_WIDE_INT mystart, myend;
2320 set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)),
2321 &mybase, &mystart, &myend);
2324 /* refers_to_mem_p is never called with varying addresses.
2325 If the base addresses are not equal, there is no chance
2326 of the memory addresses conflicting. */
2327 if (! rtx_equal_p (mybase, base))
2330 return myend > start && mystart < end;
2333 /* X does not match, so try its subexpressions. */
2335 fmt = GET_RTX_FORMAT (code);
2336 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2345 if (refers_to_mem_p (XEXP (x, i), base, start, end))
2348 else if (fmt[i] == 'E')
2351 for (j = 0; j < XVECLEN (x, i); j++)
2352 if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end))
2359 /* Nonzero if X refers to memory at a varying address;
2360 except that a register which has at the moment a known constant value
2361 isn't considered variable. */
2364 cse_rtx_addr_varies_p (x)
2367 /* We need not check for X and the equivalence class being of the same
2368 mode because if X is equivalent to a constant in some mode, it
2369 doesn't vary in any mode. */
2371 if (GET_CODE (x) == MEM
2372 && GET_CODE (XEXP (x, 0)) == REG
2373 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2374 && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]]
2375 && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0)
2378 if (GET_CODE (x) == MEM
2379 && GET_CODE (XEXP (x, 0)) == PLUS
2380 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2381 && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
2382 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0)))
2383 && (GET_MODE (XEXP (XEXP (x, 0), 0))
2384 == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2385 && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2388 return rtx_addr_varies_p (x);
2391 /* Canonicalize an expression:
2392 replace each register reference inside it
2393 with the "oldest" equivalent register.
2395 If INSN is non-zero and we are replacing a pseudo with a hard register
2396 or vice versa, validate_change is used to ensure that INSN remains valid
2397 after we make our substitution. The calls are made with IN_GROUP non-zero
2398 so apply_change_group must be called upon the outermost return from this
2399 function (unless INSN is zero). The result of apply_change_group can
2400 generally be discarded since the changes we are making are optional. */
2408 register enum rtx_code code;
2414 code = GET_CODE (x);
2432 /* Never replace a hard reg, because hard regs can appear
2433 in more than one machine mode, and we must preserve the mode
2434 of each occurrence. Also, some hard regs appear in
2435 MEMs that are shared and mustn't be altered. Don't try to
2436 replace any reg that maps to a reg of class NO_REGS. */
2437 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2438 || ! REGNO_QTY_VALID_P (REGNO (x)))
2441 first = qty_first_reg[reg_qty[REGNO (x)]];
2442 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2443 : REGNO_REG_CLASS (first) == NO_REGS ? x
2444 : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first));
2448 fmt = GET_RTX_FORMAT (code);
2449 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2455 rtx new = canon_reg (XEXP (x, i), insn);
2457 /* If replacing pseudo with hard reg or vice versa, ensure the
2458 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2459 if (insn != 0 && new != 0
2460 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2461 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2462 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2463 || insn_n_dups[recog_memoized (insn)] > 0))
2464 validate_change (insn, &XEXP (x, i), new, 1);
2468 else if (fmt[i] == 'E')
2469 for (j = 0; j < XVECLEN (x, i); j++)
2470 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2476 /* LOC is a location with INSN that is an operand address (the contents of
2477 a MEM). Find the best equivalent address to use that is valid for this
2480 On most CISC machines, complicated address modes are costly, and rtx_cost
2481 is a good approximation for that cost. However, most RISC machines have
2482 only a few (usually only one) memory reference formats. If an address is
2483 valid at all, it is often just as cheap as any other address. Hence, for
2484 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2485 costs of various addresses. For two addresses of equal cost, choose the one
2486 with the highest `rtx_cost' value as that has the potential of eliminating
2487 the most insns. For equal costs, we choose the first in the equivalence
2488 class. Note that we ignore the fact that pseudo registers are cheaper
2489 than hard registers here because we would also prefer the pseudo registers.
2493 find_best_addr (insn, loc)
2497 struct table_elt *elt, *p;
2500 int found_better = 1;
2501 int save_do_not_record = do_not_record;
2502 int save_hash_arg_in_memory = hash_arg_in_memory;
2503 int save_hash_arg_in_struct = hash_arg_in_struct;
2508 /* Do not try to replace constant addresses or addresses of local and
2509 argument slots. These MEM expressions are made only once and inserted
2510 in many instructions, as well as being used to control symbol table
2511 output. It is not safe to clobber them.
2513 There are some uncommon cases where the address is already in a register
2514 for some reason, but we cannot take advantage of that because we have
2515 no easy way to unshare the MEM. In addition, looking up all stack
2516 addresses is costly. */
2517 if ((GET_CODE (addr) == PLUS
2518 && GET_CODE (XEXP (addr, 0)) == REG
2519 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2520 && (regno = REGNO (XEXP (addr, 0)),
2521 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2522 || regno == ARG_POINTER_REGNUM))
2523 || (GET_CODE (addr) == REG
2524 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2525 || regno == HARD_FRAME_POINTER_REGNUM
2526 || regno == ARG_POINTER_REGNUM))
2527 || CONSTANT_ADDRESS_P (addr))
2530 /* If this address is not simply a register, try to fold it. This will
2531 sometimes simplify the expression. Many simplifications
2532 will not be valid, but some, usually applying the associative rule, will
2533 be valid and produce better code. */
2534 if (GET_CODE (addr) != REG
2535 && validate_change (insn, loc, fold_rtx (addr, insn), 0))
2538 /* If this address is not in the hash table, we can't look for equivalences
2539 of the whole address. Also, ignore if volatile. */
2542 hash_code = HASH (addr, Pmode);
2543 addr_volatile = do_not_record;
2544 do_not_record = save_do_not_record;
2545 hash_arg_in_memory = save_hash_arg_in_memory;
2546 hash_arg_in_struct = save_hash_arg_in_struct;
2551 elt = lookup (addr, hash_code, Pmode);
2553 #ifndef ADDRESS_COST
2556 our_cost = elt->cost;
2558 /* Find the lowest cost below ours that works. */
2559 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2560 if (elt->cost < our_cost
2561 && (GET_CODE (elt->exp) == REG
2562 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2563 && validate_change (insn, loc,
2564 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2571 /* We need to find the best (under the criteria documented above) entry
2572 in the class that is valid. We use the `flag' field to indicate
2573 choices that were invalid and iterate until we can't find a better
2574 one that hasn't already been tried. */
2576 for (p = elt->first_same_value; p; p = p->next_same_value)
2579 while (found_better)
2581 int best_addr_cost = ADDRESS_COST (*loc);
2582 int best_rtx_cost = (elt->cost + 1) >> 1;
2583 struct table_elt *best_elt = elt;
2586 for (p = elt->first_same_value; p; p = p->next_same_value)
2588 && (GET_CODE (p->exp) == REG
2589 || exp_equiv_p (p->exp, p->exp, 1, 0))
2590 && (ADDRESS_COST (p->exp) < best_addr_cost
2591 || (ADDRESS_COST (p->exp) == best_addr_cost
2592 && (p->cost + 1) >> 1 > best_rtx_cost)))
2595 best_addr_cost = ADDRESS_COST (p->exp);
2596 best_rtx_cost = (p->cost + 1) >> 1;
2602 if (validate_change (insn, loc,
2603 canon_reg (copy_rtx (best_elt->exp),
2612 /* If the address is a binary operation with the first operand a register
2613 and the second a constant, do the same as above, but looking for
2614 equivalences of the register. Then try to simplify before checking for
2615 the best address to use. This catches a few cases: First is when we
2616 have REG+const and the register is another REG+const. We can often merge
2617 the constants and eliminate one insn and one register. It may also be
2618 that a machine has a cheap REG+REG+const. Finally, this improves the
2619 code on the Alpha for unaligned byte stores. */
2621 if (flag_expensive_optimizations
2622 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2623 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2624 && GET_CODE (XEXP (*loc, 0)) == REG
2625 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2627 rtx c = XEXP (*loc, 1);
2630 hash_code = HASH (XEXP (*loc, 0), Pmode);
2631 do_not_record = save_do_not_record;
2632 hash_arg_in_memory = save_hash_arg_in_memory;
2633 hash_arg_in_struct = save_hash_arg_in_struct;
2635 elt = lookup (XEXP (*loc, 0), hash_code, Pmode);
2639 /* We need to find the best (under the criteria documented above) entry
2640 in the class that is valid. We use the `flag' field to indicate
2641 choices that were invalid and iterate until we can't find a better
2642 one that hasn't already been tried. */
2644 for (p = elt->first_same_value; p; p = p->next_same_value)
2647 while (found_better)
2649 int best_addr_cost = ADDRESS_COST (*loc);
2650 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2651 struct table_elt *best_elt = elt;
2652 rtx best_rtx = *loc;
2655 for (p = elt->first_same_value; p; p = p->next_same_value)
2657 && (GET_CODE (p->exp) == REG
2658 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2660 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2662 if ((ADDRESS_COST (new) < best_addr_cost
2663 || (ADDRESS_COST (new) == best_addr_cost
2664 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2667 best_addr_cost = ADDRESS_COST (new);
2668 best_rtx_cost = (COST (new) + 1) >> 1;
2676 if (validate_change (insn, loc,
2677 canon_reg (copy_rtx (best_rtx),
2688 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2689 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2690 what values are being compared.
2692 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2693 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2694 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2695 compared to produce cc0.
2697 The return value is the comparison operator and is either the code of
2698 A or the code corresponding to the inverse of the comparison. */
2700 static enum rtx_code
2701 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2704 enum machine_mode *pmode1, *pmode2;
2708 arg1 = *parg1, arg2 = *parg2;
2710 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2712 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2714 /* Set non-zero when we find something of interest. */
2716 int reverse_code = 0;
2717 struct table_elt *p = 0;
2719 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2720 On machines with CC0, this is the only case that can occur, since
2721 fold_rtx will return the COMPARE or item being compared with zero
2724 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2727 /* If ARG1 is a comparison operator and CODE is testing for
2728 STORE_FLAG_VALUE, get the inner arguments. */
2730 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2733 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2734 && code == LT && STORE_FLAG_VALUE == -1)
2735 #ifdef FLOAT_STORE_FLAG_VALUE
2736 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2737 && FLOAT_STORE_FLAG_VALUE < 0)
2742 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2743 && code == GE && STORE_FLAG_VALUE == -1)
2744 #ifdef FLOAT_STORE_FLAG_VALUE
2745 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2746 && FLOAT_STORE_FLAG_VALUE < 0)
2749 x = arg1, reverse_code = 1;
2752 /* ??? We could also check for
2754 (ne (and (eq (...) (const_int 1))) (const_int 0))
2756 and related forms, but let's wait until we see them occurring. */
2759 /* Look up ARG1 in the hash table and see if it has an equivalence
2760 that lets us see what is being compared. */
2761 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2763 if (p) p = p->first_same_value;
2765 for (; p; p = p->next_same_value)
2767 enum machine_mode inner_mode = GET_MODE (p->exp);
2769 /* If the entry isn't valid, skip it. */
2770 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2773 if (GET_CODE (p->exp) == COMPARE
2774 /* Another possibility is that this machine has a compare insn
2775 that includes the comparison code. In that case, ARG1 would
2776 be equivalent to a comparison operation that would set ARG1 to
2777 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2778 ORIG_CODE is the actual comparison being done; if it is an EQ,
2779 we must reverse ORIG_CODE. On machine with a negative value
2780 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2783 && GET_MODE_CLASS (inner_mode) == MODE_INT
2784 && (GET_MODE_BITSIZE (inner_mode)
2785 <= HOST_BITS_PER_WIDE_INT)
2786 && (STORE_FLAG_VALUE
2787 & ((HOST_WIDE_INT) 1
2788 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2789 #ifdef FLOAT_STORE_FLAG_VALUE
2791 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2792 && FLOAT_STORE_FLAG_VALUE < 0)
2795 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2800 else if ((code == EQ
2802 && GET_MODE_CLASS (inner_mode) == MODE_INT
2803 && (GET_MODE_BITSIZE (inner_mode)
2804 <= HOST_BITS_PER_WIDE_INT)
2805 && (STORE_FLAG_VALUE
2806 & ((HOST_WIDE_INT) 1
2807 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2808 #ifdef FLOAT_STORE_FLAG_VALUE
2810 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2811 && FLOAT_STORE_FLAG_VALUE < 0)
2814 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2821 /* If this is fp + constant, the equivalent is a better operand since
2822 it may let us predict the value of the comparison. */
2823 else if (NONZERO_BASE_PLUS_P (p->exp))
2830 /* If we didn't find a useful equivalence for ARG1, we are done.
2831 Otherwise, set up for the next iteration. */
2835 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2836 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2837 code = GET_CODE (x);
2840 code = reverse_condition (code);
2843 /* Return our results. Return the modes from before fold_rtx
2844 because fold_rtx might produce const_int, and then it's too late. */
2845 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2846 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2851 /* Try to simplify a unary operation CODE whose output mode is to be
2852 MODE with input operand OP whose mode was originally OP_MODE.
2853 Return zero if no simplification can be made. */
2856 simplify_unary_operation (code, mode, op, op_mode)
2858 enum machine_mode mode;
2860 enum machine_mode op_mode;
2862 register int width = GET_MODE_BITSIZE (mode);
2864 /* The order of these tests is critical so that, for example, we don't
2865 check the wrong mode (input vs. output) for a conversion operation,
2866 such as FIX. At some point, this should be simplified. */
2868 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2869 if (code == FLOAT && GET_CODE (op) == CONST_INT)
2873 #ifdef REAL_ARITHMETIC
2874 REAL_VALUE_FROM_INT (d, INTVAL (op), INTVAL (op) < 0 ? ~0 : 0);
2876 d = (double) INTVAL (op);
2878 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2880 else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_INT)
2884 #ifdef REAL_ARITHMETIC
2885 REAL_VALUE_FROM_INT (d, INTVAL (op), 0);
2887 d = (double) (unsigned int) INTVAL (op);
2889 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2892 else if (code == FLOAT && GET_CODE (op) == CONST_DOUBLE
2893 && GET_MODE (op) == VOIDmode)
2897 #ifdef REAL_ARITHMETIC
2898 REAL_VALUE_FROM_INT (d, CONST_DOUBLE_LOW (op), CONST_DOUBLE_HIGH (op));
2900 if (CONST_DOUBLE_HIGH (op) < 0)
2902 d = (double) (~ CONST_DOUBLE_HIGH (op));
2903 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2904 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2905 d += (double) (unsigned HOST_WIDE_INT) (~ CONST_DOUBLE_LOW (op));
2910 d = (double) CONST_DOUBLE_HIGH (op);
2911 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2912 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2913 d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
2915 #endif /* REAL_ARITHMETIC */
2916 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2918 else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_DOUBLE
2919 && GET_MODE (op) == VOIDmode)
2923 #ifdef REAL_ARITHMETIC
2924 REAL_VALUE_FROM_UNSIGNED_INT (d, CONST_DOUBLE_LOW (op),
2925 CONST_DOUBLE_HIGH (op));
2927 d = (double) CONST_DOUBLE_HIGH (op);
2928 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2929 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2930 d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
2931 #endif /* REAL_ARITHMETIC */
2932 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2936 if (GET_CODE (op) == CONST_INT
2937 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
2939 register HOST_WIDE_INT arg0 = INTVAL (op);
2940 register HOST_WIDE_INT val;
2953 val = (arg0 >= 0 ? arg0 : - arg0);
2957 /* Don't use ffs here. Instead, get low order bit and then its
2958 number. If arg0 is zero, this will return 0, as desired. */
2959 arg0 &= GET_MODE_MASK (mode);
2960 val = exact_log2 (arg0 & (- arg0)) + 1;
2968 if (op_mode == VOIDmode)
2970 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
2972 /* If we were really extending the mode,
2973 we would have to distinguish between zero-extension
2974 and sign-extension. */
2975 if (width != GET_MODE_BITSIZE (op_mode))
2979 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
2980 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
2986 if (op_mode == VOIDmode)
2988 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
2990 /* If we were really extending the mode,
2991 we would have to distinguish between zero-extension
2992 and sign-extension. */
2993 if (width != GET_MODE_BITSIZE (op_mode))
2997 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3000 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3002 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3003 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3016 /* Clear the bits that don't belong in our mode,
3017 unless they and our sign bit are all one.
3018 So we get either a reasonable negative value or a reasonable
3019 unsigned value for this mode. */
3020 if (width < HOST_BITS_PER_WIDE_INT
3021 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3022 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3023 val &= (1 << width) - 1;
3025 return GEN_INT (val);
3028 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3029 for a DImode operation on a CONST_INT. */
3030 else if (GET_MODE (op) == VOIDmode
3031 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3033 HOST_WIDE_INT l1, h1, lv, hv;
3035 if (GET_CODE (op) == CONST_DOUBLE)
3036 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3038 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3048 neg_double (l1, h1, &lv, &hv);
3053 neg_double (l1, h1, &lv, &hv);
3061 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3063 lv = exact_log2 (l1 & (-l1)) + 1;
3067 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3068 return GEN_INT (l1 & GET_MODE_MASK (mode));
3074 if (op_mode == VOIDmode
3075 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3079 lv = l1 & GET_MODE_MASK (op_mode);
3083 if (op_mode == VOIDmode
3084 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3088 lv = l1 & GET_MODE_MASK (op_mode);
3089 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3090 && (lv & ((HOST_WIDE_INT) 1
3091 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3092 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3094 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3105 return immed_double_const (lv, hv, mode);
3108 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3109 else if (GET_CODE (op) == CONST_DOUBLE
3110 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3116 if (setjmp (handler))
3117 /* There used to be a warning here, but that is inadvisable.
3118 People may want to cause traps, and the natural way
3119 to do it should not get a warning. */
3122 set_float_handler (handler);
3124 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3129 d = REAL_VALUE_NEGATE (d);
3133 if (REAL_VALUE_NEGATIVE (d))
3134 d = REAL_VALUE_NEGATE (d);
3137 case FLOAT_TRUNCATE:
3138 d = real_value_truncate (mode, d);
3142 /* All this does is change the mode. */
3146 d = REAL_VALUE_RNDZINT (d);
3150 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3160 x = immed_real_const_1 (d, mode);
3161 set_float_handler (NULL_PTR);
3164 else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE_CLASS (mode) == MODE_INT
3165 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3171 if (setjmp (handler))
3174 set_float_handler (handler);
3176 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3181 val = REAL_VALUE_FIX (d);
3185 val = REAL_VALUE_UNSIGNED_FIX (d);
3192 set_float_handler (NULL_PTR);
3194 /* Clear the bits that don't belong in our mode,
3195 unless they and our sign bit are all one.
3196 So we get either a reasonable negative value or a reasonable
3197 unsigned value for this mode. */
3198 if (width < HOST_BITS_PER_WIDE_INT
3199 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3200 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3201 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3203 return GEN_INT (val);
3206 /* This was formerly used only for non-IEEE float.
3207 eggert@twinsun.com says it is safe for IEEE also. */
3210 /* There are some simplifications we can do even if the operands
3216 /* (not (not X)) == X, similarly for NEG. */
3217 if (GET_CODE (op) == code)
3218 return XEXP (op, 0);
3222 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3223 becomes just the MINUS if its mode is MODE. This allows
3224 folding switch statements on machines using casesi (such as
3226 if (GET_CODE (op) == TRUNCATE
3227 && GET_MODE (XEXP (op, 0)) == mode
3228 && GET_CODE (XEXP (op, 0)) == MINUS
3229 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3230 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3231 return XEXP (op, 0);
3239 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3240 and OP1. Return 0 if no simplification is possible.
3242 Don't use this for relational operations such as EQ or LT.
3243 Use simplify_relational_operation instead. */
3246 simplify_binary_operation (code, mode, op0, op1)
3248 enum machine_mode mode;
3251 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3253 int width = GET_MODE_BITSIZE (mode);
3256 /* Relational operations don't work here. We must know the mode
3257 of the operands in order to do the comparison correctly.
3258 Assuming a full word can give incorrect results.
3259 Consider comparing 128 with -128 in QImode. */
3261 if (GET_RTX_CLASS (code) == '<')
3264 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3265 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3266 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3267 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3269 REAL_VALUE_TYPE f0, f1, value;
3272 if (setjmp (handler))
3275 set_float_handler (handler);
3277 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3278 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3279 f0 = real_value_truncate (mode, f0);
3280 f1 = real_value_truncate (mode, f1);
3282 #ifdef REAL_ARITHMETIC
3283 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3297 #ifndef REAL_INFINITY
3304 value = MIN (f0, f1);
3307 value = MAX (f0, f1);
3314 set_float_handler (NULL_PTR);
3315 value = real_value_truncate (mode, value);
3316 return immed_real_const_1 (value, mode);
3318 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3320 /* We can fold some multi-word operations. */
3321 if (GET_MODE_CLASS (mode) == MODE_INT
3322 && GET_CODE (op0) == CONST_DOUBLE
3323 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3325 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3327 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3329 if (GET_CODE (op1) == CONST_DOUBLE)
3330 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3332 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3337 /* A - B == A + (-B). */
3338 neg_double (l2, h2, &lv, &hv);
3341 /* .. fall through ... */
3344 add_double (l1, h1, l2, h2, &lv, &hv);
3348 mul_double (l1, h1, l2, h2, &lv, &hv);
3351 case DIV: case MOD: case UDIV: case UMOD:
3352 /* We'd need to include tree.h to do this and it doesn't seem worth
3357 lv = l1 & l2, hv = h1 & h2;
3361 lv = l1 | l2, hv = h1 | h2;
3365 lv = l1 ^ l2, hv = h1 ^ h2;
3371 && ((unsigned HOST_WIDE_INT) l1
3372 < (unsigned HOST_WIDE_INT) l2)))
3381 && ((unsigned HOST_WIDE_INT) l1
3382 > (unsigned HOST_WIDE_INT) l2)))
3389 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3391 && ((unsigned HOST_WIDE_INT) l1
3392 < (unsigned HOST_WIDE_INT) l2)))
3399 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3401 && ((unsigned HOST_WIDE_INT) l1
3402 > (unsigned HOST_WIDE_INT) l2)))
3408 case LSHIFTRT: case ASHIFTRT:
3409 case ASHIFT: case LSHIFT:
3410 case ROTATE: case ROTATERT:
3411 #ifdef SHIFT_COUNT_TRUNCATED
3412 if (SHIFT_COUNT_TRUNCATED)
3413 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3416 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3419 if (code == LSHIFTRT || code == ASHIFTRT)
3420 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3422 else if (code == ASHIFT || code == LSHIFT)
3423 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3425 else if (code == ROTATE)
3426 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3427 else /* code == ROTATERT */
3428 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3435 return immed_double_const (lv, hv, mode);
3438 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3439 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3441 /* Even if we can't compute a constant result,
3442 there are some cases worth simplifying. */
3447 /* In IEEE floating point, x+0 is not the same as x. Similarly
3448 for the other optimizations below. */
3449 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3450 && FLOAT_MODE_P (mode))
3453 if (op1 == CONST0_RTX (mode))
3456 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3457 if (GET_CODE (op0) == NEG)
3458 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3459 else if (GET_CODE (op1) == NEG)
3460 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3462 /* Handle both-operands-constant cases. We can only add
3463 CONST_INTs to constants since the sum of relocatable symbols
3464 can't be handled by most assemblers. */
3466 if (CONSTANT_P (op0) && GET_CODE (op1) == CONST_INT)
3467 return plus_constant (op0, INTVAL (op1));
3468 else if (CONSTANT_P (op1) && GET_CODE (op0) == CONST_INT)
3469 return plus_constant (op1, INTVAL (op0));
3471 /* If one of the operands is a PLUS or a MINUS, see if we can
3472 simplify this by the associative law.
3473 Don't use the associative law for floating point.
3474 The inaccuracy makes it nonassociative,
3475 and subtle programs can break if operations are associated. */
3477 if (INTEGRAL_MODE_P (mode)
3478 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3479 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3480 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3486 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3487 using cc0, in which case we want to leave it as a COMPARE
3488 so we can distinguish it from a register-register-copy.
3490 In IEEE floating point, x-0 is not the same as x. */
3492 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3493 || ! FLOAT_MODE_P (mode))
3494 && op1 == CONST0_RTX (mode))
3497 /* Do nothing here. */
3502 /* None of these optimizations can be done for IEEE
3504 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3505 && FLOAT_MODE_P (mode))
3508 /* We can't assume x-x is 0 even with non-IEEE floating point. */
3509 if (rtx_equal_p (op0, op1)
3510 && ! side_effects_p (op0)
3511 && ! FLOAT_MODE_P (mode))
3514 /* Change subtraction from zero into negation. */
3515 if (op0 == CONST0_RTX (mode))
3516 return gen_rtx (NEG, mode, op1);
3518 /* (-1 - a) is ~a. */
3519 if (op0 == constm1_rtx)
3520 return gen_rtx (NOT, mode, op1);
3522 /* Subtracting 0 has no effect. */
3523 if (op1 == CONST0_RTX (mode))
3526 /* (a - (-b)) -> (a + b). */
3527 if (GET_CODE (op1) == NEG)
3528 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3530 /* If one of the operands is a PLUS or a MINUS, see if we can
3531 simplify this by the associative law.
3532 Don't use the associative law for floating point.
3533 The inaccuracy makes it nonassociative,
3534 and subtle programs can break if operations are associated. */
3536 if (INTEGRAL_MODE_P (mode)
3537 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3538 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3539 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3542 /* Don't let a relocatable value get a negative coeff. */
3543 if (GET_CODE (op1) == CONST_INT)
3544 return plus_constant (op0, - INTVAL (op1));
3548 if (op1 == constm1_rtx)
3550 tem = simplify_unary_operation (NEG, mode, op0, mode);
3552 return tem ? tem : gen_rtx (NEG, mode, op0);
3555 /* In IEEE floating point, x*0 is not always 0. */
3556 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3557 && ! FLOAT_MODE_P (mode))
3558 && op1 == CONST0_RTX (mode)
3559 && ! side_effects_p (op0))
3562 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3563 However, ANSI says we can drop signals,
3564 so we can do this anyway. */
3565 if (op1 == CONST1_RTX (mode))
3568 /* Convert multiply by constant power of two into shift. */
3569 if (GET_CODE (op1) == CONST_INT
3570 && (val = exact_log2 (INTVAL (op1))) >= 0)
3571 return gen_rtx (ASHIFT, mode, op0, GEN_INT (val));
3573 if (GET_CODE (op1) == CONST_DOUBLE
3574 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3578 int op1is2, op1ism1;
3580 if (setjmp (handler))
3583 set_float_handler (handler);
3584 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3585 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3586 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3587 set_float_handler (NULL_PTR);
3589 /* x*2 is x+x and x*(-1) is -x */
3590 if (op1is2 && GET_MODE (op0) == mode)
3591 return gen_rtx (PLUS, mode, op0, copy_rtx (op0));
3593 else if (op1ism1 && GET_MODE (op0) == mode)
3594 return gen_rtx (NEG, mode, op0);
3599 if (op1 == const0_rtx)
3601 if (GET_CODE (op1) == CONST_INT
3602 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3604 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3606 /* A | (~A) -> -1 */
3607 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3608 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3609 && ! side_effects_p (op0)
3610 && GET_MODE_CLASS (mode) != MODE_CC)
3615 if (op1 == const0_rtx)
3617 if (GET_CODE (op1) == CONST_INT
3618 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3619 return gen_rtx (NOT, mode, op0);
3620 if (op0 == op1 && ! side_effects_p (op0)
3621 && GET_MODE_CLASS (mode) != MODE_CC)
3626 if (op1 == const0_rtx && ! side_effects_p (op0))
3628 if (GET_CODE (op1) == CONST_INT
3629 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3631 if (op0 == op1 && ! side_effects_p (op0)
3632 && GET_MODE_CLASS (mode) != MODE_CC)
3635 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3636 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3637 && ! side_effects_p (op0)
3638 && GET_MODE_CLASS (mode) != MODE_CC)
3643 /* Convert divide by power of two into shift (divide by 1 handled
3645 if (GET_CODE (op1) == CONST_INT
3646 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3647 return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1));
3649 /* ... fall through ... */
3652 if (op1 == CONST1_RTX (mode))
3655 /* In IEEE floating point, 0/x is not always 0. */
3656 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3657 || ! FLOAT_MODE_P (mode))
3658 && op0 == CONST0_RTX (mode)
3659 && ! side_effects_p (op1))
3662 #if 0 /* Turned off till an expert says this is a safe thing to do. */
3663 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3664 /* Change division by a constant into multiplication. */
3665 else if (GET_CODE (op1) == CONST_DOUBLE
3666 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3667 && op1 != CONST0_RTX (mode))
3670 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3671 if (REAL_VALUES_EQUAL (d, dconst0))
3673 #if defined (REAL_ARITHMETIC)
3674 REAL_ARITHMETIC (d, (int) RDIV_EXPR, dconst1, d);
3675 return gen_rtx (MULT, mode, op0,
3676 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3678 return gen_rtx (MULT, mode, op0,
3679 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3687 /* Handle modulus by power of two (mod with 1 handled below). */
3688 if (GET_CODE (op1) == CONST_INT
3689 && exact_log2 (INTVAL (op1)) > 0)
3690 return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1));
3692 /* ... fall through ... */
3695 if ((op0 == const0_rtx || op1 == const1_rtx)
3696 && ! side_effects_p (op0) && ! side_effects_p (op1))
3702 /* Rotating ~0 always results in ~0. */
3703 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
3704 && INTVAL (op0) == GET_MODE_MASK (mode)
3705 && ! side_effects_p (op1))
3708 /* ... fall through ... */
3714 if (op1 == const0_rtx)
3716 if (op0 == const0_rtx && ! side_effects_p (op1))
3721 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3722 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
3723 && ! side_effects_p (op0))
3725 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3730 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3732 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
3733 && ! side_effects_p (op0))
3735 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3740 if (op1 == const0_rtx && ! side_effects_p (op0))
3742 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3747 if (op1 == constm1_rtx && ! side_effects_p (op0))
3749 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3760 /* Get the integer argument values in two forms:
3761 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3763 arg0 = INTVAL (op0);
3764 arg1 = INTVAL (op1);
3766 if (width < HOST_BITS_PER_WIDE_INT)
3768 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
3769 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
3772 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
3773 arg0s |= ((HOST_WIDE_INT) (-1) << width);
3776 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
3777 arg1s |= ((HOST_WIDE_INT) (-1) << width);
3785 /* Compute the value of the arithmetic. */
3790 val = arg0s + arg1s;
3794 val = arg0s - arg1s;
3798 val = arg0s * arg1s;
3804 val = arg0s / arg1s;
3810 val = arg0s % arg1s;
3816 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
3822 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
3838 /* If shift count is undefined, don't fold it; let the machine do
3839 what it wants. But truncate it if the machine will do that. */
3843 #ifdef SHIFT_COUNT_TRUNCATED
3844 if (SHIFT_COUNT_TRUNCATED)
3845 arg1 &= (BITS_PER_WORD - 1);
3851 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
3859 #ifdef SHIFT_COUNT_TRUNCATED
3860 if (SHIFT_COUNT_TRUNCATED)
3861 arg1 &= (BITS_PER_WORD - 1);
3867 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
3874 #ifdef SHIFT_COUNT_TRUNCATED
3875 if (SHIFT_COUNT_TRUNCATED)
3876 arg1 &= (BITS_PER_WORD - 1);
3882 val = arg0s >> arg1;
3884 /* Bootstrap compiler may not have sign extended the right shift.
3885 Manually extend the sign to insure bootstrap cc matches gcc. */
3886 if (arg0s < 0 && arg1 > 0)
3887 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
3896 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
3897 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
3905 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
3906 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
3910 /* Do nothing here. */
3914 val = arg0s <= arg1s ? arg0s : arg1s;
3918 val = ((unsigned HOST_WIDE_INT) arg0
3919 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
3923 val = arg0s > arg1s ? arg0s : arg1s;
3927 val = ((unsigned HOST_WIDE_INT) arg0
3928 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
3935 /* Clear the bits that don't belong in our mode, unless they and our sign
3936 bit are all one. So we get either a reasonable negative value or a
3937 reasonable unsigned value for this mode. */
3938 if (width < HOST_BITS_PER_WIDE_INT
3939 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3940 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3941 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3943 return GEN_INT (val);
3946 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
3949 Rather than test for specific case, we do this by a brute-force method
3950 and do all possible simplifications until no more changes occur. Then
3951 we rebuild the operation. */
3954 simplify_plus_minus (code, mode, op0, op1)
3956 enum machine_mode mode;
3962 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
3963 int first = 1, negate = 0, changed;
3966 bzero (ops, sizeof ops);
3968 /* Set up the two operands and then expand them until nothing has been
3969 changed. If we run out of room in our array, give up; this should
3970 almost never happen. */
3972 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
3979 for (i = 0; i < n_ops; i++)
3980 switch (GET_CODE (ops[i]))
3987 ops[n_ops] = XEXP (ops[i], 1);
3988 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
3989 ops[i] = XEXP (ops[i], 0);
3995 ops[i] = XEXP (ops[i], 0);
3996 negs[i] = ! negs[i];
4001 ops[i] = XEXP (ops[i], 0);
4007 /* ~a -> (-a - 1) */
4010 ops[n_ops] = constm1_rtx;
4011 negs[n_ops++] = negs[i];
4012 ops[i] = XEXP (ops[i], 0);
4013 negs[i] = ! negs[i];
4020 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4025 /* If we only have two operands, we can't do anything. */
4029 /* Now simplify each pair of operands until nothing changes. The first
4030 time through just simplify constants against each other. */
4037 for (i = 0; i < n_ops - 1; i++)
4038 for (j = i + 1; j < n_ops; j++)
4039 if (ops[i] != 0 && ops[j] != 0
4040 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4042 rtx lhs = ops[i], rhs = ops[j];
4043 enum rtx_code ncode = PLUS;
4045 if (negs[i] && ! negs[j])
4046 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4047 else if (! negs[i] && negs[j])
4050 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4053 ops[i] = tem, ops[j] = 0;
4054 negs[i] = negs[i] && negs[j];
4055 if (GET_CODE (tem) == NEG)
4056 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4058 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4059 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4067 /* Pack all the operands to the lower-numbered entries and give up if
4068 we didn't reduce the number of operands we had. Make sure we
4069 count a CONST as two operands. If we have the same number of
4070 operands, but have made more CONSTs than we had, this is also
4071 an improvement, so accept it. */
4073 for (i = 0, j = 0; j < n_ops; j++)
4076 ops[i] = ops[j], negs[i++] = negs[j];
4077 if (GET_CODE (ops[j]) == CONST)
4081 if (i + n_consts > input_ops
4082 || (i + n_consts == input_ops && n_consts <= input_consts))
4087 /* If we have a CONST_INT, put it last. */
4088 for (i = 0; i < n_ops - 1; i++)
4089 if (GET_CODE (ops[i]) == CONST_INT)
4091 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4092 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4095 /* Put a non-negated operand first. If there aren't any, make all
4096 operands positive and negate the whole thing later. */
4097 for (i = 0; i < n_ops && negs[i]; i++)
4102 for (i = 0; i < n_ops; i++)
4108 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4109 j = negs[0], negs[0] = negs[i], negs[i] = j;
4112 /* Now make the result by performing the requested operations. */
4114 for (i = 1; i < n_ops; i++)
4115 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4117 return negate ? gen_rtx (NEG, mode, result) : result;
4120 /* Make a binary operation by properly ordering the operands and
4121 seeing if the expression folds. */
4124 cse_gen_binary (code, mode, op0, op1)
4126 enum machine_mode mode;
4131 /* Put complex operands first and constants second if commutative. */
4132 if (GET_RTX_CLASS (code) == 'c'
4133 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4134 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4135 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4136 || (GET_CODE (op0) == SUBREG
4137 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4138 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4139 tem = op0, op0 = op1, op1 = tem;
4141 /* If this simplifies, do it. */
4142 tem = simplify_binary_operation (code, mode, op0, op1);
4147 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4148 just form the operation. */
4150 if (code == PLUS && GET_CODE (op1) == CONST_INT
4151 && GET_MODE (op0) != VOIDmode)
4152 return plus_constant (op0, INTVAL (op1));
4153 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4154 && GET_MODE (op0) != VOIDmode)
4155 return plus_constant (op0, - INTVAL (op1));
4157 return gen_rtx (code, mode, op0, op1);
4160 /* Like simplify_binary_operation except used for relational operators.
4161 MODE is the mode of the operands, not that of the result. */
4164 simplify_relational_operation (code, mode, op0, op1)
4166 enum machine_mode mode;
4169 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
4171 int width = GET_MODE_BITSIZE (mode);
4173 /* If op0 is a compare, extract the comparison arguments from it. */
4174 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4175 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4177 /* What to do with MODE_CC isn't clear yet.
4178 Let's make sure nothing erroneous is done. */
4179 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
4182 /* Unlike the arithmetic operations, we can do the comparison whether
4183 or not WIDTH is larger than HOST_BITS_PER_WIDE_INT because the
4184 CONST_INTs are to be understood as being infinite precision as
4185 is the comparison. So there is no question of overflow. */
4187 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT || width == 0)
4189 /* Even if we can't compute a constant result,
4190 there are some cases worth simplifying. */
4192 /* For non-IEEE floating-point, if the two operands are equal, we know
4194 if (rtx_equal_p (op0, op1)
4195 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4196 || ! FLOAT_MODE_P (GET_MODE (op0))))
4197 return (code == EQ || code == GE || code == LE || code == LEU
4198 || code == GEU) ? const_true_rtx : const0_rtx;
4200 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4201 else if (GET_CODE (op0) == CONST_DOUBLE
4202 && GET_CODE (op1) == CONST_DOUBLE
4203 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4205 REAL_VALUE_TYPE d0, d1;
4207 int op0lt, op1lt, equal;
4209 if (setjmp (handler))
4212 set_float_handler (handler);
4213 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4214 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4215 equal = REAL_VALUES_EQUAL (d0, d1);
4216 op0lt = REAL_VALUES_LESS (d0, d1);
4217 op1lt = REAL_VALUES_LESS (d1, d0);
4218 set_float_handler (NULL_PTR);
4223 return equal ? const_true_rtx : const0_rtx;
4225 return !equal ? const_true_rtx : const0_rtx;
4227 return equal || op0lt ? const_true_rtx : const0_rtx;
4229 return op0lt ? const_true_rtx : const0_rtx;
4231 return equal || op1lt ? const_true_rtx : const0_rtx;
4233 return op1lt ? const_true_rtx : const0_rtx;
4236 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4238 else if (GET_MODE_CLASS (mode) == MODE_INT
4239 && width > HOST_BITS_PER_WIDE_INT
4240 && (GET_CODE (op0) == CONST_DOUBLE
4241 || GET_CODE (op0) == CONST_INT)
4242 && (GET_CODE (op1) == CONST_DOUBLE
4243 || GET_CODE (op1) == CONST_INT))
4245 HOST_WIDE_INT h0, l0, h1, l1;
4246 unsigned HOST_WIDE_INT uh0, ul0, uh1, ul1;
4247 int op0lt, op0ltu, equal;
4249 if (GET_CODE (op0) == CONST_DOUBLE)
4250 l0 = CONST_DOUBLE_LOW (op0), h0 = CONST_DOUBLE_HIGH (op0);
4252 l0 = INTVAL (op0), h0 = l0 < 0 ? -1 : 0;
4254 if (GET_CODE (op1) == CONST_DOUBLE)
4255 l1 = CONST_DOUBLE_LOW (op1), h1 = CONST_DOUBLE_HIGH (op1);
4257 l1 = INTVAL (op1), h1 = l1 < 0 ? -1 : 0;
4259 uh0 = h0, ul0 = l0, uh1 = h1, ul1 = l1;
4261 equal = (h0 == h1 && l0 == l1);
4262 op0lt = (h0 < h1 || (h0 == h1 && l0 < l1));
4263 op0ltu = (uh0 < uh1 || (uh0 == uh1 && ul0 < ul1));
4268 return equal ? const_true_rtx : const0_rtx;
4270 return !equal ? const_true_rtx : const0_rtx;
4272 return equal || op0lt ? const_true_rtx : const0_rtx;
4274 return op0lt ? const_true_rtx : const0_rtx;
4276 return !op0lt ? const_true_rtx : const0_rtx;
4278 return !equal && !op0lt ? const_true_rtx : const0_rtx;
4280 return equal || op0ltu ? const_true_rtx : const0_rtx;
4282 return op0ltu ? const_true_rtx : const0_rtx;
4284 return !op0ltu ? const_true_rtx : const0_rtx;
4286 return !equal && !op0ltu ? const_true_rtx : const0_rtx;
4295 /* We can't make this assumption due to #pragma weak */
4296 if (CONSTANT_P (op0) && op1 == const0_rtx)
4299 if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx
4300 /* On some machines, the ap reg can be 0 sometimes. */
4301 && op0 != arg_pointer_rtx)
4308 /* We can't make this assumption due to #pragma weak */
4309 if (CONSTANT_P (op0) && op1 == const0_rtx)
4310 return const_true_rtx;
4312 if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx
4313 /* On some machines, the ap reg can be 0 sometimes. */
4314 && op0 != arg_pointer_rtx)
4315 return const_true_rtx;
4319 /* Unsigned values are never negative, but we must be sure we are
4320 actually comparing a value, not a CC operand. */
4321 if (op1 == const0_rtx && INTEGRAL_MODE_P (mode))
4322 return const_true_rtx;
4326 if (op1 == const0_rtx && INTEGRAL_MODE_P (mode))
4331 /* Unsigned values are never greater than the largest
4333 if (GET_CODE (op1) == CONST_INT
4334 && INTVAL (op1) == GET_MODE_MASK (mode)
4335 && INTEGRAL_MODE_P (mode))
4336 return const_true_rtx;
4340 if (GET_CODE (op1) == CONST_INT
4341 && INTVAL (op1) == GET_MODE_MASK (mode)
4342 && INTEGRAL_MODE_P (mode))
4350 /* Get the integer argument values in two forms:
4351 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4353 arg0 = INTVAL (op0);
4354 arg1 = INTVAL (op1);
4356 if (width < HOST_BITS_PER_WIDE_INT)
4358 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4359 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4362 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4363 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4366 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4367 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4375 /* Compute the value of the arithmetic. */
4380 val = arg0 != arg1 ? STORE_FLAG_VALUE : 0;
4384 val = arg0 == arg1 ? STORE_FLAG_VALUE : 0;
4388 val = arg0s <= arg1s ? STORE_FLAG_VALUE : 0;
4392 val = arg0s < arg1s ? STORE_FLAG_VALUE : 0;
4396 val = arg0s >= arg1s ? STORE_FLAG_VALUE : 0;
4400 val = arg0s > arg1s ? STORE_FLAG_VALUE : 0;
4404 val = (((unsigned HOST_WIDE_INT) arg0)
4405 <= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
4409 val = (((unsigned HOST_WIDE_INT) arg0)
4410 < ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
4414 val = (((unsigned HOST_WIDE_INT) arg0)
4415 >= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
4419 val = (((unsigned HOST_WIDE_INT) arg0)
4420 > ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
4427 /* Clear the bits that don't belong in our mode, unless they and our sign
4428 bit are all one. So we get either a reasonable negative value or a
4429 reasonable unsigned value for this mode. */
4430 if (width < HOST_BITS_PER_WIDE_INT
4431 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4432 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4433 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4435 return GEN_INT (val);
4438 /* Simplify CODE, an operation with result mode MODE and three operands,
4439 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4440 a constant. Return 0 if no simplifications is possible. */
4443 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4445 enum machine_mode mode, op0_mode;
4448 int width = GET_MODE_BITSIZE (mode);
4450 /* VOIDmode means "infinite" precision. */
4452 width = HOST_BITS_PER_WIDE_INT;
4458 if (GET_CODE (op0) == CONST_INT
4459 && GET_CODE (op1) == CONST_INT
4460 && GET_CODE (op2) == CONST_INT
4461 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4462 && width <= HOST_BITS_PER_WIDE_INT)
4464 /* Extracting a bit-field from a constant */
4465 HOST_WIDE_INT val = INTVAL (op0);
4468 val >>= (GET_MODE_BITSIZE (op0_mode) - INTVAL (op2) - INTVAL (op1));
4470 val >>= INTVAL (op2);
4472 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4474 /* First zero-extend. */
4475 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4476 /* If desired, propagate sign bit. */
4477 if (code == SIGN_EXTRACT
4478 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4479 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4482 /* Clear the bits that don't belong in our mode,
4483 unless they and our sign bit are all one.
4484 So we get either a reasonable negative value or a reasonable
4485 unsigned value for this mode. */
4486 if (width < HOST_BITS_PER_WIDE_INT
4487 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4488 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4489 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4491 return GEN_INT (val);
4496 if (GET_CODE (op0) == CONST_INT)
4497 return op0 != const0_rtx ? op1 : op2;
4507 /* If X is a nontrivial arithmetic operation on an argument
4508 for which a constant value can be determined, return
4509 the result of operating on that value, as a constant.
4510 Otherwise, return X, possibly with one or more operands
4511 modified by recursive calls to this function.
4513 If X is a register whose contents are known, we do NOT
4514 return those contents here. equiv_constant is called to
4517 INSN is the insn that we may be modifying. If it is 0, make a copy
4518 of X before modifying it. */
4525 register enum rtx_code code;
4526 register enum machine_mode mode;
4533 /* Folded equivalents of first two operands of X. */
4537 /* Constant equivalents of first three operands of X;
4538 0 when no such equivalent is known. */
4543 /* The mode of the first operand of X. We need this for sign and zero
4545 enum machine_mode mode_arg0;
4550 mode = GET_MODE (x);
4551 code = GET_CODE (x);
4560 /* No use simplifying an EXPR_LIST
4561 since they are used only for lists of args
4562 in a function call's REG_EQUAL note. */
4568 return prev_insn_cc0;
4572 /* If the next insn is a CODE_LABEL followed by a jump table,
4573 PC's value is a LABEL_REF pointing to that label. That
4574 lets us fold switch statements on the Vax. */
4575 if (insn && GET_CODE (insn) == JUMP_INSN)
4577 rtx next = next_nonnote_insn (insn);
4579 if (next && GET_CODE (next) == CODE_LABEL
4580 && NEXT_INSN (next) != 0
4581 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4582 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4583 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4584 return gen_rtx (LABEL_REF, Pmode, next);
4589 /* See if we previously assigned a constant value to this SUBREG. */
4590 if ((new = lookup_as_function (x, CONST_INT)) != 0
4591 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4594 /* If this is a paradoxical SUBREG, we have no idea what value the
4595 extra bits would have. However, if the operand is equivalent
4596 to a SUBREG whose operand is the same as our mode, and all the
4597 modes are within a word, we can just use the inner operand
4598 because these SUBREGs just say how to treat the register.
4600 Similarly if we find an integer constant. */
4602 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4604 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4605 struct table_elt *elt;
4607 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4608 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4609 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4611 for (elt = elt->first_same_value;
4612 elt; elt = elt->next_same_value)
4614 if (CONSTANT_P (elt->exp)
4615 && GET_MODE (elt->exp) == VOIDmode)
4618 if (GET_CODE (elt->exp) == SUBREG
4619 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4620 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4621 return copy_rtx (SUBREG_REG (elt->exp));
4627 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4628 We might be able to if the SUBREG is extracting a single word in an
4629 integral mode or extracting the low part. */
4631 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4632 const_arg0 = equiv_constant (folded_arg0);
4634 folded_arg0 = const_arg0;
4636 if (folded_arg0 != SUBREG_REG (x))
4640 if (GET_MODE_CLASS (mode) == MODE_INT
4641 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4642 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4643 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4644 GET_MODE (SUBREG_REG (x)));
4645 if (new == 0 && subreg_lowpart_p (x))
4646 new = gen_lowpart_if_possible (mode, folded_arg0);
4651 /* If this is a narrowing SUBREG and our operand is a REG, see if
4652 we can find an equivalence for REG that is an arithmetic operation
4653 in a wider mode where both operands are paradoxical SUBREGs
4654 from objects of our result mode. In that case, we couldn't report
4655 an equivalent value for that operation, since we don't know what the
4656 extra bits will be. But we can find an equivalence for this SUBREG
4657 by folding that operation is the narrow mode. This allows us to
4658 fold arithmetic in narrow modes when the machine only supports
4659 word-sized arithmetic.
4661 Also look for a case where we have a SUBREG whose operand is the
4662 same as our result. If both modes are smaller than a word, we
4663 are simply interpreting a register in different modes and we
4664 can use the inner value. */
4666 if (GET_CODE (folded_arg0) == REG
4667 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4668 && subreg_lowpart_p (x))
4670 struct table_elt *elt;
4672 /* We can use HASH here since we know that canon_hash won't be
4674 elt = lookup (folded_arg0,
4675 HASH (folded_arg0, GET_MODE (folded_arg0)),
4676 GET_MODE (folded_arg0));
4679 elt = elt->first_same_value;
4681 for (; elt; elt = elt->next_same_value)
4683 enum rtx_code eltcode = GET_CODE (elt->exp);
4685 /* Just check for unary and binary operations. */
4686 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4687 && GET_CODE (elt->exp) != SIGN_EXTEND
4688 && GET_CODE (elt->exp) != ZERO_EXTEND
4689 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4690 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4692 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4694 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4695 op0 = fold_rtx (op0, NULL_RTX);
4697 op0 = equiv_constant (op0);
4699 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4702 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4703 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4704 && eltcode != DIV && eltcode != MOD
4705 && eltcode != UDIV && eltcode != UMOD
4706 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4707 && eltcode != ROTATE && eltcode != ROTATERT
4708 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4709 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4711 || CONSTANT_P (XEXP (elt->exp, 0)))
4712 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4713 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4715 || CONSTANT_P (XEXP (elt->exp, 1))))
4717 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4718 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4720 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4721 op0 = fold_rtx (op0, NULL_RTX);
4724 op0 = equiv_constant (op0);
4726 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
4727 op1 = fold_rtx (op1, NULL_RTX);
4730 op1 = equiv_constant (op1);
4732 /* If we are looking for the low SImode part of
4733 (ashift:DI c (const_int 32)), it doesn't work
4734 to compute that in SImode, because a 32-bit shift
4735 in SImode is unpredictable. We know the value is 0. */
4737 && (GET_CODE (elt->exp) == ASHIFT
4738 || GET_CODE (elt->exp) == LSHIFT)
4739 && GET_CODE (op1) == CONST_INT
4740 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
4742 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
4744 /* If the count fits in the inner mode's width,
4745 but exceeds the outer mode's width,
4746 the value will get truncated to 0
4750 /* If the count exceeds even the inner mode's width,
4751 don't fold this expression. */
4754 else if (op0 && op1)
4755 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
4759 else if (GET_CODE (elt->exp) == SUBREG
4760 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4761 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
4763 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4764 new = copy_rtx (SUBREG_REG (elt->exp));
4775 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4776 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4777 new = lookup_as_function (XEXP (x, 0), code);
4779 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
4783 /* If we are not actually processing an insn, don't try to find the
4784 best address. Not only don't we care, but we could modify the
4785 MEM in an invalid way since we have no insn to validate against. */
4787 find_best_addr (insn, &XEXP (x, 0));
4790 /* Even if we don't fold in the insn itself,
4791 we can safely do so here, in hopes of getting a constant. */
4792 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
4794 HOST_WIDE_INT offset = 0;
4796 if (GET_CODE (addr) == REG
4797 && REGNO_QTY_VALID_P (REGNO (addr))
4798 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
4799 && qty_const[reg_qty[REGNO (addr)]] != 0)
4800 addr = qty_const[reg_qty[REGNO (addr)]];
4802 /* If address is constant, split it into a base and integer offset. */
4803 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
4805 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
4806 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
4808 base = XEXP (XEXP (addr, 0), 0);
4809 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
4811 else if (GET_CODE (addr) == LO_SUM
4812 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
4813 base = XEXP (addr, 1);
4815 /* If this is a constant pool reference, we can fold it into its
4816 constant to allow better value tracking. */
4817 if (base && GET_CODE (base) == SYMBOL_REF
4818 && CONSTANT_POOL_ADDRESS_P (base))
4820 rtx constant = get_pool_constant (base);
4821 enum machine_mode const_mode = get_pool_mode (base);
4824 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
4825 constant_pool_entries_cost = COST (constant);
4827 /* If we are loading the full constant, we have an equivalence. */
4828 if (offset == 0 && mode == const_mode)
4831 /* If this actually isn't a constant (wierd!), we can't do
4832 anything. Otherwise, handle the two most common cases:
4833 extracting a word from a multi-word constant, and extracting
4834 the low-order bits. Other cases don't seem common enough to
4836 if (! CONSTANT_P (constant))
4839 if (GET_MODE_CLASS (mode) == MODE_INT
4840 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4841 && offset % UNITS_PER_WORD == 0
4842 && (new = operand_subword (constant,
4843 offset / UNITS_PER_WORD,
4844 0, const_mode)) != 0)
4847 if (((BYTES_BIG_ENDIAN
4848 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
4849 || (! BYTES_BIG_ENDIAN && offset == 0))
4850 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
4854 /* If this is a reference to a label at a known position in a jump
4855 table, we also know its value. */
4856 if (base && GET_CODE (base) == LABEL_REF)
4858 rtx label = XEXP (base, 0);
4859 rtx table_insn = NEXT_INSN (label);
4861 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4862 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
4864 rtx table = PATTERN (table_insn);
4867 && (offset / GET_MODE_SIZE (GET_MODE (table))
4868 < XVECLEN (table, 0)))
4869 return XVECEXP (table, 0,
4870 offset / GET_MODE_SIZE (GET_MODE (table)));
4872 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4873 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
4875 rtx table = PATTERN (table_insn);
4878 && (offset / GET_MODE_SIZE (GET_MODE (table))
4879 < XVECLEN (table, 1)))
4881 offset /= GET_MODE_SIZE (GET_MODE (table));
4882 new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset),
4885 if (GET_MODE (table) != Pmode)
4886 new = gen_rtx (TRUNCATE, GET_MODE (table), new);
4900 mode_arg0 = VOIDmode;
4902 /* Try folding our operands.
4903 Then see which ones have constant values known. */
4905 fmt = GET_RTX_FORMAT (code);
4906 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4909 rtx arg = XEXP (x, i);
4910 rtx folded_arg = arg, const_arg = 0;
4911 enum machine_mode mode_arg = GET_MODE (arg);
4912 rtx cheap_arg, expensive_arg;
4913 rtx replacements[2];
4916 /* Most arguments are cheap, so handle them specially. */
4917 switch (GET_CODE (arg))
4920 /* This is the same as calling equiv_constant; it is duplicated
4922 if (REGNO_QTY_VALID_P (REGNO (arg))
4923 && qty_const[reg_qty[REGNO (arg)]] != 0
4924 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
4925 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
4927 = gen_lowpart_if_possible (GET_MODE (arg),
4928 qty_const[reg_qty[REGNO (arg)]]);
4941 folded_arg = prev_insn_cc0;
4942 mode_arg = prev_insn_cc0_mode;
4943 const_arg = equiv_constant (folded_arg);
4948 folded_arg = fold_rtx (arg, insn);
4949 const_arg = equiv_constant (folded_arg);
4952 /* For the first three operands, see if the operand
4953 is constant or equivalent to a constant. */
4957 folded_arg0 = folded_arg;
4958 const_arg0 = const_arg;
4959 mode_arg0 = mode_arg;
4962 folded_arg1 = folded_arg;
4963 const_arg1 = const_arg;
4966 const_arg2 = const_arg;
4970 /* Pick the least expensive of the folded argument and an
4971 equivalent constant argument. */
4972 if (const_arg == 0 || const_arg == folded_arg
4973 || COST (const_arg) > COST (folded_arg))
4974 cheap_arg = folded_arg, expensive_arg = const_arg;
4976 cheap_arg = const_arg, expensive_arg = folded_arg;
4978 /* Try to replace the operand with the cheapest of the two
4979 possibilities. If it doesn't work and this is either of the first
4980 two operands of a commutative operation, try swapping them.
4981 If THAT fails, try the more expensive, provided it is cheaper
4982 than what is already there. */
4984 if (cheap_arg == XEXP (x, i))
4987 if (insn == 0 && ! copied)
4993 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
4995 j < 2 && replacements[j]
4996 && COST (replacements[j]) < COST (XEXP (x, i));
4999 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5002 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5004 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5005 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5007 if (apply_change_group ())
5009 /* Swap them back to be invalid so that this loop can
5010 continue and flag them to be swapped back later. */
5013 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5022 else if (fmt[i] == 'E')
5023 /* Don't try to fold inside of a vector of expressions.
5024 Doing nothing is harmless. */
5027 /* If a commutative operation, place a constant integer as the second
5028 operand unless the first operand is also a constant integer. Otherwise,
5029 place any constant second unless the first operand is also a constant. */
5031 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5033 if (must_swap || (const_arg0
5035 || (GET_CODE (const_arg0) == CONST_INT
5036 && GET_CODE (const_arg1) != CONST_INT))))
5038 register rtx tem = XEXP (x, 0);
5040 if (insn == 0 && ! copied)
5046 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5047 validate_change (insn, &XEXP (x, 1), tem, 1);
5048 if (apply_change_group ())
5050 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5051 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5056 /* If X is an arithmetic operation, see if we can simplify it. */
5058 switch (GET_RTX_CLASS (code))
5061 /* We can't simplify extension ops unless we know the original mode. */
5062 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5063 && mode_arg0 == VOIDmode)
5065 new = simplify_unary_operation (code, mode,
5066 const_arg0 ? const_arg0 : folded_arg0,
5071 /* See what items are actually being compared and set FOLDED_ARG[01]
5072 to those values and CODE to the actual comparison code. If any are
5073 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5074 do anything if both operands are already known to be constant. */
5076 if (const_arg0 == 0 || const_arg1 == 0)
5078 struct table_elt *p0, *p1;
5079 rtx true = const_true_rtx, false = const0_rtx;
5080 enum machine_mode mode_arg1;
5082 #ifdef FLOAT_STORE_FLAG_VALUE
5083 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5085 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode);
5086 false = CONST0_RTX (mode);
5090 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5091 &mode_arg0, &mode_arg1);
5092 const_arg0 = equiv_constant (folded_arg0);
5093 const_arg1 = equiv_constant (folded_arg1);
5095 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5096 what kinds of things are being compared, so we can't do
5097 anything with this comparison. */
5099 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5102 /* If we do not now have two constants being compared, see if we
5103 can nevertheless deduce some things about the comparison. */
5104 if (const_arg0 == 0 || const_arg1 == 0)
5106 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5107 constant? These aren't zero, but we don't know their sign. */
5108 if (const_arg1 == const0_rtx
5109 && (NONZERO_BASE_PLUS_P (folded_arg0)
5110 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5112 || GET_CODE (folded_arg0) == SYMBOL_REF
5114 || GET_CODE (folded_arg0) == LABEL_REF
5115 || GET_CODE (folded_arg0) == CONST))
5119 else if (code == NE)
5123 /* See if the two operands are the same. We don't do this
5124 for IEEE floating-point since we can't assume x == x
5125 since x might be a NaN. */
5127 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5128 || ! FLOAT_MODE_P (mode_arg0))
5129 && (folded_arg0 == folded_arg1
5130 || (GET_CODE (folded_arg0) == REG
5131 && GET_CODE (folded_arg1) == REG
5132 && (reg_qty[REGNO (folded_arg0)]
5133 == reg_qty[REGNO (folded_arg1)]))
5134 || ((p0 = lookup (folded_arg0,
5135 (safe_hash (folded_arg0, mode_arg0)
5136 % NBUCKETS), mode_arg0))
5137 && (p1 = lookup (folded_arg1,
5138 (safe_hash (folded_arg1, mode_arg0)
5139 % NBUCKETS), mode_arg0))
5140 && p0->first_same_value == p1->first_same_value)))
5141 return ((code == EQ || code == LE || code == GE
5142 || code == LEU || code == GEU)
5145 /* If FOLDED_ARG0 is a register, see if the comparison we are
5146 doing now is either the same as we did before or the reverse
5147 (we only check the reverse if not floating-point). */
5148 else if (GET_CODE (folded_arg0) == REG)
5150 int qty = reg_qty[REGNO (folded_arg0)];
5152 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5153 && (comparison_dominates_p (qty_comparison_code[qty], code)
5154 || (comparison_dominates_p (qty_comparison_code[qty],
5155 reverse_condition (code))
5156 && ! FLOAT_MODE_P (mode_arg0)))
5157 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5159 && rtx_equal_p (qty_comparison_const[qty],
5161 || (GET_CODE (folded_arg1) == REG
5162 && (reg_qty[REGNO (folded_arg1)]
5163 == qty_comparison_qty[qty]))))
5164 return (comparison_dominates_p (qty_comparison_code[qty],
5171 /* If we are comparing against zero, see if the first operand is
5172 equivalent to an IOR with a constant. If so, we may be able to
5173 determine the result of this comparison. */
5175 if (const_arg1 == const0_rtx)
5177 rtx y = lookup_as_function (folded_arg0, IOR);
5181 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5182 && GET_CODE (inner_const) == CONST_INT
5183 && INTVAL (inner_const) != 0)
5185 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5186 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5187 && (INTVAL (inner_const)
5188 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5189 rtx true = const_true_rtx, false = const0_rtx;
5191 #ifdef FLOAT_STORE_FLAG_VALUE
5192 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5194 true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode);
5195 false = CONST0_RTX (mode);
5217 new = simplify_relational_operation (code, mode_arg0,
5218 const_arg0 ? const_arg0 : folded_arg0,
5219 const_arg1 ? const_arg1 : folded_arg1);
5220 #ifdef FLOAT_STORE_FLAG_VALUE
5221 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5222 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5223 : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode));
5232 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5233 with that LABEL_REF as its second operand. If so, the result is
5234 the first operand of that MINUS. This handles switches with an
5235 ADDR_DIFF_VEC table. */
5236 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5238 rtx y = lookup_as_function (folded_arg0, MINUS);
5240 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5241 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5247 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5248 If so, produce (PLUS Z C2-C). */
5249 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5251 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5252 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5253 return fold_rtx (plus_constant (copy_rtx (y),
5254 -INTVAL (const_arg1)),
5258 /* ... fall through ... */
5261 case SMIN: case SMAX: case UMIN: case UMAX:
5262 case IOR: case AND: case XOR:
5263 case MULT: case DIV: case UDIV:
5264 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5265 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5266 is known to be of similar form, we may be able to replace the
5267 operation with a combined operation. This may eliminate the
5268 intermediate operation if every use is simplified in this way.
5269 Note that the similar optimization done by combine.c only works
5270 if the intermediate operation's result has only one reference. */
5272 if (GET_CODE (folded_arg0) == REG
5273 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5276 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5277 rtx y = lookup_as_function (folded_arg0, code);
5279 enum rtx_code associate_code;
5283 || 0 == (inner_const
5284 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5285 || GET_CODE (inner_const) != CONST_INT
5286 /* If we have compiled a statement like
5287 "if (x == (x & mask1))", and now are looking at
5288 "x & mask2", we will have a case where the first operand
5289 of Y is the same as our first operand. Unless we detect
5290 this case, an infinite loop will result. */
5291 || XEXP (y, 0) == folded_arg0)
5294 /* Don't associate these operations if they are a PLUS with the
5295 same constant and it is a power of two. These might be doable
5296 with a pre- or post-increment. Similarly for two subtracts of
5297 identical powers of two with post decrement. */
5299 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5301 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5302 || exact_log2 (INTVAL (const_arg1)) >= 0
5304 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5305 || exact_log2 (- INTVAL (const_arg1)) >= 0
5310 /* Compute the code used to compose the constants. For example,
5311 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5314 = (code == MULT || code == DIV || code == UDIV ? MULT
5315 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5317 new_const = simplify_binary_operation (associate_code, mode,
5318 const_arg1, inner_const);
5323 /* If we are associating shift operations, don't let this
5324 produce a shift of the size of the object or larger.
5325 This could occur when we follow a sign-extend by a right
5326 shift on a machine that does a sign-extend as a pair
5329 if (is_shift && GET_CODE (new_const) == CONST_INT
5330 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5332 /* As an exception, we can turn an ASHIFTRT of this
5333 form into a shift of the number of bits - 1. */
5334 if (code == ASHIFTRT)
5335 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5340 y = copy_rtx (XEXP (y, 0));
5342 /* If Y contains our first operand (the most common way this
5343 can happen is if Y is a MEM), we would do into an infinite
5344 loop if we tried to fold it. So don't in that case. */
5346 if (! reg_mentioned_p (folded_arg0, y))
5347 y = fold_rtx (y, insn);
5349 return cse_gen_binary (code, mode, y, new_const);
5353 new = simplify_binary_operation (code, mode,
5354 const_arg0 ? const_arg0 : folded_arg0,
5355 const_arg1 ? const_arg1 : folded_arg1);
5359 /* (lo_sum (high X) X) is simply X. */
5360 if (code == LO_SUM && const_arg0 != 0
5361 && GET_CODE (const_arg0) == HIGH
5362 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5368 new = simplify_ternary_operation (code, mode, mode_arg0,
5369 const_arg0 ? const_arg0 : folded_arg0,
5370 const_arg1 ? const_arg1 : folded_arg1,
5371 const_arg2 ? const_arg2 : XEXP (x, 2));
5375 return new ? new : x;
5378 /* Return a constant value currently equivalent to X.
5379 Return 0 if we don't know one. */
5385 if (GET_CODE (x) == REG
5386 && REGNO_QTY_VALID_P (REGNO (x))
5387 && qty_const[reg_qty[REGNO (x)]])
5388 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5390 if (x != 0 && CONSTANT_P (x))
5393 /* If X is a MEM, try to fold it outside the context of any insn to see if
5394 it might be equivalent to a constant. That handles the case where it
5395 is a constant-pool reference. Then try to look it up in the hash table
5396 in case it is something whose value we have seen before. */
5398 if (GET_CODE (x) == MEM)
5400 struct table_elt *elt;
5402 x = fold_rtx (x, NULL_RTX);
5406 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5410 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5411 if (elt->is_const && CONSTANT_P (elt->exp))
5418 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5419 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5420 least-significant part of X.
5421 MODE specifies how big a part of X to return.
5423 If the requested operation cannot be done, 0 is returned.
5425 This is similar to gen_lowpart in emit-rtl.c. */
5428 gen_lowpart_if_possible (mode, x)
5429 enum machine_mode mode;
5432 rtx result = gen_lowpart_common (mode, x);
5436 else if (GET_CODE (x) == MEM)
5438 /* This is the only other case we handle. */
5439 register int offset = 0;
5442 #if WORDS_BIG_ENDIAN
5443 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5444 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5446 #if BYTES_BIG_ENDIAN
5447 /* Adjust the address so that the address-after-the-data
5449 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5450 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5452 new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset));
5453 if (! memory_address_p (mode, XEXP (new, 0)))
5455 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5456 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5457 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5464 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5465 branch. It will be zero if not.
5467 In certain cases, this can cause us to add an equivalence. For example,
5468 if we are following the taken case of
5470 we can add the fact that `i' and '2' are now equivalent.
5472 In any case, we can record that this comparison was passed. If the same
5473 comparison is seen later, we will know its value. */
5476 record_jump_equiv (insn, taken)
5480 int cond_known_true;
5482 enum machine_mode mode, mode0, mode1;
5483 int reversed_nonequality = 0;
5486 /* Ensure this is the right kind of insn. */
5487 if (! condjump_p (insn) || simplejump_p (insn))
5490 /* See if this jump condition is known true or false. */
5492 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5494 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5496 /* Get the type of comparison being done and the operands being compared.
5497 If we had to reverse a non-equality condition, record that fact so we
5498 know that it isn't valid for floating-point. */
5499 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5500 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5501 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5503 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5504 if (! cond_known_true)
5506 reversed_nonequality = (code != EQ && code != NE);
5507 code = reverse_condition (code);
5510 /* The mode is the mode of the non-constant. */
5512 if (mode1 != VOIDmode)
5515 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5518 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5519 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5520 Make any useful entries we can with that information. Called from
5521 above function and called recursively. */
5524 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5526 enum machine_mode mode;
5528 int reversed_nonequality;
5530 int op0_hash_code, op1_hash_code;
5531 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5532 struct table_elt *op0_elt, *op1_elt;
5534 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5535 we know that they are also equal in the smaller mode (this is also
5536 true for all smaller modes whether or not there is a SUBREG, but
5537 is not worth testing for with no SUBREG. */
5539 /* Note that GET_MODE (op0) may not equal MODE. */
5540 if (code == EQ && GET_CODE (op0) == SUBREG
5541 && (GET_MODE_SIZE (GET_MODE (op0))
5542 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5544 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5545 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5547 record_jump_cond (code, mode, SUBREG_REG (op0),
5548 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5549 reversed_nonequality);
5552 if (code == EQ && GET_CODE (op1) == SUBREG
5553 && (GET_MODE_SIZE (GET_MODE (op1))
5554 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5556 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5557 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5559 record_jump_cond (code, mode, SUBREG_REG (op1),
5560 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5561 reversed_nonequality);
5564 /* Similarly, if this is an NE comparison, and either is a SUBREG
5565 making a smaller mode, we know the whole thing is also NE. */
5567 /* Note that GET_MODE (op0) may not equal MODE;
5568 if we test MODE instead, we can get an infinite recursion
5569 alternating between two modes each wider than MODE. */
5571 if (code == NE && GET_CODE (op0) == SUBREG
5572 && subreg_lowpart_p (op0)
5573 && (GET_MODE_SIZE (GET_MODE (op0))
5574 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5576 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5577 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5579 record_jump_cond (code, mode, SUBREG_REG (op0),
5580 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5581 reversed_nonequality);
5584 if (code == NE && GET_CODE (op1) == SUBREG
5585 && subreg_lowpart_p (op1)
5586 && (GET_MODE_SIZE (GET_MODE (op1))
5587 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5589 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5590 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5592 record_jump_cond (code, mode, SUBREG_REG (op1),
5593 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5594 reversed_nonequality);
5597 /* Hash both operands. */
5600 hash_arg_in_memory = 0;
5601 hash_arg_in_struct = 0;
5602 op0_hash_code = HASH (op0, mode);
5603 op0_in_memory = hash_arg_in_memory;
5604 op0_in_struct = hash_arg_in_struct;
5610 hash_arg_in_memory = 0;
5611 hash_arg_in_struct = 0;
5612 op1_hash_code = HASH (op1, mode);
5613 op1_in_memory = hash_arg_in_memory;
5614 op1_in_struct = hash_arg_in_struct;
5619 /* Look up both operands. */
5620 op0_elt = lookup (op0, op0_hash_code, mode);
5621 op1_elt = lookup (op1, op1_hash_code, mode);
5623 /* If we aren't setting two things equal all we can do is save this
5624 comparison. Similarly if this is floating-point. In the latter
5625 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5626 If we record the equality, we might inadvertently delete code
5627 whose intent was to change -0 to +0. */
5629 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
5631 /* If we reversed a floating-point comparison, if OP0 is not a
5632 register, or if OP1 is neither a register or constant, we can't
5635 if (GET_CODE (op1) != REG)
5636 op1 = equiv_constant (op1);
5638 if ((reversed_nonequality && FLOAT_MODE_P (mode))
5639 || GET_CODE (op0) != REG || op1 == 0)
5642 /* Put OP0 in the hash table if it isn't already. This gives it a
5643 new quantity number. */
5646 if (insert_regs (op0, NULL_PTR, 0))
5648 rehash_using_reg (op0);
5649 op0_hash_code = HASH (op0, mode);
5651 /* If OP0 is contained in OP1, this changes its hash code
5652 as well. Faster to rehash than to check, except
5653 for the simple case of a constant. */
5654 if (! CONSTANT_P (op1))
5655 op1_hash_code = HASH (op1,mode);
5658 op0_elt = insert (op0, NULL_PTR, op0_hash_code, mode);
5659 op0_elt->in_memory = op0_in_memory;
5660 op0_elt->in_struct = op0_in_struct;
5663 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
5664 if (GET_CODE (op1) == REG)
5666 /* Look it up again--in case op0 and op1 are the same. */
5667 op1_elt = lookup (op1, op1_hash_code, mode);
5669 /* Put OP1 in the hash table so it gets a new quantity number. */
5672 if (insert_regs (op1, NULL_PTR, 0))
5674 rehash_using_reg (op1);
5675 op1_hash_code = HASH (op1, mode);
5678 op1_elt = insert (op1, NULL_PTR, op1_hash_code, mode);
5679 op1_elt->in_memory = op1_in_memory;
5680 op1_elt->in_struct = op1_in_struct;
5683 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
5684 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
5688 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
5689 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
5695 /* If either side is still missing an equivalence, make it now,
5696 then merge the equivalences. */
5700 if (insert_regs (op0, NULL_PTR, 0))
5702 rehash_using_reg (op0);
5703 op0_hash_code = HASH (op0, mode);
5706 op0_elt = insert (op0, NULL_PTR, op0_hash_code, mode);
5707 op0_elt->in_memory = op0_in_memory;
5708 op0_elt->in_struct = op0_in_struct;
5713 if (insert_regs (op1, NULL_PTR, 0))
5715 rehash_using_reg (op1);
5716 op1_hash_code = HASH (op1, mode);
5719 op1_elt = insert (op1, NULL_PTR, op1_hash_code, mode);
5720 op1_elt->in_memory = op1_in_memory;
5721 op1_elt->in_struct = op1_in_struct;
5724 merge_equiv_classes (op0_elt, op1_elt);
5725 last_jump_equiv_class = op0_elt;
5728 /* CSE processing for one instruction.
5729 First simplify sources and addresses of all assignments
5730 in the instruction, using previously-computed equivalents values.
5731 Then install the new sources and destinations in the table
5732 of available values.
5734 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5737 /* Data on one SET contained in the instruction. */
5741 /* The SET rtx itself. */
5743 /* The SET_SRC of the rtx (the original value, if it is changing). */
5745 /* The hash-table element for the SET_SRC of the SET. */
5746 struct table_elt *src_elt;
5747 /* Hash code for the SET_SRC. */
5749 /* Hash code for the SET_DEST. */
5751 /* The SET_DEST, with SUBREG, etc., stripped. */
5753 /* Place where the pointer to the INNER_DEST was found. */
5754 rtx *inner_dest_loc;
5755 /* Nonzero if the SET_SRC is in memory. */
5757 /* Nonzero if the SET_SRC is in a structure. */
5759 /* Nonzero if the SET_SRC contains something
5760 whose value cannot be predicted and understood. */
5762 /* Original machine mode, in case it becomes a CONST_INT. */
5763 enum machine_mode mode;
5764 /* A constant equivalent for SET_SRC, if any. */
5766 /* Hash code of constant equivalent for SET_SRC. */
5767 int src_const_hash_code;
5768 /* Table entry for constant equivalent for SET_SRC, if any. */
5769 struct table_elt *src_const_elt;
5773 cse_insn (insn, in_libcall_block)
5775 int in_libcall_block;
5777 register rtx x = PATTERN (insn);
5780 register int n_sets = 0;
5782 /* Records what this insn does to set CC0. */
5783 rtx this_insn_cc0 = 0;
5784 enum machine_mode this_insn_cc0_mode;
5785 struct write_data writes_memory;
5786 static struct write_data init = {0, 0, 0, 0};
5789 struct table_elt *src_eqv_elt = 0;
5790 int src_eqv_volatile;
5791 int src_eqv_in_memory;
5792 int src_eqv_in_struct;
5793 int src_eqv_hash_code;
5798 writes_memory = init;
5800 /* Find all the SETs and CLOBBERs in this instruction.
5801 Record all the SETs in the array `set' and count them.
5802 Also determine whether there is a CLOBBER that invalidates
5803 all memory references, or all references at varying addresses. */
5805 if (GET_CODE (x) == SET)
5807 sets = (struct set *) alloca (sizeof (struct set));
5810 /* Ignore SETs that are unconditional jumps.
5811 They never need cse processing, so this does not hurt.
5812 The reason is not efficiency but rather
5813 so that we can test at the end for instructions
5814 that have been simplified to unconditional jumps
5815 and not be misled by unchanged instructions
5816 that were unconditional jumps to begin with. */
5817 if (SET_DEST (x) == pc_rtx
5818 && GET_CODE (SET_SRC (x)) == LABEL_REF)
5821 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5822 The hard function value register is used only once, to copy to
5823 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5824 Ensure we invalidate the destination register. On the 80386 no
5825 other code would invalidate it since it is a fixed_reg.
5826 We need not check the return of apply_change_group; see canon_reg. */
5828 else if (GET_CODE (SET_SRC (x)) == CALL)
5830 canon_reg (SET_SRC (x), insn);
5831 apply_change_group ();
5832 fold_rtx (SET_SRC (x), insn);
5833 invalidate (SET_DEST (x));
5838 else if (GET_CODE (x) == PARALLEL)
5840 register int lim = XVECLEN (x, 0);
5842 sets = (struct set *) alloca (lim * sizeof (struct set));
5844 /* Find all regs explicitly clobbered in this insn,
5845 and ensure they are not replaced with any other regs
5846 elsewhere in this insn.
5847 When a reg that is clobbered is also used for input,
5848 we should presume that that is for a reason,
5849 and we should not substitute some other register
5850 which is not supposed to be clobbered.
5851 Therefore, this loop cannot be merged into the one below
5852 because a CALL may precede a CLOBBER and refer to the
5853 value clobbered. We must not let a canonicalization do
5854 anything in that case. */
5855 for (i = 0; i < lim; i++)
5857 register rtx y = XVECEXP (x, 0, i);
5858 if (GET_CODE (y) == CLOBBER)
5860 rtx clobbered = XEXP (y, 0);
5862 if (GET_CODE (clobbered) == REG
5863 || GET_CODE (clobbered) == SUBREG)
5864 invalidate (clobbered);
5865 else if (GET_CODE (clobbered) == STRICT_LOW_PART
5866 || GET_CODE (clobbered) == ZERO_EXTRACT)
5867 invalidate (XEXP (clobbered, 0));
5871 for (i = 0; i < lim; i++)
5873 register rtx y = XVECEXP (x, 0, i);
5874 if (GET_CODE (y) == SET)
5876 /* As above, we ignore unconditional jumps and call-insns and
5877 ignore the result of apply_change_group. */
5878 if (GET_CODE (SET_SRC (y)) == CALL)
5880 canon_reg (SET_SRC (y), insn);
5881 apply_change_group ();
5882 fold_rtx (SET_SRC (y), insn);
5883 invalidate (SET_DEST (y));
5885 else if (SET_DEST (y) == pc_rtx
5886 && GET_CODE (SET_SRC (y)) == LABEL_REF)
5889 sets[n_sets++].rtl = y;
5891 else if (GET_CODE (y) == CLOBBER)
5893 /* If we clobber memory, take note of that,
5894 and canon the address.
5895 This does nothing when a register is clobbered
5896 because we have already invalidated the reg. */
5897 if (GET_CODE (XEXP (y, 0)) == MEM)
5899 canon_reg (XEXP (y, 0), NULL_RTX);
5900 note_mem_written (XEXP (y, 0), &writes_memory);
5903 else if (GET_CODE (y) == USE
5904 && ! (GET_CODE (XEXP (y, 0)) == REG
5905 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
5906 canon_reg (y, NULL_RTX);
5907 else if (GET_CODE (y) == CALL)
5909 /* The result of apply_change_group can be ignored; see
5911 canon_reg (y, insn);
5912 apply_change_group ();
5917 else if (GET_CODE (x) == CLOBBER)
5919 if (GET_CODE (XEXP (x, 0)) == MEM)
5921 canon_reg (XEXP (x, 0), NULL_RTX);
5922 note_mem_written (XEXP (x, 0), &writes_memory);
5926 /* Canonicalize a USE of a pseudo register or memory location. */
5927 else if (GET_CODE (x) == USE
5928 && ! (GET_CODE (XEXP (x, 0)) == REG
5929 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
5930 canon_reg (XEXP (x, 0), NULL_RTX);
5931 else if (GET_CODE (x) == CALL)
5933 /* The result of apply_change_group can be ignored; see canon_reg. */
5934 canon_reg (x, insn);
5935 apply_change_group ();
5939 if (n_sets == 1 && REG_NOTES (insn) != 0)
5941 /* Store the equivalent value in SRC_EQV, if different. */
5942 rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5944 if (tem && ! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
5945 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
5948 /* Canonicalize sources and addresses of destinations.
5949 We do this in a separate pass to avoid problems when a MATCH_DUP is
5950 present in the insn pattern. In that case, we want to ensure that
5951 we don't break the duplicate nature of the pattern. So we will replace
5952 both operands at the same time. Otherwise, we would fail to find an
5953 equivalent substitution in the loop calling validate_change below.
5955 We used to suppress canonicalization of DEST if it appears in SRC,
5956 but we don't do this any more. */
5958 for (i = 0; i < n_sets; i++)
5960 rtx dest = SET_DEST (sets[i].rtl);
5961 rtx src = SET_SRC (sets[i].rtl);
5962 rtx new = canon_reg (src, insn);
5964 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
5965 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
5966 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
5967 || insn_n_dups[recog_memoized (insn)] > 0)
5968 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5970 SET_SRC (sets[i].rtl) = new;
5972 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
5974 validate_change (insn, &XEXP (dest, 1),
5975 canon_reg (XEXP (dest, 1), insn), 1);
5976 validate_change (insn, &XEXP (dest, 2),
5977 canon_reg (XEXP (dest, 2), insn), 1);
5980 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
5981 || GET_CODE (dest) == ZERO_EXTRACT
5982 || GET_CODE (dest) == SIGN_EXTRACT)
5983 dest = XEXP (dest, 0);
5985 if (GET_CODE (dest) == MEM)
5986 canon_reg (dest, insn);
5989 /* Now that we have done all the replacements, we can apply the change
5990 group and see if they all work. Note that this will cause some
5991 canonicalizations that would have worked individually not to be applied
5992 because some other canonicalization didn't work, but this should not
5995 The result of apply_change_group can be ignored; see canon_reg. */
5997 apply_change_group ();
5999 /* Set sets[i].src_elt to the class each source belongs to.
6000 Detect assignments from or to volatile things
6001 and set set[i] to zero so they will be ignored
6002 in the rest of this function.
6004 Nothing in this loop changes the hash table or the register chains. */
6006 for (i = 0; i < n_sets; i++)
6008 register rtx src, dest;
6009 register rtx src_folded;
6010 register struct table_elt *elt = 0, *p;
6011 enum machine_mode mode;
6014 rtx src_related = 0;
6015 struct table_elt *src_const_elt = 0;
6016 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6017 int src_related_cost = 10000, src_elt_cost = 10000;
6018 /* Set non-zero if we need to call force_const_mem on with the
6019 contents of src_folded before using it. */
6020 int src_folded_force_flag = 0;
6022 dest = SET_DEST (sets[i].rtl);
6023 src = SET_SRC (sets[i].rtl);
6025 /* If SRC is a constant that has no machine mode,
6026 hash it with the destination's machine mode.
6027 This way we can keep different modes separate. */
6029 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6030 sets[i].mode = mode;
6034 enum machine_mode eqvmode = mode;
6035 if (GET_CODE (dest) == STRICT_LOW_PART)
6036 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6038 hash_arg_in_memory = 0;
6039 hash_arg_in_struct = 0;
6040 src_eqv = fold_rtx (src_eqv, insn);
6041 src_eqv_hash_code = HASH (src_eqv, eqvmode);
6043 /* Find the equivalence class for the equivalent expression. */
6046 src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, eqvmode);
6048 src_eqv_volatile = do_not_record;
6049 src_eqv_in_memory = hash_arg_in_memory;
6050 src_eqv_in_struct = hash_arg_in_struct;
6053 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6054 value of the INNER register, not the destination. So it is not
6055 a legal substitution for the source. But save it for later. */
6056 if (GET_CODE (dest) == STRICT_LOW_PART)
6059 src_eqv_here = src_eqv;
6061 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6062 simplified result, which may not necessarily be valid. */
6063 src_folded = fold_rtx (src, insn);
6065 /* If storing a constant in a bitfield, pre-truncate the constant
6066 so we will be able to record it later. */
6067 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6068 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6070 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6072 if (GET_CODE (src) == CONST_INT
6073 && GET_CODE (width) == CONST_INT
6074 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6075 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6077 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6078 << INTVAL (width)) - 1));
6081 /* Compute SRC's hash code, and also notice if it
6082 should not be recorded at all. In that case,
6083 prevent any further processing of this assignment. */
6085 hash_arg_in_memory = 0;
6086 hash_arg_in_struct = 0;
6089 sets[i].src_hash_code = HASH (src, mode);
6090 sets[i].src_volatile = do_not_record;
6091 sets[i].src_in_memory = hash_arg_in_memory;
6092 sets[i].src_in_struct = hash_arg_in_struct;
6095 /* It is no longer clear why we used to do this, but it doesn't
6096 appear to still be needed. So let's try without it since this
6097 code hurts cse'ing widened ops. */
6098 /* If source is a perverse subreg (such as QI treated as an SI),
6099 treat it as volatile. It may do the work of an SI in one context
6100 where the extra bits are not being used, but cannot replace an SI
6102 if (GET_CODE (src) == SUBREG
6103 && (GET_MODE_SIZE (GET_MODE (src))
6104 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6105 sets[i].src_volatile = 1;
6108 /* Locate all possible equivalent forms for SRC. Try to replace
6109 SRC in the insn with each cheaper equivalent.
6111 We have the following types of equivalents: SRC itself, a folded
6112 version, a value given in a REG_EQUAL note, or a value related
6115 Each of these equivalents may be part of an additional class
6116 of equivalents (if more than one is in the table, they must be in
6117 the same class; we check for this).
6119 If the source is volatile, we don't do any table lookups.
6121 We note any constant equivalent for possible later use in a
6124 if (!sets[i].src_volatile)
6125 elt = lookup (src, sets[i].src_hash_code, mode);
6127 sets[i].src_elt = elt;
6129 if (elt && src_eqv_here && src_eqv_elt)
6131 if (elt->first_same_value != src_eqv_elt->first_same_value)
6133 /* The REG_EQUAL is indicating that two formerly distinct
6134 classes are now equivalent. So merge them. */
6135 merge_equiv_classes (elt, src_eqv_elt);
6136 src_eqv_hash_code = HASH (src_eqv, elt->mode);
6137 src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, elt->mode);
6143 else if (src_eqv_elt)
6146 /* Try to find a constant somewhere and record it in `src_const'.
6147 Record its table element, if any, in `src_const_elt'. Look in
6148 any known equivalences first. (If the constant is not in the
6149 table, also set `sets[i].src_const_hash_code'). */
6151 for (p = elt->first_same_value; p; p = p->next_same_value)
6155 src_const_elt = elt;
6160 && (CONSTANT_P (src_folded)
6161 /* Consider (minus (label_ref L1) (label_ref L2)) as
6162 "constant" here so we will record it. This allows us
6163 to fold switch statements when an ADDR_DIFF_VEC is used. */
6164 || (GET_CODE (src_folded) == MINUS
6165 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6166 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6167 src_const = src_folded, src_const_elt = elt;
6168 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6169 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6171 /* If we don't know if the constant is in the table, get its
6172 hash code and look it up. */
6173 if (src_const && src_const_elt == 0)
6175 sets[i].src_const_hash_code = HASH (src_const, mode);
6176 src_const_elt = lookup (src_const, sets[i].src_const_hash_code,
6180 sets[i].src_const = src_const;
6181 sets[i].src_const_elt = src_const_elt;
6183 /* If the constant and our source are both in the table, mark them as
6184 equivalent. Otherwise, if a constant is in the table but the source
6185 isn't, set ELT to it. */
6186 if (src_const_elt && elt
6187 && src_const_elt->first_same_value != elt->first_same_value)
6188 merge_equiv_classes (elt, src_const_elt);
6189 else if (src_const_elt && elt == 0)
6190 elt = src_const_elt;
6192 /* See if there is a register linearly related to a constant
6193 equivalent of SRC. */
6195 && (GET_CODE (src_const) == CONST
6196 || (src_const_elt && src_const_elt->related_value != 0)))
6198 src_related = use_related_value (src_const, src_const_elt);
6201 struct table_elt *src_related_elt
6202 = lookup (src_related, HASH (src_related, mode), mode);
6203 if (src_related_elt && elt)
6205 if (elt->first_same_value
6206 != src_related_elt->first_same_value)
6207 /* This can occur when we previously saw a CONST
6208 involving a SYMBOL_REF and then see the SYMBOL_REF
6209 twice. Merge the involved classes. */
6210 merge_equiv_classes (elt, src_related_elt);
6213 src_related_elt = 0;
6215 else if (src_related_elt && elt == 0)
6216 elt = src_related_elt;
6220 /* See if we have a CONST_INT that is already in a register in a
6223 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6224 && GET_MODE_CLASS (mode) == MODE_INT
6225 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6227 enum machine_mode wider_mode;
6229 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6230 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6231 && src_related == 0;
6232 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6234 struct table_elt *const_elt
6235 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6240 for (const_elt = const_elt->first_same_value;
6241 const_elt; const_elt = const_elt->next_same_value)
6242 if (GET_CODE (const_elt->exp) == REG)
6244 src_related = gen_lowpart_if_possible (mode,
6251 /* Another possibility is that we have an AND with a constant in
6252 a mode narrower than a word. If so, it might have been generated
6253 as part of an "if" which would narrow the AND. If we already
6254 have done the AND in a wider mode, we can use a SUBREG of that
6257 if (flag_expensive_optimizations && ! src_related
6258 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6259 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6261 enum machine_mode tmode;
6262 rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1));
6264 for (tmode = GET_MODE_WIDER_MODE (mode);
6265 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6266 tmode = GET_MODE_WIDER_MODE (tmode))
6268 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6269 struct table_elt *larger_elt;
6273 PUT_MODE (new_and, tmode);
6274 XEXP (new_and, 0) = inner;
6275 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6276 if (larger_elt == 0)
6279 for (larger_elt = larger_elt->first_same_value;
6280 larger_elt; larger_elt = larger_elt->next_same_value)
6281 if (GET_CODE (larger_elt->exp) == REG)
6284 = gen_lowpart_if_possible (mode, larger_elt->exp);
6294 if (src == src_folded)
6297 /* At this point, ELT, if non-zero, points to a class of expressions
6298 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6299 and SRC_RELATED, if non-zero, each contain additional equivalent
6300 expressions. Prune these latter expressions by deleting expressions
6301 already in the equivalence class.
6303 Check for an equivalent identical to the destination. If found,
6304 this is the preferred equivalent since it will likely lead to
6305 elimination of the insn. Indicate this by placing it in
6308 if (elt) elt = elt->first_same_value;
6309 for (p = elt; p; p = p->next_same_value)
6311 enum rtx_code code = GET_CODE (p->exp);
6313 /* If the expression is not valid, ignore it. Then we do not
6314 have to check for validity below. In most cases, we can use
6315 `rtx_equal_p', since canonicalization has already been done. */
6316 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6319 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6321 else if (src_folded && GET_CODE (src_folded) == code
6322 && rtx_equal_p (src_folded, p->exp))
6324 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6325 && rtx_equal_p (src_eqv_here, p->exp))
6327 else if (src_related && GET_CODE (src_related) == code
6328 && rtx_equal_p (src_related, p->exp))
6331 /* This is the same as the destination of the insns, we want
6332 to prefer it. Copy it to src_related. The code below will
6333 then give it a negative cost. */
6334 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6339 /* Find the cheapest valid equivalent, trying all the available
6340 possibilities. Prefer items not in the hash table to ones
6341 that are when they are equal cost. Note that we can never
6342 worsen an insn as the current contents will also succeed.
6343 If we find an equivalent identical to the destination, use it as best,
6344 since this insn will probably be eliminated in that case. */
6347 if (rtx_equal_p (src, dest))
6350 src_cost = COST (src);
6355 if (rtx_equal_p (src_eqv_here, dest))
6358 src_eqv_cost = COST (src_eqv_here);
6363 if (rtx_equal_p (src_folded, dest))
6364 src_folded_cost = -1;
6366 src_folded_cost = COST (src_folded);
6371 if (rtx_equal_p (src_related, dest))
6372 src_related_cost = -1;
6374 src_related_cost = COST (src_related);
6377 /* If this was an indirect jump insn, a known label will really be
6378 cheaper even though it looks more expensive. */
6379 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6380 src_folded = src_const, src_folded_cost = -1;
6382 /* Terminate loop when replacement made. This must terminate since
6383 the current contents will be tested and will always be valid. */
6388 /* Skip invalid entries. */
6389 while (elt && GET_CODE (elt->exp) != REG
6390 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6391 elt = elt->next_same_value;
6393 if (elt) src_elt_cost = elt->cost;
6395 /* Find cheapest and skip it for the next time. For items
6396 of equal cost, use this order:
6397 src_folded, src, src_eqv, src_related and hash table entry. */
6398 if (src_folded_cost <= src_cost
6399 && src_folded_cost <= src_eqv_cost
6400 && src_folded_cost <= src_related_cost
6401 && src_folded_cost <= src_elt_cost)
6403 trial = src_folded, src_folded_cost = 10000;
6404 if (src_folded_force_flag)
6405 trial = force_const_mem (mode, trial);
6407 else if (src_cost <= src_eqv_cost
6408 && src_cost <= src_related_cost
6409 && src_cost <= src_elt_cost)
6410 trial = src, src_cost = 10000;
6411 else if (src_eqv_cost <= src_related_cost
6412 && src_eqv_cost <= src_elt_cost)
6413 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6414 else if (src_related_cost <= src_elt_cost)
6415 trial = copy_rtx (src_related), src_related_cost = 10000;
6418 trial = copy_rtx (elt->exp);
6419 elt = elt->next_same_value;
6420 src_elt_cost = 10000;
6423 /* We don't normally have an insn matching (set (pc) (pc)), so
6424 check for this separately here. We will delete such an
6427 Tablejump insns contain a USE of the table, so simply replacing
6428 the operand with the constant won't match. This is simply an
6429 unconditional branch, however, and is therefore valid. Just
6430 insert the substitution here and we will delete and re-emit
6433 if (n_sets == 1 && dest == pc_rtx
6435 || (GET_CODE (trial) == LABEL_REF
6436 && ! condjump_p (insn))))
6438 /* If TRIAL is a label in front of a jump table, we are
6439 really falling through the switch (this is how casesi
6440 insns work), so we must branch around the table. */
6441 if (GET_CODE (trial) == CODE_LABEL
6442 && NEXT_INSN (trial) != 0
6443 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6444 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6445 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6447 trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial));
6449 SET_SRC (sets[i].rtl) = trial;
6453 /* Look for a substitution that makes a valid insn. */
6454 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6456 /* The result of apply_change_group can be ignored; see
6459 validate_change (insn, &SET_SRC (sets[i].rtl),
6460 canon_reg (SET_SRC (sets[i].rtl), insn),
6462 apply_change_group ();
6466 /* If we previously found constant pool entries for
6467 constants and this is a constant, try making a
6468 pool entry. Put it in src_folded unless we already have done
6469 this since that is where it likely came from. */
6471 else if (constant_pool_entries_cost
6472 && CONSTANT_P (trial)
6473 && (src_folded == 0 || GET_CODE (src_folded) != MEM)
6474 && GET_MODE_CLASS (mode) != MODE_CC)
6476 src_folded_force_flag = 1;
6478 src_folded_cost = constant_pool_entries_cost;
6482 src = SET_SRC (sets[i].rtl);
6484 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6485 However, there is an important exception: If both are registers
6486 that are not the head of their equivalence class, replace SET_SRC
6487 with the head of the class. If we do not do this, we will have
6488 both registers live over a portion of the basic block. This way,
6489 their lifetimes will likely abut instead of overlapping. */
6490 if (GET_CODE (dest) == REG
6491 && REGNO_QTY_VALID_P (REGNO (dest))
6492 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6493 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6494 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6495 /* Don't do this if the original insn had a hard reg as
6497 && (GET_CODE (sets[i].src) != REG
6498 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6499 /* We can't call canon_reg here because it won't do anything if
6500 SRC is a hard register. */
6502 int first = qty_first_reg[reg_qty[REGNO (src)]];
6504 src = SET_SRC (sets[i].rtl)
6505 = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6506 : gen_rtx (REG, GET_MODE (src), first);
6508 /* If we had a constant that is cheaper than what we are now
6509 setting SRC to, use that constant. We ignored it when we
6510 thought we could make this into a no-op. */
6511 if (src_const && COST (src_const) < COST (src)
6512 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6516 /* If we made a change, recompute SRC values. */
6517 if (src != sets[i].src)
6520 hash_arg_in_memory = 0;
6521 hash_arg_in_struct = 0;
6523 sets[i].src_hash_code = HASH (src, mode);
6524 sets[i].src_volatile = do_not_record;
6525 sets[i].src_in_memory = hash_arg_in_memory;
6526 sets[i].src_in_struct = hash_arg_in_struct;
6527 sets[i].src_elt = lookup (src, sets[i].src_hash_code, mode);
6530 /* If this is a single SET, we are setting a register, and we have an
6531 equivalent constant, we want to add a REG_NOTE. We don't want
6532 to write a REG_EQUAL note for a constant pseudo since verifying that
6533 that pseudo hasn't been eliminated is a pain. Such a note also
6534 won't help anything. */
6535 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
6536 && GET_CODE (src_const) != REG)
6538 rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6540 /* Record the actual constant value in a REG_EQUAL note, making
6541 a new one if one does not already exist. */
6543 XEXP (tem, 0) = src_const;
6545 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL,
6546 src_const, REG_NOTES (insn));
6548 /* If storing a constant value in a register that
6549 previously held the constant value 0,
6550 record this fact with a REG_WAS_0 note on this insn.
6552 Note that the *register* is required to have previously held 0,
6553 not just any register in the quantity and we must point to the
6554 insn that set that register to zero.
6556 Rather than track each register individually, we just see if
6557 the last set for this quantity was for this register. */
6559 if (REGNO_QTY_VALID_P (REGNO (dest))
6560 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
6562 /* See if we previously had a REG_WAS_0 note. */
6563 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6564 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
6566 if ((tem = single_set (const_insn)) != 0
6567 && rtx_equal_p (SET_DEST (tem), dest))
6570 XEXP (note, 0) = const_insn;
6572 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0,
6573 const_insn, REG_NOTES (insn));
6578 /* Now deal with the destination. */
6580 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
6582 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6583 to the MEM or REG within it. */
6584 while (GET_CODE (dest) == SIGN_EXTRACT
6585 || GET_CODE (dest) == ZERO_EXTRACT
6586 || GET_CODE (dest) == SUBREG
6587 || GET_CODE (dest) == STRICT_LOW_PART)
6589 sets[i].inner_dest_loc = &XEXP (dest, 0);
6590 dest = XEXP (dest, 0);
6593 sets[i].inner_dest = dest;
6595 if (GET_CODE (dest) == MEM)
6597 dest = fold_rtx (dest, insn);
6599 /* Decide whether we invalidate everything in memory,
6600 or just things at non-fixed places.
6601 Writing a large aggregate must invalidate everything
6602 because we don't know how long it is. */
6603 note_mem_written (dest, &writes_memory);
6606 /* Compute the hash code of the destination now,
6607 before the effects of this instruction are recorded,
6608 since the register values used in the address computation
6609 are those before this instruction. */
6610 sets[i].dest_hash_code = HASH (dest, mode);
6612 /* Don't enter a bit-field in the hash table
6613 because the value in it after the store
6614 may not equal what was stored, due to truncation. */
6616 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6617 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6619 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6621 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
6622 && GET_CODE (width) == CONST_INT
6623 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6624 && ! (INTVAL (src_const)
6625 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6626 /* Exception: if the value is constant,
6627 and it won't be truncated, record it. */
6631 /* This is chosen so that the destination will be invalidated
6632 but no new value will be recorded.
6633 We must invalidate because sometimes constant
6634 values can be recorded for bitfields. */
6635 sets[i].src_elt = 0;
6636 sets[i].src_volatile = 1;
6642 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6644 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
6646 PUT_CODE (insn, NOTE);
6647 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
6648 NOTE_SOURCE_FILE (insn) = 0;
6649 cse_jumps_altered = 1;
6650 /* One less use of the label this insn used to jump to. */
6651 --LABEL_NUSES (JUMP_LABEL (insn));
6652 /* No more processing for this set. */
6656 /* If this SET is now setting PC to a label, we know it used to
6657 be a conditional or computed branch. So we see if we can follow
6658 it. If it was a computed branch, delete it and re-emit. */
6659 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
6663 /* If this is not in the format for a simple branch and
6664 we are the only SET in it, re-emit it. */
6665 if (! simplejump_p (insn) && n_sets == 1)
6667 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
6668 JUMP_LABEL (new) = XEXP (src, 0);
6669 LABEL_NUSES (XEXP (src, 0))++;
6674 /* Otherwise, force rerecognition, since it probably had
6675 a different pattern before.
6676 This shouldn't really be necessary, since whatever
6677 changed the source value above should have done this.
6678 Until the right place is found, might as well do this here. */
6679 INSN_CODE (insn) = -1;
6681 /* Now that we've converted this jump to an unconditional jump,
6682 there is dead code after it. Delete the dead code until we
6683 reach a BARRIER, the end of the function, or a label. Do
6684 not delete NOTEs except for NOTE_INSN_DELETED since later
6685 phases assume these notes are retained. */
6689 while (NEXT_INSN (p) != 0
6690 && GET_CODE (NEXT_INSN (p)) != BARRIER
6691 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
6693 if (GET_CODE (NEXT_INSN (p)) != NOTE
6694 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
6695 delete_insn (NEXT_INSN (p));
6700 /* If we don't have a BARRIER immediately after INSN, put one there.
6701 Much code assumes that there are no NOTEs between a JUMP_INSN and
6704 if (NEXT_INSN (insn) == 0
6705 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
6706 emit_barrier_after (insn);
6708 /* We might have two BARRIERs separated by notes. Delete the second
6711 if (p != insn && NEXT_INSN (p) != 0
6712 && GET_CODE (NEXT_INSN (p)) == BARRIER)
6713 delete_insn (NEXT_INSN (p));
6715 cse_jumps_altered = 1;
6719 /* If destination is volatile, invalidate it and then do no further
6720 processing for this assignment. */
6722 else if (do_not_record)
6724 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
6725 || GET_CODE (dest) == MEM)
6727 else if (GET_CODE (dest) == STRICT_LOW_PART
6728 || GET_CODE (dest) == ZERO_EXTRACT)
6729 invalidate (XEXP (dest, 0));
6733 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
6734 sets[i].dest_hash_code = HASH (SET_DEST (sets[i].rtl), mode);
6737 /* If setting CC0, record what it was set to, or a constant, if it
6738 is equivalent to a constant. If it is being set to a floating-point
6739 value, make a COMPARE with the appropriate constant of 0. If we
6740 don't do this, later code can interpret this as a test against
6741 const0_rtx, which can cause problems if we try to put it into an
6742 insn as a floating-point operand. */
6743 if (dest == cc0_rtx)
6745 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
6746 this_insn_cc0_mode = mode;
6747 if (FLOAT_MODE_P (mode))
6748 this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0,
6754 /* Now enter all non-volatile source expressions in the hash table
6755 if they are not already present.
6756 Record their equivalence classes in src_elt.
6757 This way we can insert the corresponding destinations into
6758 the same classes even if the actual sources are no longer in them
6759 (having been invalidated). */
6761 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
6762 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
6764 register struct table_elt *elt;
6765 register struct table_elt *classp = sets[0].src_elt;
6766 rtx dest = SET_DEST (sets[0].rtl);
6767 enum machine_mode eqvmode = GET_MODE (dest);
6769 if (GET_CODE (dest) == STRICT_LOW_PART)
6771 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6774 if (insert_regs (src_eqv, classp, 0))
6775 src_eqv_hash_code = HASH (src_eqv, eqvmode);
6776 elt = insert (src_eqv, classp, src_eqv_hash_code, eqvmode);
6777 elt->in_memory = src_eqv_in_memory;
6778 elt->in_struct = src_eqv_in_struct;
6781 /* Check to see if src_eqv_elt is the same as a set source which
6782 does not yet have an elt, and if so set the elt of the set source
6784 for (i = 0; i < n_sets; i++)
6785 if (sets[i].rtl && sets[i].src_elt == 0
6786 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
6787 sets[i].src_elt = src_eqv_elt;
6790 for (i = 0; i < n_sets; i++)
6791 if (sets[i].rtl && ! sets[i].src_volatile
6792 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
6794 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
6796 /* REG_EQUAL in setting a STRICT_LOW_PART
6797 gives an equivalent for the entire destination register,
6798 not just for the subreg being stored in now.
6799 This is a more interesting equivalence, so we arrange later
6800 to treat the entire reg as the destination. */
6801 sets[i].src_elt = src_eqv_elt;
6802 sets[i].src_hash_code = src_eqv_hash_code;
6806 /* Insert source and constant equivalent into hash table, if not
6808 register struct table_elt *classp = src_eqv_elt;
6809 register rtx src = sets[i].src;
6810 register rtx dest = SET_DEST (sets[i].rtl);
6811 enum machine_mode mode
6812 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6814 if (sets[i].src_elt == 0)
6816 register struct table_elt *elt;
6818 /* Note that these insert_regs calls cannot remove
6819 any of the src_elt's, because they would have failed to
6820 match if not still valid. */
6821 if (insert_regs (src, classp, 0))
6822 sets[i].src_hash_code = HASH (src, mode);
6823 elt = insert (src, classp, sets[i].src_hash_code, mode);
6824 elt->in_memory = sets[i].src_in_memory;
6825 elt->in_struct = sets[i].src_in_struct;
6826 sets[i].src_elt = classp = elt;
6829 if (sets[i].src_const && sets[i].src_const_elt == 0
6830 && src != sets[i].src_const
6831 && ! rtx_equal_p (sets[i].src_const, src))
6832 sets[i].src_elt = insert (sets[i].src_const, classp,
6833 sets[i].src_const_hash_code, mode);
6836 else if (sets[i].src_elt == 0)
6837 /* If we did not insert the source into the hash table (e.g., it was
6838 volatile), note the equivalence class for the REG_EQUAL value, if any,
6839 so that the destination goes into that class. */
6840 sets[i].src_elt = src_eqv_elt;
6842 invalidate_from_clobbers (&writes_memory, x);
6844 /* Some registers are invalidated by subroutine calls. Memory is
6845 invalidated by non-constant calls. */
6847 if (GET_CODE (insn) == CALL_INSN)
6849 static struct write_data everything = {0, 1, 1, 1};
6851 if (! CONST_CALL_P (insn))
6852 invalidate_memory (&everything);
6853 invalidate_for_call ();
6856 /* Now invalidate everything set by this instruction.
6857 If a SUBREG or other funny destination is being set,
6858 sets[i].rtl is still nonzero, so here we invalidate the reg
6859 a part of which is being set. */
6861 for (i = 0; i < n_sets; i++)
6864 register rtx dest = sets[i].inner_dest;
6866 /* Needed for registers to remove the register from its
6867 previous quantity's chain.
6868 Needed for memory if this is a nonvarying address, unless
6869 we have just done an invalidate_memory that covers even those. */
6870 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
6871 || (! writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
6873 else if (GET_CODE (dest) == STRICT_LOW_PART
6874 || GET_CODE (dest) == ZERO_EXTRACT)
6875 invalidate (XEXP (dest, 0));
6878 /* Make sure registers mentioned in destinations
6879 are safe for use in an expression to be inserted.
6880 This removes from the hash table
6881 any invalid entry that refers to one of these registers.
6883 We don't care about the return value from mention_regs because
6884 we are going to hash the SET_DEST values unconditionally. */
6886 for (i = 0; i < n_sets; i++)
6887 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
6888 mention_regs (SET_DEST (sets[i].rtl));
6890 /* We may have just removed some of the src_elt's from the hash table.
6891 So replace each one with the current head of the same class. */
6893 for (i = 0; i < n_sets; i++)
6896 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6897 /* If elt was removed, find current head of same class,
6898 or 0 if nothing remains of that class. */
6900 register struct table_elt *elt = sets[i].src_elt;
6902 while (elt && elt->prev_same_value)
6903 elt = elt->prev_same_value;
6905 while (elt && elt->first_same_value == 0)
6906 elt = elt->next_same_value;
6907 sets[i].src_elt = elt ? elt->first_same_value : 0;
6911 /* Now insert the destinations into their equivalence classes. */
6913 for (i = 0; i < n_sets; i++)
6916 register rtx dest = SET_DEST (sets[i].rtl);
6917 register struct table_elt *elt;
6919 /* Don't record value if we are not supposed to risk allocating
6920 floating-point values in registers that might be wider than
6922 if ((flag_float_store
6923 && GET_CODE (dest) == MEM
6924 && FLOAT_MODE_P (GET_MODE (dest)))
6925 /* Don't record values of destinations set inside a libcall block
6926 since we might delete the libcall. Things should have been set
6927 up so we won't want to reuse such a value, but we play it safe
6930 /* If we didn't put a REG_EQUAL value or a source into the hash
6931 table, there is no point is recording DEST. */
6932 || sets[i].src_elt == 0)
6935 /* STRICT_LOW_PART isn't part of the value BEING set,
6936 and neither is the SUBREG inside it.
6937 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6938 if (GET_CODE (dest) == STRICT_LOW_PART)
6939 dest = SUBREG_REG (XEXP (dest, 0));
6941 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6942 /* Registers must also be inserted into chains for quantities. */
6943 if (insert_regs (dest, sets[i].src_elt, 1))
6944 /* If `insert_regs' changes something, the hash code must be
6946 sets[i].dest_hash_code = HASH (dest, GET_MODE (dest));
6948 elt = insert (dest, sets[i].src_elt,
6949 sets[i].dest_hash_code, GET_MODE (dest));
6950 elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM;
6953 /* This implicitly assumes a whole struct
6954 need not have MEM_IN_STRUCT_P.
6955 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6956 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
6957 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
6960 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6961 narrower than M2, and both M1 and M2 are the same number of words,
6962 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6963 make that equivalence as well.
6965 However, BAR may have equivalences for which gen_lowpart_if_possible
6966 will produce a simpler value than gen_lowpart_if_possible applied to
6967 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6968 BAR's equivalences. If we don't get a simplified form, make
6969 the SUBREG. It will not be used in an equivalence, but will
6970 cause two similar assignments to be detected.
6972 Note the loop below will find SUBREG_REG (DEST) since we have
6973 already entered SRC and DEST of the SET in the table. */
6975 if (GET_CODE (dest) == SUBREG
6976 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) / UNITS_PER_WORD
6977 == GET_MODE_SIZE (GET_MODE (dest)) / UNITS_PER_WORD)
6978 && (GET_MODE_SIZE (GET_MODE (dest))
6979 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6980 && sets[i].src_elt != 0)
6982 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6983 struct table_elt *elt, *classp = 0;
6985 for (elt = sets[i].src_elt->first_same_value; elt;
6986 elt = elt->next_same_value)
6990 struct table_elt *src_elt;
6992 /* Ignore invalid entries. */
6993 if (GET_CODE (elt->exp) != REG
6994 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6997 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6999 new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0);
7001 src_hash = HASH (new_src, new_mode);
7002 src_elt = lookup (new_src, src_hash, new_mode);
7004 /* Put the new source in the hash table is if isn't
7008 if (insert_regs (new_src, classp, 0))
7009 src_hash = HASH (new_src, new_mode);
7010 src_elt = insert (new_src, classp, src_hash, new_mode);
7011 src_elt->in_memory = elt->in_memory;
7012 src_elt->in_struct = elt->in_struct;
7014 else if (classp && classp != src_elt->first_same_value)
7015 /* Show that two things that we've seen before are
7016 actually the same. */
7017 merge_equiv_classes (src_elt, classp);
7019 classp = src_elt->first_same_value;
7024 /* Special handling for (set REG0 REG1)
7025 where REG0 is the "cheapest", cheaper than REG1.
7026 After cse, REG1 will probably not be used in the sequel,
7027 so (if easily done) change this insn to (set REG1 REG0) and
7028 replace REG1 with REG0 in the previous insn that computed their value.
7029 Then REG1 will become a dead store and won't cloud the situation
7030 for later optimizations.
7032 Do not make this change if REG1 is a hard register, because it will
7033 then be used in the sequel and we may be changing a two-operand insn
7034 into a three-operand insn.
7036 Also do not do this if we are operating on a copy of INSN. */
7038 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7039 && NEXT_INSN (PREV_INSN (insn)) == insn
7040 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7041 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7042 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7043 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7044 == REGNO (SET_DEST (sets[0].rtl))))
7046 rtx prev = PREV_INSN (insn);
7047 while (prev && GET_CODE (prev) == NOTE)
7048 prev = PREV_INSN (prev);
7050 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7051 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7053 rtx dest = SET_DEST (sets[0].rtl);
7054 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7056 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7057 validate_change (insn, & SET_DEST (sets[0].rtl),
7058 SET_SRC (sets[0].rtl), 1);
7059 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7060 apply_change_group ();
7062 /* If REG1 was equivalent to a constant, REG0 is not. */
7064 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7066 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7067 any REG_WAS_0 note on INSN to PREV. */
7068 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7070 remove_note (prev, note);
7072 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7075 remove_note (insn, note);
7076 XEXP (note, 1) = REG_NOTES (prev);
7077 REG_NOTES (prev) = note;
7082 /* If this is a conditional jump insn, record any known equivalences due to
7083 the condition being tested. */
7085 last_jump_equiv_class = 0;
7086 if (GET_CODE (insn) == JUMP_INSN
7087 && n_sets == 1 && GET_CODE (x) == SET
7088 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7089 record_jump_equiv (insn, 0);
7092 /* If the previous insn set CC0 and this insn no longer references CC0,
7093 delete the previous insn. Here we use the fact that nothing expects CC0
7094 to be valid over an insn, which is true until the final pass. */
7095 if (prev_insn && GET_CODE (prev_insn) == INSN
7096 && (tem = single_set (prev_insn)) != 0
7097 && SET_DEST (tem) == cc0_rtx
7098 && ! reg_mentioned_p (cc0_rtx, x))
7100 PUT_CODE (prev_insn, NOTE);
7101 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7102 NOTE_SOURCE_FILE (prev_insn) = 0;
7105 prev_insn_cc0 = this_insn_cc0;
7106 prev_insn_cc0_mode = this_insn_cc0_mode;
7112 /* Store 1 in *WRITES_PTR for those categories of memory ref
7113 that must be invalidated when the expression WRITTEN is stored in.
7114 If WRITTEN is null, say everything must be invalidated. */
7117 note_mem_written (written, writes_ptr)
7119 struct write_data *writes_ptr;
7121 static struct write_data everything = {0, 1, 1, 1};
7124 *writes_ptr = everything;
7125 else if (GET_CODE (written) == MEM)
7127 /* Pushing or popping the stack invalidates just the stack pointer. */
7128 rtx addr = XEXP (written, 0);
7129 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7130 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7131 && GET_CODE (XEXP (addr, 0)) == REG
7132 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7137 else if (GET_MODE (written) == BLKmode)
7138 *writes_ptr = everything;
7139 /* (mem (scratch)) means clobber everything. */
7140 else if (GET_CODE (addr) == SCRATCH)
7141 *writes_ptr = everything;
7142 else if (cse_rtx_addr_varies_p (written))
7144 /* A varying address that is a sum indicates an array element,
7145 and that's just as good as a structure element
7146 in implying that we need not invalidate scalar variables.
7147 However, we must allow QImode aliasing of scalars, because the
7148 ANSI C standard allows character pointers to alias anything. */
7149 if (! ((MEM_IN_STRUCT_P (written)
7150 || GET_CODE (XEXP (written, 0)) == PLUS)
7151 && GET_MODE (written) != QImode))
7152 writes_ptr->all = 1;
7153 writes_ptr->nonscalar = 1;
7155 writes_ptr->var = 1;
7159 /* Perform invalidation on the basis of everything about an insn
7160 except for invalidating the actual places that are SET in it.
7161 This includes the places CLOBBERed, and anything that might
7162 alias with something that is SET or CLOBBERed.
7164 W points to the writes_memory for this insn, a struct write_data
7165 saying which kinds of memory references must be invalidated.
7166 X is the pattern of the insn. */
7169 invalidate_from_clobbers (w, x)
7170 struct write_data *w;
7173 /* If W->var is not set, W specifies no action.
7174 If W->all is set, this step gets all memory refs
7175 so they can be ignored in the rest of this function. */
7177 invalidate_memory (w);
7181 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7182 reg_tick[STACK_POINTER_REGNUM]++;
7184 /* This should be *very* rare. */
7185 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7186 invalidate (stack_pointer_rtx);
7189 if (GET_CODE (x) == CLOBBER)
7191 rtx ref = XEXP (x, 0);
7194 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7195 || (GET_CODE (ref) == MEM && ! w->all))
7197 else if (GET_CODE (ref) == STRICT_LOW_PART
7198 || GET_CODE (ref) == ZERO_EXTRACT)
7199 invalidate (XEXP (ref, 0));
7202 else if (GET_CODE (x) == PARALLEL)
7205 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7207 register rtx y = XVECEXP (x, 0, i);
7208 if (GET_CODE (y) == CLOBBER)
7210 rtx ref = XEXP (y, 0);
7213 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7214 || (GET_CODE (ref) == MEM && !w->all))
7216 else if (GET_CODE (ref) == STRICT_LOW_PART
7217 || GET_CODE (ref) == ZERO_EXTRACT)
7218 invalidate (XEXP (ref, 0));
7225 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7226 and replace any registers in them with either an equivalent constant
7227 or the canonical form of the register. If we are inside an address,
7228 only do this if the address remains valid.
7230 OBJECT is 0 except when within a MEM in which case it is the MEM.
7232 Return the replacement for X. */
7235 cse_process_notes (x, object)
7239 enum rtx_code code = GET_CODE (x);
7240 char *fmt = GET_RTX_FORMAT (code);
7256 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7261 if (REG_NOTE_KIND (x) == REG_EQUAL)
7262 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7264 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7270 rtx new = cse_process_notes (XEXP (x, 0), object);
7271 /* We don't substitute VOIDmode constants into these rtx,
7272 since they would impede folding. */
7273 if (GET_MODE (new) != VOIDmode)
7274 validate_change (object, &XEXP (x, 0), new, 0);
7279 i = reg_qty[REGNO (x)];
7281 /* Return a constant or a constant register. */
7282 if (REGNO_QTY_VALID_P (REGNO (x))
7283 && qty_const[i] != 0
7284 && (CONSTANT_P (qty_const[i])
7285 || GET_CODE (qty_const[i]) == REG))
7287 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7292 /* Otherwise, canonicalize this register. */
7293 return canon_reg (x, NULL_RTX);
7296 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7298 validate_change (object, &XEXP (x, i),
7299 cse_process_notes (XEXP (x, i), object), 0);
7304 /* Find common subexpressions between the end test of a loop and the beginning
7305 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7307 Often we have a loop where an expression in the exit test is used
7308 in the body of the loop. For example "while (*p) *q++ = *p++;".
7309 Because of the way we duplicate the loop exit test in front of the loop,
7310 however, we don't detect that common subexpression. This will be caught
7311 when global cse is implemented, but this is a quite common case.
7313 This function handles the most common cases of these common expressions.
7314 It is called after we have processed the basic block ending with the
7315 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7316 jumps to a label used only once. */
7319 cse_around_loop (loop_start)
7324 struct table_elt *p;
7326 /* If the jump at the end of the loop doesn't go to the start, we don't
7328 for (insn = PREV_INSN (loop_start);
7329 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7330 insn = PREV_INSN (insn))
7334 || GET_CODE (insn) != NOTE
7335 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7338 /* If the last insn of the loop (the end test) was an NE comparison,
7339 we will interpret it as an EQ comparison, since we fell through
7340 the loop. Any equivalences resulting from that comparison are
7341 therefore not valid and must be invalidated. */
7342 if (last_jump_equiv_class)
7343 for (p = last_jump_equiv_class->first_same_value; p;
7344 p = p->next_same_value)
7345 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7346 || GET_CODE (p->exp) == SUBREG)
7347 invalidate (p->exp);
7348 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7349 || GET_CODE (p->exp) == ZERO_EXTRACT)
7350 invalidate (XEXP (p->exp, 0));
7352 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7353 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7355 The only thing we do with SET_DEST is invalidate entries, so we
7356 can safely process each SET in order. It is slightly less efficient
7357 to do so, but we only want to handle the most common cases. */
7359 for (insn = NEXT_INSN (loop_start);
7360 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7361 && ! (GET_CODE (insn) == NOTE
7362 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7363 insn = NEXT_INSN (insn))
7365 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7366 && (GET_CODE (PATTERN (insn)) == SET
7367 || GET_CODE (PATTERN (insn)) == CLOBBER))
7368 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7369 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7370 && GET_CODE (PATTERN (insn)) == PARALLEL)
7371 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7372 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7373 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7374 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7379 /* Variable used for communications between the next two routines. */
7381 static struct write_data skipped_writes_memory;
7383 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7384 since they are done elsewhere. This function is called via note_stores. */
7387 invalidate_skipped_set (dest, set)
7391 if (GET_CODE (set) == CLOBBER
7398 if (GET_CODE (dest) == MEM)
7399 note_mem_written (dest, &skipped_writes_memory);
7401 /* There are times when an address can appear varying and be a PLUS
7402 during this scan when it would be a fixed address were we to know
7403 the proper equivalences. So promote "nonscalar" to be "all". */
7404 if (skipped_writes_memory.nonscalar)
7405 skipped_writes_memory.all = 1;
7407 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7408 || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
7410 else if (GET_CODE (dest) == STRICT_LOW_PART
7411 || GET_CODE (dest) == ZERO_EXTRACT)
7412 invalidate (XEXP (dest, 0));
7415 /* Invalidate all insns from START up to the end of the function or the
7416 next label. This called when we wish to CSE around a block that is
7417 conditionally executed. */
7420 invalidate_skipped_block (start)
7424 static struct write_data init = {0, 0, 0, 0};
7425 static struct write_data everything = {0, 1, 1, 1};
7427 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7428 insn = NEXT_INSN (insn))
7430 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7433 skipped_writes_memory = init;
7435 if (GET_CODE (insn) == CALL_INSN)
7437 invalidate_for_call ();
7438 skipped_writes_memory = everything;
7441 note_stores (PATTERN (insn), invalidate_skipped_set);
7442 invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn));
7446 /* Used for communication between the following two routines; contains a
7447 value to be checked for modification. */
7449 static rtx cse_check_loop_start_value;
7451 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7452 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7455 cse_check_loop_start (x, set)
7459 if (cse_check_loop_start_value == 0
7460 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7463 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7464 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7465 cse_check_loop_start_value = 0;
7468 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7469 a loop that starts with the label at LOOP_START.
7471 If X is a SET, we see if its SET_SRC is currently in our hash table.
7472 If so, we see if it has a value equal to some register used only in the
7473 loop exit code (as marked by jump.c).
7475 If those two conditions are true, we search backwards from the start of
7476 the loop to see if that same value was loaded into a register that still
7477 retains its value at the start of the loop.
7479 If so, we insert an insn after the load to copy the destination of that
7480 load into the equivalent register and (try to) replace our SET_SRC with that
7483 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7486 cse_set_around_loop (x, insn, loop_start)
7491 struct table_elt *src_elt;
7492 static struct write_data init = {0, 0, 0, 0};
7493 struct write_data writes_memory;
7495 writes_memory = init;
7497 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7498 are setting PC or CC0 or whose SET_SRC is already a register. */
7499 if (GET_CODE (x) == SET
7500 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
7501 && GET_CODE (SET_SRC (x)) != REG)
7503 src_elt = lookup (SET_SRC (x),
7504 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
7505 GET_MODE (SET_DEST (x)));
7508 for (src_elt = src_elt->first_same_value; src_elt;
7509 src_elt = src_elt->next_same_value)
7510 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
7511 && COST (src_elt->exp) < COST (SET_SRC (x)))
7515 /* Look for an insn in front of LOOP_START that sets
7516 something in the desired mode to SET_SRC (x) before we hit
7517 a label or CALL_INSN. */
7519 for (p = prev_nonnote_insn (loop_start);
7520 p && GET_CODE (p) != CALL_INSN
7521 && GET_CODE (p) != CODE_LABEL;
7522 p = prev_nonnote_insn (p))
7523 if ((set = single_set (p)) != 0
7524 && GET_CODE (SET_DEST (set)) == REG
7525 && GET_MODE (SET_DEST (set)) == src_elt->mode
7526 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
7528 /* We now have to ensure that nothing between P
7529 and LOOP_START modified anything referenced in
7530 SET_SRC (x). We know that nothing within the loop
7531 can modify it, or we would have invalidated it in
7535 cse_check_loop_start_value = SET_SRC (x);
7536 for (q = p; q != loop_start; q = NEXT_INSN (q))
7537 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
7538 note_stores (PATTERN (q), cse_check_loop_start);
7540 /* If nothing was changed and we can replace our
7541 SET_SRC, add an insn after P to copy its destination
7542 to what we will be replacing SET_SRC with. */
7543 if (cse_check_loop_start_value
7544 && validate_change (insn, &SET_SRC (x),
7546 emit_insn_after (gen_move_insn (src_elt->exp,
7554 /* Now invalidate anything modified by X. */
7555 note_mem_written (SET_DEST (x), &writes_memory);
7557 if (writes_memory.var)
7558 invalidate_memory (&writes_memory);
7560 /* See comment on similar code in cse_insn for explanation of these tests. */
7561 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
7562 || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all
7563 && ! cse_rtx_addr_varies_p (SET_DEST (x))))
7564 invalidate (SET_DEST (x));
7565 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
7566 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
7567 invalidate (XEXP (SET_DEST (x), 0));
7570 /* Find the end of INSN's basic block and return its range,
7571 the total number of SETs in all the insns of the block, the last insn of the
7572 block, and the branch path.
7574 The branch path indicates which branches should be followed. If a non-zero
7575 path size is specified, the block should be rescanned and a different set
7576 of branches will be taken. The branch path is only used if
7577 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7579 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7580 used to describe the block. It is filled in with the information about
7581 the current block. The incoming structure's branch path, if any, is used
7582 to construct the output branch path. */
7585 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
7587 struct cse_basic_block_data *data;
7594 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
7595 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
7596 int path_size = data->path_size;
7600 /* Update the previous branch path, if any. If the last branch was
7601 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7602 shorten the path by one and look at the previous branch. We know that
7603 at least one branch must have been taken if PATH_SIZE is non-zero. */
7604 while (path_size > 0)
7606 if (data->path[path_size - 1].status != NOT_TAKEN)
7608 data->path[path_size - 1].status = NOT_TAKEN;
7615 /* Scan to end of this basic block. */
7616 while (p && GET_CODE (p) != CODE_LABEL)
7618 /* Don't cse out the end of a loop. This makes a difference
7619 only for the unusual loops that always execute at least once;
7620 all other loops have labels there so we will stop in any case.
7621 Cse'ing out the end of the loop is dangerous because it
7622 might cause an invariant expression inside the loop
7623 to be reused after the end of the loop. This would make it
7624 hard to move the expression out of the loop in loop.c,
7625 especially if it is one of several equivalent expressions
7626 and loop.c would like to eliminate it.
7628 If we are running after loop.c has finished, we can ignore
7629 the NOTE_INSN_LOOP_END. */
7631 if (! after_loop && GET_CODE (p) == NOTE
7632 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
7635 /* Don't cse over a call to setjmp; on some machines (eg vax)
7636 the regs restored by the longjmp come from
7637 a later time than the setjmp. */
7638 if (GET_CODE (p) == NOTE
7639 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
7642 /* A PARALLEL can have lots of SETs in it,
7643 especially if it is really an ASM_OPERANDS. */
7644 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
7645 && GET_CODE (PATTERN (p)) == PARALLEL)
7646 nsets += XVECLEN (PATTERN (p), 0);
7647 else if (GET_CODE (p) != NOTE)
7650 /* Ignore insns made by CSE; they cannot affect the boundaries of
7653 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
7654 high_cuid = INSN_CUID (p);
7655 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
7656 low_cuid = INSN_CUID (p);
7658 /* See if this insn is in our branch path. If it is and we are to
7660 if (path_entry < path_size && data->path[path_entry].branch == p)
7662 if (data->path[path_entry].status != NOT_TAKEN)
7665 /* Point to next entry in path, if any. */
7669 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7670 was specified, we haven't reached our maximum path length, there are
7671 insns following the target of the jump, this is the only use of the
7672 jump label, and the target label is preceded by a BARRIER.
7674 Alternatively, we can follow the jump if it branches around a
7675 block of code and there are no other branches into the block.
7676 In this case invalidate_skipped_block will be called to invalidate any
7677 registers set in the block when following the jump. */
7679 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
7680 && GET_CODE (p) == JUMP_INSN
7681 && GET_CODE (PATTERN (p)) == SET
7682 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
7683 && LABEL_NUSES (JUMP_LABEL (p)) == 1
7684 && NEXT_INSN (JUMP_LABEL (p)) != 0)
7686 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
7687 if ((GET_CODE (q) != NOTE
7688 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
7689 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
7690 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
7693 /* If we ran into a BARRIER, this code is an extension of the
7694 basic block when the branch is taken. */
7695 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
7697 /* Don't allow ourself to keep walking around an
7698 always-executed loop. */
7699 if (next_real_insn (q) == next)
7705 /* Similarly, don't put a branch in our path more than once. */
7706 for (i = 0; i < path_entry; i++)
7707 if (data->path[i].branch == p)
7710 if (i != path_entry)
7713 data->path[path_entry].branch = p;
7714 data->path[path_entry++].status = TAKEN;
7716 /* This branch now ends our path. It was possible that we
7717 didn't see this branch the last time around (when the
7718 insn in front of the target was a JUMP_INSN that was
7719 turned into a no-op). */
7720 path_size = path_entry;
7723 /* Mark block so we won't scan it again later. */
7724 PUT_MODE (NEXT_INSN (p), QImode);
7726 /* Detect a branch around a block of code. */
7727 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
7731 if (next_real_insn (q) == next)
7737 for (i = 0; i < path_entry; i++)
7738 if (data->path[i].branch == p)
7741 if (i != path_entry)
7744 /* This is no_labels_between_p (p, q) with an added check for
7745 reaching the end of a function (in case Q precedes P). */
7746 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
7747 if (GET_CODE (tmp) == CODE_LABEL)
7752 data->path[path_entry].branch = p;
7753 data->path[path_entry++].status = AROUND;
7755 path_size = path_entry;
7758 /* Mark block so we won't scan it again later. */
7759 PUT_MODE (NEXT_INSN (p), QImode);
7766 data->low_cuid = low_cuid;
7767 data->high_cuid = high_cuid;
7768 data->nsets = nsets;
7771 /* If all jumps in the path are not taken, set our path length to zero
7772 so a rescan won't be done. */
7773 for (i = path_size - 1; i >= 0; i--)
7774 if (data->path[i].status != NOT_TAKEN)
7778 data->path_size = 0;
7780 data->path_size = path_size;
7782 /* End the current branch path. */
7783 data->path[path_size].branch = 0;
7786 /* Perform cse on the instructions of a function.
7787 F is the first instruction.
7788 NREGS is one plus the highest pseudo-reg number used in the instruction.
7790 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7791 (only if -frerun-cse-after-loop).
7793 Returns 1 if jump_optimize should be redone due to simplifications
7794 in conditional jump instructions. */
7797 cse_main (f, nregs, after_loop, file)
7803 struct cse_basic_block_data val;
7804 register rtx insn = f;
7807 cse_jumps_altered = 0;
7808 constant_pool_entries_cost = 0;
7815 all_minus_one = (int *) alloca (nregs * sizeof (int));
7816 consec_ints = (int *) alloca (nregs * sizeof (int));
7818 for (i = 0; i < nregs; i++)
7820 all_minus_one[i] = -1;
7824 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
7825 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
7826 reg_qty = (int *) alloca (nregs * sizeof (int));
7827 reg_in_table = (int *) alloca (nregs * sizeof (int));
7828 reg_tick = (int *) alloca (nregs * sizeof (int));
7830 /* Discard all the free elements of the previous function
7831 since they are allocated in the temporarily obstack. */
7832 bzero (table, sizeof table);
7833 free_element_chain = 0;
7834 n_elements_made = 0;
7836 /* Find the largest uid. */
7838 max_uid = get_max_uid ();
7839 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
7840 bzero (uid_cuid, (max_uid + 1) * sizeof (int));
7842 /* Compute the mapping from uids to cuids.
7843 CUIDs are numbers assigned to insns, like uids,
7844 except that cuids increase monotonically through the code.
7845 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7846 between two insns is not affected by -g. */
7848 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7850 if (GET_CODE (insn) != NOTE
7851 || NOTE_LINE_NUMBER (insn) < 0)
7852 INSN_CUID (insn) = ++i;
7854 /* Give a line number note the same cuid as preceding insn. */
7855 INSN_CUID (insn) = i;
7858 /* Initialize which registers are clobbered by calls. */
7860 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7862 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7863 if ((call_used_regs[i]
7864 /* Used to check !fixed_regs[i] here, but that isn't safe;
7865 fixed regs are still call-clobbered, and sched can get
7866 confused if they can "live across calls".
7868 The frame pointer is always preserved across calls. The arg
7869 pointer is if it is fixed. The stack pointer usually is, unless
7870 RETURN_POPS_ARGS, in which case an explicit CLOBBER
7871 will be present. If we are generating PIC code, the PIC offset
7872 table register is preserved across calls. */
7874 && i != STACK_POINTER_REGNUM
7875 && i != FRAME_POINTER_REGNUM
7876 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
7877 && i != HARD_FRAME_POINTER_REGNUM
7879 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7880 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7882 #ifdef PIC_OFFSET_TABLE_REGNUM
7883 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7887 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7889 /* Loop over basic blocks.
7890 Compute the maximum number of qty's needed for each basic block
7891 (which is 2 for each SET). */
7895 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7896 flag_cse_skip_blocks);
7898 /* If this basic block was already processed or has no sets, skip it. */
7899 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7901 PUT_MODE (insn, VOIDmode);
7902 insn = (val.last ? NEXT_INSN (val.last) : 0);
7907 cse_basic_block_start = val.low_cuid;
7908 cse_basic_block_end = val.high_cuid;
7909 max_qty = val.nsets * 2;
7912 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
7913 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7916 /* Make MAX_QTY bigger to give us room to optimize
7917 past the end of this basic block, if that should prove useful. */
7923 /* If this basic block is being extended by following certain jumps,
7924 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7925 Otherwise, we start after this basic block. */
7926 if (val.path_size > 0)
7927 cse_basic_block (insn, val.last, val.path, 0);
7930 int old_cse_jumps_altered = cse_jumps_altered;
7933 /* When cse changes a conditional jump to an unconditional
7934 jump, we want to reprocess the block, since it will give
7935 us a new branch path to investigate. */
7936 cse_jumps_altered = 0;
7937 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7938 if (cse_jumps_altered == 0
7939 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7942 cse_jumps_altered |= old_cse_jumps_altered;
7950 /* Tell refers_to_mem_p that qty_const info is not available. */
7953 if (max_elements_made < n_elements_made)
7954 max_elements_made = n_elements_made;
7956 return cse_jumps_altered;
7959 /* Process a single basic block. FROM and TO and the limits of the basic
7960 block. NEXT_BRANCH points to the branch path when following jumps or
7961 a null path when not following jumps.
7963 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7964 loop. This is true when we are being called for the last time on a
7965 block and this CSE pass is before loop.c. */
7968 cse_basic_block (from, to, next_branch, around_loop)
7969 register rtx from, to;
7970 struct branch_path *next_branch;
7975 int in_libcall_block = 0;
7977 /* Each of these arrays is undefined before max_reg, so only allocate
7978 the space actually needed and adjust the start below. */
7980 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7981 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7982 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
7983 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7984 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7986 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
7987 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7988 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7990 qty_first_reg -= max_reg;
7991 qty_last_reg -= max_reg;
7992 qty_mode -= max_reg;
7993 qty_const -= max_reg;
7994 qty_const_insn -= max_reg;
7995 qty_comparison_code -= max_reg;
7996 qty_comparison_qty -= max_reg;
7997 qty_comparison_const -= max_reg;
8001 /* TO might be a label. If so, protect it from being deleted. */
8002 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8005 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8007 register enum rtx_code code;
8009 /* See if this is a branch that is part of the path. If so, and it is
8010 to be taken, do so. */
8011 if (next_branch->branch == insn)
8013 enum taken status = next_branch++->status;
8014 if (status != NOT_TAKEN)
8016 if (status == TAKEN)
8017 record_jump_equiv (insn, 1);
8019 invalidate_skipped_block (NEXT_INSN (insn));
8021 /* Set the last insn as the jump insn; it doesn't affect cc0.
8022 Then follow this branch. */
8027 insn = JUMP_LABEL (insn);
8032 code = GET_CODE (insn);
8033 if (GET_MODE (insn) == QImode)
8034 PUT_MODE (insn, VOIDmode);
8036 if (GET_RTX_CLASS (code) == 'i')
8038 /* Process notes first so we have all notes in canonical forms when
8039 looking for duplicate operations. */
8041 if (REG_NOTES (insn))
8042 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8044 /* Track when we are inside in LIBCALL block. Inside such a block,
8045 we do not want to record destinations. The last insn of a
8046 LIBCALL block is not considered to be part of the block, since
8047 its destination is the result of the block and hence should be
8050 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
8051 in_libcall_block = 1;
8052 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8053 in_libcall_block = 0;
8055 cse_insn (insn, in_libcall_block);
8058 /* If INSN is now an unconditional jump, skip to the end of our
8059 basic block by pretending that we just did the last insn in the
8060 basic block. If we are jumping to the end of our block, show
8061 that we can have one usage of TO. */
8063 if (simplejump_p (insn))
8068 if (JUMP_LABEL (insn) == to)
8071 /* Maybe TO was deleted because the jump is unconditional.
8072 If so, there is nothing left in this basic block. */
8073 /* ??? Perhaps it would be smarter to set TO
8074 to whatever follows this insn,
8075 and pretend the basic block had always ended here. */
8076 if (INSN_DELETED_P (to))
8079 insn = PREV_INSN (to);
8082 /* See if it is ok to keep on going past the label
8083 which used to end our basic block. Remember that we incremented
8084 the count of that label, so we decrement it here. If we made
8085 a jump unconditional, TO_USAGE will be one; in that case, we don't
8086 want to count the use in that jump. */
8088 if (to != 0 && NEXT_INSN (insn) == to
8089 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8091 struct cse_basic_block_data val;
8093 insn = NEXT_INSN (to);
8095 if (LABEL_NUSES (to) == 0)
8098 /* Find the end of the following block. Note that we won't be
8099 following branches in this case. If TO was the last insn
8100 in the function, we are done. Similarly, if we deleted the
8101 insn after TO, it must have been because it was preceded by
8102 a BARRIER. In that case, we are done with this block because it
8103 has no continuation. */
8105 if (insn == 0 || INSN_DELETED_P (insn))
8110 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8112 /* If the tables we allocated have enough space left
8113 to handle all the SETs in the next basic block,
8114 continue through it. Otherwise, return,
8115 and that block will be scanned individually. */
8116 if (val.nsets * 2 + next_qty > max_qty)
8119 cse_basic_block_start = val.low_cuid;
8120 cse_basic_block_end = val.high_cuid;
8123 /* Prevent TO from being deleted if it is a label. */
8124 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8127 /* Back up so we process the first insn in the extension. */
8128 insn = PREV_INSN (insn);
8132 if (next_qty > max_qty)
8135 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8136 the previous insn is the only insn that branches to the head of a loop,
8137 we can cse into the loop. Don't do this if we changed the jump
8138 structure of a loop unless we aren't going to be following jumps. */
8140 if ((cse_jumps_altered == 0
8141 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8142 && around_loop && to != 0
8143 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8144 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8145 && JUMP_LABEL (PREV_INSN (to)) != 0
8146 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8147 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8149 return to ? NEXT_INSN (to) : 0;
8152 /* Count the number of times registers are used (not set) in X.
8153 COUNTS is an array in which we accumulate the count, INCR is how much
8154 we count each register usage. */
8157 count_reg_usage (x, counts, incr)
8162 enum rtx_code code = GET_CODE (x);
8169 counts[REGNO (x)] += incr;
8183 /* Unless we are setting a REG, count everything in SET_DEST. */
8184 if (GET_CODE (SET_DEST (x)) != REG)
8185 count_reg_usage (SET_DEST (x), counts, incr);
8186 count_reg_usage (SET_SRC (x), counts, incr);
8192 count_reg_usage (PATTERN (x), counts, incr);
8194 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8198 count_reg_usage (REG_NOTES (x), counts, incr);
8203 if (REG_NOTE_KIND (x) == REG_EQUAL)
8204 count_reg_usage (XEXP (x, 0), counts, incr);
8206 count_reg_usage (XEXP (x, 1), counts, incr);
8210 fmt = GET_RTX_FORMAT (code);
8211 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8214 count_reg_usage (XEXP (x, i), counts, incr);
8215 else if (fmt[i] == 'E')
8216 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8217 count_reg_usage (XVECEXP (x, i, j), counts, incr);
8221 /* Scan all the insns and delete any that are dead; i.e., they store a register
8222 that is never used or they copy a register to itself.
8224 This is used to remove insns made obviously dead by cse. It improves the
8225 heuristics in loop since it won't try to move dead invariants out of loops
8226 or make givs for dead quantities. The remaining passes of the compilation
8227 are also sped up. */
8230 delete_dead_from_cse (insns, nreg)
8234 int *counts = (int *) alloca (nreg * sizeof (int));
8240 /* First count the number of times each register is used. */
8241 bzero (counts, sizeof (int) * nreg);
8242 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8243 count_reg_usage (insn, counts, 1);
8245 /* Go from the last insn to the first and delete insns that only set unused
8246 registers or copy a register to itself. As we delete an insn, remove
8247 usage counts for registers it uses. */
8248 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8252 prev = prev_real_insn (insn);
8254 /* Don't delete any insns that are part of a libcall block.
8255 Flow or loop might get confused if we did that. Remember
8256 that we are scanning backwards. */
8257 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8262 else if (GET_CODE (PATTERN (insn)) == SET)
8264 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8265 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8269 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8270 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8271 && ((tem = next_nonnote_insn (insn)) == 0
8272 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8273 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8276 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8277 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8278 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8279 || side_effects_p (SET_SRC (PATTERN (insn))))
8282 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8283 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8285 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8287 if (GET_CODE (elt) == SET)
8289 if (GET_CODE (SET_DEST (elt)) == REG
8290 && SET_DEST (elt) == SET_SRC (elt))
8294 else if (GET_CODE (SET_DEST (elt)) == CC0
8295 && ! side_effects_p (SET_SRC (elt))
8296 && ((tem = next_nonnote_insn (insn)) == 0
8297 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8298 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8301 else if (GET_CODE (SET_DEST (elt)) != REG
8302 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8303 || counts[REGNO (SET_DEST (elt))] != 0
8304 || side_effects_p (SET_SRC (elt)))
8307 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8313 /* If this is a dead insn, delete it and show registers in it aren't
8318 count_reg_usage (insn, counts, -1);
8322 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))