1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
35 #include "insn-config.h"
45 /* The basic idea of common subexpression elimination is to go
46 through the code, keeping a record of expressions that would
47 have the same value at the current scan point, and replacing
48 expressions encountered with the cheapest equivalent expression.
50 It is too complicated to keep track of the different possibilities
51 when control paths merge in this code; so, at each label, we forget all
52 that is known and start fresh. This can be described as processing each
53 extended basic block separately. We have a separate pass to perform
56 Note CSE can turn a conditional or computed jump into a nop or
57 an unconditional jump. When this occurs we arrange to run the jump
58 optimizer after CSE to delete the unreachable code.
60 We use two data structures to record the equivalent expressions:
61 a hash table for most expressions, and a vector of "quantity
62 numbers" to record equivalent (pseudo) registers.
64 The use of the special data structure for registers is desirable
65 because it is faster. It is possible because registers references
66 contain a fairly small number, the register number, taken from
67 a contiguously allocated series, and two register references are
68 identical if they have the same number. General expressions
69 do not have any such thing, so the only way to retrieve the
70 information recorded on an expression other than a register
71 is to keep it in a hash table.
73 Registers and "quantity numbers":
75 At the start of each basic block, all of the (hardware and pseudo)
76 registers used in the function are given distinct quantity
77 numbers to indicate their contents. During scan, when the code
78 copies one register into another, we copy the quantity number.
79 When a register is loaded in any other way, we allocate a new
80 quantity number to describe the value generated by this operation.
81 `reg_qty' records what quantity a register is currently thought
84 All real quantity numbers are greater than or equal to `max_reg'.
85 If register N has not been assigned a quantity, reg_qty[N] will equal N.
87 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
88 entries should be referenced with an index below `max_reg'.
90 We also maintain a bidirectional chain of registers for each
91 quantity number. The `qty_table` members `first_reg' and `last_reg',
92 and `reg_eqv_table' members `next' and `prev' hold these chains.
94 The first register in a chain is the one whose lifespan is least local.
95 Among equals, it is the one that was seen first.
96 We replace any equivalent register with that one.
98 If two registers have the same quantity number, it must be true that
99 REG expressions with qty_table `mode' must be in the hash table for both
100 registers and must be in the same class.
102 The converse is not true. Since hard registers may be referenced in
103 any mode, two REG expressions might be equivalent in the hash table
104 but not have the same quantity number if the quantity number of one
105 of the registers is not the same mode as those expressions.
107 Constants and quantity numbers
109 When a quantity has a known constant value, that value is stored
110 in the appropriate qty_table `const_rtx'. This is in addition to
111 putting the constant in the hash table as is usual for non-regs.
113 Whether a reg or a constant is preferred is determined by the configuration
114 macro CONST_COSTS and will often depend on the constant value. In any
115 event, expressions containing constants can be simplified, by fold_rtx.
117 When a quantity has a known nearly constant value (such as an address
118 of a stack slot), that value is stored in the appropriate qty_table
121 Integer constants don't have a machine mode. However, cse
122 determines the intended machine mode from the destination
123 of the instruction that moves the constant. The machine mode
124 is recorded in the hash table along with the actual RTL
125 constant expression so that different modes are kept separate.
129 To record known equivalences among expressions in general
130 we use a hash table called `table'. It has a fixed number of buckets
131 that contain chains of `struct table_elt' elements for expressions.
132 These chains connect the elements whose expressions have the same
135 Other chains through the same elements connect the elements which
136 currently have equivalent values.
138 Register references in an expression are canonicalized before hashing
139 the expression. This is done using `reg_qty' and qty_table `first_reg'.
140 The hash code of a register reference is computed using the quantity
141 number, not the register number.
143 When the value of an expression changes, it is necessary to remove from the
144 hash table not just that expression but all expressions whose values
145 could be different as a result.
147 1. If the value changing is in memory, except in special cases
148 ANYTHING referring to memory could be changed. That is because
149 nobody knows where a pointer does not point.
150 The function `invalidate_memory' removes what is necessary.
152 The special cases are when the address is constant or is
153 a constant plus a fixed register such as the frame pointer
154 or a static chain pointer. When such addresses are stored in,
155 we can tell exactly which other such addresses must be invalidated
156 due to overlap. `invalidate' does this.
157 All expressions that refer to non-constant
158 memory addresses are also invalidated. `invalidate_memory' does this.
160 2. If the value changing is a register, all expressions
161 containing references to that register, and only those,
164 Because searching the entire hash table for expressions that contain
165 a register is very slow, we try to figure out when it isn't necessary.
166 Precisely, this is necessary only when expressions have been
167 entered in the hash table using this register, and then the value has
168 changed, and then another expression wants to be added to refer to
169 the register's new value. This sequence of circumstances is rare
170 within any one basic block.
172 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
173 reg_tick[i] is incremented whenever a value is stored in register i.
174 reg_in_table[i] holds -1 if no references to register i have been
175 entered in the table; otherwise, it contains the value reg_tick[i] had
176 when the references were entered. If we want to enter a reference
177 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
178 Until we want to enter a new entry, the mere fact that the two vectors
179 don't match makes the entries be ignored if anyone tries to match them.
181 Registers themselves are entered in the hash table as well as in
182 the equivalent-register chains. However, the vectors `reg_tick'
183 and `reg_in_table' do not apply to expressions which are simple
184 register references. These expressions are removed from the table
185 immediately when they become invalid, and this can be done even if
186 we do not immediately search for all the expressions that refer to
189 A CLOBBER rtx in an instruction invalidates its operand for further
190 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
191 invalidates everything that resides in memory.
195 Constant expressions that differ only by an additive integer
196 are called related. When a constant expression is put in
197 the table, the related expression with no constant term
198 is also entered. These are made to point at each other
199 so that it is possible to find out if there exists any
200 register equivalent to an expression related to a given expression. */
202 /* One plus largest register number used in this function. */
206 /* One plus largest instruction UID used in this function at time of
209 static int max_insn_uid;
211 /* Length of qty_table vector. We know in advance we will not need
212 a quantity number this big. */
216 /* Next quantity number to be allocated.
217 This is 1 + the largest number needed so far. */
221 /* Per-qty information tracking.
223 `first_reg' and `last_reg' track the head and tail of the
224 chain of registers which currently contain this quantity.
226 `mode' contains the machine mode of this quantity.
228 `const_rtx' holds the rtx of the constant value of this
229 quantity, if known. A summations of the frame/arg pointer
230 and a constant can also be entered here. When this holds
231 a known value, `const_insn' is the insn which stored the
234 `comparison_{code,const,qty}' are used to track when a
235 comparison between a quantity and some constant or register has
236 been passed. In such a case, we know the results of the comparison
237 in case we see it again. These members record a comparison that
238 is known to be true. `comparison_code' holds the rtx code of such
239 a comparison, else it is set to UNKNOWN and the other two
240 comparison members are undefined. `comparison_const' holds
241 the constant being compared against, or zero if the comparison
242 is not against a constant. `comparison_qty' holds the quantity
243 being compared against when the result is known. If the comparison
244 is not with a register, `comparison_qty' is -1. */
246 struct qty_table_elem
250 rtx comparison_const;
252 unsigned int first_reg, last_reg;
253 enum machine_mode mode;
254 enum rtx_code comparison_code;
257 /* The table of all qtys, indexed by qty number. */
258 static struct qty_table_elem *qty_table;
261 /* For machines that have a CC0, we do not record its value in the hash
262 table since its use is guaranteed to be the insn immediately following
263 its definition and any other insn is presumed to invalidate it.
265 Instead, we store below the value last assigned to CC0. If it should
266 happen to be a constant, it is stored in preference to the actual
267 assigned value. In case it is a constant, we store the mode in which
268 the constant should be interpreted. */
270 static rtx prev_insn_cc0;
271 static enum machine_mode prev_insn_cc0_mode;
273 /* Previous actual insn. 0 if at first insn of basic block. */
275 static rtx prev_insn;
278 /* Insn being scanned. */
280 static rtx this_insn;
282 /* Index by register number, gives the number of the next (or
283 previous) register in the chain of registers sharing the same
286 Or -1 if this register is at the end of the chain.
288 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
290 /* Per-register equivalence chain. */
296 /* The table of all register equivalence chains. */
297 static struct reg_eqv_elem *reg_eqv_table;
301 /* Next in hash chain. */
302 struct cse_reg_info *hash_next;
304 /* The next cse_reg_info structure in the free or used list. */
305 struct cse_reg_info *next;
310 /* The quantity number of the register's current contents. */
313 /* The number of times the register has been altered in the current
317 /* The REG_TICK value at which rtx's containing this register are
318 valid in the hash table. If this does not equal the current
319 reg_tick value, such expressions existing in the hash table are
323 /* The SUBREG that was set when REG_TICK was last incremented. Set
324 to -1 if the last store was to the whole register, not a subreg. */
325 unsigned int subreg_ticked;
328 /* A free list of cse_reg_info entries. */
329 static struct cse_reg_info *cse_reg_info_free_list;
331 /* A used list of cse_reg_info entries. */
332 static struct cse_reg_info *cse_reg_info_used_list;
333 static struct cse_reg_info *cse_reg_info_used_list_end;
335 /* A mapping from registers to cse_reg_info data structures. */
336 #define REGHASH_SHIFT 7
337 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
338 #define REGHASH_MASK (REGHASH_SIZE - 1)
339 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
341 #define REGHASH_FN(REGNO) \
342 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
344 /* The last lookup we did into the cse_reg_info_tree. This allows us
345 to cache repeated lookups. */
346 static unsigned int cached_regno;
347 static struct cse_reg_info *cached_cse_reg_info;
349 /* A HARD_REG_SET containing all the hard registers for which there is
350 currently a REG expression in the hash table. Note the difference
351 from the above variables, which indicate if the REG is mentioned in some
352 expression in the table. */
354 static HARD_REG_SET hard_regs_in_table;
356 /* CUID of insn that starts the basic block currently being cse-processed. */
358 static int cse_basic_block_start;
360 /* CUID of insn that ends the basic block currently being cse-processed. */
362 static int cse_basic_block_end;
364 /* Vector mapping INSN_UIDs to cuids.
365 The cuids are like uids but increase monotonically always.
366 We use them to see whether a reg is used outside a given basic block. */
368 static int *uid_cuid;
370 /* Highest UID in UID_CUID. */
373 /* Get the cuid of an insn. */
375 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
377 /* Nonzero if this pass has made changes, and therefore it's
378 worthwhile to run the garbage collector. */
380 static int cse_altered;
382 /* Nonzero if cse has altered conditional jump insns
383 in such a way that jump optimization should be redone. */
385 static int cse_jumps_altered;
387 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
388 REG_LABEL, we have to rerun jump after CSE to put in the note. */
389 static int recorded_label_ref;
391 /* canon_hash stores 1 in do_not_record
392 if it notices a reference to CC0, PC, or some other volatile
395 static int do_not_record;
397 #ifdef LOAD_EXTEND_OP
399 /* Scratch rtl used when looking for load-extended copy of a MEM. */
400 static rtx memory_extend_rtx;
403 /* canon_hash stores 1 in hash_arg_in_memory
404 if it notices a reference to memory within the expression being hashed. */
406 static int hash_arg_in_memory;
408 /* The hash table contains buckets which are chains of `struct table_elt's,
409 each recording one expression's information.
410 That expression is in the `exp' field.
412 The canon_exp field contains a canonical (from the point of view of
413 alias analysis) version of the `exp' field.
415 Those elements with the same hash code are chained in both directions
416 through the `next_same_hash' and `prev_same_hash' fields.
418 Each set of expressions with equivalent values
419 are on a two-way chain through the `next_same_value'
420 and `prev_same_value' fields, and all point with
421 the `first_same_value' field at the first element in
422 that chain. The chain is in order of increasing cost.
423 Each element's cost value is in its `cost' field.
425 The `in_memory' field is nonzero for elements that
426 involve any reference to memory. These elements are removed
427 whenever a write is done to an unidentified location in memory.
428 To be safe, we assume that a memory address is unidentified unless
429 the address is either a symbol constant or a constant plus
430 the frame pointer or argument pointer.
432 The `related_value' field is used to connect related expressions
433 (that differ by adding an integer).
434 The related expressions are chained in a circular fashion.
435 `related_value' is zero for expressions for which this
438 The `cost' field stores the cost of this element's expression.
439 The `regcost' field stores the value returned by approx_reg_cost for
440 this element's expression.
442 The `is_const' flag is set if the element is a constant (including
445 The `flag' field is used as a temporary during some search routines.
447 The `mode' field is usually the same as GET_MODE (`exp'), but
448 if `exp' is a CONST_INT and has no machine mode then the `mode'
449 field is the mode it was being used as. Each constant is
450 recorded separately for each mode it is used with. */
456 struct table_elt *next_same_hash;
457 struct table_elt *prev_same_hash;
458 struct table_elt *next_same_value;
459 struct table_elt *prev_same_value;
460 struct table_elt *first_same_value;
461 struct table_elt *related_value;
464 enum machine_mode mode;
470 /* We don't want a lot of buckets, because we rarely have very many
471 things stored in the hash table, and a lot of buckets slows
472 down a lot of loops that happen frequently. */
474 #define HASH_SIZE (1 << HASH_SHIFT)
475 #define HASH_MASK (HASH_SIZE - 1)
477 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
478 register (hard registers may require `do_not_record' to be set). */
481 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
482 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
483 : canon_hash (X, M)) & HASH_MASK)
485 /* Determine whether register number N is considered a fixed register for the
486 purpose of approximating register costs.
487 It is desirable to replace other regs with fixed regs, to reduce need for
489 A reg wins if it is either the frame pointer or designated as fixed. */
490 #define FIXED_REGNO_P(N) \
491 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
492 || fixed_regs[N] || global_regs[N])
494 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
495 hard registers and pointers into the frame are the cheapest with a cost
496 of 0. Next come pseudos with a cost of one and other hard registers with
497 a cost of 2. Aside from these special cases, call `rtx_cost'. */
499 #define CHEAP_REGNO(N) \
500 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
501 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
502 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
503 || ((N) < FIRST_PSEUDO_REGISTER \
504 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
506 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
507 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
509 /* Get the info associated with register N. */
511 #define GET_CSE_REG_INFO(N) \
512 (((N) == cached_regno && cached_cse_reg_info) \
513 ? cached_cse_reg_info : get_cse_reg_info ((N)))
515 /* Get the number of times this register has been updated in this
518 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
520 /* Get the point at which REG was recorded in the table. */
522 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
524 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
527 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
529 /* Get the quantity number for REG. */
531 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
533 /* Determine if the quantity number for register X represents a valid index
534 into the qty_table. */
536 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (int) (N))
538 static struct table_elt *table[HASH_SIZE];
540 /* Chain of `struct table_elt's made so far for this function
541 but currently removed from the table. */
543 static struct table_elt *free_element_chain;
545 /* Number of `struct table_elt' structures made so far for this function. */
547 static int n_elements_made;
549 /* Maximum value `n_elements_made' has had so far in this compilation
550 for functions previously processed. */
552 static int max_elements_made;
554 /* Surviving equivalence class when two equivalence classes are merged
555 by recording the effects of a jump in the last insn. Zero if the
556 last insn was not a conditional jump. */
558 static struct table_elt *last_jump_equiv_class;
560 /* Set to the cost of a constant pool reference if one was found for a
561 symbolic constant. If this was found, it means we should try to
562 convert constants into constant pool entries if they don't fit in
565 static int constant_pool_entries_cost;
567 /* Define maximum length of a branch path. */
569 #define PATHLENGTH 10
571 /* This data describes a block that will be processed by cse_basic_block. */
573 struct cse_basic_block_data
575 /* Lowest CUID value of insns in block. */
577 /* Highest CUID value of insns in block. */
579 /* Total number of SETs in block. */
581 /* Last insn in the block. */
583 /* Size of current branch path, if any. */
585 /* Current branch path, indicating which branches will be taken. */
588 /* The branch insn. */
590 /* Whether it should be taken or not. AROUND is the same as taken
591 except that it is used when the destination label is not preceded
593 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
597 static bool fixed_base_plus_p PARAMS ((rtx x));
598 static int notreg_cost PARAMS ((rtx, enum rtx_code));
599 static int approx_reg_cost_1 PARAMS ((rtx *, void *));
600 static int approx_reg_cost PARAMS ((rtx));
601 static int preferrable PARAMS ((int, int, int, int));
602 static void new_basic_block PARAMS ((void));
603 static void make_new_qty PARAMS ((unsigned int, enum machine_mode));
604 static void make_regs_eqv PARAMS ((unsigned int, unsigned int));
605 static void delete_reg_equiv PARAMS ((unsigned int));
606 static int mention_regs PARAMS ((rtx));
607 static int insert_regs PARAMS ((rtx, struct table_elt *, int));
608 static void remove_from_table PARAMS ((struct table_elt *, unsigned));
609 static struct table_elt *lookup PARAMS ((rtx, unsigned, enum machine_mode)),
610 *lookup_for_remove PARAMS ((rtx, unsigned, enum machine_mode));
611 static rtx lookup_as_function PARAMS ((rtx, enum rtx_code));
612 static struct table_elt *insert PARAMS ((rtx, struct table_elt *, unsigned,
614 static void merge_equiv_classes PARAMS ((struct table_elt *,
615 struct table_elt *));
616 static void invalidate PARAMS ((rtx, enum machine_mode));
617 static int cse_rtx_varies_p PARAMS ((rtx, int));
618 static void remove_invalid_refs PARAMS ((unsigned int));
619 static void remove_invalid_subreg_refs PARAMS ((unsigned int, unsigned int,
621 static void rehash_using_reg PARAMS ((rtx));
622 static void invalidate_memory PARAMS ((void));
623 static void invalidate_for_call PARAMS ((void));
624 static rtx use_related_value PARAMS ((rtx, struct table_elt *));
625 static unsigned canon_hash PARAMS ((rtx, enum machine_mode));
626 static unsigned canon_hash_string PARAMS ((const char *));
627 static unsigned safe_hash PARAMS ((rtx, enum machine_mode));
628 static int exp_equiv_p PARAMS ((rtx, rtx, int, int));
629 static rtx canon_reg PARAMS ((rtx, rtx));
630 static void find_best_addr PARAMS ((rtx, rtx *, enum machine_mode));
631 static enum rtx_code find_comparison_args PARAMS ((enum rtx_code, rtx *, rtx *,
633 enum machine_mode *));
634 static rtx fold_rtx PARAMS ((rtx, rtx));
635 static rtx equiv_constant PARAMS ((rtx));
636 static void record_jump_equiv PARAMS ((rtx, int));
637 static void record_jump_cond PARAMS ((enum rtx_code, enum machine_mode,
639 static void cse_insn PARAMS ((rtx, rtx));
640 static int addr_affects_sp_p PARAMS ((rtx));
641 static void invalidate_from_clobbers PARAMS ((rtx));
642 static rtx cse_process_notes PARAMS ((rtx, rtx));
643 static void cse_around_loop PARAMS ((rtx));
644 static void invalidate_skipped_set PARAMS ((rtx, rtx, void *));
645 static void invalidate_skipped_block PARAMS ((rtx));
646 static void cse_check_loop_start PARAMS ((rtx, rtx, void *));
647 static void cse_set_around_loop PARAMS ((rtx, rtx, rtx));
648 static rtx cse_basic_block PARAMS ((rtx, rtx, struct branch_path *, int));
649 static void count_reg_usage PARAMS ((rtx, int *, rtx, int));
650 static int check_for_label_ref PARAMS ((rtx *, void *));
651 extern void dump_class PARAMS ((struct table_elt*));
652 static struct cse_reg_info * get_cse_reg_info PARAMS ((unsigned int));
653 static int check_dependence PARAMS ((rtx *, void *));
655 static void flush_hash_table PARAMS ((void));
656 static bool insn_live_p PARAMS ((rtx, int *));
657 static bool set_live_p PARAMS ((rtx, rtx, int *));
658 static bool dead_libcall_p PARAMS ((rtx, int *));
660 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
661 virtual regs here because the simplify_*_operation routines are called
662 by integrate.c, which is called before virtual register instantiation. */
665 fixed_base_plus_p (x)
668 switch (GET_CODE (x))
671 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
673 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
675 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
676 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
681 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
683 return fixed_base_plus_p (XEXP (x, 0));
693 /* Dump the expressions in the equivalence class indicated by CLASSP.
694 This function is used only for debugging. */
697 struct table_elt *classp;
699 struct table_elt *elt;
701 fprintf (stderr, "Equivalence chain for ");
702 print_rtl (stderr, classp->exp);
703 fprintf (stderr, ": \n");
705 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
707 print_rtl (stderr, elt->exp);
708 fprintf (stderr, "\n");
712 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
715 approx_reg_cost_1 (xp, data)
722 if (x && GET_CODE (x) == REG)
724 unsigned int regno = REGNO (x);
726 if (! CHEAP_REGNO (regno))
728 if (regno < FIRST_PSEUDO_REGISTER)
730 if (SMALL_REGISTER_CLASSES)
742 /* Return an estimate of the cost of the registers used in an rtx.
743 This is mostly the number of different REG expressions in the rtx;
744 however for some exceptions like fixed registers we use a cost of
745 0. If any other hard register reference occurs, return MAX_COST. */
753 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
759 /* Return a negative value if an rtx A, whose costs are given by COST_A
760 and REGCOST_A, is more desirable than an rtx B.
761 Return a positive value if A is less desirable, or 0 if the two are
764 preferrable (cost_a, regcost_a, cost_b, regcost_b)
765 int cost_a, regcost_a, cost_b, regcost_b;
767 /* First, get rid of cases involving expressions that are entirely
769 if (cost_a != cost_b)
771 if (cost_a == MAX_COST)
773 if (cost_b == MAX_COST)
777 /* Avoid extending lifetimes of hardregs. */
778 if (regcost_a != regcost_b)
780 if (regcost_a == MAX_COST)
782 if (regcost_b == MAX_COST)
786 /* Normal operation costs take precedence. */
787 if (cost_a != cost_b)
788 return cost_a - cost_b;
789 /* Only if these are identical consider effects on register pressure. */
790 if (regcost_a != regcost_b)
791 return regcost_a - regcost_b;
795 /* Internal function, to compute cost when X is not a register; called
796 from COST macro to keep it simple. */
799 notreg_cost (x, outer)
803 return ((GET_CODE (x) == SUBREG
804 && GET_CODE (SUBREG_REG (x)) == REG
805 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
806 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
807 && (GET_MODE_SIZE (GET_MODE (x))
808 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
809 && subreg_lowpart_p (x)
810 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
811 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
813 : rtx_cost (x, outer) * 2);
816 /* Return an estimate of the cost of computing rtx X.
817 One use is in cse, to decide which expression to keep in the hash table.
818 Another is in rtl generation, to pick the cheapest way to multiply.
819 Other uses like the latter are expected in the future. */
822 rtx_cost (x, outer_code)
824 enum rtx_code outer_code ATTRIBUTE_UNUSED;
834 /* Compute the default costs of certain things.
835 Note that RTX_COSTS can override the defaults. */
841 total = COSTS_N_INSNS (5);
847 total = COSTS_N_INSNS (7);
850 /* Used in loop.c and combine.c as a marker. */
854 total = COSTS_N_INSNS (1);
863 /* If we can't tie these modes, make this expensive. The larger
864 the mode, the more expensive it is. */
865 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
866 return COSTS_N_INSNS (2
867 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
871 RTX_COSTS (x, code, outer_code);
874 CONST_COSTS (x, code, outer_code);
878 #ifdef DEFAULT_RTX_COSTS
879 DEFAULT_RTX_COSTS (x, code, outer_code);
884 /* Sum the costs of the sub-rtx's, plus cost of this operation,
885 which is already in total. */
887 fmt = GET_RTX_FORMAT (code);
888 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
890 total += rtx_cost (XEXP (x, i), code);
891 else if (fmt[i] == 'E')
892 for (j = 0; j < XVECLEN (x, i); j++)
893 total += rtx_cost (XVECEXP (x, i, j), code);
898 /* Return cost of address expression X.
899 Expect that X is properly formed address reference. */
902 address_cost (x, mode)
904 enum machine_mode mode;
906 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
907 during CSE, such nodes are present. Using an ADDRESSOF node which
908 refers to the address of a REG is a good thing because we can then
909 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
911 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
914 /* We may be asked for cost of various unusual addresses, such as operands
915 of push instruction. It is not worthwhile to complicate writing
916 of ADDRESS_COST macro by such cases. */
918 if (!memory_address_p (mode, x))
921 return ADDRESS_COST (x);
923 return rtx_cost (x, MEM);
928 static struct cse_reg_info *
929 get_cse_reg_info (regno)
932 struct cse_reg_info **hash_head = ®_hash[REGHASH_FN (regno)];
933 struct cse_reg_info *p;
935 for (p = *hash_head; p != NULL; p = p->hash_next)
936 if (p->regno == regno)
941 /* Get a new cse_reg_info structure. */
942 if (cse_reg_info_free_list)
944 p = cse_reg_info_free_list;
945 cse_reg_info_free_list = p->next;
948 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
950 /* Insert into hash table. */
951 p->hash_next = *hash_head;
956 p->reg_in_table = -1;
957 p->subreg_ticked = -1;
960 p->next = cse_reg_info_used_list;
961 cse_reg_info_used_list = p;
962 if (!cse_reg_info_used_list_end)
963 cse_reg_info_used_list_end = p;
966 /* Cache this lookup; we tend to be looking up information about the
967 same register several times in a row. */
968 cached_regno = regno;
969 cached_cse_reg_info = p;
974 /* Clear the hash table and initialize each register with its own quantity,
975 for a new basic block. */
984 /* Clear out hash table state for this pass. */
986 memset ((char *) reg_hash, 0, sizeof reg_hash);
988 if (cse_reg_info_used_list)
990 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
991 cse_reg_info_free_list = cse_reg_info_used_list;
992 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
994 cached_cse_reg_info = 0;
996 CLEAR_HARD_REG_SET (hard_regs_in_table);
998 /* The per-quantity values used to be initialized here, but it is
999 much faster to initialize each as it is made in `make_new_qty'. */
1001 for (i = 0; i < HASH_SIZE; i++)
1003 struct table_elt *first;
1008 struct table_elt *last = first;
1012 while (last->next_same_hash != NULL)
1013 last = last->next_same_hash;
1015 /* Now relink this hash entire chain into
1016 the free element list. */
1018 last->next_same_hash = free_element_chain;
1019 free_element_chain = first;
1029 /* Say that register REG contains a quantity in mode MODE not in any
1030 register before and initialize that quantity. */
1033 make_new_qty (reg, mode)
1035 enum machine_mode mode;
1038 struct qty_table_elem *ent;
1039 struct reg_eqv_elem *eqv;
1041 if (next_qty >= max_qty)
1044 q = REG_QTY (reg) = next_qty++;
1045 ent = &qty_table[q];
1046 ent->first_reg = reg;
1047 ent->last_reg = reg;
1049 ent->const_rtx = ent->const_insn = NULL_RTX;
1050 ent->comparison_code = UNKNOWN;
1052 eqv = ®_eqv_table[reg];
1053 eqv->next = eqv->prev = -1;
1056 /* Make reg NEW equivalent to reg OLD.
1057 OLD is not changing; NEW is. */
1060 make_regs_eqv (new, old)
1061 unsigned int new, old;
1063 unsigned int lastr, firstr;
1064 int q = REG_QTY (old);
1065 struct qty_table_elem *ent;
1067 ent = &qty_table[q];
1069 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1070 if (! REGNO_QTY_VALID_P (old))
1074 firstr = ent->first_reg;
1075 lastr = ent->last_reg;
1077 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1078 hard regs. Among pseudos, if NEW will live longer than any other reg
1079 of the same qty, and that is beyond the current basic block,
1080 make it the new canonical replacement for this qty. */
1081 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1082 /* Certain fixed registers might be of the class NO_REGS. This means
1083 that not only can they not be allocated by the compiler, but
1084 they cannot be used in substitutions or canonicalizations
1086 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1087 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1088 || (new >= FIRST_PSEUDO_REGISTER
1089 && (firstr < FIRST_PSEUDO_REGISTER
1090 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1091 || (uid_cuid[REGNO_FIRST_UID (new)]
1092 < cse_basic_block_start))
1093 && (uid_cuid[REGNO_LAST_UID (new)]
1094 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1096 reg_eqv_table[firstr].prev = new;
1097 reg_eqv_table[new].next = firstr;
1098 reg_eqv_table[new].prev = -1;
1099 ent->first_reg = new;
1103 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1104 Otherwise, insert before any non-fixed hard regs that are at the
1105 end. Registers of class NO_REGS cannot be used as an
1106 equivalent for anything. */
1107 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1108 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1109 && new >= FIRST_PSEUDO_REGISTER)
1110 lastr = reg_eqv_table[lastr].prev;
1111 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1112 if (reg_eqv_table[lastr].next >= 0)
1113 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1115 qty_table[q].last_reg = new;
1116 reg_eqv_table[lastr].next = new;
1117 reg_eqv_table[new].prev = lastr;
1121 /* Remove REG from its equivalence class. */
1124 delete_reg_equiv (reg)
1127 struct qty_table_elem *ent;
1128 int q = REG_QTY (reg);
1131 /* If invalid, do nothing. */
1135 ent = &qty_table[q];
1137 p = reg_eqv_table[reg].prev;
1138 n = reg_eqv_table[reg].next;
1141 reg_eqv_table[n].prev = p;
1145 reg_eqv_table[p].next = n;
1149 REG_QTY (reg) = reg;
1152 /* Remove any invalid expressions from the hash table
1153 that refer to any of the registers contained in expression X.
1155 Make sure that newly inserted references to those registers
1156 as subexpressions will be considered valid.
1158 mention_regs is not called when a register itself
1159 is being stored in the table.
1161 Return 1 if we have done something that may have changed the hash code
1176 code = GET_CODE (x);
1179 unsigned int regno = REGNO (x);
1180 unsigned int endregno
1181 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1182 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1185 for (i = regno; i < endregno; i++)
1187 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1188 remove_invalid_refs (i);
1190 REG_IN_TABLE (i) = REG_TICK (i);
1191 SUBREG_TICKED (i) = -1;
1197 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1198 pseudo if they don't use overlapping words. We handle only pseudos
1199 here for simplicity. */
1200 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1201 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1203 unsigned int i = REGNO (SUBREG_REG (x));
1205 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1207 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1208 the last store to this register really stored into this
1209 subreg, then remove the memory of this subreg.
1210 Otherwise, remove any memory of the entire register and
1211 all its subregs from the table. */
1212 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1213 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1214 remove_invalid_refs (i);
1216 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1219 REG_IN_TABLE (i) = REG_TICK (i);
1220 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1224 /* If X is a comparison or a COMPARE and either operand is a register
1225 that does not have a quantity, give it one. This is so that a later
1226 call to record_jump_equiv won't cause X to be assigned a different
1227 hash code and not found in the table after that call.
1229 It is not necessary to do this here, since rehash_using_reg can
1230 fix up the table later, but doing this here eliminates the need to
1231 call that expensive function in the most common case where the only
1232 use of the register is in the comparison. */
1234 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1236 if (GET_CODE (XEXP (x, 0)) == REG
1237 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1238 if (insert_regs (XEXP (x, 0), NULL, 0))
1240 rehash_using_reg (XEXP (x, 0));
1244 if (GET_CODE (XEXP (x, 1)) == REG
1245 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1246 if (insert_regs (XEXP (x, 1), NULL, 0))
1248 rehash_using_reg (XEXP (x, 1));
1253 fmt = GET_RTX_FORMAT (code);
1254 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1256 changed |= mention_regs (XEXP (x, i));
1257 else if (fmt[i] == 'E')
1258 for (j = 0; j < XVECLEN (x, i); j++)
1259 changed |= mention_regs (XVECEXP (x, i, j));
1264 /* Update the register quantities for inserting X into the hash table
1265 with a value equivalent to CLASSP.
1266 (If the class does not contain a REG, it is irrelevant.)
1267 If MODIFIED is nonzero, X is a destination; it is being modified.
1268 Note that delete_reg_equiv should be called on a register
1269 before insert_regs is done on that register with MODIFIED != 0.
1271 Nonzero value means that elements of reg_qty have changed
1272 so X's hash code may be different. */
1275 insert_regs (x, classp, modified)
1277 struct table_elt *classp;
1280 if (GET_CODE (x) == REG)
1282 unsigned int regno = REGNO (x);
1285 /* If REGNO is in the equivalence table already but is of the
1286 wrong mode for that equivalence, don't do anything here. */
1288 qty_valid = REGNO_QTY_VALID_P (regno);
1291 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1293 if (ent->mode != GET_MODE (x))
1297 if (modified || ! qty_valid)
1300 for (classp = classp->first_same_value;
1302 classp = classp->next_same_value)
1303 if (GET_CODE (classp->exp) == REG
1304 && GET_MODE (classp->exp) == GET_MODE (x))
1306 make_regs_eqv (regno, REGNO (classp->exp));
1310 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1311 than REG_IN_TABLE to find out if there was only a single preceding
1312 invalidation - for the SUBREG - or another one, which would be
1313 for the full register. However, if we find here that REG_TICK
1314 indicates that the register is invalid, it means that it has
1315 been invalidated in a separate operation. The SUBREG might be used
1316 now (then this is a recursive call), or we might use the full REG
1317 now and a SUBREG of it later. So bump up REG_TICK so that
1318 mention_regs will do the right thing. */
1320 && REG_IN_TABLE (regno) >= 0
1321 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1323 make_new_qty (regno, GET_MODE (x));
1330 /* If X is a SUBREG, we will likely be inserting the inner register in the
1331 table. If that register doesn't have an assigned quantity number at
1332 this point but does later, the insertion that we will be doing now will
1333 not be accessible because its hash code will have changed. So assign
1334 a quantity number now. */
1336 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1337 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1339 insert_regs (SUBREG_REG (x), NULL, 0);
1344 return mention_regs (x);
1347 /* Look in or update the hash table. */
1349 /* Remove table element ELT from use in the table.
1350 HASH is its hash code, made using the HASH macro.
1351 It's an argument because often that is known in advance
1352 and we save much time not recomputing it. */
1355 remove_from_table (elt, hash)
1356 struct table_elt *elt;
1362 /* Mark this element as removed. See cse_insn. */
1363 elt->first_same_value = 0;
1365 /* Remove the table element from its equivalence class. */
1368 struct table_elt *prev = elt->prev_same_value;
1369 struct table_elt *next = elt->next_same_value;
1372 next->prev_same_value = prev;
1375 prev->next_same_value = next;
1378 struct table_elt *newfirst = next;
1381 next->first_same_value = newfirst;
1382 next = next->next_same_value;
1387 /* Remove the table element from its hash bucket. */
1390 struct table_elt *prev = elt->prev_same_hash;
1391 struct table_elt *next = elt->next_same_hash;
1394 next->prev_same_hash = prev;
1397 prev->next_same_hash = next;
1398 else if (table[hash] == elt)
1402 /* This entry is not in the proper hash bucket. This can happen
1403 when two classes were merged by `merge_equiv_classes'. Search
1404 for the hash bucket that it heads. This happens only very
1405 rarely, so the cost is acceptable. */
1406 for (hash = 0; hash < HASH_SIZE; hash++)
1407 if (table[hash] == elt)
1412 /* Remove the table element from its related-value circular chain. */
1414 if (elt->related_value != 0 && elt->related_value != elt)
1416 struct table_elt *p = elt->related_value;
1418 while (p->related_value != elt)
1419 p = p->related_value;
1420 p->related_value = elt->related_value;
1421 if (p->related_value == p)
1422 p->related_value = 0;
1425 /* Now add it to the free element chain. */
1426 elt->next_same_hash = free_element_chain;
1427 free_element_chain = elt;
1430 /* Look up X in the hash table and return its table element,
1431 or 0 if X is not in the table.
1433 MODE is the machine-mode of X, or if X is an integer constant
1434 with VOIDmode then MODE is the mode with which X will be used.
1436 Here we are satisfied to find an expression whose tree structure
1439 static struct table_elt *
1440 lookup (x, hash, mode)
1443 enum machine_mode mode;
1445 struct table_elt *p;
1447 for (p = table[hash]; p; p = p->next_same_hash)
1448 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1449 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1455 /* Like `lookup' but don't care whether the table element uses invalid regs.
1456 Also ignore discrepancies in the machine mode of a register. */
1458 static struct table_elt *
1459 lookup_for_remove (x, hash, mode)
1462 enum machine_mode mode;
1464 struct table_elt *p;
1466 if (GET_CODE (x) == REG)
1468 unsigned int regno = REGNO (x);
1470 /* Don't check the machine mode when comparing registers;
1471 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1472 for (p = table[hash]; p; p = p->next_same_hash)
1473 if (GET_CODE (p->exp) == REG
1474 && REGNO (p->exp) == regno)
1479 for (p = table[hash]; p; p = p->next_same_hash)
1480 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1487 /* Look for an expression equivalent to X and with code CODE.
1488 If one is found, return that expression. */
1491 lookup_as_function (x, code)
1496 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1498 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1499 long as we are narrowing. So if we looked in vain for a mode narrower
1500 than word_mode before, look for word_mode now. */
1501 if (p == 0 && code == CONST_INT
1502 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1505 PUT_MODE (x, word_mode);
1506 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1512 for (p = p->first_same_value; p; p = p->next_same_value)
1513 if (GET_CODE (p->exp) == code
1514 /* Make sure this is a valid entry in the table. */
1515 && exp_equiv_p (p->exp, p->exp, 1, 0))
1521 /* Insert X in the hash table, assuming HASH is its hash code
1522 and CLASSP is an element of the class it should go in
1523 (or 0 if a new class should be made).
1524 It is inserted at the proper position to keep the class in
1525 the order cheapest first.
1527 MODE is the machine-mode of X, or if X is an integer constant
1528 with VOIDmode then MODE is the mode with which X will be used.
1530 For elements of equal cheapness, the most recent one
1531 goes in front, except that the first element in the list
1532 remains first unless a cheaper element is added. The order of
1533 pseudo-registers does not matter, as canon_reg will be called to
1534 find the cheapest when a register is retrieved from the table.
1536 The in_memory field in the hash table element is set to 0.
1537 The caller must set it nonzero if appropriate.
1539 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1540 and if insert_regs returns a nonzero value
1541 you must then recompute its hash code before calling here.
1543 If necessary, update table showing constant values of quantities. */
1545 #define CHEAPER(X, Y) \
1546 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1548 static struct table_elt *
1549 insert (x, classp, hash, mode)
1551 struct table_elt *classp;
1553 enum machine_mode mode;
1555 struct table_elt *elt;
1557 /* If X is a register and we haven't made a quantity for it,
1558 something is wrong. */
1559 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1562 /* If X is a hard register, show it is being put in the table. */
1563 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1565 unsigned int regno = REGNO (x);
1566 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1569 for (i = regno; i < endregno; i++)
1570 SET_HARD_REG_BIT (hard_regs_in_table, i);
1573 /* Put an element for X into the right hash bucket. */
1575 elt = free_element_chain;
1577 free_element_chain = elt->next_same_hash;
1581 elt = (struct table_elt *) xmalloc (sizeof (struct table_elt));
1585 elt->canon_exp = NULL_RTX;
1586 elt->cost = COST (x);
1587 elt->regcost = approx_reg_cost (x);
1588 elt->next_same_value = 0;
1589 elt->prev_same_value = 0;
1590 elt->next_same_hash = table[hash];
1591 elt->prev_same_hash = 0;
1592 elt->related_value = 0;
1595 elt->is_const = (CONSTANT_P (x)
1596 /* GNU C++ takes advantage of this for `this'
1597 (and other const values). */
1598 || (GET_CODE (x) == REG
1599 && RTX_UNCHANGING_P (x)
1600 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1601 || fixed_base_plus_p (x));
1604 table[hash]->prev_same_hash = elt;
1607 /* Put it into the proper value-class. */
1610 classp = classp->first_same_value;
1611 if (CHEAPER (elt, classp))
1612 /* Insert at the head of the class */
1614 struct table_elt *p;
1615 elt->next_same_value = classp;
1616 classp->prev_same_value = elt;
1617 elt->first_same_value = elt;
1619 for (p = classp; p; p = p->next_same_value)
1620 p->first_same_value = elt;
1624 /* Insert not at head of the class. */
1625 /* Put it after the last element cheaper than X. */
1626 struct table_elt *p, *next;
1628 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1631 /* Put it after P and before NEXT. */
1632 elt->next_same_value = next;
1634 next->prev_same_value = elt;
1636 elt->prev_same_value = p;
1637 p->next_same_value = elt;
1638 elt->first_same_value = classp;
1642 elt->first_same_value = elt;
1644 /* If this is a constant being set equivalent to a register or a register
1645 being set equivalent to a constant, note the constant equivalence.
1647 If this is a constant, it cannot be equivalent to a different constant,
1648 and a constant is the only thing that can be cheaper than a register. So
1649 we know the register is the head of the class (before the constant was
1652 If this is a register that is not already known equivalent to a
1653 constant, we must check the entire class.
1655 If this is a register that is already known equivalent to an insn,
1656 update the qtys `const_insn' to show that `this_insn' is the latest
1657 insn making that quantity equivalent to the constant. */
1659 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1660 && GET_CODE (x) != REG)
1662 int exp_q = REG_QTY (REGNO (classp->exp));
1663 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1665 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1666 exp_ent->const_insn = this_insn;
1669 else if (GET_CODE (x) == REG
1671 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1674 struct table_elt *p;
1676 for (p = classp; p != 0; p = p->next_same_value)
1678 if (p->is_const && GET_CODE (p->exp) != REG)
1680 int x_q = REG_QTY (REGNO (x));
1681 struct qty_table_elem *x_ent = &qty_table[x_q];
1684 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1685 x_ent->const_insn = this_insn;
1691 else if (GET_CODE (x) == REG
1692 && qty_table[REG_QTY (REGNO (x))].const_rtx
1693 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1694 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1696 /* If this is a constant with symbolic value,
1697 and it has a term with an explicit integer value,
1698 link it up with related expressions. */
1699 if (GET_CODE (x) == CONST)
1701 rtx subexp = get_related_value (x);
1703 struct table_elt *subelt, *subelt_prev;
1707 /* Get the integer-free subexpression in the hash table. */
1708 subhash = safe_hash (subexp, mode) & HASH_MASK;
1709 subelt = lookup (subexp, subhash, mode);
1711 subelt = insert (subexp, NULL, subhash, mode);
1712 /* Initialize SUBELT's circular chain if it has none. */
1713 if (subelt->related_value == 0)
1714 subelt->related_value = subelt;
1715 /* Find the element in the circular chain that precedes SUBELT. */
1716 subelt_prev = subelt;
1717 while (subelt_prev->related_value != subelt)
1718 subelt_prev = subelt_prev->related_value;
1719 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1720 This way the element that follows SUBELT is the oldest one. */
1721 elt->related_value = subelt_prev->related_value;
1722 subelt_prev->related_value = elt;
1729 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1730 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1731 the two classes equivalent.
1733 CLASS1 will be the surviving class; CLASS2 should not be used after this
1736 Any invalid entries in CLASS2 will not be copied. */
1739 merge_equiv_classes (class1, class2)
1740 struct table_elt *class1, *class2;
1742 struct table_elt *elt, *next, *new;
1744 /* Ensure we start with the head of the classes. */
1745 class1 = class1->first_same_value;
1746 class2 = class2->first_same_value;
1748 /* If they were already equal, forget it. */
1749 if (class1 == class2)
1752 for (elt = class2; elt; elt = next)
1756 enum machine_mode mode = elt->mode;
1758 next = elt->next_same_value;
1760 /* Remove old entry, make a new one in CLASS1's class.
1761 Don't do this for invalid entries as we cannot find their
1762 hash code (it also isn't necessary). */
1763 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1765 hash_arg_in_memory = 0;
1766 hash = HASH (exp, mode);
1768 if (GET_CODE (exp) == REG)
1769 delete_reg_equiv (REGNO (exp));
1771 remove_from_table (elt, hash);
1773 if (insert_regs (exp, class1, 0))
1775 rehash_using_reg (exp);
1776 hash = HASH (exp, mode);
1778 new = insert (exp, class1, hash, mode);
1779 new->in_memory = hash_arg_in_memory;
1784 /* Flush the entire hash table. */
1790 struct table_elt *p;
1792 for (i = 0; i < HASH_SIZE; i++)
1793 for (p = table[i]; p; p = table[i])
1795 /* Note that invalidate can remove elements
1796 after P in the current hash chain. */
1797 if (GET_CODE (p->exp) == REG)
1798 invalidate (p->exp, p->mode);
1800 remove_from_table (p, i);
1804 /* Function called for each rtx to check whether true dependence exist. */
1805 struct check_dependence_data
1807 enum machine_mode mode;
1812 check_dependence (x, data)
1816 struct check_dependence_data *d = (struct check_dependence_data *) data;
1817 if (*x && GET_CODE (*x) == MEM)
1818 return true_dependence (d->exp, d->mode, *x, cse_rtx_varies_p);
1823 /* Remove from the hash table, or mark as invalid, all expressions whose
1824 values could be altered by storing in X. X is a register, a subreg, or
1825 a memory reference with nonvarying address (because, when a memory
1826 reference with a varying address is stored in, all memory references are
1827 removed by invalidate_memory so specific invalidation is superfluous).
1828 FULL_MODE, if not VOIDmode, indicates that this much should be
1829 invalidated instead of just the amount indicated by the mode of X. This
1830 is only used for bitfield stores into memory.
1832 A nonvarying address may be just a register or just a symbol reference,
1833 or it may be either of those plus a numeric offset. */
1836 invalidate (x, full_mode)
1838 enum machine_mode full_mode;
1841 struct table_elt *p;
1843 switch (GET_CODE (x))
1847 /* If X is a register, dependencies on its contents are recorded
1848 through the qty number mechanism. Just change the qty number of
1849 the register, mark it as invalid for expressions that refer to it,
1850 and remove it itself. */
1851 unsigned int regno = REGNO (x);
1852 unsigned int hash = HASH (x, GET_MODE (x));
1854 /* Remove REGNO from any quantity list it might be on and indicate
1855 that its value might have changed. If it is a pseudo, remove its
1856 entry from the hash table.
1858 For a hard register, we do the first two actions above for any
1859 additional hard registers corresponding to X. Then, if any of these
1860 registers are in the table, we must remove any REG entries that
1861 overlap these registers. */
1863 delete_reg_equiv (regno);
1865 SUBREG_TICKED (regno) = -1;
1867 if (regno >= FIRST_PSEUDO_REGISTER)
1869 /* Because a register can be referenced in more than one mode,
1870 we might have to remove more than one table entry. */
1871 struct table_elt *elt;
1873 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1874 remove_from_table (elt, hash);
1878 HOST_WIDE_INT in_table
1879 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1880 unsigned int endregno
1881 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1882 unsigned int tregno, tendregno, rn;
1883 struct table_elt *p, *next;
1885 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1887 for (rn = regno + 1; rn < endregno; rn++)
1889 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1890 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1891 delete_reg_equiv (rn);
1893 SUBREG_TICKED (rn) = -1;
1897 for (hash = 0; hash < HASH_SIZE; hash++)
1898 for (p = table[hash]; p; p = next)
1900 next = p->next_same_hash;
1902 if (GET_CODE (p->exp) != REG
1903 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1906 tregno = REGNO (p->exp);
1908 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1909 if (tendregno > regno && tregno < endregno)
1910 remove_from_table (p, hash);
1917 invalidate (SUBREG_REG (x), VOIDmode);
1921 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1922 invalidate (XVECEXP (x, 0, i), VOIDmode);
1926 /* This is part of a disjoint return value; extract the location in
1927 question ignoring the offset. */
1928 invalidate (XEXP (x, 0), VOIDmode);
1932 /* Calculate the canonical version of X here so that
1933 true_dependence doesn't generate new RTL for X on each call. */
1936 /* Remove all hash table elements that refer to overlapping pieces of
1938 if (full_mode == VOIDmode)
1939 full_mode = GET_MODE (x);
1941 for (i = 0; i < HASH_SIZE; i++)
1943 struct table_elt *next;
1945 for (p = table[i]; p; p = next)
1947 next = p->next_same_hash;
1950 struct check_dependence_data d;
1952 /* Just canonicalize the expression once;
1953 otherwise each time we call invalidate
1954 true_dependence will canonicalize the
1955 expression again. */
1957 p->canon_exp = canon_rtx (p->exp);
1960 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1961 remove_from_table (p, i);
1972 /* Remove all expressions that refer to register REGNO,
1973 since they are already invalid, and we are about to
1974 mark that register valid again and don't want the old
1975 expressions to reappear as valid. */
1978 remove_invalid_refs (regno)
1982 struct table_elt *p, *next;
1984 for (i = 0; i < HASH_SIZE; i++)
1985 for (p = table[i]; p; p = next)
1987 next = p->next_same_hash;
1988 if (GET_CODE (p->exp) != REG
1989 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1990 remove_from_table (p, i);
1994 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1997 remove_invalid_subreg_refs (regno, offset, mode)
1999 unsigned int offset;
2000 enum machine_mode mode;
2003 struct table_elt *p, *next;
2004 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2006 for (i = 0; i < HASH_SIZE; i++)
2007 for (p = table[i]; p; p = next)
2010 next = p->next_same_hash;
2012 if (GET_CODE (exp) != REG
2013 && (GET_CODE (exp) != SUBREG
2014 || GET_CODE (SUBREG_REG (exp)) != REG
2015 || REGNO (SUBREG_REG (exp)) != regno
2016 || (((SUBREG_BYTE (exp)
2017 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2018 && SUBREG_BYTE (exp) <= end))
2019 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2020 remove_from_table (p, i);
2024 /* Recompute the hash codes of any valid entries in the hash table that
2025 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2027 This is called when we make a jump equivalence. */
2030 rehash_using_reg (x)
2034 struct table_elt *p, *next;
2037 if (GET_CODE (x) == SUBREG)
2040 /* If X is not a register or if the register is known not to be in any
2041 valid entries in the table, we have no work to do. */
2043 if (GET_CODE (x) != REG
2044 || REG_IN_TABLE (REGNO (x)) < 0
2045 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2048 /* Scan all hash chains looking for valid entries that mention X.
2049 If we find one and it is in the wrong hash chain, move it. We can skip
2050 objects that are registers, since they are handled specially. */
2052 for (i = 0; i < HASH_SIZE; i++)
2053 for (p = table[i]; p; p = next)
2055 next = p->next_same_hash;
2056 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
2057 && exp_equiv_p (p->exp, p->exp, 1, 0)
2058 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2060 if (p->next_same_hash)
2061 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2063 if (p->prev_same_hash)
2064 p->prev_same_hash->next_same_hash = p->next_same_hash;
2066 table[i] = p->next_same_hash;
2068 p->next_same_hash = table[hash];
2069 p->prev_same_hash = 0;
2071 table[hash]->prev_same_hash = p;
2077 /* Remove from the hash table any expression that is a call-clobbered
2078 register. Also update their TICK values. */
2081 invalidate_for_call ()
2083 unsigned int regno, endregno;
2086 struct table_elt *p, *next;
2089 /* Go through all the hard registers. For each that is clobbered in
2090 a CALL_INSN, remove the register from quantity chains and update
2091 reg_tick if defined. Also see if any of these registers is currently
2094 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2095 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2097 delete_reg_equiv (regno);
2098 if (REG_TICK (regno) >= 0)
2101 SUBREG_TICKED (regno) = -1;
2104 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2107 /* In the case where we have no call-clobbered hard registers in the
2108 table, we are done. Otherwise, scan the table and remove any
2109 entry that overlaps a call-clobbered register. */
2112 for (hash = 0; hash < HASH_SIZE; hash++)
2113 for (p = table[hash]; p; p = next)
2115 next = p->next_same_hash;
2117 if (GET_CODE (p->exp) != REG
2118 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2121 regno = REGNO (p->exp);
2122 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2124 for (i = regno; i < endregno; i++)
2125 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2127 remove_from_table (p, hash);
2133 /* Given an expression X of type CONST,
2134 and ELT which is its table entry (or 0 if it
2135 is not in the hash table),
2136 return an alternate expression for X as a register plus integer.
2137 If none can be found, return 0. */
2140 use_related_value (x, elt)
2142 struct table_elt *elt;
2144 struct table_elt *relt = 0;
2145 struct table_elt *p, *q;
2146 HOST_WIDE_INT offset;
2148 /* First, is there anything related known?
2149 If we have a table element, we can tell from that.
2150 Otherwise, must look it up. */
2152 if (elt != 0 && elt->related_value != 0)
2154 else if (elt == 0 && GET_CODE (x) == CONST)
2156 rtx subexp = get_related_value (x);
2158 relt = lookup (subexp,
2159 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2166 /* Search all related table entries for one that has an
2167 equivalent register. */
2172 /* This loop is strange in that it is executed in two different cases.
2173 The first is when X is already in the table. Then it is searching
2174 the RELATED_VALUE list of X's class (RELT). The second case is when
2175 X is not in the table. Then RELT points to a class for the related
2178 Ensure that, whatever case we are in, that we ignore classes that have
2179 the same value as X. */
2181 if (rtx_equal_p (x, p->exp))
2184 for (q = p->first_same_value; q; q = q->next_same_value)
2185 if (GET_CODE (q->exp) == REG)
2191 p = p->related_value;
2193 /* We went all the way around, so there is nothing to be found.
2194 Alternatively, perhaps RELT was in the table for some other reason
2195 and it has no related values recorded. */
2196 if (p == relt || p == 0)
2203 offset = (get_integer_term (x) - get_integer_term (p->exp));
2204 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2205 return plus_constant (q->exp, offset);
2208 /* Hash a string. Just add its bytes up. */
2209 static inline unsigned
2210 canon_hash_string (ps)
2214 const unsigned char *p = (const unsigned char *) ps;
2223 /* Hash an rtx. We are careful to make sure the value is never negative.
2224 Equivalent registers hash identically.
2225 MODE is used in hashing for CONST_INTs only;
2226 otherwise the mode of X is used.
2228 Store 1 in do_not_record if any subexpression is volatile.
2230 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2231 which does not have the RTX_UNCHANGING_P bit set.
2233 Note that cse_insn knows that the hash code of a MEM expression
2234 is just (int) MEM plus the hash code of the address. */
2237 canon_hash (x, mode)
2239 enum machine_mode mode;
2246 /* repeat is used to turn tail-recursion into iteration. */
2251 code = GET_CODE (x);
2256 unsigned int regno = REGNO (x);
2259 /* On some machines, we can't record any non-fixed hard register,
2260 because extending its life will cause reload problems. We
2261 consider ap, fp, sp, gp to be fixed for this purpose.
2263 We also consider CCmode registers to be fixed for this purpose;
2264 failure to do so leads to failure to simplify 0<100 type of
2267 On all machines, we can't record any global registers.
2268 Nor should we record any register that is in a small
2269 class, as defined by CLASS_LIKELY_SPILLED_P. */
2271 if (regno >= FIRST_PSEUDO_REGISTER)
2273 else if (x == frame_pointer_rtx
2274 || x == hard_frame_pointer_rtx
2275 || x == arg_pointer_rtx
2276 || x == stack_pointer_rtx
2277 || x == pic_offset_table_rtx)
2279 else if (global_regs[regno])
2281 else if (fixed_regs[regno])
2283 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2285 else if (SMALL_REGISTER_CLASSES)
2287 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2298 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2302 /* We handle SUBREG of a REG specially because the underlying
2303 reg changes its hash value with every value change; we don't
2304 want to have to forget unrelated subregs when one subreg changes. */
2307 if (GET_CODE (SUBREG_REG (x)) == REG)
2309 hash += (((unsigned) SUBREG << 7)
2310 + REGNO (SUBREG_REG (x))
2311 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2319 unsigned HOST_WIDE_INT tem = INTVAL (x);
2320 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2325 /* This is like the general case, except that it only counts
2326 the integers representing the constant. */
2327 hash += (unsigned) code + (unsigned) GET_MODE (x);
2328 if (GET_MODE (x) != VOIDmode)
2329 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2331 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2332 + (unsigned) CONST_DOUBLE_HIGH (x));
2340 units = CONST_VECTOR_NUNITS (x);
2342 for (i = 0; i < units; ++i)
2344 elt = CONST_VECTOR_ELT (x, i);
2345 hash += canon_hash (elt, GET_MODE (elt));
2351 /* Assume there is only one rtx object for any given label. */
2353 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2357 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2361 /* We don't record if marked volatile or if BLKmode since we don't
2362 know the size of the move. */
2363 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2368 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2369 hash_arg_in_memory = 1;
2371 /* Now that we have already found this special case,
2372 might as well speed it up as much as possible. */
2373 hash += (unsigned) MEM;
2378 /* A USE that mentions non-volatile memory needs special
2379 handling since the MEM may be BLKmode which normally
2380 prevents an entry from being made. Pure calls are
2381 marked by a USE which mentions BLKmode memory. */
2382 if (GET_CODE (XEXP (x, 0)) == MEM
2383 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2385 hash += (unsigned) USE;
2388 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2389 hash_arg_in_memory = 1;
2391 /* Now that we have already found this special case,
2392 might as well speed it up as much as possible. */
2393 hash += (unsigned) MEM;
2408 case UNSPEC_VOLATILE:
2413 if (MEM_VOLATILE_P (x))
2420 /* We don't want to take the filename and line into account. */
2421 hash += (unsigned) code + (unsigned) GET_MODE (x)
2422 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2423 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2424 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2426 if (ASM_OPERANDS_INPUT_LENGTH (x))
2428 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2430 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2431 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2432 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2436 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2437 x = ASM_OPERANDS_INPUT (x, 0);
2438 mode = GET_MODE (x);
2450 i = GET_RTX_LENGTH (code) - 1;
2451 hash += (unsigned) code + (unsigned) GET_MODE (x);
2452 fmt = GET_RTX_FORMAT (code);
2457 rtx tem = XEXP (x, i);
2459 /* If we are about to do the last recursive call
2460 needed at this level, change it into iteration.
2461 This function is called enough to be worth it. */
2467 hash += canon_hash (tem, 0);
2469 else if (fmt[i] == 'E')
2470 for (j = 0; j < XVECLEN (x, i); j++)
2471 hash += canon_hash (XVECEXP (x, i, j), 0);
2472 else if (fmt[i] == 's')
2473 hash += canon_hash_string (XSTR (x, i));
2474 else if (fmt[i] == 'i')
2476 unsigned tem = XINT (x, i);
2479 else if (fmt[i] == '0' || fmt[i] == 't')
2488 /* Like canon_hash but with no side effects. */
2493 enum machine_mode mode;
2495 int save_do_not_record = do_not_record;
2496 int save_hash_arg_in_memory = hash_arg_in_memory;
2497 unsigned hash = canon_hash (x, mode);
2498 hash_arg_in_memory = save_hash_arg_in_memory;
2499 do_not_record = save_do_not_record;
2503 /* Return 1 iff X and Y would canonicalize into the same thing,
2504 without actually constructing the canonicalization of either one.
2505 If VALIDATE is nonzero,
2506 we assume X is an expression being processed from the rtl
2507 and Y was found in the hash table. We check register refs
2508 in Y for being marked as valid.
2510 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2511 that is known to be in the register. Ordinarily, we don't allow them
2512 to match, because letting them match would cause unpredictable results
2513 in all the places that search a hash table chain for an equivalent
2514 for a given value. A possible equivalent that has different structure
2515 has its hash code computed from different data. Whether the hash code
2516 is the same as that of the given value is pure luck. */
2519 exp_equiv_p (x, y, validate, equal_values)
2528 /* Note: it is incorrect to assume an expression is equivalent to itself
2529 if VALIDATE is nonzero. */
2530 if (x == y && !validate)
2532 if (x == 0 || y == 0)
2535 code = GET_CODE (x);
2536 if (code != GET_CODE (y))
2541 /* If X is a constant and Y is a register or vice versa, they may be
2542 equivalent. We only have to validate if Y is a register. */
2543 if (CONSTANT_P (x) && GET_CODE (y) == REG
2544 && REGNO_QTY_VALID_P (REGNO (y)))
2546 int y_q = REG_QTY (REGNO (y));
2547 struct qty_table_elem *y_ent = &qty_table[y_q];
2549 if (GET_MODE (y) == y_ent->mode
2550 && rtx_equal_p (x, y_ent->const_rtx)
2551 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2555 if (CONSTANT_P (y) && code == REG
2556 && REGNO_QTY_VALID_P (REGNO (x)))
2558 int x_q = REG_QTY (REGNO (x));
2559 struct qty_table_elem *x_ent = &qty_table[x_q];
2561 if (GET_MODE (x) == x_ent->mode
2562 && rtx_equal_p (y, x_ent->const_rtx))
2569 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2570 if (GET_MODE (x) != GET_MODE (y))
2581 return XEXP (x, 0) == XEXP (y, 0);
2584 return XSTR (x, 0) == XSTR (y, 0);
2588 unsigned int regno = REGNO (y);
2589 unsigned int endregno
2590 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2591 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2594 /* If the quantities are not the same, the expressions are not
2595 equivalent. If there are and we are not to validate, they
2596 are equivalent. Otherwise, ensure all regs are up-to-date. */
2598 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2604 for (i = regno; i < endregno; i++)
2605 if (REG_IN_TABLE (i) != REG_TICK (i))
2611 /* For commutative operations, check both orders. */
2619 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2620 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2621 validate, equal_values))
2622 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2623 validate, equal_values)
2624 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2625 validate, equal_values)));
2628 /* We don't use the generic code below because we want to
2629 disregard filename and line numbers. */
2631 /* A volatile asm isn't equivalent to any other. */
2632 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2635 if (GET_MODE (x) != GET_MODE (y)
2636 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2637 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2638 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2639 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2640 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2643 if (ASM_OPERANDS_INPUT_LENGTH (x))
2645 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2646 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2647 ASM_OPERANDS_INPUT (y, i),
2648 validate, equal_values)
2649 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2650 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2660 /* Compare the elements. If any pair of corresponding elements
2661 fail to match, return 0 for the whole things. */
2663 fmt = GET_RTX_FORMAT (code);
2664 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2669 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2674 if (XVECLEN (x, i) != XVECLEN (y, i))
2676 for (j = 0; j < XVECLEN (x, i); j++)
2677 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2678 validate, equal_values))
2683 if (strcmp (XSTR (x, i), XSTR (y, i)))
2688 if (XINT (x, i) != XINT (y, i))
2693 if (XWINT (x, i) != XWINT (y, i))
2709 /* Return 1 if X has a value that can vary even between two
2710 executions of the program. 0 means X can be compared reliably
2711 against certain constants or near-constants. */
2714 cse_rtx_varies_p (x, from_alias)
2718 /* We need not check for X and the equivalence class being of the same
2719 mode because if X is equivalent to a constant in some mode, it
2720 doesn't vary in any mode. */
2722 if (GET_CODE (x) == REG
2723 && REGNO_QTY_VALID_P (REGNO (x)))
2725 int x_q = REG_QTY (REGNO (x));
2726 struct qty_table_elem *x_ent = &qty_table[x_q];
2728 if (GET_MODE (x) == x_ent->mode
2729 && x_ent->const_rtx != NULL_RTX)
2733 if (GET_CODE (x) == PLUS
2734 && GET_CODE (XEXP (x, 1)) == CONST_INT
2735 && GET_CODE (XEXP (x, 0)) == REG
2736 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2738 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2739 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2741 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2742 && x0_ent->const_rtx != NULL_RTX)
2746 /* This can happen as the result of virtual register instantiation, if
2747 the initial constant is too large to be a valid address. This gives
2748 us a three instruction sequence, load large offset into a register,
2749 load fp minus a constant into a register, then a MEM which is the
2750 sum of the two `constant' registers. */
2751 if (GET_CODE (x) == PLUS
2752 && GET_CODE (XEXP (x, 0)) == REG
2753 && GET_CODE (XEXP (x, 1)) == REG
2754 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2755 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2757 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2758 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2759 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2760 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2762 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2763 && x0_ent->const_rtx != NULL_RTX
2764 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2765 && x1_ent->const_rtx != NULL_RTX)
2769 return rtx_varies_p (x, from_alias);
2772 /* Canonicalize an expression:
2773 replace each register reference inside it
2774 with the "oldest" equivalent register.
2776 If INSN is nonzero and we are replacing a pseudo with a hard register
2777 or vice versa, validate_change is used to ensure that INSN remains valid
2778 after we make our substitution. The calls are made with IN_GROUP nonzero
2779 so apply_change_group must be called upon the outermost return from this
2780 function (unless INSN is zero). The result of apply_change_group can
2781 generally be discarded since the changes we are making are optional. */
2795 code = GET_CODE (x);
2814 struct qty_table_elem *ent;
2816 /* Never replace a hard reg, because hard regs can appear
2817 in more than one machine mode, and we must preserve the mode
2818 of each occurrence. Also, some hard regs appear in
2819 MEMs that are shared and mustn't be altered. Don't try to
2820 replace any reg that maps to a reg of class NO_REGS. */
2821 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2822 || ! REGNO_QTY_VALID_P (REGNO (x)))
2825 q = REG_QTY (REGNO (x));
2826 ent = &qty_table[q];
2827 first = ent->first_reg;
2828 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2829 : REGNO_REG_CLASS (first) == NO_REGS ? x
2830 : gen_rtx_REG (ent->mode, first));
2837 fmt = GET_RTX_FORMAT (code);
2838 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2844 rtx new = canon_reg (XEXP (x, i), insn);
2847 /* If replacing pseudo with hard reg or vice versa, ensure the
2848 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2849 if (insn != 0 && new != 0
2850 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2851 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2852 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2853 || (insn_code = recog_memoized (insn)) < 0
2854 || insn_data[insn_code].n_dups > 0))
2855 validate_change (insn, &XEXP (x, i), new, 1);
2859 else if (fmt[i] == 'E')
2860 for (j = 0; j < XVECLEN (x, i); j++)
2861 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2867 /* LOC is a location within INSN that is an operand address (the contents of
2868 a MEM). Find the best equivalent address to use that is valid for this
2871 On most CISC machines, complicated address modes are costly, and rtx_cost
2872 is a good approximation for that cost. However, most RISC machines have
2873 only a few (usually only one) memory reference formats. If an address is
2874 valid at all, it is often just as cheap as any other address. Hence, for
2875 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2876 costs of various addresses. For two addresses of equal cost, choose the one
2877 with the highest `rtx_cost' value as that has the potential of eliminating
2878 the most insns. For equal costs, we choose the first in the equivalence
2879 class. Note that we ignore the fact that pseudo registers are cheaper
2880 than hard registers here because we would also prefer the pseudo registers.
2884 find_best_addr (insn, loc, mode)
2887 enum machine_mode mode;
2889 struct table_elt *elt;
2892 struct table_elt *p;
2893 int found_better = 1;
2895 int save_do_not_record = do_not_record;
2896 int save_hash_arg_in_memory = hash_arg_in_memory;
2901 /* Do not try to replace constant addresses or addresses of local and
2902 argument slots. These MEM expressions are made only once and inserted
2903 in many instructions, as well as being used to control symbol table
2904 output. It is not safe to clobber them.
2906 There are some uncommon cases where the address is already in a register
2907 for some reason, but we cannot take advantage of that because we have
2908 no easy way to unshare the MEM. In addition, looking up all stack
2909 addresses is costly. */
2910 if ((GET_CODE (addr) == PLUS
2911 && GET_CODE (XEXP (addr, 0)) == REG
2912 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2913 && (regno = REGNO (XEXP (addr, 0)),
2914 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2915 || regno == ARG_POINTER_REGNUM))
2916 || (GET_CODE (addr) == REG
2917 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2918 || regno == HARD_FRAME_POINTER_REGNUM
2919 || regno == ARG_POINTER_REGNUM))
2920 || GET_CODE (addr) == ADDRESSOF
2921 || CONSTANT_ADDRESS_P (addr))
2924 /* If this address is not simply a register, try to fold it. This will
2925 sometimes simplify the expression. Many simplifications
2926 will not be valid, but some, usually applying the associative rule, will
2927 be valid and produce better code. */
2928 if (GET_CODE (addr) != REG)
2930 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2931 int addr_folded_cost = address_cost (folded, mode);
2932 int addr_cost = address_cost (addr, mode);
2934 if ((addr_folded_cost < addr_cost
2935 || (addr_folded_cost == addr_cost
2936 /* ??? The rtx_cost comparison is left over from an older
2937 version of this code. It is probably no longer helpful. */
2938 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2939 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2940 && validate_change (insn, loc, folded, 0))
2944 /* If this address is not in the hash table, we can't look for equivalences
2945 of the whole address. Also, ignore if volatile. */
2948 hash = HASH (addr, Pmode);
2949 addr_volatile = do_not_record;
2950 do_not_record = save_do_not_record;
2951 hash_arg_in_memory = save_hash_arg_in_memory;
2956 elt = lookup (addr, hash, Pmode);
2958 #ifndef ADDRESS_COST
2961 int our_cost = elt->cost;
2963 /* Find the lowest cost below ours that works. */
2964 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2965 if (elt->cost < our_cost
2966 && (GET_CODE (elt->exp) == REG
2967 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2968 && validate_change (insn, loc,
2969 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2976 /* We need to find the best (under the criteria documented above) entry
2977 in the class that is valid. We use the `flag' field to indicate
2978 choices that were invalid and iterate until we can't find a better
2979 one that hasn't already been tried. */
2981 for (p = elt->first_same_value; p; p = p->next_same_value)
2984 while (found_better)
2986 int best_addr_cost = address_cost (*loc, mode);
2987 int best_rtx_cost = (elt->cost + 1) >> 1;
2989 struct table_elt *best_elt = elt;
2992 for (p = elt->first_same_value; p; p = p->next_same_value)
2995 if ((GET_CODE (p->exp) == REG
2996 || exp_equiv_p (p->exp, p->exp, 1, 0))
2997 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2998 || (exp_cost == best_addr_cost
2999 && ((p->cost + 1) >> 1) > best_rtx_cost)))
3002 best_addr_cost = exp_cost;
3003 best_rtx_cost = (p->cost + 1) >> 1;
3010 if (validate_change (insn, loc,
3011 canon_reg (copy_rtx (best_elt->exp),
3020 /* If the address is a binary operation with the first operand a register
3021 and the second a constant, do the same as above, but looking for
3022 equivalences of the register. Then try to simplify before checking for
3023 the best address to use. This catches a few cases: First is when we
3024 have REG+const and the register is another REG+const. We can often merge
3025 the constants and eliminate one insn and one register. It may also be
3026 that a machine has a cheap REG+REG+const. Finally, this improves the
3027 code on the Alpha for unaligned byte stores. */
3029 if (flag_expensive_optimizations
3030 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
3031 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
3032 && GET_CODE (XEXP (*loc, 0)) == REG
3033 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
3035 rtx c = XEXP (*loc, 1);
3038 hash = HASH (XEXP (*loc, 0), Pmode);
3039 do_not_record = save_do_not_record;
3040 hash_arg_in_memory = save_hash_arg_in_memory;
3042 elt = lookup (XEXP (*loc, 0), hash, Pmode);
3046 /* We need to find the best (under the criteria documented above) entry
3047 in the class that is valid. We use the `flag' field to indicate
3048 choices that were invalid and iterate until we can't find a better
3049 one that hasn't already been tried. */
3051 for (p = elt->first_same_value; p; p = p->next_same_value)
3054 while (found_better)
3056 int best_addr_cost = address_cost (*loc, mode);
3057 int best_rtx_cost = (COST (*loc) + 1) >> 1;
3058 struct table_elt *best_elt = elt;
3059 rtx best_rtx = *loc;
3062 /* This is at worst case an O(n^2) algorithm, so limit our search
3063 to the first 32 elements on the list. This avoids trouble
3064 compiling code with very long basic blocks that can easily
3065 call simplify_gen_binary so many times that we run out of
3069 for (p = elt->first_same_value, count = 0;
3071 p = p->next_same_value, count++)
3073 && (GET_CODE (p->exp) == REG
3074 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3076 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3079 new_cost = address_cost (new, mode);
3081 if (new_cost < best_addr_cost
3082 || (new_cost == best_addr_cost
3083 && (COST (new) + 1) >> 1 > best_rtx_cost))
3086 best_addr_cost = new_cost;
3087 best_rtx_cost = (COST (new) + 1) >> 1;
3095 if (validate_change (insn, loc,
3096 canon_reg (copy_rtx (best_rtx),
3107 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3108 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3109 what values are being compared.
3111 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3112 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3113 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3114 compared to produce cc0.
3116 The return value is the comparison operator and is either the code of
3117 A or the code corresponding to the inverse of the comparison. */
3119 static enum rtx_code
3120 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3123 enum machine_mode *pmode1, *pmode2;
3127 arg1 = *parg1, arg2 = *parg2;
3129 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3131 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3133 /* Set nonzero when we find something of interest. */
3135 int reverse_code = 0;
3136 struct table_elt *p = 0;
3138 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3139 On machines with CC0, this is the only case that can occur, since
3140 fold_rtx will return the COMPARE or item being compared with zero
3143 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3146 /* If ARG1 is a comparison operator and CODE is testing for
3147 STORE_FLAG_VALUE, get the inner arguments. */
3149 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3151 #ifdef FLOAT_STORE_FLAG_VALUE
3152 REAL_VALUE_TYPE fsfv;
3156 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3157 && code == LT && STORE_FLAG_VALUE == -1)
3158 #ifdef FLOAT_STORE_FLAG_VALUE
3159 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3160 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3161 REAL_VALUE_NEGATIVE (fsfv)))
3166 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3167 && code == GE && STORE_FLAG_VALUE == -1)
3168 #ifdef FLOAT_STORE_FLAG_VALUE
3169 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3170 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3171 REAL_VALUE_NEGATIVE (fsfv)))
3174 x = arg1, reverse_code = 1;
3177 /* ??? We could also check for
3179 (ne (and (eq (...) (const_int 1))) (const_int 0))
3181 and related forms, but let's wait until we see them occurring. */
3184 /* Look up ARG1 in the hash table and see if it has an equivalence
3185 that lets us see what is being compared. */
3186 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3190 p = p->first_same_value;
3192 /* If what we compare is already known to be constant, that is as
3194 We need to break the loop in this case, because otherwise we
3195 can have an infinite loop when looking at a reg that is known
3196 to be a constant which is the same as a comparison of a reg
3197 against zero which appears later in the insn stream, which in
3198 turn is constant and the same as the comparison of the first reg
3204 for (; p; p = p->next_same_value)
3206 enum machine_mode inner_mode = GET_MODE (p->exp);
3207 #ifdef FLOAT_STORE_FLAG_VALUE
3208 REAL_VALUE_TYPE fsfv;
3211 /* If the entry isn't valid, skip it. */
3212 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3215 if (GET_CODE (p->exp) == COMPARE
3216 /* Another possibility is that this machine has a compare insn
3217 that includes the comparison code. In that case, ARG1 would
3218 be equivalent to a comparison operation that would set ARG1 to
3219 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3220 ORIG_CODE is the actual comparison being done; if it is an EQ,
3221 we must reverse ORIG_CODE. On machine with a negative value
3222 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3225 && GET_MODE_CLASS (inner_mode) == MODE_INT
3226 && (GET_MODE_BITSIZE (inner_mode)
3227 <= HOST_BITS_PER_WIDE_INT)
3228 && (STORE_FLAG_VALUE
3229 & ((HOST_WIDE_INT) 1
3230 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3231 #ifdef FLOAT_STORE_FLAG_VALUE
3233 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3234 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3235 REAL_VALUE_NEGATIVE (fsfv)))
3238 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3243 else if ((code == EQ
3245 && GET_MODE_CLASS (inner_mode) == MODE_INT
3246 && (GET_MODE_BITSIZE (inner_mode)
3247 <= HOST_BITS_PER_WIDE_INT)
3248 && (STORE_FLAG_VALUE
3249 & ((HOST_WIDE_INT) 1
3250 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3251 #ifdef FLOAT_STORE_FLAG_VALUE
3253 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3254 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3255 REAL_VALUE_NEGATIVE (fsfv)))
3258 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3265 /* If this non-trapping address, e.g. fp + constant, the
3266 equivalent is a better operand since it may let us predict
3267 the value of the comparison. */
3268 else if (!rtx_addr_can_trap_p (p->exp))
3275 /* If we didn't find a useful equivalence for ARG1, we are done.
3276 Otherwise, set up for the next iteration. */
3280 /* If we need to reverse the comparison, make sure that that is
3281 possible -- we can't necessarily infer the value of GE from LT
3282 with floating-point operands. */
3285 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3286 if (reversed == UNKNOWN)
3291 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3292 code = GET_CODE (x);
3293 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3296 /* Return our results. Return the modes from before fold_rtx
3297 because fold_rtx might produce const_int, and then it's too late. */
3298 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3299 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3304 /* If X is a nontrivial arithmetic operation on an argument
3305 for which a constant value can be determined, return
3306 the result of operating on that value, as a constant.
3307 Otherwise, return X, possibly with one or more operands
3308 modified by recursive calls to this function.
3310 If X is a register whose contents are known, we do NOT
3311 return those contents here. equiv_constant is called to
3314 INSN is the insn that we may be modifying. If it is 0, make a copy
3315 of X before modifying it. */
3323 enum machine_mode mode;
3330 /* Folded equivalents of first two operands of X. */
3334 /* Constant equivalents of first three operands of X;
3335 0 when no such equivalent is known. */
3340 /* The mode of the first operand of X. We need this for sign and zero
3342 enum machine_mode mode_arg0;
3347 mode = GET_MODE (x);
3348 code = GET_CODE (x);
3358 /* No use simplifying an EXPR_LIST
3359 since they are used only for lists of args
3360 in a function call's REG_EQUAL note. */
3362 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3363 want to (e.g.,) make (addressof (const_int 0)) just because
3364 the location is known to be zero. */
3370 return prev_insn_cc0;
3374 /* If the next insn is a CODE_LABEL followed by a jump table,
3375 PC's value is a LABEL_REF pointing to that label. That
3376 lets us fold switch statements on the VAX. */
3377 if (insn && GET_CODE (insn) == JUMP_INSN)
3379 rtx next = next_nonnote_insn (insn);
3381 if (next && GET_CODE (next) == CODE_LABEL
3382 && NEXT_INSN (next) != 0
3383 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3384 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3385 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3386 return gen_rtx_LABEL_REF (Pmode, next);
3391 /* See if we previously assigned a constant value to this SUBREG. */
3392 if ((new = lookup_as_function (x, CONST_INT)) != 0
3393 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3396 /* If this is a paradoxical SUBREG, we have no idea what value the
3397 extra bits would have. However, if the operand is equivalent
3398 to a SUBREG whose operand is the same as our mode, and all the
3399 modes are within a word, we can just use the inner operand
3400 because these SUBREGs just say how to treat the register.
3402 Similarly if we find an integer constant. */
3404 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3406 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3407 struct table_elt *elt;
3409 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3410 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3411 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3413 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3415 if (CONSTANT_P (elt->exp)
3416 && GET_MODE (elt->exp) == VOIDmode)
3419 if (GET_CODE (elt->exp) == SUBREG
3420 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3421 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3422 return copy_rtx (SUBREG_REG (elt->exp));
3428 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3429 We might be able to if the SUBREG is extracting a single word in an
3430 integral mode or extracting the low part. */
3432 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3433 const_arg0 = equiv_constant (folded_arg0);
3435 folded_arg0 = const_arg0;
3437 if (folded_arg0 != SUBREG_REG (x))
3439 new = simplify_subreg (mode, folded_arg0,
3440 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3445 /* If this is a narrowing SUBREG and our operand is a REG, see if
3446 we can find an equivalence for REG that is an arithmetic operation
3447 in a wider mode where both operands are paradoxical SUBREGs
3448 from objects of our result mode. In that case, we couldn't report
3449 an equivalent value for that operation, since we don't know what the
3450 extra bits will be. But we can find an equivalence for this SUBREG
3451 by folding that operation is the narrow mode. This allows us to
3452 fold arithmetic in narrow modes when the machine only supports
3453 word-sized arithmetic.
3455 Also look for a case where we have a SUBREG whose operand is the
3456 same as our result. If both modes are smaller than a word, we
3457 are simply interpreting a register in different modes and we
3458 can use the inner value. */
3460 if (GET_CODE (folded_arg0) == REG
3461 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3462 && subreg_lowpart_p (x))
3464 struct table_elt *elt;
3466 /* We can use HASH here since we know that canon_hash won't be
3468 elt = lookup (folded_arg0,
3469 HASH (folded_arg0, GET_MODE (folded_arg0)),
3470 GET_MODE (folded_arg0));
3473 elt = elt->first_same_value;
3475 for (; elt; elt = elt->next_same_value)
3477 enum rtx_code eltcode = GET_CODE (elt->exp);
3479 /* Just check for unary and binary operations. */
3480 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3481 && GET_CODE (elt->exp) != SIGN_EXTEND
3482 && GET_CODE (elt->exp) != ZERO_EXTEND
3483 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3484 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3485 && (GET_MODE_CLASS (mode)
3486 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3488 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3490 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3491 op0 = fold_rtx (op0, NULL_RTX);
3493 op0 = equiv_constant (op0);
3495 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3498 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3499 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3500 && eltcode != DIV && eltcode != MOD
3501 && eltcode != UDIV && eltcode != UMOD
3502 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3503 && eltcode != ROTATE && eltcode != ROTATERT
3504 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3505 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3507 || CONSTANT_P (XEXP (elt->exp, 0)))
3508 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3509 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3511 || CONSTANT_P (XEXP (elt->exp, 1))))
3513 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3514 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3516 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3517 op0 = fold_rtx (op0, NULL_RTX);
3520 op0 = equiv_constant (op0);
3522 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3523 op1 = fold_rtx (op1, NULL_RTX);
3526 op1 = equiv_constant (op1);
3528 /* If we are looking for the low SImode part of
3529 (ashift:DI c (const_int 32)), it doesn't work
3530 to compute that in SImode, because a 32-bit shift
3531 in SImode is unpredictable. We know the value is 0. */
3533 && GET_CODE (elt->exp) == ASHIFT
3534 && GET_CODE (op1) == CONST_INT
3535 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3537 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3539 /* If the count fits in the inner mode's width,
3540 but exceeds the outer mode's width,
3541 the value will get truncated to 0
3545 /* If the count exceeds even the inner mode's width,
3546 don't fold this expression. */
3549 else if (op0 && op1)
3550 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3554 else if (GET_CODE (elt->exp) == SUBREG
3555 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3556 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3558 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3559 new = copy_rtx (SUBREG_REG (elt->exp));
3570 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3571 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3572 new = lookup_as_function (XEXP (x, 0), code);
3574 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3578 /* If we are not actually processing an insn, don't try to find the
3579 best address. Not only don't we care, but we could modify the
3580 MEM in an invalid way since we have no insn to validate against. */
3582 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3585 /* Even if we don't fold in the insn itself,
3586 we can safely do so here, in hopes of getting a constant. */
3587 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3589 HOST_WIDE_INT offset = 0;
3591 if (GET_CODE (addr) == REG
3592 && REGNO_QTY_VALID_P (REGNO (addr)))
3594 int addr_q = REG_QTY (REGNO (addr));
3595 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3597 if (GET_MODE (addr) == addr_ent->mode
3598 && addr_ent->const_rtx != NULL_RTX)
3599 addr = addr_ent->const_rtx;
3602 /* If address is constant, split it into a base and integer offset. */
3603 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3605 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3606 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3608 base = XEXP (XEXP (addr, 0), 0);
3609 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3611 else if (GET_CODE (addr) == LO_SUM
3612 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3613 base = XEXP (addr, 1);
3614 else if (GET_CODE (addr) == ADDRESSOF)
3615 return change_address (x, VOIDmode, addr);
3617 /* If this is a constant pool reference, we can fold it into its
3618 constant to allow better value tracking. */
3619 if (base && GET_CODE (base) == SYMBOL_REF
3620 && CONSTANT_POOL_ADDRESS_P (base))
3622 rtx constant = get_pool_constant (base);
3623 enum machine_mode const_mode = get_pool_mode (base);
3626 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3627 constant_pool_entries_cost = COST (constant);
3629 /* If we are loading the full constant, we have an equivalence. */
3630 if (offset == 0 && mode == const_mode)
3633 /* If this actually isn't a constant (weird!), we can't do
3634 anything. Otherwise, handle the two most common cases:
3635 extracting a word from a multi-word constant, and extracting
3636 the low-order bits. Other cases don't seem common enough to
3638 if (! CONSTANT_P (constant))
3641 if (GET_MODE_CLASS (mode) == MODE_INT
3642 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3643 && offset % UNITS_PER_WORD == 0
3644 && (new = operand_subword (constant,
3645 offset / UNITS_PER_WORD,
3646 0, const_mode)) != 0)
3649 if (((BYTES_BIG_ENDIAN
3650 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3651 || (! BYTES_BIG_ENDIAN && offset == 0))
3652 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3656 /* If this is a reference to a label at a known position in a jump
3657 table, we also know its value. */
3658 if (base && GET_CODE (base) == LABEL_REF)
3660 rtx label = XEXP (base, 0);
3661 rtx table_insn = NEXT_INSN (label);
3663 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3664 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3666 rtx table = PATTERN (table_insn);
3669 && (offset / GET_MODE_SIZE (GET_MODE (table))
3670 < XVECLEN (table, 0)))
3671 return XVECEXP (table, 0,
3672 offset / GET_MODE_SIZE (GET_MODE (table)));
3674 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3675 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3677 rtx table = PATTERN (table_insn);
3680 && (offset / GET_MODE_SIZE (GET_MODE (table))
3681 < XVECLEN (table, 1)))
3683 offset /= GET_MODE_SIZE (GET_MODE (table));
3684 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3687 if (GET_MODE (table) != Pmode)
3688 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3690 /* Indicate this is a constant. This isn't a
3691 valid form of CONST, but it will only be used
3692 to fold the next insns and then discarded, so
3695 Note this expression must be explicitly discarded,
3696 by cse_insn, else it may end up in a REG_EQUAL note
3697 and "escape" to cause problems elsewhere. */
3698 return gen_rtx_CONST (GET_MODE (new), new);
3706 #ifdef NO_FUNCTION_CSE
3708 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3714 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3715 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3716 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3726 mode_arg0 = VOIDmode;
3728 /* Try folding our operands.
3729 Then see which ones have constant values known. */
3731 fmt = GET_RTX_FORMAT (code);
3732 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3735 rtx arg = XEXP (x, i);
3736 rtx folded_arg = arg, const_arg = 0;
3737 enum machine_mode mode_arg = GET_MODE (arg);
3738 rtx cheap_arg, expensive_arg;
3739 rtx replacements[2];
3741 int old_cost = COST_IN (XEXP (x, i), code);
3743 /* Most arguments are cheap, so handle them specially. */
3744 switch (GET_CODE (arg))
3747 /* This is the same as calling equiv_constant; it is duplicated
3749 if (REGNO_QTY_VALID_P (REGNO (arg)))
3751 int arg_q = REG_QTY (REGNO (arg));
3752 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3754 if (arg_ent->const_rtx != NULL_RTX
3755 && GET_CODE (arg_ent->const_rtx) != REG
3756 && GET_CODE (arg_ent->const_rtx) != PLUS)
3758 = gen_lowpart_if_possible (GET_MODE (arg),
3759 arg_ent->const_rtx);
3774 folded_arg = prev_insn_cc0;
3775 mode_arg = prev_insn_cc0_mode;
3776 const_arg = equiv_constant (folded_arg);
3781 folded_arg = fold_rtx (arg, insn);
3782 const_arg = equiv_constant (folded_arg);
3785 /* For the first three operands, see if the operand
3786 is constant or equivalent to a constant. */
3790 folded_arg0 = folded_arg;
3791 const_arg0 = const_arg;
3792 mode_arg0 = mode_arg;
3795 folded_arg1 = folded_arg;
3796 const_arg1 = const_arg;
3799 const_arg2 = const_arg;
3803 /* Pick the least expensive of the folded argument and an
3804 equivalent constant argument. */
3805 if (const_arg == 0 || const_arg == folded_arg
3806 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3807 cheap_arg = folded_arg, expensive_arg = const_arg;
3809 cheap_arg = const_arg, expensive_arg = folded_arg;
3811 /* Try to replace the operand with the cheapest of the two
3812 possibilities. If it doesn't work and this is either of the first
3813 two operands of a commutative operation, try swapping them.
3814 If THAT fails, try the more expensive, provided it is cheaper
3815 than what is already there. */
3817 if (cheap_arg == XEXP (x, i))
3820 if (insn == 0 && ! copied)
3826 /* Order the replacements from cheapest to most expensive. */
3827 replacements[0] = cheap_arg;
3828 replacements[1] = expensive_arg;
3830 for (j = 0; j < 2 && replacements[j]; j++)
3832 int new_cost = COST_IN (replacements[j], code);
3834 /* Stop if what existed before was cheaper. Prefer constants
3835 in the case of a tie. */
3836 if (new_cost > old_cost
3837 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3840 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3843 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3844 || code == LTGT || code == UNEQ || code == ORDERED
3845 || code == UNORDERED)
3847 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3848 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3850 if (apply_change_group ())
3852 /* Swap them back to be invalid so that this loop can
3853 continue and flag them to be swapped back later. */
3856 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3868 /* Don't try to fold inside of a vector of expressions.
3869 Doing nothing is harmless. */
3873 /* If a commutative operation, place a constant integer as the second
3874 operand unless the first operand is also a constant integer. Otherwise,
3875 place any constant second unless the first operand is also a constant. */
3877 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3878 || code == LTGT || code == UNEQ || code == ORDERED
3879 || code == UNORDERED)
3881 if (must_swap || (const_arg0
3883 || (GET_CODE (const_arg0) == CONST_INT
3884 && GET_CODE (const_arg1) != CONST_INT))))
3886 rtx tem = XEXP (x, 0);
3888 if (insn == 0 && ! copied)
3894 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3895 validate_change (insn, &XEXP (x, 1), tem, 1);
3896 if (apply_change_group ())
3898 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3899 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3904 /* If X is an arithmetic operation, see if we can simplify it. */
3906 switch (GET_RTX_CLASS (code))
3912 /* We can't simplify extension ops unless we know the
3914 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3915 && mode_arg0 == VOIDmode)
3918 /* If we had a CONST, strip it off and put it back later if we
3920 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3921 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3923 new = simplify_unary_operation (code, mode,
3924 const_arg0 ? const_arg0 : folded_arg0,
3926 if (new != 0 && is_const)
3927 new = gen_rtx_CONST (mode, new);
3932 /* See what items are actually being compared and set FOLDED_ARG[01]
3933 to those values and CODE to the actual comparison code. If any are
3934 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3935 do anything if both operands are already known to be constant. */
3937 if (const_arg0 == 0 || const_arg1 == 0)
3939 struct table_elt *p0, *p1;
3940 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3941 enum machine_mode mode_arg1;
3943 #ifdef FLOAT_STORE_FLAG_VALUE
3944 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3946 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3947 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3948 false_rtx = CONST0_RTX (mode);
3952 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3953 &mode_arg0, &mode_arg1);
3954 const_arg0 = equiv_constant (folded_arg0);
3955 const_arg1 = equiv_constant (folded_arg1);
3957 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3958 what kinds of things are being compared, so we can't do
3959 anything with this comparison. */
3961 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3964 /* If we do not now have two constants being compared, see
3965 if we can nevertheless deduce some things about the
3967 if (const_arg0 == 0 || const_arg1 == 0)
3969 /* Some addresses are known to be nonzero. We don't know
3970 their sign, but equality comparisons are known. */
3971 if (const_arg1 == const0_rtx
3972 && nonzero_address_p (folded_arg0))
3976 else if (code == NE)
3980 /* See if the two operands are the same. */
3982 if (folded_arg0 == folded_arg1
3983 || (GET_CODE (folded_arg0) == REG
3984 && GET_CODE (folded_arg1) == REG
3985 && (REG_QTY (REGNO (folded_arg0))
3986 == REG_QTY (REGNO (folded_arg1))))
3987 || ((p0 = lookup (folded_arg0,
3988 (safe_hash (folded_arg0, mode_arg0)
3989 & HASH_MASK), mode_arg0))
3990 && (p1 = lookup (folded_arg1,
3991 (safe_hash (folded_arg1, mode_arg0)
3992 & HASH_MASK), mode_arg0))
3993 && p0->first_same_value == p1->first_same_value))
3995 /* Sadly two equal NaNs are not equivalent. */
3996 if (!HONOR_NANS (mode_arg0))
3997 return ((code == EQ || code == LE || code == GE
3998 || code == LEU || code == GEU || code == UNEQ
3999 || code == UNLE || code == UNGE
4001 ? true_rtx : false_rtx);
4002 /* Take care for the FP compares we can resolve. */
4003 if (code == UNEQ || code == UNLE || code == UNGE)
4005 if (code == LTGT || code == LT || code == GT)
4009 /* If FOLDED_ARG0 is a register, see if the comparison we are
4010 doing now is either the same as we did before or the reverse
4011 (we only check the reverse if not floating-point). */
4012 else if (GET_CODE (folded_arg0) == REG)
4014 int qty = REG_QTY (REGNO (folded_arg0));
4016 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
4018 struct qty_table_elem *ent = &qty_table[qty];
4020 if ((comparison_dominates_p (ent->comparison_code, code)
4021 || (! FLOAT_MODE_P (mode_arg0)
4022 && comparison_dominates_p (ent->comparison_code,
4023 reverse_condition (code))))
4024 && (rtx_equal_p (ent->comparison_const, folded_arg1)
4026 && rtx_equal_p (ent->comparison_const,
4028 || (GET_CODE (folded_arg1) == REG
4029 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
4030 return (comparison_dominates_p (ent->comparison_code, code)
4031 ? true_rtx : false_rtx);
4037 /* If we are comparing against zero, see if the first operand is
4038 equivalent to an IOR with a constant. If so, we may be able to
4039 determine the result of this comparison. */
4041 if (const_arg1 == const0_rtx)
4043 rtx y = lookup_as_function (folded_arg0, IOR);
4047 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4048 && GET_CODE (inner_const) == CONST_INT
4049 && INTVAL (inner_const) != 0)
4051 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4052 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4053 && (INTVAL (inner_const)
4054 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4055 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4057 #ifdef FLOAT_STORE_FLAG_VALUE
4058 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4060 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4061 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4062 false_rtx = CONST0_RTX (mode);
4086 new = simplify_relational_operation (code,
4087 (mode_arg0 != VOIDmode
4089 : (GET_MODE (const_arg0
4093 ? GET_MODE (const_arg0
4096 : GET_MODE (const_arg1
4099 const_arg0 ? const_arg0 : folded_arg0,
4100 const_arg1 ? const_arg1 : folded_arg1);
4101 #ifdef FLOAT_STORE_FLAG_VALUE
4102 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4104 if (new == const0_rtx)
4105 new = CONST0_RTX (mode);
4107 new = (CONST_DOUBLE_FROM_REAL_VALUE
4108 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4118 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4119 with that LABEL_REF as its second operand. If so, the result is
4120 the first operand of that MINUS. This handles switches with an
4121 ADDR_DIFF_VEC table. */
4122 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4125 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4126 : lookup_as_function (folded_arg0, MINUS);
4128 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4129 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4132 /* Now try for a CONST of a MINUS like the above. */
4133 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4134 : lookup_as_function (folded_arg0, CONST))) != 0
4135 && GET_CODE (XEXP (y, 0)) == MINUS
4136 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4137 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4138 return XEXP (XEXP (y, 0), 0);
4141 /* Likewise if the operands are in the other order. */
4142 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4145 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4146 : lookup_as_function (folded_arg1, MINUS);
4148 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4149 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4152 /* Now try for a CONST of a MINUS like the above. */
4153 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4154 : lookup_as_function (folded_arg1, CONST))) != 0
4155 && GET_CODE (XEXP (y, 0)) == MINUS
4156 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4157 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4158 return XEXP (XEXP (y, 0), 0);
4161 /* If second operand is a register equivalent to a negative
4162 CONST_INT, see if we can find a register equivalent to the
4163 positive constant. Make a MINUS if so. Don't do this for
4164 a non-negative constant since we might then alternate between
4165 choosing positive and negative constants. Having the positive
4166 constant previously-used is the more common case. Be sure
4167 the resulting constant is non-negative; if const_arg1 were
4168 the smallest negative number this would overflow: depending
4169 on the mode, this would either just be the same value (and
4170 hence not save anything) or be incorrect. */
4171 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4172 && INTVAL (const_arg1) < 0
4173 /* This used to test
4175 -INTVAL (const_arg1) >= 0
4177 But The Sun V5.0 compilers mis-compiled that test. So
4178 instead we test for the problematic value in a more direct
4179 manner and hope the Sun compilers get it correct. */
4180 && INTVAL (const_arg1) !=
4181 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4182 && GET_CODE (folded_arg1) == REG)
4184 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4186 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4190 for (p = p->first_same_value; p; p = p->next_same_value)
4191 if (GET_CODE (p->exp) == REG)
4192 return simplify_gen_binary (MINUS, mode, folded_arg0,
4193 canon_reg (p->exp, NULL_RTX));
4198 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4199 If so, produce (PLUS Z C2-C). */
4200 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4202 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4203 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4204 return fold_rtx (plus_constant (copy_rtx (y),
4205 -INTVAL (const_arg1)),
4212 case SMIN: case SMAX: case UMIN: case UMAX:
4213 case IOR: case AND: case XOR:
4215 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4216 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4217 is known to be of similar form, we may be able to replace the
4218 operation with a combined operation. This may eliminate the
4219 intermediate operation if every use is simplified in this way.
4220 Note that the similar optimization done by combine.c only works
4221 if the intermediate operation's result has only one reference. */
4223 if (GET_CODE (folded_arg0) == REG
4224 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4227 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4228 rtx y = lookup_as_function (folded_arg0, code);
4230 enum rtx_code associate_code;
4234 || 0 == (inner_const
4235 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4236 || GET_CODE (inner_const) != CONST_INT
4237 /* If we have compiled a statement like
4238 "if (x == (x & mask1))", and now are looking at
4239 "x & mask2", we will have a case where the first operand
4240 of Y is the same as our first operand. Unless we detect
4241 this case, an infinite loop will result. */
4242 || XEXP (y, 0) == folded_arg0)
4245 /* Don't associate these operations if they are a PLUS with the
4246 same constant and it is a power of two. These might be doable
4247 with a pre- or post-increment. Similarly for two subtracts of
4248 identical powers of two with post decrement. */
4250 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4251 && ((HAVE_PRE_INCREMENT
4252 && exact_log2 (INTVAL (const_arg1)) >= 0)
4253 || (HAVE_POST_INCREMENT
4254 && exact_log2 (INTVAL (const_arg1)) >= 0)
4255 || (HAVE_PRE_DECREMENT
4256 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4257 || (HAVE_POST_DECREMENT
4258 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4261 /* Compute the code used to compose the constants. For example,
4262 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4264 associate_code = (is_shift || code == MINUS ? PLUS : code);
4266 new_const = simplify_binary_operation (associate_code, mode,
4267 const_arg1, inner_const);
4272 /* If we are associating shift operations, don't let this
4273 produce a shift of the size of the object or larger.
4274 This could occur when we follow a sign-extend by a right
4275 shift on a machine that does a sign-extend as a pair
4278 if (is_shift && GET_CODE (new_const) == CONST_INT
4279 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4281 /* As an exception, we can turn an ASHIFTRT of this
4282 form into a shift of the number of bits - 1. */
4283 if (code == ASHIFTRT)
4284 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4289 y = copy_rtx (XEXP (y, 0));
4291 /* If Y contains our first operand (the most common way this
4292 can happen is if Y is a MEM), we would do into an infinite
4293 loop if we tried to fold it. So don't in that case. */
4295 if (! reg_mentioned_p (folded_arg0, y))
4296 y = fold_rtx (y, insn);
4298 return simplify_gen_binary (code, mode, y, new_const);
4302 case DIV: case UDIV:
4303 /* ??? The associative optimization performed immediately above is
4304 also possible for DIV and UDIV using associate_code of MULT.
4305 However, we would need extra code to verify that the
4306 multiplication does not overflow, that is, there is no overflow
4307 in the calculation of new_const. */
4314 new = simplify_binary_operation (code, mode,
4315 const_arg0 ? const_arg0 : folded_arg0,
4316 const_arg1 ? const_arg1 : folded_arg1);
4320 /* (lo_sum (high X) X) is simply X. */
4321 if (code == LO_SUM && const_arg0 != 0
4322 && GET_CODE (const_arg0) == HIGH
4323 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4329 new = simplify_ternary_operation (code, mode, mode_arg0,
4330 const_arg0 ? const_arg0 : folded_arg0,
4331 const_arg1 ? const_arg1 : folded_arg1,
4332 const_arg2 ? const_arg2 : XEXP (x, 2));
4336 /* Eliminate CONSTANT_P_RTX if its constant. */
4337 if (code == CONSTANT_P_RTX)
4341 if (optimize == 0 || !flag_gcse)
4347 return new ? new : x;
4350 /* Return a constant value currently equivalent to X.
4351 Return 0 if we don't know one. */
4357 if (GET_CODE (x) == REG
4358 && REGNO_QTY_VALID_P (REGNO (x)))
4360 int x_q = REG_QTY (REGNO (x));
4361 struct qty_table_elem *x_ent = &qty_table[x_q];
4363 if (x_ent->const_rtx)
4364 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4367 if (x == 0 || CONSTANT_P (x))
4370 /* If X is a MEM, try to fold it outside the context of any insn to see if
4371 it might be equivalent to a constant. That handles the case where it
4372 is a constant-pool reference. Then try to look it up in the hash table
4373 in case it is something whose value we have seen before. */
4375 if (GET_CODE (x) == MEM)
4377 struct table_elt *elt;
4379 x = fold_rtx (x, NULL_RTX);
4383 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4387 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4388 if (elt->is_const && CONSTANT_P (elt->exp))
4395 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4396 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4397 least-significant part of X.
4398 MODE specifies how big a part of X to return.
4400 If the requested operation cannot be done, 0 is returned.
4402 This is similar to gen_lowpart in emit-rtl.c. */
4405 gen_lowpart_if_possible (mode, x)
4406 enum machine_mode mode;
4409 rtx result = gen_lowpart_common (mode, x);
4413 else if (GET_CODE (x) == MEM)
4415 /* This is the only other case we handle. */
4419 if (WORDS_BIG_ENDIAN)
4420 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4421 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4422 if (BYTES_BIG_ENDIAN)
4423 /* Adjust the address so that the address-after-the-data is
4425 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4426 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4428 new = adjust_address_nv (x, mode, offset);
4429 if (! memory_address_p (mode, XEXP (new, 0)))
4438 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4439 branch. It will be zero if not.
4441 In certain cases, this can cause us to add an equivalence. For example,
4442 if we are following the taken case of
4444 we can add the fact that `i' and '2' are now equivalent.
4446 In any case, we can record that this comparison was passed. If the same
4447 comparison is seen later, we will know its value. */
4450 record_jump_equiv (insn, taken)
4454 int cond_known_true;
4457 enum machine_mode mode, mode0, mode1;
4458 int reversed_nonequality = 0;
4461 /* Ensure this is the right kind of insn. */
4462 if (! any_condjump_p (insn))
4464 set = pc_set (insn);
4466 /* See if this jump condition is known true or false. */
4468 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4470 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4472 /* Get the type of comparison being done and the operands being compared.
4473 If we had to reverse a non-equality condition, record that fact so we
4474 know that it isn't valid for floating-point. */
4475 code = GET_CODE (XEXP (SET_SRC (set), 0));
4476 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4477 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4479 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4480 if (! cond_known_true)
4482 code = reversed_comparison_code_parts (code, op0, op1, insn);
4484 /* Don't remember if we can't find the inverse. */
4485 if (code == UNKNOWN)
4489 /* The mode is the mode of the non-constant. */
4491 if (mode1 != VOIDmode)
4494 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4497 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4498 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4499 Make any useful entries we can with that information. Called from
4500 above function and called recursively. */
4503 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4505 enum machine_mode mode;
4507 int reversed_nonequality;
4509 unsigned op0_hash, op1_hash;
4510 int op0_in_memory, op1_in_memory;
4511 struct table_elt *op0_elt, *op1_elt;
4513 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4514 we know that they are also equal in the smaller mode (this is also
4515 true for all smaller modes whether or not there is a SUBREG, but
4516 is not worth testing for with no SUBREG). */
4518 /* Note that GET_MODE (op0) may not equal MODE. */
4519 if (code == EQ && GET_CODE (op0) == SUBREG
4520 && (GET_MODE_SIZE (GET_MODE (op0))
4521 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4523 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4524 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4526 record_jump_cond (code, mode, SUBREG_REG (op0),
4527 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4528 reversed_nonequality);
4531 if (code == EQ && GET_CODE (op1) == SUBREG
4532 && (GET_MODE_SIZE (GET_MODE (op1))
4533 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4535 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4536 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4538 record_jump_cond (code, mode, SUBREG_REG (op1),
4539 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4540 reversed_nonequality);
4543 /* Similarly, if this is an NE comparison, and either is a SUBREG
4544 making a smaller mode, we know the whole thing is also NE. */
4546 /* Note that GET_MODE (op0) may not equal MODE;
4547 if we test MODE instead, we can get an infinite recursion
4548 alternating between two modes each wider than MODE. */
4550 if (code == NE && GET_CODE (op0) == SUBREG
4551 && subreg_lowpart_p (op0)
4552 && (GET_MODE_SIZE (GET_MODE (op0))
4553 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4555 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4556 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4558 record_jump_cond (code, mode, SUBREG_REG (op0),
4559 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4560 reversed_nonequality);
4563 if (code == NE && GET_CODE (op1) == SUBREG
4564 && subreg_lowpart_p (op1)
4565 && (GET_MODE_SIZE (GET_MODE (op1))
4566 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4568 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4569 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4571 record_jump_cond (code, mode, SUBREG_REG (op1),
4572 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4573 reversed_nonequality);
4576 /* Hash both operands. */
4579 hash_arg_in_memory = 0;
4580 op0_hash = HASH (op0, mode);
4581 op0_in_memory = hash_arg_in_memory;
4587 hash_arg_in_memory = 0;
4588 op1_hash = HASH (op1, mode);
4589 op1_in_memory = hash_arg_in_memory;
4594 /* Look up both operands. */
4595 op0_elt = lookup (op0, op0_hash, mode);
4596 op1_elt = lookup (op1, op1_hash, mode);
4598 /* If both operands are already equivalent or if they are not in the
4599 table but are identical, do nothing. */
4600 if ((op0_elt != 0 && op1_elt != 0
4601 && op0_elt->first_same_value == op1_elt->first_same_value)
4602 || op0 == op1 || rtx_equal_p (op0, op1))
4605 /* If we aren't setting two things equal all we can do is save this
4606 comparison. Similarly if this is floating-point. In the latter
4607 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4608 If we record the equality, we might inadvertently delete code
4609 whose intent was to change -0 to +0. */
4611 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4613 struct qty_table_elem *ent;
4616 /* If we reversed a floating-point comparison, if OP0 is not a
4617 register, or if OP1 is neither a register or constant, we can't
4620 if (GET_CODE (op1) != REG)
4621 op1 = equiv_constant (op1);
4623 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4624 || GET_CODE (op0) != REG || op1 == 0)
4627 /* Put OP0 in the hash table if it isn't already. This gives it a
4628 new quantity number. */
4631 if (insert_regs (op0, NULL, 0))
4633 rehash_using_reg (op0);
4634 op0_hash = HASH (op0, mode);
4636 /* If OP0 is contained in OP1, this changes its hash code
4637 as well. Faster to rehash than to check, except
4638 for the simple case of a constant. */
4639 if (! CONSTANT_P (op1))
4640 op1_hash = HASH (op1,mode);
4643 op0_elt = insert (op0, NULL, op0_hash, mode);
4644 op0_elt->in_memory = op0_in_memory;
4647 qty = REG_QTY (REGNO (op0));
4648 ent = &qty_table[qty];
4650 ent->comparison_code = code;
4651 if (GET_CODE (op1) == REG)
4653 /* Look it up again--in case op0 and op1 are the same. */
4654 op1_elt = lookup (op1, op1_hash, mode);
4656 /* Put OP1 in the hash table so it gets a new quantity number. */
4659 if (insert_regs (op1, NULL, 0))
4661 rehash_using_reg (op1);
4662 op1_hash = HASH (op1, mode);
4665 op1_elt = insert (op1, NULL, op1_hash, mode);
4666 op1_elt->in_memory = op1_in_memory;
4669 ent->comparison_const = NULL_RTX;
4670 ent->comparison_qty = REG_QTY (REGNO (op1));
4674 ent->comparison_const = op1;
4675 ent->comparison_qty = -1;
4681 /* If either side is still missing an equivalence, make it now,
4682 then merge the equivalences. */
4686 if (insert_regs (op0, NULL, 0))
4688 rehash_using_reg (op0);
4689 op0_hash = HASH (op0, mode);
4692 op0_elt = insert (op0, NULL, op0_hash, mode);
4693 op0_elt->in_memory = op0_in_memory;
4698 if (insert_regs (op1, NULL, 0))
4700 rehash_using_reg (op1);
4701 op1_hash = HASH (op1, mode);
4704 op1_elt = insert (op1, NULL, op1_hash, mode);
4705 op1_elt->in_memory = op1_in_memory;
4708 merge_equiv_classes (op0_elt, op1_elt);
4709 last_jump_equiv_class = op0_elt;
4712 /* CSE processing for one instruction.
4713 First simplify sources and addresses of all assignments
4714 in the instruction, using previously-computed equivalents values.
4715 Then install the new sources and destinations in the table
4716 of available values.
4718 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4719 the insn. It means that INSN is inside libcall block. In this
4720 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4722 /* Data on one SET contained in the instruction. */
4726 /* The SET rtx itself. */
4728 /* The SET_SRC of the rtx (the original value, if it is changing). */
4730 /* The hash-table element for the SET_SRC of the SET. */
4731 struct table_elt *src_elt;
4732 /* Hash value for the SET_SRC. */
4734 /* Hash value for the SET_DEST. */
4736 /* The SET_DEST, with SUBREG, etc., stripped. */
4738 /* Nonzero if the SET_SRC is in memory. */
4740 /* Nonzero if the SET_SRC contains something
4741 whose value cannot be predicted and understood. */
4743 /* Original machine mode, in case it becomes a CONST_INT. */
4744 enum machine_mode mode;
4745 /* A constant equivalent for SET_SRC, if any. */
4747 /* Original SET_SRC value used for libcall notes. */
4749 /* Hash value of constant equivalent for SET_SRC. */
4750 unsigned src_const_hash;
4751 /* Table entry for constant equivalent for SET_SRC, if any. */
4752 struct table_elt *src_const_elt;
4756 cse_insn (insn, libcall_insn)
4760 rtx x = PATTERN (insn);
4766 /* Records what this insn does to set CC0. */
4767 rtx this_insn_cc0 = 0;
4768 enum machine_mode this_insn_cc0_mode = VOIDmode;
4772 struct table_elt *src_eqv_elt = 0;
4773 int src_eqv_volatile = 0;
4774 int src_eqv_in_memory = 0;
4775 unsigned src_eqv_hash = 0;
4777 struct set *sets = (struct set *) 0;
4781 /* Find all the SETs and CLOBBERs in this instruction.
4782 Record all the SETs in the array `set' and count them.
4783 Also determine whether there is a CLOBBER that invalidates
4784 all memory references, or all references at varying addresses. */
4786 if (GET_CODE (insn) == CALL_INSN)
4788 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4790 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4791 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4792 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4796 if (GET_CODE (x) == SET)
4798 sets = (struct set *) alloca (sizeof (struct set));
4801 /* Ignore SETs that are unconditional jumps.
4802 They never need cse processing, so this does not hurt.
4803 The reason is not efficiency but rather
4804 so that we can test at the end for instructions
4805 that have been simplified to unconditional jumps
4806 and not be misled by unchanged instructions
4807 that were unconditional jumps to begin with. */
4808 if (SET_DEST (x) == pc_rtx
4809 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4812 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4813 The hard function value register is used only once, to copy to
4814 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4815 Ensure we invalidate the destination register. On the 80386 no
4816 other code would invalidate it since it is a fixed_reg.
4817 We need not check the return of apply_change_group; see canon_reg. */
4819 else if (GET_CODE (SET_SRC (x)) == CALL)
4821 canon_reg (SET_SRC (x), insn);
4822 apply_change_group ();
4823 fold_rtx (SET_SRC (x), insn);
4824 invalidate (SET_DEST (x), VOIDmode);
4829 else if (GET_CODE (x) == PARALLEL)
4831 int lim = XVECLEN (x, 0);
4833 sets = (struct set *) alloca (lim * sizeof (struct set));
4835 /* Find all regs explicitly clobbered in this insn,
4836 and ensure they are not replaced with any other regs
4837 elsewhere in this insn.
4838 When a reg that is clobbered is also used for input,
4839 we should presume that that is for a reason,
4840 and we should not substitute some other register
4841 which is not supposed to be clobbered.
4842 Therefore, this loop cannot be merged into the one below
4843 because a CALL may precede a CLOBBER and refer to the
4844 value clobbered. We must not let a canonicalization do
4845 anything in that case. */
4846 for (i = 0; i < lim; i++)
4848 rtx y = XVECEXP (x, 0, i);
4849 if (GET_CODE (y) == CLOBBER)
4851 rtx clobbered = XEXP (y, 0);
4853 if (GET_CODE (clobbered) == REG
4854 || GET_CODE (clobbered) == SUBREG)
4855 invalidate (clobbered, VOIDmode);
4856 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4857 || GET_CODE (clobbered) == ZERO_EXTRACT)
4858 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4862 for (i = 0; i < lim; i++)
4864 rtx y = XVECEXP (x, 0, i);
4865 if (GET_CODE (y) == SET)
4867 /* As above, we ignore unconditional jumps and call-insns and
4868 ignore the result of apply_change_group. */
4869 if (GET_CODE (SET_SRC (y)) == CALL)
4871 canon_reg (SET_SRC (y), insn);
4872 apply_change_group ();
4873 fold_rtx (SET_SRC (y), insn);
4874 invalidate (SET_DEST (y), VOIDmode);
4876 else if (SET_DEST (y) == pc_rtx
4877 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4880 sets[n_sets++].rtl = y;
4882 else if (GET_CODE (y) == CLOBBER)
4884 /* If we clobber memory, canon the address.
4885 This does nothing when a register is clobbered
4886 because we have already invalidated the reg. */
4887 if (GET_CODE (XEXP (y, 0)) == MEM)
4888 canon_reg (XEXP (y, 0), NULL_RTX);
4890 else if (GET_CODE (y) == USE
4891 && ! (GET_CODE (XEXP (y, 0)) == REG
4892 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4893 canon_reg (y, NULL_RTX);
4894 else if (GET_CODE (y) == CALL)
4896 /* The result of apply_change_group can be ignored; see
4898 canon_reg (y, insn);
4899 apply_change_group ();
4904 else if (GET_CODE (x) == CLOBBER)
4906 if (GET_CODE (XEXP (x, 0)) == MEM)
4907 canon_reg (XEXP (x, 0), NULL_RTX);
4910 /* Canonicalize a USE of a pseudo register or memory location. */
4911 else if (GET_CODE (x) == USE
4912 && ! (GET_CODE (XEXP (x, 0)) == REG
4913 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4914 canon_reg (XEXP (x, 0), NULL_RTX);
4915 else if (GET_CODE (x) == CALL)
4917 /* The result of apply_change_group can be ignored; see canon_reg. */
4918 canon_reg (x, insn);
4919 apply_change_group ();
4923 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4924 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4925 is handled specially for this case, and if it isn't set, then there will
4926 be no equivalence for the destination. */
4927 if (n_sets == 1 && REG_NOTES (insn) != 0
4928 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4929 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4930 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4932 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4933 XEXP (tem, 0) = src_eqv;
4936 /* Canonicalize sources and addresses of destinations.
4937 We do this in a separate pass to avoid problems when a MATCH_DUP is
4938 present in the insn pattern. In that case, we want to ensure that
4939 we don't break the duplicate nature of the pattern. So we will replace
4940 both operands at the same time. Otherwise, we would fail to find an
4941 equivalent substitution in the loop calling validate_change below.
4943 We used to suppress canonicalization of DEST if it appears in SRC,
4944 but we don't do this any more. */
4946 for (i = 0; i < n_sets; i++)
4948 rtx dest = SET_DEST (sets[i].rtl);
4949 rtx src = SET_SRC (sets[i].rtl);
4950 rtx new = canon_reg (src, insn);
4953 sets[i].orig_src = src;
4954 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4955 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4956 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4957 || (insn_code = recog_memoized (insn)) < 0
4958 || insn_data[insn_code].n_dups > 0)
4959 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4961 SET_SRC (sets[i].rtl) = new;
4963 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4965 validate_change (insn, &XEXP (dest, 1),
4966 canon_reg (XEXP (dest, 1), insn), 1);
4967 validate_change (insn, &XEXP (dest, 2),
4968 canon_reg (XEXP (dest, 2), insn), 1);
4971 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4972 || GET_CODE (dest) == ZERO_EXTRACT
4973 || GET_CODE (dest) == SIGN_EXTRACT)
4974 dest = XEXP (dest, 0);
4976 if (GET_CODE (dest) == MEM)
4977 canon_reg (dest, insn);
4980 /* Now that we have done all the replacements, we can apply the change
4981 group and see if they all work. Note that this will cause some
4982 canonicalizations that would have worked individually not to be applied
4983 because some other canonicalization didn't work, but this should not
4986 The result of apply_change_group can be ignored; see canon_reg. */
4988 apply_change_group ();
4990 /* Set sets[i].src_elt to the class each source belongs to.
4991 Detect assignments from or to volatile things
4992 and set set[i] to zero so they will be ignored
4993 in the rest of this function.
4995 Nothing in this loop changes the hash table or the register chains. */
4997 for (i = 0; i < n_sets; i++)
5001 struct table_elt *elt = 0, *p;
5002 enum machine_mode mode;
5005 rtx src_related = 0;
5006 struct table_elt *src_const_elt = 0;
5007 int src_cost = MAX_COST;
5008 int src_eqv_cost = MAX_COST;
5009 int src_folded_cost = MAX_COST;
5010 int src_related_cost = MAX_COST;
5011 int src_elt_cost = MAX_COST;
5012 int src_regcost = MAX_COST;
5013 int src_eqv_regcost = MAX_COST;
5014 int src_folded_regcost = MAX_COST;
5015 int src_related_regcost = MAX_COST;
5016 int src_elt_regcost = MAX_COST;
5017 /* Set nonzero if we need to call force_const_mem on with the
5018 contents of src_folded before using it. */
5019 int src_folded_force_flag = 0;
5021 dest = SET_DEST (sets[i].rtl);
5022 src = SET_SRC (sets[i].rtl);
5024 /* If SRC is a constant that has no machine mode,
5025 hash it with the destination's machine mode.
5026 This way we can keep different modes separate. */
5028 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5029 sets[i].mode = mode;
5033 enum machine_mode eqvmode = mode;
5034 if (GET_CODE (dest) == STRICT_LOW_PART)
5035 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5037 hash_arg_in_memory = 0;
5038 src_eqv_hash = HASH (src_eqv, eqvmode);
5040 /* Find the equivalence class for the equivalent expression. */
5043 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
5045 src_eqv_volatile = do_not_record;
5046 src_eqv_in_memory = hash_arg_in_memory;
5049 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5050 value of the INNER register, not the destination. So it is not
5051 a valid substitution for the source. But save it for later. */
5052 if (GET_CODE (dest) == STRICT_LOW_PART)
5055 src_eqv_here = src_eqv;
5057 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5058 simplified result, which may not necessarily be valid. */
5059 src_folded = fold_rtx (src, insn);
5062 /* ??? This caused bad code to be generated for the m68k port with -O2.
5063 Suppose src is (CONST_INT -1), and that after truncation src_folded
5064 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5065 At the end we will add src and src_const to the same equivalence
5066 class. We now have 3 and -1 on the same equivalence class. This
5067 causes later instructions to be mis-optimized. */
5068 /* If storing a constant in a bitfield, pre-truncate the constant
5069 so we will be able to record it later. */
5070 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5071 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5073 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5075 if (GET_CODE (src) == CONST_INT
5076 && GET_CODE (width) == CONST_INT
5077 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5078 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5080 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5081 << INTVAL (width)) - 1));
5085 /* Compute SRC's hash code, and also notice if it
5086 should not be recorded at all. In that case,
5087 prevent any further processing of this assignment. */
5089 hash_arg_in_memory = 0;
5092 sets[i].src_hash = HASH (src, mode);
5093 sets[i].src_volatile = do_not_record;
5094 sets[i].src_in_memory = hash_arg_in_memory;
5096 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5097 a pseudo, do not record SRC. Using SRC as a replacement for
5098 anything else will be incorrect in that situation. Note that
5099 this usually occurs only for stack slots, in which case all the
5100 RTL would be referring to SRC, so we don't lose any optimization
5101 opportunities by not having SRC in the hash table. */
5103 if (GET_CODE (src) == MEM
5104 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5105 && GET_CODE (dest) == REG
5106 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5107 sets[i].src_volatile = 1;
5110 /* It is no longer clear why we used to do this, but it doesn't
5111 appear to still be needed. So let's try without it since this
5112 code hurts cse'ing widened ops. */
5113 /* If source is a perverse subreg (such as QI treated as an SI),
5114 treat it as volatile. It may do the work of an SI in one context
5115 where the extra bits are not being used, but cannot replace an SI
5117 if (GET_CODE (src) == SUBREG
5118 && (GET_MODE_SIZE (GET_MODE (src))
5119 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5120 sets[i].src_volatile = 1;
5123 /* Locate all possible equivalent forms for SRC. Try to replace
5124 SRC in the insn with each cheaper equivalent.
5126 We have the following types of equivalents: SRC itself, a folded
5127 version, a value given in a REG_EQUAL note, or a value related
5130 Each of these equivalents may be part of an additional class
5131 of equivalents (if more than one is in the table, they must be in
5132 the same class; we check for this).
5134 If the source is volatile, we don't do any table lookups.
5136 We note any constant equivalent for possible later use in a
5139 if (!sets[i].src_volatile)
5140 elt = lookup (src, sets[i].src_hash, mode);
5142 sets[i].src_elt = elt;
5144 if (elt && src_eqv_here && src_eqv_elt)
5146 if (elt->first_same_value != src_eqv_elt->first_same_value)
5148 /* The REG_EQUAL is indicating that two formerly distinct
5149 classes are now equivalent. So merge them. */
5150 merge_equiv_classes (elt, src_eqv_elt);
5151 src_eqv_hash = HASH (src_eqv, elt->mode);
5152 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5158 else if (src_eqv_elt)
5161 /* Try to find a constant somewhere and record it in `src_const'.
5162 Record its table element, if any, in `src_const_elt'. Look in
5163 any known equivalences first. (If the constant is not in the
5164 table, also set `sets[i].src_const_hash'). */
5166 for (p = elt->first_same_value; p; p = p->next_same_value)
5170 src_const_elt = elt;
5175 && (CONSTANT_P (src_folded)
5176 /* Consider (minus (label_ref L1) (label_ref L2)) as
5177 "constant" here so we will record it. This allows us
5178 to fold switch statements when an ADDR_DIFF_VEC is used. */
5179 || (GET_CODE (src_folded) == MINUS
5180 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5181 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5182 src_const = src_folded, src_const_elt = elt;
5183 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5184 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5186 /* If we don't know if the constant is in the table, get its
5187 hash code and look it up. */
5188 if (src_const && src_const_elt == 0)
5190 sets[i].src_const_hash = HASH (src_const, mode);
5191 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5194 sets[i].src_const = src_const;
5195 sets[i].src_const_elt = src_const_elt;
5197 /* If the constant and our source are both in the table, mark them as
5198 equivalent. Otherwise, if a constant is in the table but the source
5199 isn't, set ELT to it. */
5200 if (src_const_elt && elt
5201 && src_const_elt->first_same_value != elt->first_same_value)
5202 merge_equiv_classes (elt, src_const_elt);
5203 else if (src_const_elt && elt == 0)
5204 elt = src_const_elt;
5206 /* See if there is a register linearly related to a constant
5207 equivalent of SRC. */
5209 && (GET_CODE (src_const) == CONST
5210 || (src_const_elt && src_const_elt->related_value != 0)))
5212 src_related = use_related_value (src_const, src_const_elt);
5215 struct table_elt *src_related_elt
5216 = lookup (src_related, HASH (src_related, mode), mode);
5217 if (src_related_elt && elt)
5219 if (elt->first_same_value
5220 != src_related_elt->first_same_value)
5221 /* This can occur when we previously saw a CONST
5222 involving a SYMBOL_REF and then see the SYMBOL_REF
5223 twice. Merge the involved classes. */
5224 merge_equiv_classes (elt, src_related_elt);
5227 src_related_elt = 0;
5229 else if (src_related_elt && elt == 0)
5230 elt = src_related_elt;
5234 /* See if we have a CONST_INT that is already in a register in a
5237 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5238 && GET_MODE_CLASS (mode) == MODE_INT
5239 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5241 enum machine_mode wider_mode;
5243 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5244 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5245 && src_related == 0;
5246 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5248 struct table_elt *const_elt
5249 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5254 for (const_elt = const_elt->first_same_value;
5255 const_elt; const_elt = const_elt->next_same_value)
5256 if (GET_CODE (const_elt->exp) == REG)
5258 src_related = gen_lowpart_if_possible (mode,
5265 /* Another possibility is that we have an AND with a constant in
5266 a mode narrower than a word. If so, it might have been generated
5267 as part of an "if" which would narrow the AND. If we already
5268 have done the AND in a wider mode, we can use a SUBREG of that
5271 if (flag_expensive_optimizations && ! src_related
5272 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5273 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5275 enum machine_mode tmode;
5276 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5278 for (tmode = GET_MODE_WIDER_MODE (mode);
5279 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5280 tmode = GET_MODE_WIDER_MODE (tmode))
5282 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5283 struct table_elt *larger_elt;
5287 PUT_MODE (new_and, tmode);
5288 XEXP (new_and, 0) = inner;
5289 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5290 if (larger_elt == 0)
5293 for (larger_elt = larger_elt->first_same_value;
5294 larger_elt; larger_elt = larger_elt->next_same_value)
5295 if (GET_CODE (larger_elt->exp) == REG)
5298 = gen_lowpart_if_possible (mode, larger_elt->exp);
5308 #ifdef LOAD_EXTEND_OP
5309 /* See if a MEM has already been loaded with a widening operation;
5310 if it has, we can use a subreg of that. Many CISC machines
5311 also have such operations, but this is only likely to be
5312 beneficial these machines. */
5314 if (flag_expensive_optimizations && src_related == 0
5315 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5316 && GET_MODE_CLASS (mode) == MODE_INT
5317 && GET_CODE (src) == MEM && ! do_not_record
5318 && LOAD_EXTEND_OP (mode) != NIL)
5320 enum machine_mode tmode;
5322 /* Set what we are trying to extend and the operation it might
5323 have been extended with. */
5324 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5325 XEXP (memory_extend_rtx, 0) = src;
5327 for (tmode = GET_MODE_WIDER_MODE (mode);
5328 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5329 tmode = GET_MODE_WIDER_MODE (tmode))
5331 struct table_elt *larger_elt;
5333 PUT_MODE (memory_extend_rtx, tmode);
5334 larger_elt = lookup (memory_extend_rtx,
5335 HASH (memory_extend_rtx, tmode), tmode);
5336 if (larger_elt == 0)
5339 for (larger_elt = larger_elt->first_same_value;
5340 larger_elt; larger_elt = larger_elt->next_same_value)
5341 if (GET_CODE (larger_elt->exp) == REG)
5343 src_related = gen_lowpart_if_possible (mode,
5352 #endif /* LOAD_EXTEND_OP */
5354 if (src == src_folded)
5357 /* At this point, ELT, if nonzero, points to a class of expressions
5358 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5359 and SRC_RELATED, if nonzero, each contain additional equivalent
5360 expressions. Prune these latter expressions by deleting expressions
5361 already in the equivalence class.
5363 Check for an equivalent identical to the destination. If found,
5364 this is the preferred equivalent since it will likely lead to
5365 elimination of the insn. Indicate this by placing it in
5369 elt = elt->first_same_value;
5370 for (p = elt; p; p = p->next_same_value)
5372 enum rtx_code code = GET_CODE (p->exp);
5374 /* If the expression is not valid, ignore it. Then we do not
5375 have to check for validity below. In most cases, we can use
5376 `rtx_equal_p', since canonicalization has already been done. */
5377 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5380 /* Also skip paradoxical subregs, unless that's what we're
5383 && (GET_MODE_SIZE (GET_MODE (p->exp))
5384 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5386 && GET_CODE (src) == SUBREG
5387 && GET_MODE (src) == GET_MODE (p->exp)
5388 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5389 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5392 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5394 else if (src_folded && GET_CODE (src_folded) == code
5395 && rtx_equal_p (src_folded, p->exp))
5397 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5398 && rtx_equal_p (src_eqv_here, p->exp))
5400 else if (src_related && GET_CODE (src_related) == code
5401 && rtx_equal_p (src_related, p->exp))
5404 /* This is the same as the destination of the insns, we want
5405 to prefer it. Copy it to src_related. The code below will
5406 then give it a negative cost. */
5407 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5411 /* Find the cheapest valid equivalent, trying all the available
5412 possibilities. Prefer items not in the hash table to ones
5413 that are when they are equal cost. Note that we can never
5414 worsen an insn as the current contents will also succeed.
5415 If we find an equivalent identical to the destination, use it as best,
5416 since this insn will probably be eliminated in that case. */
5419 if (rtx_equal_p (src, dest))
5420 src_cost = src_regcost = -1;
5423 src_cost = COST (src);
5424 src_regcost = approx_reg_cost (src);
5430 if (rtx_equal_p (src_eqv_here, dest))
5431 src_eqv_cost = src_eqv_regcost = -1;
5434 src_eqv_cost = COST (src_eqv_here);
5435 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5441 if (rtx_equal_p (src_folded, dest))
5442 src_folded_cost = src_folded_regcost = -1;
5445 src_folded_cost = COST (src_folded);
5446 src_folded_regcost = approx_reg_cost (src_folded);
5452 if (rtx_equal_p (src_related, dest))
5453 src_related_cost = src_related_regcost = -1;
5456 src_related_cost = COST (src_related);
5457 src_related_regcost = approx_reg_cost (src_related);
5461 /* If this was an indirect jump insn, a known label will really be
5462 cheaper even though it looks more expensive. */
5463 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5464 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5466 /* Terminate loop when replacement made. This must terminate since
5467 the current contents will be tested and will always be valid. */
5472 /* Skip invalid entries. */
5473 while (elt && GET_CODE (elt->exp) != REG
5474 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5475 elt = elt->next_same_value;
5477 /* A paradoxical subreg would be bad here: it'll be the right
5478 size, but later may be adjusted so that the upper bits aren't
5479 what we want. So reject it. */
5481 && GET_CODE (elt->exp) == SUBREG
5482 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5483 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5484 /* It is okay, though, if the rtx we're trying to match
5485 will ignore any of the bits we can't predict. */
5487 && GET_CODE (src) == SUBREG
5488 && GET_MODE (src) == GET_MODE (elt->exp)
5489 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5490 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5492 elt = elt->next_same_value;
5498 src_elt_cost = elt->cost;
5499 src_elt_regcost = elt->regcost;
5502 /* Find cheapest and skip it for the next time. For items
5503 of equal cost, use this order:
5504 src_folded, src, src_eqv, src_related and hash table entry. */
5506 && preferrable (src_folded_cost, src_folded_regcost,
5507 src_cost, src_regcost) <= 0
5508 && preferrable (src_folded_cost, src_folded_regcost,
5509 src_eqv_cost, src_eqv_regcost) <= 0
5510 && preferrable (src_folded_cost, src_folded_regcost,
5511 src_related_cost, src_related_regcost) <= 0
5512 && preferrable (src_folded_cost, src_folded_regcost,
5513 src_elt_cost, src_elt_regcost) <= 0)
5515 trial = src_folded, src_folded_cost = MAX_COST;
5516 if (src_folded_force_flag)
5517 trial = force_const_mem (mode, trial);
5520 && preferrable (src_cost, src_regcost,
5521 src_eqv_cost, src_eqv_regcost) <= 0
5522 && preferrable (src_cost, src_regcost,
5523 src_related_cost, src_related_regcost) <= 0
5524 && preferrable (src_cost, src_regcost,
5525 src_elt_cost, src_elt_regcost) <= 0)
5526 trial = src, src_cost = MAX_COST;
5527 else if (src_eqv_here
5528 && preferrable (src_eqv_cost, src_eqv_regcost,
5529 src_related_cost, src_related_regcost) <= 0
5530 && preferrable (src_eqv_cost, src_eqv_regcost,
5531 src_elt_cost, src_elt_regcost) <= 0)
5532 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5533 else if (src_related
5534 && preferrable (src_related_cost, src_related_regcost,
5535 src_elt_cost, src_elt_regcost) <= 0)
5536 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5539 trial = copy_rtx (elt->exp);
5540 elt = elt->next_same_value;
5541 src_elt_cost = MAX_COST;
5544 /* We don't normally have an insn matching (set (pc) (pc)), so
5545 check for this separately here. We will delete such an
5548 For other cases such as a table jump or conditional jump
5549 where we know the ultimate target, go ahead and replace the
5550 operand. While that may not make a valid insn, we will
5551 reemit the jump below (and also insert any necessary
5553 if (n_sets == 1 && dest == pc_rtx
5555 || (GET_CODE (trial) == LABEL_REF
5556 && ! condjump_p (insn))))
5558 SET_SRC (sets[i].rtl) = trial;
5559 cse_jumps_altered = 1;
5563 /* Look for a substitution that makes a valid insn. */
5564 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5566 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5568 /* If we just made a substitution inside a libcall, then we
5569 need to make the same substitution in any notes attached
5570 to the RETVAL insn. */
5572 && (GET_CODE (sets[i].orig_src) == REG
5573 || GET_CODE (sets[i].orig_src) == SUBREG
5574 || GET_CODE (sets[i].orig_src) == MEM))
5575 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5578 /* The result of apply_change_group can be ignored; see
5581 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5582 apply_change_group ();
5586 /* If we previously found constant pool entries for
5587 constants and this is a constant, try making a
5588 pool entry. Put it in src_folded unless we already have done
5589 this since that is where it likely came from. */
5591 else if (constant_pool_entries_cost
5592 && CONSTANT_P (trial)
5593 /* Reject cases that will abort in decode_rtx_const.
5594 On the alpha when simplifying a switch, we get
5595 (const (truncate (minus (label_ref) (label_ref)))). */
5596 && ! (GET_CODE (trial) == CONST
5597 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5598 /* Likewise on IA-64, except without the truncate. */
5599 && ! (GET_CODE (trial) == CONST
5600 && GET_CODE (XEXP (trial, 0)) == MINUS
5601 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5602 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5604 || (GET_CODE (src_folded) != MEM
5605 && ! src_folded_force_flag))
5606 && GET_MODE_CLASS (mode) != MODE_CC
5607 && mode != VOIDmode)
5609 src_folded_force_flag = 1;
5611 src_folded_cost = constant_pool_entries_cost;
5615 src = SET_SRC (sets[i].rtl);
5617 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5618 However, there is an important exception: If both are registers
5619 that are not the head of their equivalence class, replace SET_SRC
5620 with the head of the class. If we do not do this, we will have
5621 both registers live over a portion of the basic block. This way,
5622 their lifetimes will likely abut instead of overlapping. */
5623 if (GET_CODE (dest) == REG
5624 && REGNO_QTY_VALID_P (REGNO (dest)))
5626 int dest_q = REG_QTY (REGNO (dest));
5627 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5629 if (dest_ent->mode == GET_MODE (dest)
5630 && dest_ent->first_reg != REGNO (dest)
5631 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5632 /* Don't do this if the original insn had a hard reg as
5633 SET_SRC or SET_DEST. */
5634 && (GET_CODE (sets[i].src) != REG
5635 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5636 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5637 /* We can't call canon_reg here because it won't do anything if
5638 SRC is a hard register. */
5640 int src_q = REG_QTY (REGNO (src));
5641 struct qty_table_elem *src_ent = &qty_table[src_q];
5642 int first = src_ent->first_reg;
5644 = (first >= FIRST_PSEUDO_REGISTER
5645 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5647 /* We must use validate-change even for this, because this
5648 might be a special no-op instruction, suitable only to
5650 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5653 /* If we had a constant that is cheaper than what we are now
5654 setting SRC to, use that constant. We ignored it when we
5655 thought we could make this into a no-op. */
5656 if (src_const && COST (src_const) < COST (src)
5657 && validate_change (insn, &SET_SRC (sets[i].rtl),
5664 /* If we made a change, recompute SRC values. */
5665 if (src != sets[i].src)
5669 hash_arg_in_memory = 0;
5671 sets[i].src_hash = HASH (src, mode);
5672 sets[i].src_volatile = do_not_record;
5673 sets[i].src_in_memory = hash_arg_in_memory;
5674 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5677 /* If this is a single SET, we are setting a register, and we have an
5678 equivalent constant, we want to add a REG_NOTE. We don't want
5679 to write a REG_EQUAL note for a constant pseudo since verifying that
5680 that pseudo hasn't been eliminated is a pain. Such a note also
5681 won't help anything.
5683 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5684 which can be created for a reference to a compile time computable
5685 entry in a jump table. */
5687 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5688 && GET_CODE (src_const) != REG
5689 && ! (GET_CODE (src_const) == CONST
5690 && GET_CODE (XEXP (src_const, 0)) == MINUS
5691 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5692 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5694 /* Make sure that the rtx is not shared with any other insn. */
5695 src_const = copy_rtx (src_const);
5697 /* Record the actual constant value in a REG_EQUAL note, making
5698 a new one if one does not already exist. */
5699 set_unique_reg_note (insn, REG_EQUAL, src_const);
5701 /* If storing a constant value in a register that
5702 previously held the constant value 0,
5703 record this fact with a REG_WAS_0 note on this insn.
5705 Note that the *register* is required to have previously held 0,
5706 not just any register in the quantity and we must point to the
5707 insn that set that register to zero.
5709 Rather than track each register individually, we just see if
5710 the last set for this quantity was for this register. */
5712 if (REGNO_QTY_VALID_P (REGNO (dest)))
5714 int dest_q = REG_QTY (REGNO (dest));
5715 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5717 if (dest_ent->const_rtx == const0_rtx)
5719 /* See if we previously had a REG_WAS_0 note. */
5720 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5721 rtx const_insn = dest_ent->const_insn;
5723 if ((tem = single_set (const_insn)) != 0
5724 && rtx_equal_p (SET_DEST (tem), dest))
5727 XEXP (note, 0) = const_insn;
5730 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5737 /* Now deal with the destination. */
5740 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5741 to the MEM or REG within it. */
5742 while (GET_CODE (dest) == SIGN_EXTRACT
5743 || GET_CODE (dest) == ZERO_EXTRACT
5744 || GET_CODE (dest) == SUBREG
5745 || GET_CODE (dest) == STRICT_LOW_PART)
5746 dest = XEXP (dest, 0);
5748 sets[i].inner_dest = dest;
5750 if (GET_CODE (dest) == MEM)
5752 #ifdef PUSH_ROUNDING
5753 /* Stack pushes invalidate the stack pointer. */
5754 rtx addr = XEXP (dest, 0);
5755 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5756 && XEXP (addr, 0) == stack_pointer_rtx)
5757 invalidate (stack_pointer_rtx, Pmode);
5759 dest = fold_rtx (dest, insn);
5762 /* Compute the hash code of the destination now,
5763 before the effects of this instruction are recorded,
5764 since the register values used in the address computation
5765 are those before this instruction. */
5766 sets[i].dest_hash = HASH (dest, mode);
5768 /* Don't enter a bit-field in the hash table
5769 because the value in it after the store
5770 may not equal what was stored, due to truncation. */
5772 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5773 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5775 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5777 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5778 && GET_CODE (width) == CONST_INT
5779 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5780 && ! (INTVAL (src_const)
5781 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5782 /* Exception: if the value is constant,
5783 and it won't be truncated, record it. */
5787 /* This is chosen so that the destination will be invalidated
5788 but no new value will be recorded.
5789 We must invalidate because sometimes constant
5790 values can be recorded for bitfields. */
5791 sets[i].src_elt = 0;
5792 sets[i].src_volatile = 1;
5798 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5800 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5802 /* One less use of the label this insn used to jump to. */
5804 cse_jumps_altered = 1;
5805 /* No more processing for this set. */
5809 /* If this SET is now setting PC to a label, we know it used to
5810 be a conditional or computed branch. */
5811 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5813 /* Now emit a BARRIER after the unconditional jump. */
5814 if (NEXT_INSN (insn) == 0
5815 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5816 emit_barrier_after (insn);
5818 /* We reemit the jump in as many cases as possible just in
5819 case the form of an unconditional jump is significantly
5820 different than a computed jump or conditional jump.
5822 If this insn has multiple sets, then reemitting the
5823 jump is nontrivial. So instead we just force rerecognition
5824 and hope for the best. */
5827 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5829 JUMP_LABEL (new) = XEXP (src, 0);
5830 LABEL_NUSES (XEXP (src, 0))++;
5834 /* Now emit a BARRIER after the unconditional jump. */
5835 if (NEXT_INSN (insn) == 0
5836 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5837 emit_barrier_after (insn);
5840 INSN_CODE (insn) = -1;
5842 never_reached_warning (insn, NULL);
5844 /* Do not bother deleting any unreachable code,
5845 let jump/flow do that. */
5847 cse_jumps_altered = 1;
5851 /* If destination is volatile, invalidate it and then do no further
5852 processing for this assignment. */
5854 else if (do_not_record)
5856 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5857 invalidate (dest, VOIDmode);
5858 else if (GET_CODE (dest) == MEM)
5860 /* Outgoing arguments for a libcall don't
5861 affect any recorded expressions. */
5862 if (! libcall_insn || insn == libcall_insn)
5863 invalidate (dest, VOIDmode);
5865 else if (GET_CODE (dest) == STRICT_LOW_PART
5866 || GET_CODE (dest) == ZERO_EXTRACT)
5867 invalidate (XEXP (dest, 0), GET_MODE (dest));
5871 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5872 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5875 /* If setting CC0, record what it was set to, or a constant, if it
5876 is equivalent to a constant. If it is being set to a floating-point
5877 value, make a COMPARE with the appropriate constant of 0. If we
5878 don't do this, later code can interpret this as a test against
5879 const0_rtx, which can cause problems if we try to put it into an
5880 insn as a floating-point operand. */
5881 if (dest == cc0_rtx)
5883 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5884 this_insn_cc0_mode = mode;
5885 if (FLOAT_MODE_P (mode))
5886 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5892 /* Now enter all non-volatile source expressions in the hash table
5893 if they are not already present.
5894 Record their equivalence classes in src_elt.
5895 This way we can insert the corresponding destinations into
5896 the same classes even if the actual sources are no longer in them
5897 (having been invalidated). */
5899 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5900 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5902 struct table_elt *elt;
5903 struct table_elt *classp = sets[0].src_elt;
5904 rtx dest = SET_DEST (sets[0].rtl);
5905 enum machine_mode eqvmode = GET_MODE (dest);
5907 if (GET_CODE (dest) == STRICT_LOW_PART)
5909 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5912 if (insert_regs (src_eqv, classp, 0))
5914 rehash_using_reg (src_eqv);
5915 src_eqv_hash = HASH (src_eqv, eqvmode);
5917 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5918 elt->in_memory = src_eqv_in_memory;
5921 /* Check to see if src_eqv_elt is the same as a set source which
5922 does not yet have an elt, and if so set the elt of the set source
5924 for (i = 0; i < n_sets; i++)
5925 if (sets[i].rtl && sets[i].src_elt == 0
5926 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5927 sets[i].src_elt = src_eqv_elt;
5930 for (i = 0; i < n_sets; i++)
5931 if (sets[i].rtl && ! sets[i].src_volatile
5932 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5934 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5936 /* REG_EQUAL in setting a STRICT_LOW_PART
5937 gives an equivalent for the entire destination register,
5938 not just for the subreg being stored in now.
5939 This is a more interesting equivalence, so we arrange later
5940 to treat the entire reg as the destination. */
5941 sets[i].src_elt = src_eqv_elt;
5942 sets[i].src_hash = src_eqv_hash;
5946 /* Insert source and constant equivalent into hash table, if not
5948 struct table_elt *classp = src_eqv_elt;
5949 rtx src = sets[i].src;
5950 rtx dest = SET_DEST (sets[i].rtl);
5951 enum machine_mode mode
5952 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5954 if (sets[i].src_elt == 0)
5956 /* Don't put a hard register source into the table if this is
5957 the last insn of a libcall. In this case, we only need
5958 to put src_eqv_elt in src_elt. */
5959 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5961 struct table_elt *elt;
5963 /* Note that these insert_regs calls cannot remove
5964 any of the src_elt's, because they would have failed to
5965 match if not still valid. */
5966 if (insert_regs (src, classp, 0))
5968 rehash_using_reg (src);
5969 sets[i].src_hash = HASH (src, mode);
5971 elt = insert (src, classp, sets[i].src_hash, mode);
5972 elt->in_memory = sets[i].src_in_memory;
5973 sets[i].src_elt = classp = elt;
5976 sets[i].src_elt = classp;
5978 if (sets[i].src_const && sets[i].src_const_elt == 0
5979 && src != sets[i].src_const
5980 && ! rtx_equal_p (sets[i].src_const, src))
5981 sets[i].src_elt = insert (sets[i].src_const, classp,
5982 sets[i].src_const_hash, mode);
5985 else if (sets[i].src_elt == 0)
5986 /* If we did not insert the source into the hash table (e.g., it was
5987 volatile), note the equivalence class for the REG_EQUAL value, if any,
5988 so that the destination goes into that class. */
5989 sets[i].src_elt = src_eqv_elt;
5991 invalidate_from_clobbers (x);
5993 /* Some registers are invalidated by subroutine calls. Memory is
5994 invalidated by non-constant calls. */
5996 if (GET_CODE (insn) == CALL_INSN)
5998 if (! CONST_OR_PURE_CALL_P (insn))
5999 invalidate_memory ();
6000 invalidate_for_call ();
6003 /* Now invalidate everything set by this instruction.
6004 If a SUBREG or other funny destination is being set,
6005 sets[i].rtl is still nonzero, so here we invalidate the reg
6006 a part of which is being set. */
6008 for (i = 0; i < n_sets; i++)
6011 /* We can't use the inner dest, because the mode associated with
6012 a ZERO_EXTRACT is significant. */
6013 rtx dest = SET_DEST (sets[i].rtl);
6015 /* Needed for registers to remove the register from its
6016 previous quantity's chain.
6017 Needed for memory if this is a nonvarying address, unless
6018 we have just done an invalidate_memory that covers even those. */
6019 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6020 invalidate (dest, VOIDmode);
6021 else if (GET_CODE (dest) == MEM)
6023 /* Outgoing arguments for a libcall don't
6024 affect any recorded expressions. */
6025 if (! libcall_insn || insn == libcall_insn)
6026 invalidate (dest, VOIDmode);
6028 else if (GET_CODE (dest) == STRICT_LOW_PART
6029 || GET_CODE (dest) == ZERO_EXTRACT)
6030 invalidate (XEXP (dest, 0), GET_MODE (dest));
6033 /* A volatile ASM invalidates everything. */
6034 if (GET_CODE (insn) == INSN
6035 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
6036 && MEM_VOLATILE_P (PATTERN (insn)))
6037 flush_hash_table ();
6039 /* Make sure registers mentioned in destinations
6040 are safe for use in an expression to be inserted.
6041 This removes from the hash table
6042 any invalid entry that refers to one of these registers.
6044 We don't care about the return value from mention_regs because
6045 we are going to hash the SET_DEST values unconditionally. */
6047 for (i = 0; i < n_sets; i++)
6051 rtx x = SET_DEST (sets[i].rtl);
6053 if (GET_CODE (x) != REG)
6057 /* We used to rely on all references to a register becoming
6058 inaccessible when a register changes to a new quantity,
6059 since that changes the hash code. However, that is not
6060 safe, since after HASH_SIZE new quantities we get a
6061 hash 'collision' of a register with its own invalid
6062 entries. And since SUBREGs have been changed not to
6063 change their hash code with the hash code of the register,
6064 it wouldn't work any longer at all. So we have to check
6065 for any invalid references lying around now.
6066 This code is similar to the REG case in mention_regs,
6067 but it knows that reg_tick has been incremented, and
6068 it leaves reg_in_table as -1 . */
6069 unsigned int regno = REGNO (x);
6070 unsigned int endregno
6071 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
6072 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
6075 for (i = regno; i < endregno; i++)
6077 if (REG_IN_TABLE (i) >= 0)
6079 remove_invalid_refs (i);
6080 REG_IN_TABLE (i) = -1;
6087 /* We may have just removed some of the src_elt's from the hash table.
6088 So replace each one with the current head of the same class. */
6090 for (i = 0; i < n_sets; i++)
6093 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6094 /* If elt was removed, find current head of same class,
6095 or 0 if nothing remains of that class. */
6097 struct table_elt *elt = sets[i].src_elt;
6099 while (elt && elt->prev_same_value)
6100 elt = elt->prev_same_value;
6102 while (elt && elt->first_same_value == 0)
6103 elt = elt->next_same_value;
6104 sets[i].src_elt = elt ? elt->first_same_value : 0;
6108 /* Now insert the destinations into their equivalence classes. */
6110 for (i = 0; i < n_sets; i++)
6113 rtx dest = SET_DEST (sets[i].rtl);
6114 rtx inner_dest = sets[i].inner_dest;
6115 struct table_elt *elt;
6117 /* Don't record value if we are not supposed to risk allocating
6118 floating-point values in registers that might be wider than
6120 if ((flag_float_store
6121 && GET_CODE (dest) == MEM
6122 && FLOAT_MODE_P (GET_MODE (dest)))
6123 /* Don't record BLKmode values, because we don't know the
6124 size of it, and can't be sure that other BLKmode values
6125 have the same or smaller size. */
6126 || GET_MODE (dest) == BLKmode
6127 /* Don't record values of destinations set inside a libcall block
6128 since we might delete the libcall. Things should have been set
6129 up so we won't want to reuse such a value, but we play it safe
6132 /* If we didn't put a REG_EQUAL value or a source into the hash
6133 table, there is no point is recording DEST. */
6134 || sets[i].src_elt == 0
6135 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6136 or SIGN_EXTEND, don't record DEST since it can cause
6137 some tracking to be wrong.
6139 ??? Think about this more later. */
6140 || (GET_CODE (dest) == SUBREG
6141 && (GET_MODE_SIZE (GET_MODE (dest))
6142 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6143 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6144 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6147 /* STRICT_LOW_PART isn't part of the value BEING set,
6148 and neither is the SUBREG inside it.
6149 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6150 if (GET_CODE (dest) == STRICT_LOW_PART)
6151 dest = SUBREG_REG (XEXP (dest, 0));
6153 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6154 /* Registers must also be inserted into chains for quantities. */
6155 if (insert_regs (dest, sets[i].src_elt, 1))
6157 /* If `insert_regs' changes something, the hash code must be
6159 rehash_using_reg (dest);
6160 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6163 if (GET_CODE (inner_dest) == MEM
6164 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6165 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6166 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6167 Consider the case in which the address of the MEM is
6168 passed to a function, which alters the MEM. Then, if we
6169 later use Y instead of the MEM we'll miss the update. */
6170 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6172 elt = insert (dest, sets[i].src_elt,
6173 sets[i].dest_hash, GET_MODE (dest));
6175 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6176 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6177 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
6180 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6181 narrower than M2, and both M1 and M2 are the same number of words,
6182 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6183 make that equivalence as well.
6185 However, BAR may have equivalences for which gen_lowpart_if_possible
6186 will produce a simpler value than gen_lowpart_if_possible applied to
6187 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6188 BAR's equivalences. If we don't get a simplified form, make
6189 the SUBREG. It will not be used in an equivalence, but will
6190 cause two similar assignments to be detected.
6192 Note the loop below will find SUBREG_REG (DEST) since we have
6193 already entered SRC and DEST of the SET in the table. */
6195 if (GET_CODE (dest) == SUBREG
6196 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6198 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6199 && (GET_MODE_SIZE (GET_MODE (dest))
6200 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6201 && sets[i].src_elt != 0)
6203 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6204 struct table_elt *elt, *classp = 0;
6206 for (elt = sets[i].src_elt->first_same_value; elt;
6207 elt = elt->next_same_value)
6211 struct table_elt *src_elt;
6214 /* Ignore invalid entries. */
6215 if (GET_CODE (elt->exp) != REG
6216 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6219 /* We may have already been playing subreg games. If the
6220 mode is already correct for the destination, use it. */
6221 if (GET_MODE (elt->exp) == new_mode)
6225 /* Calculate big endian correction for the SUBREG_BYTE.
6226 We have already checked that M1 (GET_MODE (dest))
6227 is not narrower than M2 (new_mode). */
6228 if (BYTES_BIG_ENDIAN)
6229 byte = (GET_MODE_SIZE (GET_MODE (dest))
6230 - GET_MODE_SIZE (new_mode));
6232 new_src = simplify_gen_subreg (new_mode, elt->exp,
6233 GET_MODE (dest), byte);
6236 /* The call to simplify_gen_subreg fails if the value
6237 is VOIDmode, yet we can't do any simplification, e.g.
6238 for EXPR_LISTs denoting function call results.
6239 It is invalid to construct a SUBREG with a VOIDmode
6240 SUBREG_REG, hence a zero new_src means we can't do
6241 this substitution. */
6245 src_hash = HASH (new_src, new_mode);
6246 src_elt = lookup (new_src, src_hash, new_mode);
6248 /* Put the new source in the hash table is if isn't
6252 if (insert_regs (new_src, classp, 0))
6254 rehash_using_reg (new_src);
6255 src_hash = HASH (new_src, new_mode);
6257 src_elt = insert (new_src, classp, src_hash, new_mode);
6258 src_elt->in_memory = elt->in_memory;
6260 else if (classp && classp != src_elt->first_same_value)
6261 /* Show that two things that we've seen before are
6262 actually the same. */
6263 merge_equiv_classes (src_elt, classp);
6265 classp = src_elt->first_same_value;
6266 /* Ignore invalid entries. */
6268 && GET_CODE (classp->exp) != REG
6269 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6270 classp = classp->next_same_value;
6275 /* Special handling for (set REG0 REG1) where REG0 is the
6276 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6277 be used in the sequel, so (if easily done) change this insn to
6278 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6279 that computed their value. Then REG1 will become a dead store
6280 and won't cloud the situation for later optimizations.
6282 Do not make this change if REG1 is a hard register, because it will
6283 then be used in the sequel and we may be changing a two-operand insn
6284 into a three-operand insn.
6286 Also do not do this if we are operating on a copy of INSN.
6288 Also don't do this if INSN ends a libcall; this would cause an unrelated
6289 register to be set in the middle of a libcall, and we then get bad code
6290 if the libcall is deleted. */
6292 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6293 && NEXT_INSN (PREV_INSN (insn)) == insn
6294 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6295 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6296 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6298 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6299 struct qty_table_elem *src_ent = &qty_table[src_q];
6301 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6302 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6305 /* Scan for the previous nonnote insn, but stop at a basic
6309 prev = PREV_INSN (prev);
6311 while (prev && GET_CODE (prev) == NOTE
6312 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6314 /* Do not swap the registers around if the previous instruction
6315 attaches a REG_EQUIV note to REG1.
6317 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6318 from the pseudo that originally shadowed an incoming argument
6319 to another register. Some uses of REG_EQUIV might rely on it
6320 being attached to REG1 rather than REG2.
6322 This section previously turned the REG_EQUIV into a REG_EQUAL
6323 note. We cannot do that because REG_EQUIV may provide an
6324 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6326 if (prev != 0 && GET_CODE (prev) == INSN
6327 && GET_CODE (PATTERN (prev)) == SET
6328 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6329 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6331 rtx dest = SET_DEST (sets[0].rtl);
6332 rtx src = SET_SRC (sets[0].rtl);
6335 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6336 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6337 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6338 apply_change_group ();
6340 /* If there was a REG_WAS_0 note on PREV, remove it. Move
6341 any REG_WAS_0 note on INSN to PREV. */
6342 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
6344 remove_note (prev, note);
6346 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6349 remove_note (insn, note);
6350 XEXP (note, 1) = REG_NOTES (prev);
6351 REG_NOTES (prev) = note;
6354 /* If INSN has a REG_EQUAL note, and this note mentions
6355 REG0, then we must delete it, because the value in
6356 REG0 has changed. If the note's value is REG1, we must
6357 also delete it because that is now this insn's dest. */
6358 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6360 && (reg_mentioned_p (dest, XEXP (note, 0))
6361 || rtx_equal_p (src, XEXP (note, 0))))
6362 remove_note (insn, note);
6367 /* If this is a conditional jump insn, record any known equivalences due to
6368 the condition being tested. */
6370 last_jump_equiv_class = 0;
6371 if (GET_CODE (insn) == JUMP_INSN
6372 && n_sets == 1 && GET_CODE (x) == SET
6373 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6374 record_jump_equiv (insn, 0);
6377 /* If the previous insn set CC0 and this insn no longer references CC0,
6378 delete the previous insn. Here we use the fact that nothing expects CC0
6379 to be valid over an insn, which is true until the final pass. */
6380 if (prev_insn && GET_CODE (prev_insn) == INSN
6381 && (tem = single_set (prev_insn)) != 0
6382 && SET_DEST (tem) == cc0_rtx
6383 && ! reg_mentioned_p (cc0_rtx, x))
6384 delete_insn (prev_insn);
6386 prev_insn_cc0 = this_insn_cc0;
6387 prev_insn_cc0_mode = this_insn_cc0_mode;
6392 /* Remove from the hash table all expressions that reference memory. */
6395 invalidate_memory ()
6398 struct table_elt *p, *next;
6400 for (i = 0; i < HASH_SIZE; i++)
6401 for (p = table[i]; p; p = next)
6403 next = p->next_same_hash;
6405 remove_from_table (p, i);
6409 /* If ADDR is an address that implicitly affects the stack pointer, return
6410 1 and update the register tables to show the effect. Else, return 0. */
6413 addr_affects_sp_p (addr)
6416 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6417 && GET_CODE (XEXP (addr, 0)) == REG
6418 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6420 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6422 REG_TICK (STACK_POINTER_REGNUM)++;
6423 /* Is it possible to use a subreg of SP? */
6424 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6427 /* This should be *very* rare. */
6428 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6429 invalidate (stack_pointer_rtx, VOIDmode);
6437 /* Perform invalidation on the basis of everything about an insn
6438 except for invalidating the actual places that are SET in it.
6439 This includes the places CLOBBERed, and anything that might
6440 alias with something that is SET or CLOBBERed.
6442 X is the pattern of the insn. */
6445 invalidate_from_clobbers (x)
6448 if (GET_CODE (x) == CLOBBER)
6450 rtx ref = XEXP (x, 0);
6453 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6454 || GET_CODE (ref) == MEM)
6455 invalidate (ref, VOIDmode);
6456 else if (GET_CODE (ref) == STRICT_LOW_PART
6457 || GET_CODE (ref) == ZERO_EXTRACT)
6458 invalidate (XEXP (ref, 0), GET_MODE (ref));
6461 else if (GET_CODE (x) == PARALLEL)
6464 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6466 rtx y = XVECEXP (x, 0, i);
6467 if (GET_CODE (y) == CLOBBER)
6469 rtx ref = XEXP (y, 0);
6470 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6471 || GET_CODE (ref) == MEM)
6472 invalidate (ref, VOIDmode);
6473 else if (GET_CODE (ref) == STRICT_LOW_PART
6474 || GET_CODE (ref) == ZERO_EXTRACT)
6475 invalidate (XEXP (ref, 0), GET_MODE (ref));
6481 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6482 and replace any registers in them with either an equivalent constant
6483 or the canonical form of the register. If we are inside an address,
6484 only do this if the address remains valid.
6486 OBJECT is 0 except when within a MEM in which case it is the MEM.
6488 Return the replacement for X. */
6491 cse_process_notes (x, object)
6495 enum rtx_code code = GET_CODE (x);
6496 const char *fmt = GET_RTX_FORMAT (code);
6513 validate_change (x, &XEXP (x, 0),
6514 cse_process_notes (XEXP (x, 0), x), 0);
6519 if (REG_NOTE_KIND (x) == REG_EQUAL)
6520 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6522 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6529 rtx new = cse_process_notes (XEXP (x, 0), object);
6530 /* We don't substitute VOIDmode constants into these rtx,
6531 since they would impede folding. */
6532 if (GET_MODE (new) != VOIDmode)
6533 validate_change (object, &XEXP (x, 0), new, 0);
6538 i = REG_QTY (REGNO (x));
6540 /* Return a constant or a constant register. */
6541 if (REGNO_QTY_VALID_P (REGNO (x)))
6543 struct qty_table_elem *ent = &qty_table[i];
6545 if (ent->const_rtx != NULL_RTX
6546 && (CONSTANT_P (ent->const_rtx)
6547 || GET_CODE (ent->const_rtx) == REG))
6549 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6555 /* Otherwise, canonicalize this register. */
6556 return canon_reg (x, NULL_RTX);
6562 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6564 validate_change (object, &XEXP (x, i),
6565 cse_process_notes (XEXP (x, i), object), 0);
6570 /* Find common subexpressions between the end test of a loop and the beginning
6571 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6573 Often we have a loop where an expression in the exit test is used
6574 in the body of the loop. For example "while (*p) *q++ = *p++;".
6575 Because of the way we duplicate the loop exit test in front of the loop,
6576 however, we don't detect that common subexpression. This will be caught
6577 when global cse is implemented, but this is a quite common case.
6579 This function handles the most common cases of these common expressions.
6580 It is called after we have processed the basic block ending with the
6581 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6582 jumps to a label used only once. */
6585 cse_around_loop (loop_start)
6590 struct table_elt *p;
6592 /* If the jump at the end of the loop doesn't go to the start, we don't
6594 for (insn = PREV_INSN (loop_start);
6595 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6596 insn = PREV_INSN (insn))
6600 || GET_CODE (insn) != NOTE
6601 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6604 /* If the last insn of the loop (the end test) was an NE comparison,
6605 we will interpret it as an EQ comparison, since we fell through
6606 the loop. Any equivalences resulting from that comparison are
6607 therefore not valid and must be invalidated. */
6608 if (last_jump_equiv_class)
6609 for (p = last_jump_equiv_class->first_same_value; p;
6610 p = p->next_same_value)
6612 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6613 || (GET_CODE (p->exp) == SUBREG
6614 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6615 invalidate (p->exp, VOIDmode);
6616 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6617 || GET_CODE (p->exp) == ZERO_EXTRACT)
6618 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6621 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6622 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6624 The only thing we do with SET_DEST is invalidate entries, so we
6625 can safely process each SET in order. It is slightly less efficient
6626 to do so, but we only want to handle the most common cases.
6628 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6629 These pseudos won't have valid entries in any of the tables indexed
6630 by register number, such as reg_qty. We avoid out-of-range array
6631 accesses by not processing any instructions created after cse started. */
6633 for (insn = NEXT_INSN (loop_start);
6634 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6635 && INSN_UID (insn) < max_insn_uid
6636 && ! (GET_CODE (insn) == NOTE
6637 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6638 insn = NEXT_INSN (insn))
6641 && (GET_CODE (PATTERN (insn)) == SET
6642 || GET_CODE (PATTERN (insn)) == CLOBBER))
6643 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6644 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6645 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6646 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6647 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6648 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6653 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6654 since they are done elsewhere. This function is called via note_stores. */
6657 invalidate_skipped_set (dest, set, data)
6660 void *data ATTRIBUTE_UNUSED;
6662 enum rtx_code code = GET_CODE (dest);
6665 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6666 /* There are times when an address can appear varying and be a PLUS
6667 during this scan when it would be a fixed address were we to know
6668 the proper equivalences. So invalidate all memory if there is
6669 a BLKmode or nonscalar memory reference or a reference to a
6670 variable address. */
6671 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6672 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6674 invalidate_memory ();
6678 if (GET_CODE (set) == CLOBBER
6685 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6686 invalidate (XEXP (dest, 0), GET_MODE (dest));
6687 else if (code == REG || code == SUBREG || code == MEM)
6688 invalidate (dest, VOIDmode);
6691 /* Invalidate all insns from START up to the end of the function or the
6692 next label. This called when we wish to CSE around a block that is
6693 conditionally executed. */
6696 invalidate_skipped_block (start)
6701 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6702 insn = NEXT_INSN (insn))
6704 if (! INSN_P (insn))
6707 if (GET_CODE (insn) == CALL_INSN)
6709 if (! CONST_OR_PURE_CALL_P (insn))
6710 invalidate_memory ();
6711 invalidate_for_call ();
6714 invalidate_from_clobbers (PATTERN (insn));
6715 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6719 /* If modifying X will modify the value in *DATA (which is really an
6720 `rtx *'), indicate that fact by setting the pointed to value to
6724 cse_check_loop_start (x, set, data)
6726 rtx set ATTRIBUTE_UNUSED;
6729 rtx *cse_check_loop_start_value = (rtx *) data;
6731 if (*cse_check_loop_start_value == NULL_RTX
6732 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6735 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6736 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6737 *cse_check_loop_start_value = NULL_RTX;
6740 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6741 a loop that starts with the label at LOOP_START.
6743 If X is a SET, we see if its SET_SRC is currently in our hash table.
6744 If so, we see if it has a value equal to some register used only in the
6745 loop exit code (as marked by jump.c).
6747 If those two conditions are true, we search backwards from the start of
6748 the loop to see if that same value was loaded into a register that still
6749 retains its value at the start of the loop.
6751 If so, we insert an insn after the load to copy the destination of that
6752 load into the equivalent register and (try to) replace our SET_SRC with that
6755 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6758 cse_set_around_loop (x, insn, loop_start)
6763 struct table_elt *src_elt;
6765 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6766 are setting PC or CC0 or whose SET_SRC is already a register. */
6767 if (GET_CODE (x) == SET
6768 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6769 && GET_CODE (SET_SRC (x)) != REG)
6771 src_elt = lookup (SET_SRC (x),
6772 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6773 GET_MODE (SET_DEST (x)));
6776 for (src_elt = src_elt->first_same_value; src_elt;
6777 src_elt = src_elt->next_same_value)
6778 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6779 && COST (src_elt->exp) < COST (SET_SRC (x)))
6783 /* Look for an insn in front of LOOP_START that sets
6784 something in the desired mode to SET_SRC (x) before we hit
6785 a label or CALL_INSN. */
6787 for (p = prev_nonnote_insn (loop_start);
6788 p && GET_CODE (p) != CALL_INSN
6789 && GET_CODE (p) != CODE_LABEL;
6790 p = prev_nonnote_insn (p))
6791 if ((set = single_set (p)) != 0
6792 && GET_CODE (SET_DEST (set)) == REG
6793 && GET_MODE (SET_DEST (set)) == src_elt->mode
6794 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6796 /* We now have to ensure that nothing between P
6797 and LOOP_START modified anything referenced in
6798 SET_SRC (x). We know that nothing within the loop
6799 can modify it, or we would have invalidated it in
6802 rtx cse_check_loop_start_value = SET_SRC (x);
6803 for (q = p; q != loop_start; q = NEXT_INSN (q))
6805 note_stores (PATTERN (q),
6806 cse_check_loop_start,
6807 &cse_check_loop_start_value);
6809 /* If nothing was changed and we can replace our
6810 SET_SRC, add an insn after P to copy its destination
6811 to what we will be replacing SET_SRC with. */
6812 if (cse_check_loop_start_value
6814 && !can_throw_internal (insn)
6815 && validate_change (insn, &SET_SRC (x),
6818 /* If this creates new pseudos, this is unsafe,
6819 because the regno of new pseudo is unsuitable
6820 to index into reg_qty when cse_insn processes
6821 the new insn. Therefore, if a new pseudo was
6822 created, discard this optimization. */
6823 int nregs = max_reg_num ();
6825 = gen_move_insn (src_elt->exp, SET_DEST (set));
6826 if (nregs != max_reg_num ())
6828 if (! validate_change (insn, &SET_SRC (x),
6833 emit_insn_after (move, p);
6840 /* Deal with the destination of X affecting the stack pointer. */
6841 addr_affects_sp_p (SET_DEST (x));
6843 /* See comment on similar code in cse_insn for explanation of these
6845 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6846 || GET_CODE (SET_DEST (x)) == MEM)
6847 invalidate (SET_DEST (x), VOIDmode);
6848 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6849 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6850 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6853 /* Find the end of INSN's basic block and return its range,
6854 the total number of SETs in all the insns of the block, the last insn of the
6855 block, and the branch path.
6857 The branch path indicates which branches should be followed. If a nonzero
6858 path size is specified, the block should be rescanned and a different set
6859 of branches will be taken. The branch path is only used if
6860 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6862 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6863 used to describe the block. It is filled in with the information about
6864 the current block. The incoming structure's branch path, if any, is used
6865 to construct the output branch path. */
6868 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6870 struct cse_basic_block_data *data;
6877 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6878 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6879 int path_size = data->path_size;
6883 /* Update the previous branch path, if any. If the last branch was
6884 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6885 shorten the path by one and look at the previous branch. We know that
6886 at least one branch must have been taken if PATH_SIZE is nonzero. */
6887 while (path_size > 0)
6889 if (data->path[path_size - 1].status != NOT_TAKEN)
6891 data->path[path_size - 1].status = NOT_TAKEN;
6898 /* If the first instruction is marked with QImode, that means we've
6899 already processed this block. Our caller will look at DATA->LAST
6900 to figure out where to go next. We want to return the next block
6901 in the instruction stream, not some branched-to block somewhere
6902 else. We accomplish this by pretending our called forbid us to
6903 follow jumps, or skip blocks. */
6904 if (GET_MODE (insn) == QImode)
6905 follow_jumps = skip_blocks = 0;
6907 /* Scan to end of this basic block. */
6908 while (p && GET_CODE (p) != CODE_LABEL)
6910 /* Don't cse out the end of a loop. This makes a difference
6911 only for the unusual loops that always execute at least once;
6912 all other loops have labels there so we will stop in any case.
6913 Cse'ing out the end of the loop is dangerous because it
6914 might cause an invariant expression inside the loop
6915 to be reused after the end of the loop. This would make it
6916 hard to move the expression out of the loop in loop.c,
6917 especially if it is one of several equivalent expressions
6918 and loop.c would like to eliminate it.
6920 If we are running after loop.c has finished, we can ignore
6921 the NOTE_INSN_LOOP_END. */
6923 if (! after_loop && GET_CODE (p) == NOTE
6924 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6927 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6928 the regs restored by the longjmp come from
6929 a later time than the setjmp. */
6930 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6931 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6934 /* A PARALLEL can have lots of SETs in it,
6935 especially if it is really an ASM_OPERANDS. */
6936 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6937 nsets += XVECLEN (PATTERN (p), 0);
6938 else if (GET_CODE (p) != NOTE)
6941 /* Ignore insns made by CSE; they cannot affect the boundaries of
6944 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6945 high_cuid = INSN_CUID (p);
6946 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6947 low_cuid = INSN_CUID (p);
6949 /* See if this insn is in our branch path. If it is and we are to
6951 if (path_entry < path_size && data->path[path_entry].branch == p)
6953 if (data->path[path_entry].status != NOT_TAKEN)
6956 /* Point to next entry in path, if any. */
6960 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6961 was specified, we haven't reached our maximum path length, there are
6962 insns following the target of the jump, this is the only use of the
6963 jump label, and the target label is preceded by a BARRIER.
6965 Alternatively, we can follow the jump if it branches around a
6966 block of code and there are no other branches into the block.
6967 In this case invalidate_skipped_block will be called to invalidate any
6968 registers set in the block when following the jump. */
6970 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6971 && GET_CODE (p) == JUMP_INSN
6972 && GET_CODE (PATTERN (p)) == SET
6973 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6974 && JUMP_LABEL (p) != 0
6975 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6976 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6978 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6979 if ((GET_CODE (q) != NOTE
6980 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6981 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6982 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6983 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6986 /* If we ran into a BARRIER, this code is an extension of the
6987 basic block when the branch is taken. */
6988 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6990 /* Don't allow ourself to keep walking around an
6991 always-executed loop. */
6992 if (next_real_insn (q) == next)
6998 /* Similarly, don't put a branch in our path more than once. */
6999 for (i = 0; i < path_entry; i++)
7000 if (data->path[i].branch == p)
7003 if (i != path_entry)
7006 data->path[path_entry].branch = p;
7007 data->path[path_entry++].status = TAKEN;
7009 /* This branch now ends our path. It was possible that we
7010 didn't see this branch the last time around (when the
7011 insn in front of the target was a JUMP_INSN that was
7012 turned into a no-op). */
7013 path_size = path_entry;
7016 /* Mark block so we won't scan it again later. */
7017 PUT_MODE (NEXT_INSN (p), QImode);
7019 /* Detect a branch around a block of code. */
7020 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
7024 if (next_real_insn (q) == next)
7030 for (i = 0; i < path_entry; i++)
7031 if (data->path[i].branch == p)
7034 if (i != path_entry)
7037 /* This is no_labels_between_p (p, q) with an added check for
7038 reaching the end of a function (in case Q precedes P). */
7039 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
7040 if (GET_CODE (tmp) == CODE_LABEL)
7045 data->path[path_entry].branch = p;
7046 data->path[path_entry++].status = AROUND;
7048 path_size = path_entry;
7051 /* Mark block so we won't scan it again later. */
7052 PUT_MODE (NEXT_INSN (p), QImode);
7059 data->low_cuid = low_cuid;
7060 data->high_cuid = high_cuid;
7061 data->nsets = nsets;
7064 /* If all jumps in the path are not taken, set our path length to zero
7065 so a rescan won't be done. */
7066 for (i = path_size - 1; i >= 0; i--)
7067 if (data->path[i].status != NOT_TAKEN)
7071 data->path_size = 0;
7073 data->path_size = path_size;
7075 /* End the current branch path. */
7076 data->path[path_size].branch = 0;
7079 /* Perform cse on the instructions of a function.
7080 F is the first instruction.
7081 NREGS is one plus the highest pseudo-reg number used in the instruction.
7083 AFTER_LOOP is 1 if this is the cse call done after loop optimization
7084 (only if -frerun-cse-after-loop).
7086 Returns 1 if jump_optimize should be redone due to simplifications
7087 in conditional jump instructions. */
7090 cse_main (f, nregs, after_loop, file)
7096 struct cse_basic_block_data val;
7100 cse_jumps_altered = 0;
7101 recorded_label_ref = 0;
7102 constant_pool_entries_cost = 0;
7106 init_alias_analysis ();
7110 max_insn_uid = get_max_uid ();
7112 reg_eqv_table = (struct reg_eqv_elem *)
7113 xmalloc (nregs * sizeof (struct reg_eqv_elem));
7115 #ifdef LOAD_EXTEND_OP
7117 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7118 and change the code and mode as appropriate. */
7119 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7122 /* Reset the counter indicating how many elements have been made
7124 n_elements_made = 0;
7126 /* Find the largest uid. */
7128 max_uid = get_max_uid ();
7129 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
7131 /* Compute the mapping from uids to cuids.
7132 CUIDs are numbers assigned to insns, like uids,
7133 except that cuids increase monotonically through the code.
7134 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7135 between two insns is not affected by -g. */
7137 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7139 if (GET_CODE (insn) != NOTE
7140 || NOTE_LINE_NUMBER (insn) < 0)
7141 INSN_CUID (insn) = ++i;
7143 /* Give a line number note the same cuid as preceding insn. */
7144 INSN_CUID (insn) = i;
7147 ggc_push_context ();
7149 /* Loop over basic blocks.
7150 Compute the maximum number of qty's needed for each basic block
7151 (which is 2 for each SET). */
7156 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7157 flag_cse_skip_blocks);
7159 /* If this basic block was already processed or has no sets, skip it. */
7160 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7162 PUT_MODE (insn, VOIDmode);
7163 insn = (val.last ? NEXT_INSN (val.last) : 0);
7168 cse_basic_block_start = val.low_cuid;
7169 cse_basic_block_end = val.high_cuid;
7170 max_qty = val.nsets * 2;
7173 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7174 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7177 /* Make MAX_QTY bigger to give us room to optimize
7178 past the end of this basic block, if that should prove useful. */
7184 /* If this basic block is being extended by following certain jumps,
7185 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7186 Otherwise, we start after this basic block. */
7187 if (val.path_size > 0)
7188 cse_basic_block (insn, val.last, val.path, 0);
7191 int old_cse_jumps_altered = cse_jumps_altered;
7194 /* When cse changes a conditional jump to an unconditional
7195 jump, we want to reprocess the block, since it will give
7196 us a new branch path to investigate. */
7197 cse_jumps_altered = 0;
7198 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7199 if (cse_jumps_altered == 0
7200 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7203 cse_jumps_altered |= old_cse_jumps_altered;
7216 if (max_elements_made < n_elements_made)
7217 max_elements_made = n_elements_made;
7220 end_alias_analysis ();
7222 free (reg_eqv_table);
7224 return cse_jumps_altered || recorded_label_ref;
7227 /* Process a single basic block. FROM and TO and the limits of the basic
7228 block. NEXT_BRANCH points to the branch path when following jumps or
7229 a null path when not following jumps.
7231 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7232 loop. This is true when we are being called for the last time on a
7233 block and this CSE pass is before loop.c. */
7236 cse_basic_block (from, to, next_branch, around_loop)
7238 struct branch_path *next_branch;
7243 rtx libcall_insn = NULL_RTX;
7246 /* This array is undefined before max_reg, so only allocate
7247 the space actually needed and adjust the start. */
7250 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
7251 * sizeof (struct qty_table_elem));
7252 qty_table -= max_reg;
7256 /* TO might be a label. If so, protect it from being deleted. */
7257 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7260 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7262 enum rtx_code code = GET_CODE (insn);
7264 /* If we have processed 1,000 insns, flush the hash table to
7265 avoid extreme quadratic behavior. We must not include NOTEs
7266 in the count since there may be more of them when generating
7267 debugging information. If we clear the table at different
7268 times, code generated with -g -O might be different than code
7269 generated with -O but not -g.
7271 ??? This is a real kludge and needs to be done some other way.
7273 if (code != NOTE && num_insns++ > 1000)
7275 flush_hash_table ();
7279 /* See if this is a branch that is part of the path. If so, and it is
7280 to be taken, do so. */
7281 if (next_branch->branch == insn)
7283 enum taken status = next_branch++->status;
7284 if (status != NOT_TAKEN)
7286 if (status == TAKEN)
7287 record_jump_equiv (insn, 1);
7289 invalidate_skipped_block (NEXT_INSN (insn));
7291 /* Set the last insn as the jump insn; it doesn't affect cc0.
7292 Then follow this branch. */
7297 insn = JUMP_LABEL (insn);
7302 if (GET_MODE (insn) == QImode)
7303 PUT_MODE (insn, VOIDmode);
7305 if (GET_RTX_CLASS (code) == 'i')
7309 /* Process notes first so we have all notes in canonical forms when
7310 looking for duplicate operations. */
7312 if (REG_NOTES (insn))
7313 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7315 /* Track when we are inside in LIBCALL block. Inside such a block,
7316 we do not want to record destinations. The last insn of a
7317 LIBCALL block is not considered to be part of the block, since
7318 its destination is the result of the block and hence should be
7321 if (REG_NOTES (insn) != 0)
7323 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7324 libcall_insn = XEXP (p, 0);
7325 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7329 cse_insn (insn, libcall_insn);
7331 /* If we haven't already found an insn where we added a LABEL_REF,
7333 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7334 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7336 recorded_label_ref = 1;
7339 /* If INSN is now an unconditional jump, skip to the end of our
7340 basic block by pretending that we just did the last insn in the
7341 basic block. If we are jumping to the end of our block, show
7342 that we can have one usage of TO. */
7344 if (any_uncondjump_p (insn))
7348 free (qty_table + max_reg);
7352 if (JUMP_LABEL (insn) == to)
7355 /* Maybe TO was deleted because the jump is unconditional.
7356 If so, there is nothing left in this basic block. */
7357 /* ??? Perhaps it would be smarter to set TO
7358 to whatever follows this insn,
7359 and pretend the basic block had always ended here. */
7360 if (INSN_DELETED_P (to))
7363 insn = PREV_INSN (to);
7366 /* See if it is ok to keep on going past the label
7367 which used to end our basic block. Remember that we incremented
7368 the count of that label, so we decrement it here. If we made
7369 a jump unconditional, TO_USAGE will be one; in that case, we don't
7370 want to count the use in that jump. */
7372 if (to != 0 && NEXT_INSN (insn) == to
7373 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7375 struct cse_basic_block_data val;
7378 insn = NEXT_INSN (to);
7380 /* If TO was the last insn in the function, we are done. */
7383 free (qty_table + max_reg);
7387 /* If TO was preceded by a BARRIER we are done with this block
7388 because it has no continuation. */
7389 prev = prev_nonnote_insn (to);
7390 if (prev && GET_CODE (prev) == BARRIER)
7392 free (qty_table + max_reg);
7396 /* Find the end of the following block. Note that we won't be
7397 following branches in this case. */
7400 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7402 /* If the tables we allocated have enough space left
7403 to handle all the SETs in the next basic block,
7404 continue through it. Otherwise, return,
7405 and that block will be scanned individually. */
7406 if (val.nsets * 2 + next_qty > max_qty)
7409 cse_basic_block_start = val.low_cuid;
7410 cse_basic_block_end = val.high_cuid;
7413 /* Prevent TO from being deleted if it is a label. */
7414 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7417 /* Back up so we process the first insn in the extension. */
7418 insn = PREV_INSN (insn);
7422 if (next_qty > max_qty)
7425 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7426 the previous insn is the only insn that branches to the head of a loop,
7427 we can cse into the loop. Don't do this if we changed the jump
7428 structure of a loop unless we aren't going to be following jumps. */
7430 insn = prev_nonnote_insn (to);
7431 if ((cse_jumps_altered == 0
7432 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7433 && around_loop && to != 0
7434 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7435 && GET_CODE (insn) == JUMP_INSN
7436 && JUMP_LABEL (insn) != 0
7437 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7438 cse_around_loop (JUMP_LABEL (insn));
7440 free (qty_table + max_reg);
7442 return to ? NEXT_INSN (to) : 0;
7445 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7446 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7449 check_for_label_ref (rtl, data)
7453 rtx insn = (rtx) data;
7455 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7456 we must rerun jump since it needs to place the note. If this is a
7457 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7458 since no REG_LABEL will be added. */
7459 return (GET_CODE (*rtl) == LABEL_REF
7460 && ! LABEL_REF_NONLOCAL_P (*rtl)
7461 && LABEL_P (XEXP (*rtl, 0))
7462 && INSN_UID (XEXP (*rtl, 0)) != 0
7463 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7466 /* Count the number of times registers are used (not set) in X.
7467 COUNTS is an array in which we accumulate the count, INCR is how much
7468 we count each register usage.
7470 Don't count a usage of DEST, which is the SET_DEST of a SET which
7471 contains X in its SET_SRC. This is because such a SET does not
7472 modify the liveness of DEST. */
7475 count_reg_usage (x, counts, dest, incr)
7488 switch (code = GET_CODE (x))
7492 counts[REGNO (x)] += incr;
7506 /* If we are clobbering a MEM, mark any registers inside the address
7508 if (GET_CODE (XEXP (x, 0)) == MEM)
7509 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7513 /* Unless we are setting a REG, count everything in SET_DEST. */
7514 if (GET_CODE (SET_DEST (x)) != REG)
7515 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7517 /* If SRC has side-effects, then we can't delete this insn, so the
7518 usage of SET_DEST inside SRC counts.
7520 ??? Strictly-speaking, we might be preserving this insn
7521 because some other SET has side-effects, but that's hard
7522 to do and can't happen now. */
7523 count_reg_usage (SET_SRC (x), counts,
7524 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7529 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7534 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7536 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7539 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7544 if (REG_NOTE_KIND (x) == REG_EQUAL
7545 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7546 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7547 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7554 fmt = GET_RTX_FORMAT (code);
7555 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7558 count_reg_usage (XEXP (x, i), counts, dest, incr);
7559 else if (fmt[i] == 'E')
7560 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7561 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7565 /* Return true if set is live. */
7567 set_live_p (set, insn, counts)
7569 rtx insn ATTRIBUTE_UNUSED; /* Only used with HAVE_cc0. */
7576 if (set_noop_p (set))
7580 else if (GET_CODE (SET_DEST (set)) == CC0
7581 && !side_effects_p (SET_SRC (set))
7582 && ((tem = next_nonnote_insn (insn)) == 0
7584 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7587 else if (GET_CODE (SET_DEST (set)) != REG
7588 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7589 || counts[REGNO (SET_DEST (set))] != 0
7590 || side_effects_p (SET_SRC (set))
7591 /* An ADDRESSOF expression can turn into a use of the
7592 internal arg pointer, so always consider the
7593 internal arg pointer live. If it is truly dead,
7594 flow will delete the initializing insn. */
7595 || (SET_DEST (set) == current_function_internal_arg_pointer))
7600 /* Return true if insn is live. */
7603 insn_live_p (insn, counts)
7608 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7610 else if (GET_CODE (PATTERN (insn)) == SET)
7611 return set_live_p (PATTERN (insn), insn, counts);
7612 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7614 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7616 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7618 if (GET_CODE (elt) == SET)
7620 if (set_live_p (elt, insn, counts))
7623 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7632 /* Return true if libcall is dead as a whole. */
7635 dead_libcall_p (insn, counts)
7640 /* See if there's a REG_EQUAL note on this insn and try to
7641 replace the source with the REG_EQUAL expression.
7643 We assume that insns with REG_RETVALs can only be reg->reg
7644 copies at this point. */
7645 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7648 rtx set = single_set (insn);
7649 rtx new = simplify_rtx (XEXP (note, 0));
7652 new = XEXP (note, 0);
7654 /* While changing insn, we must update the counts accordingly. */
7655 count_reg_usage (insn, counts, NULL_RTX, -1);
7657 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7659 count_reg_usage (insn, counts, NULL_RTX, 1);
7660 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7661 remove_note (insn, note);
7664 count_reg_usage (insn, counts, NULL_RTX, 1);
7669 /* Scan all the insns and delete any that are dead; i.e., they store a register
7670 that is never used or they copy a register to itself.
7672 This is used to remove insns made obviously dead by cse, loop or other
7673 optimizations. It improves the heuristics in loop since it won't try to
7674 move dead invariants out of loops or make givs for dead quantities. The
7675 remaining passes of the compilation are also sped up. */
7678 delete_trivially_dead_insns (insns, nreg)
7684 int in_libcall = 0, dead_libcall = 0;
7685 int ndead = 0, nlastdead, niterations = 0;
7687 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7688 /* First count the number of times each register is used. */
7689 counts = (int *) xcalloc (nreg, sizeof (int));
7690 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7691 count_reg_usage (insn, counts, NULL_RTX, 1);
7697 /* Go from the last insn to the first and delete insns that only set unused
7698 registers or copy a register to itself. As we delete an insn, remove
7699 usage counts for registers it uses.
7701 The first jump optimization pass may leave a real insn as the last
7702 insn in the function. We must not skip that insn or we may end
7703 up deleting code that is not really dead. */
7704 insn = get_last_insn ();
7705 if (! INSN_P (insn))
7706 insn = prev_real_insn (insn);
7708 for (; insn; insn = prev)
7712 prev = prev_real_insn (insn);
7714 /* Don't delete any insns that are part of a libcall block unless
7715 we can delete the whole libcall block.
7717 Flow or loop might get confused if we did that. Remember
7718 that we are scanning backwards. */
7719 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7723 dead_libcall = dead_libcall_p (insn, counts);
7725 else if (in_libcall)
7726 live_insn = ! dead_libcall;
7728 live_insn = insn_live_p (insn, counts);
7730 /* If this is a dead insn, delete it and show registers in it aren't
7735 count_reg_usage (insn, counts, NULL_RTX, -1);
7736 delete_insn_and_edges (insn);
7740 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7747 while (ndead != nlastdead);
7749 if (rtl_dump_file && ndead)
7750 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7751 ndead, niterations);
7754 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);