1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
37 /* The basic idea of common subexpression elimination is to go
38 through the code, keeping a record of expressions that would
39 have the same value at the current scan point, and replacing
40 expressions encountered with the cheapest equivalent expression.
42 It is too complicated to keep track of the different possibilities
43 when control paths merge; so, at each label, we forget all that is
44 known and start fresh. This can be described as processing each
45 basic block separately. Note, however, that these are not quite
46 the same as the basic blocks found by a later pass and used for
47 data flow analysis and register packing. We do not need to start fresh
48 after a conditional jump instruction if there is no label there.
50 We use two data structures to record the equivalent expressions:
51 a hash table for most expressions, and several vectors together
52 with "quantity numbers" to record equivalent (pseudo) registers.
54 The use of the special data structure for registers is desirable
55 because it is faster. It is possible because registers references
56 contain a fairly small number, the register number, taken from
57 a contiguously allocated series, and two register references are
58 identical if they have the same number. General expressions
59 do not have any such thing, so the only way to retrieve the
60 information recorded on an expression other than a register
61 is to keep it in a hash table.
63 Registers and "quantity numbers":
65 At the start of each basic block, all of the (hardware and pseudo)
66 registers used in the function are given distinct quantity
67 numbers to indicate their contents. During scan, when the code
68 copies one register into another, we copy the quantity number.
69 When a register is loaded in any other way, we allocate a new
70 quantity number to describe the value generated by this operation.
71 `reg_qty' records what quantity a register is currently thought
74 All real quantity numbers are greater than or equal to `max_reg'.
75 If register N has not been assigned a quantity, reg_qty[N] will equal N.
77 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
78 variables should be referenced with an index below `max_reg'.
80 We also maintain a bidirectional chain of registers for each
81 quantity number. `qty_first_reg', `qty_last_reg',
82 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
84 The first register in a chain is the one whose lifespan is least local.
85 Among equals, it is the one that was seen first.
86 We replace any equivalent register with that one.
88 If two registers have the same quantity number, it must be true that
89 REG expressions with `qty_mode' must be in the hash table for both
90 registers and must be in the same class.
92 The converse is not true. Since hard registers may be referenced in
93 any mode, two REG expressions might be equivalent in the hash table
94 but not have the same quantity number if the quantity number of one
95 of the registers is not the same mode as those expressions.
97 Constants and quantity numbers
99 When a quantity has a known constant value, that value is stored
100 in the appropriate element of qty_const. This is in addition to
101 putting the constant in the hash table as is usual for non-regs.
103 Whether a reg or a constant is preferred is determined by the configuration
104 macro CONST_COSTS and will often depend on the constant value. In any
105 event, expressions containing constants can be simplified, by fold_rtx.
107 When a quantity has a known nearly constant value (such as an address
108 of a stack slot), that value is stored in the appropriate element
111 Integer constants don't have a machine mode. However, cse
112 determines the intended machine mode from the destination
113 of the instruction that moves the constant. The machine mode
114 is recorded in the hash table along with the actual RTL
115 constant expression so that different modes are kept separate.
119 To record known equivalences among expressions in general
120 we use a hash table called `table'. It has a fixed number of buckets
121 that contain chains of `struct table_elt' elements for expressions.
122 These chains connect the elements whose expressions have the same
125 Other chains through the same elements connect the elements which
126 currently have equivalent values.
128 Register references in an expression are canonicalized before hashing
129 the expression. This is done using `reg_qty' and `qty_first_reg'.
130 The hash code of a register reference is computed using the quantity
131 number, not the register number.
133 When the value of an expression changes, it is necessary to remove from the
134 hash table not just that expression but all expressions whose values
135 could be different as a result.
137 1. If the value changing is in memory, except in special cases
138 ANYTHING referring to memory could be changed. That is because
139 nobody knows where a pointer does not point.
140 The function `invalidate_memory' removes what is necessary.
142 The special cases are when the address is constant or is
143 a constant plus a fixed register such as the frame pointer
144 or a static chain pointer. When such addresses are stored in,
145 we can tell exactly which other such addresses must be invalidated
146 due to overlap. `invalidate' does this.
147 All expressions that refer to non-constant
148 memory addresses are also invalidated. `invalidate_memory' does this.
150 2. If the value changing is a register, all expressions
151 containing references to that register, and only those,
154 Because searching the entire hash table for expressions that contain
155 a register is very slow, we try to figure out when it isn't necessary.
156 Precisely, this is necessary only when expressions have been
157 entered in the hash table using this register, and then the value has
158 changed, and then another expression wants to be added to refer to
159 the register's new value. This sequence of circumstances is rare
160 within any one basic block.
162 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
163 reg_tick[i] is incremented whenever a value is stored in register i.
164 reg_in_table[i] holds -1 if no references to register i have been
165 entered in the table; otherwise, it contains the value reg_tick[i] had
166 when the references were entered. If we want to enter a reference
167 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
168 Until we want to enter a new entry, the mere fact that the two vectors
169 don't match makes the entries be ignored if anyone tries to match them.
171 Registers themselves are entered in the hash table as well as in
172 the equivalent-register chains. However, the vectors `reg_tick'
173 and `reg_in_table' do not apply to expressions which are simple
174 register references. These expressions are removed from the table
175 immediately when they become invalid, and this can be done even if
176 we do not immediately search for all the expressions that refer to
179 A CLOBBER rtx in an instruction invalidates its operand for further
180 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
181 invalidates everything that resides in memory.
185 Constant expressions that differ only by an additive integer
186 are called related. When a constant expression is put in
187 the table, the related expression with no constant term
188 is also entered. These are made to point at each other
189 so that it is possible to find out if there exists any
190 register equivalent to an expression related to a given expression. */
192 /* One plus largest register number used in this function. */
196 /* One plus largest instruction UID used in this function at time of
199 static int max_insn_uid;
201 /* Length of vectors indexed by quantity number.
202 We know in advance we will not need a quantity number this big. */
206 /* Next quantity number to be allocated.
207 This is 1 + the largest number needed so far. */
211 /* Indexed by quantity number, gives the first (or last) register
212 in the chain of registers that currently contain this quantity. */
214 static int *qty_first_reg;
215 static int *qty_last_reg;
217 /* Index by quantity number, gives the mode of the quantity. */
219 static enum machine_mode *qty_mode;
221 /* Indexed by quantity number, gives the rtx of the constant value of the
222 quantity, or zero if it does not have a known value.
223 A sum of the frame pointer (or arg pointer) plus a constant
224 can also be entered here. */
226 static rtx *qty_const;
228 /* Indexed by qty number, gives the insn that stored the constant value
229 recorded in `qty_const'. */
231 static rtx *qty_const_insn;
233 /* The next three variables are used to track when a comparison between a
234 quantity and some constant or register has been passed. In that case, we
235 know the results of the comparison in case we see it again. These variables
236 record a comparison that is known to be true. */
238 /* Indexed by qty number, gives the rtx code of a comparison with a known
239 result involving this quantity. If none, it is UNKNOWN. */
240 static enum rtx_code *qty_comparison_code;
242 /* Indexed by qty number, gives the constant being compared against in a
243 comparison of known result. If no such comparison, it is undefined.
244 If the comparison is not with a constant, it is zero. */
246 static rtx *qty_comparison_const;
248 /* Indexed by qty number, gives the quantity being compared against in a
249 comparison of known result. If no such comparison, if it undefined.
250 If the comparison is not with a register, it is -1. */
252 static int *qty_comparison_qty;
255 /* For machines that have a CC0, we do not record its value in the hash
256 table since its use is guaranteed to be the insn immediately following
257 its definition and any other insn is presumed to invalidate it.
259 Instead, we store below the value last assigned to CC0. If it should
260 happen to be a constant, it is stored in preference to the actual
261 assigned value. In case it is a constant, we store the mode in which
262 the constant should be interpreted. */
264 static rtx prev_insn_cc0;
265 static enum machine_mode prev_insn_cc0_mode;
268 /* Previous actual insn. 0 if at first insn of basic block. */
270 static rtx prev_insn;
272 /* Insn being scanned. */
274 static rtx this_insn;
276 /* Index by register number, gives the quantity number
277 of the register's current contents. */
281 /* Index by register number, gives the number of the next (or
282 previous) register in the chain of registers sharing the same
285 Or -1 if this register is at the end of the chain.
287 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
289 static int *reg_next_eqv;
290 static int *reg_prev_eqv;
292 /* Index by register number, gives the number of times
293 that register has been altered in the current basic block. */
295 static int *reg_tick;
297 /* Index by register number, gives the reg_tick value at which
298 rtx's containing this register are valid in the hash table.
299 If this does not equal the current reg_tick value, such expressions
300 existing in the hash table are invalid.
301 If this is -1, no expressions containing this register have been
302 entered in the table. */
304 static int *reg_in_table;
306 /* A HARD_REG_SET containing all the hard registers for which there is
307 currently a REG expression in the hash table. Note the difference
308 from the above variables, which indicate if the REG is mentioned in some
309 expression in the table. */
311 static HARD_REG_SET hard_regs_in_table;
313 /* A HARD_REG_SET containing all the hard registers that are invalidated
316 static HARD_REG_SET regs_invalidated_by_call;
318 /* Two vectors of ints:
319 one containing max_reg -1's; the other max_reg + 500 (an approximation
320 for max_qty) elements where element i contains i.
321 These are used to initialize various other vectors fast. */
323 static int *all_minus_one;
324 static int *consec_ints;
326 /* CUID of insn that starts the basic block currently being cse-processed. */
328 static int cse_basic_block_start;
330 /* CUID of insn that ends the basic block currently being cse-processed. */
332 static int cse_basic_block_end;
334 /* Vector mapping INSN_UIDs to cuids.
335 The cuids are like uids but increase monotonically always.
336 We use them to see whether a reg is used outside a given basic block. */
338 static int *uid_cuid;
340 /* Highest UID in UID_CUID. */
343 /* Get the cuid of an insn. */
345 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
347 /* Nonzero if cse has altered conditional jump insns
348 in such a way that jump optimization should be redone. */
350 static int cse_jumps_altered;
352 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
353 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
354 to put in the note. */
355 static int recorded_label_ref;
357 /* canon_hash stores 1 in do_not_record
358 if it notices a reference to CC0, PC, or some other volatile
361 static int do_not_record;
363 #ifdef LOAD_EXTEND_OP
365 /* Scratch rtl used when looking for load-extended copy of a MEM. */
366 static rtx memory_extend_rtx;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* canon_hash stores 1 in hash_arg_in_struct
375 if it notices a reference to memory that's part of a structure. */
377 static int hash_arg_in_struct;
379 /* The hash table contains buckets which are chains of `struct table_elt's,
380 each recording one expression's information.
381 That expression is in the `exp' field.
383 Those elements with the same hash code are chained in both directions
384 through the `next_same_hash' and `prev_same_hash' fields.
386 Each set of expressions with equivalent values
387 are on a two-way chain through the `next_same_value'
388 and `prev_same_value' fields, and all point with
389 the `first_same_value' field at the first element in
390 that chain. The chain is in order of increasing cost.
391 Each element's cost value is in its `cost' field.
393 The `in_memory' field is nonzero for elements that
394 involve any reference to memory. These elements are removed
395 whenever a write is done to an unidentified location in memory.
396 To be safe, we assume that a memory address is unidentified unless
397 the address is either a symbol constant or a constant plus
398 the frame pointer or argument pointer.
400 The `in_struct' field is nonzero for elements that
401 involve any reference to memory inside a structure or array.
403 The `related_value' field is used to connect related expressions
404 (that differ by adding an integer).
405 The related expressions are chained in a circular fashion.
406 `related_value' is zero for expressions for which this
409 The `cost' field stores the cost of this element's expression.
411 The `is_const' flag is set if the element is a constant (including
414 The `flag' field is used as a temporary during some search routines.
416 The `mode' field is usually the same as GET_MODE (`exp'), but
417 if `exp' is a CONST_INT and has no machine mode then the `mode'
418 field is the mode it was being used as. Each constant is
419 recorded separately for each mode it is used with. */
425 struct table_elt *next_same_hash;
426 struct table_elt *prev_same_hash;
427 struct table_elt *next_same_value;
428 struct table_elt *prev_same_value;
429 struct table_elt *first_same_value;
430 struct table_elt *related_value;
432 enum machine_mode mode;
439 /* We don't want a lot of buckets, because we rarely have very many
440 things stored in the hash table, and a lot of buckets slows
441 down a lot of loops that happen frequently. */
444 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
445 register (hard registers may require `do_not_record' to be set). */
448 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
449 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
450 : canon_hash (X, M) % NBUCKETS)
452 /* Determine whether register number N is considered a fixed register for CSE.
453 It is desirable to replace other regs with fixed regs, to reduce need for
455 A reg wins if it is either the frame pointer or designated as fixed,
456 but not if it is an overlapping register. */
457 #ifdef OVERLAPPING_REGNO_P
458 #define FIXED_REGNO_P(N) \
459 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
460 || fixed_regs[N] || global_regs[N]) \
461 && ! OVERLAPPING_REGNO_P ((N)))
463 #define FIXED_REGNO_P(N) \
464 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
465 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
475 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
476 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
477 || ((N) < FIRST_PSEUDO_REGISTER \
478 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
480 /* A register is cheap if it is a user variable assigned to the register
481 or if its register number always corresponds to a cheap register. */
483 #define CHEAP_REG(N) \
484 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
485 || CHEAP_REGNO (REGNO (N)))
488 (GET_CODE (X) == REG \
489 ? (CHEAP_REG (X) ? 0 \
490 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
494 /* Determine if the quantity number for register X represents a valid index
495 into the `qty_...' variables. */
497 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
499 static struct table_elt *table[NBUCKETS];
501 /* Chain of `struct table_elt's made so far for this function
502 but currently removed from the table. */
504 static struct table_elt *free_element_chain;
506 /* Number of `struct table_elt' structures made so far for this function. */
508 static int n_elements_made;
510 /* Maximum value `n_elements_made' has had so far in this compilation
511 for functions previously processed. */
513 static int max_elements_made;
515 /* Surviving equivalence class when two equivalence classes are merged
516 by recording the effects of a jump in the last insn. Zero if the
517 last insn was not a conditional jump. */
519 static struct table_elt *last_jump_equiv_class;
521 /* Set to the cost of a constant pool reference if one was found for a
522 symbolic constant. If this was found, it means we should try to
523 convert constants into constant pool entries if they don't fit in
526 static int constant_pool_entries_cost;
528 /* Define maximum length of a branch path. */
530 #define PATHLENGTH 10
532 /* This data describes a block that will be processed by cse_basic_block. */
534 struct cse_basic_block_data {
535 /* Lowest CUID value of insns in block. */
537 /* Highest CUID value of insns in block. */
539 /* Total number of SETs in block. */
541 /* Last insn in the block. */
543 /* Size of current branch path, if any. */
545 /* Current branch path, indicating which branches will be taken. */
547 /* The branch insn. */
549 /* Whether it should be taken or not. AROUND is the same as taken
550 except that it is used when the destination label is not preceded
552 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
556 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
557 virtual regs here because the simplify_*_operation routines are called
558 by integrate.c, which is called before virtual register instantiation. */
560 #define FIXED_BASE_PLUS_P(X) \
561 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
562 || (X) == arg_pointer_rtx \
563 || (X) == virtual_stack_vars_rtx \
564 || (X) == virtual_incoming_args_rtx \
565 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
566 && (XEXP (X, 0) == frame_pointer_rtx \
567 || XEXP (X, 0) == hard_frame_pointer_rtx \
568 || XEXP (X, 0) == arg_pointer_rtx \
569 || XEXP (X, 0) == virtual_stack_vars_rtx \
570 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
571 || GET_CODE (X) == ADDRESSOF)
573 /* Similar, but also allows reference to the stack pointer.
575 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
576 arg_pointer_rtx by itself is nonzero, because on at least one machine,
577 the i960, the arg pointer is zero when it is unused. */
579 #define NONZERO_BASE_PLUS_P(X) \
580 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
581 || (X) == virtual_stack_vars_rtx \
582 || (X) == virtual_incoming_args_rtx \
583 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
584 && (XEXP (X, 0) == frame_pointer_rtx \
585 || XEXP (X, 0) == hard_frame_pointer_rtx \
586 || XEXP (X, 0) == arg_pointer_rtx \
587 || XEXP (X, 0) == virtual_stack_vars_rtx \
588 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
589 || (X) == stack_pointer_rtx \
590 || (X) == virtual_stack_dynamic_rtx \
591 || (X) == virtual_outgoing_args_rtx \
592 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
593 && (XEXP (X, 0) == stack_pointer_rtx \
594 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
595 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
596 || GET_CODE (X) == ADDRESSOF)
598 static int notreg_cost PROTO((rtx));
599 static void new_basic_block PROTO((void));
600 static void make_new_qty PROTO((int));
601 static void make_regs_eqv PROTO((int, int));
602 static void delete_reg_equiv PROTO((int));
603 static int mention_regs PROTO((rtx));
604 static int insert_regs PROTO((rtx, struct table_elt *, int));
605 static void free_element PROTO((struct table_elt *));
606 static void remove_from_table PROTO((struct table_elt *, unsigned));
607 static struct table_elt *get_element PROTO((void));
608 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
609 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
610 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
611 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
613 static void merge_equiv_classes PROTO((struct table_elt *,
614 struct table_elt *));
615 static void invalidate PROTO((rtx, enum machine_mode));
616 static int cse_rtx_varies_p PROTO((rtx));
617 static void remove_invalid_refs PROTO((int));
618 static void rehash_using_reg PROTO((rtx));
619 static void invalidate_memory PROTO((void));
620 static void invalidate_for_call PROTO((void));
621 static rtx use_related_value PROTO((rtx, struct table_elt *));
622 static unsigned canon_hash PROTO((rtx, enum machine_mode));
623 static unsigned safe_hash PROTO((rtx, enum machine_mode));
624 static int exp_equiv_p PROTO((rtx, rtx, int, int));
625 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
628 static int refers_to_p PROTO((rtx, rtx));
629 static rtx canon_reg PROTO((rtx, rtx));
630 static void find_best_addr PROTO((rtx, rtx *));
631 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
633 enum machine_mode *));
634 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
636 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
638 static rtx fold_rtx PROTO((rtx, rtx));
639 static rtx equiv_constant PROTO((rtx));
640 static void record_jump_equiv PROTO((rtx, int));
641 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
643 static void cse_insn PROTO((rtx, int));
644 static int note_mem_written PROTO((rtx));
645 static void invalidate_from_clobbers PROTO((rtx));
646 static rtx cse_process_notes PROTO((rtx, rtx));
647 static void cse_around_loop PROTO((rtx));
648 static void invalidate_skipped_set PROTO((rtx, rtx));
649 static void invalidate_skipped_block PROTO((rtx));
650 static void cse_check_loop_start PROTO((rtx, rtx));
651 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
652 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
653 static void count_reg_usage PROTO((rtx, int *, rtx, int));
655 extern int rtx_equal_function_value_matters;
657 /* Return an estimate of the cost of computing rtx X.
658 One use is in cse, to decide which expression to keep in the hash table.
659 Another is in rtl generation, to pick the cheapest way to multiply.
660 Other uses like the latter are expected in the future. */
662 /* Internal function, to compute cost when X is not a register; called
663 from COST macro to keep it simple. */
669 return ((GET_CODE (x) == SUBREG
670 && GET_CODE (SUBREG_REG (x)) == REG
671 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
672 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
673 && (GET_MODE_SIZE (GET_MODE (x))
674 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
675 && subreg_lowpart_p (x)
676 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
677 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
678 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
679 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
681 : rtx_cost (x, SET) * 2);
684 /* Return the right cost to give to an operation
685 to make the cost of the corresponding register-to-register instruction
686 N times that of a fast register-to-register instruction. */
688 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
691 rtx_cost (x, outer_code)
693 enum rtx_code outer_code;
696 register enum rtx_code code;
703 /* Compute the default costs of certain things.
704 Note that RTX_COSTS can override the defaults. */
710 /* Count multiplication by 2**n as a shift,
711 because if we are considering it, we would output it as a shift. */
712 if (GET_CODE (XEXP (x, 1)) == CONST_INT
713 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
716 total = COSTS_N_INSNS (5);
722 total = COSTS_N_INSNS (7);
725 /* Used in loop.c and combine.c as a marker. */
729 /* We don't want these to be used in substitutions because
730 we have no way of validating the resulting insn. So assign
731 anything containing an ASM_OPERANDS a very high cost. */
741 return ! CHEAP_REG (x);
744 /* If we can't tie these modes, make this expensive. The larger
745 the mode, the more expensive it is. */
746 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
747 return COSTS_N_INSNS (2
748 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
751 RTX_COSTS (x, code, outer_code);
754 CONST_COSTS (x, code, outer_code);
758 #ifdef DEFAULT_RTX_COSTS
759 DEFAULT_RTX_COSTS(x, code, outer_code);
764 /* Sum the costs of the sub-rtx's, plus cost of this operation,
765 which is already in total. */
767 fmt = GET_RTX_FORMAT (code);
768 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
770 total += rtx_cost (XEXP (x, i), code);
771 else if (fmt[i] == 'E')
772 for (j = 0; j < XVECLEN (x, i); j++)
773 total += rtx_cost (XVECEXP (x, i, j), code);
778 /* Clear the hash table and initialize each register with its own quantity,
779 for a new basic block. */
788 bzero ((char *) reg_tick, max_reg * sizeof (int));
790 bcopy ((char *) all_minus_one, (char *) reg_in_table,
791 max_reg * sizeof (int));
792 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
793 CLEAR_HARD_REG_SET (hard_regs_in_table);
795 /* The per-quantity values used to be initialized here, but it is
796 much faster to initialize each as it is made in `make_new_qty'. */
798 for (i = 0; i < NBUCKETS; i++)
800 register struct table_elt *this, *next;
801 for (this = table[i]; this; this = next)
803 next = this->next_same_hash;
808 bzero ((char *) table, sizeof table);
817 /* Say that register REG contains a quantity not in any register before
818 and initialize that quantity. */
826 if (next_qty >= max_qty)
829 q = reg_qty[reg] = next_qty++;
830 qty_first_reg[q] = reg;
831 qty_last_reg[q] = reg;
832 qty_const[q] = qty_const_insn[q] = 0;
833 qty_comparison_code[q] = UNKNOWN;
835 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
838 /* Make reg NEW equivalent to reg OLD.
839 OLD is not changing; NEW is. */
842 make_regs_eqv (new, old)
843 register int new, old;
845 register int lastr, firstr;
846 register int q = reg_qty[old];
848 /* Nothing should become eqv until it has a "non-invalid" qty number. */
849 if (! REGNO_QTY_VALID_P (old))
853 firstr = qty_first_reg[q];
854 lastr = qty_last_reg[q];
856 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
857 hard regs. Among pseudos, if NEW will live longer than any other reg
858 of the same qty, and that is beyond the current basic block,
859 make it the new canonical replacement for this qty. */
860 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
861 /* Certain fixed registers might be of the class NO_REGS. This means
862 that not only can they not be allocated by the compiler, but
863 they cannot be used in substitutions or canonicalizations
865 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
866 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
867 || (new >= FIRST_PSEUDO_REGISTER
868 && (firstr < FIRST_PSEUDO_REGISTER
869 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
870 || (uid_cuid[REGNO_FIRST_UID (new)]
871 < cse_basic_block_start))
872 && (uid_cuid[REGNO_LAST_UID (new)]
873 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
875 reg_prev_eqv[firstr] = new;
876 reg_next_eqv[new] = firstr;
877 reg_prev_eqv[new] = -1;
878 qty_first_reg[q] = new;
882 /* If NEW is a hard reg (known to be non-fixed), insert at end.
883 Otherwise, insert before any non-fixed hard regs that are at the
884 end. Registers of class NO_REGS cannot be used as an
885 equivalent for anything. */
886 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
887 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
888 && new >= FIRST_PSEUDO_REGISTER)
889 lastr = reg_prev_eqv[lastr];
890 reg_next_eqv[new] = reg_next_eqv[lastr];
891 if (reg_next_eqv[lastr] >= 0)
892 reg_prev_eqv[reg_next_eqv[lastr]] = new;
894 qty_last_reg[q] = new;
895 reg_next_eqv[lastr] = new;
896 reg_prev_eqv[new] = lastr;
900 /* Remove REG from its equivalence class. */
903 delete_reg_equiv (reg)
906 register int q = reg_qty[reg];
909 /* If invalid, do nothing. */
913 p = reg_prev_eqv[reg];
914 n = reg_next_eqv[reg];
923 qty_first_reg[q] = n;
928 /* Remove any invalid expressions from the hash table
929 that refer to any of the registers contained in expression X.
931 Make sure that newly inserted references to those registers
932 as subexpressions will be considered valid.
934 mention_regs is not called when a register itself
935 is being stored in the table.
937 Return 1 if we have done something that may have changed the hash code
944 register enum rtx_code code;
947 register int changed = 0;
955 register int regno = REGNO (x);
956 register int endregno
957 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
958 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
961 for (i = regno; i < endregno; i++)
963 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
964 remove_invalid_refs (i);
966 reg_in_table[i] = reg_tick[i];
972 /* If X is a comparison or a COMPARE and either operand is a register
973 that does not have a quantity, give it one. This is so that a later
974 call to record_jump_equiv won't cause X to be assigned a different
975 hash code and not found in the table after that call.
977 It is not necessary to do this here, since rehash_using_reg can
978 fix up the table later, but doing this here eliminates the need to
979 call that expensive function in the most common case where the only
980 use of the register is in the comparison. */
982 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
984 if (GET_CODE (XEXP (x, 0)) == REG
985 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
986 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
988 rehash_using_reg (XEXP (x, 0));
992 if (GET_CODE (XEXP (x, 1)) == REG
993 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
994 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
996 rehash_using_reg (XEXP (x, 1));
1001 fmt = GET_RTX_FORMAT (code);
1002 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1004 changed |= mention_regs (XEXP (x, i));
1005 else if (fmt[i] == 'E')
1006 for (j = 0; j < XVECLEN (x, i); j++)
1007 changed |= mention_regs (XVECEXP (x, i, j));
1012 /* Update the register quantities for inserting X into the hash table
1013 with a value equivalent to CLASSP.
1014 (If the class does not contain a REG, it is irrelevant.)
1015 If MODIFIED is nonzero, X is a destination; it is being modified.
1016 Note that delete_reg_equiv should be called on a register
1017 before insert_regs is done on that register with MODIFIED != 0.
1019 Nonzero value means that elements of reg_qty have changed
1020 so X's hash code may be different. */
1023 insert_regs (x, classp, modified)
1025 struct table_elt *classp;
1028 if (GET_CODE (x) == REG)
1030 register int regno = REGNO (x);
1032 /* If REGNO is in the equivalence table already but is of the
1033 wrong mode for that equivalence, don't do anything here. */
1035 if (REGNO_QTY_VALID_P (regno)
1036 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1039 if (modified || ! REGNO_QTY_VALID_P (regno))
1042 for (classp = classp->first_same_value;
1044 classp = classp->next_same_value)
1045 if (GET_CODE (classp->exp) == REG
1046 && GET_MODE (classp->exp) == GET_MODE (x))
1048 make_regs_eqv (regno, REGNO (classp->exp));
1052 make_new_qty (regno);
1053 qty_mode[reg_qty[regno]] = GET_MODE (x);
1060 /* If X is a SUBREG, we will likely be inserting the inner register in the
1061 table. If that register doesn't have an assigned quantity number at
1062 this point but does later, the insertion that we will be doing now will
1063 not be accessible because its hash code will have changed. So assign
1064 a quantity number now. */
1066 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1067 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1069 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1070 mention_regs (SUBREG_REG (x));
1074 return mention_regs (x);
1077 /* Look in or update the hash table. */
1079 /* Put the element ELT on the list of free elements. */
1083 struct table_elt *elt;
1085 elt->next_same_hash = free_element_chain;
1086 free_element_chain = elt;
1089 /* Return an element that is free for use. */
1091 static struct table_elt *
1094 struct table_elt *elt = free_element_chain;
1097 free_element_chain = elt->next_same_hash;
1101 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1104 /* Remove table element ELT from use in the table.
1105 HASH is its hash code, made using the HASH macro.
1106 It's an argument because often that is known in advance
1107 and we save much time not recomputing it. */
1110 remove_from_table (elt, hash)
1111 register struct table_elt *elt;
1117 /* Mark this element as removed. See cse_insn. */
1118 elt->first_same_value = 0;
1120 /* Remove the table element from its equivalence class. */
1123 register struct table_elt *prev = elt->prev_same_value;
1124 register struct table_elt *next = elt->next_same_value;
1126 if (next) next->prev_same_value = prev;
1129 prev->next_same_value = next;
1132 register struct table_elt *newfirst = next;
1135 next->first_same_value = newfirst;
1136 next = next->next_same_value;
1141 /* Remove the table element from its hash bucket. */
1144 register struct table_elt *prev = elt->prev_same_hash;
1145 register struct table_elt *next = elt->next_same_hash;
1147 if (next) next->prev_same_hash = prev;
1150 prev->next_same_hash = next;
1151 else if (table[hash] == elt)
1155 /* This entry is not in the proper hash bucket. This can happen
1156 when two classes were merged by `merge_equiv_classes'. Search
1157 for the hash bucket that it heads. This happens only very
1158 rarely, so the cost is acceptable. */
1159 for (hash = 0; hash < NBUCKETS; hash++)
1160 if (table[hash] == elt)
1165 /* Remove the table element from its related-value circular chain. */
1167 if (elt->related_value != 0 && elt->related_value != elt)
1169 register struct table_elt *p = elt->related_value;
1170 while (p->related_value != elt)
1171 p = p->related_value;
1172 p->related_value = elt->related_value;
1173 if (p->related_value == p)
1174 p->related_value = 0;
1180 /* Look up X in the hash table and return its table element,
1181 or 0 if X is not in the table.
1183 MODE is the machine-mode of X, or if X is an integer constant
1184 with VOIDmode then MODE is the mode with which X will be used.
1186 Here we are satisfied to find an expression whose tree structure
1189 static struct table_elt *
1190 lookup (x, hash, mode)
1193 enum machine_mode mode;
1195 register struct table_elt *p;
1197 for (p = table[hash]; p; p = p->next_same_hash)
1198 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1199 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1205 /* Like `lookup' but don't care whether the table element uses invalid regs.
1206 Also ignore discrepancies in the machine mode of a register. */
1208 static struct table_elt *
1209 lookup_for_remove (x, hash, mode)
1212 enum machine_mode mode;
1214 register struct table_elt *p;
1216 if (GET_CODE (x) == REG)
1218 int regno = REGNO (x);
1219 /* Don't check the machine mode when comparing registers;
1220 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1221 for (p = table[hash]; p; p = p->next_same_hash)
1222 if (GET_CODE (p->exp) == REG
1223 && REGNO (p->exp) == regno)
1228 for (p = table[hash]; p; p = p->next_same_hash)
1229 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1236 /* Look for an expression equivalent to X and with code CODE.
1237 If one is found, return that expression. */
1240 lookup_as_function (x, code)
1244 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1249 for (p = p->first_same_value; p; p = p->next_same_value)
1251 if (GET_CODE (p->exp) == code
1252 /* Make sure this is a valid entry in the table. */
1253 && exp_equiv_p (p->exp, p->exp, 1, 0))
1260 /* Insert X in the hash table, assuming HASH is its hash code
1261 and CLASSP is an element of the class it should go in
1262 (or 0 if a new class should be made).
1263 It is inserted at the proper position to keep the class in
1264 the order cheapest first.
1266 MODE is the machine-mode of X, or if X is an integer constant
1267 with VOIDmode then MODE is the mode with which X will be used.
1269 For elements of equal cheapness, the most recent one
1270 goes in front, except that the first element in the list
1271 remains first unless a cheaper element is added. The order of
1272 pseudo-registers does not matter, as canon_reg will be called to
1273 find the cheapest when a register is retrieved from the table.
1275 The in_memory field in the hash table element is set to 0.
1276 The caller must set it nonzero if appropriate.
1278 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1279 and if insert_regs returns a nonzero value
1280 you must then recompute its hash code before calling here.
1282 If necessary, update table showing constant values of quantities. */
1284 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1286 static struct table_elt *
1287 insert (x, classp, hash, mode)
1289 register struct table_elt *classp;
1291 enum machine_mode mode;
1293 register struct table_elt *elt;
1295 /* If X is a register and we haven't made a quantity for it,
1296 something is wrong. */
1297 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1300 /* If X is a hard register, show it is being put in the table. */
1301 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1303 int regno = REGNO (x);
1304 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1307 for (i = regno; i < endregno; i++)
1308 SET_HARD_REG_BIT (hard_regs_in_table, i);
1311 /* If X is a label, show we recorded it. */
1312 if (GET_CODE (x) == LABEL_REF
1313 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1314 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1315 recorded_label_ref = 1;
1317 /* Put an element for X into the right hash bucket. */
1319 elt = get_element ();
1321 elt->cost = COST (x);
1322 elt->next_same_value = 0;
1323 elt->prev_same_value = 0;
1324 elt->next_same_hash = table[hash];
1325 elt->prev_same_hash = 0;
1326 elt->related_value = 0;
1329 elt->is_const = (CONSTANT_P (x)
1330 /* GNU C++ takes advantage of this for `this'
1331 (and other const values). */
1332 || (RTX_UNCHANGING_P (x)
1333 && GET_CODE (x) == REG
1334 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1335 || FIXED_BASE_PLUS_P (x));
1338 table[hash]->prev_same_hash = elt;
1341 /* Put it into the proper value-class. */
1344 classp = classp->first_same_value;
1345 if (CHEAPER (elt, classp))
1346 /* Insert at the head of the class */
1348 register struct table_elt *p;
1349 elt->next_same_value = classp;
1350 classp->prev_same_value = elt;
1351 elt->first_same_value = elt;
1353 for (p = classp; p; p = p->next_same_value)
1354 p->first_same_value = elt;
1358 /* Insert not at head of the class. */
1359 /* Put it after the last element cheaper than X. */
1360 register struct table_elt *p, *next;
1361 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1363 /* Put it after P and before NEXT. */
1364 elt->next_same_value = next;
1366 next->prev_same_value = elt;
1367 elt->prev_same_value = p;
1368 p->next_same_value = elt;
1369 elt->first_same_value = classp;
1373 elt->first_same_value = elt;
1375 /* If this is a constant being set equivalent to a register or a register
1376 being set equivalent to a constant, note the constant equivalence.
1378 If this is a constant, it cannot be equivalent to a different constant,
1379 and a constant is the only thing that can be cheaper than a register. So
1380 we know the register is the head of the class (before the constant was
1383 If this is a register that is not already known equivalent to a
1384 constant, we must check the entire class.
1386 If this is a register that is already known equivalent to an insn,
1387 update `qty_const_insn' to show that `this_insn' is the latest
1388 insn making that quantity equivalent to the constant. */
1390 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1391 && GET_CODE (x) != REG)
1393 qty_const[reg_qty[REGNO (classp->exp)]]
1394 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1395 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1398 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]
1401 register struct table_elt *p;
1403 for (p = classp; p != 0; p = p->next_same_value)
1405 if (p->is_const && GET_CODE (p->exp) != REG)
1407 qty_const[reg_qty[REGNO (x)]]
1408 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1409 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1415 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1416 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1417 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1419 /* If this is a constant with symbolic value,
1420 and it has a term with an explicit integer value,
1421 link it up with related expressions. */
1422 if (GET_CODE (x) == CONST)
1424 rtx subexp = get_related_value (x);
1426 struct table_elt *subelt, *subelt_prev;
1430 /* Get the integer-free subexpression in the hash table. */
1431 subhash = safe_hash (subexp, mode) % NBUCKETS;
1432 subelt = lookup (subexp, subhash, mode);
1434 subelt = insert (subexp, NULL_PTR, subhash, mode);
1435 /* Initialize SUBELT's circular chain if it has none. */
1436 if (subelt->related_value == 0)
1437 subelt->related_value = subelt;
1438 /* Find the element in the circular chain that precedes SUBELT. */
1439 subelt_prev = subelt;
1440 while (subelt_prev->related_value != subelt)
1441 subelt_prev = subelt_prev->related_value;
1442 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1443 This way the element that follows SUBELT is the oldest one. */
1444 elt->related_value = subelt_prev->related_value;
1445 subelt_prev->related_value = elt;
1452 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1453 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1454 the two classes equivalent.
1456 CLASS1 will be the surviving class; CLASS2 should not be used after this
1459 Any invalid entries in CLASS2 will not be copied. */
1462 merge_equiv_classes (class1, class2)
1463 struct table_elt *class1, *class2;
1465 struct table_elt *elt, *next, *new;
1467 /* Ensure we start with the head of the classes. */
1468 class1 = class1->first_same_value;
1469 class2 = class2->first_same_value;
1471 /* If they were already equal, forget it. */
1472 if (class1 == class2)
1475 for (elt = class2; elt; elt = next)
1479 enum machine_mode mode = elt->mode;
1481 next = elt->next_same_value;
1483 /* Remove old entry, make a new one in CLASS1's class.
1484 Don't do this for invalid entries as we cannot find their
1485 hash code (it also isn't necessary). */
1486 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1488 hash_arg_in_memory = 0;
1489 hash_arg_in_struct = 0;
1490 hash = HASH (exp, mode);
1492 if (GET_CODE (exp) == REG)
1493 delete_reg_equiv (REGNO (exp));
1495 remove_from_table (elt, hash);
1497 if (insert_regs (exp, class1, 0))
1499 rehash_using_reg (exp);
1500 hash = HASH (exp, mode);
1502 new = insert (exp, class1, hash, mode);
1503 new->in_memory = hash_arg_in_memory;
1504 new->in_struct = hash_arg_in_struct;
1509 /* Remove from the hash table, or mark as invalid,
1510 all expressions whose values could be altered by storing in X.
1511 X is a register, a subreg, or a memory reference with nonvarying address
1512 (because, when a memory reference with a varying address is stored in,
1513 all memory references are removed by invalidate_memory
1514 so specific invalidation is superfluous).
1515 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1516 instead of just the amount indicated by the mode of X. This is only used
1517 for bitfield stores into memory.
1519 A nonvarying address may be just a register or just
1520 a symbol reference, or it may be either of those plus
1521 a numeric offset. */
1524 invalidate (x, full_mode)
1526 enum machine_mode full_mode;
1529 register struct table_elt *p;
1531 /* If X is a register, dependencies on its contents
1532 are recorded through the qty number mechanism.
1533 Just change the qty number of the register,
1534 mark it as invalid for expressions that refer to it,
1535 and remove it itself. */
1537 if (GET_CODE (x) == REG)
1539 register int regno = REGNO (x);
1540 register unsigned hash = HASH (x, GET_MODE (x));
1542 /* Remove REGNO from any quantity list it might be on and indicate
1543 that it's value might have changed. If it is a pseudo, remove its
1544 entry from the hash table.
1546 For a hard register, we do the first two actions above for any
1547 additional hard registers corresponding to X. Then, if any of these
1548 registers are in the table, we must remove any REG entries that
1549 overlap these registers. */
1551 delete_reg_equiv (regno);
1554 if (regno >= FIRST_PSEUDO_REGISTER)
1556 /* Because a register can be referenced in more than one mode,
1557 we might have to remove more than one table entry. */
1559 struct table_elt *elt;
1561 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1562 remove_from_table (elt, hash);
1566 HOST_WIDE_INT in_table
1567 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1568 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1569 int tregno, tendregno;
1570 register struct table_elt *p, *next;
1572 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1574 for (i = regno + 1; i < endregno; i++)
1576 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1577 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1578 delete_reg_equiv (i);
1583 for (hash = 0; hash < NBUCKETS; hash++)
1584 for (p = table[hash]; p; p = next)
1586 next = p->next_same_hash;
1588 if (GET_CODE (p->exp) != REG
1589 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1592 tregno = REGNO (p->exp);
1594 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1595 if (tendregno > regno && tregno < endregno)
1596 remove_from_table (p, hash);
1603 if (GET_CODE (x) == SUBREG)
1605 if (GET_CODE (SUBREG_REG (x)) != REG)
1607 invalidate (SUBREG_REG (x), VOIDmode);
1611 /* X is not a register; it must be a memory reference with
1612 a nonvarying address. Remove all hash table elements
1613 that refer to overlapping pieces of memory. */
1615 if (GET_CODE (x) != MEM)
1618 if (full_mode == VOIDmode)
1619 full_mode = GET_MODE (x);
1621 for (i = 0; i < NBUCKETS; i++)
1623 register struct table_elt *next;
1624 for (p = table[i]; p; p = next)
1626 next = p->next_same_hash;
1627 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1628 than checking all the aliases). */
1630 && (GET_CODE (p->exp) != MEM
1631 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1632 remove_from_table (p, i);
1637 /* Remove all expressions that refer to register REGNO,
1638 since they are already invalid, and we are about to
1639 mark that register valid again and don't want the old
1640 expressions to reappear as valid. */
1643 remove_invalid_refs (regno)
1647 register struct table_elt *p, *next;
1649 for (i = 0; i < NBUCKETS; i++)
1650 for (p = table[i]; p; p = next)
1652 next = p->next_same_hash;
1653 if (GET_CODE (p->exp) != REG
1654 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1655 remove_from_table (p, i);
1659 /* Recompute the hash codes of any valid entries in the hash table that
1660 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1662 This is called when we make a jump equivalence. */
1665 rehash_using_reg (x)
1669 struct table_elt *p, *next;
1672 if (GET_CODE (x) == SUBREG)
1675 /* If X is not a register or if the register is known not to be in any
1676 valid entries in the table, we have no work to do. */
1678 if (GET_CODE (x) != REG
1679 || reg_in_table[REGNO (x)] < 0
1680 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1683 /* Scan all hash chains looking for valid entries that mention X.
1684 If we find one and it is in the wrong hash chain, move it. We can skip
1685 objects that are registers, since they are handled specially. */
1687 for (i = 0; i < NBUCKETS; i++)
1688 for (p = table[i]; p; p = next)
1690 next = p->next_same_hash;
1691 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1692 && exp_equiv_p (p->exp, p->exp, 1, 0)
1693 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1695 if (p->next_same_hash)
1696 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1698 if (p->prev_same_hash)
1699 p->prev_same_hash->next_same_hash = p->next_same_hash;
1701 table[i] = p->next_same_hash;
1703 p->next_same_hash = table[hash];
1704 p->prev_same_hash = 0;
1706 table[hash]->prev_same_hash = p;
1712 /* Remove from the hash table any expression that is a call-clobbered
1713 register. Also update their TICK values. */
1716 invalidate_for_call ()
1718 int regno, endregno;
1721 struct table_elt *p, *next;
1724 /* Go through all the hard registers. For each that is clobbered in
1725 a CALL_INSN, remove the register from quantity chains and update
1726 reg_tick if defined. Also see if any of these registers is currently
1729 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1730 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1732 delete_reg_equiv (regno);
1733 if (reg_tick[regno] >= 0)
1736 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1739 /* In the case where we have no call-clobbered hard registers in the
1740 table, we are done. Otherwise, scan the table and remove any
1741 entry that overlaps a call-clobbered register. */
1744 for (hash = 0; hash < NBUCKETS; hash++)
1745 for (p = table[hash]; p; p = next)
1747 next = p->next_same_hash;
1751 remove_from_table (p, hash);
1755 if (GET_CODE (p->exp) != REG
1756 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1759 regno = REGNO (p->exp);
1760 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1762 for (i = regno; i < endregno; i++)
1763 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1765 remove_from_table (p, hash);
1771 /* Given an expression X of type CONST,
1772 and ELT which is its table entry (or 0 if it
1773 is not in the hash table),
1774 return an alternate expression for X as a register plus integer.
1775 If none can be found, return 0. */
1778 use_related_value (x, elt)
1780 struct table_elt *elt;
1782 register struct table_elt *relt = 0;
1783 register struct table_elt *p, *q;
1784 HOST_WIDE_INT offset;
1786 /* First, is there anything related known?
1787 If we have a table element, we can tell from that.
1788 Otherwise, must look it up. */
1790 if (elt != 0 && elt->related_value != 0)
1792 else if (elt == 0 && GET_CODE (x) == CONST)
1794 rtx subexp = get_related_value (x);
1796 relt = lookup (subexp,
1797 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1804 /* Search all related table entries for one that has an
1805 equivalent register. */
1810 /* This loop is strange in that it is executed in two different cases.
1811 The first is when X is already in the table. Then it is searching
1812 the RELATED_VALUE list of X's class (RELT). The second case is when
1813 X is not in the table. Then RELT points to a class for the related
1816 Ensure that, whatever case we are in, that we ignore classes that have
1817 the same value as X. */
1819 if (rtx_equal_p (x, p->exp))
1822 for (q = p->first_same_value; q; q = q->next_same_value)
1823 if (GET_CODE (q->exp) == REG)
1829 p = p->related_value;
1831 /* We went all the way around, so there is nothing to be found.
1832 Alternatively, perhaps RELT was in the table for some other reason
1833 and it has no related values recorded. */
1834 if (p == relt || p == 0)
1841 offset = (get_integer_term (x) - get_integer_term (p->exp));
1842 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1843 return plus_constant (q->exp, offset);
1846 /* Hash an rtx. We are careful to make sure the value is never negative.
1847 Equivalent registers hash identically.
1848 MODE is used in hashing for CONST_INTs only;
1849 otherwise the mode of X is used.
1851 Store 1 in do_not_record if any subexpression is volatile.
1853 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1854 which does not have the RTX_UNCHANGING_P bit set.
1855 In this case, also store 1 in hash_arg_in_struct
1856 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1858 Note that cse_insn knows that the hash code of a MEM expression
1859 is just (int) MEM plus the hash code of the address. */
1862 canon_hash (x, mode)
1864 enum machine_mode mode;
1867 register unsigned hash = 0;
1868 register enum rtx_code code;
1871 /* repeat is used to turn tail-recursion into iteration. */
1876 code = GET_CODE (x);
1881 register int regno = REGNO (x);
1883 /* On some machines, we can't record any non-fixed hard register,
1884 because extending its life will cause reload problems. We
1885 consider ap, fp, and sp to be fixed for this purpose.
1886 On all machines, we can't record any global registers. */
1888 if (regno < FIRST_PSEUDO_REGISTER
1889 && (global_regs[regno]
1890 || (SMALL_REGISTER_CLASSES
1891 && ! fixed_regs[regno]
1892 && regno != FRAME_POINTER_REGNUM
1893 && regno != HARD_FRAME_POINTER_REGNUM
1894 && regno != ARG_POINTER_REGNUM
1895 && regno != STACK_POINTER_REGNUM)))
1900 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
1906 unsigned HOST_WIDE_INT tem = INTVAL (x);
1907 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
1912 /* This is like the general case, except that it only counts
1913 the integers representing the constant. */
1914 hash += (unsigned) code + (unsigned) GET_MODE (x);
1915 if (GET_MODE (x) != VOIDmode)
1916 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1918 unsigned tem = XINT (x, i);
1922 hash += ((unsigned) CONST_DOUBLE_LOW (x)
1923 + (unsigned) CONST_DOUBLE_HIGH (x));
1926 /* Assume there is only one rtx object for any given label. */
1929 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
1934 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
1938 if (MEM_VOLATILE_P (x))
1943 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
1945 hash_arg_in_memory = 1;
1946 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1948 /* Now that we have already found this special case,
1949 might as well speed it up as much as possible. */
1950 hash += (unsigned) MEM;
1961 case UNSPEC_VOLATILE:
1966 if (MEM_VOLATILE_P (x))
1977 i = GET_RTX_LENGTH (code) - 1;
1978 hash += (unsigned) code + (unsigned) GET_MODE (x);
1979 fmt = GET_RTX_FORMAT (code);
1984 rtx tem = XEXP (x, i);
1986 /* If we are about to do the last recursive call
1987 needed at this level, change it into iteration.
1988 This function is called enough to be worth it. */
1994 hash += canon_hash (tem, 0);
1996 else if (fmt[i] == 'E')
1997 for (j = 0; j < XVECLEN (x, i); j++)
1998 hash += canon_hash (XVECEXP (x, i, j), 0);
1999 else if (fmt[i] == 's')
2001 register unsigned char *p = (unsigned char *) XSTR (x, i);
2006 else if (fmt[i] == 'i')
2008 register unsigned tem = XINT (x, i);
2011 else if (fmt[i] == '0')
2019 /* Like canon_hash but with no side effects. */
2024 enum machine_mode mode;
2026 int save_do_not_record = do_not_record;
2027 int save_hash_arg_in_memory = hash_arg_in_memory;
2028 int save_hash_arg_in_struct = hash_arg_in_struct;
2029 unsigned hash = canon_hash (x, mode);
2030 hash_arg_in_memory = save_hash_arg_in_memory;
2031 hash_arg_in_struct = save_hash_arg_in_struct;
2032 do_not_record = save_do_not_record;
2036 /* Return 1 iff X and Y would canonicalize into the same thing,
2037 without actually constructing the canonicalization of either one.
2038 If VALIDATE is nonzero,
2039 we assume X is an expression being processed from the rtl
2040 and Y was found in the hash table. We check register refs
2041 in Y for being marked as valid.
2043 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2044 that is known to be in the register. Ordinarily, we don't allow them
2045 to match, because letting them match would cause unpredictable results
2046 in all the places that search a hash table chain for an equivalent
2047 for a given value. A possible equivalent that has different structure
2048 has its hash code computed from different data. Whether the hash code
2049 is the same as that of the given value is pure luck. */
2052 exp_equiv_p (x, y, validate, equal_values)
2058 register enum rtx_code code;
2061 /* Note: it is incorrect to assume an expression is equivalent to itself
2062 if VALIDATE is nonzero. */
2063 if (x == y && !validate)
2065 if (x == 0 || y == 0)
2068 code = GET_CODE (x);
2069 if (code != GET_CODE (y))
2074 /* If X is a constant and Y is a register or vice versa, they may be
2075 equivalent. We only have to validate if Y is a register. */
2076 if (CONSTANT_P (x) && GET_CODE (y) == REG
2077 && REGNO_QTY_VALID_P (REGNO (y))
2078 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2079 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2080 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2083 if (CONSTANT_P (y) && code == REG
2084 && REGNO_QTY_VALID_P (REGNO (x))
2085 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2086 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2092 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2093 if (GET_MODE (x) != GET_MODE (y))
2103 return INTVAL (x) == INTVAL (y);
2106 return XEXP (x, 0) == XEXP (y, 0);
2109 return XSTR (x, 0) == XSTR (y, 0);
2113 int regno = REGNO (y);
2115 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2116 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2119 /* If the quantities are not the same, the expressions are not
2120 equivalent. If there are and we are not to validate, they
2121 are equivalent. Otherwise, ensure all regs are up-to-date. */
2123 if (reg_qty[REGNO (x)] != reg_qty[regno])
2129 for (i = regno; i < endregno; i++)
2130 if (reg_in_table[i] != reg_tick[i])
2136 /* For commutative operations, check both orders. */
2144 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2145 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2146 validate, equal_values))
2147 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2148 validate, equal_values)
2149 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2150 validate, equal_values)));
2156 /* Compare the elements. If any pair of corresponding elements
2157 fail to match, return 0 for the whole things. */
2159 fmt = GET_RTX_FORMAT (code);
2160 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2165 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2170 if (XVECLEN (x, i) != XVECLEN (y, i))
2172 for (j = 0; j < XVECLEN (x, i); j++)
2173 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2174 validate, equal_values))
2179 if (strcmp (XSTR (x, i), XSTR (y, i)))
2184 if (XINT (x, i) != XINT (y, i))
2189 if (XWINT (x, i) != XWINT (y, i))
2204 /* Return 1 iff any subexpression of X matches Y.
2205 Here we do not require that X or Y be valid (for registers referred to)
2206 for being in the hash table. */
2213 register enum rtx_code code;
2219 if (x == 0 || y == 0)
2222 code = GET_CODE (x);
2223 /* If X as a whole has the same code as Y, they may match.
2225 if (code == GET_CODE (y))
2227 if (exp_equiv_p (x, y, 0, 1))
2231 /* X does not match, so try its subexpressions. */
2233 fmt = GET_RTX_FORMAT (code);
2234 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2243 if (refers_to_p (XEXP (x, i), y))
2246 else if (fmt[i] == 'E')
2249 for (j = 0; j < XVECLEN (x, i); j++)
2250 if (refers_to_p (XVECEXP (x, i, j), y))
2257 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2258 set PBASE, PSTART, and PEND which correspond to the base of the address,
2259 the starting offset, and ending offset respectively.
2261 ADDR is known to be a nonvarying address. */
2263 /* ??? Despite what the comments say, this function is in fact frequently
2264 passed varying addresses. This does not appear to cause any problems. */
2267 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2271 HOST_WIDE_INT *pstart, *pend;
2274 HOST_WIDE_INT start, end;
2280 if (flag_pic && GET_CODE (base) == PLUS
2281 && XEXP (base, 0) == pic_offset_table_rtx)
2282 base = XEXP (base, 1);
2284 /* Registers with nonvarying addresses usually have constant equivalents;
2285 but the frame pointer register is also possible. */
2286 if (GET_CODE (base) == REG
2288 && REGNO_QTY_VALID_P (REGNO (base))
2289 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2290 && qty_const[reg_qty[REGNO (base)]] != 0)
2291 base = qty_const[reg_qty[REGNO (base)]];
2292 else if (GET_CODE (base) == PLUS
2293 && GET_CODE (XEXP (base, 1)) == CONST_INT
2294 && GET_CODE (XEXP (base, 0)) == REG
2296 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2297 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2298 == GET_MODE (XEXP (base, 0)))
2299 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2301 start = INTVAL (XEXP (base, 1));
2302 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2304 /* This can happen as the result of virtual register instantiation,
2305 if the initial offset is too large to be a valid address. */
2306 else if (GET_CODE (base) == PLUS
2307 && GET_CODE (XEXP (base, 0)) == REG
2308 && GET_CODE (XEXP (base, 1)) == REG
2310 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2311 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2312 == GET_MODE (XEXP (base, 0)))
2313 && qty_const[reg_qty[REGNO (XEXP (base, 0))]]
2314 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2315 && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]]
2316 == GET_MODE (XEXP (base, 1)))
2317 && qty_const[reg_qty[REGNO (XEXP (base, 1))]])
2319 rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]];
2320 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2322 /* One of the two values must be a constant. */
2323 if (GET_CODE (base) != CONST_INT)
2325 if (GET_CODE (tem) != CONST_INT)
2327 start = INTVAL (tem);
2331 start = INTVAL (base);
2336 /* Handle everything that we can find inside an address that has been
2337 viewed as constant. */
2341 /* If no part of this switch does a "continue", the code outside
2342 will exit this loop. */
2344 switch (GET_CODE (base))
2347 /* By definition, operand1 of a LO_SUM is the associated constant
2348 address. Use the associated constant address as the base
2350 base = XEXP (base, 1);
2354 /* Strip off CONST. */
2355 base = XEXP (base, 0);
2359 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2361 start += INTVAL (XEXP (base, 1));
2362 base = XEXP (base, 0);
2368 /* Handle the case of an AND which is the negative of a power of
2369 two. This is used to represent unaligned memory operations. */
2370 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2371 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2373 set_nonvarying_address_components (XEXP (base, 0), size,
2374 pbase, pstart, pend);
2376 /* Assume the worst misalignment. START is affected, but not
2377 END, so compensate but adjusting SIZE. Don't lose any
2378 constant we already had. */
2380 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2381 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2394 if (GET_CODE (base) == CONST_INT)
2396 start += INTVAL (base);
2402 /* Set the return values. */
2408 /* Return 1 if X has a value that can vary even between two
2409 executions of the program. 0 means X can be compared reliably
2410 against certain constants or near-constants. */
2413 cse_rtx_varies_p (x)
2416 /* We need not check for X and the equivalence class being of the same
2417 mode because if X is equivalent to a constant in some mode, it
2418 doesn't vary in any mode. */
2420 if (GET_CODE (x) == REG
2421 && REGNO_QTY_VALID_P (REGNO (x))
2422 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2423 && qty_const[reg_qty[REGNO (x)]] != 0)
2426 if (GET_CODE (x) == PLUS
2427 && GET_CODE (XEXP (x, 1)) == CONST_INT
2428 && GET_CODE (XEXP (x, 0)) == REG
2429 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2430 && (GET_MODE (XEXP (x, 0))
2431 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2432 && qty_const[reg_qty[REGNO (XEXP (x, 0))]])
2435 /* This can happen as the result of virtual register instantiation, if
2436 the initial constant is too large to be a valid address. This gives
2437 us a three instruction sequence, load large offset into a register,
2438 load fp minus a constant into a register, then a MEM which is the
2439 sum of the two `constant' registers. */
2440 if (GET_CODE (x) == PLUS
2441 && GET_CODE (XEXP (x, 0)) == REG
2442 && GET_CODE (XEXP (x, 1)) == REG
2443 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2444 && (GET_MODE (XEXP (x, 0))
2445 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2446 && qty_const[reg_qty[REGNO (XEXP (x, 0))]]
2447 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2448 && (GET_MODE (XEXP (x, 1))
2449 == qty_mode[reg_qty[REGNO (XEXP (x, 1))]])
2450 && qty_const[reg_qty[REGNO (XEXP (x, 1))]])
2453 return rtx_varies_p (x);
2456 /* Canonicalize an expression:
2457 replace each register reference inside it
2458 with the "oldest" equivalent register.
2460 If INSN is non-zero and we are replacing a pseudo with a hard register
2461 or vice versa, validate_change is used to ensure that INSN remains valid
2462 after we make our substitution. The calls are made with IN_GROUP non-zero
2463 so apply_change_group must be called upon the outermost return from this
2464 function (unless INSN is zero). The result of apply_change_group can
2465 generally be discarded since the changes we are making are optional. */
2473 register enum rtx_code code;
2479 code = GET_CODE (x);
2497 /* Never replace a hard reg, because hard regs can appear
2498 in more than one machine mode, and we must preserve the mode
2499 of each occurrence. Also, some hard regs appear in
2500 MEMs that are shared and mustn't be altered. Don't try to
2501 replace any reg that maps to a reg of class NO_REGS. */
2502 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2503 || ! REGNO_QTY_VALID_P (REGNO (x)))
2506 first = qty_first_reg[reg_qty[REGNO (x)]];
2507 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2508 : REGNO_REG_CLASS (first) == NO_REGS ? x
2509 : gen_rtx_REG (qty_mode[reg_qty[REGNO (x)]], first));
2516 fmt = GET_RTX_FORMAT (code);
2517 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2523 rtx new = canon_reg (XEXP (x, i), insn);
2526 /* If replacing pseudo with hard reg or vice versa, ensure the
2527 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2528 if (insn != 0 && new != 0
2529 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2530 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2531 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2532 || (insn_code = recog_memoized (insn)) < 0
2533 || insn_n_dups[insn_code] > 0))
2534 validate_change (insn, &XEXP (x, i), new, 1);
2538 else if (fmt[i] == 'E')
2539 for (j = 0; j < XVECLEN (x, i); j++)
2540 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2546 /* LOC is a location within INSN that is an operand address (the contents of
2547 a MEM). Find the best equivalent address to use that is valid for this
2550 On most CISC machines, complicated address modes are costly, and rtx_cost
2551 is a good approximation for that cost. However, most RISC machines have
2552 only a few (usually only one) memory reference formats. If an address is
2553 valid at all, it is often just as cheap as any other address. Hence, for
2554 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2555 costs of various addresses. For two addresses of equal cost, choose the one
2556 with the highest `rtx_cost' value as that has the potential of eliminating
2557 the most insns. For equal costs, we choose the first in the equivalence
2558 class. Note that we ignore the fact that pseudo registers are cheaper
2559 than hard registers here because we would also prefer the pseudo registers.
2563 find_best_addr (insn, loc)
2567 struct table_elt *elt;
2570 struct table_elt *p;
2571 int found_better = 1;
2573 int save_do_not_record = do_not_record;
2574 int save_hash_arg_in_memory = hash_arg_in_memory;
2575 int save_hash_arg_in_struct = hash_arg_in_struct;
2580 /* Do not try to replace constant addresses or addresses of local and
2581 argument slots. These MEM expressions are made only once and inserted
2582 in many instructions, as well as being used to control symbol table
2583 output. It is not safe to clobber them.
2585 There are some uncommon cases where the address is already in a register
2586 for some reason, but we cannot take advantage of that because we have
2587 no easy way to unshare the MEM. In addition, looking up all stack
2588 addresses is costly. */
2589 if ((GET_CODE (addr) == PLUS
2590 && GET_CODE (XEXP (addr, 0)) == REG
2591 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2592 && (regno = REGNO (XEXP (addr, 0)),
2593 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2594 || regno == ARG_POINTER_REGNUM))
2595 || (GET_CODE (addr) == REG
2596 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2597 || regno == HARD_FRAME_POINTER_REGNUM
2598 || regno == ARG_POINTER_REGNUM))
2599 || GET_CODE (addr) == ADDRESSOF
2600 || CONSTANT_ADDRESS_P (addr))
2603 /* If this address is not simply a register, try to fold it. This will
2604 sometimes simplify the expression. Many simplifications
2605 will not be valid, but some, usually applying the associative rule, will
2606 be valid and produce better code. */
2607 if (GET_CODE (addr) != REG)
2609 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2613 && (ADDRESS_COST (folded) < ADDRESS_COST (addr)
2614 || (ADDRESS_COST (folded) == ADDRESS_COST (addr)
2615 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2617 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2619 && validate_change (insn, loc, folded, 0))
2623 /* If this address is not in the hash table, we can't look for equivalences
2624 of the whole address. Also, ignore if volatile. */
2627 hash = HASH (addr, Pmode);
2628 addr_volatile = do_not_record;
2629 do_not_record = save_do_not_record;
2630 hash_arg_in_memory = save_hash_arg_in_memory;
2631 hash_arg_in_struct = save_hash_arg_in_struct;
2636 elt = lookup (addr, hash, Pmode);
2638 #ifndef ADDRESS_COST
2641 int our_cost = elt->cost;
2643 /* Find the lowest cost below ours that works. */
2644 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2645 if (elt->cost < our_cost
2646 && (GET_CODE (elt->exp) == REG
2647 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2648 && validate_change (insn, loc,
2649 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2656 /* We need to find the best (under the criteria documented above) entry
2657 in the class that is valid. We use the `flag' field to indicate
2658 choices that were invalid and iterate until we can't find a better
2659 one that hasn't already been tried. */
2661 for (p = elt->first_same_value; p; p = p->next_same_value)
2664 while (found_better)
2666 int best_addr_cost = ADDRESS_COST (*loc);
2667 int best_rtx_cost = (elt->cost + 1) >> 1;
2668 struct table_elt *best_elt = elt;
2671 for (p = elt->first_same_value; p; p = p->next_same_value)
2673 && (GET_CODE (p->exp) == REG
2674 || exp_equiv_p (p->exp, p->exp, 1, 0))
2675 && (ADDRESS_COST (p->exp) < best_addr_cost
2676 || (ADDRESS_COST (p->exp) == best_addr_cost
2677 && (p->cost + 1) >> 1 > best_rtx_cost)))
2680 best_addr_cost = ADDRESS_COST (p->exp);
2681 best_rtx_cost = (p->cost + 1) >> 1;
2687 if (validate_change (insn, loc,
2688 canon_reg (copy_rtx (best_elt->exp),
2697 /* If the address is a binary operation with the first operand a register
2698 and the second a constant, do the same as above, but looking for
2699 equivalences of the register. Then try to simplify before checking for
2700 the best address to use. This catches a few cases: First is when we
2701 have REG+const and the register is another REG+const. We can often merge
2702 the constants and eliminate one insn and one register. It may also be
2703 that a machine has a cheap REG+REG+const. Finally, this improves the
2704 code on the Alpha for unaligned byte stores. */
2706 if (flag_expensive_optimizations
2707 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2708 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2709 && GET_CODE (XEXP (*loc, 0)) == REG
2710 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2712 rtx c = XEXP (*loc, 1);
2715 hash = HASH (XEXP (*loc, 0), Pmode);
2716 do_not_record = save_do_not_record;
2717 hash_arg_in_memory = save_hash_arg_in_memory;
2718 hash_arg_in_struct = save_hash_arg_in_struct;
2720 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2724 /* We need to find the best (under the criteria documented above) entry
2725 in the class that is valid. We use the `flag' field to indicate
2726 choices that were invalid and iterate until we can't find a better
2727 one that hasn't already been tried. */
2729 for (p = elt->first_same_value; p; p = p->next_same_value)
2732 while (found_better)
2734 int best_addr_cost = ADDRESS_COST (*loc);
2735 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2736 struct table_elt *best_elt = elt;
2737 rtx best_rtx = *loc;
2740 /* This is at worst case an O(n^2) algorithm, so limit our search
2741 to the first 32 elements on the list. This avoids trouble
2742 compiling code with very long basic blocks that can easily
2743 call cse_gen_binary so many times that we run out of memory. */
2746 for (p = elt->first_same_value, count = 0;
2748 p = p->next_same_value, count++)
2750 && (GET_CODE (p->exp) == REG
2751 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2753 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2755 if ((ADDRESS_COST (new) < best_addr_cost
2756 || (ADDRESS_COST (new) == best_addr_cost
2757 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2760 best_addr_cost = ADDRESS_COST (new);
2761 best_rtx_cost = (COST (new) + 1) >> 1;
2769 if (validate_change (insn, loc,
2770 canon_reg (copy_rtx (best_rtx),
2781 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2782 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2783 what values are being compared.
2785 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2786 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2787 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2788 compared to produce cc0.
2790 The return value is the comparison operator and is either the code of
2791 A or the code corresponding to the inverse of the comparison. */
2793 static enum rtx_code
2794 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2797 enum machine_mode *pmode1, *pmode2;
2801 arg1 = *parg1, arg2 = *parg2;
2803 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2805 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2807 /* Set non-zero when we find something of interest. */
2809 int reverse_code = 0;
2810 struct table_elt *p = 0;
2812 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2813 On machines with CC0, this is the only case that can occur, since
2814 fold_rtx will return the COMPARE or item being compared with zero
2817 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2820 /* If ARG1 is a comparison operator and CODE is testing for
2821 STORE_FLAG_VALUE, get the inner arguments. */
2823 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2826 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2827 && code == LT && STORE_FLAG_VALUE == -1)
2828 #ifdef FLOAT_STORE_FLAG_VALUE
2829 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2830 && FLOAT_STORE_FLAG_VALUE < 0)
2835 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2836 && code == GE && STORE_FLAG_VALUE == -1)
2837 #ifdef FLOAT_STORE_FLAG_VALUE
2838 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2839 && FLOAT_STORE_FLAG_VALUE < 0)
2842 x = arg1, reverse_code = 1;
2845 /* ??? We could also check for
2847 (ne (and (eq (...) (const_int 1))) (const_int 0))
2849 and related forms, but let's wait until we see them occurring. */
2852 /* Look up ARG1 in the hash table and see if it has an equivalence
2853 that lets us see what is being compared. */
2854 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2856 if (p) p = p->first_same_value;
2858 for (; p; p = p->next_same_value)
2860 enum machine_mode inner_mode = GET_MODE (p->exp);
2862 /* If the entry isn't valid, skip it. */
2863 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2866 if (GET_CODE (p->exp) == COMPARE
2867 /* Another possibility is that this machine has a compare insn
2868 that includes the comparison code. In that case, ARG1 would
2869 be equivalent to a comparison operation that would set ARG1 to
2870 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2871 ORIG_CODE is the actual comparison being done; if it is an EQ,
2872 we must reverse ORIG_CODE. On machine with a negative value
2873 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2876 && GET_MODE_CLASS (inner_mode) == MODE_INT
2877 && (GET_MODE_BITSIZE (inner_mode)
2878 <= HOST_BITS_PER_WIDE_INT)
2879 && (STORE_FLAG_VALUE
2880 & ((HOST_WIDE_INT) 1
2881 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2882 #ifdef FLOAT_STORE_FLAG_VALUE
2884 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2885 && FLOAT_STORE_FLAG_VALUE < 0)
2888 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2893 else if ((code == EQ
2895 && GET_MODE_CLASS (inner_mode) == MODE_INT
2896 && (GET_MODE_BITSIZE (inner_mode)
2897 <= HOST_BITS_PER_WIDE_INT)
2898 && (STORE_FLAG_VALUE
2899 & ((HOST_WIDE_INT) 1
2900 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2901 #ifdef FLOAT_STORE_FLAG_VALUE
2903 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2904 && FLOAT_STORE_FLAG_VALUE < 0)
2907 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2914 /* If this is fp + constant, the equivalent is a better operand since
2915 it may let us predict the value of the comparison. */
2916 else if (NONZERO_BASE_PLUS_P (p->exp))
2923 /* If we didn't find a useful equivalence for ARG1, we are done.
2924 Otherwise, set up for the next iteration. */
2928 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2929 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2930 code = GET_CODE (x);
2933 code = reverse_condition (code);
2936 /* Return our results. Return the modes from before fold_rtx
2937 because fold_rtx might produce const_int, and then it's too late. */
2938 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2939 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2944 /* Try to simplify a unary operation CODE whose output mode is to be
2945 MODE with input operand OP whose mode was originally OP_MODE.
2946 Return zero if no simplification can be made. */
2949 simplify_unary_operation (code, mode, op, op_mode)
2951 enum machine_mode mode;
2953 enum machine_mode op_mode;
2955 register int width = GET_MODE_BITSIZE (mode);
2957 /* The order of these tests is critical so that, for example, we don't
2958 check the wrong mode (input vs. output) for a conversion operation,
2959 such as FIX. At some point, this should be simplified. */
2961 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2963 if (code == FLOAT && GET_MODE (op) == VOIDmode
2964 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2966 HOST_WIDE_INT hv, lv;
2969 if (GET_CODE (op) == CONST_INT)
2970 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
2972 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
2974 #ifdef REAL_ARITHMETIC
2975 REAL_VALUE_FROM_INT (d, lv, hv, mode);
2979 d = (double) (~ hv);
2980 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2981 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2982 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
2988 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2989 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2990 d += (double) (unsigned HOST_WIDE_INT) lv;
2992 #endif /* REAL_ARITHMETIC */
2993 d = real_value_truncate (mode, d);
2994 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2996 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
2997 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2999 HOST_WIDE_INT hv, lv;
3002 if (GET_CODE (op) == CONST_INT)
3003 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3005 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3007 if (op_mode == VOIDmode)
3009 /* We don't know how to interpret negative-looking numbers in
3010 this case, so don't try to fold those. */
3014 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3017 hv = 0, lv &= GET_MODE_MASK (op_mode);
3019 #ifdef REAL_ARITHMETIC
3020 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3023 d = (double) (unsigned HOST_WIDE_INT) hv;
3024 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3025 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3026 d += (double) (unsigned HOST_WIDE_INT) lv;
3027 #endif /* REAL_ARITHMETIC */
3028 d = real_value_truncate (mode, d);
3029 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3033 if (GET_CODE (op) == CONST_INT
3034 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3036 register HOST_WIDE_INT arg0 = INTVAL (op);
3037 register HOST_WIDE_INT val;
3050 val = (arg0 >= 0 ? arg0 : - arg0);
3054 /* Don't use ffs here. Instead, get low order bit and then its
3055 number. If arg0 is zero, this will return 0, as desired. */
3056 arg0 &= GET_MODE_MASK (mode);
3057 val = exact_log2 (arg0 & (- arg0)) + 1;
3065 if (op_mode == VOIDmode)
3067 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3069 /* If we were really extending the mode,
3070 we would have to distinguish between zero-extension
3071 and sign-extension. */
3072 if (width != GET_MODE_BITSIZE (op_mode))
3076 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3077 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3083 if (op_mode == VOIDmode)
3085 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3087 /* If we were really extending the mode,
3088 we would have to distinguish between zero-extension
3089 and sign-extension. */
3090 if (width != GET_MODE_BITSIZE (op_mode))
3094 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3097 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3099 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3100 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3113 /* Clear the bits that don't belong in our mode,
3114 unless they and our sign bit are all one.
3115 So we get either a reasonable negative value or a reasonable
3116 unsigned value for this mode. */
3117 if (width < HOST_BITS_PER_WIDE_INT
3118 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3119 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3120 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3122 return GEN_INT (val);
3125 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3126 for a DImode operation on a CONST_INT. */
3127 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3128 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3130 HOST_WIDE_INT l1, h1, lv, hv;
3132 if (GET_CODE (op) == CONST_DOUBLE)
3133 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3135 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3145 neg_double (l1, h1, &lv, &hv);
3150 neg_double (l1, h1, &lv, &hv);
3158 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3160 lv = exact_log2 (l1 & (-l1)) + 1;
3164 /* This is just a change-of-mode, so do nothing. */
3169 if (op_mode == VOIDmode
3170 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3174 lv = l1 & GET_MODE_MASK (op_mode);
3178 if (op_mode == VOIDmode
3179 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3183 lv = l1 & GET_MODE_MASK (op_mode);
3184 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3185 && (lv & ((HOST_WIDE_INT) 1
3186 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3187 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3189 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3200 return immed_double_const (lv, hv, mode);
3203 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3204 else if (GET_CODE (op) == CONST_DOUBLE
3205 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3211 if (setjmp (handler))
3212 /* There used to be a warning here, but that is inadvisable.
3213 People may want to cause traps, and the natural way
3214 to do it should not get a warning. */
3217 set_float_handler (handler);
3219 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3224 d = REAL_VALUE_NEGATE (d);
3228 if (REAL_VALUE_NEGATIVE (d))
3229 d = REAL_VALUE_NEGATE (d);
3232 case FLOAT_TRUNCATE:
3233 d = real_value_truncate (mode, d);
3237 /* All this does is change the mode. */
3241 d = REAL_VALUE_RNDZINT (d);
3245 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3255 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3256 set_float_handler (NULL_PTR);
3260 else if (GET_CODE (op) == CONST_DOUBLE
3261 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3262 && GET_MODE_CLASS (mode) == MODE_INT
3263 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3269 if (setjmp (handler))
3272 set_float_handler (handler);
3274 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3279 val = REAL_VALUE_FIX (d);
3283 val = REAL_VALUE_UNSIGNED_FIX (d);
3290 set_float_handler (NULL_PTR);
3292 /* Clear the bits that don't belong in our mode,
3293 unless they and our sign bit are all one.
3294 So we get either a reasonable negative value or a reasonable
3295 unsigned value for this mode. */
3296 if (width < HOST_BITS_PER_WIDE_INT
3297 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3298 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3299 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3301 /* If this would be an entire word for the target, but is not for
3302 the host, then sign-extend on the host so that the number will look
3303 the same way on the host that it would on the target.
3305 For example, when building a 64 bit alpha hosted 32 bit sparc
3306 targeted compiler, then we want the 32 bit unsigned value -1 to be
3307 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3308 The later confuses the sparc backend. */
3310 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3311 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3312 val |= ((HOST_WIDE_INT) (-1) << width);
3314 return GEN_INT (val);
3317 /* This was formerly used only for non-IEEE float.
3318 eggert@twinsun.com says it is safe for IEEE also. */
3321 /* There are some simplifications we can do even if the operands
3327 /* (not (not X)) == X, similarly for NEG. */
3328 if (GET_CODE (op) == code)
3329 return XEXP (op, 0);
3333 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3334 becomes just the MINUS if its mode is MODE. This allows
3335 folding switch statements on machines using casesi (such as
3337 if (GET_CODE (op) == TRUNCATE
3338 && GET_MODE (XEXP (op, 0)) == mode
3339 && GET_CODE (XEXP (op, 0)) == MINUS
3340 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3341 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3342 return XEXP (op, 0);
3344 #ifdef POINTERS_EXTEND_UNSIGNED
3345 if (! POINTERS_EXTEND_UNSIGNED
3346 && mode == Pmode && GET_MODE (op) == ptr_mode
3348 return convert_memory_address (Pmode, op);
3352 #ifdef POINTERS_EXTEND_UNSIGNED
3354 if (POINTERS_EXTEND_UNSIGNED
3355 && mode == Pmode && GET_MODE (op) == ptr_mode
3357 return convert_memory_address (Pmode, op);
3369 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3370 and OP1. Return 0 if no simplification is possible.
3372 Don't use this for relational operations such as EQ or LT.
3373 Use simplify_relational_operation instead. */
3376 simplify_binary_operation (code, mode, op0, op1)
3378 enum machine_mode mode;
3381 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3383 int width = GET_MODE_BITSIZE (mode);
3386 /* Relational operations don't work here. We must know the mode
3387 of the operands in order to do the comparison correctly.
3388 Assuming a full word can give incorrect results.
3389 Consider comparing 128 with -128 in QImode. */
3391 if (GET_RTX_CLASS (code) == '<')
3394 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3395 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3396 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3397 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3399 REAL_VALUE_TYPE f0, f1, value;
3402 if (setjmp (handler))
3405 set_float_handler (handler);
3407 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3408 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3409 f0 = real_value_truncate (mode, f0);
3410 f1 = real_value_truncate (mode, f1);
3412 #ifdef REAL_ARITHMETIC
3413 #ifndef REAL_INFINITY
3414 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3417 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3431 #ifndef REAL_INFINITY
3438 value = MIN (f0, f1);
3441 value = MAX (f0, f1);
3448 value = real_value_truncate (mode, value);
3449 set_float_handler (NULL_PTR);
3450 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3452 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3454 /* We can fold some multi-word operations. */
3455 if (GET_MODE_CLASS (mode) == MODE_INT
3456 && width == HOST_BITS_PER_WIDE_INT * 2
3457 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3458 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3460 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3462 if (GET_CODE (op0) == CONST_DOUBLE)
3463 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3465 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3467 if (GET_CODE (op1) == CONST_DOUBLE)
3468 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3470 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3475 /* A - B == A + (-B). */
3476 neg_double (l2, h2, &lv, &hv);
3479 /* .. fall through ... */
3482 add_double (l1, h1, l2, h2, &lv, &hv);
3486 mul_double (l1, h1, l2, h2, &lv, &hv);
3489 case DIV: case MOD: case UDIV: case UMOD:
3490 /* We'd need to include tree.h to do this and it doesn't seem worth
3495 lv = l1 & l2, hv = h1 & h2;
3499 lv = l1 | l2, hv = h1 | h2;
3503 lv = l1 ^ l2, hv = h1 ^ h2;
3509 && ((unsigned HOST_WIDE_INT) l1
3510 < (unsigned HOST_WIDE_INT) l2)))
3519 && ((unsigned HOST_WIDE_INT) l1
3520 > (unsigned HOST_WIDE_INT) l2)))
3527 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3529 && ((unsigned HOST_WIDE_INT) l1
3530 < (unsigned HOST_WIDE_INT) l2)))
3537 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3539 && ((unsigned HOST_WIDE_INT) l1
3540 > (unsigned HOST_WIDE_INT) l2)))
3546 case LSHIFTRT: case ASHIFTRT:
3548 case ROTATE: case ROTATERT:
3549 #ifdef SHIFT_COUNT_TRUNCATED
3550 if (SHIFT_COUNT_TRUNCATED)
3551 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3554 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3557 if (code == LSHIFTRT || code == ASHIFTRT)
3558 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3560 else if (code == ASHIFT)
3561 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3562 else if (code == ROTATE)
3563 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3564 else /* code == ROTATERT */
3565 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3572 return immed_double_const (lv, hv, mode);
3575 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3576 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3578 /* Even if we can't compute a constant result,
3579 there are some cases worth simplifying. */
3584 /* In IEEE floating point, x+0 is not the same as x. Similarly
3585 for the other optimizations below. */
3586 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3587 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3590 if (op1 == CONST0_RTX (mode))
3593 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3594 if (GET_CODE (op0) == NEG)
3595 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3596 else if (GET_CODE (op1) == NEG)
3597 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3599 /* Handle both-operands-constant cases. We can only add
3600 CONST_INTs to constants since the sum of relocatable symbols
3601 can't be handled by most assemblers. Don't add CONST_INT
3602 to CONST_INT since overflow won't be computed properly if wider
3603 than HOST_BITS_PER_WIDE_INT. */
3605 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3606 && GET_CODE (op1) == CONST_INT)
3607 return plus_constant (op0, INTVAL (op1));
3608 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3609 && GET_CODE (op0) == CONST_INT)
3610 return plus_constant (op1, INTVAL (op0));
3612 /* See if this is something like X * C - X or vice versa or
3613 if the multiplication is written as a shift. If so, we can
3614 distribute and make a new multiply, shift, or maybe just
3615 have X (if C is 2 in the example above). But don't make
3616 real multiply if we didn't have one before. */
3618 if (! FLOAT_MODE_P (mode))
3620 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3621 rtx lhs = op0, rhs = op1;
3624 if (GET_CODE (lhs) == NEG)
3625 coeff0 = -1, lhs = XEXP (lhs, 0);
3626 else if (GET_CODE (lhs) == MULT
3627 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3629 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3632 else if (GET_CODE (lhs) == ASHIFT
3633 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3634 && INTVAL (XEXP (lhs, 1)) >= 0
3635 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3637 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3638 lhs = XEXP (lhs, 0);
3641 if (GET_CODE (rhs) == NEG)
3642 coeff1 = -1, rhs = XEXP (rhs, 0);
3643 else if (GET_CODE (rhs) == MULT
3644 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3646 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3649 else if (GET_CODE (rhs) == ASHIFT
3650 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3651 && INTVAL (XEXP (rhs, 1)) >= 0
3652 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3654 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3655 rhs = XEXP (rhs, 0);
3658 if (rtx_equal_p (lhs, rhs))
3660 tem = cse_gen_binary (MULT, mode, lhs,
3661 GEN_INT (coeff0 + coeff1));
3662 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3666 /* If one of the operands is a PLUS or a MINUS, see if we can
3667 simplify this by the associative law.
3668 Don't use the associative law for floating point.
3669 The inaccuracy makes it nonassociative,
3670 and subtle programs can break if operations are associated. */
3672 if (INTEGRAL_MODE_P (mode)
3673 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3674 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3675 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3681 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3682 using cc0, in which case we want to leave it as a COMPARE
3683 so we can distinguish it from a register-register-copy.
3685 In IEEE floating point, x-0 is not the same as x. */
3687 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3688 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3689 && op1 == CONST0_RTX (mode))
3692 /* Do nothing here. */
3697 /* None of these optimizations can be done for IEEE
3699 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3700 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3703 /* We can't assume x-x is 0 even with non-IEEE floating point,
3704 but since it is zero except in very strange circumstances, we
3705 will treat it as zero with -ffast-math. */
3706 if (rtx_equal_p (op0, op1)
3707 && ! side_effects_p (op0)
3708 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3709 return CONST0_RTX (mode);
3711 /* Change subtraction from zero into negation. */
3712 if (op0 == CONST0_RTX (mode))
3713 return gen_rtx_NEG (mode, op1);
3715 /* (-1 - a) is ~a. */
3716 if (op0 == constm1_rtx)
3717 return gen_rtx_NOT (mode, op1);
3719 /* Subtracting 0 has no effect. */
3720 if (op1 == CONST0_RTX (mode))
3723 /* See if this is something like X * C - X or vice versa or
3724 if the multiplication is written as a shift. If so, we can
3725 distribute and make a new multiply, shift, or maybe just
3726 have X (if C is 2 in the example above). But don't make
3727 real multiply if we didn't have one before. */
3729 if (! FLOAT_MODE_P (mode))
3731 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3732 rtx lhs = op0, rhs = op1;
3735 if (GET_CODE (lhs) == NEG)
3736 coeff0 = -1, lhs = XEXP (lhs, 0);
3737 else if (GET_CODE (lhs) == MULT
3738 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3740 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3743 else if (GET_CODE (lhs) == ASHIFT
3744 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3745 && INTVAL (XEXP (lhs, 1)) >= 0
3746 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3748 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3749 lhs = XEXP (lhs, 0);
3752 if (GET_CODE (rhs) == NEG)
3753 coeff1 = - 1, rhs = XEXP (rhs, 0);
3754 else if (GET_CODE (rhs) == MULT
3755 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3757 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3760 else if (GET_CODE (rhs) == ASHIFT
3761 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3762 && INTVAL (XEXP (rhs, 1)) >= 0
3763 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3765 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3766 rhs = XEXP (rhs, 0);
3769 if (rtx_equal_p (lhs, rhs))
3771 tem = cse_gen_binary (MULT, mode, lhs,
3772 GEN_INT (coeff0 - coeff1));
3773 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3777 /* (a - (-b)) -> (a + b). */
3778 if (GET_CODE (op1) == NEG)
3779 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3781 /* If one of the operands is a PLUS or a MINUS, see if we can
3782 simplify this by the associative law.
3783 Don't use the associative law for floating point.
3784 The inaccuracy makes it nonassociative,
3785 and subtle programs can break if operations are associated. */
3787 if (INTEGRAL_MODE_P (mode)
3788 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3789 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3790 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3793 /* Don't let a relocatable value get a negative coeff. */
3794 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3795 return plus_constant (op0, - INTVAL (op1));
3797 /* (x - (x & y)) -> (x & ~y) */
3798 if (GET_CODE (op1) == AND)
3800 if (rtx_equal_p (op0, XEXP (op1, 0)))
3801 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
3802 if (rtx_equal_p (op0, XEXP (op1, 1)))
3803 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
3808 if (op1 == constm1_rtx)
3810 tem = simplify_unary_operation (NEG, mode, op0, mode);
3812 return tem ? tem : gen_rtx_NEG (mode, op0);
3815 /* In IEEE floating point, x*0 is not always 0. */
3816 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3817 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3818 && op1 == CONST0_RTX (mode)
3819 && ! side_effects_p (op0))
3822 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3823 However, ANSI says we can drop signals,
3824 so we can do this anyway. */
3825 if (op1 == CONST1_RTX (mode))
3828 /* Convert multiply by constant power of two into shift unless
3829 we are still generating RTL. This test is a kludge. */
3830 if (GET_CODE (op1) == CONST_INT
3831 && (val = exact_log2 (INTVAL (op1))) >= 0
3832 /* If the mode is larger than the host word size, and the
3833 uppermost bit is set, then this isn't a power of two due
3834 to implicit sign extension. */
3835 && (width <= HOST_BITS_PER_WIDE_INT
3836 || val != HOST_BITS_PER_WIDE_INT - 1)
3837 && ! rtx_equal_function_value_matters)
3838 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
3840 if (GET_CODE (op1) == CONST_DOUBLE
3841 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3845 int op1is2, op1ism1;
3847 if (setjmp (handler))
3850 set_float_handler (handler);
3851 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3852 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3853 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3854 set_float_handler (NULL_PTR);
3856 /* x*2 is x+x and x*(-1) is -x */
3857 if (op1is2 && GET_MODE (op0) == mode)
3858 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
3860 else if (op1ism1 && GET_MODE (op0) == mode)
3861 return gen_rtx_NEG (mode, op0);
3866 if (op1 == const0_rtx)
3868 if (GET_CODE (op1) == CONST_INT
3869 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3871 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3873 /* A | (~A) -> -1 */
3874 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3875 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3876 && ! side_effects_p (op0)
3877 && GET_MODE_CLASS (mode) != MODE_CC)
3882 if (op1 == const0_rtx)
3884 if (GET_CODE (op1) == CONST_INT
3885 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3886 return gen_rtx_NOT (mode, op0);
3887 if (op0 == op1 && ! side_effects_p (op0)
3888 && GET_MODE_CLASS (mode) != MODE_CC)
3893 if (op1 == const0_rtx && ! side_effects_p (op0))
3895 if (GET_CODE (op1) == CONST_INT
3896 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3898 if (op0 == op1 && ! side_effects_p (op0)
3899 && GET_MODE_CLASS (mode) != MODE_CC)
3902 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3903 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3904 && ! side_effects_p (op0)
3905 && GET_MODE_CLASS (mode) != MODE_CC)
3910 /* Convert divide by power of two into shift (divide by 1 handled
3912 if (GET_CODE (op1) == CONST_INT
3913 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3914 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
3916 /* ... fall through ... */
3919 if (op1 == CONST1_RTX (mode))
3922 /* In IEEE floating point, 0/x is not always 0. */
3923 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3924 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3925 && op0 == CONST0_RTX (mode)
3926 && ! side_effects_p (op1))
3929 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3930 /* Change division by a constant into multiplication. Only do
3931 this with -ffast-math until an expert says it is safe in
3933 else if (GET_CODE (op1) == CONST_DOUBLE
3934 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3935 && op1 != CONST0_RTX (mode)
3939 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3941 if (! REAL_VALUES_EQUAL (d, dconst0))
3943 #if defined (REAL_ARITHMETIC)
3944 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
3945 return gen_rtx_MULT (mode, op0,
3946 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3948 return gen_rtx_MULT (mode, op0,
3949 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3957 /* Handle modulus by power of two (mod with 1 handled below). */
3958 if (GET_CODE (op1) == CONST_INT
3959 && exact_log2 (INTVAL (op1)) > 0)
3960 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
3962 /* ... fall through ... */
3965 if ((op0 == const0_rtx || op1 == const1_rtx)
3966 && ! side_effects_p (op0) && ! side_effects_p (op1))
3972 /* Rotating ~0 always results in ~0. */
3973 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
3974 && INTVAL (op0) == GET_MODE_MASK (mode)
3975 && ! side_effects_p (op1))
3978 /* ... fall through ... */
3983 if (op1 == const0_rtx)
3985 if (op0 == const0_rtx && ! side_effects_p (op1))
3990 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3991 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
3992 && ! side_effects_p (op0))
3994 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3999 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4001 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4002 && ! side_effects_p (op0))
4004 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4009 if (op1 == const0_rtx && ! side_effects_p (op0))
4011 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4016 if (op1 == constm1_rtx && ! side_effects_p (op0))
4018 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4029 /* Get the integer argument values in two forms:
4030 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4032 arg0 = INTVAL (op0);
4033 arg1 = INTVAL (op1);
4035 if (width < HOST_BITS_PER_WIDE_INT)
4037 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4038 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4041 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4042 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4045 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4046 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4054 /* Compute the value of the arithmetic. */
4059 val = arg0s + arg1s;
4063 val = arg0s - arg1s;
4067 val = arg0s * arg1s;
4073 val = arg0s / arg1s;
4079 val = arg0s % arg1s;
4085 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4091 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4107 /* If shift count is undefined, don't fold it; let the machine do
4108 what it wants. But truncate it if the machine will do that. */
4112 #ifdef SHIFT_COUNT_TRUNCATED
4113 if (SHIFT_COUNT_TRUNCATED)
4117 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4124 #ifdef SHIFT_COUNT_TRUNCATED
4125 if (SHIFT_COUNT_TRUNCATED)
4129 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4136 #ifdef SHIFT_COUNT_TRUNCATED
4137 if (SHIFT_COUNT_TRUNCATED)
4141 val = arg0s >> arg1;
4143 /* Bootstrap compiler may not have sign extended the right shift.
4144 Manually extend the sign to insure bootstrap cc matches gcc. */
4145 if (arg0s < 0 && arg1 > 0)
4146 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4155 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4156 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4164 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4165 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4169 /* Do nothing here. */
4173 val = arg0s <= arg1s ? arg0s : arg1s;
4177 val = ((unsigned HOST_WIDE_INT) arg0
4178 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4182 val = arg0s > arg1s ? arg0s : arg1s;
4186 val = ((unsigned HOST_WIDE_INT) arg0
4187 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4194 /* Clear the bits that don't belong in our mode, unless they and our sign
4195 bit are all one. So we get either a reasonable negative value or a
4196 reasonable unsigned value for this mode. */
4197 if (width < HOST_BITS_PER_WIDE_INT
4198 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4199 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4200 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4202 /* If this would be an entire word for the target, but is not for
4203 the host, then sign-extend on the host so that the number will look
4204 the same way on the host that it would on the target.
4206 For example, when building a 64 bit alpha hosted 32 bit sparc
4207 targeted compiler, then we want the 32 bit unsigned value -1 to be
4208 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4209 The later confuses the sparc backend. */
4211 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4212 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4213 val |= ((HOST_WIDE_INT) (-1) << width);
4215 return GEN_INT (val);
4218 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4221 Rather than test for specific case, we do this by a brute-force method
4222 and do all possible simplifications until no more changes occur. Then
4223 we rebuild the operation. */
4226 simplify_plus_minus (code, mode, op0, op1)
4228 enum machine_mode mode;
4234 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4235 int first = 1, negate = 0, changed;
4238 bzero ((char *) ops, sizeof ops);
4240 /* Set up the two operands and then expand them until nothing has been
4241 changed. If we run out of room in our array, give up; this should
4242 almost never happen. */
4244 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4251 for (i = 0; i < n_ops; i++)
4252 switch (GET_CODE (ops[i]))
4259 ops[n_ops] = XEXP (ops[i], 1);
4260 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4261 ops[i] = XEXP (ops[i], 0);
4267 ops[i] = XEXP (ops[i], 0);
4268 negs[i] = ! negs[i];
4273 ops[i] = XEXP (ops[i], 0);
4279 /* ~a -> (-a - 1) */
4282 ops[n_ops] = constm1_rtx;
4283 negs[n_ops++] = negs[i];
4284 ops[i] = XEXP (ops[i], 0);
4285 negs[i] = ! negs[i];
4292 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4300 /* If we only have two operands, we can't do anything. */
4304 /* Now simplify each pair of operands until nothing changes. The first
4305 time through just simplify constants against each other. */
4312 for (i = 0; i < n_ops - 1; i++)
4313 for (j = i + 1; j < n_ops; j++)
4314 if (ops[i] != 0 && ops[j] != 0
4315 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4317 rtx lhs = ops[i], rhs = ops[j];
4318 enum rtx_code ncode = PLUS;
4320 if (negs[i] && ! negs[j])
4321 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4322 else if (! negs[i] && negs[j])
4325 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4328 ops[i] = tem, ops[j] = 0;
4329 negs[i] = negs[i] && negs[j];
4330 if (GET_CODE (tem) == NEG)
4331 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4333 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4334 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4342 /* Pack all the operands to the lower-numbered entries and give up if
4343 we didn't reduce the number of operands we had. Make sure we
4344 count a CONST as two operands. If we have the same number of
4345 operands, but have made more CONSTs than we had, this is also
4346 an improvement, so accept it. */
4348 for (i = 0, j = 0; j < n_ops; j++)
4351 ops[i] = ops[j], negs[i++] = negs[j];
4352 if (GET_CODE (ops[j]) == CONST)
4356 if (i + n_consts > input_ops
4357 || (i + n_consts == input_ops && n_consts <= input_consts))
4362 /* If we have a CONST_INT, put it last. */
4363 for (i = 0; i < n_ops - 1; i++)
4364 if (GET_CODE (ops[i]) == CONST_INT)
4366 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4367 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4370 /* Put a non-negated operand first. If there aren't any, make all
4371 operands positive and negate the whole thing later. */
4372 for (i = 0; i < n_ops && negs[i]; i++)
4377 for (i = 0; i < n_ops; i++)
4383 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4384 j = negs[0], negs[0] = negs[i], negs[i] = j;
4387 /* Now make the result by performing the requested operations. */
4389 for (i = 1; i < n_ops; i++)
4390 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4392 return negate ? gen_rtx_NEG (mode, result) : result;
4395 /* Make a binary operation by properly ordering the operands and
4396 seeing if the expression folds. */
4399 cse_gen_binary (code, mode, op0, op1)
4401 enum machine_mode mode;
4406 /* Put complex operands first and constants second if commutative. */
4407 if (GET_RTX_CLASS (code) == 'c'
4408 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4409 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4410 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4411 || (GET_CODE (op0) == SUBREG
4412 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4413 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4414 tem = op0, op0 = op1, op1 = tem;
4416 /* If this simplifies, do it. */
4417 tem = simplify_binary_operation (code, mode, op0, op1);
4422 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4423 just form the operation. */
4425 if (code == PLUS && GET_CODE (op1) == CONST_INT
4426 && GET_MODE (op0) != VOIDmode)
4427 return plus_constant (op0, INTVAL (op1));
4428 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4429 && GET_MODE (op0) != VOIDmode)
4430 return plus_constant (op0, - INTVAL (op1));
4432 return gen_rtx_fmt_ee (code, mode, op0, op1);
4435 /* Like simplify_binary_operation except used for relational operators.
4436 MODE is the mode of the operands, not that of the result. If MODE
4437 is VOIDmode, both operands must also be VOIDmode and we compare the
4438 operands in "infinite precision".
4440 If no simplification is possible, this function returns zero. Otherwise,
4441 it returns either const_true_rtx or const0_rtx. */
4444 simplify_relational_operation (code, mode, op0, op1)
4446 enum machine_mode mode;
4449 int equal, op0lt, op0ltu, op1lt, op1ltu;
4452 /* If op0 is a compare, extract the comparison arguments from it. */
4453 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4454 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4456 /* We can't simplify MODE_CC values since we don't know what the
4457 actual comparison is. */
4458 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4465 /* For integer comparisons of A and B maybe we can simplify A - B and can
4466 then simplify a comparison of that with zero. If A and B are both either
4467 a register or a CONST_INT, this can't help; testing for these cases will
4468 prevent infinite recursion here and speed things up.
4470 If CODE is an unsigned comparison, then we can never do this optimization,
4471 because it gives an incorrect result if the subtraction wraps around zero.
4472 ANSI C defines unsigned operations such that they never overflow, and
4473 thus such cases can not be ignored. */
4475 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4476 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4477 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4478 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4479 && code != GTU && code != GEU && code != LTU && code != LEU)
4480 return simplify_relational_operation (signed_condition (code),
4481 mode, tem, const0_rtx);
4483 /* For non-IEEE floating-point, if the two operands are equal, we know the
4485 if (rtx_equal_p (op0, op1)
4486 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4487 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4488 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4490 /* If the operands are floating-point constants, see if we can fold
4492 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4493 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4494 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4496 REAL_VALUE_TYPE d0, d1;
4499 if (setjmp (handler))
4502 set_float_handler (handler);
4503 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4504 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4505 equal = REAL_VALUES_EQUAL (d0, d1);
4506 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4507 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4508 set_float_handler (NULL_PTR);
4510 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4512 /* Otherwise, see if the operands are both integers. */
4513 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4514 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4515 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4517 int width = GET_MODE_BITSIZE (mode);
4518 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4519 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4521 /* Get the two words comprising each integer constant. */
4522 if (GET_CODE (op0) == CONST_DOUBLE)
4524 l0u = l0s = CONST_DOUBLE_LOW (op0);
4525 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4529 l0u = l0s = INTVAL (op0);
4530 h0u = h0s = l0s < 0 ? -1 : 0;
4533 if (GET_CODE (op1) == CONST_DOUBLE)
4535 l1u = l1s = CONST_DOUBLE_LOW (op1);
4536 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4540 l1u = l1s = INTVAL (op1);
4541 h1u = h1s = l1s < 0 ? -1 : 0;
4544 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4545 we have to sign or zero-extend the values. */
4546 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4547 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4549 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4551 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4552 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4554 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4555 l0s |= ((HOST_WIDE_INT) (-1) << width);
4557 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4558 l1s |= ((HOST_WIDE_INT) (-1) << width);
4561 equal = (h0u == h1u && l0u == l1u);
4562 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4563 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4564 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4565 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4568 /* Otherwise, there are some code-specific tests we can make. */
4574 /* References to the frame plus a constant or labels cannot
4575 be zero, but a SYMBOL_REF can due to #pragma weak. */
4576 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4577 || GET_CODE (op0) == LABEL_REF)
4578 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4579 /* On some machines, the ap reg can be 0 sometimes. */
4580 && op0 != arg_pointer_rtx
4587 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4588 || GET_CODE (op0) == LABEL_REF)
4589 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4590 && op0 != arg_pointer_rtx
4593 return const_true_rtx;
4597 /* Unsigned values are never negative. */
4598 if (op1 == const0_rtx)
4599 return const_true_rtx;
4603 if (op1 == const0_rtx)
4608 /* Unsigned values are never greater than the largest
4610 if (GET_CODE (op1) == CONST_INT
4611 && INTVAL (op1) == GET_MODE_MASK (mode)
4612 && INTEGRAL_MODE_P (mode))
4613 return const_true_rtx;
4617 if (GET_CODE (op1) == CONST_INT
4618 && INTVAL (op1) == GET_MODE_MASK (mode)
4619 && INTEGRAL_MODE_P (mode))
4630 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4635 return equal ? const_true_rtx : const0_rtx;
4637 return ! equal ? const_true_rtx : const0_rtx;
4639 return op0lt ? const_true_rtx : const0_rtx;
4641 return op1lt ? const_true_rtx : const0_rtx;
4643 return op0ltu ? const_true_rtx : const0_rtx;
4645 return op1ltu ? const_true_rtx : const0_rtx;
4647 return equal || op0lt ? const_true_rtx : const0_rtx;
4649 return equal || op1lt ? const_true_rtx : const0_rtx;
4651 return equal || op0ltu ? const_true_rtx : const0_rtx;
4653 return equal || op1ltu ? const_true_rtx : const0_rtx;
4659 /* Simplify CODE, an operation with result mode MODE and three operands,
4660 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4661 a constant. Return 0 if no simplifications is possible. */
4664 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4666 enum machine_mode mode, op0_mode;
4669 int width = GET_MODE_BITSIZE (mode);
4671 /* VOIDmode means "infinite" precision. */
4673 width = HOST_BITS_PER_WIDE_INT;
4679 if (GET_CODE (op0) == CONST_INT
4680 && GET_CODE (op1) == CONST_INT
4681 && GET_CODE (op2) == CONST_INT
4682 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4683 && width <= HOST_BITS_PER_WIDE_INT)
4685 /* Extracting a bit-field from a constant */
4686 HOST_WIDE_INT val = INTVAL (op0);
4688 if (BITS_BIG_ENDIAN)
4689 val >>= (GET_MODE_BITSIZE (op0_mode)
4690 - INTVAL (op2) - INTVAL (op1));
4692 val >>= INTVAL (op2);
4694 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4696 /* First zero-extend. */
4697 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4698 /* If desired, propagate sign bit. */
4699 if (code == SIGN_EXTRACT
4700 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4701 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4704 /* Clear the bits that don't belong in our mode,
4705 unless they and our sign bit are all one.
4706 So we get either a reasonable negative value or a reasonable
4707 unsigned value for this mode. */
4708 if (width < HOST_BITS_PER_WIDE_INT
4709 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4710 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4711 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4713 return GEN_INT (val);
4718 if (GET_CODE (op0) == CONST_INT)
4719 return op0 != const0_rtx ? op1 : op2;
4721 /* Convert a == b ? b : a to "a". */
4722 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4723 && rtx_equal_p (XEXP (op0, 0), op1)
4724 && rtx_equal_p (XEXP (op0, 1), op2))
4726 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4727 && rtx_equal_p (XEXP (op0, 1), op1)
4728 && rtx_equal_p (XEXP (op0, 0), op2))
4730 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4733 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4734 XEXP (op0, 0), XEXP (op0, 1));
4735 /* See if any simplifications were possible. */
4736 if (temp == const0_rtx)
4738 else if (temp == const1_rtx)
4750 /* If X is a nontrivial arithmetic operation on an argument
4751 for which a constant value can be determined, return
4752 the result of operating on that value, as a constant.
4753 Otherwise, return X, possibly with one or more operands
4754 modified by recursive calls to this function.
4756 If X is a register whose contents are known, we do NOT
4757 return those contents here. equiv_constant is called to
4760 INSN is the insn that we may be modifying. If it is 0, make a copy
4761 of X before modifying it. */
4768 register enum rtx_code code;
4769 register enum machine_mode mode;
4776 /* Folded equivalents of first two operands of X. */
4780 /* Constant equivalents of first three operands of X;
4781 0 when no such equivalent is known. */
4786 /* The mode of the first operand of X. We need this for sign and zero
4788 enum machine_mode mode_arg0;
4793 mode = GET_MODE (x);
4794 code = GET_CODE (x);
4803 /* No use simplifying an EXPR_LIST
4804 since they are used only for lists of args
4805 in a function call's REG_EQUAL note. */
4807 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4808 want to (e.g.,) make (addressof (const_int 0)) just because
4809 the location is known to be zero. */
4815 return prev_insn_cc0;
4819 /* If the next insn is a CODE_LABEL followed by a jump table,
4820 PC's value is a LABEL_REF pointing to that label. That
4821 lets us fold switch statements on the Vax. */
4822 if (insn && GET_CODE (insn) == JUMP_INSN)
4824 rtx next = next_nonnote_insn (insn);
4826 if (next && GET_CODE (next) == CODE_LABEL
4827 && NEXT_INSN (next) != 0
4828 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4829 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4830 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4831 return gen_rtx_LABEL_REF (Pmode, next);
4836 /* See if we previously assigned a constant value to this SUBREG. */
4837 if ((new = lookup_as_function (x, CONST_INT)) != 0
4838 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4841 /* If this is a paradoxical SUBREG, we have no idea what value the
4842 extra bits would have. However, if the operand is equivalent
4843 to a SUBREG whose operand is the same as our mode, and all the
4844 modes are within a word, we can just use the inner operand
4845 because these SUBREGs just say how to treat the register.
4847 Similarly if we find an integer constant. */
4849 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4851 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4852 struct table_elt *elt;
4854 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4855 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4856 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4858 for (elt = elt->first_same_value;
4859 elt; elt = elt->next_same_value)
4861 if (CONSTANT_P (elt->exp)
4862 && GET_MODE (elt->exp) == VOIDmode)
4865 if (GET_CODE (elt->exp) == SUBREG
4866 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4867 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4868 return copy_rtx (SUBREG_REG (elt->exp));
4874 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4875 We might be able to if the SUBREG is extracting a single word in an
4876 integral mode or extracting the low part. */
4878 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4879 const_arg0 = equiv_constant (folded_arg0);
4881 folded_arg0 = const_arg0;
4883 if (folded_arg0 != SUBREG_REG (x))
4887 if (GET_MODE_CLASS (mode) == MODE_INT
4888 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4889 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4890 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4891 GET_MODE (SUBREG_REG (x)));
4892 if (new == 0 && subreg_lowpart_p (x))
4893 new = gen_lowpart_if_possible (mode, folded_arg0);
4898 /* If this is a narrowing SUBREG and our operand is a REG, see if
4899 we can find an equivalence for REG that is an arithmetic operation
4900 in a wider mode where both operands are paradoxical SUBREGs
4901 from objects of our result mode. In that case, we couldn't report
4902 an equivalent value for that operation, since we don't know what the
4903 extra bits will be. But we can find an equivalence for this SUBREG
4904 by folding that operation is the narrow mode. This allows us to
4905 fold arithmetic in narrow modes when the machine only supports
4906 word-sized arithmetic.
4908 Also look for a case where we have a SUBREG whose operand is the
4909 same as our result. If both modes are smaller than a word, we
4910 are simply interpreting a register in different modes and we
4911 can use the inner value. */
4913 if (GET_CODE (folded_arg0) == REG
4914 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4915 && subreg_lowpart_p (x))
4917 struct table_elt *elt;
4919 /* We can use HASH here since we know that canon_hash won't be
4921 elt = lookup (folded_arg0,
4922 HASH (folded_arg0, GET_MODE (folded_arg0)),
4923 GET_MODE (folded_arg0));
4926 elt = elt->first_same_value;
4928 for (; elt; elt = elt->next_same_value)
4930 enum rtx_code eltcode = GET_CODE (elt->exp);
4932 /* Just check for unary and binary operations. */
4933 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4934 && GET_CODE (elt->exp) != SIGN_EXTEND
4935 && GET_CODE (elt->exp) != ZERO_EXTEND
4936 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4937 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4939 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4941 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4942 op0 = fold_rtx (op0, NULL_RTX);
4944 op0 = equiv_constant (op0);
4946 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4949 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4950 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4951 && eltcode != DIV && eltcode != MOD
4952 && eltcode != UDIV && eltcode != UMOD
4953 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4954 && eltcode != ROTATE && eltcode != ROTATERT
4955 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4956 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4958 || CONSTANT_P (XEXP (elt->exp, 0)))
4959 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4960 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4962 || CONSTANT_P (XEXP (elt->exp, 1))))
4964 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4965 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4967 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4968 op0 = fold_rtx (op0, NULL_RTX);
4971 op0 = equiv_constant (op0);
4973 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
4974 op1 = fold_rtx (op1, NULL_RTX);
4977 op1 = equiv_constant (op1);
4979 /* If we are looking for the low SImode part of
4980 (ashift:DI c (const_int 32)), it doesn't work
4981 to compute that in SImode, because a 32-bit shift
4982 in SImode is unpredictable. We know the value is 0. */
4984 && GET_CODE (elt->exp) == ASHIFT
4985 && GET_CODE (op1) == CONST_INT
4986 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
4988 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
4990 /* If the count fits in the inner mode's width,
4991 but exceeds the outer mode's width,
4992 the value will get truncated to 0
4996 /* If the count exceeds even the inner mode's width,
4997 don't fold this expression. */
5000 else if (op0 && op1)
5001 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5005 else if (GET_CODE (elt->exp) == SUBREG
5006 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5007 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5009 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5010 new = copy_rtx (SUBREG_REG (elt->exp));
5021 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5022 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5023 new = lookup_as_function (XEXP (x, 0), code);
5025 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5029 /* If we are not actually processing an insn, don't try to find the
5030 best address. Not only don't we care, but we could modify the
5031 MEM in an invalid way since we have no insn to validate against. */
5033 find_best_addr (insn, &XEXP (x, 0));
5036 /* Even if we don't fold in the insn itself,
5037 we can safely do so here, in hopes of getting a constant. */
5038 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5040 HOST_WIDE_INT offset = 0;
5042 if (GET_CODE (addr) == REG
5043 && REGNO_QTY_VALID_P (REGNO (addr))
5044 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
5045 && qty_const[reg_qty[REGNO (addr)]] != 0)
5046 addr = qty_const[reg_qty[REGNO (addr)]];
5048 /* If address is constant, split it into a base and integer offset. */
5049 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5051 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5052 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5054 base = XEXP (XEXP (addr, 0), 0);
5055 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5057 else if (GET_CODE (addr) == LO_SUM
5058 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5059 base = XEXP (addr, 1);
5060 else if (GET_CODE (addr) == ADDRESSOF)
5061 return change_address (x, VOIDmode, addr);
5063 /* If this is a constant pool reference, we can fold it into its
5064 constant to allow better value tracking. */
5065 if (base && GET_CODE (base) == SYMBOL_REF
5066 && CONSTANT_POOL_ADDRESS_P (base))
5068 rtx constant = get_pool_constant (base);
5069 enum machine_mode const_mode = get_pool_mode (base);
5072 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5073 constant_pool_entries_cost = COST (constant);
5075 /* If we are loading the full constant, we have an equivalence. */
5076 if (offset == 0 && mode == const_mode)
5079 /* If this actually isn't a constant (weird!), we can't do
5080 anything. Otherwise, handle the two most common cases:
5081 extracting a word from a multi-word constant, and extracting
5082 the low-order bits. Other cases don't seem common enough to
5084 if (! CONSTANT_P (constant))
5087 if (GET_MODE_CLASS (mode) == MODE_INT
5088 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5089 && offset % UNITS_PER_WORD == 0
5090 && (new = operand_subword (constant,
5091 offset / UNITS_PER_WORD,
5092 0, const_mode)) != 0)
5095 if (((BYTES_BIG_ENDIAN
5096 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5097 || (! BYTES_BIG_ENDIAN && offset == 0))
5098 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5102 /* If this is a reference to a label at a known position in a jump
5103 table, we also know its value. */
5104 if (base && GET_CODE (base) == LABEL_REF)
5106 rtx label = XEXP (base, 0);
5107 rtx table_insn = NEXT_INSN (label);
5109 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5110 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5112 rtx table = PATTERN (table_insn);
5115 && (offset / GET_MODE_SIZE (GET_MODE (table))
5116 < XVECLEN (table, 0)))
5117 return XVECEXP (table, 0,
5118 offset / GET_MODE_SIZE (GET_MODE (table)));
5120 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5121 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5123 rtx table = PATTERN (table_insn);
5126 && (offset / GET_MODE_SIZE (GET_MODE (table))
5127 < XVECLEN (table, 1)))
5129 offset /= GET_MODE_SIZE (GET_MODE (table));
5130 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5133 if (GET_MODE (table) != Pmode)
5134 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5136 /* Indicate this is a constant. This isn't a
5137 valid form of CONST, but it will only be used
5138 to fold the next insns and then discarded, so
5139 it should be safe. */
5140 return gen_rtx_CONST (GET_MODE (new), new);
5149 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5150 validate_change (insn, &XVECEXP (x, 3, i),
5151 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5161 mode_arg0 = VOIDmode;
5163 /* Try folding our operands.
5164 Then see which ones have constant values known. */
5166 fmt = GET_RTX_FORMAT (code);
5167 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5170 rtx arg = XEXP (x, i);
5171 rtx folded_arg = arg, const_arg = 0;
5172 enum machine_mode mode_arg = GET_MODE (arg);
5173 rtx cheap_arg, expensive_arg;
5174 rtx replacements[2];
5177 /* Most arguments are cheap, so handle them specially. */
5178 switch (GET_CODE (arg))
5181 /* This is the same as calling equiv_constant; it is duplicated
5183 if (REGNO_QTY_VALID_P (REGNO (arg))
5184 && qty_const[reg_qty[REGNO (arg)]] != 0
5185 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5186 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5188 = gen_lowpart_if_possible (GET_MODE (arg),
5189 qty_const[reg_qty[REGNO (arg)]]);
5202 folded_arg = prev_insn_cc0;
5203 mode_arg = prev_insn_cc0_mode;
5204 const_arg = equiv_constant (folded_arg);
5209 folded_arg = fold_rtx (arg, insn);
5210 const_arg = equiv_constant (folded_arg);
5213 /* For the first three operands, see if the operand
5214 is constant or equivalent to a constant. */
5218 folded_arg0 = folded_arg;
5219 const_arg0 = const_arg;
5220 mode_arg0 = mode_arg;
5223 folded_arg1 = folded_arg;
5224 const_arg1 = const_arg;
5227 const_arg2 = const_arg;
5231 /* Pick the least expensive of the folded argument and an
5232 equivalent constant argument. */
5233 if (const_arg == 0 || const_arg == folded_arg
5234 || COST (const_arg) > COST (folded_arg))
5235 cheap_arg = folded_arg, expensive_arg = const_arg;
5237 cheap_arg = const_arg, expensive_arg = folded_arg;
5239 /* Try to replace the operand with the cheapest of the two
5240 possibilities. If it doesn't work and this is either of the first
5241 two operands of a commutative operation, try swapping them.
5242 If THAT fails, try the more expensive, provided it is cheaper
5243 than what is already there. */
5245 if (cheap_arg == XEXP (x, i))
5248 if (insn == 0 && ! copied)
5254 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5256 j < 2 && replacements[j]
5257 && COST (replacements[j]) < COST (XEXP (x, i));
5260 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5263 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5265 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5266 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5268 if (apply_change_group ())
5270 /* Swap them back to be invalid so that this loop can
5271 continue and flag them to be swapped back later. */
5274 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5286 /* Don't try to fold inside of a vector of expressions.
5287 Doing nothing is harmless. */
5291 /* If a commutative operation, place a constant integer as the second
5292 operand unless the first operand is also a constant integer. Otherwise,
5293 place any constant second unless the first operand is also a constant. */
5295 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5297 if (must_swap || (const_arg0
5299 || (GET_CODE (const_arg0) == CONST_INT
5300 && GET_CODE (const_arg1) != CONST_INT))))
5302 register rtx tem = XEXP (x, 0);
5304 if (insn == 0 && ! copied)
5310 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5311 validate_change (insn, &XEXP (x, 1), tem, 1);
5312 if (apply_change_group ())
5314 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5315 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5320 /* If X is an arithmetic operation, see if we can simplify it. */
5322 switch (GET_RTX_CLASS (code))
5328 /* We can't simplify extension ops unless we know the
5330 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5331 && mode_arg0 == VOIDmode)
5334 /* If we had a CONST, strip it off and put it back later if we
5336 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5337 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5339 new = simplify_unary_operation (code, mode,
5340 const_arg0 ? const_arg0 : folded_arg0,
5342 if (new != 0 && is_const)
5343 new = gen_rtx_CONST (mode, new);
5348 /* See what items are actually being compared and set FOLDED_ARG[01]
5349 to those values and CODE to the actual comparison code. If any are
5350 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5351 do anything if both operands are already known to be constant. */
5353 if (const_arg0 == 0 || const_arg1 == 0)
5355 struct table_elt *p0, *p1;
5356 rtx true = const_true_rtx, false = const0_rtx;
5357 enum machine_mode mode_arg1;
5359 #ifdef FLOAT_STORE_FLAG_VALUE
5360 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5362 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5364 false = CONST0_RTX (mode);
5368 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5369 &mode_arg0, &mode_arg1);
5370 const_arg0 = equiv_constant (folded_arg0);
5371 const_arg1 = equiv_constant (folded_arg1);
5373 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5374 what kinds of things are being compared, so we can't do
5375 anything with this comparison. */
5377 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5380 /* If we do not now have two constants being compared, see
5381 if we can nevertheless deduce some things about the
5383 if (const_arg0 == 0 || const_arg1 == 0)
5385 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5386 non-explicit constant? These aren't zero, but we
5387 don't know their sign. */
5388 if (const_arg1 == const0_rtx
5389 && (NONZERO_BASE_PLUS_P (folded_arg0)
5390 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5392 || GET_CODE (folded_arg0) == SYMBOL_REF
5394 || GET_CODE (folded_arg0) == LABEL_REF
5395 || GET_CODE (folded_arg0) == CONST))
5399 else if (code == NE)
5403 /* See if the two operands are the same. We don't do this
5404 for IEEE floating-point since we can't assume x == x
5405 since x might be a NaN. */
5407 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5408 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5409 && (folded_arg0 == folded_arg1
5410 || (GET_CODE (folded_arg0) == REG
5411 && GET_CODE (folded_arg1) == REG
5412 && (reg_qty[REGNO (folded_arg0)]
5413 == reg_qty[REGNO (folded_arg1)]))
5414 || ((p0 = lookup (folded_arg0,
5415 (safe_hash (folded_arg0, mode_arg0)
5416 % NBUCKETS), mode_arg0))
5417 && (p1 = lookup (folded_arg1,
5418 (safe_hash (folded_arg1, mode_arg0)
5419 % NBUCKETS), mode_arg0))
5420 && p0->first_same_value == p1->first_same_value)))
5421 return ((code == EQ || code == LE || code == GE
5422 || code == LEU || code == GEU)
5425 /* If FOLDED_ARG0 is a register, see if the comparison we are
5426 doing now is either the same as we did before or the reverse
5427 (we only check the reverse if not floating-point). */
5428 else if (GET_CODE (folded_arg0) == REG)
5430 int qty = reg_qty[REGNO (folded_arg0)];
5432 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5433 && (comparison_dominates_p (qty_comparison_code[qty], code)
5434 || (comparison_dominates_p (qty_comparison_code[qty],
5435 reverse_condition (code))
5436 && ! FLOAT_MODE_P (mode_arg0)))
5437 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5439 && rtx_equal_p (qty_comparison_const[qty],
5441 || (GET_CODE (folded_arg1) == REG
5442 && (reg_qty[REGNO (folded_arg1)]
5443 == qty_comparison_qty[qty]))))
5444 return (comparison_dominates_p (qty_comparison_code[qty],
5451 /* If we are comparing against zero, see if the first operand is
5452 equivalent to an IOR with a constant. If so, we may be able to
5453 determine the result of this comparison. */
5455 if (const_arg1 == const0_rtx)
5457 rtx y = lookup_as_function (folded_arg0, IOR);
5461 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5462 && GET_CODE (inner_const) == CONST_INT
5463 && INTVAL (inner_const) != 0)
5465 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5466 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5467 && (INTVAL (inner_const)
5468 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5469 rtx true = const_true_rtx, false = const0_rtx;
5471 #ifdef FLOAT_STORE_FLAG_VALUE
5472 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5474 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5476 false = CONST0_RTX (mode);
5500 new = simplify_relational_operation (code, mode_arg0,
5501 const_arg0 ? const_arg0 : folded_arg0,
5502 const_arg1 ? const_arg1 : folded_arg1);
5503 #ifdef FLOAT_STORE_FLAG_VALUE
5504 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5505 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5506 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5515 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5516 with that LABEL_REF as its second operand. If so, the result is
5517 the first operand of that MINUS. This handles switches with an
5518 ADDR_DIFF_VEC table. */
5519 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5522 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5523 : lookup_as_function (folded_arg0, MINUS);
5525 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5526 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5529 /* Now try for a CONST of a MINUS like the above. */
5530 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5531 : lookup_as_function (folded_arg0, CONST))) != 0
5532 && GET_CODE (XEXP (y, 0)) == MINUS
5533 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5534 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5535 return XEXP (XEXP (y, 0), 0);
5538 /* Likewise if the operands are in the other order. */
5539 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5542 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5543 : lookup_as_function (folded_arg1, MINUS);
5545 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5546 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5549 /* Now try for a CONST of a MINUS like the above. */
5550 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5551 : lookup_as_function (folded_arg1, CONST))) != 0
5552 && GET_CODE (XEXP (y, 0)) == MINUS
5553 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5554 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5555 return XEXP (XEXP (y, 0), 0);
5558 /* If second operand is a register equivalent to a negative
5559 CONST_INT, see if we can find a register equivalent to the
5560 positive constant. Make a MINUS if so. Don't do this for
5561 a non-negative constant since we might then alternate between
5562 chosing positive and negative constants. Having the positive
5563 constant previously-used is the more common case. Be sure
5564 the resulting constant is non-negative; if const_arg1 were
5565 the smallest negative number this would overflow: depending
5566 on the mode, this would either just be the same value (and
5567 hence not save anything) or be incorrect. */
5568 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5569 && INTVAL (const_arg1) < 0
5570 && - INTVAL (const_arg1) >= 0
5571 && GET_CODE (folded_arg1) == REG)
5573 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5575 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5579 for (p = p->first_same_value; p; p = p->next_same_value)
5580 if (GET_CODE (p->exp) == REG)
5581 return cse_gen_binary (MINUS, mode, folded_arg0,
5582 canon_reg (p->exp, NULL_RTX));
5587 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5588 If so, produce (PLUS Z C2-C). */
5589 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5591 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5592 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5593 return fold_rtx (plus_constant (copy_rtx (y),
5594 -INTVAL (const_arg1)),
5598 /* ... fall through ... */
5601 case SMIN: case SMAX: case UMIN: case UMAX:
5602 case IOR: case AND: case XOR:
5603 case MULT: case DIV: case UDIV:
5604 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5605 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5606 is known to be of similar form, we may be able to replace the
5607 operation with a combined operation. This may eliminate the
5608 intermediate operation if every use is simplified in this way.
5609 Note that the similar optimization done by combine.c only works
5610 if the intermediate operation's result has only one reference. */
5612 if (GET_CODE (folded_arg0) == REG
5613 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5616 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5617 rtx y = lookup_as_function (folded_arg0, code);
5619 enum rtx_code associate_code;
5623 || 0 == (inner_const
5624 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5625 || GET_CODE (inner_const) != CONST_INT
5626 /* If we have compiled a statement like
5627 "if (x == (x & mask1))", and now are looking at
5628 "x & mask2", we will have a case where the first operand
5629 of Y is the same as our first operand. Unless we detect
5630 this case, an infinite loop will result. */
5631 || XEXP (y, 0) == folded_arg0)
5634 /* Don't associate these operations if they are a PLUS with the
5635 same constant and it is a power of two. These might be doable
5636 with a pre- or post-increment. Similarly for two subtracts of
5637 identical powers of two with post decrement. */
5639 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5641 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5642 || exact_log2 (INTVAL (const_arg1)) >= 0
5644 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5645 || exact_log2 (- INTVAL (const_arg1)) >= 0
5650 /* Compute the code used to compose the constants. For example,
5651 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5654 = (code == MULT || code == DIV || code == UDIV ? MULT
5655 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5657 new_const = simplify_binary_operation (associate_code, mode,
5658 const_arg1, inner_const);
5663 /* If we are associating shift operations, don't let this
5664 produce a shift of the size of the object or larger.
5665 This could occur when we follow a sign-extend by a right
5666 shift on a machine that does a sign-extend as a pair
5669 if (is_shift && GET_CODE (new_const) == CONST_INT
5670 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5672 /* As an exception, we can turn an ASHIFTRT of this
5673 form into a shift of the number of bits - 1. */
5674 if (code == ASHIFTRT)
5675 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5680 y = copy_rtx (XEXP (y, 0));
5682 /* If Y contains our first operand (the most common way this
5683 can happen is if Y is a MEM), we would do into an infinite
5684 loop if we tried to fold it. So don't in that case. */
5686 if (! reg_mentioned_p (folded_arg0, y))
5687 y = fold_rtx (y, insn);
5689 return cse_gen_binary (code, mode, y, new_const);
5697 new = simplify_binary_operation (code, mode,
5698 const_arg0 ? const_arg0 : folded_arg0,
5699 const_arg1 ? const_arg1 : folded_arg1);
5703 /* (lo_sum (high X) X) is simply X. */
5704 if (code == LO_SUM && const_arg0 != 0
5705 && GET_CODE (const_arg0) == HIGH
5706 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5712 new = simplify_ternary_operation (code, mode, mode_arg0,
5713 const_arg0 ? const_arg0 : folded_arg0,
5714 const_arg1 ? const_arg1 : folded_arg1,
5715 const_arg2 ? const_arg2 : XEXP (x, 2));
5719 return new ? new : x;
5722 /* Return a constant value currently equivalent to X.
5723 Return 0 if we don't know one. */
5729 if (GET_CODE (x) == REG
5730 && REGNO_QTY_VALID_P (REGNO (x))
5731 && qty_const[reg_qty[REGNO (x)]])
5732 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5734 if (x != 0 && CONSTANT_P (x))
5737 /* If X is a MEM, try to fold it outside the context of any insn to see if
5738 it might be equivalent to a constant. That handles the case where it
5739 is a constant-pool reference. Then try to look it up in the hash table
5740 in case it is something whose value we have seen before. */
5742 if (GET_CODE (x) == MEM)
5744 struct table_elt *elt;
5746 x = fold_rtx (x, NULL_RTX);
5750 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5754 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5755 if (elt->is_const && CONSTANT_P (elt->exp))
5762 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5763 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5764 least-significant part of X.
5765 MODE specifies how big a part of X to return.
5767 If the requested operation cannot be done, 0 is returned.
5769 This is similar to gen_lowpart in emit-rtl.c. */
5772 gen_lowpart_if_possible (mode, x)
5773 enum machine_mode mode;
5776 rtx result = gen_lowpart_common (mode, x);
5780 else if (GET_CODE (x) == MEM)
5782 /* This is the only other case we handle. */
5783 register int offset = 0;
5786 if (WORDS_BIG_ENDIAN)
5787 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5788 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5789 if (BYTES_BIG_ENDIAN)
5790 /* Adjust the address so that the address-after-the-data is
5792 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5793 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5794 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
5795 if (! memory_address_p (mode, XEXP (new, 0)))
5797 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5798 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5799 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5806 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5807 branch. It will be zero if not.
5809 In certain cases, this can cause us to add an equivalence. For example,
5810 if we are following the taken case of
5812 we can add the fact that `i' and '2' are now equivalent.
5814 In any case, we can record that this comparison was passed. If the same
5815 comparison is seen later, we will know its value. */
5818 record_jump_equiv (insn, taken)
5822 int cond_known_true;
5824 enum machine_mode mode, mode0, mode1;
5825 int reversed_nonequality = 0;
5828 /* Ensure this is the right kind of insn. */
5829 if (! condjump_p (insn) || simplejump_p (insn))
5832 /* See if this jump condition is known true or false. */
5834 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5836 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5838 /* Get the type of comparison being done and the operands being compared.
5839 If we had to reverse a non-equality condition, record that fact so we
5840 know that it isn't valid for floating-point. */
5841 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5842 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5843 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5845 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5846 if (! cond_known_true)
5848 reversed_nonequality = (code != EQ && code != NE);
5849 code = reverse_condition (code);
5852 /* The mode is the mode of the non-constant. */
5854 if (mode1 != VOIDmode)
5857 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5860 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5861 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5862 Make any useful entries we can with that information. Called from
5863 above function and called recursively. */
5866 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5868 enum machine_mode mode;
5870 int reversed_nonequality;
5872 unsigned op0_hash, op1_hash;
5873 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5874 struct table_elt *op0_elt, *op1_elt;
5876 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5877 we know that they are also equal in the smaller mode (this is also
5878 true for all smaller modes whether or not there is a SUBREG, but
5879 is not worth testing for with no SUBREG. */
5881 /* Note that GET_MODE (op0) may not equal MODE. */
5882 if (code == EQ && GET_CODE (op0) == SUBREG
5883 && (GET_MODE_SIZE (GET_MODE (op0))
5884 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5886 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5887 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5889 record_jump_cond (code, mode, SUBREG_REG (op0),
5890 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5891 reversed_nonequality);
5894 if (code == EQ && GET_CODE (op1) == SUBREG
5895 && (GET_MODE_SIZE (GET_MODE (op1))
5896 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5898 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5899 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5901 record_jump_cond (code, mode, SUBREG_REG (op1),
5902 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5903 reversed_nonequality);
5906 /* Similarly, if this is an NE comparison, and either is a SUBREG
5907 making a smaller mode, we know the whole thing is also NE. */
5909 /* Note that GET_MODE (op0) may not equal MODE;
5910 if we test MODE instead, we can get an infinite recursion
5911 alternating between two modes each wider than MODE. */
5913 if (code == NE && GET_CODE (op0) == SUBREG
5914 && subreg_lowpart_p (op0)
5915 && (GET_MODE_SIZE (GET_MODE (op0))
5916 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5918 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5919 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5921 record_jump_cond (code, mode, SUBREG_REG (op0),
5922 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5923 reversed_nonequality);
5926 if (code == NE && GET_CODE (op1) == SUBREG
5927 && subreg_lowpart_p (op1)
5928 && (GET_MODE_SIZE (GET_MODE (op1))
5929 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5931 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5932 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5934 record_jump_cond (code, mode, SUBREG_REG (op1),
5935 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5936 reversed_nonequality);
5939 /* Hash both operands. */
5942 hash_arg_in_memory = 0;
5943 hash_arg_in_struct = 0;
5944 op0_hash = HASH (op0, mode);
5945 op0_in_memory = hash_arg_in_memory;
5946 op0_in_struct = hash_arg_in_struct;
5952 hash_arg_in_memory = 0;
5953 hash_arg_in_struct = 0;
5954 op1_hash = HASH (op1, mode);
5955 op1_in_memory = hash_arg_in_memory;
5956 op1_in_struct = hash_arg_in_struct;
5961 /* Look up both operands. */
5962 op0_elt = lookup (op0, op0_hash, mode);
5963 op1_elt = lookup (op1, op1_hash, mode);
5965 /* If both operands are already equivalent or if they are not in the
5966 table but are identical, do nothing. */
5967 if ((op0_elt != 0 && op1_elt != 0
5968 && op0_elt->first_same_value == op1_elt->first_same_value)
5969 || op0 == op1 || rtx_equal_p (op0, op1))
5972 /* If we aren't setting two things equal all we can do is save this
5973 comparison. Similarly if this is floating-point. In the latter
5974 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5975 If we record the equality, we might inadvertently delete code
5976 whose intent was to change -0 to +0. */
5978 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
5980 /* If we reversed a floating-point comparison, if OP0 is not a
5981 register, or if OP1 is neither a register or constant, we can't
5984 if (GET_CODE (op1) != REG)
5985 op1 = equiv_constant (op1);
5987 if ((reversed_nonequality && FLOAT_MODE_P (mode))
5988 || GET_CODE (op0) != REG || op1 == 0)
5991 /* Put OP0 in the hash table if it isn't already. This gives it a
5992 new quantity number. */
5995 if (insert_regs (op0, NULL_PTR, 0))
5997 rehash_using_reg (op0);
5998 op0_hash = HASH (op0, mode);
6000 /* If OP0 is contained in OP1, this changes its hash code
6001 as well. Faster to rehash than to check, except
6002 for the simple case of a constant. */
6003 if (! CONSTANT_P (op1))
6004 op1_hash = HASH (op1,mode);
6007 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6008 op0_elt->in_memory = op0_in_memory;
6009 op0_elt->in_struct = op0_in_struct;
6012 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
6013 if (GET_CODE (op1) == REG)
6015 /* Look it up again--in case op0 and op1 are the same. */
6016 op1_elt = lookup (op1, op1_hash, mode);
6018 /* Put OP1 in the hash table so it gets a new quantity number. */
6021 if (insert_regs (op1, NULL_PTR, 0))
6023 rehash_using_reg (op1);
6024 op1_hash = HASH (op1, mode);
6027 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6028 op1_elt->in_memory = op1_in_memory;
6029 op1_elt->in_struct = op1_in_struct;
6032 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
6033 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
6037 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
6038 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
6044 /* If either side is still missing an equivalence, make it now,
6045 then merge the equivalences. */
6049 if (insert_regs (op0, NULL_PTR, 0))
6051 rehash_using_reg (op0);
6052 op0_hash = HASH (op0, mode);
6055 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6056 op0_elt->in_memory = op0_in_memory;
6057 op0_elt->in_struct = op0_in_struct;
6062 if (insert_regs (op1, NULL_PTR, 0))
6064 rehash_using_reg (op1);
6065 op1_hash = HASH (op1, mode);
6068 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6069 op1_elt->in_memory = op1_in_memory;
6070 op1_elt->in_struct = op1_in_struct;
6073 merge_equiv_classes (op0_elt, op1_elt);
6074 last_jump_equiv_class = op0_elt;
6077 /* CSE processing for one instruction.
6078 First simplify sources and addresses of all assignments
6079 in the instruction, using previously-computed equivalents values.
6080 Then install the new sources and destinations in the table
6081 of available values.
6083 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6086 /* Data on one SET contained in the instruction. */
6090 /* The SET rtx itself. */
6092 /* The SET_SRC of the rtx (the original value, if it is changing). */
6094 /* The hash-table element for the SET_SRC of the SET. */
6095 struct table_elt *src_elt;
6096 /* Hash value for the SET_SRC. */
6098 /* Hash value for the SET_DEST. */
6100 /* The SET_DEST, with SUBREG, etc., stripped. */
6102 /* Place where the pointer to the INNER_DEST was found. */
6103 rtx *inner_dest_loc;
6104 /* Nonzero if the SET_SRC is in memory. */
6106 /* Nonzero if the SET_SRC is in a structure. */
6108 /* Nonzero if the SET_SRC contains something
6109 whose value cannot be predicted and understood. */
6111 /* Original machine mode, in case it becomes a CONST_INT. */
6112 enum machine_mode mode;
6113 /* A constant equivalent for SET_SRC, if any. */
6115 /* Hash value of constant equivalent for SET_SRC. */
6116 unsigned src_const_hash;
6117 /* Table entry for constant equivalent for SET_SRC, if any. */
6118 struct table_elt *src_const_elt;
6122 cse_insn (insn, in_libcall_block)
6124 int in_libcall_block;
6126 register rtx x = PATTERN (insn);
6129 register int n_sets = 0;
6132 /* Records what this insn does to set CC0. */
6133 rtx this_insn_cc0 = 0;
6134 enum machine_mode this_insn_cc0_mode = VOIDmode;
6138 struct table_elt *src_eqv_elt = 0;
6139 int src_eqv_volatile;
6140 int src_eqv_in_memory;
6141 int src_eqv_in_struct;
6142 unsigned src_eqv_hash;
6148 /* Find all the SETs and CLOBBERs in this instruction.
6149 Record all the SETs in the array `set' and count them.
6150 Also determine whether there is a CLOBBER that invalidates
6151 all memory references, or all references at varying addresses. */
6153 if (GET_CODE (insn) == CALL_INSN)
6155 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6156 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6157 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6160 if (GET_CODE (x) == SET)
6162 sets = (struct set *) alloca (sizeof (struct set));
6165 /* Ignore SETs that are unconditional jumps.
6166 They never need cse processing, so this does not hurt.
6167 The reason is not efficiency but rather
6168 so that we can test at the end for instructions
6169 that have been simplified to unconditional jumps
6170 and not be misled by unchanged instructions
6171 that were unconditional jumps to begin with. */
6172 if (SET_DEST (x) == pc_rtx
6173 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6176 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6177 The hard function value register is used only once, to copy to
6178 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6179 Ensure we invalidate the destination register. On the 80386 no
6180 other code would invalidate it since it is a fixed_reg.
6181 We need not check the return of apply_change_group; see canon_reg. */
6183 else if (GET_CODE (SET_SRC (x)) == CALL)
6185 canon_reg (SET_SRC (x), insn);
6186 apply_change_group ();
6187 fold_rtx (SET_SRC (x), insn);
6188 invalidate (SET_DEST (x), VOIDmode);
6193 else if (GET_CODE (x) == PARALLEL)
6195 register int lim = XVECLEN (x, 0);
6197 sets = (struct set *) alloca (lim * sizeof (struct set));
6199 /* Find all regs explicitly clobbered in this insn,
6200 and ensure they are not replaced with any other regs
6201 elsewhere in this insn.
6202 When a reg that is clobbered is also used for input,
6203 we should presume that that is for a reason,
6204 and we should not substitute some other register
6205 which is not supposed to be clobbered.
6206 Therefore, this loop cannot be merged into the one below
6207 because a CALL may precede a CLOBBER and refer to the
6208 value clobbered. We must not let a canonicalization do
6209 anything in that case. */
6210 for (i = 0; i < lim; i++)
6212 register rtx y = XVECEXP (x, 0, i);
6213 if (GET_CODE (y) == CLOBBER)
6215 rtx clobbered = XEXP (y, 0);
6217 if (GET_CODE (clobbered) == REG
6218 || GET_CODE (clobbered) == SUBREG)
6219 invalidate (clobbered, VOIDmode);
6220 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6221 || GET_CODE (clobbered) == ZERO_EXTRACT)
6222 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6226 for (i = 0; i < lim; i++)
6228 register rtx y = XVECEXP (x, 0, i);
6229 if (GET_CODE (y) == SET)
6231 /* As above, we ignore unconditional jumps and call-insns and
6232 ignore the result of apply_change_group. */
6233 if (GET_CODE (SET_SRC (y)) == CALL)
6235 canon_reg (SET_SRC (y), insn);
6236 apply_change_group ();
6237 fold_rtx (SET_SRC (y), insn);
6238 invalidate (SET_DEST (y), VOIDmode);
6240 else if (SET_DEST (y) == pc_rtx
6241 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6244 sets[n_sets++].rtl = y;
6246 else if (GET_CODE (y) == CLOBBER)
6248 /* If we clobber memory, canon the address.
6249 This does nothing when a register is clobbered
6250 because we have already invalidated the reg. */
6251 if (GET_CODE (XEXP (y, 0)) == MEM)
6252 canon_reg (XEXP (y, 0), NULL_RTX);
6254 else if (GET_CODE (y) == USE
6255 && ! (GET_CODE (XEXP (y, 0)) == REG
6256 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6257 canon_reg (y, NULL_RTX);
6258 else if (GET_CODE (y) == CALL)
6260 /* The result of apply_change_group can be ignored; see
6262 canon_reg (y, insn);
6263 apply_change_group ();
6268 else if (GET_CODE (x) == CLOBBER)
6270 if (GET_CODE (XEXP (x, 0)) == MEM)
6271 canon_reg (XEXP (x, 0), NULL_RTX);
6274 /* Canonicalize a USE of a pseudo register or memory location. */
6275 else if (GET_CODE (x) == USE
6276 && ! (GET_CODE (XEXP (x, 0)) == REG
6277 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6278 canon_reg (XEXP (x, 0), NULL_RTX);
6279 else if (GET_CODE (x) == CALL)
6281 /* The result of apply_change_group can be ignored; see canon_reg. */
6282 canon_reg (x, insn);
6283 apply_change_group ();
6287 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6288 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6289 is handled specially for this case, and if it isn't set, then there will
6290 be no equivalence for the destination. */
6291 if (n_sets == 1 && REG_NOTES (insn) != 0
6292 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6293 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6294 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6295 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6297 /* Canonicalize sources and addresses of destinations.
6298 We do this in a separate pass to avoid problems when a MATCH_DUP is
6299 present in the insn pattern. In that case, we want to ensure that
6300 we don't break the duplicate nature of the pattern. So we will replace
6301 both operands at the same time. Otherwise, we would fail to find an
6302 equivalent substitution in the loop calling validate_change below.
6304 We used to suppress canonicalization of DEST if it appears in SRC,
6305 but we don't do this any more. */
6307 for (i = 0; i < n_sets; i++)
6309 rtx dest = SET_DEST (sets[i].rtl);
6310 rtx src = SET_SRC (sets[i].rtl);
6311 rtx new = canon_reg (src, insn);
6314 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6315 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6316 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6317 || (insn_code = recog_memoized (insn)) < 0
6318 || insn_n_dups[insn_code] > 0)
6319 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6321 SET_SRC (sets[i].rtl) = new;
6323 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6325 validate_change (insn, &XEXP (dest, 1),
6326 canon_reg (XEXP (dest, 1), insn), 1);
6327 validate_change (insn, &XEXP (dest, 2),
6328 canon_reg (XEXP (dest, 2), insn), 1);
6331 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6332 || GET_CODE (dest) == ZERO_EXTRACT
6333 || GET_CODE (dest) == SIGN_EXTRACT)
6334 dest = XEXP (dest, 0);
6336 if (GET_CODE (dest) == MEM)
6337 canon_reg (dest, insn);
6340 /* Now that we have done all the replacements, we can apply the change
6341 group and see if they all work. Note that this will cause some
6342 canonicalizations that would have worked individually not to be applied
6343 because some other canonicalization didn't work, but this should not
6346 The result of apply_change_group can be ignored; see canon_reg. */
6348 apply_change_group ();
6350 /* Set sets[i].src_elt to the class each source belongs to.
6351 Detect assignments from or to volatile things
6352 and set set[i] to zero so they will be ignored
6353 in the rest of this function.
6355 Nothing in this loop changes the hash table or the register chains. */
6357 for (i = 0; i < n_sets; i++)
6359 register rtx src, dest;
6360 register rtx src_folded;
6361 register struct table_elt *elt = 0, *p;
6362 enum machine_mode mode;
6365 rtx src_related = 0;
6366 struct table_elt *src_const_elt = 0;
6367 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6368 int src_related_cost = 10000, src_elt_cost = 10000;
6369 /* Set non-zero if we need to call force_const_mem on with the
6370 contents of src_folded before using it. */
6371 int src_folded_force_flag = 0;
6373 dest = SET_DEST (sets[i].rtl);
6374 src = SET_SRC (sets[i].rtl);
6376 /* If SRC is a constant that has no machine mode,
6377 hash it with the destination's machine mode.
6378 This way we can keep different modes separate. */
6380 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6381 sets[i].mode = mode;
6385 enum machine_mode eqvmode = mode;
6386 if (GET_CODE (dest) == STRICT_LOW_PART)
6387 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6389 hash_arg_in_memory = 0;
6390 hash_arg_in_struct = 0;
6391 src_eqv = fold_rtx (src_eqv, insn);
6392 src_eqv_hash = HASH (src_eqv, eqvmode);
6394 /* Find the equivalence class for the equivalent expression. */
6397 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6399 src_eqv_volatile = do_not_record;
6400 src_eqv_in_memory = hash_arg_in_memory;
6401 src_eqv_in_struct = hash_arg_in_struct;
6404 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6405 value of the INNER register, not the destination. So it is not
6406 a valid substitution for the source. But save it for later. */
6407 if (GET_CODE (dest) == STRICT_LOW_PART)
6410 src_eqv_here = src_eqv;
6412 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6413 simplified result, which may not necessarily be valid. */
6414 src_folded = fold_rtx (src, insn);
6417 /* ??? This caused bad code to be generated for the m68k port with -O2.
6418 Suppose src is (CONST_INT -1), and that after truncation src_folded
6419 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6420 At the end we will add src and src_const to the same equivalence
6421 class. We now have 3 and -1 on the same equivalence class. This
6422 causes later instructions to be mis-optimized. */
6423 /* If storing a constant in a bitfield, pre-truncate the constant
6424 so we will be able to record it later. */
6425 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6426 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6428 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6430 if (GET_CODE (src) == CONST_INT
6431 && GET_CODE (width) == CONST_INT
6432 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6433 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6435 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6436 << INTVAL (width)) - 1));
6440 /* Compute SRC's hash code, and also notice if it
6441 should not be recorded at all. In that case,
6442 prevent any further processing of this assignment. */
6444 hash_arg_in_memory = 0;
6445 hash_arg_in_struct = 0;
6448 sets[i].src_hash = HASH (src, mode);
6449 sets[i].src_volatile = do_not_record;
6450 sets[i].src_in_memory = hash_arg_in_memory;
6451 sets[i].src_in_struct = hash_arg_in_struct;
6453 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6454 a pseudo that is set more than once, do not record SRC. Using
6455 SRC as a replacement for anything else will be incorrect in that
6456 situation. Note that this usually occurs only for stack slots,
6457 in which case all the RTL would be referring to SRC, so we don't
6458 lose any optimization opportunities by not having SRC in the
6461 if (GET_CODE (src) == MEM
6462 && find_reg_note (insn, REG_EQUIV, src) != 0
6463 && GET_CODE (dest) == REG
6464 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6465 && REG_N_SETS (REGNO (dest)) != 1)
6466 sets[i].src_volatile = 1;
6469 /* It is no longer clear why we used to do this, but it doesn't
6470 appear to still be needed. So let's try without it since this
6471 code hurts cse'ing widened ops. */
6472 /* If source is a perverse subreg (such as QI treated as an SI),
6473 treat it as volatile. It may do the work of an SI in one context
6474 where the extra bits are not being used, but cannot replace an SI
6476 if (GET_CODE (src) == SUBREG
6477 && (GET_MODE_SIZE (GET_MODE (src))
6478 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6479 sets[i].src_volatile = 1;
6482 /* Locate all possible equivalent forms for SRC. Try to replace
6483 SRC in the insn with each cheaper equivalent.
6485 We have the following types of equivalents: SRC itself, a folded
6486 version, a value given in a REG_EQUAL note, or a value related
6489 Each of these equivalents may be part of an additional class
6490 of equivalents (if more than one is in the table, they must be in
6491 the same class; we check for this).
6493 If the source is volatile, we don't do any table lookups.
6495 We note any constant equivalent for possible later use in a
6498 if (!sets[i].src_volatile)
6499 elt = lookup (src, sets[i].src_hash, mode);
6501 sets[i].src_elt = elt;
6503 if (elt && src_eqv_here && src_eqv_elt)
6505 if (elt->first_same_value != src_eqv_elt->first_same_value)
6507 /* The REG_EQUAL is indicating that two formerly distinct
6508 classes are now equivalent. So merge them. */
6509 merge_equiv_classes (elt, src_eqv_elt);
6510 src_eqv_hash = HASH (src_eqv, elt->mode);
6511 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6517 else if (src_eqv_elt)
6520 /* Try to find a constant somewhere and record it in `src_const'.
6521 Record its table element, if any, in `src_const_elt'. Look in
6522 any known equivalences first. (If the constant is not in the
6523 table, also set `sets[i].src_const_hash'). */
6525 for (p = elt->first_same_value; p; p = p->next_same_value)
6529 src_const_elt = elt;
6534 && (CONSTANT_P (src_folded)
6535 /* Consider (minus (label_ref L1) (label_ref L2)) as
6536 "constant" here so we will record it. This allows us
6537 to fold switch statements when an ADDR_DIFF_VEC is used. */
6538 || (GET_CODE (src_folded) == MINUS
6539 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6540 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6541 src_const = src_folded, src_const_elt = elt;
6542 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6543 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6545 /* If we don't know if the constant is in the table, get its
6546 hash code and look it up. */
6547 if (src_const && src_const_elt == 0)
6549 sets[i].src_const_hash = HASH (src_const, mode);
6550 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6553 sets[i].src_const = src_const;
6554 sets[i].src_const_elt = src_const_elt;
6556 /* If the constant and our source are both in the table, mark them as
6557 equivalent. Otherwise, if a constant is in the table but the source
6558 isn't, set ELT to it. */
6559 if (src_const_elt && elt
6560 && src_const_elt->first_same_value != elt->first_same_value)
6561 merge_equiv_classes (elt, src_const_elt);
6562 else if (src_const_elt && elt == 0)
6563 elt = src_const_elt;
6565 /* See if there is a register linearly related to a constant
6566 equivalent of SRC. */
6568 && (GET_CODE (src_const) == CONST
6569 || (src_const_elt && src_const_elt->related_value != 0)))
6571 src_related = use_related_value (src_const, src_const_elt);
6574 struct table_elt *src_related_elt
6575 = lookup (src_related, HASH (src_related, mode), mode);
6576 if (src_related_elt && elt)
6578 if (elt->first_same_value
6579 != src_related_elt->first_same_value)
6580 /* This can occur when we previously saw a CONST
6581 involving a SYMBOL_REF and then see the SYMBOL_REF
6582 twice. Merge the involved classes. */
6583 merge_equiv_classes (elt, src_related_elt);
6586 src_related_elt = 0;
6588 else if (src_related_elt && elt == 0)
6589 elt = src_related_elt;
6593 /* See if we have a CONST_INT that is already in a register in a
6596 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6597 && GET_MODE_CLASS (mode) == MODE_INT
6598 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6600 enum machine_mode wider_mode;
6602 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6603 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6604 && src_related == 0;
6605 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6607 struct table_elt *const_elt
6608 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6613 for (const_elt = const_elt->first_same_value;
6614 const_elt; const_elt = const_elt->next_same_value)
6615 if (GET_CODE (const_elt->exp) == REG)
6617 src_related = gen_lowpart_if_possible (mode,
6624 /* Another possibility is that we have an AND with a constant in
6625 a mode narrower than a word. If so, it might have been generated
6626 as part of an "if" which would narrow the AND. If we already
6627 have done the AND in a wider mode, we can use a SUBREG of that
6630 if (flag_expensive_optimizations && ! src_related
6631 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6632 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6634 enum machine_mode tmode;
6635 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6637 for (tmode = GET_MODE_WIDER_MODE (mode);
6638 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6639 tmode = GET_MODE_WIDER_MODE (tmode))
6641 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6642 struct table_elt *larger_elt;
6646 PUT_MODE (new_and, tmode);
6647 XEXP (new_and, 0) = inner;
6648 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6649 if (larger_elt == 0)
6652 for (larger_elt = larger_elt->first_same_value;
6653 larger_elt; larger_elt = larger_elt->next_same_value)
6654 if (GET_CODE (larger_elt->exp) == REG)
6657 = gen_lowpart_if_possible (mode, larger_elt->exp);
6667 #ifdef LOAD_EXTEND_OP
6668 /* See if a MEM has already been loaded with a widening operation;
6669 if it has, we can use a subreg of that. Many CISC machines
6670 also have such operations, but this is only likely to be
6671 beneficial these machines. */
6673 if (flag_expensive_optimizations && src_related == 0
6674 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6675 && GET_MODE_CLASS (mode) == MODE_INT
6676 && GET_CODE (src) == MEM && ! do_not_record
6677 && LOAD_EXTEND_OP (mode) != NIL)
6679 enum machine_mode tmode;
6681 /* Set what we are trying to extend and the operation it might
6682 have been extended with. */
6683 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6684 XEXP (memory_extend_rtx, 0) = src;
6686 for (tmode = GET_MODE_WIDER_MODE (mode);
6687 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6688 tmode = GET_MODE_WIDER_MODE (tmode))
6690 struct table_elt *larger_elt;
6692 PUT_MODE (memory_extend_rtx, tmode);
6693 larger_elt = lookup (memory_extend_rtx,
6694 HASH (memory_extend_rtx, tmode), tmode);
6695 if (larger_elt == 0)
6698 for (larger_elt = larger_elt->first_same_value;
6699 larger_elt; larger_elt = larger_elt->next_same_value)
6700 if (GET_CODE (larger_elt->exp) == REG)
6702 src_related = gen_lowpart_if_possible (mode,
6711 #endif /* LOAD_EXTEND_OP */
6713 if (src == src_folded)
6716 /* At this point, ELT, if non-zero, points to a class of expressions
6717 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6718 and SRC_RELATED, if non-zero, each contain additional equivalent
6719 expressions. Prune these latter expressions by deleting expressions
6720 already in the equivalence class.
6722 Check for an equivalent identical to the destination. If found,
6723 this is the preferred equivalent since it will likely lead to
6724 elimination of the insn. Indicate this by placing it in
6727 if (elt) elt = elt->first_same_value;
6728 for (p = elt; p; p = p->next_same_value)
6730 enum rtx_code code = GET_CODE (p->exp);
6732 /* If the expression is not valid, ignore it. Then we do not
6733 have to check for validity below. In most cases, we can use
6734 `rtx_equal_p', since canonicalization has already been done. */
6735 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6738 /* Also skip paradoxical subregs, unless that's what we're
6741 && (GET_MODE_SIZE (GET_MODE (p->exp))
6742 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6744 && GET_CODE (src) == SUBREG
6745 && GET_MODE (src) == GET_MODE (p->exp)
6746 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6747 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
6750 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6752 else if (src_folded && GET_CODE (src_folded) == code
6753 && rtx_equal_p (src_folded, p->exp))
6755 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6756 && rtx_equal_p (src_eqv_here, p->exp))
6758 else if (src_related && GET_CODE (src_related) == code
6759 && rtx_equal_p (src_related, p->exp))
6762 /* This is the same as the destination of the insns, we want
6763 to prefer it. Copy it to src_related. The code below will
6764 then give it a negative cost. */
6765 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6770 /* Find the cheapest valid equivalent, trying all the available
6771 possibilities. Prefer items not in the hash table to ones
6772 that are when they are equal cost. Note that we can never
6773 worsen an insn as the current contents will also succeed.
6774 If we find an equivalent identical to the destination, use it as best,
6775 since this insn will probably be eliminated in that case. */
6778 if (rtx_equal_p (src, dest))
6781 src_cost = COST (src);
6786 if (rtx_equal_p (src_eqv_here, dest))
6789 src_eqv_cost = COST (src_eqv_here);
6794 if (rtx_equal_p (src_folded, dest))
6795 src_folded_cost = -1;
6797 src_folded_cost = COST (src_folded);
6802 if (rtx_equal_p (src_related, dest))
6803 src_related_cost = -1;
6805 src_related_cost = COST (src_related);
6808 /* If this was an indirect jump insn, a known label will really be
6809 cheaper even though it looks more expensive. */
6810 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6811 src_folded = src_const, src_folded_cost = -1;
6813 /* Terminate loop when replacement made. This must terminate since
6814 the current contents will be tested and will always be valid. */
6819 /* Skip invalid entries. */
6820 while (elt && GET_CODE (elt->exp) != REG
6821 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6822 elt = elt->next_same_value;
6824 /* A paradoxical subreg would be bad here: it'll be the right
6825 size, but later may be adjusted so that the upper bits aren't
6826 what we want. So reject it. */
6828 && GET_CODE (elt->exp) == SUBREG
6829 && (GET_MODE_SIZE (GET_MODE (elt->exp))
6830 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
6831 /* It is okay, though, if the rtx we're trying to match
6832 will ignore any of the bits we can't predict. */
6834 && GET_CODE (src) == SUBREG
6835 && GET_MODE (src) == GET_MODE (elt->exp)
6836 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6837 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
6839 elt = elt->next_same_value;
6843 if (elt) src_elt_cost = elt->cost;
6845 /* Find cheapest and skip it for the next time. For items
6846 of equal cost, use this order:
6847 src_folded, src, src_eqv, src_related and hash table entry. */
6848 if (src_folded_cost <= src_cost
6849 && src_folded_cost <= src_eqv_cost
6850 && src_folded_cost <= src_related_cost
6851 && src_folded_cost <= src_elt_cost)
6853 trial = src_folded, src_folded_cost = 10000;
6854 if (src_folded_force_flag)
6855 trial = force_const_mem (mode, trial);
6857 else if (src_cost <= src_eqv_cost
6858 && src_cost <= src_related_cost
6859 && src_cost <= src_elt_cost)
6860 trial = src, src_cost = 10000;
6861 else if (src_eqv_cost <= src_related_cost
6862 && src_eqv_cost <= src_elt_cost)
6863 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6864 else if (src_related_cost <= src_elt_cost)
6865 trial = copy_rtx (src_related), src_related_cost = 10000;
6868 trial = copy_rtx (elt->exp);
6869 elt = elt->next_same_value;
6870 src_elt_cost = 10000;
6873 /* We don't normally have an insn matching (set (pc) (pc)), so
6874 check for this separately here. We will delete such an
6877 Tablejump insns contain a USE of the table, so simply replacing
6878 the operand with the constant won't match. This is simply an
6879 unconditional branch, however, and is therefore valid. Just
6880 insert the substitution here and we will delete and re-emit
6883 if (n_sets == 1 && dest == pc_rtx
6885 || (GET_CODE (trial) == LABEL_REF
6886 && ! condjump_p (insn))))
6888 /* If TRIAL is a label in front of a jump table, we are
6889 really falling through the switch (this is how casesi
6890 insns work), so we must branch around the table. */
6891 if (GET_CODE (trial) == CODE_LABEL
6892 && NEXT_INSN (trial) != 0
6893 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6894 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6895 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6897 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
6899 SET_SRC (sets[i].rtl) = trial;
6900 cse_jumps_altered = 1;
6904 /* Look for a substitution that makes a valid insn. */
6905 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6907 /* The result of apply_change_group can be ignored; see
6910 validate_change (insn, &SET_SRC (sets[i].rtl),
6911 canon_reg (SET_SRC (sets[i].rtl), insn),
6913 apply_change_group ();
6917 /* If we previously found constant pool entries for
6918 constants and this is a constant, try making a
6919 pool entry. Put it in src_folded unless we already have done
6920 this since that is where it likely came from. */
6922 else if (constant_pool_entries_cost
6923 && CONSTANT_P (trial)
6924 && ! (GET_CODE (trial) == CONST
6925 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
6927 || (GET_CODE (src_folded) != MEM
6928 && ! src_folded_force_flag))
6929 && GET_MODE_CLASS (mode) != MODE_CC
6930 && mode != VOIDmode)
6932 src_folded_force_flag = 1;
6934 src_folded_cost = constant_pool_entries_cost;
6938 src = SET_SRC (sets[i].rtl);
6940 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6941 However, there is an important exception: If both are registers
6942 that are not the head of their equivalence class, replace SET_SRC
6943 with the head of the class. If we do not do this, we will have
6944 both registers live over a portion of the basic block. This way,
6945 their lifetimes will likely abut instead of overlapping. */
6946 if (GET_CODE (dest) == REG
6947 && REGNO_QTY_VALID_P (REGNO (dest))
6948 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6949 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6950 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6951 /* Don't do this if the original insn had a hard reg as
6953 && (GET_CODE (sets[i].src) != REG
6954 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6955 /* We can't call canon_reg here because it won't do anything if
6956 SRC is a hard register. */
6958 int first = qty_first_reg[reg_qty[REGNO (src)]];
6960 src = SET_SRC (sets[i].rtl)
6961 = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6962 : gen_rtx_REG (GET_MODE (src), first);
6964 /* If we had a constant that is cheaper than what we are now
6965 setting SRC to, use that constant. We ignored it when we
6966 thought we could make this into a no-op. */
6967 if (src_const && COST (src_const) < COST (src)
6968 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6972 /* If we made a change, recompute SRC values. */
6973 if (src != sets[i].src)
6976 hash_arg_in_memory = 0;
6977 hash_arg_in_struct = 0;
6979 sets[i].src_hash = HASH (src, mode);
6980 sets[i].src_volatile = do_not_record;
6981 sets[i].src_in_memory = hash_arg_in_memory;
6982 sets[i].src_in_struct = hash_arg_in_struct;
6983 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
6986 /* If this is a single SET, we are setting a register, and we have an
6987 equivalent constant, we want to add a REG_NOTE. We don't want
6988 to write a REG_EQUAL note for a constant pseudo since verifying that
6989 that pseudo hasn't been eliminated is a pain. Such a note also
6990 won't help anything. */
6991 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
6992 && GET_CODE (src_const) != REG)
6994 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6996 /* Record the actual constant value in a REG_EQUAL note, making
6997 a new one if one does not already exist. */
6999 XEXP (tem, 0) = src_const;
7001 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7002 src_const, REG_NOTES (insn));
7004 /* If storing a constant value in a register that
7005 previously held the constant value 0,
7006 record this fact with a REG_WAS_0 note on this insn.
7008 Note that the *register* is required to have previously held 0,
7009 not just any register in the quantity and we must point to the
7010 insn that set that register to zero.
7012 Rather than track each register individually, we just see if
7013 the last set for this quantity was for this register. */
7015 if (REGNO_QTY_VALID_P (REGNO (dest))
7016 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
7018 /* See if we previously had a REG_WAS_0 note. */
7019 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7020 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
7022 if ((tem = single_set (const_insn)) != 0
7023 && rtx_equal_p (SET_DEST (tem), dest))
7026 XEXP (note, 0) = const_insn;
7028 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7035 /* Now deal with the destination. */
7037 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7039 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7040 to the MEM or REG within it. */
7041 while (GET_CODE (dest) == SIGN_EXTRACT
7042 || GET_CODE (dest) == ZERO_EXTRACT
7043 || GET_CODE (dest) == SUBREG
7044 || GET_CODE (dest) == STRICT_LOW_PART)
7046 sets[i].inner_dest_loc = &XEXP (dest, 0);
7047 dest = XEXP (dest, 0);
7050 sets[i].inner_dest = dest;
7052 if (GET_CODE (dest) == MEM)
7054 #ifdef PUSH_ROUNDING
7055 /* Stack pushes invalidate the stack pointer. */
7056 rtx addr = XEXP (dest, 0);
7057 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7058 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7059 && XEXP (addr, 0) == stack_pointer_rtx)
7060 invalidate (stack_pointer_rtx, Pmode);
7062 dest = fold_rtx (dest, insn);
7065 /* Compute the hash code of the destination now,
7066 before the effects of this instruction are recorded,
7067 since the register values used in the address computation
7068 are those before this instruction. */
7069 sets[i].dest_hash = HASH (dest, mode);
7071 /* Don't enter a bit-field in the hash table
7072 because the value in it after the store
7073 may not equal what was stored, due to truncation. */
7075 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7076 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7078 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7080 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7081 && GET_CODE (width) == CONST_INT
7082 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7083 && ! (INTVAL (src_const)
7084 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7085 /* Exception: if the value is constant,
7086 and it won't be truncated, record it. */
7090 /* This is chosen so that the destination will be invalidated
7091 but no new value will be recorded.
7092 We must invalidate because sometimes constant
7093 values can be recorded for bitfields. */
7094 sets[i].src_elt = 0;
7095 sets[i].src_volatile = 1;
7101 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7103 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7105 PUT_CODE (insn, NOTE);
7106 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7107 NOTE_SOURCE_FILE (insn) = 0;
7108 cse_jumps_altered = 1;
7109 /* One less use of the label this insn used to jump to. */
7110 if (JUMP_LABEL (insn) != 0)
7111 --LABEL_NUSES (JUMP_LABEL (insn));
7112 /* No more processing for this set. */
7116 /* If this SET is now setting PC to a label, we know it used to
7117 be a conditional or computed branch. So we see if we can follow
7118 it. If it was a computed branch, delete it and re-emit. */
7119 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7123 /* If this is not in the format for a simple branch and
7124 we are the only SET in it, re-emit it. */
7125 if (! simplejump_p (insn) && n_sets == 1)
7127 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7128 JUMP_LABEL (new) = XEXP (src, 0);
7129 LABEL_NUSES (XEXP (src, 0))++;
7134 /* Otherwise, force rerecognition, since it probably had
7135 a different pattern before.
7136 This shouldn't really be necessary, since whatever
7137 changed the source value above should have done this.
7138 Until the right place is found, might as well do this here. */
7139 INSN_CODE (insn) = -1;
7141 /* Now that we've converted this jump to an unconditional jump,
7142 there is dead code after it. Delete the dead code until we
7143 reach a BARRIER, the end of the function, or a label. Do
7144 not delete NOTEs except for NOTE_INSN_DELETED since later
7145 phases assume these notes are retained. */
7149 while (NEXT_INSN (p) != 0
7150 && GET_CODE (NEXT_INSN (p)) != BARRIER
7151 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7153 if (GET_CODE (NEXT_INSN (p)) != NOTE
7154 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7155 delete_insn (NEXT_INSN (p));
7160 /* If we don't have a BARRIER immediately after INSN, put one there.
7161 Much code assumes that there are no NOTEs between a JUMP_INSN and
7164 if (NEXT_INSN (insn) == 0
7165 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7166 emit_barrier_before (NEXT_INSN (insn));
7168 /* We might have two BARRIERs separated by notes. Delete the second
7171 if (p != insn && NEXT_INSN (p) != 0
7172 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7173 delete_insn (NEXT_INSN (p));
7175 cse_jumps_altered = 1;
7179 /* If destination is volatile, invalidate it and then do no further
7180 processing for this assignment. */
7182 else if (do_not_record)
7184 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7185 || GET_CODE (dest) == MEM)
7186 invalidate (dest, VOIDmode);
7187 else if (GET_CODE (dest) == STRICT_LOW_PART
7188 || GET_CODE (dest) == ZERO_EXTRACT)
7189 invalidate (XEXP (dest, 0), GET_MODE (dest));
7193 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7194 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7197 /* If setting CC0, record what it was set to, or a constant, if it
7198 is equivalent to a constant. If it is being set to a floating-point
7199 value, make a COMPARE with the appropriate constant of 0. If we
7200 don't do this, later code can interpret this as a test against
7201 const0_rtx, which can cause problems if we try to put it into an
7202 insn as a floating-point operand. */
7203 if (dest == cc0_rtx)
7205 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7206 this_insn_cc0_mode = mode;
7207 if (FLOAT_MODE_P (mode))
7208 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7214 /* Now enter all non-volatile source expressions in the hash table
7215 if they are not already present.
7216 Record their equivalence classes in src_elt.
7217 This way we can insert the corresponding destinations into
7218 the same classes even if the actual sources are no longer in them
7219 (having been invalidated). */
7221 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7222 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7224 register struct table_elt *elt;
7225 register struct table_elt *classp = sets[0].src_elt;
7226 rtx dest = SET_DEST (sets[0].rtl);
7227 enum machine_mode eqvmode = GET_MODE (dest);
7229 if (GET_CODE (dest) == STRICT_LOW_PART)
7231 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7234 if (insert_regs (src_eqv, classp, 0))
7236 rehash_using_reg (src_eqv);
7237 src_eqv_hash = HASH (src_eqv, eqvmode);
7239 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7240 elt->in_memory = src_eqv_in_memory;
7241 elt->in_struct = src_eqv_in_struct;
7244 /* Check to see if src_eqv_elt is the same as a set source which
7245 does not yet have an elt, and if so set the elt of the set source
7247 for (i = 0; i < n_sets; i++)
7248 if (sets[i].rtl && sets[i].src_elt == 0
7249 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7250 sets[i].src_elt = src_eqv_elt;
7253 for (i = 0; i < n_sets; i++)
7254 if (sets[i].rtl && ! sets[i].src_volatile
7255 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7257 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7259 /* REG_EQUAL in setting a STRICT_LOW_PART
7260 gives an equivalent for the entire destination register,
7261 not just for the subreg being stored in now.
7262 This is a more interesting equivalence, so we arrange later
7263 to treat the entire reg as the destination. */
7264 sets[i].src_elt = src_eqv_elt;
7265 sets[i].src_hash = src_eqv_hash;
7269 /* Insert source and constant equivalent into hash table, if not
7271 register struct table_elt *classp = src_eqv_elt;
7272 register rtx src = sets[i].src;
7273 register rtx dest = SET_DEST (sets[i].rtl);
7274 enum machine_mode mode
7275 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7277 if (sets[i].src_elt == 0)
7279 register struct table_elt *elt;
7281 /* Note that these insert_regs calls cannot remove
7282 any of the src_elt's, because they would have failed to
7283 match if not still valid. */
7284 if (insert_regs (src, classp, 0))
7286 rehash_using_reg (src);
7287 sets[i].src_hash = HASH (src, mode);
7289 elt = insert (src, classp, sets[i].src_hash, mode);
7290 elt->in_memory = sets[i].src_in_memory;
7291 elt->in_struct = sets[i].src_in_struct;
7292 sets[i].src_elt = classp = elt;
7295 if (sets[i].src_const && sets[i].src_const_elt == 0
7296 && src != sets[i].src_const
7297 && ! rtx_equal_p (sets[i].src_const, src))
7298 sets[i].src_elt = insert (sets[i].src_const, classp,
7299 sets[i].src_const_hash, mode);
7302 else if (sets[i].src_elt == 0)
7303 /* If we did not insert the source into the hash table (e.g., it was
7304 volatile), note the equivalence class for the REG_EQUAL value, if any,
7305 so that the destination goes into that class. */
7306 sets[i].src_elt = src_eqv_elt;
7308 invalidate_from_clobbers (x);
7310 /* Some registers are invalidated by subroutine calls. Memory is
7311 invalidated by non-constant calls. */
7313 if (GET_CODE (insn) == CALL_INSN)
7315 if (! CONST_CALL_P (insn))
7316 invalidate_memory ();
7317 invalidate_for_call ();
7320 /* Now invalidate everything set by this instruction.
7321 If a SUBREG or other funny destination is being set,
7322 sets[i].rtl is still nonzero, so here we invalidate the reg
7323 a part of which is being set. */
7325 for (i = 0; i < n_sets; i++)
7328 /* We can't use the inner dest, because the mode associated with
7329 a ZERO_EXTRACT is significant. */
7330 register rtx dest = SET_DEST (sets[i].rtl);
7332 /* Needed for registers to remove the register from its
7333 previous quantity's chain.
7334 Needed for memory if this is a nonvarying address, unless
7335 we have just done an invalidate_memory that covers even those. */
7336 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7337 || GET_CODE (dest) == MEM)
7338 invalidate (dest, VOIDmode);
7339 else if (GET_CODE (dest) == STRICT_LOW_PART
7340 || GET_CODE (dest) == ZERO_EXTRACT)
7341 invalidate (XEXP (dest, 0), GET_MODE (dest));
7344 /* Make sure registers mentioned in destinations
7345 are safe for use in an expression to be inserted.
7346 This removes from the hash table
7347 any invalid entry that refers to one of these registers.
7349 We don't care about the return value from mention_regs because
7350 we are going to hash the SET_DEST values unconditionally. */
7352 for (i = 0; i < n_sets; i++)
7353 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
7354 mention_regs (SET_DEST (sets[i].rtl));
7356 /* We may have just removed some of the src_elt's from the hash table.
7357 So replace each one with the current head of the same class. */
7359 for (i = 0; i < n_sets; i++)
7362 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7363 /* If elt was removed, find current head of same class,
7364 or 0 if nothing remains of that class. */
7366 register struct table_elt *elt = sets[i].src_elt;
7368 while (elt && elt->prev_same_value)
7369 elt = elt->prev_same_value;
7371 while (elt && elt->first_same_value == 0)
7372 elt = elt->next_same_value;
7373 sets[i].src_elt = elt ? elt->first_same_value : 0;
7377 /* Now insert the destinations into their equivalence classes. */
7379 for (i = 0; i < n_sets; i++)
7382 register rtx dest = SET_DEST (sets[i].rtl);
7383 register struct table_elt *elt;
7385 /* Don't record value if we are not supposed to risk allocating
7386 floating-point values in registers that might be wider than
7388 if ((flag_float_store
7389 && GET_CODE (dest) == MEM
7390 && FLOAT_MODE_P (GET_MODE (dest)))
7391 /* Don't record BLKmode values, because we don't know the
7392 size of it, and can't be sure that other BLKmode values
7393 have the same or smaller size. */
7394 || GET_MODE (dest) == BLKmode
7395 /* Don't record values of destinations set inside a libcall block
7396 since we might delete the libcall. Things should have been set
7397 up so we won't want to reuse such a value, but we play it safe
7400 /* If we didn't put a REG_EQUAL value or a source into the hash
7401 table, there is no point is recording DEST. */
7402 || sets[i].src_elt == 0
7403 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7404 or SIGN_EXTEND, don't record DEST since it can cause
7405 some tracking to be wrong.
7407 ??? Think about this more later. */
7408 || (GET_CODE (dest) == SUBREG
7409 && (GET_MODE_SIZE (GET_MODE (dest))
7410 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7411 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7412 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7415 /* STRICT_LOW_PART isn't part of the value BEING set,
7416 and neither is the SUBREG inside it.
7417 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7418 if (GET_CODE (dest) == STRICT_LOW_PART)
7419 dest = SUBREG_REG (XEXP (dest, 0));
7421 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7422 /* Registers must also be inserted into chains for quantities. */
7423 if (insert_regs (dest, sets[i].src_elt, 1))
7425 /* If `insert_regs' changes something, the hash code must be
7427 rehash_using_reg (dest);
7428 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7431 elt = insert (dest, sets[i].src_elt,
7432 sets[i].dest_hash, GET_MODE (dest));
7433 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7434 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7435 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7440 /* This implicitly assumes a whole struct
7441 need not have MEM_IN_STRUCT_P.
7442 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7443 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7444 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7447 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7448 narrower than M2, and both M1 and M2 are the same number of words,
7449 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7450 make that equivalence as well.
7452 However, BAR may have equivalences for which gen_lowpart_if_possible
7453 will produce a simpler value than gen_lowpart_if_possible applied to
7454 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7455 BAR's equivalences. If we don't get a simplified form, make
7456 the SUBREG. It will not be used in an equivalence, but will
7457 cause two similar assignments to be detected.
7459 Note the loop below will find SUBREG_REG (DEST) since we have
7460 already entered SRC and DEST of the SET in the table. */
7462 if (GET_CODE (dest) == SUBREG
7463 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7465 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7466 && (GET_MODE_SIZE (GET_MODE (dest))
7467 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7468 && sets[i].src_elt != 0)
7470 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7471 struct table_elt *elt, *classp = 0;
7473 for (elt = sets[i].src_elt->first_same_value; elt;
7474 elt = elt->next_same_value)
7478 struct table_elt *src_elt;
7480 /* Ignore invalid entries. */
7481 if (GET_CODE (elt->exp) != REG
7482 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7485 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7487 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7489 src_hash = HASH (new_src, new_mode);
7490 src_elt = lookup (new_src, src_hash, new_mode);
7492 /* Put the new source in the hash table is if isn't
7496 if (insert_regs (new_src, classp, 0))
7498 rehash_using_reg (new_src);
7499 src_hash = HASH (new_src, new_mode);
7501 src_elt = insert (new_src, classp, src_hash, new_mode);
7502 src_elt->in_memory = elt->in_memory;
7503 src_elt->in_struct = elt->in_struct;
7505 else if (classp && classp != src_elt->first_same_value)
7506 /* Show that two things that we've seen before are
7507 actually the same. */
7508 merge_equiv_classes (src_elt, classp);
7510 classp = src_elt->first_same_value;
7511 /* Ignore invalid entries. */
7513 && GET_CODE (classp->exp) != REG
7514 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7515 classp = classp->next_same_value;
7520 /* Special handling for (set REG0 REG1)
7521 where REG0 is the "cheapest", cheaper than REG1.
7522 After cse, REG1 will probably not be used in the sequel,
7523 so (if easily done) change this insn to (set REG1 REG0) and
7524 replace REG1 with REG0 in the previous insn that computed their value.
7525 Then REG1 will become a dead store and won't cloud the situation
7526 for later optimizations.
7528 Do not make this change if REG1 is a hard register, because it will
7529 then be used in the sequel and we may be changing a two-operand insn
7530 into a three-operand insn.
7532 Also do not do this if we are operating on a copy of INSN. */
7534 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7535 && NEXT_INSN (PREV_INSN (insn)) == insn
7536 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7537 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7538 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7539 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7540 == REGNO (SET_DEST (sets[0].rtl))))
7542 rtx prev = PREV_INSN (insn);
7543 while (prev && GET_CODE (prev) == NOTE)
7544 prev = PREV_INSN (prev);
7546 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7547 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7549 rtx dest = SET_DEST (sets[0].rtl);
7550 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7552 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7553 validate_change (insn, & SET_DEST (sets[0].rtl),
7554 SET_SRC (sets[0].rtl), 1);
7555 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7556 apply_change_group ();
7558 /* If REG1 was equivalent to a constant, REG0 is not. */
7560 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7562 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7563 any REG_WAS_0 note on INSN to PREV. */
7564 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7566 remove_note (prev, note);
7568 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7571 remove_note (insn, note);
7572 XEXP (note, 1) = REG_NOTES (prev);
7573 REG_NOTES (prev) = note;
7576 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7577 then we must delete it, because the value in REG0 has changed. */
7578 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7579 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7580 remove_note (insn, note);
7584 /* If this is a conditional jump insn, record any known equivalences due to
7585 the condition being tested. */
7587 last_jump_equiv_class = 0;
7588 if (GET_CODE (insn) == JUMP_INSN
7589 && n_sets == 1 && GET_CODE (x) == SET
7590 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7591 record_jump_equiv (insn, 0);
7594 /* If the previous insn set CC0 and this insn no longer references CC0,
7595 delete the previous insn. Here we use the fact that nothing expects CC0
7596 to be valid over an insn, which is true until the final pass. */
7597 if (prev_insn && GET_CODE (prev_insn) == INSN
7598 && (tem = single_set (prev_insn)) != 0
7599 && SET_DEST (tem) == cc0_rtx
7600 && ! reg_mentioned_p (cc0_rtx, x))
7602 PUT_CODE (prev_insn, NOTE);
7603 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7604 NOTE_SOURCE_FILE (prev_insn) = 0;
7607 prev_insn_cc0 = this_insn_cc0;
7608 prev_insn_cc0_mode = this_insn_cc0_mode;
7614 /* Remove from the ahsh table all expressions that reference memory. */
7616 invalidate_memory ()
7619 register struct table_elt *p, *next;
7621 for (i = 0; i < NBUCKETS; i++)
7622 for (p = table[i]; p; p = next)
7624 next = p->next_same_hash;
7626 remove_from_table (p, i);
7630 /* XXX ??? The name of this function bears little resemblance to
7631 what this function actually does. FIXME. */
7633 note_mem_written (addr)
7636 /* Pushing or popping the stack invalidates just the stack pointer. */
7637 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7638 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7639 && GET_CODE (XEXP (addr, 0)) == REG
7640 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7642 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7643 reg_tick[STACK_POINTER_REGNUM]++;
7645 /* This should be *very* rare. */
7646 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7647 invalidate (stack_pointer_rtx, VOIDmode);
7653 /* Perform invalidation on the basis of everything about an insn
7654 except for invalidating the actual places that are SET in it.
7655 This includes the places CLOBBERed, and anything that might
7656 alias with something that is SET or CLOBBERed.
7658 X is the pattern of the insn. */
7661 invalidate_from_clobbers (x)
7664 if (GET_CODE (x) == CLOBBER)
7666 rtx ref = XEXP (x, 0);
7669 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7670 || GET_CODE (ref) == MEM)
7671 invalidate (ref, VOIDmode);
7672 else if (GET_CODE (ref) == STRICT_LOW_PART
7673 || GET_CODE (ref) == ZERO_EXTRACT)
7674 invalidate (XEXP (ref, 0), GET_MODE (ref));
7677 else if (GET_CODE (x) == PARALLEL)
7680 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7682 register rtx y = XVECEXP (x, 0, i);
7683 if (GET_CODE (y) == CLOBBER)
7685 rtx ref = XEXP (y, 0);
7686 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7687 || GET_CODE (ref) == MEM)
7688 invalidate (ref, VOIDmode);
7689 else if (GET_CODE (ref) == STRICT_LOW_PART
7690 || GET_CODE (ref) == ZERO_EXTRACT)
7691 invalidate (XEXP (ref, 0), GET_MODE (ref));
7697 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7698 and replace any registers in them with either an equivalent constant
7699 or the canonical form of the register. If we are inside an address,
7700 only do this if the address remains valid.
7702 OBJECT is 0 except when within a MEM in which case it is the MEM.
7704 Return the replacement for X. */
7707 cse_process_notes (x, object)
7711 enum rtx_code code = GET_CODE (x);
7712 char *fmt = GET_RTX_FORMAT (code);
7728 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7733 if (REG_NOTE_KIND (x) == REG_EQUAL)
7734 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7736 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7743 rtx new = cse_process_notes (XEXP (x, 0), object);
7744 /* We don't substitute VOIDmode constants into these rtx,
7745 since they would impede folding. */
7746 if (GET_MODE (new) != VOIDmode)
7747 validate_change (object, &XEXP (x, 0), new, 0);
7752 i = reg_qty[REGNO (x)];
7754 /* Return a constant or a constant register. */
7755 if (REGNO_QTY_VALID_P (REGNO (x))
7756 && qty_const[i] != 0
7757 && (CONSTANT_P (qty_const[i])
7758 || GET_CODE (qty_const[i]) == REG))
7760 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7765 /* Otherwise, canonicalize this register. */
7766 return canon_reg (x, NULL_RTX);
7772 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7774 validate_change (object, &XEXP (x, i),
7775 cse_process_notes (XEXP (x, i), object), 0);
7780 /* Find common subexpressions between the end test of a loop and the beginning
7781 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7783 Often we have a loop where an expression in the exit test is used
7784 in the body of the loop. For example "while (*p) *q++ = *p++;".
7785 Because of the way we duplicate the loop exit test in front of the loop,
7786 however, we don't detect that common subexpression. This will be caught
7787 when global cse is implemented, but this is a quite common case.
7789 This function handles the most common cases of these common expressions.
7790 It is called after we have processed the basic block ending with the
7791 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7792 jumps to a label used only once. */
7795 cse_around_loop (loop_start)
7800 struct table_elt *p;
7802 /* If the jump at the end of the loop doesn't go to the start, we don't
7804 for (insn = PREV_INSN (loop_start);
7805 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7806 insn = PREV_INSN (insn))
7810 || GET_CODE (insn) != NOTE
7811 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7814 /* If the last insn of the loop (the end test) was an NE comparison,
7815 we will interpret it as an EQ comparison, since we fell through
7816 the loop. Any equivalences resulting from that comparison are
7817 therefore not valid and must be invalidated. */
7818 if (last_jump_equiv_class)
7819 for (p = last_jump_equiv_class->first_same_value; p;
7820 p = p->next_same_value)
7822 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7823 || (GET_CODE (p->exp) == SUBREG
7824 && GET_CODE (SUBREG_REG (p->exp)) == REG))
7825 invalidate (p->exp, VOIDmode);
7826 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7827 || GET_CODE (p->exp) == ZERO_EXTRACT)
7828 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
7831 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7832 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7834 The only thing we do with SET_DEST is invalidate entries, so we
7835 can safely process each SET in order. It is slightly less efficient
7836 to do so, but we only want to handle the most common cases.
7838 The gen_move_insn call in cse_set_around_loop may create new pseudos.
7839 These pseudos won't have valid entries in any of the tables indexed
7840 by register number, such as reg_qty. We avoid out-of-range array
7841 accesses by not processing any instructions created after cse started. */
7843 for (insn = NEXT_INSN (loop_start);
7844 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7845 && INSN_UID (insn) < max_insn_uid
7846 && ! (GET_CODE (insn) == NOTE
7847 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7848 insn = NEXT_INSN (insn))
7850 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7851 && (GET_CODE (PATTERN (insn)) == SET
7852 || GET_CODE (PATTERN (insn)) == CLOBBER))
7853 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7854 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7855 && GET_CODE (PATTERN (insn)) == PARALLEL)
7856 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7857 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7858 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7859 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7864 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7865 since they are done elsewhere. This function is called via note_stores. */
7868 invalidate_skipped_set (dest, set)
7872 enum rtx_code code = GET_CODE (dest);
7875 && ! note_mem_written (dest) /* If this is not a stack push ... */
7876 /* There are times when an address can appear varying and be a PLUS
7877 during this scan when it would be a fixed address were we to know
7878 the proper equivalences. So invalidate all memory if there is
7879 a BLKmode or nonscalar memory reference or a reference to a
7880 variable address. */
7881 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
7882 || cse_rtx_varies_p (XEXP (dest, 0))))
7884 invalidate_memory ();
7888 if (GET_CODE (set) == CLOBBER
7895 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
7896 invalidate (XEXP (dest, 0), GET_MODE (dest));
7897 else if (code == REG || code == SUBREG || code == MEM)
7898 invalidate (dest, VOIDmode);
7901 /* Invalidate all insns from START up to the end of the function or the
7902 next label. This called when we wish to CSE around a block that is
7903 conditionally executed. */
7906 invalidate_skipped_block (start)
7911 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7912 insn = NEXT_INSN (insn))
7914 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7917 if (GET_CODE (insn) == CALL_INSN)
7919 if (! CONST_CALL_P (insn))
7920 invalidate_memory ();
7921 invalidate_for_call ();
7924 note_stores (PATTERN (insn), invalidate_skipped_set);
7928 /* Used for communication between the following two routines; contains a
7929 value to be checked for modification. */
7931 static rtx cse_check_loop_start_value;
7933 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7934 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7937 cse_check_loop_start (x, set)
7939 rtx set ATTRIBUTE_UNUSED;
7941 if (cse_check_loop_start_value == 0
7942 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7945 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7946 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7947 cse_check_loop_start_value = 0;
7950 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7951 a loop that starts with the label at LOOP_START.
7953 If X is a SET, we see if its SET_SRC is currently in our hash table.
7954 If so, we see if it has a value equal to some register used only in the
7955 loop exit code (as marked by jump.c).
7957 If those two conditions are true, we search backwards from the start of
7958 the loop to see if that same value was loaded into a register that still
7959 retains its value at the start of the loop.
7961 If so, we insert an insn after the load to copy the destination of that
7962 load into the equivalent register and (try to) replace our SET_SRC with that
7965 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7968 cse_set_around_loop (x, insn, loop_start)
7973 struct table_elt *src_elt;
7975 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7976 are setting PC or CC0 or whose SET_SRC is already a register. */
7977 if (GET_CODE (x) == SET
7978 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
7979 && GET_CODE (SET_SRC (x)) != REG)
7981 src_elt = lookup (SET_SRC (x),
7982 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
7983 GET_MODE (SET_DEST (x)));
7986 for (src_elt = src_elt->first_same_value; src_elt;
7987 src_elt = src_elt->next_same_value)
7988 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
7989 && COST (src_elt->exp) < COST (SET_SRC (x)))
7993 /* Look for an insn in front of LOOP_START that sets
7994 something in the desired mode to SET_SRC (x) before we hit
7995 a label or CALL_INSN. */
7997 for (p = prev_nonnote_insn (loop_start);
7998 p && GET_CODE (p) != CALL_INSN
7999 && GET_CODE (p) != CODE_LABEL;
8000 p = prev_nonnote_insn (p))
8001 if ((set = single_set (p)) != 0
8002 && GET_CODE (SET_DEST (set)) == REG
8003 && GET_MODE (SET_DEST (set)) == src_elt->mode
8004 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8006 /* We now have to ensure that nothing between P
8007 and LOOP_START modified anything referenced in
8008 SET_SRC (x). We know that nothing within the loop
8009 can modify it, or we would have invalidated it in
8013 cse_check_loop_start_value = SET_SRC (x);
8014 for (q = p; q != loop_start; q = NEXT_INSN (q))
8015 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8016 note_stores (PATTERN (q), cse_check_loop_start);
8018 /* If nothing was changed and we can replace our
8019 SET_SRC, add an insn after P to copy its destination
8020 to what we will be replacing SET_SRC with. */
8021 if (cse_check_loop_start_value
8022 && validate_change (insn, &SET_SRC (x),
8025 /* If this creates new pseudos, this is unsafe,
8026 because the regno of new pseudo is unsuitable
8027 to index into reg_qty when cse_insn processes
8028 the new insn. Therefore, if a new pseudo was
8029 created, discard this optimization. */
8030 int nregs = max_reg_num ();
8032 = gen_move_insn (src_elt->exp, SET_DEST (set));
8033 if (nregs != max_reg_num ())
8035 if (! validate_change (insn, &SET_SRC (x),
8040 emit_insn_after (move, p);
8047 /* Now invalidate anything modified by X. */
8048 note_mem_written (SET_DEST (x));
8050 /* See comment on similar code in cse_insn for explanation of these tests. */
8051 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8052 || GET_CODE (SET_DEST (x)) == MEM)
8053 invalidate (SET_DEST (x), VOIDmode);
8054 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8055 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8056 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8059 /* Find the end of INSN's basic block and return its range,
8060 the total number of SETs in all the insns of the block, the last insn of the
8061 block, and the branch path.
8063 The branch path indicates which branches should be followed. If a non-zero
8064 path size is specified, the block should be rescanned and a different set
8065 of branches will be taken. The branch path is only used if
8066 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8068 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8069 used to describe the block. It is filled in with the information about
8070 the current block. The incoming structure's branch path, if any, is used
8071 to construct the output branch path. */
8074 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8076 struct cse_basic_block_data *data;
8083 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8084 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8085 int path_size = data->path_size;
8089 /* Update the previous branch path, if any. If the last branch was
8090 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8091 shorten the path by one and look at the previous branch. We know that
8092 at least one branch must have been taken if PATH_SIZE is non-zero. */
8093 while (path_size > 0)
8095 if (data->path[path_size - 1].status != NOT_TAKEN)
8097 data->path[path_size - 1].status = NOT_TAKEN;
8104 /* Scan to end of this basic block. */
8105 while (p && GET_CODE (p) != CODE_LABEL)
8107 /* Don't cse out the end of a loop. This makes a difference
8108 only for the unusual loops that always execute at least once;
8109 all other loops have labels there so we will stop in any case.
8110 Cse'ing out the end of the loop is dangerous because it
8111 might cause an invariant expression inside the loop
8112 to be reused after the end of the loop. This would make it
8113 hard to move the expression out of the loop in loop.c,
8114 especially if it is one of several equivalent expressions
8115 and loop.c would like to eliminate it.
8117 If we are running after loop.c has finished, we can ignore
8118 the NOTE_INSN_LOOP_END. */
8120 if (! after_loop && GET_CODE (p) == NOTE
8121 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8124 /* Don't cse over a call to setjmp; on some machines (eg vax)
8125 the regs restored by the longjmp come from
8126 a later time than the setjmp. */
8127 if (GET_CODE (p) == NOTE
8128 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8131 /* A PARALLEL can have lots of SETs in it,
8132 especially if it is really an ASM_OPERANDS. */
8133 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8134 && GET_CODE (PATTERN (p)) == PARALLEL)
8135 nsets += XVECLEN (PATTERN (p), 0);
8136 else if (GET_CODE (p) != NOTE)
8139 /* Ignore insns made by CSE; they cannot affect the boundaries of
8142 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8143 high_cuid = INSN_CUID (p);
8144 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8145 low_cuid = INSN_CUID (p);
8147 /* See if this insn is in our branch path. If it is and we are to
8149 if (path_entry < path_size && data->path[path_entry].branch == p)
8151 if (data->path[path_entry].status != NOT_TAKEN)
8154 /* Point to next entry in path, if any. */
8158 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8159 was specified, we haven't reached our maximum path length, there are
8160 insns following the target of the jump, this is the only use of the
8161 jump label, and the target label is preceded by a BARRIER.
8163 Alternatively, we can follow the jump if it branches around a
8164 block of code and there are no other branches into the block.
8165 In this case invalidate_skipped_block will be called to invalidate any
8166 registers set in the block when following the jump. */
8168 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8169 && GET_CODE (p) == JUMP_INSN
8170 && GET_CODE (PATTERN (p)) == SET
8171 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8172 && JUMP_LABEL (p) != 0
8173 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8174 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8176 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8177 if ((GET_CODE (q) != NOTE
8178 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8179 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8180 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8183 /* If we ran into a BARRIER, this code is an extension of the
8184 basic block when the branch is taken. */
8185 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8187 /* Don't allow ourself to keep walking around an
8188 always-executed loop. */
8189 if (next_real_insn (q) == next)
8195 /* Similarly, don't put a branch in our path more than once. */
8196 for (i = 0; i < path_entry; i++)
8197 if (data->path[i].branch == p)
8200 if (i != path_entry)
8203 data->path[path_entry].branch = p;
8204 data->path[path_entry++].status = TAKEN;
8206 /* This branch now ends our path. It was possible that we
8207 didn't see this branch the last time around (when the
8208 insn in front of the target was a JUMP_INSN that was
8209 turned into a no-op). */
8210 path_size = path_entry;
8213 /* Mark block so we won't scan it again later. */
8214 PUT_MODE (NEXT_INSN (p), QImode);
8216 /* Detect a branch around a block of code. */
8217 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8221 if (next_real_insn (q) == next)
8227 for (i = 0; i < path_entry; i++)
8228 if (data->path[i].branch == p)
8231 if (i != path_entry)
8234 /* This is no_labels_between_p (p, q) with an added check for
8235 reaching the end of a function (in case Q precedes P). */
8236 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8237 if (GET_CODE (tmp) == CODE_LABEL)
8242 data->path[path_entry].branch = p;
8243 data->path[path_entry++].status = AROUND;
8245 path_size = path_entry;
8248 /* Mark block so we won't scan it again later. */
8249 PUT_MODE (NEXT_INSN (p), QImode);
8256 data->low_cuid = low_cuid;
8257 data->high_cuid = high_cuid;
8258 data->nsets = nsets;
8261 /* If all jumps in the path are not taken, set our path length to zero
8262 so a rescan won't be done. */
8263 for (i = path_size - 1; i >= 0; i--)
8264 if (data->path[i].status != NOT_TAKEN)
8268 data->path_size = 0;
8270 data->path_size = path_size;
8272 /* End the current branch path. */
8273 data->path[path_size].branch = 0;
8276 /* Perform cse on the instructions of a function.
8277 F is the first instruction.
8278 NREGS is one plus the highest pseudo-reg number used in the instruction.
8280 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8281 (only if -frerun-cse-after-loop).
8283 Returns 1 if jump_optimize should be redone due to simplifications
8284 in conditional jump instructions. */
8287 cse_main (f, nregs, after_loop, file)
8293 struct cse_basic_block_data val;
8294 register rtx insn = f;
8297 cse_jumps_altered = 0;
8298 recorded_label_ref = 0;
8299 constant_pool_entries_cost = 0;
8303 init_alias_analysis ();
8307 max_insn_uid = get_max_uid ();
8309 all_minus_one = (int *) alloca (nregs * sizeof (int));
8310 consec_ints = (int *) alloca (nregs * sizeof (int));
8312 for (i = 0; i < nregs; i++)
8314 all_minus_one[i] = -1;
8318 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8319 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8320 reg_qty = (int *) alloca (nregs * sizeof (int));
8321 reg_in_table = (int *) alloca (nregs * sizeof (int));
8322 reg_tick = (int *) alloca (nregs * sizeof (int));
8324 #ifdef LOAD_EXTEND_OP
8326 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8327 and change the code and mode as appropriate. */
8328 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8331 /* Discard all the free elements of the previous function
8332 since they are allocated in the temporarily obstack. */
8333 bzero ((char *) table, sizeof table);
8334 free_element_chain = 0;
8335 n_elements_made = 0;
8337 /* Find the largest uid. */
8339 max_uid = get_max_uid ();
8340 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8341 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8343 /* Compute the mapping from uids to cuids.
8344 CUIDs are numbers assigned to insns, like uids,
8345 except that cuids increase monotonically through the code.
8346 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8347 between two insns is not affected by -g. */
8349 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8351 if (GET_CODE (insn) != NOTE
8352 || NOTE_LINE_NUMBER (insn) < 0)
8353 INSN_CUID (insn) = ++i;
8355 /* Give a line number note the same cuid as preceding insn. */
8356 INSN_CUID (insn) = i;
8359 /* Initialize which registers are clobbered by calls. */
8361 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8363 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8364 if ((call_used_regs[i]
8365 /* Used to check !fixed_regs[i] here, but that isn't safe;
8366 fixed regs are still call-clobbered, and sched can get
8367 confused if they can "live across calls".
8369 The frame pointer is always preserved across calls. The arg
8370 pointer is if it is fixed. The stack pointer usually is, unless
8371 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8372 will be present. If we are generating PIC code, the PIC offset
8373 table register is preserved across calls. */
8375 && i != STACK_POINTER_REGNUM
8376 && i != FRAME_POINTER_REGNUM
8377 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8378 && i != HARD_FRAME_POINTER_REGNUM
8380 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8381 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8383 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8384 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8388 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8390 /* Loop over basic blocks.
8391 Compute the maximum number of qty's needed for each basic block
8392 (which is 2 for each SET). */
8396 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8397 flag_cse_skip_blocks);
8399 /* If this basic block was already processed or has no sets, skip it. */
8400 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8402 PUT_MODE (insn, VOIDmode);
8403 insn = (val.last ? NEXT_INSN (val.last) : 0);
8408 cse_basic_block_start = val.low_cuid;
8409 cse_basic_block_end = val.high_cuid;
8410 max_qty = val.nsets * 2;
8413 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
8414 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8417 /* Make MAX_QTY bigger to give us room to optimize
8418 past the end of this basic block, if that should prove useful. */
8424 /* If this basic block is being extended by following certain jumps,
8425 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8426 Otherwise, we start after this basic block. */
8427 if (val.path_size > 0)
8428 cse_basic_block (insn, val.last, val.path, 0);
8431 int old_cse_jumps_altered = cse_jumps_altered;
8434 /* When cse changes a conditional jump to an unconditional
8435 jump, we want to reprocess the block, since it will give
8436 us a new branch path to investigate. */
8437 cse_jumps_altered = 0;
8438 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8439 if (cse_jumps_altered == 0
8440 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8443 cse_jumps_altered |= old_cse_jumps_altered;
8451 /* Tell refers_to_mem_p that qty_const info is not available. */
8454 if (max_elements_made < n_elements_made)
8455 max_elements_made = n_elements_made;
8457 return cse_jumps_altered || recorded_label_ref;
8460 /* Process a single basic block. FROM and TO and the limits of the basic
8461 block. NEXT_BRANCH points to the branch path when following jumps or
8462 a null path when not following jumps.
8464 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8465 loop. This is true when we are being called for the last time on a
8466 block and this CSE pass is before loop.c. */
8469 cse_basic_block (from, to, next_branch, around_loop)
8470 register rtx from, to;
8471 struct branch_path *next_branch;
8476 int in_libcall_block = 0;
8479 /* Each of these arrays is undefined before max_reg, so only allocate
8480 the space actually needed and adjust the start below. */
8482 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8483 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8484 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8485 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8486 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8488 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8489 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8490 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8492 qty_first_reg -= max_reg;
8493 qty_last_reg -= max_reg;
8494 qty_mode -= max_reg;
8495 qty_const -= max_reg;
8496 qty_const_insn -= max_reg;
8497 qty_comparison_code -= max_reg;
8498 qty_comparison_qty -= max_reg;
8499 qty_comparison_const -= max_reg;
8503 /* TO might be a label. If so, protect it from being deleted. */
8504 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8507 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8509 register enum rtx_code code;
8511 struct table_elt *p, *next;
8513 /* If we have processed 1,000 insns, flush the hash table to avoid
8514 extreme quadratic behavior.
8516 ??? This is a real kludge and needs to be done some other way.
8518 if (num_insns++ > 1000)
8520 for (i = 0; i < NBUCKETS; i++)
8521 for (p = table[i]; p; p = next)
8523 next = p->next_same_hash;
8525 if (GET_CODE (p->exp) == REG)
8526 invalidate (p->exp, p->mode);
8528 remove_from_table (p, i);
8534 /* See if this is a branch that is part of the path. If so, and it is
8535 to be taken, do so. */
8536 if (next_branch->branch == insn)
8538 enum taken status = next_branch++->status;
8539 if (status != NOT_TAKEN)
8541 if (status == TAKEN)
8542 record_jump_equiv (insn, 1);
8544 invalidate_skipped_block (NEXT_INSN (insn));
8546 /* Set the last insn as the jump insn; it doesn't affect cc0.
8547 Then follow this branch. */
8552 insn = JUMP_LABEL (insn);
8557 code = GET_CODE (insn);
8558 if (GET_MODE (insn) == QImode)
8559 PUT_MODE (insn, VOIDmode);
8561 if (GET_RTX_CLASS (code) == 'i')
8563 /* Process notes first so we have all notes in canonical forms when
8564 looking for duplicate operations. */
8566 if (REG_NOTES (insn))
8567 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8569 /* Track when we are inside in LIBCALL block. Inside such a block,
8570 we do not want to record destinations. The last insn of a
8571 LIBCALL block is not considered to be part of the block, since
8572 its destination is the result of the block and hence should be
8575 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
8576 in_libcall_block = 1;
8577 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8578 in_libcall_block = 0;
8580 cse_insn (insn, in_libcall_block);
8583 /* If INSN is now an unconditional jump, skip to the end of our
8584 basic block by pretending that we just did the last insn in the
8585 basic block. If we are jumping to the end of our block, show
8586 that we can have one usage of TO. */
8588 if (simplejump_p (insn))
8593 if (JUMP_LABEL (insn) == to)
8596 /* Maybe TO was deleted because the jump is unconditional.
8597 If so, there is nothing left in this basic block. */
8598 /* ??? Perhaps it would be smarter to set TO
8599 to whatever follows this insn,
8600 and pretend the basic block had always ended here. */
8601 if (INSN_DELETED_P (to))
8604 insn = PREV_INSN (to);
8607 /* See if it is ok to keep on going past the label
8608 which used to end our basic block. Remember that we incremented
8609 the count of that label, so we decrement it here. If we made
8610 a jump unconditional, TO_USAGE will be one; in that case, we don't
8611 want to count the use in that jump. */
8613 if (to != 0 && NEXT_INSN (insn) == to
8614 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8616 struct cse_basic_block_data val;
8619 insn = NEXT_INSN (to);
8621 if (LABEL_NUSES (to) == 0)
8622 insn = delete_insn (to);
8624 /* If TO was the last insn in the function, we are done. */
8628 /* If TO was preceded by a BARRIER we are done with this block
8629 because it has no continuation. */
8630 prev = prev_nonnote_insn (to);
8631 if (prev && GET_CODE (prev) == BARRIER)
8634 /* Find the end of the following block. Note that we won't be
8635 following branches in this case. */
8638 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8640 /* If the tables we allocated have enough space left
8641 to handle all the SETs in the next basic block,
8642 continue through it. Otherwise, return,
8643 and that block will be scanned individually. */
8644 if (val.nsets * 2 + next_qty > max_qty)
8647 cse_basic_block_start = val.low_cuid;
8648 cse_basic_block_end = val.high_cuid;
8651 /* Prevent TO from being deleted if it is a label. */
8652 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8655 /* Back up so we process the first insn in the extension. */
8656 insn = PREV_INSN (insn);
8660 if (next_qty > max_qty)
8663 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8664 the previous insn is the only insn that branches to the head of a loop,
8665 we can cse into the loop. Don't do this if we changed the jump
8666 structure of a loop unless we aren't going to be following jumps. */
8668 if ((cse_jumps_altered == 0
8669 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8670 && around_loop && to != 0
8671 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8672 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8673 && JUMP_LABEL (PREV_INSN (to)) != 0
8674 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8675 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8677 return to ? NEXT_INSN (to) : 0;
8680 /* Count the number of times registers are used (not set) in X.
8681 COUNTS is an array in which we accumulate the count, INCR is how much
8682 we count each register usage.
8684 Don't count a usage of DEST, which is the SET_DEST of a SET which
8685 contains X in its SET_SRC. This is because such a SET does not
8686 modify the liveness of DEST. */
8689 count_reg_usage (x, counts, dest, incr)
8702 switch (code = GET_CODE (x))
8706 counts[REGNO (x)] += incr;
8720 /* Unless we are setting a REG, count everything in SET_DEST. */
8721 if (GET_CODE (SET_DEST (x)) != REG)
8722 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8724 /* If SRC has side-effects, then we can't delete this insn, so the
8725 usage of SET_DEST inside SRC counts.
8727 ??? Strictly-speaking, we might be preserving this insn
8728 because some other SET has side-effects, but that's hard
8729 to do and can't happen now. */
8730 count_reg_usage (SET_SRC (x), counts,
8731 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8736 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8738 /* ... falls through ... */
8741 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8743 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8746 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
8751 if (REG_NOTE_KIND (x) == REG_EQUAL
8752 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
8753 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
8754 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
8761 fmt = GET_RTX_FORMAT (code);
8762 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8765 count_reg_usage (XEXP (x, i), counts, dest, incr);
8766 else if (fmt[i] == 'E')
8767 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8768 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
8772 /* Scan all the insns and delete any that are dead; i.e., they store a register
8773 that is never used or they copy a register to itself.
8775 This is used to remove insns made obviously dead by cse, loop or other
8776 optimizations. It improves the heuristics in loop since it won't try to
8777 move dead invariants out of loops or make givs for dead quantities. The
8778 remaining passes of the compilation are also sped up. */
8781 delete_trivially_dead_insns (insns, nreg)
8785 int *counts = (int *) alloca (nreg * sizeof (int));
8791 int in_libcall = 0, dead_libcall = 0;
8793 /* First count the number of times each register is used. */
8794 bzero ((char *) counts, sizeof (int) * nreg);
8795 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8796 count_reg_usage (insn, counts, NULL_RTX, 1);
8798 /* Go from the last insn to the first and delete insns that only set unused
8799 registers or copy a register to itself. As we delete an insn, remove
8800 usage counts for registers it uses. */
8801 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8806 prev = prev_real_insn (insn);
8808 /* Don't delete any insns that are part of a libcall block unless
8809 we can delete the whole libcall block.
8811 Flow or loop might get confused if we did that. Remember
8812 that we are scanning backwards. */
8813 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8819 /* See if there's a REG_EQUAL note on this insn and try to
8820 replace the source with the REG_EQUAL expression.
8822 We assume that insns with REG_RETVALs can only be reg->reg
8823 copies at this point. */
8824 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
8827 rtx set = single_set (insn);
8829 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
8832 find_reg_note (insn, REG_RETVAL, NULL_RTX));
8837 else if (in_libcall)
8838 live_insn = ! dead_libcall;
8839 else if (GET_CODE (PATTERN (insn)) == SET)
8841 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8842 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8846 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8847 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8848 && ((tem = next_nonnote_insn (insn)) == 0
8849 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8850 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8853 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8854 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8855 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8856 || side_effects_p (SET_SRC (PATTERN (insn))))
8859 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8860 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8862 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8864 if (GET_CODE (elt) == SET)
8866 if (GET_CODE (SET_DEST (elt)) == REG
8867 && SET_DEST (elt) == SET_SRC (elt))
8871 else if (GET_CODE (SET_DEST (elt)) == CC0
8872 && ! side_effects_p (SET_SRC (elt))
8873 && ((tem = next_nonnote_insn (insn)) == 0
8874 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8875 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8878 else if (GET_CODE (SET_DEST (elt)) != REG
8879 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8880 || counts[REGNO (SET_DEST (elt))] != 0
8881 || side_effects_p (SET_SRC (elt)))
8884 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8890 /* If this is a dead insn, delete it and show registers in it aren't
8895 count_reg_usage (insn, counts, NULL_RTX, -1);
8899 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))