1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Must precede rtl.h for FFS. */
27 #include "hard-reg-set.h"
30 #include "insn-config.h"
35 /* The basic idea of common subexpression elimination is to go
36 through the code, keeping a record of expressions that would
37 have the same value at the current scan point, and replacing
38 expressions encountered with the cheapest equivalent expression.
40 It is too complicated to keep track of the different possibilities
41 when control paths merge; so, at each label, we forget all that is
42 known and start fresh. This can be described as processing each
43 basic block separately. Note, however, that these are not quite
44 the same as the basic blocks found by a later pass and used for
45 data flow analysis and register packing. We do not need to start fresh
46 after a conditional jump instruction if there is no label there.
48 We use two data structures to record the equivalent expressions:
49 a hash table for most expressions, and several vectors together
50 with "quantity numbers" to record equivalent (pseudo) registers.
52 The use of the special data structure for registers is desirable
53 because it is faster. It is possible because registers references
54 contain a fairly small number, the register number, taken from
55 a contiguously allocated series, and two register references are
56 identical if they have the same number. General expressions
57 do not have any such thing, so the only way to retrieve the
58 information recorded on an expression other than a register
59 is to keep it in a hash table.
61 Registers and "quantity numbers":
63 At the start of each basic block, all of the (hardware and pseudo)
64 registers used in the function are given distinct quantity
65 numbers to indicate their contents. During scan, when the code
66 copies one register into another, we copy the quantity number.
67 When a register is loaded in any other way, we allocate a new
68 quantity number to describe the value generated by this operation.
69 `reg_qty' records what quantity a register is currently thought
72 All real quantity numbers are greater than or equal to `max_reg'.
73 If register N has not been assigned a quantity, reg_qty[N] will equal N.
75 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
76 variables should be referenced with an index below `max_reg'.
78 We also maintain a bidirectional chain of registers for each
79 quantity number. `qty_first_reg', `qty_last_reg',
80 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
82 The first register in a chain is the one whose lifespan is least local.
83 Among equals, it is the one that was seen first.
84 We replace any equivalent register with that one.
86 If two registers have the same quantity number, it must be true that
87 REG expressions with `qty_mode' must be in the hash table for both
88 registers and must be in the same class.
90 The converse is not true. Since hard registers may be referenced in
91 any mode, two REG expressions might be equivalent in the hash table
92 but not have the same quantity number if the quantity number of one
93 of the registers is not the same mode as those expressions.
95 Constants and quantity numbers
97 When a quantity has a known constant value, that value is stored
98 in the appropriate element of qty_const. This is in addition to
99 putting the constant in the hash table as is usual for non-regs.
101 Whether a reg or a constant is preferred is determined by the configuration
102 macro CONST_COSTS and will often depend on the constant value. In any
103 event, expressions containing constants can be simplified, by fold_rtx.
105 When a quantity has a known nearly constant value (such as an address
106 of a stack slot), that value is stored in the appropriate element
109 Integer constants don't have a machine mode. However, cse
110 determines the intended machine mode from the destination
111 of the instruction that moves the constant. The machine mode
112 is recorded in the hash table along with the actual RTL
113 constant expression so that different modes are kept separate.
117 To record known equivalences among expressions in general
118 we use a hash table called `table'. It has a fixed number of buckets
119 that contain chains of `struct table_elt' elements for expressions.
120 These chains connect the elements whose expressions have the same
123 Other chains through the same elements connect the elements which
124 currently have equivalent values.
126 Register references in an expression are canonicalized before hashing
127 the expression. This is done using `reg_qty' and `qty_first_reg'.
128 The hash code of a register reference is computed using the quantity
129 number, not the register number.
131 When the value of an expression changes, it is necessary to remove from the
132 hash table not just that expression but all expressions whose values
133 could be different as a result.
135 1. If the value changing is in memory, except in special cases
136 ANYTHING referring to memory could be changed. That is because
137 nobody knows where a pointer does not point.
138 The function `invalidate_memory' removes what is necessary.
140 The special cases are when the address is constant or is
141 a constant plus a fixed register such as the frame pointer
142 or a static chain pointer. When such addresses are stored in,
143 we can tell exactly which other such addresses must be invalidated
144 due to overlap. `invalidate' does this.
145 All expressions that refer to non-constant
146 memory addresses are also invalidated. `invalidate_memory' does this.
148 2. If the value changing is a register, all expressions
149 containing references to that register, and only those,
152 Because searching the entire hash table for expressions that contain
153 a register is very slow, we try to figure out when it isn't necessary.
154 Precisely, this is necessary only when expressions have been
155 entered in the hash table using this register, and then the value has
156 changed, and then another expression wants to be added to refer to
157 the register's new value. This sequence of circumstances is rare
158 within any one basic block.
160 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
161 reg_tick[i] is incremented whenever a value is stored in register i.
162 reg_in_table[i] holds -1 if no references to register i have been
163 entered in the table; otherwise, it contains the value reg_tick[i] had
164 when the references were entered. If we want to enter a reference
165 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
166 Until we want to enter a new entry, the mere fact that the two vectors
167 don't match makes the entries be ignored if anyone tries to match them.
169 Registers themselves are entered in the hash table as well as in
170 the equivalent-register chains. However, the vectors `reg_tick'
171 and `reg_in_table' do not apply to expressions which are simple
172 register references. These expressions are removed from the table
173 immediately when they become invalid, and this can be done even if
174 we do not immediately search for all the expressions that refer to
177 A CLOBBER rtx in an instruction invalidates its operand for further
178 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
179 invalidates everything that resides in memory.
183 Constant expressions that differ only by an additive integer
184 are called related. When a constant expression is put in
185 the table, the related expression with no constant term
186 is also entered. These are made to point at each other
187 so that it is possible to find out if there exists any
188 register equivalent to an expression related to a given expression. */
190 /* One plus largest register number used in this function. */
194 /* Length of vectors indexed by quantity number.
195 We know in advance we will not need a quantity number this big. */
199 /* Next quantity number to be allocated.
200 This is 1 + the largest number needed so far. */
204 /* Indexed by quantity number, gives the first (or last) (pseudo) register
205 in the chain of registers that currently contain this quantity. */
207 static int *qty_first_reg;
208 static int *qty_last_reg;
210 /* Index by quantity number, gives the mode of the quantity. */
212 static enum machine_mode *qty_mode;
214 /* Indexed by quantity number, gives the rtx of the constant value of the
215 quantity, or zero if it does not have a known value.
216 A sum of the frame pointer (or arg pointer) plus a constant
217 can also be entered here. */
219 static rtx *qty_const;
221 /* Indexed by qty number, gives the insn that stored the constant value
222 recorded in `qty_const'. */
224 static rtx *qty_const_insn;
226 /* The next three variables are used to track when a comparison between a
227 quantity and some constant or register has been passed. In that case, we
228 know the results of the comparison in case we see it again. These variables
229 record a comparison that is known to be true. */
231 /* Indexed by qty number, gives the rtx code of a comparison with a known
232 result involving this quantity. If none, it is UNKNOWN. */
233 static enum rtx_code *qty_comparison_code;
235 /* Indexed by qty number, gives the constant being compared against in a
236 comparison of known result. If no such comparison, it is undefined.
237 If the comparison is not with a constant, it is zero. */
239 static rtx *qty_comparison_const;
241 /* Indexed by qty number, gives the quantity being compared against in a
242 comparison of known result. If no such comparison, if it undefined.
243 If the comparison is not with a register, it is -1. */
245 static int *qty_comparison_qty;
248 /* For machines that have a CC0, we do not record its value in the hash
249 table since its use is guaranteed to be the insn immediately following
250 its definition and any other insn is presumed to invalidate it.
252 Instead, we store below the value last assigned to CC0. If it should
253 happen to be a constant, it is stored in preference to the actual
254 assigned value. In case it is a constant, we store the mode in which
255 the constant should be interpreted. */
257 static rtx prev_insn_cc0;
258 static enum machine_mode prev_insn_cc0_mode;
261 /* Previous actual insn. 0 if at first insn of basic block. */
263 static rtx prev_insn;
265 /* Insn being scanned. */
267 static rtx this_insn;
269 /* Index by (pseudo) register number, gives the quantity number
270 of the register's current contents. */
274 /* Index by (pseudo) register number, gives the number of the next (or
275 previous) (pseudo) register in the chain of registers sharing the same
278 Or -1 if this register is at the end of the chain.
280 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
282 static int *reg_next_eqv;
283 static int *reg_prev_eqv;
285 /* Index by (pseudo) register number, gives the number of times
286 that register has been altered in the current basic block. */
288 static int *reg_tick;
290 /* Index by (pseudo) register number, gives the reg_tick value at which
291 rtx's containing this register are valid in the hash table.
292 If this does not equal the current reg_tick value, such expressions
293 existing in the hash table are invalid.
294 If this is -1, no expressions containing this register have been
295 entered in the table. */
297 static int *reg_in_table;
299 /* A HARD_REG_SET containing all the hard registers for which there is
300 currently a REG expression in the hash table. Note the difference
301 from the above variables, which indicate if the REG is mentioned in some
302 expression in the table. */
304 static HARD_REG_SET hard_regs_in_table;
306 /* A HARD_REG_SET containing all the hard registers that are invalidated
309 static HARD_REG_SET regs_invalidated_by_call;
311 /* Two vectors of ints:
312 one containing max_reg -1's; the other max_reg + 500 (an approximation
313 for max_qty) elements where element i contains i.
314 These are used to initialize various other vectors fast. */
316 static int *all_minus_one;
317 static int *consec_ints;
319 /* CUID of insn that starts the basic block currently being cse-processed. */
321 static int cse_basic_block_start;
323 /* CUID of insn that ends the basic block currently being cse-processed. */
325 static int cse_basic_block_end;
327 /* Vector mapping INSN_UIDs to cuids.
328 The cuids are like uids but increase monotonically always.
329 We use them to see whether a reg is used outside a given basic block. */
331 static int *uid_cuid;
333 /* Highest UID in UID_CUID. */
336 /* Get the cuid of an insn. */
338 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
340 /* Nonzero if cse has altered conditional jump insns
341 in such a way that jump optimization should be redone. */
343 static int cse_jumps_altered;
345 /* canon_hash stores 1 in do_not_record
346 if it notices a reference to CC0, PC, or some other volatile
349 static int do_not_record;
351 #ifdef LOAD_EXTEND_OP
353 /* Scratch rtl used when looking for load-extended copy of a MEM. */
354 static rtx memory_extend_rtx;
357 /* canon_hash stores 1 in hash_arg_in_memory
358 if it notices a reference to memory within the expression being hashed. */
360 static int hash_arg_in_memory;
362 /* canon_hash stores 1 in hash_arg_in_struct
363 if it notices a reference to memory that's part of a structure. */
365 static int hash_arg_in_struct;
367 /* The hash table contains buckets which are chains of `struct table_elt's,
368 each recording one expression's information.
369 That expression is in the `exp' field.
371 Those elements with the same hash code are chained in both directions
372 through the `next_same_hash' and `prev_same_hash' fields.
374 Each set of expressions with equivalent values
375 are on a two-way chain through the `next_same_value'
376 and `prev_same_value' fields, and all point with
377 the `first_same_value' field at the first element in
378 that chain. The chain is in order of increasing cost.
379 Each element's cost value is in its `cost' field.
381 The `in_memory' field is nonzero for elements that
382 involve any reference to memory. These elements are removed
383 whenever a write is done to an unidentified location in memory.
384 To be safe, we assume that a memory address is unidentified unless
385 the address is either a symbol constant or a constant plus
386 the frame pointer or argument pointer.
388 The `in_struct' field is nonzero for elements that
389 involve any reference to memory inside a structure or array.
391 The `related_value' field is used to connect related expressions
392 (that differ by adding an integer).
393 The related expressions are chained in a circular fashion.
394 `related_value' is zero for expressions for which this
397 The `cost' field stores the cost of this element's expression.
399 The `is_const' flag is set if the element is a constant (including
402 The `flag' field is used as a temporary during some search routines.
404 The `mode' field is usually the same as GET_MODE (`exp'), but
405 if `exp' is a CONST_INT and has no machine mode then the `mode'
406 field is the mode it was being used as. Each constant is
407 recorded separately for each mode it is used with. */
413 struct table_elt *next_same_hash;
414 struct table_elt *prev_same_hash;
415 struct table_elt *next_same_value;
416 struct table_elt *prev_same_value;
417 struct table_elt *first_same_value;
418 struct table_elt *related_value;
420 enum machine_mode mode;
427 /* We don't want a lot of buckets, because we rarely have very many
428 things stored in the hash table, and a lot of buckets slows
429 down a lot of loops that happen frequently. */
432 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
433 register (hard registers may require `do_not_record' to be set). */
436 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
437 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
438 : canon_hash (X, M) % NBUCKETS)
440 /* Determine whether register number N is considered a fixed register for CSE.
441 It is desirable to replace other regs with fixed regs, to reduce need for
443 A reg wins if it is either the frame pointer or designated as fixed,
444 but not if it is an overlapping register. */
445 #ifdef OVERLAPPING_REGNO_P
446 #define FIXED_REGNO_P(N) \
447 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
448 || fixed_regs[N] || global_regs[N]) \
449 && ! OVERLAPPING_REGNO_P ((N)))
451 #define FIXED_REGNO_P(N) \
452 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
453 || fixed_regs[N] || global_regs[N])
456 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
457 hard registers and pointers into the frame are the cheapest with a cost
458 of 0. Next come pseudos with a cost of one and other hard registers with
459 a cost of 2. Aside from these special cases, call `rtx_cost'. */
461 #define CHEAP_REGNO(N) \
462 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
463 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
464 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
465 || ((N) < FIRST_PSEUDO_REGISTER \
466 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
468 /* A register is cheap if it is a user variable assigned to the register
469 or if its register number always corresponds to a cheap register. */
471 #define CHEAP_REG(N) \
472 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
473 || CHEAP_REGNO (REGNO (N)))
476 (GET_CODE (X) == REG \
477 ? (CHEAP_REG (X) ? 0 \
478 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
480 : rtx_cost (X, SET) * 2)
482 /* Determine if the quantity number for register X represents a valid index
483 into the `qty_...' variables. */
485 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
487 static struct table_elt *table[NBUCKETS];
489 /* Chain of `struct table_elt's made so far for this function
490 but currently removed from the table. */
492 static struct table_elt *free_element_chain;
494 /* Number of `struct table_elt' structures made so far for this function. */
496 static int n_elements_made;
498 /* Maximum value `n_elements_made' has had so far in this compilation
499 for functions previously processed. */
501 static int max_elements_made;
503 /* Surviving equivalence class when two equivalence classes are merged
504 by recording the effects of a jump in the last insn. Zero if the
505 last insn was not a conditional jump. */
507 static struct table_elt *last_jump_equiv_class;
509 /* Set to the cost of a constant pool reference if one was found for a
510 symbolic constant. If this was found, it means we should try to
511 convert constants into constant pool entries if they don't fit in
514 static int constant_pool_entries_cost;
516 /* Bits describing what kind of values in memory must be invalidated
517 for a particular instruction. If all three bits are zero,
518 no memory refs need to be invalidated. Each bit is more powerful
519 than the preceding ones, and if a bit is set then the preceding
522 Here is how the bits are set:
523 Pushing onto the stack invalidates only the stack pointer,
524 writing at a fixed address invalidates only variable addresses,
525 writing in a structure element at variable address
526 invalidates all but scalar variables,
527 and writing in anything else at variable address invalidates everything. */
531 int sp : 1; /* Invalidate stack pointer. */
532 int var : 1; /* Invalidate variable addresses. */
533 int nonscalar : 1; /* Invalidate all but scalar variables. */
534 int all : 1; /* Invalidate all memory refs. */
537 /* Define maximum length of a branch path. */
539 #define PATHLENGTH 10
541 /* This data describes a block that will be processed by cse_basic_block. */
543 struct cse_basic_block_data {
544 /* Lowest CUID value of insns in block. */
546 /* Highest CUID value of insns in block. */
548 /* Total number of SETs in block. */
550 /* Last insn in the block. */
552 /* Size of current branch path, if any. */
554 /* Current branch path, indicating which branches will be taken. */
556 /* The branch insn. */
558 /* Whether it should be taken or not. AROUND is the same as taken
559 except that it is used when the destination label is not preceded
561 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
565 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
566 virtual regs here because the simplify_*_operation routines are called
567 by integrate.c, which is called before virtual register instantiation. */
569 #define FIXED_BASE_PLUS_P(X) \
570 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
571 || (X) == arg_pointer_rtx \
572 || (X) == virtual_stack_vars_rtx \
573 || (X) == virtual_incoming_args_rtx \
574 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
575 && (XEXP (X, 0) == frame_pointer_rtx \
576 || XEXP (X, 0) == hard_frame_pointer_rtx \
577 || XEXP (X, 0) == arg_pointer_rtx \
578 || XEXP (X, 0) == virtual_stack_vars_rtx \
579 || XEXP (X, 0) == virtual_incoming_args_rtx)))
581 /* Similar, but also allows reference to the stack pointer.
583 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
584 arg_pointer_rtx by itself is nonzero, because on at least one machine,
585 the i960, the arg pointer is zero when it is unused. */
587 #define NONZERO_BASE_PLUS_P(X) \
588 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
589 || (X) == virtual_stack_vars_rtx \
590 || (X) == virtual_incoming_args_rtx \
591 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
592 && (XEXP (X, 0) == frame_pointer_rtx \
593 || XEXP (X, 0) == hard_frame_pointer_rtx \
594 || XEXP (X, 0) == arg_pointer_rtx \
595 || XEXP (X, 0) == virtual_stack_vars_rtx \
596 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
597 || (X) == stack_pointer_rtx \
598 || (X) == virtual_stack_dynamic_rtx \
599 || (X) == virtual_outgoing_args_rtx \
600 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
601 && (XEXP (X, 0) == stack_pointer_rtx \
602 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
603 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
605 static void new_basic_block PROTO((void));
606 static void make_new_qty PROTO((int));
607 static void make_regs_eqv PROTO((int, int));
608 static void delete_reg_equiv PROTO((int));
609 static int mention_regs PROTO((rtx));
610 static int insert_regs PROTO((rtx, struct table_elt *, int));
611 static void free_element PROTO((struct table_elt *));
612 static void remove_from_table PROTO((struct table_elt *, unsigned));
613 static struct table_elt *get_element PROTO((void));
614 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
615 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
616 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
617 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
619 static void merge_equiv_classes PROTO((struct table_elt *,
620 struct table_elt *));
621 static void invalidate PROTO((rtx, enum machine_mode));
622 static void remove_invalid_refs PROTO((int));
623 static void rehash_using_reg PROTO((rtx));
624 static void invalidate_memory PROTO((struct write_data *));
625 static void invalidate_for_call PROTO((void));
626 static rtx use_related_value PROTO((rtx, struct table_elt *));
627 static unsigned canon_hash PROTO((rtx, enum machine_mode));
628 static unsigned safe_hash PROTO((rtx, enum machine_mode));
629 static int exp_equiv_p PROTO((rtx, rtx, int, int));
630 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
633 static int refers_to_p PROTO((rtx, rtx));
634 static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT,
636 static int cse_rtx_addr_varies_p PROTO((rtx));
637 static rtx canon_reg PROTO((rtx, rtx));
638 static void find_best_addr PROTO((rtx, rtx *));
639 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
641 enum machine_mode *));
642 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
644 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
646 static rtx fold_rtx PROTO((rtx, rtx));
647 static rtx equiv_constant PROTO((rtx));
648 static void record_jump_equiv PROTO((rtx, int));
649 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
651 static void cse_insn PROTO((rtx, int));
652 static void note_mem_written PROTO((rtx, struct write_data *));
653 static void invalidate_from_clobbers PROTO((struct write_data *, rtx));
654 static rtx cse_process_notes PROTO((rtx, rtx));
655 static void cse_around_loop PROTO((rtx));
656 static void invalidate_skipped_set PROTO((rtx, rtx));
657 static void invalidate_skipped_block PROTO((rtx));
658 static void cse_check_loop_start PROTO((rtx, rtx));
659 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
660 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
661 static void count_reg_usage PROTO((rtx, int *, rtx, int));
663 extern int rtx_equal_function_value_matters;
665 /* Return an estimate of the cost of computing rtx X.
666 One use is in cse, to decide which expression to keep in the hash table.
667 Another is in rtl generation, to pick the cheapest way to multiply.
668 Other uses like the latter are expected in the future. */
670 /* Return the right cost to give to an operation
671 to make the cost of the corresponding register-to-register instruction
672 N times that of a fast register-to-register instruction. */
674 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
677 rtx_cost (x, outer_code)
679 enum rtx_code outer_code;
682 register enum rtx_code code;
689 /* Compute the default costs of certain things.
690 Note that RTX_COSTS can override the defaults. */
696 /* Count multiplication by 2**n as a shift,
697 because if we are considering it, we would output it as a shift. */
698 if (GET_CODE (XEXP (x, 1)) == CONST_INT
699 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
702 total = COSTS_N_INSNS (5);
708 total = COSTS_N_INSNS (7);
711 /* Used in loop.c and combine.c as a marker. */
715 /* We don't want these to be used in substitutions because
716 we have no way of validating the resulting insn. So assign
717 anything containing an ASM_OPERANDS a very high cost. */
727 return ! CHEAP_REG (x);
730 /* If we can't tie these modes, make this expensive. The larger
731 the mode, the more expensive it is. */
732 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
733 return COSTS_N_INSNS (2
734 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
737 RTX_COSTS (x, code, outer_code);
739 CONST_COSTS (x, code, outer_code);
742 /* Sum the costs of the sub-rtx's, plus cost of this operation,
743 which is already in total. */
745 fmt = GET_RTX_FORMAT (code);
746 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
748 total += rtx_cost (XEXP (x, i), code);
749 else if (fmt[i] == 'E')
750 for (j = 0; j < XVECLEN (x, i); j++)
751 total += rtx_cost (XVECEXP (x, i, j), code);
756 /* Clear the hash table and initialize each register with its own quantity,
757 for a new basic block. */
766 bzero ((char *) reg_tick, max_reg * sizeof (int));
768 bcopy ((char *) all_minus_one, (char *) reg_in_table,
769 max_reg * sizeof (int));
770 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
771 CLEAR_HARD_REG_SET (hard_regs_in_table);
773 /* The per-quantity values used to be initialized here, but it is
774 much faster to initialize each as it is made in `make_new_qty'. */
776 for (i = 0; i < NBUCKETS; i++)
778 register struct table_elt *this, *next;
779 for (this = table[i]; this; this = next)
781 next = this->next_same_hash;
786 bzero ((char *) table, sizeof table);
795 /* Say that register REG contains a quantity not in any register before
796 and initialize that quantity. */
804 if (next_qty >= max_qty)
807 q = reg_qty[reg] = next_qty++;
808 qty_first_reg[q] = reg;
809 qty_last_reg[q] = reg;
810 qty_const[q] = qty_const_insn[q] = 0;
811 qty_comparison_code[q] = UNKNOWN;
813 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
816 /* Make reg NEW equivalent to reg OLD.
817 OLD is not changing; NEW is. */
820 make_regs_eqv (new, old)
821 register int new, old;
823 register int lastr, firstr;
824 register int q = reg_qty[old];
826 /* Nothing should become eqv until it has a "non-invalid" qty number. */
827 if (! REGNO_QTY_VALID_P (old))
831 firstr = qty_first_reg[q];
832 lastr = qty_last_reg[q];
834 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
835 hard regs. Among pseudos, if NEW will live longer than any other reg
836 of the same qty, and that is beyond the current basic block,
837 make it the new canonical replacement for this qty. */
838 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
839 /* Certain fixed registers might be of the class NO_REGS. This means
840 that not only can they not be allocated by the compiler, but
841 they cannot be used in substitutions or canonicalizations
843 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
844 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
845 || (new >= FIRST_PSEUDO_REGISTER
846 && (firstr < FIRST_PSEUDO_REGISTER
847 || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end
848 || (uid_cuid[regno_first_uid[new]]
849 < cse_basic_block_start))
850 && (uid_cuid[regno_last_uid[new]]
851 > uid_cuid[regno_last_uid[firstr]]))))))
853 reg_prev_eqv[firstr] = new;
854 reg_next_eqv[new] = firstr;
855 reg_prev_eqv[new] = -1;
856 qty_first_reg[q] = new;
860 /* If NEW is a hard reg (known to be non-fixed), insert at end.
861 Otherwise, insert before any non-fixed hard regs that are at the
862 end. Registers of class NO_REGS cannot be used as an
863 equivalent for anything. */
864 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
865 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
866 && new >= FIRST_PSEUDO_REGISTER)
867 lastr = reg_prev_eqv[lastr];
868 reg_next_eqv[new] = reg_next_eqv[lastr];
869 if (reg_next_eqv[lastr] >= 0)
870 reg_prev_eqv[reg_next_eqv[lastr]] = new;
872 qty_last_reg[q] = new;
873 reg_next_eqv[lastr] = new;
874 reg_prev_eqv[new] = lastr;
878 /* Remove REG from its equivalence class. */
881 delete_reg_equiv (reg)
884 register int q = reg_qty[reg];
887 /* If invalid, do nothing. */
891 p = reg_prev_eqv[reg];
892 n = reg_next_eqv[reg];
901 qty_first_reg[q] = n;
906 /* Remove any invalid expressions from the hash table
907 that refer to any of the registers contained in expression X.
909 Make sure that newly inserted references to those registers
910 as subexpressions will be considered valid.
912 mention_regs is not called when a register itself
913 is being stored in the table.
915 Return 1 if we have done something that may have changed the hash code
922 register enum rtx_code code;
925 register int changed = 0;
933 register int regno = REGNO (x);
934 register int endregno
935 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
936 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
939 for (i = regno; i < endregno; i++)
941 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
942 remove_invalid_refs (i);
944 reg_in_table[i] = reg_tick[i];
950 /* If X is a comparison or a COMPARE and either operand is a register
951 that does not have a quantity, give it one. This is so that a later
952 call to record_jump_equiv won't cause X to be assigned a different
953 hash code and not found in the table after that call.
955 It is not necessary to do this here, since rehash_using_reg can
956 fix up the table later, but doing this here eliminates the need to
957 call that expensive function in the most common case where the only
958 use of the register is in the comparison. */
960 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
962 if (GET_CODE (XEXP (x, 0)) == REG
963 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
964 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
966 rehash_using_reg (XEXP (x, 0));
970 if (GET_CODE (XEXP (x, 1)) == REG
971 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
972 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
974 rehash_using_reg (XEXP (x, 1));
979 fmt = GET_RTX_FORMAT (code);
980 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
982 changed |= mention_regs (XEXP (x, i));
983 else if (fmt[i] == 'E')
984 for (j = 0; j < XVECLEN (x, i); j++)
985 changed |= mention_regs (XVECEXP (x, i, j));
990 /* Update the register quantities for inserting X into the hash table
991 with a value equivalent to CLASSP.
992 (If the class does not contain a REG, it is irrelevant.)
993 If MODIFIED is nonzero, X is a destination; it is being modified.
994 Note that delete_reg_equiv should be called on a register
995 before insert_regs is done on that register with MODIFIED != 0.
997 Nonzero value means that elements of reg_qty have changed
998 so X's hash code may be different. */
1001 insert_regs (x, classp, modified)
1003 struct table_elt *classp;
1006 if (GET_CODE (x) == REG)
1008 register int regno = REGNO (x);
1010 /* If REGNO is in the equivalence table already but is of the
1011 wrong mode for that equivalence, don't do anything here. */
1013 if (REGNO_QTY_VALID_P (regno)
1014 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1017 if (modified || ! REGNO_QTY_VALID_P (regno))
1020 for (classp = classp->first_same_value;
1022 classp = classp->next_same_value)
1023 if (GET_CODE (classp->exp) == REG
1024 && GET_MODE (classp->exp) == GET_MODE (x))
1026 make_regs_eqv (regno, REGNO (classp->exp));
1030 make_new_qty (regno);
1031 qty_mode[reg_qty[regno]] = GET_MODE (x);
1038 /* If X is a SUBREG, we will likely be inserting the inner register in the
1039 table. If that register doesn't have an assigned quantity number at
1040 this point but does later, the insertion that we will be doing now will
1041 not be accessible because its hash code will have changed. So assign
1042 a quantity number now. */
1044 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1045 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1047 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1048 mention_regs (SUBREG_REG (x));
1052 return mention_regs (x);
1055 /* Look in or update the hash table. */
1057 /* Put the element ELT on the list of free elements. */
1061 struct table_elt *elt;
1063 elt->next_same_hash = free_element_chain;
1064 free_element_chain = elt;
1067 /* Return an element that is free for use. */
1069 static struct table_elt *
1072 struct table_elt *elt = free_element_chain;
1075 free_element_chain = elt->next_same_hash;
1079 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1082 /* Remove table element ELT from use in the table.
1083 HASH is its hash code, made using the HASH macro.
1084 It's an argument because often that is known in advance
1085 and we save much time not recomputing it. */
1088 remove_from_table (elt, hash)
1089 register struct table_elt *elt;
1095 /* Mark this element as removed. See cse_insn. */
1096 elt->first_same_value = 0;
1098 /* Remove the table element from its equivalence class. */
1101 register struct table_elt *prev = elt->prev_same_value;
1102 register struct table_elt *next = elt->next_same_value;
1104 if (next) next->prev_same_value = prev;
1107 prev->next_same_value = next;
1110 register struct table_elt *newfirst = next;
1113 next->first_same_value = newfirst;
1114 next = next->next_same_value;
1119 /* Remove the table element from its hash bucket. */
1122 register struct table_elt *prev = elt->prev_same_hash;
1123 register struct table_elt *next = elt->next_same_hash;
1125 if (next) next->prev_same_hash = prev;
1128 prev->next_same_hash = next;
1129 else if (table[hash] == elt)
1133 /* This entry is not in the proper hash bucket. This can happen
1134 when two classes were merged by `merge_equiv_classes'. Search
1135 for the hash bucket that it heads. This happens only very
1136 rarely, so the cost is acceptable. */
1137 for (hash = 0; hash < NBUCKETS; hash++)
1138 if (table[hash] == elt)
1143 /* Remove the table element from its related-value circular chain. */
1145 if (elt->related_value != 0 && elt->related_value != elt)
1147 register struct table_elt *p = elt->related_value;
1148 while (p->related_value != elt)
1149 p = p->related_value;
1150 p->related_value = elt->related_value;
1151 if (p->related_value == p)
1152 p->related_value = 0;
1158 /* Look up X in the hash table and return its table element,
1159 or 0 if X is not in the table.
1161 MODE is the machine-mode of X, or if X is an integer constant
1162 with VOIDmode then MODE is the mode with which X will be used.
1164 Here we are satisfied to find an expression whose tree structure
1167 static struct table_elt *
1168 lookup (x, hash, mode)
1171 enum machine_mode mode;
1173 register struct table_elt *p;
1175 for (p = table[hash]; p; p = p->next_same_hash)
1176 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1177 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1183 /* Like `lookup' but don't care whether the table element uses invalid regs.
1184 Also ignore discrepancies in the machine mode of a register. */
1186 static struct table_elt *
1187 lookup_for_remove (x, hash, mode)
1190 enum machine_mode mode;
1192 register struct table_elt *p;
1194 if (GET_CODE (x) == REG)
1196 int regno = REGNO (x);
1197 /* Don't check the machine mode when comparing registers;
1198 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1199 for (p = table[hash]; p; p = p->next_same_hash)
1200 if (GET_CODE (p->exp) == REG
1201 && REGNO (p->exp) == regno)
1206 for (p = table[hash]; p; p = p->next_same_hash)
1207 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1214 /* Look for an expression equivalent to X and with code CODE.
1215 If one is found, return that expression. */
1218 lookup_as_function (x, code)
1222 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1227 for (p = p->first_same_value; p; p = p->next_same_value)
1229 if (GET_CODE (p->exp) == code
1230 /* Make sure this is a valid entry in the table. */
1231 && exp_equiv_p (p->exp, p->exp, 1, 0))
1238 /* Insert X in the hash table, assuming HASH is its hash code
1239 and CLASSP is an element of the class it should go in
1240 (or 0 if a new class should be made).
1241 It is inserted at the proper position to keep the class in
1242 the order cheapest first.
1244 MODE is the machine-mode of X, or if X is an integer constant
1245 with VOIDmode then MODE is the mode with which X will be used.
1247 For elements of equal cheapness, the most recent one
1248 goes in front, except that the first element in the list
1249 remains first unless a cheaper element is added. The order of
1250 pseudo-registers does not matter, as canon_reg will be called to
1251 find the cheapest when a register is retrieved from the table.
1253 The in_memory field in the hash table element is set to 0.
1254 The caller must set it nonzero if appropriate.
1256 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1257 and if insert_regs returns a nonzero value
1258 you must then recompute its hash code before calling here.
1260 If necessary, update table showing constant values of quantities. */
1262 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1264 static struct table_elt *
1265 insert (x, classp, hash, mode)
1267 register struct table_elt *classp;
1269 enum machine_mode mode;
1271 register struct table_elt *elt;
1273 /* If X is a register and we haven't made a quantity for it,
1274 something is wrong. */
1275 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1278 /* If X is a hard register, show it is being put in the table. */
1279 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1281 int regno = REGNO (x);
1282 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1285 for (i = regno; i < endregno; i++)
1286 SET_HARD_REG_BIT (hard_regs_in_table, i);
1290 /* Put an element for X into the right hash bucket. */
1292 elt = get_element ();
1294 elt->cost = COST (x);
1295 elt->next_same_value = 0;
1296 elt->prev_same_value = 0;
1297 elt->next_same_hash = table[hash];
1298 elt->prev_same_hash = 0;
1299 elt->related_value = 0;
1302 elt->is_const = (CONSTANT_P (x)
1303 /* GNU C++ takes advantage of this for `this'
1304 (and other const values). */
1305 || (RTX_UNCHANGING_P (x)
1306 && GET_CODE (x) == REG
1307 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1308 || FIXED_BASE_PLUS_P (x));
1311 table[hash]->prev_same_hash = elt;
1314 /* Put it into the proper value-class. */
1317 classp = classp->first_same_value;
1318 if (CHEAPER (elt, classp))
1319 /* Insert at the head of the class */
1321 register struct table_elt *p;
1322 elt->next_same_value = classp;
1323 classp->prev_same_value = elt;
1324 elt->first_same_value = elt;
1326 for (p = classp; p; p = p->next_same_value)
1327 p->first_same_value = elt;
1331 /* Insert not at head of the class. */
1332 /* Put it after the last element cheaper than X. */
1333 register struct table_elt *p, *next;
1334 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1336 /* Put it after P and before NEXT. */
1337 elt->next_same_value = next;
1339 next->prev_same_value = elt;
1340 elt->prev_same_value = p;
1341 p->next_same_value = elt;
1342 elt->first_same_value = classp;
1346 elt->first_same_value = elt;
1348 /* If this is a constant being set equivalent to a register or a register
1349 being set equivalent to a constant, note the constant equivalence.
1351 If this is a constant, it cannot be equivalent to a different constant,
1352 and a constant is the only thing that can be cheaper than a register. So
1353 we know the register is the head of the class (before the constant was
1356 If this is a register that is not already known equivalent to a
1357 constant, we must check the entire class.
1359 If this is a register that is already known equivalent to an insn,
1360 update `qty_const_insn' to show that `this_insn' is the latest
1361 insn making that quantity equivalent to the constant. */
1363 if (elt->is_const && classp && GET_CODE (classp->exp) == REG)
1365 qty_const[reg_qty[REGNO (classp->exp)]]
1366 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1367 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1370 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]])
1372 register struct table_elt *p;
1374 for (p = classp; p != 0; p = p->next_same_value)
1378 qty_const[reg_qty[REGNO (x)]]
1379 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1380 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1386 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1387 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1388 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1390 /* If this is a constant with symbolic value,
1391 and it has a term with an explicit integer value,
1392 link it up with related expressions. */
1393 if (GET_CODE (x) == CONST)
1395 rtx subexp = get_related_value (x);
1397 struct table_elt *subelt, *subelt_prev;
1401 /* Get the integer-free subexpression in the hash table. */
1402 subhash = safe_hash (subexp, mode) % NBUCKETS;
1403 subelt = lookup (subexp, subhash, mode);
1405 subelt = insert (subexp, NULL_PTR, subhash, mode);
1406 /* Initialize SUBELT's circular chain if it has none. */
1407 if (subelt->related_value == 0)
1408 subelt->related_value = subelt;
1409 /* Find the element in the circular chain that precedes SUBELT. */
1410 subelt_prev = subelt;
1411 while (subelt_prev->related_value != subelt)
1412 subelt_prev = subelt_prev->related_value;
1413 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1414 This way the element that follows SUBELT is the oldest one. */
1415 elt->related_value = subelt_prev->related_value;
1416 subelt_prev->related_value = elt;
1423 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1424 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1425 the two classes equivalent.
1427 CLASS1 will be the surviving class; CLASS2 should not be used after this
1430 Any invalid entries in CLASS2 will not be copied. */
1433 merge_equiv_classes (class1, class2)
1434 struct table_elt *class1, *class2;
1436 struct table_elt *elt, *next, *new;
1438 /* Ensure we start with the head of the classes. */
1439 class1 = class1->first_same_value;
1440 class2 = class2->first_same_value;
1442 /* If they were already equal, forget it. */
1443 if (class1 == class2)
1446 for (elt = class2; elt; elt = next)
1450 enum machine_mode mode = elt->mode;
1452 next = elt->next_same_value;
1454 /* Remove old entry, make a new one in CLASS1's class.
1455 Don't do this for invalid entries as we cannot find their
1456 hash code (it also isn't necessary). */
1457 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1459 hash_arg_in_memory = 0;
1460 hash_arg_in_struct = 0;
1461 hash = HASH (exp, mode);
1463 if (GET_CODE (exp) == REG)
1464 delete_reg_equiv (REGNO (exp));
1466 remove_from_table (elt, hash);
1468 if (insert_regs (exp, class1, 0))
1470 rehash_using_reg (exp);
1471 hash = HASH (exp, mode);
1473 new = insert (exp, class1, hash, mode);
1474 new->in_memory = hash_arg_in_memory;
1475 new->in_struct = hash_arg_in_struct;
1480 /* Remove from the hash table, or mark as invalid,
1481 all expressions whose values could be altered by storing in X.
1482 X is a register, a subreg, or a memory reference with nonvarying address
1483 (because, when a memory reference with a varying address is stored in,
1484 all memory references are removed by invalidate_memory
1485 so specific invalidation is superfluous).
1486 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1487 instead of just the amount indicated by the mode of X. This is only used
1488 for bitfield stores into memory.
1490 A nonvarying address may be just a register or just
1491 a symbol reference, or it may be either of those plus
1492 a numeric offset. */
1495 invalidate (x, full_mode)
1497 enum machine_mode full_mode;
1500 register struct table_elt *p;
1502 HOST_WIDE_INT start, end;
1504 /* If X is a register, dependencies on its contents
1505 are recorded through the qty number mechanism.
1506 Just change the qty number of the register,
1507 mark it as invalid for expressions that refer to it,
1508 and remove it itself. */
1510 if (GET_CODE (x) == REG)
1512 register int regno = REGNO (x);
1513 register unsigned hash = HASH (x, GET_MODE (x));
1515 /* Remove REGNO from any quantity list it might be on and indicate
1516 that it's value might have changed. If it is a pseudo, remove its
1517 entry from the hash table.
1519 For a hard register, we do the first two actions above for any
1520 additional hard registers corresponding to X. Then, if any of these
1521 registers are in the table, we must remove any REG entries that
1522 overlap these registers. */
1524 delete_reg_equiv (regno);
1527 if (regno >= FIRST_PSEUDO_REGISTER)
1528 remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash);
1531 HOST_WIDE_INT in_table
1532 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1533 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1534 int tregno, tendregno;
1535 register struct table_elt *p, *next;
1537 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1539 for (i = regno + 1; i < endregno; i++)
1541 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1542 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1543 delete_reg_equiv (i);
1548 for (hash = 0; hash < NBUCKETS; hash++)
1549 for (p = table[hash]; p; p = next)
1551 next = p->next_same_hash;
1553 if (GET_CODE (p->exp) != REG
1554 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1557 tregno = REGNO (p->exp);
1559 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1560 if (tendregno > regno && tregno < endregno)
1561 remove_from_table (p, hash);
1568 if (GET_CODE (x) == SUBREG)
1570 if (GET_CODE (SUBREG_REG (x)) != REG)
1572 invalidate (SUBREG_REG (x), VOIDmode);
1576 /* X is not a register; it must be a memory reference with
1577 a nonvarying address. Remove all hash table elements
1578 that refer to overlapping pieces of memory. */
1580 if (GET_CODE (x) != MEM)
1583 if (full_mode == VOIDmode)
1584 full_mode = GET_MODE (x);
1586 set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (full_mode),
1587 &base, &start, &end);
1589 for (i = 0; i < NBUCKETS; i++)
1591 register struct table_elt *next;
1592 for (p = table[i]; p; p = next)
1594 next = p->next_same_hash;
1595 if (refers_to_mem_p (p->exp, base, start, end))
1596 remove_from_table (p, i);
1601 /* Remove all expressions that refer to register REGNO,
1602 since they are already invalid, and we are about to
1603 mark that register valid again and don't want the old
1604 expressions to reappear as valid. */
1607 remove_invalid_refs (regno)
1611 register struct table_elt *p, *next;
1613 for (i = 0; i < NBUCKETS; i++)
1614 for (p = table[i]; p; p = next)
1616 next = p->next_same_hash;
1617 if (GET_CODE (p->exp) != REG
1618 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1619 remove_from_table (p, i);
1623 /* Recompute the hash codes of any valid entries in the hash table that
1624 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1626 This is called when we make a jump equivalence. */
1629 rehash_using_reg (x)
1633 struct table_elt *p, *next;
1636 if (GET_CODE (x) == SUBREG)
1639 /* If X is not a register or if the register is known not to be in any
1640 valid entries in the table, we have no work to do. */
1642 if (GET_CODE (x) != REG
1643 || reg_in_table[REGNO (x)] < 0
1644 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1647 /* Scan all hash chains looking for valid entries that mention X.
1648 If we find one and it is in the wrong hash chain, move it. We can skip
1649 objects that are registers, since they are handled specially. */
1651 for (i = 0; i < NBUCKETS; i++)
1652 for (p = table[i]; p; p = next)
1654 next = p->next_same_hash;
1655 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1656 && exp_equiv_p (p->exp, p->exp, 1, 0)
1657 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1659 if (p->next_same_hash)
1660 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1662 if (p->prev_same_hash)
1663 p->prev_same_hash->next_same_hash = p->next_same_hash;
1665 table[i] = p->next_same_hash;
1667 p->next_same_hash = table[hash];
1668 p->prev_same_hash = 0;
1670 table[hash]->prev_same_hash = p;
1676 /* Remove from the hash table all expressions that reference memory,
1677 or some of them as specified by *WRITES. */
1680 invalidate_memory (writes)
1681 struct write_data *writes;
1684 register struct table_elt *p, *next;
1685 int all = writes->all;
1686 int nonscalar = writes->nonscalar;
1688 for (i = 0; i < NBUCKETS; i++)
1689 for (p = table[i]; p; p = next)
1691 next = p->next_same_hash;
1694 || (nonscalar && p->in_struct)
1695 || cse_rtx_addr_varies_p (p->exp)))
1696 remove_from_table (p, i);
1700 /* Remove from the hash table any expression that is a call-clobbered
1701 register. Also update their TICK values. */
1704 invalidate_for_call ()
1706 int regno, endregno;
1709 struct table_elt *p, *next;
1712 /* Go through all the hard registers. For each that is clobbered in
1713 a CALL_INSN, remove the register from quantity chains and update
1714 reg_tick if defined. Also see if any of these registers is currently
1717 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1718 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1720 delete_reg_equiv (regno);
1721 if (reg_tick[regno] >= 0)
1724 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1727 /* In the case where we have no call-clobbered hard registers in the
1728 table, we are done. Otherwise, scan the table and remove any
1729 entry that overlaps a call-clobbered register. */
1732 for (hash = 0; hash < NBUCKETS; hash++)
1733 for (p = table[hash]; p; p = next)
1735 next = p->next_same_hash;
1737 if (GET_CODE (p->exp) != REG
1738 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1741 regno = REGNO (p->exp);
1742 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1744 for (i = regno; i < endregno; i++)
1745 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1747 remove_from_table (p, hash);
1753 /* Given an expression X of type CONST,
1754 and ELT which is its table entry (or 0 if it
1755 is not in the hash table),
1756 return an alternate expression for X as a register plus integer.
1757 If none can be found, return 0. */
1760 use_related_value (x, elt)
1762 struct table_elt *elt;
1764 register struct table_elt *relt = 0;
1765 register struct table_elt *p, *q;
1766 HOST_WIDE_INT offset;
1768 /* First, is there anything related known?
1769 If we have a table element, we can tell from that.
1770 Otherwise, must look it up. */
1772 if (elt != 0 && elt->related_value != 0)
1774 else if (elt == 0 && GET_CODE (x) == CONST)
1776 rtx subexp = get_related_value (x);
1778 relt = lookup (subexp,
1779 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1786 /* Search all related table entries for one that has an
1787 equivalent register. */
1792 /* This loop is strange in that it is executed in two different cases.
1793 The first is when X is already in the table. Then it is searching
1794 the RELATED_VALUE list of X's class (RELT). The second case is when
1795 X is not in the table. Then RELT points to a class for the related
1798 Ensure that, whatever case we are in, that we ignore classes that have
1799 the same value as X. */
1801 if (rtx_equal_p (x, p->exp))
1804 for (q = p->first_same_value; q; q = q->next_same_value)
1805 if (GET_CODE (q->exp) == REG)
1811 p = p->related_value;
1813 /* We went all the way around, so there is nothing to be found.
1814 Alternatively, perhaps RELT was in the table for some other reason
1815 and it has no related values recorded. */
1816 if (p == relt || p == 0)
1823 offset = (get_integer_term (x) - get_integer_term (p->exp));
1824 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1825 return plus_constant (q->exp, offset);
1828 /* Hash an rtx. We are careful to make sure the value is never negative.
1829 Equivalent registers hash identically.
1830 MODE is used in hashing for CONST_INTs only;
1831 otherwise the mode of X is used.
1833 Store 1 in do_not_record if any subexpression is volatile.
1835 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1836 which does not have the RTX_UNCHANGING_P bit set.
1837 In this case, also store 1 in hash_arg_in_struct
1838 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1840 Note that cse_insn knows that the hash code of a MEM expression
1841 is just (int) MEM plus the hash code of the address. */
1844 canon_hash (x, mode)
1846 enum machine_mode mode;
1849 register unsigned hash = 0;
1850 register enum rtx_code code;
1853 /* repeat is used to turn tail-recursion into iteration. */
1858 code = GET_CODE (x);
1863 register int regno = REGNO (x);
1865 /* On some machines, we can't record any non-fixed hard register,
1866 because extending its life will cause reload problems. We
1867 consider ap, fp, and sp to be fixed for this purpose.
1868 On all machines, we can't record any global registers. */
1870 if (regno < FIRST_PSEUDO_REGISTER
1871 && (global_regs[regno]
1872 #ifdef SMALL_REGISTER_CLASSES
1873 || (! fixed_regs[regno]
1874 && regno != FRAME_POINTER_REGNUM
1875 && regno != HARD_FRAME_POINTER_REGNUM
1876 && regno != ARG_POINTER_REGNUM
1877 && regno != STACK_POINTER_REGNUM)
1884 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
1890 unsigned HOST_WIDE_INT tem = INTVAL (x);
1891 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
1896 /* This is like the general case, except that it only counts
1897 the integers representing the constant. */
1898 hash += (unsigned) code + (unsigned) GET_MODE (x);
1899 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1901 unsigned tem = XINT (x, i);
1906 /* Assume there is only one rtx object for any given label. */
1909 += ((unsigned) LABEL_REF << 7) + (unsigned HOST_WIDE_INT) XEXP (x, 0);
1914 += ((unsigned) SYMBOL_REF << 7) + (unsigned HOST_WIDE_INT) XSTR (x, 0);
1918 if (MEM_VOLATILE_P (x))
1923 if (! RTX_UNCHANGING_P (x))
1925 hash_arg_in_memory = 1;
1926 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1928 /* Now that we have already found this special case,
1929 might as well speed it up as much as possible. */
1930 hash += (unsigned) MEM;
1941 case UNSPEC_VOLATILE:
1946 if (MEM_VOLATILE_P (x))
1953 i = GET_RTX_LENGTH (code) - 1;
1954 hash += (unsigned) code + (unsigned) GET_MODE (x);
1955 fmt = GET_RTX_FORMAT (code);
1960 rtx tem = XEXP (x, i);
1962 /* If we are about to do the last recursive call
1963 needed at this level, change it into iteration.
1964 This function is called enough to be worth it. */
1970 hash += canon_hash (tem, 0);
1972 else if (fmt[i] == 'E')
1973 for (j = 0; j < XVECLEN (x, i); j++)
1974 hash += canon_hash (XVECEXP (x, i, j), 0);
1975 else if (fmt[i] == 's')
1977 register unsigned char *p = (unsigned char *) XSTR (x, i);
1982 else if (fmt[i] == 'i')
1984 register unsigned tem = XINT (x, i);
1993 /* Like canon_hash but with no side effects. */
1998 enum machine_mode mode;
2000 int save_do_not_record = do_not_record;
2001 int save_hash_arg_in_memory = hash_arg_in_memory;
2002 int save_hash_arg_in_struct = hash_arg_in_struct;
2003 unsigned hash = canon_hash (x, mode);
2004 hash_arg_in_memory = save_hash_arg_in_memory;
2005 hash_arg_in_struct = save_hash_arg_in_struct;
2006 do_not_record = save_do_not_record;
2010 /* Return 1 iff X and Y would canonicalize into the same thing,
2011 without actually constructing the canonicalization of either one.
2012 If VALIDATE is nonzero,
2013 we assume X is an expression being processed from the rtl
2014 and Y was found in the hash table. We check register refs
2015 in Y for being marked as valid.
2017 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2018 that is known to be in the register. Ordinarily, we don't allow them
2019 to match, because letting them match would cause unpredictable results
2020 in all the places that search a hash table chain for an equivalent
2021 for a given value. A possible equivalent that has different structure
2022 has its hash code computed from different data. Whether the hash code
2023 is the same as that of the the given value is pure luck. */
2026 exp_equiv_p (x, y, validate, equal_values)
2032 register enum rtx_code code;
2035 /* Note: it is incorrect to assume an expression is equivalent to itself
2036 if VALIDATE is nonzero. */
2037 if (x == y && !validate)
2039 if (x == 0 || y == 0)
2042 code = GET_CODE (x);
2043 if (code != GET_CODE (y))
2048 /* If X is a constant and Y is a register or vice versa, they may be
2049 equivalent. We only have to validate if Y is a register. */
2050 if (CONSTANT_P (x) && GET_CODE (y) == REG
2051 && REGNO_QTY_VALID_P (REGNO (y))
2052 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2053 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2054 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2057 if (CONSTANT_P (y) && code == REG
2058 && REGNO_QTY_VALID_P (REGNO (x))
2059 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2060 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2066 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2067 if (GET_MODE (x) != GET_MODE (y))
2077 return INTVAL (x) == INTVAL (y);
2080 return XEXP (x, 0) == XEXP (y, 0);
2083 return XSTR (x, 0) == XSTR (y, 0);
2087 int regno = REGNO (y);
2089 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2090 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2093 /* If the quantities are not the same, the expressions are not
2094 equivalent. If there are and we are not to validate, they
2095 are equivalent. Otherwise, ensure all regs are up-to-date. */
2097 if (reg_qty[REGNO (x)] != reg_qty[regno])
2103 for (i = regno; i < endregno; i++)
2104 if (reg_in_table[i] != reg_tick[i])
2110 /* For commutative operations, check both orders. */
2118 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2119 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2120 validate, equal_values))
2121 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2122 validate, equal_values)
2123 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2124 validate, equal_values)));
2127 /* Compare the elements. If any pair of corresponding elements
2128 fail to match, return 0 for the whole things. */
2130 fmt = GET_RTX_FORMAT (code);
2131 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2136 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2141 if (XVECLEN (x, i) != XVECLEN (y, i))
2143 for (j = 0; j < XVECLEN (x, i); j++)
2144 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2145 validate, equal_values))
2150 if (strcmp (XSTR (x, i), XSTR (y, i)))
2155 if (XINT (x, i) != XINT (y, i))
2160 if (XWINT (x, i) != XWINT (y, i))
2175 /* Return 1 iff any subexpression of X matches Y.
2176 Here we do not require that X or Y be valid (for registers referred to)
2177 for being in the hash table. */
2184 register enum rtx_code code;
2190 if (x == 0 || y == 0)
2193 code = GET_CODE (x);
2194 /* If X as a whole has the same code as Y, they may match.
2196 if (code == GET_CODE (y))
2198 if (exp_equiv_p (x, y, 0, 1))
2202 /* X does not match, so try its subexpressions. */
2204 fmt = GET_RTX_FORMAT (code);
2205 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2214 if (refers_to_p (XEXP (x, i), y))
2217 else if (fmt[i] == 'E')
2220 for (j = 0; j < XVECLEN (x, i); j++)
2221 if (refers_to_p (XVECEXP (x, i, j), y))
2228 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2229 set PBASE, PSTART, and PEND which correspond to the base of the address,
2230 the starting offset, and ending offset respectively.
2232 ADDR is known to be a nonvarying address. */
2234 /* ??? Despite what the comments say, this function is in fact frequently
2235 passed varying addresses. This does not appear to cause any problems. */
2238 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2242 HOST_WIDE_INT *pstart, *pend;
2245 HOST_WIDE_INT start, end;
2251 /* Registers with nonvarying addresses usually have constant equivalents;
2252 but the frame pointer register is also possible. */
2253 if (GET_CODE (base) == REG
2255 && REGNO_QTY_VALID_P (REGNO (base))
2256 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2257 && qty_const[reg_qty[REGNO (base)]] != 0)
2258 base = qty_const[reg_qty[REGNO (base)]];
2259 else if (GET_CODE (base) == PLUS
2260 && GET_CODE (XEXP (base, 1)) == CONST_INT
2261 && GET_CODE (XEXP (base, 0)) == REG
2263 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2264 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2265 == GET_MODE (XEXP (base, 0)))
2266 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2268 start = INTVAL (XEXP (base, 1));
2269 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2272 /* Handle everything that we can find inside an address that has been
2273 viewed as constant. */
2277 /* If no part of this switch does a "continue", the code outside
2278 will exit this loop. */
2280 switch (GET_CODE (base))
2283 /* By definition, operand1 of a LO_SUM is the associated constant
2284 address. Use the associated constant address as the base
2286 base = XEXP (base, 1);
2290 /* Strip off CONST. */
2291 base = XEXP (base, 0);
2295 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2297 start += INTVAL (XEXP (base, 1));
2298 base = XEXP (base, 0);
2304 /* Handle the case of an AND which is the negative of a power of
2305 two. This is used to represent unaligned memory operations. */
2306 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2307 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2309 set_nonvarying_address_components (XEXP (base, 0), size,
2310 pbase, pstart, pend);
2312 /* Assume the worst misalignment. START is affected, but not
2313 END, so compensate but adjusting SIZE. Don't lose any
2314 constant we already had. */
2316 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2317 start += *pstart - INTVAL (XEXP (base, 1)) - 1;
2326 if (GET_CODE (base) == CONST_INT)
2328 start += INTVAL (base);
2334 /* Set the return values. */
2340 /* Return 1 iff any subexpression of X refers to memory
2341 at an address of BASE plus some offset
2342 such that any of the bytes' offsets fall between START (inclusive)
2343 and END (exclusive).
2345 The value is undefined if X is a varying address (as determined by
2346 cse_rtx_addr_varies_p). This function is not used in such cases.
2348 When used in the cse pass, `qty_const' is nonzero, and it is used
2349 to treat an address that is a register with a known constant value
2350 as if it were that constant value.
2351 In the loop pass, `qty_const' is zero, so this is not done. */
2354 refers_to_mem_p (x, base, start, end)
2356 HOST_WIDE_INT start, end;
2358 register HOST_WIDE_INT i;
2359 register enum rtx_code code;
2366 code = GET_CODE (x);
2369 register rtx addr = XEXP (x, 0); /* Get the address. */
2371 HOST_WIDE_INT mystart, myend;
2373 set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)),
2374 &mybase, &mystart, &myend);
2377 /* refers_to_mem_p is never called with varying addresses.
2378 If the base addresses are not equal, there is no chance
2379 of the memory addresses conflicting. */
2380 if (! rtx_equal_p (mybase, base))
2383 return myend > start && mystart < end;
2386 /* X does not match, so try its subexpressions. */
2388 fmt = GET_RTX_FORMAT (code);
2389 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2398 if (refers_to_mem_p (XEXP (x, i), base, start, end))
2401 else if (fmt[i] == 'E')
2404 for (j = 0; j < XVECLEN (x, i); j++)
2405 if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end))
2412 /* Nonzero if X refers to memory at a varying address;
2413 except that a register which has at the moment a known constant value
2414 isn't considered variable. */
2417 cse_rtx_addr_varies_p (x)
2420 /* We need not check for X and the equivalence class being of the same
2421 mode because if X is equivalent to a constant in some mode, it
2422 doesn't vary in any mode. */
2424 if (GET_CODE (x) == MEM
2425 && GET_CODE (XEXP (x, 0)) == REG
2426 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2427 && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]]
2428 && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0)
2431 if (GET_CODE (x) == MEM
2432 && GET_CODE (XEXP (x, 0)) == PLUS
2433 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2434 && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
2435 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0)))
2436 && (GET_MODE (XEXP (XEXP (x, 0), 0))
2437 == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2438 && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2441 return rtx_addr_varies_p (x);
2444 /* Canonicalize an expression:
2445 replace each register reference inside it
2446 with the "oldest" equivalent register.
2448 If INSN is non-zero and we are replacing a pseudo with a hard register
2449 or vice versa, validate_change is used to ensure that INSN remains valid
2450 after we make our substitution. The calls are made with IN_GROUP non-zero
2451 so apply_change_group must be called upon the outermost return from this
2452 function (unless INSN is zero). The result of apply_change_group can
2453 generally be discarded since the changes we are making are optional. */
2461 register enum rtx_code code;
2467 code = GET_CODE (x);
2485 /* Never replace a hard reg, because hard regs can appear
2486 in more than one machine mode, and we must preserve the mode
2487 of each occurrence. Also, some hard regs appear in
2488 MEMs that are shared and mustn't be altered. Don't try to
2489 replace any reg that maps to a reg of class NO_REGS. */
2490 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2491 || ! REGNO_QTY_VALID_P (REGNO (x)))
2494 first = qty_first_reg[reg_qty[REGNO (x)]];
2495 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2496 : REGNO_REG_CLASS (first) == NO_REGS ? x
2497 : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first));
2501 fmt = GET_RTX_FORMAT (code);
2502 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2508 rtx new = canon_reg (XEXP (x, i), insn);
2510 /* If replacing pseudo with hard reg or vice versa, ensure the
2511 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2512 if (insn != 0 && new != 0
2513 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2514 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2515 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2516 || insn_n_dups[recog_memoized (insn)] > 0))
2517 validate_change (insn, &XEXP (x, i), new, 1);
2521 else if (fmt[i] == 'E')
2522 for (j = 0; j < XVECLEN (x, i); j++)
2523 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2529 /* LOC is a location with INSN that is an operand address (the contents of
2530 a MEM). Find the best equivalent address to use that is valid for this
2533 On most CISC machines, complicated address modes are costly, and rtx_cost
2534 is a good approximation for that cost. However, most RISC machines have
2535 only a few (usually only one) memory reference formats. If an address is
2536 valid at all, it is often just as cheap as any other address. Hence, for
2537 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2538 costs of various addresses. For two addresses of equal cost, choose the one
2539 with the highest `rtx_cost' value as that has the potential of eliminating
2540 the most insns. For equal costs, we choose the first in the equivalence
2541 class. Note that we ignore the fact that pseudo registers are cheaper
2542 than hard registers here because we would also prefer the pseudo registers.
2546 find_best_addr (insn, loc)
2550 struct table_elt *elt, *p;
2553 int found_better = 1;
2554 int save_do_not_record = do_not_record;
2555 int save_hash_arg_in_memory = hash_arg_in_memory;
2556 int save_hash_arg_in_struct = hash_arg_in_struct;
2561 /* Do not try to replace constant addresses or addresses of local and
2562 argument slots. These MEM expressions are made only once and inserted
2563 in many instructions, as well as being used to control symbol table
2564 output. It is not safe to clobber them.
2566 There are some uncommon cases where the address is already in a register
2567 for some reason, but we cannot take advantage of that because we have
2568 no easy way to unshare the MEM. In addition, looking up all stack
2569 addresses is costly. */
2570 if ((GET_CODE (addr) == PLUS
2571 && GET_CODE (XEXP (addr, 0)) == REG
2572 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2573 && (regno = REGNO (XEXP (addr, 0)),
2574 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2575 || regno == ARG_POINTER_REGNUM))
2576 || (GET_CODE (addr) == REG
2577 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2578 || regno == HARD_FRAME_POINTER_REGNUM
2579 || regno == ARG_POINTER_REGNUM))
2580 || CONSTANT_ADDRESS_P (addr))
2583 /* If this address is not simply a register, try to fold it. This will
2584 sometimes simplify the expression. Many simplifications
2585 will not be valid, but some, usually applying the associative rule, will
2586 be valid and produce better code. */
2587 if (GET_CODE (addr) != REG
2588 && validate_change (insn, loc, fold_rtx (addr, insn), 0))
2591 /* If this address is not in the hash table, we can't look for equivalences
2592 of the whole address. Also, ignore if volatile. */
2595 hash = HASH (addr, Pmode);
2596 addr_volatile = do_not_record;
2597 do_not_record = save_do_not_record;
2598 hash_arg_in_memory = save_hash_arg_in_memory;
2599 hash_arg_in_struct = save_hash_arg_in_struct;
2604 elt = lookup (addr, hash, Pmode);
2606 #ifndef ADDRESS_COST
2609 our_cost = elt->cost;
2611 /* Find the lowest cost below ours that works. */
2612 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2613 if (elt->cost < our_cost
2614 && (GET_CODE (elt->exp) == REG
2615 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2616 && validate_change (insn, loc,
2617 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2624 /* We need to find the best (under the criteria documented above) entry
2625 in the class that is valid. We use the `flag' field to indicate
2626 choices that were invalid and iterate until we can't find a better
2627 one that hasn't already been tried. */
2629 for (p = elt->first_same_value; p; p = p->next_same_value)
2632 while (found_better)
2634 int best_addr_cost = ADDRESS_COST (*loc);
2635 int best_rtx_cost = (elt->cost + 1) >> 1;
2636 struct table_elt *best_elt = elt;
2639 for (p = elt->first_same_value; p; p = p->next_same_value)
2641 && (GET_CODE (p->exp) == REG
2642 || exp_equiv_p (p->exp, p->exp, 1, 0))
2643 && (ADDRESS_COST (p->exp) < best_addr_cost
2644 || (ADDRESS_COST (p->exp) == best_addr_cost
2645 && (p->cost + 1) >> 1 > best_rtx_cost)))
2648 best_addr_cost = ADDRESS_COST (p->exp);
2649 best_rtx_cost = (p->cost + 1) >> 1;
2655 if (validate_change (insn, loc,
2656 canon_reg (copy_rtx (best_elt->exp),
2665 /* If the address is a binary operation with the first operand a register
2666 and the second a constant, do the same as above, but looking for
2667 equivalences of the register. Then try to simplify before checking for
2668 the best address to use. This catches a few cases: First is when we
2669 have REG+const and the register is another REG+const. We can often merge
2670 the constants and eliminate one insn and one register. It may also be
2671 that a machine has a cheap REG+REG+const. Finally, this improves the
2672 code on the Alpha for unaligned byte stores. */
2674 if (flag_expensive_optimizations
2675 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2676 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2677 && GET_CODE (XEXP (*loc, 0)) == REG
2678 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2680 rtx c = XEXP (*loc, 1);
2683 hash = HASH (XEXP (*loc, 0), Pmode);
2684 do_not_record = save_do_not_record;
2685 hash_arg_in_memory = save_hash_arg_in_memory;
2686 hash_arg_in_struct = save_hash_arg_in_struct;
2688 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2692 /* We need to find the best (under the criteria documented above) entry
2693 in the class that is valid. We use the `flag' field to indicate
2694 choices that were invalid and iterate until we can't find a better
2695 one that hasn't already been tried. */
2697 for (p = elt->first_same_value; p; p = p->next_same_value)
2700 while (found_better)
2702 int best_addr_cost = ADDRESS_COST (*loc);
2703 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2704 struct table_elt *best_elt = elt;
2705 rtx best_rtx = *loc;
2708 /* This is at worst case an O(n^2) algorithm, so limit our search
2709 to the first 32 elements on the list. This avoids trouble
2710 compiling code with very long basic blocks that can easily
2711 call cse_gen_binary so many times that we run out of memory. */
2714 for (p = elt->first_same_value, count = 0;
2716 p = p->next_same_value, count++)
2718 && (GET_CODE (p->exp) == REG
2719 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2721 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2723 if ((ADDRESS_COST (new) < best_addr_cost
2724 || (ADDRESS_COST (new) == best_addr_cost
2725 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2728 best_addr_cost = ADDRESS_COST (new);
2729 best_rtx_cost = (COST (new) + 1) >> 1;
2737 if (validate_change (insn, loc,
2738 canon_reg (copy_rtx (best_rtx),
2749 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2750 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2751 what values are being compared.
2753 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2754 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2755 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2756 compared to produce cc0.
2758 The return value is the comparison operator and is either the code of
2759 A or the code corresponding to the inverse of the comparison. */
2761 static enum rtx_code
2762 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2765 enum machine_mode *pmode1, *pmode2;
2769 arg1 = *parg1, arg2 = *parg2;
2771 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2773 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2775 /* Set non-zero when we find something of interest. */
2777 int reverse_code = 0;
2778 struct table_elt *p = 0;
2780 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2781 On machines with CC0, this is the only case that can occur, since
2782 fold_rtx will return the COMPARE or item being compared with zero
2785 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2788 /* If ARG1 is a comparison operator and CODE is testing for
2789 STORE_FLAG_VALUE, get the inner arguments. */
2791 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2794 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2795 && code == LT && STORE_FLAG_VALUE == -1)
2796 #ifdef FLOAT_STORE_FLAG_VALUE
2797 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2798 && FLOAT_STORE_FLAG_VALUE < 0)
2803 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2804 && code == GE && STORE_FLAG_VALUE == -1)
2805 #ifdef FLOAT_STORE_FLAG_VALUE
2806 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2807 && FLOAT_STORE_FLAG_VALUE < 0)
2810 x = arg1, reverse_code = 1;
2813 /* ??? We could also check for
2815 (ne (and (eq (...) (const_int 1))) (const_int 0))
2817 and related forms, but let's wait until we see them occurring. */
2820 /* Look up ARG1 in the hash table and see if it has an equivalence
2821 that lets us see what is being compared. */
2822 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2824 if (p) p = p->first_same_value;
2826 for (; p; p = p->next_same_value)
2828 enum machine_mode inner_mode = GET_MODE (p->exp);
2830 /* If the entry isn't valid, skip it. */
2831 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2834 if (GET_CODE (p->exp) == COMPARE
2835 /* Another possibility is that this machine has a compare insn
2836 that includes the comparison code. In that case, ARG1 would
2837 be equivalent to a comparison operation that would set ARG1 to
2838 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2839 ORIG_CODE is the actual comparison being done; if it is an EQ,
2840 we must reverse ORIG_CODE. On machine with a negative value
2841 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2844 && GET_MODE_CLASS (inner_mode) == MODE_INT
2845 && (GET_MODE_BITSIZE (inner_mode)
2846 <= HOST_BITS_PER_WIDE_INT)
2847 && (STORE_FLAG_VALUE
2848 & ((HOST_WIDE_INT) 1
2849 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2850 #ifdef FLOAT_STORE_FLAG_VALUE
2852 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2853 && FLOAT_STORE_FLAG_VALUE < 0)
2856 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2861 else if ((code == EQ
2863 && GET_MODE_CLASS (inner_mode) == MODE_INT
2864 && (GET_MODE_BITSIZE (inner_mode)
2865 <= HOST_BITS_PER_WIDE_INT)
2866 && (STORE_FLAG_VALUE
2867 & ((HOST_WIDE_INT) 1
2868 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2869 #ifdef FLOAT_STORE_FLAG_VALUE
2871 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2872 && FLOAT_STORE_FLAG_VALUE < 0)
2875 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2882 /* If this is fp + constant, the equivalent is a better operand since
2883 it may let us predict the value of the comparison. */
2884 else if (NONZERO_BASE_PLUS_P (p->exp))
2891 /* If we didn't find a useful equivalence for ARG1, we are done.
2892 Otherwise, set up for the next iteration. */
2896 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2897 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2898 code = GET_CODE (x);
2901 code = reverse_condition (code);
2904 /* Return our results. Return the modes from before fold_rtx
2905 because fold_rtx might produce const_int, and then it's too late. */
2906 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2907 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2912 /* Try to simplify a unary operation CODE whose output mode is to be
2913 MODE with input operand OP whose mode was originally OP_MODE.
2914 Return zero if no simplification can be made. */
2917 simplify_unary_operation (code, mode, op, op_mode)
2919 enum machine_mode mode;
2921 enum machine_mode op_mode;
2923 register int width = GET_MODE_BITSIZE (mode);
2925 /* The order of these tests is critical so that, for example, we don't
2926 check the wrong mode (input vs. output) for a conversion operation,
2927 such as FIX. At some point, this should be simplified. */
2929 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2931 if (code == FLOAT && GET_MODE (op) == VOIDmode
2932 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2934 HOST_WIDE_INT hv, lv;
2937 if (GET_CODE (op) == CONST_INT)
2938 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
2940 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
2942 #ifdef REAL_ARITHMETIC
2943 REAL_VALUE_FROM_INT (d, lv, hv);
2947 d = (double) (~ hv);
2948 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2949 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2950 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
2956 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2957 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2958 d += (double) (unsigned HOST_WIDE_INT) lv;
2960 #endif /* REAL_ARITHMETIC */
2962 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2964 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
2965 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2967 HOST_WIDE_INT hv, lv;
2970 if (GET_CODE (op) == CONST_INT)
2971 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
2973 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
2975 if (op_mode == VOIDmode)
2977 /* We don't know how to interpret negative-looking numbers in
2978 this case, so don't try to fold those. */
2982 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
2985 hv = 0, lv &= GET_MODE_MASK (op_mode);
2987 #ifdef REAL_ARITHMETIC
2988 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv);
2991 d = (double) (unsigned HOST_WIDE_INT) hv;
2992 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2993 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2994 d += (double) (unsigned HOST_WIDE_INT) lv;
2995 #endif /* REAL_ARITHMETIC */
2997 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3001 if (GET_CODE (op) == CONST_INT
3002 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3004 register HOST_WIDE_INT arg0 = INTVAL (op);
3005 register HOST_WIDE_INT val;
3018 val = (arg0 >= 0 ? arg0 : - arg0);
3022 /* Don't use ffs here. Instead, get low order bit and then its
3023 number. If arg0 is zero, this will return 0, as desired. */
3024 arg0 &= GET_MODE_MASK (mode);
3025 val = exact_log2 (arg0 & (- arg0)) + 1;
3033 if (op_mode == VOIDmode)
3035 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3037 /* If we were really extending the mode,
3038 we would have to distinguish between zero-extension
3039 and sign-extension. */
3040 if (width != GET_MODE_BITSIZE (op_mode))
3044 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3045 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3051 if (op_mode == VOIDmode)
3053 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3055 /* If we were really extending the mode,
3056 we would have to distinguish between zero-extension
3057 and sign-extension. */
3058 if (width != GET_MODE_BITSIZE (op_mode))
3062 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3065 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3067 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3068 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3081 /* Clear the bits that don't belong in our mode,
3082 unless they and our sign bit are all one.
3083 So we get either a reasonable negative value or a reasonable
3084 unsigned value for this mode. */
3085 if (width < HOST_BITS_PER_WIDE_INT
3086 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3087 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3088 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3090 return GEN_INT (val);
3093 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3094 for a DImode operation on a CONST_INT. */
3095 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3096 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3098 HOST_WIDE_INT l1, h1, lv, hv;
3100 if (GET_CODE (op) == CONST_DOUBLE)
3101 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3103 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3113 neg_double (l1, h1, &lv, &hv);
3118 neg_double (l1, h1, &lv, &hv);
3126 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3128 lv = exact_log2 (l1 & (-l1)) + 1;
3132 /* This is just a change-of-mode, so do nothing. */
3137 if (op_mode == VOIDmode
3138 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3142 lv = l1 & GET_MODE_MASK (op_mode);
3146 if (op_mode == VOIDmode
3147 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3151 lv = l1 & GET_MODE_MASK (op_mode);
3152 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3153 && (lv & ((HOST_WIDE_INT) 1
3154 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3155 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3157 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3168 return immed_double_const (lv, hv, mode);
3171 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3172 else if (GET_CODE (op) == CONST_DOUBLE
3173 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3179 if (setjmp (handler))
3180 /* There used to be a warning here, but that is inadvisable.
3181 People may want to cause traps, and the natural way
3182 to do it should not get a warning. */
3185 set_float_handler (handler);
3187 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3192 d = REAL_VALUE_NEGATE (d);
3196 if (REAL_VALUE_NEGATIVE (d))
3197 d = REAL_VALUE_NEGATE (d);
3200 case FLOAT_TRUNCATE:
3201 d = real_value_truncate (mode, d);
3205 /* All this does is change the mode. */
3209 d = REAL_VALUE_RNDZINT (d);
3213 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3223 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3224 set_float_handler (NULL_PTR);
3228 else if (GET_CODE (op) == CONST_DOUBLE
3229 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3230 && GET_MODE_CLASS (mode) == MODE_INT
3231 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3237 if (setjmp (handler))
3240 set_float_handler (handler);
3242 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3247 val = REAL_VALUE_FIX (d);
3251 val = REAL_VALUE_UNSIGNED_FIX (d);
3258 set_float_handler (NULL_PTR);
3260 /* Clear the bits that don't belong in our mode,
3261 unless they and our sign bit are all one.
3262 So we get either a reasonable negative value or a reasonable
3263 unsigned value for this mode. */
3264 if (width < HOST_BITS_PER_WIDE_INT
3265 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3266 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3267 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3269 /* If this would be an entire word for the target, but is not for
3270 the host, then sign-extend on the host so that the number will look
3271 the same way on the host that it would on the target.
3273 For example, when building a 64 bit alpha hosted 32 bit sparc
3274 targeted compiler, then we want the 32 bit unsigned value -1 to be
3275 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3276 The later confuses the sparc backend. */
3278 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3279 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3280 val |= ((HOST_WIDE_INT) (-1) << width);
3282 return GEN_INT (val);
3285 /* This was formerly used only for non-IEEE float.
3286 eggert@twinsun.com says it is safe for IEEE also. */
3289 /* There are some simplifications we can do even if the operands
3295 /* (not (not X)) == X, similarly for NEG. */
3296 if (GET_CODE (op) == code)
3297 return XEXP (op, 0);
3301 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3302 becomes just the MINUS if its mode is MODE. This allows
3303 folding switch statements on machines using casesi (such as
3305 if (GET_CODE (op) == TRUNCATE
3306 && GET_MODE (XEXP (op, 0)) == mode
3307 && GET_CODE (XEXP (op, 0)) == MINUS
3308 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3309 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3310 return XEXP (op, 0);
3318 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3319 and OP1. Return 0 if no simplification is possible.
3321 Don't use this for relational operations such as EQ or LT.
3322 Use simplify_relational_operation instead. */
3325 simplify_binary_operation (code, mode, op0, op1)
3327 enum machine_mode mode;
3330 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3332 int width = GET_MODE_BITSIZE (mode);
3335 /* Relational operations don't work here. We must know the mode
3336 of the operands in order to do the comparison correctly.
3337 Assuming a full word can give incorrect results.
3338 Consider comparing 128 with -128 in QImode. */
3340 if (GET_RTX_CLASS (code) == '<')
3343 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3344 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3345 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3346 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3348 REAL_VALUE_TYPE f0, f1, value;
3351 if (setjmp (handler))
3354 set_float_handler (handler);
3356 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3357 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3358 f0 = real_value_truncate (mode, f0);
3359 f1 = real_value_truncate (mode, f1);
3361 #ifdef REAL_ARITHMETIC
3362 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3376 #ifndef REAL_INFINITY
3383 value = MIN (f0, f1);
3386 value = MAX (f0, f1);
3393 value = real_value_truncate (mode, value);
3394 set_float_handler (NULL_PTR);
3395 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3397 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3399 /* We can fold some multi-word operations. */
3400 if (GET_MODE_CLASS (mode) == MODE_INT
3401 && width == HOST_BITS_PER_WIDE_INT * 2
3402 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3403 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3405 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3407 if (GET_CODE (op0) == CONST_DOUBLE)
3408 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3410 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3412 if (GET_CODE (op1) == CONST_DOUBLE)
3413 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3415 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3420 /* A - B == A + (-B). */
3421 neg_double (l2, h2, &lv, &hv);
3424 /* .. fall through ... */
3427 add_double (l1, h1, l2, h2, &lv, &hv);
3431 mul_double (l1, h1, l2, h2, &lv, &hv);
3434 case DIV: case MOD: case UDIV: case UMOD:
3435 /* We'd need to include tree.h to do this and it doesn't seem worth
3440 lv = l1 & l2, hv = h1 & h2;
3444 lv = l1 | l2, hv = h1 | h2;
3448 lv = l1 ^ l2, hv = h1 ^ h2;
3454 && ((unsigned HOST_WIDE_INT) l1
3455 < (unsigned HOST_WIDE_INT) l2)))
3464 && ((unsigned HOST_WIDE_INT) l1
3465 > (unsigned HOST_WIDE_INT) l2)))
3472 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3474 && ((unsigned HOST_WIDE_INT) l1
3475 < (unsigned HOST_WIDE_INT) l2)))
3482 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3484 && ((unsigned HOST_WIDE_INT) l1
3485 > (unsigned HOST_WIDE_INT) l2)))
3491 case LSHIFTRT: case ASHIFTRT:
3493 case ROTATE: case ROTATERT:
3494 #ifdef SHIFT_COUNT_TRUNCATED
3495 if (SHIFT_COUNT_TRUNCATED)
3496 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3499 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3502 if (code == LSHIFTRT || code == ASHIFTRT)
3503 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3505 else if (code == ASHIFT)
3506 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3507 else if (code == ROTATE)
3508 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3509 else /* code == ROTATERT */
3510 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3517 return immed_double_const (lv, hv, mode);
3520 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3521 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3523 /* Even if we can't compute a constant result,
3524 there are some cases worth simplifying. */
3529 /* In IEEE floating point, x+0 is not the same as x. Similarly
3530 for the other optimizations below. */
3531 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3532 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3535 if (op1 == CONST0_RTX (mode))
3538 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3539 if (GET_CODE (op0) == NEG)
3540 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3541 else if (GET_CODE (op1) == NEG)
3542 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3544 /* Handle both-operands-constant cases. We can only add
3545 CONST_INTs to constants since the sum of relocatable symbols
3546 can't be handled by most assemblers. Don't add CONST_INT
3547 to CONST_INT since overflow won't be computed properly if wider
3548 than HOST_BITS_PER_WIDE_INT. */
3550 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3551 && GET_CODE (op1) == CONST_INT)
3552 return plus_constant (op0, INTVAL (op1));
3553 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3554 && GET_CODE (op0) == CONST_INT)
3555 return plus_constant (op1, INTVAL (op0));
3557 /* See if this is something like X * C - X or vice versa or
3558 if the multiplication is written as a shift. If so, we can
3559 distribute and make a new multiply, shift, or maybe just
3560 have X (if C is 2 in the example above). But don't make
3561 real multiply if we didn't have one before. */
3563 if (! FLOAT_MODE_P (mode))
3565 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3566 rtx lhs = op0, rhs = op1;
3569 if (GET_CODE (lhs) == NEG)
3570 coeff0 = -1, lhs = XEXP (lhs, 0);
3571 else if (GET_CODE (lhs) == MULT
3572 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3574 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3577 else if (GET_CODE (lhs) == ASHIFT
3578 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3579 && INTVAL (XEXP (lhs, 1)) >= 0
3580 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3582 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3583 lhs = XEXP (lhs, 0);
3586 if (GET_CODE (rhs) == NEG)
3587 coeff1 = -1, rhs = XEXP (rhs, 0);
3588 else if (GET_CODE (rhs) == MULT
3589 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3591 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3594 else if (GET_CODE (rhs) == ASHIFT
3595 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3596 && INTVAL (XEXP (rhs, 1)) >= 0
3597 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3599 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3600 rhs = XEXP (rhs, 0);
3603 if (rtx_equal_p (lhs, rhs))
3605 tem = cse_gen_binary (MULT, mode, lhs,
3606 GEN_INT (coeff0 + coeff1));
3607 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3611 /* If one of the operands is a PLUS or a MINUS, see if we can
3612 simplify this by the associative law.
3613 Don't use the associative law for floating point.
3614 The inaccuracy makes it nonassociative,
3615 and subtle programs can break if operations are associated. */
3617 if (INTEGRAL_MODE_P (mode)
3618 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3619 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3620 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3626 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3627 using cc0, in which case we want to leave it as a COMPARE
3628 so we can distinguish it from a register-register-copy.
3630 In IEEE floating point, x-0 is not the same as x. */
3632 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3633 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3634 && op1 == CONST0_RTX (mode))
3637 /* Do nothing here. */
3642 /* None of these optimizations can be done for IEEE
3644 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3645 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3648 /* We can't assume x-x is 0 even with non-IEEE floating point,
3649 but since it is zero except in very strange circumstances, we
3650 will treat it as zero with -ffast-math. */
3651 if (rtx_equal_p (op0, op1)
3652 && ! side_effects_p (op0)
3653 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3654 return CONST0_RTX (mode);
3656 /* Change subtraction from zero into negation. */
3657 if (op0 == CONST0_RTX (mode))
3658 return gen_rtx (NEG, mode, op1);
3660 /* (-1 - a) is ~a. */
3661 if (op0 == constm1_rtx)
3662 return gen_rtx (NOT, mode, op1);
3664 /* Subtracting 0 has no effect. */
3665 if (op1 == CONST0_RTX (mode))
3668 /* See if this is something like X * C - X or vice versa or
3669 if the multiplication is written as a shift. If so, we can
3670 distribute and make a new multiply, shift, or maybe just
3671 have X (if C is 2 in the example above). But don't make
3672 real multiply if we didn't have one before. */
3674 if (! FLOAT_MODE_P (mode))
3676 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3677 rtx lhs = op0, rhs = op1;
3680 if (GET_CODE (lhs) == NEG)
3681 coeff0 = -1, lhs = XEXP (lhs, 0);
3682 else if (GET_CODE (lhs) == MULT
3683 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3685 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3688 else if (GET_CODE (lhs) == ASHIFT
3689 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3690 && INTVAL (XEXP (lhs, 1)) >= 0
3691 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3693 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3694 lhs = XEXP (lhs, 0);
3697 if (GET_CODE (rhs) == NEG)
3698 coeff1 = - 1, rhs = XEXP (rhs, 0);
3699 else if (GET_CODE (rhs) == MULT
3700 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3702 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3705 else if (GET_CODE (rhs) == ASHIFT
3706 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3707 && INTVAL (XEXP (rhs, 1)) >= 0
3708 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3710 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3711 rhs = XEXP (rhs, 0);
3714 if (rtx_equal_p (lhs, rhs))
3716 tem = cse_gen_binary (MULT, mode, lhs,
3717 GEN_INT (coeff0 - coeff1));
3718 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3722 /* (a - (-b)) -> (a + b). */
3723 if (GET_CODE (op1) == NEG)
3724 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3726 /* If one of the operands is a PLUS or a MINUS, see if we can
3727 simplify this by the associative law.
3728 Don't use the associative law for floating point.
3729 The inaccuracy makes it nonassociative,
3730 and subtle programs can break if operations are associated. */
3732 if (INTEGRAL_MODE_P (mode)
3733 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3734 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3735 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3738 /* Don't let a relocatable value get a negative coeff. */
3739 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3740 return plus_constant (op0, - INTVAL (op1));
3742 /* (x - (x & y)) -> (x & ~y) */
3743 if (GET_CODE (op1) == AND)
3745 if (rtx_equal_p (op0, XEXP (op1, 0)))
3746 return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 1)));
3747 if (rtx_equal_p (op0, XEXP (op1, 1)))
3748 return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 0)));
3753 if (op1 == constm1_rtx)
3755 tem = simplify_unary_operation (NEG, mode, op0, mode);
3757 return tem ? tem : gen_rtx (NEG, mode, op0);
3760 /* In IEEE floating point, x*0 is not always 0. */
3761 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3762 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3763 && op1 == CONST0_RTX (mode)
3764 && ! side_effects_p (op0))
3767 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3768 However, ANSI says we can drop signals,
3769 so we can do this anyway. */
3770 if (op1 == CONST1_RTX (mode))
3773 /* Convert multiply by constant power of two into shift unless
3774 we are still generating RTL. This test is a kludge. */
3775 if (GET_CODE (op1) == CONST_INT
3776 && (val = exact_log2 (INTVAL (op1))) >= 0
3777 && ! rtx_equal_function_value_matters)
3778 return gen_rtx (ASHIFT, mode, op0, GEN_INT (val));
3780 if (GET_CODE (op1) == CONST_DOUBLE
3781 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3785 int op1is2, op1ism1;
3787 if (setjmp (handler))
3790 set_float_handler (handler);
3791 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3792 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3793 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3794 set_float_handler (NULL_PTR);
3796 /* x*2 is x+x and x*(-1) is -x */
3797 if (op1is2 && GET_MODE (op0) == mode)
3798 return gen_rtx (PLUS, mode, op0, copy_rtx (op0));
3800 else if (op1ism1 && GET_MODE (op0) == mode)
3801 return gen_rtx (NEG, mode, op0);
3806 if (op1 == const0_rtx)
3808 if (GET_CODE (op1) == CONST_INT
3809 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3811 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3813 /* A | (~A) -> -1 */
3814 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3815 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3816 && ! side_effects_p (op0)
3817 && GET_MODE_CLASS (mode) != MODE_CC)
3822 if (op1 == const0_rtx)
3824 if (GET_CODE (op1) == CONST_INT
3825 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3826 return gen_rtx (NOT, mode, op0);
3827 if (op0 == op1 && ! side_effects_p (op0)
3828 && GET_MODE_CLASS (mode) != MODE_CC)
3833 if (op1 == const0_rtx && ! side_effects_p (op0))
3835 if (GET_CODE (op1) == CONST_INT
3836 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3838 if (op0 == op1 && ! side_effects_p (op0)
3839 && GET_MODE_CLASS (mode) != MODE_CC)
3842 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3843 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3844 && ! side_effects_p (op0)
3845 && GET_MODE_CLASS (mode) != MODE_CC)
3850 /* Convert divide by power of two into shift (divide by 1 handled
3852 if (GET_CODE (op1) == CONST_INT
3853 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3854 return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1));
3856 /* ... fall through ... */
3859 if (op1 == CONST1_RTX (mode))
3862 /* In IEEE floating point, 0/x is not always 0. */
3863 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3864 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3865 && op0 == CONST0_RTX (mode)
3866 && ! side_effects_p (op1))
3869 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3870 /* Change division by a constant into multiplication. Only do
3871 this with -ffast-math until an expert says it is safe in
3873 else if (GET_CODE (op1) == CONST_DOUBLE
3874 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3875 && op1 != CONST0_RTX (mode)
3879 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3881 if (! REAL_VALUES_EQUAL (d, dconst0))
3883 #if defined (REAL_ARITHMETIC)
3884 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
3885 return gen_rtx (MULT, mode, op0,
3886 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3888 return gen_rtx (MULT, mode, op0,
3889 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3897 /* Handle modulus by power of two (mod with 1 handled below). */
3898 if (GET_CODE (op1) == CONST_INT
3899 && exact_log2 (INTVAL (op1)) > 0)
3900 return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1));
3902 /* ... fall through ... */
3905 if ((op0 == const0_rtx || op1 == const1_rtx)
3906 && ! side_effects_p (op0) && ! side_effects_p (op1))
3912 /* Rotating ~0 always results in ~0. */
3913 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
3914 && INTVAL (op0) == GET_MODE_MASK (mode)
3915 && ! side_effects_p (op1))
3918 /* ... fall through ... */
3923 if (op1 == const0_rtx)
3925 if (op0 == const0_rtx && ! side_effects_p (op1))
3930 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3931 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
3932 && ! side_effects_p (op0))
3934 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3939 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3941 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
3942 && ! side_effects_p (op0))
3944 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3949 if (op1 == const0_rtx && ! side_effects_p (op0))
3951 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3956 if (op1 == constm1_rtx && ! side_effects_p (op0))
3958 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3969 /* Get the integer argument values in two forms:
3970 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3972 arg0 = INTVAL (op0);
3973 arg1 = INTVAL (op1);
3975 if (width < HOST_BITS_PER_WIDE_INT)
3977 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
3978 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
3981 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
3982 arg0s |= ((HOST_WIDE_INT) (-1) << width);
3985 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
3986 arg1s |= ((HOST_WIDE_INT) (-1) << width);
3994 /* Compute the value of the arithmetic. */
3999 val = arg0s + arg1s;
4003 val = arg0s - arg1s;
4007 val = arg0s * arg1s;
4013 val = arg0s / arg1s;
4019 val = arg0s % arg1s;
4025 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4031 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4047 /* If shift count is undefined, don't fold it; let the machine do
4048 what it wants. But truncate it if the machine will do that. */
4052 #ifdef SHIFT_COUNT_TRUNCATED
4053 if (SHIFT_COUNT_TRUNCATED)
4057 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4064 #ifdef SHIFT_COUNT_TRUNCATED
4065 if (SHIFT_COUNT_TRUNCATED)
4069 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4076 #ifdef SHIFT_COUNT_TRUNCATED
4077 if (SHIFT_COUNT_TRUNCATED)
4081 val = arg0s >> arg1;
4083 /* Bootstrap compiler may not have sign extended the right shift.
4084 Manually extend the sign to insure bootstrap cc matches gcc. */
4085 if (arg0s < 0 && arg1 > 0)
4086 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4095 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4096 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4104 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4105 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4109 /* Do nothing here. */
4113 val = arg0s <= arg1s ? arg0s : arg1s;
4117 val = ((unsigned HOST_WIDE_INT) arg0
4118 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4122 val = arg0s > arg1s ? arg0s : arg1s;
4126 val = ((unsigned HOST_WIDE_INT) arg0
4127 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4134 /* Clear the bits that don't belong in our mode, unless they and our sign
4135 bit are all one. So we get either a reasonable negative value or a
4136 reasonable unsigned value for this mode. */
4137 if (width < HOST_BITS_PER_WIDE_INT
4138 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4139 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4140 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4142 /* If this would be an entire word for the target, but is not for
4143 the host, then sign-extend on the host so that the number will look
4144 the same way on the host that it would on the target.
4146 For example, when building a 64 bit alpha hosted 32 bit sparc
4147 targeted compiler, then we want the 32 bit unsigned value -1 to be
4148 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4149 The later confuses the sparc backend. */
4151 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4152 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4153 val |= ((HOST_WIDE_INT) (-1) << width);
4155 return GEN_INT (val);
4158 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4161 Rather than test for specific case, we do this by a brute-force method
4162 and do all possible simplifications until no more changes occur. Then
4163 we rebuild the operation. */
4166 simplify_plus_minus (code, mode, op0, op1)
4168 enum machine_mode mode;
4174 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4175 int first = 1, negate = 0, changed;
4178 bzero ((char *) ops, sizeof ops);
4180 /* Set up the two operands and then expand them until nothing has been
4181 changed. If we run out of room in our array, give up; this should
4182 almost never happen. */
4184 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4191 for (i = 0; i < n_ops; i++)
4192 switch (GET_CODE (ops[i]))
4199 ops[n_ops] = XEXP (ops[i], 1);
4200 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4201 ops[i] = XEXP (ops[i], 0);
4207 ops[i] = XEXP (ops[i], 0);
4208 negs[i] = ! negs[i];
4213 ops[i] = XEXP (ops[i], 0);
4219 /* ~a -> (-a - 1) */
4222 ops[n_ops] = constm1_rtx;
4223 negs[n_ops++] = negs[i];
4224 ops[i] = XEXP (ops[i], 0);
4225 negs[i] = ! negs[i];
4232 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4237 /* If we only have two operands, we can't do anything. */
4241 /* Now simplify each pair of operands until nothing changes. The first
4242 time through just simplify constants against each other. */
4249 for (i = 0; i < n_ops - 1; i++)
4250 for (j = i + 1; j < n_ops; j++)
4251 if (ops[i] != 0 && ops[j] != 0
4252 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4254 rtx lhs = ops[i], rhs = ops[j];
4255 enum rtx_code ncode = PLUS;
4257 if (negs[i] && ! negs[j])
4258 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4259 else if (! negs[i] && negs[j])
4262 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4265 ops[i] = tem, ops[j] = 0;
4266 negs[i] = negs[i] && negs[j];
4267 if (GET_CODE (tem) == NEG)
4268 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4270 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4271 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4279 /* Pack all the operands to the lower-numbered entries and give up if
4280 we didn't reduce the number of operands we had. Make sure we
4281 count a CONST as two operands. If we have the same number of
4282 operands, but have made more CONSTs than we had, this is also
4283 an improvement, so accept it. */
4285 for (i = 0, j = 0; j < n_ops; j++)
4288 ops[i] = ops[j], negs[i++] = negs[j];
4289 if (GET_CODE (ops[j]) == CONST)
4293 if (i + n_consts > input_ops
4294 || (i + n_consts == input_ops && n_consts <= input_consts))
4299 /* If we have a CONST_INT, put it last. */
4300 for (i = 0; i < n_ops - 1; i++)
4301 if (GET_CODE (ops[i]) == CONST_INT)
4303 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4304 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4307 /* Put a non-negated operand first. If there aren't any, make all
4308 operands positive and negate the whole thing later. */
4309 for (i = 0; i < n_ops && negs[i]; i++)
4314 for (i = 0; i < n_ops; i++)
4320 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4321 j = negs[0], negs[0] = negs[i], negs[i] = j;
4324 /* Now make the result by performing the requested operations. */
4326 for (i = 1; i < n_ops; i++)
4327 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4329 return negate ? gen_rtx (NEG, mode, result) : result;
4332 /* Make a binary operation by properly ordering the operands and
4333 seeing if the expression folds. */
4336 cse_gen_binary (code, mode, op0, op1)
4338 enum machine_mode mode;
4343 /* Put complex operands first and constants second if commutative. */
4344 if (GET_RTX_CLASS (code) == 'c'
4345 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4346 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4347 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4348 || (GET_CODE (op0) == SUBREG
4349 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4350 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4351 tem = op0, op0 = op1, op1 = tem;
4353 /* If this simplifies, do it. */
4354 tem = simplify_binary_operation (code, mode, op0, op1);
4359 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4360 just form the operation. */
4362 if (code == PLUS && GET_CODE (op1) == CONST_INT
4363 && GET_MODE (op0) != VOIDmode)
4364 return plus_constant (op0, INTVAL (op1));
4365 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4366 && GET_MODE (op0) != VOIDmode)
4367 return plus_constant (op0, - INTVAL (op1));
4369 return gen_rtx (code, mode, op0, op1);
4372 /* Like simplify_binary_operation except used for relational operators.
4373 MODE is the mode of the operands, not that of the result. If MODE
4374 is VOIDmode, both operands must also be VOIDmode and we compare the
4375 operands in "infinite precision".
4377 If no simplification is possible, this function returns zero. Otherwise,
4378 it returns either const_true_rtx or const0_rtx. */
4381 simplify_relational_operation (code, mode, op0, op1)
4383 enum machine_mode mode;
4386 int equal, op0lt, op0ltu, op1lt, op1ltu;
4389 /* If op0 is a compare, extract the comparison arguments from it. */
4390 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4391 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4393 /* We can't simplify MODE_CC values since we don't know what the
4394 actual comparison is. */
4395 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4402 /* For integer comparisons of A and B maybe we can simplify A - B and can
4403 then simplify a comparison of that with zero. If A and B are both either
4404 a register or a CONST_INT, this can't help; testing for these cases will
4405 prevent infinite recursion here and speed things up.
4407 If CODE is an unsigned comparison, then we can never do this optimization,
4408 because it gives an incorrect result if the subtraction wraps around zero.
4409 ANSI C defines unsigned operations such that they never overflow, and
4410 thus such cases can not be ignored. */
4412 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4413 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4414 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4415 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4416 && code != GTU && code != GEU && code != LTU && code != LEU)
4417 return simplify_relational_operation (signed_condition (code),
4418 mode, tem, const0_rtx);
4420 /* For non-IEEE floating-point, if the two operands are equal, we know the
4422 if (rtx_equal_p (op0, op1)
4423 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4424 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4425 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4427 /* If the operands are floating-point constants, see if we can fold
4429 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4430 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4431 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4433 REAL_VALUE_TYPE d0, d1;
4436 if (setjmp (handler))
4439 set_float_handler (handler);
4440 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4441 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4442 equal = REAL_VALUES_EQUAL (d0, d1);
4443 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4444 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4445 set_float_handler (NULL_PTR);
4447 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4449 /* Otherwise, see if the operands are both integers. */
4450 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4451 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4452 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4454 int width = GET_MODE_BITSIZE (mode);
4455 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4456 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4458 /* Get the two words comprising each integer constant. */
4459 if (GET_CODE (op0) == CONST_DOUBLE)
4461 l0u = l0s = CONST_DOUBLE_LOW (op0);
4462 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4466 l0u = l0s = INTVAL (op0);
4467 h0u = 0, h0s = l0s < 0 ? -1 : 0;
4470 if (GET_CODE (op1) == CONST_DOUBLE)
4472 l1u = l1s = CONST_DOUBLE_LOW (op1);
4473 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4477 l1u = l1s = INTVAL (op1);
4478 h1u = 0, h1s = l1s < 0 ? -1 : 0;
4481 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4482 we have to sign or zero-extend the values. */
4483 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4484 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4486 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4488 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4489 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4491 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4492 l0s |= ((HOST_WIDE_INT) (-1) << width);
4494 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4495 l1s |= ((HOST_WIDE_INT) (-1) << width);
4498 equal = (h0u == h1u && l0u == l1u);
4499 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4500 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4501 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4502 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4505 /* Otherwise, there are some code-specific tests we can make. */
4511 /* References to the frame plus a constant or labels cannot
4512 be zero, but a SYMBOL_REF can due to #pragma weak. */
4513 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4514 || GET_CODE (op0) == LABEL_REF)
4515 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4516 /* On some machines, the ap reg can be 0 sometimes. */
4517 && op0 != arg_pointer_rtx
4524 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4525 || GET_CODE (op0) == LABEL_REF)
4526 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4527 && op0 != arg_pointer_rtx
4530 return const_true_rtx;
4534 /* Unsigned values are never negative. */
4535 if (op1 == const0_rtx)
4536 return const_true_rtx;
4540 if (op1 == const0_rtx)
4545 /* Unsigned values are never greater than the largest
4547 if (GET_CODE (op1) == CONST_INT
4548 && INTVAL (op1) == GET_MODE_MASK (mode)
4549 && INTEGRAL_MODE_P (mode))
4550 return const_true_rtx;
4554 if (GET_CODE (op1) == CONST_INT
4555 && INTVAL (op1) == GET_MODE_MASK (mode)
4556 && INTEGRAL_MODE_P (mode))
4564 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4569 return equal ? const_true_rtx : const0_rtx;
4571 return ! equal ? const_true_rtx : const0_rtx;
4573 return op0lt ? const_true_rtx : const0_rtx;
4575 return op1lt ? const_true_rtx : const0_rtx;
4577 return op0ltu ? const_true_rtx : const0_rtx;
4579 return op1ltu ? const_true_rtx : const0_rtx;
4581 return equal || op0lt ? const_true_rtx : const0_rtx;
4583 return equal || op1lt ? const_true_rtx : const0_rtx;
4585 return equal || op0ltu ? const_true_rtx : const0_rtx;
4587 return equal || op1ltu ? const_true_rtx : const0_rtx;
4593 /* Simplify CODE, an operation with result mode MODE and three operands,
4594 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4595 a constant. Return 0 if no simplifications is possible. */
4598 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4600 enum machine_mode mode, op0_mode;
4603 int width = GET_MODE_BITSIZE (mode);
4605 /* VOIDmode means "infinite" precision. */
4607 width = HOST_BITS_PER_WIDE_INT;
4613 if (GET_CODE (op0) == CONST_INT
4614 && GET_CODE (op1) == CONST_INT
4615 && GET_CODE (op2) == CONST_INT
4616 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4617 && width <= HOST_BITS_PER_WIDE_INT)
4619 /* Extracting a bit-field from a constant */
4620 HOST_WIDE_INT val = INTVAL (op0);
4622 if (BITS_BIG_ENDIAN)
4623 val >>= (GET_MODE_BITSIZE (op0_mode)
4624 - INTVAL (op2) - INTVAL (op1));
4626 val >>= INTVAL (op2);
4628 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4630 /* First zero-extend. */
4631 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4632 /* If desired, propagate sign bit. */
4633 if (code == SIGN_EXTRACT
4634 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4635 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4638 /* Clear the bits that don't belong in our mode,
4639 unless they and our sign bit are all one.
4640 So we get either a reasonable negative value or a reasonable
4641 unsigned value for this mode. */
4642 if (width < HOST_BITS_PER_WIDE_INT
4643 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4644 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4645 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4647 return GEN_INT (val);
4652 if (GET_CODE (op0) == CONST_INT)
4653 return op0 != const0_rtx ? op1 : op2;
4663 /* If X is a nontrivial arithmetic operation on an argument
4664 for which a constant value can be determined, return
4665 the result of operating on that value, as a constant.
4666 Otherwise, return X, possibly with one or more operands
4667 modified by recursive calls to this function.
4669 If X is a register whose contents are known, we do NOT
4670 return those contents here. equiv_constant is called to
4673 INSN is the insn that we may be modifying. If it is 0, make a copy
4674 of X before modifying it. */
4681 register enum rtx_code code;
4682 register enum machine_mode mode;
4689 /* Folded equivalents of first two operands of X. */
4693 /* Constant equivalents of first three operands of X;
4694 0 when no such equivalent is known. */
4699 /* The mode of the first operand of X. We need this for sign and zero
4701 enum machine_mode mode_arg0;
4706 mode = GET_MODE (x);
4707 code = GET_CODE (x);
4716 /* No use simplifying an EXPR_LIST
4717 since they are used only for lists of args
4718 in a function call's REG_EQUAL note. */
4724 return prev_insn_cc0;
4728 /* If the next insn is a CODE_LABEL followed by a jump table,
4729 PC's value is a LABEL_REF pointing to that label. That
4730 lets us fold switch statements on the Vax. */
4731 if (insn && GET_CODE (insn) == JUMP_INSN)
4733 rtx next = next_nonnote_insn (insn);
4735 if (next && GET_CODE (next) == CODE_LABEL
4736 && NEXT_INSN (next) != 0
4737 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4738 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4739 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4740 return gen_rtx (LABEL_REF, Pmode, next);
4745 /* See if we previously assigned a constant value to this SUBREG. */
4746 if ((new = lookup_as_function (x, CONST_INT)) != 0
4747 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4750 /* If this is a paradoxical SUBREG, we have no idea what value the
4751 extra bits would have. However, if the operand is equivalent
4752 to a SUBREG whose operand is the same as our mode, and all the
4753 modes are within a word, we can just use the inner operand
4754 because these SUBREGs just say how to treat the register.
4756 Similarly if we find an integer constant. */
4758 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4760 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4761 struct table_elt *elt;
4763 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4764 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4765 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4767 for (elt = elt->first_same_value;
4768 elt; elt = elt->next_same_value)
4770 if (CONSTANT_P (elt->exp)
4771 && GET_MODE (elt->exp) == VOIDmode)
4774 if (GET_CODE (elt->exp) == SUBREG
4775 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4776 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4777 return copy_rtx (SUBREG_REG (elt->exp));
4783 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4784 We might be able to if the SUBREG is extracting a single word in an
4785 integral mode or extracting the low part. */
4787 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4788 const_arg0 = equiv_constant (folded_arg0);
4790 folded_arg0 = const_arg0;
4792 if (folded_arg0 != SUBREG_REG (x))
4796 if (GET_MODE_CLASS (mode) == MODE_INT
4797 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4798 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4799 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4800 GET_MODE (SUBREG_REG (x)));
4801 if (new == 0 && subreg_lowpart_p (x))
4802 new = gen_lowpart_if_possible (mode, folded_arg0);
4807 /* If this is a narrowing SUBREG and our operand is a REG, see if
4808 we can find an equivalence for REG that is an arithmetic operation
4809 in a wider mode where both operands are paradoxical SUBREGs
4810 from objects of our result mode. In that case, we couldn't report
4811 an equivalent value for that operation, since we don't know what the
4812 extra bits will be. But we can find an equivalence for this SUBREG
4813 by folding that operation is the narrow mode. This allows us to
4814 fold arithmetic in narrow modes when the machine only supports
4815 word-sized arithmetic.
4817 Also look for a case where we have a SUBREG whose operand is the
4818 same as our result. If both modes are smaller than a word, we
4819 are simply interpreting a register in different modes and we
4820 can use the inner value. */
4822 if (GET_CODE (folded_arg0) == REG
4823 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4824 && subreg_lowpart_p (x))
4826 struct table_elt *elt;
4828 /* We can use HASH here since we know that canon_hash won't be
4830 elt = lookup (folded_arg0,
4831 HASH (folded_arg0, GET_MODE (folded_arg0)),
4832 GET_MODE (folded_arg0));
4835 elt = elt->first_same_value;
4837 for (; elt; elt = elt->next_same_value)
4839 enum rtx_code eltcode = GET_CODE (elt->exp);
4841 /* Just check for unary and binary operations. */
4842 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4843 && GET_CODE (elt->exp) != SIGN_EXTEND
4844 && GET_CODE (elt->exp) != ZERO_EXTEND
4845 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4846 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4848 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4850 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4851 op0 = fold_rtx (op0, NULL_RTX);
4853 op0 = equiv_constant (op0);
4855 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4858 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4859 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4860 && eltcode != DIV && eltcode != MOD
4861 && eltcode != UDIV && eltcode != UMOD
4862 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4863 && eltcode != ROTATE && eltcode != ROTATERT
4864 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4865 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4867 || CONSTANT_P (XEXP (elt->exp, 0)))
4868 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4869 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4871 || CONSTANT_P (XEXP (elt->exp, 1))))
4873 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4874 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4876 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4877 op0 = fold_rtx (op0, NULL_RTX);
4880 op0 = equiv_constant (op0);
4882 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
4883 op1 = fold_rtx (op1, NULL_RTX);
4886 op1 = equiv_constant (op1);
4888 /* If we are looking for the low SImode part of
4889 (ashift:DI c (const_int 32)), it doesn't work
4890 to compute that in SImode, because a 32-bit shift
4891 in SImode is unpredictable. We know the value is 0. */
4893 && GET_CODE (elt->exp) == ASHIFT
4894 && GET_CODE (op1) == CONST_INT
4895 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
4897 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
4899 /* If the count fits in the inner mode's width,
4900 but exceeds the outer mode's width,
4901 the value will get truncated to 0
4905 /* If the count exceeds even the inner mode's width,
4906 don't fold this expression. */
4909 else if (op0 && op1)
4910 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
4914 else if (GET_CODE (elt->exp) == SUBREG
4915 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4916 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
4918 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4919 new = copy_rtx (SUBREG_REG (elt->exp));
4930 /* If we have (NOT Y), see if Y is known to be (NOT Z).
4931 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4932 new = lookup_as_function (XEXP (x, 0), code);
4934 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
4938 /* If we are not actually processing an insn, don't try to find the
4939 best address. Not only don't we care, but we could modify the
4940 MEM in an invalid way since we have no insn to validate against. */
4942 find_best_addr (insn, &XEXP (x, 0));
4945 /* Even if we don't fold in the insn itself,
4946 we can safely do so here, in hopes of getting a constant. */
4947 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
4949 HOST_WIDE_INT offset = 0;
4951 if (GET_CODE (addr) == REG
4952 && REGNO_QTY_VALID_P (REGNO (addr))
4953 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
4954 && qty_const[reg_qty[REGNO (addr)]] != 0)
4955 addr = qty_const[reg_qty[REGNO (addr)]];
4957 /* If address is constant, split it into a base and integer offset. */
4958 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
4960 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
4961 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
4963 base = XEXP (XEXP (addr, 0), 0);
4964 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
4966 else if (GET_CODE (addr) == LO_SUM
4967 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
4968 base = XEXP (addr, 1);
4970 /* If this is a constant pool reference, we can fold it into its
4971 constant to allow better value tracking. */
4972 if (base && GET_CODE (base) == SYMBOL_REF
4973 && CONSTANT_POOL_ADDRESS_P (base))
4975 rtx constant = get_pool_constant (base);
4976 enum machine_mode const_mode = get_pool_mode (base);
4979 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
4980 constant_pool_entries_cost = COST (constant);
4982 /* If we are loading the full constant, we have an equivalence. */
4983 if (offset == 0 && mode == const_mode)
4986 /* If this actually isn't a constant (wierd!), we can't do
4987 anything. Otherwise, handle the two most common cases:
4988 extracting a word from a multi-word constant, and extracting
4989 the low-order bits. Other cases don't seem common enough to
4991 if (! CONSTANT_P (constant))
4994 if (GET_MODE_CLASS (mode) == MODE_INT
4995 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4996 && offset % UNITS_PER_WORD == 0
4997 && (new = operand_subword (constant,
4998 offset / UNITS_PER_WORD,
4999 0, const_mode)) != 0)
5002 if (((BYTES_BIG_ENDIAN
5003 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5004 || (! BYTES_BIG_ENDIAN && offset == 0))
5005 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5009 /* If this is a reference to a label at a known position in a jump
5010 table, we also know its value. */
5011 if (base && GET_CODE (base) == LABEL_REF)
5013 rtx label = XEXP (base, 0);
5014 rtx table_insn = NEXT_INSN (label);
5016 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5017 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5019 rtx table = PATTERN (table_insn);
5022 && (offset / GET_MODE_SIZE (GET_MODE (table))
5023 < XVECLEN (table, 0)))
5024 return XVECEXP (table, 0,
5025 offset / GET_MODE_SIZE (GET_MODE (table)));
5027 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5028 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5030 rtx table = PATTERN (table_insn);
5033 && (offset / GET_MODE_SIZE (GET_MODE (table))
5034 < XVECLEN (table, 1)))
5036 offset /= GET_MODE_SIZE (GET_MODE (table));
5037 new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset),
5040 if (GET_MODE (table) != Pmode)
5041 new = gen_rtx (TRUNCATE, GET_MODE (table), new);
5043 /* Indicate this is a constant. This isn't a
5044 valid form of CONST, but it will only be used
5045 to fold the next insns and then discarded, so
5046 it should be safe. */
5047 return gen_rtx (CONST, GET_MODE (new), new);
5059 mode_arg0 = VOIDmode;
5061 /* Try folding our operands.
5062 Then see which ones have constant values known. */
5064 fmt = GET_RTX_FORMAT (code);
5065 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5068 rtx arg = XEXP (x, i);
5069 rtx folded_arg = arg, const_arg = 0;
5070 enum machine_mode mode_arg = GET_MODE (arg);
5071 rtx cheap_arg, expensive_arg;
5072 rtx replacements[2];
5075 /* Most arguments are cheap, so handle them specially. */
5076 switch (GET_CODE (arg))
5079 /* This is the same as calling equiv_constant; it is duplicated
5081 if (REGNO_QTY_VALID_P (REGNO (arg))
5082 && qty_const[reg_qty[REGNO (arg)]] != 0
5083 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5084 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5086 = gen_lowpart_if_possible (GET_MODE (arg),
5087 qty_const[reg_qty[REGNO (arg)]]);
5100 folded_arg = prev_insn_cc0;
5101 mode_arg = prev_insn_cc0_mode;
5102 const_arg = equiv_constant (folded_arg);
5107 folded_arg = fold_rtx (arg, insn);
5108 const_arg = equiv_constant (folded_arg);
5111 /* For the first three operands, see if the operand
5112 is constant or equivalent to a constant. */
5116 folded_arg0 = folded_arg;
5117 const_arg0 = const_arg;
5118 mode_arg0 = mode_arg;
5121 folded_arg1 = folded_arg;
5122 const_arg1 = const_arg;
5125 const_arg2 = const_arg;
5129 /* Pick the least expensive of the folded argument and an
5130 equivalent constant argument. */
5131 if (const_arg == 0 || const_arg == folded_arg
5132 || COST (const_arg) > COST (folded_arg))
5133 cheap_arg = folded_arg, expensive_arg = const_arg;
5135 cheap_arg = const_arg, expensive_arg = folded_arg;
5137 /* Try to replace the operand with the cheapest of the two
5138 possibilities. If it doesn't work and this is either of the first
5139 two operands of a commutative operation, try swapping them.
5140 If THAT fails, try the more expensive, provided it is cheaper
5141 than what is already there. */
5143 if (cheap_arg == XEXP (x, i))
5146 if (insn == 0 && ! copied)
5152 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5154 j < 2 && replacements[j]
5155 && COST (replacements[j]) < COST (XEXP (x, i));
5158 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5161 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5163 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5164 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5166 if (apply_change_group ())
5168 /* Swap them back to be invalid so that this loop can
5169 continue and flag them to be swapped back later. */
5172 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5181 else if (fmt[i] == 'E')
5182 /* Don't try to fold inside of a vector of expressions.
5183 Doing nothing is harmless. */
5186 /* If a commutative operation, place a constant integer as the second
5187 operand unless the first operand is also a constant integer. Otherwise,
5188 place any constant second unless the first operand is also a constant. */
5190 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5192 if (must_swap || (const_arg0
5194 || (GET_CODE (const_arg0) == CONST_INT
5195 && GET_CODE (const_arg1) != CONST_INT))))
5197 register rtx tem = XEXP (x, 0);
5199 if (insn == 0 && ! copied)
5205 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5206 validate_change (insn, &XEXP (x, 1), tem, 1);
5207 if (apply_change_group ())
5209 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5210 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5215 /* If X is an arithmetic operation, see if we can simplify it. */
5217 switch (GET_RTX_CLASS (code))
5223 /* We can't simplify extension ops unless we know the
5225 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5226 && mode_arg0 == VOIDmode)
5229 /* If we had a CONST, strip it off and put it back later if we
5231 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5232 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5234 new = simplify_unary_operation (code, mode,
5235 const_arg0 ? const_arg0 : folded_arg0,
5237 if (new != 0 && is_const)
5238 new = gen_rtx (CONST, mode, new);
5243 /* See what items are actually being compared and set FOLDED_ARG[01]
5244 to those values and CODE to the actual comparison code. If any are
5245 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5246 do anything if both operands are already known to be constant. */
5248 if (const_arg0 == 0 || const_arg1 == 0)
5250 struct table_elt *p0, *p1;
5251 rtx true = const_true_rtx, false = const0_rtx;
5252 enum machine_mode mode_arg1;
5254 #ifdef FLOAT_STORE_FLAG_VALUE
5255 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5257 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5259 false = CONST0_RTX (mode);
5263 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5264 &mode_arg0, &mode_arg1);
5265 const_arg0 = equiv_constant (folded_arg0);
5266 const_arg1 = equiv_constant (folded_arg1);
5268 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5269 what kinds of things are being compared, so we can't do
5270 anything with this comparison. */
5272 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5275 /* If we do not now have two constants being compared, see if we
5276 can nevertheless deduce some things about the comparison. */
5277 if (const_arg0 == 0 || const_arg1 == 0)
5279 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5280 constant? These aren't zero, but we don't know their sign. */
5281 if (const_arg1 == const0_rtx
5282 && (NONZERO_BASE_PLUS_P (folded_arg0)
5283 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5285 || GET_CODE (folded_arg0) == SYMBOL_REF
5287 || GET_CODE (folded_arg0) == LABEL_REF
5288 || GET_CODE (folded_arg0) == CONST))
5292 else if (code == NE)
5296 /* See if the two operands are the same. We don't do this
5297 for IEEE floating-point since we can't assume x == x
5298 since x might be a NaN. */
5300 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5301 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5302 && (folded_arg0 == folded_arg1
5303 || (GET_CODE (folded_arg0) == REG
5304 && GET_CODE (folded_arg1) == REG
5305 && (reg_qty[REGNO (folded_arg0)]
5306 == reg_qty[REGNO (folded_arg1)]))
5307 || ((p0 = lookup (folded_arg0,
5308 (safe_hash (folded_arg0, mode_arg0)
5309 % NBUCKETS), mode_arg0))
5310 && (p1 = lookup (folded_arg1,
5311 (safe_hash (folded_arg1, mode_arg0)
5312 % NBUCKETS), mode_arg0))
5313 && p0->first_same_value == p1->first_same_value)))
5314 return ((code == EQ || code == LE || code == GE
5315 || code == LEU || code == GEU)
5318 /* If FOLDED_ARG0 is a register, see if the comparison we are
5319 doing now is either the same as we did before or the reverse
5320 (we only check the reverse if not floating-point). */
5321 else if (GET_CODE (folded_arg0) == REG)
5323 int qty = reg_qty[REGNO (folded_arg0)];
5325 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5326 && (comparison_dominates_p (qty_comparison_code[qty], code)
5327 || (comparison_dominates_p (qty_comparison_code[qty],
5328 reverse_condition (code))
5329 && ! FLOAT_MODE_P (mode_arg0)))
5330 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5332 && rtx_equal_p (qty_comparison_const[qty],
5334 || (GET_CODE (folded_arg1) == REG
5335 && (reg_qty[REGNO (folded_arg1)]
5336 == qty_comparison_qty[qty]))))
5337 return (comparison_dominates_p (qty_comparison_code[qty],
5344 /* If we are comparing against zero, see if the first operand is
5345 equivalent to an IOR with a constant. If so, we may be able to
5346 determine the result of this comparison. */
5348 if (const_arg1 == const0_rtx)
5350 rtx y = lookup_as_function (folded_arg0, IOR);
5354 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5355 && GET_CODE (inner_const) == CONST_INT
5356 && INTVAL (inner_const) != 0)
5358 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5359 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5360 && (INTVAL (inner_const)
5361 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5362 rtx true = const_true_rtx, false = const0_rtx;
5364 #ifdef FLOAT_STORE_FLAG_VALUE
5365 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5367 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5369 false = CONST0_RTX (mode);
5391 new = simplify_relational_operation (code, mode_arg0,
5392 const_arg0 ? const_arg0 : folded_arg0,
5393 const_arg1 ? const_arg1 : folded_arg1);
5394 #ifdef FLOAT_STORE_FLAG_VALUE
5395 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5396 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5397 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5406 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5407 with that LABEL_REF as its second operand. If so, the result is
5408 the first operand of that MINUS. This handles switches with an
5409 ADDR_DIFF_VEC table. */
5410 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5413 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5414 : lookup_as_function (folded_arg0, MINUS);
5416 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5417 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5420 /* Now try for a CONST of a MINUS like the above. */
5421 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5422 : lookup_as_function (folded_arg0, CONST))) != 0
5423 && GET_CODE (XEXP (y, 0)) == MINUS
5424 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5425 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5426 return XEXP (XEXP (y, 0), 0);
5429 /* Likewise if the operands are in the other order. */
5430 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5433 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5434 : lookup_as_function (folded_arg1, MINUS);
5436 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5437 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5440 /* Now try for a CONST of a MINUS like the above. */
5441 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5442 : lookup_as_function (folded_arg1, CONST))) != 0
5443 && GET_CODE (XEXP (y, 0)) == MINUS
5444 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5445 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5446 return XEXP (XEXP (y, 0), 0);
5449 /* If second operand is a register equivalent to a negative
5450 CONST_INT, see if we can find a register equivalent to the
5451 positive constant. Make a MINUS if so. Don't do this for
5452 a negative constant since we might then alternate between
5453 chosing positive and negative constants. Having the positive
5454 constant previously-used is the more common case. */
5455 if (const_arg1 && GET_CODE (const_arg1) == CONST_INT
5456 && INTVAL (const_arg1) < 0 && GET_CODE (folded_arg1) == REG)
5458 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5460 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5464 for (p = p->first_same_value; p; p = p->next_same_value)
5465 if (GET_CODE (p->exp) == REG)
5466 return cse_gen_binary (MINUS, mode, folded_arg0,
5467 canon_reg (p->exp, NULL_RTX));
5472 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5473 If so, produce (PLUS Z C2-C). */
5474 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5476 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5477 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5478 return fold_rtx (plus_constant (copy_rtx (y),
5479 -INTVAL (const_arg1)),
5483 /* ... fall through ... */
5486 case SMIN: case SMAX: case UMIN: case UMAX:
5487 case IOR: case AND: case XOR:
5488 case MULT: case DIV: case UDIV:
5489 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5490 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5491 is known to be of similar form, we may be able to replace the
5492 operation with a combined operation. This may eliminate the
5493 intermediate operation if every use is simplified in this way.
5494 Note that the similar optimization done by combine.c only works
5495 if the intermediate operation's result has only one reference. */
5497 if (GET_CODE (folded_arg0) == REG
5498 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5501 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5502 rtx y = lookup_as_function (folded_arg0, code);
5504 enum rtx_code associate_code;
5508 || 0 == (inner_const
5509 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5510 || GET_CODE (inner_const) != CONST_INT
5511 /* If we have compiled a statement like
5512 "if (x == (x & mask1))", and now are looking at
5513 "x & mask2", we will have a case where the first operand
5514 of Y is the same as our first operand. Unless we detect
5515 this case, an infinite loop will result. */
5516 || XEXP (y, 0) == folded_arg0)
5519 /* Don't associate these operations if they are a PLUS with the
5520 same constant and it is a power of two. These might be doable
5521 with a pre- or post-increment. Similarly for two subtracts of
5522 identical powers of two with post decrement. */
5524 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5526 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5527 || exact_log2 (INTVAL (const_arg1)) >= 0
5529 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5530 || exact_log2 (- INTVAL (const_arg1)) >= 0
5535 /* Compute the code used to compose the constants. For example,
5536 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5539 = (code == MULT || code == DIV || code == UDIV ? MULT
5540 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5542 new_const = simplify_binary_operation (associate_code, mode,
5543 const_arg1, inner_const);
5548 /* If we are associating shift operations, don't let this
5549 produce a shift of the size of the object or larger.
5550 This could occur when we follow a sign-extend by a right
5551 shift on a machine that does a sign-extend as a pair
5554 if (is_shift && GET_CODE (new_const) == CONST_INT
5555 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5557 /* As an exception, we can turn an ASHIFTRT of this
5558 form into a shift of the number of bits - 1. */
5559 if (code == ASHIFTRT)
5560 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5565 y = copy_rtx (XEXP (y, 0));
5567 /* If Y contains our first operand (the most common way this
5568 can happen is if Y is a MEM), we would do into an infinite
5569 loop if we tried to fold it. So don't in that case. */
5571 if (! reg_mentioned_p (folded_arg0, y))
5572 y = fold_rtx (y, insn);
5574 return cse_gen_binary (code, mode, y, new_const);
5578 new = simplify_binary_operation (code, mode,
5579 const_arg0 ? const_arg0 : folded_arg0,
5580 const_arg1 ? const_arg1 : folded_arg1);
5584 /* (lo_sum (high X) X) is simply X. */
5585 if (code == LO_SUM && const_arg0 != 0
5586 && GET_CODE (const_arg0) == HIGH
5587 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5593 new = simplify_ternary_operation (code, mode, mode_arg0,
5594 const_arg0 ? const_arg0 : folded_arg0,
5595 const_arg1 ? const_arg1 : folded_arg1,
5596 const_arg2 ? const_arg2 : XEXP (x, 2));
5600 return new ? new : x;
5603 /* Return a constant value currently equivalent to X.
5604 Return 0 if we don't know one. */
5610 if (GET_CODE (x) == REG
5611 && REGNO_QTY_VALID_P (REGNO (x))
5612 && qty_const[reg_qty[REGNO (x)]])
5613 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5615 if (x != 0 && CONSTANT_P (x))
5618 /* If X is a MEM, try to fold it outside the context of any insn to see if
5619 it might be equivalent to a constant. That handles the case where it
5620 is a constant-pool reference. Then try to look it up in the hash table
5621 in case it is something whose value we have seen before. */
5623 if (GET_CODE (x) == MEM)
5625 struct table_elt *elt;
5627 x = fold_rtx (x, NULL_RTX);
5631 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5635 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5636 if (elt->is_const && CONSTANT_P (elt->exp))
5643 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5644 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5645 least-significant part of X.
5646 MODE specifies how big a part of X to return.
5648 If the requested operation cannot be done, 0 is returned.
5650 This is similar to gen_lowpart in emit-rtl.c. */
5653 gen_lowpart_if_possible (mode, x)
5654 enum machine_mode mode;
5657 rtx result = gen_lowpart_common (mode, x);
5661 else if (GET_CODE (x) == MEM)
5663 /* This is the only other case we handle. */
5664 register int offset = 0;
5667 if (WORDS_BIG_ENDIAN)
5668 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5669 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5670 if (BYTES_BIG_ENDIAN)
5671 /* Adjust the address so that the address-after-the-data is
5673 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5674 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5675 new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset));
5676 if (! memory_address_p (mode, XEXP (new, 0)))
5678 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5679 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5680 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5687 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5688 branch. It will be zero if not.
5690 In certain cases, this can cause us to add an equivalence. For example,
5691 if we are following the taken case of
5693 we can add the fact that `i' and '2' are now equivalent.
5695 In any case, we can record that this comparison was passed. If the same
5696 comparison is seen later, we will know its value. */
5699 record_jump_equiv (insn, taken)
5703 int cond_known_true;
5705 enum machine_mode mode, mode0, mode1;
5706 int reversed_nonequality = 0;
5709 /* Ensure this is the right kind of insn. */
5710 if (! condjump_p (insn) || simplejump_p (insn))
5713 /* See if this jump condition is known true or false. */
5715 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5717 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5719 /* Get the type of comparison being done and the operands being compared.
5720 If we had to reverse a non-equality condition, record that fact so we
5721 know that it isn't valid for floating-point. */
5722 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5723 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5724 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5726 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5727 if (! cond_known_true)
5729 reversed_nonequality = (code != EQ && code != NE);
5730 code = reverse_condition (code);
5733 /* The mode is the mode of the non-constant. */
5735 if (mode1 != VOIDmode)
5738 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5741 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5742 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5743 Make any useful entries we can with that information. Called from
5744 above function and called recursively. */
5747 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5749 enum machine_mode mode;
5751 int reversed_nonequality;
5753 unsigned op0_hash, op1_hash;
5754 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5755 struct table_elt *op0_elt, *op1_elt;
5757 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5758 we know that they are also equal in the smaller mode (this is also
5759 true for all smaller modes whether or not there is a SUBREG, but
5760 is not worth testing for with no SUBREG. */
5762 /* Note that GET_MODE (op0) may not equal MODE. */
5763 if (code == EQ && GET_CODE (op0) == SUBREG
5764 && (GET_MODE_SIZE (GET_MODE (op0))
5765 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5767 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5768 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5770 record_jump_cond (code, mode, SUBREG_REG (op0),
5771 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5772 reversed_nonequality);
5775 if (code == EQ && GET_CODE (op1) == SUBREG
5776 && (GET_MODE_SIZE (GET_MODE (op1))
5777 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5779 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5780 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5782 record_jump_cond (code, mode, SUBREG_REG (op1),
5783 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5784 reversed_nonequality);
5787 /* Similarly, if this is an NE comparison, and either is a SUBREG
5788 making a smaller mode, we know the whole thing is also NE. */
5790 /* Note that GET_MODE (op0) may not equal MODE;
5791 if we test MODE instead, we can get an infinite recursion
5792 alternating between two modes each wider than MODE. */
5794 if (code == NE && GET_CODE (op0) == SUBREG
5795 && subreg_lowpart_p (op0)
5796 && (GET_MODE_SIZE (GET_MODE (op0))
5797 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5799 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5800 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5802 record_jump_cond (code, mode, SUBREG_REG (op0),
5803 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5804 reversed_nonequality);
5807 if (code == NE && GET_CODE (op1) == SUBREG
5808 && subreg_lowpart_p (op1)
5809 && (GET_MODE_SIZE (GET_MODE (op1))
5810 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5812 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5813 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5815 record_jump_cond (code, mode, SUBREG_REG (op1),
5816 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5817 reversed_nonequality);
5820 /* Hash both operands. */
5823 hash_arg_in_memory = 0;
5824 hash_arg_in_struct = 0;
5825 op0_hash = HASH (op0, mode);
5826 op0_in_memory = hash_arg_in_memory;
5827 op0_in_struct = hash_arg_in_struct;
5833 hash_arg_in_memory = 0;
5834 hash_arg_in_struct = 0;
5835 op1_hash = HASH (op1, mode);
5836 op1_in_memory = hash_arg_in_memory;
5837 op1_in_struct = hash_arg_in_struct;
5842 /* Look up both operands. */
5843 op0_elt = lookup (op0, op0_hash, mode);
5844 op1_elt = lookup (op1, op1_hash, mode);
5846 /* If both operands are already equivalent or if they are not in the
5847 table but are identical, do nothing. */
5848 if ((op0_elt != 0 && op1_elt != 0
5849 && op0_elt->first_same_value == op1_elt->first_same_value)
5850 || op0 == op1 || rtx_equal_p (op0, op1))
5853 /* If we aren't setting two things equal all we can do is save this
5854 comparison. Similarly if this is floating-point. In the latter
5855 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5856 If we record the equality, we might inadvertently delete code
5857 whose intent was to change -0 to +0. */
5859 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
5861 /* If we reversed a floating-point comparison, if OP0 is not a
5862 register, or if OP1 is neither a register or constant, we can't
5865 if (GET_CODE (op1) != REG)
5866 op1 = equiv_constant (op1);
5868 if ((reversed_nonequality && FLOAT_MODE_P (mode))
5869 || GET_CODE (op0) != REG || op1 == 0)
5872 /* Put OP0 in the hash table if it isn't already. This gives it a
5873 new quantity number. */
5876 if (insert_regs (op0, NULL_PTR, 0))
5878 rehash_using_reg (op0);
5879 op0_hash = HASH (op0, mode);
5881 /* If OP0 is contained in OP1, this changes its hash code
5882 as well. Faster to rehash than to check, except
5883 for the simple case of a constant. */
5884 if (! CONSTANT_P (op1))
5885 op1_hash = HASH (op1,mode);
5888 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
5889 op0_elt->in_memory = op0_in_memory;
5890 op0_elt->in_struct = op0_in_struct;
5893 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
5894 if (GET_CODE (op1) == REG)
5896 /* Look it up again--in case op0 and op1 are the same. */
5897 op1_elt = lookup (op1, op1_hash, mode);
5899 /* Put OP1 in the hash table so it gets a new quantity number. */
5902 if (insert_regs (op1, NULL_PTR, 0))
5904 rehash_using_reg (op1);
5905 op1_hash = HASH (op1, mode);
5908 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
5909 op1_elt->in_memory = op1_in_memory;
5910 op1_elt->in_struct = op1_in_struct;
5913 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
5914 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
5918 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
5919 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
5925 /* If either side is still missing an equivalence, make it now,
5926 then merge the equivalences. */
5930 if (insert_regs (op0, NULL_PTR, 0))
5932 rehash_using_reg (op0);
5933 op0_hash = HASH (op0, mode);
5936 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
5937 op0_elt->in_memory = op0_in_memory;
5938 op0_elt->in_struct = op0_in_struct;
5943 if (insert_regs (op1, NULL_PTR, 0))
5945 rehash_using_reg (op1);
5946 op1_hash = HASH (op1, mode);
5949 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
5950 op1_elt->in_memory = op1_in_memory;
5951 op1_elt->in_struct = op1_in_struct;
5954 merge_equiv_classes (op0_elt, op1_elt);
5955 last_jump_equiv_class = op0_elt;
5958 /* CSE processing for one instruction.
5959 First simplify sources and addresses of all assignments
5960 in the instruction, using previously-computed equivalents values.
5961 Then install the new sources and destinations in the table
5962 of available values.
5964 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5967 /* Data on one SET contained in the instruction. */
5971 /* The SET rtx itself. */
5973 /* The SET_SRC of the rtx (the original value, if it is changing). */
5975 /* The hash-table element for the SET_SRC of the SET. */
5976 struct table_elt *src_elt;
5977 /* Hash value for the SET_SRC. */
5979 /* Hash value for the SET_DEST. */
5981 /* The SET_DEST, with SUBREG, etc., stripped. */
5983 /* Place where the pointer to the INNER_DEST was found. */
5984 rtx *inner_dest_loc;
5985 /* Nonzero if the SET_SRC is in memory. */
5987 /* Nonzero if the SET_SRC is in a structure. */
5989 /* Nonzero if the SET_SRC contains something
5990 whose value cannot be predicted and understood. */
5992 /* Original machine mode, in case it becomes a CONST_INT. */
5993 enum machine_mode mode;
5994 /* A constant equivalent for SET_SRC, if any. */
5996 /* Hash value of constant equivalent for SET_SRC. */
5997 unsigned src_const_hash;
5998 /* Table entry for constant equivalent for SET_SRC, if any. */
5999 struct table_elt *src_const_elt;
6003 cse_insn (insn, in_libcall_block)
6005 int in_libcall_block;
6007 register rtx x = PATTERN (insn);
6010 register int n_sets = 0;
6012 /* Records what this insn does to set CC0. */
6013 rtx this_insn_cc0 = 0;
6014 enum machine_mode this_insn_cc0_mode;
6015 struct write_data writes_memory;
6016 static struct write_data init = {0, 0, 0, 0};
6019 struct table_elt *src_eqv_elt = 0;
6020 int src_eqv_volatile;
6021 int src_eqv_in_memory;
6022 int src_eqv_in_struct;
6023 unsigned src_eqv_hash;
6028 writes_memory = init;
6030 /* Find all the SETs and CLOBBERs in this instruction.
6031 Record all the SETs in the array `set' and count them.
6032 Also determine whether there is a CLOBBER that invalidates
6033 all memory references, or all references at varying addresses. */
6035 if (GET_CODE (insn) == CALL_INSN)
6037 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6038 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6039 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6042 if (GET_CODE (x) == SET)
6044 sets = (struct set *) alloca (sizeof (struct set));
6047 /* Ignore SETs that are unconditional jumps.
6048 They never need cse processing, so this does not hurt.
6049 The reason is not efficiency but rather
6050 so that we can test at the end for instructions
6051 that have been simplified to unconditional jumps
6052 and not be misled by unchanged instructions
6053 that were unconditional jumps to begin with. */
6054 if (SET_DEST (x) == pc_rtx
6055 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6058 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6059 The hard function value register is used only once, to copy to
6060 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6061 Ensure we invalidate the destination register. On the 80386 no
6062 other code would invalidate it since it is a fixed_reg.
6063 We need not check the return of apply_change_group; see canon_reg. */
6065 else if (GET_CODE (SET_SRC (x)) == CALL)
6067 canon_reg (SET_SRC (x), insn);
6068 apply_change_group ();
6069 fold_rtx (SET_SRC (x), insn);
6070 invalidate (SET_DEST (x), VOIDmode);
6075 else if (GET_CODE (x) == PARALLEL)
6077 register int lim = XVECLEN (x, 0);
6079 sets = (struct set *) alloca (lim * sizeof (struct set));
6081 /* Find all regs explicitly clobbered in this insn,
6082 and ensure they are not replaced with any other regs
6083 elsewhere in this insn.
6084 When a reg that is clobbered is also used for input,
6085 we should presume that that is for a reason,
6086 and we should not substitute some other register
6087 which is not supposed to be clobbered.
6088 Therefore, this loop cannot be merged into the one below
6089 because a CALL may precede a CLOBBER and refer to the
6090 value clobbered. We must not let a canonicalization do
6091 anything in that case. */
6092 for (i = 0; i < lim; i++)
6094 register rtx y = XVECEXP (x, 0, i);
6095 if (GET_CODE (y) == CLOBBER)
6097 rtx clobbered = XEXP (y, 0);
6099 if (GET_CODE (clobbered) == REG
6100 || GET_CODE (clobbered) == SUBREG)
6101 invalidate (clobbered, VOIDmode);
6102 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6103 || GET_CODE (clobbered) == ZERO_EXTRACT)
6104 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6108 for (i = 0; i < lim; i++)
6110 register rtx y = XVECEXP (x, 0, i);
6111 if (GET_CODE (y) == SET)
6113 /* As above, we ignore unconditional jumps and call-insns and
6114 ignore the result of apply_change_group. */
6115 if (GET_CODE (SET_SRC (y)) == CALL)
6117 canon_reg (SET_SRC (y), insn);
6118 apply_change_group ();
6119 fold_rtx (SET_SRC (y), insn);
6120 invalidate (SET_DEST (y), VOIDmode);
6122 else if (SET_DEST (y) == pc_rtx
6123 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6126 sets[n_sets++].rtl = y;
6128 else if (GET_CODE (y) == CLOBBER)
6130 /* If we clobber memory, take note of that,
6131 and canon the address.
6132 This does nothing when a register is clobbered
6133 because we have already invalidated the reg. */
6134 if (GET_CODE (XEXP (y, 0)) == MEM)
6136 canon_reg (XEXP (y, 0), NULL_RTX);
6137 note_mem_written (XEXP (y, 0), &writes_memory);
6140 else if (GET_CODE (y) == USE
6141 && ! (GET_CODE (XEXP (y, 0)) == REG
6142 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6143 canon_reg (y, NULL_RTX);
6144 else if (GET_CODE (y) == CALL)
6146 /* The result of apply_change_group can be ignored; see
6148 canon_reg (y, insn);
6149 apply_change_group ();
6154 else if (GET_CODE (x) == CLOBBER)
6156 if (GET_CODE (XEXP (x, 0)) == MEM)
6158 canon_reg (XEXP (x, 0), NULL_RTX);
6159 note_mem_written (XEXP (x, 0), &writes_memory);
6163 /* Canonicalize a USE of a pseudo register or memory location. */
6164 else if (GET_CODE (x) == USE
6165 && ! (GET_CODE (XEXP (x, 0)) == REG
6166 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6167 canon_reg (XEXP (x, 0), NULL_RTX);
6168 else if (GET_CODE (x) == CALL)
6170 /* The result of apply_change_group can be ignored; see canon_reg. */
6171 canon_reg (x, insn);
6172 apply_change_group ();
6176 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6177 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6178 is handled specially for this case, and if it isn't set, then there will
6179 be no equivalence for the destinatation. */
6180 if (n_sets == 1 && REG_NOTES (insn) != 0
6181 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6182 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6183 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6184 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6186 /* Canonicalize sources and addresses of destinations.
6187 We do this in a separate pass to avoid problems when a MATCH_DUP is
6188 present in the insn pattern. In that case, we want to ensure that
6189 we don't break the duplicate nature of the pattern. So we will replace
6190 both operands at the same time. Otherwise, we would fail to find an
6191 equivalent substitution in the loop calling validate_change below.
6193 We used to suppress canonicalization of DEST if it appears in SRC,
6194 but we don't do this any more. */
6196 for (i = 0; i < n_sets; i++)
6198 rtx dest = SET_DEST (sets[i].rtl);
6199 rtx src = SET_SRC (sets[i].rtl);
6200 rtx new = canon_reg (src, insn);
6202 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6203 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6204 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6205 || insn_n_dups[recog_memoized (insn)] > 0)
6206 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6208 SET_SRC (sets[i].rtl) = new;
6210 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6212 validate_change (insn, &XEXP (dest, 1),
6213 canon_reg (XEXP (dest, 1), insn), 1);
6214 validate_change (insn, &XEXP (dest, 2),
6215 canon_reg (XEXP (dest, 2), insn), 1);
6218 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6219 || GET_CODE (dest) == ZERO_EXTRACT
6220 || GET_CODE (dest) == SIGN_EXTRACT)
6221 dest = XEXP (dest, 0);
6223 if (GET_CODE (dest) == MEM)
6224 canon_reg (dest, insn);
6227 /* Now that we have done all the replacements, we can apply the change
6228 group and see if they all work. Note that this will cause some
6229 canonicalizations that would have worked individually not to be applied
6230 because some other canonicalization didn't work, but this should not
6233 The result of apply_change_group can be ignored; see canon_reg. */
6235 apply_change_group ();
6237 /* Set sets[i].src_elt to the class each source belongs to.
6238 Detect assignments from or to volatile things
6239 and set set[i] to zero so they will be ignored
6240 in the rest of this function.
6242 Nothing in this loop changes the hash table or the register chains. */
6244 for (i = 0; i < n_sets; i++)
6246 register rtx src, dest;
6247 register rtx src_folded;
6248 register struct table_elt *elt = 0, *p;
6249 enum machine_mode mode;
6252 rtx src_related = 0;
6253 struct table_elt *src_const_elt = 0;
6254 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6255 int src_related_cost = 10000, src_elt_cost = 10000;
6256 /* Set non-zero if we need to call force_const_mem on with the
6257 contents of src_folded before using it. */
6258 int src_folded_force_flag = 0;
6260 dest = SET_DEST (sets[i].rtl);
6261 src = SET_SRC (sets[i].rtl);
6263 /* If SRC is a constant that has no machine mode,
6264 hash it with the destination's machine mode.
6265 This way we can keep different modes separate. */
6267 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6268 sets[i].mode = mode;
6272 enum machine_mode eqvmode = mode;
6273 if (GET_CODE (dest) == STRICT_LOW_PART)
6274 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6276 hash_arg_in_memory = 0;
6277 hash_arg_in_struct = 0;
6278 src_eqv = fold_rtx (src_eqv, insn);
6279 src_eqv_hash = HASH (src_eqv, eqvmode);
6281 /* Find the equivalence class for the equivalent expression. */
6284 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6286 src_eqv_volatile = do_not_record;
6287 src_eqv_in_memory = hash_arg_in_memory;
6288 src_eqv_in_struct = hash_arg_in_struct;
6291 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6292 value of the INNER register, not the destination. So it is not
6293 a valid substitution for the source. But save it for later. */
6294 if (GET_CODE (dest) == STRICT_LOW_PART)
6297 src_eqv_here = src_eqv;
6299 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6300 simplified result, which may not necessarily be valid. */
6301 src_folded = fold_rtx (src, insn);
6303 /* If storing a constant in a bitfield, pre-truncate the constant
6304 so we will be able to record it later. */
6305 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6306 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6308 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6310 if (GET_CODE (src) == CONST_INT
6311 && GET_CODE (width) == CONST_INT
6312 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6313 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6315 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6316 << INTVAL (width)) - 1));
6319 /* Compute SRC's hash code, and also notice if it
6320 should not be recorded at all. In that case,
6321 prevent any further processing of this assignment. */
6323 hash_arg_in_memory = 0;
6324 hash_arg_in_struct = 0;
6327 sets[i].src_hash = HASH (src, mode);
6328 sets[i].src_volatile = do_not_record;
6329 sets[i].src_in_memory = hash_arg_in_memory;
6330 sets[i].src_in_struct = hash_arg_in_struct;
6333 /* It is no longer clear why we used to do this, but it doesn't
6334 appear to still be needed. So let's try without it since this
6335 code hurts cse'ing widened ops. */
6336 /* If source is a perverse subreg (such as QI treated as an SI),
6337 treat it as volatile. It may do the work of an SI in one context
6338 where the extra bits are not being used, but cannot replace an SI
6340 if (GET_CODE (src) == SUBREG
6341 && (GET_MODE_SIZE (GET_MODE (src))
6342 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6343 sets[i].src_volatile = 1;
6346 /* Locate all possible equivalent forms for SRC. Try to replace
6347 SRC in the insn with each cheaper equivalent.
6349 We have the following types of equivalents: SRC itself, a folded
6350 version, a value given in a REG_EQUAL note, or a value related
6353 Each of these equivalents may be part of an additional class
6354 of equivalents (if more than one is in the table, they must be in
6355 the same class; we check for this).
6357 If the source is volatile, we don't do any table lookups.
6359 We note any constant equivalent for possible later use in a
6362 if (!sets[i].src_volatile)
6363 elt = lookup (src, sets[i].src_hash, mode);
6365 sets[i].src_elt = elt;
6367 if (elt && src_eqv_here && src_eqv_elt)
6369 if (elt->first_same_value != src_eqv_elt->first_same_value)
6371 /* The REG_EQUAL is indicating that two formerly distinct
6372 classes are now equivalent. So merge them. */
6373 merge_equiv_classes (elt, src_eqv_elt);
6374 src_eqv_hash = HASH (src_eqv, elt->mode);
6375 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6381 else if (src_eqv_elt)
6384 /* Try to find a constant somewhere and record it in `src_const'.
6385 Record its table element, if any, in `src_const_elt'. Look in
6386 any known equivalences first. (If the constant is not in the
6387 table, also set `sets[i].src_const_hash'). */
6389 for (p = elt->first_same_value; p; p = p->next_same_value)
6393 src_const_elt = elt;
6398 && (CONSTANT_P (src_folded)
6399 /* Consider (minus (label_ref L1) (label_ref L2)) as
6400 "constant" here so we will record it. This allows us
6401 to fold switch statements when an ADDR_DIFF_VEC is used. */
6402 || (GET_CODE (src_folded) == MINUS
6403 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6404 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6405 src_const = src_folded, src_const_elt = elt;
6406 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6407 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6409 /* If we don't know if the constant is in the table, get its
6410 hash code and look it up. */
6411 if (src_const && src_const_elt == 0)
6413 sets[i].src_const_hash = HASH (src_const, mode);
6414 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6417 sets[i].src_const = src_const;
6418 sets[i].src_const_elt = src_const_elt;
6420 /* If the constant and our source are both in the table, mark them as
6421 equivalent. Otherwise, if a constant is in the table but the source
6422 isn't, set ELT to it. */
6423 if (src_const_elt && elt
6424 && src_const_elt->first_same_value != elt->first_same_value)
6425 merge_equiv_classes (elt, src_const_elt);
6426 else if (src_const_elt && elt == 0)
6427 elt = src_const_elt;
6429 /* See if there is a register linearly related to a constant
6430 equivalent of SRC. */
6432 && (GET_CODE (src_const) == CONST
6433 || (src_const_elt && src_const_elt->related_value != 0)))
6435 src_related = use_related_value (src_const, src_const_elt);
6438 struct table_elt *src_related_elt
6439 = lookup (src_related, HASH (src_related, mode), mode);
6440 if (src_related_elt && elt)
6442 if (elt->first_same_value
6443 != src_related_elt->first_same_value)
6444 /* This can occur when we previously saw a CONST
6445 involving a SYMBOL_REF and then see the SYMBOL_REF
6446 twice. Merge the involved classes. */
6447 merge_equiv_classes (elt, src_related_elt);
6450 src_related_elt = 0;
6452 else if (src_related_elt && elt == 0)
6453 elt = src_related_elt;
6457 /* See if we have a CONST_INT that is already in a register in a
6460 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6461 && GET_MODE_CLASS (mode) == MODE_INT
6462 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6464 enum machine_mode wider_mode;
6466 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6467 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6468 && src_related == 0;
6469 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6471 struct table_elt *const_elt
6472 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6477 for (const_elt = const_elt->first_same_value;
6478 const_elt; const_elt = const_elt->next_same_value)
6479 if (GET_CODE (const_elt->exp) == REG)
6481 src_related = gen_lowpart_if_possible (mode,
6488 /* Another possibility is that we have an AND with a constant in
6489 a mode narrower than a word. If so, it might have been generated
6490 as part of an "if" which would narrow the AND. If we already
6491 have done the AND in a wider mode, we can use a SUBREG of that
6494 if (flag_expensive_optimizations && ! src_related
6495 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6496 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6498 enum machine_mode tmode;
6499 rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1));
6501 for (tmode = GET_MODE_WIDER_MODE (mode);
6502 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6503 tmode = GET_MODE_WIDER_MODE (tmode))
6505 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6506 struct table_elt *larger_elt;
6510 PUT_MODE (new_and, tmode);
6511 XEXP (new_and, 0) = inner;
6512 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6513 if (larger_elt == 0)
6516 for (larger_elt = larger_elt->first_same_value;
6517 larger_elt; larger_elt = larger_elt->next_same_value)
6518 if (GET_CODE (larger_elt->exp) == REG)
6521 = gen_lowpart_if_possible (mode, larger_elt->exp);
6531 #ifdef LOAD_EXTEND_OP
6532 /* See if a MEM has already been loaded with a widening operation;
6533 if it has, we can use a subreg of that. Many CISC machines
6534 also have such operations, but this is only likely to be
6535 beneficial these machines. */
6537 if (flag_expensive_optimizations && src_related == 0
6538 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6539 && GET_MODE_CLASS (mode) == MODE_INT
6540 && GET_CODE (src) == MEM && ! do_not_record
6541 && LOAD_EXTEND_OP (mode) != NIL)
6543 enum machine_mode tmode;
6545 /* Set what we are trying to extend and the operation it might
6546 have been extended with. */
6547 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6548 XEXP (memory_extend_rtx, 0) = src;
6550 for (tmode = GET_MODE_WIDER_MODE (mode);
6551 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6552 tmode = GET_MODE_WIDER_MODE (tmode))
6554 struct table_elt *larger_elt;
6556 PUT_MODE (memory_extend_rtx, tmode);
6557 larger_elt = lookup (memory_extend_rtx,
6558 HASH (memory_extend_rtx, tmode), tmode);
6559 if (larger_elt == 0)
6562 for (larger_elt = larger_elt->first_same_value;
6563 larger_elt; larger_elt = larger_elt->next_same_value)
6564 if (GET_CODE (larger_elt->exp) == REG)
6566 src_related = gen_lowpart_if_possible (mode,
6575 #endif /* LOAD_EXTEND_OP */
6577 if (src == src_folded)
6580 /* At this point, ELT, if non-zero, points to a class of expressions
6581 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6582 and SRC_RELATED, if non-zero, each contain additional equivalent
6583 expressions. Prune these latter expressions by deleting expressions
6584 already in the equivalence class.
6586 Check for an equivalent identical to the destination. If found,
6587 this is the preferred equivalent since it will likely lead to
6588 elimination of the insn. Indicate this by placing it in
6591 if (elt) elt = elt->first_same_value;
6592 for (p = elt; p; p = p->next_same_value)
6594 enum rtx_code code = GET_CODE (p->exp);
6596 /* If the expression is not valid, ignore it. Then we do not
6597 have to check for validity below. In most cases, we can use
6598 `rtx_equal_p', since canonicalization has already been done. */
6599 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6602 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6604 else if (src_folded && GET_CODE (src_folded) == code
6605 && rtx_equal_p (src_folded, p->exp))
6607 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6608 && rtx_equal_p (src_eqv_here, p->exp))
6610 else if (src_related && GET_CODE (src_related) == code
6611 && rtx_equal_p (src_related, p->exp))
6614 /* This is the same as the destination of the insns, we want
6615 to prefer it. Copy it to src_related. The code below will
6616 then give it a negative cost. */
6617 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6622 /* Find the cheapest valid equivalent, trying all the available
6623 possibilities. Prefer items not in the hash table to ones
6624 that are when they are equal cost. Note that we can never
6625 worsen an insn as the current contents will also succeed.
6626 If we find an equivalent identical to the destination, use it as best,
6627 since this insn will probably be eliminated in that case. */
6630 if (rtx_equal_p (src, dest))
6633 src_cost = COST (src);
6638 if (rtx_equal_p (src_eqv_here, dest))
6641 src_eqv_cost = COST (src_eqv_here);
6646 if (rtx_equal_p (src_folded, dest))
6647 src_folded_cost = -1;
6649 src_folded_cost = COST (src_folded);
6654 if (rtx_equal_p (src_related, dest))
6655 src_related_cost = -1;
6657 src_related_cost = COST (src_related);
6660 /* If this was an indirect jump insn, a known label will really be
6661 cheaper even though it looks more expensive. */
6662 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6663 src_folded = src_const, src_folded_cost = -1;
6665 /* Terminate loop when replacement made. This must terminate since
6666 the current contents will be tested and will always be valid. */
6671 /* Skip invalid entries. */
6672 while (elt && GET_CODE (elt->exp) != REG
6673 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6674 elt = elt->next_same_value;
6676 if (elt) src_elt_cost = elt->cost;
6678 /* Find cheapest and skip it for the next time. For items
6679 of equal cost, use this order:
6680 src_folded, src, src_eqv, src_related and hash table entry. */
6681 if (src_folded_cost <= src_cost
6682 && src_folded_cost <= src_eqv_cost
6683 && src_folded_cost <= src_related_cost
6684 && src_folded_cost <= src_elt_cost)
6686 trial = src_folded, src_folded_cost = 10000;
6687 if (src_folded_force_flag)
6688 trial = force_const_mem (mode, trial);
6690 else if (src_cost <= src_eqv_cost
6691 && src_cost <= src_related_cost
6692 && src_cost <= src_elt_cost)
6693 trial = src, src_cost = 10000;
6694 else if (src_eqv_cost <= src_related_cost
6695 && src_eqv_cost <= src_elt_cost)
6696 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6697 else if (src_related_cost <= src_elt_cost)
6698 trial = copy_rtx (src_related), src_related_cost = 10000;
6701 trial = copy_rtx (elt->exp);
6702 elt = elt->next_same_value;
6703 src_elt_cost = 10000;
6706 /* We don't normally have an insn matching (set (pc) (pc)), so
6707 check for this separately here. We will delete such an
6710 Tablejump insns contain a USE of the table, so simply replacing
6711 the operand with the constant won't match. This is simply an
6712 unconditional branch, however, and is therefore valid. Just
6713 insert the substitution here and we will delete and re-emit
6716 if (n_sets == 1 && dest == pc_rtx
6718 || (GET_CODE (trial) == LABEL_REF
6719 && ! condjump_p (insn))))
6721 /* If TRIAL is a label in front of a jump table, we are
6722 really falling through the switch (this is how casesi
6723 insns work), so we must branch around the table. */
6724 if (GET_CODE (trial) == CODE_LABEL
6725 && NEXT_INSN (trial) != 0
6726 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6727 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6728 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6730 trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial));
6732 SET_SRC (sets[i].rtl) = trial;
6733 cse_jumps_altered = 1;
6737 /* Look for a substitution that makes a valid insn. */
6738 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6740 /* The result of apply_change_group can be ignored; see
6743 validate_change (insn, &SET_SRC (sets[i].rtl),
6744 canon_reg (SET_SRC (sets[i].rtl), insn),
6746 apply_change_group ();
6750 /* If we previously found constant pool entries for
6751 constants and this is a constant, try making a
6752 pool entry. Put it in src_folded unless we already have done
6753 this since that is where it likely came from. */
6755 else if (constant_pool_entries_cost
6756 && CONSTANT_P (trial)
6757 && ! (GET_CODE (trial) == CONST
6758 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
6760 || (GET_CODE (src_folded) != MEM
6761 && ! src_folded_force_flag))
6762 && GET_MODE_CLASS (mode) != MODE_CC)
6764 src_folded_force_flag = 1;
6766 src_folded_cost = constant_pool_entries_cost;
6770 src = SET_SRC (sets[i].rtl);
6772 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6773 However, there is an important exception: If both are registers
6774 that are not the head of their equivalence class, replace SET_SRC
6775 with the head of the class. If we do not do this, we will have
6776 both registers live over a portion of the basic block. This way,
6777 their lifetimes will likely abut instead of overlapping. */
6778 if (GET_CODE (dest) == REG
6779 && REGNO_QTY_VALID_P (REGNO (dest))
6780 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6781 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6782 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6783 /* Don't do this if the original insn had a hard reg as
6785 && (GET_CODE (sets[i].src) != REG
6786 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6787 /* We can't call canon_reg here because it won't do anything if
6788 SRC is a hard register. */
6790 int first = qty_first_reg[reg_qty[REGNO (src)]];
6792 src = SET_SRC (sets[i].rtl)
6793 = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6794 : gen_rtx (REG, GET_MODE (src), first);
6796 /* If we had a constant that is cheaper than what we are now
6797 setting SRC to, use that constant. We ignored it when we
6798 thought we could make this into a no-op. */
6799 if (src_const && COST (src_const) < COST (src)
6800 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6804 /* If we made a change, recompute SRC values. */
6805 if (src != sets[i].src)
6808 hash_arg_in_memory = 0;
6809 hash_arg_in_struct = 0;
6811 sets[i].src_hash = HASH (src, mode);
6812 sets[i].src_volatile = do_not_record;
6813 sets[i].src_in_memory = hash_arg_in_memory;
6814 sets[i].src_in_struct = hash_arg_in_struct;
6815 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
6818 /* If this is a single SET, we are setting a register, and we have an
6819 equivalent constant, we want to add a REG_NOTE. We don't want
6820 to write a REG_EQUAL note for a constant pseudo since verifying that
6821 that pseudo hasn't been eliminated is a pain. Such a note also
6822 won't help anything. */
6823 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
6824 && GET_CODE (src_const) != REG)
6826 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6828 /* Record the actual constant value in a REG_EQUAL note, making
6829 a new one if one does not already exist. */
6831 XEXP (tem, 0) = src_const;
6833 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL,
6834 src_const, REG_NOTES (insn));
6836 /* If storing a constant value in a register that
6837 previously held the constant value 0,
6838 record this fact with a REG_WAS_0 note on this insn.
6840 Note that the *register* is required to have previously held 0,
6841 not just any register in the quantity and we must point to the
6842 insn that set that register to zero.
6844 Rather than track each register individually, we just see if
6845 the last set for this quantity was for this register. */
6847 if (REGNO_QTY_VALID_P (REGNO (dest))
6848 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
6850 /* See if we previously had a REG_WAS_0 note. */
6851 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6852 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
6854 if ((tem = single_set (const_insn)) != 0
6855 && rtx_equal_p (SET_DEST (tem), dest))
6858 XEXP (note, 0) = const_insn;
6860 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0,
6861 const_insn, REG_NOTES (insn));
6866 /* Now deal with the destination. */
6868 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
6870 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6871 to the MEM or REG within it. */
6872 while (GET_CODE (dest) == SIGN_EXTRACT
6873 || GET_CODE (dest) == ZERO_EXTRACT
6874 || GET_CODE (dest) == SUBREG
6875 || GET_CODE (dest) == STRICT_LOW_PART)
6877 sets[i].inner_dest_loc = &XEXP (dest, 0);
6878 dest = XEXP (dest, 0);
6881 sets[i].inner_dest = dest;
6883 if (GET_CODE (dest) == MEM)
6885 dest = fold_rtx (dest, insn);
6887 /* Decide whether we invalidate everything in memory,
6888 or just things at non-fixed places.
6889 Writing a large aggregate must invalidate everything
6890 because we don't know how long it is. */
6891 note_mem_written (dest, &writes_memory);
6894 /* Compute the hash code of the destination now,
6895 before the effects of this instruction are recorded,
6896 since the register values used in the address computation
6897 are those before this instruction. */
6898 sets[i].dest_hash = HASH (dest, mode);
6900 /* Don't enter a bit-field in the hash table
6901 because the value in it after the store
6902 may not equal what was stored, due to truncation. */
6904 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6905 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6907 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6909 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
6910 && GET_CODE (width) == CONST_INT
6911 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6912 && ! (INTVAL (src_const)
6913 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6914 /* Exception: if the value is constant,
6915 and it won't be truncated, record it. */
6919 /* This is chosen so that the destination will be invalidated
6920 but no new value will be recorded.
6921 We must invalidate because sometimes constant
6922 values can be recorded for bitfields. */
6923 sets[i].src_elt = 0;
6924 sets[i].src_volatile = 1;
6930 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6932 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
6934 PUT_CODE (insn, NOTE);
6935 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
6936 NOTE_SOURCE_FILE (insn) = 0;
6937 cse_jumps_altered = 1;
6938 /* One less use of the label this insn used to jump to. */
6939 --LABEL_NUSES (JUMP_LABEL (insn));
6940 /* No more processing for this set. */
6944 /* If this SET is now setting PC to a label, we know it used to
6945 be a conditional or computed branch. So we see if we can follow
6946 it. If it was a computed branch, delete it and re-emit. */
6947 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
6951 /* If this is not in the format for a simple branch and
6952 we are the only SET in it, re-emit it. */
6953 if (! simplejump_p (insn) && n_sets == 1)
6955 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
6956 JUMP_LABEL (new) = XEXP (src, 0);
6957 LABEL_NUSES (XEXP (src, 0))++;
6962 /* Otherwise, force rerecognition, since it probably had
6963 a different pattern before.
6964 This shouldn't really be necessary, since whatever
6965 changed the source value above should have done this.
6966 Until the right place is found, might as well do this here. */
6967 INSN_CODE (insn) = -1;
6969 /* Now that we've converted this jump to an unconditional jump,
6970 there is dead code after it. Delete the dead code until we
6971 reach a BARRIER, the end of the function, or a label. Do
6972 not delete NOTEs except for NOTE_INSN_DELETED since later
6973 phases assume these notes are retained. */
6977 while (NEXT_INSN (p) != 0
6978 && GET_CODE (NEXT_INSN (p)) != BARRIER
6979 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
6981 if (GET_CODE (NEXT_INSN (p)) != NOTE
6982 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
6983 delete_insn (NEXT_INSN (p));
6988 /* If we don't have a BARRIER immediately after INSN, put one there.
6989 Much code assumes that there are no NOTEs between a JUMP_INSN and
6992 if (NEXT_INSN (insn) == 0
6993 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
6994 emit_barrier_before (NEXT_INSN (insn));
6996 /* We might have two BARRIERs separated by notes. Delete the second
6999 if (p != insn && NEXT_INSN (p) != 0
7000 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7001 delete_insn (NEXT_INSN (p));
7003 cse_jumps_altered = 1;
7007 /* If destination is volatile, invalidate it and then do no further
7008 processing for this assignment. */
7010 else if (do_not_record)
7012 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7013 || GET_CODE (dest) == MEM)
7014 invalidate (dest, VOIDmode);
7015 else if (GET_CODE (dest) == STRICT_LOW_PART
7016 || GET_CODE (dest) == ZERO_EXTRACT)
7017 invalidate (XEXP (dest, 0), GET_MODE (dest));
7021 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7022 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7025 /* If setting CC0, record what it was set to, or a constant, if it
7026 is equivalent to a constant. If it is being set to a floating-point
7027 value, make a COMPARE with the appropriate constant of 0. If we
7028 don't do this, later code can interpret this as a test against
7029 const0_rtx, which can cause problems if we try to put it into an
7030 insn as a floating-point operand. */
7031 if (dest == cc0_rtx)
7033 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7034 this_insn_cc0_mode = mode;
7035 if (FLOAT_MODE_P (mode))
7036 this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0,
7042 /* Now enter all non-volatile source expressions in the hash table
7043 if they are not already present.
7044 Record their equivalence classes in src_elt.
7045 This way we can insert the corresponding destinations into
7046 the same classes even if the actual sources are no longer in them
7047 (having been invalidated). */
7049 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7050 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7052 register struct table_elt *elt;
7053 register struct table_elt *classp = sets[0].src_elt;
7054 rtx dest = SET_DEST (sets[0].rtl);
7055 enum machine_mode eqvmode = GET_MODE (dest);
7057 if (GET_CODE (dest) == STRICT_LOW_PART)
7059 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7062 if (insert_regs (src_eqv, classp, 0))
7064 rehash_using_reg (src_eqv);
7065 src_eqv_hash = HASH (src_eqv, eqvmode);
7067 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7068 elt->in_memory = src_eqv_in_memory;
7069 elt->in_struct = src_eqv_in_struct;
7072 /* Check to see if src_eqv_elt is the same as a set source which
7073 does not yet have an elt, and if so set the elt of the set source
7075 for (i = 0; i < n_sets; i++)
7076 if (sets[i].rtl && sets[i].src_elt == 0
7077 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7078 sets[i].src_elt = src_eqv_elt;
7081 for (i = 0; i < n_sets; i++)
7082 if (sets[i].rtl && ! sets[i].src_volatile
7083 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7085 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7087 /* REG_EQUAL in setting a STRICT_LOW_PART
7088 gives an equivalent for the entire destination register,
7089 not just for the subreg being stored in now.
7090 This is a more interesting equivalence, so we arrange later
7091 to treat the entire reg as the destination. */
7092 sets[i].src_elt = src_eqv_elt;
7093 sets[i].src_hash = src_eqv_hash;
7097 /* Insert source and constant equivalent into hash table, if not
7099 register struct table_elt *classp = src_eqv_elt;
7100 register rtx src = sets[i].src;
7101 register rtx dest = SET_DEST (sets[i].rtl);
7102 enum machine_mode mode
7103 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7105 if (sets[i].src_elt == 0)
7107 register struct table_elt *elt;
7109 /* Note that these insert_regs calls cannot remove
7110 any of the src_elt's, because they would have failed to
7111 match if not still valid. */
7112 if (insert_regs (src, classp, 0))
7114 rehash_using_reg (src);
7115 sets[i].src_hash = HASH (src, mode);
7117 elt = insert (src, classp, sets[i].src_hash, mode);
7118 elt->in_memory = sets[i].src_in_memory;
7119 elt->in_struct = sets[i].src_in_struct;
7120 sets[i].src_elt = classp = elt;
7123 if (sets[i].src_const && sets[i].src_const_elt == 0
7124 && src != sets[i].src_const
7125 && ! rtx_equal_p (sets[i].src_const, src))
7126 sets[i].src_elt = insert (sets[i].src_const, classp,
7127 sets[i].src_const_hash, mode);
7130 else if (sets[i].src_elt == 0)
7131 /* If we did not insert the source into the hash table (e.g., it was
7132 volatile), note the equivalence class for the REG_EQUAL value, if any,
7133 so that the destination goes into that class. */
7134 sets[i].src_elt = src_eqv_elt;
7136 invalidate_from_clobbers (&writes_memory, x);
7138 /* Some registers are invalidated by subroutine calls. Memory is
7139 invalidated by non-constant calls. */
7141 if (GET_CODE (insn) == CALL_INSN)
7143 static struct write_data everything = {0, 1, 1, 1};
7145 if (! CONST_CALL_P (insn))
7146 invalidate_memory (&everything);
7147 invalidate_for_call ();
7150 /* Now invalidate everything set by this instruction.
7151 If a SUBREG or other funny destination is being set,
7152 sets[i].rtl is still nonzero, so here we invalidate the reg
7153 a part of which is being set. */
7155 for (i = 0; i < n_sets; i++)
7158 /* We can't use the inner dest, because the mode associated with
7159 a ZERO_EXTRACT is significant. */
7160 register rtx dest = SET_DEST (sets[i].rtl);
7162 /* Needed for registers to remove the register from its
7163 previous quantity's chain.
7164 Needed for memory if this is a nonvarying address, unless
7165 we have just done an invalidate_memory that covers even those. */
7166 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7167 || (GET_CODE (dest) == MEM && ! writes_memory.all
7168 && ! cse_rtx_addr_varies_p (dest)))
7169 invalidate (dest, VOIDmode);
7170 else if (GET_CODE (dest) == STRICT_LOW_PART
7171 || GET_CODE (dest) == ZERO_EXTRACT)
7172 invalidate (XEXP (dest, 0), GET_MODE (dest));
7175 /* Make sure registers mentioned in destinations
7176 are safe for use in an expression to be inserted.
7177 This removes from the hash table
7178 any invalid entry that refers to one of these registers.
7180 We don't care about the return value from mention_regs because
7181 we are going to hash the SET_DEST values unconditionally. */
7183 for (i = 0; i < n_sets; i++)
7184 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
7185 mention_regs (SET_DEST (sets[i].rtl));
7187 /* We may have just removed some of the src_elt's from the hash table.
7188 So replace each one with the current head of the same class. */
7190 for (i = 0; i < n_sets; i++)
7193 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7194 /* If elt was removed, find current head of same class,
7195 or 0 if nothing remains of that class. */
7197 register struct table_elt *elt = sets[i].src_elt;
7199 while (elt && elt->prev_same_value)
7200 elt = elt->prev_same_value;
7202 while (elt && elt->first_same_value == 0)
7203 elt = elt->next_same_value;
7204 sets[i].src_elt = elt ? elt->first_same_value : 0;
7208 /* Now insert the destinations into their equivalence classes. */
7210 for (i = 0; i < n_sets; i++)
7213 register rtx dest = SET_DEST (sets[i].rtl);
7214 register struct table_elt *elt;
7216 /* Don't record value if we are not supposed to risk allocating
7217 floating-point values in registers that might be wider than
7219 if ((flag_float_store
7220 && GET_CODE (dest) == MEM
7221 && FLOAT_MODE_P (GET_MODE (dest)))
7222 /* Don't record values of destinations set inside a libcall block
7223 since we might delete the libcall. Things should have been set
7224 up so we won't want to reuse such a value, but we play it safe
7227 /* If we didn't put a REG_EQUAL value or a source into the hash
7228 table, there is no point is recording DEST. */
7229 || sets[i].src_elt == 0
7230 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7231 or SIGN_EXTEND, don't record DEST since it can cause
7232 some tracking to be wrong.
7234 ??? Think about this more later. */
7235 || (GET_CODE (dest) == SUBREG
7236 && (GET_MODE_SIZE (GET_MODE (dest))
7237 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7238 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7239 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7242 /* STRICT_LOW_PART isn't part of the value BEING set,
7243 and neither is the SUBREG inside it.
7244 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7245 if (GET_CODE (dest) == STRICT_LOW_PART)
7246 dest = SUBREG_REG (XEXP (dest, 0));
7248 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7249 /* Registers must also be inserted into chains for quantities. */
7250 if (insert_regs (dest, sets[i].src_elt, 1))
7252 /* If `insert_regs' changes something, the hash code must be
7254 rehash_using_reg (dest);
7255 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7258 elt = insert (dest, sets[i].src_elt,
7259 sets[i].dest_hash, GET_MODE (dest));
7260 elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM;
7263 /* This implicitly assumes a whole struct
7264 need not have MEM_IN_STRUCT_P.
7265 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7266 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7267 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7270 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7271 narrower than M2, and both M1 and M2 are the same number of words,
7272 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7273 make that equivalence as well.
7275 However, BAR may have equivalences for which gen_lowpart_if_possible
7276 will produce a simpler value than gen_lowpart_if_possible applied to
7277 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7278 BAR's equivalences. If we don't get a simplified form, make
7279 the SUBREG. It will not be used in an equivalence, but will
7280 cause two similar assignments to be detected.
7282 Note the loop below will find SUBREG_REG (DEST) since we have
7283 already entered SRC and DEST of the SET in the table. */
7285 if (GET_CODE (dest) == SUBREG
7286 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7288 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7289 && (GET_MODE_SIZE (GET_MODE (dest))
7290 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7291 && sets[i].src_elt != 0)
7293 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7294 struct table_elt *elt, *classp = 0;
7296 for (elt = sets[i].src_elt->first_same_value; elt;
7297 elt = elt->next_same_value)
7301 struct table_elt *src_elt;
7303 /* Ignore invalid entries. */
7304 if (GET_CODE (elt->exp) != REG
7305 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7308 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7310 new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0);
7312 src_hash = HASH (new_src, new_mode);
7313 src_elt = lookup (new_src, src_hash, new_mode);
7315 /* Put the new source in the hash table is if isn't
7319 if (insert_regs (new_src, classp, 0))
7321 rehash_using_reg (new_src);
7322 src_hash = HASH (new_src, new_mode);
7324 src_elt = insert (new_src, classp, src_hash, new_mode);
7325 src_elt->in_memory = elt->in_memory;
7326 src_elt->in_struct = elt->in_struct;
7328 else if (classp && classp != src_elt->first_same_value)
7329 /* Show that two things that we've seen before are
7330 actually the same. */
7331 merge_equiv_classes (src_elt, classp);
7333 classp = src_elt->first_same_value;
7338 /* Special handling for (set REG0 REG1)
7339 where REG0 is the "cheapest", cheaper than REG1.
7340 After cse, REG1 will probably not be used in the sequel,
7341 so (if easily done) change this insn to (set REG1 REG0) and
7342 replace REG1 with REG0 in the previous insn that computed their value.
7343 Then REG1 will become a dead store and won't cloud the situation
7344 for later optimizations.
7346 Do not make this change if REG1 is a hard register, because it will
7347 then be used in the sequel and we may be changing a two-operand insn
7348 into a three-operand insn.
7350 Also do not do this if we are operating on a copy of INSN. */
7352 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7353 && NEXT_INSN (PREV_INSN (insn)) == insn
7354 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7355 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7356 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7357 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7358 == REGNO (SET_DEST (sets[0].rtl))))
7360 rtx prev = PREV_INSN (insn);
7361 while (prev && GET_CODE (prev) == NOTE)
7362 prev = PREV_INSN (prev);
7364 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7365 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7367 rtx dest = SET_DEST (sets[0].rtl);
7368 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7370 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7371 validate_change (insn, & SET_DEST (sets[0].rtl),
7372 SET_SRC (sets[0].rtl), 1);
7373 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7374 apply_change_group ();
7376 /* If REG1 was equivalent to a constant, REG0 is not. */
7378 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7380 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7381 any REG_WAS_0 note on INSN to PREV. */
7382 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7384 remove_note (prev, note);
7386 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7389 remove_note (insn, note);
7390 XEXP (note, 1) = REG_NOTES (prev);
7391 REG_NOTES (prev) = note;
7396 /* If this is a conditional jump insn, record any known equivalences due to
7397 the condition being tested. */
7399 last_jump_equiv_class = 0;
7400 if (GET_CODE (insn) == JUMP_INSN
7401 && n_sets == 1 && GET_CODE (x) == SET
7402 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7403 record_jump_equiv (insn, 0);
7406 /* If the previous insn set CC0 and this insn no longer references CC0,
7407 delete the previous insn. Here we use the fact that nothing expects CC0
7408 to be valid over an insn, which is true until the final pass. */
7409 if (prev_insn && GET_CODE (prev_insn) == INSN
7410 && (tem = single_set (prev_insn)) != 0
7411 && SET_DEST (tem) == cc0_rtx
7412 && ! reg_mentioned_p (cc0_rtx, x))
7414 PUT_CODE (prev_insn, NOTE);
7415 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7416 NOTE_SOURCE_FILE (prev_insn) = 0;
7419 prev_insn_cc0 = this_insn_cc0;
7420 prev_insn_cc0_mode = this_insn_cc0_mode;
7426 /* Store 1 in *WRITES_PTR for those categories of memory ref
7427 that must be invalidated when the expression WRITTEN is stored in.
7428 If WRITTEN is null, say everything must be invalidated. */
7431 note_mem_written (written, writes_ptr)
7433 struct write_data *writes_ptr;
7435 static struct write_data everything = {0, 1, 1, 1};
7438 *writes_ptr = everything;
7439 else if (GET_CODE (written) == MEM)
7441 /* Pushing or popping the stack invalidates just the stack pointer. */
7442 rtx addr = XEXP (written, 0);
7443 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7444 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7445 && GET_CODE (XEXP (addr, 0)) == REG
7446 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7451 else if (GET_MODE (written) == BLKmode)
7452 *writes_ptr = everything;
7453 /* (mem (scratch)) means clobber everything. */
7454 else if (GET_CODE (addr) == SCRATCH)
7455 *writes_ptr = everything;
7456 else if (cse_rtx_addr_varies_p (written))
7458 /* A varying address that is a sum indicates an array element,
7459 and that's just as good as a structure element
7460 in implying that we need not invalidate scalar variables.
7461 However, we must allow QImode aliasing of scalars, because the
7462 ANSI C standard allows character pointers to alias anything. */
7463 if (! ((MEM_IN_STRUCT_P (written)
7464 || GET_CODE (XEXP (written, 0)) == PLUS)
7465 && GET_MODE (written) != QImode))
7466 writes_ptr->all = 1;
7467 writes_ptr->nonscalar = 1;
7469 writes_ptr->var = 1;
7473 /* Perform invalidation on the basis of everything about an insn
7474 except for invalidating the actual places that are SET in it.
7475 This includes the places CLOBBERed, and anything that might
7476 alias with something that is SET or CLOBBERed.
7478 W points to the writes_memory for this insn, a struct write_data
7479 saying which kinds of memory references must be invalidated.
7480 X is the pattern of the insn. */
7483 invalidate_from_clobbers (w, x)
7484 struct write_data *w;
7487 /* If W->var is not set, W specifies no action.
7488 If W->all is set, this step gets all memory refs
7489 so they can be ignored in the rest of this function. */
7491 invalidate_memory (w);
7495 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7496 reg_tick[STACK_POINTER_REGNUM]++;
7498 /* This should be *very* rare. */
7499 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7500 invalidate (stack_pointer_rtx, VOIDmode);
7503 if (GET_CODE (x) == CLOBBER)
7505 rtx ref = XEXP (x, 0);
7508 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7509 || (GET_CODE (ref) == MEM && ! w->all))
7510 invalidate (ref, VOIDmode);
7511 else if (GET_CODE (ref) == STRICT_LOW_PART
7512 || GET_CODE (ref) == ZERO_EXTRACT)
7513 invalidate (XEXP (ref, 0), GET_MODE (ref));
7516 else if (GET_CODE (x) == PARALLEL)
7519 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7521 register rtx y = XVECEXP (x, 0, i);
7522 if (GET_CODE (y) == CLOBBER)
7524 rtx ref = XEXP (y, 0);
7527 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7528 || (GET_CODE (ref) == MEM && !w->all))
7529 invalidate (ref, VOIDmode);
7530 else if (GET_CODE (ref) == STRICT_LOW_PART
7531 || GET_CODE (ref) == ZERO_EXTRACT)
7532 invalidate (XEXP (ref, 0), GET_MODE (ref));
7539 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7540 and replace any registers in them with either an equivalent constant
7541 or the canonical form of the register. If we are inside an address,
7542 only do this if the address remains valid.
7544 OBJECT is 0 except when within a MEM in which case it is the MEM.
7546 Return the replacement for X. */
7549 cse_process_notes (x, object)
7553 enum rtx_code code = GET_CODE (x);
7554 char *fmt = GET_RTX_FORMAT (code);
7570 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7575 if (REG_NOTE_KIND (x) == REG_EQUAL)
7576 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7578 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7584 rtx new = cse_process_notes (XEXP (x, 0), object);
7585 /* We don't substitute VOIDmode constants into these rtx,
7586 since they would impede folding. */
7587 if (GET_MODE (new) != VOIDmode)
7588 validate_change (object, &XEXP (x, 0), new, 0);
7593 i = reg_qty[REGNO (x)];
7595 /* Return a constant or a constant register. */
7596 if (REGNO_QTY_VALID_P (REGNO (x))
7597 && qty_const[i] != 0
7598 && (CONSTANT_P (qty_const[i])
7599 || GET_CODE (qty_const[i]) == REG))
7601 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7606 /* Otherwise, canonicalize this register. */
7607 return canon_reg (x, NULL_RTX);
7610 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7612 validate_change (object, &XEXP (x, i),
7613 cse_process_notes (XEXP (x, i), object), 0);
7618 /* Find common subexpressions between the end test of a loop and the beginning
7619 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7621 Often we have a loop where an expression in the exit test is used
7622 in the body of the loop. For example "while (*p) *q++ = *p++;".
7623 Because of the way we duplicate the loop exit test in front of the loop,
7624 however, we don't detect that common subexpression. This will be caught
7625 when global cse is implemented, but this is a quite common case.
7627 This function handles the most common cases of these common expressions.
7628 It is called after we have processed the basic block ending with the
7629 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7630 jumps to a label used only once. */
7633 cse_around_loop (loop_start)
7638 struct table_elt *p;
7640 /* If the jump at the end of the loop doesn't go to the start, we don't
7642 for (insn = PREV_INSN (loop_start);
7643 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7644 insn = PREV_INSN (insn))
7648 || GET_CODE (insn) != NOTE
7649 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7652 /* If the last insn of the loop (the end test) was an NE comparison,
7653 we will interpret it as an EQ comparison, since we fell through
7654 the loop. Any equivalences resulting from that comparison are
7655 therefore not valid and must be invalidated. */
7656 if (last_jump_equiv_class)
7657 for (p = last_jump_equiv_class->first_same_value; p;
7658 p = p->next_same_value)
7659 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7660 || (GET_CODE (p->exp) == SUBREG
7661 && GET_CODE (SUBREG_REG (p->exp)) == REG))
7662 invalidate (p->exp, VOIDmode);
7663 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7664 || GET_CODE (p->exp) == ZERO_EXTRACT)
7665 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
7667 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7668 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7670 The only thing we do with SET_DEST is invalidate entries, so we
7671 can safely process each SET in order. It is slightly less efficient
7672 to do so, but we only want to handle the most common cases. */
7674 for (insn = NEXT_INSN (loop_start);
7675 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7676 && ! (GET_CODE (insn) == NOTE
7677 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7678 insn = NEXT_INSN (insn))
7680 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7681 && (GET_CODE (PATTERN (insn)) == SET
7682 || GET_CODE (PATTERN (insn)) == CLOBBER))
7683 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7684 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7685 && GET_CODE (PATTERN (insn)) == PARALLEL)
7686 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7687 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7688 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7689 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7694 /* Variable used for communications between the next two routines. */
7696 static struct write_data skipped_writes_memory;
7698 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7699 since they are done elsewhere. This function is called via note_stores. */
7702 invalidate_skipped_set (dest, set)
7706 if (GET_CODE (set) == CLOBBER
7713 if (GET_CODE (dest) == MEM)
7714 note_mem_written (dest, &skipped_writes_memory);
7716 /* There are times when an address can appear varying and be a PLUS
7717 during this scan when it would be a fixed address were we to know
7718 the proper equivalences. So promote "nonscalar" to be "all". */
7719 if (skipped_writes_memory.nonscalar)
7720 skipped_writes_memory.all = 1;
7722 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7723 || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
7724 invalidate (dest, VOIDmode);
7725 else if (GET_CODE (dest) == STRICT_LOW_PART
7726 || GET_CODE (dest) == ZERO_EXTRACT)
7727 invalidate (XEXP (dest, 0), GET_MODE (dest));
7730 /* Invalidate all insns from START up to the end of the function or the
7731 next label. This called when we wish to CSE around a block that is
7732 conditionally executed. */
7735 invalidate_skipped_block (start)
7739 static struct write_data init = {0, 0, 0, 0};
7740 static struct write_data everything = {0, 1, 1, 1};
7742 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7743 insn = NEXT_INSN (insn))
7745 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7748 skipped_writes_memory = init;
7750 if (GET_CODE (insn) == CALL_INSN)
7752 invalidate_for_call ();
7753 skipped_writes_memory = everything;
7756 note_stores (PATTERN (insn), invalidate_skipped_set);
7757 invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn));
7761 /* Used for communication between the following two routines; contains a
7762 value to be checked for modification. */
7764 static rtx cse_check_loop_start_value;
7766 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7767 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7770 cse_check_loop_start (x, set)
7774 if (cse_check_loop_start_value == 0
7775 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7778 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7779 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7780 cse_check_loop_start_value = 0;
7783 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7784 a loop that starts with the label at LOOP_START.
7786 If X is a SET, we see if its SET_SRC is currently in our hash table.
7787 If so, we see if it has a value equal to some register used only in the
7788 loop exit code (as marked by jump.c).
7790 If those two conditions are true, we search backwards from the start of
7791 the loop to see if that same value was loaded into a register that still
7792 retains its value at the start of the loop.
7794 If so, we insert an insn after the load to copy the destination of that
7795 load into the equivalent register and (try to) replace our SET_SRC with that
7798 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7801 cse_set_around_loop (x, insn, loop_start)
7806 struct table_elt *src_elt;
7807 static struct write_data init = {0, 0, 0, 0};
7808 struct write_data writes_memory;
7810 writes_memory = init;
7812 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7813 are setting PC or CC0 or whose SET_SRC is already a register. */
7814 if (GET_CODE (x) == SET
7815 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
7816 && GET_CODE (SET_SRC (x)) != REG)
7818 src_elt = lookup (SET_SRC (x),
7819 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
7820 GET_MODE (SET_DEST (x)));
7823 for (src_elt = src_elt->first_same_value; src_elt;
7824 src_elt = src_elt->next_same_value)
7825 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
7826 && COST (src_elt->exp) < COST (SET_SRC (x)))
7830 /* Look for an insn in front of LOOP_START that sets
7831 something in the desired mode to SET_SRC (x) before we hit
7832 a label or CALL_INSN. */
7834 for (p = prev_nonnote_insn (loop_start);
7835 p && GET_CODE (p) != CALL_INSN
7836 && GET_CODE (p) != CODE_LABEL;
7837 p = prev_nonnote_insn (p))
7838 if ((set = single_set (p)) != 0
7839 && GET_CODE (SET_DEST (set)) == REG
7840 && GET_MODE (SET_DEST (set)) == src_elt->mode
7841 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
7843 /* We now have to ensure that nothing between P
7844 and LOOP_START modified anything referenced in
7845 SET_SRC (x). We know that nothing within the loop
7846 can modify it, or we would have invalidated it in
7850 cse_check_loop_start_value = SET_SRC (x);
7851 for (q = p; q != loop_start; q = NEXT_INSN (q))
7852 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
7853 note_stores (PATTERN (q), cse_check_loop_start);
7855 /* If nothing was changed and we can replace our
7856 SET_SRC, add an insn after P to copy its destination
7857 to what we will be replacing SET_SRC with. */
7858 if (cse_check_loop_start_value
7859 && validate_change (insn, &SET_SRC (x),
7861 emit_insn_after (gen_move_insn (src_elt->exp,
7869 /* Now invalidate anything modified by X. */
7870 note_mem_written (SET_DEST (x), &writes_memory);
7872 if (writes_memory.var)
7873 invalidate_memory (&writes_memory);
7875 /* See comment on similar code in cse_insn for explanation of these tests. */
7876 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
7877 || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all
7878 && ! cse_rtx_addr_varies_p (SET_DEST (x))))
7879 invalidate (SET_DEST (x), VOIDmode);
7880 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
7881 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
7882 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
7885 /* Find the end of INSN's basic block and return its range,
7886 the total number of SETs in all the insns of the block, the last insn of the
7887 block, and the branch path.
7889 The branch path indicates which branches should be followed. If a non-zero
7890 path size is specified, the block should be rescanned and a different set
7891 of branches will be taken. The branch path is only used if
7892 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
7894 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7895 used to describe the block. It is filled in with the information about
7896 the current block. The incoming structure's branch path, if any, is used
7897 to construct the output branch path. */
7900 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
7902 struct cse_basic_block_data *data;
7909 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
7910 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
7911 int path_size = data->path_size;
7915 /* Update the previous branch path, if any. If the last branch was
7916 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7917 shorten the path by one and look at the previous branch. We know that
7918 at least one branch must have been taken if PATH_SIZE is non-zero. */
7919 while (path_size > 0)
7921 if (data->path[path_size - 1].status != NOT_TAKEN)
7923 data->path[path_size - 1].status = NOT_TAKEN;
7930 /* Scan to end of this basic block. */
7931 while (p && GET_CODE (p) != CODE_LABEL)
7933 /* Don't cse out the end of a loop. This makes a difference
7934 only for the unusual loops that always execute at least once;
7935 all other loops have labels there so we will stop in any case.
7936 Cse'ing out the end of the loop is dangerous because it
7937 might cause an invariant expression inside the loop
7938 to be reused after the end of the loop. This would make it
7939 hard to move the expression out of the loop in loop.c,
7940 especially if it is one of several equivalent expressions
7941 and loop.c would like to eliminate it.
7943 If we are running after loop.c has finished, we can ignore
7944 the NOTE_INSN_LOOP_END. */
7946 if (! after_loop && GET_CODE (p) == NOTE
7947 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
7950 /* Don't cse over a call to setjmp; on some machines (eg vax)
7951 the regs restored by the longjmp come from
7952 a later time than the setjmp. */
7953 if (GET_CODE (p) == NOTE
7954 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
7957 /* A PARALLEL can have lots of SETs in it,
7958 especially if it is really an ASM_OPERANDS. */
7959 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
7960 && GET_CODE (PATTERN (p)) == PARALLEL)
7961 nsets += XVECLEN (PATTERN (p), 0);
7962 else if (GET_CODE (p) != NOTE)
7965 /* Ignore insns made by CSE; they cannot affect the boundaries of
7968 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
7969 high_cuid = INSN_CUID (p);
7970 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
7971 low_cuid = INSN_CUID (p);
7973 /* See if this insn is in our branch path. If it is and we are to
7975 if (path_entry < path_size && data->path[path_entry].branch == p)
7977 if (data->path[path_entry].status != NOT_TAKEN)
7980 /* Point to next entry in path, if any. */
7984 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7985 was specified, we haven't reached our maximum path length, there are
7986 insns following the target of the jump, this is the only use of the
7987 jump label, and the target label is preceded by a BARRIER.
7989 Alternatively, we can follow the jump if it branches around a
7990 block of code and there are no other branches into the block.
7991 In this case invalidate_skipped_block will be called to invalidate any
7992 registers set in the block when following the jump. */
7994 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
7995 && GET_CODE (p) == JUMP_INSN
7996 && GET_CODE (PATTERN (p)) == SET
7997 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
7998 && LABEL_NUSES (JUMP_LABEL (p)) == 1
7999 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8001 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8002 if ((GET_CODE (q) != NOTE
8003 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8004 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8005 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8008 /* If we ran into a BARRIER, this code is an extension of the
8009 basic block when the branch is taken. */
8010 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8012 /* Don't allow ourself to keep walking around an
8013 always-executed loop. */
8014 if (next_real_insn (q) == next)
8020 /* Similarly, don't put a branch in our path more than once. */
8021 for (i = 0; i < path_entry; i++)
8022 if (data->path[i].branch == p)
8025 if (i != path_entry)
8028 data->path[path_entry].branch = p;
8029 data->path[path_entry++].status = TAKEN;
8031 /* This branch now ends our path. It was possible that we
8032 didn't see this branch the last time around (when the
8033 insn in front of the target was a JUMP_INSN that was
8034 turned into a no-op). */
8035 path_size = path_entry;
8038 /* Mark block so we won't scan it again later. */
8039 PUT_MODE (NEXT_INSN (p), QImode);
8041 /* Detect a branch around a block of code. */
8042 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8046 if (next_real_insn (q) == next)
8052 for (i = 0; i < path_entry; i++)
8053 if (data->path[i].branch == p)
8056 if (i != path_entry)
8059 /* This is no_labels_between_p (p, q) with an added check for
8060 reaching the end of a function (in case Q precedes P). */
8061 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8062 if (GET_CODE (tmp) == CODE_LABEL)
8067 data->path[path_entry].branch = p;
8068 data->path[path_entry++].status = AROUND;
8070 path_size = path_entry;
8073 /* Mark block so we won't scan it again later. */
8074 PUT_MODE (NEXT_INSN (p), QImode);
8081 data->low_cuid = low_cuid;
8082 data->high_cuid = high_cuid;
8083 data->nsets = nsets;
8086 /* If all jumps in the path are not taken, set our path length to zero
8087 so a rescan won't be done. */
8088 for (i = path_size - 1; i >= 0; i--)
8089 if (data->path[i].status != NOT_TAKEN)
8093 data->path_size = 0;
8095 data->path_size = path_size;
8097 /* End the current branch path. */
8098 data->path[path_size].branch = 0;
8101 /* Perform cse on the instructions of a function.
8102 F is the first instruction.
8103 NREGS is one plus the highest pseudo-reg number used in the instruction.
8105 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8106 (only if -frerun-cse-after-loop).
8108 Returns 1 if jump_optimize should be redone due to simplifications
8109 in conditional jump instructions. */
8112 cse_main (f, nregs, after_loop, file)
8118 struct cse_basic_block_data val;
8119 register rtx insn = f;
8122 cse_jumps_altered = 0;
8123 constant_pool_entries_cost = 0;
8130 all_minus_one = (int *) alloca (nregs * sizeof (int));
8131 consec_ints = (int *) alloca (nregs * sizeof (int));
8133 for (i = 0; i < nregs; i++)
8135 all_minus_one[i] = -1;
8139 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8140 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8141 reg_qty = (int *) alloca (nregs * sizeof (int));
8142 reg_in_table = (int *) alloca (nregs * sizeof (int));
8143 reg_tick = (int *) alloca (nregs * sizeof (int));
8145 #ifdef LOAD_EXTEND_OP
8147 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8148 and change the code and mode as appropriate. */
8149 memory_extend_rtx = gen_rtx (ZERO_EXTEND, VOIDmode, 0);
8152 /* Discard all the free elements of the previous function
8153 since they are allocated in the temporarily obstack. */
8154 bzero ((char *) table, sizeof table);
8155 free_element_chain = 0;
8156 n_elements_made = 0;
8158 /* Find the largest uid. */
8160 max_uid = get_max_uid ();
8161 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8162 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8164 /* Compute the mapping from uids to cuids.
8165 CUIDs are numbers assigned to insns, like uids,
8166 except that cuids increase monotonically through the code.
8167 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8168 between two insns is not affected by -g. */
8170 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8172 if (GET_CODE (insn) != NOTE
8173 || NOTE_LINE_NUMBER (insn) < 0)
8174 INSN_CUID (insn) = ++i;
8176 /* Give a line number note the same cuid as preceding insn. */
8177 INSN_CUID (insn) = i;
8180 /* Initialize which registers are clobbered by calls. */
8182 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8184 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8185 if ((call_used_regs[i]
8186 /* Used to check !fixed_regs[i] here, but that isn't safe;
8187 fixed regs are still call-clobbered, and sched can get
8188 confused if they can "live across calls".
8190 The frame pointer is always preserved across calls. The arg
8191 pointer is if it is fixed. The stack pointer usually is, unless
8192 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8193 will be present. If we are generating PIC code, the PIC offset
8194 table register is preserved across calls. */
8196 && i != STACK_POINTER_REGNUM
8197 && i != FRAME_POINTER_REGNUM
8198 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8199 && i != HARD_FRAME_POINTER_REGNUM
8201 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8202 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8204 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8205 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8209 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8211 /* Loop over basic blocks.
8212 Compute the maximum number of qty's needed for each basic block
8213 (which is 2 for each SET). */
8217 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8218 flag_cse_skip_blocks);
8220 /* If this basic block was already processed or has no sets, skip it. */
8221 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8223 PUT_MODE (insn, VOIDmode);
8224 insn = (val.last ? NEXT_INSN (val.last) : 0);
8229 cse_basic_block_start = val.low_cuid;
8230 cse_basic_block_end = val.high_cuid;
8231 max_qty = val.nsets * 2;
8234 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
8235 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8238 /* Make MAX_QTY bigger to give us room to optimize
8239 past the end of this basic block, if that should prove useful. */
8245 /* If this basic block is being extended by following certain jumps,
8246 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8247 Otherwise, we start after this basic block. */
8248 if (val.path_size > 0)
8249 cse_basic_block (insn, val.last, val.path, 0);
8252 int old_cse_jumps_altered = cse_jumps_altered;
8255 /* When cse changes a conditional jump to an unconditional
8256 jump, we want to reprocess the block, since it will give
8257 us a new branch path to investigate. */
8258 cse_jumps_altered = 0;
8259 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8260 if (cse_jumps_altered == 0
8261 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8264 cse_jumps_altered |= old_cse_jumps_altered;
8272 /* Tell refers_to_mem_p that qty_const info is not available. */
8275 if (max_elements_made < n_elements_made)
8276 max_elements_made = n_elements_made;
8278 return cse_jumps_altered;
8281 /* Process a single basic block. FROM and TO and the limits of the basic
8282 block. NEXT_BRANCH points to the branch path when following jumps or
8283 a null path when not following jumps.
8285 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8286 loop. This is true when we are being called for the last time on a
8287 block and this CSE pass is before loop.c. */
8290 cse_basic_block (from, to, next_branch, around_loop)
8291 register rtx from, to;
8292 struct branch_path *next_branch;
8297 int in_libcall_block = 0;
8299 /* Each of these arrays is undefined before max_reg, so only allocate
8300 the space actually needed and adjust the start below. */
8302 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8303 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8304 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8305 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8306 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8308 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8309 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8310 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8312 qty_first_reg -= max_reg;
8313 qty_last_reg -= max_reg;
8314 qty_mode -= max_reg;
8315 qty_const -= max_reg;
8316 qty_const_insn -= max_reg;
8317 qty_comparison_code -= max_reg;
8318 qty_comparison_qty -= max_reg;
8319 qty_comparison_const -= max_reg;
8323 /* TO might be a label. If so, protect it from being deleted. */
8324 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8327 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8329 register enum rtx_code code;
8331 /* See if this is a branch that is part of the path. If so, and it is
8332 to be taken, do so. */
8333 if (next_branch->branch == insn)
8335 enum taken status = next_branch++->status;
8336 if (status != NOT_TAKEN)
8338 if (status == TAKEN)
8339 record_jump_equiv (insn, 1);
8341 invalidate_skipped_block (NEXT_INSN (insn));
8343 /* Set the last insn as the jump insn; it doesn't affect cc0.
8344 Then follow this branch. */
8349 insn = JUMP_LABEL (insn);
8354 code = GET_CODE (insn);
8355 if (GET_MODE (insn) == QImode)
8356 PUT_MODE (insn, VOIDmode);
8358 if (GET_RTX_CLASS (code) == 'i')
8360 /* Process notes first so we have all notes in canonical forms when
8361 looking for duplicate operations. */
8363 if (REG_NOTES (insn))
8364 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8366 /* Track when we are inside in LIBCALL block. Inside such a block,
8367 we do not want to record destinations. The last insn of a
8368 LIBCALL block is not considered to be part of the block, since
8369 its destination is the result of the block and hence should be
8372 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
8373 in_libcall_block = 1;
8374 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8375 in_libcall_block = 0;
8377 cse_insn (insn, in_libcall_block);
8380 /* If INSN is now an unconditional jump, skip to the end of our
8381 basic block by pretending that we just did the last insn in the
8382 basic block. If we are jumping to the end of our block, show
8383 that we can have one usage of TO. */
8385 if (simplejump_p (insn))
8390 if (JUMP_LABEL (insn) == to)
8393 /* Maybe TO was deleted because the jump is unconditional.
8394 If so, there is nothing left in this basic block. */
8395 /* ??? Perhaps it would be smarter to set TO
8396 to whatever follows this insn,
8397 and pretend the basic block had always ended here. */
8398 if (INSN_DELETED_P (to))
8401 insn = PREV_INSN (to);
8404 /* See if it is ok to keep on going past the label
8405 which used to end our basic block. Remember that we incremented
8406 the count of that label, so we decrement it here. If we made
8407 a jump unconditional, TO_USAGE will be one; in that case, we don't
8408 want to count the use in that jump. */
8410 if (to != 0 && NEXT_INSN (insn) == to
8411 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8413 struct cse_basic_block_data val;
8415 insn = NEXT_INSN (to);
8417 if (LABEL_NUSES (to) == 0)
8420 /* Find the end of the following block. Note that we won't be
8421 following branches in this case. If TO was the last insn
8422 in the function, we are done. Similarly, if we deleted the
8423 insn after TO, it must have been because it was preceded by
8424 a BARRIER. In that case, we are done with this block because it
8425 has no continuation. */
8427 if (insn == 0 || INSN_DELETED_P (insn))
8432 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8434 /* If the tables we allocated have enough space left
8435 to handle all the SETs in the next basic block,
8436 continue through it. Otherwise, return,
8437 and that block will be scanned individually. */
8438 if (val.nsets * 2 + next_qty > max_qty)
8441 cse_basic_block_start = val.low_cuid;
8442 cse_basic_block_end = val.high_cuid;
8445 /* Prevent TO from being deleted if it is a label. */
8446 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8449 /* Back up so we process the first insn in the extension. */
8450 insn = PREV_INSN (insn);
8454 if (next_qty > max_qty)
8457 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8458 the previous insn is the only insn that branches to the head of a loop,
8459 we can cse into the loop. Don't do this if we changed the jump
8460 structure of a loop unless we aren't going to be following jumps. */
8462 if ((cse_jumps_altered == 0
8463 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8464 && around_loop && to != 0
8465 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8466 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8467 && JUMP_LABEL (PREV_INSN (to)) != 0
8468 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8469 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8471 return to ? NEXT_INSN (to) : 0;
8474 /* Count the number of times registers are used (not set) in X.
8475 COUNTS is an array in which we accumulate the count, INCR is how much
8476 we count each register usage.
8478 Don't count a usage of DEST, which is the SET_DEST of a SET which
8479 contains X in its SET_SRC. This is because such a SET does not
8480 modify the liveness of DEST. */
8483 count_reg_usage (x, counts, dest, incr)
8496 switch (code = GET_CODE (x))
8500 counts[REGNO (x)] += incr;
8514 /* Unless we are setting a REG, count everything in SET_DEST. */
8515 if (GET_CODE (SET_DEST (x)) != REG)
8516 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8518 /* If SRC has side-effects, then we can't delete this insn, so the
8519 usage of SET_DEST inside SRC counts.
8521 ??? Strictly-speaking, we might be preserving this insn
8522 because some other SET has side-effects, but that's hard
8523 to do and can't happen now. */
8524 count_reg_usage (SET_SRC (x), counts,
8525 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8530 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8532 /* ... falls through ... */
8535 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8537 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8540 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
8545 if (REG_NOTE_KIND (x) == REG_EQUAL
8546 || GET_CODE (XEXP (x,0)) == USE)
8547 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
8548 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
8552 fmt = GET_RTX_FORMAT (code);
8553 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8556 count_reg_usage (XEXP (x, i), counts, dest, incr);
8557 else if (fmt[i] == 'E')
8558 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8559 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
8563 /* Scan all the insns and delete any that are dead; i.e., they store a register
8564 that is never used or they copy a register to itself.
8566 This is used to remove insns made obviously dead by cse. It improves the
8567 heuristics in loop since it won't try to move dead invariants out of loops
8568 or make givs for dead quantities. The remaining passes of the compilation
8569 are also sped up. */
8572 delete_dead_from_cse (insns, nreg)
8576 int *counts = (int *) alloca (nreg * sizeof (int));
8582 /* First count the number of times each register is used. */
8583 bzero ((char *) counts, sizeof (int) * nreg);
8584 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8585 count_reg_usage (insn, counts, NULL_RTX, 1);
8587 /* Go from the last insn to the first and delete insns that only set unused
8588 registers or copy a register to itself. As we delete an insn, remove
8589 usage counts for registers it uses. */
8590 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8594 prev = prev_real_insn (insn);
8596 /* Don't delete any insns that are part of a libcall block.
8597 Flow or loop might get confused if we did that. Remember
8598 that we are scanning backwards. */
8599 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8604 else if (GET_CODE (PATTERN (insn)) == SET)
8606 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8607 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8611 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8612 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8613 && ((tem = next_nonnote_insn (insn)) == 0
8614 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8615 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8618 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8619 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8620 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8621 || side_effects_p (SET_SRC (PATTERN (insn))))
8624 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8625 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8627 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8629 if (GET_CODE (elt) == SET)
8631 if (GET_CODE (SET_DEST (elt)) == REG
8632 && SET_DEST (elt) == SET_SRC (elt))
8636 else if (GET_CODE (SET_DEST (elt)) == CC0
8637 && ! side_effects_p (SET_SRC (elt))
8638 && ((tem = next_nonnote_insn (insn)) == 0
8639 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8640 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8643 else if (GET_CODE (SET_DEST (elt)) != REG
8644 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8645 || counts[REGNO (SET_DEST (elt))] != 0
8646 || side_effects_p (SET_SRC (elt)))
8649 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8655 /* If this is a dead insn, delete it and show registers in it aren't
8660 count_reg_usage (insn, counts, NULL_RTX, -1);
8664 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))