1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* stdio.h must precede rtl.h for FFS. */
29 #include "hard-reg-set.h"
32 #include "insn-config.h"
38 /* The basic idea of common subexpression elimination is to go
39 through the code, keeping a record of expressions that would
40 have the same value at the current scan point, and replacing
41 expressions encountered with the cheapest equivalent expression.
43 It is too complicated to keep track of the different possibilities
44 when control paths merge; so, at each label, we forget all that is
45 known and start fresh. This can be described as processing each
46 basic block separately. Note, however, that these are not quite
47 the same as the basic blocks found by a later pass and used for
48 data flow analysis and register packing. We do not need to start fresh
49 after a conditional jump instruction if there is no label there.
51 We use two data structures to record the equivalent expressions:
52 a hash table for most expressions, and several vectors together
53 with "quantity numbers" to record equivalent (pseudo) registers.
55 The use of the special data structure for registers is desirable
56 because it is faster. It is possible because registers references
57 contain a fairly small number, the register number, taken from
58 a contiguously allocated series, and two register references are
59 identical if they have the same number. General expressions
60 do not have any such thing, so the only way to retrieve the
61 information recorded on an expression other than a register
62 is to keep it in a hash table.
64 Registers and "quantity numbers":
66 At the start of each basic block, all of the (hardware and pseudo)
67 registers used in the function are given distinct quantity
68 numbers to indicate their contents. During scan, when the code
69 copies one register into another, we copy the quantity number.
70 When a register is loaded in any other way, we allocate a new
71 quantity number to describe the value generated by this operation.
72 `reg_qty' records what quantity a register is currently thought
75 All real quantity numbers are greater than or equal to `max_reg'.
76 If register N has not been assigned a quantity, reg_qty[N] will equal N.
78 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
79 variables should be referenced with an index below `max_reg'.
81 We also maintain a bidirectional chain of registers for each
82 quantity number. `qty_first_reg', `qty_last_reg',
83 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
85 The first register in a chain is the one whose lifespan is least local.
86 Among equals, it is the one that was seen first.
87 We replace any equivalent register with that one.
89 If two registers have the same quantity number, it must be true that
90 REG expressions with `qty_mode' must be in the hash table for both
91 registers and must be in the same class.
93 The converse is not true. Since hard registers may be referenced in
94 any mode, two REG expressions might be equivalent in the hash table
95 but not have the same quantity number if the quantity number of one
96 of the registers is not the same mode as those expressions.
98 Constants and quantity numbers
100 When a quantity has a known constant value, that value is stored
101 in the appropriate element of qty_const. This is in addition to
102 putting the constant in the hash table as is usual for non-regs.
104 Whether a reg or a constant is preferred is determined by the configuration
105 macro CONST_COSTS and will often depend on the constant value. In any
106 event, expressions containing constants can be simplified, by fold_rtx.
108 When a quantity has a known nearly constant value (such as an address
109 of a stack slot), that value is stored in the appropriate element
112 Integer constants don't have a machine mode. However, cse
113 determines the intended machine mode from the destination
114 of the instruction that moves the constant. The machine mode
115 is recorded in the hash table along with the actual RTL
116 constant expression so that different modes are kept separate.
120 To record known equivalences among expressions in general
121 we use a hash table called `table'. It has a fixed number of buckets
122 that contain chains of `struct table_elt' elements for expressions.
123 These chains connect the elements whose expressions have the same
126 Other chains through the same elements connect the elements which
127 currently have equivalent values.
129 Register references in an expression are canonicalized before hashing
130 the expression. This is done using `reg_qty' and `qty_first_reg'.
131 The hash code of a register reference is computed using the quantity
132 number, not the register number.
134 When the value of an expression changes, it is necessary to remove from the
135 hash table not just that expression but all expressions whose values
136 could be different as a result.
138 1. If the value changing is in memory, except in special cases
139 ANYTHING referring to memory could be changed. That is because
140 nobody knows where a pointer does not point.
141 The function `invalidate_memory' removes what is necessary.
143 The special cases are when the address is constant or is
144 a constant plus a fixed register such as the frame pointer
145 or a static chain pointer. When such addresses are stored in,
146 we can tell exactly which other such addresses must be invalidated
147 due to overlap. `invalidate' does this.
148 All expressions that refer to non-constant
149 memory addresses are also invalidated. `invalidate_memory' does this.
151 2. If the value changing is a register, all expressions
152 containing references to that register, and only those,
155 Because searching the entire hash table for expressions that contain
156 a register is very slow, we try to figure out when it isn't necessary.
157 Precisely, this is necessary only when expressions have been
158 entered in the hash table using this register, and then the value has
159 changed, and then another expression wants to be added to refer to
160 the register's new value. This sequence of circumstances is rare
161 within any one basic block.
163 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
164 reg_tick[i] is incremented whenever a value is stored in register i.
165 reg_in_table[i] holds -1 if no references to register i have been
166 entered in the table; otherwise, it contains the value reg_tick[i] had
167 when the references were entered. If we want to enter a reference
168 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
169 Until we want to enter a new entry, the mere fact that the two vectors
170 don't match makes the entries be ignored if anyone tries to match them.
172 Registers themselves are entered in the hash table as well as in
173 the equivalent-register chains. However, the vectors `reg_tick'
174 and `reg_in_table' do not apply to expressions which are simple
175 register references. These expressions are removed from the table
176 immediately when they become invalid, and this can be done even if
177 we do not immediately search for all the expressions that refer to
180 A CLOBBER rtx in an instruction invalidates its operand for further
181 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
182 invalidates everything that resides in memory.
186 Constant expressions that differ only by an additive integer
187 are called related. When a constant expression is put in
188 the table, the related expression with no constant term
189 is also entered. These are made to point at each other
190 so that it is possible to find out if there exists any
191 register equivalent to an expression related to a given expression. */
193 /* One plus largest register number used in this function. */
197 /* One plus largest instruction UID used in this function at time of
200 static int max_insn_uid;
202 /* Length of vectors indexed by quantity number.
203 We know in advance we will not need a quantity number this big. */
207 /* Next quantity number to be allocated.
208 This is 1 + the largest number needed so far. */
212 /* Indexed by quantity number, gives the first (or last) register
213 in the chain of registers that currently contain this quantity. */
215 static int *qty_first_reg;
216 static int *qty_last_reg;
218 /* Index by quantity number, gives the mode of the quantity. */
220 static enum machine_mode *qty_mode;
222 /* Indexed by quantity number, gives the rtx of the constant value of the
223 quantity, or zero if it does not have a known value.
224 A sum of the frame pointer (or arg pointer) plus a constant
225 can also be entered here. */
227 static rtx *qty_const;
229 /* Indexed by qty number, gives the insn that stored the constant value
230 recorded in `qty_const'. */
232 static rtx *qty_const_insn;
234 /* The next three variables are used to track when a comparison between a
235 quantity and some constant or register has been passed. In that case, we
236 know the results of the comparison in case we see it again. These variables
237 record a comparison that is known to be true. */
239 /* Indexed by qty number, gives the rtx code of a comparison with a known
240 result involving this quantity. If none, it is UNKNOWN. */
241 static enum rtx_code *qty_comparison_code;
243 /* Indexed by qty number, gives the constant being compared against in a
244 comparison of known result. If no such comparison, it is undefined.
245 If the comparison is not with a constant, it is zero. */
247 static rtx *qty_comparison_const;
249 /* Indexed by qty number, gives the quantity being compared against in a
250 comparison of known result. If no such comparison, if it undefined.
251 If the comparison is not with a register, it is -1. */
253 static int *qty_comparison_qty;
256 /* For machines that have a CC0, we do not record its value in the hash
257 table since its use is guaranteed to be the insn immediately following
258 its definition and any other insn is presumed to invalidate it.
260 Instead, we store below the value last assigned to CC0. If it should
261 happen to be a constant, it is stored in preference to the actual
262 assigned value. In case it is a constant, we store the mode in which
263 the constant should be interpreted. */
265 static rtx prev_insn_cc0;
266 static enum machine_mode prev_insn_cc0_mode;
269 /* Previous actual insn. 0 if at first insn of basic block. */
271 static rtx prev_insn;
273 /* Insn being scanned. */
275 static rtx this_insn;
277 /* Index by register number, gives the quantity number
278 of the register's current contents. */
282 /* Index by register number, gives the number of the next (or
283 previous) register in the chain of registers sharing the same
286 Or -1 if this register is at the end of the chain.
288 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
290 static int *reg_next_eqv;
291 static int *reg_prev_eqv;
293 /* Index by register number, gives the number of times
294 that register has been altered in the current basic block. */
296 static int *reg_tick;
298 /* Index by register number, gives the reg_tick value at which
299 rtx's containing this register are valid in the hash table.
300 If this does not equal the current reg_tick value, such expressions
301 existing in the hash table are invalid.
302 If this is -1, no expressions containing this register have been
303 entered in the table. */
305 static int *reg_in_table;
307 /* A HARD_REG_SET containing all the hard registers for which there is
308 currently a REG expression in the hash table. Note the difference
309 from the above variables, which indicate if the REG is mentioned in some
310 expression in the table. */
312 static HARD_REG_SET hard_regs_in_table;
314 /* A HARD_REG_SET containing all the hard registers that are invalidated
317 static HARD_REG_SET regs_invalidated_by_call;
319 /* Two vectors of ints:
320 one containing max_reg -1's; the other max_reg + 500 (an approximation
321 for max_qty) elements where element i contains i.
322 These are used to initialize various other vectors fast. */
324 static int *all_minus_one;
325 static int *consec_ints;
327 /* CUID of insn that starts the basic block currently being cse-processed. */
329 static int cse_basic_block_start;
331 /* CUID of insn that ends the basic block currently being cse-processed. */
333 static int cse_basic_block_end;
335 /* Vector mapping INSN_UIDs to cuids.
336 The cuids are like uids but increase monotonically always.
337 We use them to see whether a reg is used outside a given basic block. */
339 static int *uid_cuid;
341 /* Highest UID in UID_CUID. */
344 /* Get the cuid of an insn. */
346 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
348 /* Nonzero if cse has altered conditional jump insns
349 in such a way that jump optimization should be redone. */
351 static int cse_jumps_altered;
353 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
354 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
355 to put in the note. */
356 static int recorded_label_ref;
358 /* canon_hash stores 1 in do_not_record
359 if it notices a reference to CC0, PC, or some other volatile
362 static int do_not_record;
364 #ifdef LOAD_EXTEND_OP
366 /* Scratch rtl used when looking for load-extended copy of a MEM. */
367 static rtx memory_extend_rtx;
370 /* canon_hash stores 1 in hash_arg_in_memory
371 if it notices a reference to memory within the expression being hashed. */
373 static int hash_arg_in_memory;
375 /* canon_hash stores 1 in hash_arg_in_struct
376 if it notices a reference to memory that's part of a structure. */
378 static int hash_arg_in_struct;
380 /* The hash table contains buckets which are chains of `struct table_elt's,
381 each recording one expression's information.
382 That expression is in the `exp' field.
384 Those elements with the same hash code are chained in both directions
385 through the `next_same_hash' and `prev_same_hash' fields.
387 Each set of expressions with equivalent values
388 are on a two-way chain through the `next_same_value'
389 and `prev_same_value' fields, and all point with
390 the `first_same_value' field at the first element in
391 that chain. The chain is in order of increasing cost.
392 Each element's cost value is in its `cost' field.
394 The `in_memory' field is nonzero for elements that
395 involve any reference to memory. These elements are removed
396 whenever a write is done to an unidentified location in memory.
397 To be safe, we assume that a memory address is unidentified unless
398 the address is either a symbol constant or a constant plus
399 the frame pointer or argument pointer.
401 The `in_struct' field is nonzero for elements that
402 involve any reference to memory inside a structure or array.
404 The `related_value' field is used to connect related expressions
405 (that differ by adding an integer).
406 The related expressions are chained in a circular fashion.
407 `related_value' is zero for expressions for which this
410 The `cost' field stores the cost of this element's expression.
412 The `is_const' flag is set if the element is a constant (including
415 The `flag' field is used as a temporary during some search routines.
417 The `mode' field is usually the same as GET_MODE (`exp'), but
418 if `exp' is a CONST_INT and has no machine mode then the `mode'
419 field is the mode it was being used as. Each constant is
420 recorded separately for each mode it is used with. */
426 struct table_elt *next_same_hash;
427 struct table_elt *prev_same_hash;
428 struct table_elt *next_same_value;
429 struct table_elt *prev_same_value;
430 struct table_elt *first_same_value;
431 struct table_elt *related_value;
433 enum machine_mode mode;
440 /* We don't want a lot of buckets, because we rarely have very many
441 things stored in the hash table, and a lot of buckets slows
442 down a lot of loops that happen frequently. */
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
451 : canon_hash (X, M) % NBUCKETS)
453 /* Determine whether register number N is considered a fixed register for CSE.
454 It is desirable to replace other regs with fixed regs, to reduce need for
456 A reg wins if it is either the frame pointer or designated as fixed,
457 but not if it is an overlapping register. */
458 #ifdef OVERLAPPING_REGNO_P
459 #define FIXED_REGNO_P(N) \
460 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
461 || fixed_regs[N] || global_regs[N]) \
462 && ! OVERLAPPING_REGNO_P ((N)))
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
469 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
470 hard registers and pointers into the frame are the cheapest with a cost
471 of 0. Next come pseudos with a cost of one and other hard registers with
472 a cost of 2. Aside from these special cases, call `rtx_cost'. */
474 #define CHEAP_REGNO(N) \
475 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
476 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
477 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
478 || ((N) < FIRST_PSEUDO_REGISTER \
479 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
481 /* A register is cheap if it is a user variable assigned to the register
482 or if its register number always corresponds to a cheap register. */
484 #define CHEAP_REG(N) \
485 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
486 || CHEAP_REGNO (REGNO (N)))
489 (GET_CODE (X) == REG \
490 ? (CHEAP_REG (X) ? 0 \
491 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
495 /* Determine if the quantity number for register X represents a valid index
496 into the `qty_...' variables. */
498 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
500 static struct table_elt *table[NBUCKETS];
502 /* Chain of `struct table_elt's made so far for this function
503 but currently removed from the table. */
505 static struct table_elt *free_element_chain;
507 /* Number of `struct table_elt' structures made so far for this function. */
509 static int n_elements_made;
511 /* Maximum value `n_elements_made' has had so far in this compilation
512 for functions previously processed. */
514 static int max_elements_made;
516 /* Surviving equivalence class when two equivalence classes are merged
517 by recording the effects of a jump in the last insn. Zero if the
518 last insn was not a conditional jump. */
520 static struct table_elt *last_jump_equiv_class;
522 /* Set to the cost of a constant pool reference if one was found for a
523 symbolic constant. If this was found, it means we should try to
524 convert constants into constant pool entries if they don't fit in
527 static int constant_pool_entries_cost;
529 /* Define maximum length of a branch path. */
531 #define PATHLENGTH 10
533 /* This data describes a block that will be processed by cse_basic_block. */
535 struct cse_basic_block_data {
536 /* Lowest CUID value of insns in block. */
538 /* Highest CUID value of insns in block. */
540 /* Total number of SETs in block. */
542 /* Last insn in the block. */
544 /* Size of current branch path, if any. */
546 /* Current branch path, indicating which branches will be taken. */
548 /* The branch insn. */
550 /* Whether it should be taken or not. AROUND is the same as taken
551 except that it is used when the destination label is not preceded
553 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
557 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
558 virtual regs here because the simplify_*_operation routines are called
559 by integrate.c, which is called before virtual register instantiation. */
561 #define FIXED_BASE_PLUS_P(X) \
562 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
563 || (X) == arg_pointer_rtx \
564 || (X) == virtual_stack_vars_rtx \
565 || (X) == virtual_incoming_args_rtx \
566 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
567 && (XEXP (X, 0) == frame_pointer_rtx \
568 || XEXP (X, 0) == hard_frame_pointer_rtx \
569 || XEXP (X, 0) == arg_pointer_rtx \
570 || XEXP (X, 0) == virtual_stack_vars_rtx \
571 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
572 || GET_CODE (X) == ADDRESSOF)
574 /* Similar, but also allows reference to the stack pointer.
576 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
577 arg_pointer_rtx by itself is nonzero, because on at least one machine,
578 the i960, the arg pointer is zero when it is unused. */
580 #define NONZERO_BASE_PLUS_P(X) \
581 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
582 || (X) == virtual_stack_vars_rtx \
583 || (X) == virtual_incoming_args_rtx \
584 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
585 && (XEXP (X, 0) == frame_pointer_rtx \
586 || XEXP (X, 0) == hard_frame_pointer_rtx \
587 || XEXP (X, 0) == arg_pointer_rtx \
588 || XEXP (X, 0) == virtual_stack_vars_rtx \
589 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
590 || (X) == stack_pointer_rtx \
591 || (X) == virtual_stack_dynamic_rtx \
592 || (X) == virtual_outgoing_args_rtx \
593 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
594 && (XEXP (X, 0) == stack_pointer_rtx \
595 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
596 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
597 || GET_CODE (X) == ADDRESSOF)
599 static int notreg_cost PROTO((rtx));
600 static void new_basic_block PROTO((void));
601 static void make_new_qty PROTO((int));
602 static void make_regs_eqv PROTO((int, int));
603 static void delete_reg_equiv PROTO((int));
604 static int mention_regs PROTO((rtx));
605 static int insert_regs PROTO((rtx, struct table_elt *, int));
606 static void free_element PROTO((struct table_elt *));
607 static void remove_from_table PROTO((struct table_elt *, unsigned));
608 static struct table_elt *get_element PROTO((void));
609 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
610 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
611 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
612 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
614 static void merge_equiv_classes PROTO((struct table_elt *,
615 struct table_elt *));
616 static void invalidate PROTO((rtx, enum machine_mode));
617 static int cse_rtx_varies_p PROTO((rtx));
618 static void remove_invalid_refs PROTO((int));
619 static void rehash_using_reg PROTO((rtx));
620 static void invalidate_memory PROTO((void));
621 static void invalidate_for_call PROTO((void));
622 static rtx use_related_value PROTO((rtx, struct table_elt *));
623 static unsigned canon_hash PROTO((rtx, enum machine_mode));
624 static unsigned safe_hash PROTO((rtx, enum machine_mode));
625 static int exp_equiv_p PROTO((rtx, rtx, int, int));
626 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
629 static int refers_to_p PROTO((rtx, rtx));
630 static rtx canon_reg PROTO((rtx, rtx));
631 static void find_best_addr PROTO((rtx, rtx *));
632 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
634 enum machine_mode *));
635 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
637 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
639 static rtx fold_rtx PROTO((rtx, rtx));
640 static rtx equiv_constant PROTO((rtx));
641 static void record_jump_equiv PROTO((rtx, int));
642 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
644 static void cse_insn PROTO((rtx, int));
645 static int note_mem_written PROTO((rtx));
646 static void invalidate_from_clobbers PROTO((rtx));
647 static rtx cse_process_notes PROTO((rtx, rtx));
648 static void cse_around_loop PROTO((rtx));
649 static void invalidate_skipped_set PROTO((rtx, rtx));
650 static void invalidate_skipped_block PROTO((rtx));
651 static void cse_check_loop_start PROTO((rtx, rtx));
652 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
653 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
654 static void count_reg_usage PROTO((rtx, int *, rtx, int));
656 extern int rtx_equal_function_value_matters;
658 /* Return an estimate of the cost of computing rtx X.
659 One use is in cse, to decide which expression to keep in the hash table.
660 Another is in rtl generation, to pick the cheapest way to multiply.
661 Other uses like the latter are expected in the future. */
663 /* Internal function, to compute cost when X is not a register; called
664 from COST macro to keep it simple. */
670 return ((GET_CODE (x) == SUBREG
671 && GET_CODE (SUBREG_REG (x)) == REG
672 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
673 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
674 && (GET_MODE_SIZE (GET_MODE (x))
675 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
676 && subreg_lowpart_p (x)
677 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
678 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
679 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
680 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
682 : rtx_cost (x, SET) * 2);
685 /* Return the right cost to give to an operation
686 to make the cost of the corresponding register-to-register instruction
687 N times that of a fast register-to-register instruction. */
689 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
692 rtx_cost (x, outer_code)
694 enum rtx_code outer_code;
697 register enum rtx_code code;
704 /* Compute the default costs of certain things.
705 Note that RTX_COSTS can override the defaults. */
711 /* Count multiplication by 2**n as a shift,
712 because if we are considering it, we would output it as a shift. */
713 if (GET_CODE (XEXP (x, 1)) == CONST_INT
714 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
717 total = COSTS_N_INSNS (5);
723 total = COSTS_N_INSNS (7);
726 /* Used in loop.c and combine.c as a marker. */
730 /* We don't want these to be used in substitutions because
731 we have no way of validating the resulting insn. So assign
732 anything containing an ASM_OPERANDS a very high cost. */
742 return ! CHEAP_REG (x);
745 /* If we can't tie these modes, make this expensive. The larger
746 the mode, the more expensive it is. */
747 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
748 return COSTS_N_INSNS (2
749 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
752 RTX_COSTS (x, code, outer_code);
755 CONST_COSTS (x, code, outer_code);
759 #ifdef DEFAULT_RTX_COSTS
760 DEFAULT_RTX_COSTS(x, code, outer_code);
765 /* Sum the costs of the sub-rtx's, plus cost of this operation,
766 which is already in total. */
768 fmt = GET_RTX_FORMAT (code);
769 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
771 total += rtx_cost (XEXP (x, i), code);
772 else if (fmt[i] == 'E')
773 for (j = 0; j < XVECLEN (x, i); j++)
774 total += rtx_cost (XVECEXP (x, i, j), code);
779 /* Clear the hash table and initialize each register with its own quantity,
780 for a new basic block. */
789 bzero ((char *) reg_tick, max_reg * sizeof (int));
791 bcopy ((char *) all_minus_one, (char *) reg_in_table,
792 max_reg * sizeof (int));
793 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
794 CLEAR_HARD_REG_SET (hard_regs_in_table);
796 /* The per-quantity values used to be initialized here, but it is
797 much faster to initialize each as it is made in `make_new_qty'. */
799 for (i = 0; i < NBUCKETS; i++)
801 register struct table_elt *this, *next;
802 for (this = table[i]; this; this = next)
804 next = this->next_same_hash;
809 bzero ((char *) table, sizeof table);
818 /* Say that register REG contains a quantity not in any register before
819 and initialize that quantity. */
827 if (next_qty >= max_qty)
830 q = reg_qty[reg] = next_qty++;
831 qty_first_reg[q] = reg;
832 qty_last_reg[q] = reg;
833 qty_const[q] = qty_const_insn[q] = 0;
834 qty_comparison_code[q] = UNKNOWN;
836 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
839 /* Make reg NEW equivalent to reg OLD.
840 OLD is not changing; NEW is. */
843 make_regs_eqv (new, old)
844 register int new, old;
846 register int lastr, firstr;
847 register int q = reg_qty[old];
849 /* Nothing should become eqv until it has a "non-invalid" qty number. */
850 if (! REGNO_QTY_VALID_P (old))
854 firstr = qty_first_reg[q];
855 lastr = qty_last_reg[q];
857 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
858 hard regs. Among pseudos, if NEW will live longer than any other reg
859 of the same qty, and that is beyond the current basic block,
860 make it the new canonical replacement for this qty. */
861 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
862 /* Certain fixed registers might be of the class NO_REGS. This means
863 that not only can they not be allocated by the compiler, but
864 they cannot be used in substitutions or canonicalizations
866 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
867 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
868 || (new >= FIRST_PSEUDO_REGISTER
869 && (firstr < FIRST_PSEUDO_REGISTER
870 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
871 || (uid_cuid[REGNO_FIRST_UID (new)]
872 < cse_basic_block_start))
873 && (uid_cuid[REGNO_LAST_UID (new)]
874 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
876 reg_prev_eqv[firstr] = new;
877 reg_next_eqv[new] = firstr;
878 reg_prev_eqv[new] = -1;
879 qty_first_reg[q] = new;
883 /* If NEW is a hard reg (known to be non-fixed), insert at end.
884 Otherwise, insert before any non-fixed hard regs that are at the
885 end. Registers of class NO_REGS cannot be used as an
886 equivalent for anything. */
887 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
888 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
889 && new >= FIRST_PSEUDO_REGISTER)
890 lastr = reg_prev_eqv[lastr];
891 reg_next_eqv[new] = reg_next_eqv[lastr];
892 if (reg_next_eqv[lastr] >= 0)
893 reg_prev_eqv[reg_next_eqv[lastr]] = new;
895 qty_last_reg[q] = new;
896 reg_next_eqv[lastr] = new;
897 reg_prev_eqv[new] = lastr;
901 /* Remove REG from its equivalence class. */
904 delete_reg_equiv (reg)
907 register int q = reg_qty[reg];
910 /* If invalid, do nothing. */
914 p = reg_prev_eqv[reg];
915 n = reg_next_eqv[reg];
924 qty_first_reg[q] = n;
929 /* Remove any invalid expressions from the hash table
930 that refer to any of the registers contained in expression X.
932 Make sure that newly inserted references to those registers
933 as subexpressions will be considered valid.
935 mention_regs is not called when a register itself
936 is being stored in the table.
938 Return 1 if we have done something that may have changed the hash code
945 register enum rtx_code code;
948 register int changed = 0;
956 register int regno = REGNO (x);
957 register int endregno
958 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
959 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
962 for (i = regno; i < endregno; i++)
964 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
965 remove_invalid_refs (i);
967 reg_in_table[i] = reg_tick[i];
973 /* If X is a comparison or a COMPARE and either operand is a register
974 that does not have a quantity, give it one. This is so that a later
975 call to record_jump_equiv won't cause X to be assigned a different
976 hash code and not found in the table after that call.
978 It is not necessary to do this here, since rehash_using_reg can
979 fix up the table later, but doing this here eliminates the need to
980 call that expensive function in the most common case where the only
981 use of the register is in the comparison. */
983 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
985 if (GET_CODE (XEXP (x, 0)) == REG
986 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
987 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
989 rehash_using_reg (XEXP (x, 0));
993 if (GET_CODE (XEXP (x, 1)) == REG
994 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
995 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
997 rehash_using_reg (XEXP (x, 1));
1002 fmt = GET_RTX_FORMAT (code);
1003 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1005 changed |= mention_regs (XEXP (x, i));
1006 else if (fmt[i] == 'E')
1007 for (j = 0; j < XVECLEN (x, i); j++)
1008 changed |= mention_regs (XVECEXP (x, i, j));
1013 /* Update the register quantities for inserting X into the hash table
1014 with a value equivalent to CLASSP.
1015 (If the class does not contain a REG, it is irrelevant.)
1016 If MODIFIED is nonzero, X is a destination; it is being modified.
1017 Note that delete_reg_equiv should be called on a register
1018 before insert_regs is done on that register with MODIFIED != 0.
1020 Nonzero value means that elements of reg_qty have changed
1021 so X's hash code may be different. */
1024 insert_regs (x, classp, modified)
1026 struct table_elt *classp;
1029 if (GET_CODE (x) == REG)
1031 register int regno = REGNO (x);
1033 /* If REGNO is in the equivalence table already but is of the
1034 wrong mode for that equivalence, don't do anything here. */
1036 if (REGNO_QTY_VALID_P (regno)
1037 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1040 if (modified || ! REGNO_QTY_VALID_P (regno))
1043 for (classp = classp->first_same_value;
1045 classp = classp->next_same_value)
1046 if (GET_CODE (classp->exp) == REG
1047 && GET_MODE (classp->exp) == GET_MODE (x))
1049 make_regs_eqv (regno, REGNO (classp->exp));
1053 make_new_qty (regno);
1054 qty_mode[reg_qty[regno]] = GET_MODE (x);
1061 /* If X is a SUBREG, we will likely be inserting the inner register in the
1062 table. If that register doesn't have an assigned quantity number at
1063 this point but does later, the insertion that we will be doing now will
1064 not be accessible because its hash code will have changed. So assign
1065 a quantity number now. */
1067 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1068 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1070 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1071 mention_regs (SUBREG_REG (x));
1075 return mention_regs (x);
1078 /* Look in or update the hash table. */
1080 /* Put the element ELT on the list of free elements. */
1084 struct table_elt *elt;
1086 elt->next_same_hash = free_element_chain;
1087 free_element_chain = elt;
1090 /* Return an element that is free for use. */
1092 static struct table_elt *
1095 struct table_elt *elt = free_element_chain;
1098 free_element_chain = elt->next_same_hash;
1102 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1105 /* Remove table element ELT from use in the table.
1106 HASH is its hash code, made using the HASH macro.
1107 It's an argument because often that is known in advance
1108 and we save much time not recomputing it. */
1111 remove_from_table (elt, hash)
1112 register struct table_elt *elt;
1118 /* Mark this element as removed. See cse_insn. */
1119 elt->first_same_value = 0;
1121 /* Remove the table element from its equivalence class. */
1124 register struct table_elt *prev = elt->prev_same_value;
1125 register struct table_elt *next = elt->next_same_value;
1127 if (next) next->prev_same_value = prev;
1130 prev->next_same_value = next;
1133 register struct table_elt *newfirst = next;
1136 next->first_same_value = newfirst;
1137 next = next->next_same_value;
1142 /* Remove the table element from its hash bucket. */
1145 register struct table_elt *prev = elt->prev_same_hash;
1146 register struct table_elt *next = elt->next_same_hash;
1148 if (next) next->prev_same_hash = prev;
1151 prev->next_same_hash = next;
1152 else if (table[hash] == elt)
1156 /* This entry is not in the proper hash bucket. This can happen
1157 when two classes were merged by `merge_equiv_classes'. Search
1158 for the hash bucket that it heads. This happens only very
1159 rarely, so the cost is acceptable. */
1160 for (hash = 0; hash < NBUCKETS; hash++)
1161 if (table[hash] == elt)
1166 /* Remove the table element from its related-value circular chain. */
1168 if (elt->related_value != 0 && elt->related_value != elt)
1170 register struct table_elt *p = elt->related_value;
1171 while (p->related_value != elt)
1172 p = p->related_value;
1173 p->related_value = elt->related_value;
1174 if (p->related_value == p)
1175 p->related_value = 0;
1181 /* Look up X in the hash table and return its table element,
1182 or 0 if X is not in the table.
1184 MODE is the machine-mode of X, or if X is an integer constant
1185 with VOIDmode then MODE is the mode with which X will be used.
1187 Here we are satisfied to find an expression whose tree structure
1190 static struct table_elt *
1191 lookup (x, hash, mode)
1194 enum machine_mode mode;
1196 register struct table_elt *p;
1198 for (p = table[hash]; p; p = p->next_same_hash)
1199 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1200 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1206 /* Like `lookup' but don't care whether the table element uses invalid regs.
1207 Also ignore discrepancies in the machine mode of a register. */
1209 static struct table_elt *
1210 lookup_for_remove (x, hash, mode)
1213 enum machine_mode mode;
1215 register struct table_elt *p;
1217 if (GET_CODE (x) == REG)
1219 int regno = REGNO (x);
1220 /* Don't check the machine mode when comparing registers;
1221 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1222 for (p = table[hash]; p; p = p->next_same_hash)
1223 if (GET_CODE (p->exp) == REG
1224 && REGNO (p->exp) == regno)
1229 for (p = table[hash]; p; p = p->next_same_hash)
1230 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1237 /* Look for an expression equivalent to X and with code CODE.
1238 If one is found, return that expression. */
1241 lookup_as_function (x, code)
1245 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1250 for (p = p->first_same_value; p; p = p->next_same_value)
1252 if (GET_CODE (p->exp) == code
1253 /* Make sure this is a valid entry in the table. */
1254 && exp_equiv_p (p->exp, p->exp, 1, 0))
1261 /* Insert X in the hash table, assuming HASH is its hash code
1262 and CLASSP is an element of the class it should go in
1263 (or 0 if a new class should be made).
1264 It is inserted at the proper position to keep the class in
1265 the order cheapest first.
1267 MODE is the machine-mode of X, or if X is an integer constant
1268 with VOIDmode then MODE is the mode with which X will be used.
1270 For elements of equal cheapness, the most recent one
1271 goes in front, except that the first element in the list
1272 remains first unless a cheaper element is added. The order of
1273 pseudo-registers does not matter, as canon_reg will be called to
1274 find the cheapest when a register is retrieved from the table.
1276 The in_memory field in the hash table element is set to 0.
1277 The caller must set it nonzero if appropriate.
1279 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1280 and if insert_regs returns a nonzero value
1281 you must then recompute its hash code before calling here.
1283 If necessary, update table showing constant values of quantities. */
1285 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1287 static struct table_elt *
1288 insert (x, classp, hash, mode)
1290 register struct table_elt *classp;
1292 enum machine_mode mode;
1294 register struct table_elt *elt;
1296 /* If X is a register and we haven't made a quantity for it,
1297 something is wrong. */
1298 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1301 /* If X is a hard register, show it is being put in the table. */
1302 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1304 int regno = REGNO (x);
1305 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1308 for (i = regno; i < endregno; i++)
1309 SET_HARD_REG_BIT (hard_regs_in_table, i);
1312 /* If X is a label, show we recorded it. */
1313 if (GET_CODE (x) == LABEL_REF
1314 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1315 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1316 recorded_label_ref = 1;
1318 /* Put an element for X into the right hash bucket. */
1320 elt = get_element ();
1322 elt->cost = COST (x);
1323 elt->next_same_value = 0;
1324 elt->prev_same_value = 0;
1325 elt->next_same_hash = table[hash];
1326 elt->prev_same_hash = 0;
1327 elt->related_value = 0;
1330 elt->is_const = (CONSTANT_P (x)
1331 /* GNU C++ takes advantage of this for `this'
1332 (and other const values). */
1333 || (RTX_UNCHANGING_P (x)
1334 && GET_CODE (x) == REG
1335 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1336 || FIXED_BASE_PLUS_P (x));
1339 table[hash]->prev_same_hash = elt;
1342 /* Put it into the proper value-class. */
1345 classp = classp->first_same_value;
1346 if (CHEAPER (elt, classp))
1347 /* Insert at the head of the class */
1349 register struct table_elt *p;
1350 elt->next_same_value = classp;
1351 classp->prev_same_value = elt;
1352 elt->first_same_value = elt;
1354 for (p = classp; p; p = p->next_same_value)
1355 p->first_same_value = elt;
1359 /* Insert not at head of the class. */
1360 /* Put it after the last element cheaper than X. */
1361 register struct table_elt *p, *next;
1362 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1364 /* Put it after P and before NEXT. */
1365 elt->next_same_value = next;
1367 next->prev_same_value = elt;
1368 elt->prev_same_value = p;
1369 p->next_same_value = elt;
1370 elt->first_same_value = classp;
1374 elt->first_same_value = elt;
1376 /* If this is a constant being set equivalent to a register or a register
1377 being set equivalent to a constant, note the constant equivalence.
1379 If this is a constant, it cannot be equivalent to a different constant,
1380 and a constant is the only thing that can be cheaper than a register. So
1381 we know the register is the head of the class (before the constant was
1384 If this is a register that is not already known equivalent to a
1385 constant, we must check the entire class.
1387 If this is a register that is already known equivalent to an insn,
1388 update `qty_const_insn' to show that `this_insn' is the latest
1389 insn making that quantity equivalent to the constant. */
1391 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1392 && GET_CODE (x) != REG)
1394 qty_const[reg_qty[REGNO (classp->exp)]]
1395 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1396 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1399 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]
1402 register struct table_elt *p;
1404 for (p = classp; p != 0; p = p->next_same_value)
1406 if (p->is_const && GET_CODE (p->exp) != REG)
1408 qty_const[reg_qty[REGNO (x)]]
1409 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1410 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1416 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1417 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1418 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1420 /* If this is a constant with symbolic value,
1421 and it has a term with an explicit integer value,
1422 link it up with related expressions. */
1423 if (GET_CODE (x) == CONST)
1425 rtx subexp = get_related_value (x);
1427 struct table_elt *subelt, *subelt_prev;
1431 /* Get the integer-free subexpression in the hash table. */
1432 subhash = safe_hash (subexp, mode) % NBUCKETS;
1433 subelt = lookup (subexp, subhash, mode);
1435 subelt = insert (subexp, NULL_PTR, subhash, mode);
1436 /* Initialize SUBELT's circular chain if it has none. */
1437 if (subelt->related_value == 0)
1438 subelt->related_value = subelt;
1439 /* Find the element in the circular chain that precedes SUBELT. */
1440 subelt_prev = subelt;
1441 while (subelt_prev->related_value != subelt)
1442 subelt_prev = subelt_prev->related_value;
1443 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1444 This way the element that follows SUBELT is the oldest one. */
1445 elt->related_value = subelt_prev->related_value;
1446 subelt_prev->related_value = elt;
1453 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1454 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1455 the two classes equivalent.
1457 CLASS1 will be the surviving class; CLASS2 should not be used after this
1460 Any invalid entries in CLASS2 will not be copied. */
1463 merge_equiv_classes (class1, class2)
1464 struct table_elt *class1, *class2;
1466 struct table_elt *elt, *next, *new;
1468 /* Ensure we start with the head of the classes. */
1469 class1 = class1->first_same_value;
1470 class2 = class2->first_same_value;
1472 /* If they were already equal, forget it. */
1473 if (class1 == class2)
1476 for (elt = class2; elt; elt = next)
1480 enum machine_mode mode = elt->mode;
1482 next = elt->next_same_value;
1484 /* Remove old entry, make a new one in CLASS1's class.
1485 Don't do this for invalid entries as we cannot find their
1486 hash code (it also isn't necessary). */
1487 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1489 hash_arg_in_memory = 0;
1490 hash_arg_in_struct = 0;
1491 hash = HASH (exp, mode);
1493 if (GET_CODE (exp) == REG)
1494 delete_reg_equiv (REGNO (exp));
1496 remove_from_table (elt, hash);
1498 if (insert_regs (exp, class1, 0))
1500 rehash_using_reg (exp);
1501 hash = HASH (exp, mode);
1503 new = insert (exp, class1, hash, mode);
1504 new->in_memory = hash_arg_in_memory;
1505 new->in_struct = hash_arg_in_struct;
1510 /* Remove from the hash table, or mark as invalid,
1511 all expressions whose values could be altered by storing in X.
1512 X is a register, a subreg, or a memory reference with nonvarying address
1513 (because, when a memory reference with a varying address is stored in,
1514 all memory references are removed by invalidate_memory
1515 so specific invalidation is superfluous).
1516 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1517 instead of just the amount indicated by the mode of X. This is only used
1518 for bitfield stores into memory.
1520 A nonvarying address may be just a register or just
1521 a symbol reference, or it may be either of those plus
1522 a numeric offset. */
1525 invalidate (x, full_mode)
1527 enum machine_mode full_mode;
1530 register struct table_elt *p;
1532 /* If X is a register, dependencies on its contents
1533 are recorded through the qty number mechanism.
1534 Just change the qty number of the register,
1535 mark it as invalid for expressions that refer to it,
1536 and remove it itself. */
1538 if (GET_CODE (x) == REG)
1540 register int regno = REGNO (x);
1541 register unsigned hash = HASH (x, GET_MODE (x));
1543 /* Remove REGNO from any quantity list it might be on and indicate
1544 that its value might have changed. If it is a pseudo, remove its
1545 entry from the hash table.
1547 For a hard register, we do the first two actions above for any
1548 additional hard registers corresponding to X. Then, if any of these
1549 registers are in the table, we must remove any REG entries that
1550 overlap these registers. */
1552 delete_reg_equiv (regno);
1555 if (regno >= FIRST_PSEUDO_REGISTER)
1557 /* Because a register can be referenced in more than one mode,
1558 we might have to remove more than one table entry. */
1560 struct table_elt *elt;
1562 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1563 remove_from_table (elt, hash);
1567 HOST_WIDE_INT in_table
1568 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1569 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1570 int tregno, tendregno;
1571 register struct table_elt *p, *next;
1573 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1575 for (i = regno + 1; i < endregno; i++)
1577 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1578 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1579 delete_reg_equiv (i);
1584 for (hash = 0; hash < NBUCKETS; hash++)
1585 for (p = table[hash]; p; p = next)
1587 next = p->next_same_hash;
1589 if (GET_CODE (p->exp) != REG
1590 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1593 tregno = REGNO (p->exp);
1595 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1596 if (tendregno > regno && tregno < endregno)
1597 remove_from_table (p, hash);
1604 if (GET_CODE (x) == SUBREG)
1606 if (GET_CODE (SUBREG_REG (x)) != REG)
1608 invalidate (SUBREG_REG (x), VOIDmode);
1612 /* If X is a parallel, invalidate all of its elements. */
1614 if (GET_CODE (x) == PARALLEL)
1616 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1617 invalidate (XVECEXP (x, 0, i), VOIDmode);
1621 /* If X is an expr_list, this is part of a disjoint return value;
1622 extract the location in question ignoring the offset. */
1624 if (GET_CODE (x) == EXPR_LIST)
1626 invalidate (XEXP (x, 0), VOIDmode);
1630 /* X is not a register; it must be a memory reference with
1631 a nonvarying address. Remove all hash table elements
1632 that refer to overlapping pieces of memory. */
1634 if (GET_CODE (x) != MEM)
1637 if (full_mode == VOIDmode)
1638 full_mode = GET_MODE (x);
1640 for (i = 0; i < NBUCKETS; i++)
1642 register struct table_elt *next;
1643 for (p = table[i]; p; p = next)
1645 next = p->next_same_hash;
1646 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1647 than checking all the aliases). */
1649 && (GET_CODE (p->exp) != MEM
1650 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1651 remove_from_table (p, i);
1656 /* Remove all expressions that refer to register REGNO,
1657 since they are already invalid, and we are about to
1658 mark that register valid again and don't want the old
1659 expressions to reappear as valid. */
1662 remove_invalid_refs (regno)
1666 register struct table_elt *p, *next;
1668 for (i = 0; i < NBUCKETS; i++)
1669 for (p = table[i]; p; p = next)
1671 next = p->next_same_hash;
1672 if (GET_CODE (p->exp) != REG
1673 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1674 remove_from_table (p, i);
1678 /* Recompute the hash codes of any valid entries in the hash table that
1679 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1681 This is called when we make a jump equivalence. */
1684 rehash_using_reg (x)
1688 struct table_elt *p, *next;
1691 if (GET_CODE (x) == SUBREG)
1694 /* If X is not a register or if the register is known not to be in any
1695 valid entries in the table, we have no work to do. */
1697 if (GET_CODE (x) != REG
1698 || reg_in_table[REGNO (x)] < 0
1699 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1702 /* Scan all hash chains looking for valid entries that mention X.
1703 If we find one and it is in the wrong hash chain, move it. We can skip
1704 objects that are registers, since they are handled specially. */
1706 for (i = 0; i < NBUCKETS; i++)
1707 for (p = table[i]; p; p = next)
1709 next = p->next_same_hash;
1710 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1711 && exp_equiv_p (p->exp, p->exp, 1, 0)
1712 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1714 if (p->next_same_hash)
1715 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1717 if (p->prev_same_hash)
1718 p->prev_same_hash->next_same_hash = p->next_same_hash;
1720 table[i] = p->next_same_hash;
1722 p->next_same_hash = table[hash];
1723 p->prev_same_hash = 0;
1725 table[hash]->prev_same_hash = p;
1731 /* Remove from the hash table any expression that is a call-clobbered
1732 register. Also update their TICK values. */
1735 invalidate_for_call ()
1737 int regno, endregno;
1740 struct table_elt *p, *next;
1743 /* Go through all the hard registers. For each that is clobbered in
1744 a CALL_INSN, remove the register from quantity chains and update
1745 reg_tick if defined. Also see if any of these registers is currently
1748 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1749 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1751 delete_reg_equiv (regno);
1752 if (reg_tick[regno] >= 0)
1755 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1758 /* In the case where we have no call-clobbered hard registers in the
1759 table, we are done. Otherwise, scan the table and remove any
1760 entry that overlaps a call-clobbered register. */
1763 for (hash = 0; hash < NBUCKETS; hash++)
1764 for (p = table[hash]; p; p = next)
1766 next = p->next_same_hash;
1770 remove_from_table (p, hash);
1774 if (GET_CODE (p->exp) != REG
1775 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1778 regno = REGNO (p->exp);
1779 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1781 for (i = regno; i < endregno; i++)
1782 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1784 remove_from_table (p, hash);
1790 /* Given an expression X of type CONST,
1791 and ELT which is its table entry (or 0 if it
1792 is not in the hash table),
1793 return an alternate expression for X as a register plus integer.
1794 If none can be found, return 0. */
1797 use_related_value (x, elt)
1799 struct table_elt *elt;
1801 register struct table_elt *relt = 0;
1802 register struct table_elt *p, *q;
1803 HOST_WIDE_INT offset;
1805 /* First, is there anything related known?
1806 If we have a table element, we can tell from that.
1807 Otherwise, must look it up. */
1809 if (elt != 0 && elt->related_value != 0)
1811 else if (elt == 0 && GET_CODE (x) == CONST)
1813 rtx subexp = get_related_value (x);
1815 relt = lookup (subexp,
1816 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1823 /* Search all related table entries for one that has an
1824 equivalent register. */
1829 /* This loop is strange in that it is executed in two different cases.
1830 The first is when X is already in the table. Then it is searching
1831 the RELATED_VALUE list of X's class (RELT). The second case is when
1832 X is not in the table. Then RELT points to a class for the related
1835 Ensure that, whatever case we are in, that we ignore classes that have
1836 the same value as X. */
1838 if (rtx_equal_p (x, p->exp))
1841 for (q = p->first_same_value; q; q = q->next_same_value)
1842 if (GET_CODE (q->exp) == REG)
1848 p = p->related_value;
1850 /* We went all the way around, so there is nothing to be found.
1851 Alternatively, perhaps RELT was in the table for some other reason
1852 and it has no related values recorded. */
1853 if (p == relt || p == 0)
1860 offset = (get_integer_term (x) - get_integer_term (p->exp));
1861 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1862 return plus_constant (q->exp, offset);
1865 /* Hash an rtx. We are careful to make sure the value is never negative.
1866 Equivalent registers hash identically.
1867 MODE is used in hashing for CONST_INTs only;
1868 otherwise the mode of X is used.
1870 Store 1 in do_not_record if any subexpression is volatile.
1872 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1873 which does not have the RTX_UNCHANGING_P bit set.
1874 In this case, also store 1 in hash_arg_in_struct
1875 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1877 Note that cse_insn knows that the hash code of a MEM expression
1878 is just (int) MEM plus the hash code of the address. */
1881 canon_hash (x, mode)
1883 enum machine_mode mode;
1886 register unsigned hash = 0;
1887 register enum rtx_code code;
1890 /* repeat is used to turn tail-recursion into iteration. */
1895 code = GET_CODE (x);
1900 register int regno = REGNO (x);
1902 /* On some machines, we can't record any non-fixed hard register,
1903 because extending its life will cause reload problems. We
1904 consider ap, fp, and sp to be fixed for this purpose.
1905 On all machines, we can't record any global registers. */
1907 if (regno < FIRST_PSEUDO_REGISTER
1908 && (global_regs[regno]
1909 || (SMALL_REGISTER_CLASSES
1910 && ! fixed_regs[regno]
1911 && regno != FRAME_POINTER_REGNUM
1912 && regno != HARD_FRAME_POINTER_REGNUM
1913 && regno != ARG_POINTER_REGNUM
1914 && regno != STACK_POINTER_REGNUM)))
1919 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
1925 unsigned HOST_WIDE_INT tem = INTVAL (x);
1926 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
1931 /* This is like the general case, except that it only counts
1932 the integers representing the constant. */
1933 hash += (unsigned) code + (unsigned) GET_MODE (x);
1934 if (GET_MODE (x) != VOIDmode)
1935 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1937 unsigned tem = XINT (x, i);
1941 hash += ((unsigned) CONST_DOUBLE_LOW (x)
1942 + (unsigned) CONST_DOUBLE_HIGH (x));
1945 /* Assume there is only one rtx object for any given label. */
1948 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
1953 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
1957 if (MEM_VOLATILE_P (x))
1962 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
1964 hash_arg_in_memory = 1;
1965 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1967 /* Now that we have already found this special case,
1968 might as well speed it up as much as possible. */
1969 hash += (unsigned) MEM;
1980 case UNSPEC_VOLATILE:
1985 if (MEM_VOLATILE_P (x))
1996 i = GET_RTX_LENGTH (code) - 1;
1997 hash += (unsigned) code + (unsigned) GET_MODE (x);
1998 fmt = GET_RTX_FORMAT (code);
2003 rtx tem = XEXP (x, i);
2005 /* If we are about to do the last recursive call
2006 needed at this level, change it into iteration.
2007 This function is called enough to be worth it. */
2013 hash += canon_hash (tem, 0);
2015 else if (fmt[i] == 'E')
2016 for (j = 0; j < XVECLEN (x, i); j++)
2017 hash += canon_hash (XVECEXP (x, i, j), 0);
2018 else if (fmt[i] == 's')
2020 register unsigned char *p = (unsigned char *) XSTR (x, i);
2025 else if (fmt[i] == 'i')
2027 register unsigned tem = XINT (x, i);
2030 else if (fmt[i] == '0')
2038 /* Like canon_hash but with no side effects. */
2043 enum machine_mode mode;
2045 int save_do_not_record = do_not_record;
2046 int save_hash_arg_in_memory = hash_arg_in_memory;
2047 int save_hash_arg_in_struct = hash_arg_in_struct;
2048 unsigned hash = canon_hash (x, mode);
2049 hash_arg_in_memory = save_hash_arg_in_memory;
2050 hash_arg_in_struct = save_hash_arg_in_struct;
2051 do_not_record = save_do_not_record;
2055 /* Return 1 iff X and Y would canonicalize into the same thing,
2056 without actually constructing the canonicalization of either one.
2057 If VALIDATE is nonzero,
2058 we assume X is an expression being processed from the rtl
2059 and Y was found in the hash table. We check register refs
2060 in Y for being marked as valid.
2062 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2063 that is known to be in the register. Ordinarily, we don't allow them
2064 to match, because letting them match would cause unpredictable results
2065 in all the places that search a hash table chain for an equivalent
2066 for a given value. A possible equivalent that has different structure
2067 has its hash code computed from different data. Whether the hash code
2068 is the same as that of the given value is pure luck. */
2071 exp_equiv_p (x, y, validate, equal_values)
2077 register enum rtx_code code;
2080 /* Note: it is incorrect to assume an expression is equivalent to itself
2081 if VALIDATE is nonzero. */
2082 if (x == y && !validate)
2084 if (x == 0 || y == 0)
2087 code = GET_CODE (x);
2088 if (code != GET_CODE (y))
2093 /* If X is a constant and Y is a register or vice versa, they may be
2094 equivalent. We only have to validate if Y is a register. */
2095 if (CONSTANT_P (x) && GET_CODE (y) == REG
2096 && REGNO_QTY_VALID_P (REGNO (y))
2097 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2098 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2099 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2102 if (CONSTANT_P (y) && code == REG
2103 && REGNO_QTY_VALID_P (REGNO (x))
2104 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2105 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2111 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2112 if (GET_MODE (x) != GET_MODE (y))
2122 return INTVAL (x) == INTVAL (y);
2125 return XEXP (x, 0) == XEXP (y, 0);
2128 return XSTR (x, 0) == XSTR (y, 0);
2132 int regno = REGNO (y);
2134 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2135 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2138 /* If the quantities are not the same, the expressions are not
2139 equivalent. If there are and we are not to validate, they
2140 are equivalent. Otherwise, ensure all regs are up-to-date. */
2142 if (reg_qty[REGNO (x)] != reg_qty[regno])
2148 for (i = regno; i < endregno; i++)
2149 if (reg_in_table[i] != reg_tick[i])
2155 /* For commutative operations, check both orders. */
2163 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2164 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2165 validate, equal_values))
2166 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2167 validate, equal_values)
2168 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2169 validate, equal_values)));
2175 /* Compare the elements. If any pair of corresponding elements
2176 fail to match, return 0 for the whole things. */
2178 fmt = GET_RTX_FORMAT (code);
2179 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2184 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2189 if (XVECLEN (x, i) != XVECLEN (y, i))
2191 for (j = 0; j < XVECLEN (x, i); j++)
2192 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2193 validate, equal_values))
2198 if (strcmp (XSTR (x, i), XSTR (y, i)))
2203 if (XINT (x, i) != XINT (y, i))
2208 if (XWINT (x, i) != XWINT (y, i))
2223 /* Return 1 iff any subexpression of X matches Y.
2224 Here we do not require that X or Y be valid (for registers referred to)
2225 for being in the hash table. */
2232 register enum rtx_code code;
2238 if (x == 0 || y == 0)
2241 code = GET_CODE (x);
2242 /* If X as a whole has the same code as Y, they may match.
2244 if (code == GET_CODE (y))
2246 if (exp_equiv_p (x, y, 0, 1))
2250 /* X does not match, so try its subexpressions. */
2252 fmt = GET_RTX_FORMAT (code);
2253 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2262 if (refers_to_p (XEXP (x, i), y))
2265 else if (fmt[i] == 'E')
2268 for (j = 0; j < XVECLEN (x, i); j++)
2269 if (refers_to_p (XVECEXP (x, i, j), y))
2276 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2277 set PBASE, PSTART, and PEND which correspond to the base of the address,
2278 the starting offset, and ending offset respectively.
2280 ADDR is known to be a nonvarying address. */
2282 /* ??? Despite what the comments say, this function is in fact frequently
2283 passed varying addresses. This does not appear to cause any problems. */
2286 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2290 HOST_WIDE_INT *pstart, *pend;
2293 HOST_WIDE_INT start, end;
2299 if (flag_pic && GET_CODE (base) == PLUS
2300 && XEXP (base, 0) == pic_offset_table_rtx)
2301 base = XEXP (base, 1);
2303 /* Registers with nonvarying addresses usually have constant equivalents;
2304 but the frame pointer register is also possible. */
2305 if (GET_CODE (base) == REG
2307 && REGNO_QTY_VALID_P (REGNO (base))
2308 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2309 && qty_const[reg_qty[REGNO (base)]] != 0)
2310 base = qty_const[reg_qty[REGNO (base)]];
2311 else if (GET_CODE (base) == PLUS
2312 && GET_CODE (XEXP (base, 1)) == CONST_INT
2313 && GET_CODE (XEXP (base, 0)) == REG
2315 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2316 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2317 == GET_MODE (XEXP (base, 0)))
2318 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2320 start = INTVAL (XEXP (base, 1));
2321 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2323 /* This can happen as the result of virtual register instantiation,
2324 if the initial offset is too large to be a valid address. */
2325 else if (GET_CODE (base) == PLUS
2326 && GET_CODE (XEXP (base, 0)) == REG
2327 && GET_CODE (XEXP (base, 1)) == REG
2329 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2330 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2331 == GET_MODE (XEXP (base, 0)))
2332 && qty_const[reg_qty[REGNO (XEXP (base, 0))]]
2333 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2334 && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]]
2335 == GET_MODE (XEXP (base, 1)))
2336 && qty_const[reg_qty[REGNO (XEXP (base, 1))]])
2338 rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]];
2339 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2341 /* One of the two values must be a constant. */
2342 if (GET_CODE (base) != CONST_INT)
2344 if (GET_CODE (tem) != CONST_INT)
2346 start = INTVAL (tem);
2350 start = INTVAL (base);
2355 /* Handle everything that we can find inside an address that has been
2356 viewed as constant. */
2360 /* If no part of this switch does a "continue", the code outside
2361 will exit this loop. */
2363 switch (GET_CODE (base))
2366 /* By definition, operand1 of a LO_SUM is the associated constant
2367 address. Use the associated constant address as the base
2369 base = XEXP (base, 1);
2373 /* Strip off CONST. */
2374 base = XEXP (base, 0);
2378 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2380 start += INTVAL (XEXP (base, 1));
2381 base = XEXP (base, 0);
2387 /* Handle the case of an AND which is the negative of a power of
2388 two. This is used to represent unaligned memory operations. */
2389 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2390 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2392 set_nonvarying_address_components (XEXP (base, 0), size,
2393 pbase, pstart, pend);
2395 /* Assume the worst misalignment. START is affected, but not
2396 END, so compensate but adjusting SIZE. Don't lose any
2397 constant we already had. */
2399 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2400 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2413 if (GET_CODE (base) == CONST_INT)
2415 start += INTVAL (base);
2421 /* Set the return values. */
2427 /* Return 1 if X has a value that can vary even between two
2428 executions of the program. 0 means X can be compared reliably
2429 against certain constants or near-constants. */
2432 cse_rtx_varies_p (x)
2435 /* We need not check for X and the equivalence class being of the same
2436 mode because if X is equivalent to a constant in some mode, it
2437 doesn't vary in any mode. */
2439 if (GET_CODE (x) == REG
2440 && REGNO_QTY_VALID_P (REGNO (x))
2441 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2442 && qty_const[reg_qty[REGNO (x)]] != 0)
2445 if (GET_CODE (x) == PLUS
2446 && GET_CODE (XEXP (x, 1)) == CONST_INT
2447 && GET_CODE (XEXP (x, 0)) == REG
2448 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2449 && (GET_MODE (XEXP (x, 0))
2450 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2451 && qty_const[reg_qty[REGNO (XEXP (x, 0))]])
2454 /* This can happen as the result of virtual register instantiation, if
2455 the initial constant is too large to be a valid address. This gives
2456 us a three instruction sequence, load large offset into a register,
2457 load fp minus a constant into a register, then a MEM which is the
2458 sum of the two `constant' registers. */
2459 if (GET_CODE (x) == PLUS
2460 && GET_CODE (XEXP (x, 0)) == REG
2461 && GET_CODE (XEXP (x, 1)) == REG
2462 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2463 && (GET_MODE (XEXP (x, 0))
2464 == qty_mode[reg_qty[REGNO (XEXP (x, 0))]])
2465 && qty_const[reg_qty[REGNO (XEXP (x, 0))]]
2466 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2467 && (GET_MODE (XEXP (x, 1))
2468 == qty_mode[reg_qty[REGNO (XEXP (x, 1))]])
2469 && qty_const[reg_qty[REGNO (XEXP (x, 1))]])
2472 return rtx_varies_p (x);
2475 /* Canonicalize an expression:
2476 replace each register reference inside it
2477 with the "oldest" equivalent register.
2479 If INSN is non-zero and we are replacing a pseudo with a hard register
2480 or vice versa, validate_change is used to ensure that INSN remains valid
2481 after we make our substitution. The calls are made with IN_GROUP non-zero
2482 so apply_change_group must be called upon the outermost return from this
2483 function (unless INSN is zero). The result of apply_change_group can
2484 generally be discarded since the changes we are making are optional. */
2492 register enum rtx_code code;
2498 code = GET_CODE (x);
2516 /* Never replace a hard reg, because hard regs can appear
2517 in more than one machine mode, and we must preserve the mode
2518 of each occurrence. Also, some hard regs appear in
2519 MEMs that are shared and mustn't be altered. Don't try to
2520 replace any reg that maps to a reg of class NO_REGS. */
2521 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2522 || ! REGNO_QTY_VALID_P (REGNO (x)))
2525 first = qty_first_reg[reg_qty[REGNO (x)]];
2526 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2527 : REGNO_REG_CLASS (first) == NO_REGS ? x
2528 : gen_rtx_REG (qty_mode[reg_qty[REGNO (x)]], first));
2535 fmt = GET_RTX_FORMAT (code);
2536 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2542 rtx new = canon_reg (XEXP (x, i), insn);
2545 /* If replacing pseudo with hard reg or vice versa, ensure the
2546 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2547 if (insn != 0 && new != 0
2548 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2549 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2550 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2551 || (insn_code = recog_memoized (insn)) < 0
2552 || insn_n_dups[insn_code] > 0))
2553 validate_change (insn, &XEXP (x, i), new, 1);
2557 else if (fmt[i] == 'E')
2558 for (j = 0; j < XVECLEN (x, i); j++)
2559 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2565 /* LOC is a location within INSN that is an operand address (the contents of
2566 a MEM). Find the best equivalent address to use that is valid for this
2569 On most CISC machines, complicated address modes are costly, and rtx_cost
2570 is a good approximation for that cost. However, most RISC machines have
2571 only a few (usually only one) memory reference formats. If an address is
2572 valid at all, it is often just as cheap as any other address. Hence, for
2573 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2574 costs of various addresses. For two addresses of equal cost, choose the one
2575 with the highest `rtx_cost' value as that has the potential of eliminating
2576 the most insns. For equal costs, we choose the first in the equivalence
2577 class. Note that we ignore the fact that pseudo registers are cheaper
2578 than hard registers here because we would also prefer the pseudo registers.
2582 find_best_addr (insn, loc)
2586 struct table_elt *elt;
2589 struct table_elt *p;
2590 int found_better = 1;
2592 int save_do_not_record = do_not_record;
2593 int save_hash_arg_in_memory = hash_arg_in_memory;
2594 int save_hash_arg_in_struct = hash_arg_in_struct;
2599 /* Do not try to replace constant addresses or addresses of local and
2600 argument slots. These MEM expressions are made only once and inserted
2601 in many instructions, as well as being used to control symbol table
2602 output. It is not safe to clobber them.
2604 There are some uncommon cases where the address is already in a register
2605 for some reason, but we cannot take advantage of that because we have
2606 no easy way to unshare the MEM. In addition, looking up all stack
2607 addresses is costly. */
2608 if ((GET_CODE (addr) == PLUS
2609 && GET_CODE (XEXP (addr, 0)) == REG
2610 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2611 && (regno = REGNO (XEXP (addr, 0)),
2612 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2613 || regno == ARG_POINTER_REGNUM))
2614 || (GET_CODE (addr) == REG
2615 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2616 || regno == HARD_FRAME_POINTER_REGNUM
2617 || regno == ARG_POINTER_REGNUM))
2618 || GET_CODE (addr) == ADDRESSOF
2619 || CONSTANT_ADDRESS_P (addr))
2622 /* If this address is not simply a register, try to fold it. This will
2623 sometimes simplify the expression. Many simplifications
2624 will not be valid, but some, usually applying the associative rule, will
2625 be valid and produce better code. */
2626 if (GET_CODE (addr) != REG)
2628 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2632 && (ADDRESS_COST (folded) < ADDRESS_COST (addr)
2633 || (ADDRESS_COST (folded) == ADDRESS_COST (addr)
2634 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2636 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2638 && validate_change (insn, loc, folded, 0))
2642 /* If this address is not in the hash table, we can't look for equivalences
2643 of the whole address. Also, ignore if volatile. */
2646 hash = HASH (addr, Pmode);
2647 addr_volatile = do_not_record;
2648 do_not_record = save_do_not_record;
2649 hash_arg_in_memory = save_hash_arg_in_memory;
2650 hash_arg_in_struct = save_hash_arg_in_struct;
2655 elt = lookup (addr, hash, Pmode);
2657 #ifndef ADDRESS_COST
2660 int our_cost = elt->cost;
2662 /* Find the lowest cost below ours that works. */
2663 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2664 if (elt->cost < our_cost
2665 && (GET_CODE (elt->exp) == REG
2666 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2667 && validate_change (insn, loc,
2668 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2675 /* We need to find the best (under the criteria documented above) entry
2676 in the class that is valid. We use the `flag' field to indicate
2677 choices that were invalid and iterate until we can't find a better
2678 one that hasn't already been tried. */
2680 for (p = elt->first_same_value; p; p = p->next_same_value)
2683 while (found_better)
2685 int best_addr_cost = ADDRESS_COST (*loc);
2686 int best_rtx_cost = (elt->cost + 1) >> 1;
2687 struct table_elt *best_elt = elt;
2690 for (p = elt->first_same_value; p; p = p->next_same_value)
2692 && (GET_CODE (p->exp) == REG
2693 || exp_equiv_p (p->exp, p->exp, 1, 0))
2694 && (ADDRESS_COST (p->exp) < best_addr_cost
2695 || (ADDRESS_COST (p->exp) == best_addr_cost
2696 && (p->cost + 1) >> 1 > best_rtx_cost)))
2699 best_addr_cost = ADDRESS_COST (p->exp);
2700 best_rtx_cost = (p->cost + 1) >> 1;
2706 if (validate_change (insn, loc,
2707 canon_reg (copy_rtx (best_elt->exp),
2716 /* If the address is a binary operation with the first operand a register
2717 and the second a constant, do the same as above, but looking for
2718 equivalences of the register. Then try to simplify before checking for
2719 the best address to use. This catches a few cases: First is when we
2720 have REG+const and the register is another REG+const. We can often merge
2721 the constants and eliminate one insn and one register. It may also be
2722 that a machine has a cheap REG+REG+const. Finally, this improves the
2723 code on the Alpha for unaligned byte stores. */
2725 if (flag_expensive_optimizations
2726 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2727 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2728 && GET_CODE (XEXP (*loc, 0)) == REG
2729 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2731 rtx c = XEXP (*loc, 1);
2734 hash = HASH (XEXP (*loc, 0), Pmode);
2735 do_not_record = save_do_not_record;
2736 hash_arg_in_memory = save_hash_arg_in_memory;
2737 hash_arg_in_struct = save_hash_arg_in_struct;
2739 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2743 /* We need to find the best (under the criteria documented above) entry
2744 in the class that is valid. We use the `flag' field to indicate
2745 choices that were invalid and iterate until we can't find a better
2746 one that hasn't already been tried. */
2748 for (p = elt->first_same_value; p; p = p->next_same_value)
2751 while (found_better)
2753 int best_addr_cost = ADDRESS_COST (*loc);
2754 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2755 struct table_elt *best_elt = elt;
2756 rtx best_rtx = *loc;
2759 /* This is at worst case an O(n^2) algorithm, so limit our search
2760 to the first 32 elements on the list. This avoids trouble
2761 compiling code with very long basic blocks that can easily
2762 call cse_gen_binary so many times that we run out of memory. */
2765 for (p = elt->first_same_value, count = 0;
2767 p = p->next_same_value, count++)
2769 && (GET_CODE (p->exp) == REG
2770 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2772 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2774 if ((ADDRESS_COST (new) < best_addr_cost
2775 || (ADDRESS_COST (new) == best_addr_cost
2776 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2779 best_addr_cost = ADDRESS_COST (new);
2780 best_rtx_cost = (COST (new) + 1) >> 1;
2788 if (validate_change (insn, loc,
2789 canon_reg (copy_rtx (best_rtx),
2800 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2801 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2802 what values are being compared.
2804 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2805 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2806 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2807 compared to produce cc0.
2809 The return value is the comparison operator and is either the code of
2810 A or the code corresponding to the inverse of the comparison. */
2812 static enum rtx_code
2813 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2816 enum machine_mode *pmode1, *pmode2;
2820 arg1 = *parg1, arg2 = *parg2;
2822 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2824 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2826 /* Set non-zero when we find something of interest. */
2828 int reverse_code = 0;
2829 struct table_elt *p = 0;
2831 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2832 On machines with CC0, this is the only case that can occur, since
2833 fold_rtx will return the COMPARE or item being compared with zero
2836 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2839 /* If ARG1 is a comparison operator and CODE is testing for
2840 STORE_FLAG_VALUE, get the inner arguments. */
2842 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2845 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2846 && code == LT && STORE_FLAG_VALUE == -1)
2847 #ifdef FLOAT_STORE_FLAG_VALUE
2848 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2849 && FLOAT_STORE_FLAG_VALUE < 0)
2854 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2855 && code == GE && STORE_FLAG_VALUE == -1)
2856 #ifdef FLOAT_STORE_FLAG_VALUE
2857 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2858 && FLOAT_STORE_FLAG_VALUE < 0)
2861 x = arg1, reverse_code = 1;
2864 /* ??? We could also check for
2866 (ne (and (eq (...) (const_int 1))) (const_int 0))
2868 and related forms, but let's wait until we see them occurring. */
2871 /* Look up ARG1 in the hash table and see if it has an equivalence
2872 that lets us see what is being compared. */
2873 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2875 if (p) p = p->first_same_value;
2877 for (; p; p = p->next_same_value)
2879 enum machine_mode inner_mode = GET_MODE (p->exp);
2881 /* If the entry isn't valid, skip it. */
2882 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2885 if (GET_CODE (p->exp) == COMPARE
2886 /* Another possibility is that this machine has a compare insn
2887 that includes the comparison code. In that case, ARG1 would
2888 be equivalent to a comparison operation that would set ARG1 to
2889 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2890 ORIG_CODE is the actual comparison being done; if it is an EQ,
2891 we must reverse ORIG_CODE. On machine with a negative value
2892 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2895 && GET_MODE_CLASS (inner_mode) == MODE_INT
2896 && (GET_MODE_BITSIZE (inner_mode)
2897 <= HOST_BITS_PER_WIDE_INT)
2898 && (STORE_FLAG_VALUE
2899 & ((HOST_WIDE_INT) 1
2900 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2901 #ifdef FLOAT_STORE_FLAG_VALUE
2903 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2904 && FLOAT_STORE_FLAG_VALUE < 0)
2907 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2912 else if ((code == EQ
2914 && GET_MODE_CLASS (inner_mode) == MODE_INT
2915 && (GET_MODE_BITSIZE (inner_mode)
2916 <= HOST_BITS_PER_WIDE_INT)
2917 && (STORE_FLAG_VALUE
2918 & ((HOST_WIDE_INT) 1
2919 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2920 #ifdef FLOAT_STORE_FLAG_VALUE
2922 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2923 && FLOAT_STORE_FLAG_VALUE < 0)
2926 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2933 /* If this is fp + constant, the equivalent is a better operand since
2934 it may let us predict the value of the comparison. */
2935 else if (NONZERO_BASE_PLUS_P (p->exp))
2942 /* If we didn't find a useful equivalence for ARG1, we are done.
2943 Otherwise, set up for the next iteration. */
2947 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2948 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2949 code = GET_CODE (x);
2952 code = reverse_condition (code);
2955 /* Return our results. Return the modes from before fold_rtx
2956 because fold_rtx might produce const_int, and then it's too late. */
2957 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2958 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2963 /* Try to simplify a unary operation CODE whose output mode is to be
2964 MODE with input operand OP whose mode was originally OP_MODE.
2965 Return zero if no simplification can be made. */
2968 simplify_unary_operation (code, mode, op, op_mode)
2970 enum machine_mode mode;
2972 enum machine_mode op_mode;
2974 register int width = GET_MODE_BITSIZE (mode);
2976 /* The order of these tests is critical so that, for example, we don't
2977 check the wrong mode (input vs. output) for a conversion operation,
2978 such as FIX. At some point, this should be simplified. */
2980 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
2982 if (code == FLOAT && GET_MODE (op) == VOIDmode
2983 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2985 HOST_WIDE_INT hv, lv;
2988 if (GET_CODE (op) == CONST_INT)
2989 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
2991 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
2993 #ifdef REAL_ARITHMETIC
2994 REAL_VALUE_FROM_INT (d, lv, hv, mode);
2998 d = (double) (~ hv);
2999 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3000 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3001 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3007 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3008 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3009 d += (double) (unsigned HOST_WIDE_INT) lv;
3011 #endif /* REAL_ARITHMETIC */
3012 d = real_value_truncate (mode, d);
3013 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3015 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3016 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3018 HOST_WIDE_INT hv, lv;
3021 if (GET_CODE (op) == CONST_INT)
3022 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3024 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3026 if (op_mode == VOIDmode)
3028 /* We don't know how to interpret negative-looking numbers in
3029 this case, so don't try to fold those. */
3033 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3036 hv = 0, lv &= GET_MODE_MASK (op_mode);
3038 #ifdef REAL_ARITHMETIC
3039 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3042 d = (double) (unsigned HOST_WIDE_INT) hv;
3043 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3044 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3045 d += (double) (unsigned HOST_WIDE_INT) lv;
3046 #endif /* REAL_ARITHMETIC */
3047 d = real_value_truncate (mode, d);
3048 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3052 if (GET_CODE (op) == CONST_INT
3053 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3055 register HOST_WIDE_INT arg0 = INTVAL (op);
3056 register HOST_WIDE_INT val;
3069 val = (arg0 >= 0 ? arg0 : - arg0);
3073 /* Don't use ffs here. Instead, get low order bit and then its
3074 number. If arg0 is zero, this will return 0, as desired. */
3075 arg0 &= GET_MODE_MASK (mode);
3076 val = exact_log2 (arg0 & (- arg0)) + 1;
3084 if (op_mode == VOIDmode)
3086 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3088 /* If we were really extending the mode,
3089 we would have to distinguish between zero-extension
3090 and sign-extension. */
3091 if (width != GET_MODE_BITSIZE (op_mode))
3095 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3096 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3102 if (op_mode == VOIDmode)
3104 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3106 /* If we were really extending the mode,
3107 we would have to distinguish between zero-extension
3108 and sign-extension. */
3109 if (width != GET_MODE_BITSIZE (op_mode))
3113 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3116 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3118 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3119 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3132 /* Clear the bits that don't belong in our mode,
3133 unless they and our sign bit are all one.
3134 So we get either a reasonable negative value or a reasonable
3135 unsigned value for this mode. */
3136 if (width < HOST_BITS_PER_WIDE_INT
3137 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3138 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3139 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3141 return GEN_INT (val);
3144 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3145 for a DImode operation on a CONST_INT. */
3146 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3147 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3149 HOST_WIDE_INT l1, h1, lv, hv;
3151 if (GET_CODE (op) == CONST_DOUBLE)
3152 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3154 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3164 neg_double (l1, h1, &lv, &hv);
3169 neg_double (l1, h1, &lv, &hv);
3177 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3179 lv = exact_log2 (l1 & (-l1)) + 1;
3183 /* This is just a change-of-mode, so do nothing. */
3188 if (op_mode == VOIDmode
3189 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3193 lv = l1 & GET_MODE_MASK (op_mode);
3197 if (op_mode == VOIDmode
3198 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3202 lv = l1 & GET_MODE_MASK (op_mode);
3203 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3204 && (lv & ((HOST_WIDE_INT) 1
3205 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3206 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3208 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3219 return immed_double_const (lv, hv, mode);
3222 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3223 else if (GET_CODE (op) == CONST_DOUBLE
3224 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3230 if (setjmp (handler))
3231 /* There used to be a warning here, but that is inadvisable.
3232 People may want to cause traps, and the natural way
3233 to do it should not get a warning. */
3236 set_float_handler (handler);
3238 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3243 d = REAL_VALUE_NEGATE (d);
3247 if (REAL_VALUE_NEGATIVE (d))
3248 d = REAL_VALUE_NEGATE (d);
3251 case FLOAT_TRUNCATE:
3252 d = real_value_truncate (mode, d);
3256 /* All this does is change the mode. */
3260 d = REAL_VALUE_RNDZINT (d);
3264 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3274 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3275 set_float_handler (NULL_PTR);
3279 else if (GET_CODE (op) == CONST_DOUBLE
3280 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3281 && GET_MODE_CLASS (mode) == MODE_INT
3282 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3288 if (setjmp (handler))
3291 set_float_handler (handler);
3293 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3298 val = REAL_VALUE_FIX (d);
3302 val = REAL_VALUE_UNSIGNED_FIX (d);
3309 set_float_handler (NULL_PTR);
3311 /* Clear the bits that don't belong in our mode,
3312 unless they and our sign bit are all one.
3313 So we get either a reasonable negative value or a reasonable
3314 unsigned value for this mode. */
3315 if (width < HOST_BITS_PER_WIDE_INT
3316 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3317 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3318 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3320 /* If this would be an entire word for the target, but is not for
3321 the host, then sign-extend on the host so that the number will look
3322 the same way on the host that it would on the target.
3324 For example, when building a 64 bit alpha hosted 32 bit sparc
3325 targeted compiler, then we want the 32 bit unsigned value -1 to be
3326 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3327 The later confuses the sparc backend. */
3329 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3330 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3331 val |= ((HOST_WIDE_INT) (-1) << width);
3333 return GEN_INT (val);
3336 /* This was formerly used only for non-IEEE float.
3337 eggert@twinsun.com says it is safe for IEEE also. */
3340 /* There are some simplifications we can do even if the operands
3346 /* (not (not X)) == X, similarly for NEG. */
3347 if (GET_CODE (op) == code)
3348 return XEXP (op, 0);
3352 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3353 becomes just the MINUS if its mode is MODE. This allows
3354 folding switch statements on machines using casesi (such as
3356 if (GET_CODE (op) == TRUNCATE
3357 && GET_MODE (XEXP (op, 0)) == mode
3358 && GET_CODE (XEXP (op, 0)) == MINUS
3359 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3360 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3361 return XEXP (op, 0);
3363 #ifdef POINTERS_EXTEND_UNSIGNED
3364 if (! POINTERS_EXTEND_UNSIGNED
3365 && mode == Pmode && GET_MODE (op) == ptr_mode
3367 return convert_memory_address (Pmode, op);
3371 #ifdef POINTERS_EXTEND_UNSIGNED
3373 if (POINTERS_EXTEND_UNSIGNED
3374 && mode == Pmode && GET_MODE (op) == ptr_mode
3376 return convert_memory_address (Pmode, op);
3388 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3389 and OP1. Return 0 if no simplification is possible.
3391 Don't use this for relational operations such as EQ or LT.
3392 Use simplify_relational_operation instead. */
3395 simplify_binary_operation (code, mode, op0, op1)
3397 enum machine_mode mode;
3400 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3402 int width = GET_MODE_BITSIZE (mode);
3405 /* Relational operations don't work here. We must know the mode
3406 of the operands in order to do the comparison correctly.
3407 Assuming a full word can give incorrect results.
3408 Consider comparing 128 with -128 in QImode. */
3410 if (GET_RTX_CLASS (code) == '<')
3413 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3414 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3415 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3416 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3418 REAL_VALUE_TYPE f0, f1, value;
3421 if (setjmp (handler))
3424 set_float_handler (handler);
3426 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3427 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3428 f0 = real_value_truncate (mode, f0);
3429 f1 = real_value_truncate (mode, f1);
3431 #ifdef REAL_ARITHMETIC
3432 #ifndef REAL_INFINITY
3433 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3436 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3450 #ifndef REAL_INFINITY
3457 value = MIN (f0, f1);
3460 value = MAX (f0, f1);
3467 value = real_value_truncate (mode, value);
3468 set_float_handler (NULL_PTR);
3469 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3471 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3473 /* We can fold some multi-word operations. */
3474 if (GET_MODE_CLASS (mode) == MODE_INT
3475 && width == HOST_BITS_PER_WIDE_INT * 2
3476 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3477 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3479 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3481 if (GET_CODE (op0) == CONST_DOUBLE)
3482 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3484 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3486 if (GET_CODE (op1) == CONST_DOUBLE)
3487 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3489 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3494 /* A - B == A + (-B). */
3495 neg_double (l2, h2, &lv, &hv);
3498 /* .. fall through ... */
3501 add_double (l1, h1, l2, h2, &lv, &hv);
3505 mul_double (l1, h1, l2, h2, &lv, &hv);
3508 case DIV: case MOD: case UDIV: case UMOD:
3509 /* We'd need to include tree.h to do this and it doesn't seem worth
3514 lv = l1 & l2, hv = h1 & h2;
3518 lv = l1 | l2, hv = h1 | h2;
3522 lv = l1 ^ l2, hv = h1 ^ h2;
3528 && ((unsigned HOST_WIDE_INT) l1
3529 < (unsigned HOST_WIDE_INT) l2)))
3538 && ((unsigned HOST_WIDE_INT) l1
3539 > (unsigned HOST_WIDE_INT) l2)))
3546 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3548 && ((unsigned HOST_WIDE_INT) l1
3549 < (unsigned HOST_WIDE_INT) l2)))
3556 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3558 && ((unsigned HOST_WIDE_INT) l1
3559 > (unsigned HOST_WIDE_INT) l2)))
3565 case LSHIFTRT: case ASHIFTRT:
3567 case ROTATE: case ROTATERT:
3568 #ifdef SHIFT_COUNT_TRUNCATED
3569 if (SHIFT_COUNT_TRUNCATED)
3570 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3573 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3576 if (code == LSHIFTRT || code == ASHIFTRT)
3577 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3579 else if (code == ASHIFT)
3580 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3581 else if (code == ROTATE)
3582 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3583 else /* code == ROTATERT */
3584 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3591 return immed_double_const (lv, hv, mode);
3594 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3595 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3597 /* Even if we can't compute a constant result,
3598 there are some cases worth simplifying. */
3603 /* In IEEE floating point, x+0 is not the same as x. Similarly
3604 for the other optimizations below. */
3605 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3606 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3609 if (op1 == CONST0_RTX (mode))
3612 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3613 if (GET_CODE (op0) == NEG)
3614 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3615 else if (GET_CODE (op1) == NEG)
3616 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3618 /* Handle both-operands-constant cases. We can only add
3619 CONST_INTs to constants since the sum of relocatable symbols
3620 can't be handled by most assemblers. Don't add CONST_INT
3621 to CONST_INT since overflow won't be computed properly if wider
3622 than HOST_BITS_PER_WIDE_INT. */
3624 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3625 && GET_CODE (op1) == CONST_INT)
3626 return plus_constant (op0, INTVAL (op1));
3627 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3628 && GET_CODE (op0) == CONST_INT)
3629 return plus_constant (op1, INTVAL (op0));
3631 /* See if this is something like X * C - X or vice versa or
3632 if the multiplication is written as a shift. If so, we can
3633 distribute and make a new multiply, shift, or maybe just
3634 have X (if C is 2 in the example above). But don't make
3635 real multiply if we didn't have one before. */
3637 if (! FLOAT_MODE_P (mode))
3639 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3640 rtx lhs = op0, rhs = op1;
3643 if (GET_CODE (lhs) == NEG)
3644 coeff0 = -1, lhs = XEXP (lhs, 0);
3645 else if (GET_CODE (lhs) == MULT
3646 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3648 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3651 else if (GET_CODE (lhs) == ASHIFT
3652 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3653 && INTVAL (XEXP (lhs, 1)) >= 0
3654 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3656 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3657 lhs = XEXP (lhs, 0);
3660 if (GET_CODE (rhs) == NEG)
3661 coeff1 = -1, rhs = XEXP (rhs, 0);
3662 else if (GET_CODE (rhs) == MULT
3663 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3665 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3668 else if (GET_CODE (rhs) == ASHIFT
3669 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3670 && INTVAL (XEXP (rhs, 1)) >= 0
3671 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3673 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3674 rhs = XEXP (rhs, 0);
3677 if (rtx_equal_p (lhs, rhs))
3679 tem = cse_gen_binary (MULT, mode, lhs,
3680 GEN_INT (coeff0 + coeff1));
3681 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3685 /* If one of the operands is a PLUS or a MINUS, see if we can
3686 simplify this by the associative law.
3687 Don't use the associative law for floating point.
3688 The inaccuracy makes it nonassociative,
3689 and subtle programs can break if operations are associated. */
3691 if (INTEGRAL_MODE_P (mode)
3692 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3693 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3694 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3700 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3701 using cc0, in which case we want to leave it as a COMPARE
3702 so we can distinguish it from a register-register-copy.
3704 In IEEE floating point, x-0 is not the same as x. */
3706 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3707 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3708 && op1 == CONST0_RTX (mode))
3711 /* Do nothing here. */
3716 /* None of these optimizations can be done for IEEE
3718 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3719 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3722 /* We can't assume x-x is 0 even with non-IEEE floating point,
3723 but since it is zero except in very strange circumstances, we
3724 will treat it as zero with -ffast-math. */
3725 if (rtx_equal_p (op0, op1)
3726 && ! side_effects_p (op0)
3727 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3728 return CONST0_RTX (mode);
3730 /* Change subtraction from zero into negation. */
3731 if (op0 == CONST0_RTX (mode))
3732 return gen_rtx_NEG (mode, op1);
3734 /* (-1 - a) is ~a. */
3735 if (op0 == constm1_rtx)
3736 return gen_rtx_NOT (mode, op1);
3738 /* Subtracting 0 has no effect. */
3739 if (op1 == CONST0_RTX (mode))
3742 /* See if this is something like X * C - X or vice versa or
3743 if the multiplication is written as a shift. If so, we can
3744 distribute and make a new multiply, shift, or maybe just
3745 have X (if C is 2 in the example above). But don't make
3746 real multiply if we didn't have one before. */
3748 if (! FLOAT_MODE_P (mode))
3750 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3751 rtx lhs = op0, rhs = op1;
3754 if (GET_CODE (lhs) == NEG)
3755 coeff0 = -1, lhs = XEXP (lhs, 0);
3756 else if (GET_CODE (lhs) == MULT
3757 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3759 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3762 else if (GET_CODE (lhs) == ASHIFT
3763 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3764 && INTVAL (XEXP (lhs, 1)) >= 0
3765 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3767 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3768 lhs = XEXP (lhs, 0);
3771 if (GET_CODE (rhs) == NEG)
3772 coeff1 = - 1, rhs = XEXP (rhs, 0);
3773 else if (GET_CODE (rhs) == MULT
3774 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3776 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3779 else if (GET_CODE (rhs) == ASHIFT
3780 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3781 && INTVAL (XEXP (rhs, 1)) >= 0
3782 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3784 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3785 rhs = XEXP (rhs, 0);
3788 if (rtx_equal_p (lhs, rhs))
3790 tem = cse_gen_binary (MULT, mode, lhs,
3791 GEN_INT (coeff0 - coeff1));
3792 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3796 /* (a - (-b)) -> (a + b). */
3797 if (GET_CODE (op1) == NEG)
3798 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3800 /* If one of the operands is a PLUS or a MINUS, see if we can
3801 simplify this by the associative law.
3802 Don't use the associative law for floating point.
3803 The inaccuracy makes it nonassociative,
3804 and subtle programs can break if operations are associated. */
3806 if (INTEGRAL_MODE_P (mode)
3807 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3808 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3809 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3812 /* Don't let a relocatable value get a negative coeff. */
3813 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3814 return plus_constant (op0, - INTVAL (op1));
3816 /* (x - (x & y)) -> (x & ~y) */
3817 if (GET_CODE (op1) == AND)
3819 if (rtx_equal_p (op0, XEXP (op1, 0)))
3820 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
3821 if (rtx_equal_p (op0, XEXP (op1, 1)))
3822 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
3827 if (op1 == constm1_rtx)
3829 tem = simplify_unary_operation (NEG, mode, op0, mode);
3831 return tem ? tem : gen_rtx_NEG (mode, op0);
3834 /* In IEEE floating point, x*0 is not always 0. */
3835 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3836 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3837 && op1 == CONST0_RTX (mode)
3838 && ! side_effects_p (op0))
3841 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3842 However, ANSI says we can drop signals,
3843 so we can do this anyway. */
3844 if (op1 == CONST1_RTX (mode))
3847 /* Convert multiply by constant power of two into shift unless
3848 we are still generating RTL. This test is a kludge. */
3849 if (GET_CODE (op1) == CONST_INT
3850 && (val = exact_log2 (INTVAL (op1))) >= 0
3851 /* If the mode is larger than the host word size, and the
3852 uppermost bit is set, then this isn't a power of two due
3853 to implicit sign extension. */
3854 && (width <= HOST_BITS_PER_WIDE_INT
3855 || val != HOST_BITS_PER_WIDE_INT - 1)
3856 && ! rtx_equal_function_value_matters)
3857 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
3859 if (GET_CODE (op1) == CONST_DOUBLE
3860 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3864 int op1is2, op1ism1;
3866 if (setjmp (handler))
3869 set_float_handler (handler);
3870 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3871 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3872 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3873 set_float_handler (NULL_PTR);
3875 /* x*2 is x+x and x*(-1) is -x */
3876 if (op1is2 && GET_MODE (op0) == mode)
3877 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
3879 else if (op1ism1 && GET_MODE (op0) == mode)
3880 return gen_rtx_NEG (mode, op0);
3885 if (op1 == const0_rtx)
3887 if (GET_CODE (op1) == CONST_INT
3888 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3890 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3892 /* A | (~A) -> -1 */
3893 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3894 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3895 && ! side_effects_p (op0)
3896 && GET_MODE_CLASS (mode) != MODE_CC)
3901 if (op1 == const0_rtx)
3903 if (GET_CODE (op1) == CONST_INT
3904 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3905 return gen_rtx_NOT (mode, op0);
3906 if (op0 == op1 && ! side_effects_p (op0)
3907 && GET_MODE_CLASS (mode) != MODE_CC)
3912 if (op1 == const0_rtx && ! side_effects_p (op0))
3914 if (GET_CODE (op1) == CONST_INT
3915 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3917 if (op0 == op1 && ! side_effects_p (op0)
3918 && GET_MODE_CLASS (mode) != MODE_CC)
3921 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3922 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3923 && ! side_effects_p (op0)
3924 && GET_MODE_CLASS (mode) != MODE_CC)
3929 /* Convert divide by power of two into shift (divide by 1 handled
3931 if (GET_CODE (op1) == CONST_INT
3932 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3933 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
3935 /* ... fall through ... */
3938 if (op1 == CONST1_RTX (mode))
3941 /* In IEEE floating point, 0/x is not always 0. */
3942 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3943 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3944 && op0 == CONST0_RTX (mode)
3945 && ! side_effects_p (op1))
3948 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3949 /* Change division by a constant into multiplication. Only do
3950 this with -ffast-math until an expert says it is safe in
3952 else if (GET_CODE (op1) == CONST_DOUBLE
3953 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3954 && op1 != CONST0_RTX (mode)
3958 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3960 if (! REAL_VALUES_EQUAL (d, dconst0))
3962 #if defined (REAL_ARITHMETIC)
3963 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
3964 return gen_rtx_MULT (mode, op0,
3965 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3967 return gen_rtx_MULT (mode, op0,
3968 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3976 /* Handle modulus by power of two (mod with 1 handled below). */
3977 if (GET_CODE (op1) == CONST_INT
3978 && exact_log2 (INTVAL (op1)) > 0)
3979 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
3981 /* ... fall through ... */
3984 if ((op0 == const0_rtx || op1 == const1_rtx)
3985 && ! side_effects_p (op0) && ! side_effects_p (op1))
3991 /* Rotating ~0 always results in ~0. */
3992 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
3993 && INTVAL (op0) == GET_MODE_MASK (mode)
3994 && ! side_effects_p (op1))
3997 /* ... fall through ... */
4002 if (op1 == const0_rtx)
4004 if (op0 == const0_rtx && ! side_effects_p (op1))
4009 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4010 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4011 && ! side_effects_p (op0))
4013 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4018 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4020 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4021 && ! side_effects_p (op0))
4023 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4028 if (op1 == const0_rtx && ! side_effects_p (op0))
4030 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4035 if (op1 == constm1_rtx && ! side_effects_p (op0))
4037 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4048 /* Get the integer argument values in two forms:
4049 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4051 arg0 = INTVAL (op0);
4052 arg1 = INTVAL (op1);
4054 if (width < HOST_BITS_PER_WIDE_INT)
4056 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4057 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4060 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4061 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4064 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4065 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4073 /* Compute the value of the arithmetic. */
4078 val = arg0s + arg1s;
4082 val = arg0s - arg1s;
4086 val = arg0s * arg1s;
4092 val = arg0s / arg1s;
4098 val = arg0s % arg1s;
4104 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4110 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4126 /* If shift count is undefined, don't fold it; let the machine do
4127 what it wants. But truncate it if the machine will do that. */
4131 #ifdef SHIFT_COUNT_TRUNCATED
4132 if (SHIFT_COUNT_TRUNCATED)
4136 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4143 #ifdef SHIFT_COUNT_TRUNCATED
4144 if (SHIFT_COUNT_TRUNCATED)
4148 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4155 #ifdef SHIFT_COUNT_TRUNCATED
4156 if (SHIFT_COUNT_TRUNCATED)
4160 val = arg0s >> arg1;
4162 /* Bootstrap compiler may not have sign extended the right shift.
4163 Manually extend the sign to insure bootstrap cc matches gcc. */
4164 if (arg0s < 0 && arg1 > 0)
4165 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4174 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4175 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4183 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4184 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4188 /* Do nothing here. */
4192 val = arg0s <= arg1s ? arg0s : arg1s;
4196 val = ((unsigned HOST_WIDE_INT) arg0
4197 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4201 val = arg0s > arg1s ? arg0s : arg1s;
4205 val = ((unsigned HOST_WIDE_INT) arg0
4206 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4213 /* Clear the bits that don't belong in our mode, unless they and our sign
4214 bit are all one. So we get either a reasonable negative value or a
4215 reasonable unsigned value for this mode. */
4216 if (width < HOST_BITS_PER_WIDE_INT
4217 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4218 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4219 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4221 /* If this would be an entire word for the target, but is not for
4222 the host, then sign-extend on the host so that the number will look
4223 the same way on the host that it would on the target.
4225 For example, when building a 64 bit alpha hosted 32 bit sparc
4226 targeted compiler, then we want the 32 bit unsigned value -1 to be
4227 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4228 The later confuses the sparc backend. */
4230 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4231 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4232 val |= ((HOST_WIDE_INT) (-1) << width);
4234 return GEN_INT (val);
4237 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4240 Rather than test for specific case, we do this by a brute-force method
4241 and do all possible simplifications until no more changes occur. Then
4242 we rebuild the operation. */
4245 simplify_plus_minus (code, mode, op0, op1)
4247 enum machine_mode mode;
4253 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4254 int first = 1, negate = 0, changed;
4257 bzero ((char *) ops, sizeof ops);
4259 /* Set up the two operands and then expand them until nothing has been
4260 changed. If we run out of room in our array, give up; this should
4261 almost never happen. */
4263 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4270 for (i = 0; i < n_ops; i++)
4271 switch (GET_CODE (ops[i]))
4278 ops[n_ops] = XEXP (ops[i], 1);
4279 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4280 ops[i] = XEXP (ops[i], 0);
4286 ops[i] = XEXP (ops[i], 0);
4287 negs[i] = ! negs[i];
4292 ops[i] = XEXP (ops[i], 0);
4298 /* ~a -> (-a - 1) */
4301 ops[n_ops] = constm1_rtx;
4302 negs[n_ops++] = negs[i];
4303 ops[i] = XEXP (ops[i], 0);
4304 negs[i] = ! negs[i];
4311 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4319 /* If we only have two operands, we can't do anything. */
4323 /* Now simplify each pair of operands until nothing changes. The first
4324 time through just simplify constants against each other. */
4331 for (i = 0; i < n_ops - 1; i++)
4332 for (j = i + 1; j < n_ops; j++)
4333 if (ops[i] != 0 && ops[j] != 0
4334 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4336 rtx lhs = ops[i], rhs = ops[j];
4337 enum rtx_code ncode = PLUS;
4339 if (negs[i] && ! negs[j])
4340 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4341 else if (! negs[i] && negs[j])
4344 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4347 ops[i] = tem, ops[j] = 0;
4348 negs[i] = negs[i] && negs[j];
4349 if (GET_CODE (tem) == NEG)
4350 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4352 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4353 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4361 /* Pack all the operands to the lower-numbered entries and give up if
4362 we didn't reduce the number of operands we had. Make sure we
4363 count a CONST as two operands. If we have the same number of
4364 operands, but have made more CONSTs than we had, this is also
4365 an improvement, so accept it. */
4367 for (i = 0, j = 0; j < n_ops; j++)
4370 ops[i] = ops[j], negs[i++] = negs[j];
4371 if (GET_CODE (ops[j]) == CONST)
4375 if (i + n_consts > input_ops
4376 || (i + n_consts == input_ops && n_consts <= input_consts))
4381 /* If we have a CONST_INT, put it last. */
4382 for (i = 0; i < n_ops - 1; i++)
4383 if (GET_CODE (ops[i]) == CONST_INT)
4385 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4386 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4389 /* Put a non-negated operand first. If there aren't any, make all
4390 operands positive and negate the whole thing later. */
4391 for (i = 0; i < n_ops && negs[i]; i++)
4396 for (i = 0; i < n_ops; i++)
4402 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4403 j = negs[0], negs[0] = negs[i], negs[i] = j;
4406 /* Now make the result by performing the requested operations. */
4408 for (i = 1; i < n_ops; i++)
4409 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4411 return negate ? gen_rtx_NEG (mode, result) : result;
4414 /* Make a binary operation by properly ordering the operands and
4415 seeing if the expression folds. */
4418 cse_gen_binary (code, mode, op0, op1)
4420 enum machine_mode mode;
4425 /* Put complex operands first and constants second if commutative. */
4426 if (GET_RTX_CLASS (code) == 'c'
4427 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4428 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4429 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4430 || (GET_CODE (op0) == SUBREG
4431 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4432 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4433 tem = op0, op0 = op1, op1 = tem;
4435 /* If this simplifies, do it. */
4436 tem = simplify_binary_operation (code, mode, op0, op1);
4441 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4442 just form the operation. */
4444 if (code == PLUS && GET_CODE (op1) == CONST_INT
4445 && GET_MODE (op0) != VOIDmode)
4446 return plus_constant (op0, INTVAL (op1));
4447 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4448 && GET_MODE (op0) != VOIDmode)
4449 return plus_constant (op0, - INTVAL (op1));
4451 return gen_rtx_fmt_ee (code, mode, op0, op1);
4454 /* Like simplify_binary_operation except used for relational operators.
4455 MODE is the mode of the operands, not that of the result. If MODE
4456 is VOIDmode, both operands must also be VOIDmode and we compare the
4457 operands in "infinite precision".
4459 If no simplification is possible, this function returns zero. Otherwise,
4460 it returns either const_true_rtx or const0_rtx. */
4463 simplify_relational_operation (code, mode, op0, op1)
4465 enum machine_mode mode;
4468 int equal, op0lt, op0ltu, op1lt, op1ltu;
4471 /* If op0 is a compare, extract the comparison arguments from it. */
4472 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4473 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4475 /* We can't simplify MODE_CC values since we don't know what the
4476 actual comparison is. */
4477 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4484 /* For integer comparisons of A and B maybe we can simplify A - B and can
4485 then simplify a comparison of that with zero. If A and B are both either
4486 a register or a CONST_INT, this can't help; testing for these cases will
4487 prevent infinite recursion here and speed things up.
4489 If CODE is an unsigned comparison, then we can never do this optimization,
4490 because it gives an incorrect result if the subtraction wraps around zero.
4491 ANSI C defines unsigned operations such that they never overflow, and
4492 thus such cases can not be ignored. */
4494 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4495 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4496 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4497 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4498 && code != GTU && code != GEU && code != LTU && code != LEU)
4499 return simplify_relational_operation (signed_condition (code),
4500 mode, tem, const0_rtx);
4502 /* For non-IEEE floating-point, if the two operands are equal, we know the
4504 if (rtx_equal_p (op0, op1)
4505 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4506 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4507 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4509 /* If the operands are floating-point constants, see if we can fold
4511 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4512 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4513 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4515 REAL_VALUE_TYPE d0, d1;
4518 if (setjmp (handler))
4521 set_float_handler (handler);
4522 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4523 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4524 equal = REAL_VALUES_EQUAL (d0, d1);
4525 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4526 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4527 set_float_handler (NULL_PTR);
4529 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4531 /* Otherwise, see if the operands are both integers. */
4532 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4533 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4534 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4536 int width = GET_MODE_BITSIZE (mode);
4537 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4538 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4540 /* Get the two words comprising each integer constant. */
4541 if (GET_CODE (op0) == CONST_DOUBLE)
4543 l0u = l0s = CONST_DOUBLE_LOW (op0);
4544 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4548 l0u = l0s = INTVAL (op0);
4549 h0u = h0s = l0s < 0 ? -1 : 0;
4552 if (GET_CODE (op1) == CONST_DOUBLE)
4554 l1u = l1s = CONST_DOUBLE_LOW (op1);
4555 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4559 l1u = l1s = INTVAL (op1);
4560 h1u = h1s = l1s < 0 ? -1 : 0;
4563 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4564 we have to sign or zero-extend the values. */
4565 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4566 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4568 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4570 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4571 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4573 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4574 l0s |= ((HOST_WIDE_INT) (-1) << width);
4576 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4577 l1s |= ((HOST_WIDE_INT) (-1) << width);
4580 equal = (h0u == h1u && l0u == l1u);
4581 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4582 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4583 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4584 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4587 /* Otherwise, there are some code-specific tests we can make. */
4593 /* References to the frame plus a constant or labels cannot
4594 be zero, but a SYMBOL_REF can due to #pragma weak. */
4595 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4596 || GET_CODE (op0) == LABEL_REF)
4597 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4598 /* On some machines, the ap reg can be 0 sometimes. */
4599 && op0 != arg_pointer_rtx
4606 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4607 || GET_CODE (op0) == LABEL_REF)
4608 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4609 && op0 != arg_pointer_rtx
4612 return const_true_rtx;
4616 /* Unsigned values are never negative. */
4617 if (op1 == const0_rtx)
4618 return const_true_rtx;
4622 if (op1 == const0_rtx)
4627 /* Unsigned values are never greater than the largest
4629 if (GET_CODE (op1) == CONST_INT
4630 && INTVAL (op1) == GET_MODE_MASK (mode)
4631 && INTEGRAL_MODE_P (mode))
4632 return const_true_rtx;
4636 if (GET_CODE (op1) == CONST_INT
4637 && INTVAL (op1) == GET_MODE_MASK (mode)
4638 && INTEGRAL_MODE_P (mode))
4649 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4654 return equal ? const_true_rtx : const0_rtx;
4656 return ! equal ? const_true_rtx : const0_rtx;
4658 return op0lt ? const_true_rtx : const0_rtx;
4660 return op1lt ? const_true_rtx : const0_rtx;
4662 return op0ltu ? const_true_rtx : const0_rtx;
4664 return op1ltu ? const_true_rtx : const0_rtx;
4666 return equal || op0lt ? const_true_rtx : const0_rtx;
4668 return equal || op1lt ? const_true_rtx : const0_rtx;
4670 return equal || op0ltu ? const_true_rtx : const0_rtx;
4672 return equal || op1ltu ? const_true_rtx : const0_rtx;
4678 /* Simplify CODE, an operation with result mode MODE and three operands,
4679 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4680 a constant. Return 0 if no simplifications is possible. */
4683 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4685 enum machine_mode mode, op0_mode;
4688 int width = GET_MODE_BITSIZE (mode);
4690 /* VOIDmode means "infinite" precision. */
4692 width = HOST_BITS_PER_WIDE_INT;
4698 if (GET_CODE (op0) == CONST_INT
4699 && GET_CODE (op1) == CONST_INT
4700 && GET_CODE (op2) == CONST_INT
4701 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4702 && width <= HOST_BITS_PER_WIDE_INT)
4704 /* Extracting a bit-field from a constant */
4705 HOST_WIDE_INT val = INTVAL (op0);
4707 if (BITS_BIG_ENDIAN)
4708 val >>= (GET_MODE_BITSIZE (op0_mode)
4709 - INTVAL (op2) - INTVAL (op1));
4711 val >>= INTVAL (op2);
4713 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4715 /* First zero-extend. */
4716 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4717 /* If desired, propagate sign bit. */
4718 if (code == SIGN_EXTRACT
4719 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4720 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4723 /* Clear the bits that don't belong in our mode,
4724 unless they and our sign bit are all one.
4725 So we get either a reasonable negative value or a reasonable
4726 unsigned value for this mode. */
4727 if (width < HOST_BITS_PER_WIDE_INT
4728 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4729 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4730 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4732 return GEN_INT (val);
4737 if (GET_CODE (op0) == CONST_INT)
4738 return op0 != const0_rtx ? op1 : op2;
4740 /* Convert a == b ? b : a to "a". */
4741 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
4742 && rtx_equal_p (XEXP (op0, 0), op1)
4743 && rtx_equal_p (XEXP (op0, 1), op2))
4745 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
4746 && rtx_equal_p (XEXP (op0, 1), op1)
4747 && rtx_equal_p (XEXP (op0, 0), op2))
4749 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
4752 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
4753 XEXP (op0, 0), XEXP (op0, 1));
4754 /* See if any simplifications were possible. */
4755 if (temp == const0_rtx)
4757 else if (temp == const1_rtx)
4769 /* If X is a nontrivial arithmetic operation on an argument
4770 for which a constant value can be determined, return
4771 the result of operating on that value, as a constant.
4772 Otherwise, return X, possibly with one or more operands
4773 modified by recursive calls to this function.
4775 If X is a register whose contents are known, we do NOT
4776 return those contents here. equiv_constant is called to
4779 INSN is the insn that we may be modifying. If it is 0, make a copy
4780 of X before modifying it. */
4787 register enum rtx_code code;
4788 register enum machine_mode mode;
4795 /* Folded equivalents of first two operands of X. */
4799 /* Constant equivalents of first three operands of X;
4800 0 when no such equivalent is known. */
4805 /* The mode of the first operand of X. We need this for sign and zero
4807 enum machine_mode mode_arg0;
4812 mode = GET_MODE (x);
4813 code = GET_CODE (x);
4822 /* No use simplifying an EXPR_LIST
4823 since they are used only for lists of args
4824 in a function call's REG_EQUAL note. */
4826 /* Changing anything inside an ADDRESSOF is incorrect; we don't
4827 want to (e.g.,) make (addressof (const_int 0)) just because
4828 the location is known to be zero. */
4834 return prev_insn_cc0;
4838 /* If the next insn is a CODE_LABEL followed by a jump table,
4839 PC's value is a LABEL_REF pointing to that label. That
4840 lets us fold switch statements on the Vax. */
4841 if (insn && GET_CODE (insn) == JUMP_INSN)
4843 rtx next = next_nonnote_insn (insn);
4845 if (next && GET_CODE (next) == CODE_LABEL
4846 && NEXT_INSN (next) != 0
4847 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4848 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4849 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4850 return gen_rtx_LABEL_REF (Pmode, next);
4855 /* See if we previously assigned a constant value to this SUBREG. */
4856 if ((new = lookup_as_function (x, CONST_INT)) != 0
4857 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4860 /* If this is a paradoxical SUBREG, we have no idea what value the
4861 extra bits would have. However, if the operand is equivalent
4862 to a SUBREG whose operand is the same as our mode, and all the
4863 modes are within a word, we can just use the inner operand
4864 because these SUBREGs just say how to treat the register.
4866 Similarly if we find an integer constant. */
4868 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4870 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4871 struct table_elt *elt;
4873 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4874 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4875 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4877 for (elt = elt->first_same_value;
4878 elt; elt = elt->next_same_value)
4880 if (CONSTANT_P (elt->exp)
4881 && GET_MODE (elt->exp) == VOIDmode)
4884 if (GET_CODE (elt->exp) == SUBREG
4885 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4886 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4887 return copy_rtx (SUBREG_REG (elt->exp));
4893 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4894 We might be able to if the SUBREG is extracting a single word in an
4895 integral mode or extracting the low part. */
4897 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4898 const_arg0 = equiv_constant (folded_arg0);
4900 folded_arg0 = const_arg0;
4902 if (folded_arg0 != SUBREG_REG (x))
4906 if (GET_MODE_CLASS (mode) == MODE_INT
4907 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4908 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4909 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4910 GET_MODE (SUBREG_REG (x)));
4911 if (new == 0 && subreg_lowpart_p (x))
4912 new = gen_lowpart_if_possible (mode, folded_arg0);
4917 /* If this is a narrowing SUBREG and our operand is a REG, see if
4918 we can find an equivalence for REG that is an arithmetic operation
4919 in a wider mode where both operands are paradoxical SUBREGs
4920 from objects of our result mode. In that case, we couldn't report
4921 an equivalent value for that operation, since we don't know what the
4922 extra bits will be. But we can find an equivalence for this SUBREG
4923 by folding that operation is the narrow mode. This allows us to
4924 fold arithmetic in narrow modes when the machine only supports
4925 word-sized arithmetic.
4927 Also look for a case where we have a SUBREG whose operand is the
4928 same as our result. If both modes are smaller than a word, we
4929 are simply interpreting a register in different modes and we
4930 can use the inner value. */
4932 if (GET_CODE (folded_arg0) == REG
4933 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4934 && subreg_lowpart_p (x))
4936 struct table_elt *elt;
4938 /* We can use HASH here since we know that canon_hash won't be
4940 elt = lookup (folded_arg0,
4941 HASH (folded_arg0, GET_MODE (folded_arg0)),
4942 GET_MODE (folded_arg0));
4945 elt = elt->first_same_value;
4947 for (; elt; elt = elt->next_same_value)
4949 enum rtx_code eltcode = GET_CODE (elt->exp);
4951 /* Just check for unary and binary operations. */
4952 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4953 && GET_CODE (elt->exp) != SIGN_EXTEND
4954 && GET_CODE (elt->exp) != ZERO_EXTEND
4955 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4956 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4958 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4960 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4961 op0 = fold_rtx (op0, NULL_RTX);
4963 op0 = equiv_constant (op0);
4965 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4968 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4969 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4970 && eltcode != DIV && eltcode != MOD
4971 && eltcode != UDIV && eltcode != UMOD
4972 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4973 && eltcode != ROTATE && eltcode != ROTATERT
4974 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4975 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4977 || CONSTANT_P (XEXP (elt->exp, 0)))
4978 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4979 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4981 || CONSTANT_P (XEXP (elt->exp, 1))))
4983 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4984 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4986 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4987 op0 = fold_rtx (op0, NULL_RTX);
4990 op0 = equiv_constant (op0);
4992 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
4993 op1 = fold_rtx (op1, NULL_RTX);
4996 op1 = equiv_constant (op1);
4998 /* If we are looking for the low SImode part of
4999 (ashift:DI c (const_int 32)), it doesn't work
5000 to compute that in SImode, because a 32-bit shift
5001 in SImode is unpredictable. We know the value is 0. */
5003 && GET_CODE (elt->exp) == ASHIFT
5004 && GET_CODE (op1) == CONST_INT
5005 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5007 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5009 /* If the count fits in the inner mode's width,
5010 but exceeds the outer mode's width,
5011 the value will get truncated to 0
5015 /* If the count exceeds even the inner mode's width,
5016 don't fold this expression. */
5019 else if (op0 && op1)
5020 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5024 else if (GET_CODE (elt->exp) == SUBREG
5025 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5026 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5028 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5029 new = copy_rtx (SUBREG_REG (elt->exp));
5040 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5041 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5042 new = lookup_as_function (XEXP (x, 0), code);
5044 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5048 /* If we are not actually processing an insn, don't try to find the
5049 best address. Not only don't we care, but we could modify the
5050 MEM in an invalid way since we have no insn to validate against. */
5052 find_best_addr (insn, &XEXP (x, 0));
5055 /* Even if we don't fold in the insn itself,
5056 we can safely do so here, in hopes of getting a constant. */
5057 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5059 HOST_WIDE_INT offset = 0;
5061 if (GET_CODE (addr) == REG
5062 && REGNO_QTY_VALID_P (REGNO (addr))
5063 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
5064 && qty_const[reg_qty[REGNO (addr)]] != 0)
5065 addr = qty_const[reg_qty[REGNO (addr)]];
5067 /* If address is constant, split it into a base and integer offset. */
5068 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5070 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5071 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5073 base = XEXP (XEXP (addr, 0), 0);
5074 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5076 else if (GET_CODE (addr) == LO_SUM
5077 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5078 base = XEXP (addr, 1);
5079 else if (GET_CODE (addr) == ADDRESSOF)
5080 return change_address (x, VOIDmode, addr);
5082 /* If this is a constant pool reference, we can fold it into its
5083 constant to allow better value tracking. */
5084 if (base && GET_CODE (base) == SYMBOL_REF
5085 && CONSTANT_POOL_ADDRESS_P (base))
5087 rtx constant = get_pool_constant (base);
5088 enum machine_mode const_mode = get_pool_mode (base);
5091 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5092 constant_pool_entries_cost = COST (constant);
5094 /* If we are loading the full constant, we have an equivalence. */
5095 if (offset == 0 && mode == const_mode)
5098 /* If this actually isn't a constant (weird!), we can't do
5099 anything. Otherwise, handle the two most common cases:
5100 extracting a word from a multi-word constant, and extracting
5101 the low-order bits. Other cases don't seem common enough to
5103 if (! CONSTANT_P (constant))
5106 if (GET_MODE_CLASS (mode) == MODE_INT
5107 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5108 && offset % UNITS_PER_WORD == 0
5109 && (new = operand_subword (constant,
5110 offset / UNITS_PER_WORD,
5111 0, const_mode)) != 0)
5114 if (((BYTES_BIG_ENDIAN
5115 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5116 || (! BYTES_BIG_ENDIAN && offset == 0))
5117 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5121 /* If this is a reference to a label at a known position in a jump
5122 table, we also know its value. */
5123 if (base && GET_CODE (base) == LABEL_REF)
5125 rtx label = XEXP (base, 0);
5126 rtx table_insn = NEXT_INSN (label);
5128 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5129 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5131 rtx table = PATTERN (table_insn);
5134 && (offset / GET_MODE_SIZE (GET_MODE (table))
5135 < XVECLEN (table, 0)))
5136 return XVECEXP (table, 0,
5137 offset / GET_MODE_SIZE (GET_MODE (table)));
5139 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5140 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5142 rtx table = PATTERN (table_insn);
5145 && (offset / GET_MODE_SIZE (GET_MODE (table))
5146 < XVECLEN (table, 1)))
5148 offset /= GET_MODE_SIZE (GET_MODE (table));
5149 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5152 if (GET_MODE (table) != Pmode)
5153 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5155 /* Indicate this is a constant. This isn't a
5156 valid form of CONST, but it will only be used
5157 to fold the next insns and then discarded, so
5158 it should be safe. */
5159 return gen_rtx_CONST (GET_MODE (new), new);
5168 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5169 validate_change (insn, &XVECEXP (x, 3, i),
5170 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5180 mode_arg0 = VOIDmode;
5182 /* Try folding our operands.
5183 Then see which ones have constant values known. */
5185 fmt = GET_RTX_FORMAT (code);
5186 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5189 rtx arg = XEXP (x, i);
5190 rtx folded_arg = arg, const_arg = 0;
5191 enum machine_mode mode_arg = GET_MODE (arg);
5192 rtx cheap_arg, expensive_arg;
5193 rtx replacements[2];
5196 /* Most arguments are cheap, so handle them specially. */
5197 switch (GET_CODE (arg))
5200 /* This is the same as calling equiv_constant; it is duplicated
5202 if (REGNO_QTY_VALID_P (REGNO (arg))
5203 && qty_const[reg_qty[REGNO (arg)]] != 0
5204 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5205 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5207 = gen_lowpart_if_possible (GET_MODE (arg),
5208 qty_const[reg_qty[REGNO (arg)]]);
5221 folded_arg = prev_insn_cc0;
5222 mode_arg = prev_insn_cc0_mode;
5223 const_arg = equiv_constant (folded_arg);
5228 folded_arg = fold_rtx (arg, insn);
5229 const_arg = equiv_constant (folded_arg);
5232 /* For the first three operands, see if the operand
5233 is constant or equivalent to a constant. */
5237 folded_arg0 = folded_arg;
5238 const_arg0 = const_arg;
5239 mode_arg0 = mode_arg;
5242 folded_arg1 = folded_arg;
5243 const_arg1 = const_arg;
5246 const_arg2 = const_arg;
5250 /* Pick the least expensive of the folded argument and an
5251 equivalent constant argument. */
5252 if (const_arg == 0 || const_arg == folded_arg
5253 || COST (const_arg) > COST (folded_arg))
5254 cheap_arg = folded_arg, expensive_arg = const_arg;
5256 cheap_arg = const_arg, expensive_arg = folded_arg;
5258 /* Try to replace the operand with the cheapest of the two
5259 possibilities. If it doesn't work and this is either of the first
5260 two operands of a commutative operation, try swapping them.
5261 If THAT fails, try the more expensive, provided it is cheaper
5262 than what is already there. */
5264 if (cheap_arg == XEXP (x, i))
5267 if (insn == 0 && ! copied)
5273 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5275 j < 2 && replacements[j]
5276 && COST (replacements[j]) < COST (XEXP (x, i));
5279 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5282 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5284 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5285 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5287 if (apply_change_group ())
5289 /* Swap them back to be invalid so that this loop can
5290 continue and flag them to be swapped back later. */
5293 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5305 /* Don't try to fold inside of a vector of expressions.
5306 Doing nothing is harmless. */
5310 /* If a commutative operation, place a constant integer as the second
5311 operand unless the first operand is also a constant integer. Otherwise,
5312 place any constant second unless the first operand is also a constant. */
5314 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5316 if (must_swap || (const_arg0
5318 || (GET_CODE (const_arg0) == CONST_INT
5319 && GET_CODE (const_arg1) != CONST_INT))))
5321 register rtx tem = XEXP (x, 0);
5323 if (insn == 0 && ! copied)
5329 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5330 validate_change (insn, &XEXP (x, 1), tem, 1);
5331 if (apply_change_group ())
5333 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5334 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5339 /* If X is an arithmetic operation, see if we can simplify it. */
5341 switch (GET_RTX_CLASS (code))
5347 /* We can't simplify extension ops unless we know the
5349 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5350 && mode_arg0 == VOIDmode)
5353 /* If we had a CONST, strip it off and put it back later if we
5355 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5356 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5358 new = simplify_unary_operation (code, mode,
5359 const_arg0 ? const_arg0 : folded_arg0,
5361 if (new != 0 && is_const)
5362 new = gen_rtx_CONST (mode, new);
5367 /* See what items are actually being compared and set FOLDED_ARG[01]
5368 to those values and CODE to the actual comparison code. If any are
5369 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5370 do anything if both operands are already known to be constant. */
5372 if (const_arg0 == 0 || const_arg1 == 0)
5374 struct table_elt *p0, *p1;
5375 rtx true = const_true_rtx, false = const0_rtx;
5376 enum machine_mode mode_arg1;
5378 #ifdef FLOAT_STORE_FLAG_VALUE
5379 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5381 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5383 false = CONST0_RTX (mode);
5387 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5388 &mode_arg0, &mode_arg1);
5389 const_arg0 = equiv_constant (folded_arg0);
5390 const_arg1 = equiv_constant (folded_arg1);
5392 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5393 what kinds of things are being compared, so we can't do
5394 anything with this comparison. */
5396 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5399 /* If we do not now have two constants being compared, see
5400 if we can nevertheless deduce some things about the
5402 if (const_arg0 == 0 || const_arg1 == 0)
5404 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5405 non-explicit constant? These aren't zero, but we
5406 don't know their sign. */
5407 if (const_arg1 == const0_rtx
5408 && (NONZERO_BASE_PLUS_P (folded_arg0)
5409 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5411 || GET_CODE (folded_arg0) == SYMBOL_REF
5413 || GET_CODE (folded_arg0) == LABEL_REF
5414 || GET_CODE (folded_arg0) == CONST))
5418 else if (code == NE)
5422 /* See if the two operands are the same. We don't do this
5423 for IEEE floating-point since we can't assume x == x
5424 since x might be a NaN. */
5426 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5427 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5428 && (folded_arg0 == folded_arg1
5429 || (GET_CODE (folded_arg0) == REG
5430 && GET_CODE (folded_arg1) == REG
5431 && (reg_qty[REGNO (folded_arg0)]
5432 == reg_qty[REGNO (folded_arg1)]))
5433 || ((p0 = lookup (folded_arg0,
5434 (safe_hash (folded_arg0, mode_arg0)
5435 % NBUCKETS), mode_arg0))
5436 && (p1 = lookup (folded_arg1,
5437 (safe_hash (folded_arg1, mode_arg0)
5438 % NBUCKETS), mode_arg0))
5439 && p0->first_same_value == p1->first_same_value)))
5440 return ((code == EQ || code == LE || code == GE
5441 || code == LEU || code == GEU)
5444 /* If FOLDED_ARG0 is a register, see if the comparison we are
5445 doing now is either the same as we did before or the reverse
5446 (we only check the reverse if not floating-point). */
5447 else if (GET_CODE (folded_arg0) == REG)
5449 int qty = reg_qty[REGNO (folded_arg0)];
5451 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5452 && (comparison_dominates_p (qty_comparison_code[qty], code)
5453 || (comparison_dominates_p (qty_comparison_code[qty],
5454 reverse_condition (code))
5455 && ! FLOAT_MODE_P (mode_arg0)))
5456 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5458 && rtx_equal_p (qty_comparison_const[qty],
5460 || (GET_CODE (folded_arg1) == REG
5461 && (reg_qty[REGNO (folded_arg1)]
5462 == qty_comparison_qty[qty]))))
5463 return (comparison_dominates_p (qty_comparison_code[qty],
5470 /* If we are comparing against zero, see if the first operand is
5471 equivalent to an IOR with a constant. If so, we may be able to
5472 determine the result of this comparison. */
5474 if (const_arg1 == const0_rtx)
5476 rtx y = lookup_as_function (folded_arg0, IOR);
5480 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5481 && GET_CODE (inner_const) == CONST_INT
5482 && INTVAL (inner_const) != 0)
5484 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5485 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5486 && (INTVAL (inner_const)
5487 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5488 rtx true = const_true_rtx, false = const0_rtx;
5490 #ifdef FLOAT_STORE_FLAG_VALUE
5491 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5493 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5495 false = CONST0_RTX (mode);
5519 new = simplify_relational_operation (code, mode_arg0,
5520 const_arg0 ? const_arg0 : folded_arg0,
5521 const_arg1 ? const_arg1 : folded_arg1);
5522 #ifdef FLOAT_STORE_FLAG_VALUE
5523 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5524 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5525 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5534 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5535 with that LABEL_REF as its second operand. If so, the result is
5536 the first operand of that MINUS. This handles switches with an
5537 ADDR_DIFF_VEC table. */
5538 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5541 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5542 : lookup_as_function (folded_arg0, MINUS);
5544 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5545 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5548 /* Now try for a CONST of a MINUS like the above. */
5549 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5550 : lookup_as_function (folded_arg0, CONST))) != 0
5551 && GET_CODE (XEXP (y, 0)) == MINUS
5552 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5553 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5554 return XEXP (XEXP (y, 0), 0);
5557 /* Likewise if the operands are in the other order. */
5558 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5561 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5562 : lookup_as_function (folded_arg1, MINUS);
5564 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5565 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5568 /* Now try for a CONST of a MINUS like the above. */
5569 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5570 : lookup_as_function (folded_arg1, CONST))) != 0
5571 && GET_CODE (XEXP (y, 0)) == MINUS
5572 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5573 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5574 return XEXP (XEXP (y, 0), 0);
5577 /* If second operand is a register equivalent to a negative
5578 CONST_INT, see if we can find a register equivalent to the
5579 positive constant. Make a MINUS if so. Don't do this for
5580 a non-negative constant since we might then alternate between
5581 chosing positive and negative constants. Having the positive
5582 constant previously-used is the more common case. Be sure
5583 the resulting constant is non-negative; if const_arg1 were
5584 the smallest negative number this would overflow: depending
5585 on the mode, this would either just be the same value (and
5586 hence not save anything) or be incorrect. */
5587 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5588 && INTVAL (const_arg1) < 0
5589 && - INTVAL (const_arg1) >= 0
5590 && GET_CODE (folded_arg1) == REG)
5592 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5594 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5598 for (p = p->first_same_value; p; p = p->next_same_value)
5599 if (GET_CODE (p->exp) == REG)
5600 return cse_gen_binary (MINUS, mode, folded_arg0,
5601 canon_reg (p->exp, NULL_RTX));
5606 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5607 If so, produce (PLUS Z C2-C). */
5608 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5610 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5611 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5612 return fold_rtx (plus_constant (copy_rtx (y),
5613 -INTVAL (const_arg1)),
5617 /* ... fall through ... */
5620 case SMIN: case SMAX: case UMIN: case UMAX:
5621 case IOR: case AND: case XOR:
5622 case MULT: case DIV: case UDIV:
5623 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5624 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5625 is known to be of similar form, we may be able to replace the
5626 operation with a combined operation. This may eliminate the
5627 intermediate operation if every use is simplified in this way.
5628 Note that the similar optimization done by combine.c only works
5629 if the intermediate operation's result has only one reference. */
5631 if (GET_CODE (folded_arg0) == REG
5632 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5635 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5636 rtx y = lookup_as_function (folded_arg0, code);
5638 enum rtx_code associate_code;
5642 || 0 == (inner_const
5643 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5644 || GET_CODE (inner_const) != CONST_INT
5645 /* If we have compiled a statement like
5646 "if (x == (x & mask1))", and now are looking at
5647 "x & mask2", we will have a case where the first operand
5648 of Y is the same as our first operand. Unless we detect
5649 this case, an infinite loop will result. */
5650 || XEXP (y, 0) == folded_arg0)
5653 /* Don't associate these operations if they are a PLUS with the
5654 same constant and it is a power of two. These might be doable
5655 with a pre- or post-increment. Similarly for two subtracts of
5656 identical powers of two with post decrement. */
5658 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5660 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5661 || exact_log2 (INTVAL (const_arg1)) >= 0
5663 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5664 || exact_log2 (- INTVAL (const_arg1)) >= 0
5669 /* Compute the code used to compose the constants. For example,
5670 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5673 = (code == MULT || code == DIV || code == UDIV ? MULT
5674 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5676 new_const = simplify_binary_operation (associate_code, mode,
5677 const_arg1, inner_const);
5682 /* If we are associating shift operations, don't let this
5683 produce a shift of the size of the object or larger.
5684 This could occur when we follow a sign-extend by a right
5685 shift on a machine that does a sign-extend as a pair
5688 if (is_shift && GET_CODE (new_const) == CONST_INT
5689 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5691 /* As an exception, we can turn an ASHIFTRT of this
5692 form into a shift of the number of bits - 1. */
5693 if (code == ASHIFTRT)
5694 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5699 y = copy_rtx (XEXP (y, 0));
5701 /* If Y contains our first operand (the most common way this
5702 can happen is if Y is a MEM), we would do into an infinite
5703 loop if we tried to fold it. So don't in that case. */
5705 if (! reg_mentioned_p (folded_arg0, y))
5706 y = fold_rtx (y, insn);
5708 return cse_gen_binary (code, mode, y, new_const);
5716 new = simplify_binary_operation (code, mode,
5717 const_arg0 ? const_arg0 : folded_arg0,
5718 const_arg1 ? const_arg1 : folded_arg1);
5722 /* (lo_sum (high X) X) is simply X. */
5723 if (code == LO_SUM && const_arg0 != 0
5724 && GET_CODE (const_arg0) == HIGH
5725 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5731 new = simplify_ternary_operation (code, mode, mode_arg0,
5732 const_arg0 ? const_arg0 : folded_arg0,
5733 const_arg1 ? const_arg1 : folded_arg1,
5734 const_arg2 ? const_arg2 : XEXP (x, 2));
5738 /* Always eliminate CONSTANT_P_RTX at this stage. */
5739 if (code == CONSTANT_P_RTX)
5740 return (const_arg0 ? const1_rtx : const0_rtx);
5744 return new ? new : x;
5747 /* Return a constant value currently equivalent to X.
5748 Return 0 if we don't know one. */
5754 if (GET_CODE (x) == REG
5755 && REGNO_QTY_VALID_P (REGNO (x))
5756 && qty_const[reg_qty[REGNO (x)]])
5757 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5759 if (x != 0 && CONSTANT_P (x))
5762 /* If X is a MEM, try to fold it outside the context of any insn to see if
5763 it might be equivalent to a constant. That handles the case where it
5764 is a constant-pool reference. Then try to look it up in the hash table
5765 in case it is something whose value we have seen before. */
5767 if (GET_CODE (x) == MEM)
5769 struct table_elt *elt;
5771 x = fold_rtx (x, NULL_RTX);
5775 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5779 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5780 if (elt->is_const && CONSTANT_P (elt->exp))
5787 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5788 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5789 least-significant part of X.
5790 MODE specifies how big a part of X to return.
5792 If the requested operation cannot be done, 0 is returned.
5794 This is similar to gen_lowpart in emit-rtl.c. */
5797 gen_lowpart_if_possible (mode, x)
5798 enum machine_mode mode;
5801 rtx result = gen_lowpart_common (mode, x);
5805 else if (GET_CODE (x) == MEM)
5807 /* This is the only other case we handle. */
5808 register int offset = 0;
5811 if (WORDS_BIG_ENDIAN)
5812 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5813 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5814 if (BYTES_BIG_ENDIAN)
5815 /* Adjust the address so that the address-after-the-data is
5817 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5818 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5819 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
5820 if (! memory_address_p (mode, XEXP (new, 0)))
5822 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5823 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5824 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5831 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5832 branch. It will be zero if not.
5834 In certain cases, this can cause us to add an equivalence. For example,
5835 if we are following the taken case of
5837 we can add the fact that `i' and '2' are now equivalent.
5839 In any case, we can record that this comparison was passed. If the same
5840 comparison is seen later, we will know its value. */
5843 record_jump_equiv (insn, taken)
5847 int cond_known_true;
5849 enum machine_mode mode, mode0, mode1;
5850 int reversed_nonequality = 0;
5853 /* Ensure this is the right kind of insn. */
5854 if (! condjump_p (insn) || simplejump_p (insn))
5857 /* See if this jump condition is known true or false. */
5859 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5861 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5863 /* Get the type of comparison being done and the operands being compared.
5864 If we had to reverse a non-equality condition, record that fact so we
5865 know that it isn't valid for floating-point. */
5866 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5867 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5868 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5870 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5871 if (! cond_known_true)
5873 reversed_nonequality = (code != EQ && code != NE);
5874 code = reverse_condition (code);
5877 /* The mode is the mode of the non-constant. */
5879 if (mode1 != VOIDmode)
5882 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5885 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5886 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5887 Make any useful entries we can with that information. Called from
5888 above function and called recursively. */
5891 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5893 enum machine_mode mode;
5895 int reversed_nonequality;
5897 unsigned op0_hash, op1_hash;
5898 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5899 struct table_elt *op0_elt, *op1_elt;
5901 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5902 we know that they are also equal in the smaller mode (this is also
5903 true for all smaller modes whether or not there is a SUBREG, but
5904 is not worth testing for with no SUBREG. */
5906 /* Note that GET_MODE (op0) may not equal MODE. */
5907 if (code == EQ && GET_CODE (op0) == SUBREG
5908 && (GET_MODE_SIZE (GET_MODE (op0))
5909 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5911 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5912 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5914 record_jump_cond (code, mode, SUBREG_REG (op0),
5915 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5916 reversed_nonequality);
5919 if (code == EQ && GET_CODE (op1) == SUBREG
5920 && (GET_MODE_SIZE (GET_MODE (op1))
5921 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5923 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5924 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5926 record_jump_cond (code, mode, SUBREG_REG (op1),
5927 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5928 reversed_nonequality);
5931 /* Similarly, if this is an NE comparison, and either is a SUBREG
5932 making a smaller mode, we know the whole thing is also NE. */
5934 /* Note that GET_MODE (op0) may not equal MODE;
5935 if we test MODE instead, we can get an infinite recursion
5936 alternating between two modes each wider than MODE. */
5938 if (code == NE && GET_CODE (op0) == SUBREG
5939 && subreg_lowpart_p (op0)
5940 && (GET_MODE_SIZE (GET_MODE (op0))
5941 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5943 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5944 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5946 record_jump_cond (code, mode, SUBREG_REG (op0),
5947 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
5948 reversed_nonequality);
5951 if (code == NE && GET_CODE (op1) == SUBREG
5952 && subreg_lowpart_p (op1)
5953 && (GET_MODE_SIZE (GET_MODE (op1))
5954 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5956 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5957 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5959 record_jump_cond (code, mode, SUBREG_REG (op1),
5960 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
5961 reversed_nonequality);
5964 /* Hash both operands. */
5967 hash_arg_in_memory = 0;
5968 hash_arg_in_struct = 0;
5969 op0_hash = HASH (op0, mode);
5970 op0_in_memory = hash_arg_in_memory;
5971 op0_in_struct = hash_arg_in_struct;
5977 hash_arg_in_memory = 0;
5978 hash_arg_in_struct = 0;
5979 op1_hash = HASH (op1, mode);
5980 op1_in_memory = hash_arg_in_memory;
5981 op1_in_struct = hash_arg_in_struct;
5986 /* Look up both operands. */
5987 op0_elt = lookup (op0, op0_hash, mode);
5988 op1_elt = lookup (op1, op1_hash, mode);
5990 /* If both operands are already equivalent or if they are not in the
5991 table but are identical, do nothing. */
5992 if ((op0_elt != 0 && op1_elt != 0
5993 && op0_elt->first_same_value == op1_elt->first_same_value)
5994 || op0 == op1 || rtx_equal_p (op0, op1))
5997 /* If we aren't setting two things equal all we can do is save this
5998 comparison. Similarly if this is floating-point. In the latter
5999 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6000 If we record the equality, we might inadvertently delete code
6001 whose intent was to change -0 to +0. */
6003 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6005 /* If we reversed a floating-point comparison, if OP0 is not a
6006 register, or if OP1 is neither a register or constant, we can't
6009 if (GET_CODE (op1) != REG)
6010 op1 = equiv_constant (op1);
6012 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6013 || GET_CODE (op0) != REG || op1 == 0)
6016 /* Put OP0 in the hash table if it isn't already. This gives it a
6017 new quantity number. */
6020 if (insert_regs (op0, NULL_PTR, 0))
6022 rehash_using_reg (op0);
6023 op0_hash = HASH (op0, mode);
6025 /* If OP0 is contained in OP1, this changes its hash code
6026 as well. Faster to rehash than to check, except
6027 for the simple case of a constant. */
6028 if (! CONSTANT_P (op1))
6029 op1_hash = HASH (op1,mode);
6032 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6033 op0_elt->in_memory = op0_in_memory;
6034 op0_elt->in_struct = op0_in_struct;
6037 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
6038 if (GET_CODE (op1) == REG)
6040 /* Look it up again--in case op0 and op1 are the same. */
6041 op1_elt = lookup (op1, op1_hash, mode);
6043 /* Put OP1 in the hash table so it gets a new quantity number. */
6046 if (insert_regs (op1, NULL_PTR, 0))
6048 rehash_using_reg (op1);
6049 op1_hash = HASH (op1, mode);
6052 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6053 op1_elt->in_memory = op1_in_memory;
6054 op1_elt->in_struct = op1_in_struct;
6057 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
6058 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
6062 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
6063 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
6069 /* If either side is still missing an equivalence, make it now,
6070 then merge the equivalences. */
6074 if (insert_regs (op0, NULL_PTR, 0))
6076 rehash_using_reg (op0);
6077 op0_hash = HASH (op0, mode);
6080 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6081 op0_elt->in_memory = op0_in_memory;
6082 op0_elt->in_struct = op0_in_struct;
6087 if (insert_regs (op1, NULL_PTR, 0))
6089 rehash_using_reg (op1);
6090 op1_hash = HASH (op1, mode);
6093 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6094 op1_elt->in_memory = op1_in_memory;
6095 op1_elt->in_struct = op1_in_struct;
6098 merge_equiv_classes (op0_elt, op1_elt);
6099 last_jump_equiv_class = op0_elt;
6102 /* CSE processing for one instruction.
6103 First simplify sources and addresses of all assignments
6104 in the instruction, using previously-computed equivalents values.
6105 Then install the new sources and destinations in the table
6106 of available values.
6108 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6111 /* Data on one SET contained in the instruction. */
6115 /* The SET rtx itself. */
6117 /* The SET_SRC of the rtx (the original value, if it is changing). */
6119 /* The hash-table element for the SET_SRC of the SET. */
6120 struct table_elt *src_elt;
6121 /* Hash value for the SET_SRC. */
6123 /* Hash value for the SET_DEST. */
6125 /* The SET_DEST, with SUBREG, etc., stripped. */
6127 /* Place where the pointer to the INNER_DEST was found. */
6128 rtx *inner_dest_loc;
6129 /* Nonzero if the SET_SRC is in memory. */
6131 /* Nonzero if the SET_SRC is in a structure. */
6133 /* Nonzero if the SET_SRC contains something
6134 whose value cannot be predicted and understood. */
6136 /* Original machine mode, in case it becomes a CONST_INT. */
6137 enum machine_mode mode;
6138 /* A constant equivalent for SET_SRC, if any. */
6140 /* Hash value of constant equivalent for SET_SRC. */
6141 unsigned src_const_hash;
6142 /* Table entry for constant equivalent for SET_SRC, if any. */
6143 struct table_elt *src_const_elt;
6147 cse_insn (insn, in_libcall_block)
6149 int in_libcall_block;
6151 register rtx x = PATTERN (insn);
6154 register int n_sets = 0;
6157 /* Records what this insn does to set CC0. */
6158 rtx this_insn_cc0 = 0;
6159 enum machine_mode this_insn_cc0_mode = VOIDmode;
6163 struct table_elt *src_eqv_elt = 0;
6164 int src_eqv_volatile;
6165 int src_eqv_in_memory;
6166 int src_eqv_in_struct;
6167 unsigned src_eqv_hash;
6173 /* Find all the SETs and CLOBBERs in this instruction.
6174 Record all the SETs in the array `set' and count them.
6175 Also determine whether there is a CLOBBER that invalidates
6176 all memory references, or all references at varying addresses. */
6178 if (GET_CODE (insn) == CALL_INSN)
6180 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6181 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6182 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6185 if (GET_CODE (x) == SET)
6187 sets = (struct set *) alloca (sizeof (struct set));
6190 /* Ignore SETs that are unconditional jumps.
6191 They never need cse processing, so this does not hurt.
6192 The reason is not efficiency but rather
6193 so that we can test at the end for instructions
6194 that have been simplified to unconditional jumps
6195 and not be misled by unchanged instructions
6196 that were unconditional jumps to begin with. */
6197 if (SET_DEST (x) == pc_rtx
6198 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6201 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6202 The hard function value register is used only once, to copy to
6203 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6204 Ensure we invalidate the destination register. On the 80386 no
6205 other code would invalidate it since it is a fixed_reg.
6206 We need not check the return of apply_change_group; see canon_reg. */
6208 else if (GET_CODE (SET_SRC (x)) == CALL)
6210 canon_reg (SET_SRC (x), insn);
6211 apply_change_group ();
6212 fold_rtx (SET_SRC (x), insn);
6213 invalidate (SET_DEST (x), VOIDmode);
6218 else if (GET_CODE (x) == PARALLEL)
6220 register int lim = XVECLEN (x, 0);
6222 sets = (struct set *) alloca (lim * sizeof (struct set));
6224 /* Find all regs explicitly clobbered in this insn,
6225 and ensure they are not replaced with any other regs
6226 elsewhere in this insn.
6227 When a reg that is clobbered is also used for input,
6228 we should presume that that is for a reason,
6229 and we should not substitute some other register
6230 which is not supposed to be clobbered.
6231 Therefore, this loop cannot be merged into the one below
6232 because a CALL may precede a CLOBBER and refer to the
6233 value clobbered. We must not let a canonicalization do
6234 anything in that case. */
6235 for (i = 0; i < lim; i++)
6237 register rtx y = XVECEXP (x, 0, i);
6238 if (GET_CODE (y) == CLOBBER)
6240 rtx clobbered = XEXP (y, 0);
6242 if (GET_CODE (clobbered) == REG
6243 || GET_CODE (clobbered) == SUBREG)
6244 invalidate (clobbered, VOIDmode);
6245 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6246 || GET_CODE (clobbered) == ZERO_EXTRACT)
6247 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6251 for (i = 0; i < lim; i++)
6253 register rtx y = XVECEXP (x, 0, i);
6254 if (GET_CODE (y) == SET)
6256 /* As above, we ignore unconditional jumps and call-insns and
6257 ignore the result of apply_change_group. */
6258 if (GET_CODE (SET_SRC (y)) == CALL)
6260 canon_reg (SET_SRC (y), insn);
6261 apply_change_group ();
6262 fold_rtx (SET_SRC (y), insn);
6263 invalidate (SET_DEST (y), VOIDmode);
6265 else if (SET_DEST (y) == pc_rtx
6266 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6269 sets[n_sets++].rtl = y;
6271 else if (GET_CODE (y) == CLOBBER)
6273 /* If we clobber memory, canon the address.
6274 This does nothing when a register is clobbered
6275 because we have already invalidated the reg. */
6276 if (GET_CODE (XEXP (y, 0)) == MEM)
6277 canon_reg (XEXP (y, 0), NULL_RTX);
6279 else if (GET_CODE (y) == USE
6280 && ! (GET_CODE (XEXP (y, 0)) == REG
6281 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6282 canon_reg (y, NULL_RTX);
6283 else if (GET_CODE (y) == CALL)
6285 /* The result of apply_change_group can be ignored; see
6287 canon_reg (y, insn);
6288 apply_change_group ();
6293 else if (GET_CODE (x) == CLOBBER)
6295 if (GET_CODE (XEXP (x, 0)) == MEM)
6296 canon_reg (XEXP (x, 0), NULL_RTX);
6299 /* Canonicalize a USE of a pseudo register or memory location. */
6300 else if (GET_CODE (x) == USE
6301 && ! (GET_CODE (XEXP (x, 0)) == REG
6302 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6303 canon_reg (XEXP (x, 0), NULL_RTX);
6304 else if (GET_CODE (x) == CALL)
6306 /* The result of apply_change_group can be ignored; see canon_reg. */
6307 canon_reg (x, insn);
6308 apply_change_group ();
6312 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6313 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6314 is handled specially for this case, and if it isn't set, then there will
6315 be no equivalence for the destination. */
6316 if (n_sets == 1 && REG_NOTES (insn) != 0
6317 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6318 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6319 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6320 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6322 /* Canonicalize sources and addresses of destinations.
6323 We do this in a separate pass to avoid problems when a MATCH_DUP is
6324 present in the insn pattern. In that case, we want to ensure that
6325 we don't break the duplicate nature of the pattern. So we will replace
6326 both operands at the same time. Otherwise, we would fail to find an
6327 equivalent substitution in the loop calling validate_change below.
6329 We used to suppress canonicalization of DEST if it appears in SRC,
6330 but we don't do this any more. */
6332 for (i = 0; i < n_sets; i++)
6334 rtx dest = SET_DEST (sets[i].rtl);
6335 rtx src = SET_SRC (sets[i].rtl);
6336 rtx new = canon_reg (src, insn);
6339 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6340 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6341 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6342 || (insn_code = recog_memoized (insn)) < 0
6343 || insn_n_dups[insn_code] > 0)
6344 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6346 SET_SRC (sets[i].rtl) = new;
6348 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6350 validate_change (insn, &XEXP (dest, 1),
6351 canon_reg (XEXP (dest, 1), insn), 1);
6352 validate_change (insn, &XEXP (dest, 2),
6353 canon_reg (XEXP (dest, 2), insn), 1);
6356 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6357 || GET_CODE (dest) == ZERO_EXTRACT
6358 || GET_CODE (dest) == SIGN_EXTRACT)
6359 dest = XEXP (dest, 0);
6361 if (GET_CODE (dest) == MEM)
6362 canon_reg (dest, insn);
6365 /* Now that we have done all the replacements, we can apply the change
6366 group and see if they all work. Note that this will cause some
6367 canonicalizations that would have worked individually not to be applied
6368 because some other canonicalization didn't work, but this should not
6371 The result of apply_change_group can be ignored; see canon_reg. */
6373 apply_change_group ();
6375 /* Set sets[i].src_elt to the class each source belongs to.
6376 Detect assignments from or to volatile things
6377 and set set[i] to zero so they will be ignored
6378 in the rest of this function.
6380 Nothing in this loop changes the hash table or the register chains. */
6382 for (i = 0; i < n_sets; i++)
6384 register rtx src, dest;
6385 register rtx src_folded;
6386 register struct table_elt *elt = 0, *p;
6387 enum machine_mode mode;
6390 rtx src_related = 0;
6391 struct table_elt *src_const_elt = 0;
6392 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6393 int src_related_cost = 10000, src_elt_cost = 10000;
6394 /* Set non-zero if we need to call force_const_mem on with the
6395 contents of src_folded before using it. */
6396 int src_folded_force_flag = 0;
6398 dest = SET_DEST (sets[i].rtl);
6399 src = SET_SRC (sets[i].rtl);
6401 /* If SRC is a constant that has no machine mode,
6402 hash it with the destination's machine mode.
6403 This way we can keep different modes separate. */
6405 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6406 sets[i].mode = mode;
6410 enum machine_mode eqvmode = mode;
6411 if (GET_CODE (dest) == STRICT_LOW_PART)
6412 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6414 hash_arg_in_memory = 0;
6415 hash_arg_in_struct = 0;
6416 src_eqv = fold_rtx (src_eqv, insn);
6417 src_eqv_hash = HASH (src_eqv, eqvmode);
6419 /* Find the equivalence class for the equivalent expression. */
6422 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6424 src_eqv_volatile = do_not_record;
6425 src_eqv_in_memory = hash_arg_in_memory;
6426 src_eqv_in_struct = hash_arg_in_struct;
6429 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6430 value of the INNER register, not the destination. So it is not
6431 a valid substitution for the source. But save it for later. */
6432 if (GET_CODE (dest) == STRICT_LOW_PART)
6435 src_eqv_here = src_eqv;
6437 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6438 simplified result, which may not necessarily be valid. */
6439 src_folded = fold_rtx (src, insn);
6442 /* ??? This caused bad code to be generated for the m68k port with -O2.
6443 Suppose src is (CONST_INT -1), and that after truncation src_folded
6444 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6445 At the end we will add src and src_const to the same equivalence
6446 class. We now have 3 and -1 on the same equivalence class. This
6447 causes later instructions to be mis-optimized. */
6448 /* If storing a constant in a bitfield, pre-truncate the constant
6449 so we will be able to record it later. */
6450 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6451 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6453 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6455 if (GET_CODE (src) == CONST_INT
6456 && GET_CODE (width) == CONST_INT
6457 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6458 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6460 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6461 << INTVAL (width)) - 1));
6465 /* Compute SRC's hash code, and also notice if it
6466 should not be recorded at all. In that case,
6467 prevent any further processing of this assignment. */
6469 hash_arg_in_memory = 0;
6470 hash_arg_in_struct = 0;
6473 sets[i].src_hash = HASH (src, mode);
6474 sets[i].src_volatile = do_not_record;
6475 sets[i].src_in_memory = hash_arg_in_memory;
6476 sets[i].src_in_struct = hash_arg_in_struct;
6478 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6479 a pseudo that is set more than once, do not record SRC. Using
6480 SRC as a replacement for anything else will be incorrect in that
6481 situation. Note that this usually occurs only for stack slots,
6482 in which case all the RTL would be referring to SRC, so we don't
6483 lose any optimization opportunities by not having SRC in the
6486 if (GET_CODE (src) == MEM
6487 && find_reg_note (insn, REG_EQUIV, src) != 0
6488 && GET_CODE (dest) == REG
6489 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6490 && REG_N_SETS (REGNO (dest)) != 1)
6491 sets[i].src_volatile = 1;
6494 /* It is no longer clear why we used to do this, but it doesn't
6495 appear to still be needed. So let's try without it since this
6496 code hurts cse'ing widened ops. */
6497 /* If source is a perverse subreg (such as QI treated as an SI),
6498 treat it as volatile. It may do the work of an SI in one context
6499 where the extra bits are not being used, but cannot replace an SI
6501 if (GET_CODE (src) == SUBREG
6502 && (GET_MODE_SIZE (GET_MODE (src))
6503 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6504 sets[i].src_volatile = 1;
6507 /* Locate all possible equivalent forms for SRC. Try to replace
6508 SRC in the insn with each cheaper equivalent.
6510 We have the following types of equivalents: SRC itself, a folded
6511 version, a value given in a REG_EQUAL note, or a value related
6514 Each of these equivalents may be part of an additional class
6515 of equivalents (if more than one is in the table, they must be in
6516 the same class; we check for this).
6518 If the source is volatile, we don't do any table lookups.
6520 We note any constant equivalent for possible later use in a
6523 if (!sets[i].src_volatile)
6524 elt = lookup (src, sets[i].src_hash, mode);
6526 sets[i].src_elt = elt;
6528 if (elt && src_eqv_here && src_eqv_elt)
6530 if (elt->first_same_value != src_eqv_elt->first_same_value)
6532 /* The REG_EQUAL is indicating that two formerly distinct
6533 classes are now equivalent. So merge them. */
6534 merge_equiv_classes (elt, src_eqv_elt);
6535 src_eqv_hash = HASH (src_eqv, elt->mode);
6536 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6542 else if (src_eqv_elt)
6545 /* Try to find a constant somewhere and record it in `src_const'.
6546 Record its table element, if any, in `src_const_elt'. Look in
6547 any known equivalences first. (If the constant is not in the
6548 table, also set `sets[i].src_const_hash'). */
6550 for (p = elt->first_same_value; p; p = p->next_same_value)
6554 src_const_elt = elt;
6559 && (CONSTANT_P (src_folded)
6560 /* Consider (minus (label_ref L1) (label_ref L2)) as
6561 "constant" here so we will record it. This allows us
6562 to fold switch statements when an ADDR_DIFF_VEC is used. */
6563 || (GET_CODE (src_folded) == MINUS
6564 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6565 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6566 src_const = src_folded, src_const_elt = elt;
6567 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6568 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6570 /* If we don't know if the constant is in the table, get its
6571 hash code and look it up. */
6572 if (src_const && src_const_elt == 0)
6574 sets[i].src_const_hash = HASH (src_const, mode);
6575 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6578 sets[i].src_const = src_const;
6579 sets[i].src_const_elt = src_const_elt;
6581 /* If the constant and our source are both in the table, mark them as
6582 equivalent. Otherwise, if a constant is in the table but the source
6583 isn't, set ELT to it. */
6584 if (src_const_elt && elt
6585 && src_const_elt->first_same_value != elt->first_same_value)
6586 merge_equiv_classes (elt, src_const_elt);
6587 else if (src_const_elt && elt == 0)
6588 elt = src_const_elt;
6590 /* See if there is a register linearly related to a constant
6591 equivalent of SRC. */
6593 && (GET_CODE (src_const) == CONST
6594 || (src_const_elt && src_const_elt->related_value != 0)))
6596 src_related = use_related_value (src_const, src_const_elt);
6599 struct table_elt *src_related_elt
6600 = lookup (src_related, HASH (src_related, mode), mode);
6601 if (src_related_elt && elt)
6603 if (elt->first_same_value
6604 != src_related_elt->first_same_value)
6605 /* This can occur when we previously saw a CONST
6606 involving a SYMBOL_REF and then see the SYMBOL_REF
6607 twice. Merge the involved classes. */
6608 merge_equiv_classes (elt, src_related_elt);
6611 src_related_elt = 0;
6613 else if (src_related_elt && elt == 0)
6614 elt = src_related_elt;
6618 /* See if we have a CONST_INT that is already in a register in a
6621 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6622 && GET_MODE_CLASS (mode) == MODE_INT
6623 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6625 enum machine_mode wider_mode;
6627 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6628 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6629 && src_related == 0;
6630 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6632 struct table_elt *const_elt
6633 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6638 for (const_elt = const_elt->first_same_value;
6639 const_elt; const_elt = const_elt->next_same_value)
6640 if (GET_CODE (const_elt->exp) == REG)
6642 src_related = gen_lowpart_if_possible (mode,
6649 /* Another possibility is that we have an AND with a constant in
6650 a mode narrower than a word. If so, it might have been generated
6651 as part of an "if" which would narrow the AND. If we already
6652 have done the AND in a wider mode, we can use a SUBREG of that
6655 if (flag_expensive_optimizations && ! src_related
6656 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6657 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6659 enum machine_mode tmode;
6660 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6662 for (tmode = GET_MODE_WIDER_MODE (mode);
6663 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6664 tmode = GET_MODE_WIDER_MODE (tmode))
6666 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6667 struct table_elt *larger_elt;
6671 PUT_MODE (new_and, tmode);
6672 XEXP (new_and, 0) = inner;
6673 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6674 if (larger_elt == 0)
6677 for (larger_elt = larger_elt->first_same_value;
6678 larger_elt; larger_elt = larger_elt->next_same_value)
6679 if (GET_CODE (larger_elt->exp) == REG)
6682 = gen_lowpart_if_possible (mode, larger_elt->exp);
6692 #ifdef LOAD_EXTEND_OP
6693 /* See if a MEM has already been loaded with a widening operation;
6694 if it has, we can use a subreg of that. Many CISC machines
6695 also have such operations, but this is only likely to be
6696 beneficial these machines. */
6698 if (flag_expensive_optimizations && src_related == 0
6699 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6700 && GET_MODE_CLASS (mode) == MODE_INT
6701 && GET_CODE (src) == MEM && ! do_not_record
6702 && LOAD_EXTEND_OP (mode) != NIL)
6704 enum machine_mode tmode;
6706 /* Set what we are trying to extend and the operation it might
6707 have been extended with. */
6708 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6709 XEXP (memory_extend_rtx, 0) = src;
6711 for (tmode = GET_MODE_WIDER_MODE (mode);
6712 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6713 tmode = GET_MODE_WIDER_MODE (tmode))
6715 struct table_elt *larger_elt;
6717 PUT_MODE (memory_extend_rtx, tmode);
6718 larger_elt = lookup (memory_extend_rtx,
6719 HASH (memory_extend_rtx, tmode), tmode);
6720 if (larger_elt == 0)
6723 for (larger_elt = larger_elt->first_same_value;
6724 larger_elt; larger_elt = larger_elt->next_same_value)
6725 if (GET_CODE (larger_elt->exp) == REG)
6727 src_related = gen_lowpart_if_possible (mode,
6736 #endif /* LOAD_EXTEND_OP */
6738 if (src == src_folded)
6741 /* At this point, ELT, if non-zero, points to a class of expressions
6742 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6743 and SRC_RELATED, if non-zero, each contain additional equivalent
6744 expressions. Prune these latter expressions by deleting expressions
6745 already in the equivalence class.
6747 Check for an equivalent identical to the destination. If found,
6748 this is the preferred equivalent since it will likely lead to
6749 elimination of the insn. Indicate this by placing it in
6752 if (elt) elt = elt->first_same_value;
6753 for (p = elt; p; p = p->next_same_value)
6755 enum rtx_code code = GET_CODE (p->exp);
6757 /* If the expression is not valid, ignore it. Then we do not
6758 have to check for validity below. In most cases, we can use
6759 `rtx_equal_p', since canonicalization has already been done. */
6760 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6763 /* Also skip paradoxical subregs, unless that's what we're
6766 && (GET_MODE_SIZE (GET_MODE (p->exp))
6767 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
6769 && GET_CODE (src) == SUBREG
6770 && GET_MODE (src) == GET_MODE (p->exp)
6771 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6772 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
6775 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6777 else if (src_folded && GET_CODE (src_folded) == code
6778 && rtx_equal_p (src_folded, p->exp))
6780 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6781 && rtx_equal_p (src_eqv_here, p->exp))
6783 else if (src_related && GET_CODE (src_related) == code
6784 && rtx_equal_p (src_related, p->exp))
6787 /* This is the same as the destination of the insns, we want
6788 to prefer it. Copy it to src_related. The code below will
6789 then give it a negative cost. */
6790 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6795 /* Find the cheapest valid equivalent, trying all the available
6796 possibilities. Prefer items not in the hash table to ones
6797 that are when they are equal cost. Note that we can never
6798 worsen an insn as the current contents will also succeed.
6799 If we find an equivalent identical to the destination, use it as best,
6800 since this insn will probably be eliminated in that case. */
6803 if (rtx_equal_p (src, dest))
6806 src_cost = COST (src);
6811 if (rtx_equal_p (src_eqv_here, dest))
6814 src_eqv_cost = COST (src_eqv_here);
6819 if (rtx_equal_p (src_folded, dest))
6820 src_folded_cost = -1;
6822 src_folded_cost = COST (src_folded);
6827 if (rtx_equal_p (src_related, dest))
6828 src_related_cost = -1;
6830 src_related_cost = COST (src_related);
6833 /* If this was an indirect jump insn, a known label will really be
6834 cheaper even though it looks more expensive. */
6835 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6836 src_folded = src_const, src_folded_cost = -1;
6838 /* Terminate loop when replacement made. This must terminate since
6839 the current contents will be tested and will always be valid. */
6844 /* Skip invalid entries. */
6845 while (elt && GET_CODE (elt->exp) != REG
6846 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6847 elt = elt->next_same_value;
6849 /* A paradoxical subreg would be bad here: it'll be the right
6850 size, but later may be adjusted so that the upper bits aren't
6851 what we want. So reject it. */
6853 && GET_CODE (elt->exp) == SUBREG
6854 && (GET_MODE_SIZE (GET_MODE (elt->exp))
6855 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
6856 /* It is okay, though, if the rtx we're trying to match
6857 will ignore any of the bits we can't predict. */
6859 && GET_CODE (src) == SUBREG
6860 && GET_MODE (src) == GET_MODE (elt->exp)
6861 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
6862 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
6864 elt = elt->next_same_value;
6868 if (elt) src_elt_cost = elt->cost;
6870 /* Find cheapest and skip it for the next time. For items
6871 of equal cost, use this order:
6872 src_folded, src, src_eqv, src_related and hash table entry. */
6873 if (src_folded_cost <= src_cost
6874 && src_folded_cost <= src_eqv_cost
6875 && src_folded_cost <= src_related_cost
6876 && src_folded_cost <= src_elt_cost)
6878 trial = src_folded, src_folded_cost = 10000;
6879 if (src_folded_force_flag)
6880 trial = force_const_mem (mode, trial);
6882 else if (src_cost <= src_eqv_cost
6883 && src_cost <= src_related_cost
6884 && src_cost <= src_elt_cost)
6885 trial = src, src_cost = 10000;
6886 else if (src_eqv_cost <= src_related_cost
6887 && src_eqv_cost <= src_elt_cost)
6888 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6889 else if (src_related_cost <= src_elt_cost)
6890 trial = copy_rtx (src_related), src_related_cost = 10000;
6893 trial = copy_rtx (elt->exp);
6894 elt = elt->next_same_value;
6895 src_elt_cost = 10000;
6898 /* We don't normally have an insn matching (set (pc) (pc)), so
6899 check for this separately here. We will delete such an
6902 Tablejump insns contain a USE of the table, so simply replacing
6903 the operand with the constant won't match. This is simply an
6904 unconditional branch, however, and is therefore valid. Just
6905 insert the substitution here and we will delete and re-emit
6908 if (n_sets == 1 && dest == pc_rtx
6910 || (GET_CODE (trial) == LABEL_REF
6911 && ! condjump_p (insn))))
6913 /* If TRIAL is a label in front of a jump table, we are
6914 really falling through the switch (this is how casesi
6915 insns work), so we must branch around the table. */
6916 if (GET_CODE (trial) == CODE_LABEL
6917 && NEXT_INSN (trial) != 0
6918 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6919 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6920 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6922 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
6924 SET_SRC (sets[i].rtl) = trial;
6925 cse_jumps_altered = 1;
6929 /* Look for a substitution that makes a valid insn. */
6930 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6932 /* The result of apply_change_group can be ignored; see
6935 validate_change (insn, &SET_SRC (sets[i].rtl),
6936 canon_reg (SET_SRC (sets[i].rtl), insn),
6938 apply_change_group ();
6942 /* If we previously found constant pool entries for
6943 constants and this is a constant, try making a
6944 pool entry. Put it in src_folded unless we already have done
6945 this since that is where it likely came from. */
6947 else if (constant_pool_entries_cost
6948 && CONSTANT_P (trial)
6949 && ! (GET_CODE (trial) == CONST
6950 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
6952 || (GET_CODE (src_folded) != MEM
6953 && ! src_folded_force_flag))
6954 && GET_MODE_CLASS (mode) != MODE_CC
6955 && mode != VOIDmode)
6957 src_folded_force_flag = 1;
6959 src_folded_cost = constant_pool_entries_cost;
6963 src = SET_SRC (sets[i].rtl);
6965 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6966 However, there is an important exception: If both are registers
6967 that are not the head of their equivalence class, replace SET_SRC
6968 with the head of the class. If we do not do this, we will have
6969 both registers live over a portion of the basic block. This way,
6970 their lifetimes will likely abut instead of overlapping. */
6971 if (GET_CODE (dest) == REG
6972 && REGNO_QTY_VALID_P (REGNO (dest))
6973 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6974 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6975 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6976 /* Don't do this if the original insn had a hard reg as
6978 && (GET_CODE (sets[i].src) != REG
6979 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6980 /* We can't call canon_reg here because it won't do anything if
6981 SRC is a hard register. */
6983 int first = qty_first_reg[reg_qty[REGNO (src)]];
6985 src = SET_SRC (sets[i].rtl)
6986 = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6987 : gen_rtx_REG (GET_MODE (src), first);
6989 /* If we had a constant that is cheaper than what we are now
6990 setting SRC to, use that constant. We ignored it when we
6991 thought we could make this into a no-op. */
6992 if (src_const && COST (src_const) < COST (src)
6993 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6997 /* If we made a change, recompute SRC values. */
6998 if (src != sets[i].src)
7001 hash_arg_in_memory = 0;
7002 hash_arg_in_struct = 0;
7004 sets[i].src_hash = HASH (src, mode);
7005 sets[i].src_volatile = do_not_record;
7006 sets[i].src_in_memory = hash_arg_in_memory;
7007 sets[i].src_in_struct = hash_arg_in_struct;
7008 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7011 /* If this is a single SET, we are setting a register, and we have an
7012 equivalent constant, we want to add a REG_NOTE. We don't want
7013 to write a REG_EQUAL note for a constant pseudo since verifying that
7014 that pseudo hasn't been eliminated is a pain. Such a note also
7015 won't help anything. */
7016 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7017 && GET_CODE (src_const) != REG)
7019 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7021 /* Record the actual constant value in a REG_EQUAL note, making
7022 a new one if one does not already exist. */
7024 XEXP (tem, 0) = src_const;
7026 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7027 src_const, REG_NOTES (insn));
7029 /* If storing a constant value in a register that
7030 previously held the constant value 0,
7031 record this fact with a REG_WAS_0 note on this insn.
7033 Note that the *register* is required to have previously held 0,
7034 not just any register in the quantity and we must point to the
7035 insn that set that register to zero.
7037 Rather than track each register individually, we just see if
7038 the last set for this quantity was for this register. */
7040 if (REGNO_QTY_VALID_P (REGNO (dest))
7041 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
7043 /* See if we previously had a REG_WAS_0 note. */
7044 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7045 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
7047 if ((tem = single_set (const_insn)) != 0
7048 && rtx_equal_p (SET_DEST (tem), dest))
7051 XEXP (note, 0) = const_insn;
7053 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7060 /* Now deal with the destination. */
7062 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7064 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7065 to the MEM or REG within it. */
7066 while (GET_CODE (dest) == SIGN_EXTRACT
7067 || GET_CODE (dest) == ZERO_EXTRACT
7068 || GET_CODE (dest) == SUBREG
7069 || GET_CODE (dest) == STRICT_LOW_PART)
7071 sets[i].inner_dest_loc = &XEXP (dest, 0);
7072 dest = XEXP (dest, 0);
7075 sets[i].inner_dest = dest;
7077 if (GET_CODE (dest) == MEM)
7079 #ifdef PUSH_ROUNDING
7080 /* Stack pushes invalidate the stack pointer. */
7081 rtx addr = XEXP (dest, 0);
7082 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7083 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7084 && XEXP (addr, 0) == stack_pointer_rtx)
7085 invalidate (stack_pointer_rtx, Pmode);
7087 dest = fold_rtx (dest, insn);
7090 /* Compute the hash code of the destination now,
7091 before the effects of this instruction are recorded,
7092 since the register values used in the address computation
7093 are those before this instruction. */
7094 sets[i].dest_hash = HASH (dest, mode);
7096 /* Don't enter a bit-field in the hash table
7097 because the value in it after the store
7098 may not equal what was stored, due to truncation. */
7100 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7101 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7103 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7105 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7106 && GET_CODE (width) == CONST_INT
7107 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7108 && ! (INTVAL (src_const)
7109 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7110 /* Exception: if the value is constant,
7111 and it won't be truncated, record it. */
7115 /* This is chosen so that the destination will be invalidated
7116 but no new value will be recorded.
7117 We must invalidate because sometimes constant
7118 values can be recorded for bitfields. */
7119 sets[i].src_elt = 0;
7120 sets[i].src_volatile = 1;
7126 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7128 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7130 PUT_CODE (insn, NOTE);
7131 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7132 NOTE_SOURCE_FILE (insn) = 0;
7133 cse_jumps_altered = 1;
7134 /* One less use of the label this insn used to jump to. */
7135 if (JUMP_LABEL (insn) != 0)
7136 --LABEL_NUSES (JUMP_LABEL (insn));
7137 /* No more processing for this set. */
7141 /* If this SET is now setting PC to a label, we know it used to
7142 be a conditional or computed branch. So we see if we can follow
7143 it. If it was a computed branch, delete it and re-emit. */
7144 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7148 /* If this is not in the format for a simple branch and
7149 we are the only SET in it, re-emit it. */
7150 if (! simplejump_p (insn) && n_sets == 1)
7152 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7153 JUMP_LABEL (new) = XEXP (src, 0);
7154 LABEL_NUSES (XEXP (src, 0))++;
7159 /* Otherwise, force rerecognition, since it probably had
7160 a different pattern before.
7161 This shouldn't really be necessary, since whatever
7162 changed the source value above should have done this.
7163 Until the right place is found, might as well do this here. */
7164 INSN_CODE (insn) = -1;
7166 /* Now that we've converted this jump to an unconditional jump,
7167 there is dead code after it. Delete the dead code until we
7168 reach a BARRIER, the end of the function, or a label. Do
7169 not delete NOTEs except for NOTE_INSN_DELETED since later
7170 phases assume these notes are retained. */
7174 while (NEXT_INSN (p) != 0
7175 && GET_CODE (NEXT_INSN (p)) != BARRIER
7176 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7178 if (GET_CODE (NEXT_INSN (p)) != NOTE
7179 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7180 delete_insn (NEXT_INSN (p));
7185 /* If we don't have a BARRIER immediately after INSN, put one there.
7186 Much code assumes that there are no NOTEs between a JUMP_INSN and
7189 if (NEXT_INSN (insn) == 0
7190 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7191 emit_barrier_before (NEXT_INSN (insn));
7193 /* We might have two BARRIERs separated by notes. Delete the second
7196 if (p != insn && NEXT_INSN (p) != 0
7197 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7198 delete_insn (NEXT_INSN (p));
7200 cse_jumps_altered = 1;
7204 /* If destination is volatile, invalidate it and then do no further
7205 processing for this assignment. */
7207 else if (do_not_record)
7209 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7210 || GET_CODE (dest) == MEM)
7211 invalidate (dest, VOIDmode);
7212 else if (GET_CODE (dest) == STRICT_LOW_PART
7213 || GET_CODE (dest) == ZERO_EXTRACT)
7214 invalidate (XEXP (dest, 0), GET_MODE (dest));
7218 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7219 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7222 /* If setting CC0, record what it was set to, or a constant, if it
7223 is equivalent to a constant. If it is being set to a floating-point
7224 value, make a COMPARE with the appropriate constant of 0. If we
7225 don't do this, later code can interpret this as a test against
7226 const0_rtx, which can cause problems if we try to put it into an
7227 insn as a floating-point operand. */
7228 if (dest == cc0_rtx)
7230 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7231 this_insn_cc0_mode = mode;
7232 if (FLOAT_MODE_P (mode))
7233 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7239 /* Now enter all non-volatile source expressions in the hash table
7240 if they are not already present.
7241 Record their equivalence classes in src_elt.
7242 This way we can insert the corresponding destinations into
7243 the same classes even if the actual sources are no longer in them
7244 (having been invalidated). */
7246 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7247 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7249 register struct table_elt *elt;
7250 register struct table_elt *classp = sets[0].src_elt;
7251 rtx dest = SET_DEST (sets[0].rtl);
7252 enum machine_mode eqvmode = GET_MODE (dest);
7254 if (GET_CODE (dest) == STRICT_LOW_PART)
7256 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7259 if (insert_regs (src_eqv, classp, 0))
7261 rehash_using_reg (src_eqv);
7262 src_eqv_hash = HASH (src_eqv, eqvmode);
7264 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7265 elt->in_memory = src_eqv_in_memory;
7266 elt->in_struct = src_eqv_in_struct;
7269 /* Check to see if src_eqv_elt is the same as a set source which
7270 does not yet have an elt, and if so set the elt of the set source
7272 for (i = 0; i < n_sets; i++)
7273 if (sets[i].rtl && sets[i].src_elt == 0
7274 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7275 sets[i].src_elt = src_eqv_elt;
7278 for (i = 0; i < n_sets; i++)
7279 if (sets[i].rtl && ! sets[i].src_volatile
7280 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7282 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7284 /* REG_EQUAL in setting a STRICT_LOW_PART
7285 gives an equivalent for the entire destination register,
7286 not just for the subreg being stored in now.
7287 This is a more interesting equivalence, so we arrange later
7288 to treat the entire reg as the destination. */
7289 sets[i].src_elt = src_eqv_elt;
7290 sets[i].src_hash = src_eqv_hash;
7294 /* Insert source and constant equivalent into hash table, if not
7296 register struct table_elt *classp = src_eqv_elt;
7297 register rtx src = sets[i].src;
7298 register rtx dest = SET_DEST (sets[i].rtl);
7299 enum machine_mode mode
7300 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7302 if (sets[i].src_elt == 0)
7304 register struct table_elt *elt;
7306 /* Note that these insert_regs calls cannot remove
7307 any of the src_elt's, because they would have failed to
7308 match if not still valid. */
7309 if (insert_regs (src, classp, 0))
7311 rehash_using_reg (src);
7312 sets[i].src_hash = HASH (src, mode);
7314 elt = insert (src, classp, sets[i].src_hash, mode);
7315 elt->in_memory = sets[i].src_in_memory;
7316 elt->in_struct = sets[i].src_in_struct;
7317 sets[i].src_elt = classp = elt;
7320 if (sets[i].src_const && sets[i].src_const_elt == 0
7321 && src != sets[i].src_const
7322 && ! rtx_equal_p (sets[i].src_const, src))
7323 sets[i].src_elt = insert (sets[i].src_const, classp,
7324 sets[i].src_const_hash, mode);
7327 else if (sets[i].src_elt == 0)
7328 /* If we did not insert the source into the hash table (e.g., it was
7329 volatile), note the equivalence class for the REG_EQUAL value, if any,
7330 so that the destination goes into that class. */
7331 sets[i].src_elt = src_eqv_elt;
7333 invalidate_from_clobbers (x);
7335 /* Some registers are invalidated by subroutine calls. Memory is
7336 invalidated by non-constant calls. */
7338 if (GET_CODE (insn) == CALL_INSN)
7340 if (! CONST_CALL_P (insn))
7341 invalidate_memory ();
7342 invalidate_for_call ();
7345 /* Now invalidate everything set by this instruction.
7346 If a SUBREG or other funny destination is being set,
7347 sets[i].rtl is still nonzero, so here we invalidate the reg
7348 a part of which is being set. */
7350 for (i = 0; i < n_sets; i++)
7353 /* We can't use the inner dest, because the mode associated with
7354 a ZERO_EXTRACT is significant. */
7355 register rtx dest = SET_DEST (sets[i].rtl);
7357 /* Needed for registers to remove the register from its
7358 previous quantity's chain.
7359 Needed for memory if this is a nonvarying address, unless
7360 we have just done an invalidate_memory that covers even those. */
7361 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7362 || GET_CODE (dest) == MEM)
7363 invalidate (dest, VOIDmode);
7364 else if (GET_CODE (dest) == STRICT_LOW_PART
7365 || GET_CODE (dest) == ZERO_EXTRACT)
7366 invalidate (XEXP (dest, 0), GET_MODE (dest));
7369 /* Make sure registers mentioned in destinations
7370 are safe for use in an expression to be inserted.
7371 This removes from the hash table
7372 any invalid entry that refers to one of these registers.
7374 We don't care about the return value from mention_regs because
7375 we are going to hash the SET_DEST values unconditionally. */
7377 for (i = 0; i < n_sets; i++)
7378 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
7379 mention_regs (SET_DEST (sets[i].rtl));
7381 /* We may have just removed some of the src_elt's from the hash table.
7382 So replace each one with the current head of the same class. */
7384 for (i = 0; i < n_sets; i++)
7387 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7388 /* If elt was removed, find current head of same class,
7389 or 0 if nothing remains of that class. */
7391 register struct table_elt *elt = sets[i].src_elt;
7393 while (elt && elt->prev_same_value)
7394 elt = elt->prev_same_value;
7396 while (elt && elt->first_same_value == 0)
7397 elt = elt->next_same_value;
7398 sets[i].src_elt = elt ? elt->first_same_value : 0;
7402 /* Now insert the destinations into their equivalence classes. */
7404 for (i = 0; i < n_sets; i++)
7407 register rtx dest = SET_DEST (sets[i].rtl);
7408 register struct table_elt *elt;
7410 /* Don't record value if we are not supposed to risk allocating
7411 floating-point values in registers that might be wider than
7413 if ((flag_float_store
7414 && GET_CODE (dest) == MEM
7415 && FLOAT_MODE_P (GET_MODE (dest)))
7416 /* Don't record BLKmode values, because we don't know the
7417 size of it, and can't be sure that other BLKmode values
7418 have the same or smaller size. */
7419 || GET_MODE (dest) == BLKmode
7420 /* Don't record values of destinations set inside a libcall block
7421 since we might delete the libcall. Things should have been set
7422 up so we won't want to reuse such a value, but we play it safe
7425 /* If we didn't put a REG_EQUAL value or a source into the hash
7426 table, there is no point is recording DEST. */
7427 || sets[i].src_elt == 0
7428 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7429 or SIGN_EXTEND, don't record DEST since it can cause
7430 some tracking to be wrong.
7432 ??? Think about this more later. */
7433 || (GET_CODE (dest) == SUBREG
7434 && (GET_MODE_SIZE (GET_MODE (dest))
7435 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7436 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7437 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7440 /* STRICT_LOW_PART isn't part of the value BEING set,
7441 and neither is the SUBREG inside it.
7442 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7443 if (GET_CODE (dest) == STRICT_LOW_PART)
7444 dest = SUBREG_REG (XEXP (dest, 0));
7446 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7447 /* Registers must also be inserted into chains for quantities. */
7448 if (insert_regs (dest, sets[i].src_elt, 1))
7450 /* If `insert_regs' changes something, the hash code must be
7452 rehash_using_reg (dest);
7453 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7456 elt = insert (dest, sets[i].src_elt,
7457 sets[i].dest_hash, GET_MODE (dest));
7458 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7459 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7460 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7465 /* This implicitly assumes a whole struct
7466 need not have MEM_IN_STRUCT_P.
7467 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7468 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7469 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7472 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7473 narrower than M2, and both M1 and M2 are the same number of words,
7474 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7475 make that equivalence as well.
7477 However, BAR may have equivalences for which gen_lowpart_if_possible
7478 will produce a simpler value than gen_lowpart_if_possible applied to
7479 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7480 BAR's equivalences. If we don't get a simplified form, make
7481 the SUBREG. It will not be used in an equivalence, but will
7482 cause two similar assignments to be detected.
7484 Note the loop below will find SUBREG_REG (DEST) since we have
7485 already entered SRC and DEST of the SET in the table. */
7487 if (GET_CODE (dest) == SUBREG
7488 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7490 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7491 && (GET_MODE_SIZE (GET_MODE (dest))
7492 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7493 && sets[i].src_elt != 0)
7495 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7496 struct table_elt *elt, *classp = 0;
7498 for (elt = sets[i].src_elt->first_same_value; elt;
7499 elt = elt->next_same_value)
7503 struct table_elt *src_elt;
7505 /* Ignore invalid entries. */
7506 if (GET_CODE (elt->exp) != REG
7507 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7510 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7512 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7514 src_hash = HASH (new_src, new_mode);
7515 src_elt = lookup (new_src, src_hash, new_mode);
7517 /* Put the new source in the hash table is if isn't
7521 if (insert_regs (new_src, classp, 0))
7523 rehash_using_reg (new_src);
7524 src_hash = HASH (new_src, new_mode);
7526 src_elt = insert (new_src, classp, src_hash, new_mode);
7527 src_elt->in_memory = elt->in_memory;
7528 src_elt->in_struct = elt->in_struct;
7530 else if (classp && classp != src_elt->first_same_value)
7531 /* Show that two things that we've seen before are
7532 actually the same. */
7533 merge_equiv_classes (src_elt, classp);
7535 classp = src_elt->first_same_value;
7536 /* Ignore invalid entries. */
7538 && GET_CODE (classp->exp) != REG
7539 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7540 classp = classp->next_same_value;
7545 /* Special handling for (set REG0 REG1)
7546 where REG0 is the "cheapest", cheaper than REG1.
7547 After cse, REG1 will probably not be used in the sequel,
7548 so (if easily done) change this insn to (set REG1 REG0) and
7549 replace REG1 with REG0 in the previous insn that computed their value.
7550 Then REG1 will become a dead store and won't cloud the situation
7551 for later optimizations.
7553 Do not make this change if REG1 is a hard register, because it will
7554 then be used in the sequel and we may be changing a two-operand insn
7555 into a three-operand insn.
7557 Also do not do this if we are operating on a copy of INSN. */
7559 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7560 && NEXT_INSN (PREV_INSN (insn)) == insn
7561 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7562 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7563 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7564 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7565 == REGNO (SET_DEST (sets[0].rtl))))
7567 rtx prev = PREV_INSN (insn);
7568 while (prev && GET_CODE (prev) == NOTE)
7569 prev = PREV_INSN (prev);
7571 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7572 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7574 rtx dest = SET_DEST (sets[0].rtl);
7575 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7577 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7578 validate_change (insn, & SET_DEST (sets[0].rtl),
7579 SET_SRC (sets[0].rtl), 1);
7580 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7581 apply_change_group ();
7583 /* If REG1 was equivalent to a constant, REG0 is not. */
7585 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7587 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7588 any REG_WAS_0 note on INSN to PREV. */
7589 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7591 remove_note (prev, note);
7593 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7596 remove_note (insn, note);
7597 XEXP (note, 1) = REG_NOTES (prev);
7598 REG_NOTES (prev) = note;
7601 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7602 then we must delete it, because the value in REG0 has changed. */
7603 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7604 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7605 remove_note (insn, note);
7609 /* If this is a conditional jump insn, record any known equivalences due to
7610 the condition being tested. */
7612 last_jump_equiv_class = 0;
7613 if (GET_CODE (insn) == JUMP_INSN
7614 && n_sets == 1 && GET_CODE (x) == SET
7615 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7616 record_jump_equiv (insn, 0);
7619 /* If the previous insn set CC0 and this insn no longer references CC0,
7620 delete the previous insn. Here we use the fact that nothing expects CC0
7621 to be valid over an insn, which is true until the final pass. */
7622 if (prev_insn && GET_CODE (prev_insn) == INSN
7623 && (tem = single_set (prev_insn)) != 0
7624 && SET_DEST (tem) == cc0_rtx
7625 && ! reg_mentioned_p (cc0_rtx, x))
7627 PUT_CODE (prev_insn, NOTE);
7628 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7629 NOTE_SOURCE_FILE (prev_insn) = 0;
7632 prev_insn_cc0 = this_insn_cc0;
7633 prev_insn_cc0_mode = this_insn_cc0_mode;
7639 /* Remove from the ahsh table all expressions that reference memory. */
7641 invalidate_memory ()
7644 register struct table_elt *p, *next;
7646 for (i = 0; i < NBUCKETS; i++)
7647 for (p = table[i]; p; p = next)
7649 next = p->next_same_hash;
7651 remove_from_table (p, i);
7655 /* XXX ??? The name of this function bears little resemblance to
7656 what this function actually does. FIXME. */
7658 note_mem_written (addr)
7661 /* Pushing or popping the stack invalidates just the stack pointer. */
7662 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7663 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7664 && GET_CODE (XEXP (addr, 0)) == REG
7665 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7667 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7668 reg_tick[STACK_POINTER_REGNUM]++;
7670 /* This should be *very* rare. */
7671 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7672 invalidate (stack_pointer_rtx, VOIDmode);
7678 /* Perform invalidation on the basis of everything about an insn
7679 except for invalidating the actual places that are SET in it.
7680 This includes the places CLOBBERed, and anything that might
7681 alias with something that is SET or CLOBBERed.
7683 X is the pattern of the insn. */
7686 invalidate_from_clobbers (x)
7689 if (GET_CODE (x) == CLOBBER)
7691 rtx ref = XEXP (x, 0);
7694 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7695 || GET_CODE (ref) == MEM)
7696 invalidate (ref, VOIDmode);
7697 else if (GET_CODE (ref) == STRICT_LOW_PART
7698 || GET_CODE (ref) == ZERO_EXTRACT)
7699 invalidate (XEXP (ref, 0), GET_MODE (ref));
7702 else if (GET_CODE (x) == PARALLEL)
7705 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7707 register rtx y = XVECEXP (x, 0, i);
7708 if (GET_CODE (y) == CLOBBER)
7710 rtx ref = XEXP (y, 0);
7711 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7712 || GET_CODE (ref) == MEM)
7713 invalidate (ref, VOIDmode);
7714 else if (GET_CODE (ref) == STRICT_LOW_PART
7715 || GET_CODE (ref) == ZERO_EXTRACT)
7716 invalidate (XEXP (ref, 0), GET_MODE (ref));
7722 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7723 and replace any registers in them with either an equivalent constant
7724 or the canonical form of the register. If we are inside an address,
7725 only do this if the address remains valid.
7727 OBJECT is 0 except when within a MEM in which case it is the MEM.
7729 Return the replacement for X. */
7732 cse_process_notes (x, object)
7736 enum rtx_code code = GET_CODE (x);
7737 char *fmt = GET_RTX_FORMAT (code);
7753 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7758 if (REG_NOTE_KIND (x) == REG_EQUAL)
7759 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7761 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7768 rtx new = cse_process_notes (XEXP (x, 0), object);
7769 /* We don't substitute VOIDmode constants into these rtx,
7770 since they would impede folding. */
7771 if (GET_MODE (new) != VOIDmode)
7772 validate_change (object, &XEXP (x, 0), new, 0);
7777 i = reg_qty[REGNO (x)];
7779 /* Return a constant or a constant register. */
7780 if (REGNO_QTY_VALID_P (REGNO (x))
7781 && qty_const[i] != 0
7782 && (CONSTANT_P (qty_const[i])
7783 || GET_CODE (qty_const[i]) == REG))
7785 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7790 /* Otherwise, canonicalize this register. */
7791 return canon_reg (x, NULL_RTX);
7797 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7799 validate_change (object, &XEXP (x, i),
7800 cse_process_notes (XEXP (x, i), object), 0);
7805 /* Find common subexpressions between the end test of a loop and the beginning
7806 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7808 Often we have a loop where an expression in the exit test is used
7809 in the body of the loop. For example "while (*p) *q++ = *p++;".
7810 Because of the way we duplicate the loop exit test in front of the loop,
7811 however, we don't detect that common subexpression. This will be caught
7812 when global cse is implemented, but this is a quite common case.
7814 This function handles the most common cases of these common expressions.
7815 It is called after we have processed the basic block ending with the
7816 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7817 jumps to a label used only once. */
7820 cse_around_loop (loop_start)
7825 struct table_elt *p;
7827 /* If the jump at the end of the loop doesn't go to the start, we don't
7829 for (insn = PREV_INSN (loop_start);
7830 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7831 insn = PREV_INSN (insn))
7835 || GET_CODE (insn) != NOTE
7836 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7839 /* If the last insn of the loop (the end test) was an NE comparison,
7840 we will interpret it as an EQ comparison, since we fell through
7841 the loop. Any equivalences resulting from that comparison are
7842 therefore not valid and must be invalidated. */
7843 if (last_jump_equiv_class)
7844 for (p = last_jump_equiv_class->first_same_value; p;
7845 p = p->next_same_value)
7847 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7848 || (GET_CODE (p->exp) == SUBREG
7849 && GET_CODE (SUBREG_REG (p->exp)) == REG))
7850 invalidate (p->exp, VOIDmode);
7851 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7852 || GET_CODE (p->exp) == ZERO_EXTRACT)
7853 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
7856 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7857 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7859 The only thing we do with SET_DEST is invalidate entries, so we
7860 can safely process each SET in order. It is slightly less efficient
7861 to do so, but we only want to handle the most common cases.
7863 The gen_move_insn call in cse_set_around_loop may create new pseudos.
7864 These pseudos won't have valid entries in any of the tables indexed
7865 by register number, such as reg_qty. We avoid out-of-range array
7866 accesses by not processing any instructions created after cse started. */
7868 for (insn = NEXT_INSN (loop_start);
7869 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7870 && INSN_UID (insn) < max_insn_uid
7871 && ! (GET_CODE (insn) == NOTE
7872 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7873 insn = NEXT_INSN (insn))
7875 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7876 && (GET_CODE (PATTERN (insn)) == SET
7877 || GET_CODE (PATTERN (insn)) == CLOBBER))
7878 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7879 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7880 && GET_CODE (PATTERN (insn)) == PARALLEL)
7881 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7882 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7883 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7884 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7889 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7890 since they are done elsewhere. This function is called via note_stores. */
7893 invalidate_skipped_set (dest, set)
7897 enum rtx_code code = GET_CODE (dest);
7900 && ! note_mem_written (dest) /* If this is not a stack push ... */
7901 /* There are times when an address can appear varying and be a PLUS
7902 during this scan when it would be a fixed address were we to know
7903 the proper equivalences. So invalidate all memory if there is
7904 a BLKmode or nonscalar memory reference or a reference to a
7905 variable address. */
7906 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
7907 || cse_rtx_varies_p (XEXP (dest, 0))))
7909 invalidate_memory ();
7913 if (GET_CODE (set) == CLOBBER
7920 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
7921 invalidate (XEXP (dest, 0), GET_MODE (dest));
7922 else if (code == REG || code == SUBREG || code == MEM)
7923 invalidate (dest, VOIDmode);
7926 /* Invalidate all insns from START up to the end of the function or the
7927 next label. This called when we wish to CSE around a block that is
7928 conditionally executed. */
7931 invalidate_skipped_block (start)
7936 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7937 insn = NEXT_INSN (insn))
7939 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7942 if (GET_CODE (insn) == CALL_INSN)
7944 if (! CONST_CALL_P (insn))
7945 invalidate_memory ();
7946 invalidate_for_call ();
7949 note_stores (PATTERN (insn), invalidate_skipped_set);
7953 /* Used for communication between the following two routines; contains a
7954 value to be checked for modification. */
7956 static rtx cse_check_loop_start_value;
7958 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7959 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7962 cse_check_loop_start (x, set)
7964 rtx set ATTRIBUTE_UNUSED;
7966 if (cse_check_loop_start_value == 0
7967 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7970 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7971 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7972 cse_check_loop_start_value = 0;
7975 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7976 a loop that starts with the label at LOOP_START.
7978 If X is a SET, we see if its SET_SRC is currently in our hash table.
7979 If so, we see if it has a value equal to some register used only in the
7980 loop exit code (as marked by jump.c).
7982 If those two conditions are true, we search backwards from the start of
7983 the loop to see if that same value was loaded into a register that still
7984 retains its value at the start of the loop.
7986 If so, we insert an insn after the load to copy the destination of that
7987 load into the equivalent register and (try to) replace our SET_SRC with that
7990 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7993 cse_set_around_loop (x, insn, loop_start)
7998 struct table_elt *src_elt;
8000 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8001 are setting PC or CC0 or whose SET_SRC is already a register. */
8002 if (GET_CODE (x) == SET
8003 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8004 && GET_CODE (SET_SRC (x)) != REG)
8006 src_elt = lookup (SET_SRC (x),
8007 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8008 GET_MODE (SET_DEST (x)));
8011 for (src_elt = src_elt->first_same_value; src_elt;
8012 src_elt = src_elt->next_same_value)
8013 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8014 && COST (src_elt->exp) < COST (SET_SRC (x)))
8018 /* Look for an insn in front of LOOP_START that sets
8019 something in the desired mode to SET_SRC (x) before we hit
8020 a label or CALL_INSN. */
8022 for (p = prev_nonnote_insn (loop_start);
8023 p && GET_CODE (p) != CALL_INSN
8024 && GET_CODE (p) != CODE_LABEL;
8025 p = prev_nonnote_insn (p))
8026 if ((set = single_set (p)) != 0
8027 && GET_CODE (SET_DEST (set)) == REG
8028 && GET_MODE (SET_DEST (set)) == src_elt->mode
8029 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8031 /* We now have to ensure that nothing between P
8032 and LOOP_START modified anything referenced in
8033 SET_SRC (x). We know that nothing within the loop
8034 can modify it, or we would have invalidated it in
8038 cse_check_loop_start_value = SET_SRC (x);
8039 for (q = p; q != loop_start; q = NEXT_INSN (q))
8040 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8041 note_stores (PATTERN (q), cse_check_loop_start);
8043 /* If nothing was changed and we can replace our
8044 SET_SRC, add an insn after P to copy its destination
8045 to what we will be replacing SET_SRC with. */
8046 if (cse_check_loop_start_value
8047 && validate_change (insn, &SET_SRC (x),
8050 /* If this creates new pseudos, this is unsafe,
8051 because the regno of new pseudo is unsuitable
8052 to index into reg_qty when cse_insn processes
8053 the new insn. Therefore, if a new pseudo was
8054 created, discard this optimization. */
8055 int nregs = max_reg_num ();
8057 = gen_move_insn (src_elt->exp, SET_DEST (set));
8058 if (nregs != max_reg_num ())
8060 if (! validate_change (insn, &SET_SRC (x),
8065 emit_insn_after (move, p);
8072 /* Now invalidate anything modified by X. */
8073 note_mem_written (SET_DEST (x));
8075 /* See comment on similar code in cse_insn for explanation of these tests. */
8076 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8077 || GET_CODE (SET_DEST (x)) == MEM)
8078 invalidate (SET_DEST (x), VOIDmode);
8079 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8080 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8081 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8084 /* Find the end of INSN's basic block and return its range,
8085 the total number of SETs in all the insns of the block, the last insn of the
8086 block, and the branch path.
8088 The branch path indicates which branches should be followed. If a non-zero
8089 path size is specified, the block should be rescanned and a different set
8090 of branches will be taken. The branch path is only used if
8091 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8093 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8094 used to describe the block. It is filled in with the information about
8095 the current block. The incoming structure's branch path, if any, is used
8096 to construct the output branch path. */
8099 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8101 struct cse_basic_block_data *data;
8108 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8109 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8110 int path_size = data->path_size;
8114 /* Update the previous branch path, if any. If the last branch was
8115 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8116 shorten the path by one and look at the previous branch. We know that
8117 at least one branch must have been taken if PATH_SIZE is non-zero. */
8118 while (path_size > 0)
8120 if (data->path[path_size - 1].status != NOT_TAKEN)
8122 data->path[path_size - 1].status = NOT_TAKEN;
8129 /* Scan to end of this basic block. */
8130 while (p && GET_CODE (p) != CODE_LABEL)
8132 /* Don't cse out the end of a loop. This makes a difference
8133 only for the unusual loops that always execute at least once;
8134 all other loops have labels there so we will stop in any case.
8135 Cse'ing out the end of the loop is dangerous because it
8136 might cause an invariant expression inside the loop
8137 to be reused after the end of the loop. This would make it
8138 hard to move the expression out of the loop in loop.c,
8139 especially if it is one of several equivalent expressions
8140 and loop.c would like to eliminate it.
8142 If we are running after loop.c has finished, we can ignore
8143 the NOTE_INSN_LOOP_END. */
8145 if (! after_loop && GET_CODE (p) == NOTE
8146 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8149 /* Don't cse over a call to setjmp; on some machines (eg vax)
8150 the regs restored by the longjmp come from
8151 a later time than the setjmp. */
8152 if (GET_CODE (p) == NOTE
8153 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8156 /* A PARALLEL can have lots of SETs in it,
8157 especially if it is really an ASM_OPERANDS. */
8158 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8159 && GET_CODE (PATTERN (p)) == PARALLEL)
8160 nsets += XVECLEN (PATTERN (p), 0);
8161 else if (GET_CODE (p) != NOTE)
8164 /* Ignore insns made by CSE; they cannot affect the boundaries of
8167 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8168 high_cuid = INSN_CUID (p);
8169 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8170 low_cuid = INSN_CUID (p);
8172 /* See if this insn is in our branch path. If it is and we are to
8174 if (path_entry < path_size && data->path[path_entry].branch == p)
8176 if (data->path[path_entry].status != NOT_TAKEN)
8179 /* Point to next entry in path, if any. */
8183 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8184 was specified, we haven't reached our maximum path length, there are
8185 insns following the target of the jump, this is the only use of the
8186 jump label, and the target label is preceded by a BARRIER.
8188 Alternatively, we can follow the jump if it branches around a
8189 block of code and there are no other branches into the block.
8190 In this case invalidate_skipped_block will be called to invalidate any
8191 registers set in the block when following the jump. */
8193 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8194 && GET_CODE (p) == JUMP_INSN
8195 && GET_CODE (PATTERN (p)) == SET
8196 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8197 && JUMP_LABEL (p) != 0
8198 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8199 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8201 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8202 if ((GET_CODE (q) != NOTE
8203 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8204 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8205 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8208 /* If we ran into a BARRIER, this code is an extension of the
8209 basic block when the branch is taken. */
8210 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8212 /* Don't allow ourself to keep walking around an
8213 always-executed loop. */
8214 if (next_real_insn (q) == next)
8220 /* Similarly, don't put a branch in our path more than once. */
8221 for (i = 0; i < path_entry; i++)
8222 if (data->path[i].branch == p)
8225 if (i != path_entry)
8228 data->path[path_entry].branch = p;
8229 data->path[path_entry++].status = TAKEN;
8231 /* This branch now ends our path. It was possible that we
8232 didn't see this branch the last time around (when the
8233 insn in front of the target was a JUMP_INSN that was
8234 turned into a no-op). */
8235 path_size = path_entry;
8238 /* Mark block so we won't scan it again later. */
8239 PUT_MODE (NEXT_INSN (p), QImode);
8241 /* Detect a branch around a block of code. */
8242 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8246 if (next_real_insn (q) == next)
8252 for (i = 0; i < path_entry; i++)
8253 if (data->path[i].branch == p)
8256 if (i != path_entry)
8259 /* This is no_labels_between_p (p, q) with an added check for
8260 reaching the end of a function (in case Q precedes P). */
8261 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8262 if (GET_CODE (tmp) == CODE_LABEL)
8267 data->path[path_entry].branch = p;
8268 data->path[path_entry++].status = AROUND;
8270 path_size = path_entry;
8273 /* Mark block so we won't scan it again later. */
8274 PUT_MODE (NEXT_INSN (p), QImode);
8281 data->low_cuid = low_cuid;
8282 data->high_cuid = high_cuid;
8283 data->nsets = nsets;
8286 /* If all jumps in the path are not taken, set our path length to zero
8287 so a rescan won't be done. */
8288 for (i = path_size - 1; i >= 0; i--)
8289 if (data->path[i].status != NOT_TAKEN)
8293 data->path_size = 0;
8295 data->path_size = path_size;
8297 /* End the current branch path. */
8298 data->path[path_size].branch = 0;
8301 /* Perform cse on the instructions of a function.
8302 F is the first instruction.
8303 NREGS is one plus the highest pseudo-reg number used in the instruction.
8305 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8306 (only if -frerun-cse-after-loop).
8308 Returns 1 if jump_optimize should be redone due to simplifications
8309 in conditional jump instructions. */
8312 cse_main (f, nregs, after_loop, file)
8318 struct cse_basic_block_data val;
8319 register rtx insn = f;
8322 cse_jumps_altered = 0;
8323 recorded_label_ref = 0;
8324 constant_pool_entries_cost = 0;
8328 init_alias_analysis ();
8332 max_insn_uid = get_max_uid ();
8334 all_minus_one = (int *) alloca (nregs * sizeof (int));
8335 consec_ints = (int *) alloca (nregs * sizeof (int));
8337 for (i = 0; i < nregs; i++)
8339 all_minus_one[i] = -1;
8343 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8344 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8345 reg_qty = (int *) alloca (nregs * sizeof (int));
8346 reg_in_table = (int *) alloca (nregs * sizeof (int));
8347 reg_tick = (int *) alloca (nregs * sizeof (int));
8349 #ifdef LOAD_EXTEND_OP
8351 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8352 and change the code and mode as appropriate. */
8353 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8356 /* Discard all the free elements of the previous function
8357 since they are allocated in the temporarily obstack. */
8358 bzero ((char *) table, sizeof table);
8359 free_element_chain = 0;
8360 n_elements_made = 0;
8362 /* Find the largest uid. */
8364 max_uid = get_max_uid ();
8365 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8366 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8368 /* Compute the mapping from uids to cuids.
8369 CUIDs are numbers assigned to insns, like uids,
8370 except that cuids increase monotonically through the code.
8371 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8372 between two insns is not affected by -g. */
8374 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8376 if (GET_CODE (insn) != NOTE
8377 || NOTE_LINE_NUMBER (insn) < 0)
8378 INSN_CUID (insn) = ++i;
8380 /* Give a line number note the same cuid as preceding insn. */
8381 INSN_CUID (insn) = i;
8384 /* Initialize which registers are clobbered by calls. */
8386 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8388 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8389 if ((call_used_regs[i]
8390 /* Used to check !fixed_regs[i] here, but that isn't safe;
8391 fixed regs are still call-clobbered, and sched can get
8392 confused if they can "live across calls".
8394 The frame pointer is always preserved across calls. The arg
8395 pointer is if it is fixed. The stack pointer usually is, unless
8396 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8397 will be present. If we are generating PIC code, the PIC offset
8398 table register is preserved across calls. */
8400 && i != STACK_POINTER_REGNUM
8401 && i != FRAME_POINTER_REGNUM
8402 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8403 && i != HARD_FRAME_POINTER_REGNUM
8405 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8406 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8408 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8409 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8413 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8415 /* Loop over basic blocks.
8416 Compute the maximum number of qty's needed for each basic block
8417 (which is 2 for each SET). */
8421 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8422 flag_cse_skip_blocks);
8424 /* If this basic block was already processed or has no sets, skip it. */
8425 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8427 PUT_MODE (insn, VOIDmode);
8428 insn = (val.last ? NEXT_INSN (val.last) : 0);
8433 cse_basic_block_start = val.low_cuid;
8434 cse_basic_block_end = val.high_cuid;
8435 max_qty = val.nsets * 2;
8438 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
8439 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8442 /* Make MAX_QTY bigger to give us room to optimize
8443 past the end of this basic block, if that should prove useful. */
8449 /* If this basic block is being extended by following certain jumps,
8450 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8451 Otherwise, we start after this basic block. */
8452 if (val.path_size > 0)
8453 cse_basic_block (insn, val.last, val.path, 0);
8456 int old_cse_jumps_altered = cse_jumps_altered;
8459 /* When cse changes a conditional jump to an unconditional
8460 jump, we want to reprocess the block, since it will give
8461 us a new branch path to investigate. */
8462 cse_jumps_altered = 0;
8463 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8464 if (cse_jumps_altered == 0
8465 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8468 cse_jumps_altered |= old_cse_jumps_altered;
8476 /* Tell refers_to_mem_p that qty_const info is not available. */
8479 if (max_elements_made < n_elements_made)
8480 max_elements_made = n_elements_made;
8482 return cse_jumps_altered || recorded_label_ref;
8485 /* Process a single basic block. FROM and TO and the limits of the basic
8486 block. NEXT_BRANCH points to the branch path when following jumps or
8487 a null path when not following jumps.
8489 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8490 loop. This is true when we are being called for the last time on a
8491 block and this CSE pass is before loop.c. */
8494 cse_basic_block (from, to, next_branch, around_loop)
8495 register rtx from, to;
8496 struct branch_path *next_branch;
8501 int in_libcall_block = 0;
8504 /* Each of these arrays is undefined before max_reg, so only allocate
8505 the space actually needed and adjust the start below. */
8507 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8508 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8509 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8510 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8511 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8513 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8514 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8515 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8517 qty_first_reg -= max_reg;
8518 qty_last_reg -= max_reg;
8519 qty_mode -= max_reg;
8520 qty_const -= max_reg;
8521 qty_const_insn -= max_reg;
8522 qty_comparison_code -= max_reg;
8523 qty_comparison_qty -= max_reg;
8524 qty_comparison_const -= max_reg;
8528 /* TO might be a label. If so, protect it from being deleted. */
8529 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8532 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8534 register enum rtx_code code = GET_CODE (insn);
8536 struct table_elt *p, *next;
8538 /* If we have processed 1,000 insns, flush the hash table to
8539 avoid extreme quadratic behavior. We must not include NOTEs
8540 in the count since there may be more or them when generating
8541 debugging information. If we clear the table at different
8542 times, code generated with -g -O might be different than code
8543 generated with -O but not -g.
8545 ??? This is a real kludge and needs to be done some other way.
8547 if (code != NOTE && num_insns++ > 1000)
8549 for (i = 0; i < NBUCKETS; i++)
8550 for (p = table[i]; p; p = next)
8552 next = p->next_same_hash;
8554 if (GET_CODE (p->exp) == REG)
8555 invalidate (p->exp, p->mode);
8557 remove_from_table (p, i);
8563 /* See if this is a branch that is part of the path. If so, and it is
8564 to be taken, do so. */
8565 if (next_branch->branch == insn)
8567 enum taken status = next_branch++->status;
8568 if (status != NOT_TAKEN)
8570 if (status == TAKEN)
8571 record_jump_equiv (insn, 1);
8573 invalidate_skipped_block (NEXT_INSN (insn));
8575 /* Set the last insn as the jump insn; it doesn't affect cc0.
8576 Then follow this branch. */
8581 insn = JUMP_LABEL (insn);
8586 if (GET_MODE (insn) == QImode)
8587 PUT_MODE (insn, VOIDmode);
8589 if (GET_RTX_CLASS (code) == 'i')
8591 /* Process notes first so we have all notes in canonical forms when
8592 looking for duplicate operations. */
8594 if (REG_NOTES (insn))
8595 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8597 /* Track when we are inside in LIBCALL block. Inside such a block,
8598 we do not want to record destinations. The last insn of a
8599 LIBCALL block is not considered to be part of the block, since
8600 its destination is the result of the block and hence should be
8603 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
8604 in_libcall_block = 1;
8605 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8606 in_libcall_block = 0;
8608 cse_insn (insn, in_libcall_block);
8611 /* If INSN is now an unconditional jump, skip to the end of our
8612 basic block by pretending that we just did the last insn in the
8613 basic block. If we are jumping to the end of our block, show
8614 that we can have one usage of TO. */
8616 if (simplejump_p (insn))
8621 if (JUMP_LABEL (insn) == to)
8624 /* Maybe TO was deleted because the jump is unconditional.
8625 If so, there is nothing left in this basic block. */
8626 /* ??? Perhaps it would be smarter to set TO
8627 to whatever follows this insn,
8628 and pretend the basic block had always ended here. */
8629 if (INSN_DELETED_P (to))
8632 insn = PREV_INSN (to);
8635 /* See if it is ok to keep on going past the label
8636 which used to end our basic block. Remember that we incremented
8637 the count of that label, so we decrement it here. If we made
8638 a jump unconditional, TO_USAGE will be one; in that case, we don't
8639 want to count the use in that jump. */
8641 if (to != 0 && NEXT_INSN (insn) == to
8642 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8644 struct cse_basic_block_data val;
8647 insn = NEXT_INSN (to);
8649 if (LABEL_NUSES (to) == 0)
8650 insn = delete_insn (to);
8652 /* If TO was the last insn in the function, we are done. */
8656 /* If TO was preceded by a BARRIER we are done with this block
8657 because it has no continuation. */
8658 prev = prev_nonnote_insn (to);
8659 if (prev && GET_CODE (prev) == BARRIER)
8662 /* Find the end of the following block. Note that we won't be
8663 following branches in this case. */
8666 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8668 /* If the tables we allocated have enough space left
8669 to handle all the SETs in the next basic block,
8670 continue through it. Otherwise, return,
8671 and that block will be scanned individually. */
8672 if (val.nsets * 2 + next_qty > max_qty)
8675 cse_basic_block_start = val.low_cuid;
8676 cse_basic_block_end = val.high_cuid;
8679 /* Prevent TO from being deleted if it is a label. */
8680 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8683 /* Back up so we process the first insn in the extension. */
8684 insn = PREV_INSN (insn);
8688 if (next_qty > max_qty)
8691 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8692 the previous insn is the only insn that branches to the head of a loop,
8693 we can cse into the loop. Don't do this if we changed the jump
8694 structure of a loop unless we aren't going to be following jumps. */
8696 if ((cse_jumps_altered == 0
8697 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8698 && around_loop && to != 0
8699 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8700 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8701 && JUMP_LABEL (PREV_INSN (to)) != 0
8702 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8703 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8705 return to ? NEXT_INSN (to) : 0;
8708 /* Count the number of times registers are used (not set) in X.
8709 COUNTS is an array in which we accumulate the count, INCR is how much
8710 we count each register usage.
8712 Don't count a usage of DEST, which is the SET_DEST of a SET which
8713 contains X in its SET_SRC. This is because such a SET does not
8714 modify the liveness of DEST. */
8717 count_reg_usage (x, counts, dest, incr)
8730 switch (code = GET_CODE (x))
8734 counts[REGNO (x)] += incr;
8748 /* Unless we are setting a REG, count everything in SET_DEST. */
8749 if (GET_CODE (SET_DEST (x)) != REG)
8750 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8752 /* If SRC has side-effects, then we can't delete this insn, so the
8753 usage of SET_DEST inside SRC counts.
8755 ??? Strictly-speaking, we might be preserving this insn
8756 because some other SET has side-effects, but that's hard
8757 to do and can't happen now. */
8758 count_reg_usage (SET_SRC (x), counts,
8759 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8764 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8766 /* ... falls through ... */
8769 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8771 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8774 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
8779 if (REG_NOTE_KIND (x) == REG_EQUAL
8780 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
8781 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
8782 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
8789 fmt = GET_RTX_FORMAT (code);
8790 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8793 count_reg_usage (XEXP (x, i), counts, dest, incr);
8794 else if (fmt[i] == 'E')
8795 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8796 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
8800 /* Scan all the insns and delete any that are dead; i.e., they store a register
8801 that is never used or they copy a register to itself.
8803 This is used to remove insns made obviously dead by cse, loop or other
8804 optimizations. It improves the heuristics in loop since it won't try to
8805 move dead invariants out of loops or make givs for dead quantities. The
8806 remaining passes of the compilation are also sped up. */
8809 delete_trivially_dead_insns (insns, nreg)
8813 int *counts = (int *) alloca (nreg * sizeof (int));
8819 int in_libcall = 0, dead_libcall = 0;
8821 /* First count the number of times each register is used. */
8822 bzero ((char *) counts, sizeof (int) * nreg);
8823 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8824 count_reg_usage (insn, counts, NULL_RTX, 1);
8826 /* Go from the last insn to the first and delete insns that only set unused
8827 registers or copy a register to itself. As we delete an insn, remove
8828 usage counts for registers it uses. */
8829 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8834 prev = prev_real_insn (insn);
8836 /* Don't delete any insns that are part of a libcall block unless
8837 we can delete the whole libcall block.
8839 Flow or loop might get confused if we did that. Remember
8840 that we are scanning backwards. */
8841 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8847 /* See if there's a REG_EQUAL note on this insn and try to
8848 replace the source with the REG_EQUAL expression.
8850 We assume that insns with REG_RETVALs can only be reg->reg
8851 copies at this point. */
8852 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
8855 rtx set = single_set (insn);
8857 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
8860 find_reg_note (insn, REG_RETVAL, NULL_RTX));
8865 else if (in_libcall)
8866 live_insn = ! dead_libcall;
8867 else if (GET_CODE (PATTERN (insn)) == SET)
8869 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8870 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8874 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8875 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8876 && ((tem = next_nonnote_insn (insn)) == 0
8877 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8878 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8881 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8882 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8883 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8884 || side_effects_p (SET_SRC (PATTERN (insn))))
8887 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8888 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8890 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8892 if (GET_CODE (elt) == SET)
8894 if (GET_CODE (SET_DEST (elt)) == REG
8895 && SET_DEST (elt) == SET_SRC (elt))
8899 else if (GET_CODE (SET_DEST (elt)) == CC0
8900 && ! side_effects_p (SET_SRC (elt))
8901 && ((tem = next_nonnote_insn (insn)) == 0
8902 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8903 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8906 else if (GET_CODE (SET_DEST (elt)) != REG
8907 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8908 || counts[REGNO (SET_DEST (elt))] != 0
8909 || side_effects_p (SET_SRC (elt)))
8912 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8918 /* If this is a dead insn, delete it and show registers in it aren't
8923 count_reg_usage (insn, counts, NULL_RTX, -1);
8927 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))