1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-5, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 /* Must precede rtl.h for FFS. */
28 #include "hard-reg-set.h"
31 #include "insn-config.h"
36 /* The basic idea of common subexpression elimination is to go
37 through the code, keeping a record of expressions that would
38 have the same value at the current scan point, and replacing
39 expressions encountered with the cheapest equivalent expression.
41 It is too complicated to keep track of the different possibilities
42 when control paths merge; so, at each label, we forget all that is
43 known and start fresh. This can be described as processing each
44 basic block separately. Note, however, that these are not quite
45 the same as the basic blocks found by a later pass and used for
46 data flow analysis and register packing. We do not need to start fresh
47 after a conditional jump instruction if there is no label there.
49 We use two data structures to record the equivalent expressions:
50 a hash table for most expressions, and several vectors together
51 with "quantity numbers" to record equivalent (pseudo) registers.
53 The use of the special data structure for registers is desirable
54 because it is faster. It is possible because registers references
55 contain a fairly small number, the register number, taken from
56 a contiguously allocated series, and two register references are
57 identical if they have the same number. General expressions
58 do not have any such thing, so the only way to retrieve the
59 information recorded on an expression other than a register
60 is to keep it in a hash table.
62 Registers and "quantity numbers":
64 At the start of each basic block, all of the (hardware and pseudo)
65 registers used in the function are given distinct quantity
66 numbers to indicate their contents. During scan, when the code
67 copies one register into another, we copy the quantity number.
68 When a register is loaded in any other way, we allocate a new
69 quantity number to describe the value generated by this operation.
70 `reg_qty' records what quantity a register is currently thought
73 All real quantity numbers are greater than or equal to `max_reg'.
74 If register N has not been assigned a quantity, reg_qty[N] will equal N.
76 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
77 variables should be referenced with an index below `max_reg'.
79 We also maintain a bidirectional chain of registers for each
80 quantity number. `qty_first_reg', `qty_last_reg',
81 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
83 The first register in a chain is the one whose lifespan is least local.
84 Among equals, it is the one that was seen first.
85 We replace any equivalent register with that one.
87 If two registers have the same quantity number, it must be true that
88 REG expressions with `qty_mode' must be in the hash table for both
89 registers and must be in the same class.
91 The converse is not true. Since hard registers may be referenced in
92 any mode, two REG expressions might be equivalent in the hash table
93 but not have the same quantity number if the quantity number of one
94 of the registers is not the same mode as those expressions.
96 Constants and quantity numbers
98 When a quantity has a known constant value, that value is stored
99 in the appropriate element of qty_const. This is in addition to
100 putting the constant in the hash table as is usual for non-regs.
102 Whether a reg or a constant is preferred is determined by the configuration
103 macro CONST_COSTS and will often depend on the constant value. In any
104 event, expressions containing constants can be simplified, by fold_rtx.
106 When a quantity has a known nearly constant value (such as an address
107 of a stack slot), that value is stored in the appropriate element
110 Integer constants don't have a machine mode. However, cse
111 determines the intended machine mode from the destination
112 of the instruction that moves the constant. The machine mode
113 is recorded in the hash table along with the actual RTL
114 constant expression so that different modes are kept separate.
118 To record known equivalences among expressions in general
119 we use a hash table called `table'. It has a fixed number of buckets
120 that contain chains of `struct table_elt' elements for expressions.
121 These chains connect the elements whose expressions have the same
124 Other chains through the same elements connect the elements which
125 currently have equivalent values.
127 Register references in an expression are canonicalized before hashing
128 the expression. This is done using `reg_qty' and `qty_first_reg'.
129 The hash code of a register reference is computed using the quantity
130 number, not the register number.
132 When the value of an expression changes, it is necessary to remove from the
133 hash table not just that expression but all expressions whose values
134 could be different as a result.
136 1. If the value changing is in memory, except in special cases
137 ANYTHING referring to memory could be changed. That is because
138 nobody knows where a pointer does not point.
139 The function `invalidate_memory' removes what is necessary.
141 The special cases are when the address is constant or is
142 a constant plus a fixed register such as the frame pointer
143 or a static chain pointer. When such addresses are stored in,
144 we can tell exactly which other such addresses must be invalidated
145 due to overlap. `invalidate' does this.
146 All expressions that refer to non-constant
147 memory addresses are also invalidated. `invalidate_memory' does this.
149 2. If the value changing is a register, all expressions
150 containing references to that register, and only those,
153 Because searching the entire hash table for expressions that contain
154 a register is very slow, we try to figure out when it isn't necessary.
155 Precisely, this is necessary only when expressions have been
156 entered in the hash table using this register, and then the value has
157 changed, and then another expression wants to be added to refer to
158 the register's new value. This sequence of circumstances is rare
159 within any one basic block.
161 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
162 reg_tick[i] is incremented whenever a value is stored in register i.
163 reg_in_table[i] holds -1 if no references to register i have been
164 entered in the table; otherwise, it contains the value reg_tick[i] had
165 when the references were entered. If we want to enter a reference
166 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
167 Until we want to enter a new entry, the mere fact that the two vectors
168 don't match makes the entries be ignored if anyone tries to match them.
170 Registers themselves are entered in the hash table as well as in
171 the equivalent-register chains. However, the vectors `reg_tick'
172 and `reg_in_table' do not apply to expressions which are simple
173 register references. These expressions are removed from the table
174 immediately when they become invalid, and this can be done even if
175 we do not immediately search for all the expressions that refer to
178 A CLOBBER rtx in an instruction invalidates its operand for further
179 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
180 invalidates everything that resides in memory.
184 Constant expressions that differ only by an additive integer
185 are called related. When a constant expression is put in
186 the table, the related expression with no constant term
187 is also entered. These are made to point at each other
188 so that it is possible to find out if there exists any
189 register equivalent to an expression related to a given expression. */
191 /* One plus largest register number used in this function. */
195 /* Length of vectors indexed by quantity number.
196 We know in advance we will not need a quantity number this big. */
200 /* Next quantity number to be allocated.
201 This is 1 + the largest number needed so far. */
205 /* Indexed by quantity number, gives the first (or last) (pseudo) register
206 in the chain of registers that currently contain this quantity. */
208 static int *qty_first_reg;
209 static int *qty_last_reg;
211 /* Index by quantity number, gives the mode of the quantity. */
213 static enum machine_mode *qty_mode;
215 /* Indexed by quantity number, gives the rtx of the constant value of the
216 quantity, or zero if it does not have a known value.
217 A sum of the frame pointer (or arg pointer) plus a constant
218 can also be entered here. */
220 static rtx *qty_const;
222 /* Indexed by qty number, gives the insn that stored the constant value
223 recorded in `qty_const'. */
225 static rtx *qty_const_insn;
227 /* The next three variables are used to track when a comparison between a
228 quantity and some constant or register has been passed. In that case, we
229 know the results of the comparison in case we see it again. These variables
230 record a comparison that is known to be true. */
232 /* Indexed by qty number, gives the rtx code of a comparison with a known
233 result involving this quantity. If none, it is UNKNOWN. */
234 static enum rtx_code *qty_comparison_code;
236 /* Indexed by qty number, gives the constant being compared against in a
237 comparison of known result. If no such comparison, it is undefined.
238 If the comparison is not with a constant, it is zero. */
240 static rtx *qty_comparison_const;
242 /* Indexed by qty number, gives the quantity being compared against in a
243 comparison of known result. If no such comparison, if it undefined.
244 If the comparison is not with a register, it is -1. */
246 static int *qty_comparison_qty;
249 /* For machines that have a CC0, we do not record its value in the hash
250 table since its use is guaranteed to be the insn immediately following
251 its definition and any other insn is presumed to invalidate it.
253 Instead, we store below the value last assigned to CC0. If it should
254 happen to be a constant, it is stored in preference to the actual
255 assigned value. In case it is a constant, we store the mode in which
256 the constant should be interpreted. */
258 static rtx prev_insn_cc0;
259 static enum machine_mode prev_insn_cc0_mode;
262 /* Previous actual insn. 0 if at first insn of basic block. */
264 static rtx prev_insn;
266 /* Insn being scanned. */
268 static rtx this_insn;
270 /* Index by (pseudo) register number, gives the quantity number
271 of the register's current contents. */
275 /* Index by (pseudo) register number, gives the number of the next (or
276 previous) (pseudo) register in the chain of registers sharing the same
279 Or -1 if this register is at the end of the chain.
281 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
283 static int *reg_next_eqv;
284 static int *reg_prev_eqv;
286 /* Index by (pseudo) register number, gives the number of times
287 that register has been altered in the current basic block. */
289 static int *reg_tick;
291 /* Index by (pseudo) register number, gives the reg_tick value at which
292 rtx's containing this register are valid in the hash table.
293 If this does not equal the current reg_tick value, such expressions
294 existing in the hash table are invalid.
295 If this is -1, no expressions containing this register have been
296 entered in the table. */
298 static int *reg_in_table;
300 /* A HARD_REG_SET containing all the hard registers for which there is
301 currently a REG expression in the hash table. Note the difference
302 from the above variables, which indicate if the REG is mentioned in some
303 expression in the table. */
305 static HARD_REG_SET hard_regs_in_table;
307 /* A HARD_REG_SET containing all the hard registers that are invalidated
310 static HARD_REG_SET regs_invalidated_by_call;
312 /* Two vectors of ints:
313 one containing max_reg -1's; the other max_reg + 500 (an approximation
314 for max_qty) elements where element i contains i.
315 These are used to initialize various other vectors fast. */
317 static int *all_minus_one;
318 static int *consec_ints;
320 /* CUID of insn that starts the basic block currently being cse-processed. */
322 static int cse_basic_block_start;
324 /* CUID of insn that ends the basic block currently being cse-processed. */
326 static int cse_basic_block_end;
328 /* Vector mapping INSN_UIDs to cuids.
329 The cuids are like uids but increase monotonically always.
330 We use them to see whether a reg is used outside a given basic block. */
332 static int *uid_cuid;
334 /* Highest UID in UID_CUID. */
337 /* Get the cuid of an insn. */
339 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
341 /* Nonzero if cse has altered conditional jump insns
342 in such a way that jump optimization should be redone. */
344 static int cse_jumps_altered;
346 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
347 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
348 to put in the note. */
349 static int recorded_label_ref;
351 /* canon_hash stores 1 in do_not_record
352 if it notices a reference to CC0, PC, or some other volatile
355 static int do_not_record;
357 #ifdef LOAD_EXTEND_OP
359 /* Scratch rtl used when looking for load-extended copy of a MEM. */
360 static rtx memory_extend_rtx;
363 /* canon_hash stores 1 in hash_arg_in_memory
364 if it notices a reference to memory within the expression being hashed. */
366 static int hash_arg_in_memory;
368 /* canon_hash stores 1 in hash_arg_in_struct
369 if it notices a reference to memory that's part of a structure. */
371 static int hash_arg_in_struct;
373 /* The hash table contains buckets which are chains of `struct table_elt's,
374 each recording one expression's information.
375 That expression is in the `exp' field.
377 Those elements with the same hash code are chained in both directions
378 through the `next_same_hash' and `prev_same_hash' fields.
380 Each set of expressions with equivalent values
381 are on a two-way chain through the `next_same_value'
382 and `prev_same_value' fields, and all point with
383 the `first_same_value' field at the first element in
384 that chain. The chain is in order of increasing cost.
385 Each element's cost value is in its `cost' field.
387 The `in_memory' field is nonzero for elements that
388 involve any reference to memory. These elements are removed
389 whenever a write is done to an unidentified location in memory.
390 To be safe, we assume that a memory address is unidentified unless
391 the address is either a symbol constant or a constant plus
392 the frame pointer or argument pointer.
394 The `in_struct' field is nonzero for elements that
395 involve any reference to memory inside a structure or array.
397 The `related_value' field is used to connect related expressions
398 (that differ by adding an integer).
399 The related expressions are chained in a circular fashion.
400 `related_value' is zero for expressions for which this
403 The `cost' field stores the cost of this element's expression.
405 The `is_const' flag is set if the element is a constant (including
408 The `flag' field is used as a temporary during some search routines.
410 The `mode' field is usually the same as GET_MODE (`exp'), but
411 if `exp' is a CONST_INT and has no machine mode then the `mode'
412 field is the mode it was being used as. Each constant is
413 recorded separately for each mode it is used with. */
419 struct table_elt *next_same_hash;
420 struct table_elt *prev_same_hash;
421 struct table_elt *next_same_value;
422 struct table_elt *prev_same_value;
423 struct table_elt *first_same_value;
424 struct table_elt *related_value;
426 enum machine_mode mode;
433 /* We don't want a lot of buckets, because we rarely have very many
434 things stored in the hash table, and a lot of buckets slows
435 down a lot of loops that happen frequently. */
438 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
439 register (hard registers may require `do_not_record' to be set). */
442 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
443 ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \
444 : canon_hash (X, M) % NBUCKETS)
446 /* Determine whether register number N is considered a fixed register for CSE.
447 It is desirable to replace other regs with fixed regs, to reduce need for
449 A reg wins if it is either the frame pointer or designated as fixed,
450 but not if it is an overlapping register. */
451 #ifdef OVERLAPPING_REGNO_P
452 #define FIXED_REGNO_P(N) \
453 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
454 || fixed_regs[N] || global_regs[N]) \
455 && ! OVERLAPPING_REGNO_P ((N)))
457 #define FIXED_REGNO_P(N) \
458 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
459 || fixed_regs[N] || global_regs[N])
462 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
463 hard registers and pointers into the frame are the cheapest with a cost
464 of 0. Next come pseudos with a cost of one and other hard registers with
465 a cost of 2. Aside from these special cases, call `rtx_cost'. */
467 #define CHEAP_REGNO(N) \
468 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
469 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
470 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
471 || ((N) < FIRST_PSEUDO_REGISTER \
472 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
474 /* A register is cheap if it is a user variable assigned to the register
475 or if its register number always corresponds to a cheap register. */
477 #define CHEAP_REG(N) \
478 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
479 || CHEAP_REGNO (REGNO (N)))
482 (GET_CODE (X) == REG \
483 ? (CHEAP_REG (X) ? 0 \
484 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
486 : rtx_cost (X, SET) * 2)
488 /* Determine if the quantity number for register X represents a valid index
489 into the `qty_...' variables. */
491 #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
493 static struct table_elt *table[NBUCKETS];
495 /* Chain of `struct table_elt's made so far for this function
496 but currently removed from the table. */
498 static struct table_elt *free_element_chain;
500 /* Number of `struct table_elt' structures made so far for this function. */
502 static int n_elements_made;
504 /* Maximum value `n_elements_made' has had so far in this compilation
505 for functions previously processed. */
507 static int max_elements_made;
509 /* Surviving equivalence class when two equivalence classes are merged
510 by recording the effects of a jump in the last insn. Zero if the
511 last insn was not a conditional jump. */
513 static struct table_elt *last_jump_equiv_class;
515 /* Set to the cost of a constant pool reference if one was found for a
516 symbolic constant. If this was found, it means we should try to
517 convert constants into constant pool entries if they don't fit in
520 static int constant_pool_entries_cost;
522 /* Bits describing what kind of values in memory must be invalidated
523 for a particular instruction. If all three bits are zero,
524 no memory refs need to be invalidated. Each bit is more powerful
525 than the preceding ones, and if a bit is set then the preceding
528 Here is how the bits are set:
529 Pushing onto the stack invalidates only the stack pointer,
530 writing at a fixed address invalidates only variable addresses,
531 writing in a structure element at variable address
532 invalidates all but scalar variables,
533 and writing in anything else at variable address invalidates everything. */
537 int sp : 1; /* Invalidate stack pointer. */
538 int var : 1; /* Invalidate variable addresses. */
539 int nonscalar : 1; /* Invalidate all but scalar variables. */
540 int all : 1; /* Invalidate all memory refs. */
543 /* Define maximum length of a branch path. */
545 #define PATHLENGTH 10
547 /* This data describes a block that will be processed by cse_basic_block. */
549 struct cse_basic_block_data {
550 /* Lowest CUID value of insns in block. */
552 /* Highest CUID value of insns in block. */
554 /* Total number of SETs in block. */
556 /* Last insn in the block. */
558 /* Size of current branch path, if any. */
560 /* Current branch path, indicating which branches will be taken. */
562 /* The branch insn. */
564 /* Whether it should be taken or not. AROUND is the same as taken
565 except that it is used when the destination label is not preceded
567 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
571 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
572 virtual regs here because the simplify_*_operation routines are called
573 by integrate.c, which is called before virtual register instantiation. */
575 #define FIXED_BASE_PLUS_P(X) \
576 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
577 || (X) == arg_pointer_rtx \
578 || (X) == virtual_stack_vars_rtx \
579 || (X) == virtual_incoming_args_rtx \
580 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
581 && (XEXP (X, 0) == frame_pointer_rtx \
582 || XEXP (X, 0) == hard_frame_pointer_rtx \
583 || XEXP (X, 0) == arg_pointer_rtx \
584 || XEXP (X, 0) == virtual_stack_vars_rtx \
585 || XEXP (X, 0) == virtual_incoming_args_rtx)))
587 /* Similar, but also allows reference to the stack pointer.
589 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
590 arg_pointer_rtx by itself is nonzero, because on at least one machine,
591 the i960, the arg pointer is zero when it is unused. */
593 #define NONZERO_BASE_PLUS_P(X) \
594 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
595 || (X) == virtual_stack_vars_rtx \
596 || (X) == virtual_incoming_args_rtx \
597 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
598 && (XEXP (X, 0) == frame_pointer_rtx \
599 || XEXP (X, 0) == hard_frame_pointer_rtx \
600 || XEXP (X, 0) == arg_pointer_rtx \
601 || XEXP (X, 0) == virtual_stack_vars_rtx \
602 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
603 || (X) == stack_pointer_rtx \
604 || (X) == virtual_stack_dynamic_rtx \
605 || (X) == virtual_outgoing_args_rtx \
606 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
607 && (XEXP (X, 0) == stack_pointer_rtx \
608 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
609 || XEXP (X, 0) == virtual_outgoing_args_rtx)))
611 static void new_basic_block PROTO((void));
612 static void make_new_qty PROTO((int));
613 static void make_regs_eqv PROTO((int, int));
614 static void delete_reg_equiv PROTO((int));
615 static int mention_regs PROTO((rtx));
616 static int insert_regs PROTO((rtx, struct table_elt *, int));
617 static void free_element PROTO((struct table_elt *));
618 static void remove_from_table PROTO((struct table_elt *, unsigned));
619 static struct table_elt *get_element PROTO((void));
620 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
621 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
622 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
623 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
625 static void merge_equiv_classes PROTO((struct table_elt *,
626 struct table_elt *));
627 static void invalidate PROTO((rtx, enum machine_mode));
628 static void remove_invalid_refs PROTO((int));
629 static void rehash_using_reg PROTO((rtx));
630 static void invalidate_memory PROTO((struct write_data *));
631 static void invalidate_for_call PROTO((void));
632 static rtx use_related_value PROTO((rtx, struct table_elt *));
633 static unsigned canon_hash PROTO((rtx, enum machine_mode));
634 static unsigned safe_hash PROTO((rtx, enum machine_mode));
635 static int exp_equiv_p PROTO((rtx, rtx, int, int));
636 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
639 static int refers_to_p PROTO((rtx, rtx));
640 static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT,
642 static int cse_rtx_addr_varies_p PROTO((rtx));
643 static rtx canon_reg PROTO((rtx, rtx));
644 static void find_best_addr PROTO((rtx, rtx *));
645 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
647 enum machine_mode *));
648 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
650 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
652 static rtx fold_rtx PROTO((rtx, rtx));
653 static rtx equiv_constant PROTO((rtx));
654 static void record_jump_equiv PROTO((rtx, int));
655 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
657 static void cse_insn PROTO((rtx, int));
658 static void note_mem_written PROTO((rtx, struct write_data *));
659 static void invalidate_from_clobbers PROTO((struct write_data *, rtx));
660 static rtx cse_process_notes PROTO((rtx, rtx));
661 static void cse_around_loop PROTO((rtx));
662 static void invalidate_skipped_set PROTO((rtx, rtx));
663 static void invalidate_skipped_block PROTO((rtx));
664 static void cse_check_loop_start PROTO((rtx, rtx));
665 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
666 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
667 static void count_reg_usage PROTO((rtx, int *, rtx, int));
669 extern int rtx_equal_function_value_matters;
671 /* Return an estimate of the cost of computing rtx X.
672 One use is in cse, to decide which expression to keep in the hash table.
673 Another is in rtl generation, to pick the cheapest way to multiply.
674 Other uses like the latter are expected in the future. */
676 /* Return the right cost to give to an operation
677 to make the cost of the corresponding register-to-register instruction
678 N times that of a fast register-to-register instruction. */
680 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
683 rtx_cost (x, outer_code)
685 enum rtx_code outer_code;
688 register enum rtx_code code;
695 /* Compute the default costs of certain things.
696 Note that RTX_COSTS can override the defaults. */
702 /* Count multiplication by 2**n as a shift,
703 because if we are considering it, we would output it as a shift. */
704 if (GET_CODE (XEXP (x, 1)) == CONST_INT
705 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
708 total = COSTS_N_INSNS (5);
714 total = COSTS_N_INSNS (7);
717 /* Used in loop.c and combine.c as a marker. */
721 /* We don't want these to be used in substitutions because
722 we have no way of validating the resulting insn. So assign
723 anything containing an ASM_OPERANDS a very high cost. */
733 return ! CHEAP_REG (x);
736 /* If we can't tie these modes, make this expensive. The larger
737 the mode, the more expensive it is. */
738 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
739 return COSTS_N_INSNS (2
740 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
743 RTX_COSTS (x, code, outer_code);
745 CONST_COSTS (x, code, outer_code);
748 /* Sum the costs of the sub-rtx's, plus cost of this operation,
749 which is already in total. */
751 fmt = GET_RTX_FORMAT (code);
752 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
754 total += rtx_cost (XEXP (x, i), code);
755 else if (fmt[i] == 'E')
756 for (j = 0; j < XVECLEN (x, i); j++)
757 total += rtx_cost (XVECEXP (x, i, j), code);
762 /* Clear the hash table and initialize each register with its own quantity,
763 for a new basic block. */
772 bzero ((char *) reg_tick, max_reg * sizeof (int));
774 bcopy ((char *) all_minus_one, (char *) reg_in_table,
775 max_reg * sizeof (int));
776 bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int));
777 CLEAR_HARD_REG_SET (hard_regs_in_table);
779 /* The per-quantity values used to be initialized here, but it is
780 much faster to initialize each as it is made in `make_new_qty'. */
782 for (i = 0; i < NBUCKETS; i++)
784 register struct table_elt *this, *next;
785 for (this = table[i]; this; this = next)
787 next = this->next_same_hash;
792 bzero ((char *) table, sizeof table);
801 /* Say that register REG contains a quantity not in any register before
802 and initialize that quantity. */
810 if (next_qty >= max_qty)
813 q = reg_qty[reg] = next_qty++;
814 qty_first_reg[q] = reg;
815 qty_last_reg[q] = reg;
816 qty_const[q] = qty_const_insn[q] = 0;
817 qty_comparison_code[q] = UNKNOWN;
819 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
822 /* Make reg NEW equivalent to reg OLD.
823 OLD is not changing; NEW is. */
826 make_regs_eqv (new, old)
827 register int new, old;
829 register int lastr, firstr;
830 register int q = reg_qty[old];
832 /* Nothing should become eqv until it has a "non-invalid" qty number. */
833 if (! REGNO_QTY_VALID_P (old))
837 firstr = qty_first_reg[q];
838 lastr = qty_last_reg[q];
840 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
841 hard regs. Among pseudos, if NEW will live longer than any other reg
842 of the same qty, and that is beyond the current basic block,
843 make it the new canonical replacement for this qty. */
844 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
845 /* Certain fixed registers might be of the class NO_REGS. This means
846 that not only can they not be allocated by the compiler, but
847 they cannot be used in substitutions or canonicalizations
849 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
850 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
851 || (new >= FIRST_PSEUDO_REGISTER
852 && (firstr < FIRST_PSEUDO_REGISTER
853 || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end
854 || (uid_cuid[regno_first_uid[new]]
855 < cse_basic_block_start))
856 && (uid_cuid[regno_last_uid[new]]
857 > uid_cuid[regno_last_uid[firstr]]))))))
859 reg_prev_eqv[firstr] = new;
860 reg_next_eqv[new] = firstr;
861 reg_prev_eqv[new] = -1;
862 qty_first_reg[q] = new;
866 /* If NEW is a hard reg (known to be non-fixed), insert at end.
867 Otherwise, insert before any non-fixed hard regs that are at the
868 end. Registers of class NO_REGS cannot be used as an
869 equivalent for anything. */
870 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
871 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
872 && new >= FIRST_PSEUDO_REGISTER)
873 lastr = reg_prev_eqv[lastr];
874 reg_next_eqv[new] = reg_next_eqv[lastr];
875 if (reg_next_eqv[lastr] >= 0)
876 reg_prev_eqv[reg_next_eqv[lastr]] = new;
878 qty_last_reg[q] = new;
879 reg_next_eqv[lastr] = new;
880 reg_prev_eqv[new] = lastr;
884 /* Remove REG from its equivalence class. */
887 delete_reg_equiv (reg)
890 register int q = reg_qty[reg];
893 /* If invalid, do nothing. */
897 p = reg_prev_eqv[reg];
898 n = reg_next_eqv[reg];
907 qty_first_reg[q] = n;
912 /* Remove any invalid expressions from the hash table
913 that refer to any of the registers contained in expression X.
915 Make sure that newly inserted references to those registers
916 as subexpressions will be considered valid.
918 mention_regs is not called when a register itself
919 is being stored in the table.
921 Return 1 if we have done something that may have changed the hash code
928 register enum rtx_code code;
931 register int changed = 0;
939 register int regno = REGNO (x);
940 register int endregno
941 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
942 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
945 for (i = regno; i < endregno; i++)
947 if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
948 remove_invalid_refs (i);
950 reg_in_table[i] = reg_tick[i];
956 /* If X is a comparison or a COMPARE and either operand is a register
957 that does not have a quantity, give it one. This is so that a later
958 call to record_jump_equiv won't cause X to be assigned a different
959 hash code and not found in the table after that call.
961 It is not necessary to do this here, since rehash_using_reg can
962 fix up the table later, but doing this here eliminates the need to
963 call that expensive function in the most common case where the only
964 use of the register is in the comparison. */
966 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
968 if (GET_CODE (XEXP (x, 0)) == REG
969 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
970 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
972 rehash_using_reg (XEXP (x, 0));
976 if (GET_CODE (XEXP (x, 1)) == REG
977 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
978 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
980 rehash_using_reg (XEXP (x, 1));
985 fmt = GET_RTX_FORMAT (code);
986 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
988 changed |= mention_regs (XEXP (x, i));
989 else if (fmt[i] == 'E')
990 for (j = 0; j < XVECLEN (x, i); j++)
991 changed |= mention_regs (XVECEXP (x, i, j));
996 /* Update the register quantities for inserting X into the hash table
997 with a value equivalent to CLASSP.
998 (If the class does not contain a REG, it is irrelevant.)
999 If MODIFIED is nonzero, X is a destination; it is being modified.
1000 Note that delete_reg_equiv should be called on a register
1001 before insert_regs is done on that register with MODIFIED != 0.
1003 Nonzero value means that elements of reg_qty have changed
1004 so X's hash code may be different. */
1007 insert_regs (x, classp, modified)
1009 struct table_elt *classp;
1012 if (GET_CODE (x) == REG)
1014 register int regno = REGNO (x);
1016 /* If REGNO is in the equivalence table already but is of the
1017 wrong mode for that equivalence, don't do anything here. */
1019 if (REGNO_QTY_VALID_P (regno)
1020 && qty_mode[reg_qty[regno]] != GET_MODE (x))
1023 if (modified || ! REGNO_QTY_VALID_P (regno))
1026 for (classp = classp->first_same_value;
1028 classp = classp->next_same_value)
1029 if (GET_CODE (classp->exp) == REG
1030 && GET_MODE (classp->exp) == GET_MODE (x))
1032 make_regs_eqv (regno, REGNO (classp->exp));
1036 make_new_qty (regno);
1037 qty_mode[reg_qty[regno]] = GET_MODE (x);
1044 /* If X is a SUBREG, we will likely be inserting the inner register in the
1045 table. If that register doesn't have an assigned quantity number at
1046 this point but does later, the insertion that we will be doing now will
1047 not be accessible because its hash code will have changed. So assign
1048 a quantity number now. */
1050 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1051 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1053 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1054 mention_regs (SUBREG_REG (x));
1058 return mention_regs (x);
1061 /* Look in or update the hash table. */
1063 /* Put the element ELT on the list of free elements. */
1067 struct table_elt *elt;
1069 elt->next_same_hash = free_element_chain;
1070 free_element_chain = elt;
1073 /* Return an element that is free for use. */
1075 static struct table_elt *
1078 struct table_elt *elt = free_element_chain;
1081 free_element_chain = elt->next_same_hash;
1085 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1088 /* Remove table element ELT from use in the table.
1089 HASH is its hash code, made using the HASH macro.
1090 It's an argument because often that is known in advance
1091 and we save much time not recomputing it. */
1094 remove_from_table (elt, hash)
1095 register struct table_elt *elt;
1101 /* Mark this element as removed. See cse_insn. */
1102 elt->first_same_value = 0;
1104 /* Remove the table element from its equivalence class. */
1107 register struct table_elt *prev = elt->prev_same_value;
1108 register struct table_elt *next = elt->next_same_value;
1110 if (next) next->prev_same_value = prev;
1113 prev->next_same_value = next;
1116 register struct table_elt *newfirst = next;
1119 next->first_same_value = newfirst;
1120 next = next->next_same_value;
1125 /* Remove the table element from its hash bucket. */
1128 register struct table_elt *prev = elt->prev_same_hash;
1129 register struct table_elt *next = elt->next_same_hash;
1131 if (next) next->prev_same_hash = prev;
1134 prev->next_same_hash = next;
1135 else if (table[hash] == elt)
1139 /* This entry is not in the proper hash bucket. This can happen
1140 when two classes were merged by `merge_equiv_classes'. Search
1141 for the hash bucket that it heads. This happens only very
1142 rarely, so the cost is acceptable. */
1143 for (hash = 0; hash < NBUCKETS; hash++)
1144 if (table[hash] == elt)
1149 /* Remove the table element from its related-value circular chain. */
1151 if (elt->related_value != 0 && elt->related_value != elt)
1153 register struct table_elt *p = elt->related_value;
1154 while (p->related_value != elt)
1155 p = p->related_value;
1156 p->related_value = elt->related_value;
1157 if (p->related_value == p)
1158 p->related_value = 0;
1164 /* Look up X in the hash table and return its table element,
1165 or 0 if X is not in the table.
1167 MODE is the machine-mode of X, or if X is an integer constant
1168 with VOIDmode then MODE is the mode with which X will be used.
1170 Here we are satisfied to find an expression whose tree structure
1173 static struct table_elt *
1174 lookup (x, hash, mode)
1177 enum machine_mode mode;
1179 register struct table_elt *p;
1181 for (p = table[hash]; p; p = p->next_same_hash)
1182 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1183 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1189 /* Like `lookup' but don't care whether the table element uses invalid regs.
1190 Also ignore discrepancies in the machine mode of a register. */
1192 static struct table_elt *
1193 lookup_for_remove (x, hash, mode)
1196 enum machine_mode mode;
1198 register struct table_elt *p;
1200 if (GET_CODE (x) == REG)
1202 int regno = REGNO (x);
1203 /* Don't check the machine mode when comparing registers;
1204 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1205 for (p = table[hash]; p; p = p->next_same_hash)
1206 if (GET_CODE (p->exp) == REG
1207 && REGNO (p->exp) == regno)
1212 for (p = table[hash]; p; p = p->next_same_hash)
1213 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1220 /* Look for an expression equivalent to X and with code CODE.
1221 If one is found, return that expression. */
1224 lookup_as_function (x, code)
1228 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1233 for (p = p->first_same_value; p; p = p->next_same_value)
1235 if (GET_CODE (p->exp) == code
1236 /* Make sure this is a valid entry in the table. */
1237 && exp_equiv_p (p->exp, p->exp, 1, 0))
1244 /* Insert X in the hash table, assuming HASH is its hash code
1245 and CLASSP is an element of the class it should go in
1246 (or 0 if a new class should be made).
1247 It is inserted at the proper position to keep the class in
1248 the order cheapest first.
1250 MODE is the machine-mode of X, or if X is an integer constant
1251 with VOIDmode then MODE is the mode with which X will be used.
1253 For elements of equal cheapness, the most recent one
1254 goes in front, except that the first element in the list
1255 remains first unless a cheaper element is added. The order of
1256 pseudo-registers does not matter, as canon_reg will be called to
1257 find the cheapest when a register is retrieved from the table.
1259 The in_memory field in the hash table element is set to 0.
1260 The caller must set it nonzero if appropriate.
1262 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1263 and if insert_regs returns a nonzero value
1264 you must then recompute its hash code before calling here.
1266 If necessary, update table showing constant values of quantities. */
1268 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1270 static struct table_elt *
1271 insert (x, classp, hash, mode)
1273 register struct table_elt *classp;
1275 enum machine_mode mode;
1277 register struct table_elt *elt;
1279 /* If X is a register and we haven't made a quantity for it,
1280 something is wrong. */
1281 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1284 /* If X is a hard register, show it is being put in the table. */
1285 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1287 int regno = REGNO (x);
1288 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1291 for (i = regno; i < endregno; i++)
1292 SET_HARD_REG_BIT (hard_regs_in_table, i);
1295 /* If X is a label, show we recorded it. */
1296 if (GET_CODE (x) == LABEL_REF
1297 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1298 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1299 recorded_label_ref = 1;
1301 /* Put an element for X into the right hash bucket. */
1303 elt = get_element ();
1305 elt->cost = COST (x);
1306 elt->next_same_value = 0;
1307 elt->prev_same_value = 0;
1308 elt->next_same_hash = table[hash];
1309 elt->prev_same_hash = 0;
1310 elt->related_value = 0;
1313 elt->is_const = (CONSTANT_P (x)
1314 /* GNU C++ takes advantage of this for `this'
1315 (and other const values). */
1316 || (RTX_UNCHANGING_P (x)
1317 && GET_CODE (x) == REG
1318 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1319 || FIXED_BASE_PLUS_P (x));
1322 table[hash]->prev_same_hash = elt;
1325 /* Put it into the proper value-class. */
1328 classp = classp->first_same_value;
1329 if (CHEAPER (elt, classp))
1330 /* Insert at the head of the class */
1332 register struct table_elt *p;
1333 elt->next_same_value = classp;
1334 classp->prev_same_value = elt;
1335 elt->first_same_value = elt;
1337 for (p = classp; p; p = p->next_same_value)
1338 p->first_same_value = elt;
1342 /* Insert not at head of the class. */
1343 /* Put it after the last element cheaper than X. */
1344 register struct table_elt *p, *next;
1345 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1347 /* Put it after P and before NEXT. */
1348 elt->next_same_value = next;
1350 next->prev_same_value = elt;
1351 elt->prev_same_value = p;
1352 p->next_same_value = elt;
1353 elt->first_same_value = classp;
1357 elt->first_same_value = elt;
1359 /* If this is a constant being set equivalent to a register or a register
1360 being set equivalent to a constant, note the constant equivalence.
1362 If this is a constant, it cannot be equivalent to a different constant,
1363 and a constant is the only thing that can be cheaper than a register. So
1364 we know the register is the head of the class (before the constant was
1367 If this is a register that is not already known equivalent to a
1368 constant, we must check the entire class.
1370 If this is a register that is already known equivalent to an insn,
1371 update `qty_const_insn' to show that `this_insn' is the latest
1372 insn making that quantity equivalent to the constant. */
1374 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1375 && GET_CODE (x) != REG)
1377 qty_const[reg_qty[REGNO (classp->exp)]]
1378 = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1379 qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1382 else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]
1385 register struct table_elt *p;
1387 for (p = classp; p != 0; p = p->next_same_value)
1389 if (p->is_const && GET_CODE (p->exp) != REG)
1391 qty_const[reg_qty[REGNO (x)]]
1392 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1393 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1399 else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1400 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1401 qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1403 /* If this is a constant with symbolic value,
1404 and it has a term with an explicit integer value,
1405 link it up with related expressions. */
1406 if (GET_CODE (x) == CONST)
1408 rtx subexp = get_related_value (x);
1410 struct table_elt *subelt, *subelt_prev;
1414 /* Get the integer-free subexpression in the hash table. */
1415 subhash = safe_hash (subexp, mode) % NBUCKETS;
1416 subelt = lookup (subexp, subhash, mode);
1418 subelt = insert (subexp, NULL_PTR, subhash, mode);
1419 /* Initialize SUBELT's circular chain if it has none. */
1420 if (subelt->related_value == 0)
1421 subelt->related_value = subelt;
1422 /* Find the element in the circular chain that precedes SUBELT. */
1423 subelt_prev = subelt;
1424 while (subelt_prev->related_value != subelt)
1425 subelt_prev = subelt_prev->related_value;
1426 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1427 This way the element that follows SUBELT is the oldest one. */
1428 elt->related_value = subelt_prev->related_value;
1429 subelt_prev->related_value = elt;
1436 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1437 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1438 the two classes equivalent.
1440 CLASS1 will be the surviving class; CLASS2 should not be used after this
1443 Any invalid entries in CLASS2 will not be copied. */
1446 merge_equiv_classes (class1, class2)
1447 struct table_elt *class1, *class2;
1449 struct table_elt *elt, *next, *new;
1451 /* Ensure we start with the head of the classes. */
1452 class1 = class1->first_same_value;
1453 class2 = class2->first_same_value;
1455 /* If they were already equal, forget it. */
1456 if (class1 == class2)
1459 for (elt = class2; elt; elt = next)
1463 enum machine_mode mode = elt->mode;
1465 next = elt->next_same_value;
1467 /* Remove old entry, make a new one in CLASS1's class.
1468 Don't do this for invalid entries as we cannot find their
1469 hash code (it also isn't necessary). */
1470 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1472 hash_arg_in_memory = 0;
1473 hash_arg_in_struct = 0;
1474 hash = HASH (exp, mode);
1476 if (GET_CODE (exp) == REG)
1477 delete_reg_equiv (REGNO (exp));
1479 remove_from_table (elt, hash);
1481 if (insert_regs (exp, class1, 0))
1483 rehash_using_reg (exp);
1484 hash = HASH (exp, mode);
1486 new = insert (exp, class1, hash, mode);
1487 new->in_memory = hash_arg_in_memory;
1488 new->in_struct = hash_arg_in_struct;
1493 /* Remove from the hash table, or mark as invalid,
1494 all expressions whose values could be altered by storing in X.
1495 X is a register, a subreg, or a memory reference with nonvarying address
1496 (because, when a memory reference with a varying address is stored in,
1497 all memory references are removed by invalidate_memory
1498 so specific invalidation is superfluous).
1499 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1500 instead of just the amount indicated by the mode of X. This is only used
1501 for bitfield stores into memory.
1503 A nonvarying address may be just a register or just
1504 a symbol reference, or it may be either of those plus
1505 a numeric offset. */
1508 invalidate (x, full_mode)
1510 enum machine_mode full_mode;
1513 register struct table_elt *p;
1515 HOST_WIDE_INT start, end;
1517 /* If X is a register, dependencies on its contents
1518 are recorded through the qty number mechanism.
1519 Just change the qty number of the register,
1520 mark it as invalid for expressions that refer to it,
1521 and remove it itself. */
1523 if (GET_CODE (x) == REG)
1525 register int regno = REGNO (x);
1526 register unsigned hash = HASH (x, GET_MODE (x));
1528 /* Remove REGNO from any quantity list it might be on and indicate
1529 that it's value might have changed. If it is a pseudo, remove its
1530 entry from the hash table.
1532 For a hard register, we do the first two actions above for any
1533 additional hard registers corresponding to X. Then, if any of these
1534 registers are in the table, we must remove any REG entries that
1535 overlap these registers. */
1537 delete_reg_equiv (regno);
1540 if (regno >= FIRST_PSEUDO_REGISTER)
1542 /* Because a register can be referenced in more than one mode,
1543 we might have to remove more than one table entry. */
1545 struct table_elt *elt;
1547 while (elt = lookup_for_remove (x, hash, GET_MODE (x)))
1548 remove_from_table (elt, hash);
1552 HOST_WIDE_INT in_table
1553 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1554 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1555 int tregno, tendregno;
1556 register struct table_elt *p, *next;
1558 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1560 for (i = regno + 1; i < endregno; i++)
1562 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1563 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1564 delete_reg_equiv (i);
1569 for (hash = 0; hash < NBUCKETS; hash++)
1570 for (p = table[hash]; p; p = next)
1572 next = p->next_same_hash;
1574 if (GET_CODE (p->exp) != REG
1575 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1578 tregno = REGNO (p->exp);
1580 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1581 if (tendregno > regno && tregno < endregno)
1582 remove_from_table (p, hash);
1589 if (GET_CODE (x) == SUBREG)
1591 if (GET_CODE (SUBREG_REG (x)) != REG)
1593 invalidate (SUBREG_REG (x), VOIDmode);
1597 /* X is not a register; it must be a memory reference with
1598 a nonvarying address. Remove all hash table elements
1599 that refer to overlapping pieces of memory. */
1601 if (GET_CODE (x) != MEM)
1604 if (full_mode == VOIDmode)
1605 full_mode = GET_MODE (x);
1607 set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (full_mode),
1608 &base, &start, &end);
1610 for (i = 0; i < NBUCKETS; i++)
1612 register struct table_elt *next;
1613 for (p = table[i]; p; p = next)
1615 next = p->next_same_hash;
1616 if (refers_to_mem_p (p->exp, base, start, end))
1617 remove_from_table (p, i);
1622 /* Remove all expressions that refer to register REGNO,
1623 since they are already invalid, and we are about to
1624 mark that register valid again and don't want the old
1625 expressions to reappear as valid. */
1628 remove_invalid_refs (regno)
1632 register struct table_elt *p, *next;
1634 for (i = 0; i < NBUCKETS; i++)
1635 for (p = table[i]; p; p = next)
1637 next = p->next_same_hash;
1638 if (GET_CODE (p->exp) != REG
1639 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1640 remove_from_table (p, i);
1644 /* Recompute the hash codes of any valid entries in the hash table that
1645 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1647 This is called when we make a jump equivalence. */
1650 rehash_using_reg (x)
1654 struct table_elt *p, *next;
1657 if (GET_CODE (x) == SUBREG)
1660 /* If X is not a register or if the register is known not to be in any
1661 valid entries in the table, we have no work to do. */
1663 if (GET_CODE (x) != REG
1664 || reg_in_table[REGNO (x)] < 0
1665 || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1668 /* Scan all hash chains looking for valid entries that mention X.
1669 If we find one and it is in the wrong hash chain, move it. We can skip
1670 objects that are registers, since they are handled specially. */
1672 for (i = 0; i < NBUCKETS; i++)
1673 for (p = table[i]; p; p = next)
1675 next = p->next_same_hash;
1676 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1677 && exp_equiv_p (p->exp, p->exp, 1, 0)
1678 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1680 if (p->next_same_hash)
1681 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1683 if (p->prev_same_hash)
1684 p->prev_same_hash->next_same_hash = p->next_same_hash;
1686 table[i] = p->next_same_hash;
1688 p->next_same_hash = table[hash];
1689 p->prev_same_hash = 0;
1691 table[hash]->prev_same_hash = p;
1697 /* Remove from the hash table all expressions that reference memory,
1698 or some of them as specified by *WRITES. */
1701 invalidate_memory (writes)
1702 struct write_data *writes;
1705 register struct table_elt *p, *next;
1706 int all = writes->all;
1707 int nonscalar = writes->nonscalar;
1709 for (i = 0; i < NBUCKETS; i++)
1710 for (p = table[i]; p; p = next)
1712 next = p->next_same_hash;
1715 || (nonscalar && p->in_struct)
1716 || cse_rtx_addr_varies_p (p->exp)))
1717 remove_from_table (p, i);
1721 /* Remove from the hash table any expression that is a call-clobbered
1722 register. Also update their TICK values. */
1725 invalidate_for_call ()
1727 int regno, endregno;
1730 struct table_elt *p, *next;
1733 /* Go through all the hard registers. For each that is clobbered in
1734 a CALL_INSN, remove the register from quantity chains and update
1735 reg_tick if defined. Also see if any of these registers is currently
1738 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1739 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1741 delete_reg_equiv (regno);
1742 if (reg_tick[regno] >= 0)
1745 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1748 /* In the case where we have no call-clobbered hard registers in the
1749 table, we are done. Otherwise, scan the table and remove any
1750 entry that overlaps a call-clobbered register. */
1753 for (hash = 0; hash < NBUCKETS; hash++)
1754 for (p = table[hash]; p; p = next)
1756 next = p->next_same_hash;
1758 if (GET_CODE (p->exp) != REG
1759 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1762 regno = REGNO (p->exp);
1763 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1765 for (i = regno; i < endregno; i++)
1766 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1768 remove_from_table (p, hash);
1774 /* Given an expression X of type CONST,
1775 and ELT which is its table entry (or 0 if it
1776 is not in the hash table),
1777 return an alternate expression for X as a register plus integer.
1778 If none can be found, return 0. */
1781 use_related_value (x, elt)
1783 struct table_elt *elt;
1785 register struct table_elt *relt = 0;
1786 register struct table_elt *p, *q;
1787 HOST_WIDE_INT offset;
1789 /* First, is there anything related known?
1790 If we have a table element, we can tell from that.
1791 Otherwise, must look it up. */
1793 if (elt != 0 && elt->related_value != 0)
1795 else if (elt == 0 && GET_CODE (x) == CONST)
1797 rtx subexp = get_related_value (x);
1799 relt = lookup (subexp,
1800 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1807 /* Search all related table entries for one that has an
1808 equivalent register. */
1813 /* This loop is strange in that it is executed in two different cases.
1814 The first is when X is already in the table. Then it is searching
1815 the RELATED_VALUE list of X's class (RELT). The second case is when
1816 X is not in the table. Then RELT points to a class for the related
1819 Ensure that, whatever case we are in, that we ignore classes that have
1820 the same value as X. */
1822 if (rtx_equal_p (x, p->exp))
1825 for (q = p->first_same_value; q; q = q->next_same_value)
1826 if (GET_CODE (q->exp) == REG)
1832 p = p->related_value;
1834 /* We went all the way around, so there is nothing to be found.
1835 Alternatively, perhaps RELT was in the table for some other reason
1836 and it has no related values recorded. */
1837 if (p == relt || p == 0)
1844 offset = (get_integer_term (x) - get_integer_term (p->exp));
1845 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1846 return plus_constant (q->exp, offset);
1849 /* Hash an rtx. We are careful to make sure the value is never negative.
1850 Equivalent registers hash identically.
1851 MODE is used in hashing for CONST_INTs only;
1852 otherwise the mode of X is used.
1854 Store 1 in do_not_record if any subexpression is volatile.
1856 Store 1 in hash_arg_in_memory if X contains a MEM rtx
1857 which does not have the RTX_UNCHANGING_P bit set.
1858 In this case, also store 1 in hash_arg_in_struct
1859 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1861 Note that cse_insn knows that the hash code of a MEM expression
1862 is just (int) MEM plus the hash code of the address. */
1865 canon_hash (x, mode)
1867 enum machine_mode mode;
1870 register unsigned hash = 0;
1871 register enum rtx_code code;
1874 /* repeat is used to turn tail-recursion into iteration. */
1879 code = GET_CODE (x);
1884 register int regno = REGNO (x);
1886 /* On some machines, we can't record any non-fixed hard register,
1887 because extending its life will cause reload problems. We
1888 consider ap, fp, and sp to be fixed for this purpose.
1889 On all machines, we can't record any global registers. */
1891 if (regno < FIRST_PSEUDO_REGISTER
1892 && (global_regs[regno]
1893 #ifdef SMALL_REGISTER_CLASSES
1894 || (! fixed_regs[regno]
1895 && regno != FRAME_POINTER_REGNUM
1896 && regno != HARD_FRAME_POINTER_REGNUM
1897 && regno != ARG_POINTER_REGNUM
1898 && regno != STACK_POINTER_REGNUM)
1905 hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno];
1911 unsigned HOST_WIDE_INT tem = INTVAL (x);
1912 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
1917 /* This is like the general case, except that it only counts
1918 the integers representing the constant. */
1919 hash += (unsigned) code + (unsigned) GET_MODE (x);
1920 if (GET_MODE (x) != VOIDmode)
1921 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1923 unsigned tem = XINT (x, i);
1927 hash += ((unsigned) CONST_DOUBLE_LOW (x)
1928 + (unsigned) CONST_DOUBLE_HIGH (x));
1931 /* Assume there is only one rtx object for any given label. */
1934 += ((unsigned) LABEL_REF << 7) + (unsigned HOST_WIDE_INT) XEXP (x, 0);
1939 += ((unsigned) SYMBOL_REF << 7) + (unsigned HOST_WIDE_INT) XSTR (x, 0);
1943 if (MEM_VOLATILE_P (x))
1948 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
1950 hash_arg_in_memory = 1;
1951 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1953 /* Now that we have already found this special case,
1954 might as well speed it up as much as possible. */
1955 hash += (unsigned) MEM;
1966 case UNSPEC_VOLATILE:
1971 if (MEM_VOLATILE_P (x))
1978 i = GET_RTX_LENGTH (code) - 1;
1979 hash += (unsigned) code + (unsigned) GET_MODE (x);
1980 fmt = GET_RTX_FORMAT (code);
1985 rtx tem = XEXP (x, i);
1987 /* If we are about to do the last recursive call
1988 needed at this level, change it into iteration.
1989 This function is called enough to be worth it. */
1995 hash += canon_hash (tem, 0);
1997 else if (fmt[i] == 'E')
1998 for (j = 0; j < XVECLEN (x, i); j++)
1999 hash += canon_hash (XVECEXP (x, i, j), 0);
2000 else if (fmt[i] == 's')
2002 register unsigned char *p = (unsigned char *) XSTR (x, i);
2007 else if (fmt[i] == 'i')
2009 register unsigned tem = XINT (x, i);
2018 /* Like canon_hash but with no side effects. */
2023 enum machine_mode mode;
2025 int save_do_not_record = do_not_record;
2026 int save_hash_arg_in_memory = hash_arg_in_memory;
2027 int save_hash_arg_in_struct = hash_arg_in_struct;
2028 unsigned hash = canon_hash (x, mode);
2029 hash_arg_in_memory = save_hash_arg_in_memory;
2030 hash_arg_in_struct = save_hash_arg_in_struct;
2031 do_not_record = save_do_not_record;
2035 /* Return 1 iff X and Y would canonicalize into the same thing,
2036 without actually constructing the canonicalization of either one.
2037 If VALIDATE is nonzero,
2038 we assume X is an expression being processed from the rtl
2039 and Y was found in the hash table. We check register refs
2040 in Y for being marked as valid.
2042 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2043 that is known to be in the register. Ordinarily, we don't allow them
2044 to match, because letting them match would cause unpredictable results
2045 in all the places that search a hash table chain for an equivalent
2046 for a given value. A possible equivalent that has different structure
2047 has its hash code computed from different data. Whether the hash code
2048 is the same as that of the the given value is pure luck. */
2051 exp_equiv_p (x, y, validate, equal_values)
2057 register enum rtx_code code;
2060 /* Note: it is incorrect to assume an expression is equivalent to itself
2061 if VALIDATE is nonzero. */
2062 if (x == y && !validate)
2064 if (x == 0 || y == 0)
2067 code = GET_CODE (x);
2068 if (code != GET_CODE (y))
2073 /* If X is a constant and Y is a register or vice versa, they may be
2074 equivalent. We only have to validate if Y is a register. */
2075 if (CONSTANT_P (x) && GET_CODE (y) == REG
2076 && REGNO_QTY_VALID_P (REGNO (y))
2077 && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2078 && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2079 && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2082 if (CONSTANT_P (y) && code == REG
2083 && REGNO_QTY_VALID_P (REGNO (x))
2084 && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2085 && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2091 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2092 if (GET_MODE (x) != GET_MODE (y))
2102 return INTVAL (x) == INTVAL (y);
2105 return XEXP (x, 0) == XEXP (y, 0);
2108 return XSTR (x, 0) == XSTR (y, 0);
2112 int regno = REGNO (y);
2114 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2115 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2118 /* If the quantities are not the same, the expressions are not
2119 equivalent. If there are and we are not to validate, they
2120 are equivalent. Otherwise, ensure all regs are up-to-date. */
2122 if (reg_qty[REGNO (x)] != reg_qty[regno])
2128 for (i = regno; i < endregno; i++)
2129 if (reg_in_table[i] != reg_tick[i])
2135 /* For commutative operations, check both orders. */
2143 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2144 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2145 validate, equal_values))
2146 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2147 validate, equal_values)
2148 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2149 validate, equal_values)));
2152 /* Compare the elements. If any pair of corresponding elements
2153 fail to match, return 0 for the whole things. */
2155 fmt = GET_RTX_FORMAT (code);
2156 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2161 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2166 if (XVECLEN (x, i) != XVECLEN (y, i))
2168 for (j = 0; j < XVECLEN (x, i); j++)
2169 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2170 validate, equal_values))
2175 if (strcmp (XSTR (x, i), XSTR (y, i)))
2180 if (XINT (x, i) != XINT (y, i))
2185 if (XWINT (x, i) != XWINT (y, i))
2200 /* Return 1 iff any subexpression of X matches Y.
2201 Here we do not require that X or Y be valid (for registers referred to)
2202 for being in the hash table. */
2209 register enum rtx_code code;
2215 if (x == 0 || y == 0)
2218 code = GET_CODE (x);
2219 /* If X as a whole has the same code as Y, they may match.
2221 if (code == GET_CODE (y))
2223 if (exp_equiv_p (x, y, 0, 1))
2227 /* X does not match, so try its subexpressions. */
2229 fmt = GET_RTX_FORMAT (code);
2230 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2239 if (refers_to_p (XEXP (x, i), y))
2242 else if (fmt[i] == 'E')
2245 for (j = 0; j < XVECLEN (x, i); j++)
2246 if (refers_to_p (XVECEXP (x, i, j), y))
2253 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2254 set PBASE, PSTART, and PEND which correspond to the base of the address,
2255 the starting offset, and ending offset respectively.
2257 ADDR is known to be a nonvarying address. */
2259 /* ??? Despite what the comments say, this function is in fact frequently
2260 passed varying addresses. This does not appear to cause any problems. */
2263 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2267 HOST_WIDE_INT *pstart, *pend;
2270 HOST_WIDE_INT start, end;
2276 /* Registers with nonvarying addresses usually have constant equivalents;
2277 but the frame pointer register is also possible. */
2278 if (GET_CODE (base) == REG
2280 && REGNO_QTY_VALID_P (REGNO (base))
2281 && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2282 && qty_const[reg_qty[REGNO (base)]] != 0)
2283 base = qty_const[reg_qty[REGNO (base)]];
2284 else if (GET_CODE (base) == PLUS
2285 && GET_CODE (XEXP (base, 1)) == CONST_INT
2286 && GET_CODE (XEXP (base, 0)) == REG
2288 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2289 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2290 == GET_MODE (XEXP (base, 0)))
2291 && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2293 start = INTVAL (XEXP (base, 1));
2294 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2296 /* This can happen as the result of virtual register instantiation,
2297 if the initial offset is too large to be a valid address. */
2298 else if (GET_CODE (base) == PLUS
2299 && GET_CODE (XEXP (base, 0)) == REG
2300 && GET_CODE (XEXP (base, 1)) == REG
2302 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2303 && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2304 == GET_MODE (XEXP (base, 0)))
2305 && qty_const[reg_qty[REGNO (XEXP (base, 0))]]
2306 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2307 && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]]
2308 == GET_MODE (XEXP (base, 1)))
2309 && qty_const[reg_qty[REGNO (XEXP (base, 1))]])
2311 rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]];
2312 base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2314 /* One of the two values must be a constant. */
2315 if (GET_CODE (base) != CONST_INT)
2317 if (GET_CODE (tem) != CONST_INT)
2319 start = INTVAL (tem);
2323 start = INTVAL (base);
2328 /* Handle everything that we can find inside an address that has been
2329 viewed as constant. */
2333 /* If no part of this switch does a "continue", the code outside
2334 will exit this loop. */
2336 switch (GET_CODE (base))
2339 /* By definition, operand1 of a LO_SUM is the associated constant
2340 address. Use the associated constant address as the base
2342 base = XEXP (base, 1);
2346 /* Strip off CONST. */
2347 base = XEXP (base, 0);
2351 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2353 start += INTVAL (XEXP (base, 1));
2354 base = XEXP (base, 0);
2360 /* Handle the case of an AND which is the negative of a power of
2361 two. This is used to represent unaligned memory operations. */
2362 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2363 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2365 set_nonvarying_address_components (XEXP (base, 0), size,
2366 pbase, pstart, pend);
2368 /* Assume the worst misalignment. START is affected, but not
2369 END, so compensate but adjusting SIZE. Don't lose any
2370 constant we already had. */
2372 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2373 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2383 if (GET_CODE (base) == CONST_INT)
2385 start += INTVAL (base);
2391 /* Set the return values. */
2397 /* Return 1 iff any subexpression of X refers to memory
2398 at an address of BASE plus some offset
2399 such that any of the bytes' offsets fall between START (inclusive)
2400 and END (exclusive).
2402 The value is undefined if X is a varying address (as determined by
2403 cse_rtx_addr_varies_p). This function is not used in such cases.
2405 When used in the cse pass, `qty_const' is nonzero, and it is used
2406 to treat an address that is a register with a known constant value
2407 as if it were that constant value.
2408 In the loop pass, `qty_const' is zero, so this is not done. */
2411 refers_to_mem_p (x, base, start, end)
2413 HOST_WIDE_INT start, end;
2415 register HOST_WIDE_INT i;
2416 register enum rtx_code code;
2423 code = GET_CODE (x);
2426 register rtx addr = XEXP (x, 0); /* Get the address. */
2428 HOST_WIDE_INT mystart, myend;
2430 set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)),
2431 &mybase, &mystart, &myend);
2434 /* refers_to_mem_p is never called with varying addresses.
2435 If the base addresses are not equal, there is no chance
2436 of the memory addresses conflicting. */
2437 if (! rtx_equal_p (mybase, base))
2440 return myend > start && mystart < end;
2443 /* X does not match, so try its subexpressions. */
2445 fmt = GET_RTX_FORMAT (code);
2446 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2455 if (refers_to_mem_p (XEXP (x, i), base, start, end))
2458 else if (fmt[i] == 'E')
2461 for (j = 0; j < XVECLEN (x, i); j++)
2462 if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end))
2469 /* Nonzero if X refers to memory at a varying address;
2470 except that a register which has at the moment a known constant value
2471 isn't considered variable. */
2474 cse_rtx_addr_varies_p (x)
2477 /* We need not check for X and the equivalence class being of the same
2478 mode because if X is equivalent to a constant in some mode, it
2479 doesn't vary in any mode. */
2481 if (GET_CODE (x) == MEM
2482 && GET_CODE (XEXP (x, 0)) == REG
2483 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2484 && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]]
2485 && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0)
2488 if (GET_CODE (x) == MEM
2489 && GET_CODE (XEXP (x, 0)) == PLUS
2490 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2491 && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
2492 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0)))
2493 && (GET_MODE (XEXP (XEXP (x, 0), 0))
2494 == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2495 && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2498 /* This can happen as the result of virtual register instantiation, if
2499 the initial constant is too large to be a valid address. This gives
2500 us a three instruction sequence, load large offset into a register,
2501 load fp minus a constant into a register, then a MEM which is the
2502 sum of the two `constant' registers. */
2503 if (GET_CODE (x) == MEM
2504 && GET_CODE (XEXP (x, 0)) == PLUS
2505 && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
2506 && GET_CODE (XEXP (XEXP (x, 0), 1)) == REG
2507 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0)))
2508 && (GET_MODE (XEXP (XEXP (x, 0), 0))
2509 == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2510 && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]
2511 && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 1)))
2512 && (GET_MODE (XEXP (XEXP (x, 0), 1))
2513 == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 1))]])
2514 && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 1))]])
2517 return rtx_addr_varies_p (x);
2520 /* Canonicalize an expression:
2521 replace each register reference inside it
2522 with the "oldest" equivalent register.
2524 If INSN is non-zero and we are replacing a pseudo with a hard register
2525 or vice versa, validate_change is used to ensure that INSN remains valid
2526 after we make our substitution. The calls are made with IN_GROUP non-zero
2527 so apply_change_group must be called upon the outermost return from this
2528 function (unless INSN is zero). The result of apply_change_group can
2529 generally be discarded since the changes we are making are optional. */
2537 register enum rtx_code code;
2543 code = GET_CODE (x);
2561 /* Never replace a hard reg, because hard regs can appear
2562 in more than one machine mode, and we must preserve the mode
2563 of each occurrence. Also, some hard regs appear in
2564 MEMs that are shared and mustn't be altered. Don't try to
2565 replace any reg that maps to a reg of class NO_REGS. */
2566 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2567 || ! REGNO_QTY_VALID_P (REGNO (x)))
2570 first = qty_first_reg[reg_qty[REGNO (x)]];
2571 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2572 : REGNO_REG_CLASS (first) == NO_REGS ? x
2573 : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first));
2577 fmt = GET_RTX_FORMAT (code);
2578 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2584 rtx new = canon_reg (XEXP (x, i), insn);
2586 /* If replacing pseudo with hard reg or vice versa, ensure the
2587 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2588 if (insn != 0 && new != 0
2589 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2590 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2591 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2592 || insn_n_dups[recog_memoized (insn)] > 0))
2593 validate_change (insn, &XEXP (x, i), new, 1);
2597 else if (fmt[i] == 'E')
2598 for (j = 0; j < XVECLEN (x, i); j++)
2599 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2605 /* LOC is a location within INSN that is an operand address (the contents of
2606 a MEM). Find the best equivalent address to use that is valid for this
2609 On most CISC machines, complicated address modes are costly, and rtx_cost
2610 is a good approximation for that cost. However, most RISC machines have
2611 only a few (usually only one) memory reference formats. If an address is
2612 valid at all, it is often just as cheap as any other address. Hence, for
2613 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2614 costs of various addresses. For two addresses of equal cost, choose the one
2615 with the highest `rtx_cost' value as that has the potential of eliminating
2616 the most insns. For equal costs, we choose the first in the equivalence
2617 class. Note that we ignore the fact that pseudo registers are cheaper
2618 than hard registers here because we would also prefer the pseudo registers.
2622 find_best_addr (insn, loc)
2626 struct table_elt *elt, *p;
2629 int found_better = 1;
2630 int save_do_not_record = do_not_record;
2631 int save_hash_arg_in_memory = hash_arg_in_memory;
2632 int save_hash_arg_in_struct = hash_arg_in_struct;
2637 /* Do not try to replace constant addresses or addresses of local and
2638 argument slots. These MEM expressions are made only once and inserted
2639 in many instructions, as well as being used to control symbol table
2640 output. It is not safe to clobber them.
2642 There are some uncommon cases where the address is already in a register
2643 for some reason, but we cannot take advantage of that because we have
2644 no easy way to unshare the MEM. In addition, looking up all stack
2645 addresses is costly. */
2646 if ((GET_CODE (addr) == PLUS
2647 && GET_CODE (XEXP (addr, 0)) == REG
2648 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2649 && (regno = REGNO (XEXP (addr, 0)),
2650 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2651 || regno == ARG_POINTER_REGNUM))
2652 || (GET_CODE (addr) == REG
2653 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2654 || regno == HARD_FRAME_POINTER_REGNUM
2655 || regno == ARG_POINTER_REGNUM))
2656 || CONSTANT_ADDRESS_P (addr))
2659 /* If this address is not simply a register, try to fold it. This will
2660 sometimes simplify the expression. Many simplifications
2661 will not be valid, but some, usually applying the associative rule, will
2662 be valid and produce better code. */
2663 if (GET_CODE (addr) != REG)
2665 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2669 && (ADDRESS_COST (folded) < ADDRESS_COST (addr)
2670 || (ADDRESS_COST (folded) == ADDRESS_COST (addr)
2671 && rtx_cost (folded) > rtx_cost (addr)))
2673 && rtx_cost (folded) < rtx_cost (addr)
2675 && validate_change (insn, loc, folded, 0))
2679 /* If this address is not in the hash table, we can't look for equivalences
2680 of the whole address. Also, ignore if volatile. */
2683 hash = HASH (addr, Pmode);
2684 addr_volatile = do_not_record;
2685 do_not_record = save_do_not_record;
2686 hash_arg_in_memory = save_hash_arg_in_memory;
2687 hash_arg_in_struct = save_hash_arg_in_struct;
2692 elt = lookup (addr, hash, Pmode);
2694 #ifndef ADDRESS_COST
2697 our_cost = elt->cost;
2699 /* Find the lowest cost below ours that works. */
2700 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2701 if (elt->cost < our_cost
2702 && (GET_CODE (elt->exp) == REG
2703 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2704 && validate_change (insn, loc,
2705 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2712 /* We need to find the best (under the criteria documented above) entry
2713 in the class that is valid. We use the `flag' field to indicate
2714 choices that were invalid and iterate until we can't find a better
2715 one that hasn't already been tried. */
2717 for (p = elt->first_same_value; p; p = p->next_same_value)
2720 while (found_better)
2722 int best_addr_cost = ADDRESS_COST (*loc);
2723 int best_rtx_cost = (elt->cost + 1) >> 1;
2724 struct table_elt *best_elt = elt;
2727 for (p = elt->first_same_value; p; p = p->next_same_value)
2729 && (GET_CODE (p->exp) == REG
2730 || exp_equiv_p (p->exp, p->exp, 1, 0))
2731 && (ADDRESS_COST (p->exp) < best_addr_cost
2732 || (ADDRESS_COST (p->exp) == best_addr_cost
2733 && (p->cost + 1) >> 1 > best_rtx_cost)))
2736 best_addr_cost = ADDRESS_COST (p->exp);
2737 best_rtx_cost = (p->cost + 1) >> 1;
2743 if (validate_change (insn, loc,
2744 canon_reg (copy_rtx (best_elt->exp),
2753 /* If the address is a binary operation with the first operand a register
2754 and the second a constant, do the same as above, but looking for
2755 equivalences of the register. Then try to simplify before checking for
2756 the best address to use. This catches a few cases: First is when we
2757 have REG+const and the register is another REG+const. We can often merge
2758 the constants and eliminate one insn and one register. It may also be
2759 that a machine has a cheap REG+REG+const. Finally, this improves the
2760 code on the Alpha for unaligned byte stores. */
2762 if (flag_expensive_optimizations
2763 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2764 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2765 && GET_CODE (XEXP (*loc, 0)) == REG
2766 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2768 rtx c = XEXP (*loc, 1);
2771 hash = HASH (XEXP (*loc, 0), Pmode);
2772 do_not_record = save_do_not_record;
2773 hash_arg_in_memory = save_hash_arg_in_memory;
2774 hash_arg_in_struct = save_hash_arg_in_struct;
2776 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2780 /* We need to find the best (under the criteria documented above) entry
2781 in the class that is valid. We use the `flag' field to indicate
2782 choices that were invalid and iterate until we can't find a better
2783 one that hasn't already been tried. */
2785 for (p = elt->first_same_value; p; p = p->next_same_value)
2788 while (found_better)
2790 int best_addr_cost = ADDRESS_COST (*loc);
2791 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2792 struct table_elt *best_elt = elt;
2793 rtx best_rtx = *loc;
2796 /* This is at worst case an O(n^2) algorithm, so limit our search
2797 to the first 32 elements on the list. This avoids trouble
2798 compiling code with very long basic blocks that can easily
2799 call cse_gen_binary so many times that we run out of memory. */
2802 for (p = elt->first_same_value, count = 0;
2804 p = p->next_same_value, count++)
2806 && (GET_CODE (p->exp) == REG
2807 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2809 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
2811 if ((ADDRESS_COST (new) < best_addr_cost
2812 || (ADDRESS_COST (new) == best_addr_cost
2813 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2816 best_addr_cost = ADDRESS_COST (new);
2817 best_rtx_cost = (COST (new) + 1) >> 1;
2825 if (validate_change (insn, loc,
2826 canon_reg (copy_rtx (best_rtx),
2837 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2838 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2839 what values are being compared.
2841 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2842 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2843 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2844 compared to produce cc0.
2846 The return value is the comparison operator and is either the code of
2847 A or the code corresponding to the inverse of the comparison. */
2849 static enum rtx_code
2850 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2853 enum machine_mode *pmode1, *pmode2;
2857 arg1 = *parg1, arg2 = *parg2;
2859 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2861 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2863 /* Set non-zero when we find something of interest. */
2865 int reverse_code = 0;
2866 struct table_elt *p = 0;
2868 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2869 On machines with CC0, this is the only case that can occur, since
2870 fold_rtx will return the COMPARE or item being compared with zero
2873 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2876 /* If ARG1 is a comparison operator and CODE is testing for
2877 STORE_FLAG_VALUE, get the inner arguments. */
2879 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2882 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2883 && code == LT && STORE_FLAG_VALUE == -1)
2884 #ifdef FLOAT_STORE_FLAG_VALUE
2885 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2886 && FLOAT_STORE_FLAG_VALUE < 0)
2891 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2892 && code == GE && STORE_FLAG_VALUE == -1)
2893 #ifdef FLOAT_STORE_FLAG_VALUE
2894 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2895 && FLOAT_STORE_FLAG_VALUE < 0)
2898 x = arg1, reverse_code = 1;
2901 /* ??? We could also check for
2903 (ne (and (eq (...) (const_int 1))) (const_int 0))
2905 and related forms, but let's wait until we see them occurring. */
2908 /* Look up ARG1 in the hash table and see if it has an equivalence
2909 that lets us see what is being compared. */
2910 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2912 if (p) p = p->first_same_value;
2914 for (; p; p = p->next_same_value)
2916 enum machine_mode inner_mode = GET_MODE (p->exp);
2918 /* If the entry isn't valid, skip it. */
2919 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2922 if (GET_CODE (p->exp) == COMPARE
2923 /* Another possibility is that this machine has a compare insn
2924 that includes the comparison code. In that case, ARG1 would
2925 be equivalent to a comparison operation that would set ARG1 to
2926 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2927 ORIG_CODE is the actual comparison being done; if it is an EQ,
2928 we must reverse ORIG_CODE. On machine with a negative value
2929 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2932 && GET_MODE_CLASS (inner_mode) == MODE_INT
2933 && (GET_MODE_BITSIZE (inner_mode)
2934 <= HOST_BITS_PER_WIDE_INT)
2935 && (STORE_FLAG_VALUE
2936 & ((HOST_WIDE_INT) 1
2937 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2938 #ifdef FLOAT_STORE_FLAG_VALUE
2940 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2941 && FLOAT_STORE_FLAG_VALUE < 0)
2944 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2949 else if ((code == EQ
2951 && GET_MODE_CLASS (inner_mode) == MODE_INT
2952 && (GET_MODE_BITSIZE (inner_mode)
2953 <= HOST_BITS_PER_WIDE_INT)
2954 && (STORE_FLAG_VALUE
2955 & ((HOST_WIDE_INT) 1
2956 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2957 #ifdef FLOAT_STORE_FLAG_VALUE
2959 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2960 && FLOAT_STORE_FLAG_VALUE < 0)
2963 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2970 /* If this is fp + constant, the equivalent is a better operand since
2971 it may let us predict the value of the comparison. */
2972 else if (NONZERO_BASE_PLUS_P (p->exp))
2979 /* If we didn't find a useful equivalence for ARG1, we are done.
2980 Otherwise, set up for the next iteration. */
2984 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2985 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2986 code = GET_CODE (x);
2989 code = reverse_condition (code);
2992 /* Return our results. Return the modes from before fold_rtx
2993 because fold_rtx might produce const_int, and then it's too late. */
2994 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2995 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3000 /* Try to simplify a unary operation CODE whose output mode is to be
3001 MODE with input operand OP whose mode was originally OP_MODE.
3002 Return zero if no simplification can be made. */
3005 simplify_unary_operation (code, mode, op, op_mode)
3007 enum machine_mode mode;
3009 enum machine_mode op_mode;
3011 register int width = GET_MODE_BITSIZE (mode);
3013 /* The order of these tests is critical so that, for example, we don't
3014 check the wrong mode (input vs. output) for a conversion operation,
3015 such as FIX. At some point, this should be simplified. */
3017 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3019 if (code == FLOAT && GET_MODE (op) == VOIDmode
3020 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3022 HOST_WIDE_INT hv, lv;
3025 if (GET_CODE (op) == CONST_INT)
3026 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3028 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3030 #ifdef REAL_ARITHMETIC
3031 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3035 d = (double) (~ hv);
3036 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3037 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3038 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3044 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3045 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3046 d += (double) (unsigned HOST_WIDE_INT) lv;
3048 #endif /* REAL_ARITHMETIC */
3049 d = real_value_truncate (mode, d);
3050 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3052 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3053 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3055 HOST_WIDE_INT hv, lv;
3058 if (GET_CODE (op) == CONST_INT)
3059 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3061 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3063 if (op_mode == VOIDmode)
3065 /* We don't know how to interpret negative-looking numbers in
3066 this case, so don't try to fold those. */
3070 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3073 hv = 0, lv &= GET_MODE_MASK (op_mode);
3075 #ifdef REAL_ARITHMETIC
3076 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3079 d = (double) (unsigned HOST_WIDE_INT) hv;
3080 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3081 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3082 d += (double) (unsigned HOST_WIDE_INT) lv;
3083 #endif /* REAL_ARITHMETIC */
3084 d = real_value_truncate (mode, d);
3085 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3089 if (GET_CODE (op) == CONST_INT
3090 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3092 register HOST_WIDE_INT arg0 = INTVAL (op);
3093 register HOST_WIDE_INT val;
3106 val = (arg0 >= 0 ? arg0 : - arg0);
3110 /* Don't use ffs here. Instead, get low order bit and then its
3111 number. If arg0 is zero, this will return 0, as desired. */
3112 arg0 &= GET_MODE_MASK (mode);
3113 val = exact_log2 (arg0 & (- arg0)) + 1;
3121 if (op_mode == VOIDmode)
3123 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3125 /* If we were really extending the mode,
3126 we would have to distinguish between zero-extension
3127 and sign-extension. */
3128 if (width != GET_MODE_BITSIZE (op_mode))
3132 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3133 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3139 if (op_mode == VOIDmode)
3141 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3143 /* If we were really extending the mode,
3144 we would have to distinguish between zero-extension
3145 and sign-extension. */
3146 if (width != GET_MODE_BITSIZE (op_mode))
3150 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3153 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3155 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3156 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3169 /* Clear the bits that don't belong in our mode,
3170 unless they and our sign bit are all one.
3171 So we get either a reasonable negative value or a reasonable
3172 unsigned value for this mode. */
3173 if (width < HOST_BITS_PER_WIDE_INT
3174 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3175 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3176 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3178 return GEN_INT (val);
3181 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3182 for a DImode operation on a CONST_INT. */
3183 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3184 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3186 HOST_WIDE_INT l1, h1, lv, hv;
3188 if (GET_CODE (op) == CONST_DOUBLE)
3189 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3191 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3201 neg_double (l1, h1, &lv, &hv);
3206 neg_double (l1, h1, &lv, &hv);
3214 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3216 lv = exact_log2 (l1 & (-l1)) + 1;
3220 /* This is just a change-of-mode, so do nothing. */
3225 if (op_mode == VOIDmode
3226 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3230 lv = l1 & GET_MODE_MASK (op_mode);
3234 if (op_mode == VOIDmode
3235 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3239 lv = l1 & GET_MODE_MASK (op_mode);
3240 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3241 && (lv & ((HOST_WIDE_INT) 1
3242 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3243 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3245 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3256 return immed_double_const (lv, hv, mode);
3259 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3260 else if (GET_CODE (op) == CONST_DOUBLE
3261 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3267 if (setjmp (handler))
3268 /* There used to be a warning here, but that is inadvisable.
3269 People may want to cause traps, and the natural way
3270 to do it should not get a warning. */
3273 set_float_handler (handler);
3275 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3280 d = REAL_VALUE_NEGATE (d);
3284 if (REAL_VALUE_NEGATIVE (d))
3285 d = REAL_VALUE_NEGATE (d);
3288 case FLOAT_TRUNCATE:
3289 d = real_value_truncate (mode, d);
3293 /* All this does is change the mode. */
3297 d = REAL_VALUE_RNDZINT (d);
3301 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3311 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3312 set_float_handler (NULL_PTR);
3316 else if (GET_CODE (op) == CONST_DOUBLE
3317 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3318 && GET_MODE_CLASS (mode) == MODE_INT
3319 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3325 if (setjmp (handler))
3328 set_float_handler (handler);
3330 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3335 val = REAL_VALUE_FIX (d);
3339 val = REAL_VALUE_UNSIGNED_FIX (d);
3346 set_float_handler (NULL_PTR);
3348 /* Clear the bits that don't belong in our mode,
3349 unless they and our sign bit are all one.
3350 So we get either a reasonable negative value or a reasonable
3351 unsigned value for this mode. */
3352 if (width < HOST_BITS_PER_WIDE_INT
3353 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3354 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3355 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3357 /* If this would be an entire word for the target, but is not for
3358 the host, then sign-extend on the host so that the number will look
3359 the same way on the host that it would on the target.
3361 For example, when building a 64 bit alpha hosted 32 bit sparc
3362 targeted compiler, then we want the 32 bit unsigned value -1 to be
3363 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3364 The later confuses the sparc backend. */
3366 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3367 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3368 val |= ((HOST_WIDE_INT) (-1) << width);
3370 return GEN_INT (val);
3373 /* This was formerly used only for non-IEEE float.
3374 eggert@twinsun.com says it is safe for IEEE also. */
3377 /* There are some simplifications we can do even if the operands
3383 /* (not (not X)) == X, similarly for NEG. */
3384 if (GET_CODE (op) == code)
3385 return XEXP (op, 0);
3389 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3390 becomes just the MINUS if its mode is MODE. This allows
3391 folding switch statements on machines using casesi (such as
3393 if (GET_CODE (op) == TRUNCATE
3394 && GET_MODE (XEXP (op, 0)) == mode
3395 && GET_CODE (XEXP (op, 0)) == MINUS
3396 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3397 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3398 return XEXP (op, 0);
3400 #ifdef POINTERS_EXTEND_UNSIGNED
3401 if (! POINTERS_EXTEND_UNSIGNED
3402 && mode == Pmode && GET_MODE (op) == ptr_mode
3404 return convert_memory_address (Pmode, op);
3408 #ifdef POINTERS_EXTEND_UNSIGNED
3410 if (POINTERS_EXTEND_UNSIGNED
3411 && mode == Pmode && GET_MODE (op) == ptr_mode
3413 return convert_memory_address (Pmode, op);
3422 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3423 and OP1. Return 0 if no simplification is possible.
3425 Don't use this for relational operations such as EQ or LT.
3426 Use simplify_relational_operation instead. */
3429 simplify_binary_operation (code, mode, op0, op1)
3431 enum machine_mode mode;
3434 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3436 int width = GET_MODE_BITSIZE (mode);
3439 /* Relational operations don't work here. We must know the mode
3440 of the operands in order to do the comparison correctly.
3441 Assuming a full word can give incorrect results.
3442 Consider comparing 128 with -128 in QImode. */
3444 if (GET_RTX_CLASS (code) == '<')
3447 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3448 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3449 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3450 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3452 REAL_VALUE_TYPE f0, f1, value;
3455 if (setjmp (handler))
3458 set_float_handler (handler);
3460 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3461 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3462 f0 = real_value_truncate (mode, f0);
3463 f1 = real_value_truncate (mode, f1);
3465 #ifdef REAL_ARITHMETIC
3466 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3480 #ifndef REAL_INFINITY
3487 value = MIN (f0, f1);
3490 value = MAX (f0, f1);
3497 value = real_value_truncate (mode, value);
3498 set_float_handler (NULL_PTR);
3499 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3501 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3503 /* We can fold some multi-word operations. */
3504 if (GET_MODE_CLASS (mode) == MODE_INT
3505 && width == HOST_BITS_PER_WIDE_INT * 2
3506 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3507 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3509 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3511 if (GET_CODE (op0) == CONST_DOUBLE)
3512 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3514 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3516 if (GET_CODE (op1) == CONST_DOUBLE)
3517 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3519 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3524 /* A - B == A + (-B). */
3525 neg_double (l2, h2, &lv, &hv);
3528 /* .. fall through ... */
3531 add_double (l1, h1, l2, h2, &lv, &hv);
3535 mul_double (l1, h1, l2, h2, &lv, &hv);
3538 case DIV: case MOD: case UDIV: case UMOD:
3539 /* We'd need to include tree.h to do this and it doesn't seem worth
3544 lv = l1 & l2, hv = h1 & h2;
3548 lv = l1 | l2, hv = h1 | h2;
3552 lv = l1 ^ l2, hv = h1 ^ h2;
3558 && ((unsigned HOST_WIDE_INT) l1
3559 < (unsigned HOST_WIDE_INT) l2)))
3568 && ((unsigned HOST_WIDE_INT) l1
3569 > (unsigned HOST_WIDE_INT) l2)))
3576 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3578 && ((unsigned HOST_WIDE_INT) l1
3579 < (unsigned HOST_WIDE_INT) l2)))
3586 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3588 && ((unsigned HOST_WIDE_INT) l1
3589 > (unsigned HOST_WIDE_INT) l2)))
3595 case LSHIFTRT: case ASHIFTRT:
3597 case ROTATE: case ROTATERT:
3598 #ifdef SHIFT_COUNT_TRUNCATED
3599 if (SHIFT_COUNT_TRUNCATED)
3600 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3603 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3606 if (code == LSHIFTRT || code == ASHIFTRT)
3607 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3609 else if (code == ASHIFT)
3610 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3611 else if (code == ROTATE)
3612 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3613 else /* code == ROTATERT */
3614 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3621 return immed_double_const (lv, hv, mode);
3624 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3625 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3627 /* Even if we can't compute a constant result,
3628 there are some cases worth simplifying. */
3633 /* In IEEE floating point, x+0 is not the same as x. Similarly
3634 for the other optimizations below. */
3635 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3636 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3639 if (op1 == CONST0_RTX (mode))
3642 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3643 if (GET_CODE (op0) == NEG)
3644 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3645 else if (GET_CODE (op1) == NEG)
3646 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3648 /* Handle both-operands-constant cases. We can only add
3649 CONST_INTs to constants since the sum of relocatable symbols
3650 can't be handled by most assemblers. Don't add CONST_INT
3651 to CONST_INT since overflow won't be computed properly if wider
3652 than HOST_BITS_PER_WIDE_INT. */
3654 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3655 && GET_CODE (op1) == CONST_INT)
3656 return plus_constant (op0, INTVAL (op1));
3657 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3658 && GET_CODE (op0) == CONST_INT)
3659 return plus_constant (op1, INTVAL (op0));
3661 /* See if this is something like X * C - X or vice versa or
3662 if the multiplication is written as a shift. If so, we can
3663 distribute and make a new multiply, shift, or maybe just
3664 have X (if C is 2 in the example above). But don't make
3665 real multiply if we didn't have one before. */
3667 if (! FLOAT_MODE_P (mode))
3669 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3670 rtx lhs = op0, rhs = op1;
3673 if (GET_CODE (lhs) == NEG)
3674 coeff0 = -1, lhs = XEXP (lhs, 0);
3675 else if (GET_CODE (lhs) == MULT
3676 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3678 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3681 else if (GET_CODE (lhs) == ASHIFT
3682 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3683 && INTVAL (XEXP (lhs, 1)) >= 0
3684 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3686 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3687 lhs = XEXP (lhs, 0);
3690 if (GET_CODE (rhs) == NEG)
3691 coeff1 = -1, rhs = XEXP (rhs, 0);
3692 else if (GET_CODE (rhs) == MULT
3693 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3695 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3698 else if (GET_CODE (rhs) == ASHIFT
3699 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3700 && INTVAL (XEXP (rhs, 1)) >= 0
3701 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3703 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3704 rhs = XEXP (rhs, 0);
3707 if (rtx_equal_p (lhs, rhs))
3709 tem = cse_gen_binary (MULT, mode, lhs,
3710 GEN_INT (coeff0 + coeff1));
3711 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3715 /* If one of the operands is a PLUS or a MINUS, see if we can
3716 simplify this by the associative law.
3717 Don't use the associative law for floating point.
3718 The inaccuracy makes it nonassociative,
3719 and subtle programs can break if operations are associated. */
3721 if (INTEGRAL_MODE_P (mode)
3722 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3723 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3724 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3730 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3731 using cc0, in which case we want to leave it as a COMPARE
3732 so we can distinguish it from a register-register-copy.
3734 In IEEE floating point, x-0 is not the same as x. */
3736 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3737 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3738 && op1 == CONST0_RTX (mode))
3741 /* Do nothing here. */
3746 /* None of these optimizations can be done for IEEE
3748 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3749 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3752 /* We can't assume x-x is 0 even with non-IEEE floating point,
3753 but since it is zero except in very strange circumstances, we
3754 will treat it as zero with -ffast-math. */
3755 if (rtx_equal_p (op0, op1)
3756 && ! side_effects_p (op0)
3757 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3758 return CONST0_RTX (mode);
3760 /* Change subtraction from zero into negation. */
3761 if (op0 == CONST0_RTX (mode))
3762 return gen_rtx (NEG, mode, op1);
3764 /* (-1 - a) is ~a. */
3765 if (op0 == constm1_rtx)
3766 return gen_rtx (NOT, mode, op1);
3768 /* Subtracting 0 has no effect. */
3769 if (op1 == CONST0_RTX (mode))
3772 /* See if this is something like X * C - X or vice versa or
3773 if the multiplication is written as a shift. If so, we can
3774 distribute and make a new multiply, shift, or maybe just
3775 have X (if C is 2 in the example above). But don't make
3776 real multiply if we didn't have one before. */
3778 if (! FLOAT_MODE_P (mode))
3780 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3781 rtx lhs = op0, rhs = op1;
3784 if (GET_CODE (lhs) == NEG)
3785 coeff0 = -1, lhs = XEXP (lhs, 0);
3786 else if (GET_CODE (lhs) == MULT
3787 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3789 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3792 else if (GET_CODE (lhs) == ASHIFT
3793 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3794 && INTVAL (XEXP (lhs, 1)) >= 0
3795 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3797 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3798 lhs = XEXP (lhs, 0);
3801 if (GET_CODE (rhs) == NEG)
3802 coeff1 = - 1, rhs = XEXP (rhs, 0);
3803 else if (GET_CODE (rhs) == MULT
3804 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3806 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3809 else if (GET_CODE (rhs) == ASHIFT
3810 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3811 && INTVAL (XEXP (rhs, 1)) >= 0
3812 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3814 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3815 rhs = XEXP (rhs, 0);
3818 if (rtx_equal_p (lhs, rhs))
3820 tem = cse_gen_binary (MULT, mode, lhs,
3821 GEN_INT (coeff0 - coeff1));
3822 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3826 /* (a - (-b)) -> (a + b). */
3827 if (GET_CODE (op1) == NEG)
3828 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
3830 /* If one of the operands is a PLUS or a MINUS, see if we can
3831 simplify this by the associative law.
3832 Don't use the associative law for floating point.
3833 The inaccuracy makes it nonassociative,
3834 and subtle programs can break if operations are associated. */
3836 if (INTEGRAL_MODE_P (mode)
3837 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3838 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3839 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3842 /* Don't let a relocatable value get a negative coeff. */
3843 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
3844 return plus_constant (op0, - INTVAL (op1));
3846 /* (x - (x & y)) -> (x & ~y) */
3847 if (GET_CODE (op1) == AND)
3849 if (rtx_equal_p (op0, XEXP (op1, 0)))
3850 return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 1)));
3851 if (rtx_equal_p (op0, XEXP (op1, 1)))
3852 return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 0)));
3857 if (op1 == constm1_rtx)
3859 tem = simplify_unary_operation (NEG, mode, op0, mode);
3861 return tem ? tem : gen_rtx (NEG, mode, op0);
3864 /* In IEEE floating point, x*0 is not always 0. */
3865 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3866 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3867 && op1 == CONST0_RTX (mode)
3868 && ! side_effects_p (op0))
3871 /* In IEEE floating point, x*1 is not equivalent to x for nans.
3872 However, ANSI says we can drop signals,
3873 so we can do this anyway. */
3874 if (op1 == CONST1_RTX (mode))
3877 /* Convert multiply by constant power of two into shift unless
3878 we are still generating RTL. This test is a kludge. */
3879 if (GET_CODE (op1) == CONST_INT
3880 && (val = exact_log2 (INTVAL (op1))) >= 0
3881 /* If the mode is larger than the host word size, and the
3882 uppermost bit is set, then this isn't a power of two due
3883 to implicit sign extension. */
3884 && (width <= HOST_BITS_PER_WIDE_INT
3885 || val != HOST_BITS_PER_WIDE_INT - 1)
3886 && ! rtx_equal_function_value_matters)
3887 return gen_rtx (ASHIFT, mode, op0, GEN_INT (val));
3889 if (GET_CODE (op1) == CONST_DOUBLE
3890 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3894 int op1is2, op1ism1;
3896 if (setjmp (handler))
3899 set_float_handler (handler);
3900 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3901 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3902 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3903 set_float_handler (NULL_PTR);
3905 /* x*2 is x+x and x*(-1) is -x */
3906 if (op1is2 && GET_MODE (op0) == mode)
3907 return gen_rtx (PLUS, mode, op0, copy_rtx (op0));
3909 else if (op1ism1 && GET_MODE (op0) == mode)
3910 return gen_rtx (NEG, mode, op0);
3915 if (op1 == const0_rtx)
3917 if (GET_CODE (op1) == CONST_INT
3918 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3920 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3922 /* A | (~A) -> -1 */
3923 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3924 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3925 && ! side_effects_p (op0)
3926 && GET_MODE_CLASS (mode) != MODE_CC)
3931 if (op1 == const0_rtx)
3933 if (GET_CODE (op1) == CONST_INT
3934 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3935 return gen_rtx (NOT, mode, op0);
3936 if (op0 == op1 && ! side_effects_p (op0)
3937 && GET_MODE_CLASS (mode) != MODE_CC)
3942 if (op1 == const0_rtx && ! side_effects_p (op0))
3944 if (GET_CODE (op1) == CONST_INT
3945 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3947 if (op0 == op1 && ! side_effects_p (op0)
3948 && GET_MODE_CLASS (mode) != MODE_CC)
3951 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3952 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3953 && ! side_effects_p (op0)
3954 && GET_MODE_CLASS (mode) != MODE_CC)
3959 /* Convert divide by power of two into shift (divide by 1 handled
3961 if (GET_CODE (op1) == CONST_INT
3962 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3963 return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1));
3965 /* ... fall through ... */
3968 if (op1 == CONST1_RTX (mode))
3971 /* In IEEE floating point, 0/x is not always 0. */
3972 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3973 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3974 && op0 == CONST0_RTX (mode)
3975 && ! side_effects_p (op1))
3978 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3979 /* Change division by a constant into multiplication. Only do
3980 this with -ffast-math until an expert says it is safe in
3982 else if (GET_CODE (op1) == CONST_DOUBLE
3983 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3984 && op1 != CONST0_RTX (mode)
3988 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3990 if (! REAL_VALUES_EQUAL (d, dconst0))
3992 #if defined (REAL_ARITHMETIC)
3993 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
3994 return gen_rtx (MULT, mode, op0,
3995 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3997 return gen_rtx (MULT, mode, op0,
3998 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4006 /* Handle modulus by power of two (mod with 1 handled below). */
4007 if (GET_CODE (op1) == CONST_INT
4008 && exact_log2 (INTVAL (op1)) > 0)
4009 return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1));
4011 /* ... fall through ... */
4014 if ((op0 == const0_rtx || op1 == const1_rtx)
4015 && ! side_effects_p (op0) && ! side_effects_p (op1))
4021 /* Rotating ~0 always results in ~0. */
4022 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4023 && INTVAL (op0) == GET_MODE_MASK (mode)
4024 && ! side_effects_p (op1))
4027 /* ... fall through ... */
4032 if (op1 == const0_rtx)
4034 if (op0 == const0_rtx && ! side_effects_p (op1))
4039 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4040 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4041 && ! side_effects_p (op0))
4043 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4048 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4050 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4051 && ! side_effects_p (op0))
4053 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4058 if (op1 == const0_rtx && ! side_effects_p (op0))
4060 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4065 if (op1 == constm1_rtx && ! side_effects_p (op0))
4067 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4078 /* Get the integer argument values in two forms:
4079 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4081 arg0 = INTVAL (op0);
4082 arg1 = INTVAL (op1);
4084 if (width < HOST_BITS_PER_WIDE_INT)
4086 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4087 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4090 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4091 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4094 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4095 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4103 /* Compute the value of the arithmetic. */
4108 val = arg0s + arg1s;
4112 val = arg0s - arg1s;
4116 val = arg0s * arg1s;
4122 val = arg0s / arg1s;
4128 val = arg0s % arg1s;
4134 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4140 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4156 /* If shift count is undefined, don't fold it; let the machine do
4157 what it wants. But truncate it if the machine will do that. */
4161 #ifdef SHIFT_COUNT_TRUNCATED
4162 if (SHIFT_COUNT_TRUNCATED)
4166 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4173 #ifdef SHIFT_COUNT_TRUNCATED
4174 if (SHIFT_COUNT_TRUNCATED)
4178 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4185 #ifdef SHIFT_COUNT_TRUNCATED
4186 if (SHIFT_COUNT_TRUNCATED)
4190 val = arg0s >> arg1;
4192 /* Bootstrap compiler may not have sign extended the right shift.
4193 Manually extend the sign to insure bootstrap cc matches gcc. */
4194 if (arg0s < 0 && arg1 > 0)
4195 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4204 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4205 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4213 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4214 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4218 /* Do nothing here. */
4222 val = arg0s <= arg1s ? arg0s : arg1s;
4226 val = ((unsigned HOST_WIDE_INT) arg0
4227 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4231 val = arg0s > arg1s ? arg0s : arg1s;
4235 val = ((unsigned HOST_WIDE_INT) arg0
4236 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4243 /* Clear the bits that don't belong in our mode, unless they and our sign
4244 bit are all one. So we get either a reasonable negative value or a
4245 reasonable unsigned value for this mode. */
4246 if (width < HOST_BITS_PER_WIDE_INT
4247 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4248 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4249 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4251 /* If this would be an entire word for the target, but is not for
4252 the host, then sign-extend on the host so that the number will look
4253 the same way on the host that it would on the target.
4255 For example, when building a 64 bit alpha hosted 32 bit sparc
4256 targeted compiler, then we want the 32 bit unsigned value -1 to be
4257 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4258 The later confuses the sparc backend. */
4260 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4261 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4262 val |= ((HOST_WIDE_INT) (-1) << width);
4264 return GEN_INT (val);
4267 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4270 Rather than test for specific case, we do this by a brute-force method
4271 and do all possible simplifications until no more changes occur. Then
4272 we rebuild the operation. */
4275 simplify_plus_minus (code, mode, op0, op1)
4277 enum machine_mode mode;
4283 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4284 int first = 1, negate = 0, changed;
4287 bzero ((char *) ops, sizeof ops);
4289 /* Set up the two operands and then expand them until nothing has been
4290 changed. If we run out of room in our array, give up; this should
4291 almost never happen. */
4293 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4300 for (i = 0; i < n_ops; i++)
4301 switch (GET_CODE (ops[i]))
4308 ops[n_ops] = XEXP (ops[i], 1);
4309 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4310 ops[i] = XEXP (ops[i], 0);
4316 ops[i] = XEXP (ops[i], 0);
4317 negs[i] = ! negs[i];
4322 ops[i] = XEXP (ops[i], 0);
4328 /* ~a -> (-a - 1) */
4331 ops[n_ops] = constm1_rtx;
4332 negs[n_ops++] = negs[i];
4333 ops[i] = XEXP (ops[i], 0);
4334 negs[i] = ! negs[i];
4341 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4346 /* If we only have two operands, we can't do anything. */
4350 /* Now simplify each pair of operands until nothing changes. The first
4351 time through just simplify constants against each other. */
4358 for (i = 0; i < n_ops - 1; i++)
4359 for (j = i + 1; j < n_ops; j++)
4360 if (ops[i] != 0 && ops[j] != 0
4361 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4363 rtx lhs = ops[i], rhs = ops[j];
4364 enum rtx_code ncode = PLUS;
4366 if (negs[i] && ! negs[j])
4367 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4368 else if (! negs[i] && negs[j])
4371 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4374 ops[i] = tem, ops[j] = 0;
4375 negs[i] = negs[i] && negs[j];
4376 if (GET_CODE (tem) == NEG)
4377 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4379 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4380 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4388 /* Pack all the operands to the lower-numbered entries and give up if
4389 we didn't reduce the number of operands we had. Make sure we
4390 count a CONST as two operands. If we have the same number of
4391 operands, but have made more CONSTs than we had, this is also
4392 an improvement, so accept it. */
4394 for (i = 0, j = 0; j < n_ops; j++)
4397 ops[i] = ops[j], negs[i++] = negs[j];
4398 if (GET_CODE (ops[j]) == CONST)
4402 if (i + n_consts > input_ops
4403 || (i + n_consts == input_ops && n_consts <= input_consts))
4408 /* If we have a CONST_INT, put it last. */
4409 for (i = 0; i < n_ops - 1; i++)
4410 if (GET_CODE (ops[i]) == CONST_INT)
4412 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4413 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4416 /* Put a non-negated operand first. If there aren't any, make all
4417 operands positive and negate the whole thing later. */
4418 for (i = 0; i < n_ops && negs[i]; i++)
4423 for (i = 0; i < n_ops; i++)
4429 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4430 j = negs[0], negs[0] = negs[i], negs[i] = j;
4433 /* Now make the result by performing the requested operations. */
4435 for (i = 1; i < n_ops; i++)
4436 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4438 return negate ? gen_rtx (NEG, mode, result) : result;
4441 /* Make a binary operation by properly ordering the operands and
4442 seeing if the expression folds. */
4445 cse_gen_binary (code, mode, op0, op1)
4447 enum machine_mode mode;
4452 /* Put complex operands first and constants second if commutative. */
4453 if (GET_RTX_CLASS (code) == 'c'
4454 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4455 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4456 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4457 || (GET_CODE (op0) == SUBREG
4458 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4459 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4460 tem = op0, op0 = op1, op1 = tem;
4462 /* If this simplifies, do it. */
4463 tem = simplify_binary_operation (code, mode, op0, op1);
4468 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4469 just form the operation. */
4471 if (code == PLUS && GET_CODE (op1) == CONST_INT
4472 && GET_MODE (op0) != VOIDmode)
4473 return plus_constant (op0, INTVAL (op1));
4474 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4475 && GET_MODE (op0) != VOIDmode)
4476 return plus_constant (op0, - INTVAL (op1));
4478 return gen_rtx (code, mode, op0, op1);
4481 /* Like simplify_binary_operation except used for relational operators.
4482 MODE is the mode of the operands, not that of the result. If MODE
4483 is VOIDmode, both operands must also be VOIDmode and we compare the
4484 operands in "infinite precision".
4486 If no simplification is possible, this function returns zero. Otherwise,
4487 it returns either const_true_rtx or const0_rtx. */
4490 simplify_relational_operation (code, mode, op0, op1)
4492 enum machine_mode mode;
4495 int equal, op0lt, op0ltu, op1lt, op1ltu;
4498 /* If op0 is a compare, extract the comparison arguments from it. */
4499 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4500 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4502 /* We can't simplify MODE_CC values since we don't know what the
4503 actual comparison is. */
4504 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4511 /* For integer comparisons of A and B maybe we can simplify A - B and can
4512 then simplify a comparison of that with zero. If A and B are both either
4513 a register or a CONST_INT, this can't help; testing for these cases will
4514 prevent infinite recursion here and speed things up.
4516 If CODE is an unsigned comparison, then we can never do this optimization,
4517 because it gives an incorrect result if the subtraction wraps around zero.
4518 ANSI C defines unsigned operations such that they never overflow, and
4519 thus such cases can not be ignored. */
4521 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4522 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4523 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4524 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4525 && code != GTU && code != GEU && code != LTU && code != LEU)
4526 return simplify_relational_operation (signed_condition (code),
4527 mode, tem, const0_rtx);
4529 /* For non-IEEE floating-point, if the two operands are equal, we know the
4531 if (rtx_equal_p (op0, op1)
4532 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4533 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4534 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4536 /* If the operands are floating-point constants, see if we can fold
4538 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4539 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4540 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4542 REAL_VALUE_TYPE d0, d1;
4545 if (setjmp (handler))
4548 set_float_handler (handler);
4549 REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4550 REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4551 equal = REAL_VALUES_EQUAL (d0, d1);
4552 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
4553 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
4554 set_float_handler (NULL_PTR);
4556 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4558 /* Otherwise, see if the operands are both integers. */
4559 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4560 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4561 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4563 int width = GET_MODE_BITSIZE (mode);
4564 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4565 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4567 /* Get the two words comprising each integer constant. */
4568 if (GET_CODE (op0) == CONST_DOUBLE)
4570 l0u = l0s = CONST_DOUBLE_LOW (op0);
4571 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4575 l0u = l0s = INTVAL (op0);
4576 h0u = 0, h0s = l0s < 0 ? -1 : 0;
4579 if (GET_CODE (op1) == CONST_DOUBLE)
4581 l1u = l1s = CONST_DOUBLE_LOW (op1);
4582 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4586 l1u = l1s = INTVAL (op1);
4587 h1u = 0, h1s = l1s < 0 ? -1 : 0;
4590 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4591 we have to sign or zero-extend the values. */
4592 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4593 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4595 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4597 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4598 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4600 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4601 l0s |= ((HOST_WIDE_INT) (-1) << width);
4603 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4604 l1s |= ((HOST_WIDE_INT) (-1) << width);
4607 equal = (h0u == h1u && l0u == l1u);
4608 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4609 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4610 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4611 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4614 /* Otherwise, there are some code-specific tests we can make. */
4620 /* References to the frame plus a constant or labels cannot
4621 be zero, but a SYMBOL_REF can due to #pragma weak. */
4622 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4623 || GET_CODE (op0) == LABEL_REF)
4624 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4625 /* On some machines, the ap reg can be 0 sometimes. */
4626 && op0 != arg_pointer_rtx
4633 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4634 || GET_CODE (op0) == LABEL_REF)
4635 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4636 && op0 != arg_pointer_rtx
4639 return const_true_rtx;
4643 /* Unsigned values are never negative. */
4644 if (op1 == const0_rtx)
4645 return const_true_rtx;
4649 if (op1 == const0_rtx)
4654 /* Unsigned values are never greater than the largest
4656 if (GET_CODE (op1) == CONST_INT
4657 && INTVAL (op1) == GET_MODE_MASK (mode)
4658 && INTEGRAL_MODE_P (mode))
4659 return const_true_rtx;
4663 if (GET_CODE (op1) == CONST_INT
4664 && INTVAL (op1) == GET_MODE_MASK (mode)
4665 && INTEGRAL_MODE_P (mode))
4673 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4678 return equal ? const_true_rtx : const0_rtx;
4680 return ! equal ? const_true_rtx : const0_rtx;
4682 return op0lt ? const_true_rtx : const0_rtx;
4684 return op1lt ? const_true_rtx : const0_rtx;
4686 return op0ltu ? const_true_rtx : const0_rtx;
4688 return op1ltu ? const_true_rtx : const0_rtx;
4690 return equal || op0lt ? const_true_rtx : const0_rtx;
4692 return equal || op1lt ? const_true_rtx : const0_rtx;
4694 return equal || op0ltu ? const_true_rtx : const0_rtx;
4696 return equal || op1ltu ? const_true_rtx : const0_rtx;
4702 /* Simplify CODE, an operation with result mode MODE and three operands,
4703 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4704 a constant. Return 0 if no simplifications is possible. */
4707 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4709 enum machine_mode mode, op0_mode;
4712 int width = GET_MODE_BITSIZE (mode);
4714 /* VOIDmode means "infinite" precision. */
4716 width = HOST_BITS_PER_WIDE_INT;
4722 if (GET_CODE (op0) == CONST_INT
4723 && GET_CODE (op1) == CONST_INT
4724 && GET_CODE (op2) == CONST_INT
4725 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4726 && width <= HOST_BITS_PER_WIDE_INT)
4728 /* Extracting a bit-field from a constant */
4729 HOST_WIDE_INT val = INTVAL (op0);
4731 if (BITS_BIG_ENDIAN)
4732 val >>= (GET_MODE_BITSIZE (op0_mode)
4733 - INTVAL (op2) - INTVAL (op1));
4735 val >>= INTVAL (op2);
4737 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4739 /* First zero-extend. */
4740 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4741 /* If desired, propagate sign bit. */
4742 if (code == SIGN_EXTRACT
4743 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4744 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4747 /* Clear the bits that don't belong in our mode,
4748 unless they and our sign bit are all one.
4749 So we get either a reasonable negative value or a reasonable
4750 unsigned value for this mode. */
4751 if (width < HOST_BITS_PER_WIDE_INT
4752 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4753 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4754 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4756 return GEN_INT (val);
4761 if (GET_CODE (op0) == CONST_INT)
4762 return op0 != const0_rtx ? op1 : op2;
4772 /* If X is a nontrivial arithmetic operation on an argument
4773 for which a constant value can be determined, return
4774 the result of operating on that value, as a constant.
4775 Otherwise, return X, possibly with one or more operands
4776 modified by recursive calls to this function.
4778 If X is a register whose contents are known, we do NOT
4779 return those contents here. equiv_constant is called to
4782 INSN is the insn that we may be modifying. If it is 0, make a copy
4783 of X before modifying it. */
4790 register enum rtx_code code;
4791 register enum machine_mode mode;
4798 /* Folded equivalents of first two operands of X. */
4802 /* Constant equivalents of first three operands of X;
4803 0 when no such equivalent is known. */
4808 /* The mode of the first operand of X. We need this for sign and zero
4810 enum machine_mode mode_arg0;
4815 mode = GET_MODE (x);
4816 code = GET_CODE (x);
4825 /* No use simplifying an EXPR_LIST
4826 since they are used only for lists of args
4827 in a function call's REG_EQUAL note. */
4833 return prev_insn_cc0;
4837 /* If the next insn is a CODE_LABEL followed by a jump table,
4838 PC's value is a LABEL_REF pointing to that label. That
4839 lets us fold switch statements on the Vax. */
4840 if (insn && GET_CODE (insn) == JUMP_INSN)
4842 rtx next = next_nonnote_insn (insn);
4844 if (next && GET_CODE (next) == CODE_LABEL
4845 && NEXT_INSN (next) != 0
4846 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4847 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4848 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4849 return gen_rtx (LABEL_REF, Pmode, next);
4854 /* See if we previously assigned a constant value to this SUBREG. */
4855 if ((new = lookup_as_function (x, CONST_INT)) != 0
4856 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
4859 /* If this is a paradoxical SUBREG, we have no idea what value the
4860 extra bits would have. However, if the operand is equivalent
4861 to a SUBREG whose operand is the same as our mode, and all the
4862 modes are within a word, we can just use the inner operand
4863 because these SUBREGs just say how to treat the register.
4865 Similarly if we find an integer constant. */
4867 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4869 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4870 struct table_elt *elt;
4872 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4873 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4874 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4876 for (elt = elt->first_same_value;
4877 elt; elt = elt->next_same_value)
4879 if (CONSTANT_P (elt->exp)
4880 && GET_MODE (elt->exp) == VOIDmode)
4883 if (GET_CODE (elt->exp) == SUBREG
4884 && GET_MODE (SUBREG_REG (elt->exp)) == mode
4885 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4886 return copy_rtx (SUBREG_REG (elt->exp));
4892 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4893 We might be able to if the SUBREG is extracting a single word in an
4894 integral mode or extracting the low part. */
4896 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4897 const_arg0 = equiv_constant (folded_arg0);
4899 folded_arg0 = const_arg0;
4901 if (folded_arg0 != SUBREG_REG (x))
4905 if (GET_MODE_CLASS (mode) == MODE_INT
4906 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4907 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4908 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4909 GET_MODE (SUBREG_REG (x)));
4910 if (new == 0 && subreg_lowpart_p (x))
4911 new = gen_lowpart_if_possible (mode, folded_arg0);
4916 /* If this is a narrowing SUBREG and our operand is a REG, see if
4917 we can find an equivalence for REG that is an arithmetic operation
4918 in a wider mode where both operands are paradoxical SUBREGs
4919 from objects of our result mode. In that case, we couldn't report
4920 an equivalent value for that operation, since we don't know what the
4921 extra bits will be. But we can find an equivalence for this SUBREG
4922 by folding that operation is the narrow mode. This allows us to
4923 fold arithmetic in narrow modes when the machine only supports
4924 word-sized arithmetic.
4926 Also look for a case where we have a SUBREG whose operand is the
4927 same as our result. If both modes are smaller than a word, we
4928 are simply interpreting a register in different modes and we
4929 can use the inner value. */
4931 if (GET_CODE (folded_arg0) == REG
4932 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4933 && subreg_lowpart_p (x))
4935 struct table_elt *elt;
4937 /* We can use HASH here since we know that canon_hash won't be
4939 elt = lookup (folded_arg0,
4940 HASH (folded_arg0, GET_MODE (folded_arg0)),
4941 GET_MODE (folded_arg0));
4944 elt = elt->first_same_value;
4946 for (; elt; elt = elt->next_same_value)
4948 enum rtx_code eltcode = GET_CODE (elt->exp);
4950 /* Just check for unary and binary operations. */
4951 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4952 && GET_CODE (elt->exp) != SIGN_EXTEND
4953 && GET_CODE (elt->exp) != ZERO_EXTEND
4954 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4955 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4957 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4959 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4960 op0 = fold_rtx (op0, NULL_RTX);
4962 op0 = equiv_constant (op0);
4964 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4967 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4968 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
4969 && eltcode != DIV && eltcode != MOD
4970 && eltcode != UDIV && eltcode != UMOD
4971 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4972 && eltcode != ROTATE && eltcode != ROTATERT
4973 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4974 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4976 || CONSTANT_P (XEXP (elt->exp, 0)))
4977 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4978 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4980 || CONSTANT_P (XEXP (elt->exp, 1))))
4982 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4983 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4985 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
4986 op0 = fold_rtx (op0, NULL_RTX);
4989 op0 = equiv_constant (op0);
4991 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
4992 op1 = fold_rtx (op1, NULL_RTX);
4995 op1 = equiv_constant (op1);
4997 /* If we are looking for the low SImode part of
4998 (ashift:DI c (const_int 32)), it doesn't work
4999 to compute that in SImode, because a 32-bit shift
5000 in SImode is unpredictable. We know the value is 0. */
5002 && GET_CODE (elt->exp) == ASHIFT
5003 && GET_CODE (op1) == CONST_INT
5004 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5006 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5008 /* If the count fits in the inner mode's width,
5009 but exceeds the outer mode's width,
5010 the value will get truncated to 0
5014 /* If the count exceeds even the inner mode's width,
5015 don't fold this expression. */
5018 else if (op0 && op1)
5019 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5023 else if (GET_CODE (elt->exp) == SUBREG
5024 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5025 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5027 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5028 new = copy_rtx (SUBREG_REG (elt->exp));
5039 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5040 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5041 new = lookup_as_function (XEXP (x, 0), code);
5043 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5047 /* If we are not actually processing an insn, don't try to find the
5048 best address. Not only don't we care, but we could modify the
5049 MEM in an invalid way since we have no insn to validate against. */
5051 find_best_addr (insn, &XEXP (x, 0));
5054 /* Even if we don't fold in the insn itself,
5055 we can safely do so here, in hopes of getting a constant. */
5056 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5058 HOST_WIDE_INT offset = 0;
5060 if (GET_CODE (addr) == REG
5061 && REGNO_QTY_VALID_P (REGNO (addr))
5062 && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
5063 && qty_const[reg_qty[REGNO (addr)]] != 0)
5064 addr = qty_const[reg_qty[REGNO (addr)]];
5066 /* If address is constant, split it into a base and integer offset. */
5067 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5069 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5070 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5072 base = XEXP (XEXP (addr, 0), 0);
5073 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5075 else if (GET_CODE (addr) == LO_SUM
5076 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5077 base = XEXP (addr, 1);
5079 /* If this is a constant pool reference, we can fold it into its
5080 constant to allow better value tracking. */
5081 if (base && GET_CODE (base) == SYMBOL_REF
5082 && CONSTANT_POOL_ADDRESS_P (base))
5084 rtx constant = get_pool_constant (base);
5085 enum machine_mode const_mode = get_pool_mode (base);
5088 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5089 constant_pool_entries_cost = COST (constant);
5091 /* If we are loading the full constant, we have an equivalence. */
5092 if (offset == 0 && mode == const_mode)
5095 /* If this actually isn't a constant (weird!), we can't do
5096 anything. Otherwise, handle the two most common cases:
5097 extracting a word from a multi-word constant, and extracting
5098 the low-order bits. Other cases don't seem common enough to
5100 if (! CONSTANT_P (constant))
5103 if (GET_MODE_CLASS (mode) == MODE_INT
5104 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5105 && offset % UNITS_PER_WORD == 0
5106 && (new = operand_subword (constant,
5107 offset / UNITS_PER_WORD,
5108 0, const_mode)) != 0)
5111 if (((BYTES_BIG_ENDIAN
5112 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5113 || (! BYTES_BIG_ENDIAN && offset == 0))
5114 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5118 /* If this is a reference to a label at a known position in a jump
5119 table, we also know its value. */
5120 if (base && GET_CODE (base) == LABEL_REF)
5122 rtx label = XEXP (base, 0);
5123 rtx table_insn = NEXT_INSN (label);
5125 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5126 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5128 rtx table = PATTERN (table_insn);
5131 && (offset / GET_MODE_SIZE (GET_MODE (table))
5132 < XVECLEN (table, 0)))
5133 return XVECEXP (table, 0,
5134 offset / GET_MODE_SIZE (GET_MODE (table)));
5136 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5137 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5139 rtx table = PATTERN (table_insn);
5142 && (offset / GET_MODE_SIZE (GET_MODE (table))
5143 < XVECLEN (table, 1)))
5145 offset /= GET_MODE_SIZE (GET_MODE (table));
5146 new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset),
5149 if (GET_MODE (table) != Pmode)
5150 new = gen_rtx (TRUNCATE, GET_MODE (table), new);
5152 /* Indicate this is a constant. This isn't a
5153 valid form of CONST, but it will only be used
5154 to fold the next insns and then discarded, so
5155 it should be safe. */
5156 return gen_rtx (CONST, GET_MODE (new), new);
5165 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5166 validate_change (insn, &XVECEXP (x, 3, i),
5167 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5174 mode_arg0 = VOIDmode;
5176 /* Try folding our operands.
5177 Then see which ones have constant values known. */
5179 fmt = GET_RTX_FORMAT (code);
5180 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5183 rtx arg = XEXP (x, i);
5184 rtx folded_arg = arg, const_arg = 0;
5185 enum machine_mode mode_arg = GET_MODE (arg);
5186 rtx cheap_arg, expensive_arg;
5187 rtx replacements[2];
5190 /* Most arguments are cheap, so handle them specially. */
5191 switch (GET_CODE (arg))
5194 /* This is the same as calling equiv_constant; it is duplicated
5196 if (REGNO_QTY_VALID_P (REGNO (arg))
5197 && qty_const[reg_qty[REGNO (arg)]] != 0
5198 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
5199 && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
5201 = gen_lowpart_if_possible (GET_MODE (arg),
5202 qty_const[reg_qty[REGNO (arg)]]);
5215 folded_arg = prev_insn_cc0;
5216 mode_arg = prev_insn_cc0_mode;
5217 const_arg = equiv_constant (folded_arg);
5222 folded_arg = fold_rtx (arg, insn);
5223 const_arg = equiv_constant (folded_arg);
5226 /* For the first three operands, see if the operand
5227 is constant or equivalent to a constant. */
5231 folded_arg0 = folded_arg;
5232 const_arg0 = const_arg;
5233 mode_arg0 = mode_arg;
5236 folded_arg1 = folded_arg;
5237 const_arg1 = const_arg;
5240 const_arg2 = const_arg;
5244 /* Pick the least expensive of the folded argument and an
5245 equivalent constant argument. */
5246 if (const_arg == 0 || const_arg == folded_arg
5247 || COST (const_arg) > COST (folded_arg))
5248 cheap_arg = folded_arg, expensive_arg = const_arg;
5250 cheap_arg = const_arg, expensive_arg = folded_arg;
5252 /* Try to replace the operand with the cheapest of the two
5253 possibilities. If it doesn't work and this is either of the first
5254 two operands of a commutative operation, try swapping them.
5255 If THAT fails, try the more expensive, provided it is cheaper
5256 than what is already there. */
5258 if (cheap_arg == XEXP (x, i))
5261 if (insn == 0 && ! copied)
5267 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5269 j < 2 && replacements[j]
5270 && COST (replacements[j]) < COST (XEXP (x, i));
5273 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5276 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5278 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5279 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5281 if (apply_change_group ())
5283 /* Swap them back to be invalid so that this loop can
5284 continue and flag them to be swapped back later. */
5287 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5296 else if (fmt[i] == 'E')
5297 /* Don't try to fold inside of a vector of expressions.
5298 Doing nothing is harmless. */
5301 /* If a commutative operation, place a constant integer as the second
5302 operand unless the first operand is also a constant integer. Otherwise,
5303 place any constant second unless the first operand is also a constant. */
5305 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5307 if (must_swap || (const_arg0
5309 || (GET_CODE (const_arg0) == CONST_INT
5310 && GET_CODE (const_arg1) != CONST_INT))))
5312 register rtx tem = XEXP (x, 0);
5314 if (insn == 0 && ! copied)
5320 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5321 validate_change (insn, &XEXP (x, 1), tem, 1);
5322 if (apply_change_group ())
5324 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5325 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5330 /* If X is an arithmetic operation, see if we can simplify it. */
5332 switch (GET_RTX_CLASS (code))
5338 /* We can't simplify extension ops unless we know the
5340 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5341 && mode_arg0 == VOIDmode)
5344 /* If we had a CONST, strip it off and put it back later if we
5346 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5347 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5349 new = simplify_unary_operation (code, mode,
5350 const_arg0 ? const_arg0 : folded_arg0,
5352 if (new != 0 && is_const)
5353 new = gen_rtx (CONST, mode, new);
5358 /* See what items are actually being compared and set FOLDED_ARG[01]
5359 to those values and CODE to the actual comparison code. If any are
5360 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5361 do anything if both operands are already known to be constant. */
5363 if (const_arg0 == 0 || const_arg1 == 0)
5365 struct table_elt *p0, *p1;
5366 rtx true = const_true_rtx, false = const0_rtx;
5367 enum machine_mode mode_arg1;
5369 #ifdef FLOAT_STORE_FLAG_VALUE
5370 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5372 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5374 false = CONST0_RTX (mode);
5378 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5379 &mode_arg0, &mode_arg1);
5380 const_arg0 = equiv_constant (folded_arg0);
5381 const_arg1 = equiv_constant (folded_arg1);
5383 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5384 what kinds of things are being compared, so we can't do
5385 anything with this comparison. */
5387 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5390 /* If we do not now have two constants being compared, see
5391 if we can nevertheless deduce some things about the
5393 if (const_arg0 == 0 || const_arg1 == 0)
5395 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5396 non-explicit constant? These aren't zero, but we
5397 don't know their sign. */
5398 if (const_arg1 == const0_rtx
5399 && (NONZERO_BASE_PLUS_P (folded_arg0)
5400 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5402 || GET_CODE (folded_arg0) == SYMBOL_REF
5404 || GET_CODE (folded_arg0) == LABEL_REF
5405 || GET_CODE (folded_arg0) == CONST))
5409 else if (code == NE)
5413 /* See if the two operands are the same. We don't do this
5414 for IEEE floating-point since we can't assume x == x
5415 since x might be a NaN. */
5417 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5418 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5419 && (folded_arg0 == folded_arg1
5420 || (GET_CODE (folded_arg0) == REG
5421 && GET_CODE (folded_arg1) == REG
5422 && (reg_qty[REGNO (folded_arg0)]
5423 == reg_qty[REGNO (folded_arg1)]))
5424 || ((p0 = lookup (folded_arg0,
5425 (safe_hash (folded_arg0, mode_arg0)
5426 % NBUCKETS), mode_arg0))
5427 && (p1 = lookup (folded_arg1,
5428 (safe_hash (folded_arg1, mode_arg0)
5429 % NBUCKETS), mode_arg0))
5430 && p0->first_same_value == p1->first_same_value)))
5431 return ((code == EQ || code == LE || code == GE
5432 || code == LEU || code == GEU)
5435 /* If FOLDED_ARG0 is a register, see if the comparison we are
5436 doing now is either the same as we did before or the reverse
5437 (we only check the reverse if not floating-point). */
5438 else if (GET_CODE (folded_arg0) == REG)
5440 int qty = reg_qty[REGNO (folded_arg0)];
5442 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5443 && (comparison_dominates_p (qty_comparison_code[qty], code)
5444 || (comparison_dominates_p (qty_comparison_code[qty],
5445 reverse_condition (code))
5446 && ! FLOAT_MODE_P (mode_arg0)))
5447 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5449 && rtx_equal_p (qty_comparison_const[qty],
5451 || (GET_CODE (folded_arg1) == REG
5452 && (reg_qty[REGNO (folded_arg1)]
5453 == qty_comparison_qty[qty]))))
5454 return (comparison_dominates_p (qty_comparison_code[qty],
5461 /* If we are comparing against zero, see if the first operand is
5462 equivalent to an IOR with a constant. If so, we may be able to
5463 determine the result of this comparison. */
5465 if (const_arg1 == const0_rtx)
5467 rtx y = lookup_as_function (folded_arg0, IOR);
5471 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5472 && GET_CODE (inner_const) == CONST_INT
5473 && INTVAL (inner_const) != 0)
5475 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5476 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5477 && (INTVAL (inner_const)
5478 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5479 rtx true = const_true_rtx, false = const0_rtx;
5481 #ifdef FLOAT_STORE_FLAG_VALUE
5482 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5484 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5486 false = CONST0_RTX (mode);
5508 new = simplify_relational_operation (code, mode_arg0,
5509 const_arg0 ? const_arg0 : folded_arg0,
5510 const_arg1 ? const_arg1 : folded_arg1);
5511 #ifdef FLOAT_STORE_FLAG_VALUE
5512 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5513 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5514 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5523 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5524 with that LABEL_REF as its second operand. If so, the result is
5525 the first operand of that MINUS. This handles switches with an
5526 ADDR_DIFF_VEC table. */
5527 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5530 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5531 : lookup_as_function (folded_arg0, MINUS);
5533 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5534 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5537 /* Now try for a CONST of a MINUS like the above. */
5538 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5539 : lookup_as_function (folded_arg0, CONST))) != 0
5540 && GET_CODE (XEXP (y, 0)) == MINUS
5541 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5542 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5543 return XEXP (XEXP (y, 0), 0);
5546 /* Likewise if the operands are in the other order. */
5547 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5550 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5551 : lookup_as_function (folded_arg1, MINUS);
5553 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5554 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5557 /* Now try for a CONST of a MINUS like the above. */
5558 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5559 : lookup_as_function (folded_arg1, CONST))) != 0
5560 && GET_CODE (XEXP (y, 0)) == MINUS
5561 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5562 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5563 return XEXP (XEXP (y, 0), 0);
5566 /* If second operand is a register equivalent to a negative
5567 CONST_INT, see if we can find a register equivalent to the
5568 positive constant. Make a MINUS if so. Don't do this for
5569 a negative constant since we might then alternate between
5570 chosing positive and negative constants. Having the positive
5571 constant previously-used is the more common case. */
5572 if (const_arg1 && GET_CODE (const_arg1) == CONST_INT
5573 && INTVAL (const_arg1) < 0 && GET_CODE (folded_arg1) == REG)
5575 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5577 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5581 for (p = p->first_same_value; p; p = p->next_same_value)
5582 if (GET_CODE (p->exp) == REG)
5583 return cse_gen_binary (MINUS, mode, folded_arg0,
5584 canon_reg (p->exp, NULL_RTX));
5589 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5590 If so, produce (PLUS Z C2-C). */
5591 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5593 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5594 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5595 return fold_rtx (plus_constant (copy_rtx (y),
5596 -INTVAL (const_arg1)),
5600 /* ... fall through ... */
5603 case SMIN: case SMAX: case UMIN: case UMAX:
5604 case IOR: case AND: case XOR:
5605 case MULT: case DIV: case UDIV:
5606 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5607 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5608 is known to be of similar form, we may be able to replace the
5609 operation with a combined operation. This may eliminate the
5610 intermediate operation if every use is simplified in this way.
5611 Note that the similar optimization done by combine.c only works
5612 if the intermediate operation's result has only one reference. */
5614 if (GET_CODE (folded_arg0) == REG
5615 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5618 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5619 rtx y = lookup_as_function (folded_arg0, code);
5621 enum rtx_code associate_code;
5625 || 0 == (inner_const
5626 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5627 || GET_CODE (inner_const) != CONST_INT
5628 /* If we have compiled a statement like
5629 "if (x == (x & mask1))", and now are looking at
5630 "x & mask2", we will have a case where the first operand
5631 of Y is the same as our first operand. Unless we detect
5632 this case, an infinite loop will result. */
5633 || XEXP (y, 0) == folded_arg0)
5636 /* Don't associate these operations if they are a PLUS with the
5637 same constant and it is a power of two. These might be doable
5638 with a pre- or post-increment. Similarly for two subtracts of
5639 identical powers of two with post decrement. */
5641 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5643 #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5644 || exact_log2 (INTVAL (const_arg1)) >= 0
5646 #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5647 || exact_log2 (- INTVAL (const_arg1)) >= 0
5652 /* Compute the code used to compose the constants. For example,
5653 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5656 = (code == MULT || code == DIV || code == UDIV ? MULT
5657 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5659 new_const = simplify_binary_operation (associate_code, mode,
5660 const_arg1, inner_const);
5665 /* If we are associating shift operations, don't let this
5666 produce a shift of the size of the object or larger.
5667 This could occur when we follow a sign-extend by a right
5668 shift on a machine that does a sign-extend as a pair
5671 if (is_shift && GET_CODE (new_const) == CONST_INT
5672 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5674 /* As an exception, we can turn an ASHIFTRT of this
5675 form into a shift of the number of bits - 1. */
5676 if (code == ASHIFTRT)
5677 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5682 y = copy_rtx (XEXP (y, 0));
5684 /* If Y contains our first operand (the most common way this
5685 can happen is if Y is a MEM), we would do into an infinite
5686 loop if we tried to fold it. So don't in that case. */
5688 if (! reg_mentioned_p (folded_arg0, y))
5689 y = fold_rtx (y, insn);
5691 return cse_gen_binary (code, mode, y, new_const);
5695 new = simplify_binary_operation (code, mode,
5696 const_arg0 ? const_arg0 : folded_arg0,
5697 const_arg1 ? const_arg1 : folded_arg1);
5701 /* (lo_sum (high X) X) is simply X. */
5702 if (code == LO_SUM && const_arg0 != 0
5703 && GET_CODE (const_arg0) == HIGH
5704 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5710 new = simplify_ternary_operation (code, mode, mode_arg0,
5711 const_arg0 ? const_arg0 : folded_arg0,
5712 const_arg1 ? const_arg1 : folded_arg1,
5713 const_arg2 ? const_arg2 : XEXP (x, 2));
5717 return new ? new : x;
5720 /* Return a constant value currently equivalent to X.
5721 Return 0 if we don't know one. */
5727 if (GET_CODE (x) == REG
5728 && REGNO_QTY_VALID_P (REGNO (x))
5729 && qty_const[reg_qty[REGNO (x)]])
5730 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5732 if (x != 0 && CONSTANT_P (x))
5735 /* If X is a MEM, try to fold it outside the context of any insn to see if
5736 it might be equivalent to a constant. That handles the case where it
5737 is a constant-pool reference. Then try to look it up in the hash table
5738 in case it is something whose value we have seen before. */
5740 if (GET_CODE (x) == MEM)
5742 struct table_elt *elt;
5744 x = fold_rtx (x, NULL_RTX);
5748 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5752 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5753 if (elt->is_const && CONSTANT_P (elt->exp))
5760 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5761 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5762 least-significant part of X.
5763 MODE specifies how big a part of X to return.
5765 If the requested operation cannot be done, 0 is returned.
5767 This is similar to gen_lowpart in emit-rtl.c. */
5770 gen_lowpart_if_possible (mode, x)
5771 enum machine_mode mode;
5774 rtx result = gen_lowpart_common (mode, x);
5778 else if (GET_CODE (x) == MEM)
5780 /* This is the only other case we handle. */
5781 register int offset = 0;
5784 if (WORDS_BIG_ENDIAN)
5785 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5786 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5787 if (BYTES_BIG_ENDIAN)
5788 /* Adjust the address so that the address-after-the-data is
5790 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5791 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5792 new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset));
5793 if (! memory_address_p (mode, XEXP (new, 0)))
5795 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5796 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5797 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5804 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5805 branch. It will be zero if not.
5807 In certain cases, this can cause us to add an equivalence. For example,
5808 if we are following the taken case of
5810 we can add the fact that `i' and '2' are now equivalent.
5812 In any case, we can record that this comparison was passed. If the same
5813 comparison is seen later, we will know its value. */
5816 record_jump_equiv (insn, taken)
5820 int cond_known_true;
5822 enum machine_mode mode, mode0, mode1;
5823 int reversed_nonequality = 0;
5826 /* Ensure this is the right kind of insn. */
5827 if (! condjump_p (insn) || simplejump_p (insn))
5830 /* See if this jump condition is known true or false. */
5832 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5834 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5836 /* Get the type of comparison being done and the operands being compared.
5837 If we had to reverse a non-equality condition, record that fact so we
5838 know that it isn't valid for floating-point. */
5839 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5840 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5841 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5843 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
5844 if (! cond_known_true)
5846 reversed_nonequality = (code != EQ && code != NE);
5847 code = reverse_condition (code);
5850 /* The mode is the mode of the non-constant. */
5852 if (mode1 != VOIDmode)
5855 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5858 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5859 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5860 Make any useful entries we can with that information. Called from
5861 above function and called recursively. */
5864 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5866 enum machine_mode mode;
5868 int reversed_nonequality;
5870 unsigned op0_hash, op1_hash;
5871 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5872 struct table_elt *op0_elt, *op1_elt;
5874 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5875 we know that they are also equal in the smaller mode (this is also
5876 true for all smaller modes whether or not there is a SUBREG, but
5877 is not worth testing for with no SUBREG. */
5879 /* Note that GET_MODE (op0) may not equal MODE. */
5880 if (code == EQ && GET_CODE (op0) == SUBREG
5881 && (GET_MODE_SIZE (GET_MODE (op0))
5882 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5884 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5885 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5887 record_jump_cond (code, mode, SUBREG_REG (op0),
5888 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5889 reversed_nonequality);
5892 if (code == EQ && GET_CODE (op1) == SUBREG
5893 && (GET_MODE_SIZE (GET_MODE (op1))
5894 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5896 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5897 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5899 record_jump_cond (code, mode, SUBREG_REG (op1),
5900 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5901 reversed_nonequality);
5904 /* Similarly, if this is an NE comparison, and either is a SUBREG
5905 making a smaller mode, we know the whole thing is also NE. */
5907 /* Note that GET_MODE (op0) may not equal MODE;
5908 if we test MODE instead, we can get an infinite recursion
5909 alternating between two modes each wider than MODE. */
5911 if (code == NE && GET_CODE (op0) == SUBREG
5912 && subreg_lowpart_p (op0)
5913 && (GET_MODE_SIZE (GET_MODE (op0))
5914 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
5916 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5917 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5919 record_jump_cond (code, mode, SUBREG_REG (op0),
5920 tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5921 reversed_nonequality);
5924 if (code == NE && GET_CODE (op1) == SUBREG
5925 && subreg_lowpart_p (op1)
5926 && (GET_MODE_SIZE (GET_MODE (op1))
5927 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
5929 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5930 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5932 record_jump_cond (code, mode, SUBREG_REG (op1),
5933 tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5934 reversed_nonequality);
5937 /* Hash both operands. */
5940 hash_arg_in_memory = 0;
5941 hash_arg_in_struct = 0;
5942 op0_hash = HASH (op0, mode);
5943 op0_in_memory = hash_arg_in_memory;
5944 op0_in_struct = hash_arg_in_struct;
5950 hash_arg_in_memory = 0;
5951 hash_arg_in_struct = 0;
5952 op1_hash = HASH (op1, mode);
5953 op1_in_memory = hash_arg_in_memory;
5954 op1_in_struct = hash_arg_in_struct;
5959 /* Look up both operands. */
5960 op0_elt = lookup (op0, op0_hash, mode);
5961 op1_elt = lookup (op1, op1_hash, mode);
5963 /* If both operands are already equivalent or if they are not in the
5964 table but are identical, do nothing. */
5965 if ((op0_elt != 0 && op1_elt != 0
5966 && op0_elt->first_same_value == op1_elt->first_same_value)
5967 || op0 == op1 || rtx_equal_p (op0, op1))
5970 /* If we aren't setting two things equal all we can do is save this
5971 comparison. Similarly if this is floating-point. In the latter
5972 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5973 If we record the equality, we might inadvertently delete code
5974 whose intent was to change -0 to +0. */
5976 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
5978 /* If we reversed a floating-point comparison, if OP0 is not a
5979 register, or if OP1 is neither a register or constant, we can't
5982 if (GET_CODE (op1) != REG)
5983 op1 = equiv_constant (op1);
5985 if ((reversed_nonequality && FLOAT_MODE_P (mode))
5986 || GET_CODE (op0) != REG || op1 == 0)
5989 /* Put OP0 in the hash table if it isn't already. This gives it a
5990 new quantity number. */
5993 if (insert_regs (op0, NULL_PTR, 0))
5995 rehash_using_reg (op0);
5996 op0_hash = HASH (op0, mode);
5998 /* If OP0 is contained in OP1, this changes its hash code
5999 as well. Faster to rehash than to check, except
6000 for the simple case of a constant. */
6001 if (! CONSTANT_P (op1))
6002 op1_hash = HASH (op1,mode);
6005 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6006 op0_elt->in_memory = op0_in_memory;
6007 op0_elt->in_struct = op0_in_struct;
6010 qty_comparison_code[reg_qty[REGNO (op0)]] = code;
6011 if (GET_CODE (op1) == REG)
6013 /* Look it up again--in case op0 and op1 are the same. */
6014 op1_elt = lookup (op1, op1_hash, mode);
6016 /* Put OP1 in the hash table so it gets a new quantity number. */
6019 if (insert_regs (op1, NULL_PTR, 0))
6021 rehash_using_reg (op1);
6022 op1_hash = HASH (op1, mode);
6025 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6026 op1_elt->in_memory = op1_in_memory;
6027 op1_elt->in_struct = op1_in_struct;
6030 qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
6031 qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
6035 qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
6036 qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
6042 /* If either side is still missing an equivalence, make it now,
6043 then merge the equivalences. */
6047 if (insert_regs (op0, NULL_PTR, 0))
6049 rehash_using_reg (op0);
6050 op0_hash = HASH (op0, mode);
6053 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6054 op0_elt->in_memory = op0_in_memory;
6055 op0_elt->in_struct = op0_in_struct;
6060 if (insert_regs (op1, NULL_PTR, 0))
6062 rehash_using_reg (op1);
6063 op1_hash = HASH (op1, mode);
6066 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6067 op1_elt->in_memory = op1_in_memory;
6068 op1_elt->in_struct = op1_in_struct;
6071 merge_equiv_classes (op0_elt, op1_elt);
6072 last_jump_equiv_class = op0_elt;
6075 /* CSE processing for one instruction.
6076 First simplify sources and addresses of all assignments
6077 in the instruction, using previously-computed equivalents values.
6078 Then install the new sources and destinations in the table
6079 of available values.
6081 If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
6084 /* Data on one SET contained in the instruction. */
6088 /* The SET rtx itself. */
6090 /* The SET_SRC of the rtx (the original value, if it is changing). */
6092 /* The hash-table element for the SET_SRC of the SET. */
6093 struct table_elt *src_elt;
6094 /* Hash value for the SET_SRC. */
6096 /* Hash value for the SET_DEST. */
6098 /* The SET_DEST, with SUBREG, etc., stripped. */
6100 /* Place where the pointer to the INNER_DEST was found. */
6101 rtx *inner_dest_loc;
6102 /* Nonzero if the SET_SRC is in memory. */
6104 /* Nonzero if the SET_SRC is in a structure. */
6106 /* Nonzero if the SET_SRC contains something
6107 whose value cannot be predicted and understood. */
6109 /* Original machine mode, in case it becomes a CONST_INT. */
6110 enum machine_mode mode;
6111 /* A constant equivalent for SET_SRC, if any. */
6113 /* Hash value of constant equivalent for SET_SRC. */
6114 unsigned src_const_hash;
6115 /* Table entry for constant equivalent for SET_SRC, if any. */
6116 struct table_elt *src_const_elt;
6120 cse_insn (insn, in_libcall_block)
6122 int in_libcall_block;
6124 register rtx x = PATTERN (insn);
6127 register int n_sets = 0;
6129 /* Records what this insn does to set CC0. */
6130 rtx this_insn_cc0 = 0;
6131 enum machine_mode this_insn_cc0_mode;
6132 struct write_data writes_memory;
6133 static struct write_data init = {0, 0, 0, 0};
6136 struct table_elt *src_eqv_elt = 0;
6137 int src_eqv_volatile;
6138 int src_eqv_in_memory;
6139 int src_eqv_in_struct;
6140 unsigned src_eqv_hash;
6145 writes_memory = init;
6147 /* Find all the SETs and CLOBBERs in this instruction.
6148 Record all the SETs in the array `set' and count them.
6149 Also determine whether there is a CLOBBER that invalidates
6150 all memory references, or all references at varying addresses. */
6152 if (GET_CODE (insn) == CALL_INSN)
6154 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6155 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6156 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6159 if (GET_CODE (x) == SET)
6161 sets = (struct set *) alloca (sizeof (struct set));
6164 /* Ignore SETs that are unconditional jumps.
6165 They never need cse processing, so this does not hurt.
6166 The reason is not efficiency but rather
6167 so that we can test at the end for instructions
6168 that have been simplified to unconditional jumps
6169 and not be misled by unchanged instructions
6170 that were unconditional jumps to begin with. */
6171 if (SET_DEST (x) == pc_rtx
6172 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6175 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6176 The hard function value register is used only once, to copy to
6177 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6178 Ensure we invalidate the destination register. On the 80386 no
6179 other code would invalidate it since it is a fixed_reg.
6180 We need not check the return of apply_change_group; see canon_reg. */
6182 else if (GET_CODE (SET_SRC (x)) == CALL)
6184 canon_reg (SET_SRC (x), insn);
6185 apply_change_group ();
6186 fold_rtx (SET_SRC (x), insn);
6187 invalidate (SET_DEST (x), VOIDmode);
6192 else if (GET_CODE (x) == PARALLEL)
6194 register int lim = XVECLEN (x, 0);
6196 sets = (struct set *) alloca (lim * sizeof (struct set));
6198 /* Find all regs explicitly clobbered in this insn,
6199 and ensure they are not replaced with any other regs
6200 elsewhere in this insn.
6201 When a reg that is clobbered is also used for input,
6202 we should presume that that is for a reason,
6203 and we should not substitute some other register
6204 which is not supposed to be clobbered.
6205 Therefore, this loop cannot be merged into the one below
6206 because a CALL may precede a CLOBBER and refer to the
6207 value clobbered. We must not let a canonicalization do
6208 anything in that case. */
6209 for (i = 0; i < lim; i++)
6211 register rtx y = XVECEXP (x, 0, i);
6212 if (GET_CODE (y) == CLOBBER)
6214 rtx clobbered = XEXP (y, 0);
6216 if (GET_CODE (clobbered) == REG
6217 || GET_CODE (clobbered) == SUBREG)
6218 invalidate (clobbered, VOIDmode);
6219 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6220 || GET_CODE (clobbered) == ZERO_EXTRACT)
6221 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6225 for (i = 0; i < lim; i++)
6227 register rtx y = XVECEXP (x, 0, i);
6228 if (GET_CODE (y) == SET)
6230 /* As above, we ignore unconditional jumps and call-insns and
6231 ignore the result of apply_change_group. */
6232 if (GET_CODE (SET_SRC (y)) == CALL)
6234 canon_reg (SET_SRC (y), insn);
6235 apply_change_group ();
6236 fold_rtx (SET_SRC (y), insn);
6237 invalidate (SET_DEST (y), VOIDmode);
6239 else if (SET_DEST (y) == pc_rtx
6240 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6243 sets[n_sets++].rtl = y;
6245 else if (GET_CODE (y) == CLOBBER)
6247 /* If we clobber memory, take note of that,
6248 and canon the address.
6249 This does nothing when a register is clobbered
6250 because we have already invalidated the reg. */
6251 if (GET_CODE (XEXP (y, 0)) == MEM)
6253 canon_reg (XEXP (y, 0), NULL_RTX);
6254 note_mem_written (XEXP (y, 0), &writes_memory);
6257 else if (GET_CODE (y) == USE
6258 && ! (GET_CODE (XEXP (y, 0)) == REG
6259 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6260 canon_reg (y, NULL_RTX);
6261 else if (GET_CODE (y) == CALL)
6263 /* The result of apply_change_group can be ignored; see
6265 canon_reg (y, insn);
6266 apply_change_group ();
6271 else if (GET_CODE (x) == CLOBBER)
6273 if (GET_CODE (XEXP (x, 0)) == MEM)
6275 canon_reg (XEXP (x, 0), NULL_RTX);
6276 note_mem_written (XEXP (x, 0), &writes_memory);
6280 /* Canonicalize a USE of a pseudo register or memory location. */
6281 else if (GET_CODE (x) == USE
6282 && ! (GET_CODE (XEXP (x, 0)) == REG
6283 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6284 canon_reg (XEXP (x, 0), NULL_RTX);
6285 else if (GET_CODE (x) == CALL)
6287 /* The result of apply_change_group can be ignored; see canon_reg. */
6288 canon_reg (x, insn);
6289 apply_change_group ();
6293 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6294 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6295 is handled specially for this case, and if it isn't set, then there will
6296 be no equivalence for the destination. */
6297 if (n_sets == 1 && REG_NOTES (insn) != 0
6298 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6299 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6300 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6301 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6303 /* Canonicalize sources and addresses of destinations.
6304 We do this in a separate pass to avoid problems when a MATCH_DUP is
6305 present in the insn pattern. In that case, we want to ensure that
6306 we don't break the duplicate nature of the pattern. So we will replace
6307 both operands at the same time. Otherwise, we would fail to find an
6308 equivalent substitution in the loop calling validate_change below.
6310 We used to suppress canonicalization of DEST if it appears in SRC,
6311 but we don't do this any more. */
6313 for (i = 0; i < n_sets; i++)
6315 rtx dest = SET_DEST (sets[i].rtl);
6316 rtx src = SET_SRC (sets[i].rtl);
6317 rtx new = canon_reg (src, insn);
6319 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6320 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6321 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6322 || insn_n_dups[recog_memoized (insn)] > 0)
6323 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6325 SET_SRC (sets[i].rtl) = new;
6327 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6329 validate_change (insn, &XEXP (dest, 1),
6330 canon_reg (XEXP (dest, 1), insn), 1);
6331 validate_change (insn, &XEXP (dest, 2),
6332 canon_reg (XEXP (dest, 2), insn), 1);
6335 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6336 || GET_CODE (dest) == ZERO_EXTRACT
6337 || GET_CODE (dest) == SIGN_EXTRACT)
6338 dest = XEXP (dest, 0);
6340 if (GET_CODE (dest) == MEM)
6341 canon_reg (dest, insn);
6344 /* Now that we have done all the replacements, we can apply the change
6345 group and see if they all work. Note that this will cause some
6346 canonicalizations that would have worked individually not to be applied
6347 because some other canonicalization didn't work, but this should not
6350 The result of apply_change_group can be ignored; see canon_reg. */
6352 apply_change_group ();
6354 /* Set sets[i].src_elt to the class each source belongs to.
6355 Detect assignments from or to volatile things
6356 and set set[i] to zero so they will be ignored
6357 in the rest of this function.
6359 Nothing in this loop changes the hash table or the register chains. */
6361 for (i = 0; i < n_sets; i++)
6363 register rtx src, dest;
6364 register rtx src_folded;
6365 register struct table_elt *elt = 0, *p;
6366 enum machine_mode mode;
6369 rtx src_related = 0;
6370 struct table_elt *src_const_elt = 0;
6371 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6372 int src_related_cost = 10000, src_elt_cost = 10000;
6373 /* Set non-zero if we need to call force_const_mem on with the
6374 contents of src_folded before using it. */
6375 int src_folded_force_flag = 0;
6377 dest = SET_DEST (sets[i].rtl);
6378 src = SET_SRC (sets[i].rtl);
6380 /* If SRC is a constant that has no machine mode,
6381 hash it with the destination's machine mode.
6382 This way we can keep different modes separate. */
6384 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6385 sets[i].mode = mode;
6389 enum machine_mode eqvmode = mode;
6390 if (GET_CODE (dest) == STRICT_LOW_PART)
6391 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6393 hash_arg_in_memory = 0;
6394 hash_arg_in_struct = 0;
6395 src_eqv = fold_rtx (src_eqv, insn);
6396 src_eqv_hash = HASH (src_eqv, eqvmode);
6398 /* Find the equivalence class for the equivalent expression. */
6401 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6403 src_eqv_volatile = do_not_record;
6404 src_eqv_in_memory = hash_arg_in_memory;
6405 src_eqv_in_struct = hash_arg_in_struct;
6408 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6409 value of the INNER register, not the destination. So it is not
6410 a valid substitution for the source. But save it for later. */
6411 if (GET_CODE (dest) == STRICT_LOW_PART)
6414 src_eqv_here = src_eqv;
6416 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6417 simplified result, which may not necessarily be valid. */
6418 src_folded = fold_rtx (src, insn);
6421 /* ??? This caused bad code to be generated for the m68k port with -O2.
6422 Suppose src is (CONST_INT -1), and that after truncation src_folded
6423 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6424 At the end we will add src and src_const to the same equivalence
6425 class. We now have 3 and -1 on the same equivalence class. This
6426 causes later instructions to be mis-optimized. */
6427 /* If storing a constant in a bitfield, pre-truncate the constant
6428 so we will be able to record it later. */
6429 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6430 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6432 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6434 if (GET_CODE (src) == CONST_INT
6435 && GET_CODE (width) == CONST_INT
6436 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6437 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6439 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6440 << INTVAL (width)) - 1));
6444 /* Compute SRC's hash code, and also notice if it
6445 should not be recorded at all. In that case,
6446 prevent any further processing of this assignment. */
6448 hash_arg_in_memory = 0;
6449 hash_arg_in_struct = 0;
6452 sets[i].src_hash = HASH (src, mode);
6453 sets[i].src_volatile = do_not_record;
6454 sets[i].src_in_memory = hash_arg_in_memory;
6455 sets[i].src_in_struct = hash_arg_in_struct;
6458 /* It is no longer clear why we used to do this, but it doesn't
6459 appear to still be needed. So let's try without it since this
6460 code hurts cse'ing widened ops. */
6461 /* If source is a perverse subreg (such as QI treated as an SI),
6462 treat it as volatile. It may do the work of an SI in one context
6463 where the extra bits are not being used, but cannot replace an SI
6465 if (GET_CODE (src) == SUBREG
6466 && (GET_MODE_SIZE (GET_MODE (src))
6467 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6468 sets[i].src_volatile = 1;
6471 /* Locate all possible equivalent forms for SRC. Try to replace
6472 SRC in the insn with each cheaper equivalent.
6474 We have the following types of equivalents: SRC itself, a folded
6475 version, a value given in a REG_EQUAL note, or a value related
6478 Each of these equivalents may be part of an additional class
6479 of equivalents (if more than one is in the table, they must be in
6480 the same class; we check for this).
6482 If the source is volatile, we don't do any table lookups.
6484 We note any constant equivalent for possible later use in a
6487 if (!sets[i].src_volatile)
6488 elt = lookup (src, sets[i].src_hash, mode);
6490 sets[i].src_elt = elt;
6492 if (elt && src_eqv_here && src_eqv_elt)
6494 if (elt->first_same_value != src_eqv_elt->first_same_value)
6496 /* The REG_EQUAL is indicating that two formerly distinct
6497 classes are now equivalent. So merge them. */
6498 merge_equiv_classes (elt, src_eqv_elt);
6499 src_eqv_hash = HASH (src_eqv, elt->mode);
6500 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6506 else if (src_eqv_elt)
6509 /* Try to find a constant somewhere and record it in `src_const'.
6510 Record its table element, if any, in `src_const_elt'. Look in
6511 any known equivalences first. (If the constant is not in the
6512 table, also set `sets[i].src_const_hash'). */
6514 for (p = elt->first_same_value; p; p = p->next_same_value)
6518 src_const_elt = elt;
6523 && (CONSTANT_P (src_folded)
6524 /* Consider (minus (label_ref L1) (label_ref L2)) as
6525 "constant" here so we will record it. This allows us
6526 to fold switch statements when an ADDR_DIFF_VEC is used. */
6527 || (GET_CODE (src_folded) == MINUS
6528 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6529 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6530 src_const = src_folded, src_const_elt = elt;
6531 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6532 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6534 /* If we don't know if the constant is in the table, get its
6535 hash code and look it up. */
6536 if (src_const && src_const_elt == 0)
6538 sets[i].src_const_hash = HASH (src_const, mode);
6539 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6542 sets[i].src_const = src_const;
6543 sets[i].src_const_elt = src_const_elt;
6545 /* If the constant and our source are both in the table, mark them as
6546 equivalent. Otherwise, if a constant is in the table but the source
6547 isn't, set ELT to it. */
6548 if (src_const_elt && elt
6549 && src_const_elt->first_same_value != elt->first_same_value)
6550 merge_equiv_classes (elt, src_const_elt);
6551 else if (src_const_elt && elt == 0)
6552 elt = src_const_elt;
6554 /* See if there is a register linearly related to a constant
6555 equivalent of SRC. */
6557 && (GET_CODE (src_const) == CONST
6558 || (src_const_elt && src_const_elt->related_value != 0)))
6560 src_related = use_related_value (src_const, src_const_elt);
6563 struct table_elt *src_related_elt
6564 = lookup (src_related, HASH (src_related, mode), mode);
6565 if (src_related_elt && elt)
6567 if (elt->first_same_value
6568 != src_related_elt->first_same_value)
6569 /* This can occur when we previously saw a CONST
6570 involving a SYMBOL_REF and then see the SYMBOL_REF
6571 twice. Merge the involved classes. */
6572 merge_equiv_classes (elt, src_related_elt);
6575 src_related_elt = 0;
6577 else if (src_related_elt && elt == 0)
6578 elt = src_related_elt;
6582 /* See if we have a CONST_INT that is already in a register in a
6585 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6586 && GET_MODE_CLASS (mode) == MODE_INT
6587 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6589 enum machine_mode wider_mode;
6591 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6592 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6593 && src_related == 0;
6594 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6596 struct table_elt *const_elt
6597 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6602 for (const_elt = const_elt->first_same_value;
6603 const_elt; const_elt = const_elt->next_same_value)
6604 if (GET_CODE (const_elt->exp) == REG)
6606 src_related = gen_lowpart_if_possible (mode,
6613 /* Another possibility is that we have an AND with a constant in
6614 a mode narrower than a word. If so, it might have been generated
6615 as part of an "if" which would narrow the AND. If we already
6616 have done the AND in a wider mode, we can use a SUBREG of that
6619 if (flag_expensive_optimizations && ! src_related
6620 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6621 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6623 enum machine_mode tmode;
6624 rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1));
6626 for (tmode = GET_MODE_WIDER_MODE (mode);
6627 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6628 tmode = GET_MODE_WIDER_MODE (tmode))
6630 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6631 struct table_elt *larger_elt;
6635 PUT_MODE (new_and, tmode);
6636 XEXP (new_and, 0) = inner;
6637 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6638 if (larger_elt == 0)
6641 for (larger_elt = larger_elt->first_same_value;
6642 larger_elt; larger_elt = larger_elt->next_same_value)
6643 if (GET_CODE (larger_elt->exp) == REG)
6646 = gen_lowpart_if_possible (mode, larger_elt->exp);
6656 #ifdef LOAD_EXTEND_OP
6657 /* See if a MEM has already been loaded with a widening operation;
6658 if it has, we can use a subreg of that. Many CISC machines
6659 also have such operations, but this is only likely to be
6660 beneficial these machines. */
6662 if (flag_expensive_optimizations && src_related == 0
6663 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6664 && GET_MODE_CLASS (mode) == MODE_INT
6665 && GET_CODE (src) == MEM && ! do_not_record
6666 && LOAD_EXTEND_OP (mode) != NIL)
6668 enum machine_mode tmode;
6670 /* Set what we are trying to extend and the operation it might
6671 have been extended with. */
6672 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6673 XEXP (memory_extend_rtx, 0) = src;
6675 for (tmode = GET_MODE_WIDER_MODE (mode);
6676 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6677 tmode = GET_MODE_WIDER_MODE (tmode))
6679 struct table_elt *larger_elt;
6681 PUT_MODE (memory_extend_rtx, tmode);
6682 larger_elt = lookup (memory_extend_rtx,
6683 HASH (memory_extend_rtx, tmode), tmode);
6684 if (larger_elt == 0)
6687 for (larger_elt = larger_elt->first_same_value;
6688 larger_elt; larger_elt = larger_elt->next_same_value)
6689 if (GET_CODE (larger_elt->exp) == REG)
6691 src_related = gen_lowpart_if_possible (mode,
6700 #endif /* LOAD_EXTEND_OP */
6702 if (src == src_folded)
6705 /* At this point, ELT, if non-zero, points to a class of expressions
6706 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6707 and SRC_RELATED, if non-zero, each contain additional equivalent
6708 expressions. Prune these latter expressions by deleting expressions
6709 already in the equivalence class.
6711 Check for an equivalent identical to the destination. If found,
6712 this is the preferred equivalent since it will likely lead to
6713 elimination of the insn. Indicate this by placing it in
6716 if (elt) elt = elt->first_same_value;
6717 for (p = elt; p; p = p->next_same_value)
6719 enum rtx_code code = GET_CODE (p->exp);
6721 /* If the expression is not valid, ignore it. Then we do not
6722 have to check for validity below. In most cases, we can use
6723 `rtx_equal_p', since canonicalization has already been done. */
6724 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6727 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6729 else if (src_folded && GET_CODE (src_folded) == code
6730 && rtx_equal_p (src_folded, p->exp))
6732 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6733 && rtx_equal_p (src_eqv_here, p->exp))
6735 else if (src_related && GET_CODE (src_related) == code
6736 && rtx_equal_p (src_related, p->exp))
6739 /* This is the same as the destination of the insns, we want
6740 to prefer it. Copy it to src_related. The code below will
6741 then give it a negative cost. */
6742 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6747 /* Find the cheapest valid equivalent, trying all the available
6748 possibilities. Prefer items not in the hash table to ones
6749 that are when they are equal cost. Note that we can never
6750 worsen an insn as the current contents will also succeed.
6751 If we find an equivalent identical to the destination, use it as best,
6752 since this insn will probably be eliminated in that case. */
6755 if (rtx_equal_p (src, dest))
6758 src_cost = COST (src);
6763 if (rtx_equal_p (src_eqv_here, dest))
6766 src_eqv_cost = COST (src_eqv_here);
6771 if (rtx_equal_p (src_folded, dest))
6772 src_folded_cost = -1;
6774 src_folded_cost = COST (src_folded);
6779 if (rtx_equal_p (src_related, dest))
6780 src_related_cost = -1;
6782 src_related_cost = COST (src_related);
6785 /* If this was an indirect jump insn, a known label will really be
6786 cheaper even though it looks more expensive. */
6787 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6788 src_folded = src_const, src_folded_cost = -1;
6790 /* Terminate loop when replacement made. This must terminate since
6791 the current contents will be tested and will always be valid. */
6796 /* Skip invalid entries. */
6797 while (elt && GET_CODE (elt->exp) != REG
6798 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6799 elt = elt->next_same_value;
6801 if (elt) src_elt_cost = elt->cost;
6803 /* Find cheapest and skip it for the next time. For items
6804 of equal cost, use this order:
6805 src_folded, src, src_eqv, src_related and hash table entry. */
6806 if (src_folded_cost <= src_cost
6807 && src_folded_cost <= src_eqv_cost
6808 && src_folded_cost <= src_related_cost
6809 && src_folded_cost <= src_elt_cost)
6811 trial = src_folded, src_folded_cost = 10000;
6812 if (src_folded_force_flag)
6813 trial = force_const_mem (mode, trial);
6815 else if (src_cost <= src_eqv_cost
6816 && src_cost <= src_related_cost
6817 && src_cost <= src_elt_cost)
6818 trial = src, src_cost = 10000;
6819 else if (src_eqv_cost <= src_related_cost
6820 && src_eqv_cost <= src_elt_cost)
6821 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
6822 else if (src_related_cost <= src_elt_cost)
6823 trial = copy_rtx (src_related), src_related_cost = 10000;
6826 trial = copy_rtx (elt->exp);
6827 elt = elt->next_same_value;
6828 src_elt_cost = 10000;
6831 /* We don't normally have an insn matching (set (pc) (pc)), so
6832 check for this separately here. We will delete such an
6835 Tablejump insns contain a USE of the table, so simply replacing
6836 the operand with the constant won't match. This is simply an
6837 unconditional branch, however, and is therefore valid. Just
6838 insert the substitution here and we will delete and re-emit
6841 if (n_sets == 1 && dest == pc_rtx
6843 || (GET_CODE (trial) == LABEL_REF
6844 && ! condjump_p (insn))))
6846 /* If TRIAL is a label in front of a jump table, we are
6847 really falling through the switch (this is how casesi
6848 insns work), so we must branch around the table. */
6849 if (GET_CODE (trial) == CODE_LABEL
6850 && NEXT_INSN (trial) != 0
6851 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6852 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6853 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6855 trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial));
6857 SET_SRC (sets[i].rtl) = trial;
6858 cse_jumps_altered = 1;
6862 /* Look for a substitution that makes a valid insn. */
6863 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
6865 /* The result of apply_change_group can be ignored; see
6868 validate_change (insn, &SET_SRC (sets[i].rtl),
6869 canon_reg (SET_SRC (sets[i].rtl), insn),
6871 apply_change_group ();
6875 /* If we previously found constant pool entries for
6876 constants and this is a constant, try making a
6877 pool entry. Put it in src_folded unless we already have done
6878 this since that is where it likely came from. */
6880 else if (constant_pool_entries_cost
6881 && CONSTANT_P (trial)
6882 && ! (GET_CODE (trial) == CONST
6883 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
6885 || (GET_CODE (src_folded) != MEM
6886 && ! src_folded_force_flag))
6887 && GET_MODE_CLASS (mode) != MODE_CC)
6889 src_folded_force_flag = 1;
6891 src_folded_cost = constant_pool_entries_cost;
6895 src = SET_SRC (sets[i].rtl);
6897 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6898 However, there is an important exception: If both are registers
6899 that are not the head of their equivalence class, replace SET_SRC
6900 with the head of the class. If we do not do this, we will have
6901 both registers live over a portion of the basic block. This way,
6902 their lifetimes will likely abut instead of overlapping. */
6903 if (GET_CODE (dest) == REG
6904 && REGNO_QTY_VALID_P (REGNO (dest))
6905 && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6906 && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6907 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6908 /* Don't do this if the original insn had a hard reg as
6910 && (GET_CODE (sets[i].src) != REG
6911 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6912 /* We can't call canon_reg here because it won't do anything if
6913 SRC is a hard register. */
6915 int first = qty_first_reg[reg_qty[REGNO (src)]];
6917 src = SET_SRC (sets[i].rtl)
6918 = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6919 : gen_rtx (REG, GET_MODE (src), first);
6921 /* If we had a constant that is cheaper than what we are now
6922 setting SRC to, use that constant. We ignored it when we
6923 thought we could make this into a no-op. */
6924 if (src_const && COST (src_const) < COST (src)
6925 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6929 /* If we made a change, recompute SRC values. */
6930 if (src != sets[i].src)
6933 hash_arg_in_memory = 0;
6934 hash_arg_in_struct = 0;
6936 sets[i].src_hash = HASH (src, mode);
6937 sets[i].src_volatile = do_not_record;
6938 sets[i].src_in_memory = hash_arg_in_memory;
6939 sets[i].src_in_struct = hash_arg_in_struct;
6940 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
6943 /* If this is a single SET, we are setting a register, and we have an
6944 equivalent constant, we want to add a REG_NOTE. We don't want
6945 to write a REG_EQUAL note for a constant pseudo since verifying that
6946 that pseudo hasn't been eliminated is a pain. Such a note also
6947 won't help anything. */
6948 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
6949 && GET_CODE (src_const) != REG)
6951 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6953 /* Record the actual constant value in a REG_EQUAL note, making
6954 a new one if one does not already exist. */
6956 XEXP (tem, 0) = src_const;
6958 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL,
6959 src_const, REG_NOTES (insn));
6961 /* If storing a constant value in a register that
6962 previously held the constant value 0,
6963 record this fact with a REG_WAS_0 note on this insn.
6965 Note that the *register* is required to have previously held 0,
6966 not just any register in the quantity and we must point to the
6967 insn that set that register to zero.
6969 Rather than track each register individually, we just see if
6970 the last set for this quantity was for this register. */
6972 if (REGNO_QTY_VALID_P (REGNO (dest))
6973 && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
6975 /* See if we previously had a REG_WAS_0 note. */
6976 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
6977 rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
6979 if ((tem = single_set (const_insn)) != 0
6980 && rtx_equal_p (SET_DEST (tem), dest))
6983 XEXP (note, 0) = const_insn;
6985 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0,
6986 const_insn, REG_NOTES (insn));
6991 /* Now deal with the destination. */
6993 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
6995 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6996 to the MEM or REG within it. */
6997 while (GET_CODE (dest) == SIGN_EXTRACT
6998 || GET_CODE (dest) == ZERO_EXTRACT
6999 || GET_CODE (dest) == SUBREG
7000 || GET_CODE (dest) == STRICT_LOW_PART)
7002 sets[i].inner_dest_loc = &XEXP (dest, 0);
7003 dest = XEXP (dest, 0);
7006 sets[i].inner_dest = dest;
7008 if (GET_CODE (dest) == MEM)
7010 dest = fold_rtx (dest, insn);
7012 /* Decide whether we invalidate everything in memory,
7013 or just things at non-fixed places.
7014 Writing a large aggregate must invalidate everything
7015 because we don't know how long it is. */
7016 note_mem_written (dest, &writes_memory);
7019 /* Compute the hash code of the destination now,
7020 before the effects of this instruction are recorded,
7021 since the register values used in the address computation
7022 are those before this instruction. */
7023 sets[i].dest_hash = HASH (dest, mode);
7025 /* Don't enter a bit-field in the hash table
7026 because the value in it after the store
7027 may not equal what was stored, due to truncation. */
7029 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7030 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7032 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7034 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7035 && GET_CODE (width) == CONST_INT
7036 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7037 && ! (INTVAL (src_const)
7038 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7039 /* Exception: if the value is constant,
7040 and it won't be truncated, record it. */
7044 /* This is chosen so that the destination will be invalidated
7045 but no new value will be recorded.
7046 We must invalidate because sometimes constant
7047 values can be recorded for bitfields. */
7048 sets[i].src_elt = 0;
7049 sets[i].src_volatile = 1;
7055 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7057 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7059 PUT_CODE (insn, NOTE);
7060 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7061 NOTE_SOURCE_FILE (insn) = 0;
7062 cse_jumps_altered = 1;
7063 /* One less use of the label this insn used to jump to. */
7064 --LABEL_NUSES (JUMP_LABEL (insn));
7065 /* No more processing for this set. */
7069 /* If this SET is now setting PC to a label, we know it used to
7070 be a conditional or computed branch. So we see if we can follow
7071 it. If it was a computed branch, delete it and re-emit. */
7072 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7076 /* If this is not in the format for a simple branch and
7077 we are the only SET in it, re-emit it. */
7078 if (! simplejump_p (insn) && n_sets == 1)
7080 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7081 JUMP_LABEL (new) = XEXP (src, 0);
7082 LABEL_NUSES (XEXP (src, 0))++;
7087 /* Otherwise, force rerecognition, since it probably had
7088 a different pattern before.
7089 This shouldn't really be necessary, since whatever
7090 changed the source value above should have done this.
7091 Until the right place is found, might as well do this here. */
7092 INSN_CODE (insn) = -1;
7094 /* Now that we've converted this jump to an unconditional jump,
7095 there is dead code after it. Delete the dead code until we
7096 reach a BARRIER, the end of the function, or a label. Do
7097 not delete NOTEs except for NOTE_INSN_DELETED since later
7098 phases assume these notes are retained. */
7102 while (NEXT_INSN (p) != 0
7103 && GET_CODE (NEXT_INSN (p)) != BARRIER
7104 && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
7106 if (GET_CODE (NEXT_INSN (p)) != NOTE
7107 || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
7108 delete_insn (NEXT_INSN (p));
7113 /* If we don't have a BARRIER immediately after INSN, put one there.
7114 Much code assumes that there are no NOTEs between a JUMP_INSN and
7117 if (NEXT_INSN (insn) == 0
7118 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
7119 emit_barrier_before (NEXT_INSN (insn));
7121 /* We might have two BARRIERs separated by notes. Delete the second
7124 if (p != insn && NEXT_INSN (p) != 0
7125 && GET_CODE (NEXT_INSN (p)) == BARRIER)
7126 delete_insn (NEXT_INSN (p));
7128 cse_jumps_altered = 1;
7132 /* If destination is volatile, invalidate it and then do no further
7133 processing for this assignment. */
7135 else if (do_not_record)
7137 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7138 || GET_CODE (dest) == MEM)
7139 invalidate (dest, VOIDmode);
7140 else if (GET_CODE (dest) == STRICT_LOW_PART
7141 || GET_CODE (dest) == ZERO_EXTRACT)
7142 invalidate (XEXP (dest, 0), GET_MODE (dest));
7146 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7147 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7150 /* If setting CC0, record what it was set to, or a constant, if it
7151 is equivalent to a constant. If it is being set to a floating-point
7152 value, make a COMPARE with the appropriate constant of 0. If we
7153 don't do this, later code can interpret this as a test against
7154 const0_rtx, which can cause problems if we try to put it into an
7155 insn as a floating-point operand. */
7156 if (dest == cc0_rtx)
7158 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7159 this_insn_cc0_mode = mode;
7160 if (FLOAT_MODE_P (mode))
7161 this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0,
7167 /* Now enter all non-volatile source expressions in the hash table
7168 if they are not already present.
7169 Record their equivalence classes in src_elt.
7170 This way we can insert the corresponding destinations into
7171 the same classes even if the actual sources are no longer in them
7172 (having been invalidated). */
7174 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7175 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7177 register struct table_elt *elt;
7178 register struct table_elt *classp = sets[0].src_elt;
7179 rtx dest = SET_DEST (sets[0].rtl);
7180 enum machine_mode eqvmode = GET_MODE (dest);
7182 if (GET_CODE (dest) == STRICT_LOW_PART)
7184 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7187 if (insert_regs (src_eqv, classp, 0))
7189 rehash_using_reg (src_eqv);
7190 src_eqv_hash = HASH (src_eqv, eqvmode);
7192 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7193 elt->in_memory = src_eqv_in_memory;
7194 elt->in_struct = src_eqv_in_struct;
7197 /* Check to see if src_eqv_elt is the same as a set source which
7198 does not yet have an elt, and if so set the elt of the set source
7200 for (i = 0; i < n_sets; i++)
7201 if (sets[i].rtl && sets[i].src_elt == 0
7202 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7203 sets[i].src_elt = src_eqv_elt;
7206 for (i = 0; i < n_sets; i++)
7207 if (sets[i].rtl && ! sets[i].src_volatile
7208 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7210 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7212 /* REG_EQUAL in setting a STRICT_LOW_PART
7213 gives an equivalent for the entire destination register,
7214 not just for the subreg being stored in now.
7215 This is a more interesting equivalence, so we arrange later
7216 to treat the entire reg as the destination. */
7217 sets[i].src_elt = src_eqv_elt;
7218 sets[i].src_hash = src_eqv_hash;
7222 /* Insert source and constant equivalent into hash table, if not
7224 register struct table_elt *classp = src_eqv_elt;
7225 register rtx src = sets[i].src;
7226 register rtx dest = SET_DEST (sets[i].rtl);
7227 enum machine_mode mode
7228 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7230 if (sets[i].src_elt == 0)
7232 register struct table_elt *elt;
7234 /* Note that these insert_regs calls cannot remove
7235 any of the src_elt's, because they would have failed to
7236 match if not still valid. */
7237 if (insert_regs (src, classp, 0))
7239 rehash_using_reg (src);
7240 sets[i].src_hash = HASH (src, mode);
7242 elt = insert (src, classp, sets[i].src_hash, mode);
7243 elt->in_memory = sets[i].src_in_memory;
7244 elt->in_struct = sets[i].src_in_struct;
7245 sets[i].src_elt = classp = elt;
7248 if (sets[i].src_const && sets[i].src_const_elt == 0
7249 && src != sets[i].src_const
7250 && ! rtx_equal_p (sets[i].src_const, src))
7251 sets[i].src_elt = insert (sets[i].src_const, classp,
7252 sets[i].src_const_hash, mode);
7255 else if (sets[i].src_elt == 0)
7256 /* If we did not insert the source into the hash table (e.g., it was
7257 volatile), note the equivalence class for the REG_EQUAL value, if any,
7258 so that the destination goes into that class. */
7259 sets[i].src_elt = src_eqv_elt;
7261 invalidate_from_clobbers (&writes_memory, x);
7263 /* Some registers are invalidated by subroutine calls. Memory is
7264 invalidated by non-constant calls. */
7266 if (GET_CODE (insn) == CALL_INSN)
7268 static struct write_data everything = {0, 1, 1, 1};
7270 if (! CONST_CALL_P (insn))
7271 invalidate_memory (&everything);
7272 invalidate_for_call ();
7275 /* Now invalidate everything set by this instruction.
7276 If a SUBREG or other funny destination is being set,
7277 sets[i].rtl is still nonzero, so here we invalidate the reg
7278 a part of which is being set. */
7280 for (i = 0; i < n_sets; i++)
7283 /* We can't use the inner dest, because the mode associated with
7284 a ZERO_EXTRACT is significant. */
7285 register rtx dest = SET_DEST (sets[i].rtl);
7287 /* Needed for registers to remove the register from its
7288 previous quantity's chain.
7289 Needed for memory if this is a nonvarying address, unless
7290 we have just done an invalidate_memory that covers even those. */
7291 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7292 || (GET_CODE (dest) == MEM && ! writes_memory.all
7293 && ! cse_rtx_addr_varies_p (dest)))
7294 invalidate (dest, VOIDmode);
7295 else if (GET_CODE (dest) == STRICT_LOW_PART
7296 || GET_CODE (dest) == ZERO_EXTRACT)
7297 invalidate (XEXP (dest, 0), GET_MODE (dest));
7300 /* Make sure registers mentioned in destinations
7301 are safe for use in an expression to be inserted.
7302 This removes from the hash table
7303 any invalid entry that refers to one of these registers.
7305 We don't care about the return value from mention_regs because
7306 we are going to hash the SET_DEST values unconditionally. */
7308 for (i = 0; i < n_sets; i++)
7309 if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
7310 mention_regs (SET_DEST (sets[i].rtl));
7312 /* We may have just removed some of the src_elt's from the hash table.
7313 So replace each one with the current head of the same class. */
7315 for (i = 0; i < n_sets; i++)
7318 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7319 /* If elt was removed, find current head of same class,
7320 or 0 if nothing remains of that class. */
7322 register struct table_elt *elt = sets[i].src_elt;
7324 while (elt && elt->prev_same_value)
7325 elt = elt->prev_same_value;
7327 while (elt && elt->first_same_value == 0)
7328 elt = elt->next_same_value;
7329 sets[i].src_elt = elt ? elt->first_same_value : 0;
7333 /* Now insert the destinations into their equivalence classes. */
7335 for (i = 0; i < n_sets; i++)
7338 register rtx dest = SET_DEST (sets[i].rtl);
7339 register struct table_elt *elt;
7341 /* Don't record value if we are not supposed to risk allocating
7342 floating-point values in registers that might be wider than
7344 if ((flag_float_store
7345 && GET_CODE (dest) == MEM
7346 && FLOAT_MODE_P (GET_MODE (dest)))
7347 /* Don't record values of destinations set inside a libcall block
7348 since we might delete the libcall. Things should have been set
7349 up so we won't want to reuse such a value, but we play it safe
7352 /* If we didn't put a REG_EQUAL value or a source into the hash
7353 table, there is no point is recording DEST. */
7354 || sets[i].src_elt == 0
7355 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7356 or SIGN_EXTEND, don't record DEST since it can cause
7357 some tracking to be wrong.
7359 ??? Think about this more later. */
7360 || (GET_CODE (dest) == SUBREG
7361 && (GET_MODE_SIZE (GET_MODE (dest))
7362 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7363 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7364 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7367 /* STRICT_LOW_PART isn't part of the value BEING set,
7368 and neither is the SUBREG inside it.
7369 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7370 if (GET_CODE (dest) == STRICT_LOW_PART)
7371 dest = SUBREG_REG (XEXP (dest, 0));
7373 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7374 /* Registers must also be inserted into chains for quantities. */
7375 if (insert_regs (dest, sets[i].src_elt, 1))
7377 /* If `insert_regs' changes something, the hash code must be
7379 rehash_using_reg (dest);
7380 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7383 elt = insert (dest, sets[i].src_elt,
7384 sets[i].dest_hash, GET_MODE (dest));
7385 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7386 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7387 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7392 /* This implicitly assumes a whole struct
7393 need not have MEM_IN_STRUCT_P.
7394 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7395 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7396 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7399 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7400 narrower than M2, and both M1 and M2 are the same number of words,
7401 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7402 make that equivalence as well.
7404 However, BAR may have equivalences for which gen_lowpart_if_possible
7405 will produce a simpler value than gen_lowpart_if_possible applied to
7406 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7407 BAR's equivalences. If we don't get a simplified form, make
7408 the SUBREG. It will not be used in an equivalence, but will
7409 cause two similar assignments to be detected.
7411 Note the loop below will find SUBREG_REG (DEST) since we have
7412 already entered SRC and DEST of the SET in the table. */
7414 if (GET_CODE (dest) == SUBREG
7415 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7417 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7418 && (GET_MODE_SIZE (GET_MODE (dest))
7419 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7420 && sets[i].src_elt != 0)
7422 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7423 struct table_elt *elt, *classp = 0;
7425 for (elt = sets[i].src_elt->first_same_value; elt;
7426 elt = elt->next_same_value)
7430 struct table_elt *src_elt;
7432 /* Ignore invalid entries. */
7433 if (GET_CODE (elt->exp) != REG
7434 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7437 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7439 new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0);
7441 src_hash = HASH (new_src, new_mode);
7442 src_elt = lookup (new_src, src_hash, new_mode);
7444 /* Put the new source in the hash table is if isn't
7448 if (insert_regs (new_src, classp, 0))
7450 rehash_using_reg (new_src);
7451 src_hash = HASH (new_src, new_mode);
7453 src_elt = insert (new_src, classp, src_hash, new_mode);
7454 src_elt->in_memory = elt->in_memory;
7455 src_elt->in_struct = elt->in_struct;
7457 else if (classp && classp != src_elt->first_same_value)
7458 /* Show that two things that we've seen before are
7459 actually the same. */
7460 merge_equiv_classes (src_elt, classp);
7462 classp = src_elt->first_same_value;
7467 /* Special handling for (set REG0 REG1)
7468 where REG0 is the "cheapest", cheaper than REG1.
7469 After cse, REG1 will probably not be used in the sequel,
7470 so (if easily done) change this insn to (set REG1 REG0) and
7471 replace REG1 with REG0 in the previous insn that computed their value.
7472 Then REG1 will become a dead store and won't cloud the situation
7473 for later optimizations.
7475 Do not make this change if REG1 is a hard register, because it will
7476 then be used in the sequel and we may be changing a two-operand insn
7477 into a three-operand insn.
7479 Also do not do this if we are operating on a copy of INSN. */
7481 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7482 && NEXT_INSN (PREV_INSN (insn)) == insn
7483 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7484 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7485 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7486 && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7487 == REGNO (SET_DEST (sets[0].rtl))))
7489 rtx prev = PREV_INSN (insn);
7490 while (prev && GET_CODE (prev) == NOTE)
7491 prev = PREV_INSN (prev);
7493 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7494 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7496 rtx dest = SET_DEST (sets[0].rtl);
7497 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7499 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7500 validate_change (insn, & SET_DEST (sets[0].rtl),
7501 SET_SRC (sets[0].rtl), 1);
7502 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7503 apply_change_group ();
7505 /* If REG1 was equivalent to a constant, REG0 is not. */
7507 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7509 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7510 any REG_WAS_0 note on INSN to PREV. */
7511 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7513 remove_note (prev, note);
7515 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7518 remove_note (insn, note);
7519 XEXP (note, 1) = REG_NOTES (prev);
7520 REG_NOTES (prev) = note;
7523 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7524 then we must delete it, because the value in REG0 has changed. */
7525 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7526 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7527 remove_note (insn, note);
7531 /* If this is a conditional jump insn, record any known equivalences due to
7532 the condition being tested. */
7534 last_jump_equiv_class = 0;
7535 if (GET_CODE (insn) == JUMP_INSN
7536 && n_sets == 1 && GET_CODE (x) == SET
7537 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7538 record_jump_equiv (insn, 0);
7541 /* If the previous insn set CC0 and this insn no longer references CC0,
7542 delete the previous insn. Here we use the fact that nothing expects CC0
7543 to be valid over an insn, which is true until the final pass. */
7544 if (prev_insn && GET_CODE (prev_insn) == INSN
7545 && (tem = single_set (prev_insn)) != 0
7546 && SET_DEST (tem) == cc0_rtx
7547 && ! reg_mentioned_p (cc0_rtx, x))
7549 PUT_CODE (prev_insn, NOTE);
7550 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7551 NOTE_SOURCE_FILE (prev_insn) = 0;
7554 prev_insn_cc0 = this_insn_cc0;
7555 prev_insn_cc0_mode = this_insn_cc0_mode;
7561 /* Store 1 in *WRITES_PTR for those categories of memory ref
7562 that must be invalidated when the expression WRITTEN is stored in.
7563 If WRITTEN is null, say everything must be invalidated. */
7566 note_mem_written (written, writes_ptr)
7568 struct write_data *writes_ptr;
7570 static struct write_data everything = {0, 1, 1, 1};
7573 *writes_ptr = everything;
7574 else if (GET_CODE (written) == MEM)
7576 /* Pushing or popping the stack invalidates just the stack pointer. */
7577 rtx addr = XEXP (written, 0);
7578 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7579 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7580 && GET_CODE (XEXP (addr, 0)) == REG
7581 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7586 else if (GET_MODE (written) == BLKmode)
7587 *writes_ptr = everything;
7588 else if (cse_rtx_addr_varies_p (written))
7590 /* A varying address that is a sum indicates an array element,
7591 and that's just as good as a structure element
7592 in implying that we need not invalidate scalar variables.
7593 However, we must allow QImode aliasing of scalars, because the
7594 ANSI C standard allows character pointers to alias anything.
7595 We must also allow AND addresses, because they may generate
7596 accesses outside the object being referenced. This is used to
7597 generate aligned addresses from unaligned addresses, for instance,
7598 the alpha storeqi_unaligned pattern. */
7599 if (! ((MEM_IN_STRUCT_P (written)
7600 || GET_CODE (XEXP (written, 0)) == PLUS)
7601 && GET_MODE (written) != QImode
7602 && GET_CODE (XEXP (written, 0)) != AND))
7603 writes_ptr->all = 1;
7604 writes_ptr->nonscalar = 1;
7606 writes_ptr->var = 1;
7610 /* Perform invalidation on the basis of everything about an insn
7611 except for invalidating the actual places that are SET in it.
7612 This includes the places CLOBBERed, and anything that might
7613 alias with something that is SET or CLOBBERed.
7615 W points to the writes_memory for this insn, a struct write_data
7616 saying which kinds of memory references must be invalidated.
7617 X is the pattern of the insn. */
7620 invalidate_from_clobbers (w, x)
7621 struct write_data *w;
7624 /* If W->var is not set, W specifies no action.
7625 If W->all is set, this step gets all memory refs
7626 so they can be ignored in the rest of this function. */
7628 invalidate_memory (w);
7632 if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7633 reg_tick[STACK_POINTER_REGNUM]++;
7635 /* This should be *very* rare. */
7636 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7637 invalidate (stack_pointer_rtx, VOIDmode);
7640 if (GET_CODE (x) == CLOBBER)
7642 rtx ref = XEXP (x, 0);
7645 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7646 || (GET_CODE (ref) == MEM && ! w->all))
7647 invalidate (ref, VOIDmode);
7648 else if (GET_CODE (ref) == STRICT_LOW_PART
7649 || GET_CODE (ref) == ZERO_EXTRACT)
7650 invalidate (XEXP (ref, 0), GET_MODE (ref));
7653 else if (GET_CODE (x) == PARALLEL)
7656 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7658 register rtx y = XVECEXP (x, 0, i);
7659 if (GET_CODE (y) == CLOBBER)
7661 rtx ref = XEXP (y, 0);
7664 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
7665 || (GET_CODE (ref) == MEM && !w->all))
7666 invalidate (ref, VOIDmode);
7667 else if (GET_CODE (ref) == STRICT_LOW_PART
7668 || GET_CODE (ref) == ZERO_EXTRACT)
7669 invalidate (XEXP (ref, 0), GET_MODE (ref));
7676 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7677 and replace any registers in them with either an equivalent constant
7678 or the canonical form of the register. If we are inside an address,
7679 only do this if the address remains valid.
7681 OBJECT is 0 except when within a MEM in which case it is the MEM.
7683 Return the replacement for X. */
7686 cse_process_notes (x, object)
7690 enum rtx_code code = GET_CODE (x);
7691 char *fmt = GET_RTX_FORMAT (code);
7707 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7712 if (REG_NOTE_KIND (x) == REG_EQUAL)
7713 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
7715 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
7722 rtx new = cse_process_notes (XEXP (x, 0), object);
7723 /* We don't substitute VOIDmode constants into these rtx,
7724 since they would impede folding. */
7725 if (GET_MODE (new) != VOIDmode)
7726 validate_change (object, &XEXP (x, 0), new, 0);
7731 i = reg_qty[REGNO (x)];
7733 /* Return a constant or a constant register. */
7734 if (REGNO_QTY_VALID_P (REGNO (x))
7735 && qty_const[i] != 0
7736 && (CONSTANT_P (qty_const[i])
7737 || GET_CODE (qty_const[i]) == REG))
7739 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7744 /* Otherwise, canonicalize this register. */
7745 return canon_reg (x, NULL_RTX);
7748 for (i = 0; i < GET_RTX_LENGTH (code); i++)
7750 validate_change (object, &XEXP (x, i),
7751 cse_process_notes (XEXP (x, i), object), 0);
7756 /* Find common subexpressions between the end test of a loop and the beginning
7757 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7759 Often we have a loop where an expression in the exit test is used
7760 in the body of the loop. For example "while (*p) *q++ = *p++;".
7761 Because of the way we duplicate the loop exit test in front of the loop,
7762 however, we don't detect that common subexpression. This will be caught
7763 when global cse is implemented, but this is a quite common case.
7765 This function handles the most common cases of these common expressions.
7766 It is called after we have processed the basic block ending with the
7767 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7768 jumps to a label used only once. */
7771 cse_around_loop (loop_start)
7776 struct table_elt *p;
7778 /* If the jump at the end of the loop doesn't go to the start, we don't
7780 for (insn = PREV_INSN (loop_start);
7781 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7782 insn = PREV_INSN (insn))
7786 || GET_CODE (insn) != NOTE
7787 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7790 /* If the last insn of the loop (the end test) was an NE comparison,
7791 we will interpret it as an EQ comparison, since we fell through
7792 the loop. Any equivalences resulting from that comparison are
7793 therefore not valid and must be invalidated. */
7794 if (last_jump_equiv_class)
7795 for (p = last_jump_equiv_class->first_same_value; p;
7796 p = p->next_same_value)
7797 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7798 || (GET_CODE (p->exp) == SUBREG
7799 && GET_CODE (SUBREG_REG (p->exp)) == REG))
7800 invalidate (p->exp, VOIDmode);
7801 else if (GET_CODE (p->exp) == STRICT_LOW_PART
7802 || GET_CODE (p->exp) == ZERO_EXTRACT)
7803 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
7805 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7806 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7808 The only thing we do with SET_DEST is invalidate entries, so we
7809 can safely process each SET in order. It is slightly less efficient
7810 to do so, but we only want to handle the most common cases. */
7812 for (insn = NEXT_INSN (loop_start);
7813 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7814 && ! (GET_CODE (insn) == NOTE
7815 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7816 insn = NEXT_INSN (insn))
7818 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7819 && (GET_CODE (PATTERN (insn)) == SET
7820 || GET_CODE (PATTERN (insn)) == CLOBBER))
7821 cse_set_around_loop (PATTERN (insn), insn, loop_start);
7822 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7823 && GET_CODE (PATTERN (insn)) == PARALLEL)
7824 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7825 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7826 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7827 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7832 /* Variable used for communications between the next two routines. */
7834 static struct write_data skipped_writes_memory;
7836 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7837 since they are done elsewhere. This function is called via note_stores. */
7840 invalidate_skipped_set (dest, set)
7844 if (GET_CODE (dest) == MEM)
7845 note_mem_written (dest, &skipped_writes_memory);
7847 /* There are times when an address can appear varying and be a PLUS
7848 during this scan when it would be a fixed address were we to know
7849 the proper equivalences. So promote "nonscalar" to be "all". */
7850 if (skipped_writes_memory.nonscalar)
7851 skipped_writes_memory.all = 1;
7853 if (GET_CODE (set) == CLOBBER
7860 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7861 || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
7862 invalidate (dest, VOIDmode);
7863 else if (GET_CODE (dest) == STRICT_LOW_PART
7864 || GET_CODE (dest) == ZERO_EXTRACT)
7865 invalidate (XEXP (dest, 0), GET_MODE (dest));
7868 /* Invalidate all insns from START up to the end of the function or the
7869 next label. This called when we wish to CSE around a block that is
7870 conditionally executed. */
7873 invalidate_skipped_block (start)
7877 static struct write_data init = {0, 0, 0, 0};
7878 static struct write_data everything = {0, 1, 1, 1};
7880 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7881 insn = NEXT_INSN (insn))
7883 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7886 skipped_writes_memory = init;
7888 if (GET_CODE (insn) == CALL_INSN)
7890 invalidate_for_call ();
7891 skipped_writes_memory = everything;
7894 note_stores (PATTERN (insn), invalidate_skipped_set);
7895 invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn));
7899 /* Used for communication between the following two routines; contains a
7900 value to be checked for modification. */
7902 static rtx cse_check_loop_start_value;
7904 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7905 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7908 cse_check_loop_start (x, set)
7912 if (cse_check_loop_start_value == 0
7913 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7916 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7917 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7918 cse_check_loop_start_value = 0;
7921 /* X is a SET or CLOBBER contained in INSN that was found near the start of
7922 a loop that starts with the label at LOOP_START.
7924 If X is a SET, we see if its SET_SRC is currently in our hash table.
7925 If so, we see if it has a value equal to some register used only in the
7926 loop exit code (as marked by jump.c).
7928 If those two conditions are true, we search backwards from the start of
7929 the loop to see if that same value was loaded into a register that still
7930 retains its value at the start of the loop.
7932 If so, we insert an insn after the load to copy the destination of that
7933 load into the equivalent register and (try to) replace our SET_SRC with that
7936 In any event, we invalidate whatever this SET or CLOBBER modifies. */
7939 cse_set_around_loop (x, insn, loop_start)
7944 struct table_elt *src_elt;
7945 static struct write_data init = {0, 0, 0, 0};
7946 struct write_data writes_memory;
7948 writes_memory = init;
7950 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7951 are setting PC or CC0 or whose SET_SRC is already a register. */
7952 if (GET_CODE (x) == SET
7953 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
7954 && GET_CODE (SET_SRC (x)) != REG)
7956 src_elt = lookup (SET_SRC (x),
7957 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
7958 GET_MODE (SET_DEST (x)));
7961 for (src_elt = src_elt->first_same_value; src_elt;
7962 src_elt = src_elt->next_same_value)
7963 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
7964 && COST (src_elt->exp) < COST (SET_SRC (x)))
7968 /* Look for an insn in front of LOOP_START that sets
7969 something in the desired mode to SET_SRC (x) before we hit
7970 a label or CALL_INSN. */
7972 for (p = prev_nonnote_insn (loop_start);
7973 p && GET_CODE (p) != CALL_INSN
7974 && GET_CODE (p) != CODE_LABEL;
7975 p = prev_nonnote_insn (p))
7976 if ((set = single_set (p)) != 0
7977 && GET_CODE (SET_DEST (set)) == REG
7978 && GET_MODE (SET_DEST (set)) == src_elt->mode
7979 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
7981 /* We now have to ensure that nothing between P
7982 and LOOP_START modified anything referenced in
7983 SET_SRC (x). We know that nothing within the loop
7984 can modify it, or we would have invalidated it in
7988 cse_check_loop_start_value = SET_SRC (x);
7989 for (q = p; q != loop_start; q = NEXT_INSN (q))
7990 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
7991 note_stores (PATTERN (q), cse_check_loop_start);
7993 /* If nothing was changed and we can replace our
7994 SET_SRC, add an insn after P to copy its destination
7995 to what we will be replacing SET_SRC with. */
7996 if (cse_check_loop_start_value
7997 && validate_change (insn, &SET_SRC (x),
7999 emit_insn_after (gen_move_insn (src_elt->exp,
8007 /* Now invalidate anything modified by X. */
8008 note_mem_written (SET_DEST (x), &writes_memory);
8010 if (writes_memory.var)
8011 invalidate_memory (&writes_memory);
8013 /* See comment on similar code in cse_insn for explanation of these
8015 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8016 || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all
8017 && ! cse_rtx_addr_varies_p (SET_DEST (x))))
8018 invalidate (SET_DEST (x), VOIDmode);
8019 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8020 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8021 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8024 /* Find the end of INSN's basic block and return its range,
8025 the total number of SETs in all the insns of the block, the last insn of the
8026 block, and the branch path.
8028 The branch path indicates which branches should be followed. If a non-zero
8029 path size is specified, the block should be rescanned and a different set
8030 of branches will be taken. The branch path is only used if
8031 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8033 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8034 used to describe the block. It is filled in with the information about
8035 the current block. The incoming structure's branch path, if any, is used
8036 to construct the output branch path. */
8039 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8041 struct cse_basic_block_data *data;
8048 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8049 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8050 int path_size = data->path_size;
8054 /* Update the previous branch path, if any. If the last branch was
8055 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8056 shorten the path by one and look at the previous branch. We know that
8057 at least one branch must have been taken if PATH_SIZE is non-zero. */
8058 while (path_size > 0)
8060 if (data->path[path_size - 1].status != NOT_TAKEN)
8062 data->path[path_size - 1].status = NOT_TAKEN;
8069 /* Scan to end of this basic block. */
8070 while (p && GET_CODE (p) != CODE_LABEL)
8072 /* Don't cse out the end of a loop. This makes a difference
8073 only for the unusual loops that always execute at least once;
8074 all other loops have labels there so we will stop in any case.
8075 Cse'ing out the end of the loop is dangerous because it
8076 might cause an invariant expression inside the loop
8077 to be reused after the end of the loop. This would make it
8078 hard to move the expression out of the loop in loop.c,
8079 especially if it is one of several equivalent expressions
8080 and loop.c would like to eliminate it.
8082 If we are running after loop.c has finished, we can ignore
8083 the NOTE_INSN_LOOP_END. */
8085 if (! after_loop && GET_CODE (p) == NOTE
8086 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8089 /* Don't cse over a call to setjmp; on some machines (eg vax)
8090 the regs restored by the longjmp come from
8091 a later time than the setjmp. */
8092 if (GET_CODE (p) == NOTE
8093 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8096 /* A PARALLEL can have lots of SETs in it,
8097 especially if it is really an ASM_OPERANDS. */
8098 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8099 && GET_CODE (PATTERN (p)) == PARALLEL)
8100 nsets += XVECLEN (PATTERN (p), 0);
8101 else if (GET_CODE (p) != NOTE)
8104 /* Ignore insns made by CSE; they cannot affect the boundaries of
8107 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8108 high_cuid = INSN_CUID (p);
8109 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8110 low_cuid = INSN_CUID (p);
8112 /* See if this insn is in our branch path. If it is and we are to
8114 if (path_entry < path_size && data->path[path_entry].branch == p)
8116 if (data->path[path_entry].status != NOT_TAKEN)
8119 /* Point to next entry in path, if any. */
8123 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8124 was specified, we haven't reached our maximum path length, there are
8125 insns following the target of the jump, this is the only use of the
8126 jump label, and the target label is preceded by a BARRIER.
8128 Alternatively, we can follow the jump if it branches around a
8129 block of code and there are no other branches into the block.
8130 In this case invalidate_skipped_block will be called to invalidate any
8131 registers set in the block when following the jump. */
8133 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8134 && GET_CODE (p) == JUMP_INSN
8135 && GET_CODE (PATTERN (p)) == SET
8136 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8137 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8138 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8140 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8141 if ((GET_CODE (q) != NOTE
8142 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8143 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8144 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8147 /* If we ran into a BARRIER, this code is an extension of the
8148 basic block when the branch is taken. */
8149 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8151 /* Don't allow ourself to keep walking around an
8152 always-executed loop. */
8153 if (next_real_insn (q) == next)
8159 /* Similarly, don't put a branch in our path more than once. */
8160 for (i = 0; i < path_entry; i++)
8161 if (data->path[i].branch == p)
8164 if (i != path_entry)
8167 data->path[path_entry].branch = p;
8168 data->path[path_entry++].status = TAKEN;
8170 /* This branch now ends our path. It was possible that we
8171 didn't see this branch the last time around (when the
8172 insn in front of the target was a JUMP_INSN that was
8173 turned into a no-op). */
8174 path_size = path_entry;
8177 /* Mark block so we won't scan it again later. */
8178 PUT_MODE (NEXT_INSN (p), QImode);
8180 /* Detect a branch around a block of code. */
8181 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8185 if (next_real_insn (q) == next)
8191 for (i = 0; i < path_entry; i++)
8192 if (data->path[i].branch == p)
8195 if (i != path_entry)
8198 /* This is no_labels_between_p (p, q) with an added check for
8199 reaching the end of a function (in case Q precedes P). */
8200 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8201 if (GET_CODE (tmp) == CODE_LABEL)
8206 data->path[path_entry].branch = p;
8207 data->path[path_entry++].status = AROUND;
8209 path_size = path_entry;
8212 /* Mark block so we won't scan it again later. */
8213 PUT_MODE (NEXT_INSN (p), QImode);
8220 data->low_cuid = low_cuid;
8221 data->high_cuid = high_cuid;
8222 data->nsets = nsets;
8225 /* If all jumps in the path are not taken, set our path length to zero
8226 so a rescan won't be done. */
8227 for (i = path_size - 1; i >= 0; i--)
8228 if (data->path[i].status != NOT_TAKEN)
8232 data->path_size = 0;
8234 data->path_size = path_size;
8236 /* End the current branch path. */
8237 data->path[path_size].branch = 0;
8240 /* Perform cse on the instructions of a function.
8241 F is the first instruction.
8242 NREGS is one plus the highest pseudo-reg number used in the instruction.
8244 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8245 (only if -frerun-cse-after-loop).
8247 Returns 1 if jump_optimize should be redone due to simplifications
8248 in conditional jump instructions. */
8251 cse_main (f, nregs, after_loop, file)
8257 struct cse_basic_block_data val;
8258 register rtx insn = f;
8261 cse_jumps_altered = 0;
8262 recorded_label_ref = 0;
8263 constant_pool_entries_cost = 0;
8270 all_minus_one = (int *) alloca (nregs * sizeof (int));
8271 consec_ints = (int *) alloca (nregs * sizeof (int));
8273 for (i = 0; i < nregs; i++)
8275 all_minus_one[i] = -1;
8279 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8280 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8281 reg_qty = (int *) alloca (nregs * sizeof (int));
8282 reg_in_table = (int *) alloca (nregs * sizeof (int));
8283 reg_tick = (int *) alloca (nregs * sizeof (int));
8285 #ifdef LOAD_EXTEND_OP
8287 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8288 and change the code and mode as appropriate. */
8289 memory_extend_rtx = gen_rtx (ZERO_EXTEND, VOIDmode, 0);
8292 /* Discard all the free elements of the previous function
8293 since they are allocated in the temporarily obstack. */
8294 bzero ((char *) table, sizeof table);
8295 free_element_chain = 0;
8296 n_elements_made = 0;
8298 /* Find the largest uid. */
8300 max_uid = get_max_uid ();
8301 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8302 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8304 /* Compute the mapping from uids to cuids.
8305 CUIDs are numbers assigned to insns, like uids,
8306 except that cuids increase monotonically through the code.
8307 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8308 between two insns is not affected by -g. */
8310 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8312 if (GET_CODE (insn) != NOTE
8313 || NOTE_LINE_NUMBER (insn) < 0)
8314 INSN_CUID (insn) = ++i;
8316 /* Give a line number note the same cuid as preceding insn. */
8317 INSN_CUID (insn) = i;
8320 /* Initialize which registers are clobbered by calls. */
8322 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8324 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8325 if ((call_used_regs[i]
8326 /* Used to check !fixed_regs[i] here, but that isn't safe;
8327 fixed regs are still call-clobbered, and sched can get
8328 confused if they can "live across calls".
8330 The frame pointer is always preserved across calls. The arg
8331 pointer is if it is fixed. The stack pointer usually is, unless
8332 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8333 will be present. If we are generating PIC code, the PIC offset
8334 table register is preserved across calls. */
8336 && i != STACK_POINTER_REGNUM
8337 && i != FRAME_POINTER_REGNUM
8338 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8339 && i != HARD_FRAME_POINTER_REGNUM
8341 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8342 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8344 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8345 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8349 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8351 /* Loop over basic blocks.
8352 Compute the maximum number of qty's needed for each basic block
8353 (which is 2 for each SET). */
8357 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8358 flag_cse_skip_blocks);
8360 /* If this basic block was already processed or has no sets, skip it. */
8361 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8363 PUT_MODE (insn, VOIDmode);
8364 insn = (val.last ? NEXT_INSN (val.last) : 0);
8369 cse_basic_block_start = val.low_cuid;
8370 cse_basic_block_end = val.high_cuid;
8371 max_qty = val.nsets * 2;
8374 fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
8375 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8378 /* Make MAX_QTY bigger to give us room to optimize
8379 past the end of this basic block, if that should prove useful. */
8385 /* If this basic block is being extended by following certain jumps,
8386 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8387 Otherwise, we start after this basic block. */
8388 if (val.path_size > 0)
8389 cse_basic_block (insn, val.last, val.path, 0);
8392 int old_cse_jumps_altered = cse_jumps_altered;
8395 /* When cse changes a conditional jump to an unconditional
8396 jump, we want to reprocess the block, since it will give
8397 us a new branch path to investigate. */
8398 cse_jumps_altered = 0;
8399 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8400 if (cse_jumps_altered == 0
8401 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8404 cse_jumps_altered |= old_cse_jumps_altered;
8412 /* Tell refers_to_mem_p that qty_const info is not available. */
8415 if (max_elements_made < n_elements_made)
8416 max_elements_made = n_elements_made;
8418 return cse_jumps_altered || recorded_label_ref;
8421 /* Process a single basic block. FROM and TO and the limits of the basic
8422 block. NEXT_BRANCH points to the branch path when following jumps or
8423 a null path when not following jumps.
8425 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8426 loop. This is true when we are being called for the last time on a
8427 block and this CSE pass is before loop.c. */
8430 cse_basic_block (from, to, next_branch, around_loop)
8431 register rtx from, to;
8432 struct branch_path *next_branch;
8437 int in_libcall_block = 0;
8439 /* Each of these arrays is undefined before max_reg, so only allocate
8440 the space actually needed and adjust the start below. */
8442 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8443 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8444 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8445 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8446 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8448 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8449 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8450 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8452 qty_first_reg -= max_reg;
8453 qty_last_reg -= max_reg;
8454 qty_mode -= max_reg;
8455 qty_const -= max_reg;
8456 qty_const_insn -= max_reg;
8457 qty_comparison_code -= max_reg;
8458 qty_comparison_qty -= max_reg;
8459 qty_comparison_const -= max_reg;
8463 /* TO might be a label. If so, protect it from being deleted. */
8464 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8467 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8469 register enum rtx_code code;
8471 /* See if this is a branch that is part of the path. If so, and it is
8472 to be taken, do so. */
8473 if (next_branch->branch == insn)
8475 enum taken status = next_branch++->status;
8476 if (status != NOT_TAKEN)
8478 if (status == TAKEN)
8479 record_jump_equiv (insn, 1);
8481 invalidate_skipped_block (NEXT_INSN (insn));
8483 /* Set the last insn as the jump insn; it doesn't affect cc0.
8484 Then follow this branch. */
8489 insn = JUMP_LABEL (insn);
8494 code = GET_CODE (insn);
8495 if (GET_MODE (insn) == QImode)
8496 PUT_MODE (insn, VOIDmode);
8498 if (GET_RTX_CLASS (code) == 'i')
8500 /* Process notes first so we have all notes in canonical forms when
8501 looking for duplicate operations. */
8503 if (REG_NOTES (insn))
8504 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8506 /* Track when we are inside in LIBCALL block. Inside such a block,
8507 we do not want to record destinations. The last insn of a
8508 LIBCALL block is not considered to be part of the block, since
8509 its destination is the result of the block and hence should be
8512 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
8513 in_libcall_block = 1;
8514 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8515 in_libcall_block = 0;
8517 cse_insn (insn, in_libcall_block);
8520 /* If INSN is now an unconditional jump, skip to the end of our
8521 basic block by pretending that we just did the last insn in the
8522 basic block. If we are jumping to the end of our block, show
8523 that we can have one usage of TO. */
8525 if (simplejump_p (insn))
8530 if (JUMP_LABEL (insn) == to)
8533 /* Maybe TO was deleted because the jump is unconditional.
8534 If so, there is nothing left in this basic block. */
8535 /* ??? Perhaps it would be smarter to set TO
8536 to whatever follows this insn,
8537 and pretend the basic block had always ended here. */
8538 if (INSN_DELETED_P (to))
8541 insn = PREV_INSN (to);
8544 /* See if it is ok to keep on going past the label
8545 which used to end our basic block. Remember that we incremented
8546 the count of that label, so we decrement it here. If we made
8547 a jump unconditional, TO_USAGE will be one; in that case, we don't
8548 want to count the use in that jump. */
8550 if (to != 0 && NEXT_INSN (insn) == to
8551 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8553 struct cse_basic_block_data val;
8556 insn = NEXT_INSN (to);
8558 if (LABEL_NUSES (to) == 0)
8559 insn = delete_insn (to);
8561 /* If TO was the last insn in the function, we are done. */
8565 /* If TO was preceded by a BARRIER we are done with this block
8566 because it has no continuation. */
8567 prev = prev_nonnote_insn (to);
8568 if (prev && GET_CODE (prev) == BARRIER)
8571 /* Find the end of the following block. Note that we won't be
8572 following branches in this case. */
8575 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8577 /* If the tables we allocated have enough space left
8578 to handle all the SETs in the next basic block,
8579 continue through it. Otherwise, return,
8580 and that block will be scanned individually. */
8581 if (val.nsets * 2 + next_qty > max_qty)
8584 cse_basic_block_start = val.low_cuid;
8585 cse_basic_block_end = val.high_cuid;
8588 /* Prevent TO from being deleted if it is a label. */
8589 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8592 /* Back up so we process the first insn in the extension. */
8593 insn = PREV_INSN (insn);
8597 if (next_qty > max_qty)
8600 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8601 the previous insn is the only insn that branches to the head of a loop,
8602 we can cse into the loop. Don't do this if we changed the jump
8603 structure of a loop unless we aren't going to be following jumps. */
8605 if ((cse_jumps_altered == 0
8606 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8607 && around_loop && to != 0
8608 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8609 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8610 && JUMP_LABEL (PREV_INSN (to)) != 0
8611 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8612 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8614 return to ? NEXT_INSN (to) : 0;
8617 /* Count the number of times registers are used (not set) in X.
8618 COUNTS is an array in which we accumulate the count, INCR is how much
8619 we count each register usage.
8621 Don't count a usage of DEST, which is the SET_DEST of a SET which
8622 contains X in its SET_SRC. This is because such a SET does not
8623 modify the liveness of DEST. */
8626 count_reg_usage (x, counts, dest, incr)
8639 switch (code = GET_CODE (x))
8643 counts[REGNO (x)] += incr;
8657 /* Unless we are setting a REG, count everything in SET_DEST. */
8658 if (GET_CODE (SET_DEST (x)) != REG)
8659 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
8661 /* If SRC has side-effects, then we can't delete this insn, so the
8662 usage of SET_DEST inside SRC counts.
8664 ??? Strictly-speaking, we might be preserving this insn
8665 because some other SET has side-effects, but that's hard
8666 to do and can't happen now. */
8667 count_reg_usage (SET_SRC (x), counts,
8668 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
8673 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
8675 /* ... falls through ... */
8678 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
8680 /* Things used in a REG_EQUAL note aren't dead since loop may try to
8683 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
8688 if (REG_NOTE_KIND (x) == REG_EQUAL
8689 || GET_CODE (XEXP (x,0)) == USE)
8690 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
8691 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
8695 fmt = GET_RTX_FORMAT (code);
8696 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8699 count_reg_usage (XEXP (x, i), counts, dest, incr);
8700 else if (fmt[i] == 'E')
8701 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8702 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
8706 /* Scan all the insns and delete any that are dead; i.e., they store a register
8707 that is never used or they copy a register to itself.
8709 This is used to remove insns made obviously dead by cse. It improves the
8710 heuristics in loop since it won't try to move dead invariants out of loops
8711 or make givs for dead quantities. The remaining passes of the compilation
8712 are also sped up. */
8715 delete_dead_from_cse (insns, nreg)
8719 int *counts = (int *) alloca (nreg * sizeof (int));
8725 /* First count the number of times each register is used. */
8726 bzero ((char *) counts, sizeof (int) * nreg);
8727 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8728 count_reg_usage (insn, counts, NULL_RTX, 1);
8730 /* Go from the last insn to the first and delete insns that only set unused
8731 registers or copy a register to itself. As we delete an insn, remove
8732 usage counts for registers it uses. */
8733 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
8737 prev = prev_real_insn (insn);
8739 /* Don't delete any insns that are part of a libcall block.
8740 Flow or loop might get confused if we did that. Remember
8741 that we are scanning backwards. */
8742 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8747 else if (GET_CODE (PATTERN (insn)) == SET)
8749 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8750 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8754 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8755 && ! side_effects_p (SET_SRC (PATTERN (insn)))
8756 && ((tem = next_nonnote_insn (insn)) == 0
8757 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8758 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8761 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8762 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8763 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8764 || side_effects_p (SET_SRC (PATTERN (insn))))
8767 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8768 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8770 rtx elt = XVECEXP (PATTERN (insn), 0, i);
8772 if (GET_CODE (elt) == SET)
8774 if (GET_CODE (SET_DEST (elt)) == REG
8775 && SET_DEST (elt) == SET_SRC (elt))
8779 else if (GET_CODE (SET_DEST (elt)) == CC0
8780 && ! side_effects_p (SET_SRC (elt))
8781 && ((tem = next_nonnote_insn (insn)) == 0
8782 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8783 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8786 else if (GET_CODE (SET_DEST (elt)) != REG
8787 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8788 || counts[REGNO (SET_DEST (elt))] != 0
8789 || side_effects_p (SET_SRC (elt)))
8792 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8798 /* If this is a dead insn, delete it and show registers in it aren't
8803 count_reg_usage (insn, counts, NULL_RTX, -1);
8807 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))