1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
32 #include "insn-config.h"
36 #include "diagnostic-core.h"
44 #include "rtlhooks-def.h"
45 #include "tree-pass.h"
49 /* The basic idea of common subexpression elimination is to go
50 through the code, keeping a record of expressions that would
51 have the same value at the current scan point, and replacing
52 expressions encountered with the cheapest equivalent expression.
54 It is too complicated to keep track of the different possibilities
55 when control paths merge in this code; so, at each label, we forget all
56 that is known and start fresh. This can be described as processing each
57 extended basic block separately. We have a separate pass to perform
60 Note CSE can turn a conditional or computed jump into a nop or
61 an unconditional jump. When this occurs we arrange to run the jump
62 optimizer after CSE to delete the unreachable code.
64 We use two data structures to record the equivalent expressions:
65 a hash table for most expressions, and a vector of "quantity
66 numbers" to record equivalent (pseudo) registers.
68 The use of the special data structure for registers is desirable
69 because it is faster. It is possible because registers references
70 contain a fairly small number, the register number, taken from
71 a contiguously allocated series, and two register references are
72 identical if they have the same number. General expressions
73 do not have any such thing, so the only way to retrieve the
74 information recorded on an expression other than a register
75 is to keep it in a hash table.
77 Registers and "quantity numbers":
79 At the start of each basic block, all of the (hardware and pseudo)
80 registers used in the function are given distinct quantity
81 numbers to indicate their contents. During scan, when the code
82 copies one register into another, we copy the quantity number.
83 When a register is loaded in any other way, we allocate a new
84 quantity number to describe the value generated by this operation.
85 `REG_QTY (N)' records what quantity register N is currently thought
88 All real quantity numbers are greater than or equal to zero.
89 If register N has not been assigned a quantity, `REG_QTY (N)' will
90 equal -N - 1, which is always negative.
92 Quantity numbers below zero do not exist and none of the `qty_table'
93 entries should be referenced with a negative index.
95 We also maintain a bidirectional chain of registers for each
96 quantity number. The `qty_table` members `first_reg' and `last_reg',
97 and `reg_eqv_table' members `next' and `prev' hold these chains.
99 The first register in a chain is the one whose lifespan is least local.
100 Among equals, it is the one that was seen first.
101 We replace any equivalent register with that one.
103 If two registers have the same quantity number, it must be true that
104 REG expressions with qty_table `mode' must be in the hash table for both
105 registers and must be in the same class.
107 The converse is not true. Since hard registers may be referenced in
108 any mode, two REG expressions might be equivalent in the hash table
109 but not have the same quantity number if the quantity number of one
110 of the registers is not the same mode as those expressions.
112 Constants and quantity numbers
114 When a quantity has a known constant value, that value is stored
115 in the appropriate qty_table `const_rtx'. This is in addition to
116 putting the constant in the hash table as is usual for non-regs.
118 Whether a reg or a constant is preferred is determined by the configuration
119 macro CONST_COSTS and will often depend on the constant value. In any
120 event, expressions containing constants can be simplified, by fold_rtx.
122 When a quantity has a known nearly constant value (such as an address
123 of a stack slot), that value is stored in the appropriate qty_table
126 Integer constants don't have a machine mode. However, cse
127 determines the intended machine mode from the destination
128 of the instruction that moves the constant. The machine mode
129 is recorded in the hash table along with the actual RTL
130 constant expression so that different modes are kept separate.
134 To record known equivalences among expressions in general
135 we use a hash table called `table'. It has a fixed number of buckets
136 that contain chains of `struct table_elt' elements for expressions.
137 These chains connect the elements whose expressions have the same
140 Other chains through the same elements connect the elements which
141 currently have equivalent values.
143 Register references in an expression are canonicalized before hashing
144 the expression. This is done using `reg_qty' and qty_table `first_reg'.
145 The hash code of a register reference is computed using the quantity
146 number, not the register number.
148 When the value of an expression changes, it is necessary to remove from the
149 hash table not just that expression but all expressions whose values
150 could be different as a result.
152 1. If the value changing is in memory, except in special cases
153 ANYTHING referring to memory could be changed. That is because
154 nobody knows where a pointer does not point.
155 The function `invalidate_memory' removes what is necessary.
157 The special cases are when the address is constant or is
158 a constant plus a fixed register such as the frame pointer
159 or a static chain pointer. When such addresses are stored in,
160 we can tell exactly which other such addresses must be invalidated
161 due to overlap. `invalidate' does this.
162 All expressions that refer to non-constant
163 memory addresses are also invalidated. `invalidate_memory' does this.
165 2. If the value changing is a register, all expressions
166 containing references to that register, and only those,
169 Because searching the entire hash table for expressions that contain
170 a register is very slow, we try to figure out when it isn't necessary.
171 Precisely, this is necessary only when expressions have been
172 entered in the hash table using this register, and then the value has
173 changed, and then another expression wants to be added to refer to
174 the register's new value. This sequence of circumstances is rare
175 within any one basic block.
177 `REG_TICK' and `REG_IN_TABLE', accessors for members of
178 cse_reg_info, are used to detect this case. REG_TICK (i) is
179 incremented whenever a value is stored in register i.
180 REG_IN_TABLE (i) holds -1 if no references to register i have been
181 entered in the table; otherwise, it contains the value REG_TICK (i)
182 had when the references were entered. If we want to enter a
183 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
184 remove old references. Until we want to enter a new entry, the
185 mere fact that the two vectors don't match makes the entries be
186 ignored if anyone tries to match them.
188 Registers themselves are entered in the hash table as well as in
189 the equivalent-register chains. However, `REG_TICK' and
190 `REG_IN_TABLE' do not apply to expressions which are simple
191 register references. These expressions are removed from the table
192 immediately when they become invalid, and this can be done even if
193 we do not immediately search for all the expressions that refer to
196 A CLOBBER rtx in an instruction invalidates its operand for further
197 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
198 invalidates everything that resides in memory.
202 Constant expressions that differ only by an additive integer
203 are called related. When a constant expression is put in
204 the table, the related expression with no constant term
205 is also entered. These are made to point at each other
206 so that it is possible to find out if there exists any
207 register equivalent to an expression related to a given expression. */
209 /* Length of qty_table vector. We know in advance we will not need
210 a quantity number this big. */
214 /* Next quantity number to be allocated.
215 This is 1 + the largest number needed so far. */
219 /* Per-qty information tracking.
221 `first_reg' and `last_reg' track the head and tail of the
222 chain of registers which currently contain this quantity.
224 `mode' contains the machine mode of this quantity.
226 `const_rtx' holds the rtx of the constant value of this
227 quantity, if known. A summations of the frame/arg pointer
228 and a constant can also be entered here. When this holds
229 a known value, `const_insn' is the insn which stored the
232 `comparison_{code,const,qty}' are used to track when a
233 comparison between a quantity and some constant or register has
234 been passed. In such a case, we know the results of the comparison
235 in case we see it again. These members record a comparison that
236 is known to be true. `comparison_code' holds the rtx code of such
237 a comparison, else it is set to UNKNOWN and the other two
238 comparison members are undefined. `comparison_const' holds
239 the constant being compared against, or zero if the comparison
240 is not against a constant. `comparison_qty' holds the quantity
241 being compared against when the result is known. If the comparison
242 is not with a register, `comparison_qty' is -1. */
244 struct qty_table_elem
248 rtx comparison_const;
250 unsigned int first_reg, last_reg;
251 /* The sizes of these fields should match the sizes of the
252 code and mode fields of struct rtx_def (see rtl.h). */
253 ENUM_BITFIELD(rtx_code) comparison_code : 16;
254 ENUM_BITFIELD(machine_mode) mode : 8;
257 /* The table of all qtys, indexed by qty number. */
258 static struct qty_table_elem *qty_table;
260 /* Structure used to pass arguments via for_each_rtx to function
261 cse_change_cc_mode. */
262 struct change_cc_mode_args
269 /* For machines that have a CC0, we do not record its value in the hash
270 table since its use is guaranteed to be the insn immediately following
271 its definition and any other insn is presumed to invalidate it.
273 Instead, we store below the current and last value assigned to CC0.
274 If it should happen to be a constant, it is stored in preference
275 to the actual assigned value. In case it is a constant, we store
276 the mode in which the constant should be interpreted. */
278 static rtx this_insn_cc0, prev_insn_cc0;
279 static enum machine_mode this_insn_cc0_mode, prev_insn_cc0_mode;
282 /* Insn being scanned. */
284 static rtx this_insn;
285 static bool optimize_this_for_speed_p;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
291 Or -1 if this register is at the end of the chain.
293 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
306 /* The timestamp at which this register is initialized. */
307 unsigned int timestamp;
309 /* The quantity number of the register's current contents. */
312 /* The number of times the register has been altered in the current
316 /* The REG_TICK value at which rtx's containing this register are
317 valid in the hash table. If this does not equal the current
318 reg_tick value, such expressions existing in the hash table are
322 /* The SUBREG that was set when REG_TICK was last incremented. Set
323 to -1 if the last store was to the whole register, not a subreg. */
324 unsigned int subreg_ticked;
327 /* A table of cse_reg_info indexed by register numbers. */
328 static struct cse_reg_info *cse_reg_info_table;
330 /* The size of the above table. */
331 static unsigned int cse_reg_info_table_size;
333 /* The index of the first entry that has not been initialized. */
334 static unsigned int cse_reg_info_table_first_uninitialized;
336 /* The timestamp at the beginning of the current run of
337 cse_extended_basic_block. We increment this variable at the beginning of
338 the current run of cse_extended_basic_block. The timestamp field of a
339 cse_reg_info entry matches the value of this variable if and only
340 if the entry has been initialized during the current run of
341 cse_extended_basic_block. */
342 static unsigned int cse_reg_info_timestamp;
344 /* A HARD_REG_SET containing all the hard registers for which there is
345 currently a REG expression in the hash table. Note the difference
346 from the above variables, which indicate if the REG is mentioned in some
347 expression in the table. */
349 static HARD_REG_SET hard_regs_in_table;
351 /* True if CSE has altered the CFG. */
352 static bool cse_cfg_altered;
354 /* True if CSE has altered conditional jump insns in such a way
355 that jump optimization should be redone. */
356 static bool cse_jumps_altered;
358 /* True if we put a LABEL_REF into the hash table for an INSN
359 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
360 to put in the note. */
361 static bool recorded_label_ref;
363 /* canon_hash stores 1 in do_not_record
364 if it notices a reference to CC0, PC, or some other volatile
367 static int do_not_record;
369 /* canon_hash stores 1 in hash_arg_in_memory
370 if it notices a reference to memory within the expression being hashed. */
372 static int hash_arg_in_memory;
374 /* The hash table contains buckets which are chains of `struct table_elt's,
375 each recording one expression's information.
376 That expression is in the `exp' field.
378 The canon_exp field contains a canonical (from the point of view of
379 alias analysis) version of the `exp' field.
381 Those elements with the same hash code are chained in both directions
382 through the `next_same_hash' and `prev_same_hash' fields.
384 Each set of expressions with equivalent values
385 are on a two-way chain through the `next_same_value'
386 and `prev_same_value' fields, and all point with
387 the `first_same_value' field at the first element in
388 that chain. The chain is in order of increasing cost.
389 Each element's cost value is in its `cost' field.
391 The `in_memory' field is nonzero for elements that
392 involve any reference to memory. These elements are removed
393 whenever a write is done to an unidentified location in memory.
394 To be safe, we assume that a memory address is unidentified unless
395 the address is either a symbol constant or a constant plus
396 the frame pointer or argument pointer.
398 The `related_value' field is used to connect related expressions
399 (that differ by adding an integer).
400 The related expressions are chained in a circular fashion.
401 `related_value' is zero for expressions for which this
404 The `cost' field stores the cost of this element's expression.
405 The `regcost' field stores the value returned by approx_reg_cost for
406 this element's expression.
408 The `is_const' flag is set if the element is a constant (including
411 The `flag' field is used as a temporary during some search routines.
413 The `mode' field is usually the same as GET_MODE (`exp'), but
414 if `exp' is a CONST_INT and has no machine mode then the `mode'
415 field is the mode it was being used as. Each constant is
416 recorded separately for each mode it is used with. */
422 struct table_elt *next_same_hash;
423 struct table_elt *prev_same_hash;
424 struct table_elt *next_same_value;
425 struct table_elt *prev_same_value;
426 struct table_elt *first_same_value;
427 struct table_elt *related_value;
430 /* The size of this field should match the size
431 of the mode field of struct rtx_def (see rtl.h). */
432 ENUM_BITFIELD(machine_mode) mode : 8;
438 /* We don't want a lot of buckets, because we rarely have very many
439 things stored in the hash table, and a lot of buckets slows
440 down a lot of loops that happen frequently. */
442 #define HASH_SIZE (1 << HASH_SHIFT)
443 #define HASH_MASK (HASH_SIZE - 1)
445 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
446 register (hard registers may require `do_not_record' to be set). */
449 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
450 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
451 : canon_hash (X, M)) & HASH_MASK)
453 /* Like HASH, but without side-effects. */
454 #define SAFE_HASH(X, M) \
455 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
456 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
457 : safe_hash (X, M)) & HASH_MASK)
459 /* Determine whether register number N is considered a fixed register for the
460 purpose of approximating register costs.
461 It is desirable to replace other regs with fixed regs, to reduce need for
463 A reg wins if it is either the frame pointer or designated as fixed. */
464 #define FIXED_REGNO_P(N) \
465 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
466 || fixed_regs[N] || global_regs[N])
468 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
469 hard registers and pointers into the frame are the cheapest with a cost
470 of 0. Next come pseudos with a cost of one and other hard registers with
471 a cost of 2. Aside from these special cases, call `rtx_cost'. */
473 #define CHEAP_REGNO(N) \
474 (REGNO_PTR_FRAME_P(N) \
475 || (HARD_REGISTER_NUM_P (N) \
476 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
478 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
479 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
481 /* Get the number of times this register has been updated in this
484 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
486 /* Get the point at which REG was recorded in the table. */
488 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
490 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
493 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
495 /* Get the quantity number for REG. */
497 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
499 /* Determine if the quantity number for register X represents a valid index
500 into the qty_table. */
502 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
504 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
506 #define CHEAPER(X, Y) \
507 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
509 static struct table_elt *table[HASH_SIZE];
511 /* Chain of `struct table_elt's made so far for this function
512 but currently removed from the table. */
514 static struct table_elt *free_element_chain;
516 /* Set to the cost of a constant pool reference if one was found for a
517 symbolic constant. If this was found, it means we should try to
518 convert constants into constant pool entries if they don't fit in
521 static int constant_pool_entries_cost;
522 static int constant_pool_entries_regcost;
524 /* Trace a patch through the CFG. */
528 /* The basic block for this path entry. */
532 /* This data describes a block that will be processed by
533 cse_extended_basic_block. */
535 struct cse_basic_block_data
537 /* Total number of SETs in block. */
539 /* Size of current branch path, if any. */
541 /* Current path, indicating which basic_blocks will be processed. */
542 struct branch_path *path;
546 /* Pointers to the live in/live out bitmaps for the boundaries of the
548 static bitmap cse_ebb_live_in, cse_ebb_live_out;
550 /* A simple bitmap to track which basic blocks have been visited
551 already as part of an already processed extended basic block. */
552 static sbitmap cse_visited_basic_blocks;
554 static bool fixed_base_plus_p (rtx x);
555 static int notreg_cost (rtx, enum rtx_code);
556 static int approx_reg_cost_1 (rtx *, void *);
557 static int approx_reg_cost (rtx);
558 static int preferable (int, int, int, int);
559 static void new_basic_block (void);
560 static void make_new_qty (unsigned int, enum machine_mode);
561 static void make_regs_eqv (unsigned int, unsigned int);
562 static void delete_reg_equiv (unsigned int);
563 static int mention_regs (rtx);
564 static int insert_regs (rtx, struct table_elt *, int);
565 static void remove_from_table (struct table_elt *, unsigned);
566 static void remove_pseudo_from_table (rtx, unsigned);
567 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
568 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
569 static rtx lookup_as_function (rtx, enum rtx_code);
570 static struct table_elt *insert_with_costs (rtx, struct table_elt *, unsigned,
571 enum machine_mode, int, int);
572 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
574 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
575 static void invalidate (rtx, enum machine_mode);
576 static bool cse_rtx_varies_p (const_rtx, bool);
577 static void remove_invalid_refs (unsigned int);
578 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
580 static void rehash_using_reg (rtx);
581 static void invalidate_memory (void);
582 static void invalidate_for_call (void);
583 static rtx use_related_value (rtx, struct table_elt *);
585 static inline unsigned canon_hash (rtx, enum machine_mode);
586 static inline unsigned safe_hash (rtx, enum machine_mode);
587 static inline unsigned hash_rtx_string (const char *);
589 static rtx canon_reg (rtx, rtx);
590 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
592 enum machine_mode *);
593 static rtx fold_rtx (rtx, rtx);
594 static rtx equiv_constant (rtx);
595 static void record_jump_equiv (rtx, bool);
596 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
598 static void cse_insn (rtx);
599 static void cse_prescan_path (struct cse_basic_block_data *);
600 static void invalidate_from_clobbers (rtx);
601 static rtx cse_process_notes (rtx, rtx, bool *);
602 static void cse_extended_basic_block (struct cse_basic_block_data *);
603 static void count_reg_usage (rtx, int *, rtx, int);
604 static int check_for_label_ref (rtx *, void *);
605 extern void dump_class (struct table_elt*);
606 static void get_cse_reg_info_1 (unsigned int regno);
607 static struct cse_reg_info * get_cse_reg_info (unsigned int regno);
608 static int check_dependence (rtx *, void *);
610 static void flush_hash_table (void);
611 static bool insn_live_p (rtx, int *);
612 static bool set_live_p (rtx, rtx, int *);
613 static int cse_change_cc_mode (rtx *, void *);
614 static void cse_change_cc_mode_insn (rtx, rtx);
615 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
616 static enum machine_mode cse_cc_succs (basic_block, basic_block, rtx, rtx,
620 #undef RTL_HOOKS_GEN_LOWPART
621 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
623 static const struct rtl_hooks cse_rtl_hooks = RTL_HOOKS_INITIALIZER;
625 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
626 virtual regs here because the simplify_*_operation routines are called
627 by integrate.c, which is called before virtual register instantiation. */
630 fixed_base_plus_p (rtx x)
632 switch (GET_CODE (x))
635 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
637 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
639 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
640 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
645 if (!CONST_INT_P (XEXP (x, 1)))
647 return fixed_base_plus_p (XEXP (x, 0));
654 /* Dump the expressions in the equivalence class indicated by CLASSP.
655 This function is used only for debugging. */
657 dump_class (struct table_elt *classp)
659 struct table_elt *elt;
661 fprintf (stderr, "Equivalence chain for ");
662 print_rtl (stderr, classp->exp);
663 fprintf (stderr, ": \n");
665 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
667 print_rtl (stderr, elt->exp);
668 fprintf (stderr, "\n");
672 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
675 approx_reg_cost_1 (rtx *xp, void *data)
678 int *cost_p = (int *) data;
682 unsigned int regno = REGNO (x);
684 if (! CHEAP_REGNO (regno))
686 if (regno < FIRST_PSEUDO_REGISTER)
688 if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
700 /* Return an estimate of the cost of the registers used in an rtx.
701 This is mostly the number of different REG expressions in the rtx;
702 however for some exceptions like fixed registers we use a cost of
703 0. If any other hard register reference occurs, return MAX_COST. */
706 approx_reg_cost (rtx x)
710 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
716 /* Return a negative value if an rtx A, whose costs are given by COST_A
717 and REGCOST_A, is more desirable than an rtx B.
718 Return a positive value if A is less desirable, or 0 if the two are
721 preferable (int cost_a, int regcost_a, int cost_b, int regcost_b)
723 /* First, get rid of cases involving expressions that are entirely
725 if (cost_a != cost_b)
727 if (cost_a == MAX_COST)
729 if (cost_b == MAX_COST)
733 /* Avoid extending lifetimes of hardregs. */
734 if (regcost_a != regcost_b)
736 if (regcost_a == MAX_COST)
738 if (regcost_b == MAX_COST)
742 /* Normal operation costs take precedence. */
743 if (cost_a != cost_b)
744 return cost_a - cost_b;
745 /* Only if these are identical consider effects on register pressure. */
746 if (regcost_a != regcost_b)
747 return regcost_a - regcost_b;
751 /* Internal function, to compute cost when X is not a register; called
752 from COST macro to keep it simple. */
755 notreg_cost (rtx x, enum rtx_code outer)
757 return ((GET_CODE (x) == SUBREG
758 && REG_P (SUBREG_REG (x))
759 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
760 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
761 && (GET_MODE_SIZE (GET_MODE (x))
762 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
763 && subreg_lowpart_p (x)
764 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
765 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
767 : rtx_cost (x, outer, optimize_this_for_speed_p) * 2);
771 /* Initialize CSE_REG_INFO_TABLE. */
774 init_cse_reg_info (unsigned int nregs)
776 /* Do we need to grow the table? */
777 if (nregs > cse_reg_info_table_size)
779 unsigned int new_size;
781 if (cse_reg_info_table_size < 2048)
783 /* Compute a new size that is a power of 2 and no smaller
784 than the large of NREGS and 64. */
785 new_size = (cse_reg_info_table_size
786 ? cse_reg_info_table_size : 64);
788 while (new_size < nregs)
793 /* If we need a big table, allocate just enough to hold
798 /* Reallocate the table with NEW_SIZE entries. */
799 if (cse_reg_info_table)
800 free (cse_reg_info_table);
801 cse_reg_info_table = XNEWVEC (struct cse_reg_info, new_size);
802 cse_reg_info_table_size = new_size;
803 cse_reg_info_table_first_uninitialized = 0;
806 /* Do we have all of the first NREGS entries initialized? */
807 if (cse_reg_info_table_first_uninitialized < nregs)
809 unsigned int old_timestamp = cse_reg_info_timestamp - 1;
812 /* Put the old timestamp on newly allocated entries so that they
813 will all be considered out of date. We do not touch those
814 entries beyond the first NREGS entries to be nice to the
816 for (i = cse_reg_info_table_first_uninitialized; i < nregs; i++)
817 cse_reg_info_table[i].timestamp = old_timestamp;
819 cse_reg_info_table_first_uninitialized = nregs;
823 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
826 get_cse_reg_info_1 (unsigned int regno)
828 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
829 entry will be considered to have been initialized. */
830 cse_reg_info_table[regno].timestamp = cse_reg_info_timestamp;
832 /* Initialize the rest of the entry. */
833 cse_reg_info_table[regno].reg_tick = 1;
834 cse_reg_info_table[regno].reg_in_table = -1;
835 cse_reg_info_table[regno].subreg_ticked = -1;
836 cse_reg_info_table[regno].reg_qty = -regno - 1;
839 /* Find a cse_reg_info entry for REGNO. */
841 static inline struct cse_reg_info *
842 get_cse_reg_info (unsigned int regno)
844 struct cse_reg_info *p = &cse_reg_info_table[regno];
846 /* If this entry has not been initialized, go ahead and initialize
848 if (p->timestamp != cse_reg_info_timestamp)
849 get_cse_reg_info_1 (regno);
854 /* Clear the hash table and initialize each register with its own quantity,
855 for a new basic block. */
858 new_basic_block (void)
864 /* Invalidate cse_reg_info_table. */
865 cse_reg_info_timestamp++;
867 /* Clear out hash table state for this pass. */
868 CLEAR_HARD_REG_SET (hard_regs_in_table);
870 /* The per-quantity values used to be initialized here, but it is
871 much faster to initialize each as it is made in `make_new_qty'. */
873 for (i = 0; i < HASH_SIZE; i++)
875 struct table_elt *first;
880 struct table_elt *last = first;
884 while (last->next_same_hash != NULL)
885 last = last->next_same_hash;
887 /* Now relink this hash entire chain into
888 the free element list. */
890 last->next_same_hash = free_element_chain;
891 free_element_chain = first;
900 /* Say that register REG contains a quantity in mode MODE not in any
901 register before and initialize that quantity. */
904 make_new_qty (unsigned int reg, enum machine_mode mode)
907 struct qty_table_elem *ent;
908 struct reg_eqv_elem *eqv;
910 gcc_assert (next_qty < max_qty);
912 q = REG_QTY (reg) = next_qty++;
914 ent->first_reg = reg;
917 ent->const_rtx = ent->const_insn = NULL_RTX;
918 ent->comparison_code = UNKNOWN;
920 eqv = ®_eqv_table[reg];
921 eqv->next = eqv->prev = -1;
924 /* Make reg NEW equivalent to reg OLD.
925 OLD is not changing; NEW is. */
928 make_regs_eqv (unsigned int new_reg, unsigned int old_reg)
930 unsigned int lastr, firstr;
931 int q = REG_QTY (old_reg);
932 struct qty_table_elem *ent;
936 /* Nothing should become eqv until it has a "non-invalid" qty number. */
937 gcc_assert (REGNO_QTY_VALID_P (old_reg));
939 REG_QTY (new_reg) = q;
940 firstr = ent->first_reg;
941 lastr = ent->last_reg;
943 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
944 hard regs. Among pseudos, if NEW will live longer than any other reg
945 of the same qty, and that is beyond the current basic block,
946 make it the new canonical replacement for this qty. */
947 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
948 /* Certain fixed registers might be of the class NO_REGS. This means
949 that not only can they not be allocated by the compiler, but
950 they cannot be used in substitutions or canonicalizations
952 && (new_reg >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new_reg) != NO_REGS)
953 && ((new_reg < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new_reg))
954 || (new_reg >= FIRST_PSEUDO_REGISTER
955 && (firstr < FIRST_PSEUDO_REGISTER
956 || (bitmap_bit_p (cse_ebb_live_out, new_reg)
957 && !bitmap_bit_p (cse_ebb_live_out, firstr))
958 || (bitmap_bit_p (cse_ebb_live_in, new_reg)
959 && !bitmap_bit_p (cse_ebb_live_in, firstr))))))
961 reg_eqv_table[firstr].prev = new_reg;
962 reg_eqv_table[new_reg].next = firstr;
963 reg_eqv_table[new_reg].prev = -1;
964 ent->first_reg = new_reg;
968 /* If NEW is a hard reg (known to be non-fixed), insert at end.
969 Otherwise, insert before any non-fixed hard regs that are at the
970 end. Registers of class NO_REGS cannot be used as an
971 equivalent for anything. */
972 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
973 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
974 && new_reg >= FIRST_PSEUDO_REGISTER)
975 lastr = reg_eqv_table[lastr].prev;
976 reg_eqv_table[new_reg].next = reg_eqv_table[lastr].next;
977 if (reg_eqv_table[lastr].next >= 0)
978 reg_eqv_table[reg_eqv_table[lastr].next].prev = new_reg;
980 qty_table[q].last_reg = new_reg;
981 reg_eqv_table[lastr].next = new_reg;
982 reg_eqv_table[new_reg].prev = lastr;
986 /* Remove REG from its equivalence class. */
989 delete_reg_equiv (unsigned int reg)
991 struct qty_table_elem *ent;
992 int q = REG_QTY (reg);
995 /* If invalid, do nothing. */
996 if (! REGNO_QTY_VALID_P (reg))
1001 p = reg_eqv_table[reg].prev;
1002 n = reg_eqv_table[reg].next;
1005 reg_eqv_table[n].prev = p;
1009 reg_eqv_table[p].next = n;
1013 REG_QTY (reg) = -reg - 1;
1016 /* Remove any invalid expressions from the hash table
1017 that refer to any of the registers contained in expression X.
1019 Make sure that newly inserted references to those registers
1020 as subexpressions will be considered valid.
1022 mention_regs is not called when a register itself
1023 is being stored in the table.
1025 Return 1 if we have done something that may have changed the hash code
1029 mention_regs (rtx x)
1039 code = GET_CODE (x);
1042 unsigned int regno = REGNO (x);
1043 unsigned int endregno = END_REGNO (x);
1046 for (i = regno; i < endregno; i++)
1048 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1049 remove_invalid_refs (i);
1051 REG_IN_TABLE (i) = REG_TICK (i);
1052 SUBREG_TICKED (i) = -1;
1058 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1059 pseudo if they don't use overlapping words. We handle only pseudos
1060 here for simplicity. */
1061 if (code == SUBREG && REG_P (SUBREG_REG (x))
1062 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1064 unsigned int i = REGNO (SUBREG_REG (x));
1066 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1068 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1069 the last store to this register really stored into this
1070 subreg, then remove the memory of this subreg.
1071 Otherwise, remove any memory of the entire register and
1072 all its subregs from the table. */
1073 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1074 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1075 remove_invalid_refs (i);
1077 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1080 REG_IN_TABLE (i) = REG_TICK (i);
1081 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1085 /* If X is a comparison or a COMPARE and either operand is a register
1086 that does not have a quantity, give it one. This is so that a later
1087 call to record_jump_equiv won't cause X to be assigned a different
1088 hash code and not found in the table after that call.
1090 It is not necessary to do this here, since rehash_using_reg can
1091 fix up the table later, but doing this here eliminates the need to
1092 call that expensive function in the most common case where the only
1093 use of the register is in the comparison. */
1095 if (code == COMPARE || COMPARISON_P (x))
1097 if (REG_P (XEXP (x, 0))
1098 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1099 if (insert_regs (XEXP (x, 0), NULL, 0))
1101 rehash_using_reg (XEXP (x, 0));
1105 if (REG_P (XEXP (x, 1))
1106 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1107 if (insert_regs (XEXP (x, 1), NULL, 0))
1109 rehash_using_reg (XEXP (x, 1));
1114 fmt = GET_RTX_FORMAT (code);
1115 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1117 changed |= mention_regs (XEXP (x, i));
1118 else if (fmt[i] == 'E')
1119 for (j = 0; j < XVECLEN (x, i); j++)
1120 changed |= mention_regs (XVECEXP (x, i, j));
1125 /* Update the register quantities for inserting X into the hash table
1126 with a value equivalent to CLASSP.
1127 (If the class does not contain a REG, it is irrelevant.)
1128 If MODIFIED is nonzero, X is a destination; it is being modified.
1129 Note that delete_reg_equiv should be called on a register
1130 before insert_regs is done on that register with MODIFIED != 0.
1132 Nonzero value means that elements of reg_qty have changed
1133 so X's hash code may be different. */
1136 insert_regs (rtx x, struct table_elt *classp, int modified)
1140 unsigned int regno = REGNO (x);
1143 /* If REGNO is in the equivalence table already but is of the
1144 wrong mode for that equivalence, don't do anything here. */
1146 qty_valid = REGNO_QTY_VALID_P (regno);
1149 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1151 if (ent->mode != GET_MODE (x))
1155 if (modified || ! qty_valid)
1158 for (classp = classp->first_same_value;
1160 classp = classp->next_same_value)
1161 if (REG_P (classp->exp)
1162 && GET_MODE (classp->exp) == GET_MODE (x))
1164 unsigned c_regno = REGNO (classp->exp);
1166 gcc_assert (REGNO_QTY_VALID_P (c_regno));
1168 /* Suppose that 5 is hard reg and 100 and 101 are
1171 (set (reg:si 100) (reg:si 5))
1172 (set (reg:si 5) (reg:si 100))
1173 (set (reg:di 101) (reg:di 5))
1175 We would now set REG_QTY (101) = REG_QTY (5), but the
1176 entry for 5 is in SImode. When we use this later in
1177 copy propagation, we get the register in wrong mode. */
1178 if (qty_table[REG_QTY (c_regno)].mode != GET_MODE (x))
1181 make_regs_eqv (regno, c_regno);
1185 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1186 than REG_IN_TABLE to find out if there was only a single preceding
1187 invalidation - for the SUBREG - or another one, which would be
1188 for the full register. However, if we find here that REG_TICK
1189 indicates that the register is invalid, it means that it has
1190 been invalidated in a separate operation. The SUBREG might be used
1191 now (then this is a recursive call), or we might use the full REG
1192 now and a SUBREG of it later. So bump up REG_TICK so that
1193 mention_regs will do the right thing. */
1195 && REG_IN_TABLE (regno) >= 0
1196 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1198 make_new_qty (regno, GET_MODE (x));
1205 /* If X is a SUBREG, we will likely be inserting the inner register in the
1206 table. If that register doesn't have an assigned quantity number at
1207 this point but does later, the insertion that we will be doing now will
1208 not be accessible because its hash code will have changed. So assign
1209 a quantity number now. */
1211 else if (GET_CODE (x) == SUBREG && REG_P (SUBREG_REG (x))
1212 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1214 insert_regs (SUBREG_REG (x), NULL, 0);
1219 return mention_regs (x);
1223 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1224 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1225 CST is equal to an anchor. */
1228 compute_const_anchors (rtx cst,
1229 HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs,
1230 HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs)
1232 HOST_WIDE_INT n = INTVAL (cst);
1234 *lower_base = n & ~(targetm.const_anchor - 1);
1235 if (*lower_base == n)
1239 (n + (targetm.const_anchor - 1)) & ~(targetm.const_anchor - 1);
1240 *upper_offs = n - *upper_base;
1241 *lower_offs = n - *lower_base;
1245 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1248 insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs,
1249 enum machine_mode mode)
1251 struct table_elt *elt;
1256 anchor_exp = GEN_INT (anchor);
1257 hash = HASH (anchor_exp, mode);
1258 elt = lookup (anchor_exp, hash, mode);
1260 elt = insert (anchor_exp, NULL, hash, mode);
1262 exp = plus_constant (reg, offs);
1263 /* REG has just been inserted and the hash codes recomputed. */
1265 hash = HASH (exp, mode);
1267 /* Use the cost of the register rather than the whole expression. When
1268 looking up constant anchors we will further offset the corresponding
1269 expression therefore it does not make sense to prefer REGs over
1270 reg-immediate additions. Prefer instead the oldest expression. Also
1271 don't prefer pseudos over hard regs so that we derive constants in
1272 argument registers from other argument registers rather than from the
1273 original pseudo that was used to synthesize the constant. */
1274 insert_with_costs (exp, elt, hash, mode, COST (reg), 1);
1277 /* The constant CST is equivalent to the register REG. Create
1278 equivalences between the two anchors of CST and the corresponding
1279 register-offset expressions using REG. */
1282 insert_const_anchors (rtx reg, rtx cst, enum machine_mode mode)
1284 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1286 if (!compute_const_anchors (cst, &lower_base, &lower_offs,
1287 &upper_base, &upper_offs))
1290 /* Ignore anchors of value 0. Constants accessible from zero are
1292 if (lower_base != 0)
1293 insert_const_anchor (lower_base, reg, -lower_offs, mode);
1295 if (upper_base != 0)
1296 insert_const_anchor (upper_base, reg, -upper_offs, mode);
1299 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1300 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1301 valid expression. Return the cheapest and oldest of such expressions. In
1302 *OLD, return how old the resulting expression is compared to the other
1303 equivalent expressions. */
1306 find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs,
1309 struct table_elt *elt;
1311 struct table_elt *match_elt;
1314 /* Find the cheapest and *oldest* expression to maximize the chance of
1315 reusing the same pseudo. */
1319 for (elt = anchor_elt->first_same_value, idx = 0;
1321 elt = elt->next_same_value, idx++)
1323 if (match_elt && CHEAPER (match_elt, elt))
1326 if (REG_P (elt->exp)
1327 || (GET_CODE (elt->exp) == PLUS
1328 && REG_P (XEXP (elt->exp, 0))
1329 && GET_CODE (XEXP (elt->exp, 1)) == CONST_INT))
1333 /* Ignore expressions that are no longer valid. */
1334 if (!REG_P (elt->exp) && !exp_equiv_p (elt->exp, elt->exp, 1, false))
1337 x = plus_constant (elt->exp, offs);
1339 || (GET_CODE (x) == PLUS
1340 && IN_RANGE (INTVAL (XEXP (x, 1)),
1341 -targetm.const_anchor,
1342 targetm.const_anchor - 1)))
1354 /* Try to express the constant SRC_CONST using a register+offset expression
1355 derived from a constant anchor. Return it if successful or NULL_RTX,
1359 try_const_anchors (rtx src_const, enum machine_mode mode)
1361 struct table_elt *lower_elt, *upper_elt;
1362 HOST_WIDE_INT lower_base, lower_offs, upper_base, upper_offs;
1363 rtx lower_anchor_rtx, upper_anchor_rtx;
1364 rtx lower_exp = NULL_RTX, upper_exp = NULL_RTX;
1365 unsigned lower_old, upper_old;
1367 if (!compute_const_anchors (src_const, &lower_base, &lower_offs,
1368 &upper_base, &upper_offs))
1371 lower_anchor_rtx = GEN_INT (lower_base);
1372 upper_anchor_rtx = GEN_INT (upper_base);
1373 lower_elt = lookup (lower_anchor_rtx, HASH (lower_anchor_rtx, mode), mode);
1374 upper_elt = lookup (upper_anchor_rtx, HASH (upper_anchor_rtx, mode), mode);
1377 lower_exp = find_reg_offset_for_const (lower_elt, lower_offs, &lower_old);
1379 upper_exp = find_reg_offset_for_const (upper_elt, upper_offs, &upper_old);
1386 /* Return the older expression. */
1387 return (upper_old > lower_old ? upper_exp : lower_exp);
1390 /* Look in or update the hash table. */
1392 /* Remove table element ELT from use in the table.
1393 HASH is its hash code, made using the HASH macro.
1394 It's an argument because often that is known in advance
1395 and we save much time not recomputing it. */
1398 remove_from_table (struct table_elt *elt, unsigned int hash)
1403 /* Mark this element as removed. See cse_insn. */
1404 elt->first_same_value = 0;
1406 /* Remove the table element from its equivalence class. */
1409 struct table_elt *prev = elt->prev_same_value;
1410 struct table_elt *next = elt->next_same_value;
1413 next->prev_same_value = prev;
1416 prev->next_same_value = next;
1419 struct table_elt *newfirst = next;
1422 next->first_same_value = newfirst;
1423 next = next->next_same_value;
1428 /* Remove the table element from its hash bucket. */
1431 struct table_elt *prev = elt->prev_same_hash;
1432 struct table_elt *next = elt->next_same_hash;
1435 next->prev_same_hash = prev;
1438 prev->next_same_hash = next;
1439 else if (table[hash] == elt)
1443 /* This entry is not in the proper hash bucket. This can happen
1444 when two classes were merged by `merge_equiv_classes'. Search
1445 for the hash bucket that it heads. This happens only very
1446 rarely, so the cost is acceptable. */
1447 for (hash = 0; hash < HASH_SIZE; hash++)
1448 if (table[hash] == elt)
1453 /* Remove the table element from its related-value circular chain. */
1455 if (elt->related_value != 0 && elt->related_value != elt)
1457 struct table_elt *p = elt->related_value;
1459 while (p->related_value != elt)
1460 p = p->related_value;
1461 p->related_value = elt->related_value;
1462 if (p->related_value == p)
1463 p->related_value = 0;
1466 /* Now add it to the free element chain. */
1467 elt->next_same_hash = free_element_chain;
1468 free_element_chain = elt;
1471 /* Same as above, but X is a pseudo-register. */
1474 remove_pseudo_from_table (rtx x, unsigned int hash)
1476 struct table_elt *elt;
1478 /* Because a pseudo-register can be referenced in more than one
1479 mode, we might have to remove more than one table entry. */
1480 while ((elt = lookup_for_remove (x, hash, VOIDmode)))
1481 remove_from_table (elt, hash);
1484 /* Look up X in the hash table and return its table element,
1485 or 0 if X is not in the table.
1487 MODE is the machine-mode of X, or if X is an integer constant
1488 with VOIDmode then MODE is the mode with which X will be used.
1490 Here we are satisfied to find an expression whose tree structure
1493 static struct table_elt *
1494 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1496 struct table_elt *p;
1498 for (p = table[hash]; p; p = p->next_same_hash)
1499 if (mode == p->mode && ((x == p->exp && REG_P (x))
1500 || exp_equiv_p (x, p->exp, !REG_P (x), false)))
1506 /* Like `lookup' but don't care whether the table element uses invalid regs.
1507 Also ignore discrepancies in the machine mode of a register. */
1509 static struct table_elt *
1510 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1512 struct table_elt *p;
1516 unsigned int regno = REGNO (x);
1518 /* Don't check the machine mode when comparing registers;
1519 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1520 for (p = table[hash]; p; p = p->next_same_hash)
1522 && REGNO (p->exp) == regno)
1527 for (p = table[hash]; p; p = p->next_same_hash)
1529 && (x == p->exp || exp_equiv_p (x, p->exp, 0, false)))
1536 /* Look for an expression equivalent to X and with code CODE.
1537 If one is found, return that expression. */
1540 lookup_as_function (rtx x, enum rtx_code code)
1543 = lookup (x, SAFE_HASH (x, VOIDmode), GET_MODE (x));
1548 for (p = p->first_same_value; p; p = p->next_same_value)
1549 if (GET_CODE (p->exp) == code
1550 /* Make sure this is a valid entry in the table. */
1551 && exp_equiv_p (p->exp, p->exp, 1, false))
1557 /* Insert X in the hash table, assuming HASH is its hash code and
1558 CLASSP is an element of the class it should go in (or 0 if a new
1559 class should be made). COST is the code of X and reg_cost is the
1560 cost of registers in X. It is inserted at the proper position to
1561 keep the class in the order cheapest first.
1563 MODE is the machine-mode of X, or if X is an integer constant
1564 with VOIDmode then MODE is the mode with which X will be used.
1566 For elements of equal cheapness, the most recent one
1567 goes in front, except that the first element in the list
1568 remains first unless a cheaper element is added. The order of
1569 pseudo-registers does not matter, as canon_reg will be called to
1570 find the cheapest when a register is retrieved from the table.
1572 The in_memory field in the hash table element is set to 0.
1573 The caller must set it nonzero if appropriate.
1575 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1576 and if insert_regs returns a nonzero value
1577 you must then recompute its hash code before calling here.
1579 If necessary, update table showing constant values of quantities. */
1581 static struct table_elt *
1582 insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash,
1583 enum machine_mode mode, int cost, int reg_cost)
1585 struct table_elt *elt;
1587 /* If X is a register and we haven't made a quantity for it,
1588 something is wrong. */
1589 gcc_assert (!REG_P (x) || REGNO_QTY_VALID_P (REGNO (x)));
1591 /* If X is a hard register, show it is being put in the table. */
1592 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
1593 add_to_hard_reg_set (&hard_regs_in_table, GET_MODE (x), REGNO (x));
1595 /* Put an element for X into the right hash bucket. */
1597 elt = free_element_chain;
1599 free_element_chain = elt->next_same_hash;
1601 elt = XNEW (struct table_elt);
1604 elt->canon_exp = NULL_RTX;
1606 elt->regcost = reg_cost;
1607 elt->next_same_value = 0;
1608 elt->prev_same_value = 0;
1609 elt->next_same_hash = table[hash];
1610 elt->prev_same_hash = 0;
1611 elt->related_value = 0;
1614 elt->is_const = (CONSTANT_P (x) || fixed_base_plus_p (x));
1617 table[hash]->prev_same_hash = elt;
1620 /* Put it into the proper value-class. */
1623 classp = classp->first_same_value;
1624 if (CHEAPER (elt, classp))
1625 /* Insert at the head of the class. */
1627 struct table_elt *p;
1628 elt->next_same_value = classp;
1629 classp->prev_same_value = elt;
1630 elt->first_same_value = elt;
1632 for (p = classp; p; p = p->next_same_value)
1633 p->first_same_value = elt;
1637 /* Insert not at head of the class. */
1638 /* Put it after the last element cheaper than X. */
1639 struct table_elt *p, *next;
1641 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1644 /* Put it after P and before NEXT. */
1645 elt->next_same_value = next;
1647 next->prev_same_value = elt;
1649 elt->prev_same_value = p;
1650 p->next_same_value = elt;
1651 elt->first_same_value = classp;
1655 elt->first_same_value = elt;
1657 /* If this is a constant being set equivalent to a register or a register
1658 being set equivalent to a constant, note the constant equivalence.
1660 If this is a constant, it cannot be equivalent to a different constant,
1661 and a constant is the only thing that can be cheaper than a register. So
1662 we know the register is the head of the class (before the constant was
1665 If this is a register that is not already known equivalent to a
1666 constant, we must check the entire class.
1668 If this is a register that is already known equivalent to an insn,
1669 update the qtys `const_insn' to show that `this_insn' is the latest
1670 insn making that quantity equivalent to the constant. */
1672 if (elt->is_const && classp && REG_P (classp->exp)
1675 int exp_q = REG_QTY (REGNO (classp->exp));
1676 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1678 exp_ent->const_rtx = gen_lowpart (exp_ent->mode, x);
1679 exp_ent->const_insn = this_insn;
1684 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1687 struct table_elt *p;
1689 for (p = classp; p != 0; p = p->next_same_value)
1691 if (p->is_const && !REG_P (p->exp))
1693 int x_q = REG_QTY (REGNO (x));
1694 struct qty_table_elem *x_ent = &qty_table[x_q];
1697 = gen_lowpart (GET_MODE (x), p->exp);
1698 x_ent->const_insn = this_insn;
1705 && qty_table[REG_QTY (REGNO (x))].const_rtx
1706 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1707 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1709 /* If this is a constant with symbolic value,
1710 and it has a term with an explicit integer value,
1711 link it up with related expressions. */
1712 if (GET_CODE (x) == CONST)
1714 rtx subexp = get_related_value (x);
1716 struct table_elt *subelt, *subelt_prev;
1720 /* Get the integer-free subexpression in the hash table. */
1721 subhash = SAFE_HASH (subexp, mode);
1722 subelt = lookup (subexp, subhash, mode);
1724 subelt = insert (subexp, NULL, subhash, mode);
1725 /* Initialize SUBELT's circular chain if it has none. */
1726 if (subelt->related_value == 0)
1727 subelt->related_value = subelt;
1728 /* Find the element in the circular chain that precedes SUBELT. */
1729 subelt_prev = subelt;
1730 while (subelt_prev->related_value != subelt)
1731 subelt_prev = subelt_prev->related_value;
1732 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1733 This way the element that follows SUBELT is the oldest one. */
1734 elt->related_value = subelt_prev->related_value;
1735 subelt_prev->related_value = elt;
1742 /* Wrap insert_with_costs by passing the default costs. */
1744 static struct table_elt *
1745 insert (rtx x, struct table_elt *classp, unsigned int hash,
1746 enum machine_mode mode)
1749 insert_with_costs (x, classp, hash, mode, COST (x), approx_reg_cost (x));
1753 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1754 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1755 the two classes equivalent.
1757 CLASS1 will be the surviving class; CLASS2 should not be used after this
1760 Any invalid entries in CLASS2 will not be copied. */
1763 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1765 struct table_elt *elt, *next, *new_elt;
1767 /* Ensure we start with the head of the classes. */
1768 class1 = class1->first_same_value;
1769 class2 = class2->first_same_value;
1771 /* If they were already equal, forget it. */
1772 if (class1 == class2)
1775 for (elt = class2; elt; elt = next)
1779 enum machine_mode mode = elt->mode;
1781 next = elt->next_same_value;
1783 /* Remove old entry, make a new one in CLASS1's class.
1784 Don't do this for invalid entries as we cannot find their
1785 hash code (it also isn't necessary). */
1786 if (REG_P (exp) || exp_equiv_p (exp, exp, 1, false))
1788 bool need_rehash = false;
1790 hash_arg_in_memory = 0;
1791 hash = HASH (exp, mode);
1795 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1796 delete_reg_equiv (REGNO (exp));
1799 if (REG_P (exp) && REGNO (exp) >= FIRST_PSEUDO_REGISTER)
1800 remove_pseudo_from_table (exp, hash);
1802 remove_from_table (elt, hash);
1804 if (insert_regs (exp, class1, 0) || need_rehash)
1806 rehash_using_reg (exp);
1807 hash = HASH (exp, mode);
1809 new_elt = insert (exp, class1, hash, mode);
1810 new_elt->in_memory = hash_arg_in_memory;
1815 /* Flush the entire hash table. */
1818 flush_hash_table (void)
1821 struct table_elt *p;
1823 for (i = 0; i < HASH_SIZE; i++)
1824 for (p = table[i]; p; p = table[i])
1826 /* Note that invalidate can remove elements
1827 after P in the current hash chain. */
1829 invalidate (p->exp, VOIDmode);
1831 remove_from_table (p, i);
1835 /* Function called for each rtx to check whether true dependence exist. */
1836 struct check_dependence_data
1838 enum machine_mode mode;
1844 check_dependence (rtx *x, void *data)
1846 struct check_dependence_data *d = (struct check_dependence_data *) data;
1847 if (*x && MEM_P (*x))
1848 return canon_true_dependence (d->exp, d->mode, d->addr, *x, NULL_RTX,
1854 /* Remove from the hash table, or mark as invalid, all expressions whose
1855 values could be altered by storing in X. X is a register, a subreg, or
1856 a memory reference with nonvarying address (because, when a memory
1857 reference with a varying address is stored in, all memory references are
1858 removed by invalidate_memory so specific invalidation is superfluous).
1859 FULL_MODE, if not VOIDmode, indicates that this much should be
1860 invalidated instead of just the amount indicated by the mode of X. This
1861 is only used for bitfield stores into memory.
1863 A nonvarying address may be just a register or just a symbol reference,
1864 or it may be either of those plus a numeric offset. */
1867 invalidate (rtx x, enum machine_mode full_mode)
1870 struct table_elt *p;
1873 switch (GET_CODE (x))
1877 /* If X is a register, dependencies on its contents are recorded
1878 through the qty number mechanism. Just change the qty number of
1879 the register, mark it as invalid for expressions that refer to it,
1880 and remove it itself. */
1881 unsigned int regno = REGNO (x);
1882 unsigned int hash = HASH (x, GET_MODE (x));
1884 /* Remove REGNO from any quantity list it might be on and indicate
1885 that its value might have changed. If it is a pseudo, remove its
1886 entry from the hash table.
1888 For a hard register, we do the first two actions above for any
1889 additional hard registers corresponding to X. Then, if any of these
1890 registers are in the table, we must remove any REG entries that
1891 overlap these registers. */
1893 delete_reg_equiv (regno);
1895 SUBREG_TICKED (regno) = -1;
1897 if (regno >= FIRST_PSEUDO_REGISTER)
1898 remove_pseudo_from_table (x, hash);
1901 HOST_WIDE_INT in_table
1902 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1903 unsigned int endregno = END_HARD_REGNO (x);
1904 unsigned int tregno, tendregno, rn;
1905 struct table_elt *p, *next;
1907 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1909 for (rn = regno + 1; rn < endregno; rn++)
1911 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1912 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1913 delete_reg_equiv (rn);
1915 SUBREG_TICKED (rn) = -1;
1919 for (hash = 0; hash < HASH_SIZE; hash++)
1920 for (p = table[hash]; p; p = next)
1922 next = p->next_same_hash;
1925 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1928 tregno = REGNO (p->exp);
1929 tendregno = END_HARD_REGNO (p->exp);
1930 if (tendregno > regno && tregno < endregno)
1931 remove_from_table (p, hash);
1938 invalidate (SUBREG_REG (x), VOIDmode);
1942 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1943 invalidate (XVECEXP (x, 0, i), VOIDmode);
1947 /* This is part of a disjoint return value; extract the location in
1948 question ignoring the offset. */
1949 invalidate (XEXP (x, 0), VOIDmode);
1953 addr = canon_rtx (get_addr (XEXP (x, 0)));
1954 /* Calculate the canonical version of X here so that
1955 true_dependence doesn't generate new RTL for X on each call. */
1958 /* Remove all hash table elements that refer to overlapping pieces of
1960 if (full_mode == VOIDmode)
1961 full_mode = GET_MODE (x);
1963 for (i = 0; i < HASH_SIZE; i++)
1965 struct table_elt *next;
1967 for (p = table[i]; p; p = next)
1969 next = p->next_same_hash;
1972 struct check_dependence_data d;
1974 /* Just canonicalize the expression once;
1975 otherwise each time we call invalidate
1976 true_dependence will canonicalize the
1977 expression again. */
1979 p->canon_exp = canon_rtx (p->exp);
1983 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1984 remove_from_table (p, i);
1995 /* Remove all expressions that refer to register REGNO,
1996 since they are already invalid, and we are about to
1997 mark that register valid again and don't want the old
1998 expressions to reappear as valid. */
2001 remove_invalid_refs (unsigned int regno)
2004 struct table_elt *p, *next;
2006 for (i = 0; i < HASH_SIZE; i++)
2007 for (p = table[i]; p; p = next)
2009 next = p->next_same_hash;
2011 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2012 remove_from_table (p, i);
2016 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2019 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
2020 enum machine_mode mode)
2023 struct table_elt *p, *next;
2024 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
2026 for (i = 0; i < HASH_SIZE; i++)
2027 for (p = table[i]; p; p = next)
2030 next = p->next_same_hash;
2033 && (GET_CODE (exp) != SUBREG
2034 || !REG_P (SUBREG_REG (exp))
2035 || REGNO (SUBREG_REG (exp)) != regno
2036 || (((SUBREG_BYTE (exp)
2037 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
2038 && SUBREG_BYTE (exp) <= end))
2039 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
2040 remove_from_table (p, i);
2044 /* Recompute the hash codes of any valid entries in the hash table that
2045 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2047 This is called when we make a jump equivalence. */
2050 rehash_using_reg (rtx x)
2053 struct table_elt *p, *next;
2056 if (GET_CODE (x) == SUBREG)
2059 /* If X is not a register or if the register is known not to be in any
2060 valid entries in the table, we have no work to do. */
2063 || REG_IN_TABLE (REGNO (x)) < 0
2064 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2067 /* Scan all hash chains looking for valid entries that mention X.
2068 If we find one and it is in the wrong hash chain, move it. */
2070 for (i = 0; i < HASH_SIZE; i++)
2071 for (p = table[i]; p; p = next)
2073 next = p->next_same_hash;
2074 if (reg_mentioned_p (x, p->exp)
2075 && exp_equiv_p (p->exp, p->exp, 1, false)
2076 && i != (hash = SAFE_HASH (p->exp, p->mode)))
2078 if (p->next_same_hash)
2079 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2081 if (p->prev_same_hash)
2082 p->prev_same_hash->next_same_hash = p->next_same_hash;
2084 table[i] = p->next_same_hash;
2086 p->next_same_hash = table[hash];
2087 p->prev_same_hash = 0;
2089 table[hash]->prev_same_hash = p;
2095 /* Remove from the hash table any expression that is a call-clobbered
2096 register. Also update their TICK values. */
2099 invalidate_for_call (void)
2101 unsigned int regno, endregno;
2104 struct table_elt *p, *next;
2107 /* Go through all the hard registers. For each that is clobbered in
2108 a CALL_INSN, remove the register from quantity chains and update
2109 reg_tick if defined. Also see if any of these registers is currently
2112 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2113 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2115 delete_reg_equiv (regno);
2116 if (REG_TICK (regno) >= 0)
2119 SUBREG_TICKED (regno) = -1;
2122 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2125 /* In the case where we have no call-clobbered hard registers in the
2126 table, we are done. Otherwise, scan the table and remove any
2127 entry that overlaps a call-clobbered register. */
2130 for (hash = 0; hash < HASH_SIZE; hash++)
2131 for (p = table[hash]; p; p = next)
2133 next = p->next_same_hash;
2136 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2139 regno = REGNO (p->exp);
2140 endregno = END_HARD_REGNO (p->exp);
2142 for (i = regno; i < endregno; i++)
2143 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2145 remove_from_table (p, hash);
2151 /* Given an expression X of type CONST,
2152 and ELT which is its table entry (or 0 if it
2153 is not in the hash table),
2154 return an alternate expression for X as a register plus integer.
2155 If none can be found, return 0. */
2158 use_related_value (rtx x, struct table_elt *elt)
2160 struct table_elt *relt = 0;
2161 struct table_elt *p, *q;
2162 HOST_WIDE_INT offset;
2164 /* First, is there anything related known?
2165 If we have a table element, we can tell from that.
2166 Otherwise, must look it up. */
2168 if (elt != 0 && elt->related_value != 0)
2170 else if (elt == 0 && GET_CODE (x) == CONST)
2172 rtx subexp = get_related_value (x);
2174 relt = lookup (subexp,
2175 SAFE_HASH (subexp, GET_MODE (subexp)),
2182 /* Search all related table entries for one that has an
2183 equivalent register. */
2188 /* This loop is strange in that it is executed in two different cases.
2189 The first is when X is already in the table. Then it is searching
2190 the RELATED_VALUE list of X's class (RELT). The second case is when
2191 X is not in the table. Then RELT points to a class for the related
2194 Ensure that, whatever case we are in, that we ignore classes that have
2195 the same value as X. */
2197 if (rtx_equal_p (x, p->exp))
2200 for (q = p->first_same_value; q; q = q->next_same_value)
2207 p = p->related_value;
2209 /* We went all the way around, so there is nothing to be found.
2210 Alternatively, perhaps RELT was in the table for some other reason
2211 and it has no related values recorded. */
2212 if (p == relt || p == 0)
2219 offset = (get_integer_term (x) - get_integer_term (p->exp));
2220 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2221 return plus_constant (q->exp, offset);
2225 /* Hash a string. Just add its bytes up. */
2226 static inline unsigned
2227 hash_rtx_string (const char *ps)
2230 const unsigned char *p = (const unsigned char *) ps;
2239 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2240 When the callback returns true, we continue with the new rtx. */
2243 hash_rtx_cb (const_rtx x, enum machine_mode mode,
2244 int *do_not_record_p, int *hash_arg_in_memory_p,
2245 bool have_reg_qty, hash_rtx_callback_function cb)
2251 enum machine_mode newmode;
2254 /* Used to turn recursion into iteration. We can't rely on GCC's
2255 tail-recursion elimination since we need to keep accumulating values
2261 /* Invoke the callback first. */
2263 && ((*cb) (x, mode, &newx, &newmode)))
2265 hash += hash_rtx_cb (newx, newmode, do_not_record_p,
2266 hash_arg_in_memory_p, have_reg_qty, cb);
2270 code = GET_CODE (x);
2275 unsigned int regno = REGNO (x);
2277 if (do_not_record_p && !reload_completed)
2279 /* On some machines, we can't record any non-fixed hard register,
2280 because extending its life will cause reload problems. We
2281 consider ap, fp, sp, gp to be fixed for this purpose.
2283 We also consider CCmode registers to be fixed for this purpose;
2284 failure to do so leads to failure to simplify 0<100 type of
2287 On all machines, we can't record any global registers.
2288 Nor should we record any register that is in a small
2289 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2292 if (regno >= FIRST_PSEUDO_REGISTER)
2294 else if (x == frame_pointer_rtx
2295 || x == hard_frame_pointer_rtx
2296 || x == arg_pointer_rtx
2297 || x == stack_pointer_rtx
2298 || x == pic_offset_table_rtx)
2300 else if (global_regs[regno])
2302 else if (fixed_regs[regno])
2304 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2306 else if (targetm.small_register_classes_for_mode_p (GET_MODE (x)))
2308 else if (targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
2315 *do_not_record_p = 1;
2320 hash += ((unsigned int) REG << 7);
2321 hash += (have_reg_qty ? (unsigned) REG_QTY (regno) : regno);
2325 /* We handle SUBREG of a REG specially because the underlying
2326 reg changes its hash value with every value change; we don't
2327 want to have to forget unrelated subregs when one subreg changes. */
2330 if (REG_P (SUBREG_REG (x)))
2332 hash += (((unsigned int) SUBREG << 7)
2333 + REGNO (SUBREG_REG (x))
2334 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2341 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
2342 + (unsigned int) INTVAL (x));
2346 /* This is like the general case, except that it only counts
2347 the integers representing the constant. */
2348 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2349 if (GET_MODE (x) != VOIDmode)
2350 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2352 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
2353 + (unsigned int) CONST_DOUBLE_HIGH (x));
2357 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
2358 hash += fixed_hash (CONST_FIXED_VALUE (x));
2366 units = CONST_VECTOR_NUNITS (x);
2368 for (i = 0; i < units; ++i)
2370 elt = CONST_VECTOR_ELT (x, i);
2371 hash += hash_rtx_cb (elt, GET_MODE (elt),
2372 do_not_record_p, hash_arg_in_memory_p,
2379 /* Assume there is only one rtx object for any given label. */
2381 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2382 differences and differences between each stage's debugging dumps. */
2383 hash += (((unsigned int) LABEL_REF << 7)
2384 + CODE_LABEL_NUMBER (XEXP (x, 0)));
2389 /* Don't hash on the symbol's address to avoid bootstrap differences.
2390 Different hash values may cause expressions to be recorded in
2391 different orders and thus different registers to be used in the
2392 final assembler. This also avoids differences in the dump files
2393 between various stages. */
2395 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
2398 h += (h << 7) + *p++; /* ??? revisit */
2400 hash += ((unsigned int) SYMBOL_REF << 7) + h;
2405 /* We don't record if marked volatile or if BLKmode since we don't
2406 know the size of the move. */
2407 if (do_not_record_p && (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode))
2409 *do_not_record_p = 1;
2412 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2413 *hash_arg_in_memory_p = 1;
2415 /* Now that we have already found this special case,
2416 might as well speed it up as much as possible. */
2417 hash += (unsigned) MEM;
2422 /* A USE that mentions non-volatile memory needs special
2423 handling since the MEM may be BLKmode which normally
2424 prevents an entry from being made. Pure calls are
2425 marked by a USE which mentions BLKmode memory.
2426 See calls.c:emit_call_1. */
2427 if (MEM_P (XEXP (x, 0))
2428 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2430 hash += (unsigned) USE;
2433 if (hash_arg_in_memory_p && !MEM_READONLY_P (x))
2434 *hash_arg_in_memory_p = 1;
2436 /* Now that we have already found this special case,
2437 might as well speed it up as much as possible. */
2438 hash += (unsigned) MEM;
2453 case UNSPEC_VOLATILE:
2454 if (do_not_record_p) {
2455 *do_not_record_p = 1;
2463 if (do_not_record_p && MEM_VOLATILE_P (x))
2465 *do_not_record_p = 1;
2470 /* We don't want to take the filename and line into account. */
2471 hash += (unsigned) code + (unsigned) GET_MODE (x)
2472 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x))
2473 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2474 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2476 if (ASM_OPERANDS_INPUT_LENGTH (x))
2478 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2480 hash += (hash_rtx_cb (ASM_OPERANDS_INPUT (x, i),
2481 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
2482 do_not_record_p, hash_arg_in_memory_p,
2485 (ASM_OPERANDS_INPUT_CONSTRAINT (x, i)));
2488 hash += hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2489 x = ASM_OPERANDS_INPUT (x, 0);
2490 mode = GET_MODE (x);
2502 i = GET_RTX_LENGTH (code) - 1;
2503 hash += (unsigned) code + (unsigned) GET_MODE (x);
2504 fmt = GET_RTX_FORMAT (code);
2510 /* If we are about to do the last recursive call
2511 needed at this level, change it into iteration.
2512 This function is called enough to be worth it. */
2519 hash += hash_rtx_cb (XEXP (x, i), VOIDmode, do_not_record_p,
2520 hash_arg_in_memory_p,
2525 for (j = 0; j < XVECLEN (x, i); j++)
2526 hash += hash_rtx_cb (XVECEXP (x, i, j), VOIDmode, do_not_record_p,
2527 hash_arg_in_memory_p,
2532 hash += hash_rtx_string (XSTR (x, i));
2536 hash += (unsigned int) XINT (x, i);
2551 /* Hash an rtx. We are careful to make sure the value is never negative.
2552 Equivalent registers hash identically.
2553 MODE is used in hashing for CONST_INTs only;
2554 otherwise the mode of X is used.
2556 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2558 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2559 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2561 Note that cse_insn knows that the hash code of a MEM expression
2562 is just (int) MEM plus the hash code of the address. */
2565 hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p,
2566 int *hash_arg_in_memory_p, bool have_reg_qty)
2568 return hash_rtx_cb (x, mode, do_not_record_p,
2569 hash_arg_in_memory_p, have_reg_qty, NULL);
2572 /* Hash an rtx X for cse via hash_rtx.
2573 Stores 1 in do_not_record if any subexpression is volatile.
2574 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2575 does not have the RTX_UNCHANGING_P bit set. */
2577 static inline unsigned
2578 canon_hash (rtx x, enum machine_mode mode)
2580 return hash_rtx (x, mode, &do_not_record, &hash_arg_in_memory, true);
2583 /* Like canon_hash but with no side effects, i.e. do_not_record
2584 and hash_arg_in_memory are not changed. */
2586 static inline unsigned
2587 safe_hash (rtx x, enum machine_mode mode)
2589 int dummy_do_not_record;
2590 return hash_rtx (x, mode, &dummy_do_not_record, NULL, true);
2593 /* Return 1 iff X and Y would canonicalize into the same thing,
2594 without actually constructing the canonicalization of either one.
2595 If VALIDATE is nonzero,
2596 we assume X is an expression being processed from the rtl
2597 and Y was found in the hash table. We check register refs
2598 in Y for being marked as valid.
2600 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2603 exp_equiv_p (const_rtx x, const_rtx y, int validate, bool for_gcse)
2609 /* Note: it is incorrect to assume an expression is equivalent to itself
2610 if VALIDATE is nonzero. */
2611 if (x == y && !validate)
2614 if (x == 0 || y == 0)
2617 code = GET_CODE (x);
2618 if (code != GET_CODE (y))
2621 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2622 if (GET_MODE (x) != GET_MODE (y))
2625 /* MEMs refering to different address space are not equivalent. */
2626 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2639 return XEXP (x, 0) == XEXP (y, 0);
2642 return XSTR (x, 0) == XSTR (y, 0);
2646 return REGNO (x) == REGNO (y);
2649 unsigned int regno = REGNO (y);
2651 unsigned int endregno = END_REGNO (y);
2653 /* If the quantities are not the same, the expressions are not
2654 equivalent. If there are and we are not to validate, they
2655 are equivalent. Otherwise, ensure all regs are up-to-date. */
2657 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2663 for (i = regno; i < endregno; i++)
2664 if (REG_IN_TABLE (i) != REG_TICK (i))
2673 /* A volatile mem should not be considered equivalent to any
2675 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2678 /* Can't merge two expressions in different alias sets, since we
2679 can decide that the expression is transparent in a block when
2680 it isn't, due to it being set with the different alias set.
2682 Also, can't merge two expressions with different MEM_ATTRS.
2683 They could e.g. be two different entities allocated into the
2684 same space on the stack (see e.g. PR25130). In that case, the
2685 MEM addresses can be the same, even though the two MEMs are
2686 absolutely not equivalent.
2688 But because really all MEM attributes should be the same for
2689 equivalent MEMs, we just use the invariant that MEMs that have
2690 the same attributes share the same mem_attrs data structure. */
2691 if (MEM_ATTRS (x) != MEM_ATTRS (y))
2696 /* For commutative operations, check both orders. */
2704 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0),
2706 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2707 validate, for_gcse))
2708 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2710 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2711 validate, for_gcse)));
2714 /* We don't use the generic code below because we want to
2715 disregard filename and line numbers. */
2717 /* A volatile asm isn't equivalent to any other. */
2718 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2721 if (GET_MODE (x) != GET_MODE (y)
2722 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2723 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2724 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2725 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2726 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2729 if (ASM_OPERANDS_INPUT_LENGTH (x))
2731 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2732 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2733 ASM_OPERANDS_INPUT (y, i),
2735 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2736 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2746 /* Compare the elements. If any pair of corresponding elements
2747 fail to match, return 0 for the whole thing. */
2749 fmt = GET_RTX_FORMAT (code);
2750 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2755 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i),
2756 validate, for_gcse))
2761 if (XVECLEN (x, i) != XVECLEN (y, i))
2763 for (j = 0; j < XVECLEN (x, i); j++)
2764 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2765 validate, for_gcse))
2770 if (strcmp (XSTR (x, i), XSTR (y, i)))
2775 if (XINT (x, i) != XINT (y, i))
2780 if (XWINT (x, i) != XWINT (y, i))
2796 /* Return 1 if X has a value that can vary even between two
2797 executions of the program. 0 means X can be compared reliably
2798 against certain constants or near-constants. */
2801 cse_rtx_varies_p (const_rtx x, bool from_alias)
2803 /* We need not check for X and the equivalence class being of the same
2804 mode because if X is equivalent to a constant in some mode, it
2805 doesn't vary in any mode. */
2808 && REGNO_QTY_VALID_P (REGNO (x)))
2810 int x_q = REG_QTY (REGNO (x));
2811 struct qty_table_elem *x_ent = &qty_table[x_q];
2813 if (GET_MODE (x) == x_ent->mode
2814 && x_ent->const_rtx != NULL_RTX)
2818 if (GET_CODE (x) == PLUS
2819 && CONST_INT_P (XEXP (x, 1))
2820 && REG_P (XEXP (x, 0))
2821 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2823 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2824 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2826 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2827 && x0_ent->const_rtx != NULL_RTX)
2831 /* This can happen as the result of virtual register instantiation, if
2832 the initial constant is too large to be a valid address. This gives
2833 us a three instruction sequence, load large offset into a register,
2834 load fp minus a constant into a register, then a MEM which is the
2835 sum of the two `constant' registers. */
2836 if (GET_CODE (x) == PLUS
2837 && REG_P (XEXP (x, 0))
2838 && REG_P (XEXP (x, 1))
2839 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2840 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2842 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2843 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2844 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2845 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2847 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2848 && x0_ent->const_rtx != NULL_RTX
2849 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2850 && x1_ent->const_rtx != NULL_RTX)
2854 return rtx_varies_p (x, from_alias);
2857 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2858 the result if necessary. INSN is as for canon_reg. */
2861 validate_canon_reg (rtx *xloc, rtx insn)
2865 rtx new_rtx = canon_reg (*xloc, insn);
2867 /* If replacing pseudo with hard reg or vice versa, ensure the
2868 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2869 gcc_assert (insn && new_rtx);
2870 validate_change (insn, xloc, new_rtx, 1);
2874 /* Canonicalize an expression:
2875 replace each register reference inside it
2876 with the "oldest" equivalent register.
2878 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2879 after we make our substitution. The calls are made with IN_GROUP nonzero
2880 so apply_change_group must be called upon the outermost return from this
2881 function (unless INSN is zero). The result of apply_change_group can
2882 generally be discarded since the changes we are making are optional. */
2885 canon_reg (rtx x, rtx insn)
2894 code = GET_CODE (x);
2914 struct qty_table_elem *ent;
2916 /* Never replace a hard reg, because hard regs can appear
2917 in more than one machine mode, and we must preserve the mode
2918 of each occurrence. Also, some hard regs appear in
2919 MEMs that are shared and mustn't be altered. Don't try to
2920 replace any reg that maps to a reg of class NO_REGS. */
2921 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2922 || ! REGNO_QTY_VALID_P (REGNO (x)))
2925 q = REG_QTY (REGNO (x));
2926 ent = &qty_table[q];
2927 first = ent->first_reg;
2928 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2929 : REGNO_REG_CLASS (first) == NO_REGS ? x
2930 : gen_rtx_REG (ent->mode, first));
2937 fmt = GET_RTX_FORMAT (code);
2938 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2943 validate_canon_reg (&XEXP (x, i), insn);
2944 else if (fmt[i] == 'E')
2945 for (j = 0; j < XVECLEN (x, i); j++)
2946 validate_canon_reg (&XVECEXP (x, i, j), insn);
2952 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2953 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2954 what values are being compared.
2956 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2957 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2958 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2959 compared to produce cc0.
2961 The return value is the comparison operator and is either the code of
2962 A or the code corresponding to the inverse of the comparison. */
2964 static enum rtx_code
2965 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
2966 enum machine_mode *pmode1, enum machine_mode *pmode2)
2970 arg1 = *parg1, arg2 = *parg2;
2972 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2974 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2976 /* Set nonzero when we find something of interest. */
2978 int reverse_code = 0;
2979 struct table_elt *p = 0;
2981 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2982 On machines with CC0, this is the only case that can occur, since
2983 fold_rtx will return the COMPARE or item being compared with zero
2986 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2989 /* If ARG1 is a comparison operator and CODE is testing for
2990 STORE_FLAG_VALUE, get the inner arguments. */
2992 else if (COMPARISON_P (arg1))
2994 #ifdef FLOAT_STORE_FLAG_VALUE
2995 REAL_VALUE_TYPE fsfv;
2999 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3000 && code == LT && STORE_FLAG_VALUE == -1)
3001 #ifdef FLOAT_STORE_FLAG_VALUE
3002 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3003 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3004 REAL_VALUE_NEGATIVE (fsfv)))
3009 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3010 && code == GE && STORE_FLAG_VALUE == -1)
3011 #ifdef FLOAT_STORE_FLAG_VALUE
3012 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1))
3013 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3014 REAL_VALUE_NEGATIVE (fsfv)))
3017 x = arg1, reverse_code = 1;
3020 /* ??? We could also check for
3022 (ne (and (eq (...) (const_int 1))) (const_int 0))
3024 and related forms, but let's wait until we see them occurring. */
3027 /* Look up ARG1 in the hash table and see if it has an equivalence
3028 that lets us see what is being compared. */
3029 p = lookup (arg1, SAFE_HASH (arg1, GET_MODE (arg1)), GET_MODE (arg1));
3032 p = p->first_same_value;
3034 /* If what we compare is already known to be constant, that is as
3036 We need to break the loop in this case, because otherwise we
3037 can have an infinite loop when looking at a reg that is known
3038 to be a constant which is the same as a comparison of a reg
3039 against zero which appears later in the insn stream, which in
3040 turn is constant and the same as the comparison of the first reg
3046 for (; p; p = p->next_same_value)
3048 enum machine_mode inner_mode = GET_MODE (p->exp);
3049 #ifdef FLOAT_STORE_FLAG_VALUE
3050 REAL_VALUE_TYPE fsfv;
3053 /* If the entry isn't valid, skip it. */
3054 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3057 if (GET_CODE (p->exp) == COMPARE
3058 /* Another possibility is that this machine has a compare insn
3059 that includes the comparison code. In that case, ARG1 would
3060 be equivalent to a comparison operation that would set ARG1 to
3061 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3062 ORIG_CODE is the actual comparison being done; if it is an EQ,
3063 we must reverse ORIG_CODE. On machine with a negative value
3064 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3067 && GET_MODE_CLASS (inner_mode) == MODE_INT
3068 && (GET_MODE_BITSIZE (inner_mode)
3069 <= HOST_BITS_PER_WIDE_INT)
3070 && (STORE_FLAG_VALUE
3071 & ((HOST_WIDE_INT) 1
3072 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3073 #ifdef FLOAT_STORE_FLAG_VALUE
3075 && SCALAR_FLOAT_MODE_P (inner_mode)
3076 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3077 REAL_VALUE_NEGATIVE (fsfv)))
3080 && COMPARISON_P (p->exp)))
3085 else if ((code == EQ
3087 && GET_MODE_CLASS (inner_mode) == MODE_INT
3088 && (GET_MODE_BITSIZE (inner_mode)
3089 <= HOST_BITS_PER_WIDE_INT)
3090 && (STORE_FLAG_VALUE
3091 & ((HOST_WIDE_INT) 1
3092 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3093 #ifdef FLOAT_STORE_FLAG_VALUE
3095 && SCALAR_FLOAT_MODE_P (inner_mode)
3096 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3097 REAL_VALUE_NEGATIVE (fsfv)))
3100 && COMPARISON_P (p->exp))
3107 /* If this non-trapping address, e.g. fp + constant, the
3108 equivalent is a better operand since it may let us predict
3109 the value of the comparison. */
3110 else if (!rtx_addr_can_trap_p (p->exp))
3117 /* If we didn't find a useful equivalence for ARG1, we are done.
3118 Otherwise, set up for the next iteration. */
3122 /* If we need to reverse the comparison, make sure that that is
3123 possible -- we can't necessarily infer the value of GE from LT
3124 with floating-point operands. */
3127 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3128 if (reversed == UNKNOWN)
3133 else if (COMPARISON_P (x))
3134 code = GET_CODE (x);
3135 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3138 /* Return our results. Return the modes from before fold_rtx
3139 because fold_rtx might produce const_int, and then it's too late. */
3140 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3141 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3146 /* If X is a nontrivial arithmetic operation on an argument for which
3147 a constant value can be determined, return the result of operating
3148 on that value, as a constant. Otherwise, return X, possibly with
3149 one or more operands changed to a forward-propagated constant.
3151 If X is a register whose contents are known, we do NOT return
3152 those contents here; equiv_constant is called to perform that task.
3153 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3155 INSN is the insn that we may be modifying. If it is 0, make a copy
3156 of X before modifying it. */
3159 fold_rtx (rtx x, rtx insn)
3162 enum machine_mode mode;
3168 /* Operands of X. */
3172 /* Constant equivalents of first three operands of X;
3173 0 when no such equivalent is known. */
3178 /* The mode of the first operand of X. We need this for sign and zero
3180 enum machine_mode mode_arg0;
3185 /* Try to perform some initial simplifications on X. */
3186 code = GET_CODE (x);
3191 if ((new_rtx = equiv_constant (x)) != NULL_RTX)
3204 /* No use simplifying an EXPR_LIST
3205 since they are used only for lists of args
3206 in a function call's REG_EQUAL note. */
3212 return prev_insn_cc0;
3218 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3219 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3220 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3224 #ifdef NO_FUNCTION_CSE
3226 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3231 /* Anything else goes through the loop below. */
3236 mode = GET_MODE (x);
3240 mode_arg0 = VOIDmode;
3242 /* Try folding our operands.
3243 Then see which ones have constant values known. */
3245 fmt = GET_RTX_FORMAT (code);
3246 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3249 rtx folded_arg = XEXP (x, i), const_arg;
3250 enum machine_mode mode_arg = GET_MODE (folded_arg);
3252 switch (GET_CODE (folded_arg))
3257 const_arg = equiv_constant (folded_arg);
3267 const_arg = folded_arg;
3272 folded_arg = prev_insn_cc0;
3273 mode_arg = prev_insn_cc0_mode;
3274 const_arg = equiv_constant (folded_arg);
3279 folded_arg = fold_rtx (folded_arg, insn);
3280 const_arg = equiv_constant (folded_arg);
3284 /* For the first three operands, see if the operand
3285 is constant or equivalent to a constant. */
3289 folded_arg0 = folded_arg;
3290 const_arg0 = const_arg;
3291 mode_arg0 = mode_arg;
3294 folded_arg1 = folded_arg;
3295 const_arg1 = const_arg;
3298 const_arg2 = const_arg;
3302 /* Pick the least expensive of the argument and an equivalent constant
3305 && const_arg != folded_arg
3306 && COST_IN (const_arg, code) <= COST_IN (folded_arg, code)
3308 /* It's not safe to substitute the operand of a conversion
3309 operator with a constant, as the conversion's identity
3310 depends upon the mode of its operand. This optimization
3311 is handled by the call to simplify_unary_operation. */
3312 && (GET_RTX_CLASS (code) != RTX_UNARY
3313 || GET_MODE (const_arg) == mode_arg0
3314 || (code != ZERO_EXTEND
3315 && code != SIGN_EXTEND
3317 && code != FLOAT_TRUNCATE
3318 && code != FLOAT_EXTEND
3321 && code != UNSIGNED_FLOAT
3322 && code != UNSIGNED_FIX)))
3323 folded_arg = const_arg;
3325 if (folded_arg == XEXP (x, i))
3328 if (insn == NULL_RTX && !changed)
3331 validate_unshare_change (insn, &XEXP (x, i), folded_arg, 1);
3336 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3337 consistent with the order in X. */
3338 if (canonicalize_change_group (insn, x))
3341 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3342 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3345 apply_change_group ();
3348 /* If X is an arithmetic operation, see if we can simplify it. */
3350 switch (GET_RTX_CLASS (code))
3354 /* We can't simplify extension ops unless we know the
3356 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3357 && mode_arg0 == VOIDmode)
3360 new_rtx = simplify_unary_operation (code, mode,
3361 const_arg0 ? const_arg0 : folded_arg0,
3367 case RTX_COMM_COMPARE:
3368 /* See what items are actually being compared and set FOLDED_ARG[01]
3369 to those values and CODE to the actual comparison code. If any are
3370 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3371 do anything if both operands are already known to be constant. */
3373 /* ??? Vector mode comparisons are not supported yet. */
3374 if (VECTOR_MODE_P (mode))
3377 if (const_arg0 == 0 || const_arg1 == 0)
3379 struct table_elt *p0, *p1;
3380 rtx true_rtx, false_rtx;
3381 enum machine_mode mode_arg1;
3383 if (SCALAR_FLOAT_MODE_P (mode))
3385 #ifdef FLOAT_STORE_FLAG_VALUE
3386 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3387 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3389 true_rtx = NULL_RTX;
3391 false_rtx = CONST0_RTX (mode);
3395 true_rtx = const_true_rtx;
3396 false_rtx = const0_rtx;
3399 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3400 &mode_arg0, &mode_arg1);
3402 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3403 what kinds of things are being compared, so we can't do
3404 anything with this comparison. */
3406 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3409 const_arg0 = equiv_constant (folded_arg0);
3410 const_arg1 = equiv_constant (folded_arg1);
3412 /* If we do not now have two constants being compared, see
3413 if we can nevertheless deduce some things about the
3415 if (const_arg0 == 0 || const_arg1 == 0)
3417 if (const_arg1 != NULL)
3419 rtx cheapest_simplification;
3422 struct table_elt *p;
3424 /* See if we can find an equivalent of folded_arg0
3425 that gets us a cheaper expression, possibly a
3426 constant through simplifications. */
3427 p = lookup (folded_arg0, SAFE_HASH (folded_arg0, mode_arg0),
3432 cheapest_simplification = x;
3433 cheapest_cost = COST (x);
3435 for (p = p->first_same_value; p != NULL; p = p->next_same_value)
3439 /* If the entry isn't valid, skip it. */
3440 if (! exp_equiv_p (p->exp, p->exp, 1, false))
3443 /* Try to simplify using this equivalence. */
3445 = simplify_relational_operation (code, mode,
3450 if (simp_result == NULL)
3453 cost = COST (simp_result);
3454 if (cost < cheapest_cost)
3456 cheapest_cost = cost;
3457 cheapest_simplification = simp_result;
3461 /* If we have a cheaper expression now, use that
3462 and try folding it further, from the top. */
3463 if (cheapest_simplification != x)
3464 return fold_rtx (copy_rtx (cheapest_simplification),
3469 /* See if the two operands are the same. */
3471 if ((REG_P (folded_arg0)
3472 && REG_P (folded_arg1)
3473 && (REG_QTY (REGNO (folded_arg0))
3474 == REG_QTY (REGNO (folded_arg1))))
3475 || ((p0 = lookup (folded_arg0,
3476 SAFE_HASH (folded_arg0, mode_arg0),
3478 && (p1 = lookup (folded_arg1,
3479 SAFE_HASH (folded_arg1, mode_arg0),
3481 && p0->first_same_value == p1->first_same_value))
3482 folded_arg1 = folded_arg0;
3484 /* If FOLDED_ARG0 is a register, see if the comparison we are
3485 doing now is either the same as we did before or the reverse
3486 (we only check the reverse if not floating-point). */
3487 else if (REG_P (folded_arg0))
3489 int qty = REG_QTY (REGNO (folded_arg0));
3491 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3493 struct qty_table_elem *ent = &qty_table[qty];
3495 if ((comparison_dominates_p (ent->comparison_code, code)
3496 || (! FLOAT_MODE_P (mode_arg0)
3497 && comparison_dominates_p (ent->comparison_code,
3498 reverse_condition (code))))
3499 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3501 && rtx_equal_p (ent->comparison_const,
3503 || (REG_P (folded_arg1)
3504 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3506 if (comparison_dominates_p (ent->comparison_code, code))
3521 /* If we are comparing against zero, see if the first operand is
3522 equivalent to an IOR with a constant. If so, we may be able to
3523 determine the result of this comparison. */
3524 if (const_arg1 == const0_rtx && !const_arg0)
3526 rtx y = lookup_as_function (folded_arg0, IOR);
3530 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3531 && CONST_INT_P (inner_const)
3532 && INTVAL (inner_const) != 0)
3533 folded_arg0 = gen_rtx_IOR (mode_arg0, XEXP (y, 0), inner_const);
3537 rtx op0 = const_arg0 ? const_arg0 : folded_arg0;
3538 rtx op1 = const_arg1 ? const_arg1 : folded_arg1;
3539 new_rtx = simplify_relational_operation (code, mode, mode_arg0, op0, op1);
3544 case RTX_COMM_ARITH:
3548 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3549 with that LABEL_REF as its second operand. If so, the result is
3550 the first operand of that MINUS. This handles switches with an
3551 ADDR_DIFF_VEC table. */
3552 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3555 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3556 : lookup_as_function (folded_arg0, MINUS);
3558 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3559 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3562 /* Now try for a CONST of a MINUS like the above. */
3563 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3564 : lookup_as_function (folded_arg0, CONST))) != 0
3565 && GET_CODE (XEXP (y, 0)) == MINUS
3566 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3567 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
3568 return XEXP (XEXP (y, 0), 0);
3571 /* Likewise if the operands are in the other order. */
3572 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3575 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3576 : lookup_as_function (folded_arg1, MINUS);
3578 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3579 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3582 /* Now try for a CONST of a MINUS like the above. */
3583 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3584 : lookup_as_function (folded_arg1, CONST))) != 0
3585 && GET_CODE (XEXP (y, 0)) == MINUS
3586 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3587 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
3588 return XEXP (XEXP (y, 0), 0);
3591 /* If second operand is a register equivalent to a negative
3592 CONST_INT, see if we can find a register equivalent to the
3593 positive constant. Make a MINUS if so. Don't do this for
3594 a non-negative constant since we might then alternate between
3595 choosing positive and negative constants. Having the positive
3596 constant previously-used is the more common case. Be sure
3597 the resulting constant is non-negative; if const_arg1 were
3598 the smallest negative number this would overflow: depending
3599 on the mode, this would either just be the same value (and
3600 hence not save anything) or be incorrect. */
3601 if (const_arg1 != 0 && CONST_INT_P (const_arg1)
3602 && INTVAL (const_arg1) < 0
3603 /* This used to test
3605 -INTVAL (const_arg1) >= 0
3607 But The Sun V5.0 compilers mis-compiled that test. So
3608 instead we test for the problematic value in a more direct
3609 manner and hope the Sun compilers get it correct. */
3610 && INTVAL (const_arg1) !=
3611 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3612 && REG_P (folded_arg1))
3614 rtx new_const = GEN_INT (-INTVAL (const_arg1));
3616 = lookup (new_const, SAFE_HASH (new_const, mode), mode);
3619 for (p = p->first_same_value; p; p = p->next_same_value)
3621 return simplify_gen_binary (MINUS, mode, folded_arg0,
3622 canon_reg (p->exp, NULL_RTX));
3627 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3628 If so, produce (PLUS Z C2-C). */
3629 if (const_arg1 != 0 && CONST_INT_P (const_arg1))
3631 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3632 if (y && CONST_INT_P (XEXP (y, 1)))
3633 return fold_rtx (plus_constant (copy_rtx (y),
3634 -INTVAL (const_arg1)),
3641 case SMIN: case SMAX: case UMIN: case UMAX:
3642 case IOR: case AND: case XOR:
3644 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3645 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3646 is known to be of similar form, we may be able to replace the
3647 operation with a combined operation. This may eliminate the
3648 intermediate operation if every use is simplified in this way.
3649 Note that the similar optimization done by combine.c only works
3650 if the intermediate operation's result has only one reference. */
3652 if (REG_P (folded_arg0)
3653 && const_arg1 && CONST_INT_P (const_arg1))
3656 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3657 rtx y, inner_const, new_const;
3658 rtx canon_const_arg1 = const_arg1;
3659 enum rtx_code associate_code;
3662 && (INTVAL (const_arg1) >= GET_MODE_BITSIZE (mode)
3663 || INTVAL (const_arg1) < 0))
3665 if (SHIFT_COUNT_TRUNCATED)
3666 canon_const_arg1 = GEN_INT (INTVAL (const_arg1)
3667 & (GET_MODE_BITSIZE (mode)
3673 y = lookup_as_function (folded_arg0, code);
3677 /* If we have compiled a statement like
3678 "if (x == (x & mask1))", and now are looking at
3679 "x & mask2", we will have a case where the first operand
3680 of Y is the same as our first operand. Unless we detect
3681 this case, an infinite loop will result. */
3682 if (XEXP (y, 0) == folded_arg0)
3685 inner_const = equiv_constant (fold_rtx (XEXP (y, 1), 0));
3686 if (!inner_const || !CONST_INT_P (inner_const))
3689 /* Don't associate these operations if they are a PLUS with the
3690 same constant and it is a power of two. These might be doable
3691 with a pre- or post-increment. Similarly for two subtracts of
3692 identical powers of two with post decrement. */
3694 if (code == PLUS && const_arg1 == inner_const
3695 && ((HAVE_PRE_INCREMENT
3696 && exact_log2 (INTVAL (const_arg1)) >= 0)
3697 || (HAVE_POST_INCREMENT
3698 && exact_log2 (INTVAL (const_arg1)) >= 0)
3699 || (HAVE_PRE_DECREMENT
3700 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3701 || (HAVE_POST_DECREMENT
3702 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3705 /* ??? Vector mode shifts by scalar
3706 shift operand are not supported yet. */
3707 if (is_shift && VECTOR_MODE_P (mode))
3711 && (INTVAL (inner_const) >= GET_MODE_BITSIZE (mode)
3712 || INTVAL (inner_const) < 0))
3714 if (SHIFT_COUNT_TRUNCATED)
3715 inner_const = GEN_INT (INTVAL (inner_const)
3716 & (GET_MODE_BITSIZE (mode) - 1));
3721 /* Compute the code used to compose the constants. For example,
3722 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3724 associate_code = (is_shift || code == MINUS ? PLUS : code);
3726 new_const = simplify_binary_operation (associate_code, mode,
3733 /* If we are associating shift operations, don't let this
3734 produce a shift of the size of the object or larger.
3735 This could occur when we follow a sign-extend by a right
3736 shift on a machine that does a sign-extend as a pair
3740 && CONST_INT_P (new_const)
3741 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3743 /* As an exception, we can turn an ASHIFTRT of this
3744 form into a shift of the number of bits - 1. */
3745 if (code == ASHIFTRT)
3746 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3747 else if (!side_effects_p (XEXP (y, 0)))
3748 return CONST0_RTX (mode);
3753 y = copy_rtx (XEXP (y, 0));
3755 /* If Y contains our first operand (the most common way this
3756 can happen is if Y is a MEM), we would do into an infinite
3757 loop if we tried to fold it. So don't in that case. */
3759 if (! reg_mentioned_p (folded_arg0, y))
3760 y = fold_rtx (y, insn);
3762 return simplify_gen_binary (code, mode, y, new_const);
3766 case DIV: case UDIV:
3767 /* ??? The associative optimization performed immediately above is
3768 also possible for DIV and UDIV using associate_code of MULT.
3769 However, we would need extra code to verify that the
3770 multiplication does not overflow, that is, there is no overflow
3771 in the calculation of new_const. */
3778 new_rtx = simplify_binary_operation (code, mode,
3779 const_arg0 ? const_arg0 : folded_arg0,
3780 const_arg1 ? const_arg1 : folded_arg1);
3784 /* (lo_sum (high X) X) is simply X. */
3785 if (code == LO_SUM && const_arg0 != 0
3786 && GET_CODE (const_arg0) == HIGH
3787 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3792 case RTX_BITFIELD_OPS:
3793 new_rtx = simplify_ternary_operation (code, mode, mode_arg0,
3794 const_arg0 ? const_arg0 : folded_arg0,
3795 const_arg1 ? const_arg1 : folded_arg1,
3796 const_arg2 ? const_arg2 : XEXP (x, 2));
3803 return new_rtx ? new_rtx : x;
3806 /* Return a constant value currently equivalent to X.
3807 Return 0 if we don't know one. */
3810 equiv_constant (rtx x)
3813 && REGNO_QTY_VALID_P (REGNO (x)))
3815 int x_q = REG_QTY (REGNO (x));
3816 struct qty_table_elem *x_ent = &qty_table[x_q];
3818 if (x_ent->const_rtx)
3819 x = gen_lowpart (GET_MODE (x), x_ent->const_rtx);
3822 if (x == 0 || CONSTANT_P (x))
3825 if (GET_CODE (x) == SUBREG)
3827 enum machine_mode mode = GET_MODE (x);
3828 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3831 /* See if we previously assigned a constant value to this SUBREG. */
3832 if ((new_rtx = lookup_as_function (x, CONST_INT)) != 0
3833 || (new_rtx = lookup_as_function (x, CONST_DOUBLE)) != 0
3834 || (new_rtx = lookup_as_function (x, CONST_FIXED)) != 0)
3837 /* If we didn't and if doing so makes sense, see if we previously
3838 assigned a constant value to the enclosing word mode SUBREG. */
3839 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)
3840 && GET_MODE_SIZE (word_mode) < GET_MODE_SIZE (imode))
3842 int byte = SUBREG_BYTE (x) - subreg_lowpart_offset (mode, word_mode);
3843 if (byte >= 0 && (byte % UNITS_PER_WORD) == 0)
3845 rtx y = gen_rtx_SUBREG (word_mode, SUBREG_REG (x), byte);
3846 new_rtx = lookup_as_function (y, CONST_INT);
3848 return gen_lowpart (mode, new_rtx);
3852 /* Otherwise see if we already have a constant for the inner REG. */
3853 if (REG_P (SUBREG_REG (x))
3854 && (new_rtx = equiv_constant (SUBREG_REG (x))) != 0)
3855 return simplify_subreg (mode, new_rtx, imode, SUBREG_BYTE (x));
3860 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3861 the hash table in case its value was seen before. */
3865 struct table_elt *elt;
3867 x = avoid_constant_pool_reference (x);
3871 elt = lookup (x, SAFE_HASH (x, GET_MODE (x)), GET_MODE (x));
3875 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3876 if (elt->is_const && CONSTANT_P (elt->exp))
3883 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3886 In certain cases, this can cause us to add an equivalence. For example,
3887 if we are following the taken case of
3889 we can add the fact that `i' and '2' are now equivalent.
3891 In any case, we can record that this comparison was passed. If the same
3892 comparison is seen later, we will know its value. */
3895 record_jump_equiv (rtx insn, bool taken)
3897 int cond_known_true;
3900 enum machine_mode mode, mode0, mode1;
3901 int reversed_nonequality = 0;
3904 /* Ensure this is the right kind of insn. */
3905 gcc_assert (any_condjump_p (insn));
3907 set = pc_set (insn);
3909 /* See if this jump condition is known true or false. */
3911 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
3913 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
3915 /* Get the type of comparison being done and the operands being compared.
3916 If we had to reverse a non-equality condition, record that fact so we
3917 know that it isn't valid for floating-point. */
3918 code = GET_CODE (XEXP (SET_SRC (set), 0));
3919 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
3920 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
3922 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
3923 if (! cond_known_true)
3925 code = reversed_comparison_code_parts (code, op0, op1, insn);
3927 /* Don't remember if we can't find the inverse. */
3928 if (code == UNKNOWN)
3932 /* The mode is the mode of the non-constant. */
3934 if (mode1 != VOIDmode)
3937 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
3940 /* Yet another form of subreg creation. In this case, we want something in
3941 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3944 record_jump_cond_subreg (enum machine_mode mode, rtx op)
3946 enum machine_mode op_mode = GET_MODE (op);
3947 if (op_mode == mode || op_mode == VOIDmode)
3949 return lowpart_subreg (mode, op, op_mode);
3952 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3953 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3954 Make any useful entries we can with that information. Called from
3955 above function and called recursively. */
3958 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
3959 rtx op1, int reversed_nonequality)
3961 unsigned op0_hash, op1_hash;
3962 int op0_in_memory, op1_in_memory;
3963 struct table_elt *op0_elt, *op1_elt;
3965 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3966 we know that they are also equal in the smaller mode (this is also
3967 true for all smaller modes whether or not there is a SUBREG, but
3968 is not worth testing for with no SUBREG). */
3970 /* Note that GET_MODE (op0) may not equal MODE. */
3971 if (code == EQ && GET_CODE (op0) == SUBREG
3972 && (GET_MODE_SIZE (GET_MODE (op0))
3973 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
3975 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
3976 rtx tem = record_jump_cond_subreg (inner_mode, op1);
3978 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
3979 reversed_nonequality);
3982 if (code == EQ && GET_CODE (op1) == SUBREG
3983 && (GET_MODE_SIZE (GET_MODE (op1))
3984 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
3986 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
3987 rtx tem = record_jump_cond_subreg (inner_mode, op0);
3989 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
3990 reversed_nonequality);
3993 /* Similarly, if this is an NE comparison, and either is a SUBREG
3994 making a smaller mode, we know the whole thing is also NE. */
3996 /* Note that GET_MODE (op0) may not equal MODE;
3997 if we test MODE instead, we can get an infinite recursion
3998 alternating between two modes each wider than MODE. */
4000 if (code == NE && GET_CODE (op0) == SUBREG
4001 && subreg_lowpart_p (op0)
4002 && (GET_MODE_SIZE (GET_MODE (op0))
4003 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4005 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4006 rtx tem = record_jump_cond_subreg (inner_mode, op1);
4008 record_jump_cond (code, mode, SUBREG_REG (op0), tem,
4009 reversed_nonequality);
4012 if (code == NE && GET_CODE (op1) == SUBREG
4013 && subreg_lowpart_p (op1)
4014 && (GET_MODE_SIZE (GET_MODE (op1))
4015 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4017 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4018 rtx tem = record_jump_cond_subreg (inner_mode, op0);
4020 record_jump_cond (code, mode, SUBREG_REG (op1), tem,
4021 reversed_nonequality);
4024 /* Hash both operands. */
4027 hash_arg_in_memory = 0;
4028 op0_hash = HASH (op0, mode);
4029 op0_in_memory = hash_arg_in_memory;
4035 hash_arg_in_memory = 0;
4036 op1_hash = HASH (op1, mode);
4037 op1_in_memory = hash_arg_in_memory;
4042 /* Look up both operands. */
4043 op0_elt = lookup (op0, op0_hash, mode);
4044 op1_elt = lookup (op1, op1_hash, mode);
4046 /* If both operands are already equivalent or if they are not in the
4047 table but are identical, do nothing. */
4048 if ((op0_elt != 0 && op1_elt != 0
4049 && op0_elt->first_same_value == op1_elt->first_same_value)
4050 || op0 == op1 || rtx_equal_p (op0, op1))
4053 /* If we aren't setting two things equal all we can do is save this
4054 comparison. Similarly if this is floating-point. In the latter
4055 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4056 If we record the equality, we might inadvertently delete code
4057 whose intent was to change -0 to +0. */
4059 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4061 struct qty_table_elem *ent;
4064 /* If we reversed a floating-point comparison, if OP0 is not a
4065 register, or if OP1 is neither a register or constant, we can't
4069 op1 = equiv_constant (op1);
4071 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4072 || !REG_P (op0) || op1 == 0)
4075 /* Put OP0 in the hash table if it isn't already. This gives it a
4076 new quantity number. */
4079 if (insert_regs (op0, NULL, 0))
4081 rehash_using_reg (op0);
4082 op0_hash = HASH (op0, mode);
4084 /* If OP0 is contained in OP1, this changes its hash code
4085 as well. Faster to rehash than to check, except
4086 for the simple case of a constant. */
4087 if (! CONSTANT_P (op1))
4088 op1_hash = HASH (op1,mode);
4091 op0_elt = insert (op0, NULL, op0_hash, mode);
4092 op0_elt->in_memory = op0_in_memory;
4095 qty = REG_QTY (REGNO (op0));
4096 ent = &qty_table[qty];
4098 ent->comparison_code = code;
4101 /* Look it up again--in case op0 and op1 are the same. */
4102 op1_elt = lookup (op1, op1_hash, mode);
4104 /* Put OP1 in the hash table so it gets a new quantity number. */
4107 if (insert_regs (op1, NULL, 0))
4109 rehash_using_reg (op1);
4110 op1_hash = HASH (op1, mode);
4113 op1_elt = insert (op1, NULL, op1_hash, mode);
4114 op1_elt->in_memory = op1_in_memory;
4117 ent->comparison_const = NULL_RTX;
4118 ent->comparison_qty = REG_QTY (REGNO (op1));
4122 ent->comparison_const = op1;
4123 ent->comparison_qty = -1;
4129 /* If either side is still missing an equivalence, make it now,
4130 then merge the equivalences. */
4134 if (insert_regs (op0, NULL, 0))
4136 rehash_using_reg (op0);
4137 op0_hash = HASH (op0, mode);
4140 op0_elt = insert (op0, NULL, op0_hash, mode);
4141 op0_elt->in_memory = op0_in_memory;
4146 if (insert_regs (op1, NULL, 0))
4148 rehash_using_reg (op1);
4149 op1_hash = HASH (op1, mode);
4152 op1_elt = insert (op1, NULL, op1_hash, mode);
4153 op1_elt->in_memory = op1_in_memory;
4156 merge_equiv_classes (op0_elt, op1_elt);
4159 /* CSE processing for one instruction.
4160 First simplify sources and addresses of all assignments
4161 in the instruction, using previously-computed equivalents values.
4162 Then install the new sources and destinations in the table
4163 of available values. */
4165 /* Data on one SET contained in the instruction. */
4169 /* The SET rtx itself. */
4171 /* The SET_SRC of the rtx (the original value, if it is changing). */
4173 /* The hash-table element for the SET_SRC of the SET. */
4174 struct table_elt *src_elt;
4175 /* Hash value for the SET_SRC. */
4177 /* Hash value for the SET_DEST. */
4179 /* The SET_DEST, with SUBREG, etc., stripped. */
4181 /* Nonzero if the SET_SRC is in memory. */
4183 /* Nonzero if the SET_SRC contains something
4184 whose value cannot be predicted and understood. */
4186 /* Original machine mode, in case it becomes a CONST_INT.
4187 The size of this field should match the size of the mode
4188 field of struct rtx_def (see rtl.h). */
4189 ENUM_BITFIELD(machine_mode) mode : 8;
4190 /* A constant equivalent for SET_SRC, if any. */
4192 /* Hash value of constant equivalent for SET_SRC. */
4193 unsigned src_const_hash;
4194 /* Table entry for constant equivalent for SET_SRC, if any. */
4195 struct table_elt *src_const_elt;
4196 /* Table entry for the destination address. */
4197 struct table_elt *dest_addr_elt;
4203 rtx x = PATTERN (insn);
4209 struct table_elt *src_eqv_elt = 0;
4210 int src_eqv_volatile = 0;
4211 int src_eqv_in_memory = 0;
4212 unsigned src_eqv_hash = 0;
4214 struct set *sets = (struct set *) 0;
4218 /* Records what this insn does to set CC0. */
4220 this_insn_cc0_mode = VOIDmode;
4223 /* Find all the SETs and CLOBBERs in this instruction.
4224 Record all the SETs in the array `set' and count them.
4225 Also determine whether there is a CLOBBER that invalidates
4226 all memory references, or all references at varying addresses. */
4230 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4232 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4233 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4234 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4238 if (GET_CODE (x) == SET)
4240 sets = XALLOCA (struct set);
4243 /* Ignore SETs that are unconditional jumps.
4244 They never need cse processing, so this does not hurt.
4245 The reason is not efficiency but rather
4246 so that we can test at the end for instructions
4247 that have been simplified to unconditional jumps
4248 and not be misled by unchanged instructions
4249 that were unconditional jumps to begin with. */
4250 if (SET_DEST (x) == pc_rtx
4251 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4254 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4255 The hard function value register is used only once, to copy to
4256 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4257 Ensure we invalidate the destination register. On the 80386 no
4258 other code would invalidate it since it is a fixed_reg.
4259 We need not check the return of apply_change_group; see canon_reg. */
4261 else if (GET_CODE (SET_SRC (x)) == CALL)
4263 canon_reg (SET_SRC (x), insn);
4264 apply_change_group ();
4265 fold_rtx (SET_SRC (x), insn);
4266 invalidate (SET_DEST (x), VOIDmode);
4271 else if (GET_CODE (x) == PARALLEL)
4273 int lim = XVECLEN (x, 0);
4275 sets = XALLOCAVEC (struct set, lim);
4277 /* Find all regs explicitly clobbered in this insn,
4278 and ensure they are not replaced with any other regs
4279 elsewhere in this insn.
4280 When a reg that is clobbered is also used for input,
4281 we should presume that that is for a reason,
4282 and we should not substitute some other register
4283 which is not supposed to be clobbered.
4284 Therefore, this loop cannot be merged into the one below
4285 because a CALL may precede a CLOBBER and refer to the
4286 value clobbered. We must not let a canonicalization do
4287 anything in that case. */
4288 for (i = 0; i < lim; i++)
4290 rtx y = XVECEXP (x, 0, i);
4291 if (GET_CODE (y) == CLOBBER)
4293 rtx clobbered = XEXP (y, 0);
4295 if (REG_P (clobbered)
4296 || GET_CODE (clobbered) == SUBREG)
4297 invalidate (clobbered, VOIDmode);
4298 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4299 || GET_CODE (clobbered) == ZERO_EXTRACT)
4300 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4304 for (i = 0; i < lim; i++)
4306 rtx y = XVECEXP (x, 0, i);
4307 if (GET_CODE (y) == SET)
4309 /* As above, we ignore unconditional jumps and call-insns and
4310 ignore the result of apply_change_group. */
4311 if (GET_CODE (SET_SRC (y)) == CALL)
4313 canon_reg (SET_SRC (y), insn);
4314 apply_change_group ();
4315 fold_rtx (SET_SRC (y), insn);
4316 invalidate (SET_DEST (y), VOIDmode);
4318 else if (SET_DEST (y) == pc_rtx
4319 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4322 sets[n_sets++].rtl = y;
4324 else if (GET_CODE (y) == CLOBBER)
4326 /* If we clobber memory, canon the address.
4327 This does nothing when a register is clobbered
4328 because we have already invalidated the reg. */
4329 if (MEM_P (XEXP (y, 0)))
4330 canon_reg (XEXP (y, 0), insn);
4332 else if (GET_CODE (y) == USE
4333 && ! (REG_P (XEXP (y, 0))
4334 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4335 canon_reg (y, insn);
4336 else if (GET_CODE (y) == CALL)
4338 /* The result of apply_change_group can be ignored; see
4340 canon_reg (y, insn);
4341 apply_change_group ();
4346 else if (GET_CODE (x) == CLOBBER)
4348 if (MEM_P (XEXP (x, 0)))
4349 canon_reg (XEXP (x, 0), insn);
4351 /* Canonicalize a USE of a pseudo register or memory location. */
4352 else if (GET_CODE (x) == USE
4353 && ! (REG_P (XEXP (x, 0))
4354 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4355 canon_reg (x, insn);
4356 else if (GET_CODE (x) == ASM_OPERANDS)
4358 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
4360 rtx input = ASM_OPERANDS_INPUT (x, i);
4361 if (!(REG_P (input) && REGNO (input) < FIRST_PSEUDO_REGISTER))
4363 input = canon_reg (input, insn);
4364 validate_change (insn, &ASM_OPERANDS_INPUT (x, i), input, 1);
4368 else if (GET_CODE (x) == CALL)
4370 /* The result of apply_change_group can be ignored; see canon_reg. */
4371 canon_reg (x, insn);
4372 apply_change_group ();
4375 else if (DEBUG_INSN_P (insn))
4376 canon_reg (PATTERN (insn), insn);
4378 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4379 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4380 is handled specially for this case, and if it isn't set, then there will
4381 be no equivalence for the destination. */
4382 if (n_sets == 1 && REG_NOTES (insn) != 0
4383 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4384 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4385 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4387 /* The result of apply_change_group can be ignored; see canon_reg. */
4388 canon_reg (XEXP (tem, 0), insn);
4389 apply_change_group ();
4390 src_eqv = fold_rtx (XEXP (tem, 0), insn);
4391 XEXP (tem, 0) = copy_rtx (src_eqv);
4392 df_notes_rescan (insn);
4395 /* Canonicalize sources and addresses of destinations.
4396 We do this in a separate pass to avoid problems when a MATCH_DUP is
4397 present in the insn pattern. In that case, we want to ensure that
4398 we don't break the duplicate nature of the pattern. So we will replace
4399 both operands at the same time. Otherwise, we would fail to find an
4400 equivalent substitution in the loop calling validate_change below.
4402 We used to suppress canonicalization of DEST if it appears in SRC,
4403 but we don't do this any more. */
4405 for (i = 0; i < n_sets; i++)
4407 rtx dest = SET_DEST (sets[i].rtl);
4408 rtx src = SET_SRC (sets[i].rtl);
4409 rtx new_rtx = canon_reg (src, insn);
4411 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
4413 if (GET_CODE (dest) == ZERO_EXTRACT)
4415 validate_change (insn, &XEXP (dest, 1),
4416 canon_reg (XEXP (dest, 1), insn), 1);
4417 validate_change (insn, &XEXP (dest, 2),
4418 canon_reg (XEXP (dest, 2), insn), 1);
4421 while (GET_CODE (dest) == SUBREG
4422 || GET_CODE (dest) == ZERO_EXTRACT
4423 || GET_CODE (dest) == STRICT_LOW_PART)
4424 dest = XEXP (dest, 0);
4427 canon_reg (dest, insn);
4430 /* Now that we have done all the replacements, we can apply the change
4431 group and see if they all work. Note that this will cause some
4432 canonicalizations that would have worked individually not to be applied
4433 because some other canonicalization didn't work, but this should not
4436 The result of apply_change_group can be ignored; see canon_reg. */
4438 apply_change_group ();
4440 /* Set sets[i].src_elt to the class each source belongs to.
4441 Detect assignments from or to volatile things
4442 and set set[i] to zero so they will be ignored
4443 in the rest of this function.
4445 Nothing in this loop changes the hash table or the register chains. */
4447 for (i = 0; i < n_sets; i++)
4449 bool repeat = false;
4452 struct table_elt *elt = 0, *p;
4453 enum machine_mode mode;
4456 rtx src_related = 0;
4457 bool src_related_is_const_anchor = false;
4458 struct table_elt *src_const_elt = 0;
4459 int src_cost = MAX_COST;
4460 int src_eqv_cost = MAX_COST;
4461 int src_folded_cost = MAX_COST;
4462 int src_related_cost = MAX_COST;
4463 int src_elt_cost = MAX_COST;
4464 int src_regcost = MAX_COST;
4465 int src_eqv_regcost = MAX_COST;
4466 int src_folded_regcost = MAX_COST;
4467 int src_related_regcost = MAX_COST;
4468 int src_elt_regcost = MAX_COST;
4469 /* Set nonzero if we need to call force_const_mem on with the
4470 contents of src_folded before using it. */
4471 int src_folded_force_flag = 0;
4473 dest = SET_DEST (sets[i].rtl);
4474 src = SET_SRC (sets[i].rtl);
4476 /* If SRC is a constant that has no machine mode,
4477 hash it with the destination's machine mode.
4478 This way we can keep different modes separate. */
4480 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4481 sets[i].mode = mode;
4485 enum machine_mode eqvmode = mode;
4486 if (GET_CODE (dest) == STRICT_LOW_PART)
4487 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4489 hash_arg_in_memory = 0;
4490 src_eqv_hash = HASH (src_eqv, eqvmode);
4492 /* Find the equivalence class for the equivalent expression. */
4495 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4497 src_eqv_volatile = do_not_record;
4498 src_eqv_in_memory = hash_arg_in_memory;
4501 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4502 value of the INNER register, not the destination. So it is not
4503 a valid substitution for the source. But save it for later. */
4504 if (GET_CODE (dest) == STRICT_LOW_PART)
4507 src_eqv_here = src_eqv;
4509 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4510 simplified result, which may not necessarily be valid. */
4511 src_folded = fold_rtx (src, insn);
4514 /* ??? This caused bad code to be generated for the m68k port with -O2.
4515 Suppose src is (CONST_INT -1), and that after truncation src_folded
4516 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4517 At the end we will add src and src_const to the same equivalence
4518 class. We now have 3 and -1 on the same equivalence class. This
4519 causes later instructions to be mis-optimized. */
4520 /* If storing a constant in a bitfield, pre-truncate the constant
4521 so we will be able to record it later. */
4522 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
4524 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4526 if (CONST_INT_P (src)
4527 && CONST_INT_P (width)
4528 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4529 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4531 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4532 << INTVAL (width)) - 1));
4536 /* Compute SRC's hash code, and also notice if it
4537 should not be recorded at all. In that case,
4538 prevent any further processing of this assignment. */
4540 hash_arg_in_memory = 0;
4543 sets[i].src_hash = HASH (src, mode);
4544 sets[i].src_volatile = do_not_record;
4545 sets[i].src_in_memory = hash_arg_in_memory;
4547 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4548 a pseudo, do not record SRC. Using SRC as a replacement for
4549 anything else will be incorrect in that situation. Note that
4550 this usually occurs only for stack slots, in which case all the
4551 RTL would be referring to SRC, so we don't lose any optimization
4552 opportunities by not having SRC in the hash table. */
4555 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
4557 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
4558 sets[i].src_volatile = 1;
4561 /* It is no longer clear why we used to do this, but it doesn't
4562 appear to still be needed. So let's try without it since this
4563 code hurts cse'ing widened ops. */
4564 /* If source is a paradoxical subreg (such as QI treated as an SI),
4565 treat it as volatile. It may do the work of an SI in one context
4566 where the extra bits are not being used, but cannot replace an SI
4568 if (GET_CODE (src) == SUBREG
4569 && (GET_MODE_SIZE (GET_MODE (src))
4570 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4571 sets[i].src_volatile = 1;
4574 /* Locate all possible equivalent forms for SRC. Try to replace
4575 SRC in the insn with each cheaper equivalent.
4577 We have the following types of equivalents: SRC itself, a folded
4578 version, a value given in a REG_EQUAL note, or a value related
4581 Each of these equivalents may be part of an additional class
4582 of equivalents (if more than one is in the table, they must be in
4583 the same class; we check for this).
4585 If the source is volatile, we don't do any table lookups.
4587 We note any constant equivalent for possible later use in a
4590 if (!sets[i].src_volatile)
4591 elt = lookup (src, sets[i].src_hash, mode);
4593 sets[i].src_elt = elt;
4595 if (elt && src_eqv_here && src_eqv_elt)
4597 if (elt->first_same_value != src_eqv_elt->first_same_value)
4599 /* The REG_EQUAL is indicating that two formerly distinct
4600 classes are now equivalent. So merge them. */
4601 merge_equiv_classes (elt, src_eqv_elt);
4602 src_eqv_hash = HASH (src_eqv, elt->mode);
4603 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4609 else if (src_eqv_elt)
4612 /* Try to find a constant somewhere and record it in `src_const'.
4613 Record its table element, if any, in `src_const_elt'. Look in
4614 any known equivalences first. (If the constant is not in the
4615 table, also set `sets[i].src_const_hash'). */
4617 for (p = elt->first_same_value; p; p = p->next_same_value)
4621 src_const_elt = elt;
4626 && (CONSTANT_P (src_folded)
4627 /* Consider (minus (label_ref L1) (label_ref L2)) as
4628 "constant" here so we will record it. This allows us
4629 to fold switch statements when an ADDR_DIFF_VEC is used. */
4630 || (GET_CODE (src_folded) == MINUS
4631 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4632 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4633 src_const = src_folded, src_const_elt = elt;
4634 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4635 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4637 /* If we don't know if the constant is in the table, get its
4638 hash code and look it up. */
4639 if (src_const && src_const_elt == 0)
4641 sets[i].src_const_hash = HASH (src_const, mode);
4642 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4645 sets[i].src_const = src_const;
4646 sets[i].src_const_elt = src_const_elt;
4648 /* If the constant and our source are both in the table, mark them as
4649 equivalent. Otherwise, if a constant is in the table but the source
4650 isn't, set ELT to it. */
4651 if (src_const_elt && elt
4652 && src_const_elt->first_same_value != elt->first_same_value)
4653 merge_equiv_classes (elt, src_const_elt);
4654 else if (src_const_elt && elt == 0)
4655 elt = src_const_elt;
4657 /* See if there is a register linearly related to a constant
4658 equivalent of SRC. */
4660 && (GET_CODE (src_const) == CONST
4661 || (src_const_elt && src_const_elt->related_value != 0)))
4663 src_related = use_related_value (src_const, src_const_elt);
4666 struct table_elt *src_related_elt
4667 = lookup (src_related, HASH (src_related, mode), mode);
4668 if (src_related_elt && elt)
4670 if (elt->first_same_value
4671 != src_related_elt->first_same_value)
4672 /* This can occur when we previously saw a CONST
4673 involving a SYMBOL_REF and then see the SYMBOL_REF
4674 twice. Merge the involved classes. */
4675 merge_equiv_classes (elt, src_related_elt);
4678 src_related_elt = 0;
4680 else if (src_related_elt && elt == 0)
4681 elt = src_related_elt;
4685 /* See if we have a CONST_INT that is already in a register in a
4688 if (src_const && src_related == 0 && CONST_INT_P (src_const)
4689 && GET_MODE_CLASS (mode) == MODE_INT
4690 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4692 enum machine_mode wider_mode;
4694 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4695 wider_mode != VOIDmode
4696 && GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4697 && src_related == 0;
4698 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4700 struct table_elt *const_elt
4701 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4706 for (const_elt = const_elt->first_same_value;
4707 const_elt; const_elt = const_elt->next_same_value)
4708 if (REG_P (const_elt->exp))
4710 src_related = gen_lowpart (mode, const_elt->exp);
4716 /* Another possibility is that we have an AND with a constant in
4717 a mode narrower than a word. If so, it might have been generated
4718 as part of an "if" which would narrow the AND. If we already
4719 have done the AND in a wider mode, we can use a SUBREG of that
4722 if (flag_expensive_optimizations && ! src_related
4723 && GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))
4724 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4726 enum machine_mode tmode;
4727 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4729 for (tmode = GET_MODE_WIDER_MODE (mode);
4730 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4731 tmode = GET_MODE_WIDER_MODE (tmode))
4733 rtx inner = gen_lowpart (tmode, XEXP (src, 0));
4734 struct table_elt *larger_elt;
4738 PUT_MODE (new_and, tmode);
4739 XEXP (new_and, 0) = inner;
4740 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4741 if (larger_elt == 0)
4744 for (larger_elt = larger_elt->first_same_value;
4745 larger_elt; larger_elt = larger_elt->next_same_value)
4746 if (REG_P (larger_elt->exp))
4749 = gen_lowpart (mode, larger_elt->exp);
4759 #ifdef LOAD_EXTEND_OP
4760 /* See if a MEM has already been loaded with a widening operation;
4761 if it has, we can use a subreg of that. Many CISC machines
4762 also have such operations, but this is only likely to be
4763 beneficial on these machines. */
4765 if (flag_expensive_optimizations && src_related == 0
4766 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4767 && GET_MODE_CLASS (mode) == MODE_INT
4768 && MEM_P (src) && ! do_not_record
4769 && LOAD_EXTEND_OP (mode) != UNKNOWN)
4771 struct rtx_def memory_extend_buf;
4772 rtx memory_extend_rtx = &memory_extend_buf;
4773 enum machine_mode tmode;
4775 /* Set what we are trying to extend and the operation it might
4776 have been extended with. */
4777 memset (memory_extend_rtx, 0, sizeof(*memory_extend_rtx));
4778 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4779 XEXP (memory_extend_rtx, 0) = src;
4781 for (tmode = GET_MODE_WIDER_MODE (mode);
4782 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4783 tmode = GET_MODE_WIDER_MODE (tmode))
4785 struct table_elt *larger_elt;
4787 PUT_MODE (memory_extend_rtx, tmode);
4788 larger_elt = lookup (memory_extend_rtx,
4789 HASH (memory_extend_rtx, tmode), tmode);
4790 if (larger_elt == 0)
4793 for (larger_elt = larger_elt->first_same_value;
4794 larger_elt; larger_elt = larger_elt->next_same_value)
4795 if (REG_P (larger_elt->exp))
4797 src_related = gen_lowpart (mode, larger_elt->exp);
4805 #endif /* LOAD_EXTEND_OP */
4807 /* Try to express the constant using a register+offset expression
4808 derived from a constant anchor. */
4810 if (targetm.const_anchor
4813 && GET_CODE (src_const) == CONST_INT)
4815 src_related = try_const_anchors (src_const, mode);
4816 src_related_is_const_anchor = src_related != NULL_RTX;
4820 if (src == src_folded)
4823 /* At this point, ELT, if nonzero, points to a class of expressions
4824 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4825 and SRC_RELATED, if nonzero, each contain additional equivalent
4826 expressions. Prune these latter expressions by deleting expressions
4827 already in the equivalence class.
4829 Check for an equivalent identical to the destination. If found,
4830 this is the preferred equivalent since it will likely lead to
4831 elimination of the insn. Indicate this by placing it in
4835 elt = elt->first_same_value;
4836 for (p = elt; p; p = p->next_same_value)
4838 enum rtx_code code = GET_CODE (p->exp);
4840 /* If the expression is not valid, ignore it. Then we do not
4841 have to check for validity below. In most cases, we can use
4842 `rtx_equal_p', since canonicalization has already been done. */
4843 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, false))
4846 /* Also skip paradoxical subregs, unless that's what we're
4849 && (GET_MODE_SIZE (GET_MODE (p->exp))
4850 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
4852 && GET_CODE (src) == SUBREG
4853 && GET_MODE (src) == GET_MODE (p->exp)
4854 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4855 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4858 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4860 else if (src_folded && GET_CODE (src_folded) == code
4861 && rtx_equal_p (src_folded, p->exp))
4863 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4864 && rtx_equal_p (src_eqv_here, p->exp))
4866 else if (src_related && GET_CODE (src_related) == code
4867 && rtx_equal_p (src_related, p->exp))
4870 /* This is the same as the destination of the insns, we want
4871 to prefer it. Copy it to src_related. The code below will
4872 then give it a negative cost. */
4873 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
4877 /* Find the cheapest valid equivalent, trying all the available
4878 possibilities. Prefer items not in the hash table to ones
4879 that are when they are equal cost. Note that we can never
4880 worsen an insn as the current contents will also succeed.
4881 If we find an equivalent identical to the destination, use it as best,
4882 since this insn will probably be eliminated in that case. */
4885 if (rtx_equal_p (src, dest))
4886 src_cost = src_regcost = -1;
4889 src_cost = COST (src);
4890 src_regcost = approx_reg_cost (src);
4896 if (rtx_equal_p (src_eqv_here, dest))
4897 src_eqv_cost = src_eqv_regcost = -1;
4900 src_eqv_cost = COST (src_eqv_here);
4901 src_eqv_regcost = approx_reg_cost (src_eqv_here);
4907 if (rtx_equal_p (src_folded, dest))
4908 src_folded_cost = src_folded_regcost = -1;
4911 src_folded_cost = COST (src_folded);
4912 src_folded_regcost = approx_reg_cost (src_folded);
4918 if (rtx_equal_p (src_related, dest))
4919 src_related_cost = src_related_regcost = -1;
4922 src_related_cost = COST (src_related);
4923 src_related_regcost = approx_reg_cost (src_related);
4925 /* If a const-anchor is used to synthesize a constant that
4926 normally requires multiple instructions then slightly prefer
4927 it over the original sequence. These instructions are likely
4928 to become redundant now. We can't compare against the cost
4929 of src_eqv_here because, on MIPS for example, multi-insn
4930 constants have zero cost; they are assumed to be hoisted from
4932 if (src_related_is_const_anchor
4933 && src_related_cost == src_cost
4939 /* If this was an indirect jump insn, a known label will really be
4940 cheaper even though it looks more expensive. */
4941 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
4942 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
4944 /* Terminate loop when replacement made. This must terminate since
4945 the current contents will be tested and will always be valid. */
4950 /* Skip invalid entries. */
4951 while (elt && !REG_P (elt->exp)
4952 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
4953 elt = elt->next_same_value;
4955 /* A paradoxical subreg would be bad here: it'll be the right
4956 size, but later may be adjusted so that the upper bits aren't
4957 what we want. So reject it. */
4959 && GET_CODE (elt->exp) == SUBREG
4960 && (GET_MODE_SIZE (GET_MODE (elt->exp))
4961 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
4962 /* It is okay, though, if the rtx we're trying to match
4963 will ignore any of the bits we can't predict. */
4965 && GET_CODE (src) == SUBREG
4966 && GET_MODE (src) == GET_MODE (elt->exp)
4967 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4968 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
4970 elt = elt->next_same_value;
4976 src_elt_cost = elt->cost;
4977 src_elt_regcost = elt->regcost;
4980 /* Find cheapest and skip it for the next time. For items
4981 of equal cost, use this order:
4982 src_folded, src, src_eqv, src_related and hash table entry. */
4984 && preferable (src_folded_cost, src_folded_regcost,
4985 src_cost, src_regcost) <= 0
4986 && preferable (src_folded_cost, src_folded_regcost,
4987 src_eqv_cost, src_eqv_regcost) <= 0
4988 && preferable (src_folded_cost, src_folded_regcost,
4989 src_related_cost, src_related_regcost) <= 0
4990 && preferable (src_folded_cost, src_folded_regcost,
4991 src_elt_cost, src_elt_regcost) <= 0)
4993 trial = src_folded, src_folded_cost = MAX_COST;
4994 if (src_folded_force_flag)
4996 rtx forced = force_const_mem (mode, trial);
5002 && preferable (src_cost, src_regcost,
5003 src_eqv_cost, src_eqv_regcost) <= 0
5004 && preferable (src_cost, src_regcost,
5005 src_related_cost, src_related_regcost) <= 0
5006 && preferable (src_cost, src_regcost,
5007 src_elt_cost, src_elt_regcost) <= 0)
5008 trial = src, src_cost = MAX_COST;
5009 else if (src_eqv_here
5010 && preferable (src_eqv_cost, src_eqv_regcost,
5011 src_related_cost, src_related_regcost) <= 0
5012 && preferable (src_eqv_cost, src_eqv_regcost,
5013 src_elt_cost, src_elt_regcost) <= 0)
5014 trial = src_eqv_here, src_eqv_cost = MAX_COST;
5015 else if (src_related
5016 && preferable (src_related_cost, src_related_regcost,
5017 src_elt_cost, src_elt_regcost) <= 0)
5018 trial = src_related, src_related_cost = MAX_COST;
5022 elt = elt->next_same_value;
5023 src_elt_cost = MAX_COST;
5026 /* Avoid creation of overlapping memory moves. */
5027 if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
5031 /* BLKmode moves are not handled by cse anyway. */
5032 if (GET_MODE (trial) == BLKmode)
5035 src = canon_rtx (trial);
5036 dest = canon_rtx (SET_DEST (sets[i].rtl));
5038 if (!MEM_P (src) || !MEM_P (dest)
5039 || !nonoverlapping_memrefs_p (src, dest, false))
5044 (set (reg:M N) (const_int A))
5045 (set (reg:M2 O) (const_int B))
5046 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5048 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5049 && CONST_INT_P (trial)
5050 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 1))
5051 && CONST_INT_P (XEXP (SET_DEST (sets[i].rtl), 2))
5052 && REG_P (XEXP (SET_DEST (sets[i].rtl), 0))
5053 && (GET_MODE_BITSIZE (GET_MODE (SET_DEST (sets[i].rtl)))
5054 >= INTVAL (XEXP (SET_DEST (sets[i].rtl), 1)))
5055 && ((unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 1))
5056 + (unsigned) INTVAL (XEXP (SET_DEST (sets[i].rtl), 2))
5057 <= HOST_BITS_PER_WIDE_INT))
5059 rtx dest_reg = XEXP (SET_DEST (sets[i].rtl), 0);
5060 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5061 rtx pos = XEXP (SET_DEST (sets[i].rtl), 2);
5062 unsigned int dest_hash = HASH (dest_reg, GET_MODE (dest_reg));
5063 struct table_elt *dest_elt
5064 = lookup (dest_reg, dest_hash, GET_MODE (dest_reg));
5065 rtx dest_cst = NULL;
5068 for (p = dest_elt->first_same_value; p; p = p->next_same_value)
5069 if (p->is_const && CONST_INT_P (p->exp))
5076 HOST_WIDE_INT val = INTVAL (dest_cst);
5079 if (BITS_BIG_ENDIAN)
5080 shift = GET_MODE_BITSIZE (GET_MODE (dest_reg))
5081 - INTVAL (pos) - INTVAL (width);
5083 shift = INTVAL (pos);
5084 if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
5085 mask = ~(HOST_WIDE_INT) 0;
5087 mask = ((HOST_WIDE_INT) 1 << INTVAL (width)) - 1;
5088 val &= ~(mask << shift);
5089 val |= (INTVAL (trial) & mask) << shift;
5090 val = trunc_int_for_mode (val, GET_MODE (dest_reg));
5091 validate_unshare_change (insn, &SET_DEST (sets[i].rtl),
5093 validate_unshare_change (insn, &SET_SRC (sets[i].rtl),
5095 if (apply_change_group ())
5097 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5100 remove_note (insn, note);
5101 df_notes_rescan (insn);
5105 src_eqv_volatile = 0;
5106 src_eqv_in_memory = 0;
5114 /* We don't normally have an insn matching (set (pc) (pc)), so
5115 check for this separately here. We will delete such an
5118 For other cases such as a table jump or conditional jump
5119 where we know the ultimate target, go ahead and replace the
5120 operand. While that may not make a valid insn, we will
5121 reemit the jump below (and also insert any necessary
5123 if (n_sets == 1 && dest == pc_rtx
5125 || (GET_CODE (trial) == LABEL_REF
5126 && ! condjump_p (insn))))
5128 /* Don't substitute non-local labels, this confuses CFG. */
5129 if (GET_CODE (trial) == LABEL_REF
5130 && LABEL_REF_NONLOCAL_P (trial))
5133 SET_SRC (sets[i].rtl) = trial;
5134 cse_jumps_altered = true;
5138 /* Reject certain invalid forms of CONST that we create. */
5139 else if (CONSTANT_P (trial)
5140 && GET_CODE (trial) == CONST
5141 /* Reject cases that will cause decode_rtx_const to
5142 die. On the alpha when simplifying a switch, we
5143 get (const (truncate (minus (label_ref)
5145 && (GET_CODE (XEXP (trial, 0)) == TRUNCATE
5146 /* Likewise on IA-64, except without the
5148 || (GET_CODE (XEXP (trial, 0)) == MINUS
5149 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5150 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)))
5151 /* Do nothing for this case. */
5154 /* Look for a substitution that makes a valid insn. */
5155 else if (validate_unshare_change
5156 (insn, &SET_SRC (sets[i].rtl), trial, 0))
5158 rtx new_rtx = canon_reg (SET_SRC (sets[i].rtl), insn);
5160 /* The result of apply_change_group can be ignored; see
5163 validate_change (insn, &SET_SRC (sets[i].rtl), new_rtx, 1);
5164 apply_change_group ();
5169 /* If we previously found constant pool entries for
5170 constants and this is a constant, try making a
5171 pool entry. Put it in src_folded unless we already have done
5172 this since that is where it likely came from. */
5174 else if (constant_pool_entries_cost
5175 && CONSTANT_P (trial)
5177 || (!MEM_P (src_folded)
5178 && ! src_folded_force_flag))
5179 && GET_MODE_CLASS (mode) != MODE_CC
5180 && mode != VOIDmode)
5182 src_folded_force_flag = 1;
5184 src_folded_cost = constant_pool_entries_cost;
5185 src_folded_regcost = constant_pool_entries_regcost;
5189 /* If we changed the insn too much, handle this set from scratch. */
5196 src = SET_SRC (sets[i].rtl);
5198 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5199 However, there is an important exception: If both are registers
5200 that are not the head of their equivalence class, replace SET_SRC
5201 with the head of the class. If we do not do this, we will have
5202 both registers live over a portion of the basic block. This way,
5203 their lifetimes will likely abut instead of overlapping. */
5205 && REGNO_QTY_VALID_P (REGNO (dest)))
5207 int dest_q = REG_QTY (REGNO (dest));
5208 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5210 if (dest_ent->mode == GET_MODE (dest)
5211 && dest_ent->first_reg != REGNO (dest)
5212 && REG_P (src) && REGNO (src) == REGNO (dest)
5213 /* Don't do this if the original insn had a hard reg as
5214 SET_SRC or SET_DEST. */
5215 && (!REG_P (sets[i].src)
5216 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5217 && (!REG_P (dest) || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5218 /* We can't call canon_reg here because it won't do anything if
5219 SRC is a hard register. */
5221 int src_q = REG_QTY (REGNO (src));
5222 struct qty_table_elem *src_ent = &qty_table[src_q];
5223 int first = src_ent->first_reg;
5225 = (first >= FIRST_PSEUDO_REGISTER
5226 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5228 /* We must use validate-change even for this, because this
5229 might be a special no-op instruction, suitable only to
5231 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5234 /* If we had a constant that is cheaper than what we are now
5235 setting SRC to, use that constant. We ignored it when we
5236 thought we could make this into a no-op. */
5237 if (src_const && COST (src_const) < COST (src)
5238 && validate_change (insn, &SET_SRC (sets[i].rtl),
5245 /* If we made a change, recompute SRC values. */
5246 if (src != sets[i].src)
5249 hash_arg_in_memory = 0;
5251 sets[i].src_hash = HASH (src, mode);
5252 sets[i].src_volatile = do_not_record;
5253 sets[i].src_in_memory = hash_arg_in_memory;
5254 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5257 /* If this is a single SET, we are setting a register, and we have an
5258 equivalent constant, we want to add a REG_NOTE. We don't want
5259 to write a REG_EQUAL note for a constant pseudo since verifying that
5260 that pseudo hasn't been eliminated is a pain. Such a note also
5261 won't help anything.
5263 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5264 which can be created for a reference to a compile time computable
5265 entry in a jump table. */
5267 if (n_sets == 1 && src_const && REG_P (dest)
5268 && !REG_P (src_const)
5269 && ! (GET_CODE (src_const) == CONST
5270 && GET_CODE (XEXP (src_const, 0)) == MINUS
5271 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5272 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5274 /* We only want a REG_EQUAL note if src_const != src. */
5275 if (! rtx_equal_p (src, src_const))
5277 /* Make sure that the rtx is not shared. */
5278 src_const = copy_rtx (src_const);
5280 /* Record the actual constant value in a REG_EQUAL note,
5281 making a new one if one does not already exist. */
5282 set_unique_reg_note (insn, REG_EQUAL, src_const);
5283 df_notes_rescan (insn);
5287 /* Now deal with the destination. */
5290 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5291 while (GET_CODE (dest) == SUBREG
5292 || GET_CODE (dest) == ZERO_EXTRACT
5293 || GET_CODE (dest) == STRICT_LOW_PART)
5294 dest = XEXP (dest, 0);
5296 sets[i].inner_dest = dest;
5300 #ifdef PUSH_ROUNDING
5301 /* Stack pushes invalidate the stack pointer. */
5302 rtx addr = XEXP (dest, 0);
5303 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC
5304 && XEXP (addr, 0) == stack_pointer_rtx)
5305 invalidate (stack_pointer_rtx, VOIDmode);
5307 dest = fold_rtx (dest, insn);
5310 /* Compute the hash code of the destination now,
5311 before the effects of this instruction are recorded,
5312 since the register values used in the address computation
5313 are those before this instruction. */
5314 sets[i].dest_hash = HASH (dest, mode);
5316 /* Don't enter a bit-field in the hash table
5317 because the value in it after the store
5318 may not equal what was stored, due to truncation. */
5320 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT)
5322 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5324 if (src_const != 0 && CONST_INT_P (src_const)
5325 && CONST_INT_P (width)
5326 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5327 && ! (INTVAL (src_const)
5328 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5329 /* Exception: if the value is constant,
5330 and it won't be truncated, record it. */
5334 /* This is chosen so that the destination will be invalidated
5335 but no new value will be recorded.
5336 We must invalidate because sometimes constant
5337 values can be recorded for bitfields. */
5338 sets[i].src_elt = 0;
5339 sets[i].src_volatile = 1;
5345 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5347 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5349 /* One less use of the label this insn used to jump to. */
5350 delete_insn_and_edges (insn);
5351 cse_jumps_altered = true;
5352 /* No more processing for this set. */
5356 /* If this SET is now setting PC to a label, we know it used to
5357 be a conditional or computed branch. */
5358 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF
5359 && !LABEL_REF_NONLOCAL_P (src))
5361 /* We reemit the jump in as many cases as possible just in
5362 case the form of an unconditional jump is significantly
5363 different than a computed jump or conditional jump.
5365 If this insn has multiple sets, then reemitting the
5366 jump is nontrivial. So instead we just force rerecognition
5367 and hope for the best. */
5372 new_rtx = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5373 JUMP_LABEL (new_rtx) = XEXP (src, 0);
5374 LABEL_NUSES (XEXP (src, 0))++;
5376 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5377 note = find_reg_note (insn, REG_NON_LOCAL_GOTO, 0);
5380 XEXP (note, 1) = NULL_RTX;
5381 REG_NOTES (new_rtx) = note;
5384 delete_insn_and_edges (insn);
5388 INSN_CODE (insn) = -1;
5390 /* Do not bother deleting any unreachable code, let jump do it. */
5391 cse_jumps_altered = true;
5395 /* If destination is volatile, invalidate it and then do no further
5396 processing for this assignment. */
5398 else if (do_not_record)
5400 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5401 invalidate (dest, VOIDmode);
5402 else if (MEM_P (dest))
5403 invalidate (dest, VOIDmode);
5404 else if (GET_CODE (dest) == STRICT_LOW_PART
5405 || GET_CODE (dest) == ZERO_EXTRACT)
5406 invalidate (XEXP (dest, 0), GET_MODE (dest));
5410 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5411 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5414 /* If setting CC0, record what it was set to, or a constant, if it
5415 is equivalent to a constant. If it is being set to a floating-point
5416 value, make a COMPARE with the appropriate constant of 0. If we
5417 don't do this, later code can interpret this as a test against
5418 const0_rtx, which can cause problems if we try to put it into an
5419 insn as a floating-point operand. */
5420 if (dest == cc0_rtx)
5422 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5423 this_insn_cc0_mode = mode;
5424 if (FLOAT_MODE_P (mode))
5425 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5431 /* Now enter all non-volatile source expressions in the hash table
5432 if they are not already present.
5433 Record their equivalence classes in src_elt.
5434 This way we can insert the corresponding destinations into
5435 the same classes even if the actual sources are no longer in them
5436 (having been invalidated). */
5438 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5439 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5441 struct table_elt *elt;
5442 struct table_elt *classp = sets[0].src_elt;
5443 rtx dest = SET_DEST (sets[0].rtl);
5444 enum machine_mode eqvmode = GET_MODE (dest);
5446 if (GET_CODE (dest) == STRICT_LOW_PART)
5448 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5451 if (insert_regs (src_eqv, classp, 0))
5453 rehash_using_reg (src_eqv);
5454 src_eqv_hash = HASH (src_eqv, eqvmode);
5456 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5457 elt->in_memory = src_eqv_in_memory;
5460 /* Check to see if src_eqv_elt is the same as a set source which
5461 does not yet have an elt, and if so set the elt of the set source
5463 for (i = 0; i < n_sets; i++)
5464 if (sets[i].rtl && sets[i].src_elt == 0
5465 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5466 sets[i].src_elt = src_eqv_elt;
5469 for (i = 0; i < n_sets; i++)
5470 if (sets[i].rtl && ! sets[i].src_volatile
5471 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5473 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5475 /* REG_EQUAL in setting a STRICT_LOW_PART
5476 gives an equivalent for the entire destination register,
5477 not just for the subreg being stored in now.
5478 This is a more interesting equivalence, so we arrange later
5479 to treat the entire reg as the destination. */
5480 sets[i].src_elt = src_eqv_elt;
5481 sets[i].src_hash = src_eqv_hash;
5485 /* Insert source and constant equivalent into hash table, if not
5487 struct table_elt *classp = src_eqv_elt;
5488 rtx src = sets[i].src;
5489 rtx dest = SET_DEST (sets[i].rtl);
5490 enum machine_mode mode
5491 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5493 /* It's possible that we have a source value known to be
5494 constant but don't have a REG_EQUAL note on the insn.
5495 Lack of a note will mean src_eqv_elt will be NULL. This
5496 can happen where we've generated a SUBREG to access a
5497 CONST_INT that is already in a register in a wider mode.
5498 Ensure that the source expression is put in the proper
5501 classp = sets[i].src_const_elt;
5503 if (sets[i].src_elt == 0)
5505 struct table_elt *elt;
5507 /* Note that these insert_regs calls cannot remove
5508 any of the src_elt's, because they would have failed to
5509 match if not still valid. */
5510 if (insert_regs (src, classp, 0))
5512 rehash_using_reg (src);
5513 sets[i].src_hash = HASH (src, mode);
5515 elt = insert (src, classp, sets[i].src_hash, mode);
5516 elt->in_memory = sets[i].src_in_memory;
5517 sets[i].src_elt = classp = elt;
5519 if (sets[i].src_const && sets[i].src_const_elt == 0
5520 && src != sets[i].src_const
5521 && ! rtx_equal_p (sets[i].src_const, src))
5522 sets[i].src_elt = insert (sets[i].src_const, classp,
5523 sets[i].src_const_hash, mode);
5526 else if (sets[i].src_elt == 0)
5527 /* If we did not insert the source into the hash table (e.g., it was
5528 volatile), note the equivalence class for the REG_EQUAL value, if any,
5529 so that the destination goes into that class. */
5530 sets[i].src_elt = src_eqv_elt;
5532 /* Record destination addresses in the hash table. This allows us to
5533 check if they are invalidated by other sets. */
5534 for (i = 0; i < n_sets; i++)
5538 rtx x = sets[i].inner_dest;
5539 struct table_elt *elt;
5540 enum machine_mode mode;
5546 mode = GET_MODE (x);
5547 hash = HASH (x, mode);
5548 elt = lookup (x, hash, mode);
5551 if (insert_regs (x, NULL, 0))
5553 rtx dest = SET_DEST (sets[i].rtl);
5555 rehash_using_reg (x);
5556 hash = HASH (x, mode);
5557 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5559 elt = insert (x, NULL, hash, mode);
5562 sets[i].dest_addr_elt = elt;
5565 sets[i].dest_addr_elt = NULL;
5569 invalidate_from_clobbers (x);
5571 /* Some registers are invalidated by subroutine calls. Memory is
5572 invalidated by non-constant calls. */
5576 if (!(RTL_CONST_OR_PURE_CALL_P (insn)))
5577 invalidate_memory ();
5578 invalidate_for_call ();
5581 /* Now invalidate everything set by this instruction.
5582 If a SUBREG or other funny destination is being set,
5583 sets[i].rtl is still nonzero, so here we invalidate the reg
5584 a part of which is being set. */
5586 for (i = 0; i < n_sets; i++)
5589 /* We can't use the inner dest, because the mode associated with
5590 a ZERO_EXTRACT is significant. */
5591 rtx dest = SET_DEST (sets[i].rtl);
5593 /* Needed for registers to remove the register from its
5594 previous quantity's chain.
5595 Needed for memory if this is a nonvarying address, unless
5596 we have just done an invalidate_memory that covers even those. */
5597 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5598 invalidate (dest, VOIDmode);
5599 else if (MEM_P (dest))
5600 invalidate (dest, VOIDmode);
5601 else if (GET_CODE (dest) == STRICT_LOW_PART
5602 || GET_CODE (dest) == ZERO_EXTRACT)
5603 invalidate (XEXP (dest, 0), GET_MODE (dest));
5606 /* A volatile ASM invalidates everything. */
5607 if (NONJUMP_INSN_P (insn)
5608 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5609 && MEM_VOLATILE_P (PATTERN (insn)))
5610 flush_hash_table ();
5612 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5613 the regs restored by the longjmp come from a later time
5615 if (CALL_P (insn) && find_reg_note (insn, REG_SETJMP, NULL))
5617 flush_hash_table ();
5621 /* Make sure registers mentioned in destinations
5622 are safe for use in an expression to be inserted.
5623 This removes from the hash table
5624 any invalid entry that refers to one of these registers.
5626 We don't care about the return value from mention_regs because
5627 we are going to hash the SET_DEST values unconditionally. */
5629 for (i = 0; i < n_sets; i++)
5633 rtx x = SET_DEST (sets[i].rtl);
5639 /* We used to rely on all references to a register becoming
5640 inaccessible when a register changes to a new quantity,
5641 since that changes the hash code. However, that is not
5642 safe, since after HASH_SIZE new quantities we get a
5643 hash 'collision' of a register with its own invalid
5644 entries. And since SUBREGs have been changed not to
5645 change their hash code with the hash code of the register,
5646 it wouldn't work any longer at all. So we have to check
5647 for any invalid references lying around now.
5648 This code is similar to the REG case in mention_regs,
5649 but it knows that reg_tick has been incremented, and
5650 it leaves reg_in_table as -1 . */
5651 unsigned int regno = REGNO (x);
5652 unsigned int endregno = END_REGNO (x);
5655 for (i = regno; i < endregno; i++)
5657 if (REG_IN_TABLE (i) >= 0)
5659 remove_invalid_refs (i);
5660 REG_IN_TABLE (i) = -1;
5667 /* We may have just removed some of the src_elt's from the hash table.
5668 So replace each one with the current head of the same class.
5669 Also check if destination addresses have been removed. */
5671 for (i = 0; i < n_sets; i++)
5674 if (sets[i].dest_addr_elt
5675 && sets[i].dest_addr_elt->first_same_value == 0)
5677 /* The elt was removed, which means this destination is not
5678 valid after this instruction. */
5679 sets[i].rtl = NULL_RTX;
5681 else if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5682 /* If elt was removed, find current head of same class,
5683 or 0 if nothing remains of that class. */
5685 struct table_elt *elt = sets[i].src_elt;
5687 while (elt && elt->prev_same_value)
5688 elt = elt->prev_same_value;
5690 while (elt && elt->first_same_value == 0)
5691 elt = elt->next_same_value;
5692 sets[i].src_elt = elt ? elt->first_same_value : 0;
5696 /* Now insert the destinations into their equivalence classes. */
5698 for (i = 0; i < n_sets; i++)
5701 rtx dest = SET_DEST (sets[i].rtl);
5702 struct table_elt *elt;
5704 /* Don't record value if we are not supposed to risk allocating
5705 floating-point values in registers that might be wider than
5707 if ((flag_float_store
5709 && FLOAT_MODE_P (GET_MODE (dest)))
5710 /* Don't record BLKmode values, because we don't know the
5711 size of it, and can't be sure that other BLKmode values
5712 have the same or smaller size. */
5713 || GET_MODE (dest) == BLKmode
5714 /* If we didn't put a REG_EQUAL value or a source into the hash
5715 table, there is no point is recording DEST. */
5716 || sets[i].src_elt == 0
5717 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5718 or SIGN_EXTEND, don't record DEST since it can cause
5719 some tracking to be wrong.
5721 ??? Think about this more later. */
5722 || (GET_CODE (dest) == SUBREG
5723 && (GET_MODE_SIZE (GET_MODE (dest))
5724 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5725 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5726 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5729 /* STRICT_LOW_PART isn't part of the value BEING set,
5730 and neither is the SUBREG inside it.
5731 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5732 if (GET_CODE (dest) == STRICT_LOW_PART)
5733 dest = SUBREG_REG (XEXP (dest, 0));
5735 if (REG_P (dest) || GET_CODE (dest) == SUBREG)
5736 /* Registers must also be inserted into chains for quantities. */
5737 if (insert_regs (dest, sets[i].src_elt, 1))
5739 /* If `insert_regs' changes something, the hash code must be
5741 rehash_using_reg (dest);
5742 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5745 elt = insert (dest, sets[i].src_elt,
5746 sets[i].dest_hash, GET_MODE (dest));
5748 /* If this is a constant, insert the constant anchors with the
5749 equivalent register-offset expressions using register DEST. */
5750 if (targetm.const_anchor
5752 && SCALAR_INT_MODE_P (GET_MODE (dest))
5753 && GET_CODE (sets[i].src_elt->exp) == CONST_INT)
5754 insert_const_anchors (dest, sets[i].src_elt->exp, GET_MODE (dest));
5756 elt->in_memory = (MEM_P (sets[i].inner_dest)
5757 && !MEM_READONLY_P (sets[i].inner_dest));
5759 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5760 narrower than M2, and both M1 and M2 are the same number of words,
5761 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5762 make that equivalence as well.
5764 However, BAR may have equivalences for which gen_lowpart
5765 will produce a simpler value than gen_lowpart applied to
5766 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5767 BAR's equivalences. If we don't get a simplified form, make
5768 the SUBREG. It will not be used in an equivalence, but will
5769 cause two similar assignments to be detected.
5771 Note the loop below will find SUBREG_REG (DEST) since we have
5772 already entered SRC and DEST of the SET in the table. */
5774 if (GET_CODE (dest) == SUBREG
5775 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5777 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
5778 && (GET_MODE_SIZE (GET_MODE (dest))
5779 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5780 && sets[i].src_elt != 0)
5782 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5783 struct table_elt *elt, *classp = 0;
5785 for (elt = sets[i].src_elt->first_same_value; elt;
5786 elt = elt->next_same_value)
5790 struct table_elt *src_elt;
5793 /* Ignore invalid entries. */
5794 if (!REG_P (elt->exp)
5795 && ! exp_equiv_p (elt->exp, elt->exp, 1, false))
5798 /* We may have already been playing subreg games. If the
5799 mode is already correct for the destination, use it. */
5800 if (GET_MODE (elt->exp) == new_mode)
5804 /* Calculate big endian correction for the SUBREG_BYTE.
5805 We have already checked that M1 (GET_MODE (dest))
5806 is not narrower than M2 (new_mode). */
5807 if (BYTES_BIG_ENDIAN)
5808 byte = (GET_MODE_SIZE (GET_MODE (dest))
5809 - GET_MODE_SIZE (new_mode));
5811 new_src = simplify_gen_subreg (new_mode, elt->exp,
5812 GET_MODE (dest), byte);
5815 /* The call to simplify_gen_subreg fails if the value
5816 is VOIDmode, yet we can't do any simplification, e.g.
5817 for EXPR_LISTs denoting function call results.
5818 It is invalid to construct a SUBREG with a VOIDmode
5819 SUBREG_REG, hence a zero new_src means we can't do
5820 this substitution. */
5824 src_hash = HASH (new_src, new_mode);
5825 src_elt = lookup (new_src, src_hash, new_mode);
5827 /* Put the new source in the hash table is if isn't
5831 if (insert_regs (new_src, classp, 0))
5833 rehash_using_reg (new_src);
5834 src_hash = HASH (new_src, new_mode);
5836 src_elt = insert (new_src, classp, src_hash, new_mode);
5837 src_elt->in_memory = elt->in_memory;
5839 else if (classp && classp != src_elt->first_same_value)
5840 /* Show that two things that we've seen before are
5841 actually the same. */
5842 merge_equiv_classes (src_elt, classp);
5844 classp = src_elt->first_same_value;
5845 /* Ignore invalid entries. */
5847 && !REG_P (classp->exp)
5848 && ! exp_equiv_p (classp->exp, classp->exp, 1, false))
5849 classp = classp->next_same_value;
5854 /* Special handling for (set REG0 REG1) where REG0 is the
5855 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5856 be used in the sequel, so (if easily done) change this insn to
5857 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5858 that computed their value. Then REG1 will become a dead store
5859 and won't cloud the situation for later optimizations.
5861 Do not make this change if REG1 is a hard register, because it will
5862 then be used in the sequel and we may be changing a two-operand insn
5863 into a three-operand insn.
5865 Also do not do this if we are operating on a copy of INSN. */
5867 if (n_sets == 1 && sets[0].rtl && REG_P (SET_DEST (sets[0].rtl))
5868 && NEXT_INSN (PREV_INSN (insn)) == insn
5869 && REG_P (SET_SRC (sets[0].rtl))
5870 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5871 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5873 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5874 struct qty_table_elem *src_ent = &qty_table[src_q];
5876 if (src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5878 /* Scan for the previous nonnote insn, but stop at a basic
5881 rtx bb_head = BB_HEAD (BLOCK_FOR_INSN (insn));
5884 prev = PREV_INSN (prev);
5886 while (prev != bb_head && (NOTE_P (prev) || DEBUG_INSN_P (prev)));
5888 /* Do not swap the registers around if the previous instruction
5889 attaches a REG_EQUIV note to REG1.
5891 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5892 from the pseudo that originally shadowed an incoming argument
5893 to another register. Some uses of REG_EQUIV might rely on it
5894 being attached to REG1 rather than REG2.
5896 This section previously turned the REG_EQUIV into a REG_EQUAL
5897 note. We cannot do that because REG_EQUIV may provide an
5898 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5899 if (NONJUMP_INSN_P (prev)
5900 && GET_CODE (PATTERN (prev)) == SET
5901 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
5902 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
5904 rtx dest = SET_DEST (sets[0].rtl);
5905 rtx src = SET_SRC (sets[0].rtl);
5908 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
5909 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
5910 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
5911 apply_change_group ();
5913 /* If INSN has a REG_EQUAL note, and this note mentions
5914 REG0, then we must delete it, because the value in
5915 REG0 has changed. If the note's value is REG1, we must
5916 also delete it because that is now this insn's dest. */
5917 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5919 && (reg_mentioned_p (dest, XEXP (note, 0))
5920 || rtx_equal_p (src, XEXP (note, 0))))
5921 remove_note (insn, note);
5929 /* Remove from the hash table all expressions that reference memory. */
5932 invalidate_memory (void)
5935 struct table_elt *p, *next;
5937 for (i = 0; i < HASH_SIZE; i++)
5938 for (p = table[i]; p; p = next)
5940 next = p->next_same_hash;
5942 remove_from_table (p, i);
5946 /* Perform invalidation on the basis of everything about an insn
5947 except for invalidating the actual places that are SET in it.
5948 This includes the places CLOBBERed, and anything that might
5949 alias with something that is SET or CLOBBERed.
5951 X is the pattern of the insn. */
5954 invalidate_from_clobbers (rtx x)
5956 if (GET_CODE (x) == CLOBBER)
5958 rtx ref = XEXP (x, 0);
5961 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5963 invalidate (ref, VOIDmode);
5964 else if (GET_CODE (ref) == STRICT_LOW_PART
5965 || GET_CODE (ref) == ZERO_EXTRACT)
5966 invalidate (XEXP (ref, 0), GET_MODE (ref));
5969 else if (GET_CODE (x) == PARALLEL)
5972 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5974 rtx y = XVECEXP (x, 0, i);
5975 if (GET_CODE (y) == CLOBBER)
5977 rtx ref = XEXP (y, 0);
5978 if (REG_P (ref) || GET_CODE (ref) == SUBREG
5980 invalidate (ref, VOIDmode);
5981 else if (GET_CODE (ref) == STRICT_LOW_PART
5982 || GET_CODE (ref) == ZERO_EXTRACT)
5983 invalidate (XEXP (ref, 0), GET_MODE (ref));
5989 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5990 and replace any registers in them with either an equivalent constant
5991 or the canonical form of the register. If we are inside an address,
5992 only do this if the address remains valid.
5994 OBJECT is 0 except when within a MEM in which case it is the MEM.
5996 Return the replacement for X. */
5999 cse_process_notes_1 (rtx x, rtx object, bool *changed)
6001 enum rtx_code code = GET_CODE (x);
6002 const char *fmt = GET_RTX_FORMAT (code);
6020 validate_change (x, &XEXP (x, 0),
6021 cse_process_notes (XEXP (x, 0), x, changed), 0);
6026 if (REG_NOTE_KIND (x) == REG_EQUAL)
6027 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX, changed);
6029 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX, changed);
6036 rtx new_rtx = cse_process_notes (XEXP (x, 0), object, changed);
6037 /* We don't substitute VOIDmode constants into these rtx,
6038 since they would impede folding. */
6039 if (GET_MODE (new_rtx) != VOIDmode)
6040 validate_change (object, &XEXP (x, 0), new_rtx, 0);
6045 i = REG_QTY (REGNO (x));
6047 /* Return a constant or a constant register. */
6048 if (REGNO_QTY_VALID_P (REGNO (x)))
6050 struct qty_table_elem *ent = &qty_table[i];
6052 if (ent->const_rtx != NULL_RTX
6053 && (CONSTANT_P (ent->const_rtx)
6054 || REG_P (ent->const_rtx)))
6056 rtx new_rtx = gen_lowpart (GET_MODE (x), ent->const_rtx);
6058 return copy_rtx (new_rtx);
6062 /* Otherwise, canonicalize this register. */
6063 return canon_reg (x, NULL_RTX);
6069 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6071 validate_change (object, &XEXP (x, i),
6072 cse_process_notes (XEXP (x, i), object, changed), 0);
6078 cse_process_notes (rtx x, rtx object, bool *changed)
6080 rtx new_rtx = cse_process_notes_1 (x, object, changed);
6087 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6089 DATA is a pointer to a struct cse_basic_block_data, that is used to
6091 It is filled with a queue of basic blocks, starting with FIRST_BB
6092 and following a trace through the CFG.
6094 If all paths starting at FIRST_BB have been followed, or no new path
6095 starting at FIRST_BB can be constructed, this function returns FALSE.
6096 Otherwise, DATA->path is filled and the function returns TRUE indicating
6097 that a path to follow was found.
6099 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6100 block in the path will be FIRST_BB. */
6103 cse_find_path (basic_block first_bb, struct cse_basic_block_data *data,
6110 SET_BIT (cse_visited_basic_blocks, first_bb->index);
6112 /* See if there is a previous path. */
6113 path_size = data->path_size;
6115 /* There is a previous path. Make sure it started with FIRST_BB. */
6117 gcc_assert (data->path[0].bb == first_bb);
6119 /* There was only one basic block in the last path. Clear the path and
6120 return, so that paths starting at another basic block can be tried. */
6127 /* If the path was empty from the beginning, construct a new path. */
6129 data->path[path_size++].bb = first_bb;
6132 /* Otherwise, path_size must be equal to or greater than 2, because
6133 a previous path exists that is at least two basic blocks long.
6135 Update the previous branch path, if any. If the last branch was
6136 previously along the branch edge, take the fallthrough edge now. */
6137 while (path_size >= 2)
6139 basic_block last_bb_in_path, previous_bb_in_path;
6143 last_bb_in_path = data->path[path_size].bb;
6144 previous_bb_in_path = data->path[path_size - 1].bb;
6146 /* If we previously followed a path along the branch edge, try
6147 the fallthru edge now. */
6148 if (EDGE_COUNT (previous_bb_in_path->succs) == 2
6149 && any_condjump_p (BB_END (previous_bb_in_path))
6150 && (e = find_edge (previous_bb_in_path, last_bb_in_path))
6151 && e == BRANCH_EDGE (previous_bb_in_path))
6153 bb = FALLTHRU_EDGE (previous_bb_in_path)->dest;
6154 if (bb != EXIT_BLOCK_PTR
6155 && single_pred_p (bb)
6156 /* We used to assert here that we would only see blocks
6157 that we have not visited yet. But we may end up
6158 visiting basic blocks twice if the CFG has changed
6159 in this run of cse_main, because when the CFG changes
6160 the topological sort of the CFG also changes. A basic
6161 blocks that previously had more than two predecessors
6162 may now have a single predecessor, and become part of
6163 a path that starts at another basic block.
6165 We still want to visit each basic block only once, so
6166 halt the path here if we have already visited BB. */
6167 && !TEST_BIT (cse_visited_basic_blocks, bb->index))
6169 SET_BIT (cse_visited_basic_blocks, bb->index);
6170 data->path[path_size++].bb = bb;
6175 data->path[path_size].bb = NULL;
6178 /* If only one block remains in the path, bail. */
6186 /* Extend the path if possible. */
6189 bb = data->path[path_size - 1].bb;
6190 while (bb && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH))
6192 if (single_succ_p (bb))
6193 e = single_succ_edge (bb);
6194 else if (EDGE_COUNT (bb->succs) == 2
6195 && any_condjump_p (BB_END (bb)))
6197 /* First try to follow the branch. If that doesn't lead
6198 to a useful path, follow the fallthru edge. */
6199 e = BRANCH_EDGE (bb);
6200 if (!single_pred_p (e->dest))
6201 e = FALLTHRU_EDGE (bb);
6206 if (e && e->dest != EXIT_BLOCK_PTR
6207 && single_pred_p (e->dest)
6208 /* Avoid visiting basic blocks twice. The large comment
6209 above explains why this can happen. */
6210 && !TEST_BIT (cse_visited_basic_blocks, e->dest->index))
6212 basic_block bb2 = e->dest;
6213 SET_BIT (cse_visited_basic_blocks, bb2->index);
6214 data->path[path_size++].bb = bb2;
6223 data->path_size = path_size;
6224 return path_size != 0;
6227 /* Dump the path in DATA to file F. NSETS is the number of sets
6231 cse_dump_path (struct cse_basic_block_data *data, int nsets, FILE *f)
6235 fprintf (f, ";; Following path with %d sets: ", nsets);
6236 for (path_entry = 0; path_entry < data->path_size; path_entry++)
6237 fprintf (f, "%d ", (data->path[path_entry].bb)->index);
6238 fputc ('\n', dump_file);
6243 /* Return true if BB has exception handling successor edges. */
6246 have_eh_succ_edges (basic_block bb)
6251 FOR_EACH_EDGE (e, ei, bb->succs)
6252 if (e->flags & EDGE_EH)
6259 /* Scan to the end of the path described by DATA. Return an estimate of
6260 the total number of SETs of all insns in the path. */
6263 cse_prescan_path (struct cse_basic_block_data *data)
6266 int path_size = data->path_size;
6269 /* Scan to end of each basic block in the path. */
6270 for (path_entry = 0; path_entry < path_size; path_entry++)
6275 bb = data->path[path_entry].bb;
6277 FOR_BB_INSNS (bb, insn)
6282 /* A PARALLEL can have lots of SETs in it,
6283 especially if it is really an ASM_OPERANDS. */
6284 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6285 nsets += XVECLEN (PATTERN (insn), 0);
6291 data->nsets = nsets;
6294 /* Process a single extended basic block described by EBB_DATA. */
6297 cse_extended_basic_block (struct cse_basic_block_data *ebb_data)
6299 int path_size = ebb_data->path_size;
6303 /* Allocate the space needed by qty_table. */
6304 qty_table = XNEWVEC (struct qty_table_elem, max_qty);
6307 cse_ebb_live_in = df_get_live_in (ebb_data->path[0].bb);
6308 cse_ebb_live_out = df_get_live_out (ebb_data->path[path_size - 1].bb);
6309 for (path_entry = 0; path_entry < path_size; path_entry++)
6314 bb = ebb_data->path[path_entry].bb;
6316 /* Invalidate recorded information for eh regs if there is an EH
6317 edge pointing to that bb. */
6318 if (bb_has_eh_pred (bb))
6322 for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++)
6324 df_ref def = *def_rec;
6325 if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
6326 invalidate (DF_REF_REG (def), GET_MODE (DF_REF_REG (def)));
6330 optimize_this_for_speed_p = optimize_bb_for_speed_p (bb);
6331 FOR_BB_INSNS (bb, insn)
6333 /* If we have processed 1,000 insns, flush the hash table to
6334 avoid extreme quadratic behavior. We must not include NOTEs
6335 in the count since there may be more of them when generating
6336 debugging information. If we clear the table at different
6337 times, code generated with -g -O might be different than code
6338 generated with -O but not -g.
6340 FIXME: This is a real kludge and needs to be done some other
6342 if (NONDEBUG_INSN_P (insn)
6343 && num_insns++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS))
6345 flush_hash_table ();
6351 /* Process notes first so we have all notes in canonical forms
6352 when looking for duplicate operations. */
6353 if (REG_NOTES (insn))
6355 bool changed = false;
6356 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn),
6357 NULL_RTX, &changed);
6359 df_notes_rescan (insn);
6364 /* If we haven't already found an insn where we added a LABEL_REF,
6366 if (INSN_P (insn) && !recorded_label_ref
6367 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
6369 recorded_label_ref = true;
6372 if (NONDEBUG_INSN_P (insn))
6374 /* If the previous insn sets CC0 and this insn no
6375 longer references CC0, delete the previous insn.
6376 Here we use fact that nothing expects CC0 to be
6377 valid over an insn, which is true until the final
6381 prev_insn = prev_nonnote_nondebug_insn (insn);
6382 if (prev_insn && NONJUMP_INSN_P (prev_insn)
6383 && (tem = single_set (prev_insn)) != NULL_RTX
6384 && SET_DEST (tem) == cc0_rtx
6385 && ! reg_mentioned_p (cc0_rtx, PATTERN (insn)))
6386 delete_insn (prev_insn);
6388 /* If this insn is not the last insn in the basic
6389 block, it will be PREV_INSN(insn) in the next
6390 iteration. If we recorded any CC0-related
6391 information for this insn, remember it. */
6392 if (insn != BB_END (bb))
6394 prev_insn_cc0 = this_insn_cc0;
6395 prev_insn_cc0_mode = this_insn_cc0_mode;
6402 /* With non-call exceptions, we are not always able to update
6403 the CFG properly inside cse_insn. So clean up possibly
6404 redundant EH edges here. */
6405 if (cfun->can_throw_non_call_exceptions && have_eh_succ_edges (bb))
6406 cse_cfg_altered |= purge_dead_edges (bb);
6408 /* If we changed a conditional jump, we may have terminated
6409 the path we are following. Check that by verifying that
6410 the edge we would take still exists. If the edge does
6411 not exist anymore, purge the remainder of the path.
6412 Note that this will cause us to return to the caller. */
6413 if (path_entry < path_size - 1)
6415 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6416 if (!find_edge (bb, next_bb))
6422 /* If we truncate the path, we must also reset the
6423 visited bit on the remaining blocks in the path,
6424 or we will never visit them at all. */
6425 RESET_BIT (cse_visited_basic_blocks,
6426 ebb_data->path[path_size].bb->index);
6427 ebb_data->path[path_size].bb = NULL;
6429 while (path_size - 1 != path_entry);
6430 ebb_data->path_size = path_size;
6434 /* If this is a conditional jump insn, record any known
6435 equivalences due to the condition being tested. */
6437 if (path_entry < path_size - 1
6439 && single_set (insn)
6440 && any_condjump_p (insn))
6442 basic_block next_bb = ebb_data->path[path_entry + 1].bb;
6443 bool taken = (next_bb == BRANCH_EDGE (bb)->dest);
6444 record_jump_equiv (insn, taken);
6448 /* Clear the CC0-tracking related insns, they can't provide
6449 useful information across basic block boundaries. */
6454 gcc_assert (next_qty <= max_qty);
6460 /* Perform cse on the instructions of a function.
6461 F is the first instruction.
6462 NREGS is one plus the highest pseudo-reg number used in the instruction.
6464 Return 2 if jump optimizations should be redone due to simplifications
6465 in conditional jump instructions.
6466 Return 1 if the CFG should be cleaned up because it has been modified.
6467 Return 0 otherwise. */
6470 cse_main (rtx f ATTRIBUTE_UNUSED, int nregs)
6472 struct cse_basic_block_data ebb_data;
6474 int *rc_order = XNEWVEC (int, last_basic_block);
6477 df_set_flags (DF_LR_RUN_DCE);
6479 df_set_flags (DF_DEFER_INSN_RESCAN);
6481 reg_scan (get_insns (), max_reg_num ());
6482 init_cse_reg_info (nregs);
6484 ebb_data.path = XNEWVEC (struct branch_path,
6485 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6487 cse_cfg_altered = false;
6488 cse_jumps_altered = false;
6489 recorded_label_ref = false;
6490 constant_pool_entries_cost = 0;
6491 constant_pool_entries_regcost = 0;
6492 ebb_data.path_size = 0;
6494 rtl_hooks = cse_rtl_hooks;
6497 init_alias_analysis ();
6499 reg_eqv_table = XNEWVEC (struct reg_eqv_elem, nregs);
6501 /* Set up the table of already visited basic blocks. */
6502 cse_visited_basic_blocks = sbitmap_alloc (last_basic_block);
6503 sbitmap_zero (cse_visited_basic_blocks);
6505 /* Loop over basic blocks in reverse completion order (RPO),
6506 excluding the ENTRY and EXIT blocks. */
6507 n_blocks = pre_and_rev_post_order_compute (NULL, rc_order, false);
6509 while (i < n_blocks)
6511 /* Find the first block in the RPO queue that we have not yet
6512 processed before. */
6515 bb = BASIC_BLOCK (rc_order[i++]);
6517 while (TEST_BIT (cse_visited_basic_blocks, bb->index)
6520 /* Find all paths starting with BB, and process them. */
6521 while (cse_find_path (bb, &ebb_data, flag_cse_follow_jumps))
6523 /* Pre-scan the path. */
6524 cse_prescan_path (&ebb_data);
6526 /* If this basic block has no sets, skip it. */
6527 if (ebb_data.nsets == 0)
6530 /* Get a reasonable estimate for the maximum number of qty's
6531 needed for this path. For this, we take the number of sets
6532 and multiply that by MAX_RECOG_OPERANDS. */
6533 max_qty = ebb_data.nsets * MAX_RECOG_OPERANDS;
6535 /* Dump the path we're about to process. */
6537 cse_dump_path (&ebb_data, ebb_data.nsets, dump_file);
6539 cse_extended_basic_block (&ebb_data);
6544 end_alias_analysis ();
6545 free (reg_eqv_table);
6546 free (ebb_data.path);
6547 sbitmap_free (cse_visited_basic_blocks);
6549 rtl_hooks = general_rtl_hooks;
6551 if (cse_jumps_altered || recorded_label_ref)
6553 else if (cse_cfg_altered)
6559 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6560 which there isn't a REG_LABEL_OPERAND note.
6561 Return one if so. DATA is the insn. */
6564 check_for_label_ref (rtx *rtl, void *data)
6566 rtx insn = (rtx) data;
6568 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6569 note for it, we must rerun jump since it needs to place the note. If
6570 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6571 don't do this since no REG_LABEL_OPERAND will be added. */
6572 return (GET_CODE (*rtl) == LABEL_REF
6573 && ! LABEL_REF_NONLOCAL_P (*rtl)
6575 || !label_is_jump_target_p (XEXP (*rtl, 0), insn))
6576 && LABEL_P (XEXP (*rtl, 0))
6577 && INSN_UID (XEXP (*rtl, 0)) != 0
6578 && ! find_reg_note (insn, REG_LABEL_OPERAND, XEXP (*rtl, 0)));
6581 /* Count the number of times registers are used (not set) in X.
6582 COUNTS is an array in which we accumulate the count, INCR is how much
6583 we count each register usage.
6585 Don't count a usage of DEST, which is the SET_DEST of a SET which
6586 contains X in its SET_SRC. This is because such a SET does not
6587 modify the liveness of DEST.
6588 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6589 We must then count uses of a SET_DEST regardless, because the insn can't be
6593 count_reg_usage (rtx x, int *counts, rtx dest, int incr)
6603 switch (code = GET_CODE (x))
6607 counts[REGNO (x)] += incr;
6622 /* If we are clobbering a MEM, mark any registers inside the address
6624 if (MEM_P (XEXP (x, 0)))
6625 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
6629 /* Unless we are setting a REG, count everything in SET_DEST. */
6630 if (!REG_P (SET_DEST (x)))
6631 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
6632 count_reg_usage (SET_SRC (x), counts,
6633 dest ? dest : SET_DEST (x),
6643 /* We expect dest to be NULL_RTX here. If the insn may trap,
6644 or if it cannot be deleted due to side-effects, mark this fact
6645 by setting DEST to pc_rtx. */
6646 if (insn_could_throw_p (x) || side_effects_p (PATTERN (x)))
6648 if (code == CALL_INSN)
6649 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
6650 count_reg_usage (PATTERN (x), counts, dest, incr);
6652 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6655 note = find_reg_equal_equiv_note (x);
6658 rtx eqv = XEXP (note, 0);
6660 if (GET_CODE (eqv) == EXPR_LIST)
6661 /* This REG_EQUAL note describes the result of a function call.
6662 Process all the arguments. */
6665 count_reg_usage (XEXP (eqv, 0), counts, dest, incr);
6666 eqv = XEXP (eqv, 1);
6668 while (eqv && GET_CODE (eqv) == EXPR_LIST);
6670 count_reg_usage (eqv, counts, dest, incr);
6675 if (REG_NOTE_KIND (x) == REG_EQUAL
6676 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
6677 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6678 involving registers in the address. */
6679 || GET_CODE (XEXP (x, 0)) == CLOBBER)
6680 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
6682 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
6686 /* Iterate over just the inputs, not the constraints as well. */
6687 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
6688 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
6698 fmt = GET_RTX_FORMAT (code);
6699 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6702 count_reg_usage (XEXP (x, i), counts, dest, incr);
6703 else if (fmt[i] == 'E')
6704 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6705 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
6709 /* Return true if X is a dead register. */
6712 is_dead_reg (rtx x, int *counts)
6715 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6716 && counts[REGNO (x)] == 0);
6719 /* Return true if set is live. */
6721 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
6728 if (set_noop_p (set))
6732 else if (GET_CODE (SET_DEST (set)) == CC0
6733 && !side_effects_p (SET_SRC (set))
6734 && ((tem = next_nonnote_nondebug_insn (insn)) == NULL_RTX
6736 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
6739 else if (!is_dead_reg (SET_DEST (set), counts)
6740 || side_effects_p (SET_SRC (set)))
6745 /* Return true if insn is live. */
6748 insn_live_p (rtx insn, int *counts)
6751 if (insn_could_throw_p (insn))
6753 else if (GET_CODE (PATTERN (insn)) == SET)
6754 return set_live_p (PATTERN (insn), insn, counts);
6755 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
6757 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6759 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6761 if (GET_CODE (elt) == SET)
6763 if (set_live_p (elt, insn, counts))
6766 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
6771 else if (DEBUG_INSN_P (insn))
6775 for (next = NEXT_INSN (insn); next; next = NEXT_INSN (next))
6778 else if (!DEBUG_INSN_P (next))
6780 else if (INSN_VAR_LOCATION_DECL (insn) == INSN_VAR_LOCATION_DECL (next))
6789 /* Count the number of stores into pseudo. Callback for note_stores. */
6792 count_stores (rtx x, const_rtx set ATTRIBUTE_UNUSED, void *data)
6794 int *counts = (int *) data;
6795 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
6796 counts[REGNO (x)]++;
6799 struct dead_debug_insn_data
6806 /* Return if a DEBUG_INSN needs to be reset because some dead
6807 pseudo doesn't have a replacement. Callback for for_each_rtx. */
6810 is_dead_debug_insn (rtx *loc, void *data)
6813 struct dead_debug_insn_data *ddid = (struct dead_debug_insn_data *) data;
6815 if (is_dead_reg (x, ddid->counts))
6817 if (ddid->replacements && ddid->replacements[REGNO (x)] != NULL_RTX)
6818 ddid->seen_repl = true;
6825 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6826 Callback for simplify_replace_fn_rtx. */
6829 replace_dead_reg (rtx x, const_rtx old_rtx ATTRIBUTE_UNUSED, void *data)
6831 rtx *replacements = (rtx *) data;
6834 && REGNO (x) >= FIRST_PSEUDO_REGISTER
6835 && replacements[REGNO (x)] != NULL_RTX)
6837 if (GET_MODE (x) == GET_MODE (replacements[REGNO (x)]))
6838 return replacements[REGNO (x)];
6839 return lowpart_subreg (GET_MODE (x), replacements[REGNO (x)],
6840 GET_MODE (replacements[REGNO (x)]));
6845 /* Scan all the insns and delete any that are dead; i.e., they store a register
6846 that is never used or they copy a register to itself.
6848 This is used to remove insns made obviously dead by cse, loop or other
6849 optimizations. It improves the heuristics in loop since it won't try to
6850 move dead invariants out of loops or make givs for dead quantities. The
6851 remaining passes of the compilation are also sped up. */
6854 delete_trivially_dead_insns (rtx insns, int nreg)
6858 rtx *replacements = NULL;
6861 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
6862 /* First count the number of times each register is used. */
6863 if (MAY_HAVE_DEBUG_INSNS)
6865 counts = XCNEWVEC (int, nreg * 3);
6866 for (insn = insns; insn; insn = NEXT_INSN (insn))
6867 if (DEBUG_INSN_P (insn))
6868 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6870 else if (INSN_P (insn))
6872 count_reg_usage (insn, counts, NULL_RTX, 1);
6873 note_stores (PATTERN (insn), count_stores, counts + nreg * 2);
6875 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
6876 First one counts how many times each pseudo is used outside
6877 of debug insns, second counts how many times each pseudo is
6878 used in debug insns and third counts how many times a pseudo
6883 counts = XCNEWVEC (int, nreg);
6884 for (insn = insns; insn; insn = NEXT_INSN (insn))
6886 count_reg_usage (insn, counts, NULL_RTX, 1);
6887 /* If no debug insns can be present, COUNTS is just an array
6888 which counts how many times each pseudo is used. */
6890 /* Go from the last insn to the first and delete insns that only set unused
6891 registers or copy a register to itself. As we delete an insn, remove
6892 usage counts for registers it uses.
6894 The first jump optimization pass may leave a real insn as the last
6895 insn in the function. We must not skip that insn or we may end
6896 up deleting code that is not really dead.
6898 If some otherwise unused register is only used in DEBUG_INSNs,
6899 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
6900 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
6901 has been created for the unused register, replace it with
6902 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
6903 for (insn = get_last_insn (); insn; insn = prev)
6907 prev = PREV_INSN (insn);
6911 live_insn = insn_live_p (insn, counts);
6913 /* If this is a dead insn, delete it and show registers in it aren't
6916 if (! live_insn && dbg_cnt (delete_trivial_dead))
6918 if (DEBUG_INSN_P (insn))
6919 count_reg_usage (INSN_VAR_LOCATION_LOC (insn), counts + nreg,
6924 if (MAY_HAVE_DEBUG_INSNS
6925 && (set = single_set (insn)) != NULL_RTX
6926 && is_dead_reg (SET_DEST (set), counts)
6927 /* Used at least once in some DEBUG_INSN. */
6928 && counts[REGNO (SET_DEST (set)) + nreg] > 0
6929 /* And set exactly once. */
6930 && counts[REGNO (SET_DEST (set)) + nreg * 2] == 1
6931 && !side_effects_p (SET_SRC (set))
6932 && asm_noperands (PATTERN (insn)) < 0)
6936 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
6937 dval = make_debug_expr_from_rtl (SET_DEST (set));
6939 /* Emit a debug bind insn before the insn in which
6941 bind = gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set)),
6942 DEBUG_EXPR_TREE_DECL (dval),
6944 VAR_INIT_STATUS_INITIALIZED);
6945 count_reg_usage (bind, counts + nreg, NULL_RTX, 1);
6947 bind = emit_debug_insn_before (bind, insn);
6948 df_insn_rescan (bind);
6950 if (replacements == NULL)
6951 replacements = XCNEWVEC (rtx, nreg);
6952 replacements[REGNO (SET_DEST (set))] = dval;
6955 count_reg_usage (insn, counts, NULL_RTX, -1);
6958 delete_insn_and_edges (insn);
6962 if (MAY_HAVE_DEBUG_INSNS)
6964 struct dead_debug_insn_data ddid;
6965 ddid.counts = counts;
6966 ddid.replacements = replacements;
6967 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
6968 if (DEBUG_INSN_P (insn))
6970 /* If this debug insn references a dead register that wasn't replaced
6971 with an DEBUG_EXPR, reset the DEBUG_INSN. */
6972 ddid.seen_repl = false;
6973 if (for_each_rtx (&INSN_VAR_LOCATION_LOC (insn),
6974 is_dead_debug_insn, &ddid))
6976 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
6977 df_insn_rescan (insn);
6979 else if (ddid.seen_repl)
6981 INSN_VAR_LOCATION_LOC (insn)
6982 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn),
6983 NULL_RTX, replace_dead_reg,
6985 df_insn_rescan (insn);
6989 free (replacements);
6992 if (dump_file && ndead)
6993 fprintf (dump_file, "Deleted %i trivially dead insns\n",
6997 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7001 /* This function is called via for_each_rtx. The argument, NEWREG, is
7002 a condition code register with the desired mode. If we are looking
7003 at the same register in a different mode, replace it with
7007 cse_change_cc_mode (rtx *loc, void *data)
7009 struct change_cc_mode_args* args = (struct change_cc_mode_args*)data;
7013 && REGNO (*loc) == REGNO (args->newreg)
7014 && GET_MODE (*loc) != GET_MODE (args->newreg))
7016 validate_change (args->insn, loc, args->newreg, 1);
7023 /* Change the mode of any reference to the register REGNO (NEWREG) to
7024 GET_MODE (NEWREG) in INSN. */
7027 cse_change_cc_mode_insn (rtx insn, rtx newreg)
7029 struct change_cc_mode_args args;
7036 args.newreg = newreg;
7038 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, &args);
7039 for_each_rtx (®_NOTES (insn), cse_change_cc_mode, &args);
7041 /* If the following assertion was triggered, there is most probably
7042 something wrong with the cc_modes_compatible back end function.
7043 CC modes only can be considered compatible if the insn - with the mode
7044 replaced by any of the compatible modes - can still be recognized. */
7045 success = apply_change_group ();
7046 gcc_assert (success);
7049 /* Change the mode of any reference to the register REGNO (NEWREG) to
7050 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7051 any instruction which modifies NEWREG. */
7054 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7058 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7060 if (! INSN_P (insn))
7063 if (reg_set_p (newreg, insn))
7066 cse_change_cc_mode_insn (insn, newreg);
7070 /* BB is a basic block which finishes with CC_REG as a condition code
7071 register which is set to CC_SRC. Look through the successors of BB
7072 to find blocks which have a single predecessor (i.e., this one),
7073 and look through those blocks for an assignment to CC_REG which is
7074 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7075 permitted to change the mode of CC_SRC to a compatible mode. This
7076 returns VOIDmode if no equivalent assignments were found.
7077 Otherwise it returns the mode which CC_SRC should wind up with.
7078 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7079 but is passed unmodified down to recursive calls in order to prevent
7082 The main complexity in this function is handling the mode issues.
7083 We may have more than one duplicate which we can eliminate, and we
7084 try to find a mode which will work for multiple duplicates. */
7086 static enum machine_mode
7087 cse_cc_succs (basic_block bb, basic_block orig_bb, rtx cc_reg, rtx cc_src,
7088 bool can_change_mode)
7091 enum machine_mode mode;
7092 unsigned int insn_count;
7095 enum machine_mode modes[2];
7101 /* We expect to have two successors. Look at both before picking
7102 the final mode for the comparison. If we have more successors
7103 (i.e., some sort of table jump, although that seems unlikely),
7104 then we require all beyond the first two to use the same
7107 found_equiv = false;
7108 mode = GET_MODE (cc_src);
7110 FOR_EACH_EDGE (e, ei, bb->succs)
7115 if (e->flags & EDGE_COMPLEX)
7118 if (EDGE_COUNT (e->dest->preds) != 1
7119 || e->dest == EXIT_BLOCK_PTR
7120 /* Avoid endless recursion on unreachable blocks. */
7121 || e->dest == orig_bb)
7124 end = NEXT_INSN (BB_END (e->dest));
7125 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7129 if (! INSN_P (insn))
7132 /* If CC_SRC is modified, we have to stop looking for
7133 something which uses it. */
7134 if (modified_in_p (cc_src, insn))
7137 /* Check whether INSN sets CC_REG to CC_SRC. */
7138 set = single_set (insn);
7140 && REG_P (SET_DEST (set))
7141 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7144 enum machine_mode set_mode;
7145 enum machine_mode comp_mode;
7148 set_mode = GET_MODE (SET_SRC (set));
7149 comp_mode = set_mode;
7150 if (rtx_equal_p (cc_src, SET_SRC (set)))
7152 else if (GET_CODE (cc_src) == COMPARE
7153 && GET_CODE (SET_SRC (set)) == COMPARE
7155 && rtx_equal_p (XEXP (cc_src, 0),
7156 XEXP (SET_SRC (set), 0))
7157 && rtx_equal_p (XEXP (cc_src, 1),
7158 XEXP (SET_SRC (set), 1)))
7161 comp_mode = targetm.cc_modes_compatible (mode, set_mode);
7162 if (comp_mode != VOIDmode
7163 && (can_change_mode || comp_mode == mode))
7170 if (insn_count < ARRAY_SIZE (insns))
7172 insns[insn_count] = insn;
7173 modes[insn_count] = set_mode;
7174 last_insns[insn_count] = end;
7177 if (mode != comp_mode)
7179 gcc_assert (can_change_mode);
7182 /* The modified insn will be re-recognized later. */
7183 PUT_MODE (cc_src, mode);
7188 if (set_mode != mode)
7190 /* We found a matching expression in the
7191 wrong mode, but we don't have room to
7192 store it in the array. Punt. This case
7196 /* INSN sets CC_REG to a value equal to CC_SRC
7197 with the right mode. We can simply delete
7202 /* We found an instruction to delete. Keep looking,
7203 in the hopes of finding a three-way jump. */
7207 /* We found an instruction which sets the condition
7208 code, so don't look any farther. */
7212 /* If INSN sets CC_REG in some other way, don't look any
7214 if (reg_set_p (cc_reg, insn))
7218 /* If we fell off the bottom of the block, we can keep looking
7219 through successors. We pass CAN_CHANGE_MODE as false because
7220 we aren't prepared to handle compatibility between the
7221 further blocks and this block. */
7224 enum machine_mode submode;
7226 submode = cse_cc_succs (e->dest, orig_bb, cc_reg, cc_src, false);
7227 if (submode != VOIDmode)
7229 gcc_assert (submode == mode);
7231 can_change_mode = false;
7239 /* Now INSN_COUNT is the number of instructions we found which set
7240 CC_REG to a value equivalent to CC_SRC. The instructions are in
7241 INSNS. The modes used by those instructions are in MODES. */
7244 for (i = 0; i < insn_count; ++i)
7246 if (modes[i] != mode)
7248 /* We need to change the mode of CC_REG in INSNS[i] and
7249 subsequent instructions. */
7252 if (GET_MODE (cc_reg) == mode)
7255 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7257 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7261 delete_insn_and_edges (insns[i]);
7267 /* If we have a fixed condition code register (or two), walk through
7268 the instructions and try to eliminate duplicate assignments. */
7271 cse_condition_code_reg (void)
7273 unsigned int cc_regno_1;
7274 unsigned int cc_regno_2;
7279 if (! targetm.fixed_condition_code_regs (&cc_regno_1, &cc_regno_2))
7282 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7283 if (cc_regno_2 != INVALID_REGNUM)
7284 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7286 cc_reg_2 = NULL_RTX;
7295 enum machine_mode mode;
7296 enum machine_mode orig_mode;
7298 /* Look for blocks which end with a conditional jump based on a
7299 condition code register. Then look for the instruction which
7300 sets the condition code register. Then look through the
7301 successor blocks for instructions which set the condition
7302 code register to the same value. There are other possible
7303 uses of the condition code register, but these are by far the
7304 most common and the ones which we are most likely to be able
7307 last_insn = BB_END (bb);
7308 if (!JUMP_P (last_insn))
7311 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7313 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7318 cc_src_insn = NULL_RTX;
7320 for (insn = PREV_INSN (last_insn);
7321 insn && insn != PREV_INSN (BB_HEAD (bb));
7322 insn = PREV_INSN (insn))
7326 if (! INSN_P (insn))
7328 set = single_set (insn);
7330 && REG_P (SET_DEST (set))
7331 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7334 cc_src = SET_SRC (set);
7337 else if (reg_set_p (cc_reg, insn))
7344 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7347 /* Now CC_REG is a condition code register used for a
7348 conditional jump at the end of the block, and CC_SRC, in
7349 CC_SRC_INSN, is the value to which that condition code
7350 register is set, and CC_SRC is still meaningful at the end of
7353 orig_mode = GET_MODE (cc_src);
7354 mode = cse_cc_succs (bb, bb, cc_reg, cc_src, true);
7355 if (mode != VOIDmode)
7357 gcc_assert (mode == GET_MODE (cc_src));
7358 if (mode != orig_mode)
7360 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7362 cse_change_cc_mode_insn (cc_src_insn, newreg);
7364 /* Do the same in the following insns that use the
7365 current value of CC_REG within BB. */
7366 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
7367 NEXT_INSN (last_insn),
7375 /* Perform common subexpression elimination. Nonzero value from
7376 `cse_main' means that jumps were simplified and some code may now
7377 be unreachable, so do jump optimization again. */
7379 gate_handle_cse (void)
7381 return optimize > 0;
7385 rest_of_handle_cse (void)
7390 dump_flow_info (dump_file, dump_flags);
7392 tem = cse_main (get_insns (), max_reg_num ());
7394 /* If we are not running more CSE passes, then we are no longer
7395 expecting CSE to be run. But always rerun it in a cheap mode. */
7396 cse_not_expected = !flag_rerun_cse_after_loop && !flag_gcse;
7400 timevar_push (TV_JUMP);
7401 rebuild_jump_labels (get_insns ());
7403 timevar_pop (TV_JUMP);
7405 else if (tem == 1 || optimize > 1)
7411 struct rtl_opt_pass pass_cse =
7416 gate_handle_cse, /* gate */
7417 rest_of_handle_cse, /* execute */
7420 0, /* static_pass_number */
7422 0, /* properties_required */
7423 0, /* properties_provided */
7424 0, /* properties_destroyed */
7425 0, /* todo_flags_start */
7426 TODO_df_finish | TODO_verify_rtl_sharing |
7429 TODO_verify_flow, /* todo_flags_finish */
7435 gate_handle_cse2 (void)
7437 return optimize > 0 && flag_rerun_cse_after_loop;
7440 /* Run second CSE pass after loop optimizations. */
7442 rest_of_handle_cse2 (void)
7447 dump_flow_info (dump_file, dump_flags);
7449 tem = cse_main (get_insns (), max_reg_num ());
7451 /* Run a pass to eliminate duplicated assignments to condition code
7452 registers. We have to run this after bypass_jumps, because it
7453 makes it harder for that pass to determine whether a jump can be
7455 cse_condition_code_reg ();
7457 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7461 timevar_push (TV_JUMP);
7462 rebuild_jump_labels (get_insns ());
7464 timevar_pop (TV_JUMP);
7469 cse_not_expected = 1;
7474 struct rtl_opt_pass pass_cse2 =
7479 gate_handle_cse2, /* gate */
7480 rest_of_handle_cse2, /* execute */
7483 0, /* static_pass_number */
7484 TV_CSE2, /* tv_id */
7485 0, /* properties_required */
7486 0, /* properties_provided */
7487 0, /* properties_destroyed */
7488 0, /* todo_flags_start */
7489 TODO_df_finish | TODO_verify_rtl_sharing |
7492 TODO_verify_flow /* todo_flags_finish */
7497 gate_handle_cse_after_global_opts (void)
7499 return optimize > 0 && flag_rerun_cse_after_global_opts;
7502 /* Run second CSE pass after loop optimizations. */
7504 rest_of_handle_cse_after_global_opts (void)
7509 /* We only want to do local CSE, so don't follow jumps. */
7510 save_cfj = flag_cse_follow_jumps;
7511 flag_cse_follow_jumps = 0;
7513 rebuild_jump_labels (get_insns ());
7514 tem = cse_main (get_insns (), max_reg_num ());
7515 purge_all_dead_edges ();
7516 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7518 cse_not_expected = !flag_rerun_cse_after_loop;
7520 /* If cse altered any jumps, rerun jump opts to clean things up. */
7523 timevar_push (TV_JUMP);
7524 rebuild_jump_labels (get_insns ());
7526 timevar_pop (TV_JUMP);
7531 flag_cse_follow_jumps = save_cfj;
7535 struct rtl_opt_pass pass_cse_after_global_opts =
7539 "cse_local", /* name */
7540 gate_handle_cse_after_global_opts, /* gate */
7541 rest_of_handle_cse_after_global_opts, /* execute */
7544 0, /* static_pass_number */
7546 0, /* properties_required */
7547 0, /* properties_provided */
7548 0, /* properties_destroyed */
7549 0, /* todo_flags_start */
7550 TODO_df_finish | TODO_verify_rtl_sharing |
7553 TODO_verify_flow /* todo_flags_finish */