1 /* Subroutines for insn-output.c for AT&T we32000 Family.
2 Copyright (C) 1991, 1992, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
4 Contributed by John Wehle (john@feith1.uucp)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
26 #include "insn-config.h"
35 output_move_double (operands)
42 if (GET_CODE (operands[0]) == REG)
44 lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
45 msw_dreg = operands[0];
47 else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
48 lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
52 if (GET_CODE (operands[1]) == REG)
54 lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
55 lsw_sreg = lsw_operands[1];
57 else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
59 lsw_operands[1] = adj_offsettable_operand (operands[1], 4);
60 lsw_sreg = operands[1];
65 if (CONSTANT_ADDRESS_P (lsw_sreg))
70 if (GET_CODE (lsw_sreg) == MEM)
72 lsw_sreg = XEXP (lsw_sreg, 0);
75 if (GET_CODE (lsw_sreg) == PLUS)
77 if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 1)))
79 lsw_sreg = XEXP (lsw_sreg, 0);
82 else if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 0)))
84 lsw_sreg = XEXP (lsw_sreg, 1);
91 else if (GET_CODE (operands[1]) == CONST_DOUBLE)
93 lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));
94 operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
96 else if (GET_CODE (operands[1]) == CONST_INT)
98 lsw_operands[1] = operands[1];
99 operands[1] = const0_rtx;
104 if (!msw_dreg || !lsw_sreg || REGNO (msw_dreg) != REGNO (lsw_sreg))
106 output_asm_insn ("movw %1, %0", operands);
107 output_asm_insn ("movw %1, %0", lsw_operands);
111 output_asm_insn ("movw %1, %0", lsw_operands);
112 output_asm_insn ("movw %1, %0", operands);
117 output_push_double (operands)
122 if (GET_CODE (operands[0]) == REG)
123 lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
124 else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
125 lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
126 else if (GET_CODE (operands[0]) == CONST_DOUBLE)
128 lsw_operands[0] = GEN_INT (CONST_DOUBLE_HIGH (operands[0]));
129 operands[0] = GEN_INT (CONST_DOUBLE_LOW (operands[0]));
131 else if (GET_CODE (operands[0]) == CONST_INT)
133 lsw_operands[0] = operands[0];
134 operands[0] = const0_rtx;
139 output_asm_insn ("pushw %0", operands);
140 output_asm_insn ("pushw %0", lsw_operands);