gcc/config/sh/lib1funcs.asm

   1 /* Copyright (C) 1994 Free Software Foundation, Inc.
   2
   3 This file is free software; you can redistribute it and/or modify it
   4 under the terms of the GNU General Public License as published by the
   5 Free Software Foundation; either version 2, or (at your option) any
   6 later version.
   7
   8 In addition to the permissions in the GNU General Public License, the
   9 Free Software Foundation gives you unlimited permission to link the
  10 compiled version of this file with other programs, and to distribute
  11 those programs without any restriction coming from the use of this
  12 file.  (The General Public License restrictions do apply in other
  13 respects; for example, they cover modification of the file, and
  14 distribution when not linked into another program.)
  15
  16 This file is distributed in the hope that it will be useful, but
  17 WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19 General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; see the file COPYING.  If not, write to
  23 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
  24
  25 /* As a special exception, if you link this library with other files,
  26    some of which are compiled with GCC, to produce an executable,
  27    this library does not by itself cause the resulting executable
  28    to be covered by the GNU General Public License.
  29    This exception does not however invalidate any other reasons why
  30    the executable file might be covered by the GNU General Public License.  */
  31
  32
  33 !! libgcc1 routines for the Hitachi SH cpu.
  34 !! Contributed by Steve Chamberlain.
  35 !! sac@cygnus.com
  36
  37 !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
  38 !! recoded in assembly by Toshiyasu Morita
  39 !! tm@netcom.com
  40
  41 #ifdef L_ashiftrt
  42         .global ___ashiftrt_r4_0
  43         .global ___ashiftrt_r4_1
  44         .global ___ashiftrt_r4_2
  45         .global ___ashiftrt_r4_3
  46         .global ___ashiftrt_r4_4
  47         .global ___ashiftrt_r4_5
  48         .global ___ashiftrt_r4_6
  49         .global ___ashiftrt_r4_7
  50         .global ___ashiftrt_r4_8
  51         .global ___ashiftrt_r4_9
  52         .global ___ashiftrt_r4_10
  53         .global ___ashiftrt_r4_11
  54         .global ___ashiftrt_r4_12
  55         .global ___ashiftrt_r4_13
  56         .global ___ashiftrt_r4_14
  57         .global ___ashiftrt_r4_15
  58         .global ___ashiftrt_r4_16
  59         .global ___ashiftrt_r4_17
  60         .global ___ashiftrt_r4_18
  61         .global ___ashiftrt_r4_19
  62         .global ___ashiftrt_r4_20
  63         .global ___ashiftrt_r4_21
  64         .global ___ashiftrt_r4_22
  65         .global ___ashiftrt_r4_23
  66         .global ___ashiftrt_r4_24
  67         .global ___ashiftrt_r4_25
  68         .global ___ashiftrt_r4_26
  69         .global ___ashiftrt_r4_27
  70         .global ___ashiftrt_r4_28
  71         .global ___ashiftrt_r4_29
  72         .global ___ashiftrt_r4_30
  73         .global ___ashiftrt_r4_31
  74         .global ___ashiftrt_r4_32
  75
  76         .align  1
  77 ___ashiftrt_r4_32:
  78 ___ashiftrt_r4_31:
  79         rotcl   r4
  80         rts
  81         subc    r4,r4
  82
  83 ___ashiftrt_r4_30:
  84         shar    r4
  85 ___ashiftrt_r4_29:
  86         shar    r4
  87 ___ashiftrt_r4_28:
  88         shar    r4
  89 ___ashiftrt_r4_27:
  90         shar    r4
  91 ___ashiftrt_r4_26:
  92         shar    r4
  93 ___ashiftrt_r4_25:
  94         shar    r4
  95 ___ashiftrt_r4_24:
  96         shlr16  r4
  97         shlr8   r4
  98         rts
  99         exts.b  r4,r4
 100
 101 ___ashiftrt_r4_23:
 102         shar    r4
 103 ___ashiftrt_r4_22:
 104         shar    r4
 105 ___ashiftrt_r4_21:
 106         shar    r4
 107 ___ashiftrt_r4_20:
 108         shar    r4
 109 ___ashiftrt_r4_19:
 110         shar    r4
 111 ___ashiftrt_r4_18:
 112         shar    r4
 113 ___ashiftrt_r4_17:
 114         shar    r4
 115 ___ashiftrt_r4_16:
 116         shlr16  r4
 117         rts
 118         exts.w  r4,r4
 119
 120 ___ashiftrt_r4_15:
 121         shar    r4
 122 ___ashiftrt_r4_14:
 123         shar    r4
 124 ___ashiftrt_r4_13:
 125         shar    r4
 126 ___ashiftrt_r4_12:
 127         shar    r4
 128 ___ashiftrt_r4_11:
 129         shar    r4
 130 ___ashiftrt_r4_10:
 131         shar    r4
 132 ___ashiftrt_r4_9:
 133         shar    r4
 134 ___ashiftrt_r4_8:
 135         shar    r4
 136 ___ashiftrt_r4_7:
 137         shar    r4
 138 ___ashiftrt_r4_6:
 139         shar    r4
 140 ___ashiftrt_r4_5:
 141         shar    r4
 142 ___ashiftrt_r4_4:
 143         shar    r4
 144 ___ashiftrt_r4_3:
 145         shar    r4
 146 ___ashiftrt_r4_2:
 147         shar    r4
 148 ___ashiftrt_r4_1:
 149         rts
 150         shar    r4
 151
 152 ___ashiftrt_r4_0:
 153         rts
 154         nop
 155 #endif
 156
 157 #ifdef L_ashiftrt_n
 158
 159 !
 160 ! ___ashrsi3
 161 !
 162 ! Entry:
 163 !
 164 ! r4: Value to shift
 165 ! r5: Shifts
 166 !
 167 ! Exit:
 168 !
 169 ! r0: Result
 170 !
 171 ! Destroys:
 172 !
 173 ! (none)
 174 !
 175
 176         .global ___ashrsi3
 177         .align  2
 178 ___ashrsi3:
 179         mov     #31,r0
 180         cmp/hi  r0,r5
 181         bt      L_ashrsi3_31
 182         mova    L_ashrsi3_table,r0
 183         mov.b   @(r0,r5),r5
 184         add     r5,r0           ! Change to braf when gas is fixed
 185         jmp     @r0
 186         mov     r4,r0
 187
 188 L_ashrsi3_table:
 189         .byte           L_ashrsi3_0-L_ashrsi3_table
 190         .byte           L_ashrsi3_1-L_ashrsi3_table
 191         .byte           L_ashrsi3_2-L_ashrsi3_table
 192         .byte           L_ashrsi3_3-L_ashrsi3_table
 193         .byte           L_ashrsi3_4-L_ashrsi3_table
 194         .byte           L_ashrsi3_5-L_ashrsi3_table
 195         .byte           L_ashrsi3_6-L_ashrsi3_table
 196         .byte           L_ashrsi3_7-L_ashrsi3_table
 197         .byte           L_ashrsi3_8-L_ashrsi3_table
 198         .byte           L_ashrsi3_9-L_ashrsi3_table
 199         .byte           L_ashrsi3_10-L_ashrsi3_table
 200         .byte           L_ashrsi3_11-L_ashrsi3_table
 201         .byte           L_ashrsi3_12-L_ashrsi3_table
 202         .byte           L_ashrsi3_13-L_ashrsi3_table
 203         .byte           L_ashrsi3_14-L_ashrsi3_table
 204         .byte           L_ashrsi3_15-L_ashrsi3_table
 205         .byte           L_ashrsi3_16-L_ashrsi3_table
 206         .byte           L_ashrsi3_17-L_ashrsi3_table
 207         .byte           L_ashrsi3_18-L_ashrsi3_table
 208         .byte           L_ashrsi3_19-L_ashrsi3_table
 209         .byte           L_ashrsi3_20-L_ashrsi3_table
 210         .byte           L_ashrsi3_21-L_ashrsi3_table
 211         .byte           L_ashrsi3_22-L_ashrsi3_table
 212         .byte           L_ashrsi3_23-L_ashrsi3_table
 213         .byte           L_ashrsi3_24-L_ashrsi3_table
 214         .byte           L_ashrsi3_25-L_ashrsi3_table
 215         .byte           L_ashrsi3_26-L_ashrsi3_table
 216         .byte           L_ashrsi3_27-L_ashrsi3_table
 217         .byte           L_ashrsi3_28-L_ashrsi3_table
 218         .byte           L_ashrsi3_29-L_ashrsi3_table
 219         .byte           L_ashrsi3_30-L_ashrsi3_table
 220         .byte           L_ashrsi3_31-L_ashrsi3_table
 221
 222 L_ashrsi3_31:
 223         rotcl   r0
 224         rts
 225         subc    r0,r0
 226
 227 L_ashrsi3_30:
 228         shar    r0
 229 L_ashrsi3_29:
 230         shar    r0
 231 L_ashrsi3_28:
 232         shar    r0
 233 L_ashrsi3_27:
 234         shar    r0
 235 L_ashrsi3_26:
 236         shar    r0
 237 L_ashrsi3_25:
 238         shar    r0
 239 L_ashrsi3_24:
 240         shlr16  r0
 241         shlr8   r0
 242         rts
 243         exts.b  r0,r0
 244
 245 L_ashrsi3_23:
 246         shar    r0
 247 L_ashrsi3_22:
 248         shar    r0
 249 L_ashrsi3_21:
 250         shar    r0
 251 L_ashrsi3_20:
 252         shar    r0
 253 L_ashrsi3_19:
 254         shar    r0
 255 L_ashrsi3_18:
 256         shar    r0
 257 L_ashrsi3_17:
 258         shar    r0
 259 L_ashrsi3_16:
 260         shlr16  r0
 261         rts
 262         exts.w  r0,r0
 263
 264 L_ashrsi3_15:
 265         shar    r0
 266 L_ashrsi3_14:
 267         shar    r0
 268 L_ashrsi3_13:
 269         shar    r0
 270 L_ashrsi3_12:
 271         shar    r0
 272 L_ashrsi3_11:
 273         shar    r0
 274 L_ashrsi3_10:
 275         shar    r0
 276 L_ashrsi3_9:
 277         shar    r0
 278 L_ashrsi3_8:
 279         shar    r0
 280 L_ashrsi3_7:
 281         shar    r0
 282 L_ashrsi3_6:
 283         shar    r0
 284 L_ashrsi3_5:
 285         shar    r0
 286 L_ashrsi3_4:
 287         shar    r0
 288 L_ashrsi3_3:
 289         shar    r0
 290 L_ashrsi3_2:
 291         shar    r0
 292 L_ashrsi3_1:
 293         rts
 294         shar    r0
 295
 296 L_ashrsi3_0:
 297         rts
 298         nop
 299
 300 #endif
 301
 302 #ifdef L_ashiftlt
 303
 304 !
 305 ! ___ashlsi3
 306 !
 307 ! Entry:
 308 !
 309 ! r4: Value to shift
 310 ! r5: Shifts
 311 !
 312 ! Exit:
 313 !
 314 ! r0: Result
 315 !
 316 ! Destroys:
 317 !
 318 ! (none)
 319 !
 320         .global ___ashlsi3
 321         .align  2
 322 ___ashlsi3:
 323         mov     #31,r0
 324         cmp/hi  r0,r5
 325         bt      L_ashlsi3_32
 326         mova    L_ashlsi3_table,r0
 327         mov.b   @(r0,r5),r5
 328         add     r5,r0           ! Change to braf when gas is fixed
 329         jmp     @r0
 330         mov     r4,r0
 331
 332 L_ashlsi3_table:
 333         .byte           L_ashlsi3_0-L_ashlsi3_table
 334         .byte           L_ashlsi3_1-L_ashlsi3_table
 335         .byte           L_ashlsi3_2-L_ashlsi3_table
 336         .byte           L_ashlsi3_3-L_ashlsi3_table
 337         .byte           L_ashlsi3_4-L_ashlsi3_table
 338         .byte           L_ashlsi3_5-L_ashlsi3_table
 339         .byte           L_ashlsi3_6-L_ashlsi3_table
 340         .byte           L_ashlsi3_7-L_ashlsi3_table
 341         .byte           L_ashlsi3_8-L_ashlsi3_table
 342         .byte           L_ashlsi3_9-L_ashlsi3_table
 343         .byte           L_ashlsi3_10-L_ashlsi3_table
 344         .byte           L_ashlsi3_11-L_ashlsi3_table
 345         .byte           L_ashlsi3_12-L_ashlsi3_table
 346         .byte           L_ashlsi3_13-L_ashlsi3_table
 347         .byte           L_ashlsi3_14-L_ashlsi3_table
 348         .byte           L_ashlsi3_15-L_ashlsi3_table
 349         .byte           L_ashlsi3_16-L_ashlsi3_table
 350         .byte           L_ashlsi3_17-L_ashlsi3_table
 351         .byte           L_ashlsi3_18-L_ashlsi3_table
 352         .byte           L_ashlsi3_19-L_ashlsi3_table
 353         .byte           L_ashlsi3_20-L_ashlsi3_table
 354         .byte           L_ashlsi3_21-L_ashlsi3_table
 355         .byte           L_ashlsi3_22-L_ashlsi3_table
 356         .byte           L_ashlsi3_23-L_ashlsi3_table
 357         .byte           L_ashlsi3_24-L_ashlsi3_table
 358         .byte           L_ashlsi3_25-L_ashlsi3_table
 359         .byte           L_ashlsi3_26-L_ashlsi3_table
 360         .byte           L_ashlsi3_27-L_ashlsi3_table
 361         .byte           L_ashlsi3_28-L_ashlsi3_table
 362         .byte           L_ashlsi3_29-L_ashlsi3_table
 363         .byte           L_ashlsi3_30-L_ashlsi3_table
 364         .byte           L_ashlsi3_31-L_ashlsi3_table
 365
 366 L_ashlsi3_6:
 367         shll2   r0
 368 L_ashlsi3_4:
 369         shll2   r0
 370 L_ashlsi3_2:
 371         rts
 372         shll2   r0
 373
 374 L_ashlsi3_7:
 375         shll2   r0
 376 L_ashlsi3_5:
 377         shll2   r0
 378 L_ashlsi3_3:
 379         shll2   r0
 380 L_ashlsi3_1:
 381         rts
 382         shll    r0
 383
 384 L_ashlsi3_14:
 385         shll2   r0
 386 L_ashlsi3_12:
 387         shll2   r0
 388 L_ashlsi3_10:
 389         shll2   r0
 390 L_ashlsi3_8:
 391         rts
 392         shll8   r0
 393
 394 L_ashlsi3_15:
 395         shll2   r0
 396 L_ashlsi3_13:
 397         shll2   r0
 398 L_ashlsi3_11:
 399         shll2   r0
 400 L_ashlsi3_9:
 401         shll8   r0
 402         rts
 403         shll    r0
 404
 405 L_ashlsi3_22:
 406         shll2   r0
 407 L_ashlsi3_20:
 408         shll2   r0
 409 L_ashlsi3_18:
 410         shll2   r0
 411 L_ashlsi3_16:
 412         rts
 413         shll16  r0
 414
 415 L_ashlsi3_23:
 416         shll2   r0
 417 L_ashlsi3_21:
 418         shll2   r0
 419 L_ashlsi3_19:
 420         shll2   r0
 421 L_ashlsi3_17:
 422         shll16  r0
 423         rts
 424         shll    r0
 425
 426 L_ashlsi3_30:
 427         shll2   r0
 428 L_ashlsi3_28:
 429         shll2   r0
 430 L_ashlsi3_26:
 431         shll2   r0
 432 L_ashlsi3_24:
 433         shll16  r0
 434         rts
 435         shll8   r0
 436
 437 L_ashlsi3_31:
 438         shll2   r0
 439 L_ashlsi3_29:
 440         shll2   r0
 441 L_ashlsi3_27:
 442         shll2   r0
 443 L_ashlsi3_25:
 444         shll16  r0
 445         shll8   r0
 446         rts
 447         shll    r0
 448
 449 L_ashlsi3_32:
 450         rts
 451         mov     #0,r0
 452
 453 L_ashlsi3_0:
 454         rts
 455         nop
 456
 457 #endif
 458
 459 #ifdef L_lshiftrt
 460
 461 !
 462 ! ___lshrsi3
 463 !
 464 ! Entry:
 465 !
 466 ! r4: Value to shift
 467 ! r5: Shifts
 468 !
 469 ! Exit:
 470 !
 471 ! r0: Result
 472 !
 473 ! Destroys:
 474 !
 475 ! (none)
 476 !
 477         .global ___lshrsi3
 478         .align  2
 479 ___lshrsi3:
 480         mov     #31,r0
 481         cmp/hi  r0,r5
 482         bt      L_lshrsi3_32
 483         mova    L_lshrsi3_table,r0
 484         mov.b   @(r0,r5),r5
 485         add     r5,r0           ! Change to braf when gas is fixed
 486         jmp     @r0
 487         mov     r4,r0
 488
 489 L_lshrsi3_table:
 490         .byte           L_lshrsi3_0-L_lshrsi3_table
 491         .byte           L_lshrsi3_1-L_lshrsi3_table
 492         .byte           L_lshrsi3_2-L_lshrsi3_table
 493         .byte           L_lshrsi3_3-L_lshrsi3_table
 494         .byte           L_lshrsi3_4-L_lshrsi3_table
 495         .byte           L_lshrsi3_5-L_lshrsi3_table
 496         .byte           L_lshrsi3_6-L_lshrsi3_table
 497         .byte           L_lshrsi3_7-L_lshrsi3_table
 498         .byte           L_lshrsi3_8-L_lshrsi3_table
 499         .byte           L_lshrsi3_9-L_lshrsi3_table
 500         .byte           L_lshrsi3_10-L_lshrsi3_table
 501         .byte           L_lshrsi3_11-L_lshrsi3_table
 502         .byte           L_lshrsi3_12-L_lshrsi3_table
 503         .byte           L_lshrsi3_13-L_lshrsi3_table
 504         .byte           L_lshrsi3_14-L_lshrsi3_table
 505         .byte           L_lshrsi3_15-L_lshrsi3_table
 506         .byte           L_lshrsi3_16-L_lshrsi3_table
 507         .byte           L_lshrsi3_17-L_lshrsi3_table
 508         .byte           L_lshrsi3_18-L_lshrsi3_table
 509         .byte           L_lshrsi3_19-L_lshrsi3_table
 510         .byte           L_lshrsi3_20-L_lshrsi3_table
 511         .byte           L_lshrsi3_21-L_lshrsi3_table
 512         .byte           L_lshrsi3_22-L_lshrsi3_table
 513         .byte           L_lshrsi3_23-L_lshrsi3_table
 514         .byte           L_lshrsi3_24-L_lshrsi3_table
 515         .byte           L_lshrsi3_25-L_lshrsi3_table
 516         .byte           L_lshrsi3_26-L_lshrsi3_table
 517         .byte           L_lshrsi3_27-L_lshrsi3_table
 518         .byte           L_lshrsi3_28-L_lshrsi3_table
 519         .byte           L_lshrsi3_29-L_lshrsi3_table
 520         .byte           L_lshrsi3_30-L_lshrsi3_table
 521         .byte           L_lshrsi3_31-L_lshrsi3_table
 522
 523 L_lshrsi3_6:
 524         shlr2   r0
 525 L_lshrsi3_4:
 526         shlr2   r0
 527 L_lshrsi3_2:
 528         rts
 529         shlr2   r0
 530
 531 L_lshrsi3_7:
 532         shlr2   r0
 533 L_lshrsi3_5:
 534         shlr2   r0
 535 L_lshrsi3_3:
 536         shlr2   r0
 537 L_lshrsi3_1:
 538         rts
 539         shlr    r0
 540
 541 L_lshrsi3_14:
 542         shlr2   r0
 543 L_lshrsi3_12:
 544         shlr2   r0
 545 L_lshrsi3_10:
 546         shlr2   r0
 547 L_lshrsi3_8:
 548         rts
 549         shlr8   r0
 550
 551 L_lshrsi3_15:
 552         shlr2   r0
 553 L_lshrsi3_13:
 554         shlr2   r0
 555 L_lshrsi3_11:
 556         shlr2   r0
 557 L_lshrsi3_9:
 558         shlr8   r0
 559         rts
 560         shlr    r0
 561
 562 L_lshrsi3_22:
 563         shlr2   r0
 564 L_lshrsi3_20:
 565         shlr2   r0
 566 L_lshrsi3_18:
 567         shlr2   r0
 568 L_lshrsi3_16:
 569         rts
 570         shlr16  r0
 571
 572 L_lshrsi3_23:
 573         shlr2   r0
 574 L_lshrsi3_21:
 575         shlr2   r0
 576 L_lshrsi3_19:
 577         shlr2   r0
 578 L_lshrsi3_17:
 579         shlr16  r0
 580         rts
 581         shlr    r0
 582
 583 L_lshrsi3_30:
 584         shlr2   r0
 585 L_lshrsi3_28:
 586         shlr2   r0
 587 L_lshrsi3_26:
 588         shlr2   r0
 589 L_lshrsi3_24:
 590         shlr16  r0
 591         rts
 592         shlr8   r0
 593
 594 L_lshrsi3_31:
 595         shlr2   r0
 596 L_lshrsi3_29:
 597         shlr2   r0
 598 L_lshrsi3_27:
 599         shlr2   r0
 600 L_lshrsi3_25:
 601         shlr16  r0
 602         shlr8   r0
 603         rts
 604         shlr    r0
 605
 606 L_lshrsi3_32:
 607         rts
 608         mov     #0,r0
 609
 610 L_lshrsi3_0:
 611         rts
 612         nop
 613
 614 #endif
 615
 616 #ifdef L_movstr
 617         .text
 618 ! done all the large groups, do the remainder
 619
 620 ! jump to movstr+
 621 done:
 622         add     #64,r5
 623         mova    ___movstrSI0,r0
 624         shll2   r6
 625         add     r6,r0
 626         jmp     @r0
 627         add     #64,r4
 628         .align  4
 629         .global ___movstrSI64
 630 ___movstrSI64:
 631         mov.l   @(60,r5),r0
 632         mov.l   r0,@(60,r4)
 633         .global ___movstrSI60
 634 ___movstrSI60:
 635         mov.l   @(56,r5),r0
 636         mov.l   r0,@(56,r4)
 637         .global ___movstrSI56
 638 ___movstrSI56:
 639         mov.l   @(52,r5),r0
 640         mov.l   r0,@(52,r4)
 641         .global ___movstrSI52
 642 ___movstrSI52:
 643         mov.l   @(48,r5),r0
 644         mov.l   r0,@(48,r4)
 645         .global ___movstrSI48
 646 ___movstrSI48:
 647         mov.l   @(44,r5),r0
 648         mov.l   r0,@(44,r4)
 649         .global ___movstrSI44
 650 ___movstrSI44:
 651         mov.l   @(40,r5),r0
 652         mov.l   r0,@(40,r4)
 653         .global ___movstrSI40
 654 ___movstrSI40:
 655         mov.l   @(36,r5),r0
 656         mov.l   r0,@(36,r4)
 657         .global ___movstrSI36
 658 ___movstrSI36:
 659         mov.l   @(32,r5),r0
 660         mov.l   r0,@(32,r4)
 661         .global ___movstrSI32
 662 ___movstrSI32:
 663         mov.l   @(28,r5),r0
 664         mov.l   r0,@(28,r4)
 665         .global ___movstrSI28
 666 ___movstrSI28:
 667         mov.l   @(24,r5),r0
 668         mov.l   r0,@(24,r4)
 669         .global ___movstrSI24
 670 ___movstrSI24:
 671         mov.l   @(20,r5),r0
 672         mov.l   r0,@(20,r4)
 673         .global ___movstrSI20
 674 ___movstrSI20:
 675         mov.l   @(16,r5),r0
 676         mov.l   r0,@(16,r4)
 677         .global ___movstrSI16
 678 ___movstrSI16:
 679         mov.l   @(12,r5),r0
 680         mov.l   r0,@(12,r4)
 681         .global ___movstrSI12
 682 ___movstrSI12:
 683         mov.l   @(8,r5),r0
 684         mov.l   r0,@(8,r4)
 685         .global ___movstrSI8
 686 ___movstrSI8:
 687         mov.l   @(4,r5),r0
 688         mov.l   r0,@(4,r4)
 689         .global ___movstrSI4
 690 ___movstrSI4:
 691         mov.l   @(0,r5),r0
 692         mov.l   r0,@(0,r4)
 693 ___movstrSI0:
 694         rts
 695         or      r0,r0,r0
 696
 697         .align  4
 698
 699         .global ___movstr
 700 ___movstr:
 701         mov.l   @(60,r5),r0
 702         mov.l   r0,@(60,r4)
 703
 704         mov.l   @(56,r5),r0
 705         mov.l   r0,@(56,r4)
 706
 707         mov.l   @(52,r5),r0
 708         mov.l   r0,@(52,r4)
 709
 710         mov.l   @(48,r5),r0
 711         mov.l   r0,@(48,r4)
 712
 713         mov.l   @(44,r5),r0
 714         mov.l   r0,@(44,r4)
 715
 716         mov.l   @(40,r5),r0
 717         mov.l   r0,@(40,r4)
 718
 719         mov.l   @(36,r5),r0
 720         mov.l   r0,@(36,r4)
 721
 722         mov.l   @(32,r5),r0
 723         mov.l   r0,@(32,r4)
 724
 725         mov.l   @(28,r5),r0
 726         mov.l   r0,@(28,r4)
 727
 728         mov.l   @(24,r5),r0
 729         mov.l   r0,@(24,r4)
 730
 731         mov.l   @(20,r5),r0
 732         mov.l   r0,@(20,r4)
 733
 734         mov.l   @(16,r5),r0
 735         mov.l   r0,@(16,r4)
 736
 737         mov.l   @(12,r5),r0
 738         mov.l   r0,@(12,r4)
 739
 740         mov.l   @(8,r5),r0
 741         mov.l   r0,@(8,r4)
 742
 743         mov.l   @(4,r5),r0
 744         mov.l   r0,@(4,r4)
 745
 746         mov.l   @(0,r5),r0
 747         mov.l   r0,@(0,r4)
 748
 749         add     #-16,r6
 750         cmp/pl  r6
 751         bf      done
 752
 753         add     #64,r5
 754         bra     ___movstr
 755         add     #64,r4
 756 #endif
 757
 758 #ifdef L_mulsi3
 759
 760
 761         .global ___mulsi3
 762
 763 ! r4 =       aabb
 764 ! r5 =       ccdd
 765 ! r0 = aabb*ccdd  via partial products
 766 !
 767 ! if aa == 0 and cc = 0
 768 ! r0 = bb*dd
 769 !
 770 ! else
 771 ! aa = bb*dd + (aa*dd*65536) + (cc*bb*65536)
 772 !
 773
 774 ___mulsi3:
 775         mulu    r4,r5           ! multiply the lsws  macl=bb*dd
 776         mov     r5,r3           ! r3 = ccdd
 777         swap.w  r4,r2           ! r2 = bbaa
 778         xtrct   r2,r3           ! r3 = aacc
 779         tst     r3,r3           ! msws zero ?
 780         bf      hiset
 781         rts                     ! yes - then weve got the answer
 782         sts     macl,r0
 783
 784 hiset:  sts     macl,r0         ! r0 = bb*dd
 785         mulu    r2,r5           | brewing macl = aa*dd
 786         sts     macl,r1
 787         mulu    r3,r4           | brewing macl = cc*bb
 788         sts     macl,r2
 789         add     r1,r2
 790         shll16  r2
 791         rts
 792         add     r2,r0
 793
 794
 795 #endif
 796 #ifdef L_sdivsi3
 797         .title "SH DIVIDE"
 798 !! 4 byte integer Divide code for the Hitachi SH
 799 !!
 800 !! Steve Chamberlain
 801 !! sac@cygnus.com
 802 !!
 803 !!
 804
 805 !! args in r4 and r5, result in r0 clobber r1,r2,r3
 806
 807         .global ___sdivsi3
 808 ___sdivsi3:
 809         mov     r4,r1
 810         mov     r5,r0
 811
 812         tst     r0,r0
 813         bt      div0
 814         mov     #0,r2
 815         div0s   r2,r1
 816         subc    r3,r3
 817         subc    r2,r1
 818         div0s   r0,r3
 819         rotcl   r1
 820         div1    r0,r3
 821         rotcl   r1
 822         div1    r0,r3
 823         rotcl   r1
 824         div1    r0,r3
 825         rotcl   r1
 826         div1    r0,r3
 827         rotcl   r1
 828         div1    r0,r3
 829         rotcl   r1
 830         div1    r0,r3
 831         rotcl   r1
 832         div1    r0,r3
 833         rotcl   r1
 834         div1    r0,r3
 835         rotcl   r1
 836         div1    r0,r3
 837         rotcl   r1
 838         div1    r0,r3
 839         rotcl   r1
 840         div1    r0,r3
 841         rotcl   r1
 842         div1    r0,r3
 843         rotcl   r1
 844         div1    r0,r3
 845         rotcl   r1
 846         div1    r0,r3
 847         rotcl   r1
 848         div1    r0,r3
 849         rotcl   r1
 850         div1    r0,r3
 851         rotcl   r1
 852         div1    r0,r3
 853         rotcl   r1
 854         div1    r0,r3
 855         rotcl   r1
 856         div1    r0,r3
 857         rotcl   r1
 858         div1    r0,r3
 859         rotcl   r1
 860         div1    r0,r3
 861         rotcl   r1
 862         div1    r0,r3
 863         rotcl   r1
 864         div1    r0,r3
 865         rotcl   r1
 866         div1    r0,r3
 867         rotcl   r1
 868         div1    r0,r3
 869         rotcl   r1
 870         div1    r0,r3
 871         rotcl   r1
 872         div1    r0,r3
 873         rotcl   r1
 874         div1    r0,r3
 875         rotcl   r1
 876         div1    r0,r3
 877         rotcl   r1
 878         div1    r0,r3
 879         rotcl   r1
 880         div1    r0,r3
 881         rotcl   r1
 882         div1    r0,r3
 883         rotcl   r1
 884         addc    r2,r1
 885         rts
 886         mov     r1,r0
 887
 888
 889 div0:   rts
 890         mov     #0,r0
 891
 892 #endif
 893 #ifdef L_udivsi3
 894
 895         .title "SH DIVIDE"
 896 !! 4 byte integer Divide code for the Hitachi SH
 897 !!
 898 !! Steve Chamberlain
 899 !! sac@cygnus.com
 900 !!
 901 !!
 902
 903 !! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
 904         .global ___udivsi3
 905
 906 ___udivsi3:
 907 longway:
 908         mov     #0,r0
 909         div0u
 910         ! get one bit from the msb of the numerator into the T
 911         ! bit and divide it by whats in r5.  Put the answer bit
 912         ! into the T bit so it can come out again at the bottom
 913
 914         rotcl   r4 ; div1 r5,r0
 915         rotcl   r4 ; div1 r5,r0
 916         rotcl   r4 ; div1 r5,r0
 917         rotcl   r4 ; div1 r5,r0
 918         rotcl   r4 ; div1 r5,r0
 919         rotcl   r4 ; div1 r5,r0
 920         rotcl   r4 ; div1 r5,r0
 921         rotcl   r4 ; div1 r5,r0
 922
 923         rotcl   r4 ; div1 r5,r0
 924         rotcl   r4 ; div1 r5,r0
 925         rotcl   r4 ; div1 r5,r0
 926         rotcl   r4 ; div1 r5,r0
 927         rotcl   r4 ; div1 r5,r0
 928         rotcl   r4 ; div1 r5,r0
 929         rotcl   r4 ; div1 r5,r0
 930         rotcl   r4 ; div1 r5,r0
 931 shortway:
 932         rotcl   r4 ; div1 r5,r0
 933         rotcl   r4 ; div1 r5,r0
 934         rotcl   r4 ; div1 r5,r0
 935         rotcl   r4 ; div1 r5,r0
 936         rotcl   r4 ; div1 r5,r0
 937         rotcl   r4 ; div1 r5,r0
 938         rotcl   r4 ; div1 r5,r0
 939         rotcl   r4 ; div1 r5,r0
 940
 941 vshortway:
 942         rotcl   r4 ; div1 r5,r0
 943         rotcl   r4 ; div1 r5,r0
 944         rotcl   r4 ; div1 r5,r0
 945         rotcl   r4 ; div1 r5,r0
 946         rotcl   r4 ; div1 r5,r0
 947         rotcl   r4 ; div1 r5,r0
 948         rotcl   r4 ; div1 r5,r0
 949         rotcl   r4 ; div1 r5,r0
 950         rotcl   r4
 951 ret:    rts
 952         mov     r4,r0
 953
 954 #endif