1 /* score.h for Sunplus S+CORE processor
2 Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Sunnorth.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #include "score-conv.h"
23 /* Controlling the Compilation Driver. */
24 #undef SWITCH_TAKES_ARG
25 #define SWITCH_TAKES_ARG(CHAR) \
26 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
29 #define CPP_SPEC "%{mscore3:-D__score3__} %{G*}"
32 #define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \
33 %{!mscore*:-mscore7} \
35 %{mscore3d:-mscore3d} \
37 %{mscore7d:-mscore7d} \
41 #define ASM_SPEC "%{!mel:-EB} %{mel:-EL} \
42 %{!mscore*:-march=score7} \
43 %{mscore7:-march=score7} \
44 %{mscore7d:-march=score7} \
45 %{mscore3:-march=score3} \
46 %{mscore3d:-march=score3} \
47 %{march=score5:-march=score7} \
48 %{march=score5u:-march=score7} \
49 %{march=score7:-march=score7} \
50 %{march=score7d:-march=score7} \
51 %{march=score3:-march=score3} \
52 %{march=score3d:-march=score3} \
56 #define LINK_SPEC "%{!mel:-EB} %{mel:-EL} \
57 %{!mscore*:-mscore7_elf} \
58 %{mscore7:-mscore7_elf} \
59 %{mscore7d:-mscore7_elf} \
60 %{mscore3:-mscore3_elf} \
61 %{mscore3d:-mscore3_elf} \
62 %{march=score5:-mscore7_elf} \
63 %{march=score5u:-mscore7_elf} \
64 %{march=score7:-mscore7_elf} \
65 %{march=score7d:-mscore7_elf} \
66 %{march=score3:-mscore3_elf} \
67 %{march=score3d:-mscore3_elf} \
70 /* Run-time Target Specification. */
71 #define TARGET_CPU_CPP_BUILTINS() \
73 builtin_define ("SUNPLUS"); \
74 builtin_define ("__SCORE__"); \
75 builtin_define ("__score__"); \
76 if (TARGET_LITTLE_ENDIAN) \
77 builtin_define ("__scorele__"); \
79 builtin_define ("__scorebe__"); \
81 builtin_define ("__score5__"); \
83 builtin_define ("__score5u__"); \
85 builtin_define ("__score7__"); \
87 builtin_define ("__score7d__"); \
89 builtin_define ("__score3__"); \
91 builtin_define ("__score3d__"); \
94 #define TARGET_DEFAULT 0
96 #define SCORE_GCC_VERSION "1.6"
98 #define TARGET_VERSION \
99 fprintf (stderr, "Sunplus S+core rev=%s", SCORE_GCC_VERSION);
101 /* Target machine storage layout. */
102 #define BITS_BIG_ENDIAN 0
103 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
104 #define WORDS_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
106 /* Define this to set the endianness to use in libgcc2.c, which can
107 not depend on target_flags. */
108 #if defined(__scorele__)
109 #define LIBGCC2_WORDS_BIG_ENDIAN 0
111 #define LIBGCC2_WORDS_BIG_ENDIAN 1
114 /* Width of a word, in units (bytes). */
115 #define UNITS_PER_WORD 4
117 /* Define this macro if it is advisable to hold scalars in registers
118 in a wider mode than that declared by the program. In such cases,
119 the value is constrained to be within the bounds of the declared
120 type, but kept valid in the wider mode. The signedness of the
121 extension may differ from that of the type. */
122 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
123 if (GET_MODE_CLASS (MODE) == MODE_INT \
124 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
127 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
128 #define PARM_BOUNDARY BITS_PER_WORD
129 #define STACK_BOUNDARY BITS_PER_WORD
131 /* Allocation boundary (in *bits*) for the code of a function. */
132 #define FUNCTION_BOUNDARY BITS_PER_WORD
134 /* There is no point aligning anything to a rounder boundary than this. */
135 #define BIGGEST_ALIGNMENT LONG_DOUBLE_TYPE_SIZE
137 /* If defined, a C expression to compute the alignment for a static
138 variable. TYPE is the data type, and ALIGN is the alignment that
139 the object would ordinarily have. The value of this macro is used
140 instead of that alignment to align the object.
142 If this macro is not defined, then ALIGN is used.
144 One use of this macro is to increase alignment of medium-size
145 data to make it all fit in fewer cache lines. Another is to
146 cause character arrays to be word-aligned so that `strcpy' calls
147 that copy constants to character arrays can be done inline. */
148 #define DATA_ALIGNMENT(TYPE, ALIGN) \
149 ((((ALIGN) < BITS_PER_WORD) \
150 && (TREE_CODE (TYPE) == ARRAY_TYPE \
151 || TREE_CODE (TYPE) == UNION_TYPE \
152 || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
154 /* If defined, a C expression to compute the alignment given to a
155 constant that is being placed in memory. EXP is the constant
156 and ALIGN is the alignment that the object would ordinarily have.
157 The value of this macro is used instead of that alignment to align
160 If this macro is not defined, then ALIGN is used.
162 The typical use of this macro is to increase alignment for string
163 constants to be word aligned so that `strcpy' calls that copy
164 constants can be done inline. */
165 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
166 ((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \
167 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
169 /* If defined, a C expression to compute the alignment for a local
170 variable. TYPE is the data type, and ALIGN is the alignment that
171 the object would ordinarily have. The value of this macro is used
172 instead of that alignment to align the object.
174 If this macro is not defined, then ALIGN is used.
176 One use of this macro is to increase alignment of medium-size
177 data to make it all fit in fewer cache lines. */
178 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
179 ((TREE_CODE (TYPE) == ARRAY_TYPE \
180 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
181 && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
183 /* Alignment of field after `int : 0' in a structure. */
184 #define EMPTY_FIELD_BOUNDARY 32
186 /* All accesses must be aligned. */
187 #define STRICT_ALIGNMENT 1
189 /* Score requires that structure alignment is affected by bitfields. */
190 #define PCC_BITFIELD_TYPE_MATTERS 1
192 /* long double is not a fixed mode, but the idea is that, if we
193 support long double, we also want a 128-bit integer type. */
194 #define MAX_FIXED_MODE_SIZE LONG_DOUBLE_TYPE_SIZE
196 /* Layout of Data Type. */
197 /* Set the sizes of the core types. */
198 #define INT_TYPE_SIZE 32
199 #define SHORT_TYPE_SIZE 16
200 #define LONG_TYPE_SIZE 32
201 #define LONG_LONG_TYPE_SIZE 64
202 #define CHAR_TYPE_SIZE 8
203 #define FLOAT_TYPE_SIZE 32
204 #define DOUBLE_TYPE_SIZE 64
205 #define LONG_DOUBLE_TYPE_SIZE 64
207 /* Define this as 1 if `char' should by default be signed; else as 0. */
208 #undef DEFAULT_SIGNED_CHAR
209 #define DEFAULT_SIGNED_CHAR 1
211 /* Default definitions for size_t and ptrdiff_t. */
212 #define SIZE_TYPE "unsigned int"
214 #define UINTPTR_TYPE "long unsigned int"
219 - 32 integer registers
220 - 16 control registers (cond)
221 - 16 special registers (ceh/cel/cnt/lcr/scr/arg/fp)
222 - 32 coprocessors 1 registers
223 - 32 coprocessors 2 registers
224 - 32 coprocessors 3 registers. */
225 #define FIRST_PSEUDO_REGISTER 160
227 /* By default, fix the kernel registers (r30 and r31), the global
228 pointer (r28) and the stack pointer (r0). This can change
229 depending on the command-line options.
231 Regarding coprocessor registers: without evidence to the contrary,
232 it's best to assume that each coprocessor register has a unique
233 use. This can be overridden, in, e.g., TARGET_OPTION_OVERRIDE or
234 CONDITIONAL_REGISTER_USAGE should the assumption be inappropriate
235 for a particular target. */
237 /* Control Registers, use mfcr/mtcr insn
255 Custom Engine Register, use mfce/mtce
259 Special-Purpose Register, use mfsr/mtsr
264 53 ARG_POINTER_REGNUM
265 54 FRAME_POINTER_REGNUM
266 but Control register have 32 registers, cr16-cr31. */
267 #define FIXED_REGISTERS \
269 /* General Purpose Registers */ \
270 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
271 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, \
272 /* Control Registers */ \
273 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
274 /* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
275 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
276 /* CP 1 Registers */ \
277 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
278 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
279 /* CP 2 Registers */ \
280 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
281 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
282 /* CP 3 Registers */ \
283 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
284 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
287 #define CALL_USED_REGISTERS \
289 /* General purpose register */ \
290 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
291 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
292 /* Control Registers */ \
293 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
294 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
295 /* CP 1 Registers */ \
296 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
297 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
298 /* CP 2 Registers */ \
299 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
300 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
301 /* CP 3 Registers */ \
302 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
303 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
306 #define REG_ALLOC_ORDER \
307 { 0, 1, 6, 7, 8, 9, 10, 11, 4, 5, 22, 23, 24, 25, 26, 27, \
308 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 28, 29, 30, 31, 2, 3, \
309 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
310 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, \
311 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
312 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \
313 96, 97, 98, 99,100,101,102,103,104,105,106,107,108,109,110,111, \
314 112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127, \
315 128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \
316 144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159 }
318 /* Macro to conditionally modify fixed_regs/call_used_regs. */
319 #define PIC_OFFSET_TABLE_REGNUM 29
321 #define CONDITIONAL_REGISTER_USAGE \
324 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
325 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 0; \
328 #define HARD_REGNO_NREGS(REGNO, MODE) \
329 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
331 /* Return true if REGNO is suitable for holding a quantity of type MODE. */
332 #define HARD_REGNO_MODE_OK(REGNO, MODE) score_hard_regno_mode_ok (REGNO, MODE)
334 /* Value is 1 if it is a good idea to tie two pseudo registers
335 when one has mode MODE1 and one has mode MODE2.
336 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
337 for any hard reg, then this must be 0 for correct output. */
338 #define MODES_TIEABLE_P(MODE1, MODE2) \
339 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
340 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
341 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
342 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
344 /* Register Classes. */
345 /* Define the classes of registers for register constraints in the
346 machine description. Also define ranges of constants. */
350 G16_REGS, /* r0 ~ r15 */
351 G32_REGS, /* r0 ~ r31 */
352 T32_REGS, /* r8 ~ r11 | r22 ~ r27 */
356 CE_REGS, /* hi + lo */
361 SP_REGS, /* cnt + lcb + scb */
363 CR_REGS, /* cr0 - cr15 */
368 CPA_REGS, /* cp1 + cp2 + cp3 */
374 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
376 #define GENERAL_REGS G32_REGS
378 /* Give names of register classes as strings for dump file. */
379 #define REG_CLASS_NAMES \
405 /* Define which registers fit in which classes. */
406 #define REG_CLASS_CONTENTS \
408 /* NO_REGS/G16/G32/T32 */ \
409 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
410 { 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
411 { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
412 { 0x0fc00f00, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, \
414 { 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000}, \
415 { 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000}, \
416 { 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000}, \
417 /* CN/LC/SC/SP/CR */ \
418 { 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000}, \
419 { 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000}, \
420 { 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000}, \
421 { 0x00000000, 0x001c0000, 0x00000000, 0x00000000, 0x00000000}, \
422 { 0x00000000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000}, \
423 /* CP1/CP2/CP3/CPA */ \
424 { 0x00000000, 0x00000000, 0xffffffff, 0x00000000, 0x00000000}, \
425 { 0x00000000, 0x00000000, 0x00000000, 0xffffffff, 0x00000000}, \
426 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffffff}, \
427 { 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0xffffffff}, \
429 { 0xffffffff, 0x001fffff, 0xffffffff, 0xffffffff, 0xffffffff}, \
432 /* A C expression whose value is a register class containing hard
433 register REGNO. In general there is more that one such class;
434 choose a class which is "minimal", meaning that no smaller class
435 also contains the register. */
436 #define REGNO_REG_CLASS(REGNO) score_reg_class (REGNO)
438 /* The following macro defines cover classes for Integrated Register
439 Allocator. Cover classes is a set of non-intersected register
440 classes covering all hard registers used for register allocation
441 purpose. Any move between two registers of a cover class should be
442 cheaper than load or store of the registers. The macro value is
443 array of register classes with LIM_REG_CLASSES used as the end
445 #define IRA_COVER_CLASSES \
447 G32_REGS, CE_REGS, SP_REGS, LIM_REG_CLASSES \
450 /* A macro whose definition is the name of the class to which a
451 valid base register must belong. A base register is one used in
452 an address which is the register value plus a displacement. */
453 #define BASE_REG_CLASS G16_REGS
455 /* The class value for index registers. */
456 #define INDEX_REG_CLASS NO_REGS
458 extern enum reg_class score_char_to_class[256];
459 #define REG_CLASS_FROM_LETTER(C) score_char_to_class[(unsigned char) (C)]
461 /* Addressing modes, and classification of registers for them. */
462 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \
463 score_regno_mode_ok_for_base_p (REGNO, 1)
465 #define REGNO_OK_FOR_INDEX_P(NUM) 0
467 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
468 score_preferred_reload_class (X, CLASS)
470 /* If we need to load shorts byte-at-a-time, then we need a scratch. */
471 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
472 score_secondary_reload_class (CLASS, MODE, X)
474 /* Return the register class of a scratch register needed to copy IN into
475 or out of a register in CLASS in MODE. If it can be done directly,
476 NO_REGS is returned. */
477 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
478 score_secondary_reload_class (CLASS, MODE, X)
480 /* Return the maximum number of consecutive registers
481 needed to represent mode MODE in a register of class CLASS. */
482 #define CLASS_MAX_NREGS(CLASS, MODE) \
483 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
485 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
486 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
487 ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
489 /* The letters I, J, K, L, M, N, O, and P in a register constraint
490 string can be used to stand for particular ranges of immediate
491 operands. This macro defines what the ranges are. C is the
492 letter, and VALUE is a constant value. Return 1 if VALUE is
493 in the range specified by C. */
494 #define CONST_OK_FOR_LETTER_P(VALUE, C) score_const_ok_for_letter_p (VALUE, C)
496 /* Similar, but for floating constants, and defining letters G and H.
497 Here VALUE is the CONST_DOUBLE rtx itself. */
499 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
500 ((C) == 'G' && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
502 /* Letters in the range `Q' through `U' may be defined in a
503 machine-dependent fashion to stand for arbitrary operand types.
504 The machine description macro `EXTRA_CONSTRAINT' is passed the
505 operand as its first argument and the constraint letter as its
507 #define EXTRA_CONSTRAINT(VALUE, C) score_extra_constraint (VALUE, C)
509 /* Basic Stack Layout. */
510 /* Stack layout; function entry, exit and calling. */
511 #define STACK_GROWS_DOWNWARD
513 #define STACK_PUSH_CODE PRE_DEC
514 #define STACK_POP_CODE POST_INC
516 /* The offset of the first local variable from the beginning of the frame.
517 See compute_frame_size for details about the frame layout. */
518 #define STARTING_FRAME_OFFSET crtl->outgoing_args_size
520 /* The argument pointer always points to the first argument. */
521 #define FIRST_PARM_OFFSET(FUNDECL) 0
523 /* A C expression whose value is RTL representing the value of the return
524 address for the frame COUNT steps up from the current frame. */
525 #define RETURN_ADDR_RTX(count, frame) score_return_addr (count, frame)
527 /* Pick up the return address upon entry to a procedure. */
528 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, RA_REGNUM)
530 /* Exception handling Support. */
531 /* Use r0 to r3 to pass exception handling information. */
532 #define EH_RETURN_DATA_REGNO(N) \
533 ((N) < 4 ? (N) + ARG_REG_FIRST : INVALID_REGNUM)
535 /* The register that holds the return address in exception handlers. */
536 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM)
538 /* Registers That Address the Stack Frame. */
539 /* Register to use for pushing function arguments. */
540 #define STACK_POINTER_REGNUM SP_REGNUM
542 /* These two registers don't really exist: they get eliminated to either
543 the stack or hard frame pointer. */
544 #define FRAME_POINTER_REGNUM 53
546 /* we use r2 as the frame pointer. */
547 #define HARD_FRAME_POINTER_REGNUM FP_REGNUM
549 #define ARG_POINTER_REGNUM 54
551 /* Register in which static-chain is passed to a function. */
552 #define STATIC_CHAIN_REGNUM 23
554 /* Elimination Frame Pointer and Arg Pointer */
556 #define ELIMINABLE_REGS \
557 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
558 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
559 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
560 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
562 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
563 (OFFSET) = score_initial_elimination_offset ((FROM), (TO))
565 /* Passing Function Arguments on the Stack. */
566 /* Allocate stack space for arguments at the beginning of each function. */
567 #define ACCUMULATE_OUTGOING_ARGS 1
569 /* reserve stack space for all argument registers. */
570 #define REG_PARM_STACK_SPACE(FNDECL) UNITS_PER_WORD
572 /* Define this if it is the responsibility of the caller to
573 allocate the area reserved for arguments passed in registers.
574 If `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect
575 of this macro is to determine whether the space is included in
576 `crtl->outgoing_args_size'. */
577 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
579 /* Passing Arguments in Registers */
580 /* Determine where to put an argument to a function.
581 Value is zero to push the argument on the stack,
582 or a hard register in which to store the argument.
584 MODE is the argument's machine mode.
585 TYPE is the data type of the argument (as a tree).
586 This is null for libcalls where that information may
588 CUM is a variable of type CUMULATIVE_ARGS which gives info about
589 the preceding args and about the function being called.
590 NAMED is nonzero if this argument is a named parameter
591 (otherwise it is an extra parameter matching an ellipsis). */
592 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
593 score_function_arg (&CUM, MODE, TYPE, NAMED)
595 /* A C type for declaring a variable that is used as the first argument of
596 `FUNCTION_ARG' and other related values. For some target machines, the
597 type `int' suffices and can hold the number of bytes of argument so far. */
598 typedef struct score_args
600 unsigned int arg_number; /* how many arguments have been seen */
601 unsigned int num_gprs; /* number of gprs in use */
602 unsigned int stack_words; /* number of words in stack */
605 #define CUMULATIVE_ARGS score_args_t
607 /* Initialize a variable CUM of type CUMULATIVE_ARGS
608 for a call to a function whose data type is FNTYPE.
609 For a library call, FNTYPE is 0. */
610 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, n_named_args) \
611 score_init_cumulative_args (&CUM, FNTYPE, LIBNAME)
613 /* Update the data in CUM to advance over an argument
614 of mode MODE and data type TYPE.
615 (TYPE is null for libcalls where that information may not be available.) */
616 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
617 score_function_arg_advance (&CUM, MODE, TYPE, NAMED)
619 /* 1 if N is a possible register number for function argument passing.
620 We have no FP argument registers when soft-float. When FP registers
621 are 32 bits, we can't directly reference the odd numbered ones. */
622 #define FUNCTION_ARG_REGNO_P(REGNO) \
623 REG_CONTAIN (REGNO, ARG_REG_FIRST, ARG_REG_NUM)
625 /* How Scalar Function Values Are Returned. */
626 #define FUNCTION_VALUE(VALTYPE, FUNC) \
627 score_function_value ((VALTYPE), (FUNC), VOIDmode)
629 #define LIBCALL_VALUE(MODE) score_function_value (NULL_TREE, NULL, (MODE))
631 /* 1 if N is a possible register number for a function value. */
632 #define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == (ARG_REG_FIRST))
634 #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25)
636 /* How Large Values Are Returned. */
637 #define STRUCT_VALUE 0
639 /* Function Entry and Exit */
640 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
641 the stack pointer does not matter. The value is tested only in
642 functions that have frame pointers.
643 No definition is equivalent to always zero. */
644 #define EXIT_IGNORE_STACK 1
646 /* Generating Code for Profiling */
647 /* Output assembler code to FILE to increment profiler label # LABELNO
648 for profiling a function entry. */
649 #define FUNCTION_PROFILER(FILE, LABELNO) \
653 fprintf (FILE, " .set r1 \n"); \
654 fprintf (FILE, " mv r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
655 fprintf (FILE, " subi r%d, %d \n", STACK_POINTER_REGNUM, 8); \
656 fprintf (FILE, " jl _mcount \n"); \
657 fprintf (FILE, " .set nor1 \n"); \
659 else if (TARGET_SCORE3) \
661 fprintf (FILE, " .set r1 \n"); \
662 fprintf (FILE, " mv! r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
663 fprintf (FILE, " addi! r%d, %d \n", STACK_POINTER_REGNUM, -8);\
664 fprintf (FILE, " jl _mcount \n"); \
665 fprintf (FILE, " .set nor1 \n"); \
669 /* Trampolines for Nested Functions. */
670 #define TRAMPOLINE_INSNS 6
672 /* A C expression for the size in bytes of the trampoline, as an integer. */
673 #define TRAMPOLINE_SIZE (24 + GET_MODE_SIZE (ptr_mode) * 2)
675 #define HAVE_PRE_INCREMENT 1
676 #define HAVE_PRE_DECREMENT 1
677 #define HAVE_POST_INCREMENT 1
678 #define HAVE_POST_DECREMENT 1
679 #define HAVE_PRE_MODIFY_DISP 1
680 #define HAVE_POST_MODIFY_DISP 1
681 #define HAVE_PRE_MODIFY_REG 0
682 #define HAVE_POST_MODIFY_REG 0
684 /* Maximum number of registers that can appear in a valid memory address. */
685 #define MAX_REGS_PER_ADDRESS 1
687 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
688 and check its validity for a certain class.
689 We have two alternate definitions for each of them.
690 The usual definition accepts all pseudo regs; the other rejects them all.
691 The symbol REG_OK_STRICT causes the latter definition to be used.
693 Most source files want to accept pseudo regs in the hope that
694 they will get allocated to the class that the insn wants them to be in.
695 Some source files that are used after register allocation
696 need to be strict. */
697 #ifndef REG_OK_STRICT
698 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
699 score_regno_mode_ok_for_base_p (REGNO (X), 0)
701 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
702 score_regno_mode_ok_for_base_p (REGNO (X), 1)
705 #define REG_OK_FOR_INDEX_P(X) 0
707 #define LEGITIMATE_CONSTANT_P(X) 1
709 /* Condition Code Status. */
710 #define SELECT_CC_MODE(OP, X, Y) score_select_cc_mode (OP, X, Y)
712 /* Return nonzero if SELECT_CC_MODE will never return MODE for a
713 floating point inequality comparison. */
714 #define REVERSIBLE_CC_MODE(MODE) 1
716 /* Describing Relative Costs of Operations */
717 /* Compute extra cost of moving data between one register class and another. */
718 #define REGISTER_MOVE_COST(MODE, FROM, TO) \
719 score_register_move_cost (MODE, FROM, TO)
721 /* Moves to and from memory are quite expensive */
722 #define MEMORY_MOVE_COST(MODE, CLASS, TO_P) \
723 (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
725 /* Try to generate sequences that don't involve branches. */
726 #define BRANCH_COST(speed_p, predictable_p) 2
728 /* Nonzero if access to memory by bytes is slow and undesirable. */
729 #define SLOW_BYTE_ACCESS 1
731 /* Define this macro if it is as good or better to call a constant
732 function address than to call an address kept in a register. */
733 #define NO_FUNCTION_CSE 1
735 /* Dividing the Output into Sections (Texts, Data, ...). */
736 /* Define the strings to put out for each section in the object file. */
737 #define TEXT_SECTION_ASM_OP "\t.text"
738 #define DATA_SECTION_ASM_OP "\t.data"
739 #define SDATA_SECTION_ASM_OP "\t.sdata"
741 #undef READONLY_DATA_SECTION_ASM_OP
742 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
744 /* The Overall Framework of an Assembler File */
745 /* How to start an assembler comment.
746 The leading space is important. */
747 #define ASM_COMMENT_START "#"
749 /* Output to assembler file text saying following lines
750 may contain character constants, extra white space, comments, etc. */
751 #define ASM_APP_ON "#APP\n\t.set volatile\n"
753 /* Output to assembler file text saying following lines
754 no longer contain unusual constructs. */
755 #define ASM_APP_OFF "#NO_APP\n\t.set optimize\n"
757 /* Output of Uninitialized Variables. */
758 /* This says how to define a global common symbol. */
759 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
761 fputs ("\n\t.comm\t", STREAM); \
762 assemble_name (STREAM, NAME); \
763 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
764 SIZE, ALIGN / BITS_PER_UNIT); \
767 /* This says how to define a local common symbol (i.e., not visible to
769 #undef ASM_OUTPUT_ALIGNED_LOCAL
770 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
772 fputs ("\n\t.lcomm\t", STREAM); \
773 assemble_name (STREAM, NAME); \
774 fprintf (STREAM, " , " HOST_WIDE_INT_PRINT_UNSIGNED ", %u\n", \
775 SIZE, ALIGN / BITS_PER_UNIT); \
778 /* Globalizing directive for a label. */
779 #define GLOBAL_ASM_OP "\t.globl\t"
781 /* Output and Generation of Labels */
782 /* This is how to declare a function name. The actual work of
783 emitting the label is moved to function_prologue, so that we can
784 get the line number correctly emitted before the .ent directive,
785 and after any .file directives. Define as empty so that the function
786 is not declared before the .ent directive elsewhere. */
787 #undef ASM_DECLARE_FUNCTION_NAME
788 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)
790 #undef ASM_DECLARE_OBJECT_NAME
791 #define ASM_DECLARE_OBJECT_NAME(STREAM, NAME, DECL) \
793 assemble_name (STREAM, NAME); \
794 fprintf (STREAM, ":\n"); \
797 /* This says how to output an external. It would be possible not to
798 output anything and let undefined symbol become external. However
799 the assembler uses length information on externals to allocate in
800 data/sdata bss/sbss, thereby saving exec time. */
801 #undef ASM_OUTPUT_EXTERNAL
802 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \
803 score_output_external (STREAM, DECL, NAME)
805 /* This handles the magic '..CURRENT_FUNCTION' symbol, which means
806 'the start of the function that this code is output in'. */
807 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
808 fprintf ((STREAM), "%s", (NAME))
810 /* Local compiler-generated symbols must have a prefix that the assembler
812 #define LOCAL_LABEL_PREFIX (TARGET_SCORE7 ? "." : "$")
814 #undef ASM_GENERATE_INTERNAL_LABEL
815 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
816 sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
818 /* Output of Assembler Instructions. */
819 #define REGISTER_NAMES \
820 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
821 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
822 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
823 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
825 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
826 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15", \
828 "ceh", "cel", "sr0", "sr1", "sr2", "_arg", "_frame", "", \
829 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", \
831 "c1r0", "c1r1", "c1r2", "c1r3", "c1r4", "c1r5", "c1r6", "c1r7", \
832 "c1r8", "c1r9", "c1r10", "c1r11", "c1r12", "c1r13", "c1r14", "c1r15", \
833 "c1r16", "c1r17", "c1r18", "c1r19", "c1r20", "c1r21", "c1r22", "c1r23", \
834 "c1r24", "c1r25", "c1r26", "c1r27", "c1r28", "c1r29", "c1r30", "c1r31", \
836 "c2r0", "c2r1", "c2r2", "c2r3", "c2r4", "c2r5", "c2r6", "c2r7", \
837 "c2r8", "c2r9", "c2r10", "c2r11", "c2r12", "c2r13", "c2r14", "c2r15", \
838 "c2r16", "c2r17", "c2r18", "c2r19", "c2r20", "c2r21", "c2r22", "c2r23", \
839 "c2r24", "c2r25", "c2r26", "c2r27", "c2r28", "c2r29", "c2r30", "c2r31", \
841 "c3r0", "c3r1", "c3r2", "c3r3", "c3r4", "c3r5", "c3r6", "c3r7", \
842 "c3r8", "c3r9", "c3r10", "c3r11", "c3r12", "c3r13", "c3r14", "c3r15", \
843 "c3r16", "c3r17", "c3r18", "c3r19", "c3r20", "c3r21", "c3r22", "c3r23", \
844 "c3r24", "c3r25", "c3r26", "c3r27", "c3r28", "c3r29", "c3r30", "c3r31", \
847 /* Print operand X (an rtx) in assembler syntax to file FILE. */
848 #define PRINT_OPERAND(STREAM, X, CODE) score_print_operand (STREAM, X, CODE)
850 /* A C expression which evaluates to true if CODE is a valid
851 punctuation character for use in the `PRINT_OPERAND' macro. */
852 #define PRINT_OPERAND_PUNCT_VALID_P(C) ((C) == '[' || (C) == ']')
854 /* Print a memory address as an operand to reference that memory location. */
855 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
856 score_print_operand_address (STREAM, X)
858 /* By default on the S+core, external symbols do not have an underscore
860 #define USER_LABEL_PREFIX ""
862 /* This is how to output an insn to push a register on the stack. */
863 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
866 fprintf (STREAM, "\tpush! %s,[%s]\n", \
868 reg_names[STACK_POINTER_REGNUM]); \
869 else if (TARGET_SCORE3) \
870 fprintf (STREAM, "\tpush!\t%s\n", \
874 /* This is how to output an insn to pop a register from the stack. */
875 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
878 fprintf (STREAM, "\tpop! %s,[%s]\n", \
880 reg_names[STACK_POINTER_REGNUM]); \
881 else if (TARGET_SCORE3) \
882 fprintf (STREAM, "\tpop!\t%s\n", \
886 /* Output of Dispatch Tables. */
887 /* This is how to output an element of a case-vector. We can make the
888 entries PC-relative in GP-relative when .gp(d)word is supported. */
889 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
893 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
895 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
896 else if (TARGET_SCORE3) \
898 switch (GET_MODE(BODY)) \
900 case QImode: /* TBB */ \
901 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d_tbb)/2\n", \
904 case HImode: /* TBH */ \
905 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d_tbb)/2\n", \
910 fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
912 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
920 /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
921 #define ADDR_VEC_ALIGN(JUMPTABLE) (GET_MODE (PATTERN (JUMPTABLE)) == SImode ? 2 \
922 : GET_MODE (PATTERN (JUMPTABLE)) == HImode ? 1 : 0)
924 /* This is how to output a label which precedes a jumptable. Since
925 Score3 instructions are 2 bytes, we may need explicit alignment here. */
926 #undef ASM_OUTPUT_CASE_LABEL
927 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE) \
929 if ((TARGET_SCORE7) && GET_MODE (PATTERN (JUMPTABLE)) == SImode) \
930 ASM_OUTPUT_ALIGN (FILE, 2); \
931 (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
934 /* Specify the machine mode that this machine uses
935 for the index in the tablejump instruction. */
936 #define CASE_VECTOR_MODE SImode
938 #define CASE_VECTOR_PC_RELATIVE (TARGET_SCORE3)
940 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
941 ((min < 0 || max >= 0x2000 || TARGET_SCORE7) ? SImode \
942 : (max >= 0x200) ? HImode \
945 /* This is how to output an element of a case-vector that is absolute. */
946 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
947 fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
949 /* Assembler Commands for Exception Regions */
950 /* Since the S+core is encoded in the least-significant bit
951 of the address, mask it off return addresses for purposes of
952 finding exception handling regions. */
953 #define MASK_RETURN_ADDR constm1_rtx
955 /* Assembler Commands for Alignment */
956 /* This is how to output an assembler line to advance the location
957 counter by SIZE bytes. */
958 #undef ASM_OUTPUT_SKIP
959 #define ASM_OUTPUT_SKIP(STREAM, SIZE) \
960 fprintf (STREAM, "\t.space\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
962 /* This is how to output an assembler line
963 that says to advance the location counter
964 to a multiple of 2**LOG bytes. */
965 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
966 fprintf (STREAM, "\t.align\t%d\n", (LOG))
968 /* Macros Affecting All Debugging Formats. */
969 #ifndef PREFERRED_DEBUGGING_TYPE
970 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
973 /* Specific Options for DBX Output. */
974 #define DBX_DEBUGGING_INFO 1
976 /* By default, turn on GDB extensions. */
977 #define DEFAULT_GDB_EXTENSIONS 1
979 #define DBX_CONTIN_LENGTH 0
981 /* File Names in DBX Format. */
982 #define DWARF2_DEBUGGING_INFO 1
984 /* The DWARF 2 CFA column which tracks the return address. */
985 #define DWARF_FRAME_RETURN_COLUMN 3
987 /* Define if operations between registers always perform the operation
988 on the full register even if a narrower mode is specified. */
989 #define WORD_REGISTER_OPERATIONS
991 /* All references are zero extended. */
992 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
994 /* Define if loading short immediate values into registers sign extends. */
995 #define SHORT_IMMEDIATES_SIGN_EXTEND
997 /* Max number of bytes we can move from memory to memory
998 in one reasonably fast instruction. */
1001 /* Define this to be nonzero if shift instructions ignore all but the low-order
1003 #define SHIFT_COUNT_TRUNCATED 1
1005 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1006 is done just by pretending it is already truncated. */
1007 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1009 /* Specify the machine mode that pointers have.
1010 After generation of rtl, the compiler makes no further distinction
1011 between pointers and any other objects of this machine mode. */
1012 #define Pmode SImode
1014 /* Give call MEMs SImode since it is the "most permissive" mode
1015 for 32-bit targets. */
1016 #define FUNCTION_MODE Pmode
1018 struct GTY ((chain_next ("%h.next"))) extern_list
1020 struct extern_list *next; /* next external */
1021 const char *name; /* name of the external */
1022 int size; /* size in bytes */
1025 extern GTY (()) struct extern_list *extern_head;