1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 /* Run-time compilation parameters selecting different hardware subsets. */
29 extern int target_flags;
31 /* Target macros checked at runtime of compiler. */
33 #define TARGET_HARD_FLOAT (target_flags & 1)
34 #define TARGET_SOFT_FLOAT (!(target_flags & 1))
35 #define TARGET_BACKCHAIN (target_flags & 2)
36 #define TARGET_SMALL_EXEC (target_flags & 4)
37 #define TARGET_DEBUG_ARG (target_flags & 8)
38 #define TARGET_64BIT (target_flags & 16)
39 #define TARGET_MVCLE (target_flags & 32)
41 #ifdef DEFAULT_TARGET_64BIT
42 #define TARGET_DEFAULT 0x13
43 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
45 #define TARGET_DEFAULT 0x3
46 #define TARGET_VERSION fprintf (stderr, " (S/390)");
50 /* Macro to define tables used to set the flags. This is a list in braces
51 of pairs in braces, each pair being { "NAME", VALUE }
52 where VALUE is the bits to set or minus the bits to clear.
53 An empty string NAME is used to identify the default VALUE. */
55 #define TARGET_SWITCHES \
56 { { "hard-float", 1, N_("Use hardware fp")}, \
57 { "soft-float", -1, N_("Don't use hardware fp")}, \
58 { "backchain", 2, N_("Set backchain")}, \
59 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")}, \
60 { "small-exec", 4, N_("Use bras for execucable < 64k")}, \
61 { "no-small-exec",-4, N_("Don't use bras")}, \
62 { "debug", 8, N_("Additional debug prints")}, \
63 { "no-debug", -8, N_("Don't print additional debug prints")}, \
64 { "64", 16, N_("64 bit mode")}, \
65 { "31", -16, N_("31 bit mode")}, \
66 { "mvcle", 32, N_("mvcle use")}, \
67 { "no-mvcle", -32, N_("mvc&ex")}, \
68 { "", TARGET_DEFAULT, 0 } }
70 /* Define this to change the optimizations performed by default. */
71 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
73 /* Sometimes certain combinations of command options do not make sense
74 on a particular target machine. You can define a macro
75 `OVERRIDE_OPTIONS' to take account of this. This macro, if
76 defined, is executed once just after all the command options have
78 #define OVERRIDE_OPTIONS override_options ()
80 /* Target CPU builtins. */
81 #define TARGET_CPU_CPP_BUILTINS() \
84 builtin_assert ("cpu=s390"); \
85 builtin_assert ("machine=s390"); \
86 builtin_define ("__s390__"); \
88 builtin_define ("__s390x__"); \
92 /* Defines for real.c. */
94 #define TARGET_IBM_FLOAT 0
95 #define TARGET_IEEE_FLOAT 1
97 /* The current function count for create unique internal labels. */
99 extern int s390_function_count;
101 /* The amount of space used for outgoing arguments. */
103 extern int current_function_outgoing_args_size;
105 /* Target machine storage layout. */
107 /* Define this if most significant bit is lowest numbered in instructions
108 that operate on numbered bit-fields. */
110 #define BITS_BIG_ENDIAN 1
112 /* Define this if most significant byte of a word is the lowest numbered. */
114 #define BYTES_BIG_ENDIAN 1
116 /* Define this if MS word of a multiword is the lowest numbered. */
118 #define WORDS_BIG_ENDIAN 1
120 #define MAX_BITS_PER_WORD 64
122 /* Width of a word, in units (bytes). */
124 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
125 #define MIN_UNITS_PER_WORD 4
127 /* A C expression for the size in bits of the type `short' on the
128 target machine. If you don't define this, the default is half a
129 word. (If this would be less than one storage unit, it is
130 rounded up to one unit.) */
131 #define SHORT_TYPE_SIZE 16
133 /* A C expression for the size in bits of the type `int' on the
134 target machine. If you don't define this, the default is one
136 #define INT_TYPE_SIZE 32
138 /* A C expression for the size in bits of the type `long' on the
139 target machine. If you don't define this, the default is one
141 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
142 #define MAX_LONG_TYPE_SIZE 64
144 /* A C expression for the size in bits of the type `long long' on the
145 target machine. If you don't define this, the default is two
147 #define LONG_LONG_TYPE_SIZE 64
149 /* Right now we only support two floating point formats, the
150 32 and 64 bit ieee formats. */
152 #define FLOAT_TYPE_SIZE 32
153 #define DOUBLE_TYPE_SIZE 64
154 #define LONG_DOUBLE_TYPE_SIZE 64
156 /* Define this macro if it is advisable to hold scalars in registers
157 in a wider mode than that declared by the program. In such cases,
158 the value is constrained to be within the bounds of the declared
159 type, but kept valid in the wider mode. The signedness of the
160 extension may differ from that of the type. */
162 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
163 if (INTEGRAL_MODE_P (MODE) && \
164 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
168 /* Defining PROMOTE_FUNCTION_ARGS eliminates some unnecessary zero/sign
169 extensions applied to char/short functions arguments. Defining
170 PROMOTE_FUNCTION_RETURN does the same for function returns. */
172 #define PROMOTE_FUNCTION_ARGS
173 #define PROMOTE_FUNCTION_RETURN
174 #define PROMOTE_FOR_CALL_ONLY
176 /* Allocation boundary (in *bits*) for storing pointers in memory. */
178 #define POINTER_BOUNDARY 32
180 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
182 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
184 /* Boundary (in *bits*) on which stack pointer should be aligned. */
186 #define STACK_BOUNDARY 64
188 /* Allocation boundary (in *bits*) for the code of a function. */
190 #define FUNCTION_BOUNDARY 32
192 /* There is no point aligning anything to a rounder boundary than this. */
194 #define BIGGEST_ALIGNMENT 64
196 /* Alignment of field after `int : 0' in a structure. */
198 #define EMPTY_FIELD_BOUNDARY 32
200 /* Alignment on even addresses for LARL instruction. */
202 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
204 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
206 /* Define this if move instructions will actually fail to work when given
209 #define STRICT_ALIGNMENT 0
211 /* Define target floating point format. */
213 #undef TARGET_FLOAT_FORMAT
215 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
217 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
220 /* Define if special allocation order desired. */
222 #define REG_ALLOC_ORDER \
223 { 1, 2, 3, 4, 5, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, \
224 16, 17, 18, 19, 20, 21, 22, 23, \
225 24, 25, 26, 27, 28, 29, 30, 31, \
228 /* Standard register usage. */
230 #define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 )
232 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 )
234 #define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
236 #define CC_REGNO_P(N) ( (N) == 33 )
238 /* Number of actual hardware registers. The hardware registers are
239 assigned numbers for the compiler from 0 to just below
240 FIRST_PSEUDO_REGISTER.
241 All registers that the compiler knows about must be given numbers,
242 even those that are not normally considered general registers.
243 For the 390, we give the data registers numbers 0-15,
244 and the floating point registers numbers 16-19.
245 G5 and following have 16 IEEE floating point register,
246 which get numbers 16-31. */
248 #define FIRST_PSEUDO_REGISTER 35
250 /* Number of hardware registers that go into the DWARF-2 unwind info.
251 If not defined, equals FIRST_PSEUDO_REGISTER. */
253 #define DWARF_FRAME_REGISTERS 34
255 /* The following register have a fix usage
256 GPR 12: GOT register points to the GOT, setup in prologue,
257 GOT contains pointer to variables in shared libraries
258 GPR 13: Base register setup in prologue to point to the
259 literal table of each function
260 GPR 14: Return registers holds the return address
261 GPR 15: Stack pointer */
263 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
264 #define BASE_REGISTER 13
265 #define RETURN_REGNUM 14
266 #define STACK_POINTER_REGNUM 15
268 #define FIXED_REGISTERS \
279 /* 1 for registers not available across function calls. These must include
280 the FIXED_REGISTERS and also any registers that can be used without being
282 The latter must include the registers where values are returned
283 and the register where structure-value addresses are passed. */
285 #define CALL_USED_REGISTERS \
296 /* Like `CALL_USED_REGISTERS' except this macro doesn't require that
297 the entire set of `FIXED_REGISTERS' be included.
298 (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS'). */
300 #define CALL_REALLY_USED_REGISTERS \
311 /* Macro to conditionally modify fixed_regs/call_used_regs. */
313 #define CONDITIONAL_REGISTER_USAGE \
320 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
321 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
325 for (i = 24; i < 32; i++) \
326 call_used_regs[i] = call_really_used_regs[i] = 0; \
330 for (i = 18; i < 20; i++) \
331 call_used_regs[i] = call_really_used_regs[i] = 0; \
335 /* The following register have a special usage
336 GPR 11: Frame pointer if needed to point to automatic variables.
337 GPR 32: In functions with more the 5 args this register
338 points to that arguments, it is always eliminated
339 with stack- or frame-pointer.
340 GPR 33: Condition code 'register' */
342 #define HARD_FRAME_POINTER_REGNUM 11
343 #define FRAME_POINTER_REGNUM 34
345 #define ARG_POINTER_REGNUM 32
349 /* We use the register %r0 to pass the static chain to a nested function.
351 Note: It is assumed that this register is call-clobbered!
352 We can't use any of the function-argument registers either,
353 and register 1 is needed by the trampoline code, so we have
354 no other choice but using this one ... */
356 #define STATIC_CHAIN_REGNUM 0
358 /* Return number of consecutive hard regs needed starting at reg REGNO
359 to hold something of mode MODE.
360 This is ordinarily the length in words of a value of mode MODE
361 but can be less for certain modes in special long registers. */
363 #define HARD_REGNO_NREGS(REGNO, MODE) \
364 (FLOAT_REGNO_P(REGNO)? \
365 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
366 INT_REGNO_P(REGNO)? \
367 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
370 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
371 The gprs can hold QI, HI, SI, SF, DF, SC and DC.
372 Even gprs can hold DI.
373 The floating point registers can hold DF, SF, DC and SC. */
375 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
376 (FLOAT_REGNO_P(REGNO)? \
377 (GET_MODE_CLASS(MODE) == MODE_FLOAT || \
378 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT || \
379 (MODE) == SImode || (MODE) == DImode) : \
380 INT_REGNO_P(REGNO)? \
381 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
383 GET_MODE_CLASS (MODE) == MODE_CC : \
386 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
387 mode MODE1 and one has mode MODE2.
388 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
389 for any hard reg, then this must be 0 for correct output. */
391 #define MODES_TIEABLE_P(MODE1, MODE2) \
392 (((MODE1) == SFmode || (MODE1) == DFmode) \
393 == ((MODE2) == SFmode || (MODE2) == DFmode))
395 /* If defined, gives a class of registers that cannot be used as the
396 operand of a SUBREG that changes the mode of the object illegally. */
398 #define CLASS_CANNOT_CHANGE_MODE FP_REGS
400 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
402 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
403 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
405 /* This is an array of structures. Each structure initializes one pair
406 of eliminable registers. The "from" register number is given first,
407 followed by "to". Eliminations of the same "from" register are listed
408 in order of preference. */
410 #define ELIMINABLE_REGS \
411 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
412 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
413 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
414 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
416 #define CAN_ELIMINATE(FROM, TO) (1)
418 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
419 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
421 else if ((FROM) == FRAME_POINTER_REGNUM \
422 && (TO) == HARD_FRAME_POINTER_REGNUM) \
424 else if ((FROM) == ARG_POINTER_REGNUM \
425 && (TO) == HARD_FRAME_POINTER_REGNUM) \
426 { (OFFSET) = s390_arg_frame_offset (); } \
427 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
428 { (OFFSET) = s390_arg_frame_offset (); } \
433 #define CAN_DEBUG_WITHOUT_FP
435 /* Value should be nonzero if functions must have frame pointers.
436 Zero means the frame pointer need not be set up (and parms may be
437 accessed via the stack pointer) in functions that seem suitable.
438 This is computed in `reload', in reload1.c. */
440 #define FRAME_POINTER_REQUIRED 0
442 /* Define the classes of registers for register constraints in the
443 machine description. Also define ranges of constants.
445 One of the classes must always be named ALL_REGS and include all hard regs.
446 If there is more than one class, another class must be named NO_REGS
447 and contain no registers.
449 The name GENERAL_REGS must be the name of a class (or an alias for
450 another name such as ALL_REGS). This is the class of registers
451 that is allowed by "g" or "r" in a register constraint.
452 Also, registers outside this class are allocated only when
453 instructions express preferences for them.
455 The classes must be numbered in nondecreasing order; that is,
456 a larger-numbered class must never be contained completely
457 in a smaller-numbered class.
459 For any two classes, it is very desirable that there be another
460 class that represents their union. */
462 /*#define SMALL_REGISTER_CLASSES 1*/
466 NO_REGS, ADDR_REGS, GENERAL_REGS,
467 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
468 ALL_REGS, LIM_REG_CLASSES
471 #define N_REG_CLASSES (int) LIM_REG_CLASSES
473 /* Give names of register classes as strings for dump file. */
475 #define REG_CLASS_NAMES \
476 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS", \
477 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
479 /* Define which registers fit in which classes. This is an initializer for
480 a vector of HARD_REG_SET of length N_REG_CLASSES.
481 G5 and latter have 16 register and support IEEE floating point operations. */
483 #define REG_CLASS_CONTENTS \
485 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
486 { 0x0000fffe, 0x00000005 }, /* ADDR_REGS */ \
487 { 0x0000ffff, 0x00000005 }, /* GENERAL_REGS */ \
488 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
489 { 0xfffffffe, 0x00000005 }, /* ADDR_FP_REGS */ \
490 { 0xffffffff, 0x00000005 }, /* GENERAL_FP_REGS */ \
491 { 0xffffffff, 0x00000007 }, /* ALL_REGS */ \
495 /* The same information, inverted:
496 Return the class number of the smallest class containing
497 reg number REGNO. This could be a conditional expression
498 or could index an array. */
500 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
502 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smalled class containing REGNO */
504 /* The class value for index registers, and the one for base regs. */
506 #define INDEX_REG_CLASS ADDR_REGS
507 #define BASE_REG_CLASS ADDR_REGS
509 /* Get reg_class from a letter such as appears in the machine description. */
511 #define REG_CLASS_FROM_LETTER(C) \
512 ((C) == 'a' ? ADDR_REGS : \
513 (C) == 'd' ? GENERAL_REGS : \
514 (C) == 'f' ? FP_REGS : NO_REGS)
516 /* The letters I, J, K, L and M in a register constraint string can be used
517 to stand for particular ranges of immediate operands.
518 This macro defines what the ranges are.
519 C is the letter, and VALUE is a constant value.
520 Return 1 if VALUE is in the range specified by C. */
522 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
523 ((C) == 'I' ? (unsigned long) (VALUE) < 256 : \
524 (C) == 'J' ? (unsigned long) (VALUE) < 4096 : \
525 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : \
526 (C) == 'L' ? (unsigned long) (VALUE) < 65536 : 0)
528 /* Similar, but for floating constants, and defining letters G and H.
529 Here VALUE is the CONST_DOUBLE rtx itself. */
531 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
533 /* 'Q' means a memory-reference for a S-type operand. */
535 #define EXTRA_CONSTRAINT(OP, C) \
536 ((C) == 'Q' ? q_constraint (OP) : \
537 (C) == 'S' ? larl_operand (OP, GET_MODE (OP)) : 0)
539 #define EXTRA_MEMORY_CONSTRAINT(C) ((C) == 'Q')
541 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
542 return the class of reg to actually use. In general this is just CLASS;
543 but on some machines in some cases it is preferable to use a more
544 restrictive class. */
546 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
547 s390_preferred_reload_class ((X), (CLASS))
549 /* Return the maximum number of consecutive registers needed to represent
550 mode MODE in a register of class CLASS. */
552 #define CLASS_MAX_NREGS(CLASS, MODE) \
553 ((CLASS) == FP_REGS ? \
554 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
555 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
557 /* We need a secondary reload when loading a PLUS which is
558 not a valid operand for LOAD ADDRESS. */
560 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
561 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
563 /* If we are copying between FP registers and anything else, we need a memory
566 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
567 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
569 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
570 because the movsi and movsf patterns don't handle r/f moves. */
572 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
573 (GET_MODE_BITSIZE (MODE) < 32 \
574 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
578 /* A C expression whose value is nonzero if pseudos that have been
579 assigned to registers of class CLASS would likely be spilled
580 because registers of CLASS are needed for spill registers.
582 The default value of this macro returns 1 if CLASS has exactly one
583 register and zero otherwise. On most machines, this default
584 should be used. Only define this macro to some other expression
585 if pseudo allocated by `local-alloc.c' end up in memory because
586 their hard registers were needed for spill registers. If this
587 macro returns nonzero for those classes, those pseudos will only
588 be allocated by `global.c', which knows how to reallocate the
589 pseudo to another register. If there would not be another
590 register available for reallocation, you should not change the
591 definition of this macro since the only effect of such a
592 definition would be to slow down register allocation. */
594 /* Stack layout; function entry, exit and calling. */
596 /* The return address of the current frame is retrieved
597 from the initial value of register RETURN_REGNUM.
598 For frames farther back, we use the stack slot where
599 the corresponding RETURN_REGNUM register was saved. */
601 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
602 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
603 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
605 #define RETURN_ADDR_RTX(COUNT, FRAME) \
606 ((COUNT) == 0 ? get_hard_reg_initial_val (Pmode, RETURN_REGNUM) : \
607 gen_rtx_MEM (Pmode, \
608 memory_address (Pmode, \
609 plus_constant (DYNAMIC_CHAIN_ADDRESS ((FRAME)), \
610 RETURN_REGNUM * UNITS_PER_WORD))))
612 /* The following macros will turn on dwarf2 exception hndling
613 Other code location for this exception handling are
614 in s390.md (eh_return insn) and in linux.c in the prologue. */
616 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
618 /* We have 31 bit mode. */
620 #define MASK_RETURN_ADDR (TARGET_64BIT ? GEN_INT (-1) : GEN_INT (0x7fffffff))
622 /* The offset from the incoming value of %sp to the top of the stack frame
623 for the current function. */
625 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
627 /* Location, from where return address to load. */
629 #define DWARF_FRAME_RETURN_COLUMN 14
631 /* Describe how we implement __builtin_eh_return. */
632 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
633 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 10)
634 #define EH_RETURN_HANDLER_RTX \
635 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
636 TARGET_64BIT? -48 : -40))
638 /* Define this if pushing a word on the stack makes the stack pointer a
641 #define STACK_GROWS_DOWNWARD
643 /* Define this if the nominal address of the stack frame is at the
644 high-address end of the local variables; that is, each additional local
645 variable allocated goes at a more negative offset in the frame. */
647 /* #define FRAME_GROWS_DOWNWARD */
649 /* Offset from stack-pointer to first location of outgoing args. */
651 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
653 /* Offset within stack frame to start allocating local variables at.
654 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
655 first local allocated. Otherwise, it is the offset to the BEGINNING
656 of the first local allocated. */
658 #define STARTING_FRAME_OFFSET \
659 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
661 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
663 /* If we generate an insn to push BYTES bytes, this says how many the stack
664 pointer really advances by. On S/390, we have no push instruction. */
666 /* #define PUSH_ROUNDING(BYTES) */
668 /* Accumulate the outgoing argument count so we can request the right
669 DSA size and determine stack offset. */
671 #define ACCUMULATE_OUTGOING_ARGS 1
673 /* Offset from the stack pointer register to an item dynamically
674 allocated on the stack, e.g., by `alloca'.
676 The default value for this macro is `STACK_POINTER_OFFSET' plus the
677 length of the outgoing arguments. The default is correct for most
678 machines. See `function.c' for details. */
679 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
681 /* Offset of first parameter from the argument pointer register value.
682 On the S/390, we define the argument pointer to the start of the fixed
684 #define FIRST_PARM_OFFSET(FNDECL) 0
686 /* Define this if stack space is still allocated for a parameter passed
687 in a register. The value is the number of bytes allocated to this
689 /* #define REG_PARM_STACK_SPACE(FNDECL) 32 */
691 /* Define this if the above stack space is to be considered part of the
692 space allocated by the caller. */
693 /* #define OUTGOING_REG_PARM_STACK_SPACE */
695 /* 1 if N is a possible register number for function argument passing.
696 On S390, general registers 2 - 6 and floating point register 0 and 2
697 are used in this way. */
699 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
700 (N) == 16 || (N) == 17)
702 /* Define a data type for recording info about an argument list during
703 the scan of that argument list. This data type should hold all
704 necessary information about the function itself and about the args
705 processed so far, enough to enable macros such as FUNCTION_ARG to
706 determine where the next arg should go. */
708 typedef struct s390_arg_structure
710 int gprs; /* gpr so far */
711 int fprs; /* fpr so far */
716 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
717 a function whose data type is FNTYPE.
718 For a library call, FNTYPE is 0. */
720 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN) \
721 ((CUM).gprs=0, (CUM).fprs=0)
723 /* Update the data in CUM to advance over an argument of mode MODE and
724 data type TYPE. (TYPE is null for libcalls where that information
725 may not be available.) */
727 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
728 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
730 /* Define where to put the arguments to a function. Value is zero to push
731 the argument on the stack, or a hard register in which to store the
734 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
735 s390_function_arg (&CUM, MODE, TYPE, NAMED)
737 /* Define where to expect the arguments of a function. Value is zero, if
738 the argument is on the stack, or a hard register in which the argument
739 is stored. It is the same like FUNCTION_ARG, except for unnamed args
740 That means, that all in case of varargs used, the arguments are expected
742 S/390 has already space on the stack for args coming in registers,
743 they are pushed in prologue, if needed. */
746 /* Define the `__builtin_va_list' type. */
748 #define BUILD_VA_LIST_TYPE(VALIST) \
749 (VALIST) = s390_build_va_list ()
751 /* Implement `va_start' for varargs and stdarg. */
753 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
754 s390_va_start (valist, nextarg)
756 /* Implement `va_arg'. */
758 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
759 s390_va_arg (valist, type)
761 /* For an arg passed partly in registers and partly in memory, this is the
762 number of registers used. For args passed entirely in registers or
763 entirely in memory, zero. */
765 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
768 /* Define if returning from a function call automatically pops the
769 arguments described by the number-of-args field in the call. */
771 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
774 /* Define how to find the value returned by a function. VALTYPE is the
775 data type of the value (as a tree).
776 If the precise function being called is known, FUNC is its FUNCTION_DECL;
777 otherwise, FUNC is 15. */
779 #define RET_REG(MODE) ((GET_MODE_CLASS (MODE) == MODE_INT \
780 || TARGET_SOFT_FLOAT ) ? 2 : 16)
783 /* for structs the address is passed, and the Callee makes a
784 copy, only if needed */
786 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
787 s390_function_arg_pass_by_reference (MODE, TYPE)
790 /* Register 2 (and 3) for integral values
791 or floating point register 0 (and 2) for fp values are used. */
793 #define FUNCTION_VALUE(VALTYPE, FUNC) \
794 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
795 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
796 || POINTER_TYPE_P (VALTYPE) \
797 ? word_mode : TYPE_MODE (VALTYPE), \
798 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 16 : 2)
800 /* Define how to find the value returned by a library function assuming
801 the value has mode MODE. */
803 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, RET_REG (MODE))
805 /* 1 if N is a possible register number for a function value. */
807 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
809 /* The definition of this macro implies that there are cases where
810 a scalar value cannot be returned in registers. */
812 #define RETURN_IN_MEMORY(type) \
813 (TYPE_MODE (type) == BLKmode || \
814 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_INT || \
815 GET_MODE_CLASS (TYPE_MODE (type)) == MODE_COMPLEX_FLOAT)
817 /* Mode of stack savearea.
818 FUNCTION is VOIDmode because calling convention maintains SP.
819 BLOCK needs Pmode for SP.
820 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
822 #define STACK_SAVEAREA_MODE(LEVEL) \
823 (LEVEL == SAVE_FUNCTION ? VOIDmode \
824 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? TImode : DImode) : Pmode)
826 /* Structure value address is passed as invisible first argument (gpr 2). */
828 #define STRUCT_VALUE 0
830 /* This macro definition sets up a default value for `main' to return. */
832 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
834 /* Length in units of the trampoline for entering a nested function. */
836 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
838 /* Initialize the dynamic part of trampoline. */
840 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
841 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
843 /* Template for constant part of trampoline. */
845 #define TRAMPOLINE_TEMPLATE(FILE) \
846 s390_trampoline_template (FILE)
848 /* Output assembler code to FILE to increment profiler label # LABELNO
849 for profiling a function entry. */
851 #define FUNCTION_PROFILER(FILE, LABELNO) \
852 s390_function_profiler ((FILE), ((LABELNO)))
854 #define PROFILE_BEFORE_PROLOGUE 1
856 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
857 pointer does not matter (provided there is a frame pointer). */
859 #define EXIT_IGNORE_STACK 1
861 /* Addressing modes, and classification of registers for them. */
863 /* #define HAVE_POST_INCREMENT */
864 /* #define HAVE_POST_DECREMENT */
866 /* #define HAVE_PRE_DECREMENT */
867 /* #define HAVE_PRE_INCREMENT */
869 /* These assume that REGNO is a hard or pseudo reg number. They give
870 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
871 reg currently allocated to a suitable hard reg.
872 These definitions are NOT overridden anywhere. */
874 #define REGNO_OK_FOR_INDEX_P(REGNO) \
875 (((REGNO) < FIRST_PSEUDO_REGISTER \
876 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
877 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
879 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
881 #define REGNO_OK_FOR_DATA_P(REGNO) \
882 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
884 #define REGNO_OK_FOR_FP_P(REGNO) \
885 FLOAT_REGNO_P (REGNO)
887 /* Now macros that check whether X is a register and also,
888 strictly, whether it is in a specified class. */
890 /* 1 if X is a data register. */
892 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
894 /* 1 if X is an fp register. */
896 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
898 /* 1 if X is an address register. */
900 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
902 /* Maximum number of registers that can appear in a valid memory address. */
904 #define MAX_REGS_PER_ADDRESS 2
906 /* Recognize any constant value that is a valid address. */
908 #define CONSTANT_ADDRESS_P(X) 0
910 #define SYMBOLIC_CONST(X) \
911 (GET_CODE (X) == SYMBOL_REF \
912 || GET_CODE (X) == LABEL_REF \
913 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
915 /* General operand is everything except SYMBOL_REF, CONST and CONST_DOUBLE
916 they have to be forced to constant pool
917 CONST_INT have to be forced into constant pool, if greater than
918 64k. Depending on the insn they have to be force into constant pool
919 for smaller value; in this case we have to work with nonimmediate operand. */
921 #define LEGITIMATE_PIC_OPERAND_P(X) \
922 legitimate_pic_operand_p (X)
924 /* Nonzero if the constant value X is a legitimate general operand.
925 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
927 #define LEGITIMATE_CONSTANT_P(X) \
928 legitimate_constant_p (X)
930 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
931 its validity for a certain class. We have two alternate definitions
932 for each of them. The usual definition accepts all pseudo regs; the
933 other rejects them all. The symbol REG_OK_STRICT causes the latter
934 definition to be used.
936 Most source files want to accept pseudo regs in the hope that they will
937 get allocated to the class that the insn wants them to be in.
938 Some source files that are used after register allocation
939 need to be strict. */
942 * Nonzero if X is a hard reg that can be used as an index or if it is
946 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
947 ((GET_MODE (X) == Pmode) && \
948 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
949 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
951 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
954 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
956 /* Nonzero if X is a hard reg that can be used as an index. */
958 #define REG_OK_FOR_INDEX_STRICT_P(X) \
959 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
961 /* Nonzero if X is a hard reg that can be used as a base reg. */
963 #define REG_OK_FOR_BASE_STRICT_P(X) \
964 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
967 #ifndef REG_OK_STRICT
968 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
969 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
971 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
972 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
976 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
977 valid memory address for an instruction.
978 The MODE argument is the machine mode for the MEM expression
979 that wants to use this address.
981 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
982 except for CONSTANT_ADDRESS_P which is actually machine-independent. */
985 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
987 if (legitimate_address_p (MODE, X, 1)) \
991 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
993 if (legitimate_address_p (MODE, X, 0)) \
999 /* S/390 has no mode dependent addresses. */
1001 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
1003 /* Try machine-dependent ways of modifying an illegitimate address
1004 to be legitimate. If we find one, return the new, valid address.
1005 This macro is used in only one place: `memory_address' in explow.c. */
1007 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1009 (X) = legitimize_address (X, OLDX, MODE); \
1010 if (memory_address_p (MODE, X)) \
1014 /* Specify the machine mode that this machine uses for the index in the
1015 tablejump instruction. */
1017 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1019 /* Define this if the tablejump instruction expects the table to contain
1020 offsets from the address of the table.
1021 Do not define this if the table should contain absolute addresses. */
1023 /* #define CASE_VECTOR_PC_RELATIVE */
1025 /* Load from integral MODE < SI from memory into register makes sign_extend
1027 In our case sign_extension happens for Halfwords, other no extension. */
1029 #define LOAD_EXTEND_OP(MODE) \
1030 (TARGET_64BIT ? ((MODE) == QImode ? ZERO_EXTEND : \
1031 (MODE) == HImode ? SIGN_EXTEND : NIL) \
1032 : ((MODE) == HImode ? SIGN_EXTEND : NIL))
1034 /* Define this if fixuns_trunc is the same as fix_trunc. */
1036 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
1038 /* We use "unsigned char" as default. */
1040 #define DEFAULT_SIGNED_CHAR 0
1042 /* Max number of bytes we can move from memory to memory in one reasonably
1043 fast instruction. */
1045 #define MOVE_MAX 256
1047 /* Nonzero if access to memory by bytes is slow and undesirable. */
1049 #define SLOW_BYTE_ACCESS 1
1051 /* Define if shifts truncate the shift count which implies one can omit
1052 a sign-extension or zero-extension of a shift count. */
1054 /* #define SHIFT_COUNT_TRUNCATED */
1056 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1057 is done just by pretending it is already truncated. */
1059 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1061 /* We assume that the store-condition-codes instructions store 0 for false
1062 and some other value for true. This is the value stored for true. */
1064 /* #define STORE_FLAG_VALUE -1 */
1066 /* Don't perform CSE on function addresses. */
1068 #define NO_FUNCTION_CSE
1070 /* Specify the machine mode that pointers have.
1071 After generation of rtl, the compiler makes no further distinction
1072 between pointers and any other objects of this machine mode. */
1074 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1076 /* A function address in a call instruction is a byte address (for
1077 indexing purposes) so give the MEM rtx a byte's mode. */
1079 #define FUNCTION_MODE QImode
1082 /* A part of a C `switch' statement that describes the relative costs
1083 of constant RTL expressions. It must contain `case' labels for
1084 expression codes `const_int', `const', `symbol_ref', `label_ref'
1085 and `const_double'. Each case must ultimately reach a `return'
1086 statement to return the relative cost of the use of that kind of
1087 constant value in an expression. The cost may depend on the
1088 precise value of the constant, which is available for examination
1089 in X, and the rtx code of the expression in which it is contained,
1090 found in OUTER_CODE.
1092 CODE is the expression code--redundant, since it can be obtained
1093 with `GET_CODE (X)'. */
1094 /* Force_const_mem does not work out of reload, because the saveable_obstack
1095 is set to reload_obstack, which does not live long enough.
1096 Because of this we cannot use force_const_mem in addsi3.
1097 This leads to problems with gen_add2_insn with a constant greater
1098 than a short. Because of that we give an addition of greater
1099 constants a cost of 3 (reload1.c 10096). */
1102 #define CONST_COSTS(RTX, CODE, OUTER_CODE) \
1104 if ((GET_CODE (XEXP (RTX, 0)) == MINUS) && \
1105 (GET_CODE (XEXP (XEXP (RTX, 0), 1)) != CONST_INT)) \
1108 if ((OUTER_CODE == PLUS) && \
1109 ((INTVAL (RTX) > 32767) || \
1110 (INTVAL (RTX) < -32768))) \
1111 return COSTS_N_INSNS (3); \
1114 case CONST_DOUBLE: \
1118 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1119 This can be used, for example, to indicate how costly a multiply
1120 instruction is. In writing this macro, you can use the construct
1121 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1122 instructions. OUTER_CODE is the code of the expression in which X
1125 This macro is optional; do not define it if the default cost
1126 assumptions are adequate for the target machine. */
1128 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1141 if (GET_MODE (XEXP (X, 0)) == DImode) \
1152 /* An expression giving the cost of an addressing mode that contains
1153 ADDRESS. If not defined, the cost is computed from the ADDRESS
1154 expression and the `CONST_COSTS' values.
1156 For most CISC machines, the default cost is a good approximation
1157 of the true cost of the addressing mode. However, on RISC
1158 machines, all instructions normally have the same length and
1159 execution time. Hence all addresses will have equal costs.
1161 In cases where more than one form of an address is known, the form
1162 with the lowest cost will be used. If multiple forms have the
1163 same, lowest, cost, the one that is the most complex will be used.
1165 For example, suppose an address that is equal to the sum of a
1166 register and a constant is used twice in the same basic block.
1167 When this macro is not defined, the address will be computed in a
1168 register and memory references will be indirect through that
1169 register. On machines where the cost of the addressing mode
1170 containing the sum is no higher than that of a simple indirect
1171 reference, this will produce an additional instruction and
1172 possibly require an additional register. Proper specification of
1173 this macro eliminates this overhead for such machines.
1175 Similar use of this macro is made in strength reduction of loops.
1177 ADDRESS need not be valid as an address. In such a case, the cost
1178 is not relevant and can be any value; invalid addresses need not be
1179 assigned a different cost.
1181 On machines where an address involving more than one register is as
1182 cheap as an address computation involving only one register,
1183 defining `ADDRESS_COST' to reflect this can cause two registers to
1184 be live over a region of code where only one would have been if
1185 `ADDRESS_COST' were not defined in that manner. This effect should
1186 be considered in the definition of this macro. Equivalent costs
1187 should probably only be given to addresses with different numbers
1188 of registers on machines with lots of registers.
1190 This macro will normally either not be defined or be defined as a
1193 On s390 symbols are expensive if compiled with fpic
1196 #define ADDRESS_COST(RTX) \
1197 ((flag_pic && GET_CODE (RTX) == SYMBOL_REF) ? 2 : 1)
1199 /* On s390, copy between fprs and gprs is expensive. */
1201 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1202 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
1203 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
1204 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
1205 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
1208 /* A C expression for the cost of moving data of mode M between a
1209 register and memory. A value of 2 is the default; this cost is
1210 relative to those in `REGISTER_MOVE_COST'.
1212 If moving between registers and memory is more expensive than
1213 between two registers, you should define this macro to express the
1216 #define MEMORY_MOVE_COST(M, C, I) 1
1218 /* A C expression for the cost of a branch instruction. A value of 1
1219 is the default; other values are interpreted relative to that. */
1221 #define BRANCH_COST 1
1223 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1224 return the mode to be used for the comparison. */
1226 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
1229 /* Define the information needed to generate branch and scc insns. This is
1230 stored from the compare operation. Note that we can't use "rtx" here
1231 since it hasn't been defined! */
1233 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
1236 /* How to refer to registers in assembler output. This sequence is
1237 indexed by compiler's hard-register-number (see above). */
1239 #define REGISTER_NAMES \
1240 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1241 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1242 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
1243 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
1244 "%ap", "%cc", "%fp" \
1247 /* implicit call of memcpy, not bcopy */
1249 #define TARGET_MEM_FUNCTIONS
1251 /* Either simplify a location expression, or return the original. */
1253 #define ASM_SIMPLIFY_DWARF_ADDR(X) \
1254 s390_simplify_dwarf_addr (X)
1256 /* Print operand X (an rtx) in assembler syntax to file FILE.
1257 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1258 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1260 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1262 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1265 /* Define the codes that are matched by predicates in aux-output.c. */
1267 #define PREDICATE_CODES \
1268 {"s_operand", { SUBREG, MEM }}, \
1269 {"s_imm_operand", { CONST_INT, CONST_DOUBLE, SUBREG, MEM }}, \
1270 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1271 {"larl_operand", { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }}, \
1272 {"load_multiple_operation", {PARALLEL}}, \
1273 {"store_multiple_operation", {PARALLEL}}, \
1274 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1275 {"consttable_operand", { SYMBOL_REF, LABEL_REF, CONST, \
1276 CONST_INT, CONST_DOUBLE }}, \
1277 {"s390_plus_operand", { PLUS }},
1280 /* S/390 constant pool breaks the devices in crtstuff.c to control section
1281 in where code resides. We have to write it as asm code. */
1283 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
1284 asm (SECTION_OP "\n\
1286 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
1288 bas\t%r14,0(%r3,%r2)\n\
1292 /* Constant Pool for all symbols operands which are changed with
1293 force_const_mem during insn generation (expand_insn). */
1295 extern int s390_pool_count;
1296 extern int s390_nr_constants;
1297 extern int s390_pool_overflow;
1299 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, FUNNAME, fndecl, size) \
1301 struct pool_constant *pool; \
1303 if (s390_pool_count == -1) \
1305 s390_nr_constants = 0; \
1306 for (pool = first_pool; pool; pool = pool->next) \
1307 if (pool->mark) s390_nr_constants++; \
1312 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, EXP, MODE, ALIGN, LABELNO, WIN) \
1314 fprintf (FILE, ".LC%d:\n", LABELNO); \
1316 /* Output the value of the constant itself. */ \
1317 switch (GET_MODE_CLASS (MODE)) \
1320 if (GET_CODE (EXP) != CONST_DOUBLE) \
1323 REAL_VALUE_FROM_CONST_DOUBLE (r, EXP); \
1324 assemble_real (r, MODE, ALIGN); \
1328 case MODE_PARTIAL_INT: \
1330 && (GET_CODE (EXP) == CONST \
1331 || GET_CODE (EXP) == SYMBOL_REF \
1332 || GET_CODE (EXP) == LABEL_REF )) \
1334 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), FILE); \
1335 s390_output_symbolic_const (FILE, EXP); \
1336 fputc ('\n', (FILE)); \
1340 assemble_integer (EXP, GET_MODE_SIZE (MODE), ALIGN, 1); \
1341 if (GET_MODE_SIZE (MODE) == 1) \
1342 ASM_OUTPUT_SKIP ((FILE), 1); \