1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
53 #include "tree-gimple.h"
55 /* Machine-specific symbol_ref flags. */
56 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
59 static bool s390_assemble_integer (rtx, unsigned int, int);
60 static void s390_select_rtx_section (enum machine_mode, rtx,
61 unsigned HOST_WIDE_INT);
62 static void s390_encode_section_info (tree, rtx, int);
63 static bool s390_cannot_force_const_mem (rtx);
64 static rtx s390_delegitimize_address (rtx);
65 static bool s390_return_in_memory (tree, tree);
66 static void s390_init_builtins (void);
67 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
68 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
70 static enum attr_type s390_safe_attr_type (rtx);
72 static int s390_adjust_cost (rtx, rtx, rtx, int);
73 static int s390_adjust_priority (rtx, int);
74 static int s390_issue_rate (void);
75 static int s390_first_cycle_multipass_dfa_lookahead (void);
76 static bool s390_rtx_costs (rtx, int, int, int *);
77 static int s390_address_cost (rtx);
78 static void s390_reorg (void);
79 static bool s390_valid_pointer_mode (enum machine_mode);
80 static tree s390_build_builtin_va_list (void);
81 static tree s390_gimplify_va_arg (tree, tree, tree *, tree *);
82 static bool s390_function_ok_for_sibcall (tree, tree);
83 static bool s390_call_saved_register_used (tree);
84 static bool s390_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode mode,
87 #undef TARGET_ASM_ALIGNED_HI_OP
88 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
89 #undef TARGET_ASM_ALIGNED_DI_OP
90 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
91 #undef TARGET_ASM_INTEGER
92 #define TARGET_ASM_INTEGER s390_assemble_integer
94 #undef TARGET_ASM_OPEN_PAREN
95 #define TARGET_ASM_OPEN_PAREN ""
97 #undef TARGET_ASM_CLOSE_PAREN
98 #define TARGET_ASM_CLOSE_PAREN ""
100 #undef TARGET_ASM_SELECT_RTX_SECTION
101 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
103 #undef TARGET_ENCODE_SECTION_INFO
104 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
107 #undef TARGET_HAVE_TLS
108 #define TARGET_HAVE_TLS true
110 #undef TARGET_CANNOT_FORCE_CONST_MEM
111 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
113 #undef TARGET_DELEGITIMIZE_ADDRESS
114 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
116 #undef TARGET_RETURN_IN_MEMORY
117 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
119 #undef TARGET_INIT_BUILTINS
120 #define TARGET_INIT_BUILTINS s390_init_builtins
121 #undef TARGET_EXPAND_BUILTIN
122 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
124 #undef TARGET_ASM_OUTPUT_MI_THUNK
125 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
126 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
127 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
129 #undef TARGET_SCHED_ADJUST_COST
130 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
131 #undef TARGET_SCHED_ADJUST_PRIORITY
132 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
133 #undef TARGET_SCHED_ISSUE_RATE
134 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
135 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
136 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
138 #undef TARGET_RTX_COSTS
139 #define TARGET_RTX_COSTS s390_rtx_costs
140 #undef TARGET_ADDRESS_COST
141 #define TARGET_ADDRESS_COST s390_address_cost
143 #undef TARGET_MACHINE_DEPENDENT_REORG
144 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
146 #undef TARGET_VALID_POINTER_MODE
147 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
149 #undef TARGET_BUILD_BUILTIN_VA_LIST
150 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
151 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
152 #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg
154 #undef TARGET_PROMOTE_FUNCTION_ARGS
155 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
156 #undef TARGET_PROMOTE_FUNCTION_RETURN
157 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
158 #undef TARGET_PASS_BY_REFERENCE
159 #define TARGET_PASS_BY_REFERENCE s390_pass_by_reference
161 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
162 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
164 struct gcc_target targetm = TARGET_INITIALIZER;
166 extern int reload_completed;
168 /* The alias set for prologue/epilogue register save/restore. */
169 static int s390_sr_alias_set = 0;
171 /* Save information from a "cmpxx" operation until the branch or scc is
173 rtx s390_compare_op0, s390_compare_op1;
175 /* Structure used to hold the components of a S/390 memory
176 address. A legitimate address on S/390 is of the general
178 base + index + displacement
179 where any of the components is optional.
181 base and index are registers of the class ADDR_REGS,
182 displacement is an unsigned 12-bit immediate constant. */
192 /* Which cpu are we tuning for. */
193 enum processor_type s390_tune;
194 enum processor_flags s390_tune_flags;
195 /* Which instruction set architecture to use. */
196 enum processor_type s390_arch;
197 enum processor_flags s390_arch_flags;
199 /* Strings to hold which cpu and instruction set architecture to use. */
200 const char *s390_tune_string; /* for -mtune=<xxx> */
201 const char *s390_arch_string; /* for -march=<xxx> */
203 /* Define the structure for the machine field in struct function. */
205 struct machine_function GTY(())
207 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
210 /* Set if return address needs to be saved. */
211 bool save_return_addr_p;
213 /* Number of first and last gpr to be saved, restored. */
215 int first_restore_gpr;
217 int last_restore_gpr;
219 /* Size of stack frame. */
220 HOST_WIDE_INT frame_size;
222 /* Literal pool base register. */
225 /* Some local-dynamic TLS symbol name. */
226 const char *some_ld_name;
229 static int s390_match_ccmode_set (rtx, enum machine_mode);
230 static int s390_branch_condition_mask (rtx);
231 static const char *s390_branch_condition_mnemonic (rtx, int);
232 static int check_mode (rtx, enum machine_mode *);
233 static int general_s_operand (rtx, enum machine_mode, int);
234 static int s390_short_displacement (rtx);
235 static int s390_decompose_address (rtx, struct s390_address *);
236 static rtx get_thread_pointer (void);
237 static rtx legitimize_tls_address (rtx, rtx);
238 static void print_shift_count_operand (FILE *, rtx);
239 static const char *get_some_local_dynamic_name (void);
240 static int get_some_local_dynamic_name_1 (rtx *, void *);
241 static int reg_used_in_mem_p (int, rtx);
242 static int addr_generation_dependency_p (rtx, rtx);
243 static int s390_split_branches (void);
244 static void annotate_constant_pool_refs (rtx *x);
245 static void find_constant_pool_ref (rtx, rtx *);
246 static void replace_constant_pool_ref (rtx *, rtx, rtx);
247 static rtx find_ltrel_base (rtx);
248 static void replace_ltrel_base (rtx *);
249 static void s390_optimize_prolog (bool);
250 static int find_unused_clobbered_reg (void);
251 static void s390_frame_info (int, int);
252 static rtx save_fpr (rtx, int, int);
253 static rtx restore_fpr (rtx, int, int);
254 static rtx save_gprs (rtx, int, int, int);
255 static rtx restore_gprs (rtx, int, int, int);
256 static int s390_function_arg_size (enum machine_mode, tree);
257 static bool s390_function_arg_float (enum machine_mode, tree);
258 static struct machine_function * s390_init_machine_status (void);
260 /* Check whether integer displacement is in range. */
261 #define DISP_IN_RANGE(d) \
262 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
263 : ((d) >= 0 && (d) <= 4095))
265 /* Return true if SET either doesn't set the CC register, or else
266 the source and destination have matching CC modes and that
267 CC mode is at least as constrained as REQ_MODE. */
270 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
272 enum machine_mode set_mode;
274 if (GET_CODE (set) != SET)
277 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
280 set_mode = GET_MODE (SET_DEST (set));
294 if (req_mode != set_mode)
299 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
300 && req_mode != CCSRmode && req_mode != CCURmode)
306 if (req_mode != CCAmode)
314 return (GET_MODE (SET_SRC (set)) == set_mode);
317 /* Return true if every SET in INSN that sets the CC register
318 has source and destination with matching CC modes and that
319 CC mode is at least as constrained as REQ_MODE.
320 If REQ_MODE is VOIDmode, always return false. */
323 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
327 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
328 if (req_mode == VOIDmode)
331 if (GET_CODE (PATTERN (insn)) == SET)
332 return s390_match_ccmode_set (PATTERN (insn), req_mode);
334 if (GET_CODE (PATTERN (insn)) == PARALLEL)
335 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
337 rtx set = XVECEXP (PATTERN (insn), 0, i);
338 if (GET_CODE (set) == SET)
339 if (!s390_match_ccmode_set (set, req_mode))
346 /* If a test-under-mask instruction can be used to implement
347 (compare (and ... OP1) OP2), return the CC mode required
348 to do that. Otherwise, return VOIDmode.
349 MIXED is true if the instruction can distinguish between
350 CC1 and CC2 for mixed selected bits (TMxx), it is false
351 if the instruction cannot (TM). */
354 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
358 /* ??? Fixme: should work on CONST_DOUBLE as well. */
359 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
362 /* Selected bits all zero: CC0. */
363 if (INTVAL (op2) == 0)
366 /* Selected bits all one: CC3. */
367 if (INTVAL (op2) == INTVAL (op1))
370 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
373 bit1 = exact_log2 (INTVAL (op2));
374 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
375 if (bit0 != -1 && bit1 != -1)
376 return bit0 > bit1 ? CCT1mode : CCT2mode;
382 /* Given a comparison code OP (EQ, NE, etc.) and the operands
383 OP0 and OP1 of a COMPARE, return the mode to be used for the
387 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
393 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
394 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
396 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
397 || GET_CODE (op1) == NEG)
398 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
401 if (GET_CODE (op0) == AND)
403 /* Check whether we can potentially do it via TM. */
404 enum machine_mode ccmode;
405 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
406 if (ccmode != VOIDmode)
408 /* Relax CCTmode to CCZmode to allow fall-back to AND
409 if that turns out to be beneficial. */
410 return ccmode == CCTmode ? CCZmode : ccmode;
414 if (register_operand (op0, HImode)
415 && GET_CODE (op1) == CONST_INT
416 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
418 if (register_operand (op0, QImode)
419 && GET_CODE (op1) == CONST_INT
420 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
429 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
430 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
432 if (INTVAL (XEXP((op0), 1)) < 0)
445 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
446 && GET_CODE (op1) != CONST_INT)
452 if (GET_CODE (op0) == PLUS
453 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
456 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
457 && GET_CODE (op1) != CONST_INT)
463 if (GET_CODE (op0) == MINUS
464 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
467 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
468 && GET_CODE (op1) != CONST_INT)
477 /* Replace the comparison OP0 CODE OP1 by a semantically equivalent one
478 that we can implement more efficiently. */
481 s390_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1)
483 /* Convert ZERO_EXTRACT back to AND to enable TM patterns. */
484 if ((*code == EQ || *code == NE)
485 && *op1 == const0_rtx
486 && GET_CODE (*op0) == ZERO_EXTRACT
487 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
488 && GET_CODE (XEXP (*op0, 2)) == CONST_INT
489 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
491 rtx inner = XEXP (*op0, 0);
492 HOST_WIDE_INT modesize = GET_MODE_BITSIZE (GET_MODE (inner));
493 HOST_WIDE_INT len = INTVAL (XEXP (*op0, 1));
494 HOST_WIDE_INT pos = INTVAL (XEXP (*op0, 2));
496 if (len > 0 && len < modesize
497 && pos >= 0 && pos + len <= modesize
498 && modesize <= HOST_BITS_PER_WIDE_INT)
500 unsigned HOST_WIDE_INT block;
501 block = ((unsigned HOST_WIDE_INT) 1 << len) - 1;
502 block <<= modesize - pos - len;
504 *op0 = gen_rtx_AND (GET_MODE (inner), inner,
505 gen_int_mode (block, GET_MODE (inner)));
509 /* Narrow AND of memory against immediate to enable TM. */
510 if ((*code == EQ || *code == NE)
511 && *op1 == const0_rtx
512 && GET_CODE (*op0) == AND
513 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
514 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
516 rtx inner = XEXP (*op0, 0);
517 rtx mask = XEXP (*op0, 1);
519 /* Ignore paradoxical SUBREGs if all extra bits are masked out. */
520 if (GET_CODE (inner) == SUBREG
521 && SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (inner)))
522 && (GET_MODE_SIZE (GET_MODE (inner))
523 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (inner))))
525 & GET_MODE_MASK (GET_MODE (inner))
526 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (inner))))
528 inner = SUBREG_REG (inner);
530 /* Do not change volatile MEMs. */
531 if (MEM_P (inner) && !MEM_VOLATILE_P (inner))
533 int part = s390_single_part (XEXP (*op0, 1),
534 GET_MODE (inner), QImode, 0);
537 mask = gen_int_mode (s390_extract_part (mask, QImode, 0), QImode);
538 inner = adjust_address_nv (inner, QImode, part);
539 *op0 = gen_rtx_AND (QImode, inner, mask);
544 /* Narrow comparisons against 0xffff to HImode if possible. */
546 if ((*code == EQ || *code == NE)
547 && GET_CODE (*op1) == CONST_INT
548 && INTVAL (*op1) == 0xffff
549 && SCALAR_INT_MODE_P (GET_MODE (*op0))
550 && (nonzero_bits (*op0, GET_MODE (*op0))
551 & ~(unsigned HOST_WIDE_INT) 0xffff) == 0)
553 *op0 = gen_lowpart (HImode, *op0);
558 /* Emit a compare instruction suitable to implement the comparison
559 OP0 CODE OP1. Return the correct condition RTL to be placed in
560 the IF_THEN_ELSE of the conditional branch testing the result. */
563 s390_emit_compare (enum rtx_code code, rtx op0, rtx op1)
565 enum machine_mode mode = s390_select_ccmode (code, op0, op1);
566 rtx cc = gen_rtx_REG (mode, CC_REGNUM);
568 emit_insn (gen_rtx_SET (VOIDmode, cc, gen_rtx_COMPARE (mode, op0, op1)));
569 return gen_rtx_fmt_ee (code, VOIDmode, cc, const0_rtx);
572 /* Emit a jump instruction to TARGET. If COND is NULL_RTX, emit an
573 unconditional jump, else a conditional jump under condition COND. */
576 s390_emit_jump (rtx target, rtx cond)
580 target = gen_rtx_LABEL_REF (VOIDmode, target);
582 target = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, target, pc_rtx);
584 insn = gen_rtx_SET (VOIDmode, pc_rtx, target);
585 emit_jump_insn (insn);
588 /* Return nonzero if OP is a valid comparison operator
589 for an ALC condition in mode MODE. */
592 s390_alc_comparison (rtx op, enum machine_mode mode)
594 if (mode != VOIDmode && mode != GET_MODE (op))
597 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
600 if (!COMPARISON_P (op))
603 if (GET_CODE (XEXP (op, 0)) != REG
604 || REGNO (XEXP (op, 0)) != CC_REGNUM
605 || XEXP (op, 1) != const0_rtx)
608 switch (GET_MODE (XEXP (op, 0)))
611 return GET_CODE (op) == LTU;
614 return GET_CODE (op) == LEU;
617 return GET_CODE (op) == GEU;
620 return GET_CODE (op) == GTU;
623 return GET_CODE (op) == LTU;
626 return GET_CODE (op) == UNGT;
629 return GET_CODE (op) == UNLT;
636 /* Return nonzero if OP is a valid comparison operator
637 for an SLB condition in mode MODE. */
640 s390_slb_comparison (rtx op, enum machine_mode mode)
642 if (mode != VOIDmode && mode != GET_MODE (op))
645 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
648 if (!COMPARISON_P (op))
651 if (GET_CODE (XEXP (op, 0)) != REG
652 || REGNO (XEXP (op, 0)) != CC_REGNUM
653 || XEXP (op, 1) != const0_rtx)
656 switch (GET_MODE (XEXP (op, 0)))
659 return GET_CODE (op) == GEU;
662 return GET_CODE (op) == GTU;
665 return GET_CODE (op) == LTU;
668 return GET_CODE (op) == LEU;
671 return GET_CODE (op) == GEU;
674 return GET_CODE (op) == LE;
677 return GET_CODE (op) == GE;
684 /* Return branch condition mask to implement a branch
685 specified by CODE. */
688 s390_branch_condition_mask (rtx code)
690 const int CC0 = 1 << 3;
691 const int CC1 = 1 << 2;
692 const int CC2 = 1 << 1;
693 const int CC3 = 1 << 0;
695 if (GET_CODE (XEXP (code, 0)) != REG
696 || REGNO (XEXP (code, 0)) != CC_REGNUM
697 || XEXP (code, 1) != const0_rtx)
700 switch (GET_MODE (XEXP (code, 0)))
703 switch (GET_CODE (code))
706 case NE: return CC1 | CC2 | CC3;
713 switch (GET_CODE (code))
716 case NE: return CC0 | CC2 | CC3;
723 switch (GET_CODE (code))
726 case NE: return CC0 | CC1 | CC3;
733 switch (GET_CODE (code))
736 case NE: return CC0 | CC1 | CC2;
743 switch (GET_CODE (code))
745 case EQ: return CC0 | CC2;
746 case NE: return CC1 | CC3;
753 switch (GET_CODE (code))
755 case LTU: return CC2 | CC3; /* carry */
756 case GEU: return CC0 | CC1; /* no carry */
763 switch (GET_CODE (code))
765 case GTU: return CC0 | CC1; /* borrow */
766 case LEU: return CC2 | CC3; /* no borrow */
773 switch (GET_CODE (code))
775 case EQ: return CC0 | CC2;
776 case NE: return CC1 | CC3;
777 case LTU: return CC1;
778 case GTU: return CC3;
779 case LEU: return CC1 | CC2;
780 case GEU: return CC2 | CC3;
786 switch (GET_CODE (code))
789 case NE: return CC1 | CC2 | CC3;
790 case LTU: return CC1;
791 case GTU: return CC2;
792 case LEU: return CC0 | CC1;
793 case GEU: return CC0 | CC2;
800 switch (GET_CODE (code))
803 case NE: return CC2 | CC1 | CC3;
804 case LTU: return CC2;
805 case GTU: return CC1;
806 case LEU: return CC0 | CC2;
807 case GEU: return CC0 | CC1;
814 switch (GET_CODE (code))
817 case NE: return CC1 | CC2 | CC3;
818 case LT: return CC1 | CC3;
820 case LE: return CC0 | CC1 | CC3;
821 case GE: return CC0 | CC2;
828 switch (GET_CODE (code))
831 case NE: return CC1 | CC2 | CC3;
833 case GT: return CC2 | CC3;
834 case LE: return CC0 | CC1;
835 case GE: return CC0 | CC2 | CC3;
842 switch (GET_CODE (code))
845 case NE: return CC1 | CC2 | CC3;
848 case LE: return CC0 | CC1;
849 case GE: return CC0 | CC2;
850 case UNORDERED: return CC3;
851 case ORDERED: return CC0 | CC1 | CC2;
852 case UNEQ: return CC0 | CC3;
853 case UNLT: return CC1 | CC3;
854 case UNGT: return CC2 | CC3;
855 case UNLE: return CC0 | CC1 | CC3;
856 case UNGE: return CC0 | CC2 | CC3;
857 case LTGT: return CC1 | CC2;
864 switch (GET_CODE (code))
867 case NE: return CC2 | CC1 | CC3;
870 case LE: return CC0 | CC2;
871 case GE: return CC0 | CC1;
872 case UNORDERED: return CC3;
873 case ORDERED: return CC0 | CC2 | CC1;
874 case UNEQ: return CC0 | CC3;
875 case UNLT: return CC2 | CC3;
876 case UNGT: return CC1 | CC3;
877 case UNLE: return CC0 | CC2 | CC3;
878 case UNGE: return CC0 | CC1 | CC3;
879 case LTGT: return CC2 | CC1;
890 /* If INV is false, return assembler mnemonic string to implement
891 a branch specified by CODE. If INV is true, return mnemonic
892 for the corresponding inverted branch. */
895 s390_branch_condition_mnemonic (rtx code, int inv)
897 static const char *const mnemonic[16] =
899 NULL, "o", "h", "nle",
900 "l", "nhe", "lh", "ne",
901 "e", "nlh", "he", "nl",
902 "le", "nh", "no", NULL
905 int mask = s390_branch_condition_mask (code);
910 if (mask < 1 || mask > 14)
913 return mnemonic[mask];
916 /* Return the part of op which has a value different from def.
917 The size of the part is determined by mode.
918 Use this function only if you already know that op really
919 contains such a part. */
921 unsigned HOST_WIDE_INT
922 s390_extract_part (rtx op, enum machine_mode mode, int def)
924 unsigned HOST_WIDE_INT value = 0;
925 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
926 int part_bits = GET_MODE_BITSIZE (mode);
927 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
930 for (i = 0; i < max_parts; i++)
933 value = (unsigned HOST_WIDE_INT) INTVAL (op);
937 if ((value & part_mask) != (def & part_mask))
938 return value & part_mask;
944 /* If OP is an integer constant of mode MODE with exactly one
945 part of mode PART_MODE unequal to DEF, return the number of that
946 part. Otherwise, return -1. */
949 s390_single_part (rtx op,
950 enum machine_mode mode,
951 enum machine_mode part_mode,
954 unsigned HOST_WIDE_INT value = 0;
955 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
956 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
959 if (GET_CODE (op) != CONST_INT)
962 for (i = 0; i < n_parts; i++)
965 value = (unsigned HOST_WIDE_INT) INTVAL (op);
967 value >>= GET_MODE_BITSIZE (part_mode);
969 if ((value & part_mask) != (def & part_mask))
977 return part == -1 ? -1 : n_parts - 1 - part;
980 /* Check whether we can (and want to) split a double-word
981 move in mode MODE from SRC to DST into two single-word
982 moves, moving the subword FIRST_SUBWORD first. */
985 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
987 /* Floating point registers cannot be split. */
988 if (FP_REG_P (src) || FP_REG_P (dst))
991 /* We don't need to split if operands are directly accessible. */
992 if (s_operand (src, mode) || s_operand (dst, mode))
995 /* Non-offsettable memory references cannot be split. */
996 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
997 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
1000 /* Moving the first subword must not clobber a register
1001 needed to move the second subword. */
1002 if (register_operand (dst, mode))
1004 rtx subreg = operand_subword (dst, first_subword, 0, mode);
1005 if (reg_overlap_mentioned_p (subreg, src))
1013 /* Change optimizations to be performed, depending on the
1016 LEVEL is the optimization level specified; 2 if `-O2' is
1017 specified, 1 if `-O' is specified, and 0 if neither is specified.
1019 SIZE is nonzero if `-Os' is specified and zero otherwise. */
1022 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
1024 /* ??? There are apparently still problems with -fcaller-saves. */
1025 flag_caller_saves = 0;
1027 /* By default, always emit DWARF-2 unwind info. This allows debugging
1028 without maintaining a stack frame back-chain. */
1029 flag_asynchronous_unwind_tables = 1;
1033 override_options (void)
1038 const char *const name; /* processor name or nickname. */
1039 const enum processor_type processor;
1040 const enum processor_flags flags;
1042 const processor_alias_table[] =
1044 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
1045 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
1046 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
1047 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
1048 | PF_LONG_DISPLACEMENT},
1051 int const pta_size = ARRAY_SIZE (processor_alias_table);
1053 /* Acquire a unique set number for our register saves and restores. */
1054 s390_sr_alias_set = new_alias_set ();
1056 /* Set up function hooks. */
1057 init_machine_status = s390_init_machine_status;
1059 /* Architecture mode defaults according to ABI. */
1060 if (!(target_flags_explicit & MASK_ZARCH))
1063 target_flags |= MASK_ZARCH;
1065 target_flags &= ~MASK_ZARCH;
1068 /* Determine processor architectural level. */
1069 if (!s390_arch_string)
1070 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
1072 for (i = 0; i < pta_size; i++)
1073 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
1075 s390_arch = processor_alias_table[i].processor;
1076 s390_arch_flags = processor_alias_table[i].flags;
1080 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1082 /* Determine processor to tune for. */
1083 if (!s390_tune_string)
1085 s390_tune = s390_arch;
1086 s390_tune_flags = s390_arch_flags;
1087 s390_tune_string = s390_arch_string;
1091 for (i = 0; i < pta_size; i++)
1092 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1094 s390_tune = processor_alias_table[i].processor;
1095 s390_tune_flags = processor_alias_table[i].flags;
1099 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1102 /* Sanity checks. */
1103 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1104 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1105 if (TARGET_64BIT && !TARGET_ZARCH)
1106 error ("64-bit ABI not supported in ESA/390 mode.");
1109 /* Map for smallest class containing reg regno. */
1111 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1112 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1113 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1114 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1115 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1116 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1117 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1118 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1119 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1120 ADDR_REGS, NO_REGS, ADDR_REGS, ADDR_REGS
1123 /* Return attribute type of insn. */
1125 static enum attr_type
1126 s390_safe_attr_type (rtx insn)
1128 if (recog_memoized (insn) >= 0)
1129 return get_attr_type (insn);
1134 /* Return true if OP a (const_int 0) operand.
1135 OP is the current operation.
1136 MODE is the current operation mode. */
1139 const0_operand (register rtx op, enum machine_mode mode)
1141 return op == CONST0_RTX (mode);
1144 /* Return true if OP is constant.
1145 OP is the current operation.
1146 MODE is the current operation mode. */
1149 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1151 return CONSTANT_P (op);
1154 /* Return true if the mode of operand OP matches MODE.
1155 If MODE is set to VOIDmode, set it to the mode of OP. */
1158 check_mode (register rtx op, enum machine_mode *mode)
1160 if (*mode == VOIDmode)
1161 *mode = GET_MODE (op);
1164 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1170 /* Return true if OP a valid operand for the LARL instruction.
1171 OP is the current operation.
1172 MODE is the current operation mode. */
1175 larl_operand (register rtx op, enum machine_mode mode)
1177 if (! check_mode (op, &mode))
1180 /* Allow labels and local symbols. */
1181 if (GET_CODE (op) == LABEL_REF)
1183 if (GET_CODE (op) == SYMBOL_REF)
1184 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1185 && SYMBOL_REF_TLS_MODEL (op) == 0
1186 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1188 /* Everything else must have a CONST, so strip it. */
1189 if (GET_CODE (op) != CONST)
1193 /* Allow adding *even* in-range constants. */
1194 if (GET_CODE (op) == PLUS)
1196 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1197 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1199 #if HOST_BITS_PER_WIDE_INT > 32
1200 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1201 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1207 /* Labels and local symbols allowed here as well. */
1208 if (GET_CODE (op) == LABEL_REF)
1210 if (GET_CODE (op) == SYMBOL_REF)
1211 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1212 && SYMBOL_REF_TLS_MODEL (op) == 0
1213 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1215 /* Now we must have a @GOTENT offset or @PLT stub
1216 or an @INDNTPOFF TLS offset. */
1217 if (GET_CODE (op) == UNSPEC
1218 && XINT (op, 1) == UNSPEC_GOTENT)
1220 if (GET_CODE (op) == UNSPEC
1221 && XINT (op, 1) == UNSPEC_PLT)
1223 if (GET_CODE (op) == UNSPEC
1224 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1230 /* Helper routine to implement s_operand and s_imm_operand.
1231 OP is the current operation.
1232 MODE is the current operation mode.
1233 ALLOW_IMMEDIATE specifies whether immediate operands should
1234 be accepted or not. */
1237 general_s_operand (register rtx op, enum machine_mode mode,
1238 int allow_immediate)
1240 struct s390_address addr;
1242 /* Call general_operand first, so that we don't have to
1243 check for many special cases. */
1244 if (!general_operand (op, mode))
1247 /* Just like memory_operand, allow (subreg (mem ...))
1249 if (reload_completed
1250 && GET_CODE (op) == SUBREG
1251 && GET_CODE (SUBREG_REG (op)) == MEM)
1252 op = SUBREG_REG (op);
1254 switch (GET_CODE (op))
1256 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1257 is true and we are still before reload. */
1260 if (!allow_immediate || reload_completed)
1264 /* Memory operands are OK unless they already use an
1267 if (!s390_decompose_address (XEXP (op, 0), &addr))
1271 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1272 is true. This prevents compares between two literal pool
1273 entries from being accepted. */
1274 if (!allow_immediate
1275 && addr.base && REGNO (addr.base) == BASE_REGNUM)
1286 /* Return true if OP is a valid S-type operand.
1287 OP is the current operation.
1288 MODE is the current operation mode. */
1291 s_operand (register rtx op, enum machine_mode mode)
1293 return general_s_operand (op, mode, 0);
1296 /* Return true if OP is a valid S-type operand or an immediate
1297 operand that can be addressed as S-type operand by forcing
1298 it into the literal pool.
1299 OP is the current operation.
1300 MODE is the current operation mode. */
1303 s_imm_operand (register rtx op, enum machine_mode mode)
1305 return general_s_operand (op, mode, 1);
1308 /* Return true if OP a valid shift count operand.
1309 OP is the current operation.
1310 MODE is the current operation mode. */
1313 shift_count_operand (rtx op, enum machine_mode mode)
1315 HOST_WIDE_INT offset = 0;
1317 if (! check_mode (op, &mode))
1320 /* We can have an integer constant, an address register,
1321 or a sum of the two. Note that reload already checks
1322 that any register present is an address register, so
1323 we just check for any register here. */
1324 if (GET_CODE (op) == CONST_INT)
1326 offset = INTVAL (op);
1329 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1331 offset = INTVAL (XEXP (op, 1));
1334 while (op && GET_CODE (op) == SUBREG)
1335 op = SUBREG_REG (op);
1336 if (op && GET_CODE (op) != REG)
1339 /* Unfortunately we have to reject constants that are invalid
1340 for an address, or else reload will get confused. */
1341 if (!DISP_IN_RANGE (offset))
1347 /* Return true if DISP is a valid short displacement. */
1350 s390_short_displacement (rtx disp)
1352 /* No displacement is OK. */
1356 /* Integer displacement in range. */
1357 if (GET_CODE (disp) == CONST_INT)
1358 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1360 /* GOT offset is not OK, the GOT can be large. */
1361 if (GET_CODE (disp) == CONST
1362 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1363 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1366 /* All other symbolic constants are literal pool references,
1367 which are OK as the literal pool must be small. */
1368 if (GET_CODE (disp) == CONST)
1374 /* Return true if OP is a valid operand for a C constraint. */
1377 s390_extra_constraint_str (rtx op, int c, const char * str)
1379 struct s390_address addr;
1387 if (GET_CODE (op) != MEM)
1389 if (!s390_decompose_address (XEXP (op, 0), &addr))
1394 if (TARGET_LONG_DISPLACEMENT)
1396 if (!s390_short_displacement (addr.disp))
1402 if (GET_CODE (op) != MEM)
1405 if (TARGET_LONG_DISPLACEMENT)
1407 if (!s390_decompose_address (XEXP (op, 0), &addr))
1409 if (!s390_short_displacement (addr.disp))
1415 if (!TARGET_LONG_DISPLACEMENT)
1417 if (GET_CODE (op) != MEM)
1419 if (!s390_decompose_address (XEXP (op, 0), &addr))
1423 if (s390_short_displacement (addr.disp))
1428 if (!TARGET_LONG_DISPLACEMENT)
1430 if (GET_CODE (op) != MEM)
1432 /* Any invalid address here will be fixed up by reload,
1433 so accept it for the most generic constraint. */
1434 if (s390_decompose_address (XEXP (op, 0), &addr)
1435 && s390_short_displacement (addr.disp))
1440 if (TARGET_LONG_DISPLACEMENT)
1442 if (!s390_decompose_address (op, &addr))
1444 if (!s390_short_displacement (addr.disp))
1450 if (!TARGET_LONG_DISPLACEMENT)
1452 /* Any invalid address here will be fixed up by reload,
1453 so accept it for the most generic constraint. */
1454 if (s390_decompose_address (op, &addr)
1455 && s390_short_displacement (addr.disp))
1460 return shift_count_operand (op, VOIDmode);
1469 /* Return true if VALUE matches the constraint STR. */
1472 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1476 enum machine_mode mode, part_mode;
1486 return (unsigned int)value < 256;
1489 return (unsigned int)value < 4096;
1492 return value >= -32768 && value < 32768;
1495 return (TARGET_LONG_DISPLACEMENT ?
1496 (value >= -524288 && value <= 524287)
1497 : (value >= 0 && value <= 4095));
1499 return value == 2147483647;
1502 part = str[1] - '0';
1506 case 'H': part_mode = HImode; break;
1507 case 'Q': part_mode = QImode; break;
1513 case 'H': mode = HImode; break;
1514 case 'S': mode = SImode; break;
1515 case 'D': mode = DImode; break;
1521 case '0': def = 0; break;
1522 case 'F': def = -1; break;
1526 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1529 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1541 /* Compute a (partial) cost for rtx X. Return true if the complete
1542 cost has been computed, and false if subexpressions should be
1543 scanned. In either case, *TOTAL contains the cost result. */
1546 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1551 if (GET_CODE (XEXP (x, 0)) == MINUS
1552 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1559 /* Force_const_mem does not work out of reload, because the
1560 saveable_obstack is set to reload_obstack, which does not
1561 live long enough. Because of this we cannot use force_const_mem
1562 in addsi3. This leads to problems with gen_add2_insn with a
1563 constant greater than a short. Because of that we give an
1564 addition of greater constants a cost of 3 (reload1.c 10096). */
1565 /* ??? saveable_obstack no longer exists. */
1566 if (outer_code == PLUS
1567 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1568 *total = COSTS_N_INSNS (3);
1589 *total = COSTS_N_INSNS (1);
1593 if (GET_MODE (XEXP (x, 0)) == DImode)
1594 *total = COSTS_N_INSNS (40);
1596 *total = COSTS_N_INSNS (7);
1603 *total = COSTS_N_INSNS (33);
1611 /* Return the cost of an address rtx ADDR. */
1614 s390_address_cost (rtx addr)
1616 struct s390_address ad;
1617 if (!s390_decompose_address (addr, &ad))
1620 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1623 /* Return true if OP is a valid operand for the BRAS instruction.
1624 OP is the current operation.
1625 MODE is the current operation mode. */
1628 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1630 register enum rtx_code code = GET_CODE (op);
1632 /* Allow SYMBOL_REFs. */
1633 if (code == SYMBOL_REF)
1636 /* Allow @PLT stubs. */
1638 && GET_CODE (XEXP (op, 0)) == UNSPEC
1639 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1644 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1645 otherwise return 0. */
1648 tls_symbolic_operand (register rtx op)
1650 if (GET_CODE (op) != SYMBOL_REF)
1652 return SYMBOL_REF_TLS_MODEL (op);
1655 /* Return true if OP is a load multiple operation. It is known to be a
1656 PARALLEL and the first section will be tested.
1657 OP is the current operation.
1658 MODE is the current operation mode. */
1661 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1663 enum machine_mode elt_mode;
1664 int count = XVECLEN (op, 0);
1665 unsigned int dest_regno;
1670 /* Perform a quick check so we don't blow up below. */
1672 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1673 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1674 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1677 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1678 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1679 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1681 /* Check, is base, or base + displacement. */
1683 if (GET_CODE (src_addr) == REG)
1685 else if (GET_CODE (src_addr) == PLUS
1686 && GET_CODE (XEXP (src_addr, 0)) == REG
1687 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1689 off = INTVAL (XEXP (src_addr, 1));
1690 src_addr = XEXP (src_addr, 0);
1695 for (i = 1; i < count; i++)
1697 rtx elt = XVECEXP (op, 0, i);
1699 if (GET_CODE (elt) != SET
1700 || GET_CODE (SET_DEST (elt)) != REG
1701 || GET_MODE (SET_DEST (elt)) != elt_mode
1702 || REGNO (SET_DEST (elt)) != dest_regno + i
1703 || GET_CODE (SET_SRC (elt)) != MEM
1704 || GET_MODE (SET_SRC (elt)) != elt_mode
1705 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1706 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1707 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1708 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1709 != off + i * GET_MODE_SIZE (elt_mode))
1716 /* Return true if OP is a store multiple operation. It is known to be a
1717 PARALLEL and the first section will be tested.
1718 OP is the current operation.
1719 MODE is the current operation mode. */
1722 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1724 enum machine_mode elt_mode;
1725 int count = XVECLEN (op, 0);
1726 unsigned int src_regno;
1730 /* Perform a quick check so we don't blow up below. */
1732 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1733 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1734 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1737 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1738 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1739 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1741 /* Check, is base, or base + displacement. */
1743 if (GET_CODE (dest_addr) == REG)
1745 else if (GET_CODE (dest_addr) == PLUS
1746 && GET_CODE (XEXP (dest_addr, 0)) == REG
1747 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1749 off = INTVAL (XEXP (dest_addr, 1));
1750 dest_addr = XEXP (dest_addr, 0);
1755 for (i = 1; i < count; i++)
1757 rtx elt = XVECEXP (op, 0, i);
1759 if (GET_CODE (elt) != SET
1760 || GET_CODE (SET_SRC (elt)) != REG
1761 || GET_MODE (SET_SRC (elt)) != elt_mode
1762 || REGNO (SET_SRC (elt)) != src_regno + i
1763 || GET_CODE (SET_DEST (elt)) != MEM
1764 || GET_MODE (SET_DEST (elt)) != elt_mode
1765 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1766 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1767 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1768 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1769 != off + i * GET_MODE_SIZE (elt_mode))
1776 /* Return true if OP contains a symbol reference */
1779 symbolic_reference_mentioned_p (rtx op)
1781 register const char *fmt;
1784 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1787 fmt = GET_RTX_FORMAT (GET_CODE (op));
1788 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1794 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1795 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1799 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1806 /* Return true if OP contains a reference to a thread-local symbol. */
1809 tls_symbolic_reference_mentioned_p (rtx op)
1811 register const char *fmt;
1814 if (GET_CODE (op) == SYMBOL_REF)
1815 return tls_symbolic_operand (op);
1817 fmt = GET_RTX_FORMAT (GET_CODE (op));
1818 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1824 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1825 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1829 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1837 /* Return true if OP is a legitimate general operand when
1838 generating PIC code. It is given that flag_pic is on
1839 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1842 legitimate_pic_operand_p (register rtx op)
1844 /* Accept all non-symbolic constants. */
1845 if (!SYMBOLIC_CONST (op))
1848 /* Reject everything else; must be handled
1849 via emit_symbolic_move. */
1853 /* Returns true if the constant value OP is a legitimate general operand.
1854 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1857 legitimate_constant_p (register rtx op)
1859 /* Accept all non-symbolic constants. */
1860 if (!SYMBOLIC_CONST (op))
1863 /* Accept immediate LARL operands. */
1864 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1867 /* Thread-local symbols are never legal constants. This is
1868 so that emit_call knows that computing such addresses
1869 might require a function call. */
1870 if (TLS_SYMBOLIC_CONST (op))
1873 /* In the PIC case, symbolic constants must *not* be
1874 forced into the literal pool. We accept them here,
1875 so that they will be handled by emit_symbolic_move. */
1879 /* All remaining non-PIC symbolic constants are
1880 forced into the literal pool. */
1884 /* Determine if it's legal to put X into the constant pool. This
1885 is not possible if X contains the address of a symbol that is
1886 not constant (TLS) or not known at final link time (PIC). */
1889 s390_cannot_force_const_mem (rtx x)
1891 switch (GET_CODE (x))
1895 /* Accept all non-symbolic constants. */
1899 /* Labels are OK iff we are non-PIC. */
1900 return flag_pic != 0;
1903 /* 'Naked' TLS symbol references are never OK,
1904 non-TLS symbols are OK iff we are non-PIC. */
1905 if (tls_symbolic_operand (x))
1908 return flag_pic != 0;
1911 return s390_cannot_force_const_mem (XEXP (x, 0));
1914 return s390_cannot_force_const_mem (XEXP (x, 0))
1915 || s390_cannot_force_const_mem (XEXP (x, 1));
1918 switch (XINT (x, 1))
1920 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1921 case UNSPEC_LTREL_OFFSET:
1929 case UNSPEC_GOTNTPOFF:
1930 case UNSPEC_INDNTPOFF:
1943 /* Returns true if the constant value OP is a legitimate general
1944 operand during and after reload. The difference to
1945 legitimate_constant_p is that this function will not accept
1946 a constant that would need to be forced to the literal pool
1947 before it can be used as operand. */
1950 legitimate_reload_constant_p (register rtx op)
1952 /* Accept la(y) operands. */
1953 if (GET_CODE (op) == CONST_INT
1954 && DISP_IN_RANGE (INTVAL (op)))
1957 /* Accept l(g)hi operands. */
1958 if (GET_CODE (op) == CONST_INT
1959 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1962 /* Accept lliXX operands. */
1964 && s390_single_part (op, DImode, HImode, 0) >= 0)
1967 /* Accept larl operands. */
1968 if (TARGET_CPU_ZARCH
1969 && larl_operand (op, VOIDmode))
1972 /* Everything else cannot be handled without reload. */
1976 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1977 return the class of reg to actually use. */
1980 s390_preferred_reload_class (rtx op, enum reg_class class)
1982 /* This can happen if a floating point constant is being
1983 reloaded into an integer register. Leave well alone. */
1984 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1985 && class != FP_REGS)
1988 switch (GET_CODE (op))
1990 /* Constants we cannot reload must be forced into the
1995 if (legitimate_reload_constant_p (op))
2000 /* If a symbolic constant or a PLUS is reloaded,
2001 it is most likely being used as an address, so
2002 prefer ADDR_REGS. If 'class' is not a superset
2003 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
2008 if (reg_class_subset_p (ADDR_REGS, class))
2020 /* Return the register class of a scratch register needed to
2021 load IN into a register of class CLASS in MODE.
2023 We need a temporary when loading a PLUS expression which
2024 is not a legitimate operand of the LOAD ADDRESS instruction. */
2027 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
2028 enum machine_mode mode, rtx in)
2030 if (s390_plus_operand (in, mode))
2036 /* Return the register class of a scratch register needed to
2037 store a register of class CLASS in MODE into OUT:
2039 We need a temporary when storing a double-word to a
2040 non-offsettable memory address. */
2043 s390_secondary_output_reload_class (enum reg_class class,
2044 enum machine_mode mode, rtx out)
2046 if ((TARGET_64BIT ? mode == TImode
2047 : (mode == DImode || mode == DFmode))
2048 && reg_classes_intersect_p (GENERAL_REGS, class)
2049 && GET_CODE (out) == MEM
2050 && !offsettable_memref_p (out)
2051 && !s_operand (out, VOIDmode))
2057 /* Return true if OP is a PLUS that is not a legitimate
2058 operand for the LA instruction.
2059 OP is the current operation.
2060 MODE is the current operation mode. */
2063 s390_plus_operand (register rtx op, enum machine_mode mode)
2065 if (!check_mode (op, &mode) || mode != Pmode)
2068 if (GET_CODE (op) != PLUS)
2071 if (legitimate_la_operand_p (op))
2077 /* Generate code to load SRC, which is PLUS that is not a
2078 legitimate operand for the LA instruction, into TARGET.
2079 SCRATCH may be used as scratch register. */
2082 s390_expand_plus_operand (register rtx target, register rtx src,
2083 register rtx scratch)
2086 struct s390_address ad;
2088 /* src must be a PLUS; get its two operands. */
2089 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
2092 /* Check if any of the two operands is already scheduled
2093 for replacement by reload. This can happen e.g. when
2094 float registers occur in an address. */
2095 sum1 = find_replacement (&XEXP (src, 0));
2096 sum2 = find_replacement (&XEXP (src, 1));
2097 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2099 /* If the address is already strictly valid, there's nothing to do. */
2100 if (!s390_decompose_address (src, &ad)
2101 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2102 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
2104 /* Otherwise, one of the operands cannot be an address register;
2105 we reload its value into the scratch register. */
2106 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2108 emit_move_insn (scratch, sum1);
2111 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2113 emit_move_insn (scratch, sum2);
2117 /* According to the way these invalid addresses are generated
2118 in reload.c, it should never happen (at least on s390) that
2119 *neither* of the PLUS components, after find_replacements
2120 was applied, is an address register. */
2121 if (sum1 == scratch && sum2 == scratch)
2127 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2130 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2131 is only ever performed on addresses, so we can mark the
2132 sum as legitimate for LA in any case. */
2133 s390_load_address (target, src);
2137 /* Decompose a RTL expression ADDR for a memory address into
2138 its components, returned in OUT.
2140 Returns 0 if ADDR is not a valid memory address, nonzero
2141 otherwise. If OUT is NULL, don't return the components,
2142 but check for validity only.
2144 Note: Only addresses in canonical form are recognized.
2145 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2146 canonical form so that they will be recognized. */
2149 s390_decompose_address (register rtx addr, struct s390_address *out)
2151 HOST_WIDE_INT offset = 0;
2152 rtx base = NULL_RTX;
2153 rtx indx = NULL_RTX;
2154 rtx disp = NULL_RTX;
2156 int pointer = FALSE;
2157 int base_ptr = FALSE;
2158 int indx_ptr = FALSE;
2160 /* Decompose address into base + index + displacement. */
2162 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2165 else if (GET_CODE (addr) == PLUS)
2167 rtx op0 = XEXP (addr, 0);
2168 rtx op1 = XEXP (addr, 1);
2169 enum rtx_code code0 = GET_CODE (op0);
2170 enum rtx_code code1 = GET_CODE (op1);
2172 if (code0 == REG || code0 == UNSPEC)
2174 if (code1 == REG || code1 == UNSPEC)
2176 indx = op0; /* index + base */
2182 base = op0; /* base + displacement */
2187 else if (code0 == PLUS)
2189 indx = XEXP (op0, 0); /* index + base + disp */
2190 base = XEXP (op0, 1);
2201 disp = addr; /* displacement */
2203 /* Extract integer part of displacement. */
2207 if (GET_CODE (disp) == CONST_INT)
2209 offset = INTVAL (disp);
2212 else if (GET_CODE (disp) == CONST
2213 && GET_CODE (XEXP (disp, 0)) == PLUS
2214 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2216 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2217 disp = XEXP (XEXP (disp, 0), 0);
2221 /* Strip off CONST here to avoid special case tests later. */
2222 if (disp && GET_CODE (disp) == CONST)
2223 disp = XEXP (disp, 0);
2225 /* We can convert literal pool addresses to
2226 displacements by basing them off the base register. */
2227 if (disp && GET_CODE (disp) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (disp))
2229 /* Either base or index must be free to hold the base register. */
2231 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2233 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2237 /* Mark up the displacement. */
2238 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2239 UNSPEC_LTREL_OFFSET);
2242 /* Validate base register. */
2245 if (GET_CODE (base) == UNSPEC)
2246 switch (XINT (base, 1))
2250 disp = gen_rtx_UNSPEC (Pmode,
2251 gen_rtvec (1, XVECEXP (base, 0, 0)),
2252 UNSPEC_LTREL_OFFSET);
2256 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2259 case UNSPEC_LTREL_BASE:
2260 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2267 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2270 if (REGNO (base) == BASE_REGNUM
2271 || REGNO (base) == STACK_POINTER_REGNUM
2272 || REGNO (base) == FRAME_POINTER_REGNUM
2273 || ((reload_completed || reload_in_progress)
2274 && frame_pointer_needed
2275 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2276 || REGNO (base) == ARG_POINTER_REGNUM
2278 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2279 pointer = base_ptr = TRUE;
2282 /* Validate index register. */
2285 if (GET_CODE (indx) == UNSPEC)
2286 switch (XINT (indx, 1))
2290 disp = gen_rtx_UNSPEC (Pmode,
2291 gen_rtvec (1, XVECEXP (indx, 0, 0)),
2292 UNSPEC_LTREL_OFFSET);
2296 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2299 case UNSPEC_LTREL_BASE:
2300 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2307 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2310 if (REGNO (indx) == BASE_REGNUM
2311 || REGNO (indx) == STACK_POINTER_REGNUM
2312 || REGNO (indx) == FRAME_POINTER_REGNUM
2313 || ((reload_completed || reload_in_progress)
2314 && frame_pointer_needed
2315 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2316 || REGNO (indx) == ARG_POINTER_REGNUM
2318 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2319 pointer = indx_ptr = TRUE;
2322 /* Prefer to use pointer as base, not index. */
2323 if (base && indx && !base_ptr
2324 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2331 /* Validate displacement. */
2334 /* If the argument pointer or the return address pointer are involved,
2335 the displacement will change later anyway as the virtual registers get
2336 eliminated. This could make a valid displacement invalid, but it is
2337 more likely to make an invalid displacement valid, because we sometimes
2338 access the register save area via negative offsets to one of those
2340 Thus we don't check the displacement for validity here. If after
2341 elimination the displacement turns out to be invalid after all,
2342 this is fixed up by reload in any case. */
2343 if (base != arg_pointer_rtx
2344 && indx != arg_pointer_rtx
2345 && base != return_address_pointer_rtx
2346 && indx != return_address_pointer_rtx)
2347 if (!DISP_IN_RANGE (offset))
2352 /* All the special cases are pointers. */
2355 /* In the small-PIC case, the linker converts @GOT
2356 and @GOTNTPOFF offsets to possible displacements. */
2357 if (GET_CODE (disp) == UNSPEC
2358 && (XINT (disp, 1) == UNSPEC_GOT
2359 || XINT (disp, 1) == UNSPEC_GOTNTPOFF)
2366 /* Accept chunkified literal pool symbol references. */
2367 else if (GET_CODE (disp) == MINUS
2368 && GET_CODE (XEXP (disp, 0)) == LABEL_REF
2369 && GET_CODE (XEXP (disp, 1)) == LABEL_REF)
2374 /* Accept literal pool references. */
2375 else if (GET_CODE (disp) == UNSPEC
2376 && XINT (disp, 1) == UNSPEC_LTREL_OFFSET)
2378 orig_disp = gen_rtx_CONST (Pmode, disp);
2381 /* If we have an offset, make sure it does not
2382 exceed the size of the constant pool entry. */
2383 rtx sym = XVECEXP (disp, 0, 0);
2384 if (offset >= GET_MODE_SIZE (get_pool_mode (sym)))
2387 orig_disp = plus_constant (orig_disp, offset);
2402 out->disp = orig_disp;
2403 out->pointer = pointer;
2409 /* Return nonzero if ADDR is a valid memory address.
2410 STRICT specifies whether strict register checking applies. */
2413 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2414 register rtx addr, int strict)
2416 struct s390_address ad;
2417 if (!s390_decompose_address (addr, &ad))
2422 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2424 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2429 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2431 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2438 /* Return 1 if OP is a valid operand for the LA instruction.
2439 In 31-bit, we need to prove that the result is used as an
2440 address, as LA performs only a 31-bit addition. */
2443 legitimate_la_operand_p (register rtx op)
2445 struct s390_address addr;
2446 if (!s390_decompose_address (op, &addr))
2449 if (TARGET_64BIT || addr.pointer)
2455 /* Return 1 if OP is a valid operand for the LA instruction,
2456 and we prefer to use LA over addition to compute it. */
2459 preferred_la_operand_p (register rtx op)
2461 struct s390_address addr;
2462 if (!s390_decompose_address (op, &addr))
2465 if (!TARGET_64BIT && !addr.pointer)
2471 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2472 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2478 /* Emit a forced load-address operation to load SRC into DST.
2479 This will use the LOAD ADDRESS instruction even in situations
2480 where legitimate_la_operand_p (SRC) returns false. */
2483 s390_load_address (rtx dst, rtx src)
2486 emit_move_insn (dst, src);
2488 emit_insn (gen_force_la_31 (dst, src));
2491 /* Return a legitimate reference for ORIG (an address) using the
2492 register REG. If REG is 0, a new pseudo is generated.
2494 There are two types of references that must be handled:
2496 1. Global data references must load the address from the GOT, via
2497 the PIC reg. An insn is emitted to do this load, and the reg is
2500 2. Static data references, constant pool addresses, and code labels
2501 compute the address as an offset from the GOT, whose base is in
2502 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2503 differentiate them from global data objects. The returned
2504 address is the PIC reg + an unspec constant.
2506 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2507 reg also appears in the address. */
2510 legitimize_pic_address (rtx orig, rtx reg)
2516 if (GET_CODE (addr) == LABEL_REF
2517 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2519 /* This is a local symbol. */
2520 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2522 /* Access local symbols PC-relative via LARL.
2523 This is the same as in the non-PIC case, so it is
2524 handled automatically ... */
2528 /* Access local symbols relative to the GOT. */
2530 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2532 if (reload_in_progress || reload_completed)
2533 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2535 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2536 addr = gen_rtx_CONST (Pmode, addr);
2537 addr = force_const_mem (Pmode, addr);
2538 emit_move_insn (temp, addr);
2540 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2543 emit_move_insn (reg, new);
2548 else if (GET_CODE (addr) == SYMBOL_REF)
2551 reg = gen_reg_rtx (Pmode);
2555 /* Assume GOT offset < 4k. This is handled the same way
2556 in both 31- and 64-bit code (@GOT). */
2558 if (reload_in_progress || reload_completed)
2559 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2561 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2562 new = gen_rtx_CONST (Pmode, new);
2563 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2564 new = gen_rtx_MEM (Pmode, new);
2565 RTX_UNCHANGING_P (new) = 1;
2566 emit_move_insn (reg, new);
2569 else if (TARGET_CPU_ZARCH)
2571 /* If the GOT offset might be >= 4k, we determine the position
2572 of the GOT entry via a PC-relative LARL (@GOTENT). */
2574 rtx temp = gen_reg_rtx (Pmode);
2576 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2577 new = gen_rtx_CONST (Pmode, new);
2578 emit_move_insn (temp, new);
2580 new = gen_rtx_MEM (Pmode, temp);
2581 RTX_UNCHANGING_P (new) = 1;
2582 emit_move_insn (reg, new);
2587 /* If the GOT offset might be >= 4k, we have to load it
2588 from the literal pool (@GOT). */
2590 rtx temp = gen_reg_rtx (Pmode);
2592 if (reload_in_progress || reload_completed)
2593 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2595 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2596 addr = gen_rtx_CONST (Pmode, addr);
2597 addr = force_const_mem (Pmode, addr);
2598 emit_move_insn (temp, addr);
2600 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2601 new = gen_rtx_MEM (Pmode, new);
2602 RTX_UNCHANGING_P (new) = 1;
2603 emit_move_insn (reg, new);
2609 if (GET_CODE (addr) == CONST)
2611 addr = XEXP (addr, 0);
2612 if (GET_CODE (addr) == UNSPEC)
2614 if (XVECLEN (addr, 0) != 1)
2616 switch (XINT (addr, 1))
2618 /* If someone moved a GOT-relative UNSPEC
2619 out of the literal pool, force them back in. */
2622 new = force_const_mem (Pmode, orig);
2625 /* @GOT is OK as is if small. */
2628 new = force_const_mem (Pmode, orig);
2631 /* @GOTENT is OK as is. */
2635 /* @PLT is OK as is on 64-bit, must be converted to
2636 GOT-relative @PLTOFF on 31-bit. */
2638 if (!TARGET_CPU_ZARCH)
2640 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2642 if (reload_in_progress || reload_completed)
2643 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2645 addr = XVECEXP (addr, 0, 0);
2646 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2648 addr = gen_rtx_CONST (Pmode, addr);
2649 addr = force_const_mem (Pmode, addr);
2650 emit_move_insn (temp, addr);
2652 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2655 emit_move_insn (reg, new);
2661 /* Everything else cannot happen. */
2666 else if (GET_CODE (addr) != PLUS)
2669 if (GET_CODE (addr) == PLUS)
2671 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2672 /* Check first to see if this is a constant offset
2673 from a local symbol reference. */
2674 if ((GET_CODE (op0) == LABEL_REF
2675 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2676 && GET_CODE (op1) == CONST_INT)
2678 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2680 if (INTVAL (op1) & 1)
2682 /* LARL can't handle odd offsets, so emit a
2683 pair of LARL and LA. */
2684 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2686 if (!DISP_IN_RANGE (INTVAL (op1)))
2688 int even = INTVAL (op1) - 1;
2689 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2690 op0 = gen_rtx_CONST (Pmode, op0);
2694 emit_move_insn (temp, op0);
2695 new = gen_rtx_PLUS (Pmode, temp, op1);
2699 emit_move_insn (reg, new);
2705 /* If the offset is even, we can just use LARL.
2706 This will happen automatically. */
2711 /* Access local symbols relative to the GOT. */
2713 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2715 if (reload_in_progress || reload_completed)
2716 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2718 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2720 addr = gen_rtx_PLUS (Pmode, addr, op1);
2721 addr = gen_rtx_CONST (Pmode, addr);
2722 addr = force_const_mem (Pmode, addr);
2723 emit_move_insn (temp, addr);
2725 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2728 emit_move_insn (reg, new);
2734 /* Now, check whether it is a GOT relative symbol plus offset
2735 that was pulled out of the literal pool. Force it back in. */
2737 else if (GET_CODE (op0) == UNSPEC
2738 && GET_CODE (op1) == CONST_INT
2739 && XINT (op0, 1) == UNSPEC_GOTOFF)
2741 if (XVECLEN (op0, 0) != 1)
2744 new = force_const_mem (Pmode, orig);
2747 /* Otherwise, compute the sum. */
2750 base = legitimize_pic_address (XEXP (addr, 0), reg);
2751 new = legitimize_pic_address (XEXP (addr, 1),
2752 base == reg ? NULL_RTX : reg);
2753 if (GET_CODE (new) == CONST_INT)
2754 new = plus_constant (base, INTVAL (new));
2757 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2759 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2760 new = XEXP (new, 1);
2762 new = gen_rtx_PLUS (Pmode, base, new);
2765 if (GET_CODE (new) == CONST)
2766 new = XEXP (new, 0);
2767 new = force_operand (new, 0);
2774 /* Load the thread pointer into a register. */
2777 get_thread_pointer (void)
2781 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2782 tp = force_reg (Pmode, tp);
2783 mark_reg_pointer (tp, BITS_PER_WORD);
2788 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
2789 in s390_tls_symbol which always refers to __tls_get_offset.
2790 The returned offset is written to RESULT_REG and an USE rtx is
2791 generated for TLS_CALL. */
2793 static GTY(()) rtx s390_tls_symbol;
2796 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
2803 if (!s390_tls_symbol)
2804 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2806 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
2807 gen_rtx_REG (Pmode, RETURN_REGNUM));
2809 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
2810 CONST_OR_PURE_CALL_P (insn) = 1;
2813 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2814 this (thread-local) address. REG may be used as temporary. */
2817 legitimize_tls_address (rtx addr, rtx reg)
2819 rtx new, tls_call, temp, base, r2, insn;
2821 if (GET_CODE (addr) == SYMBOL_REF)
2822 switch (tls_symbolic_operand (addr))
2824 case TLS_MODEL_GLOBAL_DYNAMIC:
2826 r2 = gen_rtx_REG (Pmode, 2);
2827 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2828 new = gen_rtx_CONST (Pmode, tls_call);
2829 new = force_const_mem (Pmode, new);
2830 emit_move_insn (r2, new);
2831 s390_emit_tls_call_insn (r2, tls_call);
2832 insn = get_insns ();
2835 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2836 temp = gen_reg_rtx (Pmode);
2837 emit_libcall_block (insn, temp, r2, new);
2839 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2842 s390_load_address (reg, new);
2847 case TLS_MODEL_LOCAL_DYNAMIC:
2849 r2 = gen_rtx_REG (Pmode, 2);
2850 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2851 new = gen_rtx_CONST (Pmode, tls_call);
2852 new = force_const_mem (Pmode, new);
2853 emit_move_insn (r2, new);
2854 s390_emit_tls_call_insn (r2, tls_call);
2855 insn = get_insns ();
2858 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2859 temp = gen_reg_rtx (Pmode);
2860 emit_libcall_block (insn, temp, r2, new);
2862 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2863 base = gen_reg_rtx (Pmode);
2864 s390_load_address (base, new);
2866 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2867 new = gen_rtx_CONST (Pmode, new);
2868 new = force_const_mem (Pmode, new);
2869 temp = gen_reg_rtx (Pmode);
2870 emit_move_insn (temp, new);
2872 new = gen_rtx_PLUS (Pmode, base, temp);
2875 s390_load_address (reg, new);
2880 case TLS_MODEL_INITIAL_EXEC:
2883 /* Assume GOT offset < 4k. This is handled the same way
2884 in both 31- and 64-bit code. */
2886 if (reload_in_progress || reload_completed)
2887 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2889 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2890 new = gen_rtx_CONST (Pmode, new);
2891 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2892 new = gen_rtx_MEM (Pmode, new);
2893 RTX_UNCHANGING_P (new) = 1;
2894 temp = gen_reg_rtx (Pmode);
2895 emit_move_insn (temp, new);
2897 else if (TARGET_CPU_ZARCH)
2899 /* If the GOT offset might be >= 4k, we determine the position
2900 of the GOT entry via a PC-relative LARL. */
2902 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2903 new = gen_rtx_CONST (Pmode, new);
2904 temp = gen_reg_rtx (Pmode);
2905 emit_move_insn (temp, new);
2907 new = gen_rtx_MEM (Pmode, temp);
2908 RTX_UNCHANGING_P (new) = 1;
2909 temp = gen_reg_rtx (Pmode);
2910 emit_move_insn (temp, new);
2914 /* If the GOT offset might be >= 4k, we have to load it
2915 from the literal pool. */
2917 if (reload_in_progress || reload_completed)
2918 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2920 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2921 new = gen_rtx_CONST (Pmode, new);
2922 new = force_const_mem (Pmode, new);
2923 temp = gen_reg_rtx (Pmode);
2924 emit_move_insn (temp, new);
2926 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2927 new = gen_rtx_MEM (Pmode, new);
2928 RTX_UNCHANGING_P (new) = 1;
2930 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2931 temp = gen_reg_rtx (Pmode);
2932 emit_insn (gen_rtx_SET (Pmode, temp, new));
2936 /* In position-dependent code, load the absolute address of
2937 the GOT entry from the literal pool. */
2939 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2940 new = gen_rtx_CONST (Pmode, new);
2941 new = force_const_mem (Pmode, new);
2942 temp = gen_reg_rtx (Pmode);
2943 emit_move_insn (temp, new);
2946 new = gen_rtx_MEM (Pmode, new);
2947 RTX_UNCHANGING_P (new) = 1;
2949 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2950 temp = gen_reg_rtx (Pmode);
2951 emit_insn (gen_rtx_SET (Pmode, temp, new));
2954 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2957 s390_load_address (reg, new);
2962 case TLS_MODEL_LOCAL_EXEC:
2963 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2964 new = gen_rtx_CONST (Pmode, new);
2965 new = force_const_mem (Pmode, new);
2966 temp = gen_reg_rtx (Pmode);
2967 emit_move_insn (temp, new);
2969 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2972 s390_load_address (reg, new);
2981 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2983 switch (XINT (XEXP (addr, 0), 1))
2985 case UNSPEC_INDNTPOFF:
2986 if (TARGET_CPU_ZARCH)
2997 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
2998 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3000 new = XEXP (XEXP (addr, 0), 0);
3001 if (GET_CODE (new) != SYMBOL_REF)
3002 new = gen_rtx_CONST (Pmode, new);
3004 new = legitimize_tls_address (new, reg);
3005 new = plus_constant (new, INTVAL (XEXP (XEXP (addr, 0), 1)));
3006 new = force_operand (new, 0);
3010 abort (); /* for now ... */
3015 /* Emit insns to move operands[1] into operands[0]. */
3018 emit_symbolic_move (rtx *operands)
3020 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
3022 if (GET_CODE (operands[0]) == MEM)
3023 operands[1] = force_reg (Pmode, operands[1]);
3024 else if (TLS_SYMBOLIC_CONST (operands[1]))
3025 operands[1] = legitimize_tls_address (operands[1], temp);
3027 operands[1] = legitimize_pic_address (operands[1], temp);
3030 /* Try machine-dependent ways of modifying an illegitimate address X
3031 to be legitimate. If we find one, return the new, valid address.
3033 OLDX is the address as it was before break_out_memory_refs was called.
3034 In some cases it is useful to look at this to decide what needs to be done.
3036 MODE is the mode of the operand pointed to by X.
3038 When -fpic is used, special handling is needed for symbolic references.
3039 See comments by legitimize_pic_address for details. */
3042 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
3043 enum machine_mode mode ATTRIBUTE_UNUSED)
3045 rtx constant_term = const0_rtx;
3047 if (TLS_SYMBOLIC_CONST (x))
3049 x = legitimize_tls_address (x, 0);
3051 if (legitimate_address_p (mode, x, FALSE))
3056 if (SYMBOLIC_CONST (x)
3057 || (GET_CODE (x) == PLUS
3058 && (SYMBOLIC_CONST (XEXP (x, 0))
3059 || SYMBOLIC_CONST (XEXP (x, 1)))))
3060 x = legitimize_pic_address (x, 0);
3062 if (legitimate_address_p (mode, x, FALSE))
3066 x = eliminate_constant_term (x, &constant_term);
3068 /* Optimize loading of large displacements by splitting them
3069 into the multiple of 4K and the rest; this allows the
3070 former to be CSE'd if possible.
3072 Don't do this if the displacement is added to a register
3073 pointing into the stack frame, as the offsets will
3074 change later anyway. */
3076 if (GET_CODE (constant_term) == CONST_INT
3077 && !TARGET_LONG_DISPLACEMENT
3078 && !DISP_IN_RANGE (INTVAL (constant_term))
3079 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
3081 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
3082 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
3084 rtx temp = gen_reg_rtx (Pmode);
3085 rtx val = force_operand (GEN_INT (upper), temp);
3087 emit_move_insn (temp, val);
3089 x = gen_rtx_PLUS (Pmode, x, temp);
3090 constant_term = GEN_INT (lower);
3093 if (GET_CODE (x) == PLUS)
3095 if (GET_CODE (XEXP (x, 0)) == REG)
3097 register rtx temp = gen_reg_rtx (Pmode);
3098 register rtx val = force_operand (XEXP (x, 1), temp);
3100 emit_move_insn (temp, val);
3102 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
3105 else if (GET_CODE (XEXP (x, 1)) == REG)
3107 register rtx temp = gen_reg_rtx (Pmode);
3108 register rtx val = force_operand (XEXP (x, 0), temp);
3110 emit_move_insn (temp, val);
3112 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
3116 if (constant_term != const0_rtx)
3117 x = gen_rtx_PLUS (Pmode, x, constant_term);
3122 /* Emit code to move LEN bytes from DST to SRC. */
3125 s390_expand_movmem (rtx dst, rtx src, rtx len)
3127 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3129 if (INTVAL (len) > 0)
3130 emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
3133 else if (TARGET_MVCLE)
3135 emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
3140 rtx dst_addr, src_addr, count, blocks, temp;
3141 rtx loop_start_label = gen_label_rtx ();
3142 rtx loop_end_label = gen_label_rtx ();
3143 rtx end_label = gen_label_rtx ();
3144 enum machine_mode mode;
3146 mode = GET_MODE (len);
3147 if (mode == VOIDmode)
3150 dst_addr = gen_reg_rtx (Pmode);
3151 src_addr = gen_reg_rtx (Pmode);
3152 count = gen_reg_rtx (mode);
3153 blocks = gen_reg_rtx (mode);
3155 convert_move (count, len, 1);
3156 emit_cmp_and_jump_insns (count, const0_rtx,
3157 EQ, NULL_RTX, mode, 1, end_label);
3159 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3160 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3161 dst = change_address (dst, VOIDmode, dst_addr);
3162 src = change_address (src, VOIDmode, src_addr);
3164 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3166 emit_move_insn (count, temp);
3168 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3170 emit_move_insn (blocks, temp);
3172 emit_cmp_and_jump_insns (blocks, const0_rtx,
3173 EQ, NULL_RTX, mode, 1, loop_end_label);
3175 emit_label (loop_start_label);
3177 emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
3178 s390_load_address (dst_addr,
3179 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3180 s390_load_address (src_addr,
3181 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3183 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3185 emit_move_insn (blocks, temp);
3187 emit_cmp_and_jump_insns (blocks, const0_rtx,
3188 EQ, NULL_RTX, mode, 1, loop_end_label);
3190 emit_jump (loop_start_label);
3191 emit_label (loop_end_label);
3193 emit_insn (gen_movmem_short (dst, src,
3194 convert_to_mode (Pmode, count, 1)));
3195 emit_label (end_label);
3199 /* Emit code to clear LEN bytes at DST. */
3202 s390_expand_clrmem (rtx dst, rtx len)
3204 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3206 if (INTVAL (len) > 0)
3207 emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
3210 else if (TARGET_MVCLE)
3212 emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
3217 rtx dst_addr, src_addr, count, blocks, temp;
3218 rtx loop_start_label = gen_label_rtx ();
3219 rtx loop_end_label = gen_label_rtx ();
3220 rtx end_label = gen_label_rtx ();
3221 enum machine_mode mode;
3223 mode = GET_MODE (len);
3224 if (mode == VOIDmode)
3227 dst_addr = gen_reg_rtx (Pmode);
3228 src_addr = gen_reg_rtx (Pmode);
3229 count = gen_reg_rtx (mode);
3230 blocks = gen_reg_rtx (mode);
3232 convert_move (count, len, 1);
3233 emit_cmp_and_jump_insns (count, const0_rtx,
3234 EQ, NULL_RTX, mode, 1, end_label);
3236 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3237 dst = change_address (dst, VOIDmode, dst_addr);
3239 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3241 emit_move_insn (count, temp);
3243 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3245 emit_move_insn (blocks, temp);
3247 emit_cmp_and_jump_insns (blocks, const0_rtx,
3248 EQ, NULL_RTX, mode, 1, loop_end_label);
3250 emit_label (loop_start_label);
3252 emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
3253 s390_load_address (dst_addr,
3254 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3256 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3258 emit_move_insn (blocks, temp);
3260 emit_cmp_and_jump_insns (blocks, const0_rtx,
3261 EQ, NULL_RTX, mode, 1, loop_end_label);
3263 emit_jump (loop_start_label);
3264 emit_label (loop_end_label);
3266 emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
3267 emit_label (end_label);
3271 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3272 and return the result in TARGET. */
3275 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3277 rtx (*gen_result) (rtx) =
3278 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3280 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3282 if (INTVAL (len) > 0)
3284 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3285 emit_insn (gen_result (target));
3288 emit_move_insn (target, const0_rtx);
3291 else /* if (TARGET_MVCLE) */
3293 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3294 emit_insn (gen_result (target));
3298 /* Deactivate for now as profile code cannot cope with
3299 CC being live across basic block boundaries. */
3302 rtx addr0, addr1, count, blocks, temp;
3303 rtx loop_start_label = gen_label_rtx ();
3304 rtx loop_end_label = gen_label_rtx ();
3305 rtx end_label = gen_label_rtx ();
3306 enum machine_mode mode;
3308 mode = GET_MODE (len);
3309 if (mode == VOIDmode)
3312 addr0 = gen_reg_rtx (Pmode);
3313 addr1 = gen_reg_rtx (Pmode);
3314 count = gen_reg_rtx (mode);
3315 blocks = gen_reg_rtx (mode);
3317 convert_move (count, len, 1);
3318 emit_cmp_and_jump_insns (count, const0_rtx,
3319 EQ, NULL_RTX, mode, 1, end_label);
3321 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3322 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3323 op0 = change_address (op0, VOIDmode, addr0);
3324 op1 = change_address (op1, VOIDmode, addr1);
3326 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3328 emit_move_insn (count, temp);
3330 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3332 emit_move_insn (blocks, temp);
3334 emit_cmp_and_jump_insns (blocks, const0_rtx,
3335 EQ, NULL_RTX, mode, 1, loop_end_label);
3337 emit_label (loop_start_label);
3339 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3340 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3341 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3342 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3343 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3344 emit_jump_insn (temp);
3346 s390_load_address (addr0,
3347 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3348 s390_load_address (addr1,
3349 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3351 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3353 emit_move_insn (blocks, temp);
3355 emit_cmp_and_jump_insns (blocks, const0_rtx,
3356 EQ, NULL_RTX, mode, 1, loop_end_label);
3358 emit_jump (loop_start_label);
3359 emit_label (loop_end_label);
3361 emit_insn (gen_cmpmem_short (op0, op1,
3362 convert_to_mode (Pmode, count, 1)));
3363 emit_label (end_label);
3365 emit_insn (gen_result (target));
3371 /* Expand conditional increment or decrement using alc/slb instructions.
3372 Should generate code setting DST to either SRC or SRC + INCREMENT,
3373 depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
3374 Returns true if successful, false otherwise. */
3377 s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
3378 rtx dst, rtx src, rtx increment)
3380 enum machine_mode cmp_mode;
3381 enum machine_mode cc_mode;
3386 if ((GET_MODE (cmp_op0) == SImode || GET_MODE (cmp_op0) == VOIDmode)
3387 && (GET_MODE (cmp_op1) == SImode || GET_MODE (cmp_op1) == VOIDmode))
3389 else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
3390 && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
3395 /* Try ADD LOGICAL WITH CARRY. */
3396 if (increment == const1_rtx)
3398 /* Determine CC mode to use. */
3399 if (cmp_code == EQ || cmp_code == NE)
3401 if (cmp_op1 != const0_rtx)
3403 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3404 NULL_RTX, 0, OPTAB_WIDEN);
3405 cmp_op1 = const0_rtx;
3408 cmp_code = cmp_code == EQ ? LEU : GTU;
3411 if (cmp_code == LTU || cmp_code == LEU)
3416 cmp_code = swap_condition (cmp_code);
3433 /* Emit comparison instruction pattern. */
3434 if (!register_operand (cmp_op0, cmp_mode))
3435 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3437 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3438 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3439 /* We use insn_invalid_p here to add clobbers if required. */
3440 if (insn_invalid_p (emit_insn (insn)))
3443 /* Emit ALC instruction pattern. */
3444 op_res = gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3445 gen_rtx_REG (cc_mode, CC_REGNUM),
3448 if (src != const0_rtx)
3450 if (!register_operand (src, GET_MODE (dst)))
3451 src = force_reg (GET_MODE (dst), src);
3453 src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
3454 op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
3457 p = rtvec_alloc (2);
3459 gen_rtx_SET (VOIDmode, dst, op_res);
3461 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3462 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3467 /* Try SUBTRACT LOGICAL WITH BORROW. */
3468 if (increment == constm1_rtx)
3470 /* Determine CC mode to use. */
3471 if (cmp_code == EQ || cmp_code == NE)
3473 if (cmp_op1 != const0_rtx)
3475 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3476 NULL_RTX, 0, OPTAB_WIDEN);
3477 cmp_op1 = const0_rtx;
3480 cmp_code = cmp_code == EQ ? LEU : GTU;
3483 if (cmp_code == GTU || cmp_code == GEU)
3488 cmp_code = swap_condition (cmp_code);
3505 /* Emit comparison instruction pattern. */
3506 if (!register_operand (cmp_op0, cmp_mode))
3507 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3509 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3510 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3511 /* We use insn_invalid_p here to add clobbers if required. */
3512 if (insn_invalid_p (emit_insn (insn)))
3515 /* Emit SLB instruction pattern. */
3516 if (!register_operand (src, GET_MODE (dst)))
3517 src = force_reg (GET_MODE (dst), src);
3519 op_res = gen_rtx_MINUS (GET_MODE (dst),
3520 gen_rtx_MINUS (GET_MODE (dst), src, const0_rtx),
3521 gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3522 gen_rtx_REG (cc_mode, CC_REGNUM),
3524 p = rtvec_alloc (2);
3526 gen_rtx_SET (VOIDmode, dst, op_res);
3528 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3529 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3538 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3539 We need to emit DTP-relative relocations. */
3542 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3547 fputs ("\t.long\t", file);
3550 fputs ("\t.quad\t", file);
3555 output_addr_const (file, x);
3556 fputs ("@DTPOFF", file);
3559 /* In the name of slightly smaller debug output, and to cater to
3560 general assembler losage, recognize various UNSPEC sequences
3561 and turn them back into a direct symbol reference. */
3564 s390_delegitimize_address (rtx orig_x)
3568 if (GET_CODE (x) != MEM)
3572 if (GET_CODE (x) == PLUS
3573 && GET_CODE (XEXP (x, 1)) == CONST
3574 && GET_CODE (XEXP (x, 0)) == REG
3575 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3577 y = XEXP (XEXP (x, 1), 0);
3578 if (GET_CODE (y) == UNSPEC
3579 && XINT (y, 1) == UNSPEC_GOT)
3580 return XVECEXP (y, 0, 0);
3584 if (GET_CODE (x) == CONST)
3587 if (GET_CODE (y) == UNSPEC
3588 && XINT (y, 1) == UNSPEC_GOTENT)
3589 return XVECEXP (y, 0, 0);
3596 /* Output shift count operand OP to stdio stream FILE. */
3599 print_shift_count_operand (FILE *file, rtx op)
3601 HOST_WIDE_INT offset = 0;
3603 /* We can have an integer constant, an address register,
3604 or a sum of the two. */
3605 if (GET_CODE (op) == CONST_INT)
3607 offset = INTVAL (op);
3610 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3612 offset = INTVAL (XEXP (op, 1));
3615 while (op && GET_CODE (op) == SUBREG)
3616 op = SUBREG_REG (op);
3619 if (op && (GET_CODE (op) != REG
3620 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3621 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3624 /* Shift counts are truncated to the low six bits anyway. */
3625 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3627 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3630 /* Locate some local-dynamic symbol still in use by this function
3631 so that we can print its name in local-dynamic base patterns. */
3634 get_some_local_dynamic_name (void)
3638 if (cfun->machine->some_ld_name)
3639 return cfun->machine->some_ld_name;
3641 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3643 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3644 return cfun->machine->some_ld_name;
3650 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3654 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3656 x = get_pool_constant (x);
3657 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3660 if (GET_CODE (x) == SYMBOL_REF
3661 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3663 cfun->machine->some_ld_name = XSTR (x, 0);
3670 /* Output machine-dependent UNSPECs occurring in address constant X
3671 in assembler syntax to stdio stream FILE. Returns true if the
3672 constant X could be recognized, false otherwise. */
3675 s390_output_addr_const_extra (FILE *file, rtx x)
3677 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
3678 switch (XINT (x, 1))
3681 output_addr_const (file, XVECEXP (x, 0, 0));
3682 fprintf (file, "@GOTENT");
3685 output_addr_const (file, XVECEXP (x, 0, 0));
3686 fprintf (file, "@GOT");
3689 output_addr_const (file, XVECEXP (x, 0, 0));
3690 fprintf (file, "@GOTOFF");
3693 output_addr_const (file, XVECEXP (x, 0, 0));
3694 fprintf (file, "@PLT");
3697 output_addr_const (file, XVECEXP (x, 0, 0));
3698 fprintf (file, "@PLTOFF");
3701 output_addr_const (file, XVECEXP (x, 0, 0));
3702 fprintf (file, "@TLSGD");
3705 assemble_name (file, get_some_local_dynamic_name ());
3706 fprintf (file, "@TLSLDM");
3709 output_addr_const (file, XVECEXP (x, 0, 0));
3710 fprintf (file, "@DTPOFF");
3713 output_addr_const (file, XVECEXP (x, 0, 0));
3714 fprintf (file, "@NTPOFF");
3716 case UNSPEC_GOTNTPOFF:
3717 output_addr_const (file, XVECEXP (x, 0, 0));
3718 fprintf (file, "@GOTNTPOFF");
3720 case UNSPEC_INDNTPOFF:
3721 output_addr_const (file, XVECEXP (x, 0, 0));
3722 fprintf (file, "@INDNTPOFF");
3729 /* Output address operand ADDR in assembler syntax to
3730 stdio stream FILE. */
3733 print_operand_address (FILE *file, rtx addr)
3735 struct s390_address ad;
3737 if (!s390_decompose_address (addr, &ad)
3738 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3739 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3740 output_operand_lossage ("Cannot decompose address.");
3743 output_addr_const (file, ad.disp);
3745 fprintf (file, "0");
3747 if (ad.base && ad.indx)
3748 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3749 reg_names[REGNO (ad.base)]);
3751 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3754 /* Output operand X in assembler syntax to stdio stream FILE.
3755 CODE specified the format flag. The following format flags
3758 'C': print opcode suffix for branch condition.
3759 'D': print opcode suffix for inverse branch condition.
3760 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3761 'O': print only the displacement of a memory reference.
3762 'R': print only the base register of a memory reference.
3763 'N': print the second word of a DImode operand.
3764 'M': print the second word of a TImode operand.
3765 'Y': print shift count operand.
3767 'b': print integer X as if it's an unsigned byte.
3768 'x': print integer X as if it's an unsigned word.
3769 'h': print integer X as if it's a signed word.
3770 'i': print the first nonzero HImode part of X.
3771 'j': print the first HImode part unequal to 0xffff of X. */
3774 print_operand (FILE *file, rtx x, int code)
3779 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3783 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3787 if (GET_CODE (x) == SYMBOL_REF)
3789 fprintf (file, "%s", ":tls_load:");
3790 output_addr_const (file, x);
3792 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3794 fprintf (file, "%s", ":tls_gdcall:");
3795 output_addr_const (file, XVECEXP (x, 0, 0));
3797 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3799 fprintf (file, "%s", ":tls_ldcall:");
3800 assemble_name (file, get_some_local_dynamic_name ());
3808 struct s390_address ad;
3810 if (GET_CODE (x) != MEM
3811 || !s390_decompose_address (XEXP (x, 0), &ad)
3812 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3817 output_addr_const (file, ad.disp);
3819 fprintf (file, "0");
3825 struct s390_address ad;
3827 if (GET_CODE (x) != MEM
3828 || !s390_decompose_address (XEXP (x, 0), &ad)
3829 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3834 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3836 fprintf (file, "0");
3841 if (GET_CODE (x) == REG)
3842 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3843 else if (GET_CODE (x) == MEM)
3844 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3850 if (GET_CODE (x) == REG)
3851 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3852 else if (GET_CODE (x) == MEM)
3853 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3859 print_shift_count_operand (file, x);
3863 switch (GET_CODE (x))
3866 fprintf (file, "%s", reg_names[REGNO (x)]);
3870 output_address (XEXP (x, 0));
3877 output_addr_const (file, x);
3882 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3883 else if (code == 'x')
3884 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3885 else if (code == 'h')
3886 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3887 else if (code == 'i')
3888 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3889 s390_extract_part (x, HImode, 0));
3890 else if (code == 'j')
3891 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3892 s390_extract_part (x, HImode, -1));
3894 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3898 if (GET_MODE (x) != VOIDmode)
3901 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3902 else if (code == 'x')
3903 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3904 else if (code == 'h')
3905 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3911 fatal_insn ("UNKNOWN in print_operand !?", x);
3916 /* Target hook for assembling integer objects. We need to define it
3917 here to work a round a bug in some versions of GAS, which couldn't
3918 handle values smaller than INT_MIN when printed in decimal. */
3921 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3923 if (size == 8 && aligned_p
3924 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3926 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3930 return default_assemble_integer (x, size, aligned_p);
3933 /* Returns true if register REGNO is used for forming
3934 a memory address in expression X. */
3937 reg_used_in_mem_p (int regno, rtx x)
3939 enum rtx_code code = GET_CODE (x);
3945 if (refers_to_regno_p (regno, regno+1,
3949 else if (code == SET
3950 && GET_CODE (SET_DEST (x)) == PC)
3952 if (refers_to_regno_p (regno, regno+1,
3957 fmt = GET_RTX_FORMAT (code);
3958 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3961 && reg_used_in_mem_p (regno, XEXP (x, i)))
3964 else if (fmt[i] == 'E')
3965 for (j = 0; j < XVECLEN (x, i); j++)
3966 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3972 /* Returns true if expression DEP_RTX sets an address register
3973 used by instruction INSN to address memory. */
3976 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3980 if (GET_CODE (dep_rtx) == INSN)
3981 dep_rtx = PATTERN (dep_rtx);
3983 if (GET_CODE (dep_rtx) == SET)
3985 target = SET_DEST (dep_rtx);
3986 if (GET_CODE (target) == STRICT_LOW_PART)
3987 target = XEXP (target, 0);
3988 while (GET_CODE (target) == SUBREG)
3989 target = SUBREG_REG (target);
3991 if (GET_CODE (target) == REG)
3993 int regno = REGNO (target);
3995 if (s390_safe_attr_type (insn) == TYPE_LA)
3997 pat = PATTERN (insn);
3998 if (GET_CODE (pat) == PARALLEL)
4000 if (XVECLEN (pat, 0) != 2)
4002 pat = XVECEXP (pat, 0, 0);
4004 if (GET_CODE (pat) == SET)
4005 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
4009 else if (get_attr_atype (insn) == ATYPE_AGEN)
4010 return reg_used_in_mem_p (regno, PATTERN (insn));
4016 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
4019 s390_agen_dep_p (rtx dep_insn, rtx insn)
4021 rtx dep_rtx = PATTERN (dep_insn);
4024 if (GET_CODE (dep_rtx) == SET
4025 && addr_generation_dependency_p (dep_rtx, insn))
4027 else if (GET_CODE (dep_rtx) == PARALLEL)
4029 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
4031 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
4038 /* Return the modified cost of the dependency of instruction INSN
4039 on instruction DEP_INSN through the link LINK. COST is the
4040 default cost of that dependency.
4042 Data dependencies are all handled without delay. However, if a
4043 register is modified and subsequently used as base or index
4044 register of a memory reference, at least 4 cycles need to pass
4045 between setting and using the register to avoid pipeline stalls.
4046 An exception is the LA instruction. An address generated by LA can
4047 be used by introducing only a one cycle stall on the pipeline. */
4050 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
4052 /* If the dependence is an anti-dependence, there is no cost. For an
4053 output dependence, there is sometimes a cost, but it doesn't seem
4054 worth handling those few cases. */
4056 if (REG_NOTE_KIND (link) != 0)
4059 /* If we can't recognize the insns, we can't really do anything. */
4060 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
4063 /* Operand forward in case of lr, load and la. */
4064 if (s390_tune == PROCESSOR_2084_Z990
4066 && (s390_safe_attr_type (dep_insn) == TYPE_LA
4067 || s390_safe_attr_type (dep_insn) == TYPE_LR
4068 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
4073 /* A C statement (sans semicolon) to update the integer scheduling priority
4074 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
4075 reduce the priority to execute INSN later. Do not define this macro if
4076 you do not need to adjust the scheduling priorities of insns.
4078 A STD instruction should be scheduled earlier,
4079 in order to use the bypass. */
4082 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
4084 if (! INSN_P (insn))
4087 if (s390_tune != PROCESSOR_2084_Z990)
4090 switch (s390_safe_attr_type (insn))
4094 priority = priority << 3;
4097 priority = priority << 1;
4105 /* The number of instructions that can be issued per cycle. */
4108 s390_issue_rate (void)
4110 if (s390_tune == PROCESSOR_2084_Z990)
4116 s390_first_cycle_multipass_dfa_lookahead (void)
4122 /* Split all branches that exceed the maximum distance.
4123 Returns true if this created a new literal pool entry. */
4126 s390_split_branches (void)
4128 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
4129 int new_literal = 0;
4130 rtx insn, pat, tmp, target;
4133 /* We need correct insn addresses. */
4135 shorten_branches (get_insns ());
4137 /* Find all branches that exceed 64KB, and split them. */
4139 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4141 if (GET_CODE (insn) != JUMP_INSN)
4144 pat = PATTERN (insn);
4145 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4146 pat = XVECEXP (pat, 0, 0);
4147 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
4150 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
4152 label = &SET_SRC (pat);
4154 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
4156 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
4157 label = &XEXP (SET_SRC (pat), 1);
4158 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
4159 label = &XEXP (SET_SRC (pat), 2);
4166 if (get_attr_length (insn) <= 4)
4169 /* We are going to use the return register as scratch register,
4170 make sure it will be saved/restored by the prologue/epilogue. */
4171 cfun->machine->save_return_addr_p = 1;
4176 tmp = force_const_mem (Pmode, *label);
4177 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
4178 INSN_ADDRESSES_NEW (tmp, -1);
4179 annotate_constant_pool_refs (&PATTERN (tmp));
4186 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
4187 UNSPEC_LTREL_OFFSET);
4188 target = gen_rtx_CONST (Pmode, target);
4189 target = force_const_mem (Pmode, target);
4190 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
4191 INSN_ADDRESSES_NEW (tmp, -1);
4192 annotate_constant_pool_refs (&PATTERN (tmp));
4194 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XEXP (target, 0),
4195 cfun->machine->base_reg),
4197 target = gen_rtx_PLUS (Pmode, temp_reg, target);
4200 if (!validate_change (insn, label, target, 0))
4207 /* Annotate every literal pool reference in X by an UNSPEC_LTREF expression.
4208 Fix up MEMs as required. */
4211 annotate_constant_pool_refs (rtx *x)
4216 if (GET_CODE (*x) == SYMBOL_REF
4217 && CONSTANT_POOL_ADDRESS_P (*x))
4220 /* Literal pool references can only occur inside a MEM ... */
4221 if (GET_CODE (*x) == MEM)
4223 rtx memref = XEXP (*x, 0);
4225 if (GET_CODE (memref) == SYMBOL_REF
4226 && CONSTANT_POOL_ADDRESS_P (memref))
4228 rtx base = cfun->machine->base_reg;
4229 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, memref, base),
4232 *x = replace_equiv_address (*x, addr);
4236 if (GET_CODE (memref) == CONST
4237 && GET_CODE (XEXP (memref, 0)) == PLUS
4238 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4239 && GET_CODE (XEXP (XEXP (memref, 0), 0)) == SYMBOL_REF
4240 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (memref, 0), 0)))
4242 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4243 rtx sym = XEXP (XEXP (memref, 0), 0);
4244 rtx base = cfun->machine->base_reg;
4245 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4248 *x = replace_equiv_address (*x, plus_constant (addr, off));
4253 /* ... or a load-address type pattern. */
4254 if (GET_CODE (*x) == SET)
4256 rtx addrref = SET_SRC (*x);
4258 if (GET_CODE (addrref) == SYMBOL_REF
4259 && CONSTANT_POOL_ADDRESS_P (addrref))
4261 rtx base = cfun->machine->base_reg;
4262 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, addrref, base),
4265 SET_SRC (*x) = addr;
4269 if (GET_CODE (addrref) == CONST
4270 && GET_CODE (XEXP (addrref, 0)) == PLUS
4271 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4272 && GET_CODE (XEXP (XEXP (addrref, 0), 0)) == SYMBOL_REF
4273 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addrref, 0), 0)))
4275 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4276 rtx sym = XEXP (XEXP (addrref, 0), 0);
4277 rtx base = cfun->machine->base_reg;
4278 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4281 SET_SRC (*x) = plus_constant (addr, off);
4286 /* Annotate LTREL_BASE as well. */
4287 if (GET_CODE (*x) == UNSPEC
4288 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4290 rtx base = cfun->machine->base_reg;
4291 *x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XVECEXP (*x, 0, 0), base),
4296 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4297 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4301 annotate_constant_pool_refs (&XEXP (*x, i));
4303 else if (fmt[i] == 'E')
4305 for (j = 0; j < XVECLEN (*x, i); j++)
4306 annotate_constant_pool_refs (&XVECEXP (*x, i, j));
4312 /* Find an annotated literal pool symbol referenced in RTX X,
4313 and store it at REF. Will abort if X contains references to
4314 more than one such pool symbol; multiple references to the same
4315 symbol are allowed, however.
4317 The rtx pointed to by REF must be initialized to NULL_RTX
4318 by the caller before calling this routine. */
4321 find_constant_pool_ref (rtx x, rtx *ref)
4326 /* Ignore LTREL_BASE references. */
4327 if (GET_CODE (x) == UNSPEC
4328 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4330 /* Likewise POOL_ENTRY insns. */
4331 if (GET_CODE (x) == UNSPEC_VOLATILE
4332 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
4335 if (GET_CODE (x) == SYMBOL_REF
4336 && CONSTANT_POOL_ADDRESS_P (x))
4339 if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_LTREF)
4341 rtx sym = XVECEXP (x, 0, 0);
4342 if (GET_CODE (sym) != SYMBOL_REF
4343 || !CONSTANT_POOL_ADDRESS_P (sym))
4346 if (*ref == NULL_RTX)
4348 else if (*ref != sym)
4354 fmt = GET_RTX_FORMAT (GET_CODE (x));
4355 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4359 find_constant_pool_ref (XEXP (x, i), ref);
4361 else if (fmt[i] == 'E')
4363 for (j = 0; j < XVECLEN (x, i); j++)
4364 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4369 /* Replace every reference to the annotated literal pool
4370 symbol REF in X by its base plus OFFSET. */
4373 replace_constant_pool_ref (rtx *x, rtx ref, rtx offset)
4381 if (GET_CODE (*x) == UNSPEC
4382 && XINT (*x, 1) == UNSPEC_LTREF
4383 && XVECEXP (*x, 0, 0) == ref)
4385 *x = gen_rtx_PLUS (Pmode, XVECEXP (*x, 0, 1), offset);
4389 if (GET_CODE (*x) == PLUS
4390 && GET_CODE (XEXP (*x, 1)) == CONST_INT
4391 && GET_CODE (XEXP (*x, 0)) == UNSPEC
4392 && XINT (XEXP (*x, 0), 1) == UNSPEC_LTREF
4393 && XVECEXP (XEXP (*x, 0), 0, 0) == ref)
4395 rtx addr = gen_rtx_PLUS (Pmode, XVECEXP (XEXP (*x, 0), 0, 1), offset);
4396 *x = plus_constant (addr, INTVAL (XEXP (*x, 1)));
4400 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4401 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4405 replace_constant_pool_ref (&XEXP (*x, i), ref, offset);
4407 else if (fmt[i] == 'E')
4409 for (j = 0; j < XVECLEN (*x, i); j++)
4410 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, offset);
4415 /* Check whether X contains an UNSPEC_LTREL_BASE.
4416 Return its constant pool symbol if found, NULL_RTX otherwise. */
4419 find_ltrel_base (rtx x)
4424 if (GET_CODE (x) == UNSPEC
4425 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4426 return XVECEXP (x, 0, 0);
4428 fmt = GET_RTX_FORMAT (GET_CODE (x));
4429 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4433 rtx fnd = find_ltrel_base (XEXP (x, i));
4437 else if (fmt[i] == 'E')
4439 for (j = 0; j < XVECLEN (x, i); j++)
4441 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4451 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with its base. */
4454 replace_ltrel_base (rtx *x)
4459 if (GET_CODE (*x) == UNSPEC
4460 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4462 *x = XVECEXP (*x, 0, 1);
4466 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4467 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4471 replace_ltrel_base (&XEXP (*x, i));
4473 else if (fmt[i] == 'E')
4475 for (j = 0; j < XVECLEN (*x, i); j++)
4476 replace_ltrel_base (&XVECEXP (*x, i, j));
4482 /* We keep a list of constants which we have to add to internal
4483 constant tables in the middle of large functions. */
4485 #define NR_C_MODES 7
4486 enum machine_mode constant_modes[NR_C_MODES] =
4497 struct constant *next;
4502 struct constant_pool
4504 struct constant_pool *next;
4509 struct constant *constants[NR_C_MODES];
4514 static struct constant_pool * s390_mainpool_start (void);
4515 static void s390_mainpool_finish (struct constant_pool *);
4516 static void s390_mainpool_cancel (struct constant_pool *);
4518 static struct constant_pool * s390_chunkify_start (void);
4519 static void s390_chunkify_finish (struct constant_pool *);
4520 static void s390_chunkify_cancel (struct constant_pool *);
4522 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4523 static void s390_end_pool (struct constant_pool *, rtx);
4524 static void s390_add_pool_insn (struct constant_pool *, rtx);
4525 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4526 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4527 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4528 static rtx s390_dump_pool (struct constant_pool *, bool);
4529 static struct constant_pool *s390_alloc_pool (void);
4530 static void s390_free_pool (struct constant_pool *);
4532 /* Create new constant pool covering instructions starting at INSN
4533 and chain it to the end of POOL_LIST. */
4535 static struct constant_pool *
4536 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4538 struct constant_pool *pool, **prev;
4540 pool = s390_alloc_pool ();
4541 pool->first_insn = insn;
4543 for (prev = pool_list; *prev; prev = &(*prev)->next)
4550 /* End range of instructions covered by POOL at INSN and emit
4551 placeholder insn representing the pool. */
4554 s390_end_pool (struct constant_pool *pool, rtx insn)
4556 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4559 insn = get_last_insn ();
4561 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4562 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4565 /* Add INSN to the list of insns covered by POOL. */
4568 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4570 bitmap_set_bit (pool->insns, INSN_UID (insn));
4573 /* Return pool out of POOL_LIST that covers INSN. */
4575 static struct constant_pool *
4576 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4578 struct constant_pool *pool;
4580 for (pool = pool_list; pool; pool = pool->next)
4581 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4587 /* Add constant VAL of mode MODE to the constant pool POOL. */
4590 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4595 for (i = 0; i < NR_C_MODES; i++)
4596 if (constant_modes[i] == mode)
4598 if (i == NR_C_MODES)
4601 for (c = pool->constants[i]; c != NULL; c = c->next)
4602 if (rtx_equal_p (val, c->value))
4607 c = (struct constant *) xmalloc (sizeof *c);
4609 c->label = gen_label_rtx ();
4610 c->next = pool->constants[i];
4611 pool->constants[i] = c;
4612 pool->size += GET_MODE_SIZE (mode);
4616 /* Find constant VAL of mode MODE in the constant pool POOL.
4617 Return an RTX describing the distance from the start of
4618 the pool to the location of the new constant. */
4621 s390_find_constant (struct constant_pool *pool, rtx val,
4622 enum machine_mode mode)
4628 for (i = 0; i < NR_C_MODES; i++)
4629 if (constant_modes[i] == mode)
4631 if (i == NR_C_MODES)
4634 for (c = pool->constants[i]; c != NULL; c = c->next)
4635 if (rtx_equal_p (val, c->value))
4641 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4642 gen_rtx_LABEL_REF (Pmode, pool->label));
4643 offset = gen_rtx_CONST (Pmode, offset);
4647 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4648 do not emit the pool base label. */
4651 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4657 /* Pool start insn switches to proper section
4658 and guarantees necessary alignment. */
4659 if (TARGET_CPU_ZARCH)
4660 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4662 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4663 INSN_ADDRESSES_NEW (insn, -1);
4667 insn = emit_label_after (pool->label, insn);
4668 INSN_ADDRESSES_NEW (insn, -1);
4671 /* Dump constants in descending alignment requirement order,
4672 ensuring proper alignment for every constant. */
4673 for (i = 0; i < NR_C_MODES; i++)
4674 for (c = pool->constants[i]; c; c = c->next)
4676 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4677 rtx value = c->value;
4678 if (GET_CODE (value) == CONST
4679 && GET_CODE (XEXP (value, 0)) == UNSPEC
4680 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4681 && XVECLEN (XEXP (value, 0), 0) == 1)
4683 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4684 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4685 value = gen_rtx_CONST (VOIDmode, value);
4688 insn = emit_label_after (c->label, insn);
4689 INSN_ADDRESSES_NEW (insn, -1);
4691 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4692 gen_rtvec (1, value),
4693 UNSPECV_POOL_ENTRY);
4694 insn = emit_insn_after (value, insn);
4695 INSN_ADDRESSES_NEW (insn, -1);
4698 /* Pool end insn switches back to previous section
4699 and guarantees necessary alignment. */
4700 if (TARGET_CPU_ZARCH)
4701 insn = emit_insn_after (gen_pool_end_64 (), insn);
4703 insn = emit_insn_after (gen_pool_end_31 (), insn);
4704 INSN_ADDRESSES_NEW (insn, -1);
4706 insn = emit_barrier_after (insn);
4707 INSN_ADDRESSES_NEW (insn, -1);
4709 /* Remove placeholder insn. */
4710 remove_insn (pool->pool_insn);
4715 /* Allocate new constant_pool structure. */
4717 static struct constant_pool *
4718 s390_alloc_pool (void)
4720 struct constant_pool *pool;
4723 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4725 for (i = 0; i < NR_C_MODES; i++)
4726 pool->constants[i] = NULL;
4728 pool->label = gen_label_rtx ();
4729 pool->first_insn = NULL_RTX;
4730 pool->pool_insn = NULL_RTX;
4731 pool->insns = BITMAP_XMALLOC ();
4737 /* Free all memory used by POOL. */
4740 s390_free_pool (struct constant_pool *pool)
4744 for (i = 0; i < NR_C_MODES; i++)
4746 struct constant *c = pool->constants[i];
4749 struct constant *next = c->next;
4755 BITMAP_XFREE (pool->insns);
4760 /* Collect main literal pool. Return NULL on overflow. */
4762 static struct constant_pool *
4763 s390_mainpool_start (void)
4765 struct constant_pool *pool;
4768 pool = s390_alloc_pool ();
4770 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4772 if (GET_CODE (insn) == INSN
4773 && GET_CODE (PATTERN (insn)) == SET
4774 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC_VOLATILE
4775 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPECV_MAIN_POOL)
4777 if (pool->pool_insn)
4779 pool->pool_insn = insn;
4782 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4784 rtx pool_ref = NULL_RTX;
4785 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4788 rtx constant = get_pool_constant (pool_ref);
4789 enum machine_mode mode = get_pool_mode (pool_ref);
4790 s390_add_constant (pool, constant, mode);
4795 if (!pool->pool_insn)
4798 if (pool->size >= 4096)
4800 /* We're going to chunkify the pool, so remove the main
4801 pool placeholder insn. */
4802 remove_insn (pool->pool_insn);
4804 s390_free_pool (pool);
4811 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4812 Modify the current function to output the pool constants as well as
4813 the pool register setup instruction. */
4816 s390_mainpool_finish (struct constant_pool *pool)
4818 rtx base_reg = SET_DEST (PATTERN (pool->pool_insn));
4821 /* If the pool is empty, we're done. */
4822 if (pool->size == 0)
4824 remove_insn (pool->pool_insn);
4825 s390_free_pool (pool);
4829 /* We need correct insn addresses. */
4830 shorten_branches (get_insns ());
4832 /* On zSeries, we use a LARL to load the pool register. The pool is
4833 located in the .rodata section, so we emit it after the function. */
4834 if (TARGET_CPU_ZARCH)
4836 insn = gen_main_base_64 (base_reg, pool->label);
4837 insn = emit_insn_after (insn, pool->pool_insn);
4838 INSN_ADDRESSES_NEW (insn, -1);
4839 remove_insn (pool->pool_insn);
4841 insn = get_last_insn ();
4842 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4843 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4845 s390_dump_pool (pool, 0);
4848 /* On S/390, if the total size of the function's code plus literal pool
4849 does not exceed 4096 bytes, we use BASR to set up a function base
4850 pointer, and emit the literal pool at the end of the function. */
4851 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4852 + pool->size + 8 /* alignment slop */ < 4096)
4854 insn = gen_main_base_31_small (base_reg, pool->label);
4855 insn = emit_insn_after (insn, pool->pool_insn);
4856 INSN_ADDRESSES_NEW (insn, -1);
4857 remove_insn (pool->pool_insn);
4859 insn = emit_label_after (pool->label, insn);
4860 INSN_ADDRESSES_NEW (insn, -1);
4862 insn = get_last_insn ();
4863 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4864 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4866 s390_dump_pool (pool, 1);
4869 /* Otherwise, we emit an inline literal pool and use BASR to branch
4870 over it, setting up the pool register at the same time. */
4873 rtx pool_end = gen_label_rtx ();
4875 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4876 insn = emit_insn_after (insn, pool->pool_insn);
4877 INSN_ADDRESSES_NEW (insn, -1);
4878 remove_insn (pool->pool_insn);
4880 insn = emit_label_after (pool->label, insn);
4881 INSN_ADDRESSES_NEW (insn, -1);
4883 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4884 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4886 insn = emit_label_after (pool_end, pool->pool_insn);
4887 INSN_ADDRESSES_NEW (insn, -1);
4889 s390_dump_pool (pool, 1);
4893 /* Replace all literal pool references. */
4895 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4898 replace_ltrel_base (&PATTERN (insn));
4900 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4902 rtx addr, pool_ref = NULL_RTX;
4903 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4906 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4907 get_pool_mode (pool_ref));
4908 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4909 INSN_CODE (insn) = -1;
4915 /* Free the pool. */
4916 s390_free_pool (pool);
4919 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4920 We have decided we cannot use this pool, so revert all changes
4921 to the current function that were done by s390_mainpool_start. */
4923 s390_mainpool_cancel (struct constant_pool *pool)
4925 /* We didn't actually change the instruction stream, so simply
4926 free the pool memory. */
4927 s390_free_pool (pool);
4931 /* Chunkify the literal pool. */
4933 #define S390_POOL_CHUNK_MIN 0xc00
4934 #define S390_POOL_CHUNK_MAX 0xe00
4936 static struct constant_pool *
4937 s390_chunkify_start (void)
4939 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4942 rtx pending_ltrel = NULL_RTX;
4945 rtx (*gen_reload_base) (rtx, rtx) =
4946 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4949 /* We need correct insn addresses. */
4951 shorten_branches (get_insns ());
4953 /* Scan all insns and move literals to pool chunks. */
4955 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4957 /* Check for pending LTREL_BASE. */
4960 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4963 if (ltrel_base == pending_ltrel)
4964 pending_ltrel = NULL_RTX;
4970 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4972 rtx pool_ref = NULL_RTX;
4973 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4976 rtx constant = get_pool_constant (pool_ref);
4977 enum machine_mode mode = get_pool_mode (pool_ref);
4980 curr_pool = s390_start_pool (&pool_list, insn);
4982 s390_add_constant (curr_pool, constant, mode);
4983 s390_add_pool_insn (curr_pool, insn);
4985 /* Don't split the pool chunk between a LTREL_OFFSET load
4986 and the corresponding LTREL_BASE. */
4987 if (GET_CODE (constant) == CONST
4988 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4989 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4993 pending_ltrel = pool_ref;
4998 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
5001 s390_add_pool_insn (curr_pool, insn);
5002 /* An LTREL_BASE must follow within the same basic block. */
5008 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
5009 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
5012 if (TARGET_CPU_ZARCH)
5014 if (curr_pool->size < S390_POOL_CHUNK_MAX)
5017 s390_end_pool (curr_pool, NULL_RTX);
5022 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
5023 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
5026 /* We will later have to insert base register reload insns.
5027 Those will have an effect on code size, which we need to
5028 consider here. This calculation makes rather pessimistic
5029 worst-case assumptions. */
5030 if (GET_CODE (insn) == CODE_LABEL)
5033 if (chunk_size < S390_POOL_CHUNK_MIN
5034 && curr_pool->size < S390_POOL_CHUNK_MIN)
5037 /* Pool chunks can only be inserted after BARRIERs ... */
5038 if (GET_CODE (insn) == BARRIER)
5040 s390_end_pool (curr_pool, insn);
5045 /* ... so if we don't find one in time, create one. */
5046 else if ((chunk_size > S390_POOL_CHUNK_MAX
5047 || curr_pool->size > S390_POOL_CHUNK_MAX))
5049 rtx label, jump, barrier;
5051 /* We can insert the barrier only after a 'real' insn. */
5052 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
5054 if (get_attr_length (insn) == 0)
5057 /* Don't separate LTREL_BASE from the corresponding
5058 LTREL_OFFSET load. */
5062 label = gen_label_rtx ();
5063 jump = emit_jump_insn_after (gen_jump (label), insn);
5064 barrier = emit_barrier_after (jump);
5065 insn = emit_label_after (label, barrier);
5066 JUMP_LABEL (jump) = label;
5067 LABEL_NUSES (label) = 1;
5069 INSN_ADDRESSES_NEW (jump, -1);
5070 INSN_ADDRESSES_NEW (barrier, -1);
5071 INSN_ADDRESSES_NEW (insn, -1);
5073 s390_end_pool (curr_pool, barrier);
5081 s390_end_pool (curr_pool, NULL_RTX);
5086 /* Find all labels that are branched into
5087 from an insn belonging to a different chunk. */
5089 far_labels = BITMAP_XMALLOC ();
5091 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5093 /* Labels marked with LABEL_PRESERVE_P can be target
5094 of non-local jumps, so we have to mark them.
5095 The same holds for named labels.
5097 Don't do that, however, if it is the label before
5100 if (GET_CODE (insn) == CODE_LABEL
5101 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
5103 rtx vec_insn = next_real_insn (insn);
5104 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5105 PATTERN (vec_insn) : NULL_RTX;
5107 || !(GET_CODE (vec_pat) == ADDR_VEC
5108 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5109 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
5112 /* If we have a direct jump (conditional or unconditional)
5113 or a casesi jump, check all potential targets. */
5114 else if (GET_CODE (insn) == JUMP_INSN)
5116 rtx pat = PATTERN (insn);
5117 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
5118 pat = XVECEXP (pat, 0, 0);
5120 if (GET_CODE (pat) == SET)
5122 rtx label = JUMP_LABEL (insn);
5125 if (s390_find_pool (pool_list, label)
5126 != s390_find_pool (pool_list, insn))
5127 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5130 else if (GET_CODE (pat) == PARALLEL
5131 && XVECLEN (pat, 0) == 2
5132 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
5133 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
5134 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
5136 /* Find the jump table used by this casesi jump. */
5137 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
5138 rtx vec_insn = next_real_insn (vec_label);
5139 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5140 PATTERN (vec_insn) : NULL_RTX;
5142 && (GET_CODE (vec_pat) == ADDR_VEC
5143 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5145 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
5147 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
5149 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
5151 if (s390_find_pool (pool_list, label)
5152 != s390_find_pool (pool_list, insn))
5153 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5160 /* Insert base register reload insns before every pool. */
5162 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5164 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5166 rtx insn = curr_pool->first_insn;
5167 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
5170 /* Insert base register reload insns at every far label. */
5172 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5173 if (GET_CODE (insn) == CODE_LABEL
5174 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
5176 struct constant_pool *pool = s390_find_pool (pool_list, insn);
5179 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5181 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
5186 BITMAP_XFREE (far_labels);
5189 /* Recompute insn addresses. */
5191 init_insn_lengths ();
5192 shorten_branches (get_insns ());
5197 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5198 After we have decided to use this list, finish implementing
5199 all changes to the current function as required. */
5202 s390_chunkify_finish (struct constant_pool *pool_list)
5204 struct constant_pool *curr_pool = NULL;
5208 /* Replace all literal pool references. */
5210 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5213 replace_ltrel_base (&PATTERN (insn));
5215 curr_pool = s390_find_pool (pool_list, insn);
5219 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5221 rtx addr, pool_ref = NULL_RTX;
5222 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5225 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
5226 get_pool_mode (pool_ref));
5227 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5228 INSN_CODE (insn) = -1;
5233 /* Dump out all literal pools. */
5235 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5236 s390_dump_pool (curr_pool, 0);
5238 /* Free pool list. */
5242 struct constant_pool *next = pool_list->next;
5243 s390_free_pool (pool_list);
5248 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5249 We have decided we cannot use this list, so revert all changes
5250 to the current function that were done by s390_chunkify_start. */
5253 s390_chunkify_cancel (struct constant_pool *pool_list)
5255 struct constant_pool *curr_pool = NULL;
5258 /* Remove all pool placeholder insns. */
5260 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5262 /* Did we insert an extra barrier? Remove it. */
5263 rtx barrier = PREV_INSN (curr_pool->pool_insn);
5264 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
5265 rtx label = NEXT_INSN (curr_pool->pool_insn);
5267 if (jump && GET_CODE (jump) == JUMP_INSN
5268 && barrier && GET_CODE (barrier) == BARRIER
5269 && label && GET_CODE (label) == CODE_LABEL
5270 && GET_CODE (PATTERN (jump)) == SET
5271 && SET_DEST (PATTERN (jump)) == pc_rtx
5272 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
5273 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
5276 remove_insn (barrier);
5277 remove_insn (label);
5280 remove_insn (curr_pool->pool_insn);
5283 /* Remove all base register reload insns. */
5285 for (insn = get_insns (); insn; )
5287 rtx next_insn = NEXT_INSN (insn);
5289 if (GET_CODE (insn) == INSN
5290 && GET_CODE (PATTERN (insn)) == SET
5291 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
5292 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
5298 /* Free pool list. */
5302 struct constant_pool *next = pool_list->next;
5303 s390_free_pool (pool_list);
5309 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
5312 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
5316 switch (GET_MODE_CLASS (mode))
5319 if (GET_CODE (exp) != CONST_DOUBLE)
5322 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
5323 assemble_real (r, mode, align);
5327 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5336 /* Rework the prolog/epilog to avoid saving/restoring
5337 registers unnecessarily. BASE_USED specifies whether
5338 the literal pool base register needs to be saved. */
5341 s390_optimize_prolog (bool base_used)
5343 rtx insn, new_insn, next_insn;
5345 /* Do a final recompute of the frame-related data. */
5347 s390_frame_info (base_used, cfun->machine->save_return_addr_p);
5348 regs_ever_live[BASE_REGNUM] = base_used;
5349 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
5350 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5352 /* If all special registers are in fact used, there's nothing we
5353 can do, so no point in walking the insn list. */
5355 if (cfun->machine->first_save_gpr <= BASE_REGNUM
5356 && cfun->machine->last_save_gpr >= BASE_REGNUM
5357 && (TARGET_CPU_ZARCH
5358 || (cfun->machine->first_save_gpr <= RETURN_REGNUM
5359 && cfun->machine->last_save_gpr >= RETURN_REGNUM)))
5362 /* Search for prolog/epilog insns and replace them. */
5364 for (insn = get_insns (); insn; insn = next_insn)
5366 int first, last, off;
5367 rtx set, base, offset;
5369 next_insn = NEXT_INSN (insn);
5371 if (GET_CODE (insn) != INSN)
5374 if (GET_CODE (PATTERN (insn)) == PARALLEL
5375 && store_multiple_operation (PATTERN (insn), VOIDmode))
5377 set = XVECEXP (PATTERN (insn), 0, 0);
5378 first = REGNO (SET_SRC (set));
5379 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5380 offset = const0_rtx;
5381 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5382 off = INTVAL (offset) - first * UNITS_PER_WORD;
5384 if (GET_CODE (base) != REG || off < 0)
5386 if (first > BASE_REGNUM || last < BASE_REGNUM)
5389 if (cfun->machine->first_save_gpr != -1)
5391 new_insn = save_gprs (base, off, cfun->machine->first_save_gpr,
5392 cfun->machine->last_save_gpr);
5393 new_insn = emit_insn_before (new_insn, insn);
5394 INSN_ADDRESSES_NEW (new_insn, -1);
5401 if (GET_CODE (PATTERN (insn)) == SET
5402 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5403 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGNUM
5404 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5406 set = PATTERN (insn);
5407 offset = const0_rtx;
5408 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5409 off = INTVAL (offset) - BASE_REGNUM * UNITS_PER_WORD;
5411 if (GET_CODE (base) != REG || off < 0)
5414 if (cfun->machine->first_save_gpr != -1)
5416 new_insn = save_gprs (base, off, cfun->machine->first_save_gpr,
5417 cfun->machine->last_save_gpr);
5418 new_insn = emit_insn_before (new_insn, insn);
5419 INSN_ADDRESSES_NEW (new_insn, -1);
5426 if (GET_CODE (PATTERN (insn)) == PARALLEL
5427 && load_multiple_operation (PATTERN (insn), VOIDmode))
5429 set = XVECEXP (PATTERN (insn), 0, 0);
5430 first = REGNO (SET_DEST (set));
5431 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5432 offset = const0_rtx;
5433 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5434 off = INTVAL (offset) - first * UNITS_PER_WORD;
5436 if (GET_CODE (base) != REG || off < 0)
5438 if (first > BASE_REGNUM || last < BASE_REGNUM)
5441 if (cfun->machine->first_restore_gpr != -1)
5443 new_insn = restore_gprs (base, off, cfun->machine->first_restore_gpr,
5444 cfun->machine->last_restore_gpr);
5445 new_insn = emit_insn_before (new_insn, insn);
5446 INSN_ADDRESSES_NEW (new_insn, -1);
5453 if (GET_CODE (PATTERN (insn)) == SET
5454 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5455 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGNUM
5456 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5458 set = PATTERN (insn);
5459 offset = const0_rtx;
5460 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5461 off = INTVAL (offset) - BASE_REGNUM * UNITS_PER_WORD;
5463 if (GET_CODE (base) != REG || off < 0)
5466 if (cfun->machine->first_restore_gpr != -1)
5468 new_insn = restore_gprs (base, off, cfun->machine->first_restore_gpr,
5469 cfun->machine->last_restore_gpr);
5470 new_insn = emit_insn_before (new_insn, insn);
5471 INSN_ADDRESSES_NEW (new_insn, -1);
5480 /* Perform machine-dependent processing. */
5485 bool base_used = false;
5486 bool pool_overflow = false;
5488 /* Make sure all splits have been performed; splits after
5489 machine_dependent_reorg might confuse insn length counts. */
5490 split_all_insns_noflow ();
5493 /* Install the main literal pool and the associated base
5494 register load insns.
5496 In addition, there are two problematic situations we need
5499 - the literal pool might be > 4096 bytes in size, so that
5500 some of its elements cannot be directly accessed
5502 - a branch target might be > 64K away from the branch, so that
5503 it is not possible to use a PC-relative instruction.
5505 To fix those, we split the single literal pool into multiple
5506 pool chunks, reloading the pool base register at various
5507 points throughout the function to ensure it always points to
5508 the pool chunk the following code expects, and / or replace
5509 PC-relative branches by absolute branches.
5511 However, the two problems are interdependent: splitting the
5512 literal pool can move a branch further away from its target,
5513 causing the 64K limit to overflow, and on the other hand,
5514 replacing a PC-relative branch by an absolute branch means
5515 we need to put the branch target address into the literal
5516 pool, possibly causing it to overflow.
5518 So, we loop trying to fix up both problems until we manage
5519 to satisfy both conditions at the same time. Note that the
5520 loop is guaranteed to terminate as every pass of the loop
5521 strictly decreases the total number of PC-relative branches
5522 in the function. (This is not completely true as there
5523 might be branch-over-pool insns introduced by chunkify_start.
5524 Those never need to be split however.) */
5528 struct constant_pool *pool = NULL;
5530 /* Collect the literal pool. */
5533 pool = s390_mainpool_start ();
5535 pool_overflow = true;
5538 /* If literal pool overflowed, start to chunkify it. */
5540 pool = s390_chunkify_start ();
5542 /* Split out-of-range branches. If this has created new
5543 literal pool entries, cancel current chunk list and
5544 recompute it. zSeries machines have large branch
5545 instructions, so we never need to split a branch. */
5546 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5549 s390_chunkify_cancel (pool);
5551 s390_mainpool_cancel (pool);
5556 /* If we made it up to here, both conditions are satisfied.
5557 Finish up literal pool related changes. */
5558 if ((pool_overflow || pool->size > 0)
5559 && REGNO (cfun->machine->base_reg) == BASE_REGNUM)
5563 s390_chunkify_finish (pool);
5565 s390_mainpool_finish (pool);
5570 s390_optimize_prolog (base_used);
5574 /* Return an RTL expression representing the value of the return address
5575 for the frame COUNT steps up from the current frame. FRAME is the
5576 frame pointer of that frame. */
5579 s390_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
5583 /* Without backchain, we fail for all but the current frame. */
5585 if (!TARGET_BACKCHAIN && count > 0)
5588 /* For the current frame, we need to make sure the initial
5589 value of RETURN_REGNUM is actually saved. */
5593 cfun->machine->save_return_addr_p = true;
5594 return gen_rtx_MEM (Pmode, return_address_pointer_rtx);
5597 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5598 addr = memory_address (Pmode, addr);
5599 return gen_rtx_MEM (Pmode, addr);
5602 /* Find first call clobbered register unused in a function.
5603 This could be used as base register in a leaf function
5604 or for holding the return address before epilogue. */
5607 find_unused_clobbered_reg (void)
5610 for (i = 0; i < 6; i++)
5611 if (!regs_ever_live[i])
5616 /* Fill cfun->machine with info about frame of current function.
5617 BASE_USED and RETURN_ADDR_USED specify whether we assume the
5618 base and return address register will need to be saved. */
5621 s390_frame_info (int base_used, int return_addr_used)
5625 HOST_WIDE_INT fsize = get_frame_size ();
5627 if (!TARGET_64BIT && fsize > 0x7fff0000)
5628 fatal_error ("Total size of local variables exceeds architecture limit.");
5630 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5631 cfun->machine->save_fprs_p = 0;
5633 for (i = 24; i < 32; i++)
5634 if (regs_ever_live[i] && !global_regs[i])
5636 cfun->machine->save_fprs_p = 1;
5640 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5642 /* Does function need to setup frame and save area. */
5644 if (!current_function_is_leaf
5645 || TARGET_TPF_PROFILING
5646 || cfun->machine->frame_size > 0
5647 || current_function_calls_alloca
5648 || current_function_stdarg)
5649 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5651 /* Find first and last gpr to be saved. We trust regs_ever_live
5652 data, except that we don't save and restore global registers.
5654 Also, all registers with special meaning to the compiler need
5655 to be handled extra. */
5657 for (i = 0; i < 16; i++)
5658 live_regs[i] = regs_ever_live[i] && !global_regs[i];
5661 live_regs[PIC_OFFSET_TABLE_REGNUM] =
5662 regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
5664 live_regs[BASE_REGNUM] = base_used;
5665 live_regs[RETURN_REGNUM] = return_addr_used;
5666 live_regs[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5668 for (i = 6; i < 16; i++)
5671 for (j = 15; j > i; j--)
5677 /* Nothing to save/restore. */
5678 cfun->machine->first_save_gpr = -1;
5679 cfun->machine->first_restore_gpr = -1;
5680 cfun->machine->last_save_gpr = -1;
5681 cfun->machine->last_restore_gpr = -1;
5685 /* Save / Restore from gpr i to j. */
5686 cfun->machine->first_save_gpr = i;
5687 cfun->machine->first_restore_gpr = i;
5688 cfun->machine->last_save_gpr = j;
5689 cfun->machine->last_restore_gpr = j;
5692 /* Varargs functions need to save gprs 2 to 6. */
5693 if (current_function_stdarg)
5695 if (cfun->machine->first_save_gpr == -1
5696 || cfun->machine->first_save_gpr > 2)
5697 cfun->machine->first_save_gpr = 2;
5699 if (cfun->machine->last_save_gpr == -1
5700 || cfun->machine->last_save_gpr < 6)
5701 cfun->machine->last_save_gpr = 6;
5705 /* Return offset between argument pointer and frame pointer
5706 initially after prologue. */
5709 s390_arg_frame_offset (void)
5711 /* See the comment in s390_emit_prologue about the assumptions we make
5712 whether or not the base and return address register need to be saved. */
5713 int return_addr_used = !current_function_is_leaf
5714 || TARGET_TPF_PROFILING
5715 || regs_ever_live[RETURN_REGNUM]
5716 || cfun->machine->save_return_addr_p;
5718 s390_frame_info (1, !TARGET_CPU_ZARCH || return_addr_used);
5719 return cfun->machine->frame_size + STACK_POINTER_OFFSET;
5722 /* Return offset between return address pointer (location of r14
5723 on the stack) and frame pointer initially after prologue. */
5726 s390_return_address_offset (void)
5728 s390_frame_info (1, 1);
5730 return cfun->machine->frame_size + RETURN_REGNUM * UNITS_PER_WORD;
5733 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5734 to register BASE. Return generated insn. */
5737 save_fpr (rtx base, int offset, int regnum)
5740 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5741 set_mem_alias_set (addr, s390_sr_alias_set);
5743 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5746 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5747 to register BASE. Return generated insn. */
5750 restore_fpr (rtx base, int offset, int regnum)
5753 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5754 set_mem_alias_set (addr, s390_sr_alias_set);
5756 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5759 /* Generate insn to save registers FIRST to LAST into
5760 the register save area located at offset OFFSET
5761 relative to register BASE. */
5764 save_gprs (rtx base, int offset, int first, int last)
5766 rtx addr, insn, note;
5769 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5770 addr = gen_rtx_MEM (Pmode, addr);
5771 set_mem_alias_set (addr, s390_sr_alias_set);
5773 /* Special-case single register. */
5777 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5779 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5781 RTX_FRAME_RELATED_P (insn) = 1;
5786 insn = gen_store_multiple (addr,
5787 gen_rtx_REG (Pmode, first),
5788 GEN_INT (last - first + 1));
5791 /* We need to set the FRAME_RELATED flag on all SETs
5792 inside the store-multiple pattern.
5794 However, we must not emit DWARF records for registers 2..5
5795 if they are stored for use by variable arguments ...
5797 ??? Unfortunately, it is not enough to simply not the the
5798 FRAME_RELATED flags for those SETs, because the first SET
5799 of the PARALLEL is always treated as if it had the flag
5800 set, even if it does not. Therefore we emit a new pattern
5801 without those registers as REG_FRAME_RELATED_EXPR note. */
5805 rtx pat = PATTERN (insn);
5807 for (i = 0; i < XVECLEN (pat, 0); i++)
5808 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5809 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5811 RTX_FRAME_RELATED_P (insn) = 1;
5815 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5816 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5817 gen_rtx_REG (Pmode, 6),
5818 GEN_INT (last - 6 + 1));
5819 note = PATTERN (note);
5822 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5823 note, REG_NOTES (insn));
5825 for (i = 0; i < XVECLEN (note, 0); i++)
5826 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5827 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5829 RTX_FRAME_RELATED_P (insn) = 1;
5835 /* Generate insn to restore registers FIRST to LAST from
5836 the register save area located at offset OFFSET
5837 relative to register BASE. */
5840 restore_gprs (rtx base, int offset, int first, int last)
5844 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5845 addr = gen_rtx_MEM (Pmode, addr);
5846 set_mem_alias_set (addr, s390_sr_alias_set);
5848 /* Special-case single register. */
5852 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5854 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5859 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5861 GEN_INT (last - first + 1));
5865 /* Return insn sequence to load the GOT register. */
5867 static GTY(()) rtx got_symbol;
5869 s390_load_got (void)
5875 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5876 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5881 if (TARGET_CPU_ZARCH)
5883 emit_move_insn (pic_offset_table_rtx, got_symbol);
5889 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5890 UNSPEC_LTREL_OFFSET);
5891 offset = gen_rtx_CONST (Pmode, offset);
5892 offset = force_const_mem (Pmode, offset);
5894 emit_move_insn (pic_offset_table_rtx, offset);
5896 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5898 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5900 emit_move_insn (pic_offset_table_rtx, offset);
5903 insns = get_insns ();
5908 /* Expand the prologue into a bunch of separate insns. */
5911 s390_emit_prologue (void)
5917 /* At this point, we decide whether we'll need to save/restore the
5918 return address register. This decision is final on zSeries machines;
5919 on S/390 it can still be overridden in s390_split_branches. */
5921 if (!current_function_is_leaf
5922 || TARGET_TPF_PROFILING
5923 || regs_ever_live[RETURN_REGNUM])
5924 cfun->machine->save_return_addr_p = 1;
5926 /* Decide which register to use as literal pool base. In small leaf
5927 functions, try to use an unused call-clobbered register as base
5928 register to avoid save/restore overhead. */
5930 if (current_function_is_leaf && !regs_ever_live[5])
5931 cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
5933 cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
5935 regs_ever_live[REGNO (cfun->machine->base_reg)] = 1;
5937 /* Compute frame info. Note that at this point, we assume the base
5938 register and -on S/390- the return register always need to be saved.
5939 This is done because the usage of these registers might change even
5940 after the prolog was emitted. If it turns out later that we really
5941 don't need them, the prolog/epilog code is modified again. */
5943 s390_frame_info (1, !TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p);
5945 /* We need to update regs_ever_live to avoid data-flow problems. */
5947 regs_ever_live[BASE_REGNUM] = 1;
5948 regs_ever_live[RETURN_REGNUM] = !TARGET_CPU_ZARCH
5949 || cfun->machine->save_return_addr_p;
5950 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5952 /* Annotate all constant pool references to let the scheduler know
5953 they implicitly use the base register. */
5955 push_topmost_sequence ();
5957 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5959 annotate_constant_pool_refs (&PATTERN (insn));
5961 pop_topmost_sequence ();
5963 /* Choose best register to use for temp use within prologue.
5964 See below for why TPF must use the register 1. */
5966 if (!current_function_is_leaf
5967 && !TARGET_TPF_PROFILING)
5968 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5970 temp_reg = gen_rtx_REG (Pmode, 1);
5972 /* Save call saved gprs. */
5974 insn = save_gprs (stack_pointer_rtx, 0,
5975 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5978 /* Dummy insn to mark literal pool slot. */
5980 emit_insn (gen_main_pool (cfun->machine->base_reg));
5982 /* Save fprs for variable args. */
5984 if (current_function_stdarg)
5985 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5986 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5988 /* Save fprs 4 and 6 if used (31 bit ABI). */
5991 for (i = 18; i < 20; i++)
5992 if (regs_ever_live[i] && !global_regs[i])
5994 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5995 RTX_FRAME_RELATED_P (insn) = 1;
5998 /* Decrement stack pointer. */
6000 if (cfun->machine->frame_size > 0)
6002 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
6004 /* Save incoming stack pointer into temp reg. */
6006 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
6008 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
6011 /* Subtract frame size from stack pointer. */
6013 if (DISP_IN_RANGE (INTVAL (frame_off)))
6015 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6016 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6018 insn = emit_insn (insn);
6022 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6023 frame_off = force_const_mem (Pmode, frame_off);
6025 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
6026 annotate_constant_pool_refs (&PATTERN (insn));
6029 RTX_FRAME_RELATED_P (insn) = 1;
6031 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6032 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6033 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6034 GEN_INT (-cfun->machine->frame_size))),
6037 /* Set backchain. */
6039 if (TARGET_BACKCHAIN)
6041 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
6042 set_mem_alias_set (addr, s390_sr_alias_set);
6043 insn = emit_insn (gen_move_insn (addr, temp_reg));
6046 /* If we support asynchronous exceptions (e.g. for Java),
6047 we need to make sure the backchain pointer is set up
6048 before any possibly trapping memory access. */
6050 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
6052 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
6053 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
6057 /* Save fprs 8 - 15 (64 bit ABI). */
6059 if (cfun->machine->save_fprs_p)
6061 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
6063 for (i = 24; i < 32; i++)
6064 if (regs_ever_live[i] && !global_regs[i])
6066 rtx addr = plus_constant (stack_pointer_rtx,
6067 cfun->machine->frame_size - 64 + (i-24)*8);
6069 insn = save_fpr (temp_reg, (i-24)*8, i);
6070 RTX_FRAME_RELATED_P (insn) = 1;
6072 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6073 gen_rtx_SET (VOIDmode,
6074 gen_rtx_MEM (DFmode, addr),
6075 gen_rtx_REG (DFmode, i)),
6080 /* Set frame pointer, if needed. */
6082 if (frame_pointer_needed)
6084 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
6085 RTX_FRAME_RELATED_P (insn) = 1;
6088 /* Set up got pointer, if needed. */
6090 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
6092 rtx insns = s390_load_got ();
6094 for (insn = insns; insn; insn = NEXT_INSN (insn))
6096 annotate_constant_pool_refs (&PATTERN (insn));
6098 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
6105 if (TARGET_TPF_PROFILING)
6107 /* Generate a BAS instruction to serve as a function
6108 entry intercept to facilitate the use of tracing
6109 algorithms located at the branch target. */
6110 emit_insn (gen_prologue_tpf ());
6112 /* Emit a blockage here so that all code
6113 lies between the profiling mechanisms. */
6114 emit_insn (gen_blockage ());
6118 /* Expand the epilogue into a bunch of separate insns. */
6121 s390_emit_epilogue (bool sibcall)
6123 rtx frame_pointer, return_reg;
6124 int area_bottom, area_top, offset = 0;
6128 if (TARGET_TPF_PROFILING)
6131 /* Generate a BAS instruction to serve as a function
6132 entry intercept to facilitate the use of tracing
6133 algorithms located at the branch target. */
6135 /* Emit a blockage here so that all code
6136 lies between the profiling mechanisms. */
6137 emit_insn (gen_blockage ());
6139 emit_insn (gen_epilogue_tpf ());
6142 /* Check whether to use frame or stack pointer for restore. */
6144 frame_pointer = frame_pointer_needed ?
6145 hard_frame_pointer_rtx : stack_pointer_rtx;
6147 /* Compute which parts of the save area we need to access. */
6149 if (cfun->machine->first_restore_gpr != -1)
6151 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
6152 area_top = (cfun->machine->last_restore_gpr + 1) * UNITS_PER_WORD;
6156 area_bottom = INT_MAX;
6162 if (cfun->machine->save_fprs_p)
6164 if (area_bottom > -64)
6172 for (i = 18; i < 20; i++)
6173 if (regs_ever_live[i] && !global_regs[i])
6175 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
6176 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
6177 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
6178 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
6182 /* Check whether we can access the register save area.
6183 If not, increment the frame pointer as required. */
6185 if (area_top <= area_bottom)
6187 /* Nothing to restore. */
6189 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
6190 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
6192 /* Area is in range. */
6193 offset = cfun->machine->frame_size;
6197 rtx insn, frame_off;
6199 offset = area_bottom < 0 ? -area_bottom : 0;
6200 frame_off = GEN_INT (cfun->machine->frame_size - offset);
6202 if (DISP_IN_RANGE (INTVAL (frame_off)))
6204 insn = gen_rtx_SET (VOIDmode, frame_pointer,
6205 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
6206 insn = emit_insn (insn);
6210 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6211 frame_off = force_const_mem (Pmode, frame_off);
6213 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
6214 annotate_constant_pool_refs (&PATTERN (insn));
6218 /* Restore call saved fprs. */
6222 if (cfun->machine->save_fprs_p)
6223 for (i = 24; i < 32; i++)
6224 if (regs_ever_live[i] && !global_regs[i])
6225 restore_fpr (frame_pointer,
6226 offset - 64 + (i-24) * 8, i);
6230 for (i = 18; i < 20; i++)
6231 if (regs_ever_live[i] && !global_regs[i])
6232 restore_fpr (frame_pointer,
6233 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
6236 /* Return register. */
6238 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6240 /* Restore call saved gprs. */
6242 if (cfun->machine->first_restore_gpr != -1)
6247 /* Check for global register and save them
6248 to stack location from where they get restored. */
6250 for (i = cfun->machine->first_restore_gpr;
6251 i <= cfun->machine->last_restore_gpr;
6254 /* These registers are special and need to be
6255 restored in any case. */
6256 if (i == STACK_POINTER_REGNUM
6257 || i == RETURN_REGNUM
6259 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
6264 addr = plus_constant (frame_pointer,
6265 offset + i * UNITS_PER_WORD);
6266 addr = gen_rtx_MEM (Pmode, addr);
6267 set_mem_alias_set (addr, s390_sr_alias_set);
6268 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
6274 /* Fetch return address from stack before load multiple,
6275 this will do good for scheduling. */
6277 if (cfun->machine->save_return_addr_p
6278 || (cfun->machine->first_restore_gpr < BASE_REGNUM
6279 && cfun->machine->last_restore_gpr > RETURN_REGNUM))
6281 int return_regnum = find_unused_clobbered_reg();
6284 return_reg = gen_rtx_REG (Pmode, return_regnum);
6286 addr = plus_constant (frame_pointer,
6287 offset + RETURN_REGNUM * UNITS_PER_WORD);
6288 addr = gen_rtx_MEM (Pmode, addr);
6289 set_mem_alias_set (addr, s390_sr_alias_set);
6290 emit_move_insn (return_reg, addr);
6294 insn = restore_gprs (frame_pointer, offset,
6295 cfun->machine->first_restore_gpr,
6296 cfun->machine->last_restore_gpr);
6303 /* Return to caller. */
6305 p = rtvec_alloc (2);
6307 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
6308 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
6309 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
6314 /* Return the size in bytes of a function argument of
6315 type TYPE and/or mode MODE. At least one of TYPE or
6316 MODE must be specified. */
6319 s390_function_arg_size (enum machine_mode mode, tree type)
6322 return int_size_in_bytes (type);
6324 /* No type info available for some library calls ... */
6325 if (mode != BLKmode)
6326 return GET_MODE_SIZE (mode);
6328 /* If we have neither type nor mode, abort */
6332 /* Return true if a function argument of type TYPE and mode MODE
6333 is to be passed in a floating-point register, if available. */
6336 s390_function_arg_float (enum machine_mode mode, tree type)
6338 int size = s390_function_arg_size (mode, type);
6342 /* Soft-float changes the ABI: no floating-point registers are used. */
6343 if (TARGET_SOFT_FLOAT)
6346 /* No type info available for some library calls ... */
6348 return mode == SFmode || mode == DFmode;
6350 /* The ABI says that record types with a single member are treated
6351 just like that member would be. */
6352 while (TREE_CODE (type) == RECORD_TYPE)
6354 tree field, single = NULL_TREE;
6356 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
6358 if (TREE_CODE (field) != FIELD_DECL)
6361 if (single == NULL_TREE)
6362 single = TREE_TYPE (field);
6367 if (single == NULL_TREE)
6373 return TREE_CODE (type) == REAL_TYPE;
6376 /* Return true if a function argument of type TYPE and mode MODE
6377 is to be passed in an integer register, or a pair of integer
6378 registers, if available. */
6381 s390_function_arg_integer (enum machine_mode mode, tree type)
6383 int size = s390_function_arg_size (mode, type);
6387 /* No type info available for some library calls ... */
6389 return GET_MODE_CLASS (mode) == MODE_INT
6390 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6392 /* We accept small integral (and similar) types. */
6393 if (INTEGRAL_TYPE_P (type)
6394 || POINTER_TYPE_P (type)
6395 || TREE_CODE (type) == OFFSET_TYPE
6396 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6399 /* We also accept structs of size 1, 2, 4, 8 that are not
6400 passed in floating-point registers. */
6401 if (AGGREGATE_TYPE_P (type)
6402 && exact_log2 (size) >= 0
6403 && !s390_function_arg_float (mode, type))
6409 /* Return 1 if a function argument of type TYPE and mode MODE
6410 is to be passed by reference. The ABI specifies that only
6411 structures of size 1, 2, 4, or 8 bytes are passed by value,
6412 all other structures (and complex numbers) are passed by
6416 s390_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
6417 enum machine_mode mode, tree type,
6418 bool named ATTRIBUTE_UNUSED)
6420 int size = s390_function_arg_size (mode, type);
6426 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6429 if (TREE_CODE (type) == COMPLEX_TYPE
6430 || TREE_CODE (type) == VECTOR_TYPE)
6437 /* Update the data in CUM to advance over an argument of mode MODE and
6438 data type TYPE. (TYPE is null for libcalls where that information
6439 may not be available.). The boolean NAMED specifies whether the
6440 argument is a named argument (as opposed to an unnamed argument
6441 matching an ellipsis). */
6444 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6445 tree type, int named ATTRIBUTE_UNUSED)
6447 if (s390_function_arg_float (mode, type))
6451 else if (s390_function_arg_integer (mode, type))
6453 int size = s390_function_arg_size (mode, type);
6454 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6460 /* Define where to put the arguments to a function.
6461 Value is zero to push the argument on the stack,
6462 or a hard register in which to store the argument.
6464 MODE is the argument's machine mode.
6465 TYPE is the data type of the argument (as a tree).
6466 This is null for libcalls where that information may
6468 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6469 the preceding args and about the function being called.
6470 NAMED is nonzero if this argument is a named parameter
6471 (otherwise it is an extra parameter matching an ellipsis).
6473 On S/390, we use general purpose registers 2 through 6 to
6474 pass integer, pointer, and certain structure arguments, and
6475 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6476 to pass floating point arguments. All remaining arguments
6477 are pushed to the stack. */
6480 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6481 int named ATTRIBUTE_UNUSED)
6483 if (s390_function_arg_float (mode, type))
6485 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6488 return gen_rtx_REG (mode, cum->fprs + 16);
6490 else if (s390_function_arg_integer (mode, type))
6492 int size = s390_function_arg_size (mode, type);
6493 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6495 if (cum->gprs + n_gprs > 5)
6498 return gen_rtx_REG (mode, cum->gprs + 2);
6501 /* After the real arguments, expand_call calls us once again
6502 with a void_type_node type. Whatever we return here is
6503 passed as operand 2 to the call expanders.
6505 We don't need this feature ... */
6506 else if (type == void_type_node)
6512 /* Return true if return values of type TYPE should be returned
6513 in a memory buffer whose address is passed by the caller as
6514 hidden first argument. */
6517 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6519 /* We accept small integral (and similar) types. */
6520 if (INTEGRAL_TYPE_P (type)
6521 || POINTER_TYPE_P (type)
6522 || TREE_CODE (type) == OFFSET_TYPE
6523 || TREE_CODE (type) == REAL_TYPE)
6524 return int_size_in_bytes (type) > 8;
6526 /* Aggregates and similar constructs are always returned
6528 if (AGGREGATE_TYPE_P (type)
6529 || TREE_CODE (type) == COMPLEX_TYPE
6530 || TREE_CODE (type) == VECTOR_TYPE)
6533 /* ??? We get called on all sorts of random stuff from
6534 aggregate_value_p. We can't abort, but it's not clear
6535 what's safe to return. Pretend it's a struct I guess. */
6539 /* Define where to return a (scalar) value of type TYPE.
6540 If TYPE is null, define where to return a (scalar)
6541 value of mode MODE from a libcall. */
6544 s390_function_value (tree type, enum machine_mode mode)
6548 int unsignedp = TYPE_UNSIGNED (type);
6549 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6552 if (GET_MODE_CLASS (mode) != MODE_INT
6553 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6555 if (GET_MODE_SIZE (mode) > 8)
6558 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6559 return gen_rtx_REG (mode, 16);
6561 return gen_rtx_REG (mode, 2);
6565 /* Create and return the va_list datatype.
6567 On S/390, va_list is an array type equivalent to
6569 typedef struct __va_list_tag
6573 void *__overflow_arg_area;
6574 void *__reg_save_area;
6577 where __gpr and __fpr hold the number of general purpose
6578 or floating point arguments used up to now, respectively,
6579 __overflow_arg_area points to the stack location of the
6580 next argument passed on the stack, and __reg_save_area
6581 always points to the start of the register area in the
6582 call frame of the current function. The function prologue
6583 saves all registers used for argument passing into this
6584 area if the function uses variable arguments. */
6587 s390_build_builtin_va_list (void)
6589 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6591 record = lang_hooks.types.make_type (RECORD_TYPE);
6594 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6596 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6597 long_integer_type_node);
6598 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6599 long_integer_type_node);
6600 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6602 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6605 DECL_FIELD_CONTEXT (f_gpr) = record;
6606 DECL_FIELD_CONTEXT (f_fpr) = record;
6607 DECL_FIELD_CONTEXT (f_ovf) = record;
6608 DECL_FIELD_CONTEXT (f_sav) = record;
6610 TREE_CHAIN (record) = type_decl;
6611 TYPE_NAME (record) = type_decl;
6612 TYPE_FIELDS (record) = f_gpr;
6613 TREE_CHAIN (f_gpr) = f_fpr;
6614 TREE_CHAIN (f_fpr) = f_ovf;
6615 TREE_CHAIN (f_ovf) = f_sav;
6617 layout_type (record);
6619 /* The correct type is an array type of one element. */
6620 return build_array_type (record, build_index_type (size_zero_node));
6623 /* Implement va_start by filling the va_list structure VALIST.
6624 STDARG_P is always true, and ignored.
6625 NEXTARG points to the first anonymous stack argument.
6627 The following global variables are used to initialize
6628 the va_list structure:
6630 current_function_args_info:
6631 holds number of gprs and fprs used for named arguments.
6632 current_function_arg_offset_rtx:
6633 holds the offset of the first anonymous stack argument
6634 (relative to the virtual arg pointer). */
6637 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6639 HOST_WIDE_INT n_gpr, n_fpr;
6641 tree f_gpr, f_fpr, f_ovf, f_sav;
6642 tree gpr, fpr, ovf, sav, t;
6644 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6645 f_fpr = TREE_CHAIN (f_gpr);
6646 f_ovf = TREE_CHAIN (f_fpr);
6647 f_sav = TREE_CHAIN (f_ovf);
6649 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6650 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
6651 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
6652 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
6653 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
6655 /* Count number of gp and fp argument registers used. */
6657 n_gpr = current_function_args_info.gprs;
6658 n_fpr = current_function_args_info.fprs;
6660 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6661 TREE_SIDE_EFFECTS (t) = 1;
6662 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6664 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6665 TREE_SIDE_EFFECTS (t) = 1;
6666 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6668 /* Find the overflow area. */
6669 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6671 off = INTVAL (current_function_arg_offset_rtx);
6672 off = off < 0 ? 0 : off;
6673 if (TARGET_DEBUG_ARG)
6674 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6675 (int)n_gpr, (int)n_fpr, off);
6677 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6679 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6680 TREE_SIDE_EFFECTS (t) = 1;
6681 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6683 /* Find the register save area. */
6684 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6685 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6686 build_int_2 (-STACK_POINTER_OFFSET, -1));
6687 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6688 TREE_SIDE_EFFECTS (t) = 1;
6689 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6692 /* Implement va_arg by updating the va_list structure
6693 VALIST as required to retrieve an argument of type
6694 TYPE, and returning that argument.
6696 Generates code equivalent to:
6698 if (integral value) {
6699 if (size <= 4 && args.gpr < 5 ||
6700 size > 4 && args.gpr < 4 )
6701 ret = args.reg_save_area[args.gpr+8]
6703 ret = *args.overflow_arg_area++;
6704 } else if (float value) {
6706 ret = args.reg_save_area[args.fpr+64]
6708 ret = *args.overflow_arg_area++;
6709 } else if (aggregate value) {
6711 ret = *args.reg_save_area[args.gpr]
6713 ret = **args.overflow_arg_area++;
6717 s390_gimplify_va_arg (tree valist, tree type, tree *pre_p,
6718 tree *post_p ATTRIBUTE_UNUSED)
6720 tree f_gpr, f_fpr, f_ovf, f_sav;
6721 tree gpr, fpr, ovf, sav, reg, t, u;
6722 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6723 tree lab_false, lab_over, addr;
6725 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6726 f_fpr = TREE_CHAIN (f_gpr);
6727 f_ovf = TREE_CHAIN (f_fpr);
6728 f_sav = TREE_CHAIN (f_ovf);
6730 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6731 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
6732 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
6733 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
6734 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
6736 size = int_size_in_bytes (type);
6738 if (pass_by_reference (NULL, TYPE_MODE (type), type, false))
6740 if (TARGET_DEBUG_ARG)
6742 fprintf (stderr, "va_arg: aggregate type");
6746 /* Aggregates are passed by reference. */
6750 sav_ofs = 2 * UNITS_PER_WORD;
6751 sav_scale = UNITS_PER_WORD;
6752 size = UNITS_PER_WORD;
6755 else if (s390_function_arg_float (TYPE_MODE (type), type))
6757 if (TARGET_DEBUG_ARG)
6759 fprintf (stderr, "va_arg: float type");
6763 /* FP args go in FP registers, if present. */
6767 sav_ofs = 16 * UNITS_PER_WORD;
6769 /* TARGET_64BIT has up to 4 parameter in fprs */
6770 max_reg = TARGET_64BIT ? 3 : 1;
6774 if (TARGET_DEBUG_ARG)
6776 fprintf (stderr, "va_arg: other type");
6780 /* Otherwise into GP registers. */
6783 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6784 sav_ofs = 2 * UNITS_PER_WORD;
6786 if (size < UNITS_PER_WORD)
6787 sav_ofs += UNITS_PER_WORD - size;
6789 sav_scale = UNITS_PER_WORD;
6796 /* Pull the value out of the saved registers ... */
6798 lab_false = create_artificial_label ();
6799 lab_over = create_artificial_label ();
6800 addr = create_tmp_var (ptr_type_node, "addr");
6802 t = fold_convert (TREE_TYPE (reg), size_int (max_reg));
6803 t = build2 (GT_EXPR, boolean_type_node, reg, t);
6804 u = build1 (GOTO_EXPR, void_type_node, lab_false);
6805 t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE);
6806 gimplify_and_add (t, pre_p);
6808 t = build2 (PLUS_EXPR, ptr_type_node, sav,
6809 fold_convert (ptr_type_node, size_int (sav_ofs)));
6810 u = build2 (MULT_EXPR, TREE_TYPE (reg), reg,
6811 fold_convert (TREE_TYPE (reg), size_int (sav_scale)));
6812 t = build2 (PLUS_EXPR, ptr_type_node, t, fold_convert (ptr_type_node, u));
6814 t = build2 (MODIFY_EXPR, void_type_node, addr, t);
6815 gimplify_and_add (t, pre_p);
6817 t = build1 (GOTO_EXPR, void_type_node, lab_over);
6818 gimplify_and_add (t, pre_p);
6820 t = build1 (LABEL_EXPR, void_type_node, lab_false);
6821 append_to_statement_list (t, pre_p);
6824 /* ... Otherwise out of the overflow area. */
6827 if (size < UNITS_PER_WORD)
6828 t = build2 (PLUS_EXPR, ptr_type_node, t,
6829 fold_convert (ptr_type_node, size_int (UNITS_PER_WORD - size)));
6831 gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
6833 u = build2 (MODIFY_EXPR, void_type_node, addr, t);
6834 gimplify_and_add (u, pre_p);
6836 t = build2 (PLUS_EXPR, ptr_type_node, t,
6837 fold_convert (ptr_type_node, size_int (size)));
6838 t = build2 (MODIFY_EXPR, ptr_type_node, ovf, t);
6839 gimplify_and_add (t, pre_p);
6841 t = build1 (LABEL_EXPR, void_type_node, lab_over);
6842 append_to_statement_list (t, pre_p);
6845 /* Increment register save count. */
6847 u = build2 (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6848 fold_convert (TREE_TYPE (reg), size_int (n_reg)));
6849 gimplify_and_add (u, pre_p);
6853 t = build_pointer_type (build_pointer_type (type));
6854 addr = fold_convert (t, addr);
6855 addr = build_fold_indirect_ref (addr);
6859 t = build_pointer_type (type);
6860 addr = fold_convert (t, addr);
6863 return build_fold_indirect_ref (addr);
6871 S390_BUILTIN_THREAD_POINTER,
6872 S390_BUILTIN_SET_THREAD_POINTER,
6877 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6882 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6888 s390_init_builtins (void)
6892 ftype = build_function_type (ptr_type_node, void_list_node);
6893 lang_hooks.builtin_function ("__builtin_thread_pointer", ftype,
6894 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6897 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6898 lang_hooks.builtin_function ("__builtin_set_thread_pointer", ftype,
6899 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6903 /* Expand an expression EXP that calls a built-in function,
6904 with result going to TARGET if that's convenient
6905 (and in mode MODE if that's convenient).
6906 SUBTARGET may be used as the target for computing one of EXP's operands.
6907 IGNORE is nonzero if the value is to be ignored. */
6910 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6911 enum machine_mode mode ATTRIBUTE_UNUSED,
6912 int ignore ATTRIBUTE_UNUSED)
6916 unsigned int const *code_for_builtin =
6917 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6919 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6920 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6921 tree arglist = TREE_OPERAND (exp, 1);
6922 enum insn_code icode;
6923 rtx op[MAX_ARGS], pat;
6927 if (fcode >= S390_BUILTIN_max)
6928 internal_error ("bad builtin fcode");
6929 icode = code_for_builtin[fcode];
6931 internal_error ("bad builtin fcode");
6933 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6935 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6937 arglist = TREE_CHAIN (arglist), arity++)
6939 const struct insn_operand_data *insn_op;
6941 tree arg = TREE_VALUE (arglist);
6942 if (arg == error_mark_node)
6944 if (arity > MAX_ARGS)
6947 insn_op = &insn_data[icode].operand[arity + nonvoid];
6949 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6951 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6952 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6957 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6959 || GET_MODE (target) != tmode
6960 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6961 target = gen_reg_rtx (tmode);
6967 pat = GEN_FCN (icode) (target);
6971 pat = GEN_FCN (icode) (target, op[0]);
6973 pat = GEN_FCN (icode) (op[0]);
6976 pat = GEN_FCN (icode) (target, op[0], op[1]);
6992 /* Output assembly code for the trampoline template to
6995 On S/390, we use gpr 1 internally in the trampoline code;
6996 gpr 0 is used to hold the static chain. */
6999 s390_trampoline_template (FILE *file)
7003 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
7004 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
7005 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
7006 fprintf (file, "br\t%s\n", reg_names[1]);
7007 fprintf (file, "0:\t.quad\t0\n");
7008 fprintf (file, ".quad\t0\n");
7012 fprintf (file, "basr\t%s,0\n", reg_names[1]);
7013 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
7014 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
7015 fprintf (file, "br\t%s\n", reg_names[1]);
7016 fprintf (file, ".long\t0\n");
7017 fprintf (file, ".long\t0\n");
7021 /* Emit RTL insns to initialize the variable parts of a trampoline.
7022 FNADDR is an RTX for the address of the function's pure code.
7023 CXT is an RTX for the static chain value for the function. */
7026 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
7028 emit_move_insn (gen_rtx_MEM (Pmode,
7029 memory_address (Pmode,
7030 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
7031 emit_move_insn (gen_rtx_MEM (Pmode,
7032 memory_address (Pmode,
7033 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
7036 /* Return rtx for 64-bit constant formed from the 32-bit subwords
7037 LOW and HIGH, independent of the host word size. */
7040 s390_gen_rtx_const_DI (int high, int low)
7042 #if HOST_BITS_PER_WIDE_INT >= 64
7044 val = (HOST_WIDE_INT)high;
7046 val |= (HOST_WIDE_INT)low;
7048 return GEN_INT (val);
7050 #if HOST_BITS_PER_WIDE_INT >= 32
7051 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
7058 /* Output assembler code to FILE to increment profiler label # LABELNO
7059 for profiling a function entry. */
7062 s390_function_profiler (FILE *file, int labelno)
7067 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
7069 fprintf (file, "# function profiler \n");
7071 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
7072 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
7073 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
7075 op[2] = gen_rtx_REG (Pmode, 1);
7076 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
7077 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
7079 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
7082 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
7083 op[4] = gen_rtx_CONST (Pmode, op[4]);
7088 output_asm_insn ("stg\t%0,%1", op);
7089 output_asm_insn ("larl\t%2,%3", op);
7090 output_asm_insn ("brasl\t%0,%4", op);
7091 output_asm_insn ("lg\t%0,%1", op);
7095 op[6] = gen_label_rtx ();
7097 output_asm_insn ("st\t%0,%1", op);
7098 output_asm_insn ("bras\t%2,%l6", op);
7099 output_asm_insn (".long\t%4", op);
7100 output_asm_insn (".long\t%3", op);
7101 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7102 output_asm_insn ("l\t%0,0(%2)", op);
7103 output_asm_insn ("l\t%2,4(%2)", op);
7104 output_asm_insn ("basr\t%0,%0", op);
7105 output_asm_insn ("l\t%0,%1", op);
7109 op[5] = gen_label_rtx ();
7110 op[6] = gen_label_rtx ();
7112 output_asm_insn ("st\t%0,%1", op);
7113 output_asm_insn ("bras\t%2,%l6", op);
7114 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
7115 output_asm_insn (".long\t%4-%l5", op);
7116 output_asm_insn (".long\t%3-%l5", op);
7117 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7118 output_asm_insn ("lr\t%0,%2", op);
7119 output_asm_insn ("a\t%0,0(%2)", op);
7120 output_asm_insn ("a\t%2,4(%2)", op);
7121 output_asm_insn ("basr\t%0,%0", op);
7122 output_asm_insn ("l\t%0,%1", op);
7126 /* Select section for constant in constant pool. In 32-bit mode,
7127 constants go in the function section; in 64-bit mode in .rodata. */
7130 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
7131 rtx x ATTRIBUTE_UNUSED,
7132 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
7134 if (TARGET_CPU_ZARCH)
7135 readonly_data_section ();
7137 function_section (current_function_decl);
7140 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
7141 into its SYMBOL_REF_FLAGS. */
7144 s390_encode_section_info (tree decl, rtx rtl, int first)
7146 default_encode_section_info (decl, rtl, first);
7148 /* If a variable has a forced alignment to < 2 bytes, mark it with
7149 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
7150 if (TREE_CODE (decl) == VAR_DECL
7151 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
7152 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
7155 /* Output thunk to FILE that implements a C++ virtual function call (with
7156 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
7157 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
7158 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
7159 relative to the resulting this pointer. */
7162 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
7163 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
7169 /* Operand 0 is the target function. */
7170 op[0] = XEXP (DECL_RTL (function), 0);
7171 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
7174 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
7175 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
7176 op[0] = gen_rtx_CONST (Pmode, op[0]);
7179 /* Operand 1 is the 'this' pointer. */
7180 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
7181 op[1] = gen_rtx_REG (Pmode, 3);
7183 op[1] = gen_rtx_REG (Pmode, 2);
7185 /* Operand 2 is the delta. */
7186 op[2] = GEN_INT (delta);
7188 /* Operand 3 is the vcall_offset. */
7189 op[3] = GEN_INT (vcall_offset);
7191 /* Operand 4 is the temporary register. */
7192 op[4] = gen_rtx_REG (Pmode, 1);
7194 /* Operands 5 to 8 can be used as labels. */
7200 /* Operand 9 can be used for temporary register. */
7203 /* Generate code. */
7206 /* Setup literal pool pointer if required. */
7207 if ((!DISP_IN_RANGE (delta)
7208 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7209 || (!DISP_IN_RANGE (vcall_offset)
7210 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7212 op[5] = gen_label_rtx ();
7213 output_asm_insn ("larl\t%4,%5", op);
7216 /* Add DELTA to this pointer. */
7219 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7220 output_asm_insn ("la\t%1,%2(%1)", op);
7221 else if (DISP_IN_RANGE (delta))
7222 output_asm_insn ("lay\t%1,%2(%1)", op);
7223 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7224 output_asm_insn ("aghi\t%1,%2", op);
7227 op[6] = gen_label_rtx ();
7228 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
7232 /* Perform vcall adjustment. */
7235 if (DISP_IN_RANGE (vcall_offset))
7237 output_asm_insn ("lg\t%4,0(%1)", op);
7238 output_asm_insn ("ag\t%1,%3(%4)", op);
7240 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7242 output_asm_insn ("lghi\t%4,%3", op);
7243 output_asm_insn ("ag\t%4,0(%1)", op);
7244 output_asm_insn ("ag\t%1,0(%4)", op);
7248 op[7] = gen_label_rtx ();
7249 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
7250 output_asm_insn ("ag\t%4,0(%1)", op);
7251 output_asm_insn ("ag\t%1,0(%4)", op);
7255 /* Jump to target. */
7256 output_asm_insn ("jg\t%0", op);
7258 /* Output literal pool if required. */
7261 output_asm_insn (".align\t4", op);
7262 targetm.asm_out.internal_label (file, "L",
7263 CODE_LABEL_NUMBER (op[5]));
7267 targetm.asm_out.internal_label (file, "L",
7268 CODE_LABEL_NUMBER (op[6]));
7269 output_asm_insn (".long\t%2", op);
7273 targetm.asm_out.internal_label (file, "L",
7274 CODE_LABEL_NUMBER (op[7]));
7275 output_asm_insn (".long\t%3", op);
7280 /* Setup base pointer if required. */
7282 || (!DISP_IN_RANGE (delta)
7283 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7284 || (!DISP_IN_RANGE (delta)
7285 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7287 op[5] = gen_label_rtx ();
7288 output_asm_insn ("basr\t%4,0", op);
7289 targetm.asm_out.internal_label (file, "L",
7290 CODE_LABEL_NUMBER (op[5]));
7293 /* Add DELTA to this pointer. */
7296 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7297 output_asm_insn ("la\t%1,%2(%1)", op);
7298 else if (DISP_IN_RANGE (delta))
7299 output_asm_insn ("lay\t%1,%2(%1)", op);
7300 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7301 output_asm_insn ("ahi\t%1,%2", op);
7304 op[6] = gen_label_rtx ();
7305 output_asm_insn ("a\t%1,%6-%5(%4)", op);
7309 /* Perform vcall adjustment. */
7312 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
7314 output_asm_insn ("lg\t%4,0(%1)", op);
7315 output_asm_insn ("a\t%1,%3(%4)", op);
7317 else if (DISP_IN_RANGE (vcall_offset))
7319 output_asm_insn ("lg\t%4,0(%1)", op);
7320 output_asm_insn ("ay\t%1,%3(%4)", op);
7322 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7324 output_asm_insn ("lhi\t%4,%3", op);
7325 output_asm_insn ("a\t%4,0(%1)", op);
7326 output_asm_insn ("a\t%1,0(%4)", op);
7330 op[7] = gen_label_rtx ();
7331 output_asm_insn ("l\t%4,%7-%5(%4)", op);
7332 output_asm_insn ("a\t%4,0(%1)", op);
7333 output_asm_insn ("a\t%1,0(%4)", op);
7336 /* We had to clobber the base pointer register.
7337 Re-setup the base pointer (with a different base). */
7338 op[5] = gen_label_rtx ();
7339 output_asm_insn ("basr\t%4,0", op);
7340 targetm.asm_out.internal_label (file, "L",
7341 CODE_LABEL_NUMBER (op[5]));
7344 /* Jump to target. */
7345 op[8] = gen_label_rtx ();
7348 output_asm_insn ("l\t%4,%8-%5(%4)", op);
7350 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7351 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7352 else if (flag_pic == 1)
7354 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7355 output_asm_insn ("l\t%4,%0(%4)", op);
7357 else if (flag_pic == 2)
7359 op[9] = gen_rtx_REG (Pmode, 0);
7360 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7361 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7362 output_asm_insn ("ar\t%4,%9", op);
7363 output_asm_insn ("l\t%4,0(%4)", op);
7366 output_asm_insn ("br\t%4", op);
7368 /* Output literal pool. */
7369 output_asm_insn (".align\t4", op);
7371 if (nonlocal && flag_pic == 2)
7372 output_asm_insn (".long\t%0", op);
7375 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7376 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7379 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7381 output_asm_insn (".long\t%0", op);
7383 output_asm_insn (".long\t%0-%5", op);
7387 targetm.asm_out.internal_label (file, "L",
7388 CODE_LABEL_NUMBER (op[6]));
7389 output_asm_insn (".long\t%2", op);
7393 targetm.asm_out.internal_label (file, "L",
7394 CODE_LABEL_NUMBER (op[7]));
7395 output_asm_insn (".long\t%3", op);
7401 s390_valid_pointer_mode (enum machine_mode mode)
7403 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7406 /* How to allocate a 'struct machine_function'. */
7408 static struct machine_function *
7409 s390_init_machine_status (void)
7411 return ggc_alloc_cleared (sizeof (struct machine_function));
7414 /* Checks whether the given ARGUMENT_LIST would use a caller
7415 saved register. This is used to decide whether sibling call
7416 optimization could be performed on the respective function
7420 s390_call_saved_register_used (tree argument_list)
7422 CUMULATIVE_ARGS cum;
7424 enum machine_mode mode;
7429 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
7431 while (argument_list)
7433 parameter = TREE_VALUE (argument_list);
7434 argument_list = TREE_CHAIN (argument_list);
7439 /* For an undeclared variable passed as parameter we will get
7440 an ERROR_MARK node here. */
7441 if (TREE_CODE (parameter) == ERROR_MARK)
7444 if (! (type = TREE_TYPE (parameter)))
7447 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
7450 if (pass_by_reference (&cum, mode, type, true))
7453 type = build_pointer_type (type);
7456 parm_rtx = s390_function_arg (&cum, mode, type, 0);
7458 s390_function_arg_advance (&cum, mode, type, 0);
7460 if (parm_rtx && REG_P (parm_rtx))
7463 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
7465 if (! call_used_regs[reg + REGNO (parm_rtx)])
7472 /* Return true if the given call expression can be
7473 turned into a sibling call.
7474 DECL holds the declaration of the function to be called whereas
7475 EXP is the call expression itself. */
7478 s390_function_ok_for_sibcall (tree decl, tree exp)
7480 /* The TPF epilogue uses register 1. */
7481 if (TARGET_TPF_PROFILING)
7484 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
7485 which would have to be restored before the sibcall. */
7486 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
7489 /* Register 6 on s390 is available as an argument register but unfortunately
7490 "caller saved". This makes functions needing this register for arguments
7491 not suitable for sibcalls. */
7492 if (TREE_OPERAND (exp, 1)
7493 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
7499 /* This function is used by the call expanders of the machine description.
7500 It emits the call insn itself together with the necessary operations
7501 to adjust the target address and returns the emitted insn.
7502 ADDR_LOCATION is the target address rtx
7503 TLS_CALL the location of the thread-local symbol
7504 RESULT_REG the register where the result of the call should be stored
7505 RETADDR_REG the register where the return address should be stored
7506 If this parameter is NULL_RTX the call is considered
7507 to be a sibling call. */
7510 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
7513 bool plt_call = false;
7519 /* Direct function calls need special treatment. */
7520 if (GET_CODE (addr_location) == SYMBOL_REF)
7522 /* When calling a global routine in PIC mode, we must
7523 replace the symbol itself with the PLT stub. */
7524 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
7526 addr_location = gen_rtx_UNSPEC (Pmode,
7527 gen_rtvec (1, addr_location),
7529 addr_location = gen_rtx_CONST (Pmode, addr_location);
7533 /* Unless we can use the bras(l) insn, force the
7534 routine address into a register. */
7535 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
7538 addr_location = legitimize_pic_address (addr_location, 0);
7540 addr_location = force_reg (Pmode, addr_location);
7544 /* If it is already an indirect call or the code above moved the
7545 SYMBOL_REF to somewhere else make sure the address can be found in
7547 if (retaddr_reg == NULL_RTX
7548 && GET_CODE (addr_location) != SYMBOL_REF
7551 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
7552 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
7555 addr_location = gen_rtx_MEM (QImode, addr_location);
7556 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
7558 if (result_reg != NULL_RTX)
7559 call = gen_rtx_SET (VOIDmode, result_reg, call);
7561 if (retaddr_reg != NULL_RTX)
7563 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
7565 if (tls_call != NULL_RTX)
7566 vec = gen_rtvec (3, call, clobber,
7567 gen_rtx_USE (VOIDmode, tls_call));
7569 vec = gen_rtvec (2, call, clobber);
7571 call = gen_rtx_PARALLEL (VOIDmode, vec);
7574 insn = emit_call_insn (call);
7576 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
7577 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
7579 /* s390_function_ok_for_sibcall should
7580 have denied sibcalls in this case. */
7581 if (retaddr_reg == NULL_RTX)
7584 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
7589 /* Implement CONDITIONAL_REGISTER_USAGE. */
7592 s390_conditional_register_usage (void)
7598 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7599 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7601 if (TARGET_CPU_ZARCH)
7603 fixed_regs[RETURN_REGNUM] = 0;
7604 call_used_regs[RETURN_REGNUM] = 0;
7608 for (i = 24; i < 32; i++)
7609 call_used_regs[i] = call_really_used_regs[i] = 0;
7613 for (i = 18; i < 20; i++)
7614 call_used_regs[i] = call_really_used_regs[i] = 0;
7619 #include "gt-s390.h"