1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
53 #include "tree-gimple.h"
55 /* Machine-specific symbol_ref flags. */
56 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
59 static bool s390_assemble_integer (rtx, unsigned int, int);
60 static void s390_select_rtx_section (enum machine_mode, rtx,
61 unsigned HOST_WIDE_INT);
62 static void s390_encode_section_info (tree, rtx, int);
63 static bool s390_cannot_force_const_mem (rtx);
64 static rtx s390_delegitimize_address (rtx);
65 static bool s390_return_in_memory (tree, tree);
66 static void s390_init_builtins (void);
67 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
68 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
70 static enum attr_type s390_safe_attr_type (rtx);
72 static int s390_adjust_cost (rtx, rtx, rtx, int);
73 static int s390_adjust_priority (rtx, int);
74 static int s390_issue_rate (void);
75 static int s390_first_cycle_multipass_dfa_lookahead (void);
76 static bool s390_rtx_costs (rtx, int, int, int *);
77 static int s390_address_cost (rtx);
78 static void s390_reorg (void);
79 static bool s390_valid_pointer_mode (enum machine_mode);
80 static tree s390_build_builtin_va_list (void);
81 static tree s390_gimplify_va_arg (tree, tree, tree *, tree *);
82 static bool s390_function_ok_for_sibcall (tree, tree);
83 static bool s390_call_saved_register_used (tree);
84 static bool s390_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode mode,
87 #undef TARGET_ASM_ALIGNED_HI_OP
88 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
89 #undef TARGET_ASM_ALIGNED_DI_OP
90 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
91 #undef TARGET_ASM_INTEGER
92 #define TARGET_ASM_INTEGER s390_assemble_integer
94 #undef TARGET_ASM_OPEN_PAREN
95 #define TARGET_ASM_OPEN_PAREN ""
97 #undef TARGET_ASM_CLOSE_PAREN
98 #define TARGET_ASM_CLOSE_PAREN ""
100 #undef TARGET_ASM_SELECT_RTX_SECTION
101 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
103 #undef TARGET_ENCODE_SECTION_INFO
104 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
107 #undef TARGET_HAVE_TLS
108 #define TARGET_HAVE_TLS true
110 #undef TARGET_CANNOT_FORCE_CONST_MEM
111 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
113 #undef TARGET_DELEGITIMIZE_ADDRESS
114 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
116 #undef TARGET_RETURN_IN_MEMORY
117 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
119 #undef TARGET_INIT_BUILTINS
120 #define TARGET_INIT_BUILTINS s390_init_builtins
121 #undef TARGET_EXPAND_BUILTIN
122 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
124 #undef TARGET_ASM_OUTPUT_MI_THUNK
125 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
126 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
127 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
129 #undef TARGET_SCHED_ADJUST_COST
130 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
131 #undef TARGET_SCHED_ADJUST_PRIORITY
132 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
133 #undef TARGET_SCHED_ISSUE_RATE
134 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
135 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
136 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
137 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
138 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
140 #undef TARGET_RTX_COSTS
141 #define TARGET_RTX_COSTS s390_rtx_costs
142 #undef TARGET_ADDRESS_COST
143 #define TARGET_ADDRESS_COST s390_address_cost
145 #undef TARGET_MACHINE_DEPENDENT_REORG
146 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
148 #undef TARGET_VALID_POINTER_MODE
149 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
151 #undef TARGET_BUILD_BUILTIN_VA_LIST
152 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
153 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
154 #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg
156 #undef TARGET_PROMOTE_FUNCTION_ARGS
157 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
158 #undef TARGET_PROMOTE_FUNCTION_RETURN
159 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
160 #undef TARGET_PASS_BY_REFERENCE
161 #define TARGET_PASS_BY_REFERENCE s390_pass_by_reference
163 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
164 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
166 struct gcc_target targetm = TARGET_INITIALIZER;
168 extern int reload_completed;
170 /* The alias set for prologue/epilogue register save/restore. */
171 static int s390_sr_alias_set = 0;
173 /* Save information from a "cmpxx" operation until the branch or scc is
175 rtx s390_compare_op0, s390_compare_op1;
177 /* Structure used to hold the components of a S/390 memory
178 address. A legitimate address on S/390 is of the general
180 base + index + displacement
181 where any of the components is optional.
183 base and index are registers of the class ADDR_REGS,
184 displacement is an unsigned 12-bit immediate constant. */
194 /* Which cpu are we tuning for. */
195 enum processor_type s390_tune;
196 enum processor_flags s390_tune_flags;
197 /* Which instruction set architecture to use. */
198 enum processor_type s390_arch;
199 enum processor_flags s390_arch_flags;
201 /* Strings to hold which cpu and instruction set architecture to use. */
202 const char *s390_tune_string; /* for -mtune=<xxx> */
203 const char *s390_arch_string; /* for -march=<xxx> */
205 /* Define the structure for the machine field in struct function. */
207 struct machine_function GTY(())
209 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
212 /* Set if return address needs to be saved. */
213 bool save_return_addr_p;
215 /* Number of first and last gpr to be saved, restored. */
217 int first_restore_gpr;
219 int last_restore_gpr;
221 /* Size of stack frame. */
222 HOST_WIDE_INT frame_size;
224 /* Literal pool base register. */
227 /* Some local-dynamic TLS symbol name. */
228 const char *some_ld_name;
231 static int s390_match_ccmode_set (rtx, enum machine_mode);
232 static int s390_branch_condition_mask (rtx);
233 static const char *s390_branch_condition_mnemonic (rtx, int);
234 static int check_mode (rtx, enum machine_mode *);
235 static int general_s_operand (rtx, enum machine_mode, int);
236 static int s390_short_displacement (rtx);
237 static int s390_decompose_address (rtx, struct s390_address *);
238 static rtx get_thread_pointer (void);
239 static rtx legitimize_tls_address (rtx, rtx);
240 static void print_shift_count_operand (FILE *, rtx);
241 static const char *get_some_local_dynamic_name (void);
242 static int get_some_local_dynamic_name_1 (rtx *, void *);
243 static int reg_used_in_mem_p (int, rtx);
244 static int addr_generation_dependency_p (rtx, rtx);
245 static int s390_split_branches (void);
246 static void annotate_constant_pool_refs (rtx *x);
247 static void find_constant_pool_ref (rtx, rtx *);
248 static void replace_constant_pool_ref (rtx *, rtx, rtx);
249 static rtx find_ltrel_base (rtx);
250 static void replace_ltrel_base (rtx *);
251 static void s390_optimize_prolog (bool);
252 static int find_unused_clobbered_reg (void);
253 static void s390_frame_info (int, int);
254 static rtx save_fpr (rtx, int, int);
255 static rtx restore_fpr (rtx, int, int);
256 static rtx save_gprs (rtx, int, int, int);
257 static rtx restore_gprs (rtx, int, int, int);
258 static int s390_function_arg_size (enum machine_mode, tree);
259 static bool s390_function_arg_float (enum machine_mode, tree);
260 static struct machine_function * s390_init_machine_status (void);
262 /* Check whether integer displacement is in range. */
263 #define DISP_IN_RANGE(d) \
264 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
265 : ((d) >= 0 && (d) <= 4095))
267 /* Return true if SET either doesn't set the CC register, or else
268 the source and destination have matching CC modes and that
269 CC mode is at least as constrained as REQ_MODE. */
272 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
274 enum machine_mode set_mode;
276 if (GET_CODE (set) != SET)
279 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
282 set_mode = GET_MODE (SET_DEST (set));
296 if (req_mode != set_mode)
301 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
302 && req_mode != CCSRmode && req_mode != CCURmode)
308 if (req_mode != CCAmode)
316 return (GET_MODE (SET_SRC (set)) == set_mode);
319 /* Return true if every SET in INSN that sets the CC register
320 has source and destination with matching CC modes and that
321 CC mode is at least as constrained as REQ_MODE.
322 If REQ_MODE is VOIDmode, always return false. */
325 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
329 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
330 if (req_mode == VOIDmode)
333 if (GET_CODE (PATTERN (insn)) == SET)
334 return s390_match_ccmode_set (PATTERN (insn), req_mode);
336 if (GET_CODE (PATTERN (insn)) == PARALLEL)
337 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
339 rtx set = XVECEXP (PATTERN (insn), 0, i);
340 if (GET_CODE (set) == SET)
341 if (!s390_match_ccmode_set (set, req_mode))
348 /* If a test-under-mask instruction can be used to implement
349 (compare (and ... OP1) OP2), return the CC mode required
350 to do that. Otherwise, return VOIDmode.
351 MIXED is true if the instruction can distinguish between
352 CC1 and CC2 for mixed selected bits (TMxx), it is false
353 if the instruction cannot (TM). */
356 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
360 /* ??? Fixme: should work on CONST_DOUBLE as well. */
361 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
364 /* Selected bits all zero: CC0. */
365 if (INTVAL (op2) == 0)
368 /* Selected bits all one: CC3. */
369 if (INTVAL (op2) == INTVAL (op1))
372 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
375 bit1 = exact_log2 (INTVAL (op2));
376 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
377 if (bit0 != -1 && bit1 != -1)
378 return bit0 > bit1 ? CCT1mode : CCT2mode;
384 /* Given a comparison code OP (EQ, NE, etc.) and the operands
385 OP0 and OP1 of a COMPARE, return the mode to be used for the
389 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
395 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
396 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
398 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
399 || GET_CODE (op1) == NEG)
400 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
403 if (GET_CODE (op0) == AND)
405 /* Check whether we can potentially do it via TM. */
406 enum machine_mode ccmode;
407 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
408 if (ccmode != VOIDmode)
410 /* Relax CCTmode to CCZmode to allow fall-back to AND
411 if that turns out to be beneficial. */
412 return ccmode == CCTmode ? CCZmode : ccmode;
416 if (register_operand (op0, HImode)
417 && GET_CODE (op1) == CONST_INT
418 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
420 if (register_operand (op0, QImode)
421 && GET_CODE (op1) == CONST_INT
422 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
431 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
432 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
434 if (INTVAL (XEXP((op0), 1)) < 0)
447 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
448 && GET_CODE (op1) != CONST_INT)
454 if (GET_CODE (op0) == PLUS
455 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
458 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
459 && GET_CODE (op1) != CONST_INT)
465 if (GET_CODE (op0) == MINUS
466 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
469 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
470 && GET_CODE (op1) != CONST_INT)
479 /* Emit a compare instruction suitable to implement the comparison
480 OP0 CODE OP1. Return the correct condition RTL to be placed in
481 the IF_THEN_ELSE of the conditional branch testing the result. */
484 s390_emit_compare (enum rtx_code code, rtx op0, rtx op1)
486 enum machine_mode mode = s390_select_ccmode (code, op0, op1);
487 rtx cc = gen_rtx_REG (mode, CC_REGNUM);
489 emit_insn (gen_rtx_SET (VOIDmode, cc, gen_rtx_COMPARE (mode, op0, op1)));
490 return gen_rtx_fmt_ee (code, VOIDmode, cc, const0_rtx);
493 /* Emit a jump instruction to TARGET. If COND is NULL_RTX, emit an
494 unconditional jump, else a conditional jump under condition COND. */
497 s390_emit_jump (rtx target, rtx cond)
501 target = gen_rtx_LABEL_REF (VOIDmode, target);
503 target = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, target, pc_rtx);
505 insn = gen_rtx_SET (VOIDmode, pc_rtx, target);
506 emit_jump_insn (insn);
509 /* Return nonzero if OP is a valid comparison operator
510 for an ALC condition in mode MODE. */
513 s390_alc_comparison (rtx op, enum machine_mode mode)
515 if (mode != VOIDmode && mode != GET_MODE (op))
518 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
521 if (!COMPARISON_P (op))
524 if (GET_CODE (XEXP (op, 0)) != REG
525 || REGNO (XEXP (op, 0)) != CC_REGNUM
526 || XEXP (op, 1) != const0_rtx)
529 switch (GET_MODE (XEXP (op, 0)))
532 return GET_CODE (op) == LTU;
535 return GET_CODE (op) == LEU;
538 return GET_CODE (op) == GEU;
541 return GET_CODE (op) == GTU;
544 return GET_CODE (op) == LTU;
547 return GET_CODE (op) == UNGT;
550 return GET_CODE (op) == UNLT;
557 /* Return nonzero if OP is a valid comparison operator
558 for an SLB condition in mode MODE. */
561 s390_slb_comparison (rtx op, enum machine_mode mode)
563 if (mode != VOIDmode && mode != GET_MODE (op))
566 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
569 if (!COMPARISON_P (op))
572 if (GET_CODE (XEXP (op, 0)) != REG
573 || REGNO (XEXP (op, 0)) != CC_REGNUM
574 || XEXP (op, 1) != const0_rtx)
577 switch (GET_MODE (XEXP (op, 0)))
580 return GET_CODE (op) == GEU;
583 return GET_CODE (op) == GTU;
586 return GET_CODE (op) == LTU;
589 return GET_CODE (op) == LEU;
592 return GET_CODE (op) == GEU;
595 return GET_CODE (op) == LE;
598 return GET_CODE (op) == GE;
605 /* Return branch condition mask to implement a branch
606 specified by CODE. */
609 s390_branch_condition_mask (rtx code)
611 const int CC0 = 1 << 3;
612 const int CC1 = 1 << 2;
613 const int CC2 = 1 << 1;
614 const int CC3 = 1 << 0;
616 if (GET_CODE (XEXP (code, 0)) != REG
617 || REGNO (XEXP (code, 0)) != CC_REGNUM
618 || XEXP (code, 1) != const0_rtx)
621 switch (GET_MODE (XEXP (code, 0)))
624 switch (GET_CODE (code))
627 case NE: return CC1 | CC2 | CC3;
634 switch (GET_CODE (code))
637 case NE: return CC0 | CC2 | CC3;
644 switch (GET_CODE (code))
647 case NE: return CC0 | CC1 | CC3;
654 switch (GET_CODE (code))
657 case NE: return CC0 | CC1 | CC2;
664 switch (GET_CODE (code))
666 case EQ: return CC0 | CC2;
667 case NE: return CC1 | CC3;
674 switch (GET_CODE (code))
676 case LTU: return CC2 | CC3; /* carry */
677 case GEU: return CC0 | CC1; /* no carry */
684 switch (GET_CODE (code))
686 case GTU: return CC0 | CC1; /* borrow */
687 case LEU: return CC2 | CC3; /* no borrow */
694 switch (GET_CODE (code))
696 case EQ: return CC0 | CC2;
697 case NE: return CC1 | CC3;
698 case LTU: return CC1;
699 case GTU: return CC3;
700 case LEU: return CC1 | CC2;
701 case GEU: return CC2 | CC3;
707 switch (GET_CODE (code))
710 case NE: return CC1 | CC2 | CC3;
711 case LTU: return CC1;
712 case GTU: return CC2;
713 case LEU: return CC0 | CC1;
714 case GEU: return CC0 | CC2;
721 switch (GET_CODE (code))
724 case NE: return CC2 | CC1 | CC3;
725 case LTU: return CC2;
726 case GTU: return CC1;
727 case LEU: return CC0 | CC2;
728 case GEU: return CC0 | CC1;
735 switch (GET_CODE (code))
738 case NE: return CC1 | CC2 | CC3;
739 case LT: return CC1 | CC3;
741 case LE: return CC0 | CC1 | CC3;
742 case GE: return CC0 | CC2;
749 switch (GET_CODE (code))
752 case NE: return CC1 | CC2 | CC3;
754 case GT: return CC2 | CC3;
755 case LE: return CC0 | CC1;
756 case GE: return CC0 | CC2 | CC3;
763 switch (GET_CODE (code))
766 case NE: return CC1 | CC2 | CC3;
769 case LE: return CC0 | CC1;
770 case GE: return CC0 | CC2;
771 case UNORDERED: return CC3;
772 case ORDERED: return CC0 | CC1 | CC2;
773 case UNEQ: return CC0 | CC3;
774 case UNLT: return CC1 | CC3;
775 case UNGT: return CC2 | CC3;
776 case UNLE: return CC0 | CC1 | CC3;
777 case UNGE: return CC0 | CC2 | CC3;
778 case LTGT: return CC1 | CC2;
785 switch (GET_CODE (code))
788 case NE: return CC2 | CC1 | CC3;
791 case LE: return CC0 | CC2;
792 case GE: return CC0 | CC1;
793 case UNORDERED: return CC3;
794 case ORDERED: return CC0 | CC2 | CC1;
795 case UNEQ: return CC0 | CC3;
796 case UNLT: return CC2 | CC3;
797 case UNGT: return CC1 | CC3;
798 case UNLE: return CC0 | CC2 | CC3;
799 case UNGE: return CC0 | CC1 | CC3;
800 case LTGT: return CC2 | CC1;
811 /* If INV is false, return assembler mnemonic string to implement
812 a branch specified by CODE. If INV is true, return mnemonic
813 for the corresponding inverted branch. */
816 s390_branch_condition_mnemonic (rtx code, int inv)
818 static const char *const mnemonic[16] =
820 NULL, "o", "h", "nle",
821 "l", "nhe", "lh", "ne",
822 "e", "nlh", "he", "nl",
823 "le", "nh", "no", NULL
826 int mask = s390_branch_condition_mask (code);
831 if (mask < 1 || mask > 14)
834 return mnemonic[mask];
837 /* Return the part of op which has a value different from def.
838 The size of the part is determined by mode.
839 Use this function only if you already know that op really
840 contains such a part. */
842 unsigned HOST_WIDE_INT
843 s390_extract_part (rtx op, enum machine_mode mode, int def)
845 unsigned HOST_WIDE_INT value = 0;
846 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
847 int part_bits = GET_MODE_BITSIZE (mode);
848 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
851 for (i = 0; i < max_parts; i++)
854 value = (unsigned HOST_WIDE_INT) INTVAL (op);
858 if ((value & part_mask) != (def & part_mask))
859 return value & part_mask;
865 /* If OP is an integer constant of mode MODE with exactly one
866 part of mode PART_MODE unequal to DEF, return the number of that
867 part. Otherwise, return -1. */
870 s390_single_part (rtx op,
871 enum machine_mode mode,
872 enum machine_mode part_mode,
875 unsigned HOST_WIDE_INT value = 0;
876 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
877 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
880 if (GET_CODE (op) != CONST_INT)
883 for (i = 0; i < n_parts; i++)
886 value = (unsigned HOST_WIDE_INT) INTVAL (op);
888 value >>= GET_MODE_BITSIZE (part_mode);
890 if ((value & part_mask) != (def & part_mask))
898 return part == -1 ? -1 : n_parts - 1 - part;
901 /* Check whether we can (and want to) split a double-word
902 move in mode MODE from SRC to DST into two single-word
903 moves, moving the subword FIRST_SUBWORD first. */
906 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
908 /* Floating point registers cannot be split. */
909 if (FP_REG_P (src) || FP_REG_P (dst))
912 /* We don't need to split if operands are directly accessible. */
913 if (s_operand (src, mode) || s_operand (dst, mode))
916 /* Non-offsettable memory references cannot be split. */
917 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
918 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
921 /* Moving the first subword must not clobber a register
922 needed to move the second subword. */
923 if (register_operand (dst, mode))
925 rtx subreg = operand_subword (dst, first_subword, 0, mode);
926 if (reg_overlap_mentioned_p (subreg, src))
934 /* Change optimizations to be performed, depending on the
937 LEVEL is the optimization level specified; 2 if `-O2' is
938 specified, 1 if `-O' is specified, and 0 if neither is specified.
940 SIZE is nonzero if `-Os' is specified and zero otherwise. */
943 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
945 /* ??? There are apparently still problems with -fcaller-saves. */
946 flag_caller_saves = 0;
948 /* By default, always emit DWARF-2 unwind info. This allows debugging
949 without maintaining a stack frame back-chain. */
950 flag_asynchronous_unwind_tables = 1;
954 override_options (void)
959 const char *const name; /* processor name or nickname. */
960 const enum processor_type processor;
961 const enum processor_flags flags;
963 const processor_alias_table[] =
965 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
966 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
967 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
968 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
969 | PF_LONG_DISPLACEMENT},
972 int const pta_size = ARRAY_SIZE (processor_alias_table);
974 /* Acquire a unique set number for our register saves and restores. */
975 s390_sr_alias_set = new_alias_set ();
977 /* Set up function hooks. */
978 init_machine_status = s390_init_machine_status;
980 /* Architecture mode defaults according to ABI. */
981 if (!(target_flags_explicit & MASK_ZARCH))
984 target_flags |= MASK_ZARCH;
986 target_flags &= ~MASK_ZARCH;
989 /* Determine processor architectural level. */
990 if (!s390_arch_string)
991 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
993 for (i = 0; i < pta_size; i++)
994 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
996 s390_arch = processor_alias_table[i].processor;
997 s390_arch_flags = processor_alias_table[i].flags;
1001 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1003 /* Determine processor to tune for. */
1004 if (!s390_tune_string)
1006 s390_tune = s390_arch;
1007 s390_tune_flags = s390_arch_flags;
1008 s390_tune_string = s390_arch_string;
1012 for (i = 0; i < pta_size; i++)
1013 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1015 s390_tune = processor_alias_table[i].processor;
1016 s390_tune_flags = processor_alias_table[i].flags;
1020 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1023 /* Sanity checks. */
1024 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1025 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1026 if (TARGET_64BIT && !TARGET_ZARCH)
1027 error ("64-bit ABI not supported in ESA/390 mode.");
1030 /* Map for smallest class containing reg regno. */
1032 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1033 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1034 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1035 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1036 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1037 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1038 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1039 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1040 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1041 ADDR_REGS, NO_REGS, ADDR_REGS
1044 /* Return attribute type of insn. */
1046 static enum attr_type
1047 s390_safe_attr_type (rtx insn)
1049 if (recog_memoized (insn) >= 0)
1050 return get_attr_type (insn);
1055 /* Return true if OP a (const_int 0) operand.
1056 OP is the current operation.
1057 MODE is the current operation mode. */
1060 const0_operand (register rtx op, enum machine_mode mode)
1062 return op == CONST0_RTX (mode);
1065 /* Return true if OP is constant.
1066 OP is the current operation.
1067 MODE is the current operation mode. */
1070 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1072 return CONSTANT_P (op);
1075 /* Return true if the mode of operand OP matches MODE.
1076 If MODE is set to VOIDmode, set it to the mode of OP. */
1079 check_mode (register rtx op, enum machine_mode *mode)
1081 if (*mode == VOIDmode)
1082 *mode = GET_MODE (op);
1085 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1091 /* Return true if OP a valid operand for the LARL instruction.
1092 OP is the current operation.
1093 MODE is the current operation mode. */
1096 larl_operand (register rtx op, enum machine_mode mode)
1098 if (! check_mode (op, &mode))
1101 /* Allow labels and local symbols. */
1102 if (GET_CODE (op) == LABEL_REF)
1104 if (GET_CODE (op) == SYMBOL_REF)
1105 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1106 && SYMBOL_REF_TLS_MODEL (op) == 0
1107 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1109 /* Everything else must have a CONST, so strip it. */
1110 if (GET_CODE (op) != CONST)
1114 /* Allow adding *even* in-range constants. */
1115 if (GET_CODE (op) == PLUS)
1117 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1118 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1120 #if HOST_BITS_PER_WIDE_INT > 32
1121 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1122 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1128 /* Labels and local symbols allowed here as well. */
1129 if (GET_CODE (op) == LABEL_REF)
1131 if (GET_CODE (op) == SYMBOL_REF)
1132 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1133 && SYMBOL_REF_TLS_MODEL (op) == 0
1134 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1136 /* Now we must have a @GOTENT offset or @PLT stub
1137 or an @INDNTPOFF TLS offset. */
1138 if (GET_CODE (op) == UNSPEC
1139 && XINT (op, 1) == UNSPEC_GOTENT)
1141 if (GET_CODE (op) == UNSPEC
1142 && XINT (op, 1) == UNSPEC_PLT)
1144 if (GET_CODE (op) == UNSPEC
1145 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1151 /* Helper routine to implement s_operand and s_imm_operand.
1152 OP is the current operation.
1153 MODE is the current operation mode.
1154 ALLOW_IMMEDIATE specifies whether immediate operands should
1155 be accepted or not. */
1158 general_s_operand (register rtx op, enum machine_mode mode,
1159 int allow_immediate)
1161 struct s390_address addr;
1163 /* Call general_operand first, so that we don't have to
1164 check for many special cases. */
1165 if (!general_operand (op, mode))
1168 /* Just like memory_operand, allow (subreg (mem ...))
1170 if (reload_completed
1171 && GET_CODE (op) == SUBREG
1172 && GET_CODE (SUBREG_REG (op)) == MEM)
1173 op = SUBREG_REG (op);
1175 switch (GET_CODE (op))
1177 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1178 is true and we are still before reload. */
1181 if (!allow_immediate || reload_completed)
1185 /* Memory operands are OK unless they already use an
1188 if (!s390_decompose_address (XEXP (op, 0), &addr))
1192 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1193 is true. This prevents compares between two literal pool
1194 entries from being accepted. */
1195 if (!allow_immediate
1196 && addr.base && REGNO (addr.base) == BASE_REGNUM)
1207 /* Return true if OP is a valid S-type operand.
1208 OP is the current operation.
1209 MODE is the current operation mode. */
1212 s_operand (register rtx op, enum machine_mode mode)
1214 return general_s_operand (op, mode, 0);
1217 /* Return true if OP is a valid S-type operand or an immediate
1218 operand that can be addressed as S-type operand by forcing
1219 it into the literal pool.
1220 OP is the current operation.
1221 MODE is the current operation mode. */
1224 s_imm_operand (register rtx op, enum machine_mode mode)
1226 return general_s_operand (op, mode, 1);
1229 /* Return true if OP a valid shift count operand.
1230 OP is the current operation.
1231 MODE is the current operation mode. */
1234 shift_count_operand (rtx op, enum machine_mode mode)
1236 HOST_WIDE_INT offset = 0;
1238 if (! check_mode (op, &mode))
1241 /* We can have an integer constant, an address register,
1242 or a sum of the two. Note that reload already checks
1243 that any register present is an address register, so
1244 we just check for any register here. */
1245 if (GET_CODE (op) == CONST_INT)
1247 offset = INTVAL (op);
1250 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1252 offset = INTVAL (XEXP (op, 1));
1255 while (op && GET_CODE (op) == SUBREG)
1256 op = SUBREG_REG (op);
1257 if (op && GET_CODE (op) != REG)
1260 /* Unfortunately we have to reject constants that are invalid
1261 for an address, or else reload will get confused. */
1262 if (!DISP_IN_RANGE (offset))
1268 /* Return true if DISP is a valid short displacement. */
1271 s390_short_displacement (rtx disp)
1273 /* No displacement is OK. */
1277 /* Integer displacement in range. */
1278 if (GET_CODE (disp) == CONST_INT)
1279 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1281 /* GOT offset is not OK, the GOT can be large. */
1282 if (GET_CODE (disp) == CONST
1283 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1284 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1287 /* All other symbolic constants are literal pool references,
1288 which are OK as the literal pool must be small. */
1289 if (GET_CODE (disp) == CONST)
1295 /* Return true if OP is a valid operand for a C constraint. */
1298 s390_extra_constraint_str (rtx op, int c, const char * str)
1300 struct s390_address addr;
1308 if (GET_CODE (op) != MEM)
1310 if (!s390_decompose_address (XEXP (op, 0), &addr))
1315 if (TARGET_LONG_DISPLACEMENT)
1317 if (!s390_short_displacement (addr.disp))
1323 if (GET_CODE (op) != MEM)
1326 if (TARGET_LONG_DISPLACEMENT)
1328 if (!s390_decompose_address (XEXP (op, 0), &addr))
1330 if (!s390_short_displacement (addr.disp))
1336 if (!TARGET_LONG_DISPLACEMENT)
1338 if (GET_CODE (op) != MEM)
1340 if (!s390_decompose_address (XEXP (op, 0), &addr))
1344 if (s390_short_displacement (addr.disp))
1349 if (!TARGET_LONG_DISPLACEMENT)
1351 if (GET_CODE (op) != MEM)
1353 /* Any invalid address here will be fixed up by reload,
1354 so accept it for the most generic constraint. */
1355 if (s390_decompose_address (XEXP (op, 0), &addr)
1356 && s390_short_displacement (addr.disp))
1361 if (TARGET_LONG_DISPLACEMENT)
1363 if (!s390_decompose_address (op, &addr))
1365 if (!s390_short_displacement (addr.disp))
1371 if (!TARGET_LONG_DISPLACEMENT)
1373 /* Any invalid address here will be fixed up by reload,
1374 so accept it for the most generic constraint. */
1375 if (s390_decompose_address (op, &addr)
1376 && s390_short_displacement (addr.disp))
1381 return shift_count_operand (op, VOIDmode);
1390 /* Return true if VALUE matches the constraint STR. */
1393 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1397 enum machine_mode mode, part_mode;
1407 return (unsigned int)value < 256;
1410 return (unsigned int)value < 4096;
1413 return value >= -32768 && value < 32768;
1416 return (TARGET_LONG_DISPLACEMENT ?
1417 (value >= -524288 && value <= 524287)
1418 : (value >= 0 && value <= 4095));
1420 return value == 2147483647;
1423 part = str[1] - '0';
1427 case 'H': part_mode = HImode; break;
1428 case 'Q': part_mode = QImode; break;
1434 case 'H': mode = HImode; break;
1435 case 'S': mode = SImode; break;
1436 case 'D': mode = DImode; break;
1442 case '0': def = 0; break;
1443 case 'F': def = -1; break;
1447 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1450 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1462 /* Compute a (partial) cost for rtx X. Return true if the complete
1463 cost has been computed, and false if subexpressions should be
1464 scanned. In either case, *TOTAL contains the cost result. */
1467 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1472 if (GET_CODE (XEXP (x, 0)) == MINUS
1473 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1480 /* Force_const_mem does not work out of reload, because the
1481 saveable_obstack is set to reload_obstack, which does not
1482 live long enough. Because of this we cannot use force_const_mem
1483 in addsi3. This leads to problems with gen_add2_insn with a
1484 constant greater than a short. Because of that we give an
1485 addition of greater constants a cost of 3 (reload1.c 10096). */
1486 /* ??? saveable_obstack no longer exists. */
1487 if (outer_code == PLUS
1488 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1489 *total = COSTS_N_INSNS (3);
1510 *total = COSTS_N_INSNS (1);
1514 if (GET_MODE (XEXP (x, 0)) == DImode)
1515 *total = COSTS_N_INSNS (40);
1517 *total = COSTS_N_INSNS (7);
1524 *total = COSTS_N_INSNS (33);
1532 /* Return the cost of an address rtx ADDR. */
1535 s390_address_cost (rtx addr)
1537 struct s390_address ad;
1538 if (!s390_decompose_address (addr, &ad))
1541 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1544 /* Return true if OP is a valid operand for the BRAS instruction.
1545 OP is the current operation.
1546 MODE is the current operation mode. */
1549 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1551 register enum rtx_code code = GET_CODE (op);
1553 /* Allow SYMBOL_REFs. */
1554 if (code == SYMBOL_REF)
1557 /* Allow @PLT stubs. */
1559 && GET_CODE (XEXP (op, 0)) == UNSPEC
1560 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1565 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1566 otherwise return 0. */
1569 tls_symbolic_operand (register rtx op)
1571 if (GET_CODE (op) != SYMBOL_REF)
1573 return SYMBOL_REF_TLS_MODEL (op);
1576 /* Return true if OP is a load multiple operation. It is known to be a
1577 PARALLEL and the first section will be tested.
1578 OP is the current operation.
1579 MODE is the current operation mode. */
1582 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1584 enum machine_mode elt_mode;
1585 int count = XVECLEN (op, 0);
1586 unsigned int dest_regno;
1591 /* Perform a quick check so we don't blow up below. */
1593 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1594 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1595 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1598 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1599 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1600 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1602 /* Check, is base, or base + displacement. */
1604 if (GET_CODE (src_addr) == REG)
1606 else if (GET_CODE (src_addr) == PLUS
1607 && GET_CODE (XEXP (src_addr, 0)) == REG
1608 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1610 off = INTVAL (XEXP (src_addr, 1));
1611 src_addr = XEXP (src_addr, 0);
1616 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1619 for (i = 1; i < count; i++)
1621 rtx elt = XVECEXP (op, 0, i);
1623 if (GET_CODE (elt) != SET
1624 || GET_CODE (SET_DEST (elt)) != REG
1625 || GET_MODE (SET_DEST (elt)) != elt_mode
1626 || REGNO (SET_DEST (elt)) != dest_regno + i
1627 || GET_CODE (SET_SRC (elt)) != MEM
1628 || GET_MODE (SET_SRC (elt)) != elt_mode
1629 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1630 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1631 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1632 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1633 != off + i * GET_MODE_SIZE (elt_mode))
1640 /* Return true if OP is a store multiple operation. It is known to be a
1641 PARALLEL and the first section will be tested.
1642 OP is the current operation.
1643 MODE is the current operation mode. */
1646 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1648 enum machine_mode elt_mode;
1649 int count = XVECLEN (op, 0);
1650 unsigned int src_regno;
1654 /* Perform a quick check so we don't blow up below. */
1656 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1657 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1658 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1661 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1662 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1663 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1665 /* Check, is base, or base + displacement. */
1667 if (GET_CODE (dest_addr) == REG)
1669 else if (GET_CODE (dest_addr) == PLUS
1670 && GET_CODE (XEXP (dest_addr, 0)) == REG
1671 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1673 off = INTVAL (XEXP (dest_addr, 1));
1674 dest_addr = XEXP (dest_addr, 0);
1679 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1682 for (i = 1; i < count; i++)
1684 rtx elt = XVECEXP (op, 0, i);
1686 if (GET_CODE (elt) != SET
1687 || GET_CODE (SET_SRC (elt)) != REG
1688 || GET_MODE (SET_SRC (elt)) != elt_mode
1689 || REGNO (SET_SRC (elt)) != src_regno + i
1690 || GET_CODE (SET_DEST (elt)) != MEM
1691 || GET_MODE (SET_DEST (elt)) != elt_mode
1692 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1693 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1694 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1695 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1696 != off + i * GET_MODE_SIZE (elt_mode))
1703 /* Return true if OP contains a symbol reference */
1706 symbolic_reference_mentioned_p (rtx op)
1708 register const char *fmt;
1711 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1714 fmt = GET_RTX_FORMAT (GET_CODE (op));
1715 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1721 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1722 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1726 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1733 /* Return true if OP contains a reference to a thread-local symbol. */
1736 tls_symbolic_reference_mentioned_p (rtx op)
1738 register const char *fmt;
1741 if (GET_CODE (op) == SYMBOL_REF)
1742 return tls_symbolic_operand (op);
1744 fmt = GET_RTX_FORMAT (GET_CODE (op));
1745 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1751 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1752 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1756 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1764 /* Return true if OP is a legitimate general operand when
1765 generating PIC code. It is given that flag_pic is on
1766 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1769 legitimate_pic_operand_p (register rtx op)
1771 /* Accept all non-symbolic constants. */
1772 if (!SYMBOLIC_CONST (op))
1775 /* Reject everything else; must be handled
1776 via emit_symbolic_move. */
1780 /* Returns true if the constant value OP is a legitimate general operand.
1781 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1784 legitimate_constant_p (register rtx op)
1786 /* Accept all non-symbolic constants. */
1787 if (!SYMBOLIC_CONST (op))
1790 /* Accept immediate LARL operands. */
1791 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1794 /* Thread-local symbols are never legal constants. This is
1795 so that emit_call knows that computing such addresses
1796 might require a function call. */
1797 if (TLS_SYMBOLIC_CONST (op))
1800 /* In the PIC case, symbolic constants must *not* be
1801 forced into the literal pool. We accept them here,
1802 so that they will be handled by emit_symbolic_move. */
1806 /* All remaining non-PIC symbolic constants are
1807 forced into the literal pool. */
1811 /* Determine if it's legal to put X into the constant pool. This
1812 is not possible if X contains the address of a symbol that is
1813 not constant (TLS) or not known at final link time (PIC). */
1816 s390_cannot_force_const_mem (rtx x)
1818 switch (GET_CODE (x))
1822 /* Accept all non-symbolic constants. */
1826 /* Labels are OK iff we are non-PIC. */
1827 return flag_pic != 0;
1830 /* 'Naked' TLS symbol references are never OK,
1831 non-TLS symbols are OK iff we are non-PIC. */
1832 if (tls_symbolic_operand (x))
1835 return flag_pic != 0;
1838 return s390_cannot_force_const_mem (XEXP (x, 0));
1841 return s390_cannot_force_const_mem (XEXP (x, 0))
1842 || s390_cannot_force_const_mem (XEXP (x, 1));
1845 switch (XINT (x, 1))
1847 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1848 case UNSPEC_LTREL_OFFSET:
1856 case UNSPEC_GOTNTPOFF:
1857 case UNSPEC_INDNTPOFF:
1870 /* Returns true if the constant value OP is a legitimate general
1871 operand during and after reload. The difference to
1872 legitimate_constant_p is that this function will not accept
1873 a constant that would need to be forced to the literal pool
1874 before it can be used as operand. */
1877 legitimate_reload_constant_p (register rtx op)
1879 /* Accept la(y) operands. */
1880 if (GET_CODE (op) == CONST_INT
1881 && DISP_IN_RANGE (INTVAL (op)))
1884 /* Accept l(g)hi operands. */
1885 if (GET_CODE (op) == CONST_INT
1886 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1889 /* Accept lliXX operands. */
1891 && s390_single_part (op, DImode, HImode, 0) >= 0)
1894 /* Accept larl operands. */
1895 if (TARGET_CPU_ZARCH
1896 && larl_operand (op, VOIDmode))
1899 /* Everything else cannot be handled without reload. */
1903 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1904 return the class of reg to actually use. */
1907 s390_preferred_reload_class (rtx op, enum reg_class class)
1909 /* This can happen if a floating point constant is being
1910 reloaded into an integer register. Leave well alone. */
1911 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1912 && class != FP_REGS)
1915 switch (GET_CODE (op))
1917 /* Constants we cannot reload must be forced into the
1922 if (legitimate_reload_constant_p (op))
1927 /* If a symbolic constant or a PLUS is reloaded,
1928 it is most likely being used as an address, so
1929 prefer ADDR_REGS. If 'class' is not a superset
1930 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1935 if (reg_class_subset_p (ADDR_REGS, class))
1947 /* Return the register class of a scratch register needed to
1948 load IN into a register of class CLASS in MODE.
1950 We need a temporary when loading a PLUS expression which
1951 is not a legitimate operand of the LOAD ADDRESS instruction. */
1954 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1955 enum machine_mode mode, rtx in)
1957 if (s390_plus_operand (in, mode))
1963 /* Return the register class of a scratch register needed to
1964 store a register of class CLASS in MODE into OUT:
1966 We need a temporary when storing a double-word to a
1967 non-offsettable memory address. */
1970 s390_secondary_output_reload_class (enum reg_class class,
1971 enum machine_mode mode, rtx out)
1973 if ((TARGET_64BIT ? mode == TImode
1974 : (mode == DImode || mode == DFmode))
1975 && reg_classes_intersect_p (GENERAL_REGS, class)
1976 && GET_CODE (out) == MEM
1977 && !offsettable_memref_p (out)
1978 && !s_operand (out, VOIDmode))
1984 /* Return true if OP is a PLUS that is not a legitimate
1985 operand for the LA instruction.
1986 OP is the current operation.
1987 MODE is the current operation mode. */
1990 s390_plus_operand (register rtx op, enum machine_mode mode)
1992 if (!check_mode (op, &mode) || mode != Pmode)
1995 if (GET_CODE (op) != PLUS)
1998 if (legitimate_la_operand_p (op))
2004 /* Generate code to load SRC, which is PLUS that is not a
2005 legitimate operand for the LA instruction, into TARGET.
2006 SCRATCH may be used as scratch register. */
2009 s390_expand_plus_operand (register rtx target, register rtx src,
2010 register rtx scratch)
2013 struct s390_address ad;
2015 /* src must be a PLUS; get its two operands. */
2016 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
2019 /* Check if any of the two operands is already scheduled
2020 for replacement by reload. This can happen e.g. when
2021 float registers occur in an address. */
2022 sum1 = find_replacement (&XEXP (src, 0));
2023 sum2 = find_replacement (&XEXP (src, 1));
2024 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2026 /* If the address is already strictly valid, there's nothing to do. */
2027 if (!s390_decompose_address (src, &ad)
2028 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2029 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
2031 /* Otherwise, one of the operands cannot be an address register;
2032 we reload its value into the scratch register. */
2033 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2035 emit_move_insn (scratch, sum1);
2038 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2040 emit_move_insn (scratch, sum2);
2044 /* According to the way these invalid addresses are generated
2045 in reload.c, it should never happen (at least on s390) that
2046 *neither* of the PLUS components, after find_replacements
2047 was applied, is an address register. */
2048 if (sum1 == scratch && sum2 == scratch)
2054 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2057 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2058 is only ever performed on addresses, so we can mark the
2059 sum as legitimate for LA in any case. */
2060 s390_load_address (target, src);
2064 /* Decompose a RTL expression ADDR for a memory address into
2065 its components, returned in OUT.
2067 Returns 0 if ADDR is not a valid memory address, nonzero
2068 otherwise. If OUT is NULL, don't return the components,
2069 but check for validity only.
2071 Note: Only addresses in canonical form are recognized.
2072 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2073 canonical form so that they will be recognized. */
2076 s390_decompose_address (register rtx addr, struct s390_address *out)
2078 HOST_WIDE_INT offset = 0;
2079 rtx base = NULL_RTX;
2080 rtx indx = NULL_RTX;
2081 rtx disp = NULL_RTX;
2083 int pointer = FALSE;
2084 int base_ptr = FALSE;
2085 int indx_ptr = FALSE;
2087 /* Decompose address into base + index + displacement. */
2089 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2092 else if (GET_CODE (addr) == PLUS)
2094 rtx op0 = XEXP (addr, 0);
2095 rtx op1 = XEXP (addr, 1);
2096 enum rtx_code code0 = GET_CODE (op0);
2097 enum rtx_code code1 = GET_CODE (op1);
2099 if (code0 == REG || code0 == UNSPEC)
2101 if (code1 == REG || code1 == UNSPEC)
2103 indx = op0; /* index + base */
2109 base = op0; /* base + displacement */
2114 else if (code0 == PLUS)
2116 indx = XEXP (op0, 0); /* index + base + disp */
2117 base = XEXP (op0, 1);
2128 disp = addr; /* displacement */
2130 /* Extract integer part of displacement. */
2134 if (GET_CODE (disp) == CONST_INT)
2136 offset = INTVAL (disp);
2139 else if (GET_CODE (disp) == CONST
2140 && GET_CODE (XEXP (disp, 0)) == PLUS
2141 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2143 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2144 disp = XEXP (XEXP (disp, 0), 0);
2148 /* Strip off CONST here to avoid special case tests later. */
2149 if (disp && GET_CODE (disp) == CONST)
2150 disp = XEXP (disp, 0);
2152 /* We can convert literal pool addresses to
2153 displacements by basing them off the base register. */
2154 if (disp && GET_CODE (disp) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (disp))
2156 /* Either base or index must be free to hold the base register. */
2158 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2160 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2164 /* Mark up the displacement. */
2165 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2166 UNSPEC_LTREL_OFFSET);
2169 /* Validate base register. */
2172 if (GET_CODE (base) == UNSPEC)
2173 switch (XINT (base, 1))
2177 disp = gen_rtx_UNSPEC (Pmode,
2178 gen_rtvec (1, XVECEXP (base, 0, 0)),
2179 UNSPEC_LTREL_OFFSET);
2183 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2186 case UNSPEC_LTREL_BASE:
2187 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2194 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2197 if (REGNO (base) == BASE_REGNUM
2198 || REGNO (base) == STACK_POINTER_REGNUM
2199 || REGNO (base) == FRAME_POINTER_REGNUM
2200 || ((reload_completed || reload_in_progress)
2201 && frame_pointer_needed
2202 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2203 || REGNO (base) == ARG_POINTER_REGNUM
2205 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2206 pointer = base_ptr = TRUE;
2209 /* Validate index register. */
2212 if (GET_CODE (indx) == UNSPEC)
2213 switch (XINT (indx, 1))
2217 disp = gen_rtx_UNSPEC (Pmode,
2218 gen_rtvec (1, XVECEXP (indx, 0, 0)),
2219 UNSPEC_LTREL_OFFSET);
2223 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2226 case UNSPEC_LTREL_BASE:
2227 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2234 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2237 if (REGNO (indx) == BASE_REGNUM
2238 || REGNO (indx) == STACK_POINTER_REGNUM
2239 || REGNO (indx) == FRAME_POINTER_REGNUM
2240 || ((reload_completed || reload_in_progress)
2241 && frame_pointer_needed
2242 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2243 || REGNO (indx) == ARG_POINTER_REGNUM
2245 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2246 pointer = indx_ptr = TRUE;
2249 /* Prefer to use pointer as base, not index. */
2250 if (base && indx && !base_ptr
2251 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2258 /* Validate displacement. */
2261 /* If the argument pointer is involved, the displacement will change
2262 later anyway as the argument pointer gets eliminated. This could
2263 make a valid displacement invalid, but it is more likely to make
2264 an invalid displacement valid, because we sometimes access the
2265 register save area via negative offsets to the arg pointer.
2266 Thus we don't check the displacement for validity here. If after
2267 elimination the displacement turns out to be invalid after all,
2268 this is fixed up by reload in any case. */
2269 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2270 if (!DISP_IN_RANGE (offset))
2275 /* All the special cases are pointers. */
2278 /* In the small-PIC case, the linker converts @GOT
2279 and @GOTNTPOFF offsets to possible displacements. */
2280 if (GET_CODE (disp) == UNSPEC
2281 && (XINT (disp, 1) == UNSPEC_GOT
2282 || XINT (disp, 1) == UNSPEC_GOTNTPOFF)
2289 /* Accept chunkified literal pool symbol references. */
2290 else if (GET_CODE (disp) == MINUS
2291 && GET_CODE (XEXP (disp, 0)) == LABEL_REF
2292 && GET_CODE (XEXP (disp, 1)) == LABEL_REF)
2297 /* Accept literal pool references. */
2298 else if (GET_CODE (disp) == UNSPEC
2299 && XINT (disp, 1) == UNSPEC_LTREL_OFFSET)
2301 orig_disp = gen_rtx_CONST (Pmode, disp);
2304 /* If we have an offset, make sure it does not
2305 exceed the size of the constant pool entry. */
2306 rtx sym = XVECEXP (disp, 0, 0);
2307 if (offset >= GET_MODE_SIZE (get_pool_mode (sym)))
2310 orig_disp = plus_constant (orig_disp, offset);
2325 out->disp = orig_disp;
2326 out->pointer = pointer;
2332 /* Return nonzero if ADDR is a valid memory address.
2333 STRICT specifies whether strict register checking applies. */
2336 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2337 register rtx addr, int strict)
2339 struct s390_address ad;
2340 if (!s390_decompose_address (addr, &ad))
2345 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2347 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2352 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2354 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2361 /* Return 1 if OP is a valid operand for the LA instruction.
2362 In 31-bit, we need to prove that the result is used as an
2363 address, as LA performs only a 31-bit addition. */
2366 legitimate_la_operand_p (register rtx op)
2368 struct s390_address addr;
2369 if (!s390_decompose_address (op, &addr))
2372 if (TARGET_64BIT || addr.pointer)
2378 /* Return 1 if OP is a valid operand for the LA instruction,
2379 and we prefer to use LA over addition to compute it. */
2382 preferred_la_operand_p (register rtx op)
2384 struct s390_address addr;
2385 if (!s390_decompose_address (op, &addr))
2388 if (!TARGET_64BIT && !addr.pointer)
2394 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2395 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2401 /* Emit a forced load-address operation to load SRC into DST.
2402 This will use the LOAD ADDRESS instruction even in situations
2403 where legitimate_la_operand_p (SRC) returns false. */
2406 s390_load_address (rtx dst, rtx src)
2409 emit_move_insn (dst, src);
2411 emit_insn (gen_force_la_31 (dst, src));
2414 /* Return a legitimate reference for ORIG (an address) using the
2415 register REG. If REG is 0, a new pseudo is generated.
2417 There are two types of references that must be handled:
2419 1. Global data references must load the address from the GOT, via
2420 the PIC reg. An insn is emitted to do this load, and the reg is
2423 2. Static data references, constant pool addresses, and code labels
2424 compute the address as an offset from the GOT, whose base is in
2425 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2426 differentiate them from global data objects. The returned
2427 address is the PIC reg + an unspec constant.
2429 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2430 reg also appears in the address. */
2433 legitimize_pic_address (rtx orig, rtx reg)
2439 if (GET_CODE (addr) == LABEL_REF
2440 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2442 /* This is a local symbol. */
2443 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2445 /* Access local symbols PC-relative via LARL.
2446 This is the same as in the non-PIC case, so it is
2447 handled automatically ... */
2451 /* Access local symbols relative to the GOT. */
2453 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2455 if (reload_in_progress || reload_completed)
2456 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2458 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2459 addr = gen_rtx_CONST (Pmode, addr);
2460 addr = force_const_mem (Pmode, addr);
2461 emit_move_insn (temp, addr);
2463 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2466 emit_move_insn (reg, new);
2471 else if (GET_CODE (addr) == SYMBOL_REF)
2474 reg = gen_reg_rtx (Pmode);
2478 /* Assume GOT offset < 4k. This is handled the same way
2479 in both 31- and 64-bit code (@GOT). */
2481 if (reload_in_progress || reload_completed)
2482 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2484 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2485 new = gen_rtx_CONST (Pmode, new);
2486 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2487 new = gen_rtx_MEM (Pmode, new);
2488 RTX_UNCHANGING_P (new) = 1;
2489 emit_move_insn (reg, new);
2492 else if (TARGET_CPU_ZARCH)
2494 /* If the GOT offset might be >= 4k, we determine the position
2495 of the GOT entry via a PC-relative LARL (@GOTENT). */
2497 rtx temp = gen_reg_rtx (Pmode);
2499 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2500 new = gen_rtx_CONST (Pmode, new);
2501 emit_move_insn (temp, new);
2503 new = gen_rtx_MEM (Pmode, temp);
2504 RTX_UNCHANGING_P (new) = 1;
2505 emit_move_insn (reg, new);
2510 /* If the GOT offset might be >= 4k, we have to load it
2511 from the literal pool (@GOT). */
2513 rtx temp = gen_reg_rtx (Pmode);
2515 if (reload_in_progress || reload_completed)
2516 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2518 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2519 addr = gen_rtx_CONST (Pmode, addr);
2520 addr = force_const_mem (Pmode, addr);
2521 emit_move_insn (temp, addr);
2523 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2524 new = gen_rtx_MEM (Pmode, new);
2525 RTX_UNCHANGING_P (new) = 1;
2526 emit_move_insn (reg, new);
2532 if (GET_CODE (addr) == CONST)
2534 addr = XEXP (addr, 0);
2535 if (GET_CODE (addr) == UNSPEC)
2537 if (XVECLEN (addr, 0) != 1)
2539 switch (XINT (addr, 1))
2541 /* If someone moved a GOT-relative UNSPEC
2542 out of the literal pool, force them back in. */
2545 new = force_const_mem (Pmode, orig);
2548 /* @GOT is OK as is if small. */
2551 new = force_const_mem (Pmode, orig);
2554 /* @GOTENT is OK as is. */
2558 /* @PLT is OK as is on 64-bit, must be converted to
2559 GOT-relative @PLTOFF on 31-bit. */
2561 if (!TARGET_CPU_ZARCH)
2563 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2565 if (reload_in_progress || reload_completed)
2566 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2568 addr = XVECEXP (addr, 0, 0);
2569 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2571 addr = gen_rtx_CONST (Pmode, addr);
2572 addr = force_const_mem (Pmode, addr);
2573 emit_move_insn (temp, addr);
2575 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2578 emit_move_insn (reg, new);
2584 /* Everything else cannot happen. */
2589 else if (GET_CODE (addr) != PLUS)
2592 if (GET_CODE (addr) == PLUS)
2594 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2595 /* Check first to see if this is a constant offset
2596 from a local symbol reference. */
2597 if ((GET_CODE (op0) == LABEL_REF
2598 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2599 && GET_CODE (op1) == CONST_INT)
2601 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2603 if (INTVAL (op1) & 1)
2605 /* LARL can't handle odd offsets, so emit a
2606 pair of LARL and LA. */
2607 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2609 if (!DISP_IN_RANGE (INTVAL (op1)))
2611 int even = INTVAL (op1) - 1;
2612 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2613 op0 = gen_rtx_CONST (Pmode, op0);
2617 emit_move_insn (temp, op0);
2618 new = gen_rtx_PLUS (Pmode, temp, op1);
2622 emit_move_insn (reg, new);
2628 /* If the offset is even, we can just use LARL.
2629 This will happen automatically. */
2634 /* Access local symbols relative to the GOT. */
2636 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2638 if (reload_in_progress || reload_completed)
2639 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2641 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2643 addr = gen_rtx_PLUS (Pmode, addr, op1);
2644 addr = gen_rtx_CONST (Pmode, addr);
2645 addr = force_const_mem (Pmode, addr);
2646 emit_move_insn (temp, addr);
2648 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2651 emit_move_insn (reg, new);
2657 /* Now, check whether it is a GOT relative symbol plus offset
2658 that was pulled out of the literal pool. Force it back in. */
2660 else if (GET_CODE (op0) == UNSPEC
2661 && GET_CODE (op1) == CONST_INT
2662 && XINT (op0, 1) == UNSPEC_GOTOFF)
2664 if (XVECLEN (op0, 0) != 1)
2667 new = force_const_mem (Pmode, orig);
2670 /* Otherwise, compute the sum. */
2673 base = legitimize_pic_address (XEXP (addr, 0), reg);
2674 new = legitimize_pic_address (XEXP (addr, 1),
2675 base == reg ? NULL_RTX : reg);
2676 if (GET_CODE (new) == CONST_INT)
2677 new = plus_constant (base, INTVAL (new));
2680 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2682 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2683 new = XEXP (new, 1);
2685 new = gen_rtx_PLUS (Pmode, base, new);
2688 if (GET_CODE (new) == CONST)
2689 new = XEXP (new, 0);
2690 new = force_operand (new, 0);
2697 /* Load the thread pointer into a register. */
2700 get_thread_pointer (void)
2704 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2705 tp = force_reg (Pmode, tp);
2706 mark_reg_pointer (tp, BITS_PER_WORD);
2711 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
2712 in s390_tls_symbol which always refers to __tls_get_offset.
2713 The returned offset is written to RESULT_REG and an USE rtx is
2714 generated for TLS_CALL. */
2716 static GTY(()) rtx s390_tls_symbol;
2719 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
2726 if (!s390_tls_symbol)
2727 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2729 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
2730 gen_rtx_REG (Pmode, RETURN_REGNUM));
2732 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
2733 CONST_OR_PURE_CALL_P (insn) = 1;
2736 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2737 this (thread-local) address. REG may be used as temporary. */
2740 legitimize_tls_address (rtx addr, rtx reg)
2742 rtx new, tls_call, temp, base, r2, insn;
2744 if (GET_CODE (addr) == SYMBOL_REF)
2745 switch (tls_symbolic_operand (addr))
2747 case TLS_MODEL_GLOBAL_DYNAMIC:
2749 r2 = gen_rtx_REG (Pmode, 2);
2750 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2751 new = gen_rtx_CONST (Pmode, tls_call);
2752 new = force_const_mem (Pmode, new);
2753 emit_move_insn (r2, new);
2754 s390_emit_tls_call_insn (r2, tls_call);
2755 insn = get_insns ();
2758 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2759 temp = gen_reg_rtx (Pmode);
2760 emit_libcall_block (insn, temp, r2, new);
2762 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2765 s390_load_address (reg, new);
2770 case TLS_MODEL_LOCAL_DYNAMIC:
2772 r2 = gen_rtx_REG (Pmode, 2);
2773 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2774 new = gen_rtx_CONST (Pmode, tls_call);
2775 new = force_const_mem (Pmode, new);
2776 emit_move_insn (r2, new);
2777 s390_emit_tls_call_insn (r2, tls_call);
2778 insn = get_insns ();
2781 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2782 temp = gen_reg_rtx (Pmode);
2783 emit_libcall_block (insn, temp, r2, new);
2785 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2786 base = gen_reg_rtx (Pmode);
2787 s390_load_address (base, new);
2789 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2790 new = gen_rtx_CONST (Pmode, new);
2791 new = force_const_mem (Pmode, new);
2792 temp = gen_reg_rtx (Pmode);
2793 emit_move_insn (temp, new);
2795 new = gen_rtx_PLUS (Pmode, base, temp);
2798 s390_load_address (reg, new);
2803 case TLS_MODEL_INITIAL_EXEC:
2806 /* Assume GOT offset < 4k. This is handled the same way
2807 in both 31- and 64-bit code. */
2809 if (reload_in_progress || reload_completed)
2810 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2812 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2813 new = gen_rtx_CONST (Pmode, new);
2814 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2815 new = gen_rtx_MEM (Pmode, new);
2816 RTX_UNCHANGING_P (new) = 1;
2817 temp = gen_reg_rtx (Pmode);
2818 emit_move_insn (temp, new);
2820 else if (TARGET_CPU_ZARCH)
2822 /* If the GOT offset might be >= 4k, we determine the position
2823 of the GOT entry via a PC-relative LARL. */
2825 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2826 new = gen_rtx_CONST (Pmode, new);
2827 temp = gen_reg_rtx (Pmode);
2828 emit_move_insn (temp, new);
2830 new = gen_rtx_MEM (Pmode, temp);
2831 RTX_UNCHANGING_P (new) = 1;
2832 temp = gen_reg_rtx (Pmode);
2833 emit_move_insn (temp, new);
2837 /* If the GOT offset might be >= 4k, we have to load it
2838 from the literal pool. */
2840 if (reload_in_progress || reload_completed)
2841 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2843 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2844 new = gen_rtx_CONST (Pmode, new);
2845 new = force_const_mem (Pmode, new);
2846 temp = gen_reg_rtx (Pmode);
2847 emit_move_insn (temp, new);
2849 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2850 new = gen_rtx_MEM (Pmode, new);
2851 RTX_UNCHANGING_P (new) = 1;
2853 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2854 temp = gen_reg_rtx (Pmode);
2855 emit_insn (gen_rtx_SET (Pmode, temp, new));
2859 /* In position-dependent code, load the absolute address of
2860 the GOT entry from the literal pool. */
2862 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2863 new = gen_rtx_CONST (Pmode, new);
2864 new = force_const_mem (Pmode, new);
2865 temp = gen_reg_rtx (Pmode);
2866 emit_move_insn (temp, new);
2869 new = gen_rtx_MEM (Pmode, new);
2870 RTX_UNCHANGING_P (new) = 1;
2872 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2873 temp = gen_reg_rtx (Pmode);
2874 emit_insn (gen_rtx_SET (Pmode, temp, new));
2877 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2880 s390_load_address (reg, new);
2885 case TLS_MODEL_LOCAL_EXEC:
2886 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2887 new = gen_rtx_CONST (Pmode, new);
2888 new = force_const_mem (Pmode, new);
2889 temp = gen_reg_rtx (Pmode);
2890 emit_move_insn (temp, new);
2892 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2895 s390_load_address (reg, new);
2904 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2906 switch (XINT (XEXP (addr, 0), 1))
2908 case UNSPEC_INDNTPOFF:
2909 if (TARGET_CPU_ZARCH)
2920 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
2921 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
2923 new = XEXP (XEXP (addr, 0), 0);
2924 if (GET_CODE (new) != SYMBOL_REF)
2925 new = gen_rtx_CONST (Pmode, new);
2927 new = legitimize_tls_address (new, reg);
2928 new = plus_constant (new, INTVAL (XEXP (XEXP (addr, 0), 1)));
2929 new = force_operand (new, 0);
2933 abort (); /* for now ... */
2938 /* Emit insns to move operands[1] into operands[0]. */
2941 emit_symbolic_move (rtx *operands)
2943 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2945 if (GET_CODE (operands[0]) == MEM)
2946 operands[1] = force_reg (Pmode, operands[1]);
2947 else if (TLS_SYMBOLIC_CONST (operands[1]))
2948 operands[1] = legitimize_tls_address (operands[1], temp);
2950 operands[1] = legitimize_pic_address (operands[1], temp);
2953 /* Try machine-dependent ways of modifying an illegitimate address X
2954 to be legitimate. If we find one, return the new, valid address.
2956 OLDX is the address as it was before break_out_memory_refs was called.
2957 In some cases it is useful to look at this to decide what needs to be done.
2959 MODE is the mode of the operand pointed to by X.
2961 When -fpic is used, special handling is needed for symbolic references.
2962 See comments by legitimize_pic_address for details. */
2965 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2966 enum machine_mode mode ATTRIBUTE_UNUSED)
2968 rtx constant_term = const0_rtx;
2970 if (TLS_SYMBOLIC_CONST (x))
2972 x = legitimize_tls_address (x, 0);
2974 if (legitimate_address_p (mode, x, FALSE))
2979 if (SYMBOLIC_CONST (x)
2980 || (GET_CODE (x) == PLUS
2981 && (SYMBOLIC_CONST (XEXP (x, 0))
2982 || SYMBOLIC_CONST (XEXP (x, 1)))))
2983 x = legitimize_pic_address (x, 0);
2985 if (legitimate_address_p (mode, x, FALSE))
2989 x = eliminate_constant_term (x, &constant_term);
2991 /* Optimize loading of large displacements by splitting them
2992 into the multiple of 4K and the rest; this allows the
2993 former to be CSE'd if possible.
2995 Don't do this if the displacement is added to a register
2996 pointing into the stack frame, as the offsets will
2997 change later anyway. */
2999 if (GET_CODE (constant_term) == CONST_INT
3000 && !TARGET_LONG_DISPLACEMENT
3001 && !DISP_IN_RANGE (INTVAL (constant_term))
3002 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
3004 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
3005 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
3007 rtx temp = gen_reg_rtx (Pmode);
3008 rtx val = force_operand (GEN_INT (upper), temp);
3010 emit_move_insn (temp, val);
3012 x = gen_rtx_PLUS (Pmode, x, temp);
3013 constant_term = GEN_INT (lower);
3016 if (GET_CODE (x) == PLUS)
3018 if (GET_CODE (XEXP (x, 0)) == REG)
3020 register rtx temp = gen_reg_rtx (Pmode);
3021 register rtx val = force_operand (XEXP (x, 1), temp);
3023 emit_move_insn (temp, val);
3025 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
3028 else if (GET_CODE (XEXP (x, 1)) == REG)
3030 register rtx temp = gen_reg_rtx (Pmode);
3031 register rtx val = force_operand (XEXP (x, 0), temp);
3033 emit_move_insn (temp, val);
3035 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
3039 if (constant_term != const0_rtx)
3040 x = gen_rtx_PLUS (Pmode, x, constant_term);
3045 /* Emit code to move LEN bytes from DST to SRC. */
3048 s390_expand_movmem (rtx dst, rtx src, rtx len)
3050 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3052 if (INTVAL (len) > 0)
3053 emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
3056 else if (TARGET_MVCLE)
3058 emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
3063 rtx dst_addr, src_addr, count, blocks, temp;
3064 rtx loop_start_label = gen_label_rtx ();
3065 rtx loop_end_label = gen_label_rtx ();
3066 rtx end_label = gen_label_rtx ();
3067 enum machine_mode mode;
3069 mode = GET_MODE (len);
3070 if (mode == VOIDmode)
3073 dst_addr = gen_reg_rtx (Pmode);
3074 src_addr = gen_reg_rtx (Pmode);
3075 count = gen_reg_rtx (mode);
3076 blocks = gen_reg_rtx (mode);
3078 convert_move (count, len, 1);
3079 emit_cmp_and_jump_insns (count, const0_rtx,
3080 EQ, NULL_RTX, mode, 1, end_label);
3082 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3083 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3084 dst = change_address (dst, VOIDmode, dst_addr);
3085 src = change_address (src, VOIDmode, src_addr);
3087 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3089 emit_move_insn (count, temp);
3091 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3093 emit_move_insn (blocks, temp);
3095 emit_cmp_and_jump_insns (blocks, const0_rtx,
3096 EQ, NULL_RTX, mode, 1, loop_end_label);
3098 emit_label (loop_start_label);
3100 emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
3101 s390_load_address (dst_addr,
3102 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3103 s390_load_address (src_addr,
3104 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3106 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3108 emit_move_insn (blocks, temp);
3110 emit_cmp_and_jump_insns (blocks, const0_rtx,
3111 EQ, NULL_RTX, mode, 1, loop_end_label);
3113 emit_jump (loop_start_label);
3114 emit_label (loop_end_label);
3116 emit_insn (gen_movmem_short (dst, src,
3117 convert_to_mode (Pmode, count, 1)));
3118 emit_label (end_label);
3122 /* Emit code to clear LEN bytes at DST. */
3125 s390_expand_clrmem (rtx dst, rtx len)
3127 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3129 if (INTVAL (len) > 0)
3130 emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
3133 else if (TARGET_MVCLE)
3135 emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
3140 rtx dst_addr, src_addr, count, blocks, temp;
3141 rtx loop_start_label = gen_label_rtx ();
3142 rtx loop_end_label = gen_label_rtx ();
3143 rtx end_label = gen_label_rtx ();
3144 enum machine_mode mode;
3146 mode = GET_MODE (len);
3147 if (mode == VOIDmode)
3150 dst_addr = gen_reg_rtx (Pmode);
3151 src_addr = gen_reg_rtx (Pmode);
3152 count = gen_reg_rtx (mode);
3153 blocks = gen_reg_rtx (mode);
3155 convert_move (count, len, 1);
3156 emit_cmp_and_jump_insns (count, const0_rtx,
3157 EQ, NULL_RTX, mode, 1, end_label);
3159 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3160 dst = change_address (dst, VOIDmode, dst_addr);
3162 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3164 emit_move_insn (count, temp);
3166 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3168 emit_move_insn (blocks, temp);
3170 emit_cmp_and_jump_insns (blocks, const0_rtx,
3171 EQ, NULL_RTX, mode, 1, loop_end_label);
3173 emit_label (loop_start_label);
3175 emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
3176 s390_load_address (dst_addr,
3177 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3179 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3181 emit_move_insn (blocks, temp);
3183 emit_cmp_and_jump_insns (blocks, const0_rtx,
3184 EQ, NULL_RTX, mode, 1, loop_end_label);
3186 emit_jump (loop_start_label);
3187 emit_label (loop_end_label);
3189 emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
3190 emit_label (end_label);
3194 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3195 and return the result in TARGET. */
3198 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3200 rtx (*gen_result) (rtx) =
3201 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3203 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3205 if (INTVAL (len) > 0)
3207 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3208 emit_insn (gen_result (target));
3211 emit_move_insn (target, const0_rtx);
3214 else /* if (TARGET_MVCLE) */
3216 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3217 emit_insn (gen_result (target));
3221 /* Deactivate for now as profile code cannot cope with
3222 CC being live across basic block boundaries. */
3225 rtx addr0, addr1, count, blocks, temp;
3226 rtx loop_start_label = gen_label_rtx ();
3227 rtx loop_end_label = gen_label_rtx ();
3228 rtx end_label = gen_label_rtx ();
3229 enum machine_mode mode;
3231 mode = GET_MODE (len);
3232 if (mode == VOIDmode)
3235 addr0 = gen_reg_rtx (Pmode);
3236 addr1 = gen_reg_rtx (Pmode);
3237 count = gen_reg_rtx (mode);
3238 blocks = gen_reg_rtx (mode);
3240 convert_move (count, len, 1);
3241 emit_cmp_and_jump_insns (count, const0_rtx,
3242 EQ, NULL_RTX, mode, 1, end_label);
3244 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3245 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3246 op0 = change_address (op0, VOIDmode, addr0);
3247 op1 = change_address (op1, VOIDmode, addr1);
3249 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3251 emit_move_insn (count, temp);
3253 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3255 emit_move_insn (blocks, temp);
3257 emit_cmp_and_jump_insns (blocks, const0_rtx,
3258 EQ, NULL_RTX, mode, 1, loop_end_label);
3260 emit_label (loop_start_label);
3262 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3263 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3264 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3265 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3266 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3267 emit_jump_insn (temp);
3269 s390_load_address (addr0,
3270 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3271 s390_load_address (addr1,
3272 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3274 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3276 emit_move_insn (blocks, temp);
3278 emit_cmp_and_jump_insns (blocks, const0_rtx,
3279 EQ, NULL_RTX, mode, 1, loop_end_label);
3281 emit_jump (loop_start_label);
3282 emit_label (loop_end_label);
3284 emit_insn (gen_cmpmem_short (op0, op1,
3285 convert_to_mode (Pmode, count, 1)));
3286 emit_label (end_label);
3288 emit_insn (gen_result (target));
3294 /* Expand conditional increment or decrement using alc/slb instructions.
3295 Should generate code setting DST to either SRC or SRC + INCREMENT,
3296 depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
3297 Returns true if successful, false otherwise. */
3300 s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
3301 rtx dst, rtx src, rtx increment)
3303 enum machine_mode cmp_mode;
3304 enum machine_mode cc_mode;
3309 if ((GET_MODE (cmp_op0) == SImode || GET_MODE (cmp_op0) == VOIDmode)
3310 && (GET_MODE (cmp_op1) == SImode || GET_MODE (cmp_op1) == VOIDmode))
3312 else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
3313 && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
3318 /* Try ADD LOGICAL WITH CARRY. */
3319 if (increment == const1_rtx)
3321 /* Determine CC mode to use. */
3322 if (cmp_code == EQ || cmp_code == NE)
3324 if (cmp_op1 != const0_rtx)
3326 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3327 NULL_RTX, 0, OPTAB_WIDEN);
3328 cmp_op1 = const0_rtx;
3331 cmp_code = cmp_code == EQ ? LEU : GTU;
3334 if (cmp_code == LTU || cmp_code == LEU)
3339 cmp_code = swap_condition (cmp_code);
3356 /* Emit comparison instruction pattern. */
3357 if (!register_operand (cmp_op0, cmp_mode))
3358 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3360 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3361 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3362 /* We use insn_invalid_p here to add clobbers if required. */
3363 if (insn_invalid_p (emit_insn (insn)))
3366 /* Emit ALC instruction pattern. */
3367 op_res = gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3368 gen_rtx_REG (cc_mode, CC_REGNUM),
3371 if (src != const0_rtx)
3373 if (!register_operand (src, GET_MODE (dst)))
3374 src = force_reg (GET_MODE (dst), src);
3376 src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
3377 op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
3380 p = rtvec_alloc (2);
3382 gen_rtx_SET (VOIDmode, dst, op_res);
3384 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3385 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3390 /* Try SUBTRACT LOGICAL WITH BORROW. */
3391 if (increment == constm1_rtx)
3393 /* Determine CC mode to use. */
3394 if (cmp_code == EQ || cmp_code == NE)
3396 if (cmp_op1 != const0_rtx)
3398 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3399 NULL_RTX, 0, OPTAB_WIDEN);
3400 cmp_op1 = const0_rtx;
3403 cmp_code = cmp_code == EQ ? LEU : GTU;
3406 if (cmp_code == GTU || cmp_code == GEU)
3411 cmp_code = swap_condition (cmp_code);
3428 /* Emit comparison instruction pattern. */
3429 if (!register_operand (cmp_op0, cmp_mode))
3430 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3432 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3433 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3434 /* We use insn_invalid_p here to add clobbers if required. */
3435 if (insn_invalid_p (emit_insn (insn)))
3438 /* Emit SLB instruction pattern. */
3439 if (!register_operand (src, GET_MODE (dst)))
3440 src = force_reg (GET_MODE (dst), src);
3442 op_res = gen_rtx_MINUS (GET_MODE (dst),
3443 gen_rtx_MINUS (GET_MODE (dst), src, const0_rtx),
3444 gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3445 gen_rtx_REG (cc_mode, CC_REGNUM),
3447 p = rtvec_alloc (2);
3449 gen_rtx_SET (VOIDmode, dst, op_res);
3451 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3452 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3461 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3462 We need to emit DTP-relative relocations. */
3465 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3470 fputs ("\t.long\t", file);
3473 fputs ("\t.quad\t", file);
3478 output_addr_const (file, x);
3479 fputs ("@DTPOFF", file);
3482 /* In the name of slightly smaller debug output, and to cater to
3483 general assembler losage, recognize various UNSPEC sequences
3484 and turn them back into a direct symbol reference. */
3487 s390_delegitimize_address (rtx orig_x)
3491 if (GET_CODE (x) != MEM)
3495 if (GET_CODE (x) == PLUS
3496 && GET_CODE (XEXP (x, 1)) == CONST
3497 && GET_CODE (XEXP (x, 0)) == REG
3498 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3500 y = XEXP (XEXP (x, 1), 0);
3501 if (GET_CODE (y) == UNSPEC
3502 && XINT (y, 1) == UNSPEC_GOT)
3503 return XVECEXP (y, 0, 0);
3507 if (GET_CODE (x) == CONST)
3510 if (GET_CODE (y) == UNSPEC
3511 && XINT (y, 1) == UNSPEC_GOTENT)
3512 return XVECEXP (y, 0, 0);
3519 /* Output shift count operand OP to stdio stream FILE. */
3522 print_shift_count_operand (FILE *file, rtx op)
3524 HOST_WIDE_INT offset = 0;
3526 /* We can have an integer constant, an address register,
3527 or a sum of the two. */
3528 if (GET_CODE (op) == CONST_INT)
3530 offset = INTVAL (op);
3533 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3535 offset = INTVAL (XEXP (op, 1));
3538 while (op && GET_CODE (op) == SUBREG)
3539 op = SUBREG_REG (op);
3542 if (op && (GET_CODE (op) != REG
3543 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3544 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3547 /* Shift counts are truncated to the low six bits anyway. */
3548 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3550 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3553 /* Locate some local-dynamic symbol still in use by this function
3554 so that we can print its name in local-dynamic base patterns. */
3557 get_some_local_dynamic_name (void)
3561 if (cfun->machine->some_ld_name)
3562 return cfun->machine->some_ld_name;
3564 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3566 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3567 return cfun->machine->some_ld_name;
3573 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3577 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3579 x = get_pool_constant (x);
3580 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3583 if (GET_CODE (x) == SYMBOL_REF
3584 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3586 cfun->machine->some_ld_name = XSTR (x, 0);
3593 /* Output machine-dependent UNSPECs occurring in address constant X
3594 in assembler syntax to stdio stream FILE. Returns true if the
3595 constant X could be recognized, false otherwise. */
3598 s390_output_addr_const_extra (FILE *file, rtx x)
3600 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
3601 switch (XINT (x, 1))
3604 output_addr_const (file, XVECEXP (x, 0, 0));
3605 fprintf (file, "@GOTENT");
3608 output_addr_const (file, XVECEXP (x, 0, 0));
3609 fprintf (file, "@GOT");
3612 output_addr_const (file, XVECEXP (x, 0, 0));
3613 fprintf (file, "@GOTOFF");
3616 output_addr_const (file, XVECEXP (x, 0, 0));
3617 fprintf (file, "@PLT");
3620 output_addr_const (file, XVECEXP (x, 0, 0));
3621 fprintf (file, "@PLTOFF");
3624 output_addr_const (file, XVECEXP (x, 0, 0));
3625 fprintf (file, "@TLSGD");
3628 assemble_name (file, get_some_local_dynamic_name ());
3629 fprintf (file, "@TLSLDM");
3632 output_addr_const (file, XVECEXP (x, 0, 0));
3633 fprintf (file, "@DTPOFF");
3636 output_addr_const (file, XVECEXP (x, 0, 0));
3637 fprintf (file, "@NTPOFF");
3639 case UNSPEC_GOTNTPOFF:
3640 output_addr_const (file, XVECEXP (x, 0, 0));
3641 fprintf (file, "@GOTNTPOFF");
3643 case UNSPEC_INDNTPOFF:
3644 output_addr_const (file, XVECEXP (x, 0, 0));
3645 fprintf (file, "@INDNTPOFF");
3652 /* Output address operand ADDR in assembler syntax to
3653 stdio stream FILE. */
3656 print_operand_address (FILE *file, rtx addr)
3658 struct s390_address ad;
3660 if (!s390_decompose_address (addr, &ad)
3661 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3662 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3663 output_operand_lossage ("Cannot decompose address.");
3666 output_addr_const (file, ad.disp);
3668 fprintf (file, "0");
3670 if (ad.base && ad.indx)
3671 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3672 reg_names[REGNO (ad.base)]);
3674 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3677 /* Output operand X in assembler syntax to stdio stream FILE.
3678 CODE specified the format flag. The following format flags
3681 'C': print opcode suffix for branch condition.
3682 'D': print opcode suffix for inverse branch condition.
3683 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3684 'O': print only the displacement of a memory reference.
3685 'R': print only the base register of a memory reference.
3686 'N': print the second word of a DImode operand.
3687 'M': print the second word of a TImode operand.
3688 'Y': print shift count operand.
3690 'b': print integer X as if it's an unsigned byte.
3691 'x': print integer X as if it's an unsigned word.
3692 'h': print integer X as if it's a signed word.
3693 'i': print the first nonzero HImode part of X.
3694 'j': print the first HImode part unequal to 0xffff of X. */
3697 print_operand (FILE *file, rtx x, int code)
3702 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3706 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3710 if (GET_CODE (x) == SYMBOL_REF)
3712 fprintf (file, "%s", ":tls_load:");
3713 output_addr_const (file, x);
3715 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3717 fprintf (file, "%s", ":tls_gdcall:");
3718 output_addr_const (file, XVECEXP (x, 0, 0));
3720 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3722 fprintf (file, "%s", ":tls_ldcall:");
3723 assemble_name (file, get_some_local_dynamic_name ());
3731 struct s390_address ad;
3733 if (GET_CODE (x) != MEM
3734 || !s390_decompose_address (XEXP (x, 0), &ad)
3735 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3740 output_addr_const (file, ad.disp);
3742 fprintf (file, "0");
3748 struct s390_address ad;
3750 if (GET_CODE (x) != MEM
3751 || !s390_decompose_address (XEXP (x, 0), &ad)
3752 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3757 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3759 fprintf (file, "0");
3764 if (GET_CODE (x) == REG)
3765 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3766 else if (GET_CODE (x) == MEM)
3767 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3773 if (GET_CODE (x) == REG)
3774 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3775 else if (GET_CODE (x) == MEM)
3776 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3782 print_shift_count_operand (file, x);
3786 switch (GET_CODE (x))
3789 fprintf (file, "%s", reg_names[REGNO (x)]);
3793 output_address (XEXP (x, 0));
3800 output_addr_const (file, x);
3805 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3806 else if (code == 'x')
3807 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3808 else if (code == 'h')
3809 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3810 else if (code == 'i')
3811 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3812 s390_extract_part (x, HImode, 0));
3813 else if (code == 'j')
3814 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3815 s390_extract_part (x, HImode, -1));
3817 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3821 if (GET_MODE (x) != VOIDmode)
3824 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3825 else if (code == 'x')
3826 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3827 else if (code == 'h')
3828 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3834 fatal_insn ("UNKNOWN in print_operand !?", x);
3839 /* Target hook for assembling integer objects. We need to define it
3840 here to work a round a bug in some versions of GAS, which couldn't
3841 handle values smaller than INT_MIN when printed in decimal. */
3844 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3846 if (size == 8 && aligned_p
3847 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3849 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3853 return default_assemble_integer (x, size, aligned_p);
3856 /* Returns true if register REGNO is used for forming
3857 a memory address in expression X. */
3860 reg_used_in_mem_p (int regno, rtx x)
3862 enum rtx_code code = GET_CODE (x);
3868 if (refers_to_regno_p (regno, regno+1,
3872 else if (code == SET
3873 && GET_CODE (SET_DEST (x)) == PC)
3875 if (refers_to_regno_p (regno, regno+1,
3880 fmt = GET_RTX_FORMAT (code);
3881 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3884 && reg_used_in_mem_p (regno, XEXP (x, i)))
3887 else if (fmt[i] == 'E')
3888 for (j = 0; j < XVECLEN (x, i); j++)
3889 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3895 /* Returns true if expression DEP_RTX sets an address register
3896 used by instruction INSN to address memory. */
3899 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3903 if (GET_CODE (dep_rtx) == INSN)
3904 dep_rtx = PATTERN (dep_rtx);
3906 if (GET_CODE (dep_rtx) == SET)
3908 target = SET_DEST (dep_rtx);
3909 if (GET_CODE (target) == STRICT_LOW_PART)
3910 target = XEXP (target, 0);
3911 while (GET_CODE (target) == SUBREG)
3912 target = SUBREG_REG (target);
3914 if (GET_CODE (target) == REG)
3916 int regno = REGNO (target);
3918 if (s390_safe_attr_type (insn) == TYPE_LA)
3920 pat = PATTERN (insn);
3921 if (GET_CODE (pat) == PARALLEL)
3923 if (XVECLEN (pat, 0) != 2)
3925 pat = XVECEXP (pat, 0, 0);
3927 if (GET_CODE (pat) == SET)
3928 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3932 else if (get_attr_atype (insn) == ATYPE_AGEN)
3933 return reg_used_in_mem_p (regno, PATTERN (insn));
3939 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3942 s390_agen_dep_p (rtx dep_insn, rtx insn)
3944 rtx dep_rtx = PATTERN (dep_insn);
3947 if (GET_CODE (dep_rtx) == SET
3948 && addr_generation_dependency_p (dep_rtx, insn))
3950 else if (GET_CODE (dep_rtx) == PARALLEL)
3952 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3954 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3961 /* Return the modified cost of the dependency of instruction INSN
3962 on instruction DEP_INSN through the link LINK. COST is the
3963 default cost of that dependency.
3965 Data dependencies are all handled without delay. However, if a
3966 register is modified and subsequently used as base or index
3967 register of a memory reference, at least 4 cycles need to pass
3968 between setting and using the register to avoid pipeline stalls.
3969 An exception is the LA instruction. An address generated by LA can
3970 be used by introducing only a one cycle stall on the pipeline. */
3973 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3975 /* If the dependence is an anti-dependence, there is no cost. For an
3976 output dependence, there is sometimes a cost, but it doesn't seem
3977 worth handling those few cases. */
3979 if (REG_NOTE_KIND (link) != 0)
3982 /* If we can't recognize the insns, we can't really do anything. */
3983 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3986 /* Operand forward in case of lr, load and la. */
3987 if (s390_tune == PROCESSOR_2084_Z990
3989 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3990 || s390_safe_attr_type (dep_insn) == TYPE_LR
3991 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3996 /* A C statement (sans semicolon) to update the integer scheduling priority
3997 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3998 reduce the priority to execute INSN later. Do not define this macro if
3999 you do not need to adjust the scheduling priorities of insns.
4001 A STD instruction should be scheduled earlier,
4002 in order to use the bypass. */
4005 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
4007 if (! INSN_P (insn))
4010 if (s390_tune != PROCESSOR_2084_Z990)
4013 switch (s390_safe_attr_type (insn))
4017 priority = priority << 3;
4020 priority = priority << 1;
4028 /* The number of instructions that can be issued per cycle. */
4031 s390_issue_rate (void)
4033 if (s390_tune == PROCESSOR_2084_Z990)
4039 s390_first_cycle_multipass_dfa_lookahead (void)
4045 /* Split all branches that exceed the maximum distance.
4046 Returns true if this created a new literal pool entry. */
4049 s390_split_branches (void)
4051 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
4052 int new_literal = 0;
4053 rtx insn, pat, tmp, target;
4056 /* We need correct insn addresses. */
4058 shorten_branches (get_insns ());
4060 /* Find all branches that exceed 64KB, and split them. */
4062 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4064 if (GET_CODE (insn) != JUMP_INSN)
4067 pat = PATTERN (insn);
4068 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4069 pat = XVECEXP (pat, 0, 0);
4070 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
4073 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
4075 label = &SET_SRC (pat);
4077 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
4079 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
4080 label = &XEXP (SET_SRC (pat), 1);
4081 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
4082 label = &XEXP (SET_SRC (pat), 2);
4089 if (get_attr_length (insn) <= 4)
4092 /* We are going to use the return register as scratch register,
4093 make sure it will be saved/restored by the prologue/epilogue. */
4094 cfun->machine->save_return_addr_p = 1;
4099 tmp = force_const_mem (Pmode, *label);
4100 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
4101 INSN_ADDRESSES_NEW (tmp, -1);
4102 annotate_constant_pool_refs (&PATTERN (tmp));
4109 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
4110 UNSPEC_LTREL_OFFSET);
4111 target = gen_rtx_CONST (Pmode, target);
4112 target = force_const_mem (Pmode, target);
4113 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
4114 INSN_ADDRESSES_NEW (tmp, -1);
4115 annotate_constant_pool_refs (&PATTERN (tmp));
4117 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XEXP (target, 0),
4118 cfun->machine->base_reg),
4120 target = gen_rtx_PLUS (Pmode, temp_reg, target);
4123 if (!validate_change (insn, label, target, 0))
4130 /* Annotate every literal pool reference in X by an UNSPEC_LTREF expression.
4131 Fix up MEMs as required. */
4134 annotate_constant_pool_refs (rtx *x)
4139 if (GET_CODE (*x) == SYMBOL_REF
4140 && CONSTANT_POOL_ADDRESS_P (*x))
4143 /* Literal pool references can only occur inside a MEM ... */
4144 if (GET_CODE (*x) == MEM)
4146 rtx memref = XEXP (*x, 0);
4148 if (GET_CODE (memref) == SYMBOL_REF
4149 && CONSTANT_POOL_ADDRESS_P (memref))
4151 rtx base = cfun->machine->base_reg;
4152 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, memref, base),
4155 *x = replace_equiv_address (*x, addr);
4159 if (GET_CODE (memref) == CONST
4160 && GET_CODE (XEXP (memref, 0)) == PLUS
4161 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4162 && GET_CODE (XEXP (XEXP (memref, 0), 0)) == SYMBOL_REF
4163 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (memref, 0), 0)))
4165 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4166 rtx sym = XEXP (XEXP (memref, 0), 0);
4167 rtx base = cfun->machine->base_reg;
4168 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4171 *x = replace_equiv_address (*x, plus_constant (addr, off));
4176 /* ... or a load-address type pattern. */
4177 if (GET_CODE (*x) == SET)
4179 rtx addrref = SET_SRC (*x);
4181 if (GET_CODE (addrref) == SYMBOL_REF
4182 && CONSTANT_POOL_ADDRESS_P (addrref))
4184 rtx base = cfun->machine->base_reg;
4185 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, addrref, base),
4188 SET_SRC (*x) = addr;
4192 if (GET_CODE (addrref) == CONST
4193 && GET_CODE (XEXP (addrref, 0)) == PLUS
4194 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4195 && GET_CODE (XEXP (XEXP (addrref, 0), 0)) == SYMBOL_REF
4196 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addrref, 0), 0)))
4198 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4199 rtx sym = XEXP (XEXP (addrref, 0), 0);
4200 rtx base = cfun->machine->base_reg;
4201 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4204 SET_SRC (*x) = plus_constant (addr, off);
4209 /* Annotate LTREL_BASE as well. */
4210 if (GET_CODE (*x) == UNSPEC
4211 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4213 rtx base = cfun->machine->base_reg;
4214 *x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XVECEXP (*x, 0, 0), base),
4219 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4220 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4224 annotate_constant_pool_refs (&XEXP (*x, i));
4226 else if (fmt[i] == 'E')
4228 for (j = 0; j < XVECLEN (*x, i); j++)
4229 annotate_constant_pool_refs (&XVECEXP (*x, i, j));
4235 /* Find an annotated literal pool symbol referenced in RTX X,
4236 and store it at REF. Will abort if X contains references to
4237 more than one such pool symbol; multiple references to the same
4238 symbol are allowed, however.
4240 The rtx pointed to by REF must be initialized to NULL_RTX
4241 by the caller before calling this routine. */
4244 find_constant_pool_ref (rtx x, rtx *ref)
4249 /* Ignore LTREL_BASE references. */
4250 if (GET_CODE (x) == UNSPEC
4251 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4253 /* Likewise POOL_ENTRY insns. */
4254 if (GET_CODE (x) == UNSPEC_VOLATILE
4255 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
4258 if (GET_CODE (x) == SYMBOL_REF
4259 && CONSTANT_POOL_ADDRESS_P (x))
4262 if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_LTREF)
4264 rtx sym = XVECEXP (x, 0, 0);
4265 if (GET_CODE (sym) != SYMBOL_REF
4266 || !CONSTANT_POOL_ADDRESS_P (sym))
4269 if (*ref == NULL_RTX)
4271 else if (*ref != sym)
4277 fmt = GET_RTX_FORMAT (GET_CODE (x));
4278 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4282 find_constant_pool_ref (XEXP (x, i), ref);
4284 else if (fmt[i] == 'E')
4286 for (j = 0; j < XVECLEN (x, i); j++)
4287 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4292 /* Replace every reference to the annotated literal pool
4293 symbol REF in X by its base plus OFFSET. */
4296 replace_constant_pool_ref (rtx *x, rtx ref, rtx offset)
4304 if (GET_CODE (*x) == UNSPEC
4305 && XINT (*x, 1) == UNSPEC_LTREF
4306 && XVECEXP (*x, 0, 0) == ref)
4308 *x = gen_rtx_PLUS (Pmode, XVECEXP (*x, 0, 1), offset);
4312 if (GET_CODE (*x) == PLUS
4313 && GET_CODE (XEXP (*x, 1)) == CONST_INT
4314 && GET_CODE (XEXP (*x, 0)) == UNSPEC
4315 && XINT (XEXP (*x, 0), 1) == UNSPEC_LTREF
4316 && XVECEXP (XEXP (*x, 0), 0, 0) == ref)
4318 rtx addr = gen_rtx_PLUS (Pmode, XVECEXP (XEXP (*x, 0), 0, 1), offset);
4319 *x = plus_constant (addr, INTVAL (XEXP (*x, 1)));
4323 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4324 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4328 replace_constant_pool_ref (&XEXP (*x, i), ref, offset);
4330 else if (fmt[i] == 'E')
4332 for (j = 0; j < XVECLEN (*x, i); j++)
4333 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, offset);
4338 /* Check whether X contains an UNSPEC_LTREL_BASE.
4339 Return its constant pool symbol if found, NULL_RTX otherwise. */
4342 find_ltrel_base (rtx x)
4347 if (GET_CODE (x) == UNSPEC
4348 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4349 return XVECEXP (x, 0, 0);
4351 fmt = GET_RTX_FORMAT (GET_CODE (x));
4352 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4356 rtx fnd = find_ltrel_base (XEXP (x, i));
4360 else if (fmt[i] == 'E')
4362 for (j = 0; j < XVECLEN (x, i); j++)
4364 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4374 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with its base. */
4377 replace_ltrel_base (rtx *x)
4382 if (GET_CODE (*x) == UNSPEC
4383 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4385 *x = XVECEXP (*x, 0, 1);
4389 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4390 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4394 replace_ltrel_base (&XEXP (*x, i));
4396 else if (fmt[i] == 'E')
4398 for (j = 0; j < XVECLEN (*x, i); j++)
4399 replace_ltrel_base (&XVECEXP (*x, i, j));
4405 /* We keep a list of constants which we have to add to internal
4406 constant tables in the middle of large functions. */
4408 #define NR_C_MODES 7
4409 enum machine_mode constant_modes[NR_C_MODES] =
4420 struct constant *next;
4425 struct constant_pool
4427 struct constant_pool *next;
4432 struct constant *constants[NR_C_MODES];
4437 static struct constant_pool * s390_mainpool_start (void);
4438 static void s390_mainpool_finish (struct constant_pool *);
4439 static void s390_mainpool_cancel (struct constant_pool *);
4441 static struct constant_pool * s390_chunkify_start (void);
4442 static void s390_chunkify_finish (struct constant_pool *);
4443 static void s390_chunkify_cancel (struct constant_pool *);
4445 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4446 static void s390_end_pool (struct constant_pool *, rtx);
4447 static void s390_add_pool_insn (struct constant_pool *, rtx);
4448 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4449 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4450 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4451 static rtx s390_dump_pool (struct constant_pool *, bool);
4452 static struct constant_pool *s390_alloc_pool (void);
4453 static void s390_free_pool (struct constant_pool *);
4455 /* Create new constant pool covering instructions starting at INSN
4456 and chain it to the end of POOL_LIST. */
4458 static struct constant_pool *
4459 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4461 struct constant_pool *pool, **prev;
4463 pool = s390_alloc_pool ();
4464 pool->first_insn = insn;
4466 for (prev = pool_list; *prev; prev = &(*prev)->next)
4473 /* End range of instructions covered by POOL at INSN and emit
4474 placeholder insn representing the pool. */
4477 s390_end_pool (struct constant_pool *pool, rtx insn)
4479 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4482 insn = get_last_insn ();
4484 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4485 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4488 /* Add INSN to the list of insns covered by POOL. */
4491 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4493 bitmap_set_bit (pool->insns, INSN_UID (insn));
4496 /* Return pool out of POOL_LIST that covers INSN. */
4498 static struct constant_pool *
4499 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4501 struct constant_pool *pool;
4503 for (pool = pool_list; pool; pool = pool->next)
4504 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4510 /* Add constant VAL of mode MODE to the constant pool POOL. */
4513 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4518 for (i = 0; i < NR_C_MODES; i++)
4519 if (constant_modes[i] == mode)
4521 if (i == NR_C_MODES)
4524 for (c = pool->constants[i]; c != NULL; c = c->next)
4525 if (rtx_equal_p (val, c->value))
4530 c = (struct constant *) xmalloc (sizeof *c);
4532 c->label = gen_label_rtx ();
4533 c->next = pool->constants[i];
4534 pool->constants[i] = c;
4535 pool->size += GET_MODE_SIZE (mode);
4539 /* Find constant VAL of mode MODE in the constant pool POOL.
4540 Return an RTX describing the distance from the start of
4541 the pool to the location of the new constant. */
4544 s390_find_constant (struct constant_pool *pool, rtx val,
4545 enum machine_mode mode)
4551 for (i = 0; i < NR_C_MODES; i++)
4552 if (constant_modes[i] == mode)
4554 if (i == NR_C_MODES)
4557 for (c = pool->constants[i]; c != NULL; c = c->next)
4558 if (rtx_equal_p (val, c->value))
4564 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4565 gen_rtx_LABEL_REF (Pmode, pool->label));
4566 offset = gen_rtx_CONST (Pmode, offset);
4570 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4571 do not emit the pool base label. */
4574 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4580 /* Pool start insn switches to proper section
4581 and guarantees necessary alignment. */
4582 if (TARGET_CPU_ZARCH)
4583 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4585 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4586 INSN_ADDRESSES_NEW (insn, -1);
4590 insn = emit_label_after (pool->label, insn);
4591 INSN_ADDRESSES_NEW (insn, -1);
4594 /* Dump constants in descending alignment requirement order,
4595 ensuring proper alignment for every constant. */
4596 for (i = 0; i < NR_C_MODES; i++)
4597 for (c = pool->constants[i]; c; c = c->next)
4599 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4600 rtx value = c->value;
4601 if (GET_CODE (value) == CONST
4602 && GET_CODE (XEXP (value, 0)) == UNSPEC
4603 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4604 && XVECLEN (XEXP (value, 0), 0) == 1)
4606 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4607 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4608 value = gen_rtx_CONST (VOIDmode, value);
4611 insn = emit_label_after (c->label, insn);
4612 INSN_ADDRESSES_NEW (insn, -1);
4614 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4615 gen_rtvec (1, value),
4616 UNSPECV_POOL_ENTRY);
4617 insn = emit_insn_after (value, insn);
4618 INSN_ADDRESSES_NEW (insn, -1);
4621 /* Pool end insn switches back to previous section
4622 and guarantees necessary alignment. */
4623 if (TARGET_CPU_ZARCH)
4624 insn = emit_insn_after (gen_pool_end_64 (), insn);
4626 insn = emit_insn_after (gen_pool_end_31 (), insn);
4627 INSN_ADDRESSES_NEW (insn, -1);
4629 insn = emit_barrier_after (insn);
4630 INSN_ADDRESSES_NEW (insn, -1);
4632 /* Remove placeholder insn. */
4633 remove_insn (pool->pool_insn);
4638 /* Allocate new constant_pool structure. */
4640 static struct constant_pool *
4641 s390_alloc_pool (void)
4643 struct constant_pool *pool;
4646 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4648 for (i = 0; i < NR_C_MODES; i++)
4649 pool->constants[i] = NULL;
4651 pool->label = gen_label_rtx ();
4652 pool->first_insn = NULL_RTX;
4653 pool->pool_insn = NULL_RTX;
4654 pool->insns = BITMAP_XMALLOC ();
4660 /* Free all memory used by POOL. */
4663 s390_free_pool (struct constant_pool *pool)
4667 for (i = 0; i < NR_C_MODES; i++)
4669 struct constant *c = pool->constants[i];
4672 struct constant *next = c->next;
4678 BITMAP_XFREE (pool->insns);
4683 /* Collect main literal pool. Return NULL on overflow. */
4685 static struct constant_pool *
4686 s390_mainpool_start (void)
4688 struct constant_pool *pool;
4691 pool = s390_alloc_pool ();
4693 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4695 if (GET_CODE (insn) == INSN
4696 && GET_CODE (PATTERN (insn)) == SET
4697 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC_VOLATILE
4698 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPECV_MAIN_POOL)
4700 if (pool->pool_insn)
4702 pool->pool_insn = insn;
4705 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4707 rtx pool_ref = NULL_RTX;
4708 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4711 rtx constant = get_pool_constant (pool_ref);
4712 enum machine_mode mode = get_pool_mode (pool_ref);
4713 s390_add_constant (pool, constant, mode);
4718 if (!pool->pool_insn)
4721 if (pool->size >= 4096)
4723 /* We're going to chunkify the pool, so remove the main
4724 pool placeholder insn. */
4725 remove_insn (pool->pool_insn);
4727 s390_free_pool (pool);
4734 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4735 Modify the current function to output the pool constants as well as
4736 the pool register setup instruction. */
4739 s390_mainpool_finish (struct constant_pool *pool)
4741 rtx base_reg = SET_DEST (PATTERN (pool->pool_insn));
4744 /* If the pool is empty, we're done. */
4745 if (pool->size == 0)
4747 remove_insn (pool->pool_insn);
4748 s390_free_pool (pool);
4752 /* We need correct insn addresses. */
4753 shorten_branches (get_insns ());
4755 /* On zSeries, we use a LARL to load the pool register. The pool is
4756 located in the .rodata section, so we emit it after the function. */
4757 if (TARGET_CPU_ZARCH)
4759 insn = gen_main_base_64 (base_reg, pool->label);
4760 insn = emit_insn_after (insn, pool->pool_insn);
4761 INSN_ADDRESSES_NEW (insn, -1);
4762 remove_insn (pool->pool_insn);
4764 insn = get_last_insn ();
4765 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4766 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4768 s390_dump_pool (pool, 0);
4771 /* On S/390, if the total size of the function's code plus literal pool
4772 does not exceed 4096 bytes, we use BASR to set up a function base
4773 pointer, and emit the literal pool at the end of the function. */
4774 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4775 + pool->size + 8 /* alignment slop */ < 4096)
4777 insn = gen_main_base_31_small (base_reg, pool->label);
4778 insn = emit_insn_after (insn, pool->pool_insn);
4779 INSN_ADDRESSES_NEW (insn, -1);
4780 remove_insn (pool->pool_insn);
4782 insn = emit_label_after (pool->label, insn);
4783 INSN_ADDRESSES_NEW (insn, -1);
4785 insn = get_last_insn ();
4786 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4787 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4789 s390_dump_pool (pool, 1);
4792 /* Otherwise, we emit an inline literal pool and use BASR to branch
4793 over it, setting up the pool register at the same time. */
4796 rtx pool_end = gen_label_rtx ();
4798 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4799 insn = emit_insn_after (insn, pool->pool_insn);
4800 INSN_ADDRESSES_NEW (insn, -1);
4801 remove_insn (pool->pool_insn);
4803 insn = emit_label_after (pool->label, insn);
4804 INSN_ADDRESSES_NEW (insn, -1);
4806 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4807 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4809 insn = emit_label_after (pool_end, pool->pool_insn);
4810 INSN_ADDRESSES_NEW (insn, -1);
4812 s390_dump_pool (pool, 1);
4816 /* Replace all literal pool references. */
4818 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4821 replace_ltrel_base (&PATTERN (insn));
4823 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4825 rtx addr, pool_ref = NULL_RTX;
4826 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4829 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4830 get_pool_mode (pool_ref));
4831 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4832 INSN_CODE (insn) = -1;
4838 /* Free the pool. */
4839 s390_free_pool (pool);
4842 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4843 We have decided we cannot use this pool, so revert all changes
4844 to the current function that were done by s390_mainpool_start. */
4846 s390_mainpool_cancel (struct constant_pool *pool)
4848 /* We didn't actually change the instruction stream, so simply
4849 free the pool memory. */
4850 s390_free_pool (pool);
4854 /* Chunkify the literal pool. */
4856 #define S390_POOL_CHUNK_MIN 0xc00
4857 #define S390_POOL_CHUNK_MAX 0xe00
4859 static struct constant_pool *
4860 s390_chunkify_start (void)
4862 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4865 rtx pending_ltrel = NULL_RTX;
4868 rtx (*gen_reload_base) (rtx, rtx) =
4869 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4872 /* We need correct insn addresses. */
4874 shorten_branches (get_insns ());
4876 /* Scan all insns and move literals to pool chunks. */
4878 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4880 /* Check for pending LTREL_BASE. */
4883 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4886 if (ltrel_base == pending_ltrel)
4887 pending_ltrel = NULL_RTX;
4893 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4895 rtx pool_ref = NULL_RTX;
4896 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4899 rtx constant = get_pool_constant (pool_ref);
4900 enum machine_mode mode = get_pool_mode (pool_ref);
4903 curr_pool = s390_start_pool (&pool_list, insn);
4905 s390_add_constant (curr_pool, constant, mode);
4906 s390_add_pool_insn (curr_pool, insn);
4908 /* Don't split the pool chunk between a LTREL_OFFSET load
4909 and the corresponding LTREL_BASE. */
4910 if (GET_CODE (constant) == CONST
4911 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4912 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4916 pending_ltrel = pool_ref;
4921 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4924 s390_add_pool_insn (curr_pool, insn);
4925 /* An LTREL_BASE must follow within the same basic block. */
4931 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4932 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4935 if (TARGET_CPU_ZARCH)
4937 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4940 s390_end_pool (curr_pool, NULL_RTX);
4945 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4946 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4949 /* We will later have to insert base register reload insns.
4950 Those will have an effect on code size, which we need to
4951 consider here. This calculation makes rather pessimistic
4952 worst-case assumptions. */
4953 if (GET_CODE (insn) == CODE_LABEL)
4956 if (chunk_size < S390_POOL_CHUNK_MIN
4957 && curr_pool->size < S390_POOL_CHUNK_MIN)
4960 /* Pool chunks can only be inserted after BARRIERs ... */
4961 if (GET_CODE (insn) == BARRIER)
4963 s390_end_pool (curr_pool, insn);
4968 /* ... so if we don't find one in time, create one. */
4969 else if ((chunk_size > S390_POOL_CHUNK_MAX
4970 || curr_pool->size > S390_POOL_CHUNK_MAX))
4972 rtx label, jump, barrier;
4974 /* We can insert the barrier only after a 'real' insn. */
4975 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4977 if (get_attr_length (insn) == 0)
4980 /* Don't separate LTREL_BASE from the corresponding
4981 LTREL_OFFSET load. */
4985 label = gen_label_rtx ();
4986 jump = emit_jump_insn_after (gen_jump (label), insn);
4987 barrier = emit_barrier_after (jump);
4988 insn = emit_label_after (label, barrier);
4989 JUMP_LABEL (jump) = label;
4990 LABEL_NUSES (label) = 1;
4992 INSN_ADDRESSES_NEW (jump, -1);
4993 INSN_ADDRESSES_NEW (barrier, -1);
4994 INSN_ADDRESSES_NEW (insn, -1);
4996 s390_end_pool (curr_pool, barrier);
5004 s390_end_pool (curr_pool, NULL_RTX);
5009 /* Find all labels that are branched into
5010 from an insn belonging to a different chunk. */
5012 far_labels = BITMAP_XMALLOC ();
5014 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5016 /* Labels marked with LABEL_PRESERVE_P can be target
5017 of non-local jumps, so we have to mark them.
5018 The same holds for named labels.
5020 Don't do that, however, if it is the label before
5023 if (GET_CODE (insn) == CODE_LABEL
5024 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
5026 rtx vec_insn = next_real_insn (insn);
5027 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5028 PATTERN (vec_insn) : NULL_RTX;
5030 || !(GET_CODE (vec_pat) == ADDR_VEC
5031 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5032 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
5035 /* If we have a direct jump (conditional or unconditional)
5036 or a casesi jump, check all potential targets. */
5037 else if (GET_CODE (insn) == JUMP_INSN)
5039 rtx pat = PATTERN (insn);
5040 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
5041 pat = XVECEXP (pat, 0, 0);
5043 if (GET_CODE (pat) == SET)
5045 rtx label = JUMP_LABEL (insn);
5048 if (s390_find_pool (pool_list, label)
5049 != s390_find_pool (pool_list, insn))
5050 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5053 else if (GET_CODE (pat) == PARALLEL
5054 && XVECLEN (pat, 0) == 2
5055 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
5056 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
5057 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
5059 /* Find the jump table used by this casesi jump. */
5060 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
5061 rtx vec_insn = next_real_insn (vec_label);
5062 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5063 PATTERN (vec_insn) : NULL_RTX;
5065 && (GET_CODE (vec_pat) == ADDR_VEC
5066 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5068 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
5070 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
5072 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
5074 if (s390_find_pool (pool_list, label)
5075 != s390_find_pool (pool_list, insn))
5076 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5083 /* Insert base register reload insns before every pool. */
5085 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5087 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5089 rtx insn = curr_pool->first_insn;
5090 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
5093 /* Insert base register reload insns at every far label. */
5095 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5096 if (GET_CODE (insn) == CODE_LABEL
5097 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
5099 struct constant_pool *pool = s390_find_pool (pool_list, insn);
5102 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5104 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
5109 BITMAP_XFREE (far_labels);
5112 /* Recompute insn addresses. */
5114 init_insn_lengths ();
5115 shorten_branches (get_insns ());
5120 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5121 After we have decided to use this list, finish implementing
5122 all changes to the current function as required. */
5125 s390_chunkify_finish (struct constant_pool *pool_list)
5127 struct constant_pool *curr_pool = NULL;
5131 /* Replace all literal pool references. */
5133 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5136 replace_ltrel_base (&PATTERN (insn));
5138 curr_pool = s390_find_pool (pool_list, insn);
5142 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5144 rtx addr, pool_ref = NULL_RTX;
5145 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5148 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
5149 get_pool_mode (pool_ref));
5150 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5151 INSN_CODE (insn) = -1;
5156 /* Dump out all literal pools. */
5158 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5159 s390_dump_pool (curr_pool, 0);
5161 /* Free pool list. */
5165 struct constant_pool *next = pool_list->next;
5166 s390_free_pool (pool_list);
5171 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5172 We have decided we cannot use this list, so revert all changes
5173 to the current function that were done by s390_chunkify_start. */
5176 s390_chunkify_cancel (struct constant_pool *pool_list)
5178 struct constant_pool *curr_pool = NULL;
5181 /* Remove all pool placeholder insns. */
5183 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5185 /* Did we insert an extra barrier? Remove it. */
5186 rtx barrier = PREV_INSN (curr_pool->pool_insn);
5187 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
5188 rtx label = NEXT_INSN (curr_pool->pool_insn);
5190 if (jump && GET_CODE (jump) == JUMP_INSN
5191 && barrier && GET_CODE (barrier) == BARRIER
5192 && label && GET_CODE (label) == CODE_LABEL
5193 && GET_CODE (PATTERN (jump)) == SET
5194 && SET_DEST (PATTERN (jump)) == pc_rtx
5195 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
5196 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
5199 remove_insn (barrier);
5200 remove_insn (label);
5203 remove_insn (curr_pool->pool_insn);
5206 /* Remove all base register reload insns. */
5208 for (insn = get_insns (); insn; )
5210 rtx next_insn = NEXT_INSN (insn);
5212 if (GET_CODE (insn) == INSN
5213 && GET_CODE (PATTERN (insn)) == SET
5214 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
5215 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
5221 /* Free pool list. */
5225 struct constant_pool *next = pool_list->next;
5226 s390_free_pool (pool_list);
5232 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
5235 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
5239 switch (GET_MODE_CLASS (mode))
5242 if (GET_CODE (exp) != CONST_DOUBLE)
5245 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
5246 assemble_real (r, mode, align);
5250 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5259 /* Rework the prolog/epilog to avoid saving/restoring
5260 registers unnecessarily. BASE_USED specifies whether
5261 the literal pool base register needs to be saved. */
5264 s390_optimize_prolog (bool base_used)
5266 rtx insn, new_insn, next_insn;
5268 /* Do a final recompute of the frame-related data. */
5270 s390_frame_info (base_used, cfun->machine->save_return_addr_p);
5271 regs_ever_live[BASE_REGNUM] = base_used;
5272 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
5273 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5275 /* If all special registers are in fact used, there's nothing we
5276 can do, so no point in walking the insn list. */
5278 if (cfun->machine->first_save_gpr <= BASE_REGNUM
5279 && cfun->machine->last_save_gpr >= BASE_REGNUM
5280 && (TARGET_CPU_ZARCH
5281 || (cfun->machine->first_save_gpr <= RETURN_REGNUM
5282 && cfun->machine->last_save_gpr >= RETURN_REGNUM)))
5285 /* Search for prolog/epilog insns and replace them. */
5287 for (insn = get_insns (); insn; insn = next_insn)
5289 int first, last, off;
5290 rtx set, base, offset;
5292 next_insn = NEXT_INSN (insn);
5294 if (GET_CODE (insn) != INSN)
5297 if (GET_CODE (PATTERN (insn)) == PARALLEL
5298 && store_multiple_operation (PATTERN (insn), VOIDmode))
5300 set = XVECEXP (PATTERN (insn), 0, 0);
5301 first = REGNO (SET_SRC (set));
5302 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5303 offset = const0_rtx;
5304 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5305 off = INTVAL (offset) - first * UNITS_PER_WORD;
5307 if (GET_CODE (base) != REG || off < 0)
5309 if (first > BASE_REGNUM || last < BASE_REGNUM)
5312 if (cfun->machine->first_save_gpr != -1)
5314 new_insn = save_gprs (base, off, cfun->machine->first_save_gpr,
5315 cfun->machine->last_save_gpr);
5316 new_insn = emit_insn_before (new_insn, insn);
5317 INSN_ADDRESSES_NEW (new_insn, -1);
5324 if (GET_CODE (PATTERN (insn)) == SET
5325 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5326 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGNUM
5327 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5329 set = PATTERN (insn);
5330 offset = const0_rtx;
5331 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5332 off = INTVAL (offset) - BASE_REGNUM * UNITS_PER_WORD;
5334 if (GET_CODE (base) != REG || off < 0)
5337 if (cfun->machine->first_save_gpr != -1)
5339 new_insn = save_gprs (base, off, cfun->machine->first_save_gpr,
5340 cfun->machine->last_save_gpr);
5341 new_insn = emit_insn_before (new_insn, insn);
5342 INSN_ADDRESSES_NEW (new_insn, -1);
5349 if (GET_CODE (PATTERN (insn)) == PARALLEL
5350 && load_multiple_operation (PATTERN (insn), VOIDmode))
5352 set = XVECEXP (PATTERN (insn), 0, 0);
5353 first = REGNO (SET_DEST (set));
5354 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5355 offset = const0_rtx;
5356 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5357 off = INTVAL (offset) - first * UNITS_PER_WORD;
5359 if (GET_CODE (base) != REG || off < 0)
5361 if (first > BASE_REGNUM || last < BASE_REGNUM)
5364 if (cfun->machine->first_restore_gpr != -1)
5366 new_insn = restore_gprs (base, off, cfun->machine->first_restore_gpr,
5367 cfun->machine->last_restore_gpr);
5368 new_insn = emit_insn_before (new_insn, insn);
5369 INSN_ADDRESSES_NEW (new_insn, -1);
5376 if (GET_CODE (PATTERN (insn)) == SET
5377 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5378 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGNUM
5379 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5381 set = PATTERN (insn);
5382 offset = const0_rtx;
5383 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5384 off = INTVAL (offset) - BASE_REGNUM * UNITS_PER_WORD;
5386 if (GET_CODE (base) != REG || off < 0)
5389 if (cfun->machine->first_restore_gpr != -1)
5391 new_insn = restore_gprs (base, off, cfun->machine->first_restore_gpr,
5392 cfun->machine->last_restore_gpr);
5393 new_insn = emit_insn_before (new_insn, insn);
5394 INSN_ADDRESSES_NEW (new_insn, -1);
5403 /* Perform machine-dependent processing. */
5408 bool base_used = false;
5409 bool pool_overflow = false;
5411 /* Make sure all splits have been performed; splits after
5412 machine_dependent_reorg might confuse insn length counts. */
5413 split_all_insns_noflow ();
5416 /* Install the main literal pool and the associated base
5417 register load insns.
5419 In addition, there are two problematic situations we need
5422 - the literal pool might be > 4096 bytes in size, so that
5423 some of its elements cannot be directly accessed
5425 - a branch target might be > 64K away from the branch, so that
5426 it is not possible to use a PC-relative instruction.
5428 To fix those, we split the single literal pool into multiple
5429 pool chunks, reloading the pool base register at various
5430 points throughout the function to ensure it always points to
5431 the pool chunk the following code expects, and / or replace
5432 PC-relative branches by absolute branches.
5434 However, the two problems are interdependent: splitting the
5435 literal pool can move a branch further away from its target,
5436 causing the 64K limit to overflow, and on the other hand,
5437 replacing a PC-relative branch by an absolute branch means
5438 we need to put the branch target address into the literal
5439 pool, possibly causing it to overflow.
5441 So, we loop trying to fix up both problems until we manage
5442 to satisfy both conditions at the same time. Note that the
5443 loop is guaranteed to terminate as every pass of the loop
5444 strictly decreases the total number of PC-relative branches
5445 in the function. (This is not completely true as there
5446 might be branch-over-pool insns introduced by chunkify_start.
5447 Those never need to be split however.) */
5451 struct constant_pool *pool = NULL;
5453 /* Collect the literal pool. */
5456 pool = s390_mainpool_start ();
5458 pool_overflow = true;
5461 /* If literal pool overflowed, start to chunkify it. */
5463 pool = s390_chunkify_start ();
5465 /* Split out-of-range branches. If this has created new
5466 literal pool entries, cancel current chunk list and
5467 recompute it. zSeries machines have large branch
5468 instructions, so we never need to split a branch. */
5469 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5472 s390_chunkify_cancel (pool);
5474 s390_mainpool_cancel (pool);
5479 /* If we made it up to here, both conditions are satisfied.
5480 Finish up literal pool related changes. */
5481 if ((pool_overflow || pool->size > 0)
5482 && REGNO (cfun->machine->base_reg) == BASE_REGNUM)
5486 s390_chunkify_finish (pool);
5488 s390_mainpool_finish (pool);
5493 s390_optimize_prolog (base_used);
5497 /* Return an RTL expression representing the value of the return address
5498 for the frame COUNT steps up from the current frame. FRAME is the
5499 frame pointer of that frame. */
5502 s390_return_addr_rtx (int count, rtx frame)
5506 /* Without backchain, we fail for all but the current frame. */
5508 if (!TARGET_BACKCHAIN && count > 0)
5511 /* For the current frame, we need to make sure the initial
5512 value of RETURN_REGNUM is actually saved. */
5515 cfun->machine->save_return_addr_p = true;
5517 /* To retrieve the return address we read the stack slot where the
5518 corresponding RETURN_REGNUM value was saved. */
5520 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5521 addr = memory_address (Pmode, addr);
5522 return gen_rtx_MEM (Pmode, addr);
5525 /* Find first call clobbered register unused in a function.
5526 This could be used as base register in a leaf function
5527 or for holding the return address before epilogue. */
5530 find_unused_clobbered_reg (void)
5533 for (i = 0; i < 6; i++)
5534 if (!regs_ever_live[i])
5539 /* Fill cfun->machine with info about frame of current function.
5540 BASE_USED and RETURN_ADDR_USED specify whether we assume the
5541 base and return address register will need to be saved. */
5544 s390_frame_info (int base_used, int return_addr_used)
5548 HOST_WIDE_INT fsize = get_frame_size ();
5550 if (!TARGET_64BIT && fsize > 0x7fff0000)
5551 fatal_error ("Total size of local variables exceeds architecture limit.");
5553 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5554 cfun->machine->save_fprs_p = 0;
5556 for (i = 24; i < 32; i++)
5557 if (regs_ever_live[i] && !global_regs[i])
5559 cfun->machine->save_fprs_p = 1;
5563 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5565 /* Does function need to setup frame and save area. */
5567 if (!current_function_is_leaf
5568 || TARGET_TPF_PROFILING
5569 || cfun->machine->frame_size > 0
5570 || current_function_calls_alloca
5571 || current_function_stdarg)
5572 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5574 /* Find first and last gpr to be saved. We trust regs_ever_live
5575 data, except that we don't save and restore global registers.
5577 Also, all registers with special meaning to the compiler need
5578 to be handled extra. */
5580 for (i = 0; i < 16; i++)
5581 live_regs[i] = regs_ever_live[i] && !global_regs[i];
5584 live_regs[PIC_OFFSET_TABLE_REGNUM] =
5585 regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
5587 live_regs[BASE_REGNUM] = base_used;
5588 live_regs[RETURN_REGNUM] = return_addr_used;
5589 live_regs[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5591 for (i = 6; i < 16; i++)
5594 for (j = 15; j > i; j--)
5600 /* Nothing to save/restore. */
5601 cfun->machine->first_save_gpr = -1;
5602 cfun->machine->first_restore_gpr = -1;
5603 cfun->machine->last_save_gpr = -1;
5604 cfun->machine->last_restore_gpr = -1;
5608 /* Save / Restore from gpr i to j. */
5609 cfun->machine->first_save_gpr = i;
5610 cfun->machine->first_restore_gpr = i;
5611 cfun->machine->last_save_gpr = j;
5612 cfun->machine->last_restore_gpr = j;
5615 /* Varargs functions need to save gprs 2 to 6. */
5616 if (current_function_stdarg)
5618 if (cfun->machine->first_save_gpr == -1
5619 || cfun->machine->first_save_gpr > 2)
5620 cfun->machine->first_save_gpr = 2;
5622 if (cfun->machine->last_save_gpr == -1
5623 || cfun->machine->last_save_gpr < 6)
5624 cfun->machine->last_save_gpr = 6;
5628 /* Return offset between argument pointer and frame pointer
5629 initially after prologue. */
5632 s390_arg_frame_offset (void)
5634 /* See the comment in s390_emit_prologue about the assumptions we make
5635 whether or not the base and return address register need to be saved. */
5636 int return_addr_used = !current_function_is_leaf
5637 || TARGET_TPF_PROFILING
5638 || regs_ever_live[RETURN_REGNUM]
5639 || cfun->machine->save_return_addr_p;
5641 s390_frame_info (1, !TARGET_CPU_ZARCH || return_addr_used);
5642 return cfun->machine->frame_size + STACK_POINTER_OFFSET;
5645 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5646 to register BASE. Return generated insn. */
5649 save_fpr (rtx base, int offset, int regnum)
5652 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5653 set_mem_alias_set (addr, s390_sr_alias_set);
5655 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5658 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5659 to register BASE. Return generated insn. */
5662 restore_fpr (rtx base, int offset, int regnum)
5665 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5666 set_mem_alias_set (addr, s390_sr_alias_set);
5668 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5671 /* Generate insn to save registers FIRST to LAST into
5672 the register save area located at offset OFFSET
5673 relative to register BASE. */
5676 save_gprs (rtx base, int offset, int first, int last)
5678 rtx addr, insn, note;
5681 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5682 addr = gen_rtx_MEM (Pmode, addr);
5683 set_mem_alias_set (addr, s390_sr_alias_set);
5685 /* Special-case single register. */
5689 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5691 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5693 RTX_FRAME_RELATED_P (insn) = 1;
5698 insn = gen_store_multiple (addr,
5699 gen_rtx_REG (Pmode, first),
5700 GEN_INT (last - first + 1));
5703 /* We need to set the FRAME_RELATED flag on all SETs
5704 inside the store-multiple pattern.
5706 However, we must not emit DWARF records for registers 2..5
5707 if they are stored for use by variable arguments ...
5709 ??? Unfortunately, it is not enough to simply not the the
5710 FRAME_RELATED flags for those SETs, because the first SET
5711 of the PARALLEL is always treated as if it had the flag
5712 set, even if it does not. Therefore we emit a new pattern
5713 without those registers as REG_FRAME_RELATED_EXPR note. */
5717 rtx pat = PATTERN (insn);
5719 for (i = 0; i < XVECLEN (pat, 0); i++)
5720 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5721 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5723 RTX_FRAME_RELATED_P (insn) = 1;
5727 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5728 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5729 gen_rtx_REG (Pmode, 6),
5730 GEN_INT (last - 6 + 1));
5731 note = PATTERN (note);
5734 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5735 note, REG_NOTES (insn));
5737 for (i = 0; i < XVECLEN (note, 0); i++)
5738 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5739 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5741 RTX_FRAME_RELATED_P (insn) = 1;
5747 /* Generate insn to restore registers FIRST to LAST from
5748 the register save area located at offset OFFSET
5749 relative to register BASE. */
5752 restore_gprs (rtx base, int offset, int first, int last)
5756 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5757 addr = gen_rtx_MEM (Pmode, addr);
5758 set_mem_alias_set (addr, s390_sr_alias_set);
5760 /* Special-case single register. */
5764 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5766 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5771 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5773 GEN_INT (last - first + 1));
5777 /* Return insn sequence to load the GOT register. */
5779 static GTY(()) rtx got_symbol;
5781 s390_load_got (void)
5787 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5788 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5793 if (TARGET_CPU_ZARCH)
5795 emit_move_insn (pic_offset_table_rtx, got_symbol);
5801 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5802 UNSPEC_LTREL_OFFSET);
5803 offset = gen_rtx_CONST (Pmode, offset);
5804 offset = force_const_mem (Pmode, offset);
5806 emit_move_insn (pic_offset_table_rtx, offset);
5808 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5810 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5812 emit_move_insn (pic_offset_table_rtx, offset);
5815 insns = get_insns ();
5820 /* Expand the prologue into a bunch of separate insns. */
5823 s390_emit_prologue (void)
5829 /* At this point, we decide whether we'll need to save/restore the
5830 return address register. This decision is final on zSeries machines;
5831 on S/390 it can still be overridden in s390_split_branches. */
5833 if (!current_function_is_leaf
5834 || TARGET_TPF_PROFILING
5835 || regs_ever_live[RETURN_REGNUM])
5836 cfun->machine->save_return_addr_p = 1;
5838 /* Decide which register to use as literal pool base. In small leaf
5839 functions, try to use an unused call-clobbered register as base
5840 register to avoid save/restore overhead. */
5842 if (current_function_is_leaf && !regs_ever_live[5])
5843 cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
5845 cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
5847 regs_ever_live[REGNO (cfun->machine->base_reg)] = 1;
5849 /* Compute frame info. Note that at this point, we assume the base
5850 register and -on S/390- the return register always need to be saved.
5851 This is done because the usage of these registers might change even
5852 after the prolog was emitted. If it turns out later that we really
5853 don't need them, the prolog/epilog code is modified again. */
5855 s390_frame_info (1, !TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p);
5857 /* We need to update regs_ever_live to avoid data-flow problems. */
5859 regs_ever_live[BASE_REGNUM] = 1;
5860 regs_ever_live[RETURN_REGNUM] = !TARGET_CPU_ZARCH
5861 || cfun->machine->save_return_addr_p;
5862 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5864 /* Annotate all constant pool references to let the scheduler know
5865 they implicitly use the base register. */
5867 push_topmost_sequence ();
5869 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5871 annotate_constant_pool_refs (&PATTERN (insn));
5873 pop_topmost_sequence ();
5875 /* Choose best register to use for temp use within prologue.
5876 See below for why TPF must use the register 1. */
5878 if (!current_function_is_leaf
5879 && !TARGET_TPF_PROFILING)
5880 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5882 temp_reg = gen_rtx_REG (Pmode, 1);
5884 /* Save call saved gprs. */
5886 insn = save_gprs (stack_pointer_rtx, 0,
5887 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5890 /* Dummy insn to mark literal pool slot. */
5892 emit_insn (gen_main_pool (cfun->machine->base_reg));
5894 /* Save fprs for variable args. */
5896 if (current_function_stdarg)
5897 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5898 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5900 /* Save fprs 4 and 6 if used (31 bit ABI). */
5903 for (i = 18; i < 20; i++)
5904 if (regs_ever_live[i] && !global_regs[i])
5906 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5907 RTX_FRAME_RELATED_P (insn) = 1;
5910 /* Decrement stack pointer. */
5912 if (cfun->machine->frame_size > 0)
5914 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5916 /* Save incoming stack pointer into temp reg. */
5918 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5920 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5923 /* Subtract frame size from stack pointer. */
5925 if (DISP_IN_RANGE (INTVAL (frame_off)))
5927 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5928 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5930 insn = emit_insn (insn);
5934 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5935 frame_off = force_const_mem (Pmode, frame_off);
5937 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5938 annotate_constant_pool_refs (&PATTERN (insn));
5941 RTX_FRAME_RELATED_P (insn) = 1;
5943 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5944 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5945 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5946 GEN_INT (-cfun->machine->frame_size))),
5949 /* Set backchain. */
5951 if (TARGET_BACKCHAIN)
5953 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5954 set_mem_alias_set (addr, s390_sr_alias_set);
5955 insn = emit_insn (gen_move_insn (addr, temp_reg));
5958 /* If we support asynchronous exceptions (e.g. for Java),
5959 we need to make sure the backchain pointer is set up
5960 before any possibly trapping memory access. */
5962 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5964 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5965 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5969 /* Save fprs 8 - 15 (64 bit ABI). */
5971 if (cfun->machine->save_fprs_p)
5973 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5975 for (i = 24; i < 32; i++)
5976 if (regs_ever_live[i] && !global_regs[i])
5978 rtx addr = plus_constant (stack_pointer_rtx,
5979 cfun->machine->frame_size - 64 + (i-24)*8);
5981 insn = save_fpr (temp_reg, (i-24)*8, i);
5982 RTX_FRAME_RELATED_P (insn) = 1;
5984 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5985 gen_rtx_SET (VOIDmode,
5986 gen_rtx_MEM (DFmode, addr),
5987 gen_rtx_REG (DFmode, i)),
5992 /* Set frame pointer, if needed. */
5994 if (frame_pointer_needed)
5996 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5997 RTX_FRAME_RELATED_P (insn) = 1;
6000 /* Set up got pointer, if needed. */
6002 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
6004 rtx insns = s390_load_got ();
6006 for (insn = insns; insn; insn = NEXT_INSN (insn))
6008 annotate_constant_pool_refs (&PATTERN (insn));
6010 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
6017 if (TARGET_TPF_PROFILING)
6019 /* Generate a BAS instruction to serve as a function
6020 entry intercept to facilitate the use of tracing
6021 algorithms located at the branch target. */
6022 emit_insn (gen_prologue_tpf ());
6024 /* Emit a blockage here so that all code
6025 lies between the profiling mechanisms. */
6026 emit_insn (gen_blockage ());
6030 /* Expand the epilogue into a bunch of separate insns. */
6033 s390_emit_epilogue (bool sibcall)
6035 rtx frame_pointer, return_reg;
6036 int area_bottom, area_top, offset = 0;
6040 if (TARGET_TPF_PROFILING)
6043 /* Generate a BAS instruction to serve as a function
6044 entry intercept to facilitate the use of tracing
6045 algorithms located at the branch target. */
6047 /* Emit a blockage here so that all code
6048 lies between the profiling mechanisms. */
6049 emit_insn (gen_blockage ());
6051 emit_insn (gen_epilogue_tpf ());
6054 /* Check whether to use frame or stack pointer for restore. */
6056 frame_pointer = frame_pointer_needed ?
6057 hard_frame_pointer_rtx : stack_pointer_rtx;
6059 /* Compute which parts of the save area we need to access. */
6061 if (cfun->machine->first_restore_gpr != -1)
6063 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
6064 area_top = (cfun->machine->last_restore_gpr + 1) * UNITS_PER_WORD;
6068 area_bottom = INT_MAX;
6074 if (cfun->machine->save_fprs_p)
6076 if (area_bottom > -64)
6084 for (i = 18; i < 20; i++)
6085 if (regs_ever_live[i] && !global_regs[i])
6087 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
6088 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
6089 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
6090 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
6094 /* Check whether we can access the register save area.
6095 If not, increment the frame pointer as required. */
6097 if (area_top <= area_bottom)
6099 /* Nothing to restore. */
6101 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
6102 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
6104 /* Area is in range. */
6105 offset = cfun->machine->frame_size;
6109 rtx insn, frame_off;
6111 offset = area_bottom < 0 ? -area_bottom : 0;
6112 frame_off = GEN_INT (cfun->machine->frame_size - offset);
6114 if (DISP_IN_RANGE (INTVAL (frame_off)))
6116 insn = gen_rtx_SET (VOIDmode, frame_pointer,
6117 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
6118 insn = emit_insn (insn);
6122 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6123 frame_off = force_const_mem (Pmode, frame_off);
6125 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
6126 annotate_constant_pool_refs (&PATTERN (insn));
6130 /* Restore call saved fprs. */
6134 if (cfun->machine->save_fprs_p)
6135 for (i = 24; i < 32; i++)
6136 if (regs_ever_live[i] && !global_regs[i])
6137 restore_fpr (frame_pointer,
6138 offset - 64 + (i-24) * 8, i);
6142 for (i = 18; i < 20; i++)
6143 if (regs_ever_live[i] && !global_regs[i])
6144 restore_fpr (frame_pointer,
6145 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
6148 /* Return register. */
6150 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6152 /* Restore call saved gprs. */
6154 if (cfun->machine->first_restore_gpr != -1)
6159 /* Check for global register and save them
6160 to stack location from where they get restored. */
6162 for (i = cfun->machine->first_restore_gpr;
6163 i <= cfun->machine->last_restore_gpr;
6166 /* These registers are special and need to be
6167 restored in any case. */
6168 if (i == STACK_POINTER_REGNUM
6169 || i == RETURN_REGNUM
6171 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
6176 addr = plus_constant (frame_pointer,
6177 offset + i * UNITS_PER_WORD);
6178 addr = gen_rtx_MEM (Pmode, addr);
6179 set_mem_alias_set (addr, s390_sr_alias_set);
6180 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
6186 /* Fetch return address from stack before load multiple,
6187 this will do good for scheduling. */
6189 if (cfun->machine->save_return_addr_p
6190 || (cfun->machine->first_restore_gpr < BASE_REGNUM
6191 && cfun->machine->last_restore_gpr > RETURN_REGNUM))
6193 int return_regnum = find_unused_clobbered_reg();
6196 return_reg = gen_rtx_REG (Pmode, return_regnum);
6198 addr = plus_constant (frame_pointer,
6199 offset + RETURN_REGNUM * UNITS_PER_WORD);
6200 addr = gen_rtx_MEM (Pmode, addr);
6201 set_mem_alias_set (addr, s390_sr_alias_set);
6202 emit_move_insn (return_reg, addr);
6206 insn = restore_gprs (frame_pointer, offset,
6207 cfun->machine->first_restore_gpr,
6208 cfun->machine->last_restore_gpr);
6215 /* Return to caller. */
6217 p = rtvec_alloc (2);
6219 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
6220 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
6221 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
6226 /* Return the size in bytes of a function argument of
6227 type TYPE and/or mode MODE. At least one of TYPE or
6228 MODE must be specified. */
6231 s390_function_arg_size (enum machine_mode mode, tree type)
6234 return int_size_in_bytes (type);
6236 /* No type info available for some library calls ... */
6237 if (mode != BLKmode)
6238 return GET_MODE_SIZE (mode);
6240 /* If we have neither type nor mode, abort */
6244 /* Return true if a function argument of type TYPE and mode MODE
6245 is to be passed in a floating-point register, if available. */
6248 s390_function_arg_float (enum machine_mode mode, tree type)
6250 int size = s390_function_arg_size (mode, type);
6254 /* Soft-float changes the ABI: no floating-point registers are used. */
6255 if (TARGET_SOFT_FLOAT)
6258 /* No type info available for some library calls ... */
6260 return mode == SFmode || mode == DFmode;
6262 /* The ABI says that record types with a single member are treated
6263 just like that member would be. */
6264 while (TREE_CODE (type) == RECORD_TYPE)
6266 tree field, single = NULL_TREE;
6268 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
6270 if (TREE_CODE (field) != FIELD_DECL)
6273 if (single == NULL_TREE)
6274 single = TREE_TYPE (field);
6279 if (single == NULL_TREE)
6285 return TREE_CODE (type) == REAL_TYPE;
6288 /* Return true if a function argument of type TYPE and mode MODE
6289 is to be passed in an integer register, or a pair of integer
6290 registers, if available. */
6293 s390_function_arg_integer (enum machine_mode mode, tree type)
6295 int size = s390_function_arg_size (mode, type);
6299 /* No type info available for some library calls ... */
6301 return GET_MODE_CLASS (mode) == MODE_INT
6302 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6304 /* We accept small integral (and similar) types. */
6305 if (INTEGRAL_TYPE_P (type)
6306 || POINTER_TYPE_P (type)
6307 || TREE_CODE (type) == OFFSET_TYPE
6308 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6311 /* We also accept structs of size 1, 2, 4, 8 that are not
6312 passed in floating-point registers. */
6313 if (AGGREGATE_TYPE_P (type)
6314 && exact_log2 (size) >= 0
6315 && !s390_function_arg_float (mode, type))
6321 /* Return 1 if a function argument of type TYPE and mode MODE
6322 is to be passed by reference. The ABI specifies that only
6323 structures of size 1, 2, 4, or 8 bytes are passed by value,
6324 all other structures (and complex numbers) are passed by
6328 s390_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
6329 enum machine_mode mode, tree type,
6330 bool named ATTRIBUTE_UNUSED)
6332 int size = s390_function_arg_size (mode, type);
6338 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6341 if (TREE_CODE (type) == COMPLEX_TYPE
6342 || TREE_CODE (type) == VECTOR_TYPE)
6349 /* Update the data in CUM to advance over an argument of mode MODE and
6350 data type TYPE. (TYPE is null for libcalls where that information
6351 may not be available.). The boolean NAMED specifies whether the
6352 argument is a named argument (as opposed to an unnamed argument
6353 matching an ellipsis). */
6356 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6357 tree type, int named ATTRIBUTE_UNUSED)
6359 if (s390_function_arg_float (mode, type))
6363 else if (s390_function_arg_integer (mode, type))
6365 int size = s390_function_arg_size (mode, type);
6366 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6372 /* Define where to put the arguments to a function.
6373 Value is zero to push the argument on the stack,
6374 or a hard register in which to store the argument.
6376 MODE is the argument's machine mode.
6377 TYPE is the data type of the argument (as a tree).
6378 This is null for libcalls where that information may
6380 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6381 the preceding args and about the function being called.
6382 NAMED is nonzero if this argument is a named parameter
6383 (otherwise it is an extra parameter matching an ellipsis).
6385 On S/390, we use general purpose registers 2 through 6 to
6386 pass integer, pointer, and certain structure arguments, and
6387 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6388 to pass floating point arguments. All remaining arguments
6389 are pushed to the stack. */
6392 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6393 int named ATTRIBUTE_UNUSED)
6395 if (s390_function_arg_float (mode, type))
6397 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6400 return gen_rtx_REG (mode, cum->fprs + 16);
6402 else if (s390_function_arg_integer (mode, type))
6404 int size = s390_function_arg_size (mode, type);
6405 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6407 if (cum->gprs + n_gprs > 5)
6410 return gen_rtx_REG (mode, cum->gprs + 2);
6413 /* After the real arguments, expand_call calls us once again
6414 with a void_type_node type. Whatever we return here is
6415 passed as operand 2 to the call expanders.
6417 We don't need this feature ... */
6418 else if (type == void_type_node)
6424 /* Return true if return values of type TYPE should be returned
6425 in a memory buffer whose address is passed by the caller as
6426 hidden first argument. */
6429 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6431 /* We accept small integral (and similar) types. */
6432 if (INTEGRAL_TYPE_P (type)
6433 || POINTER_TYPE_P (type)
6434 || TREE_CODE (type) == OFFSET_TYPE
6435 || TREE_CODE (type) == REAL_TYPE)
6436 return int_size_in_bytes (type) > 8;
6438 /* Aggregates and similar constructs are always returned
6440 if (AGGREGATE_TYPE_P (type)
6441 || TREE_CODE (type) == COMPLEX_TYPE
6442 || TREE_CODE (type) == VECTOR_TYPE)
6445 /* ??? We get called on all sorts of random stuff from
6446 aggregate_value_p. We can't abort, but it's not clear
6447 what's safe to return. Pretend it's a struct I guess. */
6451 /* Define where to return a (scalar) value of type TYPE.
6452 If TYPE is null, define where to return a (scalar)
6453 value of mode MODE from a libcall. */
6456 s390_function_value (tree type, enum machine_mode mode)
6460 int unsignedp = TYPE_UNSIGNED (type);
6461 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6464 if (GET_MODE_CLASS (mode) != MODE_INT
6465 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6467 if (GET_MODE_SIZE (mode) > 8)
6470 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6471 return gen_rtx_REG (mode, 16);
6473 return gen_rtx_REG (mode, 2);
6477 /* Create and return the va_list datatype.
6479 On S/390, va_list is an array type equivalent to
6481 typedef struct __va_list_tag
6485 void *__overflow_arg_area;
6486 void *__reg_save_area;
6489 where __gpr and __fpr hold the number of general purpose
6490 or floating point arguments used up to now, respectively,
6491 __overflow_arg_area points to the stack location of the
6492 next argument passed on the stack, and __reg_save_area
6493 always points to the start of the register area in the
6494 call frame of the current function. The function prologue
6495 saves all registers used for argument passing into this
6496 area if the function uses variable arguments. */
6499 s390_build_builtin_va_list (void)
6501 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6503 record = lang_hooks.types.make_type (RECORD_TYPE);
6506 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6508 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6509 long_integer_type_node);
6510 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6511 long_integer_type_node);
6512 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6514 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6517 DECL_FIELD_CONTEXT (f_gpr) = record;
6518 DECL_FIELD_CONTEXT (f_fpr) = record;
6519 DECL_FIELD_CONTEXT (f_ovf) = record;
6520 DECL_FIELD_CONTEXT (f_sav) = record;
6522 TREE_CHAIN (record) = type_decl;
6523 TYPE_NAME (record) = type_decl;
6524 TYPE_FIELDS (record) = f_gpr;
6525 TREE_CHAIN (f_gpr) = f_fpr;
6526 TREE_CHAIN (f_fpr) = f_ovf;
6527 TREE_CHAIN (f_ovf) = f_sav;
6529 layout_type (record);
6531 /* The correct type is an array type of one element. */
6532 return build_array_type (record, build_index_type (size_zero_node));
6535 /* Implement va_start by filling the va_list structure VALIST.
6536 STDARG_P is always true, and ignored.
6537 NEXTARG points to the first anonymous stack argument.
6539 The following global variables are used to initialize
6540 the va_list structure:
6542 current_function_args_info:
6543 holds number of gprs and fprs used for named arguments.
6544 current_function_arg_offset_rtx:
6545 holds the offset of the first anonymous stack argument
6546 (relative to the virtual arg pointer). */
6549 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6551 HOST_WIDE_INT n_gpr, n_fpr;
6553 tree f_gpr, f_fpr, f_ovf, f_sav;
6554 tree gpr, fpr, ovf, sav, t;
6556 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6557 f_fpr = TREE_CHAIN (f_gpr);
6558 f_ovf = TREE_CHAIN (f_fpr);
6559 f_sav = TREE_CHAIN (f_ovf);
6561 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6562 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
6563 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
6564 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
6565 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
6567 /* Count number of gp and fp argument registers used. */
6569 n_gpr = current_function_args_info.gprs;
6570 n_fpr = current_function_args_info.fprs;
6572 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6573 TREE_SIDE_EFFECTS (t) = 1;
6574 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6576 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6577 TREE_SIDE_EFFECTS (t) = 1;
6578 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6580 /* Find the overflow area. */
6581 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6583 off = INTVAL (current_function_arg_offset_rtx);
6584 off = off < 0 ? 0 : off;
6585 if (TARGET_DEBUG_ARG)
6586 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6587 (int)n_gpr, (int)n_fpr, off);
6589 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6591 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6592 TREE_SIDE_EFFECTS (t) = 1;
6593 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6595 /* Find the register save area. */
6596 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6597 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6598 build_int_2 (-STACK_POINTER_OFFSET, -1));
6599 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6600 TREE_SIDE_EFFECTS (t) = 1;
6601 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6604 /* Implement va_arg by updating the va_list structure
6605 VALIST as required to retrieve an argument of type
6606 TYPE, and returning that argument.
6608 Generates code equivalent to:
6610 if (integral value) {
6611 if (size <= 4 && args.gpr < 5 ||
6612 size > 4 && args.gpr < 4 )
6613 ret = args.reg_save_area[args.gpr+8]
6615 ret = *args.overflow_arg_area++;
6616 } else if (float value) {
6618 ret = args.reg_save_area[args.fpr+64]
6620 ret = *args.overflow_arg_area++;
6621 } else if (aggregate value) {
6623 ret = *args.reg_save_area[args.gpr]
6625 ret = **args.overflow_arg_area++;
6629 s390_gimplify_va_arg (tree valist, tree type, tree *pre_p,
6630 tree *post_p ATTRIBUTE_UNUSED)
6632 tree f_gpr, f_fpr, f_ovf, f_sav;
6633 tree gpr, fpr, ovf, sav, reg, t, u;
6634 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6635 tree lab_false, lab_over, addr;
6637 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6638 f_fpr = TREE_CHAIN (f_gpr);
6639 f_ovf = TREE_CHAIN (f_fpr);
6640 f_sav = TREE_CHAIN (f_ovf);
6642 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6643 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
6644 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
6645 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
6646 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
6648 size = int_size_in_bytes (type);
6650 if (pass_by_reference (NULL, TYPE_MODE (type), type, false))
6652 if (TARGET_DEBUG_ARG)
6654 fprintf (stderr, "va_arg: aggregate type");
6658 /* Aggregates are passed by reference. */
6662 sav_ofs = 2 * UNITS_PER_WORD;
6663 sav_scale = UNITS_PER_WORD;
6664 size = UNITS_PER_WORD;
6667 else if (s390_function_arg_float (TYPE_MODE (type), type))
6669 if (TARGET_DEBUG_ARG)
6671 fprintf (stderr, "va_arg: float type");
6675 /* FP args go in FP registers, if present. */
6679 sav_ofs = 16 * UNITS_PER_WORD;
6681 /* TARGET_64BIT has up to 4 parameter in fprs */
6682 max_reg = TARGET_64BIT ? 3 : 1;
6686 if (TARGET_DEBUG_ARG)
6688 fprintf (stderr, "va_arg: other type");
6692 /* Otherwise into GP registers. */
6695 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6696 sav_ofs = 2 * UNITS_PER_WORD;
6698 if (size < UNITS_PER_WORD)
6699 sav_ofs += UNITS_PER_WORD - size;
6701 sav_scale = UNITS_PER_WORD;
6708 /* Pull the value out of the saved registers ... */
6710 lab_false = create_artificial_label ();
6711 lab_over = create_artificial_label ();
6712 addr = create_tmp_var (ptr_type_node, "addr");
6714 t = fold_convert (TREE_TYPE (reg), size_int (max_reg));
6715 t = build2 (GT_EXPR, boolean_type_node, reg, t);
6716 u = build1 (GOTO_EXPR, void_type_node, lab_false);
6717 t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE);
6718 gimplify_and_add (t, pre_p);
6720 t = build2 (PLUS_EXPR, ptr_type_node, sav,
6721 fold_convert (ptr_type_node, size_int (sav_ofs)));
6722 u = build2 (MULT_EXPR, TREE_TYPE (reg), reg,
6723 fold_convert (TREE_TYPE (reg), size_int (sav_scale)));
6724 t = build2 (PLUS_EXPR, ptr_type_node, t, fold_convert (ptr_type_node, u));
6726 t = build2 (MODIFY_EXPR, void_type_node, addr, t);
6727 gimplify_and_add (t, pre_p);
6729 t = build1 (GOTO_EXPR, void_type_node, lab_over);
6730 gimplify_and_add (t, pre_p);
6732 t = build1 (LABEL_EXPR, void_type_node, lab_false);
6733 append_to_statement_list (t, pre_p);
6736 /* ... Otherwise out of the overflow area. */
6739 if (size < UNITS_PER_WORD)
6740 t = build2 (PLUS_EXPR, ptr_type_node, t,
6741 fold_convert (ptr_type_node, size_int (UNITS_PER_WORD - size)));
6743 gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
6745 u = build2 (MODIFY_EXPR, void_type_node, addr, t);
6746 gimplify_and_add (u, pre_p);
6748 t = build2 (PLUS_EXPR, ptr_type_node, t,
6749 fold_convert (ptr_type_node, size_int (size)));
6750 t = build2 (MODIFY_EXPR, ptr_type_node, ovf, t);
6751 gimplify_and_add (t, pre_p);
6753 t = build1 (LABEL_EXPR, void_type_node, lab_over);
6754 append_to_statement_list (t, pre_p);
6757 /* Increment register save count. */
6759 u = build2 (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6760 fold_convert (TREE_TYPE (reg), size_int (n_reg)));
6761 gimplify_and_add (u, pre_p);
6765 t = build_pointer_type (build_pointer_type (type));
6766 addr = fold_convert (t, addr);
6767 addr = build_fold_indirect_ref (addr);
6771 t = build_pointer_type (type);
6772 addr = fold_convert (t, addr);
6775 return build_fold_indirect_ref (addr);
6783 S390_BUILTIN_THREAD_POINTER,
6784 S390_BUILTIN_SET_THREAD_POINTER,
6789 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6794 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6800 s390_init_builtins (void)
6804 ftype = build_function_type (ptr_type_node, void_list_node);
6805 lang_hooks.builtin_function ("__builtin_thread_pointer", ftype,
6806 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6809 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6810 lang_hooks.builtin_function ("__builtin_set_thread_pointer", ftype,
6811 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6815 /* Expand an expression EXP that calls a built-in function,
6816 with result going to TARGET if that's convenient
6817 (and in mode MODE if that's convenient).
6818 SUBTARGET may be used as the target for computing one of EXP's operands.
6819 IGNORE is nonzero if the value is to be ignored. */
6822 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6823 enum machine_mode mode ATTRIBUTE_UNUSED,
6824 int ignore ATTRIBUTE_UNUSED)
6828 unsigned int const *code_for_builtin =
6829 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6831 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6832 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6833 tree arglist = TREE_OPERAND (exp, 1);
6834 enum insn_code icode;
6835 rtx op[MAX_ARGS], pat;
6839 if (fcode >= S390_BUILTIN_max)
6840 internal_error ("bad builtin fcode");
6841 icode = code_for_builtin[fcode];
6843 internal_error ("bad builtin fcode");
6845 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6847 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6849 arglist = TREE_CHAIN (arglist), arity++)
6851 const struct insn_operand_data *insn_op;
6853 tree arg = TREE_VALUE (arglist);
6854 if (arg == error_mark_node)
6856 if (arity > MAX_ARGS)
6859 insn_op = &insn_data[icode].operand[arity + nonvoid];
6861 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6863 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6864 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6869 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6871 || GET_MODE (target) != tmode
6872 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6873 target = gen_reg_rtx (tmode);
6879 pat = GEN_FCN (icode) (target);
6883 pat = GEN_FCN (icode) (target, op[0]);
6885 pat = GEN_FCN (icode) (op[0]);
6888 pat = GEN_FCN (icode) (target, op[0], op[1]);
6904 /* Output assembly code for the trampoline template to
6907 On S/390, we use gpr 1 internally in the trampoline code;
6908 gpr 0 is used to hold the static chain. */
6911 s390_trampoline_template (FILE *file)
6915 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6916 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6917 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6918 fprintf (file, "br\t%s\n", reg_names[1]);
6919 fprintf (file, "0:\t.quad\t0\n");
6920 fprintf (file, ".quad\t0\n");
6924 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6925 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6926 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6927 fprintf (file, "br\t%s\n", reg_names[1]);
6928 fprintf (file, ".long\t0\n");
6929 fprintf (file, ".long\t0\n");
6933 /* Emit RTL insns to initialize the variable parts of a trampoline.
6934 FNADDR is an RTX for the address of the function's pure code.
6935 CXT is an RTX for the static chain value for the function. */
6938 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6940 emit_move_insn (gen_rtx_MEM (Pmode,
6941 memory_address (Pmode,
6942 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6943 emit_move_insn (gen_rtx_MEM (Pmode,
6944 memory_address (Pmode,
6945 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6948 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6949 LOW and HIGH, independent of the host word size. */
6952 s390_gen_rtx_const_DI (int high, int low)
6954 #if HOST_BITS_PER_WIDE_INT >= 64
6956 val = (HOST_WIDE_INT)high;
6958 val |= (HOST_WIDE_INT)low;
6960 return GEN_INT (val);
6962 #if HOST_BITS_PER_WIDE_INT >= 32
6963 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6970 /* Output assembler code to FILE to increment profiler label # LABELNO
6971 for profiling a function entry. */
6974 s390_function_profiler (FILE *file, int labelno)
6979 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6981 fprintf (file, "# function profiler \n");
6983 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6984 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6985 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6987 op[2] = gen_rtx_REG (Pmode, 1);
6988 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6989 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6991 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6994 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6995 op[4] = gen_rtx_CONST (Pmode, op[4]);
7000 output_asm_insn ("stg\t%0,%1", op);
7001 output_asm_insn ("larl\t%2,%3", op);
7002 output_asm_insn ("brasl\t%0,%4", op);
7003 output_asm_insn ("lg\t%0,%1", op);
7007 op[6] = gen_label_rtx ();
7009 output_asm_insn ("st\t%0,%1", op);
7010 output_asm_insn ("bras\t%2,%l6", op);
7011 output_asm_insn (".long\t%4", op);
7012 output_asm_insn (".long\t%3", op);
7013 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7014 output_asm_insn ("l\t%0,0(%2)", op);
7015 output_asm_insn ("l\t%2,4(%2)", op);
7016 output_asm_insn ("basr\t%0,%0", op);
7017 output_asm_insn ("l\t%0,%1", op);
7021 op[5] = gen_label_rtx ();
7022 op[6] = gen_label_rtx ();
7024 output_asm_insn ("st\t%0,%1", op);
7025 output_asm_insn ("bras\t%2,%l6", op);
7026 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
7027 output_asm_insn (".long\t%4-%l5", op);
7028 output_asm_insn (".long\t%3-%l5", op);
7029 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7030 output_asm_insn ("lr\t%0,%2", op);
7031 output_asm_insn ("a\t%0,0(%2)", op);
7032 output_asm_insn ("a\t%2,4(%2)", op);
7033 output_asm_insn ("basr\t%0,%0", op);
7034 output_asm_insn ("l\t%0,%1", op);
7038 /* Select section for constant in constant pool. In 32-bit mode,
7039 constants go in the function section; in 64-bit mode in .rodata. */
7042 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
7043 rtx x ATTRIBUTE_UNUSED,
7044 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
7046 if (TARGET_CPU_ZARCH)
7047 readonly_data_section ();
7049 function_section (current_function_decl);
7052 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
7053 into its SYMBOL_REF_FLAGS. */
7056 s390_encode_section_info (tree decl, rtx rtl, int first)
7058 default_encode_section_info (decl, rtl, first);
7060 /* If a variable has a forced alignment to < 2 bytes, mark it with
7061 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
7062 if (TREE_CODE (decl) == VAR_DECL
7063 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
7064 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
7067 /* Output thunk to FILE that implements a C++ virtual function call (with
7068 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
7069 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
7070 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
7071 relative to the resulting this pointer. */
7074 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
7075 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
7081 /* Operand 0 is the target function. */
7082 op[0] = XEXP (DECL_RTL (function), 0);
7083 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
7086 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
7087 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
7088 op[0] = gen_rtx_CONST (Pmode, op[0]);
7091 /* Operand 1 is the 'this' pointer. */
7092 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
7093 op[1] = gen_rtx_REG (Pmode, 3);
7095 op[1] = gen_rtx_REG (Pmode, 2);
7097 /* Operand 2 is the delta. */
7098 op[2] = GEN_INT (delta);
7100 /* Operand 3 is the vcall_offset. */
7101 op[3] = GEN_INT (vcall_offset);
7103 /* Operand 4 is the temporary register. */
7104 op[4] = gen_rtx_REG (Pmode, 1);
7106 /* Operands 5 to 8 can be used as labels. */
7112 /* Operand 9 can be used for temporary register. */
7115 /* Generate code. */
7118 /* Setup literal pool pointer if required. */
7119 if ((!DISP_IN_RANGE (delta)
7120 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7121 || (!DISP_IN_RANGE (vcall_offset)
7122 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7124 op[5] = gen_label_rtx ();
7125 output_asm_insn ("larl\t%4,%5", op);
7128 /* Add DELTA to this pointer. */
7131 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7132 output_asm_insn ("la\t%1,%2(%1)", op);
7133 else if (DISP_IN_RANGE (delta))
7134 output_asm_insn ("lay\t%1,%2(%1)", op);
7135 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7136 output_asm_insn ("aghi\t%1,%2", op);
7139 op[6] = gen_label_rtx ();
7140 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
7144 /* Perform vcall adjustment. */
7147 if (DISP_IN_RANGE (vcall_offset))
7149 output_asm_insn ("lg\t%4,0(%1)", op);
7150 output_asm_insn ("ag\t%1,%3(%4)", op);
7152 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7154 output_asm_insn ("lghi\t%4,%3", op);
7155 output_asm_insn ("ag\t%4,0(%1)", op);
7156 output_asm_insn ("ag\t%1,0(%4)", op);
7160 op[7] = gen_label_rtx ();
7161 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
7162 output_asm_insn ("ag\t%4,0(%1)", op);
7163 output_asm_insn ("ag\t%1,0(%4)", op);
7167 /* Jump to target. */
7168 output_asm_insn ("jg\t%0", op);
7170 /* Output literal pool if required. */
7173 output_asm_insn (".align\t4", op);
7174 targetm.asm_out.internal_label (file, "L",
7175 CODE_LABEL_NUMBER (op[5]));
7179 targetm.asm_out.internal_label (file, "L",
7180 CODE_LABEL_NUMBER (op[6]));
7181 output_asm_insn (".long\t%2", op);
7185 targetm.asm_out.internal_label (file, "L",
7186 CODE_LABEL_NUMBER (op[7]));
7187 output_asm_insn (".long\t%3", op);
7192 /* Setup base pointer if required. */
7194 || (!DISP_IN_RANGE (delta)
7195 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7196 || (!DISP_IN_RANGE (delta)
7197 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7199 op[5] = gen_label_rtx ();
7200 output_asm_insn ("basr\t%4,0", op);
7201 targetm.asm_out.internal_label (file, "L",
7202 CODE_LABEL_NUMBER (op[5]));
7205 /* Add DELTA to this pointer. */
7208 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7209 output_asm_insn ("la\t%1,%2(%1)", op);
7210 else if (DISP_IN_RANGE (delta))
7211 output_asm_insn ("lay\t%1,%2(%1)", op);
7212 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7213 output_asm_insn ("ahi\t%1,%2", op);
7216 op[6] = gen_label_rtx ();
7217 output_asm_insn ("a\t%1,%6-%5(%4)", op);
7221 /* Perform vcall adjustment. */
7224 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
7226 output_asm_insn ("lg\t%4,0(%1)", op);
7227 output_asm_insn ("a\t%1,%3(%4)", op);
7229 else if (DISP_IN_RANGE (vcall_offset))
7231 output_asm_insn ("lg\t%4,0(%1)", op);
7232 output_asm_insn ("ay\t%1,%3(%4)", op);
7234 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7236 output_asm_insn ("lhi\t%4,%3", op);
7237 output_asm_insn ("a\t%4,0(%1)", op);
7238 output_asm_insn ("a\t%1,0(%4)", op);
7242 op[7] = gen_label_rtx ();
7243 output_asm_insn ("l\t%4,%7-%5(%4)", op);
7244 output_asm_insn ("a\t%4,0(%1)", op);
7245 output_asm_insn ("a\t%1,0(%4)", op);
7248 /* We had to clobber the base pointer register.
7249 Re-setup the base pointer (with a different base). */
7250 op[5] = gen_label_rtx ();
7251 output_asm_insn ("basr\t%4,0", op);
7252 targetm.asm_out.internal_label (file, "L",
7253 CODE_LABEL_NUMBER (op[5]));
7256 /* Jump to target. */
7257 op[8] = gen_label_rtx ();
7260 output_asm_insn ("l\t%4,%8-%5(%4)", op);
7262 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7263 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7264 else if (flag_pic == 1)
7266 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7267 output_asm_insn ("l\t%4,%0(%4)", op);
7269 else if (flag_pic == 2)
7271 op[9] = gen_rtx_REG (Pmode, 0);
7272 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7273 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7274 output_asm_insn ("ar\t%4,%9", op);
7275 output_asm_insn ("l\t%4,0(%4)", op);
7278 output_asm_insn ("br\t%4", op);
7280 /* Output literal pool. */
7281 output_asm_insn (".align\t4", op);
7283 if (nonlocal && flag_pic == 2)
7284 output_asm_insn (".long\t%0", op);
7287 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7288 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7291 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7293 output_asm_insn (".long\t%0", op);
7295 output_asm_insn (".long\t%0-%5", op);
7299 targetm.asm_out.internal_label (file, "L",
7300 CODE_LABEL_NUMBER (op[6]));
7301 output_asm_insn (".long\t%2", op);
7305 targetm.asm_out.internal_label (file, "L",
7306 CODE_LABEL_NUMBER (op[7]));
7307 output_asm_insn (".long\t%3", op);
7313 s390_valid_pointer_mode (enum machine_mode mode)
7315 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7318 /* How to allocate a 'struct machine_function'. */
7320 static struct machine_function *
7321 s390_init_machine_status (void)
7323 return ggc_alloc_cleared (sizeof (struct machine_function));
7326 /* Checks whether the given ARGUMENT_LIST would use a caller
7327 saved register. This is used to decide whether sibling call
7328 optimization could be performed on the respective function
7332 s390_call_saved_register_used (tree argument_list)
7334 CUMULATIVE_ARGS cum;
7336 enum machine_mode mode;
7341 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
7343 while (argument_list)
7345 parameter = TREE_VALUE (argument_list);
7346 argument_list = TREE_CHAIN (argument_list);
7351 /* For an undeclared variable passed as parameter we will get
7352 an ERROR_MARK node here. */
7353 if (TREE_CODE (parameter) == ERROR_MARK)
7356 if (! (type = TREE_TYPE (parameter)))
7359 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
7362 if (pass_by_reference (&cum, mode, type, true))
7365 type = build_pointer_type (type);
7368 parm_rtx = s390_function_arg (&cum, mode, type, 0);
7370 s390_function_arg_advance (&cum, mode, type, 0);
7372 if (parm_rtx && REG_P (parm_rtx))
7375 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
7377 if (! call_used_regs[reg + REGNO (parm_rtx)])
7384 /* Return true if the given call expression can be
7385 turned into a sibling call.
7386 DECL holds the declaration of the function to be called whereas
7387 EXP is the call expression itself. */
7390 s390_function_ok_for_sibcall (tree decl, tree exp)
7392 /* The TPF epilogue uses register 1. */
7393 if (TARGET_TPF_PROFILING)
7396 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
7397 which would have to be restored before the sibcall. */
7398 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
7401 /* Register 6 on s390 is available as an argument register but unfortunately
7402 "caller saved". This makes functions needing this register for arguments
7403 not suitable for sibcalls. */
7404 if (TREE_OPERAND (exp, 1)
7405 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
7411 /* This function is used by the call expanders of the machine description.
7412 It emits the call insn itself together with the necessary operations
7413 to adjust the target address and returns the emitted insn.
7414 ADDR_LOCATION is the target address rtx
7415 TLS_CALL the location of the thread-local symbol
7416 RESULT_REG the register where the result of the call should be stored
7417 RETADDR_REG the register where the return address should be stored
7418 If this parameter is NULL_RTX the call is considered
7419 to be a sibling call. */
7422 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
7425 bool plt_call = false;
7431 /* Direct function calls need special treatment. */
7432 if (GET_CODE (addr_location) == SYMBOL_REF)
7434 /* When calling a global routine in PIC mode, we must
7435 replace the symbol itself with the PLT stub. */
7436 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
7438 addr_location = gen_rtx_UNSPEC (Pmode,
7439 gen_rtvec (1, addr_location),
7441 addr_location = gen_rtx_CONST (Pmode, addr_location);
7445 /* Unless we can use the bras(l) insn, force the
7446 routine address into a register. */
7447 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
7450 addr_location = legitimize_pic_address (addr_location, 0);
7452 addr_location = force_reg (Pmode, addr_location);
7456 /* If it is already an indirect call or the code above moved the
7457 SYMBOL_REF to somewhere else make sure the address can be found in
7459 if (retaddr_reg == NULL_RTX
7460 && GET_CODE (addr_location) != SYMBOL_REF
7463 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
7464 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
7467 addr_location = gen_rtx_MEM (QImode, addr_location);
7468 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
7470 if (result_reg != NULL_RTX)
7471 call = gen_rtx_SET (VOIDmode, result_reg, call);
7473 if (retaddr_reg != NULL_RTX)
7475 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
7477 if (tls_call != NULL_RTX)
7478 vec = gen_rtvec (3, call, clobber,
7479 gen_rtx_USE (VOIDmode, tls_call));
7481 vec = gen_rtvec (2, call, clobber);
7483 call = gen_rtx_PARALLEL (VOIDmode, vec);
7486 insn = emit_call_insn (call);
7488 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
7489 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
7491 /* s390_function_ok_for_sibcall should
7492 have denied sibcalls in this case. */
7493 if (retaddr_reg == NULL_RTX)
7496 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
7501 /* Implement CONDITIONAL_REGISTER_USAGE. */
7504 s390_conditional_register_usage (void)
7510 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7511 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7513 if (TARGET_CPU_ZARCH)
7515 fixed_regs[RETURN_REGNUM] = 0;
7516 call_used_regs[RETURN_REGNUM] = 0;
7520 for (i = 24; i < 32; i++)
7521 call_used_regs[i] = call_really_used_regs[i] = 0;
7525 for (i = 18; i < 20; i++)
7526 call_used_regs[i] = call_really_used_regs[i] = 0;
7531 #include "gt-s390.h"