1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
53 #include "tree-gimple.h"
55 /* Machine-specific symbol_ref flags. */
56 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
59 static bool s390_assemble_integer (rtx, unsigned int, int);
60 static void s390_encode_section_info (tree, rtx, int);
61 static bool s390_cannot_force_const_mem (rtx);
62 static rtx s390_delegitimize_address (rtx);
63 static bool s390_return_in_memory (tree, tree);
64 static void s390_init_builtins (void);
65 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
66 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
68 static enum attr_type s390_safe_attr_type (rtx);
70 static int s390_adjust_priority (rtx, int);
71 static int s390_issue_rate (void);
72 static int s390_first_cycle_multipass_dfa_lookahead (void);
73 static bool s390_cannot_copy_insn_p (rtx);
74 static bool s390_rtx_costs (rtx, int, int, int *);
75 static int s390_address_cost (rtx);
76 static void s390_reorg (void);
77 static bool s390_valid_pointer_mode (enum machine_mode);
78 static tree s390_build_builtin_va_list (void);
79 static tree s390_gimplify_va_arg (tree, tree, tree *, tree *);
80 static bool s390_function_ok_for_sibcall (tree, tree);
81 static bool s390_call_saved_register_used (tree);
82 static bool s390_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode mode,
84 static bool s390_fixed_condition_code_regs (unsigned int *, unsigned int *);
85 static enum machine_mode s390_cc_modes_compatible (enum machine_mode,
89 /* Define the specific costs for a given cpu. */
91 struct processor_costs
93 const int m; /* cost of an M instruction. */
94 const int mghi; /* cost of an MGHI instruction. */
95 const int mh; /* cost of an MH instruction. */
96 const int mhi; /* cost of an MHI instruction. */
97 const int ml; /* cost of an ML instruction. */
98 const int mr; /* cost of an MR instruction. */
99 const int ms; /* cost of an MS instruction. */
100 const int msg; /* cost of an MSG instruction. */
101 const int msgf; /* cost of an MSGF instruction. */
102 const int msgfr; /* cost of an MSGFR instruction. */
103 const int msgr; /* cost of an MSGR instruction. */
104 const int msr; /* cost of an MSR instruction. */
105 const int mult_df; /* cost of multiplication in DFmode. */
106 const int sqdbr; /* cost of square root in DFmode. */
107 const int sqebr; /* cost of square root in SFmode. */
108 const int madbr; /* cost of multiply and add in DFmode. */
109 const int maebr; /* cost of multiply and add in SFmode. */
112 const struct processor_costs *s390_cost;
115 struct processor_costs z900_cost =
117 COSTS_N_INSNS (5), /* M */
118 COSTS_N_INSNS (10), /* MGHI */
119 COSTS_N_INSNS (5), /* MH */
120 COSTS_N_INSNS (4), /* MHI */
121 COSTS_N_INSNS (5), /* ML */
122 COSTS_N_INSNS (5), /* MR */
123 COSTS_N_INSNS (4), /* MS */
124 COSTS_N_INSNS (15), /* MSG */
125 COSTS_N_INSNS (7), /* MSGF */
126 COSTS_N_INSNS (7), /* MSGFR */
127 COSTS_N_INSNS (10), /* MSGR */
128 COSTS_N_INSNS (4), /* MSR */
129 COSTS_N_INSNS (7), /* multiplication in DFmode */
130 COSTS_N_INSNS (44), /* SQDBR */
131 COSTS_N_INSNS (35), /* SQEBR */
132 COSTS_N_INSNS (18), /* MADBR */
133 COSTS_N_INSNS (13), /* MAEBR */
137 struct processor_costs z990_cost =
139 COSTS_N_INSNS (4), /* M */
140 COSTS_N_INSNS (2), /* MGHI */
141 COSTS_N_INSNS (2), /* MH */
142 COSTS_N_INSNS (2), /* MHI */
143 COSTS_N_INSNS (4), /* ML */
144 COSTS_N_INSNS (4), /* MR */
145 COSTS_N_INSNS (5), /* MS */
146 COSTS_N_INSNS (6), /* MSG */
147 COSTS_N_INSNS (4), /* MSGF */
148 COSTS_N_INSNS (4), /* MSGFR */
149 COSTS_N_INSNS (4), /* MSGR */
150 COSTS_N_INSNS (4), /* MSR */
151 COSTS_N_INSNS (1), /* multiplication in DFmode */
152 COSTS_N_INSNS (66), /* SQDBR */
153 COSTS_N_INSNS (38), /* SQEBR */
154 COSTS_N_INSNS (1), /* MADBR */
155 COSTS_N_INSNS (1), /* MAEBR */
159 #undef TARGET_ASM_ALIGNED_HI_OP
160 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
161 #undef TARGET_ASM_ALIGNED_DI_OP
162 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
163 #undef TARGET_ASM_INTEGER
164 #define TARGET_ASM_INTEGER s390_assemble_integer
166 #undef TARGET_ASM_OPEN_PAREN
167 #define TARGET_ASM_OPEN_PAREN ""
169 #undef TARGET_ASM_CLOSE_PAREN
170 #define TARGET_ASM_CLOSE_PAREN ""
172 #undef TARGET_ENCODE_SECTION_INFO
173 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
176 #undef TARGET_HAVE_TLS
177 #define TARGET_HAVE_TLS true
179 #undef TARGET_CANNOT_FORCE_CONST_MEM
180 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
182 #undef TARGET_DELEGITIMIZE_ADDRESS
183 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
185 #undef TARGET_RETURN_IN_MEMORY
186 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
188 #undef TARGET_INIT_BUILTINS
189 #define TARGET_INIT_BUILTINS s390_init_builtins
190 #undef TARGET_EXPAND_BUILTIN
191 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
193 #undef TARGET_ASM_OUTPUT_MI_THUNK
194 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
195 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
196 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
198 #undef TARGET_SCHED_ADJUST_PRIORITY
199 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
200 #undef TARGET_SCHED_ISSUE_RATE
201 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
202 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
203 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
205 #undef TARGET_CANNOT_COPY_INSN_P
206 #define TARGET_CANNOT_COPY_INSN_P s390_cannot_copy_insn_p
207 #undef TARGET_RTX_COSTS
208 #define TARGET_RTX_COSTS s390_rtx_costs
209 #undef TARGET_ADDRESS_COST
210 #define TARGET_ADDRESS_COST s390_address_cost
212 #undef TARGET_MACHINE_DEPENDENT_REORG
213 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
215 #undef TARGET_VALID_POINTER_MODE
216 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
218 #undef TARGET_BUILD_BUILTIN_VA_LIST
219 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
220 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
221 #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg
223 #undef TARGET_PROMOTE_FUNCTION_ARGS
224 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
225 #undef TARGET_PROMOTE_FUNCTION_RETURN
226 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
227 #undef TARGET_PASS_BY_REFERENCE
228 #define TARGET_PASS_BY_REFERENCE s390_pass_by_reference
230 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
231 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
233 #undef TARGET_FIXED_CONDITION_CODE_REGS
234 #define TARGET_FIXED_CONDITION_CODE_REGS s390_fixed_condition_code_regs
236 #undef TARGET_CC_MODES_COMPATIBLE
237 #define TARGET_CC_MODES_COMPATIBLE s390_cc_modes_compatible
239 struct gcc_target targetm = TARGET_INITIALIZER;
241 extern int reload_completed;
243 /* The alias set for prologue/epilogue register save/restore. */
244 static int s390_sr_alias_set = 0;
246 /* Save information from a "cmpxx" operation until the branch or scc is
248 rtx s390_compare_op0, s390_compare_op1;
250 /* Structure used to hold the components of a S/390 memory
251 address. A legitimate address on S/390 is of the general
253 base + index + displacement
254 where any of the components is optional.
256 base and index are registers of the class ADDR_REGS,
257 displacement is an unsigned 12-bit immediate constant. */
267 /* Which cpu are we tuning for. */
268 enum processor_type s390_tune;
269 enum processor_flags s390_tune_flags;
270 /* Which instruction set architecture to use. */
271 enum processor_type s390_arch;
272 enum processor_flags s390_arch_flags;
274 /* Strings to hold which cpu and instruction set architecture to use. */
275 const char *s390_tune_string; /* for -mtune=<xxx> */
276 const char *s390_arch_string; /* for -march=<xxx> */
278 const char *s390_warn_framesize_string;
279 const char *s390_warn_dynamicstack_string;
280 const char *s390_stack_size_string;
281 const char *s390_stack_guard_string;
283 HOST_WIDE_INT s390_warn_framesize = 0;
284 bool s390_warn_dynamicstack_p = 0;
285 HOST_WIDE_INT s390_stack_size = 0;
286 HOST_WIDE_INT s390_stack_guard = 0;
288 /* The following structure is embedded in the machine
289 specific part of struct function. */
291 struct s390_frame_layout GTY (())
293 /* Offset within stack frame. */
294 HOST_WIDE_INT gprs_offset;
295 HOST_WIDE_INT f0_offset;
296 HOST_WIDE_INT f4_offset;
297 HOST_WIDE_INT f8_offset;
298 HOST_WIDE_INT backchain_offset;
300 /* Number of first and last gpr to be saved, restored. */
302 int first_restore_gpr;
304 int last_restore_gpr;
306 /* Bits standing for floating point registers. Set, if the
307 respective register has to be saved. Starting with reg 16 (f0)
308 at the rightmost bit.
309 Bit 15 - 8 7 6 5 4 3 2 1 0
310 fpr 15 - 8 7 5 3 1 6 4 2 0
311 reg 31 - 24 23 22 21 20 19 18 17 16 */
312 unsigned int fpr_bitmap;
314 /* Number of floating point registers f8-f15 which must be saved. */
317 /* Set if return address needs to be saved. */
318 bool save_return_addr_p;
320 /* Set if backchain needs to be saved. */
321 bool save_backchain_p;
323 /* Size of stack frame. */
324 HOST_WIDE_INT frame_size;
327 /* Define the structure for the machine field in struct function. */
329 struct machine_function GTY(())
331 struct s390_frame_layout frame_layout;
333 /* Literal pool base register. */
336 /* True if we may need to perform branch splitting. */
337 bool split_branches_pending_p;
339 /* Some local-dynamic TLS symbol name. */
340 const char *some_ld_name;
343 /* Few accessor macros for struct cfun->machine->s390_frame_layout. */
345 #define cfun_frame_layout (cfun->machine->frame_layout)
346 #define cfun_save_high_fprs_p (!!cfun_frame_layout.high_fprs)
347 #define cfun_gprs_save_area_size ((cfun_frame_layout.last_save_gpr - \
348 cfun_frame_layout.first_save_gpr + 1) * UNITS_PER_WORD)
349 #define cfun_set_fpr_bit(BITNUM) (cfun->machine->frame_layout.fpr_bitmap |= \
351 #define cfun_fpr_bit_p(BITNUM) (!!(cfun->machine->frame_layout.fpr_bitmap & \
354 static int s390_match_ccmode_set (rtx, enum machine_mode);
355 static int s390_branch_condition_mask (rtx);
356 static const char *s390_branch_condition_mnemonic (rtx, int);
357 static int check_mode (rtx, enum machine_mode *);
358 static int s390_short_displacement (rtx);
359 static int s390_decompose_address (rtx, struct s390_address *);
360 static rtx get_thread_pointer (void);
361 static rtx legitimize_tls_address (rtx, rtx);
362 static void print_shift_count_operand (FILE *, rtx);
363 static const char *get_some_local_dynamic_name (void);
364 static int get_some_local_dynamic_name_1 (rtx *, void *);
365 static int reg_used_in_mem_p (int, rtx);
366 static int addr_generation_dependency_p (rtx, rtx);
367 static int s390_split_branches (void);
368 static void annotate_constant_pool_refs (rtx *x);
369 static void find_constant_pool_ref (rtx, rtx *);
370 static void replace_constant_pool_ref (rtx *, rtx, rtx);
371 static rtx find_ltrel_base (rtx);
372 static void replace_ltrel_base (rtx *);
373 static void s390_optimize_prologue (void);
374 static int find_unused_clobbered_reg (void);
375 static void s390_frame_area (int *, int *);
376 static void s390_register_info (int []);
377 static void s390_frame_info (void);
378 static void s390_init_frame_layout (void);
379 static void s390_update_frame_layout (void);
380 static rtx save_fpr (rtx, int, int);
381 static rtx restore_fpr (rtx, int, int);
382 static rtx save_gprs (rtx, int, int, int);
383 static rtx restore_gprs (rtx, int, int, int);
384 static int s390_function_arg_size (enum machine_mode, tree);
385 static bool s390_function_arg_float (enum machine_mode, tree);
386 static struct machine_function * s390_init_machine_status (void);
388 /* Check whether integer displacement is in range. */
389 #define DISP_IN_RANGE(d) \
390 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
391 : ((d) >= 0 && (d) <= 4095))
393 /* Return true if SET either doesn't set the CC register, or else
394 the source and destination have matching CC modes and that
395 CC mode is at least as constrained as REQ_MODE. */
398 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
400 enum machine_mode set_mode;
402 if (GET_CODE (set) != SET)
405 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
408 set_mode = GET_MODE (SET_DEST (set));
422 if (req_mode != set_mode)
427 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
428 && req_mode != CCSRmode && req_mode != CCURmode)
434 if (req_mode != CCAmode)
442 return (GET_MODE (SET_SRC (set)) == set_mode);
445 /* Return true if every SET in INSN that sets the CC register
446 has source and destination with matching CC modes and that
447 CC mode is at least as constrained as REQ_MODE.
448 If REQ_MODE is VOIDmode, always return false. */
451 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
455 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
456 if (req_mode == VOIDmode)
459 if (GET_CODE (PATTERN (insn)) == SET)
460 return s390_match_ccmode_set (PATTERN (insn), req_mode);
462 if (GET_CODE (PATTERN (insn)) == PARALLEL)
463 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
465 rtx set = XVECEXP (PATTERN (insn), 0, i);
466 if (GET_CODE (set) == SET)
467 if (!s390_match_ccmode_set (set, req_mode))
474 /* If a test-under-mask instruction can be used to implement
475 (compare (and ... OP1) OP2), return the CC mode required
476 to do that. Otherwise, return VOIDmode.
477 MIXED is true if the instruction can distinguish between
478 CC1 and CC2 for mixed selected bits (TMxx), it is false
479 if the instruction cannot (TM). */
482 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
486 /* ??? Fixme: should work on CONST_DOUBLE as well. */
487 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
490 /* Selected bits all zero: CC0.
491 e.g.: int a; if ((a & (16 + 128)) == 0) */
492 if (INTVAL (op2) == 0)
495 /* Selected bits all one: CC3.
496 e.g.: int a; if ((a & (16 + 128)) == 16 + 128) */
497 if (INTVAL (op2) == INTVAL (op1))
500 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. e.g.:
502 if ((a & (16 + 128)) == 16) -> CCT1
503 if ((a & (16 + 128)) == 128) -> CCT2 */
506 bit1 = exact_log2 (INTVAL (op2));
507 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
508 if (bit0 != -1 && bit1 != -1)
509 return bit0 > bit1 ? CCT1mode : CCT2mode;
515 /* Given a comparison code OP (EQ, NE, etc.) and the operands
516 OP0 and OP1 of a COMPARE, return the mode to be used for the
520 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
526 if ((GET_CODE (op0) == NEG || GET_CODE (op0) == ABS)
527 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
529 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
530 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
532 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
533 || GET_CODE (op1) == NEG)
534 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
537 if (GET_CODE (op0) == AND)
539 /* Check whether we can potentially do it via TM. */
540 enum machine_mode ccmode;
541 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
542 if (ccmode != VOIDmode)
544 /* Relax CCTmode to CCZmode to allow fall-back to AND
545 if that turns out to be beneficial. */
546 return ccmode == CCTmode ? CCZmode : ccmode;
550 if (register_operand (op0, HImode)
551 && GET_CODE (op1) == CONST_INT
552 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
554 if (register_operand (op0, QImode)
555 && GET_CODE (op1) == CONST_INT
556 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
565 /* The only overflow condition of NEG and ABS happens when
566 -INT_MAX is used as parameter, which stays negative. So
567 we have an overflow from a positive value to a negative.
568 Using CCAP mode the resulting cc can be used for comparisons. */
569 if ((GET_CODE (op0) == NEG || GET_CODE (op0) == ABS)
570 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
573 /* If constants are involved in an add instruction it is possible to use
574 the resulting cc for comparisons with zero. Knowing the sign of the
575 constant the overflow behaviour gets predictable. e.g.:
576 int a, b; if ((b = a + c) > 0)
577 with c as a constant value: c < 0 -> CCAN and c >= 0 -> CCAP */
578 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
579 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
581 if (INTVAL (XEXP((op0), 1)) < 0)
595 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
596 && GET_CODE (op1) != CONST_INT)
602 if (GET_CODE (op0) == PLUS
603 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
606 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
607 && GET_CODE (op1) != CONST_INT)
613 if (GET_CODE (op0) == MINUS
614 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
617 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
618 && GET_CODE (op1) != CONST_INT)
627 /* Replace the comparison OP0 CODE OP1 by a semantically equivalent one
628 that we can implement more efficiently. */
631 s390_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1)
633 /* Convert ZERO_EXTRACT back to AND to enable TM patterns. */
634 if ((*code == EQ || *code == NE)
635 && *op1 == const0_rtx
636 && GET_CODE (*op0) == ZERO_EXTRACT
637 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
638 && GET_CODE (XEXP (*op0, 2)) == CONST_INT
639 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
641 rtx inner = XEXP (*op0, 0);
642 HOST_WIDE_INT modesize = GET_MODE_BITSIZE (GET_MODE (inner));
643 HOST_WIDE_INT len = INTVAL (XEXP (*op0, 1));
644 HOST_WIDE_INT pos = INTVAL (XEXP (*op0, 2));
646 if (len > 0 && len < modesize
647 && pos >= 0 && pos + len <= modesize
648 && modesize <= HOST_BITS_PER_WIDE_INT)
650 unsigned HOST_WIDE_INT block;
651 block = ((unsigned HOST_WIDE_INT) 1 << len) - 1;
652 block <<= modesize - pos - len;
654 *op0 = gen_rtx_AND (GET_MODE (inner), inner,
655 gen_int_mode (block, GET_MODE (inner)));
659 /* Narrow AND of memory against immediate to enable TM. */
660 if ((*code == EQ || *code == NE)
661 && *op1 == const0_rtx
662 && GET_CODE (*op0) == AND
663 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
664 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
666 rtx inner = XEXP (*op0, 0);
667 rtx mask = XEXP (*op0, 1);
669 /* Ignore paradoxical SUBREGs if all extra bits are masked out. */
670 if (GET_CODE (inner) == SUBREG
671 && SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (inner)))
672 && (GET_MODE_SIZE (GET_MODE (inner))
673 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (inner))))
675 & GET_MODE_MASK (GET_MODE (inner))
676 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (inner))))
678 inner = SUBREG_REG (inner);
680 /* Do not change volatile MEMs. */
681 if (MEM_P (inner) && !MEM_VOLATILE_P (inner))
683 int part = s390_single_part (XEXP (*op0, 1),
684 GET_MODE (inner), QImode, 0);
687 mask = gen_int_mode (s390_extract_part (mask, QImode, 0), QImode);
688 inner = adjust_address_nv (inner, QImode, part);
689 *op0 = gen_rtx_AND (QImode, inner, mask);
694 /* Narrow comparisons against 0xffff to HImode if possible. */
695 if ((*code == EQ || *code == NE)
696 && GET_CODE (*op1) == CONST_INT
697 && INTVAL (*op1) == 0xffff
698 && SCALAR_INT_MODE_P (GET_MODE (*op0))
699 && (nonzero_bits (*op0, GET_MODE (*op0))
700 & ~(unsigned HOST_WIDE_INT) 0xffff) == 0)
702 *op0 = gen_lowpart (HImode, *op0);
707 /* Remove redundant UNSPEC_CMPINT conversions if possible. */
708 if (GET_CODE (*op0) == UNSPEC
709 && XINT (*op0, 1) == UNSPEC_CMPINT
710 && XVECLEN (*op0, 0) == 1
711 && GET_MODE (XVECEXP (*op0, 0, 0)) == CCUmode
712 && GET_CODE (XVECEXP (*op0, 0, 0)) == REG
713 && REGNO (XVECEXP (*op0, 0, 0)) == CC_REGNUM
714 && *op1 == const0_rtx)
716 enum rtx_code new_code = UNKNOWN;
719 case EQ: new_code = EQ; break;
720 case NE: new_code = NE; break;
721 case LT: new_code = GTU; break;
722 case GT: new_code = LTU; break;
723 case LE: new_code = GEU; break;
724 case GE: new_code = LEU; break;
728 if (new_code != UNKNOWN)
730 *op0 = XVECEXP (*op0, 0, 0);
736 /* Emit a compare instruction suitable to implement the comparison
737 OP0 CODE OP1. Return the correct condition RTL to be placed in
738 the IF_THEN_ELSE of the conditional branch testing the result. */
741 s390_emit_compare (enum rtx_code code, rtx op0, rtx op1)
743 enum machine_mode mode = s390_select_ccmode (code, op0, op1);
744 rtx cc = gen_rtx_REG (mode, CC_REGNUM);
746 emit_insn (gen_rtx_SET (VOIDmode, cc, gen_rtx_COMPARE (mode, op0, op1)));
747 return gen_rtx_fmt_ee (code, VOIDmode, cc, const0_rtx);
750 /* Emit a jump instruction to TARGET. If COND is NULL_RTX, emit an
751 unconditional jump, else a conditional jump under condition COND. */
754 s390_emit_jump (rtx target, rtx cond)
758 target = gen_rtx_LABEL_REF (VOIDmode, target);
760 target = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, target, pc_rtx);
762 insn = gen_rtx_SET (VOIDmode, pc_rtx, target);
763 emit_jump_insn (insn);
766 /* Return nonzero if OP is a valid comparison operator
767 for a branch condition in mode MODE. */
770 s390_comparison (rtx op, enum machine_mode mode)
772 if (mode != VOIDmode && mode != GET_MODE (op))
775 if (!COMPARISON_P (op))
778 if (GET_CODE (XEXP (op, 0)) != REG
779 || REGNO (XEXP (op, 0)) != CC_REGNUM
780 || XEXP (op, 1) != const0_rtx)
783 return s390_branch_condition_mask (op) >= 0;
786 /* Return nonzero if OP is a valid comparison operator
787 for an ALC condition in mode MODE. */
790 s390_alc_comparison (rtx op, enum machine_mode mode)
792 if (mode != VOIDmode && mode != GET_MODE (op))
795 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
798 if (!COMPARISON_P (op))
801 if (GET_CODE (XEXP (op, 0)) != REG
802 || REGNO (XEXP (op, 0)) != CC_REGNUM
803 || XEXP (op, 1) != const0_rtx)
806 switch (GET_MODE (XEXP (op, 0)))
809 return GET_CODE (op) == LTU;
812 return GET_CODE (op) == LEU;
815 return GET_CODE (op) == GEU;
818 return GET_CODE (op) == GTU;
821 return GET_CODE (op) == LTU;
824 return GET_CODE (op) == UNGT;
827 return GET_CODE (op) == UNLT;
834 /* Return nonzero if OP is a valid comparison operator
835 for an SLB condition in mode MODE. */
838 s390_slb_comparison (rtx op, enum machine_mode mode)
840 if (mode != VOIDmode && mode != GET_MODE (op))
843 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
846 if (!COMPARISON_P (op))
849 if (GET_CODE (XEXP (op, 0)) != REG
850 || REGNO (XEXP (op, 0)) != CC_REGNUM
851 || XEXP (op, 1) != const0_rtx)
854 switch (GET_MODE (XEXP (op, 0)))
857 return GET_CODE (op) == GEU;
860 return GET_CODE (op) == GTU;
863 return GET_CODE (op) == LTU;
866 return GET_CODE (op) == LEU;
869 return GET_CODE (op) == GEU;
872 return GET_CODE (op) == LE;
875 return GET_CODE (op) == GE;
882 /* Return branch condition mask to implement a branch
883 specified by CODE. Return -1 for invalid comparisons. */
886 s390_branch_condition_mask (rtx code)
888 const int CC0 = 1 << 3;
889 const int CC1 = 1 << 2;
890 const int CC2 = 1 << 1;
891 const int CC3 = 1 << 0;
893 if (GET_CODE (XEXP (code, 0)) != REG
894 || REGNO (XEXP (code, 0)) != CC_REGNUM
895 || XEXP (code, 1) != const0_rtx)
898 switch (GET_MODE (XEXP (code, 0)))
901 switch (GET_CODE (code))
904 case NE: return CC1 | CC2 | CC3;
910 switch (GET_CODE (code))
913 case NE: return CC0 | CC2 | CC3;
919 switch (GET_CODE (code))
922 case NE: return CC0 | CC1 | CC3;
928 switch (GET_CODE (code))
931 case NE: return CC0 | CC1 | CC2;
937 switch (GET_CODE (code))
939 case EQ: return CC0 | CC2;
940 case NE: return CC1 | CC3;
946 switch (GET_CODE (code))
948 case LTU: return CC2 | CC3; /* carry */
949 case GEU: return CC0 | CC1; /* no carry */
955 switch (GET_CODE (code))
957 case GTU: return CC0 | CC1; /* borrow */
958 case LEU: return CC2 | CC3; /* no borrow */
964 switch (GET_CODE (code))
966 case EQ: return CC0 | CC2;
967 case NE: return CC1 | CC3;
968 case LTU: return CC1;
969 case GTU: return CC3;
970 case LEU: return CC1 | CC2;
971 case GEU: return CC2 | CC3;
976 switch (GET_CODE (code))
979 case NE: return CC1 | CC2 | CC3;
980 case LTU: return CC1;
981 case GTU: return CC2;
982 case LEU: return CC0 | CC1;
983 case GEU: return CC0 | CC2;
989 switch (GET_CODE (code))
992 case NE: return CC2 | CC1 | CC3;
993 case LTU: return CC2;
994 case GTU: return CC1;
995 case LEU: return CC0 | CC2;
996 case GEU: return CC0 | CC1;
1002 switch (GET_CODE (code))
1004 case EQ: return CC0;
1005 case NE: return CC1 | CC2 | CC3;
1006 case LT: return CC1 | CC3;
1007 case GT: return CC2;
1008 case LE: return CC0 | CC1 | CC3;
1009 case GE: return CC0 | CC2;
1015 switch (GET_CODE (code))
1017 case EQ: return CC0;
1018 case NE: return CC1 | CC2 | CC3;
1019 case LT: return CC1;
1020 case GT: return CC2 | CC3;
1021 case LE: return CC0 | CC1;
1022 case GE: return CC0 | CC2 | CC3;
1028 switch (GET_CODE (code))
1030 case EQ: return CC0;
1031 case NE: return CC1 | CC2 | CC3;
1032 case LT: return CC1;
1033 case GT: return CC2;
1034 case LE: return CC0 | CC1;
1035 case GE: return CC0 | CC2;
1036 case UNORDERED: return CC3;
1037 case ORDERED: return CC0 | CC1 | CC2;
1038 case UNEQ: return CC0 | CC3;
1039 case UNLT: return CC1 | CC3;
1040 case UNGT: return CC2 | CC3;
1041 case UNLE: return CC0 | CC1 | CC3;
1042 case UNGE: return CC0 | CC2 | CC3;
1043 case LTGT: return CC1 | CC2;
1049 switch (GET_CODE (code))
1051 case EQ: return CC0;
1052 case NE: return CC2 | CC1 | CC3;
1053 case LT: return CC2;
1054 case GT: return CC1;
1055 case LE: return CC0 | CC2;
1056 case GE: return CC0 | CC1;
1057 case UNORDERED: return CC3;
1058 case ORDERED: return CC0 | CC2 | CC1;
1059 case UNEQ: return CC0 | CC3;
1060 case UNLT: return CC2 | CC3;
1061 case UNGT: return CC1 | CC3;
1062 case UNLE: return CC0 | CC2 | CC3;
1063 case UNGE: return CC0 | CC1 | CC3;
1064 case LTGT: return CC2 | CC1;
1074 /* If INV is false, return assembler mnemonic string to implement
1075 a branch specified by CODE. If INV is true, return mnemonic
1076 for the corresponding inverted branch. */
1079 s390_branch_condition_mnemonic (rtx code, int inv)
1081 static const char *const mnemonic[16] =
1083 NULL, "o", "h", "nle",
1084 "l", "nhe", "lh", "ne",
1085 "e", "nlh", "he", "nl",
1086 "le", "nh", "no", NULL
1089 int mask = s390_branch_condition_mask (code);
1090 gcc_assert (mask >= 0);
1095 if (mask < 1 || mask > 14)
1098 return mnemonic[mask];
1101 /* Return the part of op which has a value different from def.
1102 The size of the part is determined by mode.
1103 Use this function only if you already know that op really
1104 contains such a part. */
1106 unsigned HOST_WIDE_INT
1107 s390_extract_part (rtx op, enum machine_mode mode, int def)
1109 unsigned HOST_WIDE_INT value = 0;
1110 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
1111 int part_bits = GET_MODE_BITSIZE (mode);
1112 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
1115 for (i = 0; i < max_parts; i++)
1118 value = (unsigned HOST_WIDE_INT) INTVAL (op);
1120 value >>= part_bits;
1122 if ((value & part_mask) != (def & part_mask))
1123 return value & part_mask;
1129 /* If OP is an integer constant of mode MODE with exactly one
1130 part of mode PART_MODE unequal to DEF, return the number of that
1131 part. Otherwise, return -1. */
1134 s390_single_part (rtx op,
1135 enum machine_mode mode,
1136 enum machine_mode part_mode,
1139 unsigned HOST_WIDE_INT value = 0;
1140 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
1141 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
1144 if (GET_CODE (op) != CONST_INT)
1147 for (i = 0; i < n_parts; i++)
1150 value = (unsigned HOST_WIDE_INT) INTVAL (op);
1152 value >>= GET_MODE_BITSIZE (part_mode);
1154 if ((value & part_mask) != (def & part_mask))
1162 return part == -1 ? -1 : n_parts - 1 - part;
1165 /* Check whether we can (and want to) split a double-word
1166 move in mode MODE from SRC to DST into two single-word
1167 moves, moving the subword FIRST_SUBWORD first. */
1170 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
1172 /* Floating point registers cannot be split. */
1173 if (FP_REG_P (src) || FP_REG_P (dst))
1176 /* We don't need to split if operands are directly accessible. */
1177 if (s_operand (src, mode) || s_operand (dst, mode))
1180 /* Non-offsettable memory references cannot be split. */
1181 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
1182 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
1185 /* Moving the first subword must not clobber a register
1186 needed to move the second subword. */
1187 if (register_operand (dst, mode))
1189 rtx subreg = operand_subword (dst, first_subword, 0, mode);
1190 if (reg_overlap_mentioned_p (subreg, src))
1197 /* Check whether the address of memory reference MEM2 equals exactly
1198 the address of memory reference MEM1 plus DELTA. Return true if
1199 we can prove this to be the case, false otherwise. */
1202 s390_offset_p (rtx mem1, rtx mem2, rtx delta)
1204 rtx addr1, addr2, addr_delta;
1206 if (GET_CODE (mem1) != MEM || GET_CODE (mem2) != MEM)
1209 addr1 = XEXP (mem1, 0);
1210 addr2 = XEXP (mem2, 0);
1212 addr_delta = simplify_binary_operation (MINUS, Pmode, addr2, addr1);
1213 if (!addr_delta || !rtx_equal_p (addr_delta, delta))
1219 /* Expand logical operator CODE in mode MODE with operands OPERANDS. */
1222 s390_expand_logical_operator (enum rtx_code code, enum machine_mode mode,
1225 enum machine_mode wmode = mode;
1226 rtx dst = operands[0];
1227 rtx src1 = operands[1];
1228 rtx src2 = operands[2];
1231 /* If we cannot handle the operation directly, use a temp register. */
1232 if (!s390_logical_operator_ok_p (operands))
1233 dst = gen_reg_rtx (mode);
1235 /* QImode and HImode patterns make sense only if we have a destination
1236 in memory. Otherwise perform the operation in SImode. */
1237 if ((mode == QImode || mode == HImode) && GET_CODE (dst) != MEM)
1240 /* Widen operands if required. */
1243 if (GET_CODE (dst) == SUBREG
1244 && (tem = simplify_subreg (wmode, dst, mode, 0)) != 0)
1246 else if (REG_P (dst))
1247 dst = gen_rtx_SUBREG (wmode, dst, 0);
1249 dst = gen_reg_rtx (wmode);
1251 if (GET_CODE (src1) == SUBREG
1252 && (tem = simplify_subreg (wmode, src1, mode, 0)) != 0)
1254 else if (GET_MODE (src1) != VOIDmode)
1255 src1 = gen_rtx_SUBREG (wmode, force_reg (mode, src1), 0);
1257 if (GET_CODE (src2) == SUBREG
1258 && (tem = simplify_subreg (wmode, src2, mode, 0)) != 0)
1260 else if (GET_MODE (src2) != VOIDmode)
1261 src2 = gen_rtx_SUBREG (wmode, force_reg (mode, src2), 0);
1264 /* Emit the instruction. */
1265 op = gen_rtx_SET (VOIDmode, dst, gen_rtx_fmt_ee (code, wmode, src1, src2));
1266 clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
1267 emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, op, clob)));
1269 /* Fix up the destination if needed. */
1270 if (dst != operands[0])
1271 emit_move_insn (operands[0], gen_lowpart (mode, dst));
1274 /* Check whether OPERANDS are OK for a logical operation (AND, IOR, XOR). */
1277 s390_logical_operator_ok_p (rtx *operands)
1279 /* If the destination operand is in memory, it needs to coincide
1280 with one of the source operands. After reload, it has to be
1281 the first source operand. */
1282 if (GET_CODE (operands[0]) == MEM)
1283 return rtx_equal_p (operands[0], operands[1])
1284 || (!reload_completed && rtx_equal_p (operands[0], operands[2]));
1289 /* Narrow logical operation CODE of memory operand MEMOP with immediate
1290 operand IMMOP to switch from SS to SI type instructions. */
1293 s390_narrow_logical_operator (enum rtx_code code, rtx *memop, rtx *immop)
1295 int def = code == AND ? -1 : 0;
1299 gcc_assert (GET_CODE (*memop) == MEM);
1300 gcc_assert (!MEM_VOLATILE_P (*memop));
1302 mask = s390_extract_part (*immop, QImode, def);
1303 part = s390_single_part (*immop, GET_MODE (*memop), QImode, def);
1304 gcc_assert (part >= 0);
1306 *memop = adjust_address (*memop, QImode, part);
1307 *immop = gen_int_mode (mask, QImode);
1311 /* Change optimizations to be performed, depending on the
1314 LEVEL is the optimization level specified; 2 if `-O2' is
1315 specified, 1 if `-O' is specified, and 0 if neither is specified.
1317 SIZE is nonzero if `-Os' is specified and zero otherwise. */
1320 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
1322 /* ??? There are apparently still problems with -fcaller-saves. */
1323 flag_caller_saves = 0;
1325 /* By default, always emit DWARF-2 unwind info. This allows debugging
1326 without maintaining a stack frame back-chain. */
1327 flag_asynchronous_unwind_tables = 1;
1331 override_options (void)
1336 const char *const name; /* processor name or nickname. */
1337 const enum processor_type processor;
1338 const enum processor_flags flags;
1340 const processor_alias_table[] =
1342 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
1343 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
1344 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
1345 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
1346 | PF_LONG_DISPLACEMENT},
1349 int const pta_size = ARRAY_SIZE (processor_alias_table);
1351 /* Acquire a unique set number for our register saves and restores. */
1352 s390_sr_alias_set = new_alias_set ();
1354 /* Set up function hooks. */
1355 init_machine_status = s390_init_machine_status;
1357 /* Architecture mode defaults according to ABI. */
1358 if (!(target_flags_explicit & MASK_ZARCH))
1361 target_flags |= MASK_ZARCH;
1363 target_flags &= ~MASK_ZARCH;
1366 /* Determine processor architectural level. */
1367 if (!s390_arch_string)
1368 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
1370 for (i = 0; i < pta_size; i++)
1371 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
1373 s390_arch = processor_alias_table[i].processor;
1374 s390_arch_flags = processor_alias_table[i].flags;
1378 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1380 /* Determine processor to tune for. */
1381 if (!s390_tune_string)
1383 s390_tune = s390_arch;
1384 s390_tune_flags = s390_arch_flags;
1385 s390_tune_string = s390_arch_string;
1389 for (i = 0; i < pta_size; i++)
1390 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1392 s390_tune = processor_alias_table[i].processor;
1393 s390_tune_flags = processor_alias_table[i].flags;
1397 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1400 /* Sanity checks. */
1401 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1402 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1403 if (TARGET_64BIT && !TARGET_ZARCH)
1404 error ("64-bit ABI not supported in ESA/390 mode.");
1407 /* Set processor cost function. */
1408 if (s390_tune == PROCESSOR_2084_Z990)
1409 s390_cost = &z990_cost;
1411 s390_cost = &z900_cost;
1414 if (s390_warn_framesize_string)
1416 if (sscanf (s390_warn_framesize_string, HOST_WIDE_INT_PRINT_DEC,
1417 &s390_warn_framesize) != 1)
1418 error ("invalid value for -mwarn-framesize");
1421 if (s390_warn_dynamicstack_string)
1422 s390_warn_dynamicstack_p = 1;
1424 if (s390_stack_size_string)
1426 if (sscanf (s390_stack_size_string, HOST_WIDE_INT_PRINT_DEC,
1427 &s390_stack_size) != 1)
1428 error ("invalid value for -mstack-size");
1430 if (exact_log2 (s390_stack_size) == -1)
1431 error ("stack size must be an exact power of 2");
1433 if (s390_stack_guard_string)
1435 if (sscanf (s390_stack_guard_string, HOST_WIDE_INT_PRINT_DEC,
1436 &s390_stack_guard) != 1)
1437 error ("invalid value for -mstack-guard");
1439 if (s390_stack_guard >= s390_stack_size)
1440 error ("stack size must be greater than the stack guard value");
1442 if (exact_log2 (s390_stack_guard) == -1)
1443 error ("stack guard value must be an exact power of 2");
1446 error ("-mstack-size implies use of -mstack-guard");
1449 if (s390_stack_guard_string && !s390_stack_size_string)
1450 error ("-mstack-guard implies use of -mstack-size");
1453 /* Map for smallest class containing reg regno. */
1455 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1456 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1457 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1458 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1459 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1460 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1461 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1462 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1463 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1464 ADDR_REGS, CC_REGS, ADDR_REGS, ADDR_REGS,
1465 ACCESS_REGS, ACCESS_REGS
1468 /* Return attribute type of insn. */
1470 static enum attr_type
1471 s390_safe_attr_type (rtx insn)
1473 if (recog_memoized (insn) >= 0)
1474 return get_attr_type (insn);
1479 /* Return true if OP a (const_int 0) operand.
1480 OP is the current operation.
1481 MODE is the current operation mode. */
1484 const0_operand (register rtx op, enum machine_mode mode)
1486 return op == CONST0_RTX (mode);
1489 /* Return true if OP is constant.
1490 OP is the current operation.
1491 MODE is the current operation mode. */
1494 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1496 return CONSTANT_P (op);
1499 /* Return true if the mode of operand OP matches MODE.
1500 If MODE is set to VOIDmode, set it to the mode of OP. */
1503 check_mode (register rtx op, enum machine_mode *mode)
1505 if (*mode == VOIDmode)
1506 *mode = GET_MODE (op);
1509 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1515 /* Return true if OP a valid operand for the LARL instruction.
1516 OP is the current operation.
1517 MODE is the current operation mode. */
1520 larl_operand (register rtx op, enum machine_mode mode)
1522 if (! check_mode (op, &mode))
1525 /* Allow labels and local symbols. */
1526 if (GET_CODE (op) == LABEL_REF)
1528 if (GET_CODE (op) == SYMBOL_REF)
1529 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1530 && SYMBOL_REF_TLS_MODEL (op) == 0
1531 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1533 /* Everything else must have a CONST, so strip it. */
1534 if (GET_CODE (op) != CONST)
1538 /* Allow adding *even* in-range constants. */
1539 if (GET_CODE (op) == PLUS)
1541 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1542 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1544 #if HOST_BITS_PER_WIDE_INT > 32
1545 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1546 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1552 /* Labels and local symbols allowed here as well. */
1553 if (GET_CODE (op) == LABEL_REF)
1555 if (GET_CODE (op) == SYMBOL_REF)
1556 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1557 && SYMBOL_REF_TLS_MODEL (op) == 0
1558 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1560 /* Now we must have a @GOTENT offset or @PLT stub
1561 or an @INDNTPOFF TLS offset. */
1562 if (GET_CODE (op) == UNSPEC
1563 && XINT (op, 1) == UNSPEC_GOTENT)
1565 if (GET_CODE (op) == UNSPEC
1566 && XINT (op, 1) == UNSPEC_PLT)
1568 if (GET_CODE (op) == UNSPEC
1569 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1575 /* Return true if OP is a valid S-type operand.
1576 OP is the current operation.
1577 MODE is the current operation mode. */
1580 s_operand (rtx op, enum machine_mode mode)
1582 struct s390_address addr;
1584 /* Call general_operand first, so that we don't have to
1585 check for many special cases. */
1586 if (!general_operand (op, mode))
1589 /* Just like memory_operand, allow (subreg (mem ...))
1591 if (reload_completed
1592 && GET_CODE (op) == SUBREG
1593 && GET_CODE (SUBREG_REG (op)) == MEM)
1594 op = SUBREG_REG (op);
1596 if (GET_CODE (op) != MEM)
1598 if (!s390_decompose_address (XEXP (op, 0), &addr))
1606 /* Return true if OP a valid shift count operand.
1607 OP is the current operation.
1608 MODE is the current operation mode. */
1611 shift_count_operand (rtx op, enum machine_mode mode)
1613 HOST_WIDE_INT offset = 0;
1615 if (! check_mode (op, &mode))
1618 /* We can have an integer constant, an address register,
1619 or a sum of the two. Note that reload already checks
1620 that any register present is an address register, so
1621 we just check for any register here. */
1622 if (GET_CODE (op) == CONST_INT)
1624 offset = INTVAL (op);
1627 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1629 offset = INTVAL (XEXP (op, 1));
1632 while (op && GET_CODE (op) == SUBREG)
1633 op = SUBREG_REG (op);
1634 if (op && GET_CODE (op) != REG)
1637 /* Unfortunately we have to reject constants that are invalid
1638 for an address, or else reload will get confused. */
1639 if (!DISP_IN_RANGE (offset))
1645 /* Return true if DISP is a valid short displacement. */
1648 s390_short_displacement (rtx disp)
1650 /* No displacement is OK. */
1654 /* Integer displacement in range. */
1655 if (GET_CODE (disp) == CONST_INT)
1656 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1658 /* GOT offset is not OK, the GOT can be large. */
1659 if (GET_CODE (disp) == CONST
1660 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1661 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
1662 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
1665 /* All other symbolic constants are literal pool references,
1666 which are OK as the literal pool must be small. */
1667 if (GET_CODE (disp) == CONST)
1673 /* Return true if OP is a valid operand for a C constraint. */
1676 s390_extra_constraint_str (rtx op, int c, const char * str)
1678 struct s390_address addr;
1683 /* Check for offsettable variants of memory constraints. */
1686 /* Only accept non-volatile MEMs. */
1687 if (!MEM_P (op) || MEM_VOLATILE_P (op))
1690 if ((reload_completed || reload_in_progress)
1691 ? !offsettable_memref_p (op)
1692 : !offsettable_nonstrict_memref_p (op))
1698 /* Check for non-literal-pool variants of memory constraints. */
1701 if (GET_CODE (op) != MEM)
1703 if (!s390_decompose_address (XEXP (op, 0), &addr))
1705 if (addr.base && REG_P (addr.base) && REGNO (addr.base) == BASE_REGNUM)
1707 if (addr.indx && REG_P (addr.indx) && REGNO (addr.indx) == BASE_REGNUM)
1716 if (GET_CODE (op) != MEM)
1718 if (!s390_decompose_address (XEXP (op, 0), &addr))
1723 if (TARGET_LONG_DISPLACEMENT)
1725 if (!s390_short_displacement (addr.disp))
1731 if (GET_CODE (op) != MEM)
1734 if (TARGET_LONG_DISPLACEMENT)
1736 if (!s390_decompose_address (XEXP (op, 0), &addr))
1738 if (!s390_short_displacement (addr.disp))
1744 if (!TARGET_LONG_DISPLACEMENT)
1746 if (GET_CODE (op) != MEM)
1748 if (!s390_decompose_address (XEXP (op, 0), &addr))
1752 if (s390_short_displacement (addr.disp))
1757 if (!TARGET_LONG_DISPLACEMENT)
1759 if (GET_CODE (op) != MEM)
1761 /* Any invalid address here will be fixed up by reload,
1762 so accept it for the most generic constraint. */
1763 if (s390_decompose_address (XEXP (op, 0), &addr)
1764 && s390_short_displacement (addr.disp))
1769 if (TARGET_LONG_DISPLACEMENT)
1771 if (!s390_decompose_address (op, &addr))
1773 if (!s390_short_displacement (addr.disp))
1779 if (!TARGET_LONG_DISPLACEMENT)
1781 /* Any invalid address here will be fixed up by reload,
1782 so accept it for the most generic constraint. */
1783 if (s390_decompose_address (op, &addr)
1784 && s390_short_displacement (addr.disp))
1789 return shift_count_operand (op, VOIDmode);
1798 /* Return true if VALUE matches the constraint STR. */
1801 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1805 enum machine_mode mode, part_mode;
1807 int part, part_goal;
1815 return (unsigned int)value < 256;
1818 return (unsigned int)value < 4096;
1821 return value >= -32768 && value < 32768;
1824 return (TARGET_LONG_DISPLACEMENT ?
1825 (value >= -524288 && value <= 524287)
1826 : (value >= 0 && value <= 4095));
1828 return value == 2147483647;
1834 part_goal = str[1] - '0';
1838 case 'H': part_mode = HImode; break;
1839 case 'Q': part_mode = QImode; break;
1845 case 'H': mode = HImode; break;
1846 case 'S': mode = SImode; break;
1847 case 'D': mode = DImode; break;
1853 case '0': def = 0; break;
1854 case 'F': def = -1; break;
1858 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1861 part = s390_single_part (GEN_INT (value), mode, part_mode, def);
1864 if (part_goal != -1 && part_goal != part)
1876 /* Compute a (partial) cost for rtx X. Return true if the complete
1877 cost has been computed, and false if subexpressions should be
1878 scanned. In either case, *TOTAL contains the cost result.
1879 CODE contains GET_CODE (x), OUTER_CODE contains the code
1880 of the superexpression of x. */
1883 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1905 *total = COSTS_N_INSNS (1);
1910 /* Check for multiply and add. */
1911 if ((GET_MODE (x) == DFmode || GET_MODE (x) == SFmode)
1912 && GET_CODE (XEXP (x, 0)) == MULT
1913 && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT && TARGET_FUSED_MADD)
1915 /* This is the multiply and add case. */
1916 if (GET_MODE (x) == DFmode)
1917 *total = s390_cost->madbr;
1919 *total = s390_cost->maebr;
1920 *total += rtx_cost (XEXP (XEXP (x, 0), 0), MULT)
1921 + rtx_cost (XEXP (XEXP (x, 0), 1), MULT)
1922 + rtx_cost (XEXP (x, 1), code);
1923 return true; /* Do not do an additional recursive descent. */
1925 *total = COSTS_N_INSNS (1);
1929 switch (GET_MODE (x))
1933 rtx left = XEXP (x, 0);
1934 rtx right = XEXP (x, 1);
1935 if (GET_CODE (right) == CONST_INT
1936 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (right), 'K', "K"))
1937 *total = s390_cost->mhi;
1938 else if (GET_CODE (left) == SIGN_EXTEND)
1939 *total = s390_cost->mh;
1941 *total = s390_cost->ms; /* msr, ms, msy */
1946 rtx left = XEXP (x, 0);
1947 rtx right = XEXP (x, 1);
1950 if (GET_CODE (right) == CONST_INT
1951 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (right), 'K', "K"))
1952 *total = s390_cost->mghi;
1953 else if (GET_CODE (left) == SIGN_EXTEND)
1954 *total = s390_cost->msgf;
1956 *total = s390_cost->msg; /* msgr, msg */
1958 else /* TARGET_31BIT */
1960 if (GET_CODE (left) == SIGN_EXTEND
1961 && GET_CODE (right) == SIGN_EXTEND)
1962 /* mulsidi case: mr, m */
1963 *total = s390_cost->m;
1964 else if (GET_CODE (left) == ZERO_EXTEND
1965 && GET_CODE (right) == ZERO_EXTEND
1966 && TARGET_CPU_ZARCH)
1967 /* umulsidi case: ml, mlr */
1968 *total = s390_cost->ml;
1970 /* Complex calculation is required. */
1971 *total = COSTS_N_INSNS (40);
1977 *total = s390_cost->mult_df;
1988 *total = COSTS_N_INSNS (33);
1992 if (GET_MODE (x) == SFmode)
1993 *total = s390_cost->sqebr;
1995 *total = s390_cost->sqdbr;
2000 if (outer_code == MULT)
2009 /* Return the cost of an address rtx ADDR. */
2012 s390_address_cost (rtx addr)
2014 struct s390_address ad;
2015 if (!s390_decompose_address (addr, &ad))
2018 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
2021 /* Return true if OP is a valid operand for the BRAS instruction.
2022 OP is the current operation.
2023 MODE is the current operation mode. */
2026 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
2028 register enum rtx_code code = GET_CODE (op);
2030 /* Allow SYMBOL_REFs. */
2031 if (code == SYMBOL_REF)
2034 /* Allow @PLT stubs. */
2036 && GET_CODE (XEXP (op, 0)) == UNSPEC
2037 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
2042 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
2043 otherwise return 0. */
2046 tls_symbolic_operand (register rtx op)
2048 if (GET_CODE (op) != SYMBOL_REF)
2050 return SYMBOL_REF_TLS_MODEL (op);
2053 /* Return true if OP is a load multiple operation. It is known to be a
2054 PARALLEL and the first section will be tested.
2055 OP is the current operation.
2056 MODE is the current operation mode. */
2059 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
2061 enum machine_mode elt_mode;
2062 int count = XVECLEN (op, 0);
2063 unsigned int dest_regno;
2068 /* Perform a quick check so we don't blow up below. */
2070 || GET_CODE (XVECEXP (op, 0, 0)) != SET
2071 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
2072 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
2075 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
2076 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
2077 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
2079 /* Check, is base, or base + displacement. */
2081 if (GET_CODE (src_addr) == REG)
2083 else if (GET_CODE (src_addr) == PLUS
2084 && GET_CODE (XEXP (src_addr, 0)) == REG
2085 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
2087 off = INTVAL (XEXP (src_addr, 1));
2088 src_addr = XEXP (src_addr, 0);
2093 for (i = 1; i < count; i++)
2095 rtx elt = XVECEXP (op, 0, i);
2097 if (GET_CODE (elt) != SET
2098 || GET_CODE (SET_DEST (elt)) != REG
2099 || GET_MODE (SET_DEST (elt)) != elt_mode
2100 || REGNO (SET_DEST (elt)) != dest_regno + i
2101 || GET_CODE (SET_SRC (elt)) != MEM
2102 || GET_MODE (SET_SRC (elt)) != elt_mode
2103 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
2104 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
2105 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
2106 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
2107 != off + i * GET_MODE_SIZE (elt_mode))
2114 /* Return true if OP is a store multiple operation. It is known to be a
2115 PARALLEL and the first section will be tested.
2116 OP is the current operation.
2117 MODE is the current operation mode. */
2120 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
2122 enum machine_mode elt_mode;
2123 int count = XVECLEN (op, 0);
2124 unsigned int src_regno;
2128 /* Perform a quick check so we don't blow up below. */
2130 || GET_CODE (XVECEXP (op, 0, 0)) != SET
2131 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
2132 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
2135 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
2136 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
2137 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
2139 /* Check, is base, or base + displacement. */
2141 if (GET_CODE (dest_addr) == REG)
2143 else if (GET_CODE (dest_addr) == PLUS
2144 && GET_CODE (XEXP (dest_addr, 0)) == REG
2145 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
2147 off = INTVAL (XEXP (dest_addr, 1));
2148 dest_addr = XEXP (dest_addr, 0);
2153 for (i = 1; i < count; i++)
2155 rtx elt = XVECEXP (op, 0, i);
2157 if (GET_CODE (elt) != SET
2158 || GET_CODE (SET_SRC (elt)) != REG
2159 || GET_MODE (SET_SRC (elt)) != elt_mode
2160 || REGNO (SET_SRC (elt)) != src_regno + i
2161 || GET_CODE (SET_DEST (elt)) != MEM
2162 || GET_MODE (SET_DEST (elt)) != elt_mode
2163 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
2164 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
2165 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
2166 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
2167 != off + i * GET_MODE_SIZE (elt_mode))
2173 /* Split DImode access register reference REG (on 64-bit) into its constituent
2174 low and high parts, and store them into LO and HI. Note that gen_lowpart/
2175 gen_highpart cannot be used as they assume all registers are word-sized,
2176 while our access registers have only half that size. */
2179 s390_split_access_reg (rtx reg, rtx *lo, rtx *hi)
2181 gcc_assert (TARGET_64BIT);
2182 gcc_assert (ACCESS_REG_P (reg));
2183 gcc_assert (GET_MODE (reg) == DImode);
2184 gcc_assert (!(REGNO (reg) & 1));
2186 *lo = gen_rtx_REG (SImode, REGNO (reg) + 1);
2187 *hi = gen_rtx_REG (SImode, REGNO (reg));
2190 /* Return true if OP contains a symbol reference */
2193 symbolic_reference_mentioned_p (rtx op)
2195 register const char *fmt;
2198 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
2201 fmt = GET_RTX_FORMAT (GET_CODE (op));
2202 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
2208 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
2209 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
2213 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
2220 /* Return true if OP contains a reference to a thread-local symbol. */
2223 tls_symbolic_reference_mentioned_p (rtx op)
2225 register const char *fmt;
2228 if (GET_CODE (op) == SYMBOL_REF)
2229 return tls_symbolic_operand (op);
2231 fmt = GET_RTX_FORMAT (GET_CODE (op));
2232 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
2238 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
2239 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
2243 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
2251 /* Return true if OP is a legitimate general operand when
2252 generating PIC code. It is given that flag_pic is on
2253 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
2256 legitimate_pic_operand_p (register rtx op)
2258 /* Accept all non-symbolic constants. */
2259 if (!SYMBOLIC_CONST (op))
2262 /* Reject everything else; must be handled
2263 via emit_symbolic_move. */
2267 /* Returns true if the constant value OP is a legitimate general operand.
2268 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
2271 legitimate_constant_p (register rtx op)
2273 /* Accept all non-symbolic constants. */
2274 if (!SYMBOLIC_CONST (op))
2277 /* Accept immediate LARL operands. */
2278 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
2281 /* Thread-local symbols are never legal constants. This is
2282 so that emit_call knows that computing such addresses
2283 might require a function call. */
2284 if (TLS_SYMBOLIC_CONST (op))
2287 /* In the PIC case, symbolic constants must *not* be
2288 forced into the literal pool. We accept them here,
2289 so that they will be handled by emit_symbolic_move. */
2293 /* All remaining non-PIC symbolic constants are
2294 forced into the literal pool. */
2298 /* Determine if it's legal to put X into the constant pool. This
2299 is not possible if X contains the address of a symbol that is
2300 not constant (TLS) or not known at final link time (PIC). */
2303 s390_cannot_force_const_mem (rtx x)
2305 switch (GET_CODE (x))
2309 /* Accept all non-symbolic constants. */
2313 /* Labels are OK iff we are non-PIC. */
2314 return flag_pic != 0;
2317 /* 'Naked' TLS symbol references are never OK,
2318 non-TLS symbols are OK iff we are non-PIC. */
2319 if (tls_symbolic_operand (x))
2322 return flag_pic != 0;
2325 return s390_cannot_force_const_mem (XEXP (x, 0));
2328 return s390_cannot_force_const_mem (XEXP (x, 0))
2329 || s390_cannot_force_const_mem (XEXP (x, 1));
2332 switch (XINT (x, 1))
2334 /* Only lt-relative or GOT-relative UNSPECs are OK. */
2335 case UNSPEC_LTREL_OFFSET:
2343 case UNSPEC_GOTNTPOFF:
2344 case UNSPEC_INDNTPOFF:
2347 /* If the literal pool shares the code section, be put
2348 execute template placeholders into the pool as well. */
2350 return TARGET_CPU_ZARCH;
2362 /* Returns true if the constant value OP is a legitimate general
2363 operand during and after reload. The difference to
2364 legitimate_constant_p is that this function will not accept
2365 a constant that would need to be forced to the literal pool
2366 before it can be used as operand. */
2369 legitimate_reload_constant_p (register rtx op)
2371 /* Accept la(y) operands. */
2372 if (GET_CODE (op) == CONST_INT
2373 && DISP_IN_RANGE (INTVAL (op)))
2376 /* Accept l(g)hi operands. */
2377 if (GET_CODE (op) == CONST_INT
2378 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
2381 /* Accept lliXX operands. */
2383 && s390_single_part (op, DImode, HImode, 0) >= 0)
2386 /* Accept larl operands. */
2387 if (TARGET_CPU_ZARCH
2388 && larl_operand (op, VOIDmode))
2391 /* Everything else cannot be handled without reload. */
2395 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
2396 return the class of reg to actually use. */
2399 s390_preferred_reload_class (rtx op, enum reg_class class)
2401 switch (GET_CODE (op))
2403 /* Constants we cannot reload must be forced into the
2408 if (legitimate_reload_constant_p (op))
2413 /* If a symbolic constant or a PLUS is reloaded,
2414 it is most likely being used as an address, so
2415 prefer ADDR_REGS. If 'class' is not a superset
2416 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
2421 if (reg_class_subset_p (ADDR_REGS, class))
2433 /* Return the register class of a scratch register needed to
2434 load IN into a register of class CLASS in MODE.
2436 We need a temporary when loading a PLUS expression which
2437 is not a legitimate operand of the LOAD ADDRESS instruction. */
2440 s390_secondary_input_reload_class (enum reg_class class,
2441 enum machine_mode mode, rtx in)
2443 if (s390_plus_operand (in, mode))
2446 if (reg_classes_intersect_p (CC_REGS, class))
2447 return GENERAL_REGS;
2452 /* Return the register class of a scratch register needed to
2453 store a register of class CLASS in MODE into OUT:
2455 We need a temporary when storing a double-word to a
2456 non-offsettable memory address. */
2459 s390_secondary_output_reload_class (enum reg_class class,
2460 enum machine_mode mode, rtx out)
2462 if ((TARGET_64BIT ? mode == TImode
2463 : (mode == DImode || mode == DFmode))
2464 && reg_classes_intersect_p (GENERAL_REGS, class)
2465 && GET_CODE (out) == MEM
2466 && !offsettable_memref_p (out)
2467 && !s_operand (out, VOIDmode))
2470 if (reg_classes_intersect_p (CC_REGS, class))
2471 return GENERAL_REGS;
2476 /* Return true if OP is a PLUS that is not a legitimate
2477 operand for the LA instruction.
2478 OP is the current operation.
2479 MODE is the current operation mode. */
2482 s390_plus_operand (register rtx op, enum machine_mode mode)
2484 if (!check_mode (op, &mode) || mode != Pmode)
2487 if (GET_CODE (op) != PLUS)
2490 if (legitimate_la_operand_p (op))
2496 /* Generate code to load SRC, which is PLUS that is not a
2497 legitimate operand for the LA instruction, into TARGET.
2498 SCRATCH may be used as scratch register. */
2501 s390_expand_plus_operand (register rtx target, register rtx src,
2502 register rtx scratch)
2505 struct s390_address ad;
2507 /* src must be a PLUS; get its two operands. */
2508 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
2511 /* Check if any of the two operands is already scheduled
2512 for replacement by reload. This can happen e.g. when
2513 float registers occur in an address. */
2514 sum1 = find_replacement (&XEXP (src, 0));
2515 sum2 = find_replacement (&XEXP (src, 1));
2516 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2518 /* If the address is already strictly valid, there's nothing to do. */
2519 if (!s390_decompose_address (src, &ad)
2520 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2521 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
2523 /* Otherwise, one of the operands cannot be an address register;
2524 we reload its value into the scratch register. */
2525 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2527 emit_move_insn (scratch, sum1);
2530 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2532 emit_move_insn (scratch, sum2);
2536 /* According to the way these invalid addresses are generated
2537 in reload.c, it should never happen (at least on s390) that
2538 *neither* of the PLUS components, after find_replacements
2539 was applied, is an address register. */
2540 if (sum1 == scratch && sum2 == scratch)
2546 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2549 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2550 is only ever performed on addresses, so we can mark the
2551 sum as legitimate for LA in any case. */
2552 s390_load_address (target, src);
2556 /* Decompose a RTL expression ADDR for a memory address into
2557 its components, returned in OUT.
2559 Returns 0 if ADDR is not a valid memory address, nonzero
2560 otherwise. If OUT is NULL, don't return the components,
2561 but check for validity only.
2563 Note: Only addresses in canonical form are recognized.
2564 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2565 canonical form so that they will be recognized. */
2568 s390_decompose_address (register rtx addr, struct s390_address *out)
2570 HOST_WIDE_INT offset = 0;
2571 rtx base = NULL_RTX;
2572 rtx indx = NULL_RTX;
2573 rtx disp = NULL_RTX;
2575 int pointer = FALSE;
2576 int base_ptr = FALSE;
2577 int indx_ptr = FALSE;
2579 /* Decompose address into base + index + displacement. */
2581 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2584 else if (GET_CODE (addr) == PLUS)
2586 rtx op0 = XEXP (addr, 0);
2587 rtx op1 = XEXP (addr, 1);
2588 enum rtx_code code0 = GET_CODE (op0);
2589 enum rtx_code code1 = GET_CODE (op1);
2591 if (code0 == REG || code0 == UNSPEC)
2593 if (code1 == REG || code1 == UNSPEC)
2595 indx = op0; /* index + base */
2601 base = op0; /* base + displacement */
2606 else if (code0 == PLUS)
2608 indx = XEXP (op0, 0); /* index + base + disp */
2609 base = XEXP (op0, 1);
2620 disp = addr; /* displacement */
2622 /* Extract integer part of displacement. */
2626 if (GET_CODE (disp) == CONST_INT)
2628 offset = INTVAL (disp);
2631 else if (GET_CODE (disp) == CONST
2632 && GET_CODE (XEXP (disp, 0)) == PLUS
2633 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2635 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2636 disp = XEXP (XEXP (disp, 0), 0);
2640 /* Strip off CONST here to avoid special case tests later. */
2641 if (disp && GET_CODE (disp) == CONST)
2642 disp = XEXP (disp, 0);
2644 /* We can convert literal pool addresses to
2645 displacements by basing them off the base register. */
2646 if (disp && GET_CODE (disp) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (disp))
2648 /* Either base or index must be free to hold the base register. */
2650 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2652 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2656 /* Mark up the displacement. */
2657 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2658 UNSPEC_LTREL_OFFSET);
2661 /* Validate base register. */
2664 if (GET_CODE (base) == UNSPEC)
2665 switch (XINT (base, 1))
2669 disp = gen_rtx_UNSPEC (Pmode,
2670 gen_rtvec (1, XVECEXP (base, 0, 0)),
2671 UNSPEC_LTREL_OFFSET);
2675 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2678 case UNSPEC_LTREL_BASE:
2679 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2686 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2689 if (REGNO (base) == BASE_REGNUM
2690 || REGNO (base) == STACK_POINTER_REGNUM
2691 || REGNO (base) == FRAME_POINTER_REGNUM
2692 || ((reload_completed || reload_in_progress)
2693 && frame_pointer_needed
2694 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2695 || REGNO (base) == ARG_POINTER_REGNUM
2697 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2698 pointer = base_ptr = TRUE;
2701 /* Validate index register. */
2704 if (GET_CODE (indx) == UNSPEC)
2705 switch (XINT (indx, 1))
2709 disp = gen_rtx_UNSPEC (Pmode,
2710 gen_rtvec (1, XVECEXP (indx, 0, 0)),
2711 UNSPEC_LTREL_OFFSET);
2715 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2718 case UNSPEC_LTREL_BASE:
2719 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2726 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2729 if (REGNO (indx) == BASE_REGNUM
2730 || REGNO (indx) == STACK_POINTER_REGNUM
2731 || REGNO (indx) == FRAME_POINTER_REGNUM
2732 || ((reload_completed || reload_in_progress)
2733 && frame_pointer_needed
2734 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2735 || REGNO (indx) == ARG_POINTER_REGNUM
2737 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2738 pointer = indx_ptr = TRUE;
2741 /* Prefer to use pointer as base, not index. */
2742 if (base && indx && !base_ptr
2743 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2750 /* Validate displacement. */
2753 /* If the argument pointer or the return address pointer are involved,
2754 the displacement will change later anyway as the virtual registers get
2755 eliminated. This could make a valid displacement invalid, but it is
2756 more likely to make an invalid displacement valid, because we sometimes
2757 access the register save area via negative offsets to one of those
2759 Thus we don't check the displacement for validity here. If after
2760 elimination the displacement turns out to be invalid after all,
2761 this is fixed up by reload in any case. */
2762 if (base != arg_pointer_rtx
2763 && indx != arg_pointer_rtx
2764 && base != return_address_pointer_rtx
2765 && indx != return_address_pointer_rtx)
2766 if (!DISP_IN_RANGE (offset))
2771 /* All the special cases are pointers. */
2774 /* In the small-PIC case, the linker converts @GOT
2775 and @GOTNTPOFF offsets to possible displacements. */
2776 if (GET_CODE (disp) == UNSPEC
2777 && (XINT (disp, 1) == UNSPEC_GOT
2778 || XINT (disp, 1) == UNSPEC_GOTNTPOFF)
2785 /* Accept chunkified literal pool symbol references. */
2786 else if (GET_CODE (disp) == MINUS
2787 && GET_CODE (XEXP (disp, 0)) == LABEL_REF
2788 && GET_CODE (XEXP (disp, 1)) == LABEL_REF)
2793 /* Accept literal pool references. */
2794 else if (GET_CODE (disp) == UNSPEC
2795 && XINT (disp, 1) == UNSPEC_LTREL_OFFSET)
2797 orig_disp = gen_rtx_CONST (Pmode, disp);
2800 /* If we have an offset, make sure it does not
2801 exceed the size of the constant pool entry. */
2802 rtx sym = XVECEXP (disp, 0, 0);
2803 if (offset >= GET_MODE_SIZE (get_pool_mode (sym)))
2806 orig_disp = plus_constant (orig_disp, offset);
2821 out->disp = orig_disp;
2822 out->pointer = pointer;
2828 /* Return nonzero if ADDR is a valid memory address.
2829 STRICT specifies whether strict register checking applies. */
2832 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2833 register rtx addr, int strict)
2835 struct s390_address ad;
2836 if (!s390_decompose_address (addr, &ad))
2841 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2843 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2848 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2850 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2857 /* Return 1 if OP is a valid operand for the LA instruction.
2858 In 31-bit, we need to prove that the result is used as an
2859 address, as LA performs only a 31-bit addition. */
2862 legitimate_la_operand_p (register rtx op)
2864 struct s390_address addr;
2865 if (!s390_decompose_address (op, &addr))
2868 if (TARGET_64BIT || addr.pointer)
2874 /* Return 1 if it is valid *and* preferable to use LA to
2875 compute the sum of OP1 and OP2. */
2878 preferred_la_operand_p (rtx op1, rtx op2)
2880 struct s390_address addr;
2882 if (op2 != const0_rtx)
2883 op1 = gen_rtx_PLUS (Pmode, op1, op2);
2885 if (!s390_decompose_address (op1, &addr))
2887 if (addr.base && !REG_OK_FOR_BASE_STRICT_P (addr.base))
2889 if (addr.indx && !REG_OK_FOR_INDEX_STRICT_P (addr.indx))
2892 if (!TARGET_64BIT && !addr.pointer)
2898 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2899 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2905 /* Emit a forced load-address operation to load SRC into DST.
2906 This will use the LOAD ADDRESS instruction even in situations
2907 where legitimate_la_operand_p (SRC) returns false. */
2910 s390_load_address (rtx dst, rtx src)
2913 emit_move_insn (dst, src);
2915 emit_insn (gen_force_la_31 (dst, src));
2918 /* Return a legitimate reference for ORIG (an address) using the
2919 register REG. If REG is 0, a new pseudo is generated.
2921 There are two types of references that must be handled:
2923 1. Global data references must load the address from the GOT, via
2924 the PIC reg. An insn is emitted to do this load, and the reg is
2927 2. Static data references, constant pool addresses, and code labels
2928 compute the address as an offset from the GOT, whose base is in
2929 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2930 differentiate them from global data objects. The returned
2931 address is the PIC reg + an unspec constant.
2933 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2934 reg also appears in the address. */
2937 legitimize_pic_address (rtx orig, rtx reg)
2943 if (GET_CODE (addr) == LABEL_REF
2944 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2946 /* This is a local symbol. */
2947 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2949 /* Access local symbols PC-relative via LARL.
2950 This is the same as in the non-PIC case, so it is
2951 handled automatically ... */
2955 /* Access local symbols relative to the GOT. */
2957 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2959 if (reload_in_progress || reload_completed)
2960 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2962 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2963 addr = gen_rtx_CONST (Pmode, addr);
2964 addr = force_const_mem (Pmode, addr);
2965 emit_move_insn (temp, addr);
2967 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2970 s390_load_address (reg, new);
2975 else if (GET_CODE (addr) == SYMBOL_REF)
2978 reg = gen_reg_rtx (Pmode);
2982 /* Assume GOT offset < 4k. This is handled the same way
2983 in both 31- and 64-bit code (@GOT). */
2985 if (reload_in_progress || reload_completed)
2986 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2988 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2989 new = gen_rtx_CONST (Pmode, new);
2990 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2991 new = gen_const_mem (Pmode, new);
2992 emit_move_insn (reg, new);
2995 else if (TARGET_CPU_ZARCH)
2997 /* If the GOT offset might be >= 4k, we determine the position
2998 of the GOT entry via a PC-relative LARL (@GOTENT). */
3000 rtx temp = gen_reg_rtx (Pmode);
3002 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
3003 new = gen_rtx_CONST (Pmode, new);
3004 emit_move_insn (temp, new);
3006 new = gen_const_mem (Pmode, temp);
3007 emit_move_insn (reg, new);
3012 /* If the GOT offset might be >= 4k, we have to load it
3013 from the literal pool (@GOT). */
3015 rtx temp = gen_reg_rtx (Pmode);
3017 if (reload_in_progress || reload_completed)
3018 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3020 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
3021 addr = gen_rtx_CONST (Pmode, addr);
3022 addr = force_const_mem (Pmode, addr);
3023 emit_move_insn (temp, addr);
3025 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
3026 new = gen_const_mem (Pmode, new);
3027 emit_move_insn (reg, new);
3033 if (GET_CODE (addr) == CONST)
3035 addr = XEXP (addr, 0);
3036 if (GET_CODE (addr) == UNSPEC)
3038 if (XVECLEN (addr, 0) != 1)
3040 switch (XINT (addr, 1))
3042 /* If someone moved a GOT-relative UNSPEC
3043 out of the literal pool, force them back in. */
3046 new = force_const_mem (Pmode, orig);
3049 /* @GOT is OK as is if small. */
3052 new = force_const_mem (Pmode, orig);
3055 /* @GOTENT is OK as is. */
3059 /* @PLT is OK as is on 64-bit, must be converted to
3060 GOT-relative @PLTOFF on 31-bit. */
3062 if (!TARGET_CPU_ZARCH)
3064 rtx temp = reg? reg : gen_reg_rtx (Pmode);
3066 if (reload_in_progress || reload_completed)
3067 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3069 addr = XVECEXP (addr, 0, 0);
3070 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
3072 addr = gen_rtx_CONST (Pmode, addr);
3073 addr = force_const_mem (Pmode, addr);
3074 emit_move_insn (temp, addr);
3076 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
3079 s390_load_address (reg, new);
3085 /* Everything else cannot happen. */
3090 else if (GET_CODE (addr) != PLUS)
3093 if (GET_CODE (addr) == PLUS)
3095 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
3096 /* Check first to see if this is a constant offset
3097 from a local symbol reference. */
3098 if ((GET_CODE (op0) == LABEL_REF
3099 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
3100 && GET_CODE (op1) == CONST_INT)
3102 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
3104 if (INTVAL (op1) & 1)
3106 /* LARL can't handle odd offsets, so emit a
3107 pair of LARL and LA. */
3108 rtx temp = reg? reg : gen_reg_rtx (Pmode);
3110 if (!DISP_IN_RANGE (INTVAL (op1)))
3112 int even = INTVAL (op1) - 1;
3113 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
3114 op0 = gen_rtx_CONST (Pmode, op0);
3118 emit_move_insn (temp, op0);
3119 new = gen_rtx_PLUS (Pmode, temp, op1);
3123 s390_load_address (reg, new);
3129 /* If the offset is even, we can just use LARL.
3130 This will happen automatically. */
3135 /* Access local symbols relative to the GOT. */
3137 rtx temp = reg? reg : gen_reg_rtx (Pmode);
3139 if (reload_in_progress || reload_completed)
3140 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3142 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
3144 addr = gen_rtx_PLUS (Pmode, addr, op1);
3145 addr = gen_rtx_CONST (Pmode, addr);
3146 addr = force_const_mem (Pmode, addr);
3147 emit_move_insn (temp, addr);
3149 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
3152 s390_load_address (reg, new);
3158 /* Now, check whether it is a GOT relative symbol plus offset
3159 that was pulled out of the literal pool. Force it back in. */
3161 else if (GET_CODE (op0) == UNSPEC
3162 && GET_CODE (op1) == CONST_INT
3163 && XINT (op0, 1) == UNSPEC_GOTOFF)
3165 if (XVECLEN (op0, 0) != 1)
3168 new = force_const_mem (Pmode, orig);
3171 /* Otherwise, compute the sum. */
3174 base = legitimize_pic_address (XEXP (addr, 0), reg);
3175 new = legitimize_pic_address (XEXP (addr, 1),
3176 base == reg ? NULL_RTX : reg);
3177 if (GET_CODE (new) == CONST_INT)
3178 new = plus_constant (base, INTVAL (new));
3181 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
3183 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
3184 new = XEXP (new, 1);
3186 new = gen_rtx_PLUS (Pmode, base, new);
3189 if (GET_CODE (new) == CONST)
3190 new = XEXP (new, 0);
3191 new = force_operand (new, 0);
3198 /* Load the thread pointer into a register. */
3201 get_thread_pointer (void)
3203 rtx tp = gen_reg_rtx (Pmode);
3205 emit_move_insn (tp, gen_rtx_REG (Pmode, TP_REGNUM));
3206 mark_reg_pointer (tp, BITS_PER_WORD);
3211 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
3212 in s390_tls_symbol which always refers to __tls_get_offset.
3213 The returned offset is written to RESULT_REG and an USE rtx is
3214 generated for TLS_CALL. */
3216 static GTY(()) rtx s390_tls_symbol;
3219 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
3226 if (!s390_tls_symbol)
3227 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
3229 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
3230 gen_rtx_REG (Pmode, RETURN_REGNUM));
3232 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
3233 CONST_OR_PURE_CALL_P (insn) = 1;
3236 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
3237 this (thread-local) address. REG may be used as temporary. */
3240 legitimize_tls_address (rtx addr, rtx reg)
3242 rtx new, tls_call, temp, base, r2, insn;
3244 if (GET_CODE (addr) == SYMBOL_REF)
3245 switch (tls_symbolic_operand (addr))
3247 case TLS_MODEL_GLOBAL_DYNAMIC:
3249 r2 = gen_rtx_REG (Pmode, 2);
3250 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
3251 new = gen_rtx_CONST (Pmode, tls_call);
3252 new = force_const_mem (Pmode, new);
3253 emit_move_insn (r2, new);
3254 s390_emit_tls_call_insn (r2, tls_call);
3255 insn = get_insns ();
3258 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
3259 temp = gen_reg_rtx (Pmode);
3260 emit_libcall_block (insn, temp, r2, new);
3262 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3265 s390_load_address (reg, new);
3270 case TLS_MODEL_LOCAL_DYNAMIC:
3272 r2 = gen_rtx_REG (Pmode, 2);
3273 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
3274 new = gen_rtx_CONST (Pmode, tls_call);
3275 new = force_const_mem (Pmode, new);
3276 emit_move_insn (r2, new);
3277 s390_emit_tls_call_insn (r2, tls_call);
3278 insn = get_insns ();
3281 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
3282 temp = gen_reg_rtx (Pmode);
3283 emit_libcall_block (insn, temp, r2, new);
3285 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3286 base = gen_reg_rtx (Pmode);
3287 s390_load_address (base, new);
3289 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
3290 new = gen_rtx_CONST (Pmode, new);
3291 new = force_const_mem (Pmode, new);
3292 temp = gen_reg_rtx (Pmode);
3293 emit_move_insn (temp, new);
3295 new = gen_rtx_PLUS (Pmode, base, temp);
3298 s390_load_address (reg, new);
3303 case TLS_MODEL_INITIAL_EXEC:
3306 /* Assume GOT offset < 4k. This is handled the same way
3307 in both 31- and 64-bit code. */
3309 if (reload_in_progress || reload_completed)
3310 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3312 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
3313 new = gen_rtx_CONST (Pmode, new);
3314 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
3315 new = gen_const_mem (Pmode, new);
3316 temp = gen_reg_rtx (Pmode);
3317 emit_move_insn (temp, new);
3319 else if (TARGET_CPU_ZARCH)
3321 /* If the GOT offset might be >= 4k, we determine the position
3322 of the GOT entry via a PC-relative LARL. */
3324 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
3325 new = gen_rtx_CONST (Pmode, new);
3326 temp = gen_reg_rtx (Pmode);
3327 emit_move_insn (temp, new);
3329 new = gen_const_mem (Pmode, temp);
3330 temp = gen_reg_rtx (Pmode);
3331 emit_move_insn (temp, new);
3335 /* If the GOT offset might be >= 4k, we have to load it
3336 from the literal pool. */
3338 if (reload_in_progress || reload_completed)
3339 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3341 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
3342 new = gen_rtx_CONST (Pmode, new);
3343 new = force_const_mem (Pmode, new);
3344 temp = gen_reg_rtx (Pmode);
3345 emit_move_insn (temp, new);
3347 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
3348 new = gen_const_mem (Pmode, new);
3350 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3351 temp = gen_reg_rtx (Pmode);
3352 emit_insn (gen_rtx_SET (Pmode, temp, new));
3356 /* In position-dependent code, load the absolute address of
3357 the GOT entry from the literal pool. */
3359 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
3360 new = gen_rtx_CONST (Pmode, new);
3361 new = force_const_mem (Pmode, new);
3362 temp = gen_reg_rtx (Pmode);
3363 emit_move_insn (temp, new);
3366 new = gen_const_mem (Pmode, new);
3367 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3368 temp = gen_reg_rtx (Pmode);
3369 emit_insn (gen_rtx_SET (Pmode, temp, new));
3372 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3375 s390_load_address (reg, new);
3380 case TLS_MODEL_LOCAL_EXEC:
3381 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
3382 new = gen_rtx_CONST (Pmode, new);
3383 new = force_const_mem (Pmode, new);
3384 temp = gen_reg_rtx (Pmode);
3385 emit_move_insn (temp, new);
3387 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3390 s390_load_address (reg, new);
3399 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
3401 switch (XINT (XEXP (addr, 0), 1))
3403 case UNSPEC_INDNTPOFF:
3404 if (TARGET_CPU_ZARCH)
3415 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3416 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3418 new = XEXP (XEXP (addr, 0), 0);
3419 if (GET_CODE (new) != SYMBOL_REF)
3420 new = gen_rtx_CONST (Pmode, new);
3422 new = legitimize_tls_address (new, reg);
3423 new = plus_constant (new, INTVAL (XEXP (XEXP (addr, 0), 1)));
3424 new = force_operand (new, 0);
3428 abort (); /* for now ... */
3433 /* Emit insns to move operands[1] into operands[0]. */
3436 emit_symbolic_move (rtx *operands)
3438 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
3440 if (GET_CODE (operands[0]) == MEM)
3441 operands[1] = force_reg (Pmode, operands[1]);
3442 else if (TLS_SYMBOLIC_CONST (operands[1]))
3443 operands[1] = legitimize_tls_address (operands[1], temp);
3445 operands[1] = legitimize_pic_address (operands[1], temp);
3448 /* Try machine-dependent ways of modifying an illegitimate address X
3449 to be legitimate. If we find one, return the new, valid address.
3451 OLDX is the address as it was before break_out_memory_refs was called.
3452 In some cases it is useful to look at this to decide what needs to be done.
3454 MODE is the mode of the operand pointed to by X.
3456 When -fpic is used, special handling is needed for symbolic references.
3457 See comments by legitimize_pic_address for details. */
3460 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
3461 enum machine_mode mode ATTRIBUTE_UNUSED)
3463 rtx constant_term = const0_rtx;
3465 if (TLS_SYMBOLIC_CONST (x))
3467 x = legitimize_tls_address (x, 0);
3469 if (legitimate_address_p (mode, x, FALSE))
3474 if (SYMBOLIC_CONST (x)
3475 || (GET_CODE (x) == PLUS
3476 && (SYMBOLIC_CONST (XEXP (x, 0))
3477 || SYMBOLIC_CONST (XEXP (x, 1)))))
3478 x = legitimize_pic_address (x, 0);
3480 if (legitimate_address_p (mode, x, FALSE))
3484 x = eliminate_constant_term (x, &constant_term);
3486 /* Optimize loading of large displacements by splitting them
3487 into the multiple of 4K and the rest; this allows the
3488 former to be CSE'd if possible.
3490 Don't do this if the displacement is added to a register
3491 pointing into the stack frame, as the offsets will
3492 change later anyway. */
3494 if (GET_CODE (constant_term) == CONST_INT
3495 && !TARGET_LONG_DISPLACEMENT
3496 && !DISP_IN_RANGE (INTVAL (constant_term))
3497 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
3499 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
3500 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
3502 rtx temp = gen_reg_rtx (Pmode);
3503 rtx val = force_operand (GEN_INT (upper), temp);
3505 emit_move_insn (temp, val);
3507 x = gen_rtx_PLUS (Pmode, x, temp);
3508 constant_term = GEN_INT (lower);
3511 if (GET_CODE (x) == PLUS)
3513 if (GET_CODE (XEXP (x, 0)) == REG)
3515 register rtx temp = gen_reg_rtx (Pmode);
3516 register rtx val = force_operand (XEXP (x, 1), temp);
3518 emit_move_insn (temp, val);
3520 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
3523 else if (GET_CODE (XEXP (x, 1)) == REG)
3525 register rtx temp = gen_reg_rtx (Pmode);
3526 register rtx val = force_operand (XEXP (x, 0), temp);
3528 emit_move_insn (temp, val);
3530 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
3534 if (constant_term != const0_rtx)
3535 x = gen_rtx_PLUS (Pmode, x, constant_term);
3540 /* Try a machine-dependent way of reloading an illegitimate address AD
3541 operand. If we find one, push the reload and and return the new address.
3543 MODE is the mode of the enclosing MEM. OPNUM is the operand number
3544 and TYPE is the reload type of the current reload. */
3547 legitimize_reload_address (rtx ad, enum machine_mode mode ATTRIBUTE_UNUSED,
3548 int opnum, int type)
3550 if (!optimize || TARGET_LONG_DISPLACEMENT)
3553 if (GET_CODE (ad) == PLUS)
3555 rtx tem = simplify_binary_operation (PLUS, Pmode,
3556 XEXP (ad, 0), XEXP (ad, 1));
3561 if (GET_CODE (ad) == PLUS
3562 && GET_CODE (XEXP (ad, 0)) == REG
3563 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3564 && !DISP_IN_RANGE (INTVAL (XEXP (ad, 1))))
3566 HOST_WIDE_INT lower = INTVAL (XEXP (ad, 1)) & 0xfff;
3567 HOST_WIDE_INT upper = INTVAL (XEXP (ad, 1)) ^ lower;
3570 cst = GEN_INT (upper);
3571 if (!legitimate_reload_constant_p (cst))
3572 cst = force_const_mem (Pmode, cst);
3574 tem = gen_rtx_PLUS (Pmode, XEXP (ad, 0), cst);
3575 new = gen_rtx_PLUS (Pmode, tem, GEN_INT (lower));
3577 push_reload (XEXP (tem, 1), 0, &XEXP (tem, 1), 0,
3578 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0,
3579 opnum, (enum reload_type) type);
3586 /* Emit code to move LEN bytes from DST to SRC. */
3589 s390_expand_movmem (rtx dst, rtx src, rtx len)
3591 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3593 if (INTVAL (len) > 0)
3594 emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
3597 else if (TARGET_MVCLE)
3599 emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
3604 rtx dst_addr, src_addr, count, blocks, temp;
3605 rtx loop_start_label = gen_label_rtx ();
3606 rtx loop_end_label = gen_label_rtx ();
3607 rtx end_label = gen_label_rtx ();
3608 enum machine_mode mode;
3610 mode = GET_MODE (len);
3611 if (mode == VOIDmode)
3614 dst_addr = gen_reg_rtx (Pmode);
3615 src_addr = gen_reg_rtx (Pmode);
3616 count = gen_reg_rtx (mode);
3617 blocks = gen_reg_rtx (mode);
3619 convert_move (count, len, 1);
3620 emit_cmp_and_jump_insns (count, const0_rtx,
3621 EQ, NULL_RTX, mode, 1, end_label);
3623 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3624 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3625 dst = change_address (dst, VOIDmode, dst_addr);
3626 src = change_address (src, VOIDmode, src_addr);
3628 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3630 emit_move_insn (count, temp);
3632 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3634 emit_move_insn (blocks, temp);
3636 emit_cmp_and_jump_insns (blocks, const0_rtx,
3637 EQ, NULL_RTX, mode, 1, loop_end_label);
3639 emit_label (loop_start_label);
3641 emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
3642 s390_load_address (dst_addr,
3643 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3644 s390_load_address (src_addr,
3645 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3647 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3649 emit_move_insn (blocks, temp);
3651 emit_cmp_and_jump_insns (blocks, const0_rtx,
3652 EQ, NULL_RTX, mode, 1, loop_end_label);
3654 emit_jump (loop_start_label);
3655 emit_label (loop_end_label);
3657 emit_insn (gen_movmem_short (dst, src,
3658 convert_to_mode (Pmode, count, 1)));
3659 emit_label (end_label);
3663 /* Emit code to clear LEN bytes at DST. */
3666 s390_expand_clrmem (rtx dst, rtx len)
3668 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3670 if (INTVAL (len) > 0)
3671 emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
3674 else if (TARGET_MVCLE)
3676 emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
3681 rtx dst_addr, src_addr, count, blocks, temp;
3682 rtx loop_start_label = gen_label_rtx ();
3683 rtx loop_end_label = gen_label_rtx ();
3684 rtx end_label = gen_label_rtx ();
3685 enum machine_mode mode;
3687 mode = GET_MODE (len);
3688 if (mode == VOIDmode)
3691 dst_addr = gen_reg_rtx (Pmode);
3692 src_addr = gen_reg_rtx (Pmode);
3693 count = gen_reg_rtx (mode);
3694 blocks = gen_reg_rtx (mode);
3696 convert_move (count, len, 1);
3697 emit_cmp_and_jump_insns (count, const0_rtx,
3698 EQ, NULL_RTX, mode, 1, end_label);
3700 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3701 dst = change_address (dst, VOIDmode, dst_addr);
3703 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3705 emit_move_insn (count, temp);
3707 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3709 emit_move_insn (blocks, temp);
3711 emit_cmp_and_jump_insns (blocks, const0_rtx,
3712 EQ, NULL_RTX, mode, 1, loop_end_label);
3714 emit_label (loop_start_label);
3716 emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
3717 s390_load_address (dst_addr,
3718 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3720 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3722 emit_move_insn (blocks, temp);
3724 emit_cmp_and_jump_insns (blocks, const0_rtx,
3725 EQ, NULL_RTX, mode, 1, loop_end_label);
3727 emit_jump (loop_start_label);
3728 emit_label (loop_end_label);
3730 emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
3731 emit_label (end_label);
3735 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3736 and return the result in TARGET. */
3739 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3741 rtx ccreg = gen_rtx_REG (CCUmode, CC_REGNUM);
3744 /* As the result of CMPINT is inverted compared to what we need,
3745 we have to swap the operands. */
3746 tmp = op0; op0 = op1; op1 = tmp;
3748 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3750 if (INTVAL (len) > 0)
3752 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3753 emit_insn (gen_cmpint (target, ccreg));
3756 emit_move_insn (target, const0_rtx);
3758 else if (TARGET_MVCLE)
3760 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3761 emit_insn (gen_cmpint (target, ccreg));
3765 rtx addr0, addr1, count, blocks, temp;
3766 rtx loop_start_label = gen_label_rtx ();
3767 rtx loop_end_label = gen_label_rtx ();
3768 rtx end_label = gen_label_rtx ();
3769 enum machine_mode mode;
3771 mode = GET_MODE (len);
3772 if (mode == VOIDmode)
3775 addr0 = gen_reg_rtx (Pmode);
3776 addr1 = gen_reg_rtx (Pmode);
3777 count = gen_reg_rtx (mode);
3778 blocks = gen_reg_rtx (mode);
3780 convert_move (count, len, 1);
3781 emit_cmp_and_jump_insns (count, const0_rtx,
3782 EQ, NULL_RTX, mode, 1, end_label);
3784 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3785 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3786 op0 = change_address (op0, VOIDmode, addr0);
3787 op1 = change_address (op1, VOIDmode, addr1);
3789 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3791 emit_move_insn (count, temp);
3793 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3795 emit_move_insn (blocks, temp);
3797 emit_cmp_and_jump_insns (blocks, const0_rtx,
3798 EQ, NULL_RTX, mode, 1, loop_end_label);
3800 emit_label (loop_start_label);
3802 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3803 temp = gen_rtx_NE (VOIDmode, ccreg, const0_rtx);
3804 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3805 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3806 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3807 emit_jump_insn (temp);
3809 s390_load_address (addr0,
3810 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3811 s390_load_address (addr1,
3812 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3814 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3816 emit_move_insn (blocks, temp);
3818 emit_cmp_and_jump_insns (blocks, const0_rtx,
3819 EQ, NULL_RTX, mode, 1, loop_end_label);
3821 emit_jump (loop_start_label);
3822 emit_label (loop_end_label);
3824 emit_insn (gen_cmpmem_short (op0, op1,
3825 convert_to_mode (Pmode, count, 1)));
3826 emit_label (end_label);
3828 emit_insn (gen_cmpint (target, ccreg));
3833 /* Expand conditional increment or decrement using alc/slb instructions.
3834 Should generate code setting DST to either SRC or SRC + INCREMENT,
3835 depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
3836 Returns true if successful, false otherwise.
3838 That makes it possible to implement some if-constructs without jumps e.g.:
3839 (borrow = CC0 | CC1 and carry = CC2 | CC3)
3840 unsigned int a, b, c;
3841 if (a < b) c++; -> CCU b > a -> CC2; c += carry;
3842 if (a < b) c--; -> CCL3 a - b -> borrow; c -= borrow;
3843 if (a <= b) c++; -> CCL3 b - a -> borrow; c += carry;
3844 if (a <= b) c--; -> CCU a <= b -> borrow; c -= borrow;
3846 Checks for EQ and NE with a nonzero value need an additional xor e.g.:
3847 if (a == b) c++; -> CCL3 a ^= b; 0 - a -> borrow; c += carry;
3848 if (a == b) c--; -> CCU a ^= b; a <= 0 -> CC0 | CC1; c -= borrow;
3849 if (a != b) c++; -> CCU a ^= b; a > 0 -> CC2; c += carry;
3850 if (a != b) c--; -> CCL3 a ^= b; 0 - a -> borrow; c -= borrow; */
3853 s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
3854 rtx dst, rtx src, rtx increment)
3856 enum machine_mode cmp_mode;
3857 enum machine_mode cc_mode;
3862 if ((GET_MODE (cmp_op0) == SImode || GET_MODE (cmp_op0) == VOIDmode)
3863 && (GET_MODE (cmp_op1) == SImode || GET_MODE (cmp_op1) == VOIDmode))
3865 else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
3866 && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
3871 /* Try ADD LOGICAL WITH CARRY. */
3872 if (increment == const1_rtx)
3874 /* Determine CC mode to use. */
3875 if (cmp_code == EQ || cmp_code == NE)
3877 if (cmp_op1 != const0_rtx)
3879 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3880 NULL_RTX, 0, OPTAB_WIDEN);
3881 cmp_op1 = const0_rtx;
3884 cmp_code = cmp_code == EQ ? LEU : GTU;
3887 if (cmp_code == LTU || cmp_code == LEU)
3892 cmp_code = swap_condition (cmp_code);
3909 /* Emit comparison instruction pattern. */
3910 if (!register_operand (cmp_op0, cmp_mode))
3911 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3913 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3914 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3915 /* We use insn_invalid_p here to add clobbers if required. */
3916 if (insn_invalid_p (emit_insn (insn)))
3919 /* Emit ALC instruction pattern. */
3920 op_res = gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3921 gen_rtx_REG (cc_mode, CC_REGNUM),
3924 if (src != const0_rtx)
3926 if (!register_operand (src, GET_MODE (dst)))
3927 src = force_reg (GET_MODE (dst), src);
3929 src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
3930 op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
3933 p = rtvec_alloc (2);
3935 gen_rtx_SET (VOIDmode, dst, op_res);
3937 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3938 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3943 /* Try SUBTRACT LOGICAL WITH BORROW. */
3944 if (increment == constm1_rtx)
3946 /* Determine CC mode to use. */
3947 if (cmp_code == EQ || cmp_code == NE)
3949 if (cmp_op1 != const0_rtx)
3951 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3952 NULL_RTX, 0, OPTAB_WIDEN);
3953 cmp_op1 = const0_rtx;
3956 cmp_code = cmp_code == EQ ? LEU : GTU;
3959 if (cmp_code == GTU || cmp_code == GEU)
3964 cmp_code = swap_condition (cmp_code);
3981 /* Emit comparison instruction pattern. */
3982 if (!register_operand (cmp_op0, cmp_mode))
3983 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3985 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3986 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3987 /* We use insn_invalid_p here to add clobbers if required. */
3988 if (insn_invalid_p (emit_insn (insn)))
3991 /* Emit SLB instruction pattern. */
3992 if (!register_operand (src, GET_MODE (dst)))
3993 src = force_reg (GET_MODE (dst), src);
3995 op_res = gen_rtx_MINUS (GET_MODE (dst),
3996 gen_rtx_MINUS (GET_MODE (dst), src, const0_rtx),
3997 gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3998 gen_rtx_REG (cc_mode, CC_REGNUM),
4000 p = rtvec_alloc (2);
4002 gen_rtx_SET (VOIDmode, dst, op_res);
4004 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
4005 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
4014 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
4015 We need to emit DTP-relative relocations. */
4018 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
4023 fputs ("\t.long\t", file);
4026 fputs ("\t.quad\t", file);
4031 output_addr_const (file, x);
4032 fputs ("@DTPOFF", file);
4035 /* In the name of slightly smaller debug output, and to cater to
4036 general assembler losage, recognize various UNSPEC sequences
4037 and turn them back into a direct symbol reference. */
4040 s390_delegitimize_address (rtx orig_x)
4044 if (GET_CODE (x) != MEM)
4048 if (GET_CODE (x) == PLUS
4049 && GET_CODE (XEXP (x, 1)) == CONST
4050 && GET_CODE (XEXP (x, 0)) == REG
4051 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
4053 y = XEXP (XEXP (x, 1), 0);
4054 if (GET_CODE (y) == UNSPEC
4055 && XINT (y, 1) == UNSPEC_GOT)
4056 return XVECEXP (y, 0, 0);
4060 if (GET_CODE (x) == CONST)
4063 if (GET_CODE (y) == UNSPEC
4064 && XINT (y, 1) == UNSPEC_GOTENT)
4065 return XVECEXP (y, 0, 0);
4072 /* Output shift count operand OP to stdio stream FILE. */
4075 print_shift_count_operand (FILE *file, rtx op)
4077 HOST_WIDE_INT offset = 0;
4079 /* We can have an integer constant, an address register,
4080 or a sum of the two. */
4081 if (GET_CODE (op) == CONST_INT)
4083 offset = INTVAL (op);
4086 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
4088 offset = INTVAL (XEXP (op, 1));
4091 while (op && GET_CODE (op) == SUBREG)
4092 op = SUBREG_REG (op);
4095 if (op && (GET_CODE (op) != REG
4096 || REGNO (op) >= FIRST_PSEUDO_REGISTER
4097 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
4100 /* Shift counts are truncated to the low six bits anyway. */
4101 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
4103 fprintf (file, "(%s)", reg_names[REGNO (op)]);
4106 /* Locate some local-dynamic symbol still in use by this function
4107 so that we can print its name in local-dynamic base patterns. */
4110 get_some_local_dynamic_name (void)
4114 if (cfun->machine->some_ld_name)
4115 return cfun->machine->some_ld_name;
4117 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
4119 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
4120 return cfun->machine->some_ld_name;
4126 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
4130 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
4132 x = get_pool_constant (x);
4133 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
4136 if (GET_CODE (x) == SYMBOL_REF
4137 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
4139 cfun->machine->some_ld_name = XSTR (x, 0);
4146 /* Output machine-dependent UNSPECs occurring in address constant X
4147 in assembler syntax to stdio stream FILE. Returns true if the
4148 constant X could be recognized, false otherwise. */
4151 s390_output_addr_const_extra (FILE *file, rtx x)
4153 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
4154 switch (XINT (x, 1))
4157 output_addr_const (file, XVECEXP (x, 0, 0));
4158 fprintf (file, "@GOTENT");
4161 output_addr_const (file, XVECEXP (x, 0, 0));
4162 fprintf (file, "@GOT");
4165 output_addr_const (file, XVECEXP (x, 0, 0));
4166 fprintf (file, "@GOTOFF");
4169 output_addr_const (file, XVECEXP (x, 0, 0));
4170 fprintf (file, "@PLT");
4173 output_addr_const (file, XVECEXP (x, 0, 0));
4174 fprintf (file, "@PLTOFF");
4177 output_addr_const (file, XVECEXP (x, 0, 0));
4178 fprintf (file, "@TLSGD");
4181 assemble_name (file, get_some_local_dynamic_name ());
4182 fprintf (file, "@TLSLDM");
4185 output_addr_const (file, XVECEXP (x, 0, 0));
4186 fprintf (file, "@DTPOFF");
4189 output_addr_const (file, XVECEXP (x, 0, 0));
4190 fprintf (file, "@NTPOFF");
4192 case UNSPEC_GOTNTPOFF:
4193 output_addr_const (file, XVECEXP (x, 0, 0));
4194 fprintf (file, "@GOTNTPOFF");
4196 case UNSPEC_INDNTPOFF:
4197 output_addr_const (file, XVECEXP (x, 0, 0));
4198 fprintf (file, "@INDNTPOFF");
4205 /* Output address operand ADDR in assembler syntax to
4206 stdio stream FILE. */
4209 print_operand_address (FILE *file, rtx addr)
4211 struct s390_address ad;
4213 if (!s390_decompose_address (addr, &ad)
4214 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
4215 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
4216 output_operand_lossage ("Cannot decompose address.");
4219 output_addr_const (file, ad.disp);
4221 fprintf (file, "0");
4223 if (ad.base && ad.indx)
4224 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
4225 reg_names[REGNO (ad.base)]);
4227 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
4230 /* Output operand X in assembler syntax to stdio stream FILE.
4231 CODE specified the format flag. The following format flags
4234 'C': print opcode suffix for branch condition.
4235 'D': print opcode suffix for inverse branch condition.
4236 'J': print tls_load/tls_gdcall/tls_ldcall suffix
4237 'O': print only the displacement of a memory reference.
4238 'R': print only the base register of a memory reference.
4239 'S': print S-type memory reference (base+displacement).
4240 'N': print the second word of a DImode operand.
4241 'M': print the second word of a TImode operand.
4242 'Y': print shift count operand.
4244 'b': print integer X as if it's an unsigned byte.
4245 'x': print integer X as if it's an unsigned word.
4246 'h': print integer X as if it's a signed word.
4247 'i': print the first nonzero HImode part of X.
4248 'j': print the first HImode part unequal to 0xffff of X. */
4251 print_operand (FILE *file, rtx x, int code)
4256 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
4260 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
4264 if (GET_CODE (x) == SYMBOL_REF)
4266 fprintf (file, "%s", ":tls_load:");
4267 output_addr_const (file, x);
4269 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
4271 fprintf (file, "%s", ":tls_gdcall:");
4272 output_addr_const (file, XVECEXP (x, 0, 0));
4274 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
4276 fprintf (file, "%s", ":tls_ldcall:");
4277 assemble_name (file, get_some_local_dynamic_name ());
4285 struct s390_address ad;
4287 if (GET_CODE (x) != MEM
4288 || !s390_decompose_address (XEXP (x, 0), &ad)
4289 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
4294 output_addr_const (file, ad.disp);
4296 fprintf (file, "0");
4302 struct s390_address ad;
4304 if (GET_CODE (x) != MEM
4305 || !s390_decompose_address (XEXP (x, 0), &ad)
4306 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
4311 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
4313 fprintf (file, "0");
4319 struct s390_address ad;
4321 if (GET_CODE (x) != MEM
4322 || !s390_decompose_address (XEXP (x, 0), &ad)
4323 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
4328 output_addr_const (file, ad.disp);
4330 fprintf (file, "0");
4333 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
4338 if (GET_CODE (x) == REG)
4339 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
4340 else if (GET_CODE (x) == MEM)
4341 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
4347 if (GET_CODE (x) == REG)
4348 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
4349 else if (GET_CODE (x) == MEM)
4350 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
4356 print_shift_count_operand (file, x);
4360 switch (GET_CODE (x))
4363 fprintf (file, "%s", reg_names[REGNO (x)]);
4367 output_address (XEXP (x, 0));
4374 output_addr_const (file, x);
4379 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
4380 else if (code == 'x')
4381 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
4382 else if (code == 'h')
4383 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
4384 else if (code == 'i')
4385 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
4386 s390_extract_part (x, HImode, 0));
4387 else if (code == 'j')
4388 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
4389 s390_extract_part (x, HImode, -1));
4391 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
4395 if (GET_MODE (x) != VOIDmode)
4398 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
4399 else if (code == 'x')
4400 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
4401 else if (code == 'h')
4402 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
4408 fatal_insn ("UNKNOWN in print_operand !?", x);
4413 /* Target hook for assembling integer objects. We need to define it
4414 here to work a round a bug in some versions of GAS, which couldn't
4415 handle values smaller than INT_MIN when printed in decimal. */
4418 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
4420 if (size == 8 && aligned_p
4421 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
4423 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
4427 return default_assemble_integer (x, size, aligned_p);
4430 /* Returns true if register REGNO is used for forming
4431 a memory address in expression X. */
4434 reg_used_in_mem_p (int regno, rtx x)
4436 enum rtx_code code = GET_CODE (x);
4442 if (refers_to_regno_p (regno, regno+1,
4446 else if (code == SET
4447 && GET_CODE (SET_DEST (x)) == PC)
4449 if (refers_to_regno_p (regno, regno+1,
4454 fmt = GET_RTX_FORMAT (code);
4455 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4458 && reg_used_in_mem_p (regno, XEXP (x, i)))
4461 else if (fmt[i] == 'E')
4462 for (j = 0; j < XVECLEN (x, i); j++)
4463 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
4469 /* Returns true if expression DEP_RTX sets an address register
4470 used by instruction INSN to address memory. */
4473 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
4477 if (GET_CODE (dep_rtx) == INSN)
4478 dep_rtx = PATTERN (dep_rtx);
4480 if (GET_CODE (dep_rtx) == SET)
4482 target = SET_DEST (dep_rtx);
4483 if (GET_CODE (target) == STRICT_LOW_PART)
4484 target = XEXP (target, 0);
4485 while (GET_CODE (target) == SUBREG)
4486 target = SUBREG_REG (target);
4488 if (GET_CODE (target) == REG)
4490 int regno = REGNO (target);
4492 if (s390_safe_attr_type (insn) == TYPE_LA)
4494 pat = PATTERN (insn);
4495 if (GET_CODE (pat) == PARALLEL)
4497 if (XVECLEN (pat, 0) != 2)
4499 pat = XVECEXP (pat, 0, 0);
4501 if (GET_CODE (pat) == SET)
4502 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
4506 else if (get_attr_atype (insn) == ATYPE_AGEN)
4507 return reg_used_in_mem_p (regno, PATTERN (insn));
4513 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
4516 s390_agen_dep_p (rtx dep_insn, rtx insn)
4518 rtx dep_rtx = PATTERN (dep_insn);
4521 if (GET_CODE (dep_rtx) == SET
4522 && addr_generation_dependency_p (dep_rtx, insn))
4524 else if (GET_CODE (dep_rtx) == PARALLEL)
4526 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
4528 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
4535 /* A C statement (sans semicolon) to update the integer scheduling priority
4536 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
4537 reduce the priority to execute INSN later. Do not define this macro if
4538 you do not need to adjust the scheduling priorities of insns.
4540 A STD instruction should be scheduled earlier,
4541 in order to use the bypass. */
4544 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
4546 if (! INSN_P (insn))
4549 if (s390_tune != PROCESSOR_2084_Z990)
4552 switch (s390_safe_attr_type (insn))
4556 priority = priority << 3;
4560 priority = priority << 1;
4568 /* The number of instructions that can be issued per cycle. */
4571 s390_issue_rate (void)
4573 if (s390_tune == PROCESSOR_2084_Z990)
4579 s390_first_cycle_multipass_dfa_lookahead (void)
4585 /* Split all branches that exceed the maximum distance.
4586 Returns true if this created a new literal pool entry. */
4589 s390_split_branches (void)
4591 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
4592 int new_literal = 0;
4593 rtx insn, pat, tmp, target;
4596 /* We need correct insn addresses. */
4598 shorten_branches (get_insns ());
4600 /* Find all branches that exceed 64KB, and split them. */
4602 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4604 if (GET_CODE (insn) != JUMP_INSN)
4607 pat = PATTERN (insn);
4608 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4609 pat = XVECEXP (pat, 0, 0);
4610 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
4613 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
4615 label = &SET_SRC (pat);
4617 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
4619 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
4620 label = &XEXP (SET_SRC (pat), 1);
4621 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
4622 label = &XEXP (SET_SRC (pat), 2);
4629 if (get_attr_length (insn) <= 4)
4632 /* We are going to use the return register as scratch register,
4633 make sure it will be saved/restored by the prologue/epilogue. */
4634 cfun_frame_layout.save_return_addr_p = 1;
4639 tmp = force_const_mem (Pmode, *label);
4640 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
4641 INSN_ADDRESSES_NEW (tmp, -1);
4642 annotate_constant_pool_refs (&PATTERN (tmp));
4649 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
4650 UNSPEC_LTREL_OFFSET);
4651 target = gen_rtx_CONST (Pmode, target);
4652 target = force_const_mem (Pmode, target);
4653 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
4654 INSN_ADDRESSES_NEW (tmp, -1);
4655 annotate_constant_pool_refs (&PATTERN (tmp));
4657 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XEXP (target, 0),
4658 cfun->machine->base_reg),
4660 target = gen_rtx_PLUS (Pmode, temp_reg, target);
4663 if (!validate_change (insn, label, target, 0))
4670 /* Annotate every literal pool reference in X by an UNSPEC_LTREF expression.
4671 Fix up MEMs as required. */
4674 annotate_constant_pool_refs (rtx *x)
4679 if (GET_CODE (*x) == SYMBOL_REF
4680 && CONSTANT_POOL_ADDRESS_P (*x))
4683 /* Literal pool references can only occur inside a MEM ... */
4684 if (GET_CODE (*x) == MEM)
4686 rtx memref = XEXP (*x, 0);
4688 if (GET_CODE (memref) == SYMBOL_REF
4689 && CONSTANT_POOL_ADDRESS_P (memref))
4691 rtx base = cfun->machine->base_reg;
4692 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, memref, base),
4695 *x = replace_equiv_address (*x, addr);
4699 if (GET_CODE (memref) == CONST
4700 && GET_CODE (XEXP (memref, 0)) == PLUS
4701 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4702 && GET_CODE (XEXP (XEXP (memref, 0), 0)) == SYMBOL_REF
4703 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (memref, 0), 0)))
4705 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4706 rtx sym = XEXP (XEXP (memref, 0), 0);
4707 rtx base = cfun->machine->base_reg;
4708 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4711 *x = replace_equiv_address (*x, plus_constant (addr, off));
4716 /* ... or a load-address type pattern. */
4717 if (GET_CODE (*x) == SET)
4719 rtx addrref = SET_SRC (*x);
4721 if (GET_CODE (addrref) == SYMBOL_REF
4722 && CONSTANT_POOL_ADDRESS_P (addrref))
4724 rtx base = cfun->machine->base_reg;
4725 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, addrref, base),
4728 SET_SRC (*x) = addr;
4732 if (GET_CODE (addrref) == CONST
4733 && GET_CODE (XEXP (addrref, 0)) == PLUS
4734 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4735 && GET_CODE (XEXP (XEXP (addrref, 0), 0)) == SYMBOL_REF
4736 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addrref, 0), 0)))
4738 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4739 rtx sym = XEXP (XEXP (addrref, 0), 0);
4740 rtx base = cfun->machine->base_reg;
4741 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4744 SET_SRC (*x) = plus_constant (addr, off);
4749 /* Annotate LTREL_BASE as well. */
4750 if (GET_CODE (*x) == UNSPEC
4751 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4753 rtx base = cfun->machine->base_reg;
4754 *x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XVECEXP (*x, 0, 0), base),
4759 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4760 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4764 annotate_constant_pool_refs (&XEXP (*x, i));
4766 else if (fmt[i] == 'E')
4768 for (j = 0; j < XVECLEN (*x, i); j++)
4769 annotate_constant_pool_refs (&XVECEXP (*x, i, j));
4775 /* Find an annotated literal pool symbol referenced in RTX X,
4776 and store it at REF. Will abort if X contains references to
4777 more than one such pool symbol; multiple references to the same
4778 symbol are allowed, however.
4780 The rtx pointed to by REF must be initialized to NULL_RTX
4781 by the caller before calling this routine. */
4784 find_constant_pool_ref (rtx x, rtx *ref)
4789 /* Ignore LTREL_BASE references. */
4790 if (GET_CODE (x) == UNSPEC
4791 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4793 /* Likewise POOL_ENTRY insns. */
4794 if (GET_CODE (x) == UNSPEC_VOLATILE
4795 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
4798 if (GET_CODE (x) == SYMBOL_REF
4799 && CONSTANT_POOL_ADDRESS_P (x))
4802 if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_LTREF)
4804 rtx sym = XVECEXP (x, 0, 0);
4805 if (GET_CODE (sym) != SYMBOL_REF
4806 || !CONSTANT_POOL_ADDRESS_P (sym))
4809 if (*ref == NULL_RTX)
4811 else if (*ref != sym)
4817 fmt = GET_RTX_FORMAT (GET_CODE (x));
4818 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4822 find_constant_pool_ref (XEXP (x, i), ref);
4824 else if (fmt[i] == 'E')
4826 for (j = 0; j < XVECLEN (x, i); j++)
4827 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4832 /* Replace every reference to the annotated literal pool
4833 symbol REF in X by its base plus OFFSET. */
4836 replace_constant_pool_ref (rtx *x, rtx ref, rtx offset)
4844 if (GET_CODE (*x) == UNSPEC
4845 && XINT (*x, 1) == UNSPEC_LTREF
4846 && XVECEXP (*x, 0, 0) == ref)
4848 *x = gen_rtx_PLUS (Pmode, XVECEXP (*x, 0, 1), offset);
4852 if (GET_CODE (*x) == PLUS
4853 && GET_CODE (XEXP (*x, 1)) == CONST_INT
4854 && GET_CODE (XEXP (*x, 0)) == UNSPEC
4855 && XINT (XEXP (*x, 0), 1) == UNSPEC_LTREF
4856 && XVECEXP (XEXP (*x, 0), 0, 0) == ref)
4858 rtx addr = gen_rtx_PLUS (Pmode, XVECEXP (XEXP (*x, 0), 0, 1), offset);
4859 *x = plus_constant (addr, INTVAL (XEXP (*x, 1)));
4863 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4864 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4868 replace_constant_pool_ref (&XEXP (*x, i), ref, offset);
4870 else if (fmt[i] == 'E')
4872 for (j = 0; j < XVECLEN (*x, i); j++)
4873 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, offset);
4878 /* Check whether X contains an UNSPEC_LTREL_BASE.
4879 Return its constant pool symbol if found, NULL_RTX otherwise. */
4882 find_ltrel_base (rtx x)
4887 if (GET_CODE (x) == UNSPEC
4888 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4889 return XVECEXP (x, 0, 0);
4891 fmt = GET_RTX_FORMAT (GET_CODE (x));
4892 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4896 rtx fnd = find_ltrel_base (XEXP (x, i));
4900 else if (fmt[i] == 'E')
4902 for (j = 0; j < XVECLEN (x, i); j++)
4904 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4914 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with its base. */
4917 replace_ltrel_base (rtx *x)
4922 if (GET_CODE (*x) == UNSPEC
4923 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4925 *x = XVECEXP (*x, 0, 1);
4929 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4930 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4934 replace_ltrel_base (&XEXP (*x, i));
4936 else if (fmt[i] == 'E')
4938 for (j = 0; j < XVECLEN (*x, i); j++)
4939 replace_ltrel_base (&XVECEXP (*x, i, j));
4945 /* We keep a list of constants which we have to add to internal
4946 constant tables in the middle of large functions. */
4948 #define NR_C_MODES 7
4949 enum machine_mode constant_modes[NR_C_MODES] =
4960 struct constant *next;
4965 struct constant_pool
4967 struct constant_pool *next;
4972 struct constant *constants[NR_C_MODES];
4973 struct constant *execute;
4978 static struct constant_pool * s390_mainpool_start (void);
4979 static void s390_mainpool_finish (struct constant_pool *);
4980 static void s390_mainpool_cancel (struct constant_pool *);
4982 static struct constant_pool * s390_chunkify_start (void);
4983 static void s390_chunkify_finish (struct constant_pool *);
4984 static void s390_chunkify_cancel (struct constant_pool *);
4986 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4987 static void s390_end_pool (struct constant_pool *, rtx);
4988 static void s390_add_pool_insn (struct constant_pool *, rtx);
4989 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4990 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4991 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4992 static void s390_add_execute (struct constant_pool *, rtx);
4993 static rtx s390_find_execute (struct constant_pool *, rtx);
4994 static rtx s390_execute_label (rtx);
4995 static rtx s390_execute_target (rtx);
4996 static void s390_dump_pool (struct constant_pool *, bool);
4997 static void s390_dump_execute (struct constant_pool *);
4998 static struct constant_pool *s390_alloc_pool (void);
4999 static void s390_free_pool (struct constant_pool *);
5001 /* Create new constant pool covering instructions starting at INSN
5002 and chain it to the end of POOL_LIST. */
5004 static struct constant_pool *
5005 s390_start_pool (struct constant_pool **pool_list, rtx insn)
5007 struct constant_pool *pool, **prev;
5009 pool = s390_alloc_pool ();
5010 pool->first_insn = insn;
5012 for (prev = pool_list; *prev; prev = &(*prev)->next)
5019 /* End range of instructions covered by POOL at INSN and emit
5020 placeholder insn representing the pool. */
5023 s390_end_pool (struct constant_pool *pool, rtx insn)
5025 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
5028 insn = get_last_insn ();
5030 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
5031 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5034 /* Add INSN to the list of insns covered by POOL. */
5037 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
5039 bitmap_set_bit (pool->insns, INSN_UID (insn));
5042 /* Return pool out of POOL_LIST that covers INSN. */
5044 static struct constant_pool *
5045 s390_find_pool (struct constant_pool *pool_list, rtx insn)
5047 struct constant_pool *pool;
5049 for (pool = pool_list; pool; pool = pool->next)
5050 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
5056 /* Add constant VAL of mode MODE to the constant pool POOL. */
5059 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
5064 for (i = 0; i < NR_C_MODES; i++)
5065 if (constant_modes[i] == mode)
5067 if (i == NR_C_MODES)
5070 for (c = pool->constants[i]; c != NULL; c = c->next)
5071 if (rtx_equal_p (val, c->value))
5076 c = (struct constant *) xmalloc (sizeof *c);
5078 c->label = gen_label_rtx ();
5079 c->next = pool->constants[i];
5080 pool->constants[i] = c;
5081 pool->size += GET_MODE_SIZE (mode);
5085 /* Find constant VAL of mode MODE in the constant pool POOL.
5086 Return an RTX describing the distance from the start of
5087 the pool to the location of the new constant. */
5090 s390_find_constant (struct constant_pool *pool, rtx val,
5091 enum machine_mode mode)
5097 for (i = 0; i < NR_C_MODES; i++)
5098 if (constant_modes[i] == mode)
5100 if (i == NR_C_MODES)
5103 for (c = pool->constants[i]; c != NULL; c = c->next)
5104 if (rtx_equal_p (val, c->value))
5110 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
5111 gen_rtx_LABEL_REF (Pmode, pool->label));
5112 offset = gen_rtx_CONST (Pmode, offset);
5116 /* Add execute target for INSN to the constant pool POOL. */
5119 s390_add_execute (struct constant_pool *pool, rtx insn)
5123 for (c = pool->execute; c != NULL; c = c->next)
5124 if (INSN_UID (insn) == INSN_UID (c->value))
5129 rtx label = s390_execute_label (insn);
5132 c = (struct constant *) xmalloc (sizeof *c);
5134 c->label = label == const0_rtx ? gen_label_rtx () : XEXP (label, 0);
5135 c->next = pool->execute;
5137 pool->size += label == const0_rtx ? 6 : 0;
5141 /* Find execute target for INSN in the constant pool POOL.
5142 Return an RTX describing the distance from the start of
5143 the pool to the location of the execute target. */
5146 s390_find_execute (struct constant_pool *pool, rtx insn)
5151 for (c = pool->execute; c != NULL; c = c->next)
5152 if (INSN_UID (insn) == INSN_UID (c->value))
5158 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
5159 gen_rtx_LABEL_REF (Pmode, pool->label));
5160 offset = gen_rtx_CONST (Pmode, offset);
5164 /* Check whether INSN is an execute. Return the label_ref to its
5165 execute target template if so, NULL_RTX otherwise. */
5168 s390_execute_label (rtx insn)
5170 if (GET_CODE (insn) == INSN
5171 && GET_CODE (PATTERN (insn)) == PARALLEL
5172 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == UNSPEC
5173 && XINT (XVECEXP (PATTERN (insn), 0, 0), 1) == UNSPEC_EXECUTE)
5174 return XVECEXP (XVECEXP (PATTERN (insn), 0, 0), 0, 2);
5179 /* For an execute INSN, extract the execute target template. */
5182 s390_execute_target (rtx insn)
5184 rtx pattern = PATTERN (insn);
5185 gcc_assert (s390_execute_label (insn));
5187 if (XVECLEN (pattern, 0) == 2)
5189 pattern = copy_rtx (XVECEXP (pattern, 0, 1));
5193 rtvec vec = rtvec_alloc (XVECLEN (pattern, 0) - 1);
5196 for (i = 0; i < XVECLEN (pattern, 0) - 1; i++)
5197 RTVEC_ELT (vec, i) = copy_rtx (XVECEXP (pattern, 0, i + 1));
5199 pattern = gen_rtx_PARALLEL (VOIDmode, vec);
5205 /* Indicate that INSN cannot be duplicated. This is the case for
5206 execute insns that carry a unique label. */
5209 s390_cannot_copy_insn_p (rtx insn)
5211 rtx label = s390_execute_label (insn);
5212 return label && label != const0_rtx;
5215 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
5216 do not emit the pool base label. */
5219 s390_dump_pool (struct constant_pool *pool, bool remote_label)
5222 rtx insn = pool->pool_insn;
5225 /* Switch to rodata section. */
5226 if (TARGET_CPU_ZARCH)
5228 insn = emit_insn_after (gen_pool_section_start (), insn);
5229 INSN_ADDRESSES_NEW (insn, -1);
5232 /* Ensure minimum pool alignment. */
5233 if (TARGET_CPU_ZARCH)
5234 insn = emit_insn_after (gen_pool_align (GEN_INT (8)), insn);
5236 insn = emit_insn_after (gen_pool_align (GEN_INT (4)), insn);
5237 INSN_ADDRESSES_NEW (insn, -1);
5239 /* Emit pool base label. */
5242 insn = emit_label_after (pool->label, insn);
5243 INSN_ADDRESSES_NEW (insn, -1);
5246 /* Dump constants in descending alignment requirement order,
5247 ensuring proper alignment for every constant. */
5248 for (i = 0; i < NR_C_MODES; i++)
5249 for (c = pool->constants[i]; c; c = c->next)
5251 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
5252 rtx value = c->value;
5253 if (GET_CODE (value) == CONST
5254 && GET_CODE (XEXP (value, 0)) == UNSPEC
5255 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
5256 && XVECLEN (XEXP (value, 0), 0) == 1)
5258 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
5259 gen_rtx_LABEL_REF (VOIDmode, pool->label));
5260 value = gen_rtx_CONST (VOIDmode, value);
5263 insn = emit_label_after (c->label, insn);
5264 INSN_ADDRESSES_NEW (insn, -1);
5266 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
5267 gen_rtvec (1, value),
5268 UNSPECV_POOL_ENTRY);
5269 insn = emit_insn_after (value, insn);
5270 INSN_ADDRESSES_NEW (insn, -1);
5273 /* Ensure minimum alignment for instructions. */
5274 insn = emit_insn_after (gen_pool_align (GEN_INT (2)), insn);
5275 INSN_ADDRESSES_NEW (insn, -1);
5277 /* Output in-pool execute template insns. */
5278 for (c = pool->execute; c; c = c->next)
5280 if (s390_execute_label (c->value) != const0_rtx)
5283 insn = emit_label_after (c->label, insn);
5284 INSN_ADDRESSES_NEW (insn, -1);
5286 insn = emit_insn_after (s390_execute_target (c->value), insn);
5287 INSN_ADDRESSES_NEW (insn, -1);
5290 /* Switch back to previous section. */
5291 if (TARGET_CPU_ZARCH)
5293 insn = emit_insn_after (gen_pool_section_end (), insn);
5294 INSN_ADDRESSES_NEW (insn, -1);
5297 insn = emit_barrier_after (insn);
5298 INSN_ADDRESSES_NEW (insn, -1);
5300 /* Remove placeholder insn. */
5301 remove_insn (pool->pool_insn);
5303 /* Output out-of-pool execute template isns. */
5304 s390_dump_execute (pool);
5307 /* Dump out the out-of-pool execute template insns in POOL
5308 at the end of the instruction stream. */
5311 s390_dump_execute (struct constant_pool *pool)
5316 for (c = pool->execute; c; c = c->next)
5318 if (s390_execute_label (c->value) == const0_rtx)
5321 insn = emit_label (c->label);
5322 INSN_ADDRESSES_NEW (insn, -1);
5324 insn = emit_insn (s390_execute_target (c->value));
5325 INSN_ADDRESSES_NEW (insn, -1);
5329 /* Allocate new constant_pool structure. */
5331 static struct constant_pool *
5332 s390_alloc_pool (void)
5334 struct constant_pool *pool;
5337 pool = (struct constant_pool *) xmalloc (sizeof *pool);
5339 for (i = 0; i < NR_C_MODES; i++)
5340 pool->constants[i] = NULL;
5342 pool->execute = NULL;
5343 pool->label = gen_label_rtx ();
5344 pool->first_insn = NULL_RTX;
5345 pool->pool_insn = NULL_RTX;
5346 pool->insns = BITMAP_XMALLOC ();
5352 /* Free all memory used by POOL. */
5355 s390_free_pool (struct constant_pool *pool)
5357 struct constant *c, *next;
5360 for (i = 0; i < NR_C_MODES; i++)
5361 for (c = pool->constants[i]; c; c = next)
5367 for (c = pool->execute; c; c = next)
5373 BITMAP_XFREE (pool->insns);
5378 /* Collect main literal pool. Return NULL on overflow. */
5380 static struct constant_pool *
5381 s390_mainpool_start (void)
5383 struct constant_pool *pool;
5386 pool = s390_alloc_pool ();
5388 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5390 if (GET_CODE (insn) == INSN
5391 && GET_CODE (PATTERN (insn)) == SET
5392 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC_VOLATILE
5393 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPECV_MAIN_POOL)
5395 if (pool->pool_insn)
5397 pool->pool_insn = insn;
5400 if (s390_execute_label (insn))
5402 s390_add_execute (pool, insn);
5404 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5406 rtx pool_ref = NULL_RTX;
5407 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5410 rtx constant = get_pool_constant (pool_ref);
5411 enum machine_mode mode = get_pool_mode (pool_ref);
5412 s390_add_constant (pool, constant, mode);
5417 if (!pool->pool_insn && pool->size > 0)
5420 if (pool->size >= 4096)
5422 /* We're going to chunkify the pool, so remove the main
5423 pool placeholder insn. */
5424 remove_insn (pool->pool_insn);
5426 s390_free_pool (pool);
5433 /* POOL holds the main literal pool as collected by s390_mainpool_start.
5434 Modify the current function to output the pool constants as well as
5435 the pool register setup instruction. */
5438 s390_mainpool_finish (struct constant_pool *pool)
5440 rtx base_reg = cfun->machine->base_reg;
5443 /* If the pool is empty, we're done. */
5444 if (pool->size == 0)
5446 /* However, we may have out-of-pool execute templates. */
5447 s390_dump_execute (pool);
5449 /* We don't actually need a base register after all. */
5450 cfun->machine->base_reg = NULL_RTX;
5452 if (pool->pool_insn)
5453 remove_insn (pool->pool_insn);
5454 s390_free_pool (pool);
5458 /* We need correct insn addresses. */
5459 shorten_branches (get_insns ());
5461 /* On zSeries, we use a LARL to load the pool register. The pool is
5462 located in the .rodata section, so we emit it after the function. */
5463 if (TARGET_CPU_ZARCH)
5465 insn = gen_main_base_64 (base_reg, pool->label);
5466 insn = emit_insn_after (insn, pool->pool_insn);
5467 INSN_ADDRESSES_NEW (insn, -1);
5468 remove_insn (pool->pool_insn);
5470 insn = get_last_insn ();
5471 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
5472 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5474 s390_dump_pool (pool, 0);
5477 /* On S/390, if the total size of the function's code plus literal pool
5478 does not exceed 4096 bytes, we use BASR to set up a function base
5479 pointer, and emit the literal pool at the end of the function. */
5480 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
5481 + pool->size + 8 /* alignment slop */ < 4096)
5483 insn = gen_main_base_31_small (base_reg, pool->label);
5484 insn = emit_insn_after (insn, pool->pool_insn);
5485 INSN_ADDRESSES_NEW (insn, -1);
5486 remove_insn (pool->pool_insn);
5488 insn = emit_label_after (pool->label, insn);
5489 INSN_ADDRESSES_NEW (insn, -1);
5491 insn = get_last_insn ();
5492 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
5493 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5495 s390_dump_pool (pool, 1);
5498 /* Otherwise, we emit an inline literal pool and use BASR to branch
5499 over it, setting up the pool register at the same time. */
5502 rtx pool_end = gen_label_rtx ();
5504 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
5505 insn = emit_insn_after (insn, pool->pool_insn);
5506 INSN_ADDRESSES_NEW (insn, -1);
5507 remove_insn (pool->pool_insn);
5509 insn = emit_label_after (pool->label, insn);
5510 INSN_ADDRESSES_NEW (insn, -1);
5512 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
5513 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
5515 insn = emit_label_after (pool_end, pool->pool_insn);
5516 INSN_ADDRESSES_NEW (insn, -1);
5518 s390_dump_pool (pool, 1);
5522 /* Replace all literal pool references. */
5524 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5527 replace_ltrel_base (&PATTERN (insn));
5529 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5531 rtx addr, pool_ref = NULL_RTX;
5532 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5535 if (s390_execute_label (insn))
5536 addr = s390_find_execute (pool, insn);
5538 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
5539 get_pool_mode (pool_ref));
5541 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5542 INSN_CODE (insn) = -1;
5548 /* Free the pool. */
5549 s390_free_pool (pool);
5552 /* POOL holds the main literal pool as collected by s390_mainpool_start.
5553 We have decided we cannot use this pool, so revert all changes
5554 to the current function that were done by s390_mainpool_start. */
5556 s390_mainpool_cancel (struct constant_pool *pool)
5558 /* We didn't actually change the instruction stream, so simply
5559 free the pool memory. */
5560 s390_free_pool (pool);
5564 /* Chunkify the literal pool. */
5566 #define S390_POOL_CHUNK_MIN 0xc00
5567 #define S390_POOL_CHUNK_MAX 0xe00
5569 static struct constant_pool *
5570 s390_chunkify_start (void)
5572 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
5575 rtx pending_ltrel = NULL_RTX;
5578 rtx (*gen_reload_base) (rtx, rtx) =
5579 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
5582 /* We need correct insn addresses. */
5584 shorten_branches (get_insns ());
5586 /* Scan all insns and move literals to pool chunks. */
5588 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5590 /* Check for pending LTREL_BASE. */
5593 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
5596 if (ltrel_base == pending_ltrel)
5597 pending_ltrel = NULL_RTX;
5603 if (s390_execute_label (insn))
5606 curr_pool = s390_start_pool (&pool_list, insn);
5608 s390_add_execute (curr_pool, insn);
5609 s390_add_pool_insn (curr_pool, insn);
5611 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5613 rtx pool_ref = NULL_RTX;
5614 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5617 rtx constant = get_pool_constant (pool_ref);
5618 enum machine_mode mode = get_pool_mode (pool_ref);
5621 curr_pool = s390_start_pool (&pool_list, insn);
5623 s390_add_constant (curr_pool, constant, mode);
5624 s390_add_pool_insn (curr_pool, insn);
5626 /* Don't split the pool chunk between a LTREL_OFFSET load
5627 and the corresponding LTREL_BASE. */
5628 if (GET_CODE (constant) == CONST
5629 && GET_CODE (XEXP (constant, 0)) == UNSPEC
5630 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
5634 pending_ltrel = pool_ref;
5639 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
5642 s390_add_pool_insn (curr_pool, insn);
5643 /* An LTREL_BASE must follow within the same basic block. */
5649 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
5650 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
5653 if (TARGET_CPU_ZARCH)
5655 if (curr_pool->size < S390_POOL_CHUNK_MAX)
5658 s390_end_pool (curr_pool, NULL_RTX);
5663 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
5664 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
5667 /* We will later have to insert base register reload insns.
5668 Those will have an effect on code size, which we need to
5669 consider here. This calculation makes rather pessimistic
5670 worst-case assumptions. */
5671 if (GET_CODE (insn) == CODE_LABEL)
5674 if (chunk_size < S390_POOL_CHUNK_MIN
5675 && curr_pool->size < S390_POOL_CHUNK_MIN)
5678 /* Pool chunks can only be inserted after BARRIERs ... */
5679 if (GET_CODE (insn) == BARRIER)
5681 s390_end_pool (curr_pool, insn);
5686 /* ... so if we don't find one in time, create one. */
5687 else if ((chunk_size > S390_POOL_CHUNK_MAX
5688 || curr_pool->size > S390_POOL_CHUNK_MAX))
5690 rtx label, jump, barrier;
5692 /* We can insert the barrier only after a 'real' insn. */
5693 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
5695 if (get_attr_length (insn) == 0)
5698 /* Don't separate LTREL_BASE from the corresponding
5699 LTREL_OFFSET load. */
5703 label = gen_label_rtx ();
5704 jump = emit_jump_insn_after (gen_jump (label), insn);
5705 barrier = emit_barrier_after (jump);
5706 insn = emit_label_after (label, barrier);
5707 JUMP_LABEL (jump) = label;
5708 LABEL_NUSES (label) = 1;
5710 INSN_ADDRESSES_NEW (jump, -1);
5711 INSN_ADDRESSES_NEW (barrier, -1);
5712 INSN_ADDRESSES_NEW (insn, -1);
5714 s390_end_pool (curr_pool, barrier);
5722 s390_end_pool (curr_pool, NULL_RTX);
5727 /* Find all labels that are branched into
5728 from an insn belonging to a different chunk. */
5730 far_labels = BITMAP_XMALLOC ();
5732 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5734 /* Labels marked with LABEL_PRESERVE_P can be target
5735 of non-local jumps, so we have to mark them.
5736 The same holds for named labels.
5738 Don't do that, however, if it is the label before
5741 if (GET_CODE (insn) == CODE_LABEL
5742 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
5744 rtx vec_insn = next_real_insn (insn);
5745 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5746 PATTERN (vec_insn) : NULL_RTX;
5748 || !(GET_CODE (vec_pat) == ADDR_VEC
5749 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5750 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
5753 /* If we have a direct jump (conditional or unconditional)
5754 or a casesi jump, check all potential targets. */
5755 else if (GET_CODE (insn) == JUMP_INSN)
5757 rtx pat = PATTERN (insn);
5758 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
5759 pat = XVECEXP (pat, 0, 0);
5761 if (GET_CODE (pat) == SET)
5763 rtx label = JUMP_LABEL (insn);
5766 if (s390_find_pool (pool_list, label)
5767 != s390_find_pool (pool_list, insn))
5768 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5771 else if (GET_CODE (pat) == PARALLEL
5772 && XVECLEN (pat, 0) == 2
5773 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
5774 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
5775 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
5777 /* Find the jump table used by this casesi jump. */
5778 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
5779 rtx vec_insn = next_real_insn (vec_label);
5780 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5781 PATTERN (vec_insn) : NULL_RTX;
5783 && (GET_CODE (vec_pat) == ADDR_VEC
5784 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5786 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
5788 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
5790 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
5792 if (s390_find_pool (pool_list, label)
5793 != s390_find_pool (pool_list, insn))
5794 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5801 /* Insert base register reload insns before every pool. */
5803 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5805 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5807 rtx insn = curr_pool->first_insn;
5808 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
5811 /* Insert base register reload insns at every far label. */
5813 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5814 if (GET_CODE (insn) == CODE_LABEL
5815 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
5817 struct constant_pool *pool = s390_find_pool (pool_list, insn);
5820 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5822 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
5827 BITMAP_XFREE (far_labels);
5830 /* Recompute insn addresses. */
5832 init_insn_lengths ();
5833 shorten_branches (get_insns ());
5838 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5839 After we have decided to use this list, finish implementing
5840 all changes to the current function as required. */
5843 s390_chunkify_finish (struct constant_pool *pool_list)
5845 struct constant_pool *curr_pool = NULL;
5849 /* Replace all literal pool references. */
5851 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5854 replace_ltrel_base (&PATTERN (insn));
5856 curr_pool = s390_find_pool (pool_list, insn);
5860 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5862 rtx addr, pool_ref = NULL_RTX;
5863 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5866 if (s390_execute_label (insn))
5867 addr = s390_find_execute (curr_pool, insn);
5869 addr = s390_find_constant (curr_pool,
5870 get_pool_constant (pool_ref),
5871 get_pool_mode (pool_ref));
5873 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5874 INSN_CODE (insn) = -1;
5879 /* Dump out all literal pools. */
5881 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5882 s390_dump_pool (curr_pool, 0);
5884 /* Free pool list. */
5888 struct constant_pool *next = pool_list->next;
5889 s390_free_pool (pool_list);
5894 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5895 We have decided we cannot use this list, so revert all changes
5896 to the current function that were done by s390_chunkify_start. */
5899 s390_chunkify_cancel (struct constant_pool *pool_list)
5901 struct constant_pool *curr_pool = NULL;
5904 /* Remove all pool placeholder insns. */
5906 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5908 /* Did we insert an extra barrier? Remove it. */
5909 rtx barrier = PREV_INSN (curr_pool->pool_insn);
5910 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
5911 rtx label = NEXT_INSN (curr_pool->pool_insn);
5913 if (jump && GET_CODE (jump) == JUMP_INSN
5914 && barrier && GET_CODE (barrier) == BARRIER
5915 && label && GET_CODE (label) == CODE_LABEL
5916 && GET_CODE (PATTERN (jump)) == SET
5917 && SET_DEST (PATTERN (jump)) == pc_rtx
5918 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
5919 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
5922 remove_insn (barrier);
5923 remove_insn (label);
5926 remove_insn (curr_pool->pool_insn);
5929 /* Remove all base register reload insns. */
5931 for (insn = get_insns (); insn; )
5933 rtx next_insn = NEXT_INSN (insn);
5935 if (GET_CODE (insn) == INSN
5936 && GET_CODE (PATTERN (insn)) == SET
5937 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
5938 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
5944 /* Free pool list. */
5948 struct constant_pool *next = pool_list->next;
5949 s390_free_pool (pool_list);
5955 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
5958 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
5962 switch (GET_MODE_CLASS (mode))
5965 if (GET_CODE (exp) != CONST_DOUBLE)
5968 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
5969 assemble_real (r, mode, align);
5973 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5982 /* Rework the prologue/epilogue to avoid saving/restoring
5983 registers unnecessarily. */
5986 s390_optimize_prologue (void)
5988 rtx insn, new_insn, next_insn;
5990 /* Do a final recompute of the frame-related data. */
5992 s390_update_frame_layout ();
5994 /* If all special registers are in fact used, there's nothing we
5995 can do, so no point in walking the insn list. */
5997 if (cfun_frame_layout.first_save_gpr <= BASE_REGNUM
5998 && cfun_frame_layout.last_save_gpr >= BASE_REGNUM
5999 && (TARGET_CPU_ZARCH
6000 || (cfun_frame_layout.first_save_gpr <= RETURN_REGNUM
6001 && cfun_frame_layout.last_save_gpr >= RETURN_REGNUM)))
6004 /* Search for prologue/epilogue insns and replace them. */
6006 for (insn = get_insns (); insn; insn = next_insn)
6008 int first, last, off;
6009 rtx set, base, offset;
6011 next_insn = NEXT_INSN (insn);
6013 if (GET_CODE (insn) != INSN)
6016 if (GET_CODE (PATTERN (insn)) == PARALLEL
6017 && store_multiple_operation (PATTERN (insn), VOIDmode))
6019 set = XVECEXP (PATTERN (insn), 0, 0);
6020 first = REGNO (SET_SRC (set));
6021 last = first + XVECLEN (PATTERN (insn), 0) - 1;
6022 offset = const0_rtx;
6023 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
6024 off = INTVAL (offset);
6026 if (GET_CODE (base) != REG || off < 0)
6028 if (REGNO (base) != STACK_POINTER_REGNUM
6029 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
6031 if (first > BASE_REGNUM || last < BASE_REGNUM)
6034 if (cfun_frame_layout.first_save_gpr != -1)
6036 new_insn = save_gprs (base,
6037 off + (cfun_frame_layout.first_save_gpr
6038 - first) * UNITS_PER_WORD,
6039 cfun_frame_layout.first_save_gpr,
6040 cfun_frame_layout.last_save_gpr);
6041 new_insn = emit_insn_before (new_insn, insn);
6042 INSN_ADDRESSES_NEW (new_insn, -1);
6049 if (GET_CODE (PATTERN (insn)) == SET
6050 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
6051 && (REGNO (SET_SRC (PATTERN (insn))) == BASE_REGNUM
6052 || (!TARGET_CPU_ZARCH
6053 && REGNO (SET_SRC (PATTERN (insn))) == RETURN_REGNUM))
6054 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
6056 set = PATTERN (insn);
6057 first = REGNO (SET_SRC (set));
6058 offset = const0_rtx;
6059 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
6060 off = INTVAL (offset);
6062 if (GET_CODE (base) != REG || off < 0)
6064 if (REGNO (base) != STACK_POINTER_REGNUM
6065 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
6067 if (cfun_frame_layout.first_save_gpr != -1)
6069 new_insn = save_gprs (base,
6070 off + (cfun_frame_layout.first_save_gpr
6071 - first) * UNITS_PER_WORD,
6072 cfun_frame_layout.first_save_gpr,
6073 cfun_frame_layout.last_save_gpr);
6074 new_insn = emit_insn_before (new_insn, insn);
6075 INSN_ADDRESSES_NEW (new_insn, -1);
6082 if (GET_CODE (PATTERN (insn)) == PARALLEL
6083 && load_multiple_operation (PATTERN (insn), VOIDmode))
6085 set = XVECEXP (PATTERN (insn), 0, 0);
6086 first = REGNO (SET_DEST (set));
6087 last = first + XVECLEN (PATTERN (insn), 0) - 1;
6088 offset = const0_rtx;
6089 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
6090 off = INTVAL (offset);
6092 if (GET_CODE (base) != REG || off < 0)
6094 if (REGNO (base) != STACK_POINTER_REGNUM
6095 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
6097 if (first > BASE_REGNUM || last < BASE_REGNUM)
6100 if (cfun_frame_layout.first_restore_gpr != -1)
6102 new_insn = restore_gprs (base,
6103 off + (cfun_frame_layout.first_restore_gpr
6104 - first) * UNITS_PER_WORD,
6105 cfun_frame_layout.first_restore_gpr,
6106 cfun_frame_layout.last_restore_gpr);
6107 new_insn = emit_insn_before (new_insn, insn);
6108 INSN_ADDRESSES_NEW (new_insn, -1);
6115 if (GET_CODE (PATTERN (insn)) == SET
6116 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
6117 && (REGNO (SET_DEST (PATTERN (insn))) == BASE_REGNUM
6118 || (!TARGET_CPU_ZARCH
6119 && REGNO (SET_DEST (PATTERN (insn))) == RETURN_REGNUM))
6120 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
6122 set = PATTERN (insn);
6123 first = REGNO (SET_DEST (set));
6124 offset = const0_rtx;
6125 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
6126 off = INTVAL (offset);
6128 if (GET_CODE (base) != REG || off < 0)
6130 if (REGNO (base) != STACK_POINTER_REGNUM
6131 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
6133 if (cfun_frame_layout.first_restore_gpr != -1)
6135 new_insn = restore_gprs (base,
6136 off + (cfun_frame_layout.first_restore_gpr
6137 - first) * UNITS_PER_WORD,
6138 cfun_frame_layout.first_restore_gpr,
6139 cfun_frame_layout.last_restore_gpr);
6140 new_insn = emit_insn_before (new_insn, insn);
6141 INSN_ADDRESSES_NEW (new_insn, -1);
6150 /* Perform machine-dependent processing. */
6155 bool pool_overflow = false;
6157 /* Make sure all splits have been performed; splits after
6158 machine_dependent_reorg might confuse insn length counts. */
6159 split_all_insns_noflow ();
6162 /* Install the main literal pool and the associated base
6163 register load insns.
6165 In addition, there are two problematic situations we need
6168 - the literal pool might be > 4096 bytes in size, so that
6169 some of its elements cannot be directly accessed
6171 - a branch target might be > 64K away from the branch, so that
6172 it is not possible to use a PC-relative instruction.
6174 To fix those, we split the single literal pool into multiple
6175 pool chunks, reloading the pool base register at various
6176 points throughout the function to ensure it always points to
6177 the pool chunk the following code expects, and / or replace
6178 PC-relative branches by absolute branches.
6180 However, the two problems are interdependent: splitting the
6181 literal pool can move a branch further away from its target,
6182 causing the 64K limit to overflow, and on the other hand,
6183 replacing a PC-relative branch by an absolute branch means
6184 we need to put the branch target address into the literal
6185 pool, possibly causing it to overflow.
6187 So, we loop trying to fix up both problems until we manage
6188 to satisfy both conditions at the same time. Note that the
6189 loop is guaranteed to terminate as every pass of the loop
6190 strictly decreases the total number of PC-relative branches
6191 in the function. (This is not completely true as there
6192 might be branch-over-pool insns introduced by chunkify_start.
6193 Those never need to be split however.) */
6197 struct constant_pool *pool = NULL;
6199 /* Collect the literal pool. */
6202 pool = s390_mainpool_start ();
6204 pool_overflow = true;
6207 /* If literal pool overflowed, start to chunkify it. */
6209 pool = s390_chunkify_start ();
6211 /* Split out-of-range branches. If this has created new
6212 literal pool entries, cancel current chunk list and
6213 recompute it. zSeries machines have large branch
6214 instructions, so we never need to split a branch. */
6215 if (!TARGET_CPU_ZARCH && s390_split_branches ())
6218 s390_chunkify_cancel (pool);
6220 s390_mainpool_cancel (pool);
6225 /* If we made it up to here, both conditions are satisfied.
6226 Finish up literal pool related changes. */
6228 s390_chunkify_finish (pool);
6230 s390_mainpool_finish (pool);
6232 /* We're done splitting branches. */
6233 cfun->machine->split_branches_pending_p = false;
6237 s390_optimize_prologue ();
6241 /* Return an RTL expression representing the value of the return address
6242 for the frame COUNT steps up from the current frame. FRAME is the
6243 frame pointer of that frame. */
6246 s390_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
6251 /* Without backchain, we fail for all but the current frame. */
6253 if (!TARGET_BACKCHAIN && count > 0)
6256 /* For the current frame, we need to make sure the initial
6257 value of RETURN_REGNUM is actually saved. */
6261 cfun_frame_layout.save_return_addr_p = true;
6262 return gen_rtx_MEM (Pmode, return_address_pointer_rtx);
6265 if (TARGET_PACKED_STACK)
6266 offset = -2 * UNITS_PER_WORD;
6268 offset = RETURN_REGNUM * UNITS_PER_WORD;
6270 addr = plus_constant (frame, offset);
6271 addr = memory_address (Pmode, addr);
6272 return gen_rtx_MEM (Pmode, addr);
6275 /* Return an RTL expression representing the back chain stored in
6276 the current stack frame. */
6279 s390_back_chain_rtx (void)
6283 gcc_assert (TARGET_BACKCHAIN);
6285 if (TARGET_PACKED_STACK)
6286 chain = plus_constant (stack_pointer_rtx,
6287 STACK_POINTER_OFFSET - UNITS_PER_WORD);
6289 chain = stack_pointer_rtx;
6291 chain = gen_rtx_MEM (Pmode, chain);
6295 /* Find first call clobbered register unused in a function.
6296 This could be used as base register in a leaf function
6297 or for holding the return address before epilogue. */
6300 find_unused_clobbered_reg (void)
6303 for (i = 0; i < 6; i++)
6304 if (!regs_ever_live[i])
6309 /* Determine the frame area which actually has to be accessed
6310 in the function epilogue. The values are stored at the
6311 given pointers AREA_BOTTOM (address of the lowest used stack
6312 address) and AREA_TOP (address of the first item which does
6313 not belong to the stack frame). */
6316 s390_frame_area (int *area_bottom, int *area_top)
6324 if (cfun_frame_layout.first_restore_gpr != -1)
6326 b = (cfun_frame_layout.gprs_offset
6327 + cfun_frame_layout.first_restore_gpr * UNITS_PER_WORD);
6328 t = b + (cfun_frame_layout.last_restore_gpr
6329 - cfun_frame_layout.first_restore_gpr + 1) * UNITS_PER_WORD;
6332 if (TARGET_64BIT && cfun_save_high_fprs_p)
6334 b = MIN (b, cfun_frame_layout.f8_offset);
6335 t = MAX (t, (cfun_frame_layout.f8_offset
6336 + cfun_frame_layout.high_fprs * 8));
6340 for (i = 2; i < 4; i++)
6341 if (cfun_fpr_bit_p (i))
6343 b = MIN (b, cfun_frame_layout.f4_offset + (i - 2) * 8);
6344 t = MAX (t, cfun_frame_layout.f4_offset + (i - 1) * 8);
6351 /* Fill cfun->machine with info about register usage of current function.
6352 Return in LIVE_REGS which GPRs are currently considered live. */
6355 s390_register_info (int live_regs[])
6359 /* fprs 8 - 15 are call saved for 64 Bit ABI. */
6360 cfun_frame_layout.fpr_bitmap = 0;
6361 cfun_frame_layout.high_fprs = 0;
6363 for (i = 24; i < 32; i++)
6364 if (regs_ever_live[i] && !global_regs[i])
6366 cfun_set_fpr_bit (i - 16);
6367 cfun_frame_layout.high_fprs++;
6370 /* Find first and last gpr to be saved. We trust regs_ever_live
6371 data, except that we don't save and restore global registers.
6373 Also, all registers with special meaning to the compiler need
6374 to be handled extra. */
6376 for (i = 0; i < 16; i++)
6377 live_regs[i] = regs_ever_live[i] && !global_regs[i];
6380 live_regs[PIC_OFFSET_TABLE_REGNUM]
6381 = regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
6383 live_regs[BASE_REGNUM]
6384 = cfun->machine->base_reg
6385 && REGNO (cfun->machine->base_reg) == BASE_REGNUM;
6387 live_regs[RETURN_REGNUM]
6388 = cfun->machine->split_branches_pending_p
6389 || cfun_frame_layout.save_return_addr_p;
6391 live_regs[STACK_POINTER_REGNUM]
6392 = !current_function_is_leaf
6393 || TARGET_TPF_PROFILING
6394 || cfun_save_high_fprs_p
6395 || get_frame_size () > 0
6396 || current_function_calls_alloca
6397 || current_function_stdarg;
6399 for (i = 6; i < 16; i++)
6402 for (j = 15; j > i; j--)
6408 /* Nothing to save/restore. */
6409 cfun_frame_layout.first_save_gpr = -1;
6410 cfun_frame_layout.first_restore_gpr = -1;
6411 cfun_frame_layout.last_save_gpr = -1;
6412 cfun_frame_layout.last_restore_gpr = -1;
6416 /* Save / Restore from gpr i to j. */
6417 cfun_frame_layout.first_save_gpr = i;
6418 cfun_frame_layout.first_restore_gpr = i;
6419 cfun_frame_layout.last_save_gpr = j;
6420 cfun_frame_layout.last_restore_gpr = j;
6423 if (current_function_stdarg)
6425 /* Varargs functions need to save gprs 2 to 6. */
6426 if (cfun_frame_layout.first_save_gpr == -1
6427 || cfun_frame_layout.first_save_gpr > 2)
6428 cfun_frame_layout.first_save_gpr = 2;
6430 if (cfun_frame_layout.last_save_gpr == -1
6431 || cfun_frame_layout.last_save_gpr < 6)
6432 cfun_frame_layout.last_save_gpr = 6;
6434 /* Mark f0, f2 for 31 bit and f0-f4 for 64 bit to be saved. */
6435 if (TARGET_HARD_FLOAT)
6436 for (i = 0; i < (TARGET_64BIT ? 4 : 2); i++)
6437 cfun_set_fpr_bit (i);
6441 for (i = 2; i < 4; i++)
6442 if (regs_ever_live[i + 16] && !global_regs[i + 16])
6443 cfun_set_fpr_bit (i);
6446 /* Fill cfun->machine with info about frame of current function. */
6449 s390_frame_info (void)
6453 cfun_frame_layout.frame_size = get_frame_size ();
6454 if (!TARGET_64BIT && cfun_frame_layout.frame_size > 0x7fff0000)
6455 fatal_error ("Total size of local variables exceeds architecture limit.");
6457 cfun_frame_layout.save_backchain_p = TARGET_BACKCHAIN;
6459 if (!TARGET_PACKED_STACK)
6461 cfun_frame_layout.backchain_offset = 0;
6462 cfun_frame_layout.f0_offset = 16 * UNITS_PER_WORD;
6463 cfun_frame_layout.f4_offset = cfun_frame_layout.f0_offset + 2 * 8;
6464 cfun_frame_layout.f8_offset = -cfun_frame_layout.high_fprs * 8;
6465 cfun_frame_layout.gprs_offset = (cfun_frame_layout.first_save_gpr
6468 else if (TARGET_BACKCHAIN) /* kernel stack layout */
6470 cfun_frame_layout.backchain_offset = (STACK_POINTER_OFFSET
6472 cfun_frame_layout.gprs_offset
6473 = (cfun_frame_layout.backchain_offset
6474 - (STACK_POINTER_REGNUM - cfun_frame_layout.first_save_gpr + 1)
6479 cfun_frame_layout.f4_offset
6480 = (cfun_frame_layout.gprs_offset
6481 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
6483 cfun_frame_layout.f0_offset
6484 = (cfun_frame_layout.f4_offset
6485 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
6489 /* On 31 bit we have to care about alignment of the
6490 floating point regs to provide fastest access. */
6491 cfun_frame_layout.f0_offset
6492 = ((cfun_frame_layout.gprs_offset
6493 & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1))
6494 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
6496 cfun_frame_layout.f4_offset
6497 = (cfun_frame_layout.f0_offset
6498 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
6501 else /* no backchain */
6503 cfun_frame_layout.f4_offset
6504 = (STACK_POINTER_OFFSET
6505 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
6507 cfun_frame_layout.f0_offset
6508 = (cfun_frame_layout.f4_offset
6509 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
6511 cfun_frame_layout.gprs_offset
6512 = cfun_frame_layout.f0_offset - cfun_gprs_save_area_size;
6515 if (current_function_is_leaf
6516 && !TARGET_TPF_PROFILING
6517 && cfun_frame_layout.frame_size == 0
6518 && !cfun_save_high_fprs_p
6519 && !current_function_calls_alloca
6520 && !current_function_stdarg)
6523 if (!TARGET_PACKED_STACK)
6524 cfun_frame_layout.frame_size += (STARTING_FRAME_OFFSET
6525 + cfun_frame_layout.high_fprs * 8);
6528 cfun_frame_layout.frame_size += (cfun_frame_layout.save_backchain_p
6531 /* No alignment trouble here because f8-f15 are only saved under
6533 cfun_frame_layout.f8_offset = (MIN (MIN (cfun_frame_layout.f0_offset,
6534 cfun_frame_layout.f4_offset),
6535 cfun_frame_layout.gprs_offset)
6536 - cfun_frame_layout.high_fprs * 8);
6538 cfun_frame_layout.frame_size += cfun_frame_layout.high_fprs * 8;
6540 for (i = 0; i < 8; i++)
6541 if (cfun_fpr_bit_p (i))
6542 cfun_frame_layout.frame_size += 8;
6544 cfun_frame_layout.frame_size += cfun_gprs_save_area_size;
6546 /* If under 31 bit an odd number of gprs has to be saved we have to adjust
6547 the frame size to sustain 8 byte alignment of stack frames. */
6548 cfun_frame_layout.frame_size = ((cfun_frame_layout.frame_size +
6549 STACK_BOUNDARY / BITS_PER_UNIT - 1)
6550 & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1));
6552 cfun_frame_layout.frame_size += current_function_outgoing_args_size;
6556 /* Generate frame layout. Fills in register and frame data for the current
6557 function in cfun->machine. This routine can be called multiple times;
6558 it will re-do the complete frame layout every time. */
6561 s390_init_frame_layout (void)
6563 HOST_WIDE_INT frame_size;
6567 /* If return address register is explicitly used, we need to save it. */
6568 if (regs_ever_live[RETURN_REGNUM]
6569 || !current_function_is_leaf
6570 || TARGET_TPF_PROFILING
6571 || current_function_stdarg
6572 || current_function_calls_eh_return)
6573 cfun_frame_layout.save_return_addr_p = true;
6575 /* On S/390 machines, we may need to perform branch splitting, which
6576 will require both base and return address register. We have no
6577 choice but to assume we're going to need them until right at the
6578 end of the machine dependent reorg phase. */
6579 if (!TARGET_CPU_ZARCH)
6580 cfun->machine->split_branches_pending_p = true;
6584 frame_size = cfun_frame_layout.frame_size;
6586 /* Try to predict whether we'll need the base register. */
6587 base_used = cfun->machine->split_branches_pending_p
6588 || current_function_uses_const_pool
6589 || (!DISP_IN_RANGE (-frame_size)
6590 && !CONST_OK_FOR_CONSTRAINT_P (-frame_size, 'K', "K"));
6592 /* Decide which register to use as literal pool base. In small
6593 leaf functions, try to use an unused call-clobbered register
6594 as base register to avoid save/restore overhead. */
6596 cfun->machine->base_reg = NULL_RTX;
6597 else if (current_function_is_leaf && !regs_ever_live[5])
6598 cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
6600 cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
6602 s390_register_info (live_regs);
6605 while (frame_size != cfun_frame_layout.frame_size);
6608 /* Update frame layout. Recompute actual register save data based on
6609 current info and update regs_ever_live for the special registers.
6610 May be called multiple times, but may never cause *more* registers
6611 to be saved than s390_init_frame_layout allocated room for. */
6614 s390_update_frame_layout (void)
6618 s390_register_info (live_regs);
6620 regs_ever_live[BASE_REGNUM] = live_regs[BASE_REGNUM];
6621 regs_ever_live[RETURN_REGNUM] = live_regs[RETURN_REGNUM];
6622 regs_ever_live[STACK_POINTER_REGNUM] = live_regs[STACK_POINTER_REGNUM];
6624 if (cfun->machine->base_reg)
6625 regs_ever_live[REGNO (cfun->machine->base_reg)] = 1;
6628 /* Return true if register FROM can be eliminated via register TO. */
6631 s390_can_eliminate (int from, int to)
6633 gcc_assert (to == STACK_POINTER_REGNUM
6634 || to == HARD_FRAME_POINTER_REGNUM);
6636 gcc_assert (from == FRAME_POINTER_REGNUM
6637 || from == ARG_POINTER_REGNUM
6638 || from == RETURN_ADDRESS_POINTER_REGNUM);
6640 /* Make sure we actually saved the return address. */
6641 if (from == RETURN_ADDRESS_POINTER_REGNUM)
6642 if (!current_function_calls_eh_return
6643 && !current_function_stdarg
6644 && !cfun_frame_layout.save_return_addr_p)
6650 /* Return offset between register FROM and TO initially after prolog. */
6653 s390_initial_elimination_offset (int from, int to)
6655 HOST_WIDE_INT offset;
6658 /* ??? Why are we called for non-eliminable pairs? */
6659 if (!s390_can_eliminate (from, to))
6664 case FRAME_POINTER_REGNUM:
6668 case ARG_POINTER_REGNUM:
6669 s390_init_frame_layout ();
6670 offset = cfun_frame_layout.frame_size + STACK_POINTER_OFFSET;
6673 case RETURN_ADDRESS_POINTER_REGNUM:
6674 s390_init_frame_layout ();
6675 index = RETURN_REGNUM - cfun_frame_layout.first_save_gpr;
6676 gcc_assert (index >= 0);
6677 offset = cfun_frame_layout.frame_size + cfun_frame_layout.gprs_offset;
6678 offset += index * UNITS_PER_WORD;
6688 /* Emit insn to save fpr REGNUM at offset OFFSET relative
6689 to register BASE. Return generated insn. */
6692 save_fpr (rtx base, int offset, int regnum)
6695 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6696 set_mem_alias_set (addr, s390_sr_alias_set);
6698 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
6701 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
6702 to register BASE. Return generated insn. */
6705 restore_fpr (rtx base, int offset, int regnum)
6708 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6709 set_mem_alias_set (addr, s390_sr_alias_set);
6711 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
6714 /* Generate insn to save registers FIRST to LAST into
6715 the register save area located at offset OFFSET
6716 relative to register BASE. */
6719 save_gprs (rtx base, int offset, int first, int last)
6721 rtx addr, insn, note;
6724 addr = plus_constant (base, offset);
6725 addr = gen_rtx_MEM (Pmode, addr);
6726 set_mem_alias_set (addr, s390_sr_alias_set);
6728 /* Special-case single register. */
6732 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
6734 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
6736 RTX_FRAME_RELATED_P (insn) = 1;
6741 insn = gen_store_multiple (addr,
6742 gen_rtx_REG (Pmode, first),
6743 GEN_INT (last - first + 1));
6746 /* We need to set the FRAME_RELATED flag on all SETs
6747 inside the store-multiple pattern.
6749 However, we must not emit DWARF records for registers 2..5
6750 if they are stored for use by variable arguments ...
6752 ??? Unfortunately, it is not enough to simply not the the
6753 FRAME_RELATED flags for those SETs, because the first SET
6754 of the PARALLEL is always treated as if it had the flag
6755 set, even if it does not. Therefore we emit a new pattern
6756 without those registers as REG_FRAME_RELATED_EXPR note. */
6760 rtx pat = PATTERN (insn);
6762 for (i = 0; i < XVECLEN (pat, 0); i++)
6763 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
6764 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
6766 RTX_FRAME_RELATED_P (insn) = 1;
6770 addr = plus_constant (base, offset + (6 - first) * UNITS_PER_WORD);
6771 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
6772 gen_rtx_REG (Pmode, 6),
6773 GEN_INT (last - 6 + 1));
6774 note = PATTERN (note);
6777 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6778 note, REG_NOTES (insn));
6780 for (i = 0; i < XVECLEN (note, 0); i++)
6781 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
6782 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
6784 RTX_FRAME_RELATED_P (insn) = 1;
6790 /* Generate insn to restore registers FIRST to LAST from
6791 the register save area located at offset OFFSET
6792 relative to register BASE. */
6795 restore_gprs (rtx base, int offset, int first, int last)
6799 addr = plus_constant (base, offset);
6800 addr = gen_rtx_MEM (Pmode, addr);
6801 set_mem_alias_set (addr, s390_sr_alias_set);
6803 /* Special-case single register. */
6807 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
6809 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
6814 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
6816 GEN_INT (last - first + 1));
6820 /* Return insn sequence to load the GOT register. */
6822 static GTY(()) rtx got_symbol;
6824 s390_load_got (void)
6830 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
6831 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
6836 if (TARGET_CPU_ZARCH)
6838 emit_move_insn (pic_offset_table_rtx, got_symbol);
6844 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
6845 UNSPEC_LTREL_OFFSET);
6846 offset = gen_rtx_CONST (Pmode, offset);
6847 offset = force_const_mem (Pmode, offset);
6849 emit_move_insn (pic_offset_table_rtx, offset);
6851 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
6853 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
6855 emit_move_insn (pic_offset_table_rtx, offset);
6858 insns = get_insns ();
6863 /* Expand the prologue into a bunch of separate insns. */
6866 s390_emit_prologue (void)
6874 /* Complete frame layout. */
6876 s390_update_frame_layout ();
6878 /* Annotate all constant pool references to let the scheduler know
6879 they implicitly use the base register. */
6881 push_topmost_sequence ();
6883 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
6885 annotate_constant_pool_refs (&PATTERN (insn));
6887 pop_topmost_sequence ();
6889 /* Choose best register to use for temp use within prologue.
6890 See below for why TPF must use the register 1. */
6892 if (!current_function_is_leaf && !TARGET_TPF_PROFILING)
6893 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6895 temp_reg = gen_rtx_REG (Pmode, 1);
6897 /* Save call saved gprs. */
6898 if (cfun_frame_layout.first_save_gpr != -1)
6900 insn = save_gprs (stack_pointer_rtx,
6901 cfun_frame_layout.gprs_offset,
6902 cfun_frame_layout.first_save_gpr,
6903 cfun_frame_layout.last_save_gpr);
6907 /* Dummy insn to mark literal pool slot. */
6909 if (cfun->machine->base_reg)
6910 emit_insn (gen_main_pool (cfun->machine->base_reg));
6912 offset = cfun_frame_layout.f0_offset;
6914 /* Save f0 and f2. */
6915 for (i = 0; i < 2; i++)
6917 if (cfun_fpr_bit_p (i))
6919 save_fpr (stack_pointer_rtx, offset, i + 16);
6922 else if (!TARGET_PACKED_STACK)
6926 /* Save f4 and f6. */
6927 offset = cfun_frame_layout.f4_offset;
6928 for (i = 2; i < 4; i++)
6930 if (cfun_fpr_bit_p (i))
6932 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6935 /* If f4 and f6 are call clobbered they are saved due to stdargs and
6936 therefore are not frame related. */
6937 if (!call_really_used_regs[i + 16])
6938 RTX_FRAME_RELATED_P (insn) = 1;
6940 else if (!TARGET_PACKED_STACK)
6944 if (TARGET_PACKED_STACK
6945 && cfun_save_high_fprs_p
6946 && cfun_frame_layout.f8_offset + cfun_frame_layout.high_fprs * 8 > 0)
6948 offset = (cfun_frame_layout.f8_offset
6949 + (cfun_frame_layout.high_fprs - 1) * 8);
6951 for (i = 15; i > 7 && offset >= 0; i--)
6952 if (cfun_fpr_bit_p (i))
6954 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6956 RTX_FRAME_RELATED_P (insn) = 1;
6959 if (offset >= cfun_frame_layout.f8_offset)
6963 if (!TARGET_PACKED_STACK)
6964 next_fpr = cfun_save_high_fprs_p ? 31 : 0;
6966 /* Decrement stack pointer. */
6968 if (cfun_frame_layout.frame_size > 0)
6970 rtx frame_off = GEN_INT (-cfun_frame_layout.frame_size);
6972 if (s390_stack_size)
6974 HOST_WIDE_INT stack_check_mask = ((s390_stack_size - 1)
6975 & ~(s390_stack_guard - 1));
6976 rtx t = gen_rtx_AND (Pmode, stack_pointer_rtx,
6977 GEN_INT (stack_check_mask));
6980 gen_cmpdi (t, const0_rtx);
6982 gen_cmpsi (t, const0_rtx);
6984 emit_insn (gen_conditional_trap (gen_rtx_EQ (CCmode,
6985 gen_rtx_REG (CCmode,
6991 if (s390_warn_framesize > 0
6992 && cfun_frame_layout.frame_size >= s390_warn_framesize)
6993 warning ("frame size of %qs is " HOST_WIDE_INT_PRINT_DEC " bytes",
6994 current_function_name (), cfun_frame_layout.frame_size);
6996 if (s390_warn_dynamicstack_p && cfun->calls_alloca)
6997 warning ("%qs uses dynamic stack allocation", current_function_name ());
6999 /* Save incoming stack pointer into temp reg. */
7000 if (cfun_frame_layout.save_backchain_p || next_fpr)
7001 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
7003 /* Subtract frame size from stack pointer. */
7005 if (DISP_IN_RANGE (INTVAL (frame_off)))
7007 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
7008 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
7010 insn = emit_insn (insn);
7014 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
7015 frame_off = force_const_mem (Pmode, frame_off);
7017 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
7018 annotate_constant_pool_refs (&PATTERN (insn));
7021 RTX_FRAME_RELATED_P (insn) = 1;
7023 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
7024 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
7025 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
7026 GEN_INT (-cfun_frame_layout.frame_size))),
7029 /* Set backchain. */
7031 if (cfun_frame_layout.save_backchain_p)
7033 if (cfun_frame_layout.backchain_offset)
7034 addr = gen_rtx_MEM (Pmode,
7035 plus_constant (stack_pointer_rtx,
7036 cfun_frame_layout.backchain_offset));
7038 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
7039 set_mem_alias_set (addr, s390_sr_alias_set);
7040 insn = emit_insn (gen_move_insn (addr, temp_reg));
7043 /* If we support asynchronous exceptions (e.g. for Java),
7044 we need to make sure the backchain pointer is set up
7045 before any possibly trapping memory access. */
7047 if (cfun_frame_layout.save_backchain_p && flag_non_call_exceptions)
7049 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
7050 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
7054 /* Save fprs 8 - 15 (64 bit ABI). */
7056 if (cfun_save_high_fprs_p && next_fpr)
7058 insn = emit_insn (gen_add2_insn (temp_reg,
7059 GEN_INT (cfun_frame_layout.f8_offset)));
7063 for (i = 24; i <= next_fpr; i++)
7064 if (cfun_fpr_bit_p (i - 16))
7066 rtx addr = plus_constant (stack_pointer_rtx,
7067 cfun_frame_layout.frame_size
7068 + cfun_frame_layout.f8_offset
7071 insn = save_fpr (temp_reg, offset, i);
7073 RTX_FRAME_RELATED_P (insn) = 1;
7075 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
7076 gen_rtx_SET (VOIDmode,
7077 gen_rtx_MEM (DFmode, addr),
7078 gen_rtx_REG (DFmode, i)),
7083 /* Set frame pointer, if needed. */
7085 if (frame_pointer_needed)
7087 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
7088 RTX_FRAME_RELATED_P (insn) = 1;
7091 /* Set up got pointer, if needed. */
7093 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
7095 rtx insns = s390_load_got ();
7097 for (insn = insns; insn; insn = NEXT_INSN (insn))
7099 annotate_constant_pool_refs (&PATTERN (insn));
7101 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
7108 if (TARGET_TPF_PROFILING)
7110 /* Generate a BAS instruction to serve as a function
7111 entry intercept to facilitate the use of tracing
7112 algorithms located at the branch target. */
7113 emit_insn (gen_prologue_tpf ());
7115 /* Emit a blockage here so that all code
7116 lies between the profiling mechanisms. */
7117 emit_insn (gen_blockage ());
7121 /* Expand the epilogue into a bunch of separate insns. */
7124 s390_emit_epilogue (bool sibcall)
7126 rtx frame_pointer, return_reg;
7127 int area_bottom, area_top, offset = 0;
7132 if (TARGET_TPF_PROFILING)
7135 /* Generate a BAS instruction to serve as a function
7136 entry intercept to facilitate the use of tracing
7137 algorithms located at the branch target. */
7139 /* Emit a blockage here so that all code
7140 lies between the profiling mechanisms. */
7141 emit_insn (gen_blockage ());
7143 emit_insn (gen_epilogue_tpf ());
7146 /* Check whether to use frame or stack pointer for restore. */
7148 frame_pointer = (frame_pointer_needed
7149 ? hard_frame_pointer_rtx : stack_pointer_rtx);
7151 s390_frame_area (&area_bottom, &area_top);
7153 /* Check whether we can access the register save area.
7154 If not, increment the frame pointer as required. */
7156 if (area_top <= area_bottom)
7158 /* Nothing to restore. */
7160 else if (DISP_IN_RANGE (cfun_frame_layout.frame_size + area_bottom)
7161 && DISP_IN_RANGE (cfun_frame_layout.frame_size + area_top - 1))
7163 /* Area is in range. */
7164 offset = cfun_frame_layout.frame_size;
7168 rtx insn, frame_off;
7170 offset = area_bottom < 0 ? -area_bottom : 0;
7171 frame_off = GEN_INT (cfun_frame_layout.frame_size - offset);
7173 if (DISP_IN_RANGE (INTVAL (frame_off)))
7175 insn = gen_rtx_SET (VOIDmode, frame_pointer,
7176 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
7177 insn = emit_insn (insn);
7181 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
7182 frame_off = force_const_mem (Pmode, frame_off);
7184 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
7185 annotate_constant_pool_refs (&PATTERN (insn));
7189 /* Restore call saved fprs. */
7193 if (cfun_save_high_fprs_p)
7195 next_offset = cfun_frame_layout.f8_offset;
7196 for (i = 24; i < 32; i++)
7198 if (cfun_fpr_bit_p (i - 16))
7200 restore_fpr (frame_pointer,
7201 offset + next_offset, i);
7210 next_offset = cfun_frame_layout.f4_offset;
7211 for (i = 18; i < 20; i++)
7213 if (cfun_fpr_bit_p (i - 16))
7215 restore_fpr (frame_pointer,
7216 offset + next_offset, i);
7219 else if (!TARGET_PACKED_STACK)
7225 /* Return register. */
7227 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
7229 /* Restore call saved gprs. */
7231 if (cfun_frame_layout.first_restore_gpr != -1)
7236 /* Check for global register and save them
7237 to stack location from where they get restored. */
7239 for (i = cfun_frame_layout.first_restore_gpr;
7240 i <= cfun_frame_layout.last_restore_gpr;
7243 /* These registers are special and need to be
7244 restored in any case. */
7245 if (i == STACK_POINTER_REGNUM
7246 || i == RETURN_REGNUM
7248 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
7253 addr = plus_constant (frame_pointer,
7254 offset + cfun_frame_layout.gprs_offset
7255 + (i - cfun_frame_layout.first_save_gpr)
7257 addr = gen_rtx_MEM (Pmode, addr);
7258 set_mem_alias_set (addr, s390_sr_alias_set);
7259 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
7265 /* Fetch return address from stack before load multiple,
7266 this will do good for scheduling. */
7268 if (cfun_frame_layout.save_return_addr_p
7269 || (cfun_frame_layout.first_restore_gpr < BASE_REGNUM
7270 && cfun_frame_layout.last_restore_gpr > RETURN_REGNUM))
7272 int return_regnum = find_unused_clobbered_reg();
7275 return_reg = gen_rtx_REG (Pmode, return_regnum);
7277 addr = plus_constant (frame_pointer,
7278 offset + cfun_frame_layout.gprs_offset
7280 - cfun_frame_layout.first_save_gpr)
7282 addr = gen_rtx_MEM (Pmode, addr);
7283 set_mem_alias_set (addr, s390_sr_alias_set);
7284 emit_move_insn (return_reg, addr);
7288 insn = restore_gprs (frame_pointer,
7289 offset + cfun_frame_layout.gprs_offset
7290 + (cfun_frame_layout.first_restore_gpr
7291 - cfun_frame_layout.first_save_gpr)
7293 cfun_frame_layout.first_restore_gpr,
7294 cfun_frame_layout.last_restore_gpr);
7301 /* Return to caller. */
7303 p = rtvec_alloc (2);
7305 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
7306 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
7307 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
7312 /* Return the size in bytes of a function argument of
7313 type TYPE and/or mode MODE. At least one of TYPE or
7314 MODE must be specified. */
7317 s390_function_arg_size (enum machine_mode mode, tree type)
7320 return int_size_in_bytes (type);
7322 /* No type info available for some library calls ... */
7323 if (mode != BLKmode)
7324 return GET_MODE_SIZE (mode);
7326 /* If we have neither type nor mode, abort */
7330 /* Return true if a function argument of type TYPE and mode MODE
7331 is to be passed in a floating-point register, if available. */
7334 s390_function_arg_float (enum machine_mode mode, tree type)
7336 int size = s390_function_arg_size (mode, type);
7340 /* Soft-float changes the ABI: no floating-point registers are used. */
7341 if (TARGET_SOFT_FLOAT)
7344 /* No type info available for some library calls ... */
7346 return mode == SFmode || mode == DFmode;
7348 /* The ABI says that record types with a single member are treated
7349 just like that member would be. */
7350 while (TREE_CODE (type) == RECORD_TYPE)
7352 tree field, single = NULL_TREE;
7354 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
7356 if (TREE_CODE (field) != FIELD_DECL)
7359 if (single == NULL_TREE)
7360 single = TREE_TYPE (field);
7365 if (single == NULL_TREE)
7371 return TREE_CODE (type) == REAL_TYPE;
7374 /* Return true if a function argument of type TYPE and mode MODE
7375 is to be passed in an integer register, or a pair of integer
7376 registers, if available. */
7379 s390_function_arg_integer (enum machine_mode mode, tree type)
7381 int size = s390_function_arg_size (mode, type);
7385 /* No type info available for some library calls ... */
7387 return GET_MODE_CLASS (mode) == MODE_INT
7388 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
7390 /* We accept small integral (and similar) types. */
7391 if (INTEGRAL_TYPE_P (type)
7392 || POINTER_TYPE_P (type)
7393 || TREE_CODE (type) == OFFSET_TYPE
7394 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
7397 /* We also accept structs of size 1, 2, 4, 8 that are not
7398 passed in floating-point registers. */
7399 if (AGGREGATE_TYPE_P (type)
7400 && exact_log2 (size) >= 0
7401 && !s390_function_arg_float (mode, type))
7407 /* Return 1 if a function argument of type TYPE and mode MODE
7408 is to be passed by reference. The ABI specifies that only
7409 structures of size 1, 2, 4, or 8 bytes are passed by value,
7410 all other structures (and complex numbers) are passed by
7414 s390_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
7415 enum machine_mode mode, tree type,
7416 bool named ATTRIBUTE_UNUSED)
7418 int size = s390_function_arg_size (mode, type);
7424 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
7427 if (TREE_CODE (type) == COMPLEX_TYPE
7428 || TREE_CODE (type) == VECTOR_TYPE)
7435 /* Update the data in CUM to advance over an argument of mode MODE and
7436 data type TYPE. (TYPE is null for libcalls where that information
7437 may not be available.). The boolean NAMED specifies whether the
7438 argument is a named argument (as opposed to an unnamed argument
7439 matching an ellipsis). */
7442 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
7443 tree type, int named ATTRIBUTE_UNUSED)
7445 if (s390_function_arg_float (mode, type))
7449 else if (s390_function_arg_integer (mode, type))
7451 int size = s390_function_arg_size (mode, type);
7452 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
7458 /* Define where to put the arguments to a function.
7459 Value is zero to push the argument on the stack,
7460 or a hard register in which to store the argument.
7462 MODE is the argument's machine mode.
7463 TYPE is the data type of the argument (as a tree).
7464 This is null for libcalls where that information may
7466 CUM is a variable of type CUMULATIVE_ARGS which gives info about
7467 the preceding args and about the function being called.
7468 NAMED is nonzero if this argument is a named parameter
7469 (otherwise it is an extra parameter matching an ellipsis).
7471 On S/390, we use general purpose registers 2 through 6 to
7472 pass integer, pointer, and certain structure arguments, and
7473 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
7474 to pass floating point arguments. All remaining arguments
7475 are pushed to the stack. */
7478 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
7479 int named ATTRIBUTE_UNUSED)
7481 if (s390_function_arg_float (mode, type))
7483 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
7486 return gen_rtx_REG (mode, cum->fprs + 16);
7488 else if (s390_function_arg_integer (mode, type))
7490 int size = s390_function_arg_size (mode, type);
7491 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
7493 if (cum->gprs + n_gprs > 5)
7496 return gen_rtx_REG (mode, cum->gprs + 2);
7499 /* After the real arguments, expand_call calls us once again
7500 with a void_type_node type. Whatever we return here is
7501 passed as operand 2 to the call expanders.
7503 We don't need this feature ... */
7504 else if (type == void_type_node)
7510 /* Return true if return values of type TYPE should be returned
7511 in a memory buffer whose address is passed by the caller as
7512 hidden first argument. */
7515 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
7517 /* We accept small integral (and similar) types. */
7518 if (INTEGRAL_TYPE_P (type)
7519 || POINTER_TYPE_P (type)
7520 || TREE_CODE (type) == OFFSET_TYPE
7521 || TREE_CODE (type) == REAL_TYPE)
7522 return int_size_in_bytes (type) > 8;
7524 /* Aggregates and similar constructs are always returned
7526 if (AGGREGATE_TYPE_P (type)
7527 || TREE_CODE (type) == COMPLEX_TYPE
7528 || TREE_CODE (type) == VECTOR_TYPE)
7531 /* ??? We get called on all sorts of random stuff from
7532 aggregate_value_p. We can't abort, but it's not clear
7533 what's safe to return. Pretend it's a struct I guess. */
7537 /* Define where to return a (scalar) value of type TYPE.
7538 If TYPE is null, define where to return a (scalar)
7539 value of mode MODE from a libcall. */
7542 s390_function_value (tree type, enum machine_mode mode)
7546 int unsignedp = TYPE_UNSIGNED (type);
7547 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
7550 if (GET_MODE_CLASS (mode) != MODE_INT
7551 && GET_MODE_CLASS (mode) != MODE_FLOAT)
7553 if (GET_MODE_SIZE (mode) > 8)
7556 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
7557 return gen_rtx_REG (mode, 16);
7559 return gen_rtx_REG (mode, 2);
7563 /* Create and return the va_list datatype.
7565 On S/390, va_list is an array type equivalent to
7567 typedef struct __va_list_tag
7571 void *__overflow_arg_area;
7572 void *__reg_save_area;
7575 where __gpr and __fpr hold the number of general purpose
7576 or floating point arguments used up to now, respectively,
7577 __overflow_arg_area points to the stack location of the
7578 next argument passed on the stack, and __reg_save_area
7579 always points to the start of the register area in the
7580 call frame of the current function. The function prologue
7581 saves all registers used for argument passing into this
7582 area if the function uses variable arguments. */
7585 s390_build_builtin_va_list (void)
7587 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
7589 record = lang_hooks.types.make_type (RECORD_TYPE);
7592 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
7594 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
7595 long_integer_type_node);
7596 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
7597 long_integer_type_node);
7598 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
7600 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
7603 DECL_FIELD_CONTEXT (f_gpr) = record;
7604 DECL_FIELD_CONTEXT (f_fpr) = record;
7605 DECL_FIELD_CONTEXT (f_ovf) = record;
7606 DECL_FIELD_CONTEXT (f_sav) = record;
7608 TREE_CHAIN (record) = type_decl;
7609 TYPE_NAME (record) = type_decl;
7610 TYPE_FIELDS (record) = f_gpr;
7611 TREE_CHAIN (f_gpr) = f_fpr;
7612 TREE_CHAIN (f_fpr) = f_ovf;
7613 TREE_CHAIN (f_ovf) = f_sav;
7615 layout_type (record);
7617 /* The correct type is an array type of one element. */
7618 return build_array_type (record, build_index_type (size_zero_node));
7621 /* Implement va_start by filling the va_list structure VALIST.
7622 STDARG_P is always true, and ignored.
7623 NEXTARG points to the first anonymous stack argument.
7625 The following global variables are used to initialize
7626 the va_list structure:
7628 current_function_args_info:
7629 holds number of gprs and fprs used for named arguments.
7630 current_function_arg_offset_rtx:
7631 holds the offset of the first anonymous stack argument
7632 (relative to the virtual arg pointer). */
7635 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
7637 HOST_WIDE_INT n_gpr, n_fpr;
7639 tree f_gpr, f_fpr, f_ovf, f_sav;
7640 tree gpr, fpr, ovf, sav, t;
7642 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
7643 f_fpr = TREE_CHAIN (f_gpr);
7644 f_ovf = TREE_CHAIN (f_fpr);
7645 f_sav = TREE_CHAIN (f_ovf);
7647 valist = build_va_arg_indirect_ref (valist);
7648 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
7649 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
7650 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
7651 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7653 /* Count number of gp and fp argument registers used. */
7655 n_gpr = current_function_args_info.gprs;
7656 n_fpr = current_function_args_info.fprs;
7658 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr,
7659 build_int_cst (NULL_TREE, n_gpr));
7660 TREE_SIDE_EFFECTS (t) = 1;
7661 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7663 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr,
7664 build_int_cst (NULL_TREE, n_fpr));
7665 TREE_SIDE_EFFECTS (t) = 1;
7666 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7668 /* Find the overflow area. */
7669 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
7671 off = INTVAL (current_function_arg_offset_rtx);
7672 off = off < 0 ? 0 : off;
7673 if (TARGET_DEBUG_ARG)
7674 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
7675 (int)n_gpr, (int)n_fpr, off);
7677 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_cst (NULL_TREE, off));
7679 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
7680 TREE_SIDE_EFFECTS (t) = 1;
7681 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7683 /* Find the register save area. */
7684 t = make_tree (TREE_TYPE (sav), return_address_pointer_rtx);
7685 if (TARGET_BACKCHAIN && TARGET_PACKED_STACK) /* kernel stack layout */
7686 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
7687 build_int_cst (NULL_TREE,
7688 -(RETURN_REGNUM - 2) * UNITS_PER_WORD
7689 - (TARGET_64BIT ? 4 : 2) * 8));
7691 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
7692 build_int_cst (NULL_TREE, -RETURN_REGNUM * UNITS_PER_WORD));
7694 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
7695 TREE_SIDE_EFFECTS (t) = 1;
7696 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7699 /* Implement va_arg by updating the va_list structure
7700 VALIST as required to retrieve an argument of type
7701 TYPE, and returning that argument.
7703 Generates code equivalent to:
7705 if (integral value) {
7706 if (size <= 4 && args.gpr < 5 ||
7707 size > 4 && args.gpr < 4 )
7708 ret = args.reg_save_area[args.gpr+8]
7710 ret = *args.overflow_arg_area++;
7711 } else if (float value) {
7713 ret = args.reg_save_area[args.fpr+64]
7715 ret = *args.overflow_arg_area++;
7716 } else if (aggregate value) {
7718 ret = *args.reg_save_area[args.gpr]
7720 ret = **args.overflow_arg_area++;
7724 s390_gimplify_va_arg (tree valist, tree type, tree *pre_p,
7725 tree *post_p ATTRIBUTE_UNUSED)
7727 tree f_gpr, f_fpr, f_ovf, f_sav;
7728 tree gpr, fpr, ovf, sav, reg, t, u;
7729 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
7730 tree lab_false, lab_over, addr;
7732 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
7733 f_fpr = TREE_CHAIN (f_gpr);
7734 f_ovf = TREE_CHAIN (f_fpr);
7735 f_sav = TREE_CHAIN (f_ovf);
7737 valist = build_va_arg_indirect_ref (valist);
7738 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
7739 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
7740 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
7741 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7743 size = int_size_in_bytes (type);
7745 if (pass_by_reference (NULL, TYPE_MODE (type), type, false))
7747 if (TARGET_DEBUG_ARG)
7749 fprintf (stderr, "va_arg: aggregate type");
7753 /* Aggregates are passed by reference. */
7758 /* kernel stack layout on 31 bit: It is assumed here that no padding
7759 will be added by s390_frame_info because for va_args always an even
7760 number of gprs has to be saved r15-r2 = 14 regs. */
7761 sav_ofs = ((TARGET_BACKCHAIN && TARGET_PACKED_STACK) ?
7762 (TARGET_64BIT ? 4 : 2) * 8 : 2 * UNITS_PER_WORD);
7763 sav_scale = UNITS_PER_WORD;
7764 size = UNITS_PER_WORD;
7767 else if (s390_function_arg_float (TYPE_MODE (type), type))
7769 if (TARGET_DEBUG_ARG)
7771 fprintf (stderr, "va_arg: float type");
7775 /* FP args go in FP registers, if present. */
7779 sav_ofs = ((TARGET_BACKCHAIN && TARGET_PACKED_STACK) ?
7780 0 : 16 * UNITS_PER_WORD);
7782 /* TARGET_64BIT has up to 4 parameter in fprs */
7783 max_reg = TARGET_64BIT ? 3 : 1;
7787 if (TARGET_DEBUG_ARG)
7789 fprintf (stderr, "va_arg: other type");
7793 /* Otherwise into GP registers. */
7796 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
7798 /* kernel stack layout on 31 bit: It is assumed here that no padding
7799 will be added by s390_frame_info because for va_args always an even
7800 number of gprs has to be saved r15-r2 = 14 regs. */
7801 sav_ofs = ((TARGET_BACKCHAIN && TARGET_PACKED_STACK) ?
7802 (TARGET_64BIT ? 4 : 2) * 8 : 2 * UNITS_PER_WORD);
7804 if (size < UNITS_PER_WORD)
7805 sav_ofs += UNITS_PER_WORD - size;
7807 sav_scale = UNITS_PER_WORD;
7814 /* Pull the value out of the saved registers ... */
7816 lab_false = create_artificial_label ();
7817 lab_over = create_artificial_label ();
7818 addr = create_tmp_var (ptr_type_node, "addr");
7820 t = fold_convert (TREE_TYPE (reg), size_int (max_reg));
7821 t = build2 (GT_EXPR, boolean_type_node, reg, t);
7822 u = build1 (GOTO_EXPR, void_type_node, lab_false);
7823 t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE);
7824 gimplify_and_add (t, pre_p);
7826 t = build2 (PLUS_EXPR, ptr_type_node, sav,
7827 fold_convert (ptr_type_node, size_int (sav_ofs)));
7828 u = build2 (MULT_EXPR, TREE_TYPE (reg), reg,
7829 fold_convert (TREE_TYPE (reg), size_int (sav_scale)));
7830 t = build2 (PLUS_EXPR, ptr_type_node, t, fold_convert (ptr_type_node, u));
7832 t = build2 (MODIFY_EXPR, void_type_node, addr, t);
7833 gimplify_and_add (t, pre_p);
7835 t = build1 (GOTO_EXPR, void_type_node, lab_over);
7836 gimplify_and_add (t, pre_p);
7838 t = build1 (LABEL_EXPR, void_type_node, lab_false);
7839 append_to_statement_list (t, pre_p);
7842 /* ... Otherwise out of the overflow area. */
7845 if (size < UNITS_PER_WORD)
7846 t = build2 (PLUS_EXPR, ptr_type_node, t,
7847 fold_convert (ptr_type_node, size_int (UNITS_PER_WORD - size)));
7849 gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
7851 u = build2 (MODIFY_EXPR, void_type_node, addr, t);
7852 gimplify_and_add (u, pre_p);
7854 t = build2 (PLUS_EXPR, ptr_type_node, t,
7855 fold_convert (ptr_type_node, size_int (size)));
7856 t = build2 (MODIFY_EXPR, ptr_type_node, ovf, t);
7857 gimplify_and_add (t, pre_p);
7859 t = build1 (LABEL_EXPR, void_type_node, lab_over);
7860 append_to_statement_list (t, pre_p);
7863 /* Increment register save count. */
7865 u = build2 (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
7866 fold_convert (TREE_TYPE (reg), size_int (n_reg)));
7867 gimplify_and_add (u, pre_p);
7871 t = build_pointer_type (build_pointer_type (type));
7872 addr = fold_convert (t, addr);
7873 addr = build_va_arg_indirect_ref (addr);
7877 t = build_pointer_type (type);
7878 addr = fold_convert (t, addr);
7881 return build_va_arg_indirect_ref (addr);
7889 S390_BUILTIN_THREAD_POINTER,
7890 S390_BUILTIN_SET_THREAD_POINTER,
7895 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
7900 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
7906 s390_init_builtins (void)
7910 ftype = build_function_type (ptr_type_node, void_list_node);
7911 lang_hooks.builtin_function ("__builtin_thread_pointer", ftype,
7912 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
7915 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
7916 lang_hooks.builtin_function ("__builtin_set_thread_pointer", ftype,
7917 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
7921 /* Expand an expression EXP that calls a built-in function,
7922 with result going to TARGET if that's convenient
7923 (and in mode MODE if that's convenient).
7924 SUBTARGET may be used as the target for computing one of EXP's operands.
7925 IGNORE is nonzero if the value is to be ignored. */
7928 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
7929 enum machine_mode mode ATTRIBUTE_UNUSED,
7930 int ignore ATTRIBUTE_UNUSED)
7934 unsigned int const *code_for_builtin =
7935 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
7937 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7938 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
7939 tree arglist = TREE_OPERAND (exp, 1);
7940 enum insn_code icode;
7941 rtx op[MAX_ARGS], pat;
7945 if (fcode >= S390_BUILTIN_max)
7946 internal_error ("bad builtin fcode");
7947 icode = code_for_builtin[fcode];
7949 internal_error ("bad builtin fcode");
7951 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
7953 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
7955 arglist = TREE_CHAIN (arglist), arity++)
7957 const struct insn_operand_data *insn_op;
7959 tree arg = TREE_VALUE (arglist);
7960 if (arg == error_mark_node)
7962 if (arity > MAX_ARGS)
7965 insn_op = &insn_data[icode].operand[arity + nonvoid];
7967 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
7969 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
7970 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
7975 enum machine_mode tmode = insn_data[icode].operand[0].mode;
7977 || GET_MODE (target) != tmode
7978 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
7979 target = gen_reg_rtx (tmode);
7985 pat = GEN_FCN (icode) (target);
7989 pat = GEN_FCN (icode) (target, op[0]);
7991 pat = GEN_FCN (icode) (op[0]);
7994 pat = GEN_FCN (icode) (target, op[0], op[1]);
8010 /* Output assembly code for the trampoline template to
8013 On S/390, we use gpr 1 internally in the trampoline code;
8014 gpr 0 is used to hold the static chain. */
8017 s390_trampoline_template (FILE *file)
8020 op[0] = gen_rtx_REG (Pmode, 0);
8021 op[1] = gen_rtx_REG (Pmode, 1);
8025 output_asm_insn ("basr\t%1,0", op);
8026 output_asm_insn ("lmg\t%0,%1,14(%1)", op);
8027 output_asm_insn ("br\t%1", op);
8028 ASM_OUTPUT_SKIP (file, (HOST_WIDE_INT)(TRAMPOLINE_SIZE - 10));
8032 output_asm_insn ("basr\t%1,0", op);
8033 output_asm_insn ("lm\t%0,%1,6(%1)", op);
8034 output_asm_insn ("br\t%1", op);
8035 ASM_OUTPUT_SKIP (file, (HOST_WIDE_INT)(TRAMPOLINE_SIZE - 8));
8039 /* Emit RTL insns to initialize the variable parts of a trampoline.
8040 FNADDR is an RTX for the address of the function's pure code.
8041 CXT is an RTX for the static chain value for the function. */
8044 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
8046 emit_move_insn (gen_rtx_MEM (Pmode,
8047 memory_address (Pmode,
8048 plus_constant (addr, (TARGET_64BIT ? 16 : 8)))), cxt);
8049 emit_move_insn (gen_rtx_MEM (Pmode,
8050 memory_address (Pmode,
8051 plus_constant (addr, (TARGET_64BIT ? 24 : 12)))), fnaddr);
8054 /* Return rtx for 64-bit constant formed from the 32-bit subwords
8055 LOW and HIGH, independent of the host word size. */
8058 s390_gen_rtx_const_DI (int high, int low)
8060 #if HOST_BITS_PER_WIDE_INT >= 64
8062 val = (HOST_WIDE_INT)high;
8064 val |= (HOST_WIDE_INT)low;
8066 return GEN_INT (val);
8068 #if HOST_BITS_PER_WIDE_INT >= 32
8069 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
8076 /* Output assembler code to FILE to increment profiler label # LABELNO
8077 for profiling a function entry. */
8080 s390_function_profiler (FILE *file, int labelno)
8085 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
8087 fprintf (file, "# function profiler \n");
8089 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
8090 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
8091 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
8093 op[2] = gen_rtx_REG (Pmode, 1);
8094 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
8095 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
8097 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
8100 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
8101 op[4] = gen_rtx_CONST (Pmode, op[4]);
8106 output_asm_insn ("stg\t%0,%1", op);
8107 output_asm_insn ("larl\t%2,%3", op);
8108 output_asm_insn ("brasl\t%0,%4", op);
8109 output_asm_insn ("lg\t%0,%1", op);
8113 op[6] = gen_label_rtx ();
8115 output_asm_insn ("st\t%0,%1", op);
8116 output_asm_insn ("bras\t%2,%l6", op);
8117 output_asm_insn (".long\t%4", op);
8118 output_asm_insn (".long\t%3", op);
8119 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
8120 output_asm_insn ("l\t%0,0(%2)", op);
8121 output_asm_insn ("l\t%2,4(%2)", op);
8122 output_asm_insn ("basr\t%0,%0", op);
8123 output_asm_insn ("l\t%0,%1", op);
8127 op[5] = gen_label_rtx ();
8128 op[6] = gen_label_rtx ();
8130 output_asm_insn ("st\t%0,%1", op);
8131 output_asm_insn ("bras\t%2,%l6", op);
8132 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
8133 output_asm_insn (".long\t%4-%l5", op);
8134 output_asm_insn (".long\t%3-%l5", op);
8135 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
8136 output_asm_insn ("lr\t%0,%2", op);
8137 output_asm_insn ("a\t%0,0(%2)", op);
8138 output_asm_insn ("a\t%2,4(%2)", op);
8139 output_asm_insn ("basr\t%0,%0", op);
8140 output_asm_insn ("l\t%0,%1", op);
8144 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
8145 into its SYMBOL_REF_FLAGS. */
8148 s390_encode_section_info (tree decl, rtx rtl, int first)
8150 default_encode_section_info (decl, rtl, first);
8152 /* If a variable has a forced alignment to < 2 bytes, mark it with
8153 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
8154 if (TREE_CODE (decl) == VAR_DECL
8155 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
8156 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
8159 /* Output thunk to FILE that implements a C++ virtual function call (with
8160 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
8161 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
8162 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
8163 relative to the resulting this pointer. */
8166 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
8167 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
8173 /* Operand 0 is the target function. */
8174 op[0] = XEXP (DECL_RTL (function), 0);
8175 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
8178 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
8179 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
8180 op[0] = gen_rtx_CONST (Pmode, op[0]);
8183 /* Operand 1 is the 'this' pointer. */
8184 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
8185 op[1] = gen_rtx_REG (Pmode, 3);
8187 op[1] = gen_rtx_REG (Pmode, 2);
8189 /* Operand 2 is the delta. */
8190 op[2] = GEN_INT (delta);
8192 /* Operand 3 is the vcall_offset. */
8193 op[3] = GEN_INT (vcall_offset);
8195 /* Operand 4 is the temporary register. */
8196 op[4] = gen_rtx_REG (Pmode, 1);
8198 /* Operands 5 to 8 can be used as labels. */
8204 /* Operand 9 can be used for temporary register. */
8207 /* Generate code. */
8210 /* Setup literal pool pointer if required. */
8211 if ((!DISP_IN_RANGE (delta)
8212 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
8213 || (!DISP_IN_RANGE (vcall_offset)
8214 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
8216 op[5] = gen_label_rtx ();
8217 output_asm_insn ("larl\t%4,%5", op);
8220 /* Add DELTA to this pointer. */
8223 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
8224 output_asm_insn ("la\t%1,%2(%1)", op);
8225 else if (DISP_IN_RANGE (delta))
8226 output_asm_insn ("lay\t%1,%2(%1)", op);
8227 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
8228 output_asm_insn ("aghi\t%1,%2", op);
8231 op[6] = gen_label_rtx ();
8232 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
8236 /* Perform vcall adjustment. */
8239 if (DISP_IN_RANGE (vcall_offset))
8241 output_asm_insn ("lg\t%4,0(%1)", op);
8242 output_asm_insn ("ag\t%1,%3(%4)", op);
8244 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
8246 output_asm_insn ("lghi\t%4,%3", op);
8247 output_asm_insn ("ag\t%4,0(%1)", op);
8248 output_asm_insn ("ag\t%1,0(%4)", op);
8252 op[7] = gen_label_rtx ();
8253 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
8254 output_asm_insn ("ag\t%4,0(%1)", op);
8255 output_asm_insn ("ag\t%1,0(%4)", op);
8259 /* Jump to target. */
8260 output_asm_insn ("jg\t%0", op);
8262 /* Output literal pool if required. */
8265 output_asm_insn (".align\t4", op);
8266 targetm.asm_out.internal_label (file, "L",
8267 CODE_LABEL_NUMBER (op[5]));
8271 targetm.asm_out.internal_label (file, "L",
8272 CODE_LABEL_NUMBER (op[6]));
8273 output_asm_insn (".long\t%2", op);
8277 targetm.asm_out.internal_label (file, "L",
8278 CODE_LABEL_NUMBER (op[7]));
8279 output_asm_insn (".long\t%3", op);
8284 /* Setup base pointer if required. */
8286 || (!DISP_IN_RANGE (delta)
8287 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
8288 || (!DISP_IN_RANGE (delta)
8289 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
8291 op[5] = gen_label_rtx ();
8292 output_asm_insn ("basr\t%4,0", op);
8293 targetm.asm_out.internal_label (file, "L",
8294 CODE_LABEL_NUMBER (op[5]));
8297 /* Add DELTA to this pointer. */
8300 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
8301 output_asm_insn ("la\t%1,%2(%1)", op);
8302 else if (DISP_IN_RANGE (delta))
8303 output_asm_insn ("lay\t%1,%2(%1)", op);
8304 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
8305 output_asm_insn ("ahi\t%1,%2", op);
8308 op[6] = gen_label_rtx ();
8309 output_asm_insn ("a\t%1,%6-%5(%4)", op);
8313 /* Perform vcall adjustment. */
8316 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
8318 output_asm_insn ("lg\t%4,0(%1)", op);
8319 output_asm_insn ("a\t%1,%3(%4)", op);
8321 else if (DISP_IN_RANGE (vcall_offset))
8323 output_asm_insn ("lg\t%4,0(%1)", op);
8324 output_asm_insn ("ay\t%1,%3(%4)", op);
8326 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
8328 output_asm_insn ("lhi\t%4,%3", op);
8329 output_asm_insn ("a\t%4,0(%1)", op);
8330 output_asm_insn ("a\t%1,0(%4)", op);
8334 op[7] = gen_label_rtx ();
8335 output_asm_insn ("l\t%4,%7-%5(%4)", op);
8336 output_asm_insn ("a\t%4,0(%1)", op);
8337 output_asm_insn ("a\t%1,0(%4)", op);
8340 /* We had to clobber the base pointer register.
8341 Re-setup the base pointer (with a different base). */
8342 op[5] = gen_label_rtx ();
8343 output_asm_insn ("basr\t%4,0", op);
8344 targetm.asm_out.internal_label (file, "L",
8345 CODE_LABEL_NUMBER (op[5]));
8348 /* Jump to target. */
8349 op[8] = gen_label_rtx ();
8352 output_asm_insn ("l\t%4,%8-%5(%4)", op);
8354 output_asm_insn ("a\t%4,%8-%5(%4)", op);
8355 /* We cannot call through .plt, since .plt requires %r12 loaded. */
8356 else if (flag_pic == 1)
8358 output_asm_insn ("a\t%4,%8-%5(%4)", op);
8359 output_asm_insn ("l\t%4,%0(%4)", op);
8361 else if (flag_pic == 2)
8363 op[9] = gen_rtx_REG (Pmode, 0);
8364 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
8365 output_asm_insn ("a\t%4,%8-%5(%4)", op);
8366 output_asm_insn ("ar\t%4,%9", op);
8367 output_asm_insn ("l\t%4,0(%4)", op);
8370 output_asm_insn ("br\t%4", op);
8372 /* Output literal pool. */
8373 output_asm_insn (".align\t4", op);
8375 if (nonlocal && flag_pic == 2)
8376 output_asm_insn (".long\t%0", op);
8379 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
8380 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
8383 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
8385 output_asm_insn (".long\t%0", op);
8387 output_asm_insn (".long\t%0-%5", op);
8391 targetm.asm_out.internal_label (file, "L",
8392 CODE_LABEL_NUMBER (op[6]));
8393 output_asm_insn (".long\t%2", op);
8397 targetm.asm_out.internal_label (file, "L",
8398 CODE_LABEL_NUMBER (op[7]));
8399 output_asm_insn (".long\t%3", op);
8405 s390_valid_pointer_mode (enum machine_mode mode)
8407 return (mode == SImode || (TARGET_64BIT && mode == DImode));
8410 /* How to allocate a 'struct machine_function'. */
8412 static struct machine_function *
8413 s390_init_machine_status (void)
8415 return ggc_alloc_cleared (sizeof (struct machine_function));
8418 /* Checks whether the given ARGUMENT_LIST would use a caller
8419 saved register. This is used to decide whether sibling call
8420 optimization could be performed on the respective function
8424 s390_call_saved_register_used (tree argument_list)
8426 CUMULATIVE_ARGS cum;
8428 enum machine_mode mode;
8433 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
8435 while (argument_list)
8437 parameter = TREE_VALUE (argument_list);
8438 argument_list = TREE_CHAIN (argument_list);
8443 /* For an undeclared variable passed as parameter we will get
8444 an ERROR_MARK node here. */
8445 if (TREE_CODE (parameter) == ERROR_MARK)
8448 if (! (type = TREE_TYPE (parameter)))
8451 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
8454 if (pass_by_reference (&cum, mode, type, true))
8457 type = build_pointer_type (type);
8460 parm_rtx = s390_function_arg (&cum, mode, type, 0);
8462 s390_function_arg_advance (&cum, mode, type, 0);
8464 if (parm_rtx && REG_P (parm_rtx))
8467 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
8469 if (! call_used_regs[reg + REGNO (parm_rtx)])
8476 /* Return true if the given call expression can be
8477 turned into a sibling call.
8478 DECL holds the declaration of the function to be called whereas
8479 EXP is the call expression itself. */
8482 s390_function_ok_for_sibcall (tree decl, tree exp)
8484 /* The TPF epilogue uses register 1. */
8485 if (TARGET_TPF_PROFILING)
8488 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
8489 which would have to be restored before the sibcall. */
8490 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
8493 /* Register 6 on s390 is available as an argument register but unfortunately
8494 "caller saved". This makes functions needing this register for arguments
8495 not suitable for sibcalls. */
8496 if (TREE_OPERAND (exp, 1)
8497 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
8503 /* Return the fixed registers used for condition codes. */
8506 s390_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
8509 *p2 = INVALID_REGNUM;
8514 /* If two condition code modes are compatible, return a condition code
8515 mode which is compatible with both. Otherwise, return
8518 static enum machine_mode
8519 s390_cc_modes_compatible (enum machine_mode m1, enum machine_mode m2)
8527 if (m2 == CCUmode || m2 == CCTmode
8528 || m2 == CCSmode || m2 == CCSRmode || m2 == CCURmode)
8548 /* This function is used by the call expanders of the machine description.
8549 It emits the call insn itself together with the necessary operations
8550 to adjust the target address and returns the emitted insn.
8551 ADDR_LOCATION is the target address rtx
8552 TLS_CALL the location of the thread-local symbol
8553 RESULT_REG the register where the result of the call should be stored
8554 RETADDR_REG the register where the return address should be stored
8555 If this parameter is NULL_RTX the call is considered
8556 to be a sibling call. */
8559 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
8562 bool plt_call = false;
8568 /* Direct function calls need special treatment. */
8569 if (GET_CODE (addr_location) == SYMBOL_REF)
8571 /* When calling a global routine in PIC mode, we must
8572 replace the symbol itself with the PLT stub. */
8573 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
8575 addr_location = gen_rtx_UNSPEC (Pmode,
8576 gen_rtvec (1, addr_location),
8578 addr_location = gen_rtx_CONST (Pmode, addr_location);
8582 /* Unless we can use the bras(l) insn, force the
8583 routine address into a register. */
8584 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
8587 addr_location = legitimize_pic_address (addr_location, 0);
8589 addr_location = force_reg (Pmode, addr_location);
8593 /* If it is already an indirect call or the code above moved the
8594 SYMBOL_REF to somewhere else make sure the address can be found in
8596 if (retaddr_reg == NULL_RTX
8597 && GET_CODE (addr_location) != SYMBOL_REF
8600 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
8601 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
8604 addr_location = gen_rtx_MEM (QImode, addr_location);
8605 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
8607 if (result_reg != NULL_RTX)
8608 call = gen_rtx_SET (VOIDmode, result_reg, call);
8610 if (retaddr_reg != NULL_RTX)
8612 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
8614 if (tls_call != NULL_RTX)
8615 vec = gen_rtvec (3, call, clobber,
8616 gen_rtx_USE (VOIDmode, tls_call));
8618 vec = gen_rtvec (2, call, clobber);
8620 call = gen_rtx_PARALLEL (VOIDmode, vec);
8623 insn = emit_call_insn (call);
8625 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
8626 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
8628 /* s390_function_ok_for_sibcall should
8629 have denied sibcalls in this case. */
8630 if (retaddr_reg == NULL_RTX)
8633 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
8638 /* Implement CONDITIONAL_REGISTER_USAGE. */
8641 s390_conditional_register_usage (void)
8647 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
8648 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
8650 if (TARGET_CPU_ZARCH)
8652 fixed_regs[RETURN_REGNUM] = 0;
8653 call_used_regs[RETURN_REGNUM] = 0;
8657 for (i = 24; i < 32; i++)
8658 call_used_regs[i] = call_really_used_regs[i] = 0;
8662 for (i = 18; i < 20; i++)
8663 call_used_regs[i] = call_really_used_regs[i] = 0;
8666 if (TARGET_SOFT_FLOAT)
8668 for (i = 16; i < 32; i++)
8669 call_used_regs[i] = fixed_regs[i] = 1;
8673 /* Corresponding function to eh_return expander. */
8675 static GTY(()) rtx s390_tpf_eh_return_symbol;
8677 s390_emit_tpf_eh_return (rtx target)
8681 if (!s390_tpf_eh_return_symbol)
8682 s390_tpf_eh_return_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tpf_eh_return");
8684 reg = gen_rtx_REG (Pmode, 2);
8686 emit_move_insn (reg, target);
8687 insn = s390_emit_call (s390_tpf_eh_return_symbol, NULL_RTX, reg,
8688 gen_rtx_REG (Pmode, RETURN_REGNUM));
8689 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), reg);
8691 emit_move_insn (EH_RETURN_HANDLER_RTX, reg);
8694 #include "gt-s390.h"