1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
53 #include "tree-gimple.h"
55 /* Machine-specific symbol_ref flags. */
56 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
59 static bool s390_assemble_integer (rtx, unsigned int, int);
60 static void s390_select_rtx_section (enum machine_mode, rtx,
61 unsigned HOST_WIDE_INT);
62 static void s390_encode_section_info (tree, rtx, int);
63 static bool s390_cannot_force_const_mem (rtx);
64 static rtx s390_delegitimize_address (rtx);
65 static bool s390_return_in_memory (tree, tree);
66 static void s390_init_builtins (void);
67 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
68 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
70 static enum attr_type s390_safe_attr_type (rtx);
72 static int s390_adjust_cost (rtx, rtx, rtx, int);
73 static int s390_adjust_priority (rtx, int);
74 static int s390_issue_rate (void);
75 static int s390_first_cycle_multipass_dfa_lookahead (void);
76 static bool s390_rtx_costs (rtx, int, int, int *);
77 static int s390_address_cost (rtx);
78 static void s390_reorg (void);
79 static bool s390_valid_pointer_mode (enum machine_mode);
80 static tree s390_build_builtin_va_list (void);
81 static tree s390_gimplify_va_arg (tree, tree, tree *, tree *);
82 static bool s390_function_ok_for_sibcall (tree, tree);
83 static bool s390_call_saved_register_used (tree);
84 static bool s390_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode mode,
87 #undef TARGET_ASM_ALIGNED_HI_OP
88 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
89 #undef TARGET_ASM_ALIGNED_DI_OP
90 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
91 #undef TARGET_ASM_INTEGER
92 #define TARGET_ASM_INTEGER s390_assemble_integer
94 #undef TARGET_ASM_OPEN_PAREN
95 #define TARGET_ASM_OPEN_PAREN ""
97 #undef TARGET_ASM_CLOSE_PAREN
98 #define TARGET_ASM_CLOSE_PAREN ""
100 #undef TARGET_ASM_SELECT_RTX_SECTION
101 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
103 #undef TARGET_ENCODE_SECTION_INFO
104 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
107 #undef TARGET_HAVE_TLS
108 #define TARGET_HAVE_TLS true
110 #undef TARGET_CANNOT_FORCE_CONST_MEM
111 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
113 #undef TARGET_DELEGITIMIZE_ADDRESS
114 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
116 #undef TARGET_RETURN_IN_MEMORY
117 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
119 #undef TARGET_INIT_BUILTINS
120 #define TARGET_INIT_BUILTINS s390_init_builtins
121 #undef TARGET_EXPAND_BUILTIN
122 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
124 #undef TARGET_ASM_OUTPUT_MI_THUNK
125 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
126 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
127 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
129 #undef TARGET_SCHED_ADJUST_COST
130 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
131 #undef TARGET_SCHED_ADJUST_PRIORITY
132 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
133 #undef TARGET_SCHED_ISSUE_RATE
134 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
135 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
136 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
138 #undef TARGET_RTX_COSTS
139 #define TARGET_RTX_COSTS s390_rtx_costs
140 #undef TARGET_ADDRESS_COST
141 #define TARGET_ADDRESS_COST s390_address_cost
143 #undef TARGET_MACHINE_DEPENDENT_REORG
144 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
146 #undef TARGET_VALID_POINTER_MODE
147 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
149 #undef TARGET_BUILD_BUILTIN_VA_LIST
150 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
151 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
152 #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg
154 #undef TARGET_PROMOTE_FUNCTION_ARGS
155 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
156 #undef TARGET_PROMOTE_FUNCTION_RETURN
157 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
158 #undef TARGET_PASS_BY_REFERENCE
159 #define TARGET_PASS_BY_REFERENCE s390_pass_by_reference
161 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
162 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
164 struct gcc_target targetm = TARGET_INITIALIZER;
166 extern int reload_completed;
168 /* The alias set for prologue/epilogue register save/restore. */
169 static int s390_sr_alias_set = 0;
171 /* Save information from a "cmpxx" operation until the branch or scc is
173 rtx s390_compare_op0, s390_compare_op1;
175 /* Structure used to hold the components of a S/390 memory
176 address. A legitimate address on S/390 is of the general
178 base + index + displacement
179 where any of the components is optional.
181 base and index are registers of the class ADDR_REGS,
182 displacement is an unsigned 12-bit immediate constant. */
192 /* Which cpu are we tuning for. */
193 enum processor_type s390_tune;
194 enum processor_flags s390_tune_flags;
195 /* Which instruction set architecture to use. */
196 enum processor_type s390_arch;
197 enum processor_flags s390_arch_flags;
199 /* Strings to hold which cpu and instruction set architecture to use. */
200 const char *s390_tune_string; /* for -mtune=<xxx> */
201 const char *s390_arch_string; /* for -march=<xxx> */
203 /* String to specify backchain mode. */
204 const char *s390_backchain_string = ""; /* "" no-backchain ,"1" backchain,
205 "2" kernel-backchain */
207 const char *s390_warn_framesize_string;
208 const char *s390_warn_dynamicstack_string;
209 const char *s390_stack_size_string;
210 const char *s390_stack_guard_string;
212 HOST_WIDE_INT s390_warn_framesize = 0;
213 bool s390_warn_dynamicstack_p = 0;
214 HOST_WIDE_INT s390_stack_size = 0;
215 HOST_WIDE_INT s390_stack_guard = 0;
217 /* The following structure is embedded in the machine
218 specific part of struct function. */
220 struct s390_frame_layout GTY (())
222 /* Offset within stack frame. */
223 HOST_WIDE_INT gprs_offset;
224 HOST_WIDE_INT f0_offset;
225 HOST_WIDE_INT f4_offset;
226 HOST_WIDE_INT f8_offset;
227 HOST_WIDE_INT backchain_offset;
229 /* Number of first and last gpr to be saved, restored. */
231 int first_restore_gpr;
233 int last_restore_gpr;
235 /* Bits standing for floating point registers. Set, if the
236 respective register has to be saved. Starting with reg 16 (f0)
237 at the rightmost bit.
238 Bit 15 - 8 7 6 5 4 3 2 1 0
239 fpr 15 - 8 7 5 3 1 6 4 2 0
240 reg 31 - 24 23 22 21 20 19 18 17 16 */
241 unsigned int fpr_bitmap;
243 /* Number of floating point registers f8-f15 which must be saved. */
246 /* Set if return address needs to be saved. */
247 bool save_return_addr_p;
249 /* Set if backchain needs to be saved. */
250 bool save_backchain_p;
252 /* Size of stack frame. */
253 HOST_WIDE_INT frame_size;
256 /* Define the structure for the machine field in struct function. */
258 struct machine_function GTY(())
260 struct s390_frame_layout frame_layout;
262 /* Literal pool base register. */
265 /* Some local-dynamic TLS symbol name. */
266 const char *some_ld_name;
269 /* Few accessor macros for struct cfun->machine->s390_frame_layout. */
271 #define cfun_frame_layout (cfun->machine->frame_layout)
272 #define cfun_save_high_fprs_p (!!cfun_frame_layout.high_fprs)
273 #define cfun_gprs_save_area_size ((cfun_frame_layout.last_save_gpr - \
274 cfun_frame_layout.first_save_gpr + 1) * UNITS_PER_WORD)
275 #define cfun_set_fpr_bit(BITNUM) (cfun->machine->frame_layout.fpr_bitmap |= \
277 #define cfun_fpr_bit_p(BITNUM) (!!(cfun->machine->frame_layout.fpr_bitmap & \
280 static int s390_match_ccmode_set (rtx, enum machine_mode);
281 static int s390_branch_condition_mask (rtx);
282 static const char *s390_branch_condition_mnemonic (rtx, int);
283 static int check_mode (rtx, enum machine_mode *);
284 static int general_s_operand (rtx, enum machine_mode, int);
285 static int s390_short_displacement (rtx);
286 static int s390_decompose_address (rtx, struct s390_address *);
287 static rtx get_thread_pointer (void);
288 static rtx legitimize_tls_address (rtx, rtx);
289 static void print_shift_count_operand (FILE *, rtx);
290 static const char *get_some_local_dynamic_name (void);
291 static int get_some_local_dynamic_name_1 (rtx *, void *);
292 static int reg_used_in_mem_p (int, rtx);
293 static int addr_generation_dependency_p (rtx, rtx);
294 static int s390_split_branches (void);
295 static void annotate_constant_pool_refs (rtx *x);
296 static void find_constant_pool_ref (rtx, rtx *);
297 static void replace_constant_pool_ref (rtx *, rtx, rtx);
298 static rtx find_ltrel_base (rtx);
299 static void replace_ltrel_base (rtx *);
300 static void s390_optimize_prologue (bool);
301 static int find_unused_clobbered_reg (void);
302 static void s390_frame_area (int *, int *);
303 static void s390_register_info (int, int);
304 static void s390_frame_info (int, int);
305 static rtx save_fpr (rtx, int, int);
306 static rtx restore_fpr (rtx, int, int);
307 static rtx save_gprs (rtx, int, int, int);
308 static rtx restore_gprs (rtx, int, int, int);
309 static int s390_function_arg_size (enum machine_mode, tree);
310 static bool s390_function_arg_float (enum machine_mode, tree);
311 static struct machine_function * s390_init_machine_status (void);
313 /* Check whether integer displacement is in range. */
314 #define DISP_IN_RANGE(d) \
315 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
316 : ((d) >= 0 && (d) <= 4095))
318 /* Return true if SET either doesn't set the CC register, or else
319 the source and destination have matching CC modes and that
320 CC mode is at least as constrained as REQ_MODE. */
323 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
325 enum machine_mode set_mode;
327 if (GET_CODE (set) != SET)
330 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
333 set_mode = GET_MODE (SET_DEST (set));
347 if (req_mode != set_mode)
352 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
353 && req_mode != CCSRmode && req_mode != CCURmode)
359 if (req_mode != CCAmode)
367 return (GET_MODE (SET_SRC (set)) == set_mode);
370 /* Return true if every SET in INSN that sets the CC register
371 has source and destination with matching CC modes and that
372 CC mode is at least as constrained as REQ_MODE.
373 If REQ_MODE is VOIDmode, always return false. */
376 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
380 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
381 if (req_mode == VOIDmode)
384 if (GET_CODE (PATTERN (insn)) == SET)
385 return s390_match_ccmode_set (PATTERN (insn), req_mode);
387 if (GET_CODE (PATTERN (insn)) == PARALLEL)
388 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
390 rtx set = XVECEXP (PATTERN (insn), 0, i);
391 if (GET_CODE (set) == SET)
392 if (!s390_match_ccmode_set (set, req_mode))
399 /* If a test-under-mask instruction can be used to implement
400 (compare (and ... OP1) OP2), return the CC mode required
401 to do that. Otherwise, return VOIDmode.
402 MIXED is true if the instruction can distinguish between
403 CC1 and CC2 for mixed selected bits (TMxx), it is false
404 if the instruction cannot (TM). */
407 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
411 /* ??? Fixme: should work on CONST_DOUBLE as well. */
412 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
415 /* Selected bits all zero: CC0. */
416 if (INTVAL (op2) == 0)
419 /* Selected bits all one: CC3. */
420 if (INTVAL (op2) == INTVAL (op1))
423 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
426 bit1 = exact_log2 (INTVAL (op2));
427 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
428 if (bit0 != -1 && bit1 != -1)
429 return bit0 > bit1 ? CCT1mode : CCT2mode;
435 /* Given a comparison code OP (EQ, NE, etc.) and the operands
436 OP0 and OP1 of a COMPARE, return the mode to be used for the
440 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
446 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
447 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
449 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
450 || GET_CODE (op1) == NEG)
451 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
454 if (GET_CODE (op0) == AND)
456 /* Check whether we can potentially do it via TM. */
457 enum machine_mode ccmode;
458 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
459 if (ccmode != VOIDmode)
461 /* Relax CCTmode to CCZmode to allow fall-back to AND
462 if that turns out to be beneficial. */
463 return ccmode == CCTmode ? CCZmode : ccmode;
467 if (register_operand (op0, HImode)
468 && GET_CODE (op1) == CONST_INT
469 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
471 if (register_operand (op0, QImode)
472 && GET_CODE (op1) == CONST_INT
473 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
482 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
483 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
485 if (INTVAL (XEXP((op0), 1)) < 0)
498 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
499 && GET_CODE (op1) != CONST_INT)
505 if (GET_CODE (op0) == PLUS
506 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
509 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
510 && GET_CODE (op1) != CONST_INT)
516 if (GET_CODE (op0) == MINUS
517 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
520 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
521 && GET_CODE (op1) != CONST_INT)
530 /* Replace the comparison OP0 CODE OP1 by a semantically equivalent one
531 that we can implement more efficiently. */
534 s390_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1)
536 /* Convert ZERO_EXTRACT back to AND to enable TM patterns. */
537 if ((*code == EQ || *code == NE)
538 && *op1 == const0_rtx
539 && GET_CODE (*op0) == ZERO_EXTRACT
540 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
541 && GET_CODE (XEXP (*op0, 2)) == CONST_INT
542 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
544 rtx inner = XEXP (*op0, 0);
545 HOST_WIDE_INT modesize = GET_MODE_BITSIZE (GET_MODE (inner));
546 HOST_WIDE_INT len = INTVAL (XEXP (*op0, 1));
547 HOST_WIDE_INT pos = INTVAL (XEXP (*op0, 2));
549 if (len > 0 && len < modesize
550 && pos >= 0 && pos + len <= modesize
551 && modesize <= HOST_BITS_PER_WIDE_INT)
553 unsigned HOST_WIDE_INT block;
554 block = ((unsigned HOST_WIDE_INT) 1 << len) - 1;
555 block <<= modesize - pos - len;
557 *op0 = gen_rtx_AND (GET_MODE (inner), inner,
558 gen_int_mode (block, GET_MODE (inner)));
562 /* Narrow AND of memory against immediate to enable TM. */
563 if ((*code == EQ || *code == NE)
564 && *op1 == const0_rtx
565 && GET_CODE (*op0) == AND
566 && GET_CODE (XEXP (*op0, 1)) == CONST_INT
567 && SCALAR_INT_MODE_P (GET_MODE (XEXP (*op0, 0))))
569 rtx inner = XEXP (*op0, 0);
570 rtx mask = XEXP (*op0, 1);
572 /* Ignore paradoxical SUBREGs if all extra bits are masked out. */
573 if (GET_CODE (inner) == SUBREG
574 && SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (inner)))
575 && (GET_MODE_SIZE (GET_MODE (inner))
576 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (inner))))
578 & GET_MODE_MASK (GET_MODE (inner))
579 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (inner))))
581 inner = SUBREG_REG (inner);
583 /* Do not change volatile MEMs. */
584 if (MEM_P (inner) && !MEM_VOLATILE_P (inner))
586 int part = s390_single_part (XEXP (*op0, 1),
587 GET_MODE (inner), QImode, 0);
590 mask = gen_int_mode (s390_extract_part (mask, QImode, 0), QImode);
591 inner = adjust_address_nv (inner, QImode, part);
592 *op0 = gen_rtx_AND (QImode, inner, mask);
597 /* Narrow comparisons against 0xffff to HImode if possible. */
599 if ((*code == EQ || *code == NE)
600 && GET_CODE (*op1) == CONST_INT
601 && INTVAL (*op1) == 0xffff
602 && SCALAR_INT_MODE_P (GET_MODE (*op0))
603 && (nonzero_bits (*op0, GET_MODE (*op0))
604 & ~(unsigned HOST_WIDE_INT) 0xffff) == 0)
606 *op0 = gen_lowpart (HImode, *op0);
611 /* Emit a compare instruction suitable to implement the comparison
612 OP0 CODE OP1. Return the correct condition RTL to be placed in
613 the IF_THEN_ELSE of the conditional branch testing the result. */
616 s390_emit_compare (enum rtx_code code, rtx op0, rtx op1)
618 enum machine_mode mode = s390_select_ccmode (code, op0, op1);
619 rtx cc = gen_rtx_REG (mode, CC_REGNUM);
621 emit_insn (gen_rtx_SET (VOIDmode, cc, gen_rtx_COMPARE (mode, op0, op1)));
622 return gen_rtx_fmt_ee (code, VOIDmode, cc, const0_rtx);
625 /* Emit a jump instruction to TARGET. If COND is NULL_RTX, emit an
626 unconditional jump, else a conditional jump under condition COND. */
629 s390_emit_jump (rtx target, rtx cond)
633 target = gen_rtx_LABEL_REF (VOIDmode, target);
635 target = gen_rtx_IF_THEN_ELSE (VOIDmode, cond, target, pc_rtx);
637 insn = gen_rtx_SET (VOIDmode, pc_rtx, target);
638 emit_jump_insn (insn);
641 /* Return nonzero if OP is a valid comparison operator
642 for an ALC condition in mode MODE. */
645 s390_alc_comparison (rtx op, enum machine_mode mode)
647 if (mode != VOIDmode && mode != GET_MODE (op))
650 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
653 if (!COMPARISON_P (op))
656 if (GET_CODE (XEXP (op, 0)) != REG
657 || REGNO (XEXP (op, 0)) != CC_REGNUM
658 || XEXP (op, 1) != const0_rtx)
661 switch (GET_MODE (XEXP (op, 0)))
664 return GET_CODE (op) == LTU;
667 return GET_CODE (op) == LEU;
670 return GET_CODE (op) == GEU;
673 return GET_CODE (op) == GTU;
676 return GET_CODE (op) == LTU;
679 return GET_CODE (op) == UNGT;
682 return GET_CODE (op) == UNLT;
689 /* Return nonzero if OP is a valid comparison operator
690 for an SLB condition in mode MODE. */
693 s390_slb_comparison (rtx op, enum machine_mode mode)
695 if (mode != VOIDmode && mode != GET_MODE (op))
698 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
701 if (!COMPARISON_P (op))
704 if (GET_CODE (XEXP (op, 0)) != REG
705 || REGNO (XEXP (op, 0)) != CC_REGNUM
706 || XEXP (op, 1) != const0_rtx)
709 switch (GET_MODE (XEXP (op, 0)))
712 return GET_CODE (op) == GEU;
715 return GET_CODE (op) == GTU;
718 return GET_CODE (op) == LTU;
721 return GET_CODE (op) == LEU;
724 return GET_CODE (op) == GEU;
727 return GET_CODE (op) == LE;
730 return GET_CODE (op) == GE;
737 /* Return branch condition mask to implement a branch
738 specified by CODE. */
741 s390_branch_condition_mask (rtx code)
743 const int CC0 = 1 << 3;
744 const int CC1 = 1 << 2;
745 const int CC2 = 1 << 1;
746 const int CC3 = 1 << 0;
748 if (GET_CODE (XEXP (code, 0)) != REG
749 || REGNO (XEXP (code, 0)) != CC_REGNUM
750 || XEXP (code, 1) != const0_rtx)
753 switch (GET_MODE (XEXP (code, 0)))
756 switch (GET_CODE (code))
759 case NE: return CC1 | CC2 | CC3;
766 switch (GET_CODE (code))
769 case NE: return CC0 | CC2 | CC3;
776 switch (GET_CODE (code))
779 case NE: return CC0 | CC1 | CC3;
786 switch (GET_CODE (code))
789 case NE: return CC0 | CC1 | CC2;
796 switch (GET_CODE (code))
798 case EQ: return CC0 | CC2;
799 case NE: return CC1 | CC3;
806 switch (GET_CODE (code))
808 case LTU: return CC2 | CC3; /* carry */
809 case GEU: return CC0 | CC1; /* no carry */
816 switch (GET_CODE (code))
818 case GTU: return CC0 | CC1; /* borrow */
819 case LEU: return CC2 | CC3; /* no borrow */
826 switch (GET_CODE (code))
828 case EQ: return CC0 | CC2;
829 case NE: return CC1 | CC3;
830 case LTU: return CC1;
831 case GTU: return CC3;
832 case LEU: return CC1 | CC2;
833 case GEU: return CC2 | CC3;
839 switch (GET_CODE (code))
842 case NE: return CC1 | CC2 | CC3;
843 case LTU: return CC1;
844 case GTU: return CC2;
845 case LEU: return CC0 | CC1;
846 case GEU: return CC0 | CC2;
853 switch (GET_CODE (code))
856 case NE: return CC2 | CC1 | CC3;
857 case LTU: return CC2;
858 case GTU: return CC1;
859 case LEU: return CC0 | CC2;
860 case GEU: return CC0 | CC1;
867 switch (GET_CODE (code))
870 case NE: return CC1 | CC2 | CC3;
871 case LT: return CC1 | CC3;
873 case LE: return CC0 | CC1 | CC3;
874 case GE: return CC0 | CC2;
881 switch (GET_CODE (code))
884 case NE: return CC1 | CC2 | CC3;
886 case GT: return CC2 | CC3;
887 case LE: return CC0 | CC1;
888 case GE: return CC0 | CC2 | CC3;
895 switch (GET_CODE (code))
898 case NE: return CC1 | CC2 | CC3;
901 case LE: return CC0 | CC1;
902 case GE: return CC0 | CC2;
903 case UNORDERED: return CC3;
904 case ORDERED: return CC0 | CC1 | CC2;
905 case UNEQ: return CC0 | CC3;
906 case UNLT: return CC1 | CC3;
907 case UNGT: return CC2 | CC3;
908 case UNLE: return CC0 | CC1 | CC3;
909 case UNGE: return CC0 | CC2 | CC3;
910 case LTGT: return CC1 | CC2;
917 switch (GET_CODE (code))
920 case NE: return CC2 | CC1 | CC3;
923 case LE: return CC0 | CC2;
924 case GE: return CC0 | CC1;
925 case UNORDERED: return CC3;
926 case ORDERED: return CC0 | CC2 | CC1;
927 case UNEQ: return CC0 | CC3;
928 case UNLT: return CC2 | CC3;
929 case UNGT: return CC1 | CC3;
930 case UNLE: return CC0 | CC2 | CC3;
931 case UNGE: return CC0 | CC1 | CC3;
932 case LTGT: return CC2 | CC1;
943 /* If INV is false, return assembler mnemonic string to implement
944 a branch specified by CODE. If INV is true, return mnemonic
945 for the corresponding inverted branch. */
948 s390_branch_condition_mnemonic (rtx code, int inv)
950 static const char *const mnemonic[16] =
952 NULL, "o", "h", "nle",
953 "l", "nhe", "lh", "ne",
954 "e", "nlh", "he", "nl",
955 "le", "nh", "no", NULL
958 int mask = s390_branch_condition_mask (code);
963 if (mask < 1 || mask > 14)
966 return mnemonic[mask];
969 /* Return the part of op which has a value different from def.
970 The size of the part is determined by mode.
971 Use this function only if you already know that op really
972 contains such a part. */
974 unsigned HOST_WIDE_INT
975 s390_extract_part (rtx op, enum machine_mode mode, int def)
977 unsigned HOST_WIDE_INT value = 0;
978 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
979 int part_bits = GET_MODE_BITSIZE (mode);
980 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
983 for (i = 0; i < max_parts; i++)
986 value = (unsigned HOST_WIDE_INT) INTVAL (op);
990 if ((value & part_mask) != (def & part_mask))
991 return value & part_mask;
997 /* If OP is an integer constant of mode MODE with exactly one
998 part of mode PART_MODE unequal to DEF, return the number of that
999 part. Otherwise, return -1. */
1002 s390_single_part (rtx op,
1003 enum machine_mode mode,
1004 enum machine_mode part_mode,
1007 unsigned HOST_WIDE_INT value = 0;
1008 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
1009 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
1012 if (GET_CODE (op) != CONST_INT)
1015 for (i = 0; i < n_parts; i++)
1018 value = (unsigned HOST_WIDE_INT) INTVAL (op);
1020 value >>= GET_MODE_BITSIZE (part_mode);
1022 if ((value & part_mask) != (def & part_mask))
1030 return part == -1 ? -1 : n_parts - 1 - part;
1033 /* Check whether we can (and want to) split a double-word
1034 move in mode MODE from SRC to DST into two single-word
1035 moves, moving the subword FIRST_SUBWORD first. */
1038 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
1040 /* Floating point registers cannot be split. */
1041 if (FP_REG_P (src) || FP_REG_P (dst))
1044 /* We don't need to split if operands are directly accessible. */
1045 if (s_operand (src, mode) || s_operand (dst, mode))
1048 /* Non-offsettable memory references cannot be split. */
1049 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
1050 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
1053 /* Moving the first subword must not clobber a register
1054 needed to move the second subword. */
1055 if (register_operand (dst, mode))
1057 rtx subreg = operand_subword (dst, first_subword, 0, mode);
1058 if (reg_overlap_mentioned_p (subreg, src))
1066 /* Change optimizations to be performed, depending on the
1069 LEVEL is the optimization level specified; 2 if `-O2' is
1070 specified, 1 if `-O' is specified, and 0 if neither is specified.
1072 SIZE is nonzero if `-Os' is specified and zero otherwise. */
1075 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
1077 /* ??? There are apparently still problems with -fcaller-saves. */
1078 flag_caller_saves = 0;
1080 /* By default, always emit DWARF-2 unwind info. This allows debugging
1081 without maintaining a stack frame back-chain. */
1082 flag_asynchronous_unwind_tables = 1;
1086 override_options (void)
1091 const char *const name; /* processor name or nickname. */
1092 const enum processor_type processor;
1093 const enum processor_flags flags;
1095 const processor_alias_table[] =
1097 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
1098 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
1099 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
1100 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
1101 | PF_LONG_DISPLACEMENT},
1104 int const pta_size = ARRAY_SIZE (processor_alias_table);
1106 /* Acquire a unique set number for our register saves and restores. */
1107 s390_sr_alias_set = new_alias_set ();
1109 /* Set up function hooks. */
1110 init_machine_status = s390_init_machine_status;
1112 /* Architecture mode defaults according to ABI. */
1113 if (!(target_flags_explicit & MASK_ZARCH))
1116 target_flags |= MASK_ZARCH;
1118 target_flags &= ~MASK_ZARCH;
1121 /* Determine processor architectural level. */
1122 if (!s390_arch_string)
1123 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
1125 for (i = 0; i < pta_size; i++)
1126 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
1128 s390_arch = processor_alias_table[i].processor;
1129 s390_arch_flags = processor_alias_table[i].flags;
1133 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1135 /* Determine processor to tune for. */
1136 if (!s390_tune_string)
1138 s390_tune = s390_arch;
1139 s390_tune_flags = s390_arch_flags;
1140 s390_tune_string = s390_arch_string;
1144 for (i = 0; i < pta_size; i++)
1145 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1147 s390_tune = processor_alias_table[i].processor;
1148 s390_tune_flags = processor_alias_table[i].flags;
1152 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1155 /* Sanity checks. */
1156 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1157 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1158 if (TARGET_64BIT && !TARGET_ZARCH)
1159 error ("64-bit ABI not supported in ESA/390 mode.");
1161 if (s390_warn_framesize_string)
1163 if (sscanf (s390_warn_framesize_string, HOST_WIDE_INT_PRINT_DEC,
1164 &s390_warn_framesize) != 1)
1165 error ("invalid value for -mwarn-framesize");
1168 if (s390_warn_dynamicstack_string)
1169 s390_warn_dynamicstack_p = 1;
1171 if (s390_stack_size_string)
1173 if (sscanf (s390_stack_size_string, HOST_WIDE_INT_PRINT_DEC,
1174 &s390_stack_size) != 1)
1175 error ("invalid value for -mstack-size");
1177 if (exact_log2 (s390_stack_size) == -1)
1178 error ("stack size must be an exact power of 2");
1180 if (s390_stack_guard_string)
1182 if (sscanf (s390_stack_guard_string, HOST_WIDE_INT_PRINT_DEC,
1183 &s390_stack_guard) != 1)
1184 error ("invalid value for -mstack-guard");
1186 if (s390_stack_guard >= s390_stack_size)
1187 error ("stack size must be greater than the stack guard value");
1189 if (exact_log2 (s390_stack_guard) == -1)
1190 error ("stack guard value must be an exact power of 2");
1193 error ("-mstack-size implies use of -mstack-guard");
1196 if (s390_stack_guard_string && !s390_stack_size_string)
1197 error ("-mstack-guard implies use of -mstack-size");
1200 /* Map for smallest class containing reg regno. */
1202 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1203 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1204 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1205 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1206 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1207 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1208 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1209 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1210 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1211 ADDR_REGS, NO_REGS, ADDR_REGS, ADDR_REGS
1214 /* Return attribute type of insn. */
1216 static enum attr_type
1217 s390_safe_attr_type (rtx insn)
1219 if (recog_memoized (insn) >= 0)
1220 return get_attr_type (insn);
1225 /* Return true if OP a (const_int 0) operand.
1226 OP is the current operation.
1227 MODE is the current operation mode. */
1230 const0_operand (register rtx op, enum machine_mode mode)
1232 return op == CONST0_RTX (mode);
1235 /* Return true if OP is constant.
1236 OP is the current operation.
1237 MODE is the current operation mode. */
1240 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1242 return CONSTANT_P (op);
1245 /* Return true if the mode of operand OP matches MODE.
1246 If MODE is set to VOIDmode, set it to the mode of OP. */
1249 check_mode (register rtx op, enum machine_mode *mode)
1251 if (*mode == VOIDmode)
1252 *mode = GET_MODE (op);
1255 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1261 /* Return true if OP a valid operand for the LARL instruction.
1262 OP is the current operation.
1263 MODE is the current operation mode. */
1266 larl_operand (register rtx op, enum machine_mode mode)
1268 if (! check_mode (op, &mode))
1271 /* Allow labels and local symbols. */
1272 if (GET_CODE (op) == LABEL_REF)
1274 if (GET_CODE (op) == SYMBOL_REF)
1275 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1276 && SYMBOL_REF_TLS_MODEL (op) == 0
1277 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1279 /* Everything else must have a CONST, so strip it. */
1280 if (GET_CODE (op) != CONST)
1284 /* Allow adding *even* in-range constants. */
1285 if (GET_CODE (op) == PLUS)
1287 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1288 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1290 #if HOST_BITS_PER_WIDE_INT > 32
1291 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1292 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1298 /* Labels and local symbols allowed here as well. */
1299 if (GET_CODE (op) == LABEL_REF)
1301 if (GET_CODE (op) == SYMBOL_REF)
1302 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1303 && SYMBOL_REF_TLS_MODEL (op) == 0
1304 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1306 /* Now we must have a @GOTENT offset or @PLT stub
1307 or an @INDNTPOFF TLS offset. */
1308 if (GET_CODE (op) == UNSPEC
1309 && XINT (op, 1) == UNSPEC_GOTENT)
1311 if (GET_CODE (op) == UNSPEC
1312 && XINT (op, 1) == UNSPEC_PLT)
1314 if (GET_CODE (op) == UNSPEC
1315 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1321 /* Helper routine to implement s_operand and s_imm_operand.
1322 OP is the current operation.
1323 MODE is the current operation mode.
1324 ALLOW_IMMEDIATE specifies whether immediate operands should
1325 be accepted or not. */
1328 general_s_operand (register rtx op, enum machine_mode mode,
1329 int allow_immediate)
1331 struct s390_address addr;
1333 /* Call general_operand first, so that we don't have to
1334 check for many special cases. */
1335 if (!general_operand (op, mode))
1338 /* Just like memory_operand, allow (subreg (mem ...))
1340 if (reload_completed
1341 && GET_CODE (op) == SUBREG
1342 && GET_CODE (SUBREG_REG (op)) == MEM)
1343 op = SUBREG_REG (op);
1345 switch (GET_CODE (op))
1347 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1348 is true and we are still before reload. */
1351 if (!allow_immediate || reload_completed)
1355 /* Memory operands are OK unless they already use an
1358 if (!s390_decompose_address (XEXP (op, 0), &addr))
1362 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1363 is true. This prevents compares between two literal pool
1364 entries from being accepted. */
1365 if (!allow_immediate
1366 && addr.base && REGNO (addr.base) == BASE_REGNUM)
1377 /* Return true if OP is a valid S-type operand.
1378 OP is the current operation.
1379 MODE is the current operation mode. */
1382 s_operand (register rtx op, enum machine_mode mode)
1384 return general_s_operand (op, mode, 0);
1387 /* Return true if OP is a valid S-type operand or an immediate
1388 operand that can be addressed as S-type operand by forcing
1389 it into the literal pool.
1390 OP is the current operation.
1391 MODE is the current operation mode. */
1394 s_imm_operand (register rtx op, enum machine_mode mode)
1396 return general_s_operand (op, mode, 1);
1399 /* Return true if OP a valid shift count operand.
1400 OP is the current operation.
1401 MODE is the current operation mode. */
1404 shift_count_operand (rtx op, enum machine_mode mode)
1406 HOST_WIDE_INT offset = 0;
1408 if (! check_mode (op, &mode))
1411 /* We can have an integer constant, an address register,
1412 or a sum of the two. Note that reload already checks
1413 that any register present is an address register, so
1414 we just check for any register here. */
1415 if (GET_CODE (op) == CONST_INT)
1417 offset = INTVAL (op);
1420 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1422 offset = INTVAL (XEXP (op, 1));
1425 while (op && GET_CODE (op) == SUBREG)
1426 op = SUBREG_REG (op);
1427 if (op && GET_CODE (op) != REG)
1430 /* Unfortunately we have to reject constants that are invalid
1431 for an address, or else reload will get confused. */
1432 if (!DISP_IN_RANGE (offset))
1438 /* Return true if DISP is a valid short displacement. */
1441 s390_short_displacement (rtx disp)
1443 /* No displacement is OK. */
1447 /* Integer displacement in range. */
1448 if (GET_CODE (disp) == CONST_INT)
1449 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1451 /* GOT offset is not OK, the GOT can be large. */
1452 if (GET_CODE (disp) == CONST
1453 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1454 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1457 /* All other symbolic constants are literal pool references,
1458 which are OK as the literal pool must be small. */
1459 if (GET_CODE (disp) == CONST)
1465 /* Return true if OP is a valid operand for a C constraint. */
1468 s390_extra_constraint_str (rtx op, int c, const char * str)
1470 struct s390_address addr;
1478 if (GET_CODE (op) != MEM)
1480 if (!s390_decompose_address (XEXP (op, 0), &addr))
1485 if (TARGET_LONG_DISPLACEMENT)
1487 if (!s390_short_displacement (addr.disp))
1493 if (GET_CODE (op) != MEM)
1496 if (TARGET_LONG_DISPLACEMENT)
1498 if (!s390_decompose_address (XEXP (op, 0), &addr))
1500 if (!s390_short_displacement (addr.disp))
1506 if (!TARGET_LONG_DISPLACEMENT)
1508 if (GET_CODE (op) != MEM)
1510 if (!s390_decompose_address (XEXP (op, 0), &addr))
1514 if (s390_short_displacement (addr.disp))
1519 if (!TARGET_LONG_DISPLACEMENT)
1521 if (GET_CODE (op) != MEM)
1523 /* Any invalid address here will be fixed up by reload,
1524 so accept it for the most generic constraint. */
1525 if (s390_decompose_address (XEXP (op, 0), &addr)
1526 && s390_short_displacement (addr.disp))
1531 if (TARGET_LONG_DISPLACEMENT)
1533 if (!s390_decompose_address (op, &addr))
1535 if (!s390_short_displacement (addr.disp))
1541 if (!TARGET_LONG_DISPLACEMENT)
1543 /* Any invalid address here will be fixed up by reload,
1544 so accept it for the most generic constraint. */
1545 if (s390_decompose_address (op, &addr)
1546 && s390_short_displacement (addr.disp))
1551 return shift_count_operand (op, VOIDmode);
1560 /* Return true if VALUE matches the constraint STR. */
1563 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1567 enum machine_mode mode, part_mode;
1577 return (unsigned int)value < 256;
1580 return (unsigned int)value < 4096;
1583 return value >= -32768 && value < 32768;
1586 return (TARGET_LONG_DISPLACEMENT ?
1587 (value >= -524288 && value <= 524287)
1588 : (value >= 0 && value <= 4095));
1590 return value == 2147483647;
1593 part = str[1] - '0';
1597 case 'H': part_mode = HImode; break;
1598 case 'Q': part_mode = QImode; break;
1604 case 'H': mode = HImode; break;
1605 case 'S': mode = SImode; break;
1606 case 'D': mode = DImode; break;
1612 case '0': def = 0; break;
1613 case 'F': def = -1; break;
1617 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1620 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1632 /* Compute a (partial) cost for rtx X. Return true if the complete
1633 cost has been computed, and false if subexpressions should be
1634 scanned. In either case, *TOTAL contains the cost result. */
1637 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1642 if (GET_CODE (XEXP (x, 0)) == MINUS
1643 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1650 /* Force_const_mem does not work out of reload, because the
1651 saveable_obstack is set to reload_obstack, which does not
1652 live long enough. Because of this we cannot use force_const_mem
1653 in addsi3. This leads to problems with gen_add2_insn with a
1654 constant greater than a short. Because of that we give an
1655 addition of greater constants a cost of 3 (reload1.c 10096). */
1656 /* ??? saveable_obstack no longer exists. */
1657 if (outer_code == PLUS
1658 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1659 *total = COSTS_N_INSNS (3);
1680 *total = COSTS_N_INSNS (1);
1684 if (GET_MODE (XEXP (x, 0)) == DImode)
1685 *total = COSTS_N_INSNS (40);
1687 *total = COSTS_N_INSNS (7);
1694 *total = COSTS_N_INSNS (33);
1702 /* Return the cost of an address rtx ADDR. */
1705 s390_address_cost (rtx addr)
1707 struct s390_address ad;
1708 if (!s390_decompose_address (addr, &ad))
1711 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1714 /* Return true if OP is a valid operand for the BRAS instruction.
1715 OP is the current operation.
1716 MODE is the current operation mode. */
1719 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1721 register enum rtx_code code = GET_CODE (op);
1723 /* Allow SYMBOL_REFs. */
1724 if (code == SYMBOL_REF)
1727 /* Allow @PLT stubs. */
1729 && GET_CODE (XEXP (op, 0)) == UNSPEC
1730 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1735 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1736 otherwise return 0. */
1739 tls_symbolic_operand (register rtx op)
1741 if (GET_CODE (op) != SYMBOL_REF)
1743 return SYMBOL_REF_TLS_MODEL (op);
1746 /* Return true if OP is a load multiple operation. It is known to be a
1747 PARALLEL and the first section will be tested.
1748 OP is the current operation.
1749 MODE is the current operation mode. */
1752 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1754 enum machine_mode elt_mode;
1755 int count = XVECLEN (op, 0);
1756 unsigned int dest_regno;
1761 /* Perform a quick check so we don't blow up below. */
1763 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1764 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1765 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1768 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1769 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1770 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1772 /* Check, is base, or base + displacement. */
1774 if (GET_CODE (src_addr) == REG)
1776 else if (GET_CODE (src_addr) == PLUS
1777 && GET_CODE (XEXP (src_addr, 0)) == REG
1778 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1780 off = INTVAL (XEXP (src_addr, 1));
1781 src_addr = XEXP (src_addr, 0);
1786 for (i = 1; i < count; i++)
1788 rtx elt = XVECEXP (op, 0, i);
1790 if (GET_CODE (elt) != SET
1791 || GET_CODE (SET_DEST (elt)) != REG
1792 || GET_MODE (SET_DEST (elt)) != elt_mode
1793 || REGNO (SET_DEST (elt)) != dest_regno + i
1794 || GET_CODE (SET_SRC (elt)) != MEM
1795 || GET_MODE (SET_SRC (elt)) != elt_mode
1796 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1797 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1798 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1799 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1800 != off + i * GET_MODE_SIZE (elt_mode))
1807 /* Return true if OP is a store multiple operation. It is known to be a
1808 PARALLEL and the first section will be tested.
1809 OP is the current operation.
1810 MODE is the current operation mode. */
1813 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1815 enum machine_mode elt_mode;
1816 int count = XVECLEN (op, 0);
1817 unsigned int src_regno;
1821 /* Perform a quick check so we don't blow up below. */
1823 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1824 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1825 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1828 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1829 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1830 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1832 /* Check, is base, or base + displacement. */
1834 if (GET_CODE (dest_addr) == REG)
1836 else if (GET_CODE (dest_addr) == PLUS
1837 && GET_CODE (XEXP (dest_addr, 0)) == REG
1838 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1840 off = INTVAL (XEXP (dest_addr, 1));
1841 dest_addr = XEXP (dest_addr, 0);
1846 for (i = 1; i < count; i++)
1848 rtx elt = XVECEXP (op, 0, i);
1850 if (GET_CODE (elt) != SET
1851 || GET_CODE (SET_SRC (elt)) != REG
1852 || GET_MODE (SET_SRC (elt)) != elt_mode
1853 || REGNO (SET_SRC (elt)) != src_regno + i
1854 || GET_CODE (SET_DEST (elt)) != MEM
1855 || GET_MODE (SET_DEST (elt)) != elt_mode
1856 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1857 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1858 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1859 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1860 != off + i * GET_MODE_SIZE (elt_mode))
1867 /* Return true if OP contains a symbol reference */
1870 symbolic_reference_mentioned_p (rtx op)
1872 register const char *fmt;
1875 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1878 fmt = GET_RTX_FORMAT (GET_CODE (op));
1879 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1885 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1886 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1890 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1897 /* Return true if OP contains a reference to a thread-local symbol. */
1900 tls_symbolic_reference_mentioned_p (rtx op)
1902 register const char *fmt;
1905 if (GET_CODE (op) == SYMBOL_REF)
1906 return tls_symbolic_operand (op);
1908 fmt = GET_RTX_FORMAT (GET_CODE (op));
1909 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1915 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1916 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1920 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1928 /* Return true if OP is a legitimate general operand when
1929 generating PIC code. It is given that flag_pic is on
1930 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1933 legitimate_pic_operand_p (register rtx op)
1935 /* Accept all non-symbolic constants. */
1936 if (!SYMBOLIC_CONST (op))
1939 /* Reject everything else; must be handled
1940 via emit_symbolic_move. */
1944 /* Returns true if the constant value OP is a legitimate general operand.
1945 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1948 legitimate_constant_p (register rtx op)
1950 /* Accept all non-symbolic constants. */
1951 if (!SYMBOLIC_CONST (op))
1954 /* Accept immediate LARL operands. */
1955 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1958 /* Thread-local symbols are never legal constants. This is
1959 so that emit_call knows that computing such addresses
1960 might require a function call. */
1961 if (TLS_SYMBOLIC_CONST (op))
1964 /* In the PIC case, symbolic constants must *not* be
1965 forced into the literal pool. We accept them here,
1966 so that they will be handled by emit_symbolic_move. */
1970 /* All remaining non-PIC symbolic constants are
1971 forced into the literal pool. */
1975 /* Determine if it's legal to put X into the constant pool. This
1976 is not possible if X contains the address of a symbol that is
1977 not constant (TLS) or not known at final link time (PIC). */
1980 s390_cannot_force_const_mem (rtx x)
1982 switch (GET_CODE (x))
1986 /* Accept all non-symbolic constants. */
1990 /* Labels are OK iff we are non-PIC. */
1991 return flag_pic != 0;
1994 /* 'Naked' TLS symbol references are never OK,
1995 non-TLS symbols are OK iff we are non-PIC. */
1996 if (tls_symbolic_operand (x))
1999 return flag_pic != 0;
2002 return s390_cannot_force_const_mem (XEXP (x, 0));
2005 return s390_cannot_force_const_mem (XEXP (x, 0))
2006 || s390_cannot_force_const_mem (XEXP (x, 1));
2009 switch (XINT (x, 1))
2011 /* Only lt-relative or GOT-relative UNSPECs are OK. */
2012 case UNSPEC_LTREL_OFFSET:
2020 case UNSPEC_GOTNTPOFF:
2021 case UNSPEC_INDNTPOFF:
2034 /* Returns true if the constant value OP is a legitimate general
2035 operand during and after reload. The difference to
2036 legitimate_constant_p is that this function will not accept
2037 a constant that would need to be forced to the literal pool
2038 before it can be used as operand. */
2041 legitimate_reload_constant_p (register rtx op)
2043 /* Accept la(y) operands. */
2044 if (GET_CODE (op) == CONST_INT
2045 && DISP_IN_RANGE (INTVAL (op)))
2048 /* Accept l(g)hi operands. */
2049 if (GET_CODE (op) == CONST_INT
2050 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
2053 /* Accept lliXX operands. */
2055 && s390_single_part (op, DImode, HImode, 0) >= 0)
2058 /* Accept larl operands. */
2059 if (TARGET_CPU_ZARCH
2060 && larl_operand (op, VOIDmode))
2063 /* Everything else cannot be handled without reload. */
2067 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
2068 return the class of reg to actually use. */
2071 s390_preferred_reload_class (rtx op, enum reg_class class)
2073 /* This can happen if a floating point constant is being
2074 reloaded into an integer register. Leave well alone. */
2075 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
2076 && class != FP_REGS)
2079 switch (GET_CODE (op))
2081 /* Constants we cannot reload must be forced into the
2086 if (legitimate_reload_constant_p (op))
2091 /* If a symbolic constant or a PLUS is reloaded,
2092 it is most likely being used as an address, so
2093 prefer ADDR_REGS. If 'class' is not a superset
2094 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
2099 if (reg_class_subset_p (ADDR_REGS, class))
2111 /* Return the register class of a scratch register needed to
2112 load IN into a register of class CLASS in MODE.
2114 We need a temporary when loading a PLUS expression which
2115 is not a legitimate operand of the LOAD ADDRESS instruction. */
2118 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
2119 enum machine_mode mode, rtx in)
2121 if (s390_plus_operand (in, mode))
2127 /* Return the register class of a scratch register needed to
2128 store a register of class CLASS in MODE into OUT:
2130 We need a temporary when storing a double-word to a
2131 non-offsettable memory address. */
2134 s390_secondary_output_reload_class (enum reg_class class,
2135 enum machine_mode mode, rtx out)
2137 if ((TARGET_64BIT ? mode == TImode
2138 : (mode == DImode || mode == DFmode))
2139 && reg_classes_intersect_p (GENERAL_REGS, class)
2140 && GET_CODE (out) == MEM
2141 && !offsettable_memref_p (out)
2142 && !s_operand (out, VOIDmode))
2148 /* Return true if OP is a PLUS that is not a legitimate
2149 operand for the LA instruction.
2150 OP is the current operation.
2151 MODE is the current operation mode. */
2154 s390_plus_operand (register rtx op, enum machine_mode mode)
2156 if (!check_mode (op, &mode) || mode != Pmode)
2159 if (GET_CODE (op) != PLUS)
2162 if (legitimate_la_operand_p (op))
2168 /* Generate code to load SRC, which is PLUS that is not a
2169 legitimate operand for the LA instruction, into TARGET.
2170 SCRATCH may be used as scratch register. */
2173 s390_expand_plus_operand (register rtx target, register rtx src,
2174 register rtx scratch)
2177 struct s390_address ad;
2179 /* src must be a PLUS; get its two operands. */
2180 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
2183 /* Check if any of the two operands is already scheduled
2184 for replacement by reload. This can happen e.g. when
2185 float registers occur in an address. */
2186 sum1 = find_replacement (&XEXP (src, 0));
2187 sum2 = find_replacement (&XEXP (src, 1));
2188 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2190 /* If the address is already strictly valid, there's nothing to do. */
2191 if (!s390_decompose_address (src, &ad)
2192 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2193 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
2195 /* Otherwise, one of the operands cannot be an address register;
2196 we reload its value into the scratch register. */
2197 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2199 emit_move_insn (scratch, sum1);
2202 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2204 emit_move_insn (scratch, sum2);
2208 /* According to the way these invalid addresses are generated
2209 in reload.c, it should never happen (at least on s390) that
2210 *neither* of the PLUS components, after find_replacements
2211 was applied, is an address register. */
2212 if (sum1 == scratch && sum2 == scratch)
2218 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2221 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2222 is only ever performed on addresses, so we can mark the
2223 sum as legitimate for LA in any case. */
2224 s390_load_address (target, src);
2228 /* Decompose a RTL expression ADDR for a memory address into
2229 its components, returned in OUT.
2231 Returns 0 if ADDR is not a valid memory address, nonzero
2232 otherwise. If OUT is NULL, don't return the components,
2233 but check for validity only.
2235 Note: Only addresses in canonical form are recognized.
2236 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2237 canonical form so that they will be recognized. */
2240 s390_decompose_address (register rtx addr, struct s390_address *out)
2242 HOST_WIDE_INT offset = 0;
2243 rtx base = NULL_RTX;
2244 rtx indx = NULL_RTX;
2245 rtx disp = NULL_RTX;
2247 int pointer = FALSE;
2248 int base_ptr = FALSE;
2249 int indx_ptr = FALSE;
2251 /* Decompose address into base + index + displacement. */
2253 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2256 else if (GET_CODE (addr) == PLUS)
2258 rtx op0 = XEXP (addr, 0);
2259 rtx op1 = XEXP (addr, 1);
2260 enum rtx_code code0 = GET_CODE (op0);
2261 enum rtx_code code1 = GET_CODE (op1);
2263 if (code0 == REG || code0 == UNSPEC)
2265 if (code1 == REG || code1 == UNSPEC)
2267 indx = op0; /* index + base */
2273 base = op0; /* base + displacement */
2278 else if (code0 == PLUS)
2280 indx = XEXP (op0, 0); /* index + base + disp */
2281 base = XEXP (op0, 1);
2292 disp = addr; /* displacement */
2294 /* Extract integer part of displacement. */
2298 if (GET_CODE (disp) == CONST_INT)
2300 offset = INTVAL (disp);
2303 else if (GET_CODE (disp) == CONST
2304 && GET_CODE (XEXP (disp, 0)) == PLUS
2305 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2307 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2308 disp = XEXP (XEXP (disp, 0), 0);
2312 /* Strip off CONST here to avoid special case tests later. */
2313 if (disp && GET_CODE (disp) == CONST)
2314 disp = XEXP (disp, 0);
2316 /* We can convert literal pool addresses to
2317 displacements by basing them off the base register. */
2318 if (disp && GET_CODE (disp) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (disp))
2320 /* Either base or index must be free to hold the base register. */
2322 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2324 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2328 /* Mark up the displacement. */
2329 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2330 UNSPEC_LTREL_OFFSET);
2333 /* Validate base register. */
2336 if (GET_CODE (base) == UNSPEC)
2337 switch (XINT (base, 1))
2341 disp = gen_rtx_UNSPEC (Pmode,
2342 gen_rtvec (1, XVECEXP (base, 0, 0)),
2343 UNSPEC_LTREL_OFFSET);
2347 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2350 case UNSPEC_LTREL_BASE:
2351 base = gen_rtx_REG (Pmode, BASE_REGNUM);
2358 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2361 if (REGNO (base) == BASE_REGNUM
2362 || REGNO (base) == STACK_POINTER_REGNUM
2363 || REGNO (base) == FRAME_POINTER_REGNUM
2364 || ((reload_completed || reload_in_progress)
2365 && frame_pointer_needed
2366 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2367 || REGNO (base) == ARG_POINTER_REGNUM
2369 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2370 pointer = base_ptr = TRUE;
2373 /* Validate index register. */
2376 if (GET_CODE (indx) == UNSPEC)
2377 switch (XINT (indx, 1))
2381 disp = gen_rtx_UNSPEC (Pmode,
2382 gen_rtvec (1, XVECEXP (indx, 0, 0)),
2383 UNSPEC_LTREL_OFFSET);
2387 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2390 case UNSPEC_LTREL_BASE:
2391 indx = gen_rtx_REG (Pmode, BASE_REGNUM);
2398 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2401 if (REGNO (indx) == BASE_REGNUM
2402 || REGNO (indx) == STACK_POINTER_REGNUM
2403 || REGNO (indx) == FRAME_POINTER_REGNUM
2404 || ((reload_completed || reload_in_progress)
2405 && frame_pointer_needed
2406 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2407 || REGNO (indx) == ARG_POINTER_REGNUM
2409 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2410 pointer = indx_ptr = TRUE;
2413 /* Prefer to use pointer as base, not index. */
2414 if (base && indx && !base_ptr
2415 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2422 /* Validate displacement. */
2425 /* If the argument pointer or the return address pointer are involved,
2426 the displacement will change later anyway as the virtual registers get
2427 eliminated. This could make a valid displacement invalid, but it is
2428 more likely to make an invalid displacement valid, because we sometimes
2429 access the register save area via negative offsets to one of those
2431 Thus we don't check the displacement for validity here. If after
2432 elimination the displacement turns out to be invalid after all,
2433 this is fixed up by reload in any case. */
2434 if (base != arg_pointer_rtx
2435 && indx != arg_pointer_rtx
2436 && base != return_address_pointer_rtx
2437 && indx != return_address_pointer_rtx)
2438 if (!DISP_IN_RANGE (offset))
2443 /* All the special cases are pointers. */
2446 /* In the small-PIC case, the linker converts @GOT
2447 and @GOTNTPOFF offsets to possible displacements. */
2448 if (GET_CODE (disp) == UNSPEC
2449 && (XINT (disp, 1) == UNSPEC_GOT
2450 || XINT (disp, 1) == UNSPEC_GOTNTPOFF)
2457 /* Accept chunkified literal pool symbol references. */
2458 else if (GET_CODE (disp) == MINUS
2459 && GET_CODE (XEXP (disp, 0)) == LABEL_REF
2460 && GET_CODE (XEXP (disp, 1)) == LABEL_REF)
2465 /* Accept literal pool references. */
2466 else if (GET_CODE (disp) == UNSPEC
2467 && XINT (disp, 1) == UNSPEC_LTREL_OFFSET)
2469 orig_disp = gen_rtx_CONST (Pmode, disp);
2472 /* If we have an offset, make sure it does not
2473 exceed the size of the constant pool entry. */
2474 rtx sym = XVECEXP (disp, 0, 0);
2475 if (offset >= GET_MODE_SIZE (get_pool_mode (sym)))
2478 orig_disp = plus_constant (orig_disp, offset);
2493 out->disp = orig_disp;
2494 out->pointer = pointer;
2500 /* Return nonzero if ADDR is a valid memory address.
2501 STRICT specifies whether strict register checking applies. */
2504 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2505 register rtx addr, int strict)
2507 struct s390_address ad;
2508 if (!s390_decompose_address (addr, &ad))
2513 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2515 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2520 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2522 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2529 /* Return 1 if OP is a valid operand for the LA instruction.
2530 In 31-bit, we need to prove that the result is used as an
2531 address, as LA performs only a 31-bit addition. */
2534 legitimate_la_operand_p (register rtx op)
2536 struct s390_address addr;
2537 if (!s390_decompose_address (op, &addr))
2540 if (TARGET_64BIT || addr.pointer)
2546 /* Return 1 if it is valid *and* preferrable to use LA to
2547 compute the sum of OP1 and OP2. */
2550 preferred_la_operand_p (rtx op1, rtx op2)
2552 struct s390_address addr;
2554 if (op2 != const0_rtx)
2555 op1 = gen_rtx_PLUS (Pmode, op1, op2);
2557 if (!s390_decompose_address (op1, &addr))
2559 if (addr.base && !REG_OK_FOR_BASE_STRICT_P (addr.base))
2561 if (addr.indx && !REG_OK_FOR_INDEX_STRICT_P (addr.indx))
2564 if (!TARGET_64BIT && !addr.pointer)
2570 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2571 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2577 /* Emit a forced load-address operation to load SRC into DST.
2578 This will use the LOAD ADDRESS instruction even in situations
2579 where legitimate_la_operand_p (SRC) returns false. */
2582 s390_load_address (rtx dst, rtx src)
2585 emit_move_insn (dst, src);
2587 emit_insn (gen_force_la_31 (dst, src));
2590 /* Return a legitimate reference for ORIG (an address) using the
2591 register REG. If REG is 0, a new pseudo is generated.
2593 There are two types of references that must be handled:
2595 1. Global data references must load the address from the GOT, via
2596 the PIC reg. An insn is emitted to do this load, and the reg is
2599 2. Static data references, constant pool addresses, and code labels
2600 compute the address as an offset from the GOT, whose base is in
2601 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2602 differentiate them from global data objects. The returned
2603 address is the PIC reg + an unspec constant.
2605 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2606 reg also appears in the address. */
2609 legitimize_pic_address (rtx orig, rtx reg)
2615 if (GET_CODE (addr) == LABEL_REF
2616 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2618 /* This is a local symbol. */
2619 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2621 /* Access local symbols PC-relative via LARL.
2622 This is the same as in the non-PIC case, so it is
2623 handled automatically ... */
2627 /* Access local symbols relative to the GOT. */
2629 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2631 if (reload_in_progress || reload_completed)
2632 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2634 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2635 addr = gen_rtx_CONST (Pmode, addr);
2636 addr = force_const_mem (Pmode, addr);
2637 emit_move_insn (temp, addr);
2639 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2642 emit_move_insn (reg, new);
2647 else if (GET_CODE (addr) == SYMBOL_REF)
2650 reg = gen_reg_rtx (Pmode);
2654 /* Assume GOT offset < 4k. This is handled the same way
2655 in both 31- and 64-bit code (@GOT). */
2657 if (reload_in_progress || reload_completed)
2658 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2660 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2661 new = gen_rtx_CONST (Pmode, new);
2662 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2663 new = gen_const_mem (Pmode, new);
2664 emit_move_insn (reg, new);
2667 else if (TARGET_CPU_ZARCH)
2669 /* If the GOT offset might be >= 4k, we determine the position
2670 of the GOT entry via a PC-relative LARL (@GOTENT). */
2672 rtx temp = gen_reg_rtx (Pmode);
2674 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2675 new = gen_rtx_CONST (Pmode, new);
2676 emit_move_insn (temp, new);
2678 new = gen_const_mem (Pmode, temp);
2679 emit_move_insn (reg, new);
2684 /* If the GOT offset might be >= 4k, we have to load it
2685 from the literal pool (@GOT). */
2687 rtx temp = gen_reg_rtx (Pmode);
2689 if (reload_in_progress || reload_completed)
2690 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2692 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2693 addr = gen_rtx_CONST (Pmode, addr);
2694 addr = force_const_mem (Pmode, addr);
2695 emit_move_insn (temp, addr);
2697 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2698 new = gen_const_mem (Pmode, new);
2699 emit_move_insn (reg, new);
2705 if (GET_CODE (addr) == CONST)
2707 addr = XEXP (addr, 0);
2708 if (GET_CODE (addr) == UNSPEC)
2710 if (XVECLEN (addr, 0) != 1)
2712 switch (XINT (addr, 1))
2714 /* If someone moved a GOT-relative UNSPEC
2715 out of the literal pool, force them back in. */
2718 new = force_const_mem (Pmode, orig);
2721 /* @GOT is OK as is if small. */
2724 new = force_const_mem (Pmode, orig);
2727 /* @GOTENT is OK as is. */
2731 /* @PLT is OK as is on 64-bit, must be converted to
2732 GOT-relative @PLTOFF on 31-bit. */
2734 if (!TARGET_CPU_ZARCH)
2736 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2738 if (reload_in_progress || reload_completed)
2739 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2741 addr = XVECEXP (addr, 0, 0);
2742 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2744 addr = gen_rtx_CONST (Pmode, addr);
2745 addr = force_const_mem (Pmode, addr);
2746 emit_move_insn (temp, addr);
2748 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2751 emit_move_insn (reg, new);
2757 /* Everything else cannot happen. */
2762 else if (GET_CODE (addr) != PLUS)
2765 if (GET_CODE (addr) == PLUS)
2767 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2768 /* Check first to see if this is a constant offset
2769 from a local symbol reference. */
2770 if ((GET_CODE (op0) == LABEL_REF
2771 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2772 && GET_CODE (op1) == CONST_INT)
2774 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2776 if (INTVAL (op1) & 1)
2778 /* LARL can't handle odd offsets, so emit a
2779 pair of LARL and LA. */
2780 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2782 if (!DISP_IN_RANGE (INTVAL (op1)))
2784 int even = INTVAL (op1) - 1;
2785 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2786 op0 = gen_rtx_CONST (Pmode, op0);
2790 emit_move_insn (temp, op0);
2791 new = gen_rtx_PLUS (Pmode, temp, op1);
2795 emit_move_insn (reg, new);
2801 /* If the offset is even, we can just use LARL.
2802 This will happen automatically. */
2807 /* Access local symbols relative to the GOT. */
2809 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2811 if (reload_in_progress || reload_completed)
2812 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2814 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2816 addr = gen_rtx_PLUS (Pmode, addr, op1);
2817 addr = gen_rtx_CONST (Pmode, addr);
2818 addr = force_const_mem (Pmode, addr);
2819 emit_move_insn (temp, addr);
2821 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2824 emit_move_insn (reg, new);
2830 /* Now, check whether it is a GOT relative symbol plus offset
2831 that was pulled out of the literal pool. Force it back in. */
2833 else if (GET_CODE (op0) == UNSPEC
2834 && GET_CODE (op1) == CONST_INT
2835 && XINT (op0, 1) == UNSPEC_GOTOFF)
2837 if (XVECLEN (op0, 0) != 1)
2840 new = force_const_mem (Pmode, orig);
2843 /* Otherwise, compute the sum. */
2846 base = legitimize_pic_address (XEXP (addr, 0), reg);
2847 new = legitimize_pic_address (XEXP (addr, 1),
2848 base == reg ? NULL_RTX : reg);
2849 if (GET_CODE (new) == CONST_INT)
2850 new = plus_constant (base, INTVAL (new));
2853 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2855 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2856 new = XEXP (new, 1);
2858 new = gen_rtx_PLUS (Pmode, base, new);
2861 if (GET_CODE (new) == CONST)
2862 new = XEXP (new, 0);
2863 new = force_operand (new, 0);
2870 /* Load the thread pointer into a register. */
2873 get_thread_pointer (void)
2877 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2878 tp = force_reg (Pmode, tp);
2879 mark_reg_pointer (tp, BITS_PER_WORD);
2884 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
2885 in s390_tls_symbol which always refers to __tls_get_offset.
2886 The returned offset is written to RESULT_REG and an USE rtx is
2887 generated for TLS_CALL. */
2889 static GTY(()) rtx s390_tls_symbol;
2892 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
2899 if (!s390_tls_symbol)
2900 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2902 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
2903 gen_rtx_REG (Pmode, RETURN_REGNUM));
2905 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
2906 CONST_OR_PURE_CALL_P (insn) = 1;
2909 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2910 this (thread-local) address. REG may be used as temporary. */
2913 legitimize_tls_address (rtx addr, rtx reg)
2915 rtx new, tls_call, temp, base, r2, insn;
2917 if (GET_CODE (addr) == SYMBOL_REF)
2918 switch (tls_symbolic_operand (addr))
2920 case TLS_MODEL_GLOBAL_DYNAMIC:
2922 r2 = gen_rtx_REG (Pmode, 2);
2923 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2924 new = gen_rtx_CONST (Pmode, tls_call);
2925 new = force_const_mem (Pmode, new);
2926 emit_move_insn (r2, new);
2927 s390_emit_tls_call_insn (r2, tls_call);
2928 insn = get_insns ();
2931 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2932 temp = gen_reg_rtx (Pmode);
2933 emit_libcall_block (insn, temp, r2, new);
2935 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2938 s390_load_address (reg, new);
2943 case TLS_MODEL_LOCAL_DYNAMIC:
2945 r2 = gen_rtx_REG (Pmode, 2);
2946 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2947 new = gen_rtx_CONST (Pmode, tls_call);
2948 new = force_const_mem (Pmode, new);
2949 emit_move_insn (r2, new);
2950 s390_emit_tls_call_insn (r2, tls_call);
2951 insn = get_insns ();
2954 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2955 temp = gen_reg_rtx (Pmode);
2956 emit_libcall_block (insn, temp, r2, new);
2958 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2959 base = gen_reg_rtx (Pmode);
2960 s390_load_address (base, new);
2962 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2963 new = gen_rtx_CONST (Pmode, new);
2964 new = force_const_mem (Pmode, new);
2965 temp = gen_reg_rtx (Pmode);
2966 emit_move_insn (temp, new);
2968 new = gen_rtx_PLUS (Pmode, base, temp);
2971 s390_load_address (reg, new);
2976 case TLS_MODEL_INITIAL_EXEC:
2979 /* Assume GOT offset < 4k. This is handled the same way
2980 in both 31- and 64-bit code. */
2982 if (reload_in_progress || reload_completed)
2983 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2985 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2986 new = gen_rtx_CONST (Pmode, new);
2987 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2988 new = gen_const_mem (Pmode, new);
2989 temp = gen_reg_rtx (Pmode);
2990 emit_move_insn (temp, new);
2992 else if (TARGET_CPU_ZARCH)
2994 /* If the GOT offset might be >= 4k, we determine the position
2995 of the GOT entry via a PC-relative LARL. */
2997 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2998 new = gen_rtx_CONST (Pmode, new);
2999 temp = gen_reg_rtx (Pmode);
3000 emit_move_insn (temp, new);
3002 new = gen_const_mem (Pmode, temp);
3003 temp = gen_reg_rtx (Pmode);
3004 emit_move_insn (temp, new);
3008 /* If the GOT offset might be >= 4k, we have to load it
3009 from the literal pool. */
3011 if (reload_in_progress || reload_completed)
3012 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3014 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
3015 new = gen_rtx_CONST (Pmode, new);
3016 new = force_const_mem (Pmode, new);
3017 temp = gen_reg_rtx (Pmode);
3018 emit_move_insn (temp, new);
3020 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
3021 new = gen_const_mem (Pmode, new);
3023 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3024 temp = gen_reg_rtx (Pmode);
3025 emit_insn (gen_rtx_SET (Pmode, temp, new));
3029 /* In position-dependent code, load the absolute address of
3030 the GOT entry from the literal pool. */
3032 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
3033 new = gen_rtx_CONST (Pmode, new);
3034 new = force_const_mem (Pmode, new);
3035 temp = gen_reg_rtx (Pmode);
3036 emit_move_insn (temp, new);
3039 new = gen_const_mem (Pmode, new);
3040 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
3041 temp = gen_reg_rtx (Pmode);
3042 emit_insn (gen_rtx_SET (Pmode, temp, new));
3045 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3048 s390_load_address (reg, new);
3053 case TLS_MODEL_LOCAL_EXEC:
3054 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
3055 new = gen_rtx_CONST (Pmode, new);
3056 new = force_const_mem (Pmode, new);
3057 temp = gen_reg_rtx (Pmode);
3058 emit_move_insn (temp, new);
3060 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
3063 s390_load_address (reg, new);
3072 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
3074 switch (XINT (XEXP (addr, 0), 1))
3076 case UNSPEC_INDNTPOFF:
3077 if (TARGET_CPU_ZARCH)
3088 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3089 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3091 new = XEXP (XEXP (addr, 0), 0);
3092 if (GET_CODE (new) != SYMBOL_REF)
3093 new = gen_rtx_CONST (Pmode, new);
3095 new = legitimize_tls_address (new, reg);
3096 new = plus_constant (new, INTVAL (XEXP (XEXP (addr, 0), 1)));
3097 new = force_operand (new, 0);
3101 abort (); /* for now ... */
3106 /* Emit insns to move operands[1] into operands[0]. */
3109 emit_symbolic_move (rtx *operands)
3111 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
3113 if (GET_CODE (operands[0]) == MEM)
3114 operands[1] = force_reg (Pmode, operands[1]);
3115 else if (TLS_SYMBOLIC_CONST (operands[1]))
3116 operands[1] = legitimize_tls_address (operands[1], temp);
3118 operands[1] = legitimize_pic_address (operands[1], temp);
3121 /* Try machine-dependent ways of modifying an illegitimate address X
3122 to be legitimate. If we find one, return the new, valid address.
3124 OLDX is the address as it was before break_out_memory_refs was called.
3125 In some cases it is useful to look at this to decide what needs to be done.
3127 MODE is the mode of the operand pointed to by X.
3129 When -fpic is used, special handling is needed for symbolic references.
3130 See comments by legitimize_pic_address for details. */
3133 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
3134 enum machine_mode mode ATTRIBUTE_UNUSED)
3136 rtx constant_term = const0_rtx;
3138 if (TLS_SYMBOLIC_CONST (x))
3140 x = legitimize_tls_address (x, 0);
3142 if (legitimate_address_p (mode, x, FALSE))
3147 if (SYMBOLIC_CONST (x)
3148 || (GET_CODE (x) == PLUS
3149 && (SYMBOLIC_CONST (XEXP (x, 0))
3150 || SYMBOLIC_CONST (XEXP (x, 1)))))
3151 x = legitimize_pic_address (x, 0);
3153 if (legitimate_address_p (mode, x, FALSE))
3157 x = eliminate_constant_term (x, &constant_term);
3159 /* Optimize loading of large displacements by splitting them
3160 into the multiple of 4K and the rest; this allows the
3161 former to be CSE'd if possible.
3163 Don't do this if the displacement is added to a register
3164 pointing into the stack frame, as the offsets will
3165 change later anyway. */
3167 if (GET_CODE (constant_term) == CONST_INT
3168 && !TARGET_LONG_DISPLACEMENT
3169 && !DISP_IN_RANGE (INTVAL (constant_term))
3170 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
3172 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
3173 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
3175 rtx temp = gen_reg_rtx (Pmode);
3176 rtx val = force_operand (GEN_INT (upper), temp);
3178 emit_move_insn (temp, val);
3180 x = gen_rtx_PLUS (Pmode, x, temp);
3181 constant_term = GEN_INT (lower);
3184 if (GET_CODE (x) == PLUS)
3186 if (GET_CODE (XEXP (x, 0)) == REG)
3188 register rtx temp = gen_reg_rtx (Pmode);
3189 register rtx val = force_operand (XEXP (x, 1), temp);
3191 emit_move_insn (temp, val);
3193 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
3196 else if (GET_CODE (XEXP (x, 1)) == REG)
3198 register rtx temp = gen_reg_rtx (Pmode);
3199 register rtx val = force_operand (XEXP (x, 0), temp);
3201 emit_move_insn (temp, val);
3203 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
3207 if (constant_term != const0_rtx)
3208 x = gen_rtx_PLUS (Pmode, x, constant_term);
3213 /* Emit code to move LEN bytes from DST to SRC. */
3216 s390_expand_movmem (rtx dst, rtx src, rtx len)
3218 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3220 if (INTVAL (len) > 0)
3221 emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
3224 else if (TARGET_MVCLE)
3226 emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
3231 rtx dst_addr, src_addr, count, blocks, temp;
3232 rtx loop_start_label = gen_label_rtx ();
3233 rtx loop_end_label = gen_label_rtx ();
3234 rtx end_label = gen_label_rtx ();
3235 enum machine_mode mode;
3237 mode = GET_MODE (len);
3238 if (mode == VOIDmode)
3241 dst_addr = gen_reg_rtx (Pmode);
3242 src_addr = gen_reg_rtx (Pmode);
3243 count = gen_reg_rtx (mode);
3244 blocks = gen_reg_rtx (mode);
3246 convert_move (count, len, 1);
3247 emit_cmp_and_jump_insns (count, const0_rtx,
3248 EQ, NULL_RTX, mode, 1, end_label);
3250 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3251 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3252 dst = change_address (dst, VOIDmode, dst_addr);
3253 src = change_address (src, VOIDmode, src_addr);
3255 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3257 emit_move_insn (count, temp);
3259 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3261 emit_move_insn (blocks, temp);
3263 emit_cmp_and_jump_insns (blocks, const0_rtx,
3264 EQ, NULL_RTX, mode, 1, loop_end_label);
3266 emit_label (loop_start_label);
3268 emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
3269 s390_load_address (dst_addr,
3270 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3271 s390_load_address (src_addr,
3272 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3274 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3276 emit_move_insn (blocks, temp);
3278 emit_cmp_and_jump_insns (blocks, const0_rtx,
3279 EQ, NULL_RTX, mode, 1, loop_end_label);
3281 emit_jump (loop_start_label);
3282 emit_label (loop_end_label);
3284 emit_insn (gen_movmem_short (dst, src,
3285 convert_to_mode (Pmode, count, 1)));
3286 emit_label (end_label);
3290 /* Emit code to clear LEN bytes at DST. */
3293 s390_expand_clrmem (rtx dst, rtx len)
3295 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3297 if (INTVAL (len) > 0)
3298 emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
3301 else if (TARGET_MVCLE)
3303 emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
3308 rtx dst_addr, src_addr, count, blocks, temp;
3309 rtx loop_start_label = gen_label_rtx ();
3310 rtx loop_end_label = gen_label_rtx ();
3311 rtx end_label = gen_label_rtx ();
3312 enum machine_mode mode;
3314 mode = GET_MODE (len);
3315 if (mode == VOIDmode)
3318 dst_addr = gen_reg_rtx (Pmode);
3319 src_addr = gen_reg_rtx (Pmode);
3320 count = gen_reg_rtx (mode);
3321 blocks = gen_reg_rtx (mode);
3323 convert_move (count, len, 1);
3324 emit_cmp_and_jump_insns (count, const0_rtx,
3325 EQ, NULL_RTX, mode, 1, end_label);
3327 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3328 dst = change_address (dst, VOIDmode, dst_addr);
3330 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3332 emit_move_insn (count, temp);
3334 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3336 emit_move_insn (blocks, temp);
3338 emit_cmp_and_jump_insns (blocks, const0_rtx,
3339 EQ, NULL_RTX, mode, 1, loop_end_label);
3341 emit_label (loop_start_label);
3343 emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
3344 s390_load_address (dst_addr,
3345 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3347 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3349 emit_move_insn (blocks, temp);
3351 emit_cmp_and_jump_insns (blocks, const0_rtx,
3352 EQ, NULL_RTX, mode, 1, loop_end_label);
3354 emit_jump (loop_start_label);
3355 emit_label (loop_end_label);
3357 emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
3358 emit_label (end_label);
3362 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3363 and return the result in TARGET. */
3366 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3368 rtx (*gen_result) (rtx) =
3369 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3371 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3373 if (INTVAL (len) > 0)
3375 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3376 emit_insn (gen_result (target));
3379 emit_move_insn (target, const0_rtx);
3382 else /* if (TARGET_MVCLE) */
3384 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3385 emit_insn (gen_result (target));
3389 /* Deactivate for now as profile code cannot cope with
3390 CC being live across basic block boundaries. */
3393 rtx addr0, addr1, count, blocks, temp;
3394 rtx loop_start_label = gen_label_rtx ();
3395 rtx loop_end_label = gen_label_rtx ();
3396 rtx end_label = gen_label_rtx ();
3397 enum machine_mode mode;
3399 mode = GET_MODE (len);
3400 if (mode == VOIDmode)
3403 addr0 = gen_reg_rtx (Pmode);
3404 addr1 = gen_reg_rtx (Pmode);
3405 count = gen_reg_rtx (mode);
3406 blocks = gen_reg_rtx (mode);
3408 convert_move (count, len, 1);
3409 emit_cmp_and_jump_insns (count, const0_rtx,
3410 EQ, NULL_RTX, mode, 1, end_label);
3412 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3413 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3414 op0 = change_address (op0, VOIDmode, addr0);
3415 op1 = change_address (op1, VOIDmode, addr1);
3417 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3419 emit_move_insn (count, temp);
3421 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3423 emit_move_insn (blocks, temp);
3425 emit_cmp_and_jump_insns (blocks, const0_rtx,
3426 EQ, NULL_RTX, mode, 1, loop_end_label);
3428 emit_label (loop_start_label);
3430 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3431 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3432 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3433 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3434 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3435 emit_jump_insn (temp);
3437 s390_load_address (addr0,
3438 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3439 s390_load_address (addr1,
3440 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3442 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3444 emit_move_insn (blocks, temp);
3446 emit_cmp_and_jump_insns (blocks, const0_rtx,
3447 EQ, NULL_RTX, mode, 1, loop_end_label);
3449 emit_jump (loop_start_label);
3450 emit_label (loop_end_label);
3452 emit_insn (gen_cmpmem_short (op0, op1,
3453 convert_to_mode (Pmode, count, 1)));
3454 emit_label (end_label);
3456 emit_insn (gen_result (target));
3462 /* Expand conditional increment or decrement using alc/slb instructions.
3463 Should generate code setting DST to either SRC or SRC + INCREMENT,
3464 depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
3465 Returns true if successful, false otherwise. */
3468 s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
3469 rtx dst, rtx src, rtx increment)
3471 enum machine_mode cmp_mode;
3472 enum machine_mode cc_mode;
3477 if ((GET_MODE (cmp_op0) == SImode || GET_MODE (cmp_op0) == VOIDmode)
3478 && (GET_MODE (cmp_op1) == SImode || GET_MODE (cmp_op1) == VOIDmode))
3480 else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
3481 && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
3486 /* Try ADD LOGICAL WITH CARRY. */
3487 if (increment == const1_rtx)
3489 /* Determine CC mode to use. */
3490 if (cmp_code == EQ || cmp_code == NE)
3492 if (cmp_op1 != const0_rtx)
3494 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3495 NULL_RTX, 0, OPTAB_WIDEN);
3496 cmp_op1 = const0_rtx;
3499 cmp_code = cmp_code == EQ ? LEU : GTU;
3502 if (cmp_code == LTU || cmp_code == LEU)
3507 cmp_code = swap_condition (cmp_code);
3524 /* Emit comparison instruction pattern. */
3525 if (!register_operand (cmp_op0, cmp_mode))
3526 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3528 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3529 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3530 /* We use insn_invalid_p here to add clobbers if required. */
3531 if (insn_invalid_p (emit_insn (insn)))
3534 /* Emit ALC instruction pattern. */
3535 op_res = gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3536 gen_rtx_REG (cc_mode, CC_REGNUM),
3539 if (src != const0_rtx)
3541 if (!register_operand (src, GET_MODE (dst)))
3542 src = force_reg (GET_MODE (dst), src);
3544 src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
3545 op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
3548 p = rtvec_alloc (2);
3550 gen_rtx_SET (VOIDmode, dst, op_res);
3552 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3553 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3558 /* Try SUBTRACT LOGICAL WITH BORROW. */
3559 if (increment == constm1_rtx)
3561 /* Determine CC mode to use. */
3562 if (cmp_code == EQ || cmp_code == NE)
3564 if (cmp_op1 != const0_rtx)
3566 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3567 NULL_RTX, 0, OPTAB_WIDEN);
3568 cmp_op1 = const0_rtx;
3571 cmp_code = cmp_code == EQ ? LEU : GTU;
3574 if (cmp_code == GTU || cmp_code == GEU)
3579 cmp_code = swap_condition (cmp_code);
3596 /* Emit comparison instruction pattern. */
3597 if (!register_operand (cmp_op0, cmp_mode))
3598 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3600 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3601 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3602 /* We use insn_invalid_p here to add clobbers if required. */
3603 if (insn_invalid_p (emit_insn (insn)))
3606 /* Emit SLB instruction pattern. */
3607 if (!register_operand (src, GET_MODE (dst)))
3608 src = force_reg (GET_MODE (dst), src);
3610 op_res = gen_rtx_MINUS (GET_MODE (dst),
3611 gen_rtx_MINUS (GET_MODE (dst), src, const0_rtx),
3612 gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3613 gen_rtx_REG (cc_mode, CC_REGNUM),
3615 p = rtvec_alloc (2);
3617 gen_rtx_SET (VOIDmode, dst, op_res);
3619 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3620 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3629 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3630 We need to emit DTP-relative relocations. */
3633 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3638 fputs ("\t.long\t", file);
3641 fputs ("\t.quad\t", file);
3646 output_addr_const (file, x);
3647 fputs ("@DTPOFF", file);
3650 /* In the name of slightly smaller debug output, and to cater to
3651 general assembler losage, recognize various UNSPEC sequences
3652 and turn them back into a direct symbol reference. */
3655 s390_delegitimize_address (rtx orig_x)
3659 if (GET_CODE (x) != MEM)
3663 if (GET_CODE (x) == PLUS
3664 && GET_CODE (XEXP (x, 1)) == CONST
3665 && GET_CODE (XEXP (x, 0)) == REG
3666 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3668 y = XEXP (XEXP (x, 1), 0);
3669 if (GET_CODE (y) == UNSPEC
3670 && XINT (y, 1) == UNSPEC_GOT)
3671 return XVECEXP (y, 0, 0);
3675 if (GET_CODE (x) == CONST)
3678 if (GET_CODE (y) == UNSPEC
3679 && XINT (y, 1) == UNSPEC_GOTENT)
3680 return XVECEXP (y, 0, 0);
3687 /* Output shift count operand OP to stdio stream FILE. */
3690 print_shift_count_operand (FILE *file, rtx op)
3692 HOST_WIDE_INT offset = 0;
3694 /* We can have an integer constant, an address register,
3695 or a sum of the two. */
3696 if (GET_CODE (op) == CONST_INT)
3698 offset = INTVAL (op);
3701 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3703 offset = INTVAL (XEXP (op, 1));
3706 while (op && GET_CODE (op) == SUBREG)
3707 op = SUBREG_REG (op);
3710 if (op && (GET_CODE (op) != REG
3711 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3712 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3715 /* Shift counts are truncated to the low six bits anyway. */
3716 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3718 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3721 /* Locate some local-dynamic symbol still in use by this function
3722 so that we can print its name in local-dynamic base patterns. */
3725 get_some_local_dynamic_name (void)
3729 if (cfun->machine->some_ld_name)
3730 return cfun->machine->some_ld_name;
3732 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3734 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3735 return cfun->machine->some_ld_name;
3741 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3745 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3747 x = get_pool_constant (x);
3748 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3751 if (GET_CODE (x) == SYMBOL_REF
3752 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3754 cfun->machine->some_ld_name = XSTR (x, 0);
3761 /* Output machine-dependent UNSPECs occurring in address constant X
3762 in assembler syntax to stdio stream FILE. Returns true if the
3763 constant X could be recognized, false otherwise. */
3766 s390_output_addr_const_extra (FILE *file, rtx x)
3768 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
3769 switch (XINT (x, 1))
3772 output_addr_const (file, XVECEXP (x, 0, 0));
3773 fprintf (file, "@GOTENT");
3776 output_addr_const (file, XVECEXP (x, 0, 0));
3777 fprintf (file, "@GOT");
3780 output_addr_const (file, XVECEXP (x, 0, 0));
3781 fprintf (file, "@GOTOFF");
3784 output_addr_const (file, XVECEXP (x, 0, 0));
3785 fprintf (file, "@PLT");
3788 output_addr_const (file, XVECEXP (x, 0, 0));
3789 fprintf (file, "@PLTOFF");
3792 output_addr_const (file, XVECEXP (x, 0, 0));
3793 fprintf (file, "@TLSGD");
3796 assemble_name (file, get_some_local_dynamic_name ());
3797 fprintf (file, "@TLSLDM");
3800 output_addr_const (file, XVECEXP (x, 0, 0));
3801 fprintf (file, "@DTPOFF");
3804 output_addr_const (file, XVECEXP (x, 0, 0));
3805 fprintf (file, "@NTPOFF");
3807 case UNSPEC_GOTNTPOFF:
3808 output_addr_const (file, XVECEXP (x, 0, 0));
3809 fprintf (file, "@GOTNTPOFF");
3811 case UNSPEC_INDNTPOFF:
3812 output_addr_const (file, XVECEXP (x, 0, 0));
3813 fprintf (file, "@INDNTPOFF");
3820 /* Output address operand ADDR in assembler syntax to
3821 stdio stream FILE. */
3824 print_operand_address (FILE *file, rtx addr)
3826 struct s390_address ad;
3828 if (!s390_decompose_address (addr, &ad)
3829 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3830 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3831 output_operand_lossage ("Cannot decompose address.");
3834 output_addr_const (file, ad.disp);
3836 fprintf (file, "0");
3838 if (ad.base && ad.indx)
3839 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3840 reg_names[REGNO (ad.base)]);
3842 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3845 /* Output operand X in assembler syntax to stdio stream FILE.
3846 CODE specified the format flag. The following format flags
3849 'C': print opcode suffix for branch condition.
3850 'D': print opcode suffix for inverse branch condition.
3851 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3852 'O': print only the displacement of a memory reference.
3853 'R': print only the base register of a memory reference.
3854 'N': print the second word of a DImode operand.
3855 'M': print the second word of a TImode operand.
3856 'Y': print shift count operand.
3858 'b': print integer X as if it's an unsigned byte.
3859 'x': print integer X as if it's an unsigned word.
3860 'h': print integer X as if it's a signed word.
3861 'i': print the first nonzero HImode part of X.
3862 'j': print the first HImode part unequal to 0xffff of X. */
3865 print_operand (FILE *file, rtx x, int code)
3870 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3874 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3878 if (GET_CODE (x) == SYMBOL_REF)
3880 fprintf (file, "%s", ":tls_load:");
3881 output_addr_const (file, x);
3883 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3885 fprintf (file, "%s", ":tls_gdcall:");
3886 output_addr_const (file, XVECEXP (x, 0, 0));
3888 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3890 fprintf (file, "%s", ":tls_ldcall:");
3891 assemble_name (file, get_some_local_dynamic_name ());
3899 struct s390_address ad;
3901 if (GET_CODE (x) != MEM
3902 || !s390_decompose_address (XEXP (x, 0), &ad)
3903 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3908 output_addr_const (file, ad.disp);
3910 fprintf (file, "0");
3916 struct s390_address ad;
3918 if (GET_CODE (x) != MEM
3919 || !s390_decompose_address (XEXP (x, 0), &ad)
3920 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3925 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3927 fprintf (file, "0");
3932 if (GET_CODE (x) == REG)
3933 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3934 else if (GET_CODE (x) == MEM)
3935 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3941 if (GET_CODE (x) == REG)
3942 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3943 else if (GET_CODE (x) == MEM)
3944 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3950 print_shift_count_operand (file, x);
3954 switch (GET_CODE (x))
3957 fprintf (file, "%s", reg_names[REGNO (x)]);
3961 output_address (XEXP (x, 0));
3968 output_addr_const (file, x);
3973 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3974 else if (code == 'x')
3975 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3976 else if (code == 'h')
3977 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3978 else if (code == 'i')
3979 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3980 s390_extract_part (x, HImode, 0));
3981 else if (code == 'j')
3982 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3983 s390_extract_part (x, HImode, -1));
3985 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3989 if (GET_MODE (x) != VOIDmode)
3992 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3993 else if (code == 'x')
3994 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3995 else if (code == 'h')
3996 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
4002 fatal_insn ("UNKNOWN in print_operand !?", x);
4007 /* Target hook for assembling integer objects. We need to define it
4008 here to work a round a bug in some versions of GAS, which couldn't
4009 handle values smaller than INT_MIN when printed in decimal. */
4012 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
4014 if (size == 8 && aligned_p
4015 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
4017 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
4021 return default_assemble_integer (x, size, aligned_p);
4024 /* Returns true if register REGNO is used for forming
4025 a memory address in expression X. */
4028 reg_used_in_mem_p (int regno, rtx x)
4030 enum rtx_code code = GET_CODE (x);
4036 if (refers_to_regno_p (regno, regno+1,
4040 else if (code == SET
4041 && GET_CODE (SET_DEST (x)) == PC)
4043 if (refers_to_regno_p (regno, regno+1,
4048 fmt = GET_RTX_FORMAT (code);
4049 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4052 && reg_used_in_mem_p (regno, XEXP (x, i)))
4055 else if (fmt[i] == 'E')
4056 for (j = 0; j < XVECLEN (x, i); j++)
4057 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
4063 /* Returns true if expression DEP_RTX sets an address register
4064 used by instruction INSN to address memory. */
4067 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
4071 if (GET_CODE (dep_rtx) == INSN)
4072 dep_rtx = PATTERN (dep_rtx);
4074 if (GET_CODE (dep_rtx) == SET)
4076 target = SET_DEST (dep_rtx);
4077 if (GET_CODE (target) == STRICT_LOW_PART)
4078 target = XEXP (target, 0);
4079 while (GET_CODE (target) == SUBREG)
4080 target = SUBREG_REG (target);
4082 if (GET_CODE (target) == REG)
4084 int regno = REGNO (target);
4086 if (s390_safe_attr_type (insn) == TYPE_LA)
4088 pat = PATTERN (insn);
4089 if (GET_CODE (pat) == PARALLEL)
4091 if (XVECLEN (pat, 0) != 2)
4093 pat = XVECEXP (pat, 0, 0);
4095 if (GET_CODE (pat) == SET)
4096 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
4100 else if (get_attr_atype (insn) == ATYPE_AGEN)
4101 return reg_used_in_mem_p (regno, PATTERN (insn));
4107 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
4110 s390_agen_dep_p (rtx dep_insn, rtx insn)
4112 rtx dep_rtx = PATTERN (dep_insn);
4115 if (GET_CODE (dep_rtx) == SET
4116 && addr_generation_dependency_p (dep_rtx, insn))
4118 else if (GET_CODE (dep_rtx) == PARALLEL)
4120 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
4122 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
4129 /* Return the modified cost of the dependency of instruction INSN
4130 on instruction DEP_INSN through the link LINK. COST is the
4131 default cost of that dependency.
4133 Data dependencies are all handled without delay. However, if a
4134 register is modified and subsequently used as base or index
4135 register of a memory reference, at least 4 cycles need to pass
4136 between setting and using the register to avoid pipeline stalls.
4137 An exception is the LA instruction. An address generated by LA can
4138 be used by introducing only a one cycle stall on the pipeline. */
4141 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
4143 /* If the dependence is an anti-dependence, there is no cost. For an
4144 output dependence, there is sometimes a cost, but it doesn't seem
4145 worth handling those few cases. */
4147 if (REG_NOTE_KIND (link) != 0)
4150 /* If we can't recognize the insns, we can't really do anything. */
4151 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
4154 /* Operand forward in case of lr, load and la. */
4155 if (s390_tune == PROCESSOR_2084_Z990
4157 && (s390_safe_attr_type (dep_insn) == TYPE_LA
4158 || s390_safe_attr_type (dep_insn) == TYPE_LR
4159 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
4164 /* A C statement (sans semicolon) to update the integer scheduling priority
4165 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
4166 reduce the priority to execute INSN later. Do not define this macro if
4167 you do not need to adjust the scheduling priorities of insns.
4169 A STD instruction should be scheduled earlier,
4170 in order to use the bypass. */
4173 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
4175 if (! INSN_P (insn))
4178 if (s390_tune != PROCESSOR_2084_Z990)
4181 switch (s390_safe_attr_type (insn))
4185 priority = priority << 3;
4188 priority = priority << 1;
4196 /* The number of instructions that can be issued per cycle. */
4199 s390_issue_rate (void)
4201 if (s390_tune == PROCESSOR_2084_Z990)
4207 s390_first_cycle_multipass_dfa_lookahead (void)
4213 /* Split all branches that exceed the maximum distance.
4214 Returns true if this created a new literal pool entry. */
4217 s390_split_branches (void)
4219 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
4220 int new_literal = 0;
4221 rtx insn, pat, tmp, target;
4224 /* We need correct insn addresses. */
4226 shorten_branches (get_insns ());
4228 /* Find all branches that exceed 64KB, and split them. */
4230 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4232 if (GET_CODE (insn) != JUMP_INSN)
4235 pat = PATTERN (insn);
4236 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4237 pat = XVECEXP (pat, 0, 0);
4238 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
4241 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
4243 label = &SET_SRC (pat);
4245 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
4247 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
4248 label = &XEXP (SET_SRC (pat), 1);
4249 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
4250 label = &XEXP (SET_SRC (pat), 2);
4257 if (get_attr_length (insn) <= 4)
4260 /* We are going to use the return register as scratch register,
4261 make sure it will be saved/restored by the prologue/epilogue. */
4262 cfun_frame_layout.save_return_addr_p = 1;
4267 tmp = force_const_mem (Pmode, *label);
4268 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
4269 INSN_ADDRESSES_NEW (tmp, -1);
4270 annotate_constant_pool_refs (&PATTERN (tmp));
4277 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
4278 UNSPEC_LTREL_OFFSET);
4279 target = gen_rtx_CONST (Pmode, target);
4280 target = force_const_mem (Pmode, target);
4281 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
4282 INSN_ADDRESSES_NEW (tmp, -1);
4283 annotate_constant_pool_refs (&PATTERN (tmp));
4285 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XEXP (target, 0),
4286 cfun->machine->base_reg),
4288 target = gen_rtx_PLUS (Pmode, temp_reg, target);
4291 if (!validate_change (insn, label, target, 0))
4298 /* Annotate every literal pool reference in X by an UNSPEC_LTREF expression.
4299 Fix up MEMs as required. */
4302 annotate_constant_pool_refs (rtx *x)
4307 if (GET_CODE (*x) == SYMBOL_REF
4308 && CONSTANT_POOL_ADDRESS_P (*x))
4311 /* Literal pool references can only occur inside a MEM ... */
4312 if (GET_CODE (*x) == MEM)
4314 rtx memref = XEXP (*x, 0);
4316 if (GET_CODE (memref) == SYMBOL_REF
4317 && CONSTANT_POOL_ADDRESS_P (memref))
4319 rtx base = cfun->machine->base_reg;
4320 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, memref, base),
4323 *x = replace_equiv_address (*x, addr);
4327 if (GET_CODE (memref) == CONST
4328 && GET_CODE (XEXP (memref, 0)) == PLUS
4329 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4330 && GET_CODE (XEXP (XEXP (memref, 0), 0)) == SYMBOL_REF
4331 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (memref, 0), 0)))
4333 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4334 rtx sym = XEXP (XEXP (memref, 0), 0);
4335 rtx base = cfun->machine->base_reg;
4336 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4339 *x = replace_equiv_address (*x, plus_constant (addr, off));
4344 /* ... or a load-address type pattern. */
4345 if (GET_CODE (*x) == SET)
4347 rtx addrref = SET_SRC (*x);
4349 if (GET_CODE (addrref) == SYMBOL_REF
4350 && CONSTANT_POOL_ADDRESS_P (addrref))
4352 rtx base = cfun->machine->base_reg;
4353 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, addrref, base),
4356 SET_SRC (*x) = addr;
4360 if (GET_CODE (addrref) == CONST
4361 && GET_CODE (XEXP (addrref, 0)) == PLUS
4362 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4363 && GET_CODE (XEXP (XEXP (addrref, 0), 0)) == SYMBOL_REF
4364 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addrref, 0), 0)))
4366 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4367 rtx sym = XEXP (XEXP (addrref, 0), 0);
4368 rtx base = cfun->machine->base_reg;
4369 rtx addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, sym, base),
4372 SET_SRC (*x) = plus_constant (addr, off);
4377 /* Annotate LTREL_BASE as well. */
4378 if (GET_CODE (*x) == UNSPEC
4379 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4381 rtx base = cfun->machine->base_reg;
4382 *x = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, XVECEXP (*x, 0, 0), base),
4387 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4388 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4392 annotate_constant_pool_refs (&XEXP (*x, i));
4394 else if (fmt[i] == 'E')
4396 for (j = 0; j < XVECLEN (*x, i); j++)
4397 annotate_constant_pool_refs (&XVECEXP (*x, i, j));
4403 /* Find an annotated literal pool symbol referenced in RTX X,
4404 and store it at REF. Will abort if X contains references to
4405 more than one such pool symbol; multiple references to the same
4406 symbol are allowed, however.
4408 The rtx pointed to by REF must be initialized to NULL_RTX
4409 by the caller before calling this routine. */
4412 find_constant_pool_ref (rtx x, rtx *ref)
4417 /* Ignore LTREL_BASE references. */
4418 if (GET_CODE (x) == UNSPEC
4419 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4421 /* Likewise POOL_ENTRY insns. */
4422 if (GET_CODE (x) == UNSPEC_VOLATILE
4423 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
4426 if (GET_CODE (x) == SYMBOL_REF
4427 && CONSTANT_POOL_ADDRESS_P (x))
4430 if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_LTREF)
4432 rtx sym = XVECEXP (x, 0, 0);
4433 if (GET_CODE (sym) != SYMBOL_REF
4434 || !CONSTANT_POOL_ADDRESS_P (sym))
4437 if (*ref == NULL_RTX)
4439 else if (*ref != sym)
4445 fmt = GET_RTX_FORMAT (GET_CODE (x));
4446 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4450 find_constant_pool_ref (XEXP (x, i), ref);
4452 else if (fmt[i] == 'E')
4454 for (j = 0; j < XVECLEN (x, i); j++)
4455 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4460 /* Replace every reference to the annotated literal pool
4461 symbol REF in X by its base plus OFFSET. */
4464 replace_constant_pool_ref (rtx *x, rtx ref, rtx offset)
4472 if (GET_CODE (*x) == UNSPEC
4473 && XINT (*x, 1) == UNSPEC_LTREF
4474 && XVECEXP (*x, 0, 0) == ref)
4476 *x = gen_rtx_PLUS (Pmode, XVECEXP (*x, 0, 1), offset);
4480 if (GET_CODE (*x) == PLUS
4481 && GET_CODE (XEXP (*x, 1)) == CONST_INT
4482 && GET_CODE (XEXP (*x, 0)) == UNSPEC
4483 && XINT (XEXP (*x, 0), 1) == UNSPEC_LTREF
4484 && XVECEXP (XEXP (*x, 0), 0, 0) == ref)
4486 rtx addr = gen_rtx_PLUS (Pmode, XVECEXP (XEXP (*x, 0), 0, 1), offset);
4487 *x = plus_constant (addr, INTVAL (XEXP (*x, 1)));
4491 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4492 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4496 replace_constant_pool_ref (&XEXP (*x, i), ref, offset);
4498 else if (fmt[i] == 'E')
4500 for (j = 0; j < XVECLEN (*x, i); j++)
4501 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, offset);
4506 /* Check whether X contains an UNSPEC_LTREL_BASE.
4507 Return its constant pool symbol if found, NULL_RTX otherwise. */
4510 find_ltrel_base (rtx x)
4515 if (GET_CODE (x) == UNSPEC
4516 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4517 return XVECEXP (x, 0, 0);
4519 fmt = GET_RTX_FORMAT (GET_CODE (x));
4520 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4524 rtx fnd = find_ltrel_base (XEXP (x, i));
4528 else if (fmt[i] == 'E')
4530 for (j = 0; j < XVECLEN (x, i); j++)
4532 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4542 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with its base. */
4545 replace_ltrel_base (rtx *x)
4550 if (GET_CODE (*x) == UNSPEC
4551 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4553 *x = XVECEXP (*x, 0, 1);
4557 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4558 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4562 replace_ltrel_base (&XEXP (*x, i));
4564 else if (fmt[i] == 'E')
4566 for (j = 0; j < XVECLEN (*x, i); j++)
4567 replace_ltrel_base (&XVECEXP (*x, i, j));
4573 /* We keep a list of constants which we have to add to internal
4574 constant tables in the middle of large functions. */
4576 #define NR_C_MODES 7
4577 enum machine_mode constant_modes[NR_C_MODES] =
4588 struct constant *next;
4593 struct constant_pool
4595 struct constant_pool *next;
4600 struct constant *constants[NR_C_MODES];
4605 static struct constant_pool * s390_mainpool_start (void);
4606 static void s390_mainpool_finish (struct constant_pool *);
4607 static void s390_mainpool_cancel (struct constant_pool *);
4609 static struct constant_pool * s390_chunkify_start (void);
4610 static void s390_chunkify_finish (struct constant_pool *);
4611 static void s390_chunkify_cancel (struct constant_pool *);
4613 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4614 static void s390_end_pool (struct constant_pool *, rtx);
4615 static void s390_add_pool_insn (struct constant_pool *, rtx);
4616 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4617 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4618 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4619 static rtx s390_dump_pool (struct constant_pool *, bool);
4620 static struct constant_pool *s390_alloc_pool (void);
4621 static void s390_free_pool (struct constant_pool *);
4623 /* Create new constant pool covering instructions starting at INSN
4624 and chain it to the end of POOL_LIST. */
4626 static struct constant_pool *
4627 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4629 struct constant_pool *pool, **prev;
4631 pool = s390_alloc_pool ();
4632 pool->first_insn = insn;
4634 for (prev = pool_list; *prev; prev = &(*prev)->next)
4641 /* End range of instructions covered by POOL at INSN and emit
4642 placeholder insn representing the pool. */
4645 s390_end_pool (struct constant_pool *pool, rtx insn)
4647 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4650 insn = get_last_insn ();
4652 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4653 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4656 /* Add INSN to the list of insns covered by POOL. */
4659 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4661 bitmap_set_bit (pool->insns, INSN_UID (insn));
4664 /* Return pool out of POOL_LIST that covers INSN. */
4666 static struct constant_pool *
4667 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4669 struct constant_pool *pool;
4671 for (pool = pool_list; pool; pool = pool->next)
4672 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4678 /* Add constant VAL of mode MODE to the constant pool POOL. */
4681 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4686 for (i = 0; i < NR_C_MODES; i++)
4687 if (constant_modes[i] == mode)
4689 if (i == NR_C_MODES)
4692 for (c = pool->constants[i]; c != NULL; c = c->next)
4693 if (rtx_equal_p (val, c->value))
4698 c = (struct constant *) xmalloc (sizeof *c);
4700 c->label = gen_label_rtx ();
4701 c->next = pool->constants[i];
4702 pool->constants[i] = c;
4703 pool->size += GET_MODE_SIZE (mode);
4707 /* Find constant VAL of mode MODE in the constant pool POOL.
4708 Return an RTX describing the distance from the start of
4709 the pool to the location of the new constant. */
4712 s390_find_constant (struct constant_pool *pool, rtx val,
4713 enum machine_mode mode)
4719 for (i = 0; i < NR_C_MODES; i++)
4720 if (constant_modes[i] == mode)
4722 if (i == NR_C_MODES)
4725 for (c = pool->constants[i]; c != NULL; c = c->next)
4726 if (rtx_equal_p (val, c->value))
4732 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4733 gen_rtx_LABEL_REF (Pmode, pool->label));
4734 offset = gen_rtx_CONST (Pmode, offset);
4738 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4739 do not emit the pool base label. */
4742 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4748 /* Pool start insn switches to proper section
4749 and guarantees necessary alignment. */
4750 if (TARGET_CPU_ZARCH)
4751 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4753 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4754 INSN_ADDRESSES_NEW (insn, -1);
4758 insn = emit_label_after (pool->label, insn);
4759 INSN_ADDRESSES_NEW (insn, -1);
4762 /* Dump constants in descending alignment requirement order,
4763 ensuring proper alignment for every constant. */
4764 for (i = 0; i < NR_C_MODES; i++)
4765 for (c = pool->constants[i]; c; c = c->next)
4767 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4768 rtx value = c->value;
4769 if (GET_CODE (value) == CONST
4770 && GET_CODE (XEXP (value, 0)) == UNSPEC
4771 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4772 && XVECLEN (XEXP (value, 0), 0) == 1)
4774 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4775 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4776 value = gen_rtx_CONST (VOIDmode, value);
4779 insn = emit_label_after (c->label, insn);
4780 INSN_ADDRESSES_NEW (insn, -1);
4782 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4783 gen_rtvec (1, value),
4784 UNSPECV_POOL_ENTRY);
4785 insn = emit_insn_after (value, insn);
4786 INSN_ADDRESSES_NEW (insn, -1);
4789 /* Pool end insn switches back to previous section
4790 and guarantees necessary alignment. */
4791 if (TARGET_CPU_ZARCH)
4792 insn = emit_insn_after (gen_pool_end_64 (), insn);
4794 insn = emit_insn_after (gen_pool_end_31 (), insn);
4795 INSN_ADDRESSES_NEW (insn, -1);
4797 insn = emit_barrier_after (insn);
4798 INSN_ADDRESSES_NEW (insn, -1);
4800 /* Remove placeholder insn. */
4801 remove_insn (pool->pool_insn);
4806 /* Allocate new constant_pool structure. */
4808 static struct constant_pool *
4809 s390_alloc_pool (void)
4811 struct constant_pool *pool;
4814 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4816 for (i = 0; i < NR_C_MODES; i++)
4817 pool->constants[i] = NULL;
4819 pool->label = gen_label_rtx ();
4820 pool->first_insn = NULL_RTX;
4821 pool->pool_insn = NULL_RTX;
4822 pool->insns = BITMAP_XMALLOC ();
4828 /* Free all memory used by POOL. */
4831 s390_free_pool (struct constant_pool *pool)
4835 for (i = 0; i < NR_C_MODES; i++)
4837 struct constant *c = pool->constants[i];
4840 struct constant *next = c->next;
4846 BITMAP_XFREE (pool->insns);
4851 /* Collect main literal pool. Return NULL on overflow. */
4853 static struct constant_pool *
4854 s390_mainpool_start (void)
4856 struct constant_pool *pool;
4859 pool = s390_alloc_pool ();
4861 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4863 if (GET_CODE (insn) == INSN
4864 && GET_CODE (PATTERN (insn)) == SET
4865 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC_VOLATILE
4866 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPECV_MAIN_POOL)
4868 if (pool->pool_insn)
4870 pool->pool_insn = insn;
4873 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4875 rtx pool_ref = NULL_RTX;
4876 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4879 rtx constant = get_pool_constant (pool_ref);
4880 enum machine_mode mode = get_pool_mode (pool_ref);
4881 s390_add_constant (pool, constant, mode);
4886 if (!pool->pool_insn)
4889 if (pool->size >= 4096)
4891 /* We're going to chunkify the pool, so remove the main
4892 pool placeholder insn. */
4893 remove_insn (pool->pool_insn);
4895 s390_free_pool (pool);
4902 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4903 Modify the current function to output the pool constants as well as
4904 the pool register setup instruction. */
4907 s390_mainpool_finish (struct constant_pool *pool)
4909 rtx base_reg = SET_DEST (PATTERN (pool->pool_insn));
4912 /* If the pool is empty, we're done. */
4913 if (pool->size == 0)
4915 remove_insn (pool->pool_insn);
4916 s390_free_pool (pool);
4920 /* We need correct insn addresses. */
4921 shorten_branches (get_insns ());
4923 /* On zSeries, we use a LARL to load the pool register. The pool is
4924 located in the .rodata section, so we emit it after the function. */
4925 if (TARGET_CPU_ZARCH)
4927 insn = gen_main_base_64 (base_reg, pool->label);
4928 insn = emit_insn_after (insn, pool->pool_insn);
4929 INSN_ADDRESSES_NEW (insn, -1);
4930 remove_insn (pool->pool_insn);
4932 insn = get_last_insn ();
4933 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4934 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4936 s390_dump_pool (pool, 0);
4939 /* On S/390, if the total size of the function's code plus literal pool
4940 does not exceed 4096 bytes, we use BASR to set up a function base
4941 pointer, and emit the literal pool at the end of the function. */
4942 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4943 + pool->size + 8 /* alignment slop */ < 4096)
4945 insn = gen_main_base_31_small (base_reg, pool->label);
4946 insn = emit_insn_after (insn, pool->pool_insn);
4947 INSN_ADDRESSES_NEW (insn, -1);
4948 remove_insn (pool->pool_insn);
4950 insn = emit_label_after (pool->label, insn);
4951 INSN_ADDRESSES_NEW (insn, -1);
4953 insn = get_last_insn ();
4954 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4955 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4957 s390_dump_pool (pool, 1);
4960 /* Otherwise, we emit an inline literal pool and use BASR to branch
4961 over it, setting up the pool register at the same time. */
4964 rtx pool_end = gen_label_rtx ();
4966 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4967 insn = emit_insn_after (insn, pool->pool_insn);
4968 INSN_ADDRESSES_NEW (insn, -1);
4969 remove_insn (pool->pool_insn);
4971 insn = emit_label_after (pool->label, insn);
4972 INSN_ADDRESSES_NEW (insn, -1);
4974 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4975 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4977 insn = emit_label_after (pool_end, pool->pool_insn);
4978 INSN_ADDRESSES_NEW (insn, -1);
4980 s390_dump_pool (pool, 1);
4984 /* Replace all literal pool references. */
4986 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4989 replace_ltrel_base (&PATTERN (insn));
4991 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4993 rtx addr, pool_ref = NULL_RTX;
4994 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4997 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4998 get_pool_mode (pool_ref));
4999 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5000 INSN_CODE (insn) = -1;
5006 /* Free the pool. */
5007 s390_free_pool (pool);
5010 /* POOL holds the main literal pool as collected by s390_mainpool_start.
5011 We have decided we cannot use this pool, so revert all changes
5012 to the current function that were done by s390_mainpool_start. */
5014 s390_mainpool_cancel (struct constant_pool *pool)
5016 /* We didn't actually change the instruction stream, so simply
5017 free the pool memory. */
5018 s390_free_pool (pool);
5022 /* Chunkify the literal pool. */
5024 #define S390_POOL_CHUNK_MIN 0xc00
5025 #define S390_POOL_CHUNK_MAX 0xe00
5027 static struct constant_pool *
5028 s390_chunkify_start (void)
5030 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
5033 rtx pending_ltrel = NULL_RTX;
5036 rtx (*gen_reload_base) (rtx, rtx) =
5037 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
5040 /* We need correct insn addresses. */
5042 shorten_branches (get_insns ());
5044 /* Scan all insns and move literals to pool chunks. */
5046 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5048 /* Check for pending LTREL_BASE. */
5051 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
5054 if (ltrel_base == pending_ltrel)
5055 pending_ltrel = NULL_RTX;
5061 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5063 rtx pool_ref = NULL_RTX;
5064 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5067 rtx constant = get_pool_constant (pool_ref);
5068 enum machine_mode mode = get_pool_mode (pool_ref);
5071 curr_pool = s390_start_pool (&pool_list, insn);
5073 s390_add_constant (curr_pool, constant, mode);
5074 s390_add_pool_insn (curr_pool, insn);
5076 /* Don't split the pool chunk between a LTREL_OFFSET load
5077 and the corresponding LTREL_BASE. */
5078 if (GET_CODE (constant) == CONST
5079 && GET_CODE (XEXP (constant, 0)) == UNSPEC
5080 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
5084 pending_ltrel = pool_ref;
5089 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
5092 s390_add_pool_insn (curr_pool, insn);
5093 /* An LTREL_BASE must follow within the same basic block. */
5099 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
5100 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
5103 if (TARGET_CPU_ZARCH)
5105 if (curr_pool->size < S390_POOL_CHUNK_MAX)
5108 s390_end_pool (curr_pool, NULL_RTX);
5113 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
5114 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
5117 /* We will later have to insert base register reload insns.
5118 Those will have an effect on code size, which we need to
5119 consider here. This calculation makes rather pessimistic
5120 worst-case assumptions. */
5121 if (GET_CODE (insn) == CODE_LABEL)
5124 if (chunk_size < S390_POOL_CHUNK_MIN
5125 && curr_pool->size < S390_POOL_CHUNK_MIN)
5128 /* Pool chunks can only be inserted after BARRIERs ... */
5129 if (GET_CODE (insn) == BARRIER)
5131 s390_end_pool (curr_pool, insn);
5136 /* ... so if we don't find one in time, create one. */
5137 else if ((chunk_size > S390_POOL_CHUNK_MAX
5138 || curr_pool->size > S390_POOL_CHUNK_MAX))
5140 rtx label, jump, barrier;
5142 /* We can insert the barrier only after a 'real' insn. */
5143 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
5145 if (get_attr_length (insn) == 0)
5148 /* Don't separate LTREL_BASE from the corresponding
5149 LTREL_OFFSET load. */
5153 label = gen_label_rtx ();
5154 jump = emit_jump_insn_after (gen_jump (label), insn);
5155 barrier = emit_barrier_after (jump);
5156 insn = emit_label_after (label, barrier);
5157 JUMP_LABEL (jump) = label;
5158 LABEL_NUSES (label) = 1;
5160 INSN_ADDRESSES_NEW (jump, -1);
5161 INSN_ADDRESSES_NEW (barrier, -1);
5162 INSN_ADDRESSES_NEW (insn, -1);
5164 s390_end_pool (curr_pool, barrier);
5172 s390_end_pool (curr_pool, NULL_RTX);
5177 /* Find all labels that are branched into
5178 from an insn belonging to a different chunk. */
5180 far_labels = BITMAP_XMALLOC ();
5182 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5184 /* Labels marked with LABEL_PRESERVE_P can be target
5185 of non-local jumps, so we have to mark them.
5186 The same holds for named labels.
5188 Don't do that, however, if it is the label before
5191 if (GET_CODE (insn) == CODE_LABEL
5192 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
5194 rtx vec_insn = next_real_insn (insn);
5195 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5196 PATTERN (vec_insn) : NULL_RTX;
5198 || !(GET_CODE (vec_pat) == ADDR_VEC
5199 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5200 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
5203 /* If we have a direct jump (conditional or unconditional)
5204 or a casesi jump, check all potential targets. */
5205 else if (GET_CODE (insn) == JUMP_INSN)
5207 rtx pat = PATTERN (insn);
5208 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
5209 pat = XVECEXP (pat, 0, 0);
5211 if (GET_CODE (pat) == SET)
5213 rtx label = JUMP_LABEL (insn);
5216 if (s390_find_pool (pool_list, label)
5217 != s390_find_pool (pool_list, insn))
5218 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5221 else if (GET_CODE (pat) == PARALLEL
5222 && XVECLEN (pat, 0) == 2
5223 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
5224 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
5225 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
5227 /* Find the jump table used by this casesi jump. */
5228 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
5229 rtx vec_insn = next_real_insn (vec_label);
5230 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
5231 PATTERN (vec_insn) : NULL_RTX;
5233 && (GET_CODE (vec_pat) == ADDR_VEC
5234 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
5236 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
5238 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
5240 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
5242 if (s390_find_pool (pool_list, label)
5243 != s390_find_pool (pool_list, insn))
5244 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
5251 /* Insert base register reload insns before every pool. */
5253 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5255 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5257 rtx insn = curr_pool->first_insn;
5258 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
5261 /* Insert base register reload insns at every far label. */
5263 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5264 if (GET_CODE (insn) == CODE_LABEL
5265 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
5267 struct constant_pool *pool = s390_find_pool (pool_list, insn);
5270 rtx new_insn = gen_reload_base (cfun->machine->base_reg,
5272 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
5277 BITMAP_XFREE (far_labels);
5280 /* Recompute insn addresses. */
5282 init_insn_lengths ();
5283 shorten_branches (get_insns ());
5288 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5289 After we have decided to use this list, finish implementing
5290 all changes to the current function as required. */
5293 s390_chunkify_finish (struct constant_pool *pool_list)
5295 struct constant_pool *curr_pool = NULL;
5299 /* Replace all literal pool references. */
5301 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5304 replace_ltrel_base (&PATTERN (insn));
5306 curr_pool = s390_find_pool (pool_list, insn);
5310 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5312 rtx addr, pool_ref = NULL_RTX;
5313 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5316 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
5317 get_pool_mode (pool_ref));
5318 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5319 INSN_CODE (insn) = -1;
5324 /* Dump out all literal pools. */
5326 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5327 s390_dump_pool (curr_pool, 0);
5329 /* Free pool list. */
5333 struct constant_pool *next = pool_list->next;
5334 s390_free_pool (pool_list);
5339 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5340 We have decided we cannot use this list, so revert all changes
5341 to the current function that were done by s390_chunkify_start. */
5344 s390_chunkify_cancel (struct constant_pool *pool_list)
5346 struct constant_pool *curr_pool = NULL;
5349 /* Remove all pool placeholder insns. */
5351 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5353 /* Did we insert an extra barrier? Remove it. */
5354 rtx barrier = PREV_INSN (curr_pool->pool_insn);
5355 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
5356 rtx label = NEXT_INSN (curr_pool->pool_insn);
5358 if (jump && GET_CODE (jump) == JUMP_INSN
5359 && barrier && GET_CODE (barrier) == BARRIER
5360 && label && GET_CODE (label) == CODE_LABEL
5361 && GET_CODE (PATTERN (jump)) == SET
5362 && SET_DEST (PATTERN (jump)) == pc_rtx
5363 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
5364 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
5367 remove_insn (barrier);
5368 remove_insn (label);
5371 remove_insn (curr_pool->pool_insn);
5374 /* Remove all base register reload insns. */
5376 for (insn = get_insns (); insn; )
5378 rtx next_insn = NEXT_INSN (insn);
5380 if (GET_CODE (insn) == INSN
5381 && GET_CODE (PATTERN (insn)) == SET
5382 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
5383 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
5389 /* Free pool list. */
5393 struct constant_pool *next = pool_list->next;
5394 s390_free_pool (pool_list);
5400 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
5403 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
5407 switch (GET_MODE_CLASS (mode))
5410 if (GET_CODE (exp) != CONST_DOUBLE)
5413 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
5414 assemble_real (r, mode, align);
5418 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5427 /* Rework the prologue/epilogue to avoid saving/restoring
5428 registers unnecessarily. BASE_USED specifies whether
5429 the literal pool base register needs to be saved. */
5432 s390_optimize_prologue (bool base_used)
5434 rtx insn, new_insn, next_insn;
5436 /* Do a final recompute of the frame-related data. */
5438 s390_register_info (base_used, cfun_frame_layout.save_return_addr_p);
5439 regs_ever_live[BASE_REGNUM] = base_used;
5440 regs_ever_live[RETURN_REGNUM] = cfun_frame_layout.save_return_addr_p;
5441 regs_ever_live[STACK_POINTER_REGNUM] = cfun_frame_layout.frame_size > 0;
5443 /* If all special registers are in fact used, there's nothing we
5444 can do, so no point in walking the insn list. */
5446 if (cfun_frame_layout.first_save_gpr <= BASE_REGNUM
5447 && cfun_frame_layout.last_save_gpr >= BASE_REGNUM
5448 && (TARGET_CPU_ZARCH
5449 || (cfun_frame_layout.first_save_gpr <= RETURN_REGNUM
5450 && cfun_frame_layout.last_save_gpr >= RETURN_REGNUM)))
5453 /* Search for prologue/epilogue insns and replace them. */
5455 for (insn = get_insns (); insn; insn = next_insn)
5457 int first, last, off;
5458 rtx set, base, offset;
5460 next_insn = NEXT_INSN (insn);
5462 if (GET_CODE (insn) != INSN)
5465 if (GET_CODE (PATTERN (insn)) == PARALLEL
5466 && store_multiple_operation (PATTERN (insn), VOIDmode))
5468 set = XVECEXP (PATTERN (insn), 0, 0);
5469 first = REGNO (SET_SRC (set));
5470 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5471 offset = const0_rtx;
5472 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5473 off = INTVAL (offset);
5475 if (GET_CODE (base) != REG || off < 0)
5477 if (REGNO (base) != STACK_POINTER_REGNUM
5478 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5480 if (first > BASE_REGNUM || last < BASE_REGNUM)
5483 if (cfun_frame_layout.first_save_gpr != -1)
5485 new_insn = save_gprs (base,
5486 off + (cfun_frame_layout.first_save_gpr
5487 - first) * UNITS_PER_WORD,
5488 cfun_frame_layout.first_save_gpr,
5489 cfun_frame_layout.last_save_gpr);
5490 new_insn = emit_insn_before (new_insn, insn);
5491 INSN_ADDRESSES_NEW (new_insn, -1);
5498 if (GET_CODE (PATTERN (insn)) == SET
5499 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5500 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGNUM
5501 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5503 set = PATTERN (insn);
5504 offset = const0_rtx;
5505 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5506 off = INTVAL (offset);
5508 if (GET_CODE (base) != REG || off < 0)
5510 if (REGNO (base) != STACK_POINTER_REGNUM
5511 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5513 if (cfun_frame_layout.first_save_gpr != -1)
5515 new_insn = save_gprs (base,
5516 off + (cfun_frame_layout.first_save_gpr
5517 - BASE_REGNUM) * UNITS_PER_WORD,
5518 cfun_frame_layout.first_save_gpr,
5519 cfun_frame_layout.last_save_gpr);
5520 new_insn = emit_insn_before (new_insn, insn);
5521 INSN_ADDRESSES_NEW (new_insn, -1);
5528 if (GET_CODE (PATTERN (insn)) == PARALLEL
5529 && load_multiple_operation (PATTERN (insn), VOIDmode))
5531 set = XVECEXP (PATTERN (insn), 0, 0);
5532 first = REGNO (SET_DEST (set));
5533 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5534 offset = const0_rtx;
5535 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5536 off = INTVAL (offset);
5538 if (GET_CODE (base) != REG || off < 0)
5540 if (REGNO (base) != STACK_POINTER_REGNUM
5541 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5543 if (first > BASE_REGNUM || last < BASE_REGNUM)
5546 if (cfun_frame_layout.first_restore_gpr != -1)
5548 new_insn = restore_gprs (base,
5549 off + (cfun_frame_layout.first_restore_gpr
5550 - first) * UNITS_PER_WORD,
5551 cfun_frame_layout.first_restore_gpr,
5552 cfun_frame_layout.last_restore_gpr);
5553 new_insn = emit_insn_before (new_insn, insn);
5554 INSN_ADDRESSES_NEW (new_insn, -1);
5561 if (GET_CODE (PATTERN (insn)) == SET
5562 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5563 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGNUM
5564 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5566 set = PATTERN (insn);
5567 offset = const0_rtx;
5568 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5569 off = INTVAL (offset);
5571 if (GET_CODE (base) != REG || off < 0)
5573 if (REGNO (base) != STACK_POINTER_REGNUM
5574 && REGNO (base) != HARD_FRAME_POINTER_REGNUM)
5576 if (cfun_frame_layout.first_restore_gpr != -1)
5578 new_insn = restore_gprs (base,
5579 off + (cfun_frame_layout.first_restore_gpr
5580 - BASE_REGNUM) * UNITS_PER_WORD,
5581 cfun_frame_layout.first_restore_gpr,
5582 cfun_frame_layout.last_restore_gpr);
5583 new_insn = emit_insn_before (new_insn, insn);
5584 INSN_ADDRESSES_NEW (new_insn, -1);
5593 /* Perform machine-dependent processing. */
5598 bool base_used = false;
5599 bool pool_overflow = false;
5601 /* Make sure all splits have been performed; splits after
5602 machine_dependent_reorg might confuse insn length counts. */
5603 split_all_insns_noflow ();
5606 /* Install the main literal pool and the associated base
5607 register load insns.
5609 In addition, there are two problematic situations we need
5612 - the literal pool might be > 4096 bytes in size, so that
5613 some of its elements cannot be directly accessed
5615 - a branch target might be > 64K away from the branch, so that
5616 it is not possible to use a PC-relative instruction.
5618 To fix those, we split the single literal pool into multiple
5619 pool chunks, reloading the pool base register at various
5620 points throughout the function to ensure it always points to
5621 the pool chunk the following code expects, and / or replace
5622 PC-relative branches by absolute branches.
5624 However, the two problems are interdependent: splitting the
5625 literal pool can move a branch further away from its target,
5626 causing the 64K limit to overflow, and on the other hand,
5627 replacing a PC-relative branch by an absolute branch means
5628 we need to put the branch target address into the literal
5629 pool, possibly causing it to overflow.
5631 So, we loop trying to fix up both problems until we manage
5632 to satisfy both conditions at the same time. Note that the
5633 loop is guaranteed to terminate as every pass of the loop
5634 strictly decreases the total number of PC-relative branches
5635 in the function. (This is not completely true as there
5636 might be branch-over-pool insns introduced by chunkify_start.
5637 Those never need to be split however.) */
5641 struct constant_pool *pool = NULL;
5643 /* Collect the literal pool. */
5646 pool = s390_mainpool_start ();
5648 pool_overflow = true;
5651 /* If literal pool overflowed, start to chunkify it. */
5653 pool = s390_chunkify_start ();
5655 /* Split out-of-range branches. If this has created new
5656 literal pool entries, cancel current chunk list and
5657 recompute it. zSeries machines have large branch
5658 instructions, so we never need to split a branch. */
5659 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5662 s390_chunkify_cancel (pool);
5664 s390_mainpool_cancel (pool);
5669 /* If we made it up to here, both conditions are satisfied.
5670 Finish up literal pool related changes. */
5671 if ((pool_overflow || pool->size > 0)
5672 && REGNO (cfun->machine->base_reg) == BASE_REGNUM)
5676 s390_chunkify_finish (pool);
5678 s390_mainpool_finish (pool);
5683 s390_optimize_prologue (base_used);
5687 /* Return an RTL expression representing the value of the return address
5688 for the frame COUNT steps up from the current frame. FRAME is the
5689 frame pointer of that frame. */
5692 s390_return_addr_rtx (int count, rtx frame ATTRIBUTE_UNUSED)
5697 /* Without backchain, we fail for all but the current frame. */
5699 if (!TARGET_BACKCHAIN && !TARGET_KERNEL_BACKCHAIN && count > 0)
5702 /* For the current frame, we need to make sure the initial
5703 value of RETURN_REGNUM is actually saved. */
5707 cfun_frame_layout.save_return_addr_p = true;
5708 return gen_rtx_MEM (Pmode, return_address_pointer_rtx);
5711 if (TARGET_BACKCHAIN)
5712 offset = RETURN_REGNUM * UNITS_PER_WORD;
5714 offset = -2 * UNITS_PER_WORD;
5716 addr = plus_constant (frame, offset);
5717 addr = memory_address (Pmode, addr);
5718 return gen_rtx_MEM (Pmode, addr);
5721 /* Find first call clobbered register unused in a function.
5722 This could be used as base register in a leaf function
5723 or for holding the return address before epilogue. */
5726 find_unused_clobbered_reg (void)
5729 for (i = 0; i < 6; i++)
5730 if (!regs_ever_live[i])
5735 /* Determine the frame area which actually has to be accessed
5736 in the function epilogue. The values are stored at the
5737 given pointers AREA_BOTTOM (address of the lowest used stack
5738 address) and AREA_TOP (address of the first item which does
5739 not belong to the stack frame). */
5742 s390_frame_area (int *area_bottom, int *area_top)
5750 if (cfun_frame_layout.first_restore_gpr != -1)
5752 b = (cfun_frame_layout.gprs_offset
5753 + cfun_frame_layout.first_restore_gpr * UNITS_PER_WORD);
5754 t = b + (cfun_frame_layout.last_restore_gpr
5755 - cfun_frame_layout.first_restore_gpr + 1) * UNITS_PER_WORD;
5758 if (TARGET_64BIT && cfun_save_high_fprs_p)
5760 b = MIN (b, cfun_frame_layout.f8_offset);
5761 t = MAX (t, (cfun_frame_layout.f8_offset
5762 + cfun_frame_layout.high_fprs * 8));
5766 for (i = 2; i < 4; i++)
5767 if (cfun_fpr_bit_p (i))
5769 b = MIN (b, cfun_frame_layout.f4_offset + (i - 2) * 8);
5770 t = MAX (t, cfun_frame_layout.f4_offset + (i - 1) * 8);
5777 /* Fill cfun->machine with info about register usage of current
5778 function. BASE_USED and RETURN_ADDR_USED specify whether we assume the
5779 base and return address register will need to be saved. */
5782 s390_register_info (int base_used, int return_addr_used)
5787 /* fprs 8 - 15 are call saved for 64 Bit ABI. */
5788 cfun_frame_layout.fpr_bitmap = 0;
5789 cfun_frame_layout.high_fprs = 0;
5791 for (i = 24; i < 32; i++)
5792 if (regs_ever_live[i] && !global_regs[i])
5794 cfun_set_fpr_bit (i - 16);
5795 cfun_frame_layout.high_fprs++;
5798 /* Find first and last gpr to be saved. We trust regs_ever_live
5799 data, except that we don't save and restore global registers.
5801 Also, all registers with special meaning to the compiler need
5802 to be handled extra. */
5804 for (i = 0; i < 16; i++)
5805 live_regs[i] = regs_ever_live[i] && !global_regs[i];
5808 live_regs[PIC_OFFSET_TABLE_REGNUM] =
5809 regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
5811 live_regs[BASE_REGNUM] = base_used;
5812 live_regs[RETURN_REGNUM] = return_addr_used;
5813 live_regs[STACK_POINTER_REGNUM] = (!current_function_is_leaf
5814 || TARGET_TPF_PROFILING
5815 || cfun_save_high_fprs_p
5816 || get_frame_size () > 0
5817 || current_function_calls_alloca
5818 || current_function_stdarg);
5820 for (i = 6; i < 16; i++)
5823 for (j = 15; j > i; j--)
5829 /* Nothing to save/restore. */
5830 cfun_frame_layout.first_save_gpr = -1;
5831 cfun_frame_layout.first_restore_gpr = -1;
5832 cfun_frame_layout.last_save_gpr = -1;
5833 cfun_frame_layout.last_restore_gpr = -1;
5837 /* Save / Restore from gpr i to j. */
5838 cfun_frame_layout.first_save_gpr = i;
5839 cfun_frame_layout.first_restore_gpr = i;
5840 cfun_frame_layout.last_save_gpr = j;
5841 cfun_frame_layout.last_restore_gpr = j;
5844 if (current_function_stdarg)
5846 /* Varargs functions need to save gprs 2 to 6. */
5847 if (cfun_frame_layout.first_save_gpr == -1
5848 || cfun_frame_layout.first_save_gpr > 2)
5849 cfun_frame_layout.first_save_gpr = 2;
5851 if (cfun_frame_layout.last_save_gpr == -1
5852 || cfun_frame_layout.last_save_gpr < 6)
5853 cfun_frame_layout.last_save_gpr = 6;
5855 /* Mark f0, f2 for 31 bit and f0-f4 for 64 bit to be saved. */
5856 for (i = 0; i < (TARGET_64BIT ? 4 : 2); i++)
5857 cfun_set_fpr_bit (i);
5861 for (i = 2; i < 4; i++)
5862 if (regs_ever_live[i + 16] && !global_regs[i + 16])
5863 cfun_set_fpr_bit (i);
5866 /* Fill cfun->machine with info about frame of current
5867 function. BASE_USED and RETURN_ADDR_USED specify whether we assume the
5868 base and return address register will need to be saved. */
5871 s390_frame_info (int base_used, int return_addr_used)
5875 cfun_frame_layout.frame_size = get_frame_size ();
5877 s390_register_info (base_used, return_addr_used);
5879 if (!TARGET_64BIT && cfun_frame_layout.frame_size > 0x7fff0000)
5880 fatal_error ("Total size of local variables exceeds architecture limit.");
5882 cfun_frame_layout.save_backchain_p = (TARGET_BACKCHAIN
5883 || TARGET_KERNEL_BACKCHAIN);
5885 if (TARGET_BACKCHAIN)
5887 cfun_frame_layout.backchain_offset = 0;
5888 cfun_frame_layout.f0_offset = 16 * UNITS_PER_WORD;
5889 cfun_frame_layout.f4_offset = cfun_frame_layout.f0_offset + 2 * 8;
5890 cfun_frame_layout.f8_offset = -cfun_frame_layout.high_fprs * 8;
5891 cfun_frame_layout.gprs_offset = (cfun_frame_layout.first_save_gpr
5894 else if (TARGET_KERNEL_BACKCHAIN)
5896 cfun_frame_layout.backchain_offset = (STACK_POINTER_OFFSET
5898 cfun_frame_layout.gprs_offset
5899 = (cfun_frame_layout.backchain_offset
5900 - (STACK_POINTER_REGNUM - cfun_frame_layout.first_save_gpr + 1)
5905 cfun_frame_layout.f4_offset
5906 = (cfun_frame_layout.gprs_offset
5907 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
5909 cfun_frame_layout.f0_offset
5910 = (cfun_frame_layout.f4_offset
5911 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
5915 cfun_frame_layout.f0_offset
5916 = (cfun_frame_layout.gprs_offset
5917 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
5919 cfun_frame_layout.f4_offset
5920 = (cfun_frame_layout.f0_offset
5921 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
5924 else /* no backchain */
5926 cfun_frame_layout.f4_offset
5927 = (STACK_POINTER_OFFSET
5928 - 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
5930 cfun_frame_layout.f0_offset
5931 = (cfun_frame_layout.f4_offset
5932 - 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
5934 cfun_frame_layout.gprs_offset
5935 = cfun_frame_layout.f0_offset - cfun_gprs_save_area_size;
5938 if (current_function_is_leaf
5939 && !TARGET_TPF_PROFILING
5940 && cfun_frame_layout.frame_size == 0
5941 && !cfun_save_high_fprs_p
5942 && !current_function_calls_alloca
5943 && !current_function_stdarg)
5946 if (TARGET_BACKCHAIN)
5947 cfun_frame_layout.frame_size += (STARTING_FRAME_OFFSET
5948 + cfun_frame_layout.high_fprs * 8);
5951 cfun_frame_layout.frame_size += (cfun_frame_layout.save_backchain_p
5954 cfun_frame_layout.f8_offset = (MIN (MIN (cfun_frame_layout.f0_offset,
5955 cfun_frame_layout.f4_offset),
5956 cfun_frame_layout.gprs_offset)
5957 - cfun_frame_layout.high_fprs * 8);
5959 cfun_frame_layout.frame_size += cfun_frame_layout.high_fprs * 8;
5961 for (i = 0; i < 8; i++)
5962 if (cfun_fpr_bit_p (i))
5963 cfun_frame_layout.frame_size += 8;
5965 cfun_frame_layout.frame_size += cfun_gprs_save_area_size;
5966 cfun_frame_layout.frame_size = ((cfun_frame_layout.frame_size +
5967 STACK_BOUNDARY / BITS_PER_UNIT - 1)
5968 & ~(STACK_BOUNDARY / BITS_PER_UNIT - 1));
5970 cfun_frame_layout.frame_size += current_function_outgoing_args_size;
5974 /* Return offset between argument pointer and frame pointer
5975 initially after prologue. */
5978 s390_arg_frame_offset (void)
5980 /* See the comment in s390_emit_prologue about the assumptions we make
5981 whether or not the base and return address register need to be saved. */
5982 int return_addr_used = !current_function_is_leaf
5983 || TARGET_TPF_PROFILING
5984 || regs_ever_live[RETURN_REGNUM]
5985 || cfun_frame_layout.save_return_addr_p;
5987 s390_frame_info (1, !TARGET_CPU_ZARCH || return_addr_used);
5989 return cfun_frame_layout.frame_size + STACK_POINTER_OFFSET;
5992 /* Return offset between return address pointer (location of r14
5993 on the stack) and frame pointer initially after prologue. */
5996 s390_return_address_offset (void)
5998 s390_frame_info (1, 1);
6000 if (cfun_frame_layout.last_save_gpr < RETURN_REGNUM)
6003 return (cfun_frame_layout.frame_size + cfun_frame_layout.gprs_offset
6004 + (RETURN_REGNUM - cfun_frame_layout.first_save_gpr) * UNITS_PER_WORD);
6007 /* Emit insn to save fpr REGNUM at offset OFFSET relative
6008 to register BASE. Return generated insn. */
6011 save_fpr (rtx base, int offset, int regnum)
6014 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6015 set_mem_alias_set (addr, s390_sr_alias_set);
6017 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
6020 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
6021 to register BASE. Return generated insn. */
6024 restore_fpr (rtx base, int offset, int regnum)
6027 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
6028 set_mem_alias_set (addr, s390_sr_alias_set);
6030 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
6033 /* Generate insn to save registers FIRST to LAST into
6034 the register save area located at offset OFFSET
6035 relative to register BASE. */
6038 save_gprs (rtx base, int offset, int first, int last)
6040 rtx addr, insn, note;
6043 addr = plus_constant (base, offset);
6044 addr = gen_rtx_MEM (Pmode, addr);
6045 set_mem_alias_set (addr, s390_sr_alias_set);
6047 /* Special-case single register. */
6051 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
6053 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
6055 RTX_FRAME_RELATED_P (insn) = 1;
6060 insn = gen_store_multiple (addr,
6061 gen_rtx_REG (Pmode, first),
6062 GEN_INT (last - first + 1));
6065 /* We need to set the FRAME_RELATED flag on all SETs
6066 inside the store-multiple pattern.
6068 However, we must not emit DWARF records for registers 2..5
6069 if they are stored for use by variable arguments ...
6071 ??? Unfortunately, it is not enough to simply not the the
6072 FRAME_RELATED flags for those SETs, because the first SET
6073 of the PARALLEL is always treated as if it had the flag
6074 set, even if it does not. Therefore we emit a new pattern
6075 without those registers as REG_FRAME_RELATED_EXPR note. */
6079 rtx pat = PATTERN (insn);
6081 for (i = 0; i < XVECLEN (pat, 0); i++)
6082 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
6083 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
6085 RTX_FRAME_RELATED_P (insn) = 1;
6089 addr = plus_constant (base, offset + (6 - first) * UNITS_PER_WORD);
6090 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
6091 gen_rtx_REG (Pmode, 6),
6092 GEN_INT (last - 6 + 1));
6093 note = PATTERN (note);
6096 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6097 note, REG_NOTES (insn));
6099 for (i = 0; i < XVECLEN (note, 0); i++)
6100 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
6101 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
6103 RTX_FRAME_RELATED_P (insn) = 1;
6109 /* Generate insn to restore registers FIRST to LAST from
6110 the register save area located at offset OFFSET
6111 relative to register BASE. */
6114 restore_gprs (rtx base, int offset, int first, int last)
6118 addr = plus_constant (base, offset);
6119 addr = gen_rtx_MEM (Pmode, addr);
6120 set_mem_alias_set (addr, s390_sr_alias_set);
6122 /* Special-case single register. */
6126 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
6128 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
6133 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
6135 GEN_INT (last - first + 1));
6139 /* Return insn sequence to load the GOT register. */
6141 static GTY(()) rtx got_symbol;
6143 s390_load_got (void)
6149 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
6150 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
6155 if (TARGET_CPU_ZARCH)
6157 emit_move_insn (pic_offset_table_rtx, got_symbol);
6163 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
6164 UNSPEC_LTREL_OFFSET);
6165 offset = gen_rtx_CONST (Pmode, offset);
6166 offset = force_const_mem (Pmode, offset);
6168 emit_move_insn (pic_offset_table_rtx, offset);
6170 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
6172 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
6174 emit_move_insn (pic_offset_table_rtx, offset);
6177 insns = get_insns ();
6182 /* Expand the prologue into a bunch of separate insns. */
6185 s390_emit_prologue (void)
6193 /* At this point, we decide whether we'll need to save/restore the
6194 return address register. This decision is final on zSeries machines;
6195 on S/390 it can still be overridden in s390_split_branches. */
6197 if (!current_function_is_leaf
6198 || TARGET_TPF_PROFILING
6199 || regs_ever_live[RETURN_REGNUM])
6200 cfun_frame_layout.save_return_addr_p = 1;
6202 /* Decide which register to use as literal pool base. In small leaf
6203 functions, try to use an unused call-clobbered register as base
6204 register to avoid save/restore overhead. */
6206 if (current_function_is_leaf && !regs_ever_live[5])
6207 cfun->machine->base_reg = gen_rtx_REG (Pmode, 5);
6209 cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM);
6211 regs_ever_live[REGNO (cfun->machine->base_reg)] = 1;
6213 /* Compute frame info. Note that at this point, we assume the base
6214 register and -on S/390- the return register always need to be saved.
6215 This is done because the usage of these registers might change even
6216 after the prologue was emitted. If it turns out later that we really
6217 don't need them, the prologue/epilogue code is modified again. */
6219 s390_frame_info (1, !TARGET_CPU_ZARCH
6220 || cfun_frame_layout.save_return_addr_p);
6222 /* We need to update regs_ever_live to avoid data-flow problems. */
6224 regs_ever_live[BASE_REGNUM] = 1;
6225 regs_ever_live[RETURN_REGNUM] = (!TARGET_CPU_ZARCH
6226 || cfun_frame_layout.save_return_addr_p);
6227 regs_ever_live[STACK_POINTER_REGNUM] = cfun_frame_layout.frame_size > 0;
6229 /* Annotate all constant pool references to let the scheduler know
6230 they implicitly use the base register. */
6232 push_topmost_sequence ();
6234 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
6236 annotate_constant_pool_refs (&PATTERN (insn));
6238 pop_topmost_sequence ();
6240 /* Choose best register to use for temp use within prologue.
6241 See below for why TPF must use the register 1. */
6243 if (!current_function_is_leaf && !TARGET_TPF_PROFILING)
6244 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6246 temp_reg = gen_rtx_REG (Pmode, 1);
6248 /* Save call saved gprs. */
6249 if (cfun_frame_layout.first_save_gpr != -1)
6250 insn = save_gprs (stack_pointer_rtx,
6251 cfun_frame_layout.gprs_offset,
6252 cfun_frame_layout.first_save_gpr,
6253 cfun_frame_layout.last_save_gpr);
6256 /* Dummy insn to mark literal pool slot. */
6258 emit_insn (gen_main_pool (cfun->machine->base_reg));
6260 offset = cfun_frame_layout.f0_offset;
6262 /* Save f0 and f2. */
6263 for (i = 0; i < 2; i++)
6265 if (cfun_fpr_bit_p (i))
6267 save_fpr (stack_pointer_rtx, offset, i + 16);
6270 else if (TARGET_BACKCHAIN)
6274 /* Save f4 and f6. */
6275 offset = cfun_frame_layout.f4_offset;
6276 for (i = 2; i < 4; i++)
6278 if (cfun_fpr_bit_p (i))
6280 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6283 /* If f4 and f6 are call clobbered they are saved due to stdargs and
6284 therefore are not frame related. */
6285 if (!call_really_used_regs[i + 16])
6286 RTX_FRAME_RELATED_P (insn) = 1;
6288 else if (TARGET_BACKCHAIN)
6292 if (!TARGET_BACKCHAIN
6293 && cfun_save_high_fprs_p
6294 && cfun_frame_layout.f8_offset + cfun_frame_layout.high_fprs * 8 > 0)
6296 offset = (cfun_frame_layout.f8_offset
6297 + (cfun_frame_layout.high_fprs - 1) * 8);
6299 for (i = 15; i > 7 && offset >= 0; i--)
6300 if (cfun_fpr_bit_p (i))
6302 insn = save_fpr (stack_pointer_rtx, offset, i + 16);
6304 RTX_FRAME_RELATED_P (insn) = 1;
6307 if (offset >= cfun_frame_layout.f8_offset)
6311 if (TARGET_BACKCHAIN)
6312 next_fpr = cfun_save_high_fprs_p ? 31 : 0;
6314 /* Decrement stack pointer. */
6316 if (cfun_frame_layout.frame_size > 0)
6318 rtx frame_off = GEN_INT (-cfun_frame_layout.frame_size);
6320 if (s390_stack_size)
6322 HOST_WIDE_INT stack_check_mask = ((s390_stack_size - 1)
6323 & ~(s390_stack_guard - 1));
6324 rtx t = gen_rtx_AND (Pmode, stack_pointer_rtx,
6325 GEN_INT (stack_check_mask));
6328 gen_cmpdi (t, const0_rtx);
6330 gen_cmpsi (t, const0_rtx);
6332 emit_insn (gen_conditional_trap (gen_rtx_EQ (CCmode,
6333 gen_rtx_REG (CCmode,
6339 if (s390_warn_framesize > 0
6340 && cfun_frame_layout.frame_size >= s390_warn_framesize)
6341 warning ("frame size of `%s' is " HOST_WIDE_INT_PRINT_DEC " bytes",
6342 current_function_name (), cfun_frame_layout.frame_size);
6344 if (s390_warn_dynamicstack_p && cfun->calls_alloca)
6345 warning ("`%s' uses dynamic stack allocation", current_function_name ());
6347 /* Save incoming stack pointer into temp reg. */
6348 if (cfun_frame_layout.save_backchain_p || next_fpr)
6349 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
6351 /* Subtract frame size from stack pointer. */
6353 if (DISP_IN_RANGE (INTVAL (frame_off)))
6355 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6356 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6358 insn = emit_insn (insn);
6362 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6363 frame_off = force_const_mem (Pmode, frame_off);
6365 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
6366 annotate_constant_pool_refs (&PATTERN (insn));
6369 RTX_FRAME_RELATED_P (insn) = 1;
6371 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6372 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
6373 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
6374 GEN_INT (-cfun_frame_layout.frame_size))),
6377 /* Set backchain. */
6379 if (cfun_frame_layout.save_backchain_p)
6381 if (cfun_frame_layout.backchain_offset)
6382 addr = gen_rtx_MEM (Pmode,
6383 plus_constant (stack_pointer_rtx,
6384 cfun_frame_layout.backchain_offset));
6386 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
6387 set_mem_alias_set (addr, s390_sr_alias_set);
6388 insn = emit_insn (gen_move_insn (addr, temp_reg));
6391 /* If we support asynchronous exceptions (e.g. for Java),
6392 we need to make sure the backchain pointer is set up
6393 before any possibly trapping memory access. */
6395 if (cfun_frame_layout.save_backchain_p && flag_non_call_exceptions)
6397 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
6398 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
6402 /* Save fprs 8 - 15 (64 bit ABI). */
6404 if (cfun_save_high_fprs_p && next_fpr)
6406 insn = emit_insn (gen_add2_insn (temp_reg,
6407 GEN_INT (cfun_frame_layout.f8_offset)));
6411 for (i = 24; i <= next_fpr; i++)
6412 if (cfun_fpr_bit_p (i - 16))
6414 rtx addr = plus_constant (stack_pointer_rtx,
6415 cfun_frame_layout.frame_size
6416 + cfun_frame_layout.f8_offset
6419 insn = save_fpr (temp_reg, offset, i);
6421 RTX_FRAME_RELATED_P (insn) = 1;
6423 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
6424 gen_rtx_SET (VOIDmode,
6425 gen_rtx_MEM (DFmode, addr),
6426 gen_rtx_REG (DFmode, i)),
6431 /* Set frame pointer, if needed. */
6433 if (frame_pointer_needed)
6435 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
6436 RTX_FRAME_RELATED_P (insn) = 1;
6439 /* Set up got pointer, if needed. */
6441 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
6443 rtx insns = s390_load_got ();
6445 for (insn = insns; insn; insn = NEXT_INSN (insn))
6447 annotate_constant_pool_refs (&PATTERN (insn));
6449 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
6456 if (TARGET_TPF_PROFILING)
6458 /* Generate a BAS instruction to serve as a function
6459 entry intercept to facilitate the use of tracing
6460 algorithms located at the branch target. */
6461 emit_insn (gen_prologue_tpf ());
6463 /* Emit a blockage here so that all code
6464 lies between the profiling mechanisms. */
6465 emit_insn (gen_blockage ());
6469 /* Expand the epilogue into a bunch of separate insns. */
6472 s390_emit_epilogue (bool sibcall)
6474 rtx frame_pointer, return_reg;
6475 int area_bottom, area_top, offset = 0;
6480 if (TARGET_TPF_PROFILING)
6483 /* Generate a BAS instruction to serve as a function
6484 entry intercept to facilitate the use of tracing
6485 algorithms located at the branch target. */
6487 /* Emit a blockage here so that all code
6488 lies between the profiling mechanisms. */
6489 emit_insn (gen_blockage ());
6491 emit_insn (gen_epilogue_tpf ());
6494 /* Check whether to use frame or stack pointer for restore. */
6496 frame_pointer = (frame_pointer_needed
6497 ? hard_frame_pointer_rtx : stack_pointer_rtx);
6499 s390_frame_area (&area_bottom, &area_top);
6501 /* Check whether we can access the register save area.
6502 If not, increment the frame pointer as required. */
6504 if (area_top <= area_bottom)
6506 /* Nothing to restore. */
6508 else if (DISP_IN_RANGE (cfun_frame_layout.frame_size + area_bottom)
6509 && DISP_IN_RANGE (cfun_frame_layout.frame_size + area_top - 1))
6511 /* Area is in range. */
6512 offset = cfun_frame_layout.frame_size;
6516 rtx insn, frame_off;
6518 offset = area_bottom < 0 ? -area_bottom : 0;
6519 frame_off = GEN_INT (cfun_frame_layout.frame_size - offset);
6521 if (DISP_IN_RANGE (INTVAL (frame_off)))
6523 insn = gen_rtx_SET (VOIDmode, frame_pointer,
6524 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
6525 insn = emit_insn (insn);
6529 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
6530 frame_off = force_const_mem (Pmode, frame_off);
6532 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
6533 annotate_constant_pool_refs (&PATTERN (insn));
6537 /* Restore call saved fprs. */
6541 if (cfun_save_high_fprs_p)
6543 next_offset = cfun_frame_layout.f8_offset;
6544 for (i = 24; i < 32; i++)
6546 if (cfun_fpr_bit_p (i - 16))
6548 restore_fpr (frame_pointer,
6549 offset + next_offset, i);
6558 next_offset = cfun_frame_layout.f4_offset;
6559 for (i = 18; i < 20; i++)
6561 if (cfun_fpr_bit_p (i - 16))
6563 restore_fpr (frame_pointer,
6564 offset + next_offset, i);
6567 else if (TARGET_BACKCHAIN)
6573 /* Return register. */
6575 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
6577 /* Restore call saved gprs. */
6579 if (cfun_frame_layout.first_restore_gpr != -1)
6584 /* Check for global register and save them
6585 to stack location from where they get restored. */
6587 for (i = cfun_frame_layout.first_restore_gpr;
6588 i <= cfun_frame_layout.last_restore_gpr;
6591 /* These registers are special and need to be
6592 restored in any case. */
6593 if (i == STACK_POINTER_REGNUM
6594 || i == RETURN_REGNUM
6596 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
6601 addr = plus_constant (frame_pointer,
6602 offset + cfun_frame_layout.gprs_offset
6603 + (i - cfun_frame_layout.first_save_gpr)
6605 addr = gen_rtx_MEM (Pmode, addr);
6606 set_mem_alias_set (addr, s390_sr_alias_set);
6607 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
6613 /* Fetch return address from stack before load multiple,
6614 this will do good for scheduling. */
6616 if (cfun_frame_layout.save_return_addr_p
6617 || (cfun_frame_layout.first_restore_gpr < BASE_REGNUM
6618 && cfun_frame_layout.last_restore_gpr > RETURN_REGNUM))
6620 int return_regnum = find_unused_clobbered_reg();
6623 return_reg = gen_rtx_REG (Pmode, return_regnum);
6625 addr = plus_constant (frame_pointer,
6626 offset + cfun_frame_layout.gprs_offset
6628 - cfun_frame_layout.first_save_gpr)
6630 addr = gen_rtx_MEM (Pmode, addr);
6631 set_mem_alias_set (addr, s390_sr_alias_set);
6632 emit_move_insn (return_reg, addr);
6636 insn = restore_gprs (frame_pointer,
6637 offset + cfun_frame_layout.gprs_offset
6638 + (cfun_frame_layout.first_restore_gpr
6639 - cfun_frame_layout.first_save_gpr)
6641 cfun_frame_layout.first_restore_gpr,
6642 cfun_frame_layout.last_restore_gpr);
6649 /* Return to caller. */
6651 p = rtvec_alloc (2);
6653 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
6654 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
6655 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
6660 /* Return the size in bytes of a function argument of
6661 type TYPE and/or mode MODE. At least one of TYPE or
6662 MODE must be specified. */
6665 s390_function_arg_size (enum machine_mode mode, tree type)
6668 return int_size_in_bytes (type);
6670 /* No type info available for some library calls ... */
6671 if (mode != BLKmode)
6672 return GET_MODE_SIZE (mode);
6674 /* If we have neither type nor mode, abort */
6678 /* Return true if a function argument of type TYPE and mode MODE
6679 is to be passed in a floating-point register, if available. */
6682 s390_function_arg_float (enum machine_mode mode, tree type)
6684 int size = s390_function_arg_size (mode, type);
6688 /* Soft-float changes the ABI: no floating-point registers are used. */
6689 if (TARGET_SOFT_FLOAT)
6692 /* No type info available for some library calls ... */
6694 return mode == SFmode || mode == DFmode;
6696 /* The ABI says that record types with a single member are treated
6697 just like that member would be. */
6698 while (TREE_CODE (type) == RECORD_TYPE)
6700 tree field, single = NULL_TREE;
6702 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
6704 if (TREE_CODE (field) != FIELD_DECL)
6707 if (single == NULL_TREE)
6708 single = TREE_TYPE (field);
6713 if (single == NULL_TREE)
6719 return TREE_CODE (type) == REAL_TYPE;
6722 /* Return true if a function argument of type TYPE and mode MODE
6723 is to be passed in an integer register, or a pair of integer
6724 registers, if available. */
6727 s390_function_arg_integer (enum machine_mode mode, tree type)
6729 int size = s390_function_arg_size (mode, type);
6733 /* No type info available for some library calls ... */
6735 return GET_MODE_CLASS (mode) == MODE_INT
6736 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6738 /* We accept small integral (and similar) types. */
6739 if (INTEGRAL_TYPE_P (type)
6740 || POINTER_TYPE_P (type)
6741 || TREE_CODE (type) == OFFSET_TYPE
6742 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6745 /* We also accept structs of size 1, 2, 4, 8 that are not
6746 passed in floating-point registers. */
6747 if (AGGREGATE_TYPE_P (type)
6748 && exact_log2 (size) >= 0
6749 && !s390_function_arg_float (mode, type))
6755 /* Return 1 if a function argument of type TYPE and mode MODE
6756 is to be passed by reference. The ABI specifies that only
6757 structures of size 1, 2, 4, or 8 bytes are passed by value,
6758 all other structures (and complex numbers) are passed by
6762 s390_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
6763 enum machine_mode mode, tree type,
6764 bool named ATTRIBUTE_UNUSED)
6766 int size = s390_function_arg_size (mode, type);
6772 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6775 if (TREE_CODE (type) == COMPLEX_TYPE
6776 || TREE_CODE (type) == VECTOR_TYPE)
6783 /* Update the data in CUM to advance over an argument of mode MODE and
6784 data type TYPE. (TYPE is null for libcalls where that information
6785 may not be available.). The boolean NAMED specifies whether the
6786 argument is a named argument (as opposed to an unnamed argument
6787 matching an ellipsis). */
6790 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6791 tree type, int named ATTRIBUTE_UNUSED)
6793 if (s390_function_arg_float (mode, type))
6797 else if (s390_function_arg_integer (mode, type))
6799 int size = s390_function_arg_size (mode, type);
6800 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6806 /* Define where to put the arguments to a function.
6807 Value is zero to push the argument on the stack,
6808 or a hard register in which to store the argument.
6810 MODE is the argument's machine mode.
6811 TYPE is the data type of the argument (as a tree).
6812 This is null for libcalls where that information may
6814 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6815 the preceding args and about the function being called.
6816 NAMED is nonzero if this argument is a named parameter
6817 (otherwise it is an extra parameter matching an ellipsis).
6819 On S/390, we use general purpose registers 2 through 6 to
6820 pass integer, pointer, and certain structure arguments, and
6821 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6822 to pass floating point arguments. All remaining arguments
6823 are pushed to the stack. */
6826 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6827 int named ATTRIBUTE_UNUSED)
6829 if (s390_function_arg_float (mode, type))
6831 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6834 return gen_rtx_REG (mode, cum->fprs + 16);
6836 else if (s390_function_arg_integer (mode, type))
6838 int size = s390_function_arg_size (mode, type);
6839 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6841 if (cum->gprs + n_gprs > 5)
6844 return gen_rtx_REG (mode, cum->gprs + 2);
6847 /* After the real arguments, expand_call calls us once again
6848 with a void_type_node type. Whatever we return here is
6849 passed as operand 2 to the call expanders.
6851 We don't need this feature ... */
6852 else if (type == void_type_node)
6858 /* Return true if return values of type TYPE should be returned
6859 in a memory buffer whose address is passed by the caller as
6860 hidden first argument. */
6863 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6865 /* We accept small integral (and similar) types. */
6866 if (INTEGRAL_TYPE_P (type)
6867 || POINTER_TYPE_P (type)
6868 || TREE_CODE (type) == OFFSET_TYPE
6869 || TREE_CODE (type) == REAL_TYPE)
6870 return int_size_in_bytes (type) > 8;
6872 /* Aggregates and similar constructs are always returned
6874 if (AGGREGATE_TYPE_P (type)
6875 || TREE_CODE (type) == COMPLEX_TYPE
6876 || TREE_CODE (type) == VECTOR_TYPE)
6879 /* ??? We get called on all sorts of random stuff from
6880 aggregate_value_p. We can't abort, but it's not clear
6881 what's safe to return. Pretend it's a struct I guess. */
6885 /* Define where to return a (scalar) value of type TYPE.
6886 If TYPE is null, define where to return a (scalar)
6887 value of mode MODE from a libcall. */
6890 s390_function_value (tree type, enum machine_mode mode)
6894 int unsignedp = TYPE_UNSIGNED (type);
6895 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6898 if (GET_MODE_CLASS (mode) != MODE_INT
6899 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6901 if (GET_MODE_SIZE (mode) > 8)
6904 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6905 return gen_rtx_REG (mode, 16);
6907 return gen_rtx_REG (mode, 2);
6911 /* Create and return the va_list datatype.
6913 On S/390, va_list is an array type equivalent to
6915 typedef struct __va_list_tag
6919 void *__overflow_arg_area;
6920 void *__reg_save_area;
6923 where __gpr and __fpr hold the number of general purpose
6924 or floating point arguments used up to now, respectively,
6925 __overflow_arg_area points to the stack location of the
6926 next argument passed on the stack, and __reg_save_area
6927 always points to the start of the register area in the
6928 call frame of the current function. The function prologue
6929 saves all registers used for argument passing into this
6930 area if the function uses variable arguments. */
6933 s390_build_builtin_va_list (void)
6935 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6937 record = lang_hooks.types.make_type (RECORD_TYPE);
6940 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6942 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6943 long_integer_type_node);
6944 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6945 long_integer_type_node);
6946 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6948 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6951 DECL_FIELD_CONTEXT (f_gpr) = record;
6952 DECL_FIELD_CONTEXT (f_fpr) = record;
6953 DECL_FIELD_CONTEXT (f_ovf) = record;
6954 DECL_FIELD_CONTEXT (f_sav) = record;
6956 TREE_CHAIN (record) = type_decl;
6957 TYPE_NAME (record) = type_decl;
6958 TYPE_FIELDS (record) = f_gpr;
6959 TREE_CHAIN (f_gpr) = f_fpr;
6960 TREE_CHAIN (f_fpr) = f_ovf;
6961 TREE_CHAIN (f_ovf) = f_sav;
6963 layout_type (record);
6965 /* The correct type is an array type of one element. */
6966 return build_array_type (record, build_index_type (size_zero_node));
6969 /* Implement va_start by filling the va_list structure VALIST.
6970 STDARG_P is always true, and ignored.
6971 NEXTARG points to the first anonymous stack argument.
6973 The following global variables are used to initialize
6974 the va_list structure:
6976 current_function_args_info:
6977 holds number of gprs and fprs used for named arguments.
6978 current_function_arg_offset_rtx:
6979 holds the offset of the first anonymous stack argument
6980 (relative to the virtual arg pointer). */
6983 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6985 HOST_WIDE_INT n_gpr, n_fpr;
6987 tree f_gpr, f_fpr, f_ovf, f_sav;
6988 tree gpr, fpr, ovf, sav, t;
6990 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6991 f_fpr = TREE_CHAIN (f_gpr);
6992 f_ovf = TREE_CHAIN (f_fpr);
6993 f_sav = TREE_CHAIN (f_ovf);
6995 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6996 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
6997 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
6998 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
6999 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7001 /* Count number of gp and fp argument registers used. */
7003 n_gpr = current_function_args_info.gprs;
7004 n_fpr = current_function_args_info.fprs;
7006 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr,
7007 build_int_cst (NULL_TREE, n_gpr, 0));
7008 TREE_SIDE_EFFECTS (t) = 1;
7009 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7011 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr,
7012 build_int_cst (NULL_TREE, n_fpr, 0));
7013 TREE_SIDE_EFFECTS (t) = 1;
7014 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7016 /* Find the overflow area. */
7017 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
7019 off = INTVAL (current_function_arg_offset_rtx);
7020 off = off < 0 ? 0 : off;
7021 if (TARGET_DEBUG_ARG)
7022 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
7023 (int)n_gpr, (int)n_fpr, off);
7025 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_cst (NULL_TREE, off, 0));
7027 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
7028 TREE_SIDE_EFFECTS (t) = 1;
7029 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7031 /* Find the register save area. */
7032 t = make_tree (TREE_TYPE (sav), return_address_pointer_rtx);
7033 if (TARGET_KERNEL_BACKCHAIN)
7034 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
7035 build_int_cst (NULL_TREE,
7036 -(RETURN_REGNUM - 2) * UNITS_PER_WORD
7037 - (TARGET_64BIT ? 4 : 2) * 8, -1));
7039 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
7040 build_int_cst (NULL_TREE, -RETURN_REGNUM * UNITS_PER_WORD, -1));
7042 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
7043 TREE_SIDE_EFFECTS (t) = 1;
7044 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
7047 /* Implement va_arg by updating the va_list structure
7048 VALIST as required to retrieve an argument of type
7049 TYPE, and returning that argument.
7051 Generates code equivalent to:
7053 if (integral value) {
7054 if (size <= 4 && args.gpr < 5 ||
7055 size > 4 && args.gpr < 4 )
7056 ret = args.reg_save_area[args.gpr+8]
7058 ret = *args.overflow_arg_area++;
7059 } else if (float value) {
7061 ret = args.reg_save_area[args.fpr+64]
7063 ret = *args.overflow_arg_area++;
7064 } else if (aggregate value) {
7066 ret = *args.reg_save_area[args.gpr]
7068 ret = **args.overflow_arg_area++;
7072 s390_gimplify_va_arg (tree valist, tree type, tree *pre_p,
7073 tree *post_p ATTRIBUTE_UNUSED)
7075 tree f_gpr, f_fpr, f_ovf, f_sav;
7076 tree gpr, fpr, ovf, sav, reg, t, u;
7077 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
7078 tree lab_false, lab_over, addr;
7080 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
7081 f_fpr = TREE_CHAIN (f_gpr);
7082 f_ovf = TREE_CHAIN (f_fpr);
7083 f_sav = TREE_CHAIN (f_ovf);
7085 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
7086 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE);
7087 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr, NULL_TREE);
7088 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf, NULL_TREE);
7089 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav, NULL_TREE);
7091 size = int_size_in_bytes (type);
7093 if (pass_by_reference (NULL, TYPE_MODE (type), type, false))
7095 if (TARGET_DEBUG_ARG)
7097 fprintf (stderr, "va_arg: aggregate type");
7101 /* Aggregates are passed by reference. */
7105 sav_ofs = (TARGET_KERNEL_BACKCHAIN
7106 ? (TARGET_64BIT ? 4 : 2) * 8 : 2 * UNITS_PER_WORD);
7107 sav_scale = UNITS_PER_WORD;
7108 size = UNITS_PER_WORD;
7111 else if (s390_function_arg_float (TYPE_MODE (type), type))
7113 if (TARGET_DEBUG_ARG)
7115 fprintf (stderr, "va_arg: float type");
7119 /* FP args go in FP registers, if present. */
7123 sav_ofs = TARGET_KERNEL_BACKCHAIN ? 0 : 16 * UNITS_PER_WORD;
7125 /* TARGET_64BIT has up to 4 parameter in fprs */
7126 max_reg = TARGET_64BIT ? 3 : 1;
7130 if (TARGET_DEBUG_ARG)
7132 fprintf (stderr, "va_arg: other type");
7136 /* Otherwise into GP registers. */
7139 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
7140 sav_ofs = TARGET_KERNEL_BACKCHAIN ?
7141 (TARGET_64BIT ? 4 : 2) * 8 : 2*UNITS_PER_WORD;
7143 if (size < UNITS_PER_WORD)
7144 sav_ofs += UNITS_PER_WORD - size;
7146 sav_scale = UNITS_PER_WORD;
7153 /* Pull the value out of the saved registers ... */
7155 lab_false = create_artificial_label ();
7156 lab_over = create_artificial_label ();
7157 addr = create_tmp_var (ptr_type_node, "addr");
7159 t = fold_convert (TREE_TYPE (reg), size_int (max_reg));
7160 t = build2 (GT_EXPR, boolean_type_node, reg, t);
7161 u = build1 (GOTO_EXPR, void_type_node, lab_false);
7162 t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE);
7163 gimplify_and_add (t, pre_p);
7165 t = build2 (PLUS_EXPR, ptr_type_node, sav,
7166 fold_convert (ptr_type_node, size_int (sav_ofs)));
7167 u = build2 (MULT_EXPR, TREE_TYPE (reg), reg,
7168 fold_convert (TREE_TYPE (reg), size_int (sav_scale)));
7169 t = build2 (PLUS_EXPR, ptr_type_node, t, fold_convert (ptr_type_node, u));
7171 t = build2 (MODIFY_EXPR, void_type_node, addr, t);
7172 gimplify_and_add (t, pre_p);
7174 t = build1 (GOTO_EXPR, void_type_node, lab_over);
7175 gimplify_and_add (t, pre_p);
7177 t = build1 (LABEL_EXPR, void_type_node, lab_false);
7178 append_to_statement_list (t, pre_p);
7181 /* ... Otherwise out of the overflow area. */
7184 if (size < UNITS_PER_WORD)
7185 t = build2 (PLUS_EXPR, ptr_type_node, t,
7186 fold_convert (ptr_type_node, size_int (UNITS_PER_WORD - size)));
7188 gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
7190 u = build2 (MODIFY_EXPR, void_type_node, addr, t);
7191 gimplify_and_add (u, pre_p);
7193 t = build2 (PLUS_EXPR, ptr_type_node, t,
7194 fold_convert (ptr_type_node, size_int (size)));
7195 t = build2 (MODIFY_EXPR, ptr_type_node, ovf, t);
7196 gimplify_and_add (t, pre_p);
7198 t = build1 (LABEL_EXPR, void_type_node, lab_over);
7199 append_to_statement_list (t, pre_p);
7202 /* Increment register save count. */
7204 u = build2 (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
7205 fold_convert (TREE_TYPE (reg), size_int (n_reg)));
7206 gimplify_and_add (u, pre_p);
7210 t = build_pointer_type (build_pointer_type (type));
7211 addr = fold_convert (t, addr);
7212 addr = build_fold_indirect_ref (addr);
7216 t = build_pointer_type (type);
7217 addr = fold_convert (t, addr);
7220 return build_fold_indirect_ref (addr);
7228 S390_BUILTIN_THREAD_POINTER,
7229 S390_BUILTIN_SET_THREAD_POINTER,
7234 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
7239 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
7245 s390_init_builtins (void)
7249 ftype = build_function_type (ptr_type_node, void_list_node);
7250 lang_hooks.builtin_function ("__builtin_thread_pointer", ftype,
7251 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
7254 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
7255 lang_hooks.builtin_function ("__builtin_set_thread_pointer", ftype,
7256 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
7260 /* Expand an expression EXP that calls a built-in function,
7261 with result going to TARGET if that's convenient
7262 (and in mode MODE if that's convenient).
7263 SUBTARGET may be used as the target for computing one of EXP's operands.
7264 IGNORE is nonzero if the value is to be ignored. */
7267 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
7268 enum machine_mode mode ATTRIBUTE_UNUSED,
7269 int ignore ATTRIBUTE_UNUSED)
7273 unsigned int const *code_for_builtin =
7274 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
7276 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7277 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
7278 tree arglist = TREE_OPERAND (exp, 1);
7279 enum insn_code icode;
7280 rtx op[MAX_ARGS], pat;
7284 if (fcode >= S390_BUILTIN_max)
7285 internal_error ("bad builtin fcode");
7286 icode = code_for_builtin[fcode];
7288 internal_error ("bad builtin fcode");
7290 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
7292 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
7294 arglist = TREE_CHAIN (arglist), arity++)
7296 const struct insn_operand_data *insn_op;
7298 tree arg = TREE_VALUE (arglist);
7299 if (arg == error_mark_node)
7301 if (arity > MAX_ARGS)
7304 insn_op = &insn_data[icode].operand[arity + nonvoid];
7306 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
7308 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
7309 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
7314 enum machine_mode tmode = insn_data[icode].operand[0].mode;
7316 || GET_MODE (target) != tmode
7317 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
7318 target = gen_reg_rtx (tmode);
7324 pat = GEN_FCN (icode) (target);
7328 pat = GEN_FCN (icode) (target, op[0]);
7330 pat = GEN_FCN (icode) (op[0]);
7333 pat = GEN_FCN (icode) (target, op[0], op[1]);
7349 /* Output assembly code for the trampoline template to
7352 On S/390, we use gpr 1 internally in the trampoline code;
7353 gpr 0 is used to hold the static chain. */
7356 s390_trampoline_template (FILE *file)
7360 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
7361 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
7362 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
7363 fprintf (file, "br\t%s\n", reg_names[1]);
7364 fprintf (file, "0:\t.quad\t0\n");
7365 fprintf (file, ".quad\t0\n");
7369 fprintf (file, "basr\t%s,0\n", reg_names[1]);
7370 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
7371 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
7372 fprintf (file, "br\t%s\n", reg_names[1]);
7373 fprintf (file, ".long\t0\n");
7374 fprintf (file, ".long\t0\n");
7378 /* Emit RTL insns to initialize the variable parts of a trampoline.
7379 FNADDR is an RTX for the address of the function's pure code.
7380 CXT is an RTX for the static chain value for the function. */
7383 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
7385 emit_move_insn (gen_rtx_MEM (Pmode,
7386 memory_address (Pmode,
7387 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
7388 emit_move_insn (gen_rtx_MEM (Pmode,
7389 memory_address (Pmode,
7390 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
7393 /* Return rtx for 64-bit constant formed from the 32-bit subwords
7394 LOW and HIGH, independent of the host word size. */
7397 s390_gen_rtx_const_DI (int high, int low)
7399 #if HOST_BITS_PER_WIDE_INT >= 64
7401 val = (HOST_WIDE_INT)high;
7403 val |= (HOST_WIDE_INT)low;
7405 return GEN_INT (val);
7407 #if HOST_BITS_PER_WIDE_INT >= 32
7408 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
7415 /* Output assembler code to FILE to increment profiler label # LABELNO
7416 for profiling a function entry. */
7419 s390_function_profiler (FILE *file, int labelno)
7424 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
7426 fprintf (file, "# function profiler \n");
7428 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
7429 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
7430 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
7432 op[2] = gen_rtx_REG (Pmode, 1);
7433 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
7434 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
7436 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
7439 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
7440 op[4] = gen_rtx_CONST (Pmode, op[4]);
7445 output_asm_insn ("stg\t%0,%1", op);
7446 output_asm_insn ("larl\t%2,%3", op);
7447 output_asm_insn ("brasl\t%0,%4", op);
7448 output_asm_insn ("lg\t%0,%1", op);
7452 op[6] = gen_label_rtx ();
7454 output_asm_insn ("st\t%0,%1", op);
7455 output_asm_insn ("bras\t%2,%l6", op);
7456 output_asm_insn (".long\t%4", op);
7457 output_asm_insn (".long\t%3", op);
7458 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7459 output_asm_insn ("l\t%0,0(%2)", op);
7460 output_asm_insn ("l\t%2,4(%2)", op);
7461 output_asm_insn ("basr\t%0,%0", op);
7462 output_asm_insn ("l\t%0,%1", op);
7466 op[5] = gen_label_rtx ();
7467 op[6] = gen_label_rtx ();
7469 output_asm_insn ("st\t%0,%1", op);
7470 output_asm_insn ("bras\t%2,%l6", op);
7471 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
7472 output_asm_insn (".long\t%4-%l5", op);
7473 output_asm_insn (".long\t%3-%l5", op);
7474 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
7475 output_asm_insn ("lr\t%0,%2", op);
7476 output_asm_insn ("a\t%0,0(%2)", op);
7477 output_asm_insn ("a\t%2,4(%2)", op);
7478 output_asm_insn ("basr\t%0,%0", op);
7479 output_asm_insn ("l\t%0,%1", op);
7483 /* Select section for constant in constant pool. In 32-bit mode,
7484 constants go in the function section; in 64-bit mode in .rodata. */
7487 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
7488 rtx x ATTRIBUTE_UNUSED,
7489 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
7491 if (TARGET_CPU_ZARCH)
7492 readonly_data_section ();
7494 function_section (current_function_decl);
7497 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
7498 into its SYMBOL_REF_FLAGS. */
7501 s390_encode_section_info (tree decl, rtx rtl, int first)
7503 default_encode_section_info (decl, rtl, first);
7505 /* If a variable has a forced alignment to < 2 bytes, mark it with
7506 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
7507 if (TREE_CODE (decl) == VAR_DECL
7508 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
7509 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
7512 /* Output thunk to FILE that implements a C++ virtual function call (with
7513 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
7514 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
7515 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
7516 relative to the resulting this pointer. */
7519 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
7520 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
7526 /* Operand 0 is the target function. */
7527 op[0] = XEXP (DECL_RTL (function), 0);
7528 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
7531 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
7532 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
7533 op[0] = gen_rtx_CONST (Pmode, op[0]);
7536 /* Operand 1 is the 'this' pointer. */
7537 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
7538 op[1] = gen_rtx_REG (Pmode, 3);
7540 op[1] = gen_rtx_REG (Pmode, 2);
7542 /* Operand 2 is the delta. */
7543 op[2] = GEN_INT (delta);
7545 /* Operand 3 is the vcall_offset. */
7546 op[3] = GEN_INT (vcall_offset);
7548 /* Operand 4 is the temporary register. */
7549 op[4] = gen_rtx_REG (Pmode, 1);
7551 /* Operands 5 to 8 can be used as labels. */
7557 /* Operand 9 can be used for temporary register. */
7560 /* Generate code. */
7563 /* Setup literal pool pointer if required. */
7564 if ((!DISP_IN_RANGE (delta)
7565 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7566 || (!DISP_IN_RANGE (vcall_offset)
7567 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7569 op[5] = gen_label_rtx ();
7570 output_asm_insn ("larl\t%4,%5", op);
7573 /* Add DELTA to this pointer. */
7576 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7577 output_asm_insn ("la\t%1,%2(%1)", op);
7578 else if (DISP_IN_RANGE (delta))
7579 output_asm_insn ("lay\t%1,%2(%1)", op);
7580 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7581 output_asm_insn ("aghi\t%1,%2", op);
7584 op[6] = gen_label_rtx ();
7585 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
7589 /* Perform vcall adjustment. */
7592 if (DISP_IN_RANGE (vcall_offset))
7594 output_asm_insn ("lg\t%4,0(%1)", op);
7595 output_asm_insn ("ag\t%1,%3(%4)", op);
7597 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7599 output_asm_insn ("lghi\t%4,%3", op);
7600 output_asm_insn ("ag\t%4,0(%1)", op);
7601 output_asm_insn ("ag\t%1,0(%4)", op);
7605 op[7] = gen_label_rtx ();
7606 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
7607 output_asm_insn ("ag\t%4,0(%1)", op);
7608 output_asm_insn ("ag\t%1,0(%4)", op);
7612 /* Jump to target. */
7613 output_asm_insn ("jg\t%0", op);
7615 /* Output literal pool if required. */
7618 output_asm_insn (".align\t4", op);
7619 targetm.asm_out.internal_label (file, "L",
7620 CODE_LABEL_NUMBER (op[5]));
7624 targetm.asm_out.internal_label (file, "L",
7625 CODE_LABEL_NUMBER (op[6]));
7626 output_asm_insn (".long\t%2", op);
7630 targetm.asm_out.internal_label (file, "L",
7631 CODE_LABEL_NUMBER (op[7]));
7632 output_asm_insn (".long\t%3", op);
7637 /* Setup base pointer if required. */
7639 || (!DISP_IN_RANGE (delta)
7640 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7641 || (!DISP_IN_RANGE (delta)
7642 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7644 op[5] = gen_label_rtx ();
7645 output_asm_insn ("basr\t%4,0", op);
7646 targetm.asm_out.internal_label (file, "L",
7647 CODE_LABEL_NUMBER (op[5]));
7650 /* Add DELTA to this pointer. */
7653 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7654 output_asm_insn ("la\t%1,%2(%1)", op);
7655 else if (DISP_IN_RANGE (delta))
7656 output_asm_insn ("lay\t%1,%2(%1)", op);
7657 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7658 output_asm_insn ("ahi\t%1,%2", op);
7661 op[6] = gen_label_rtx ();
7662 output_asm_insn ("a\t%1,%6-%5(%4)", op);
7666 /* Perform vcall adjustment. */
7669 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
7671 output_asm_insn ("lg\t%4,0(%1)", op);
7672 output_asm_insn ("a\t%1,%3(%4)", op);
7674 else if (DISP_IN_RANGE (vcall_offset))
7676 output_asm_insn ("lg\t%4,0(%1)", op);
7677 output_asm_insn ("ay\t%1,%3(%4)", op);
7679 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7681 output_asm_insn ("lhi\t%4,%3", op);
7682 output_asm_insn ("a\t%4,0(%1)", op);
7683 output_asm_insn ("a\t%1,0(%4)", op);
7687 op[7] = gen_label_rtx ();
7688 output_asm_insn ("l\t%4,%7-%5(%4)", op);
7689 output_asm_insn ("a\t%4,0(%1)", op);
7690 output_asm_insn ("a\t%1,0(%4)", op);
7693 /* We had to clobber the base pointer register.
7694 Re-setup the base pointer (with a different base). */
7695 op[5] = gen_label_rtx ();
7696 output_asm_insn ("basr\t%4,0", op);
7697 targetm.asm_out.internal_label (file, "L",
7698 CODE_LABEL_NUMBER (op[5]));
7701 /* Jump to target. */
7702 op[8] = gen_label_rtx ();
7705 output_asm_insn ("l\t%4,%8-%5(%4)", op);
7707 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7708 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7709 else if (flag_pic == 1)
7711 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7712 output_asm_insn ("l\t%4,%0(%4)", op);
7714 else if (flag_pic == 2)
7716 op[9] = gen_rtx_REG (Pmode, 0);
7717 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7718 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7719 output_asm_insn ("ar\t%4,%9", op);
7720 output_asm_insn ("l\t%4,0(%4)", op);
7723 output_asm_insn ("br\t%4", op);
7725 /* Output literal pool. */
7726 output_asm_insn (".align\t4", op);
7728 if (nonlocal && flag_pic == 2)
7729 output_asm_insn (".long\t%0", op);
7732 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7733 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7736 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7738 output_asm_insn (".long\t%0", op);
7740 output_asm_insn (".long\t%0-%5", op);
7744 targetm.asm_out.internal_label (file, "L",
7745 CODE_LABEL_NUMBER (op[6]));
7746 output_asm_insn (".long\t%2", op);
7750 targetm.asm_out.internal_label (file, "L",
7751 CODE_LABEL_NUMBER (op[7]));
7752 output_asm_insn (".long\t%3", op);
7758 s390_valid_pointer_mode (enum machine_mode mode)
7760 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7763 /* How to allocate a 'struct machine_function'. */
7765 static struct machine_function *
7766 s390_init_machine_status (void)
7768 return ggc_alloc_cleared (sizeof (struct machine_function));
7771 /* Checks whether the given ARGUMENT_LIST would use a caller
7772 saved register. This is used to decide whether sibling call
7773 optimization could be performed on the respective function
7777 s390_call_saved_register_used (tree argument_list)
7779 CUMULATIVE_ARGS cum;
7781 enum machine_mode mode;
7786 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
7788 while (argument_list)
7790 parameter = TREE_VALUE (argument_list);
7791 argument_list = TREE_CHAIN (argument_list);
7796 /* For an undeclared variable passed as parameter we will get
7797 an ERROR_MARK node here. */
7798 if (TREE_CODE (parameter) == ERROR_MARK)
7801 if (! (type = TREE_TYPE (parameter)))
7804 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
7807 if (pass_by_reference (&cum, mode, type, true))
7810 type = build_pointer_type (type);
7813 parm_rtx = s390_function_arg (&cum, mode, type, 0);
7815 s390_function_arg_advance (&cum, mode, type, 0);
7817 if (parm_rtx && REG_P (parm_rtx))
7820 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
7822 if (! call_used_regs[reg + REGNO (parm_rtx)])
7829 /* Return true if the given call expression can be
7830 turned into a sibling call.
7831 DECL holds the declaration of the function to be called whereas
7832 EXP is the call expression itself. */
7835 s390_function_ok_for_sibcall (tree decl, tree exp)
7837 /* The TPF epilogue uses register 1. */
7838 if (TARGET_TPF_PROFILING)
7841 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
7842 which would have to be restored before the sibcall. */
7843 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
7846 /* Register 6 on s390 is available as an argument register but unfortunately
7847 "caller saved". This makes functions needing this register for arguments
7848 not suitable for sibcalls. */
7849 if (TREE_OPERAND (exp, 1)
7850 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
7856 /* This function is used by the call expanders of the machine description.
7857 It emits the call insn itself together with the necessary operations
7858 to adjust the target address and returns the emitted insn.
7859 ADDR_LOCATION is the target address rtx
7860 TLS_CALL the location of the thread-local symbol
7861 RESULT_REG the register where the result of the call should be stored
7862 RETADDR_REG the register where the return address should be stored
7863 If this parameter is NULL_RTX the call is considered
7864 to be a sibling call. */
7867 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
7870 bool plt_call = false;
7876 /* Direct function calls need special treatment. */
7877 if (GET_CODE (addr_location) == SYMBOL_REF)
7879 /* When calling a global routine in PIC mode, we must
7880 replace the symbol itself with the PLT stub. */
7881 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
7883 addr_location = gen_rtx_UNSPEC (Pmode,
7884 gen_rtvec (1, addr_location),
7886 addr_location = gen_rtx_CONST (Pmode, addr_location);
7890 /* Unless we can use the bras(l) insn, force the
7891 routine address into a register. */
7892 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
7895 addr_location = legitimize_pic_address (addr_location, 0);
7897 addr_location = force_reg (Pmode, addr_location);
7901 /* If it is already an indirect call or the code above moved the
7902 SYMBOL_REF to somewhere else make sure the address can be found in
7904 if (retaddr_reg == NULL_RTX
7905 && GET_CODE (addr_location) != SYMBOL_REF
7908 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
7909 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
7912 addr_location = gen_rtx_MEM (QImode, addr_location);
7913 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
7915 if (result_reg != NULL_RTX)
7916 call = gen_rtx_SET (VOIDmode, result_reg, call);
7918 if (retaddr_reg != NULL_RTX)
7920 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
7922 if (tls_call != NULL_RTX)
7923 vec = gen_rtvec (3, call, clobber,
7924 gen_rtx_USE (VOIDmode, tls_call));
7926 vec = gen_rtvec (2, call, clobber);
7928 call = gen_rtx_PARALLEL (VOIDmode, vec);
7931 insn = emit_call_insn (call);
7933 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
7934 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
7936 /* s390_function_ok_for_sibcall should
7937 have denied sibcalls in this case. */
7938 if (retaddr_reg == NULL_RTX)
7941 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
7946 /* Implement CONDITIONAL_REGISTER_USAGE. */
7949 s390_conditional_register_usage (void)
7955 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7956 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7958 if (TARGET_CPU_ZARCH)
7960 fixed_regs[RETURN_REGNUM] = 0;
7961 call_used_regs[RETURN_REGNUM] = 0;
7965 for (i = 24; i < 32; i++)
7966 call_used_regs[i] = call_really_used_regs[i] = 0;
7970 for (i = 18; i < 20; i++)
7971 call_used_regs[i] = call_really_used_regs[i] = 0;
7976 #include "gt-s390.h"