1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
54 /* Machine-specific symbol_ref flags. */
55 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
58 static bool s390_assemble_integer (rtx, unsigned int, int);
59 static void s390_select_rtx_section (enum machine_mode, rtx,
60 unsigned HOST_WIDE_INT);
61 static void s390_encode_section_info (tree, rtx, int);
62 static bool s390_cannot_force_const_mem (rtx);
63 static rtx s390_delegitimize_address (rtx);
64 static bool s390_return_in_memory (tree, tree);
65 static void s390_init_builtins (void);
66 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
67 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
69 static enum attr_type s390_safe_attr_type (rtx);
71 static int s390_adjust_cost (rtx, rtx, rtx, int);
72 static int s390_adjust_priority (rtx, int);
73 static int s390_issue_rate (void);
74 static int s390_use_dfa_pipeline_interface (void);
75 static int s390_first_cycle_multipass_dfa_lookahead (void);
76 static int s390_sched_reorder2 (FILE *, int, rtx *, int *, int);
77 static bool s390_rtx_costs (rtx, int, int, int *);
78 static int s390_address_cost (rtx);
79 static void s390_reorg (void);
80 static bool s390_valid_pointer_mode (enum machine_mode);
81 static tree s390_build_builtin_va_list (void);
83 #undef TARGET_ASM_ALIGNED_HI_OP
84 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
85 #undef TARGET_ASM_ALIGNED_DI_OP
86 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
87 #undef TARGET_ASM_INTEGER
88 #define TARGET_ASM_INTEGER s390_assemble_integer
90 #undef TARGET_ASM_OPEN_PAREN
91 #define TARGET_ASM_OPEN_PAREN ""
93 #undef TARGET_ASM_CLOSE_PAREN
94 #define TARGET_ASM_CLOSE_PAREN ""
96 #undef TARGET_ASM_SELECT_RTX_SECTION
97 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
99 #undef TARGET_ENCODE_SECTION_INFO
100 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
103 #undef TARGET_HAVE_TLS
104 #define TARGET_HAVE_TLS true
106 #undef TARGET_CANNOT_FORCE_CONST_MEM
107 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
109 #undef TARGET_DELEGITIMIZE_ADDRESS
110 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
112 #undef TARGET_RETURN_IN_MEMORY
113 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
115 #undef TARGET_INIT_BUILTINS
116 #define TARGET_INIT_BUILTINS s390_init_builtins
117 #undef TARGET_EXPAND_BUILTIN
118 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
120 #undef TARGET_ASM_OUTPUT_MI_THUNK
121 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
122 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
123 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
125 #undef TARGET_SCHED_ADJUST_COST
126 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
127 #undef TARGET_SCHED_ADJUST_PRIORITY
128 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
129 #undef TARGET_SCHED_ISSUE_RATE
130 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
131 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
132 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
133 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
134 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
135 #undef TARGET_SCHED_REORDER2
136 #define TARGET_SCHED_REORDER2 s390_sched_reorder2
138 #undef TARGET_RTX_COSTS
139 #define TARGET_RTX_COSTS s390_rtx_costs
140 #undef TARGET_ADDRESS_COST
141 #define TARGET_ADDRESS_COST s390_address_cost
143 #undef TARGET_MACHINE_DEPENDENT_REORG
144 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
146 #undef TARGET_VALID_POINTER_MODE
147 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
149 #undef TARGET_BUILD_BUILTIN_VA_LIST
150 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
152 #undef TARGET_PROMOTE_FUNCTION_ARGS
153 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
154 #undef TARGET_PROMOTE_FUNCTION_RETURN
155 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
157 #undef TARGET_STRUCT_VALUE_RTX
158 #define TARGET_STRUCT_VALUE_RTX hook_rtx_tree_int_null
160 struct gcc_target targetm = TARGET_INITIALIZER;
162 extern int reload_completed;
164 /* The alias set for prologue/epilogue register save/restore. */
165 static int s390_sr_alias_set = 0;
167 /* Save information from a "cmpxx" operation until the branch or scc is
169 rtx s390_compare_op0, s390_compare_op1;
171 /* Structure used to hold the components of a S/390 memory
172 address. A legitimate address on S/390 is of the general
174 base + index + displacement
175 where any of the components is optional.
177 base and index are registers of the class ADDR_REGS,
178 displacement is an unsigned 12-bit immediate constant. */
188 /* Which cpu are we tuning for. */
189 enum processor_type s390_tune;
190 enum processor_flags s390_tune_flags;
191 /* Which instruction set architecture to use. */
192 enum processor_type s390_arch;
193 enum processor_flags s390_arch_flags;
195 /* Strings to hold which cpu and instruction set architecture to use. */
196 const char *s390_tune_string; /* for -mtune=<xxx> */
197 const char *s390_arch_string; /* for -march=<xxx> */
199 /* Define the structure for the machine field in struct function. */
201 struct machine_function GTY(())
203 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
206 /* Set if return address needs to be saved. */
207 bool save_return_addr_p;
209 /* Number of first and last gpr to be saved, restored. */
211 int first_restore_gpr;
214 /* Size of stack frame. */
215 HOST_WIDE_INT frame_size;
217 /* Some local-dynamic TLS symbol name. */
218 const char *some_ld_name;
221 static int s390_match_ccmode_set (rtx, enum machine_mode);
222 static int s390_branch_condition_mask (rtx);
223 static const char *s390_branch_condition_mnemonic (rtx, int);
224 static int check_mode (rtx, enum machine_mode *);
225 static int general_s_operand (rtx, enum machine_mode, int);
226 static int s390_short_displacement (rtx);
227 static int s390_decompose_address (rtx, struct s390_address *);
228 static rtx get_thread_pointer (void);
229 static rtx legitimize_tls_address (rtx, rtx);
230 static void print_shift_count_operand (FILE *, rtx);
231 static const char *get_some_local_dynamic_name (void);
232 static int get_some_local_dynamic_name_1 (rtx *, void *);
233 static int reg_used_in_mem_p (int, rtx);
234 static int addr_generation_dependency_p (rtx, rtx);
235 static int s390_split_branches (void);
236 static void find_constant_pool_ref (rtx, rtx *);
237 static void replace_constant_pool_ref (rtx *, rtx, rtx);
238 static rtx find_ltrel_base (rtx);
239 static void replace_ltrel_base (rtx *, rtx);
240 static void s390_optimize_prolog (bool);
241 static int find_unused_clobbered_reg (void);
242 static void s390_frame_info (void);
243 static rtx save_fpr (rtx, int, int);
244 static rtx restore_fpr (rtx, int, int);
245 static rtx save_gprs (rtx, int, int, int);
246 static rtx restore_gprs (rtx, int, int, int);
247 static int s390_function_arg_size (enum machine_mode, tree);
248 static bool s390_function_arg_float (enum machine_mode, tree);
249 static struct machine_function * s390_init_machine_status (void);
251 /* Check whether integer displacement is in range. */
252 #define DISP_IN_RANGE(d) \
253 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
254 : ((d) >= 0 && (d) <= 4095))
256 /* Return true if SET either doesn't set the CC register, or else
257 the source and destination have matching CC modes and that
258 CC mode is at least as constrained as REQ_MODE. */
261 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
263 enum machine_mode set_mode;
265 if (GET_CODE (set) != SET)
268 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
271 set_mode = GET_MODE (SET_DEST (set));
284 if (req_mode != set_mode)
289 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
290 && req_mode != CCSRmode && req_mode != CCURmode)
296 if (req_mode != CCAmode)
304 return (GET_MODE (SET_SRC (set)) == set_mode);
307 /* Return true if every SET in INSN that sets the CC register
308 has source and destination with matching CC modes and that
309 CC mode is at least as constrained as REQ_MODE.
310 If REQ_MODE is VOIDmode, always return false. */
313 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
317 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
318 if (req_mode == VOIDmode)
321 if (GET_CODE (PATTERN (insn)) == SET)
322 return s390_match_ccmode_set (PATTERN (insn), req_mode);
324 if (GET_CODE (PATTERN (insn)) == PARALLEL)
325 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
327 rtx set = XVECEXP (PATTERN (insn), 0, i);
328 if (GET_CODE (set) == SET)
329 if (!s390_match_ccmode_set (set, req_mode))
336 /* If a test-under-mask instruction can be used to implement
337 (compare (and ... OP1) OP2), return the CC mode required
338 to do that. Otherwise, return VOIDmode.
339 MIXED is true if the instruction can distinguish between
340 CC1 and CC2 for mixed selected bits (TMxx), it is false
341 if the instruction cannot (TM). */
344 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
348 /* ??? Fixme: should work on CONST_DOUBLE as well. */
349 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
352 /* Selected bits all zero: CC0. */
353 if (INTVAL (op2) == 0)
356 /* Selected bits all one: CC3. */
357 if (INTVAL (op2) == INTVAL (op1))
360 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
363 bit1 = exact_log2 (INTVAL (op2));
364 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
365 if (bit0 != -1 && bit1 != -1)
366 return bit0 > bit1 ? CCT1mode : CCT2mode;
372 /* Given a comparison code OP (EQ, NE, etc.) and the operands
373 OP0 and OP1 of a COMPARE, return the mode to be used for the
377 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
383 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
384 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
386 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
387 || GET_CODE (op1) == NEG)
388 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
391 if (GET_CODE (op0) == AND)
393 /* Check whether we can potentially do it via TM. */
394 enum machine_mode ccmode;
395 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
396 if (ccmode != VOIDmode)
398 /* Relax CCTmode to CCZmode to allow fall-back to AND
399 if that turns out to be beneficial. */
400 return ccmode == CCTmode ? CCZmode : ccmode;
404 if (register_operand (op0, HImode)
405 && GET_CODE (op1) == CONST_INT
406 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
408 if (register_operand (op0, QImode)
409 && GET_CODE (op1) == CONST_INT
410 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
419 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
420 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
422 if (INTVAL (XEXP((op0), 1)) < 0)
435 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
436 && GET_CODE (op1) != CONST_INT)
442 if (GET_CODE (op0) == PLUS
443 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
446 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
447 && GET_CODE (op1) != CONST_INT)
453 if (GET_CODE (op0) == MINUS
454 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
457 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
458 && GET_CODE (op1) != CONST_INT)
467 /* Return nonzero if OP is a valid comparison operator
468 for an ALC condition in mode MODE. */
471 s390_alc_comparison (rtx op, enum machine_mode mode)
473 if (mode != VOIDmode && mode != GET_MODE (op))
476 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
479 if (GET_CODE (XEXP (op, 0)) != REG
480 || REGNO (XEXP (op, 0)) != CC_REGNUM
481 || XEXP (op, 1) != const0_rtx)
484 switch (GET_MODE (XEXP (op, 0)))
487 return GET_CODE (op) == LTU;
490 return GET_CODE (op) == LEU;
493 return GET_CODE (op) == GTU;
496 return GET_CODE (op) == LTU;
499 return GET_CODE (op) == UNGT;
502 return GET_CODE (op) == UNLT;
509 /* Return nonzero if OP is a valid comparison operator
510 for an SLB condition in mode MODE. */
513 s390_slb_comparison (rtx op, enum machine_mode mode)
515 if (mode != VOIDmode && mode != GET_MODE (op))
518 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
521 if (GET_CODE (XEXP (op, 0)) != REG
522 || REGNO (XEXP (op, 0)) != CC_REGNUM
523 || XEXP (op, 1) != const0_rtx)
526 switch (GET_MODE (XEXP (op, 0)))
529 return GET_CODE (op) == GEU;
532 return GET_CODE (op) == GTU;
535 return GET_CODE (op) == LEU;
538 return GET_CODE (op) == GEU;
541 return GET_CODE (op) == LE;
544 return GET_CODE (op) == GE;
551 /* Return branch condition mask to implement a branch
552 specified by CODE. */
555 s390_branch_condition_mask (rtx code)
557 const int CC0 = 1 << 3;
558 const int CC1 = 1 << 2;
559 const int CC2 = 1 << 1;
560 const int CC3 = 1 << 0;
562 if (GET_CODE (XEXP (code, 0)) != REG
563 || REGNO (XEXP (code, 0)) != CC_REGNUM
564 || XEXP (code, 1) != const0_rtx)
567 switch (GET_MODE (XEXP (code, 0)))
570 switch (GET_CODE (code))
573 case NE: return CC1 | CC2 | CC3;
580 switch (GET_CODE (code))
583 case NE: return CC0 | CC2 | CC3;
590 switch (GET_CODE (code))
593 case NE: return CC0 | CC1 | CC3;
600 switch (GET_CODE (code))
603 case NE: return CC0 | CC1 | CC2;
610 switch (GET_CODE (code))
612 case EQ: return CC0 | CC2;
613 case NE: return CC1 | CC3;
620 switch (GET_CODE (code))
622 case LTU: return CC2 | CC3; /* carry */
623 case GEU: return CC0 | CC1; /* no carry */
630 switch (GET_CODE (code))
632 case GTU: return CC0 | CC1; /* borrow */
633 case LEU: return CC2 | CC3; /* no borrow */
640 switch (GET_CODE (code))
643 case NE: return CC1 | CC2 | CC3;
644 case LTU: return CC1;
645 case GTU: return CC2;
646 case LEU: return CC0 | CC1;
647 case GEU: return CC0 | CC2;
654 switch (GET_CODE (code))
657 case NE: return CC2 | CC1 | CC3;
658 case LTU: return CC2;
659 case GTU: return CC1;
660 case LEU: return CC0 | CC2;
661 case GEU: return CC0 | CC1;
668 switch (GET_CODE (code))
671 case NE: return CC1 | CC2 | CC3;
672 case LT: return CC1 | CC3;
674 case LE: return CC0 | CC1 | CC3;
675 case GE: return CC0 | CC2;
682 switch (GET_CODE (code))
685 case NE: return CC1 | CC2 | CC3;
687 case GT: return CC2 | CC3;
688 case LE: return CC0 | CC1;
689 case GE: return CC0 | CC2 | CC3;
696 switch (GET_CODE (code))
699 case NE: return CC1 | CC2 | CC3;
702 case LE: return CC0 | CC1;
703 case GE: return CC0 | CC2;
704 case UNORDERED: return CC3;
705 case ORDERED: return CC0 | CC1 | CC2;
706 case UNEQ: return CC0 | CC3;
707 case UNLT: return CC1 | CC3;
708 case UNGT: return CC2 | CC3;
709 case UNLE: return CC0 | CC1 | CC3;
710 case UNGE: return CC0 | CC2 | CC3;
711 case LTGT: return CC1 | CC2;
718 switch (GET_CODE (code))
721 case NE: return CC2 | CC1 | CC3;
724 case LE: return CC0 | CC2;
725 case GE: return CC0 | CC1;
726 case UNORDERED: return CC3;
727 case ORDERED: return CC0 | CC2 | CC1;
728 case UNEQ: return CC0 | CC3;
729 case UNLT: return CC2 | CC3;
730 case UNGT: return CC1 | CC3;
731 case UNLE: return CC0 | CC2 | CC3;
732 case UNGE: return CC0 | CC1 | CC3;
733 case LTGT: return CC2 | CC1;
744 /* If INV is false, return assembler mnemonic string to implement
745 a branch specified by CODE. If INV is true, return mnemonic
746 for the corresponding inverted branch. */
749 s390_branch_condition_mnemonic (rtx code, int inv)
751 static const char *const mnemonic[16] =
753 NULL, "o", "h", "nle",
754 "l", "nhe", "lh", "ne",
755 "e", "nlh", "he", "nl",
756 "le", "nh", "no", NULL
759 int mask = s390_branch_condition_mask (code);
764 if (mask < 1 || mask > 14)
767 return mnemonic[mask];
770 /* Return the part of op which has a value different from def.
771 The size of the part is determined by mode.
772 Use this function only if you already know that op really
773 contains such a part. */
775 unsigned HOST_WIDE_INT
776 s390_extract_part (rtx op, enum machine_mode mode, int def)
778 unsigned HOST_WIDE_INT value = 0;
779 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
780 int part_bits = GET_MODE_BITSIZE (mode);
781 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
784 for (i = 0; i < max_parts; i++)
787 value = (unsigned HOST_WIDE_INT) INTVAL (op);
791 if ((value & part_mask) != (def & part_mask))
792 return value & part_mask;
798 /* If OP is an integer constant of mode MODE with exactly one
799 part of mode PART_MODE unequal to DEF, return the number of that
800 part. Otherwise, return -1. */
803 s390_single_part (rtx op,
804 enum machine_mode mode,
805 enum machine_mode part_mode,
808 unsigned HOST_WIDE_INT value = 0;
809 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
810 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
813 if (GET_CODE (op) != CONST_INT)
816 for (i = 0; i < n_parts; i++)
819 value = (unsigned HOST_WIDE_INT) INTVAL (op);
821 value >>= GET_MODE_BITSIZE (part_mode);
823 if ((value & part_mask) != (def & part_mask))
831 return part == -1 ? -1 : n_parts - 1 - part;
834 /* Check whether we can (and want to) split a double-word
835 move in mode MODE from SRC to DST into two single-word
836 moves, moving the subword FIRST_SUBWORD first. */
839 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
841 /* Floating point registers cannot be split. */
842 if (FP_REG_P (src) || FP_REG_P (dst))
845 /* We don't need to split if operands are directly accessible. */
846 if (s_operand (src, mode) || s_operand (dst, mode))
849 /* Non-offsettable memory references cannot be split. */
850 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
851 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
854 /* Moving the first subword must not clobber a register
855 needed to move the second subword. */
856 if (register_operand (dst, mode))
858 rtx subreg = operand_subword (dst, first_subword, 0, mode);
859 if (reg_overlap_mentioned_p (subreg, src))
867 /* Change optimizations to be performed, depending on the
870 LEVEL is the optimization level specified; 2 if `-O2' is
871 specified, 1 if `-O' is specified, and 0 if neither is specified.
873 SIZE is nonzero if `-Os' is specified and zero otherwise. */
876 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
878 /* ??? There are apparently still problems with -fcaller-saves. */
879 flag_caller_saves = 0;
881 /* By default, always emit DWARF-2 unwind info. This allows debugging
882 without maintaining a stack frame back-chain. */
883 flag_asynchronous_unwind_tables = 1;
887 override_options (void)
892 const char *const name; /* processor name or nickname. */
893 const enum processor_type processor;
894 const enum processor_flags flags;
896 const processor_alias_table[] =
898 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
899 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
900 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
901 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
902 | PF_LONG_DISPLACEMENT},
905 int const pta_size = ARRAY_SIZE (processor_alias_table);
907 /* Acquire a unique set number for our register saves and restores. */
908 s390_sr_alias_set = new_alias_set ();
910 /* Set up function hooks. */
911 init_machine_status = s390_init_machine_status;
913 /* Architecture mode defaults according to ABI. */
914 if (!(target_flags_explicit & MASK_ZARCH))
917 target_flags |= MASK_ZARCH;
919 target_flags &= ~MASK_ZARCH;
922 /* Determine processor architectural level. */
923 if (!s390_arch_string)
924 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
926 for (i = 0; i < pta_size; i++)
927 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
929 s390_arch = processor_alias_table[i].processor;
930 s390_arch_flags = processor_alias_table[i].flags;
934 error ("Unknown cpu used in -march=%s.", s390_arch_string);
936 /* Determine processor to tune for. */
937 if (!s390_tune_string)
939 s390_tune = s390_arch;
940 s390_tune_flags = s390_arch_flags;
941 s390_tune_string = s390_arch_string;
945 for (i = 0; i < pta_size; i++)
946 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
948 s390_tune = processor_alias_table[i].processor;
949 s390_tune_flags = processor_alias_table[i].flags;
953 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
957 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
958 error ("z/Architecture mode not supported on %s.", s390_arch_string);
959 if (TARGET_64BIT && !TARGET_ZARCH)
960 error ("64-bit ABI not supported in ESA/390 mode.");
963 /* Map for smallest class containing reg regno. */
965 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
966 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
967 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
968 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
969 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
970 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
971 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
972 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
973 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
974 ADDR_REGS, NO_REGS, ADDR_REGS
977 /* Return attribute type of insn. */
979 static enum attr_type
980 s390_safe_attr_type (rtx insn)
982 if (recog_memoized (insn) >= 0)
983 return get_attr_type (insn);
988 /* Return true if OP a (const_int 0) operand.
989 OP is the current operation.
990 MODE is the current operation mode. */
993 const0_operand (register rtx op, enum machine_mode mode)
995 return op == CONST0_RTX (mode);
998 /* Return true if OP is constant.
999 OP is the current operation.
1000 MODE is the current operation mode. */
1003 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1005 return CONSTANT_P (op);
1008 /* Return true if the mode of operand OP matches MODE.
1009 If MODE is set to VOIDmode, set it to the mode of OP. */
1012 check_mode (register rtx op, enum machine_mode *mode)
1014 if (*mode == VOIDmode)
1015 *mode = GET_MODE (op);
1018 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1024 /* Return true if OP a valid operand for the LARL instruction.
1025 OP is the current operation.
1026 MODE is the current operation mode. */
1029 larl_operand (register rtx op, enum machine_mode mode)
1031 if (! check_mode (op, &mode))
1034 /* Allow labels and local symbols. */
1035 if (GET_CODE (op) == LABEL_REF)
1037 if (GET_CODE (op) == SYMBOL_REF)
1038 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1039 && SYMBOL_REF_TLS_MODEL (op) == 0
1040 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1042 /* Everything else must have a CONST, so strip it. */
1043 if (GET_CODE (op) != CONST)
1047 /* Allow adding *even* in-range constants. */
1048 if (GET_CODE (op) == PLUS)
1050 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1051 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1053 #if HOST_BITS_PER_WIDE_INT > 32
1054 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1055 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1061 /* Labels and local symbols allowed here as well. */
1062 if (GET_CODE (op) == LABEL_REF)
1064 if (GET_CODE (op) == SYMBOL_REF)
1065 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1066 && SYMBOL_REF_TLS_MODEL (op) == 0
1067 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1069 /* Now we must have a @GOTENT offset or @PLT stub
1070 or an @INDNTPOFF TLS offset. */
1071 if (GET_CODE (op) == UNSPEC
1072 && XINT (op, 1) == UNSPEC_GOTENT)
1074 if (GET_CODE (op) == UNSPEC
1075 && XINT (op, 1) == UNSPEC_PLT)
1077 if (GET_CODE (op) == UNSPEC
1078 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1084 /* Helper routine to implement s_operand and s_imm_operand.
1085 OP is the current operation.
1086 MODE is the current operation mode.
1087 ALLOW_IMMEDIATE specifies whether immediate operands should
1088 be accepted or not. */
1091 general_s_operand (register rtx op, enum machine_mode mode,
1092 int allow_immediate)
1094 struct s390_address addr;
1096 /* Call general_operand first, so that we don't have to
1097 check for many special cases. */
1098 if (!general_operand (op, mode))
1101 /* Just like memory_operand, allow (subreg (mem ...))
1103 if (reload_completed
1104 && GET_CODE (op) == SUBREG
1105 && GET_CODE (SUBREG_REG (op)) == MEM)
1106 op = SUBREG_REG (op);
1108 switch (GET_CODE (op))
1110 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1111 is true and we are still before reload. */
1114 if (!allow_immediate || reload_completed)
1118 /* Memory operands are OK unless they already use an
1121 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1123 if (!s390_decompose_address (XEXP (op, 0), &addr))
1127 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1128 is true. This prevents compares between two literal pool
1129 entries from being accepted. */
1130 if (!allow_immediate
1131 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1142 /* Return true if OP is a valid S-type operand.
1143 OP is the current operation.
1144 MODE is the current operation mode. */
1147 s_operand (register rtx op, enum machine_mode mode)
1149 return general_s_operand (op, mode, 0);
1152 /* Return true if OP is a valid S-type operand or an immediate
1153 operand that can be addressed as S-type operand by forcing
1154 it into the literal pool.
1155 OP is the current operation.
1156 MODE is the current operation mode. */
1159 s_imm_operand (register rtx op, enum machine_mode mode)
1161 return general_s_operand (op, mode, 1);
1164 /* Return true if OP a valid shift count operand.
1165 OP is the current operation.
1166 MODE is the current operation mode. */
1169 shift_count_operand (rtx op, enum machine_mode mode)
1171 HOST_WIDE_INT offset = 0;
1173 if (! check_mode (op, &mode))
1176 /* We can have an integer constant, an address register,
1177 or a sum of the two. Note that reload already checks
1178 that any register present is an address register, so
1179 we just check for any register here. */
1180 if (GET_CODE (op) == CONST_INT)
1182 offset = INTVAL (op);
1185 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1187 offset = INTVAL (XEXP (op, 1));
1190 while (op && GET_CODE (op) == SUBREG)
1191 op = SUBREG_REG (op);
1192 if (op && GET_CODE (op) != REG)
1195 /* Unfortunately we have to reject constants that are invalid
1196 for an address, or else reload will get confused. */
1197 if (!DISP_IN_RANGE (offset))
1203 /* Return true if DISP is a valid short displacement. */
1206 s390_short_displacement (rtx disp)
1208 /* No displacement is OK. */
1212 /* Integer displacement in range. */
1213 if (GET_CODE (disp) == CONST_INT)
1214 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1216 /* GOT offset is not OK, the GOT can be large. */
1217 if (GET_CODE (disp) == CONST
1218 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1219 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1222 /* All other symbolic constants are literal pool references,
1223 which are OK as the literal pool must be small. */
1224 if (GET_CODE (disp) == CONST)
1230 /* Return true if OP is a valid operand for a C constraint. */
1233 s390_extra_constraint_str (rtx op, int c, const char * str)
1235 struct s390_address addr;
1243 if (GET_CODE (op) != MEM)
1245 if (!s390_decompose_address (XEXP (op, 0), &addr))
1250 if (TARGET_LONG_DISPLACEMENT)
1252 if (!s390_short_displacement (addr.disp))
1258 if (GET_CODE (op) != MEM)
1261 if (TARGET_LONG_DISPLACEMENT)
1263 if (!s390_decompose_address (XEXP (op, 0), &addr))
1265 if (!s390_short_displacement (addr.disp))
1271 if (!TARGET_LONG_DISPLACEMENT)
1273 if (GET_CODE (op) != MEM)
1275 if (!s390_decompose_address (XEXP (op, 0), &addr))
1279 if (s390_short_displacement (addr.disp))
1284 if (!TARGET_LONG_DISPLACEMENT)
1286 if (GET_CODE (op) != MEM)
1288 /* Any invalid address here will be fixed up by reload,
1289 so accept it for the most generic constraint. */
1290 if (s390_decompose_address (XEXP (op, 0), &addr)
1291 && s390_short_displacement (addr.disp))
1296 if (TARGET_LONG_DISPLACEMENT)
1298 if (!s390_decompose_address (op, &addr))
1300 if (!s390_short_displacement (addr.disp))
1306 if (!TARGET_LONG_DISPLACEMENT)
1308 /* Any invalid address here will be fixed up by reload,
1309 so accept it for the most generic constraint. */
1310 if (s390_decompose_address (op, &addr)
1311 && s390_short_displacement (addr.disp))
1316 return shift_count_operand (op, VOIDmode);
1325 /* Return true if VALUE matches the constraint STR. */
1328 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1332 enum machine_mode mode, part_mode;
1342 return (unsigned int)value < 256;
1345 return (unsigned int)value < 4096;
1348 return value >= -32768 && value < 32768;
1351 return (TARGET_LONG_DISPLACEMENT ?
1352 (value >= -524288 && value <= 524287)
1353 : (value >= 0 && value <= 4095));
1355 return value == 2147483647;
1358 part = str[1] - '0';
1362 case 'H': part_mode = HImode; break;
1363 case 'Q': part_mode = QImode; break;
1369 case 'H': mode = HImode; break;
1370 case 'S': mode = SImode; break;
1371 case 'D': mode = DImode; break;
1377 case '0': def = 0; break;
1378 case 'F': def = -1; break;
1382 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1385 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1397 /* Compute a (partial) cost for rtx X. Return true if the complete
1398 cost has been computed, and false if subexpressions should be
1399 scanned. In either case, *TOTAL contains the cost result. */
1402 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1407 if (GET_CODE (XEXP (x, 0)) == MINUS
1408 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1415 /* Force_const_mem does not work out of reload, because the
1416 saveable_obstack is set to reload_obstack, which does not
1417 live long enough. Because of this we cannot use force_const_mem
1418 in addsi3. This leads to problems with gen_add2_insn with a
1419 constant greater than a short. Because of that we give an
1420 addition of greater constants a cost of 3 (reload1.c 10096). */
1421 /* ??? saveable_obstack no longer exists. */
1422 if (outer_code == PLUS
1423 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1424 *total = COSTS_N_INSNS (3);
1445 *total = COSTS_N_INSNS (1);
1449 if (GET_MODE (XEXP (x, 0)) == DImode)
1450 *total = COSTS_N_INSNS (40);
1452 *total = COSTS_N_INSNS (7);
1459 *total = COSTS_N_INSNS (33);
1467 /* Return the cost of an address rtx ADDR. */
1470 s390_address_cost (rtx addr)
1472 struct s390_address ad;
1473 if (!s390_decompose_address (addr, &ad))
1476 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1479 /* Return true if OP is a valid operand for the BRAS instruction.
1480 OP is the current operation.
1481 MODE is the current operation mode. */
1484 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1486 register enum rtx_code code = GET_CODE (op);
1488 /* Allow SYMBOL_REFs. */
1489 if (code == SYMBOL_REF)
1492 /* Allow @PLT stubs. */
1494 && GET_CODE (XEXP (op, 0)) == UNSPEC
1495 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1500 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1501 otherwise return 0. */
1504 tls_symbolic_operand (register rtx op)
1506 if (GET_CODE (op) != SYMBOL_REF)
1508 return SYMBOL_REF_TLS_MODEL (op);
1511 /* Return true if OP is a load multiple operation. It is known to be a
1512 PARALLEL and the first section will be tested.
1513 OP is the current operation.
1514 MODE is the current operation mode. */
1517 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1519 enum machine_mode elt_mode;
1520 int count = XVECLEN (op, 0);
1521 unsigned int dest_regno;
1526 /* Perform a quick check so we don't blow up below. */
1528 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1529 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1530 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1533 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1534 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1535 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1537 /* Check, is base, or base + displacement. */
1539 if (GET_CODE (src_addr) == REG)
1541 else if (GET_CODE (src_addr) == PLUS
1542 && GET_CODE (XEXP (src_addr, 0)) == REG
1543 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1545 off = INTVAL (XEXP (src_addr, 1));
1546 src_addr = XEXP (src_addr, 0);
1551 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1554 for (i = 1; i < count; i++)
1556 rtx elt = XVECEXP (op, 0, i);
1558 if (GET_CODE (elt) != SET
1559 || GET_CODE (SET_DEST (elt)) != REG
1560 || GET_MODE (SET_DEST (elt)) != elt_mode
1561 || REGNO (SET_DEST (elt)) != dest_regno + i
1562 || GET_CODE (SET_SRC (elt)) != MEM
1563 || GET_MODE (SET_SRC (elt)) != elt_mode
1564 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1565 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1566 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1567 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1568 != off + i * GET_MODE_SIZE (elt_mode))
1575 /* Return true if OP is a store multiple operation. It is known to be a
1576 PARALLEL and the first section will be tested.
1577 OP is the current operation.
1578 MODE is the current operation mode. */
1581 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1583 enum machine_mode elt_mode;
1584 int count = XVECLEN (op, 0);
1585 unsigned int src_regno;
1589 /* Perform a quick check so we don't blow up below. */
1591 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1592 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1593 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1596 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1597 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1598 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1600 /* Check, is base, or base + displacement. */
1602 if (GET_CODE (dest_addr) == REG)
1604 else if (GET_CODE (dest_addr) == PLUS
1605 && GET_CODE (XEXP (dest_addr, 0)) == REG
1606 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1608 off = INTVAL (XEXP (dest_addr, 1));
1609 dest_addr = XEXP (dest_addr, 0);
1614 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1617 for (i = 1; i < count; i++)
1619 rtx elt = XVECEXP (op, 0, i);
1621 if (GET_CODE (elt) != SET
1622 || GET_CODE (SET_SRC (elt)) != REG
1623 || GET_MODE (SET_SRC (elt)) != elt_mode
1624 || REGNO (SET_SRC (elt)) != src_regno + i
1625 || GET_CODE (SET_DEST (elt)) != MEM
1626 || GET_MODE (SET_DEST (elt)) != elt_mode
1627 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1628 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1629 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1630 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1631 != off + i * GET_MODE_SIZE (elt_mode))
1638 /* Return true if OP contains a symbol reference */
1641 symbolic_reference_mentioned_p (rtx op)
1643 register const char *fmt;
1646 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1649 fmt = GET_RTX_FORMAT (GET_CODE (op));
1650 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1656 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1657 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1661 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1668 /* Return true if OP contains a reference to a thread-local symbol. */
1671 tls_symbolic_reference_mentioned_p (rtx op)
1673 register const char *fmt;
1676 if (GET_CODE (op) == SYMBOL_REF)
1677 return tls_symbolic_operand (op);
1679 fmt = GET_RTX_FORMAT (GET_CODE (op));
1680 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1686 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1687 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1691 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1699 /* Return true if OP is a legitimate general operand when
1700 generating PIC code. It is given that flag_pic is on
1701 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1704 legitimate_pic_operand_p (register rtx op)
1706 /* Accept all non-symbolic constants. */
1707 if (!SYMBOLIC_CONST (op))
1710 /* Reject everything else; must be handled
1711 via emit_symbolic_move. */
1715 /* Returns true if the constant value OP is a legitimate general operand.
1716 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1719 legitimate_constant_p (register rtx op)
1721 /* Accept all non-symbolic constants. */
1722 if (!SYMBOLIC_CONST (op))
1725 /* Accept immediate LARL operands. */
1726 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1729 /* Thread-local symbols are never legal constants. This is
1730 so that emit_call knows that computing such addresses
1731 might require a function call. */
1732 if (TLS_SYMBOLIC_CONST (op))
1735 /* In the PIC case, symbolic constants must *not* be
1736 forced into the literal pool. We accept them here,
1737 so that they will be handled by emit_symbolic_move. */
1741 /* All remaining non-PIC symbolic constants are
1742 forced into the literal pool. */
1746 /* Determine if it's legal to put X into the constant pool. This
1747 is not possible if X contains the address of a symbol that is
1748 not constant (TLS) or not known at final link time (PIC). */
1751 s390_cannot_force_const_mem (rtx x)
1753 switch (GET_CODE (x))
1757 /* Accept all non-symbolic constants. */
1761 /* Labels are OK iff we are non-PIC. */
1762 return flag_pic != 0;
1765 /* 'Naked' TLS symbol references are never OK,
1766 non-TLS symbols are OK iff we are non-PIC. */
1767 if (tls_symbolic_operand (x))
1770 return flag_pic != 0;
1773 return s390_cannot_force_const_mem (XEXP (x, 0));
1776 return s390_cannot_force_const_mem (XEXP (x, 0))
1777 || s390_cannot_force_const_mem (XEXP (x, 1));
1780 switch (XINT (x, 1))
1782 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1783 case UNSPEC_LTREL_OFFSET:
1791 case UNSPEC_GOTNTPOFF:
1792 case UNSPEC_INDNTPOFF:
1805 /* Returns true if the constant value OP is a legitimate general
1806 operand during and after reload. The difference to
1807 legitimate_constant_p is that this function will not accept
1808 a constant that would need to be forced to the literal pool
1809 before it can be used as operand. */
1812 legitimate_reload_constant_p (register rtx op)
1814 /* Accept la(y) operands. */
1815 if (GET_CODE (op) == CONST_INT
1816 && DISP_IN_RANGE (INTVAL (op)))
1819 /* Accept l(g)hi operands. */
1820 if (GET_CODE (op) == CONST_INT
1821 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1824 /* Accept lliXX operands. */
1826 && s390_single_part (op, DImode, HImode, 0) >= 0)
1829 /* Accept larl operands. */
1830 if (TARGET_CPU_ZARCH
1831 && larl_operand (op, VOIDmode))
1834 /* Everything else cannot be handled without reload. */
1838 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1839 return the class of reg to actually use. */
1842 s390_preferred_reload_class (rtx op, enum reg_class class)
1844 /* This can happen if a floating point constant is being
1845 reloaded into an integer register. Leave well alone. */
1846 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1847 && class != FP_REGS)
1850 switch (GET_CODE (op))
1852 /* Constants we cannot reload must be forced into the
1857 if (legitimate_reload_constant_p (op))
1862 /* If a symbolic constant or a PLUS is reloaded,
1863 it is most likely being used as an address, so
1864 prefer ADDR_REGS. If 'class' is not a superset
1865 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1870 if (reg_class_subset_p (ADDR_REGS, class))
1882 /* Return the register class of a scratch register needed to
1883 load IN into a register of class CLASS in MODE.
1885 We need a temporary when loading a PLUS expression which
1886 is not a legitimate operand of the LOAD ADDRESS instruction. */
1889 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1890 enum machine_mode mode, rtx in)
1892 if (s390_plus_operand (in, mode))
1898 /* Return the register class of a scratch register needed to
1899 store a register of class CLASS in MODE into OUT:
1901 We need a temporary when storing a double-word to a
1902 non-offsettable memory address. */
1905 s390_secondary_output_reload_class (enum reg_class class,
1906 enum machine_mode mode, rtx out)
1908 if ((TARGET_64BIT ? mode == TImode
1909 : (mode == DImode || mode == DFmode))
1910 && reg_classes_intersect_p (GENERAL_REGS, class)
1911 && GET_CODE (out) == MEM
1912 && !offsettable_memref_p (out)
1913 && !s_operand (out, VOIDmode))
1919 /* Return true if OP is a PLUS that is not a legitimate
1920 operand for the LA instruction.
1921 OP is the current operation.
1922 MODE is the current operation mode. */
1925 s390_plus_operand (register rtx op, enum machine_mode mode)
1927 if (!check_mode (op, &mode) || mode != Pmode)
1930 if (GET_CODE (op) != PLUS)
1933 if (legitimate_la_operand_p (op))
1939 /* Generate code to load SRC, which is PLUS that is not a
1940 legitimate operand for the LA instruction, into TARGET.
1941 SCRATCH may be used as scratch register. */
1944 s390_expand_plus_operand (register rtx target, register rtx src,
1945 register rtx scratch)
1948 struct s390_address ad;
1950 /* src must be a PLUS; get its two operands. */
1951 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1954 /* Check if any of the two operands is already scheduled
1955 for replacement by reload. This can happen e.g. when
1956 float registers occur in an address. */
1957 sum1 = find_replacement (&XEXP (src, 0));
1958 sum2 = find_replacement (&XEXP (src, 1));
1959 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1961 /* If the address is already strictly valid, there's nothing to do. */
1962 if (!s390_decompose_address (src, &ad)
1963 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
1964 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
1966 /* Otherwise, one of the operands cannot be an address register;
1967 we reload its value into the scratch register. */
1968 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
1970 emit_move_insn (scratch, sum1);
1973 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
1975 emit_move_insn (scratch, sum2);
1979 /* According to the way these invalid addresses are generated
1980 in reload.c, it should never happen (at least on s390) that
1981 *neither* of the PLUS components, after find_replacements
1982 was applied, is an address register. */
1983 if (sum1 == scratch && sum2 == scratch)
1989 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1992 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
1993 is only ever performed on addresses, so we can mark the
1994 sum as legitimate for LA in any case. */
1995 s390_load_address (target, src);
1999 /* Decompose a RTL expression ADDR for a memory address into
2000 its components, returned in OUT.
2002 Returns 0 if ADDR is not a valid memory address, nonzero
2003 otherwise. If OUT is NULL, don't return the components,
2004 but check for validity only.
2006 Note: Only addresses in canonical form are recognized.
2007 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2008 canonical form so that they will be recognized. */
2011 s390_decompose_address (register rtx addr, struct s390_address *out)
2013 rtx base = NULL_RTX;
2014 rtx indx = NULL_RTX;
2015 rtx disp = NULL_RTX;
2016 int pointer = FALSE;
2017 int base_ptr = FALSE;
2018 int indx_ptr = FALSE;
2020 /* Decompose address into base + index + displacement. */
2022 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2025 else if (GET_CODE (addr) == PLUS)
2027 rtx op0 = XEXP (addr, 0);
2028 rtx op1 = XEXP (addr, 1);
2029 enum rtx_code code0 = GET_CODE (op0);
2030 enum rtx_code code1 = GET_CODE (op1);
2032 if (code0 == REG || code0 == UNSPEC)
2034 if (code1 == REG || code1 == UNSPEC)
2036 indx = op0; /* index + base */
2042 base = op0; /* base + displacement */
2047 else if (code0 == PLUS)
2049 indx = XEXP (op0, 0); /* index + base + disp */
2050 base = XEXP (op0, 1);
2061 disp = addr; /* displacement */
2064 /* Validate base register. */
2067 if (GET_CODE (base) == UNSPEC)
2069 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2071 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2074 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2077 if (REGNO (base) == BASE_REGISTER
2078 || REGNO (base) == STACK_POINTER_REGNUM
2079 || REGNO (base) == FRAME_POINTER_REGNUM
2080 || ((reload_completed || reload_in_progress)
2081 && frame_pointer_needed
2082 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2083 || REGNO (base) == ARG_POINTER_REGNUM
2085 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2086 pointer = base_ptr = TRUE;
2089 /* Validate index register. */
2092 if (GET_CODE (indx) == UNSPEC)
2094 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2096 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2099 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2102 if (REGNO (indx) == BASE_REGISTER
2103 || REGNO (indx) == STACK_POINTER_REGNUM
2104 || REGNO (indx) == FRAME_POINTER_REGNUM
2105 || ((reload_completed || reload_in_progress)
2106 && frame_pointer_needed
2107 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2108 || REGNO (indx) == ARG_POINTER_REGNUM
2110 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2111 pointer = indx_ptr = TRUE;
2114 /* Prefer to use pointer as base, not index. */
2115 if (base && indx && !base_ptr
2116 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2123 /* Validate displacement. */
2126 /* Allow integer constant in range. */
2127 if (GET_CODE (disp) == CONST_INT)
2129 /* If the argument pointer is involved, the displacement will change
2130 later anyway as the argument pointer gets eliminated. This could
2131 make a valid displacement invalid, but it is more likely to make
2132 an invalid displacement valid, because we sometimes access the
2133 register save area via negative offsets to the arg pointer.
2134 Thus we don't check the displacement for validity here. If after
2135 elimination the displacement turns out to be invalid after all,
2136 this is fixed up by reload in any case. */
2137 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2139 if (!DISP_IN_RANGE (INTVAL (disp)))
2144 /* In the small-PIC case, the linker converts @GOT
2145 and @GOTNTPOFF offsets to possible displacements. */
2146 else if (GET_CODE (disp) == CONST
2147 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2148 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2149 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2157 /* Accept chunkfied literal pool symbol references. */
2158 else if (GET_CODE (disp) == CONST
2159 && GET_CODE (XEXP (disp, 0)) == MINUS
2160 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2161 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2166 /* Likewise if a constant offset is present. */
2167 else if (GET_CODE (disp) == CONST
2168 && GET_CODE (XEXP (disp, 0)) == PLUS
2169 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2170 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2171 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2172 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2177 /* We can convert literal pool addresses to
2178 displacements by basing them off the base register. */
2181 /* In some cases, we can accept an additional
2182 small constant offset. Split these off here. */
2184 unsigned int offset = 0;
2186 if (GET_CODE (disp) == CONST
2187 && GET_CODE (XEXP (disp, 0)) == PLUS
2188 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2190 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2191 disp = XEXP (XEXP (disp, 0), 0);
2194 /* Now we must have a literal pool address. */
2195 if (GET_CODE (disp) != SYMBOL_REF
2196 || !CONSTANT_POOL_ADDRESS_P (disp))
2199 /* If we have an offset, make sure it does not
2200 exceed the size of the constant pool entry. */
2201 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2204 /* Either base or index must be free to
2205 hold the base register. */
2209 /* Convert the address. */
2211 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2213 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2215 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2216 UNSPEC_LTREL_OFFSET);
2217 disp = gen_rtx_CONST (Pmode, disp);
2220 disp = plus_constant (disp, offset);
2234 out->pointer = pointer;
2240 /* Return nonzero if ADDR is a valid memory address.
2241 STRICT specifies whether strict register checking applies. */
2244 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2245 register rtx addr, int strict)
2247 struct s390_address ad;
2248 if (!s390_decompose_address (addr, &ad))
2253 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2255 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2260 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2262 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2269 /* Return 1 if OP is a valid operand for the LA instruction.
2270 In 31-bit, we need to prove that the result is used as an
2271 address, as LA performs only a 31-bit addition. */
2274 legitimate_la_operand_p (register rtx op)
2276 struct s390_address addr;
2277 if (!s390_decompose_address (op, &addr))
2280 if (TARGET_64BIT || addr.pointer)
2286 /* Return 1 if OP is a valid operand for the LA instruction,
2287 and we prefer to use LA over addition to compute it. */
2290 preferred_la_operand_p (register rtx op)
2292 struct s390_address addr;
2293 if (!s390_decompose_address (op, &addr))
2296 if (!TARGET_64BIT && !addr.pointer)
2302 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2303 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2309 /* Emit a forced load-address operation to load SRC into DST.
2310 This will use the LOAD ADDRESS instruction even in situations
2311 where legitimate_la_operand_p (SRC) returns false. */
2314 s390_load_address (rtx dst, rtx src)
2317 emit_move_insn (dst, src);
2319 emit_insn (gen_force_la_31 (dst, src));
2322 /* Return a legitimate reference for ORIG (an address) using the
2323 register REG. If REG is 0, a new pseudo is generated.
2325 There are two types of references that must be handled:
2327 1. Global data references must load the address from the GOT, via
2328 the PIC reg. An insn is emitted to do this load, and the reg is
2331 2. Static data references, constant pool addresses, and code labels
2332 compute the address as an offset from the GOT, whose base is in
2333 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2334 differentiate them from global data objects. The returned
2335 address is the PIC reg + an unspec constant.
2337 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2338 reg also appears in the address. */
2341 legitimize_pic_address (rtx orig, rtx reg)
2347 if (GET_CODE (addr) == LABEL_REF
2348 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2350 /* This is a local symbol. */
2351 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2353 /* Access local symbols PC-relative via LARL.
2354 This is the same as in the non-PIC case, so it is
2355 handled automatically ... */
2359 /* Access local symbols relative to the GOT. */
2361 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2363 if (reload_in_progress || reload_completed)
2364 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2366 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2367 addr = gen_rtx_CONST (Pmode, addr);
2368 addr = force_const_mem (Pmode, addr);
2369 emit_move_insn (temp, addr);
2371 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2374 emit_move_insn (reg, new);
2379 else if (GET_CODE (addr) == SYMBOL_REF)
2382 reg = gen_reg_rtx (Pmode);
2386 /* Assume GOT offset < 4k. This is handled the same way
2387 in both 31- and 64-bit code (@GOT). */
2389 if (reload_in_progress || reload_completed)
2390 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2392 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2393 new = gen_rtx_CONST (Pmode, new);
2394 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2395 new = gen_rtx_MEM (Pmode, new);
2396 RTX_UNCHANGING_P (new) = 1;
2397 emit_move_insn (reg, new);
2400 else if (TARGET_CPU_ZARCH)
2402 /* If the GOT offset might be >= 4k, we determine the position
2403 of the GOT entry via a PC-relative LARL (@GOTENT). */
2405 rtx temp = gen_reg_rtx (Pmode);
2407 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2408 new = gen_rtx_CONST (Pmode, new);
2409 emit_move_insn (temp, new);
2411 new = gen_rtx_MEM (Pmode, temp);
2412 RTX_UNCHANGING_P (new) = 1;
2413 emit_move_insn (reg, new);
2418 /* If the GOT offset might be >= 4k, we have to load it
2419 from the literal pool (@GOT). */
2421 rtx temp = gen_reg_rtx (Pmode);
2423 if (reload_in_progress || reload_completed)
2424 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2426 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2427 addr = gen_rtx_CONST (Pmode, addr);
2428 addr = force_const_mem (Pmode, addr);
2429 emit_move_insn (temp, addr);
2431 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2432 new = gen_rtx_MEM (Pmode, new);
2433 RTX_UNCHANGING_P (new) = 1;
2434 emit_move_insn (reg, new);
2440 if (GET_CODE (addr) == CONST)
2442 addr = XEXP (addr, 0);
2443 if (GET_CODE (addr) == UNSPEC)
2445 if (XVECLEN (addr, 0) != 1)
2447 switch (XINT (addr, 1))
2449 /* If someone moved a GOT-relative UNSPEC
2450 out of the literal pool, force them back in. */
2453 new = force_const_mem (Pmode, orig);
2456 /* @GOT is OK as is if small. */
2459 new = force_const_mem (Pmode, orig);
2462 /* @GOTENT is OK as is. */
2466 /* @PLT is OK as is on 64-bit, must be converted to
2467 GOT-relative @PLTOFF on 31-bit. */
2469 if (!TARGET_CPU_ZARCH)
2471 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2473 if (reload_in_progress || reload_completed)
2474 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2476 addr = XVECEXP (addr, 0, 0);
2477 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2479 addr = gen_rtx_CONST (Pmode, addr);
2480 addr = force_const_mem (Pmode, addr);
2481 emit_move_insn (temp, addr);
2483 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2486 emit_move_insn (reg, new);
2492 /* Everything else cannot happen. */
2497 else if (GET_CODE (addr) != PLUS)
2500 if (GET_CODE (addr) == PLUS)
2502 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2503 /* Check first to see if this is a constant offset
2504 from a local symbol reference. */
2505 if ((GET_CODE (op0) == LABEL_REF
2506 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2507 && GET_CODE (op1) == CONST_INT)
2509 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2511 if (INTVAL (op1) & 1)
2513 /* LARL can't handle odd offsets, so emit a
2514 pair of LARL and LA. */
2515 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2517 if (!DISP_IN_RANGE (INTVAL (op1)))
2519 int even = INTVAL (op1) - 1;
2520 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2521 op0 = gen_rtx_CONST (Pmode, op0);
2525 emit_move_insn (temp, op0);
2526 new = gen_rtx_PLUS (Pmode, temp, op1);
2530 emit_move_insn (reg, new);
2536 /* If the offset is even, we can just use LARL.
2537 This will happen automatically. */
2542 /* Access local symbols relative to the GOT. */
2544 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2546 if (reload_in_progress || reload_completed)
2547 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2549 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2551 addr = gen_rtx_PLUS (Pmode, addr, op1);
2552 addr = gen_rtx_CONST (Pmode, addr);
2553 addr = force_const_mem (Pmode, addr);
2554 emit_move_insn (temp, addr);
2556 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2559 emit_move_insn (reg, new);
2565 /* Now, check whether it is a GOT relative symbol plus offset
2566 that was pulled out of the literal pool. Force it back in. */
2568 else if (GET_CODE (op0) == UNSPEC
2569 && GET_CODE (op1) == CONST_INT)
2571 if (XVECLEN (op0, 0) != 1)
2573 if (XINT (op0, 1) != UNSPEC_GOTOFF)
2576 new = force_const_mem (Pmode, orig);
2579 /* Otherwise, compute the sum. */
2582 base = legitimize_pic_address (XEXP (addr, 0), reg);
2583 new = legitimize_pic_address (XEXP (addr, 1),
2584 base == reg ? NULL_RTX : reg);
2585 if (GET_CODE (new) == CONST_INT)
2586 new = plus_constant (base, INTVAL (new));
2589 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2591 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2592 new = XEXP (new, 1);
2594 new = gen_rtx_PLUS (Pmode, base, new);
2597 if (GET_CODE (new) == CONST)
2598 new = XEXP (new, 0);
2599 new = force_operand (new, 0);
2606 /* Load the thread pointer into a register. */
2609 get_thread_pointer (void)
2613 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2614 tp = force_reg (Pmode, tp);
2615 mark_reg_pointer (tp, BITS_PER_WORD);
2620 /* Construct the SYMBOL_REF for the tls_get_offset function. */
2622 static GTY(()) rtx s390_tls_symbol;
2624 s390_tls_get_offset (void)
2626 if (!s390_tls_symbol)
2627 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2629 return s390_tls_symbol;
2632 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2633 this (thread-local) address. REG may be used as temporary. */
2636 legitimize_tls_address (rtx addr, rtx reg)
2638 rtx new, tls_call, temp, base, r2, insn;
2640 if (GET_CODE (addr) == SYMBOL_REF)
2641 switch (tls_symbolic_operand (addr))
2643 case TLS_MODEL_GLOBAL_DYNAMIC:
2645 r2 = gen_rtx_REG (Pmode, 2);
2646 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2647 new = gen_rtx_CONST (Pmode, tls_call);
2648 new = force_const_mem (Pmode, new);
2649 emit_move_insn (r2, new);
2650 emit_call_insn (gen_call_value_tls (r2, tls_call));
2651 insn = get_insns ();
2654 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2655 temp = gen_reg_rtx (Pmode);
2656 emit_libcall_block (insn, temp, r2, new);
2658 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2661 s390_load_address (reg, new);
2666 case TLS_MODEL_LOCAL_DYNAMIC:
2668 r2 = gen_rtx_REG (Pmode, 2);
2669 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2670 new = gen_rtx_CONST (Pmode, tls_call);
2671 new = force_const_mem (Pmode, new);
2672 emit_move_insn (r2, new);
2673 emit_call_insn (gen_call_value_tls (r2, tls_call));
2674 insn = get_insns ();
2677 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2678 temp = gen_reg_rtx (Pmode);
2679 emit_libcall_block (insn, temp, r2, new);
2681 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2682 base = gen_reg_rtx (Pmode);
2683 s390_load_address (base, new);
2685 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2686 new = gen_rtx_CONST (Pmode, new);
2687 new = force_const_mem (Pmode, new);
2688 temp = gen_reg_rtx (Pmode);
2689 emit_move_insn (temp, new);
2691 new = gen_rtx_PLUS (Pmode, base, temp);
2694 s390_load_address (reg, new);
2699 case TLS_MODEL_INITIAL_EXEC:
2702 /* Assume GOT offset < 4k. This is handled the same way
2703 in both 31- and 64-bit code. */
2705 if (reload_in_progress || reload_completed)
2706 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2708 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2709 new = gen_rtx_CONST (Pmode, new);
2710 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2711 new = gen_rtx_MEM (Pmode, new);
2712 RTX_UNCHANGING_P (new) = 1;
2713 temp = gen_reg_rtx (Pmode);
2714 emit_move_insn (temp, new);
2716 else if (TARGET_CPU_ZARCH)
2718 /* If the GOT offset might be >= 4k, we determine the position
2719 of the GOT entry via a PC-relative LARL. */
2721 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2722 new = gen_rtx_CONST (Pmode, new);
2723 temp = gen_reg_rtx (Pmode);
2724 emit_move_insn (temp, new);
2726 new = gen_rtx_MEM (Pmode, temp);
2727 RTX_UNCHANGING_P (new) = 1;
2728 temp = gen_reg_rtx (Pmode);
2729 emit_move_insn (temp, new);
2733 /* If the GOT offset might be >= 4k, we have to load it
2734 from the literal pool. */
2736 if (reload_in_progress || reload_completed)
2737 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2739 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2740 new = gen_rtx_CONST (Pmode, new);
2741 new = force_const_mem (Pmode, new);
2742 temp = gen_reg_rtx (Pmode);
2743 emit_move_insn (temp, new);
2745 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2746 new = gen_rtx_MEM (Pmode, new);
2747 RTX_UNCHANGING_P (new) = 1;
2749 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2750 temp = gen_reg_rtx (Pmode);
2751 emit_insn (gen_rtx_SET (Pmode, temp, new));
2755 /* In position-dependent code, load the absolute address of
2756 the GOT entry from the literal pool. */
2758 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2759 new = gen_rtx_CONST (Pmode, new);
2760 new = force_const_mem (Pmode, new);
2761 temp = gen_reg_rtx (Pmode);
2762 emit_move_insn (temp, new);
2765 new = gen_rtx_MEM (Pmode, new);
2766 RTX_UNCHANGING_P (new) = 1;
2768 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2769 temp = gen_reg_rtx (Pmode);
2770 emit_insn (gen_rtx_SET (Pmode, temp, new));
2773 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2776 s390_load_address (reg, new);
2781 case TLS_MODEL_LOCAL_EXEC:
2782 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2783 new = gen_rtx_CONST (Pmode, new);
2784 new = force_const_mem (Pmode, new);
2785 temp = gen_reg_rtx (Pmode);
2786 emit_move_insn (temp, new);
2788 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2791 s390_load_address (reg, new);
2800 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2802 switch (XINT (XEXP (addr, 0), 1))
2804 case UNSPEC_INDNTPOFF:
2805 if (TARGET_CPU_ZARCH)
2817 abort (); /* for now ... */
2822 /* Emit insns to move operands[1] into operands[0]. */
2825 emit_symbolic_move (rtx *operands)
2827 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2829 if (GET_CODE (operands[0]) == MEM)
2830 operands[1] = force_reg (Pmode, operands[1]);
2831 else if (TLS_SYMBOLIC_CONST (operands[1]))
2832 operands[1] = legitimize_tls_address (operands[1], temp);
2834 operands[1] = legitimize_pic_address (operands[1], temp);
2837 /* Try machine-dependent ways of modifying an illegitimate address X
2838 to be legitimate. If we find one, return the new, valid address.
2840 OLDX is the address as it was before break_out_memory_refs was called.
2841 In some cases it is useful to look at this to decide what needs to be done.
2843 MODE is the mode of the operand pointed to by X.
2845 When -fpic is used, special handling is needed for symbolic references.
2846 See comments by legitimize_pic_address for details. */
2849 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2850 enum machine_mode mode ATTRIBUTE_UNUSED)
2852 rtx constant_term = const0_rtx;
2854 if (TLS_SYMBOLIC_CONST (x))
2856 x = legitimize_tls_address (x, 0);
2858 if (legitimate_address_p (mode, x, FALSE))
2863 if (SYMBOLIC_CONST (x)
2864 || (GET_CODE (x) == PLUS
2865 && (SYMBOLIC_CONST (XEXP (x, 0))
2866 || SYMBOLIC_CONST (XEXP (x, 1)))))
2867 x = legitimize_pic_address (x, 0);
2869 if (legitimate_address_p (mode, x, FALSE))
2873 x = eliminate_constant_term (x, &constant_term);
2875 /* Optimize loading of large displacements by splitting them
2876 into the multiple of 4K and the rest; this allows the
2877 former to be CSE'd if possible.
2879 Don't do this if the displacement is added to a register
2880 pointing into the stack frame, as the offsets will
2881 change later anyway. */
2883 if (GET_CODE (constant_term) == CONST_INT
2884 && !TARGET_LONG_DISPLACEMENT
2885 && !DISP_IN_RANGE (INTVAL (constant_term))
2886 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2888 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2889 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2891 rtx temp = gen_reg_rtx (Pmode);
2892 rtx val = force_operand (GEN_INT (upper), temp);
2894 emit_move_insn (temp, val);
2896 x = gen_rtx_PLUS (Pmode, x, temp);
2897 constant_term = GEN_INT (lower);
2900 if (GET_CODE (x) == PLUS)
2902 if (GET_CODE (XEXP (x, 0)) == REG)
2904 register rtx temp = gen_reg_rtx (Pmode);
2905 register rtx val = force_operand (XEXP (x, 1), temp);
2907 emit_move_insn (temp, val);
2909 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2912 else if (GET_CODE (XEXP (x, 1)) == REG)
2914 register rtx temp = gen_reg_rtx (Pmode);
2915 register rtx val = force_operand (XEXP (x, 0), temp);
2917 emit_move_insn (temp, val);
2919 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2923 if (constant_term != const0_rtx)
2924 x = gen_rtx_PLUS (Pmode, x, constant_term);
2929 /* Emit code to move LEN bytes from DST to SRC. */
2932 s390_expand_movstr (rtx dst, rtx src, rtx len)
2934 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2936 if (INTVAL (len) > 0)
2937 emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2940 else if (TARGET_MVCLE)
2942 emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
2947 rtx dst_addr, src_addr, count, blocks, temp;
2948 rtx end_label = gen_label_rtx ();
2949 enum machine_mode mode;
2952 mode = GET_MODE (len);
2953 if (mode == VOIDmode)
2956 type = lang_hooks.types.type_for_mode (mode, 1);
2960 dst_addr = gen_reg_rtx (Pmode);
2961 src_addr = gen_reg_rtx (Pmode);
2962 count = gen_reg_rtx (mode);
2963 blocks = gen_reg_rtx (mode);
2965 convert_move (count, len, 1);
2966 emit_cmp_and_jump_insns (count, const0_rtx,
2967 EQ, NULL_RTX, mode, 1, end_label);
2969 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
2970 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
2971 dst = change_address (dst, VOIDmode, dst_addr);
2972 src = change_address (src, VOIDmode, src_addr);
2974 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
2976 emit_move_insn (count, temp);
2978 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
2980 emit_move_insn (blocks, temp);
2982 expand_start_loop (1);
2983 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
2984 make_tree (type, blocks),
2985 make_tree (type, const0_rtx)));
2987 emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
2988 s390_load_address (dst_addr,
2989 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
2990 s390_load_address (src_addr,
2991 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
2993 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
2995 emit_move_insn (blocks, temp);
2999 emit_insn (gen_movstr_short (dst, src,
3000 convert_to_mode (Pmode, count, 1)));
3001 emit_label (end_label);
3005 /* Emit code to clear LEN bytes at DST. */
3008 s390_expand_clrstr (rtx dst, rtx len)
3010 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3012 if (INTVAL (len) > 0)
3013 emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
3016 else if (TARGET_MVCLE)
3018 emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
3023 rtx dst_addr, src_addr, count, blocks, temp;
3024 rtx end_label = gen_label_rtx ();
3025 enum machine_mode mode;
3028 mode = GET_MODE (len);
3029 if (mode == VOIDmode)
3032 type = lang_hooks.types.type_for_mode (mode, 1);
3036 dst_addr = gen_reg_rtx (Pmode);
3037 src_addr = gen_reg_rtx (Pmode);
3038 count = gen_reg_rtx (mode);
3039 blocks = gen_reg_rtx (mode);
3041 convert_move (count, len, 1);
3042 emit_cmp_and_jump_insns (count, const0_rtx,
3043 EQ, NULL_RTX, mode, 1, end_label);
3045 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3046 dst = change_address (dst, VOIDmode, dst_addr);
3048 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3050 emit_move_insn (count, temp);
3052 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3054 emit_move_insn (blocks, temp);
3056 expand_start_loop (1);
3057 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3058 make_tree (type, blocks),
3059 make_tree (type, const0_rtx)));
3061 emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
3062 s390_load_address (dst_addr,
3063 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3065 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3067 emit_move_insn (blocks, temp);
3071 emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
3072 emit_label (end_label);
3076 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3077 and return the result in TARGET. */
3080 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3082 rtx (*gen_result) (rtx) =
3083 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3085 op0 = protect_from_queue (op0, 0);
3086 op1 = protect_from_queue (op1, 0);
3087 len = protect_from_queue (len, 0);
3089 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3091 if (INTVAL (len) > 0)
3093 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3094 emit_insn (gen_result (target));
3097 emit_move_insn (target, const0_rtx);
3100 else /* if (TARGET_MVCLE) */
3102 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3103 emit_insn (gen_result (target));
3107 /* Deactivate for now as profile code cannot cope with
3108 CC being live across basic block boundaries. */
3111 rtx addr0, addr1, count, blocks, temp;
3112 rtx end_label = gen_label_rtx ();
3113 enum machine_mode mode;
3116 mode = GET_MODE (len);
3117 if (mode == VOIDmode)
3120 type = lang_hooks.types.type_for_mode (mode, 1);
3124 addr0 = gen_reg_rtx (Pmode);
3125 addr1 = gen_reg_rtx (Pmode);
3126 count = gen_reg_rtx (mode);
3127 blocks = gen_reg_rtx (mode);
3129 convert_move (count, len, 1);
3130 emit_cmp_and_jump_insns (count, const0_rtx,
3131 EQ, NULL_RTX, mode, 1, end_label);
3133 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3134 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3135 op0 = change_address (op0, VOIDmode, addr0);
3136 op1 = change_address (op1, VOIDmode, addr1);
3138 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3140 emit_move_insn (count, temp);
3142 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3144 emit_move_insn (blocks, temp);
3146 expand_start_loop (1);
3147 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3148 make_tree (type, blocks),
3149 make_tree (type, const0_rtx)));
3151 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3152 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3153 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3154 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3155 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3156 emit_jump_insn (temp);
3158 s390_load_address (addr0,
3159 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3160 s390_load_address (addr1,
3161 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3163 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3165 emit_move_insn (blocks, temp);
3169 emit_insn (gen_cmpmem_short (op0, op1,
3170 convert_to_mode (Pmode, count, 1)));
3171 emit_label (end_label);
3173 emit_insn (gen_result (target));
3178 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3179 We need to emit DTP-relative relocations. */
3182 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3187 fputs ("\t.long\t", file);
3190 fputs ("\t.quad\t", file);
3195 output_addr_const (file, x);
3196 fputs ("@DTPOFF", file);
3199 /* In the name of slightly smaller debug output, and to cater to
3200 general assembler losage, recognize various UNSPEC sequences
3201 and turn them back into a direct symbol reference. */
3204 s390_delegitimize_address (rtx orig_x)
3208 if (GET_CODE (x) != MEM)
3212 if (GET_CODE (x) == PLUS
3213 && GET_CODE (XEXP (x, 1)) == CONST
3214 && GET_CODE (XEXP (x, 0)) == REG
3215 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3217 y = XEXP (XEXP (x, 1), 0);
3218 if (GET_CODE (y) == UNSPEC
3219 && XINT (y, 1) == UNSPEC_GOT)
3220 return XVECEXP (y, 0, 0);
3224 if (GET_CODE (x) == CONST)
3227 if (GET_CODE (y) == UNSPEC
3228 && XINT (y, 1) == UNSPEC_GOTENT)
3229 return XVECEXP (y, 0, 0);
3236 /* Output shift count operand OP to stdio stream FILE. */
3239 print_shift_count_operand (FILE *file, rtx op)
3241 HOST_WIDE_INT offset = 0;
3243 /* We can have an integer constant, an address register,
3244 or a sum of the two. */
3245 if (GET_CODE (op) == CONST_INT)
3247 offset = INTVAL (op);
3250 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3252 offset = INTVAL (XEXP (op, 1));
3255 while (op && GET_CODE (op) == SUBREG)
3256 op = SUBREG_REG (op);
3259 if (op && (GET_CODE (op) != REG
3260 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3261 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3264 /* Shift counts are truncated to the low six bits anyway. */
3265 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3267 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3270 /* Locate some local-dynamic symbol still in use by this function
3271 so that we can print its name in local-dynamic base patterns. */
3274 get_some_local_dynamic_name (void)
3278 if (cfun->machine->some_ld_name)
3279 return cfun->machine->some_ld_name;
3281 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3283 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3284 return cfun->machine->some_ld_name;
3290 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3294 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3296 x = get_pool_constant (x);
3297 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3300 if (GET_CODE (x) == SYMBOL_REF
3301 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3303 cfun->machine->some_ld_name = XSTR (x, 0);
3310 /* Output symbolic constant X in assembler syntax to
3311 stdio stream FILE. */
3314 s390_output_symbolic_const (FILE *file, rtx x)
3316 switch (GET_CODE (x))
3321 s390_output_symbolic_const (file, XEXP (x, 0));
3325 s390_output_symbolic_const (file, XEXP (x, 0));
3326 fprintf (file, "+");
3327 s390_output_symbolic_const (file, XEXP (x, 1));
3331 s390_output_symbolic_const (file, XEXP (x, 0));
3332 fprintf (file, "-");
3333 s390_output_symbolic_const (file, XEXP (x, 1));
3340 output_addr_const (file, x);
3344 if (XVECLEN (x, 0) != 1)
3345 output_operand_lossage ("invalid UNSPEC as operand (1)");
3346 switch (XINT (x, 1))
3349 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3350 fprintf (file, "@GOTENT");
3353 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3354 fprintf (file, "@GOT");
3357 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3358 fprintf (file, "@GOTOFF");
3361 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3362 fprintf (file, "@PLT");
3365 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3366 fprintf (file, "@PLTOFF");
3369 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3370 fprintf (file, "@TLSGD");
3373 assemble_name (file, get_some_local_dynamic_name ());
3374 fprintf (file, "@TLSLDM");
3377 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3378 fprintf (file, "@DTPOFF");
3381 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3382 fprintf (file, "@NTPOFF");
3384 case UNSPEC_GOTNTPOFF:
3385 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3386 fprintf (file, "@GOTNTPOFF");
3388 case UNSPEC_INDNTPOFF:
3389 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3390 fprintf (file, "@INDNTPOFF");
3393 output_operand_lossage ("invalid UNSPEC as operand (2)");
3399 fatal_insn ("UNKNOWN in s390_output_symbolic_const !?", x);
3404 /* Output address operand ADDR in assembler syntax to
3405 stdio stream FILE. */
3408 print_operand_address (FILE *file, rtx addr)
3410 struct s390_address ad;
3412 if (!s390_decompose_address (addr, &ad)
3413 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3414 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3415 output_operand_lossage ("Cannot decompose address.");
3418 s390_output_symbolic_const (file, ad.disp);
3420 fprintf (file, "0");
3422 if (ad.base && ad.indx)
3423 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3424 reg_names[REGNO (ad.base)]);
3426 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3429 /* Output operand X in assembler syntax to stdio stream FILE.
3430 CODE specified the format flag. The following format flags
3433 'C': print opcode suffix for branch condition.
3434 'D': print opcode suffix for inverse branch condition.
3435 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3436 'O': print only the displacement of a memory reference.
3437 'R': print only the base register of a memory reference.
3438 'N': print the second word of a DImode operand.
3439 'M': print the second word of a TImode operand.
3440 'Y': print shift count operand.
3442 'b': print integer X as if it's an unsigned byte.
3443 'x': print integer X as if it's an unsigned word.
3444 'h': print integer X as if it's a signed word.
3445 'i': print the first nonzero HImode part of X.
3446 'j': print the first HImode part unequal to 0xffff of X. */
3449 print_operand (FILE *file, rtx x, int code)
3454 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3458 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3462 if (GET_CODE (x) == SYMBOL_REF)
3464 fprintf (file, "%s", ":tls_load:");
3465 output_addr_const (file, x);
3467 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3469 fprintf (file, "%s", ":tls_gdcall:");
3470 output_addr_const (file, XVECEXP (x, 0, 0));
3472 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3474 fprintf (file, "%s", ":tls_ldcall:");
3475 assemble_name (file, get_some_local_dynamic_name ());
3483 struct s390_address ad;
3485 if (GET_CODE (x) != MEM
3486 || !s390_decompose_address (XEXP (x, 0), &ad)
3487 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3492 s390_output_symbolic_const (file, ad.disp);
3494 fprintf (file, "0");
3500 struct s390_address ad;
3502 if (GET_CODE (x) != MEM
3503 || !s390_decompose_address (XEXP (x, 0), &ad)
3504 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3509 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3511 fprintf (file, "0");
3516 if (GET_CODE (x) == REG)
3517 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3518 else if (GET_CODE (x) == MEM)
3519 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3525 if (GET_CODE (x) == REG)
3526 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3527 else if (GET_CODE (x) == MEM)
3528 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3534 print_shift_count_operand (file, x);
3538 switch (GET_CODE (x))
3541 fprintf (file, "%s", reg_names[REGNO (x)]);
3545 output_address (XEXP (x, 0));
3552 s390_output_symbolic_const (file, x);
3557 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3558 else if (code == 'x')
3559 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3560 else if (code == 'h')
3561 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3562 else if (code == 'i')
3563 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3564 s390_extract_part (x, HImode, 0));
3565 else if (code == 'j')
3566 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3567 s390_extract_part (x, HImode, -1));
3569 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3573 if (GET_MODE (x) != VOIDmode)
3576 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3577 else if (code == 'x')
3578 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3579 else if (code == 'h')
3580 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3586 fatal_insn ("UNKNOWN in print_operand !?", x);
3591 /* Target hook for assembling integer objects. We need to define it
3592 here to work a round a bug in some versions of GAS, which couldn't
3593 handle values smaller than INT_MIN when printed in decimal. */
3596 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3598 if (size == 8 && aligned_p
3599 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3601 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3605 return default_assemble_integer (x, size, aligned_p);
3608 /* Returns true if register REGNO is used for forming
3609 a memory address in expression X. */
3612 reg_used_in_mem_p (int regno, rtx x)
3614 enum rtx_code code = GET_CODE (x);
3620 if (refers_to_regno_p (regno, regno+1,
3624 else if (code == SET
3625 && GET_CODE (SET_DEST (x)) == PC)
3627 if (refers_to_regno_p (regno, regno+1,
3632 fmt = GET_RTX_FORMAT (code);
3633 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3636 && reg_used_in_mem_p (regno, XEXP (x, i)))
3639 else if (fmt[i] == 'E')
3640 for (j = 0; j < XVECLEN (x, i); j++)
3641 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3647 /* Returns true if expression DEP_RTX sets an address register
3648 used by instruction INSN to address memory. */
3651 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3655 if (GET_CODE (dep_rtx) == INSN)
3656 dep_rtx = PATTERN (dep_rtx);
3658 if (GET_CODE (dep_rtx) == SET)
3660 target = SET_DEST (dep_rtx);
3661 if (GET_CODE (target) == STRICT_LOW_PART)
3662 target = XEXP (target, 0);
3663 while (GET_CODE (target) == SUBREG)
3664 target = SUBREG_REG (target);
3666 if (GET_CODE (target) == REG)
3668 int regno = REGNO (target);
3670 if (s390_safe_attr_type (insn) == TYPE_LA)
3672 pat = PATTERN (insn);
3673 if (GET_CODE (pat) == PARALLEL)
3675 if (XVECLEN (pat, 0) != 2)
3677 pat = XVECEXP (pat, 0, 0);
3679 if (GET_CODE (pat) == SET)
3680 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3684 else if (get_attr_atype (insn) == ATYPE_AGEN)
3685 return reg_used_in_mem_p (regno, PATTERN (insn));
3691 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3694 s390_agen_dep_p (rtx dep_insn, rtx insn)
3696 rtx dep_rtx = PATTERN (dep_insn);
3699 if (GET_CODE (dep_rtx) == SET
3700 && addr_generation_dependency_p (dep_rtx, insn))
3702 else if (GET_CODE (dep_rtx) == PARALLEL)
3704 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3706 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3713 /* Return the modified cost of the dependency of instruction INSN
3714 on instruction DEP_INSN through the link LINK. COST is the
3715 default cost of that dependency.
3717 Data dependencies are all handled without delay. However, if a
3718 register is modified and subsequently used as base or index
3719 register of a memory reference, at least 4 cycles need to pass
3720 between setting and using the register to avoid pipeline stalls.
3721 An exception is the LA instruction. An address generated by LA can
3722 be used by introducing only a one cycle stall on the pipeline. */
3725 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3730 /* If the dependence is an anti-dependence, there is no cost. For an
3731 output dependence, there is sometimes a cost, but it doesn't seem
3732 worth handling those few cases. */
3734 if (REG_NOTE_KIND (link) != 0)
3737 /* If we can't recognize the insns, we can't really do anything. */
3738 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3741 /* DFA based scheduling checks address dependency in md file. */
3742 if (s390_use_dfa_pipeline_interface ())
3744 /* Operand forward in case of lr, load and la. */
3745 if (s390_tune == PROCESSOR_2084_Z990
3747 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3748 || s390_safe_attr_type (dep_insn) == TYPE_LR
3749 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3754 dep_rtx = PATTERN (dep_insn);
3756 if (GET_CODE (dep_rtx) == SET
3757 && addr_generation_dependency_p (dep_rtx, insn))
3758 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3759 else if (GET_CODE (dep_rtx) == PARALLEL)
3761 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3763 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3764 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3770 /* A C statement (sans semicolon) to update the integer scheduling priority
3771 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3772 reduce the priority to execute INSN later. Do not define this macro if
3773 you do not need to adjust the scheduling priorities of insns.
3775 A STD instruction should be scheduled earlier,
3776 in order to use the bypass. */
3779 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3781 if (! INSN_P (insn))
3784 if (s390_tune != PROCESSOR_2084_Z990)
3787 switch (s390_safe_attr_type (insn))
3791 priority = priority << 3;
3794 priority = priority << 1;
3802 /* The number of instructions that can be issued per cycle. */
3805 s390_issue_rate (void)
3807 if (s390_tune == PROCESSOR_2084_Z990)
3812 /* If the following function returns TRUE, we will use the the DFA
3816 s390_use_dfa_pipeline_interface (void)
3818 if (s390_tune == PROCESSOR_2064_Z900
3819 || s390_tune == PROCESSOR_2084_Z990)
3826 s390_first_cycle_multipass_dfa_lookahead (void)
3828 return s390_use_dfa_pipeline_interface () ? 4 : 0;
3831 /* Called after issuing each insn.
3832 Triggers default sort algorithm to better slot instructions. */
3835 s390_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
3836 int sched_verbose ATTRIBUTE_UNUSED,
3837 rtx *ready ATTRIBUTE_UNUSED,
3838 int *pn_ready ATTRIBUTE_UNUSED,
3839 int clock_var ATTRIBUTE_UNUSED)
3841 return s390_issue_rate();
3845 /* Split all branches that exceed the maximum distance.
3846 Returns true if this created a new literal pool entry. */
3849 s390_split_branches (void)
3851 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
3852 int new_literal = 0;
3853 rtx insn, pat, tmp, target;
3856 /* We need correct insn addresses. */
3858 shorten_branches (get_insns ());
3860 /* Find all branches that exceed 64KB, and split them. */
3862 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3864 if (GET_CODE (insn) != JUMP_INSN)
3867 pat = PATTERN (insn);
3868 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
3869 pat = XVECEXP (pat, 0, 0);
3870 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
3873 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
3875 label = &SET_SRC (pat);
3877 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
3879 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
3880 label = &XEXP (SET_SRC (pat), 1);
3881 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
3882 label = &XEXP (SET_SRC (pat), 2);
3889 if (get_attr_length (insn) <= 4)
3892 /* We are going to use the return register as scratch register,
3893 make sure it will be saved/restored by the prologue/epilogue. */
3894 cfun->machine->save_return_addr_p = 1;
3899 tmp = force_const_mem (Pmode, *label);
3900 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
3901 INSN_ADDRESSES_NEW (tmp, -1);
3908 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
3909 UNSPEC_LTREL_OFFSET);
3910 target = gen_rtx_CONST (Pmode, target);
3911 target = force_const_mem (Pmode, target);
3912 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
3913 INSN_ADDRESSES_NEW (tmp, -1);
3915 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
3917 target = gen_rtx_PLUS (Pmode, temp_reg, target);
3920 if (!validate_change (insn, label, target, 0))
3928 /* Find a literal pool symbol referenced in RTX X, and store
3929 it at REF. Will abort if X contains references to more than
3930 one such pool symbol; multiple references to the same symbol
3931 are allowed, however.
3933 The rtx pointed to by REF must be initialized to NULL_RTX
3934 by the caller before calling this routine. */
3937 find_constant_pool_ref (rtx x, rtx *ref)
3942 /* Ignore LTREL_BASE references. */
3943 if (GET_CODE (x) == UNSPEC
3944 && XINT (x, 1) == UNSPEC_LTREL_BASE)
3946 /* Likewise POOL_ENTRY insns. */
3947 if (GET_CODE (x) == UNSPEC_VOLATILE
3948 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
3951 if (GET_CODE (x) == SYMBOL_REF
3952 && CONSTANT_POOL_ADDRESS_P (x))
3954 if (*ref == NULL_RTX)
3960 fmt = GET_RTX_FORMAT (GET_CODE (x));
3961 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
3965 find_constant_pool_ref (XEXP (x, i), ref);
3967 else if (fmt[i] == 'E')
3969 for (j = 0; j < XVECLEN (x, i); j++)
3970 find_constant_pool_ref (XVECEXP (x, i, j), ref);
3975 /* Replace every reference to the literal pool symbol REF
3976 in X by the address ADDR. Fix up MEMs as required. */
3979 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
3987 /* Literal pool references can only occur inside a MEM ... */
3988 if (GET_CODE (*x) == MEM)
3990 rtx memref = XEXP (*x, 0);
3994 *x = replace_equiv_address (*x, addr);
3998 if (GET_CODE (memref) == CONST
3999 && GET_CODE (XEXP (memref, 0)) == PLUS
4000 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4001 && XEXP (XEXP (memref, 0), 0) == ref)
4003 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4004 *x = replace_equiv_address (*x, plus_constant (addr, off));
4009 /* ... or a load-address type pattern. */
4010 if (GET_CODE (*x) == SET)
4012 rtx addrref = SET_SRC (*x);
4016 SET_SRC (*x) = addr;
4020 if (GET_CODE (addrref) == CONST
4021 && GET_CODE (XEXP (addrref, 0)) == PLUS
4022 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4023 && XEXP (XEXP (addrref, 0), 0) == ref)
4025 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4026 SET_SRC (*x) = plus_constant (addr, off);
4031 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4032 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4036 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4038 else if (fmt[i] == 'E')
4040 for (j = 0; j < XVECLEN (*x, i); j++)
4041 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4046 /* Check whether X contains an UNSPEC_LTREL_BASE.
4047 Return its constant pool symbol if found, NULL_RTX otherwise. */
4050 find_ltrel_base (rtx x)
4055 if (GET_CODE (x) == UNSPEC
4056 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4057 return XVECEXP (x, 0, 0);
4059 fmt = GET_RTX_FORMAT (GET_CODE (x));
4060 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4064 rtx fnd = find_ltrel_base (XEXP (x, i));
4068 else if (fmt[i] == 'E')
4070 for (j = 0; j < XVECLEN (x, i); j++)
4072 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4082 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4085 replace_ltrel_base (rtx *x, rtx base)
4090 if (GET_CODE (*x) == UNSPEC
4091 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4097 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4098 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4102 replace_ltrel_base (&XEXP (*x, i), base);
4104 else if (fmt[i] == 'E')
4106 for (j = 0; j < XVECLEN (*x, i); j++)
4107 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4113 /* We keep a list of constants which we have to add to internal
4114 constant tables in the middle of large functions. */
4116 #define NR_C_MODES 7
4117 enum machine_mode constant_modes[NR_C_MODES] =
4128 struct constant *next;
4133 struct constant_pool
4135 struct constant_pool *next;
4140 struct constant *constants[NR_C_MODES];
4145 static struct constant_pool * s390_mainpool_start (void);
4146 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4147 static void s390_mainpool_cancel (struct constant_pool *);
4149 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4150 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4151 static void s390_chunkify_cancel (struct constant_pool *);
4153 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4154 static void s390_end_pool (struct constant_pool *, rtx);
4155 static void s390_add_pool_insn (struct constant_pool *, rtx);
4156 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4157 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4158 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4159 static rtx s390_dump_pool (struct constant_pool *, bool);
4160 static struct constant_pool *s390_alloc_pool (void);
4161 static void s390_free_pool (struct constant_pool *);
4163 /* Create new constant pool covering instructions starting at INSN
4164 and chain it to the end of POOL_LIST. */
4166 static struct constant_pool *
4167 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4169 struct constant_pool *pool, **prev;
4171 pool = s390_alloc_pool ();
4172 pool->first_insn = insn;
4174 for (prev = pool_list; *prev; prev = &(*prev)->next)
4181 /* End range of instructions covered by POOL at INSN and emit
4182 placeholder insn representing the pool. */
4185 s390_end_pool (struct constant_pool *pool, rtx insn)
4187 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4190 insn = get_last_insn ();
4192 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4193 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4196 /* Add INSN to the list of insns covered by POOL. */
4199 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4201 bitmap_set_bit (pool->insns, INSN_UID (insn));
4204 /* Return pool out of POOL_LIST that covers INSN. */
4206 static struct constant_pool *
4207 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4209 struct constant_pool *pool;
4211 for (pool = pool_list; pool; pool = pool->next)
4212 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4218 /* Add constant VAL of mode MODE to the constant pool POOL. */
4221 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4226 for (i = 0; i < NR_C_MODES; i++)
4227 if (constant_modes[i] == mode)
4229 if (i == NR_C_MODES)
4232 for (c = pool->constants[i]; c != NULL; c = c->next)
4233 if (rtx_equal_p (val, c->value))
4238 c = (struct constant *) xmalloc (sizeof *c);
4240 c->label = gen_label_rtx ();
4241 c->next = pool->constants[i];
4242 pool->constants[i] = c;
4243 pool->size += GET_MODE_SIZE (mode);
4247 /* Find constant VAL of mode MODE in the constant pool POOL.
4248 Return an RTX describing the distance from the start of
4249 the pool to the location of the new constant. */
4252 s390_find_constant (struct constant_pool *pool, rtx val,
4253 enum machine_mode mode)
4259 for (i = 0; i < NR_C_MODES; i++)
4260 if (constant_modes[i] == mode)
4262 if (i == NR_C_MODES)
4265 for (c = pool->constants[i]; c != NULL; c = c->next)
4266 if (rtx_equal_p (val, c->value))
4272 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4273 gen_rtx_LABEL_REF (Pmode, pool->label));
4274 offset = gen_rtx_CONST (Pmode, offset);
4278 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4279 do not emit the pool base label. */
4282 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4288 /* Pool start insn switches to proper section
4289 and guarantees necessary alignment. */
4290 if (TARGET_CPU_ZARCH)
4291 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4293 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4294 INSN_ADDRESSES_NEW (insn, -1);
4298 insn = emit_label_after (pool->label, insn);
4299 INSN_ADDRESSES_NEW (insn, -1);
4302 /* Dump constants in descending alignment requirement order,
4303 ensuring proper alignment for every constant. */
4304 for (i = 0; i < NR_C_MODES; i++)
4305 for (c = pool->constants[i]; c; c = c->next)
4307 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4308 rtx value = c->value;
4309 if (GET_CODE (value) == CONST
4310 && GET_CODE (XEXP (value, 0)) == UNSPEC
4311 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4312 && XVECLEN (XEXP (value, 0), 0) == 1)
4314 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4315 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4316 value = gen_rtx_CONST (VOIDmode, value);
4319 insn = emit_label_after (c->label, insn);
4320 INSN_ADDRESSES_NEW (insn, -1);
4322 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4323 gen_rtvec (1, value),
4324 UNSPECV_POOL_ENTRY);
4325 insn = emit_insn_after (value, insn);
4326 INSN_ADDRESSES_NEW (insn, -1);
4329 /* Pool end insn switches back to previous section
4330 and guarantees necessary alignment. */
4331 if (TARGET_CPU_ZARCH)
4332 insn = emit_insn_after (gen_pool_end_64 (), insn);
4334 insn = emit_insn_after (gen_pool_end_31 (), insn);
4335 INSN_ADDRESSES_NEW (insn, -1);
4337 insn = emit_barrier_after (insn);
4338 INSN_ADDRESSES_NEW (insn, -1);
4340 /* Remove placeholder insn. */
4341 remove_insn (pool->pool_insn);
4346 /* Allocate new constant_pool structure. */
4348 static struct constant_pool *
4349 s390_alloc_pool (void)
4351 struct constant_pool *pool;
4354 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4356 for (i = 0; i < NR_C_MODES; i++)
4357 pool->constants[i] = NULL;
4359 pool->label = gen_label_rtx ();
4360 pool->first_insn = NULL_RTX;
4361 pool->pool_insn = NULL_RTX;
4362 pool->insns = BITMAP_XMALLOC ();
4368 /* Free all memory used by POOL. */
4371 s390_free_pool (struct constant_pool *pool)
4375 for (i = 0; i < NR_C_MODES; i++)
4377 struct constant *c = pool->constants[i];
4380 struct constant *next = c->next;
4386 BITMAP_XFREE (pool->insns);
4391 /* Collect main literal pool. Return NULL on overflow. */
4393 static struct constant_pool *
4394 s390_mainpool_start (void)
4396 struct constant_pool *pool;
4399 pool = s390_alloc_pool ();
4401 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4403 if (GET_CODE (insn) == INSN
4404 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4405 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4407 if (pool->pool_insn)
4409 pool->pool_insn = insn;
4412 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4414 rtx pool_ref = NULL_RTX;
4415 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4418 rtx constant = get_pool_constant (pool_ref);
4419 enum machine_mode mode = get_pool_mode (pool_ref);
4420 s390_add_constant (pool, constant, mode);
4425 if (!pool->pool_insn)
4428 if (pool->size >= 4096)
4430 s390_free_pool (pool);
4437 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4438 Modify the current function to output the pool constants as well as
4439 the pool register setup instruction. BASE_REG is the register to
4440 be used as pool base register. */
4443 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4447 /* If the pool is empty, we're done. */
4448 if (pool->size == 0)
4450 remove_insn (pool->pool_insn);
4451 s390_free_pool (pool);
4455 /* We need correct insn addresses. */
4456 shorten_branches (get_insns ());
4458 /* On zSeries, we use a LARL to load the pool register. The pool is
4459 located in the .rodata section, so we emit it after the function. */
4460 if (TARGET_CPU_ZARCH)
4462 insn = gen_main_base_64 (base_reg, pool->label);
4463 insn = emit_insn_after (insn, pool->pool_insn);
4464 INSN_ADDRESSES_NEW (insn, -1);
4465 remove_insn (pool->pool_insn);
4467 insn = get_last_insn ();
4468 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4469 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4471 s390_dump_pool (pool, 0);
4474 /* On S/390, if the total size of the function's code plus literal pool
4475 does not exceed 4096 bytes, we use BASR to set up a function base
4476 pointer, and emit the literal pool at the end of the function. */
4477 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4478 + pool->size + 8 /* alignment slop */ < 4096)
4480 insn = gen_main_base_31_small (base_reg, pool->label);
4481 insn = emit_insn_after (insn, pool->pool_insn);
4482 INSN_ADDRESSES_NEW (insn, -1);
4483 remove_insn (pool->pool_insn);
4485 insn = emit_label_after (pool->label, insn);
4486 INSN_ADDRESSES_NEW (insn, -1);
4488 insn = get_last_insn ();
4489 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4490 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4492 s390_dump_pool (pool, 1);
4495 /* Otherwise, we emit an inline literal pool and use BASR to branch
4496 over it, setting up the pool register at the same time. */
4499 rtx pool_end = gen_label_rtx ();
4501 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4502 insn = emit_insn_after (insn, pool->pool_insn);
4503 INSN_ADDRESSES_NEW (insn, -1);
4504 remove_insn (pool->pool_insn);
4506 insn = emit_label_after (pool->label, insn);
4507 INSN_ADDRESSES_NEW (insn, -1);
4509 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4510 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4512 insn = emit_label_after (pool_end, pool->pool_insn);
4513 INSN_ADDRESSES_NEW (insn, -1);
4515 s390_dump_pool (pool, 1);
4519 /* Replace all literal pool references. */
4521 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4524 replace_ltrel_base (&PATTERN (insn), base_reg);
4526 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4528 rtx addr, pool_ref = NULL_RTX;
4529 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4532 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4533 get_pool_mode (pool_ref));
4534 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4535 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4536 INSN_CODE (insn) = -1;
4542 /* Free the pool. */
4543 s390_free_pool (pool);
4546 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4547 We have decided we cannot use this pool, so revert all changes
4548 to the current function that were done by s390_mainpool_start. */
4550 s390_mainpool_cancel (struct constant_pool *pool)
4552 /* We didn't actually change the instruction stream, so simply
4553 free the pool memory. */
4554 s390_free_pool (pool);
4558 /* Chunkify the literal pool. BASE_REG is to be used as pool
4561 #define S390_POOL_CHUNK_MIN 0xc00
4562 #define S390_POOL_CHUNK_MAX 0xe00
4564 static struct constant_pool *
4565 s390_chunkify_start (rtx base_reg)
4567 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4570 rtx pending_ltrel = NULL_RTX;
4573 rtx (*gen_reload_base) (rtx, rtx) =
4574 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4577 /* We need correct insn addresses. */
4579 shorten_branches (get_insns ());
4581 /* Scan all insns and move literals to pool chunks. */
4583 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4585 /* Check for pending LTREL_BASE. */
4588 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4591 if (ltrel_base == pending_ltrel)
4592 pending_ltrel = NULL_RTX;
4598 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4600 rtx pool_ref = NULL_RTX;
4601 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4604 rtx constant = get_pool_constant (pool_ref);
4605 enum machine_mode mode = get_pool_mode (pool_ref);
4608 curr_pool = s390_start_pool (&pool_list, insn);
4610 s390_add_constant (curr_pool, constant, mode);
4611 s390_add_pool_insn (curr_pool, insn);
4613 /* Don't split the pool chunk between a LTREL_OFFSET load
4614 and the corresponding LTREL_BASE. */
4615 if (GET_CODE (constant) == CONST
4616 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4617 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4621 pending_ltrel = pool_ref;
4626 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4629 s390_add_pool_insn (curr_pool, insn);
4630 /* An LTREL_BASE must follow within the same basic block. */
4636 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4637 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4640 if (TARGET_CPU_ZARCH)
4642 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4645 s390_end_pool (curr_pool, NULL_RTX);
4650 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4651 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4654 /* We will later have to insert base register reload insns.
4655 Those will have an effect on code size, which we need to
4656 consider here. This calculation makes rather pessimistic
4657 worst-case assumptions. */
4658 if (GET_CODE (insn) == CODE_LABEL)
4661 if (chunk_size < S390_POOL_CHUNK_MIN
4662 && curr_pool->size < S390_POOL_CHUNK_MIN)
4665 /* Pool chunks can only be inserted after BARRIERs ... */
4666 if (GET_CODE (insn) == BARRIER)
4668 s390_end_pool (curr_pool, insn);
4673 /* ... so if we don't find one in time, create one. */
4674 else if ((chunk_size > S390_POOL_CHUNK_MAX
4675 || curr_pool->size > S390_POOL_CHUNK_MAX))
4677 rtx label, jump, barrier;
4679 /* We can insert the barrier only after a 'real' insn. */
4680 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4682 if (get_attr_length (insn) == 0)
4685 /* Don't separate LTREL_BASE from the corresponding
4686 LTREL_OFFSET load. */
4690 label = gen_label_rtx ();
4691 jump = emit_jump_insn_after (gen_jump (label), insn);
4692 barrier = emit_barrier_after (jump);
4693 insn = emit_label_after (label, barrier);
4694 JUMP_LABEL (jump) = label;
4695 LABEL_NUSES (label) = 1;
4697 INSN_ADDRESSES_NEW (jump, -1);
4698 INSN_ADDRESSES_NEW (barrier, -1);
4699 INSN_ADDRESSES_NEW (insn, -1);
4701 s390_end_pool (curr_pool, barrier);
4709 s390_end_pool (curr_pool, NULL_RTX);
4714 /* Find all labels that are branched into
4715 from an insn belonging to a different chunk. */
4717 far_labels = BITMAP_XMALLOC ();
4719 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4721 /* Labels marked with LABEL_PRESERVE_P can be target
4722 of non-local jumps, so we have to mark them.
4723 The same holds for named labels.
4725 Don't do that, however, if it is the label before
4728 if (GET_CODE (insn) == CODE_LABEL
4729 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4731 rtx vec_insn = next_real_insn (insn);
4732 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4733 PATTERN (vec_insn) : NULL_RTX;
4735 || !(GET_CODE (vec_pat) == ADDR_VEC
4736 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4737 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4740 /* If we have a direct jump (conditional or unconditional)
4741 or a casesi jump, check all potential targets. */
4742 else if (GET_CODE (insn) == JUMP_INSN)
4744 rtx pat = PATTERN (insn);
4745 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4746 pat = XVECEXP (pat, 0, 0);
4748 if (GET_CODE (pat) == SET)
4750 rtx label = JUMP_LABEL (insn);
4753 if (s390_find_pool (pool_list, label)
4754 != s390_find_pool (pool_list, insn))
4755 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4758 else if (GET_CODE (pat) == PARALLEL
4759 && XVECLEN (pat, 0) == 2
4760 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4761 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4762 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4764 /* Find the jump table used by this casesi jump. */
4765 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4766 rtx vec_insn = next_real_insn (vec_label);
4767 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4768 PATTERN (vec_insn) : NULL_RTX;
4770 && (GET_CODE (vec_pat) == ADDR_VEC
4771 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4773 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4775 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4777 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4779 if (s390_find_pool (pool_list, label)
4780 != s390_find_pool (pool_list, insn))
4781 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4788 /* Insert base register reload insns before every pool. */
4790 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4792 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4793 rtx insn = curr_pool->first_insn;
4794 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4797 /* Insert base register reload insns at every far label. */
4799 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4800 if (GET_CODE (insn) == CODE_LABEL
4801 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4803 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4806 rtx new_insn = gen_reload_base (base_reg, pool->label);
4807 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4812 BITMAP_XFREE (far_labels);
4815 /* Recompute insn addresses. */
4817 init_insn_lengths ();
4818 shorten_branches (get_insns ());
4823 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4824 After we have decided to use this list, finish implementing
4825 all changes to the current function as required. BASE_REG is
4826 to be used as pool base register. */
4829 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
4831 struct constant_pool *curr_pool = NULL;
4835 /* Replace all literal pool references. */
4837 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4840 replace_ltrel_base (&PATTERN (insn), base_reg);
4842 curr_pool = s390_find_pool (pool_list, insn);
4846 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4848 rtx addr, pool_ref = NULL_RTX;
4849 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4852 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
4853 get_pool_mode (pool_ref));
4854 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4855 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4856 INSN_CODE (insn) = -1;
4861 /* Dump out all literal pools. */
4863 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4864 s390_dump_pool (curr_pool, 0);
4866 /* Free pool list. */
4870 struct constant_pool *next = pool_list->next;
4871 s390_free_pool (pool_list);
4876 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4877 We have decided we cannot use this list, so revert all changes
4878 to the current function that were done by s390_chunkify_start. */
4881 s390_chunkify_cancel (struct constant_pool *pool_list)
4883 struct constant_pool *curr_pool = NULL;
4886 /* Remove all pool placeholder insns. */
4888 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4890 /* Did we insert an extra barrier? Remove it. */
4891 rtx barrier = PREV_INSN (curr_pool->pool_insn);
4892 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
4893 rtx label = NEXT_INSN (curr_pool->pool_insn);
4895 if (jump && GET_CODE (jump) == JUMP_INSN
4896 && barrier && GET_CODE (barrier) == BARRIER
4897 && label && GET_CODE (label) == CODE_LABEL
4898 && GET_CODE (PATTERN (jump)) == SET
4899 && SET_DEST (PATTERN (jump)) == pc_rtx
4900 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
4901 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
4904 remove_insn (barrier);
4905 remove_insn (label);
4908 remove_insn (curr_pool->pool_insn);
4911 /* Remove all base register reload insns. */
4913 for (insn = get_insns (); insn; )
4915 rtx next_insn = NEXT_INSN (insn);
4917 if (GET_CODE (insn) == INSN
4918 && GET_CODE (PATTERN (insn)) == SET
4919 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
4920 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
4926 /* Free pool list. */
4930 struct constant_pool *next = pool_list->next;
4931 s390_free_pool (pool_list);
4937 /* Output to FILE the constant pool entry EXP in mode MODE
4938 with alignment ALIGN. */
4941 s390_output_pool_entry (FILE *file, rtx exp, enum machine_mode mode,
4946 switch (GET_MODE_CLASS (mode))
4949 if (GET_CODE (exp) != CONST_DOUBLE)
4952 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
4953 assemble_real (r, mode, align);
4957 if (GET_CODE (exp) == CONST
4958 || GET_CODE (exp) == SYMBOL_REF
4959 || GET_CODE (exp) == LABEL_REF)
4961 fputs (integer_asm_op (GET_MODE_SIZE (mode), TRUE), file);
4962 s390_output_symbolic_const (file, exp);
4967 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
4977 /* Rework the prolog/epilog to avoid saving/restoring
4978 registers unnecessarily. BASE_USED specifies whether
4979 the literal pool base register needs to be saved. */
4982 s390_optimize_prolog (bool base_used)
4984 int save_first, save_last, restore_first, restore_last;
4986 rtx insn, new_insn, next_insn;
4988 /* Recompute regs_ever_live data for special registers. */
4989 regs_ever_live[BASE_REGISTER] = base_used;
4990 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
4991 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
4994 /* Find first and last gpr to be saved. */
4996 for (i = 6; i < 16; i++)
4997 if (regs_ever_live[i])
4999 || i == STACK_POINTER_REGNUM
5000 || i == RETURN_REGNUM
5001 || i == BASE_REGISTER
5002 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5005 for (j = 15; j > i; j--)
5006 if (regs_ever_live[j])
5008 || j == STACK_POINTER_REGNUM
5009 || j == RETURN_REGNUM
5010 || j == BASE_REGISTER
5011 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5016 /* Nothing to save/restore. */
5017 save_first = restore_first = -1;
5018 save_last = restore_last = -1;
5022 /* Save/restore from i to j. */
5023 save_first = restore_first = i;
5024 save_last = restore_last = j;
5027 /* Varargs functions need to save gprs 2 to 6. */
5028 if (current_function_stdarg)
5036 /* If all special registers are in fact used, there's nothing we
5037 can do, so no point in walking the insn list. */
5038 if (i <= BASE_REGISTER && j >= BASE_REGISTER
5039 && (TARGET_CPU_ZARCH || (i <= RETURN_REGNUM && j >= RETURN_REGNUM)))
5043 /* Search for prolog/epilog insns and replace them. */
5045 for (insn = get_insns (); insn; insn = next_insn)
5047 int first, last, off;
5048 rtx set, base, offset;
5050 next_insn = NEXT_INSN (insn);
5052 if (GET_CODE (insn) != INSN)
5055 if (GET_CODE (PATTERN (insn)) == PARALLEL
5056 && store_multiple_operation (PATTERN (insn), VOIDmode))
5058 set = XVECEXP (PATTERN (insn), 0, 0);
5059 first = REGNO (SET_SRC (set));
5060 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5061 offset = const0_rtx;
5062 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5063 off = INTVAL (offset) - first * UNITS_PER_WORD;
5065 if (GET_CODE (base) != REG || off < 0)
5067 if (first > BASE_REGISTER || last < BASE_REGISTER)
5070 if (save_first != -1)
5072 new_insn = save_gprs (base, off, save_first, save_last);
5073 new_insn = emit_insn_before (new_insn, insn);
5074 INSN_ADDRESSES_NEW (new_insn, -1);
5081 if (GET_CODE (PATTERN (insn)) == SET
5082 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5083 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGISTER
5084 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5086 set = PATTERN (insn);
5087 offset = const0_rtx;
5088 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5089 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5091 if (GET_CODE (base) != REG || off < 0)
5094 if (save_first != -1)
5096 new_insn = save_gprs (base, off, save_first, save_last);
5097 new_insn = emit_insn_before (new_insn, insn);
5098 INSN_ADDRESSES_NEW (new_insn, -1);
5105 if (GET_CODE (PATTERN (insn)) == PARALLEL
5106 && load_multiple_operation (PATTERN (insn), VOIDmode))
5108 set = XVECEXP (PATTERN (insn), 0, 0);
5109 first = REGNO (SET_DEST (set));
5110 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5111 offset = const0_rtx;
5112 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5113 off = INTVAL (offset) - first * UNITS_PER_WORD;
5115 if (GET_CODE (base) != REG || off < 0)
5117 if (first > BASE_REGISTER || last < BASE_REGISTER)
5120 if (restore_first != -1)
5122 new_insn = restore_gprs (base, off, restore_first, restore_last);
5123 new_insn = emit_insn_before (new_insn, insn);
5124 INSN_ADDRESSES_NEW (new_insn, -1);
5131 if (GET_CODE (PATTERN (insn)) == SET
5132 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5133 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGISTER
5134 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5136 set = PATTERN (insn);
5137 offset = const0_rtx;
5138 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5139 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5141 if (GET_CODE (base) != REG || off < 0)
5144 if (restore_first != -1)
5146 new_insn = restore_gprs (base, off, restore_first, restore_last);
5147 new_insn = emit_insn_before (new_insn, insn);
5148 INSN_ADDRESSES_NEW (new_insn, -1);
5157 /* Perform machine-dependent processing. */
5162 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5163 bool base_used = false;
5164 bool pool_overflow = false;
5166 /* Make sure all splits have been performed; splits after
5167 machine_dependent_reorg might confuse insn length counts. */
5168 split_all_insns_noflow ();
5171 /* In small leaf functions, try to use an unused call-clobbered
5172 register as base register to avoid save/restore overhead. */
5173 if (current_function_is_leaf && !regs_ever_live[5])
5174 base_reg = gen_rtx_REG (Pmode, 5);
5177 /* Install the main literal pool and the associated base
5178 register load insns.
5180 In addition, there are two problematic situations we need
5183 - the literal pool might be > 4096 bytes in size, so that
5184 some of its elements cannot be directly accessed
5186 - a branch target might be > 64K away from the branch, so that
5187 it is not possible to use a PC-relative instruction.
5189 To fix those, we split the single literal pool into multiple
5190 pool chunks, reloading the pool base register at various
5191 points throughout the function to ensure it always points to
5192 the pool chunk the following code expects, and / or replace
5193 PC-relative branches by absolute branches.
5195 However, the two problems are interdependent: splitting the
5196 literal pool can move a branch further away from its target,
5197 causing the 64K limit to overflow, and on the other hand,
5198 replacing a PC-relative branch by an absolute branch means
5199 we need to put the branch target address into the literal
5200 pool, possibly causing it to overflow.
5202 So, we loop trying to fix up both problems until we manage
5203 to satisfy both conditions at the same time. Note that the
5204 loop is guaranteed to terminate as every pass of the loop
5205 strictly decreases the total number of PC-relative branches
5206 in the function. (This is not completely true as there
5207 might be branch-over-pool insns introduced by chunkify_start.
5208 Those never need to be split however.) */
5212 struct constant_pool *pool = NULL;
5214 /* Collect the literal pool. */
5217 pool = s390_mainpool_start ();
5219 pool_overflow = true;
5222 /* If literal pool overflowed, start to chunkify it. */
5224 pool = s390_chunkify_start (base_reg);
5226 /* Split out-of-range branches. If this has created new
5227 literal pool entries, cancel current chunk list and
5228 recompute it. zSeries machines have large branch
5229 instructions, so we never need to split a branch. */
5230 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5233 s390_chunkify_cancel (pool);
5235 s390_mainpool_cancel (pool);
5240 /* If we made it up to here, both conditions are satisfied.
5241 Finish up literal pool related changes. */
5242 if ((pool_overflow || pool->size > 0)
5243 && REGNO (base_reg) == BASE_REGISTER)
5247 s390_chunkify_finish (pool, base_reg);
5249 s390_mainpool_finish (pool, base_reg);
5254 s390_optimize_prolog (base_used);
5258 /* Return an RTL expression representing the value of the return address
5259 for the frame COUNT steps up from the current frame. FRAME is the
5260 frame pointer of that frame. */
5263 s390_return_addr_rtx (int count, rtx frame)
5267 /* Without backchain, we fail for all but the current frame. */
5269 if (!TARGET_BACKCHAIN && count > 0)
5272 /* For the current frame, we need to make sure the initial
5273 value of RETURN_REGNUM is actually saved. */
5276 cfun->machine->save_return_addr_p = true;
5278 /* To retrieve the return address we read the stack slot where the
5279 corresponding RETURN_REGNUM value was saved. */
5281 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5282 addr = memory_address (Pmode, addr);
5283 return gen_rtx_MEM (Pmode, addr);
5286 /* Find first call clobbered register unsused in a function.
5287 This could be used as base register in a leaf function
5288 or for holding the return address before epilogue. */
5291 find_unused_clobbered_reg (void)
5294 for (i = 0; i < 6; i++)
5295 if (!regs_ever_live[i])
5300 /* Fill FRAME with info about frame of current function. */
5303 s390_frame_info (void)
5306 HOST_WIDE_INT fsize = get_frame_size ();
5308 if (!TARGET_64BIT && fsize > 0x7fff0000)
5309 fatal_error ("Total size of local variables exceeds architecture limit.");
5311 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5312 cfun->machine->save_fprs_p = 0;
5314 for (i = 24; i < 32; i++)
5315 if (regs_ever_live[i] && !global_regs[i])
5317 cfun->machine->save_fprs_p = 1;
5321 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5323 /* Does function need to setup frame and save area. */
5325 if (! current_function_is_leaf
5326 || cfun->machine->frame_size > 0
5327 || current_function_calls_alloca
5328 || current_function_stdarg)
5329 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5331 /* If we use the return register, we'll need to make sure
5332 it is going to be saved/restored. */
5334 if (!current_function_is_leaf
5335 || regs_ever_live[RETURN_REGNUM])
5336 cfun->machine->save_return_addr_p = 1;
5338 /* Find first and last gpr to be saved. Note that at this point,
5339 we assume the base register and -on S/390- the return register
5340 always need to be saved. This is done because the usage of these
5341 register might change even after the prolog was emitted.
5342 If it turns out later that we really don't need them, the
5343 prolog/epilog code is modified again. */
5345 regs_ever_live[BASE_REGISTER] = 1;
5346 if (!TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p)
5347 regs_ever_live[RETURN_REGNUM] = 1;
5348 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5350 for (i = 6; i < 16; i++)
5351 if (regs_ever_live[i])
5353 || i == STACK_POINTER_REGNUM
5354 || i == RETURN_REGNUM
5355 || i == BASE_REGISTER
5356 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5359 for (j = 15; j > i; j--)
5360 if (regs_ever_live[j])
5362 || j == STACK_POINTER_REGNUM
5363 || j == RETURN_REGNUM
5364 || j == BASE_REGISTER
5365 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5368 /* Save / Restore from gpr i to j. */
5369 cfun->machine->first_save_gpr = i;
5370 cfun->machine->first_restore_gpr = i;
5371 cfun->machine->last_save_gpr = j;
5373 /* Varargs functions need to save gprs 2 to 6. */
5374 if (current_function_stdarg)
5375 cfun->machine->first_save_gpr = 2;
5378 /* Return offset between argument pointer and frame pointer
5379 initially after prologue. */
5382 s390_arg_frame_offset (void)
5384 HOST_WIDE_INT fsize = get_frame_size ();
5387 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5390 for (i = 24; i < 32; i++)
5391 if (regs_ever_live[i] && !global_regs[i])
5397 fsize = fsize + save_fprs_p * 64;
5399 /* Does function need to setup frame and save area. */
5401 if (! current_function_is_leaf
5403 || current_function_calls_alloca
5404 || current_function_stdarg)
5405 fsize += STARTING_FRAME_OFFSET;
5406 return fsize + STACK_POINTER_OFFSET;
5409 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5410 to register BASE. Return generated insn. */
5413 save_fpr (rtx base, int offset, int regnum)
5416 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5417 set_mem_alias_set (addr, s390_sr_alias_set);
5419 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5422 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5423 to register BASE. Return generated insn. */
5426 restore_fpr (rtx base, int offset, int regnum)
5429 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5430 set_mem_alias_set (addr, s390_sr_alias_set);
5432 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5435 /* Generate insn to save registers FIRST to LAST into
5436 the register save area located at offset OFFSET
5437 relative to register BASE. */
5440 save_gprs (rtx base, int offset, int first, int last)
5442 rtx addr, insn, note;
5445 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5446 addr = gen_rtx_MEM (Pmode, addr);
5447 set_mem_alias_set (addr, s390_sr_alias_set);
5449 /* Special-case single register. */
5453 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5455 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5457 RTX_FRAME_RELATED_P (insn) = 1;
5462 insn = gen_store_multiple (addr,
5463 gen_rtx_REG (Pmode, first),
5464 GEN_INT (last - first + 1));
5467 /* We need to set the FRAME_RELATED flag on all SETs
5468 inside the store-multiple pattern.
5470 However, we must not emit DWARF records for registers 2..5
5471 if they are stored for use by variable arguments ...
5473 ??? Unfortunately, it is not enough to simply not the the
5474 FRAME_RELATED flags for those SETs, because the first SET
5475 of the PARALLEL is always treated as if it had the flag
5476 set, even if it does not. Therefore we emit a new pattern
5477 without those registers as REG_FRAME_RELATED_EXPR note. */
5481 rtx pat = PATTERN (insn);
5483 for (i = 0; i < XVECLEN (pat, 0); i++)
5484 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5485 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5487 RTX_FRAME_RELATED_P (insn) = 1;
5491 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5492 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5493 gen_rtx_REG (Pmode, 6),
5494 GEN_INT (last - 6 + 1));
5495 note = PATTERN (note);
5498 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5499 note, REG_NOTES (insn));
5501 for (i = 0; i < XVECLEN (note, 0); i++)
5502 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5503 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5505 RTX_FRAME_RELATED_P (insn) = 1;
5511 /* Generate insn to restore registers FIRST to LAST from
5512 the register save area located at offset OFFSET
5513 relative to register BASE. */
5516 restore_gprs (rtx base, int offset, int first, int last)
5520 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5521 addr = gen_rtx_MEM (Pmode, addr);
5522 set_mem_alias_set (addr, s390_sr_alias_set);
5524 /* Special-case single register. */
5528 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5530 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5535 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5537 GEN_INT (last - first + 1));
5541 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5542 annotate generated insns with REG_MAYBE_DEAD notes. */
5544 static GTY(()) rtx got_symbol;
5546 s390_load_got (int maybe_dead)
5550 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5551 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5554 if (TARGET_CPU_ZARCH)
5556 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5558 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5565 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5566 UNSPEC_LTREL_OFFSET);
5567 offset = gen_rtx_CONST (Pmode, offset);
5568 offset = force_const_mem (Pmode, offset);
5570 insn = emit_move_insn (pic_offset_table_rtx, offset);
5572 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5575 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5577 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5579 insn = emit_move_insn (pic_offset_table_rtx, offset);
5581 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5586 /* Expand the prologue into a bunch of separate insns. */
5589 s390_emit_prologue (void)
5595 /* Compute frame_info. */
5599 /* Choose best register to use for temp use within prologue.
5600 See below for why TPF must use the register 1. */
5602 if (!current_function_is_leaf
5604 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5606 temp_reg = gen_rtx_REG (Pmode, 1);
5608 /* Save call saved gprs. */
5610 insn = save_gprs (stack_pointer_rtx, 0,
5611 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5614 /* Dummy insn to mark literal pool slot. */
5616 emit_insn (gen_main_pool ());
5618 /* Save fprs for variable args. */
5620 if (current_function_stdarg)
5621 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5622 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5624 /* Save fprs 4 and 6 if used (31 bit ABI). */
5627 for (i = 18; i < 20; i++)
5628 if (regs_ever_live[i] && !global_regs[i])
5630 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5631 RTX_FRAME_RELATED_P (insn) = 1;
5634 /* Decrement stack pointer. */
5636 if (cfun->machine->frame_size > 0)
5638 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5640 /* Save incoming stack pointer into temp reg. */
5642 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5644 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5647 /* Subtract frame size from stack pointer. */
5649 if (DISP_IN_RANGE (INTVAL (frame_off)))
5651 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5652 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5654 insn = emit_insn (insn);
5658 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5659 frame_off = force_const_mem (Pmode, frame_off);
5661 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5664 RTX_FRAME_RELATED_P (insn) = 1;
5666 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5667 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5668 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5669 GEN_INT (-cfun->machine->frame_size))),
5672 /* Set backchain. */
5674 if (TARGET_BACKCHAIN)
5676 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5677 set_mem_alias_set (addr, s390_sr_alias_set);
5678 insn = emit_insn (gen_move_insn (addr, temp_reg));
5681 /* If we support asynchronous exceptions (e.g. for Java),
5682 we need to make sure the backchain pointer is set up
5683 before any possibly trapping memory access. */
5685 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5687 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5688 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5692 /* Save fprs 8 - 15 (64 bit ABI). */
5694 if (cfun->machine->save_fprs_p)
5696 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5698 for (i = 24; i < 32; i++)
5699 if (regs_ever_live[i] && !global_regs[i])
5701 rtx addr = plus_constant (stack_pointer_rtx,
5702 cfun->machine->frame_size - 64 + (i-24)*8);
5704 insn = save_fpr (temp_reg, (i-24)*8, i);
5705 RTX_FRAME_RELATED_P (insn) = 1;
5707 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5708 gen_rtx_SET (VOIDmode,
5709 gen_rtx_MEM (DFmode, addr),
5710 gen_rtx_REG (DFmode, i)),
5715 /* Set frame pointer, if needed. */
5717 if (frame_pointer_needed)
5719 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5720 RTX_FRAME_RELATED_P (insn) = 1;
5723 /* Set up got pointer, if needed. */
5725 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5726 s390_load_got(true);
5730 /* Generate a BAS instruction to serve as a function
5731 entry intercept to facilitate the use of tracing
5732 algorithms located at the branch target.
5734 This must use register 1. */
5739 addr = GEN_INT (0xfe0);
5740 unkn = CONST0_RTX (SImode);
5741 link = gen_rtx_REG (Pmode, 1);
5743 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5745 /* Emit a blockage here so that all code
5746 lies between the profiling mechanisms. */
5747 emit_insn (gen_blockage ());
5751 /* Expand the epilogue into a bunch of separate insns. */
5754 s390_emit_epilogue (void)
5756 rtx frame_pointer, return_reg;
5757 int area_bottom, area_top, offset = 0;
5764 /* Generate a BAS instruction to serve as a function
5765 entry intercept to facilitate the use of tracing
5766 algorithms located at the branch target.
5768 This must use register 1. */
5774 addr = GEN_INT (0xfe6);
5775 unkn = CONST0_RTX (SImode);
5776 link = gen_rtx_REG (Pmode, 1);
5778 /* Emit a blockage here so that all code
5779 lies between the profiling mechanisms. */
5780 emit_insn (gen_blockage ());
5782 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5785 /* Check whether to use frame or stack pointer for restore. */
5787 frame_pointer = frame_pointer_needed ?
5788 hard_frame_pointer_rtx : stack_pointer_rtx;
5790 /* Compute which parts of the save area we need to access. */
5792 if (cfun->machine->first_restore_gpr != -1)
5794 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5795 area_top = (cfun->machine->last_save_gpr + 1) * UNITS_PER_WORD;
5799 area_bottom = INT_MAX;
5805 if (cfun->machine->save_fprs_p)
5807 if (area_bottom > -64)
5815 for (i = 18; i < 20; i++)
5816 if (regs_ever_live[i] && !global_regs[i])
5818 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5819 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5820 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5821 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5825 /* Check whether we can access the register save area.
5826 If not, increment the frame pointer as required. */
5828 if (area_top <= area_bottom)
5830 /* Nothing to restore. */
5832 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5833 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5835 /* Area is in range. */
5836 offset = cfun->machine->frame_size;
5840 rtx insn, frame_off;
5842 offset = area_bottom < 0 ? -area_bottom : 0;
5843 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5845 if (DISP_IN_RANGE (INTVAL (frame_off)))
5847 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5848 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5849 insn = emit_insn (insn);
5853 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5854 frame_off = force_const_mem (Pmode, frame_off);
5856 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5860 /* Restore call saved fprs. */
5864 if (cfun->machine->save_fprs_p)
5865 for (i = 24; i < 32; i++)
5866 if (regs_ever_live[i] && !global_regs[i])
5867 restore_fpr (frame_pointer,
5868 offset - 64 + (i-24) * 8, i);
5872 for (i = 18; i < 20; i++)
5873 if (regs_ever_live[i] && !global_regs[i])
5874 restore_fpr (frame_pointer,
5875 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5878 /* Return register. */
5880 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5882 /* Restore call saved gprs. */
5884 if (cfun->machine->first_restore_gpr != -1)
5889 /* Check for global register and save them
5890 to stack location from where they get restored. */
5892 for (i = cfun->machine->first_restore_gpr;
5893 i <= cfun->machine->last_save_gpr;
5896 /* These registers are special and need to be
5897 restored in any case. */
5898 if (i == STACK_POINTER_REGNUM
5899 || i == RETURN_REGNUM
5900 || i == BASE_REGISTER
5901 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5906 addr = plus_constant (frame_pointer,
5907 offset + i * UNITS_PER_WORD);
5908 addr = gen_rtx_MEM (Pmode, addr);
5909 set_mem_alias_set (addr, s390_sr_alias_set);
5910 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
5914 /* Fetch return address from stack before load multiple,
5915 this will do good for scheduling. */
5917 if (cfun->machine->save_return_addr_p
5918 || (cfun->machine->first_restore_gpr < BASE_REGISTER
5919 && cfun->machine->last_save_gpr > RETURN_REGNUM))
5921 int return_regnum = find_unused_clobbered_reg();
5924 return_reg = gen_rtx_REG (Pmode, return_regnum);
5926 addr = plus_constant (frame_pointer,
5927 offset + RETURN_REGNUM * UNITS_PER_WORD);
5928 addr = gen_rtx_MEM (Pmode, addr);
5929 set_mem_alias_set (addr, s390_sr_alias_set);
5930 emit_move_insn (return_reg, addr);
5933 /* ??? As references to the base register are not made
5934 explicit in insn RTX code, we have to add a barrier here
5935 to prevent incorrect scheduling. */
5937 emit_insn (gen_blockage());
5939 insn = restore_gprs (frame_pointer, offset,
5940 cfun->machine->first_restore_gpr,
5941 cfun->machine->last_save_gpr);
5945 /* Return to caller. */
5947 p = rtvec_alloc (2);
5949 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
5950 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
5951 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
5955 /* Return the size in bytes of a function argument of
5956 type TYPE and/or mode MODE. At least one of TYPE or
5957 MODE must be specified. */
5960 s390_function_arg_size (enum machine_mode mode, tree type)
5963 return int_size_in_bytes (type);
5965 /* No type info available for some library calls ... */
5966 if (mode != BLKmode)
5967 return GET_MODE_SIZE (mode);
5969 /* If we have neither type nor mode, abort */
5973 /* Return true if a function argument of type TYPE and mode MODE
5974 is to be passed in a floating-point register, if available. */
5977 s390_function_arg_float (enum machine_mode mode, tree type)
5979 int size = s390_function_arg_size (mode, type);
5983 /* Soft-float changes the ABI: no floating-point registers are used. */
5984 if (TARGET_SOFT_FLOAT)
5987 /* No type info available for some library calls ... */
5989 return mode == SFmode || mode == DFmode;
5991 /* The ABI says that record types with a single member are treated
5992 just like that member would be. */
5993 while (TREE_CODE (type) == RECORD_TYPE)
5995 tree field, single = NULL_TREE;
5997 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
5999 if (TREE_CODE (field) != FIELD_DECL)
6002 if (single == NULL_TREE)
6003 single = TREE_TYPE (field);
6008 if (single == NULL_TREE)
6014 return TREE_CODE (type) == REAL_TYPE;
6017 /* Return true if a function argument of type TYPE and mode MODE
6018 is to be passed in an integer register, or a pair of integer
6019 registers, if available. */
6022 s390_function_arg_integer (enum machine_mode mode, tree type)
6024 int size = s390_function_arg_size (mode, type);
6028 /* No type info available for some library calls ... */
6030 return GET_MODE_CLASS (mode) == MODE_INT
6031 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6033 /* We accept small integral (and similar) types. */
6034 if (INTEGRAL_TYPE_P (type)
6035 || POINTER_TYPE_P (type)
6036 || TREE_CODE (type) == OFFSET_TYPE
6037 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6040 /* We also accept structs of size 1, 2, 4, 8 that are not
6041 passed in floating-point registers. */
6042 if (AGGREGATE_TYPE_P (type)
6043 && exact_log2 (size) >= 0
6044 && !s390_function_arg_float (mode, type))
6050 /* Return 1 if a function argument of type TYPE and mode MODE
6051 is to be passed by reference. The ABI specifies that only
6052 structures of size 1, 2, 4, or 8 bytes are passed by value,
6053 all other structures (and complex numbers) are passed by
6057 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
6059 int size = s390_function_arg_size (mode, type);
6065 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6068 if (TREE_CODE (type) == COMPLEX_TYPE
6069 || TREE_CODE (type) == VECTOR_TYPE)
6076 /* Update the data in CUM to advance over an argument of mode MODE and
6077 data type TYPE. (TYPE is null for libcalls where that information
6078 may not be available.). The boolean NAMED specifies whether the
6079 argument is a named argument (as opposed to an unnamed argument
6080 matching an ellipsis). */
6083 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6084 tree type, int named ATTRIBUTE_UNUSED)
6086 if (s390_function_arg_pass_by_reference (mode, type))
6090 else if (s390_function_arg_float (mode, type))
6094 else if (s390_function_arg_integer (mode, type))
6096 int size = s390_function_arg_size (mode, type);
6097 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6103 /* Define where to put the arguments to a function.
6104 Value is zero to push the argument on the stack,
6105 or a hard register in which to store the argument.
6107 MODE is the argument's machine mode.
6108 TYPE is the data type of the argument (as a tree).
6109 This is null for libcalls where that information may
6111 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6112 the preceding args and about the function being called.
6113 NAMED is nonzero if this argument is a named parameter
6114 (otherwise it is an extra parameter matching an ellipsis).
6116 On S/390, we use general purpose registers 2 through 6 to
6117 pass integer, pointer, and certain structure arguments, and
6118 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6119 to pass floating point arguments. All remaining arguments
6120 are pushed to the stack. */
6123 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6124 int named ATTRIBUTE_UNUSED)
6126 if (s390_function_arg_pass_by_reference (mode, type))
6129 if (s390_function_arg_float (mode, type))
6131 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6134 return gen_rtx_REG (mode, cum->fprs + 16);
6136 else if (s390_function_arg_integer (mode, type))
6138 int size = s390_function_arg_size (mode, type);
6139 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6141 if (cum->gprs + n_gprs > 5)
6144 return gen_rtx_REG (mode, cum->gprs + 2);
6147 /* After the real arguments, expand_call calls us once again
6148 with a void_type_node type. Whatever we return here is
6149 passed as operand 2 to the call expanders.
6151 We don't need this feature ... */
6152 else if (type == void_type_node)
6158 /* Return true if return values of type TYPE should be returned
6159 in a memory buffer whose address is passed by the caller as
6160 hidden first argument. */
6163 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6165 /* We accept small integral (and similar) types. */
6166 if (INTEGRAL_TYPE_P (type)
6167 || POINTER_TYPE_P (type)
6168 || TREE_CODE (type) == OFFSET_TYPE
6169 || TREE_CODE (type) == REAL_TYPE)
6170 return int_size_in_bytes (type) > 8;
6172 /* Aggregates and similar constructs are always returned
6174 if (AGGREGATE_TYPE_P (type)
6175 || TREE_CODE (type) == COMPLEX_TYPE
6176 || TREE_CODE (type) == VECTOR_TYPE)
6179 /* ??? We get called on all sorts of random stuff from
6180 aggregate_value_p. We can't abort, but it's not clear
6181 what's safe to return. Pretend it's a struct I guess. */
6185 /* Define where to return a (scalar) value of type TYPE.
6186 If TYPE is null, define where to return a (scalar)
6187 value of mode MODE from a libcall. */
6190 s390_function_value (tree type, enum machine_mode mode)
6194 int unsignedp = TREE_UNSIGNED (type);
6195 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6198 if (GET_MODE_CLASS (mode) != MODE_INT
6199 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6201 if (GET_MODE_SIZE (mode) > 8)
6204 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6205 return gen_rtx_REG (mode, 16);
6207 return gen_rtx_REG (mode, 2);
6211 /* Create and return the va_list datatype.
6213 On S/390, va_list is an array type equivalent to
6215 typedef struct __va_list_tag
6219 void *__overflow_arg_area;
6220 void *__reg_save_area;
6223 where __gpr and __fpr hold the number of general purpose
6224 or floating point arguments used up to now, respectively,
6225 __overflow_arg_area points to the stack location of the
6226 next argument passed on the stack, and __reg_save_area
6227 always points to the start of the register area in the
6228 call frame of the current function. The function prologue
6229 saves all registers used for argument passing into this
6230 area if the function uses variable arguments. */
6233 s390_build_builtin_va_list (void)
6235 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6237 record = lang_hooks.types.make_type (RECORD_TYPE);
6240 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6242 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6243 long_integer_type_node);
6244 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6245 long_integer_type_node);
6246 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6248 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6251 DECL_FIELD_CONTEXT (f_gpr) = record;
6252 DECL_FIELD_CONTEXT (f_fpr) = record;
6253 DECL_FIELD_CONTEXT (f_ovf) = record;
6254 DECL_FIELD_CONTEXT (f_sav) = record;
6256 TREE_CHAIN (record) = type_decl;
6257 TYPE_NAME (record) = type_decl;
6258 TYPE_FIELDS (record) = f_gpr;
6259 TREE_CHAIN (f_gpr) = f_fpr;
6260 TREE_CHAIN (f_fpr) = f_ovf;
6261 TREE_CHAIN (f_ovf) = f_sav;
6263 layout_type (record);
6265 /* The correct type is an array type of one element. */
6266 return build_array_type (record, build_index_type (size_zero_node));
6269 /* Implement va_start by filling the va_list structure VALIST.
6270 STDARG_P is always true, and ignored.
6271 NEXTARG points to the first anonymous stack argument.
6273 The following global variables are used to initialize
6274 the va_list structure:
6276 current_function_args_info:
6277 holds number of gprs and fprs used for named arguments.
6278 current_function_arg_offset_rtx:
6279 holds the offset of the first anonymous stack argument
6280 (relative to the virtual arg pointer). */
6283 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6285 HOST_WIDE_INT n_gpr, n_fpr;
6287 tree f_gpr, f_fpr, f_ovf, f_sav;
6288 tree gpr, fpr, ovf, sav, t;
6290 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6291 f_fpr = TREE_CHAIN (f_gpr);
6292 f_ovf = TREE_CHAIN (f_fpr);
6293 f_sav = TREE_CHAIN (f_ovf);
6295 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6296 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6297 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6298 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6299 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6301 /* Count number of gp and fp argument registers used. */
6303 n_gpr = current_function_args_info.gprs;
6304 n_fpr = current_function_args_info.fprs;
6306 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6307 TREE_SIDE_EFFECTS (t) = 1;
6308 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6310 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6311 TREE_SIDE_EFFECTS (t) = 1;
6312 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6314 /* Find the overflow area. */
6315 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6317 off = INTVAL (current_function_arg_offset_rtx);
6318 off = off < 0 ? 0 : off;
6319 if (TARGET_DEBUG_ARG)
6320 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6321 (int)n_gpr, (int)n_fpr, off);
6323 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6325 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6326 TREE_SIDE_EFFECTS (t) = 1;
6327 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6329 /* Find the register save area. */
6330 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6331 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6332 build_int_2 (-STACK_POINTER_OFFSET, -1));
6333 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6334 TREE_SIDE_EFFECTS (t) = 1;
6335 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6338 /* Implement va_arg by updating the va_list structure
6339 VALIST as required to retrieve an argument of type
6340 TYPE, and returning that argument.
6342 Generates code equivalent to:
6344 if (integral value) {
6345 if (size <= 4 && args.gpr < 5 ||
6346 size > 4 && args.gpr < 4 )
6347 ret = args.reg_save_area[args.gpr+8]
6349 ret = *args.overflow_arg_area++;
6350 } else if (float value) {
6352 ret = args.reg_save_area[args.fpr+64]
6354 ret = *args.overflow_arg_area++;
6355 } else if (aggregate value) {
6357 ret = *args.reg_save_area[args.gpr]
6359 ret = **args.overflow_arg_area++;
6363 s390_va_arg (tree valist, tree type)
6365 tree f_gpr, f_fpr, f_ovf, f_sav;
6366 tree gpr, fpr, ovf, sav, reg, t, u;
6367 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6368 rtx lab_false, lab_over, addr_rtx, r;
6370 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6371 f_fpr = TREE_CHAIN (f_gpr);
6372 f_ovf = TREE_CHAIN (f_fpr);
6373 f_sav = TREE_CHAIN (f_ovf);
6375 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6376 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6377 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6378 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6379 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6381 size = int_size_in_bytes (type);
6383 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6385 if (TARGET_DEBUG_ARG)
6387 fprintf (stderr, "va_arg: aggregate type");
6391 /* Aggregates are passed by reference. */
6395 sav_ofs = 2 * UNITS_PER_WORD;
6396 sav_scale = UNITS_PER_WORD;
6397 size = UNITS_PER_WORD;
6400 else if (s390_function_arg_float (TYPE_MODE (type), type))
6402 if (TARGET_DEBUG_ARG)
6404 fprintf (stderr, "va_arg: float type");
6408 /* FP args go in FP registers, if present. */
6412 sav_ofs = 16 * UNITS_PER_WORD;
6414 /* TARGET_64BIT has up to 4 parameter in fprs */
6415 max_reg = TARGET_64BIT ? 3 : 1;
6419 if (TARGET_DEBUG_ARG)
6421 fprintf (stderr, "va_arg: other type");
6425 /* Otherwise into GP registers. */
6428 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6429 sav_ofs = 2 * UNITS_PER_WORD;
6431 if (size < UNITS_PER_WORD)
6432 sav_ofs += UNITS_PER_WORD - size;
6434 sav_scale = UNITS_PER_WORD;
6441 /* Pull the value out of the saved registers ... */
6443 lab_false = gen_label_rtx ();
6444 lab_over = gen_label_rtx ();
6445 addr_rtx = gen_reg_rtx (Pmode);
6447 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL),
6449 GT, const1_rtx, Pmode, 0, lab_false);
6452 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6456 u = build (MULT_EXPR, long_integer_type_node,
6457 reg, build_int_2 (sav_scale, 0));
6458 TREE_SIDE_EFFECTS (u) = 1;
6460 t = build (PLUS_EXPR, ptr_type_node, t, u);
6461 TREE_SIDE_EFFECTS (t) = 1;
6463 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6465 emit_move_insn (addr_rtx, r);
6468 emit_jump_insn (gen_jump (lab_over));
6470 emit_label (lab_false);
6472 /* ... Otherwise out of the overflow area. */
6474 t = save_expr (ovf);
6477 /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */
6478 if (size < UNITS_PER_WORD)
6480 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0));
6481 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6482 TREE_SIDE_EFFECTS (t) = 1;
6483 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6485 t = save_expr (ovf);
6488 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6490 emit_move_insn (addr_rtx, r);
6492 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6493 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6494 TREE_SIDE_EFFECTS (t) = 1;
6495 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6497 emit_label (lab_over);
6499 /* If less than max_regs a registers are retrieved out
6500 of register save area, increment. */
6502 u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6503 build_int_2 (n_reg, 0));
6504 TREE_SIDE_EFFECTS (u) = 1;
6505 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
6509 r = gen_rtx_MEM (Pmode, addr_rtx);
6510 set_mem_alias_set (r, get_varargs_alias_set ());
6511 emit_move_insn (addr_rtx, r);
6523 S390_BUILTIN_THREAD_POINTER,
6524 S390_BUILTIN_SET_THREAD_POINTER,
6529 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6534 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6540 s390_init_builtins (void)
6544 ftype = build_function_type (ptr_type_node, void_list_node);
6545 builtin_function ("__builtin_thread_pointer", ftype,
6546 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6549 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6550 builtin_function ("__builtin_set_thread_pointer", ftype,
6551 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6555 /* Expand an expression EXP that calls a built-in function,
6556 with result going to TARGET if that's convenient
6557 (and in mode MODE if that's convenient).
6558 SUBTARGET may be used as the target for computing one of EXP's operands.
6559 IGNORE is nonzero if the value is to be ignored. */
6562 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6563 enum machine_mode mode ATTRIBUTE_UNUSED,
6564 int ignore ATTRIBUTE_UNUSED)
6568 unsigned int const *code_for_builtin =
6569 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6571 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6572 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6573 tree arglist = TREE_OPERAND (exp, 1);
6574 enum insn_code icode;
6575 rtx op[MAX_ARGS], pat;
6579 if (fcode >= S390_BUILTIN_max)
6580 internal_error ("bad builtin fcode");
6581 icode = code_for_builtin[fcode];
6583 internal_error ("bad builtin fcode");
6585 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6587 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6589 arglist = TREE_CHAIN (arglist), arity++)
6591 const struct insn_operand_data *insn_op;
6593 tree arg = TREE_VALUE (arglist);
6594 if (arg == error_mark_node)
6596 if (arity > MAX_ARGS)
6599 insn_op = &insn_data[icode].operand[arity + nonvoid];
6601 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6603 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6604 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6609 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6611 || GET_MODE (target) != tmode
6612 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6613 target = gen_reg_rtx (tmode);
6619 pat = GEN_FCN (icode) (target);
6623 pat = GEN_FCN (icode) (target, op[0]);
6625 pat = GEN_FCN (icode) (op[0]);
6628 pat = GEN_FCN (icode) (target, op[0], op[1]);
6644 /* Output assembly code for the trampoline template to
6647 On S/390, we use gpr 1 internally in the trampoline code;
6648 gpr 0 is used to hold the static chain. */
6651 s390_trampoline_template (FILE *file)
6655 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6656 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6657 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6658 fprintf (file, "br\t%s\n", reg_names[1]);
6659 fprintf (file, "0:\t.quad\t0\n");
6660 fprintf (file, ".quad\t0\n");
6664 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6665 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6666 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6667 fprintf (file, "br\t%s\n", reg_names[1]);
6668 fprintf (file, ".long\t0\n");
6669 fprintf (file, ".long\t0\n");
6673 /* Emit RTL insns to initialize the variable parts of a trampoline.
6674 FNADDR is an RTX for the address of the function's pure code.
6675 CXT is an RTX for the static chain value for the function. */
6678 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6680 emit_move_insn (gen_rtx
6682 memory_address (Pmode,
6683 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6684 emit_move_insn (gen_rtx
6686 memory_address (Pmode,
6687 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6690 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6691 LOW and HIGH, independent of the host word size. */
6694 s390_gen_rtx_const_DI (int high, int low)
6696 #if HOST_BITS_PER_WIDE_INT >= 64
6698 val = (HOST_WIDE_INT)high;
6700 val |= (HOST_WIDE_INT)low;
6702 return GEN_INT (val);
6704 #if HOST_BITS_PER_WIDE_INT >= 32
6705 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6712 /* Output assembler code to FILE to increment profiler label # LABELNO
6713 for profiling a function entry. */
6716 s390_function_profiler (FILE *file, int labelno)
6721 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6723 fprintf (file, "# function profiler \n");
6725 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6726 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6727 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6729 op[2] = gen_rtx_REG (Pmode, 1);
6730 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6731 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6733 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6736 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6737 op[4] = gen_rtx_CONST (Pmode, op[4]);
6742 output_asm_insn ("stg\t%0,%1", op);
6743 output_asm_insn ("larl\t%2,%3", op);
6744 output_asm_insn ("brasl\t%0,%4", op);
6745 output_asm_insn ("lg\t%0,%1", op);
6749 op[6] = gen_label_rtx ();
6751 output_asm_insn ("st\t%0,%1", op);
6752 output_asm_insn ("bras\t%2,%l6", op);
6753 output_asm_insn (".long\t%4", op);
6754 output_asm_insn (".long\t%3", op);
6755 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6756 output_asm_insn ("l\t%0,0(%2)", op);
6757 output_asm_insn ("l\t%2,4(%2)", op);
6758 output_asm_insn ("basr\t%0,%0", op);
6759 output_asm_insn ("l\t%0,%1", op);
6763 op[5] = gen_label_rtx ();
6764 op[6] = gen_label_rtx ();
6766 output_asm_insn ("st\t%0,%1", op);
6767 output_asm_insn ("bras\t%2,%l6", op);
6768 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6769 output_asm_insn (".long\t%4-%l5", op);
6770 output_asm_insn (".long\t%3-%l5", op);
6771 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6772 output_asm_insn ("lr\t%0,%2", op);
6773 output_asm_insn ("a\t%0,0(%2)", op);
6774 output_asm_insn ("a\t%2,4(%2)", op);
6775 output_asm_insn ("basr\t%0,%0", op);
6776 output_asm_insn ("l\t%0,%1", op);
6780 /* Select section for constant in constant pool. In 32-bit mode,
6781 constants go in the function section; in 64-bit mode in .rodata. */
6784 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6785 rtx x ATTRIBUTE_UNUSED,
6786 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6788 if (TARGET_CPU_ZARCH)
6789 readonly_data_section ();
6791 function_section (current_function_decl);
6794 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6795 into its SYMBOL_REF_FLAGS. */
6798 s390_encode_section_info (tree decl, rtx rtl, int first)
6800 default_encode_section_info (decl, rtl, first);
6802 /* If a variable has a forced alignment to < 2 bytes, mark it with
6803 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6804 if (TREE_CODE (decl) == VAR_DECL
6805 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6806 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6809 /* Output thunk to FILE that implements a C++ virtual function call (with
6810 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6811 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6812 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6813 relative to the resulting this pointer. */
6816 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6817 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6823 /* Operand 0 is the target function. */
6824 op[0] = XEXP (DECL_RTL (function), 0);
6825 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6828 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6829 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6830 op[0] = gen_rtx_CONST (Pmode, op[0]);
6833 /* Operand 1 is the 'this' pointer. */
6834 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6835 op[1] = gen_rtx_REG (Pmode, 3);
6837 op[1] = gen_rtx_REG (Pmode, 2);
6839 /* Operand 2 is the delta. */
6840 op[2] = GEN_INT (delta);
6842 /* Operand 3 is the vcall_offset. */
6843 op[3] = GEN_INT (vcall_offset);
6845 /* Operand 4 is the temporary register. */
6846 op[4] = gen_rtx_REG (Pmode, 1);
6848 /* Operands 5 to 8 can be used as labels. */
6854 /* Operand 9 can be used for temporary register. */
6857 /* Generate code. */
6860 /* Setup literal pool pointer if required. */
6861 if ((!DISP_IN_RANGE (delta)
6862 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6863 || (!DISP_IN_RANGE (vcall_offset)
6864 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6866 op[5] = gen_label_rtx ();
6867 output_asm_insn ("larl\t%4,%5", op);
6870 /* Add DELTA to this pointer. */
6873 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6874 output_asm_insn ("la\t%1,%2(%1)", op);
6875 else if (DISP_IN_RANGE (delta))
6876 output_asm_insn ("lay\t%1,%2(%1)", op);
6877 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6878 output_asm_insn ("aghi\t%1,%2", op);
6881 op[6] = gen_label_rtx ();
6882 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
6886 /* Perform vcall adjustment. */
6889 if (DISP_IN_RANGE (vcall_offset))
6891 output_asm_insn ("lg\t%4,0(%1)", op);
6892 output_asm_insn ("ag\t%1,%3(%4)", op);
6894 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6896 output_asm_insn ("lghi\t%4,%3", op);
6897 output_asm_insn ("ag\t%4,0(%1)", op);
6898 output_asm_insn ("ag\t%1,0(%4)", op);
6902 op[7] = gen_label_rtx ();
6903 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
6904 output_asm_insn ("ag\t%4,0(%1)", op);
6905 output_asm_insn ("ag\t%1,0(%4)", op);
6909 /* Jump to target. */
6910 output_asm_insn ("jg\t%0", op);
6912 /* Output literal pool if required. */
6915 output_asm_insn (".align\t4", op);
6916 targetm.asm_out.internal_label (file, "L",
6917 CODE_LABEL_NUMBER (op[5]));
6921 targetm.asm_out.internal_label (file, "L",
6922 CODE_LABEL_NUMBER (op[6]));
6923 output_asm_insn (".long\t%2", op);
6927 targetm.asm_out.internal_label (file, "L",
6928 CODE_LABEL_NUMBER (op[7]));
6929 output_asm_insn (".long\t%3", op);
6934 /* Setup base pointer if required. */
6936 || (!DISP_IN_RANGE (delta)
6937 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6938 || (!DISP_IN_RANGE (delta)
6939 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6941 op[5] = gen_label_rtx ();
6942 output_asm_insn ("basr\t%4,0", op);
6943 targetm.asm_out.internal_label (file, "L",
6944 CODE_LABEL_NUMBER (op[5]));
6947 /* Add DELTA to this pointer. */
6950 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6951 output_asm_insn ("la\t%1,%2(%1)", op);
6952 else if (DISP_IN_RANGE (delta))
6953 output_asm_insn ("lay\t%1,%2(%1)", op);
6954 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6955 output_asm_insn ("ahi\t%1,%2", op);
6958 op[6] = gen_label_rtx ();
6959 output_asm_insn ("a\t%1,%6-%5(%4)", op);
6963 /* Perform vcall adjustment. */
6966 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
6968 output_asm_insn ("lg\t%4,0(%1)", op);
6969 output_asm_insn ("a\t%1,%3(%4)", op);
6971 else if (DISP_IN_RANGE (vcall_offset))
6973 output_asm_insn ("lg\t%4,0(%1)", op);
6974 output_asm_insn ("ay\t%1,%3(%4)", op);
6976 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6978 output_asm_insn ("lhi\t%4,%3", op);
6979 output_asm_insn ("a\t%4,0(%1)", op);
6980 output_asm_insn ("a\t%1,0(%4)", op);
6984 op[7] = gen_label_rtx ();
6985 output_asm_insn ("l\t%4,%7-%5(%4)", op);
6986 output_asm_insn ("a\t%4,0(%1)", op);
6987 output_asm_insn ("a\t%1,0(%4)", op);
6990 /* We had to clobber the base pointer register.
6991 Re-setup the base pointer (with a different base). */
6992 op[5] = gen_label_rtx ();
6993 output_asm_insn ("basr\t%4,0", op);
6994 targetm.asm_out.internal_label (file, "L",
6995 CODE_LABEL_NUMBER (op[5]));
6998 /* Jump to target. */
6999 op[8] = gen_label_rtx ();
7002 output_asm_insn ("l\t%4,%8-%5(%4)", op);
7004 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7005 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7006 else if (flag_pic == 1)
7008 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7009 output_asm_insn ("l\t%4,%0(%4)", op);
7011 else if (flag_pic == 2)
7013 op[9] = gen_rtx_REG (Pmode, 0);
7014 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7015 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7016 output_asm_insn ("ar\t%4,%9", op);
7017 output_asm_insn ("l\t%4,0(%4)", op);
7020 output_asm_insn ("br\t%4", op);
7022 /* Output literal pool. */
7023 output_asm_insn (".align\t4", op);
7025 if (nonlocal && flag_pic == 2)
7026 output_asm_insn (".long\t%0", op);
7029 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7030 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7033 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7035 output_asm_insn (".long\t%0", op);
7037 output_asm_insn (".long\t%0-%5", op);
7041 targetm.asm_out.internal_label (file, "L",
7042 CODE_LABEL_NUMBER (op[6]));
7043 output_asm_insn (".long\t%2", op);
7047 targetm.asm_out.internal_label (file, "L",
7048 CODE_LABEL_NUMBER (op[7]));
7049 output_asm_insn (".long\t%3", op);
7055 s390_valid_pointer_mode (enum machine_mode mode)
7057 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7060 /* How to allocate a 'struct machine_function'. */
7062 static struct machine_function *
7063 s390_init_machine_status (void)
7065 return ggc_alloc_cleared (sizeof (struct machine_function));
7068 #include "gt-s390.h"