1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
33 #include "insn-config.h"
34 #include "conditions.h"
36 #include "insn-attr.h"
44 #include "basic-block.h"
45 #include "integrate.h"
48 #include "target-def.h"
50 #include "langhooks.h"
53 /* Machine-specific symbol_ref flags. */
54 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
57 static bool s390_assemble_integer (rtx, unsigned int, int);
58 static void s390_select_rtx_section (enum machine_mode, rtx,
59 unsigned HOST_WIDE_INT);
60 static void s390_encode_section_info (tree, rtx, int);
61 static bool s390_cannot_force_const_mem (rtx);
62 static rtx s390_delegitimize_address (rtx);
63 static void s390_init_builtins (void);
64 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
65 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
67 static enum attr_type s390_safe_attr_type (rtx);
69 static int s390_adjust_cost (rtx, rtx, rtx, int);
70 static int s390_adjust_priority (rtx, int);
71 static int s390_issue_rate (void);
72 static int s390_use_dfa_pipeline_interface (void);
73 static int s390_first_cycle_multipass_dfa_lookahead (void);
74 static int s390_sched_reorder2 (FILE *, int, rtx *, int *, int);
75 static bool s390_rtx_costs (rtx, int, int, int *);
76 static int s390_address_cost (rtx);
77 static void s390_reorg (void);
78 static bool s390_valid_pointer_mode (enum machine_mode);
80 #undef TARGET_ASM_ALIGNED_HI_OP
81 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
82 #undef TARGET_ASM_ALIGNED_DI_OP
83 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
84 #undef TARGET_ASM_INTEGER
85 #define TARGET_ASM_INTEGER s390_assemble_integer
87 #undef TARGET_ASM_OPEN_PAREN
88 #define TARGET_ASM_OPEN_PAREN ""
90 #undef TARGET_ASM_CLOSE_PAREN
91 #define TARGET_ASM_CLOSE_PAREN ""
93 #undef TARGET_ASM_SELECT_RTX_SECTION
94 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
96 #undef TARGET_ENCODE_SECTION_INFO
97 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
100 #undef TARGET_HAVE_TLS
101 #define TARGET_HAVE_TLS true
103 #undef TARGET_CANNOT_FORCE_CONST_MEM
104 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
106 #undef TARGET_DELEGITIMIZE_ADDRESS
107 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
109 #undef TARGET_INIT_BUILTINS
110 #define TARGET_INIT_BUILTINS s390_init_builtins
111 #undef TARGET_EXPAND_BUILTIN
112 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
114 #undef TARGET_ASM_OUTPUT_MI_THUNK
115 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
116 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
117 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
119 #undef TARGET_SCHED_ADJUST_COST
120 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
121 #undef TARGET_SCHED_ADJUST_PRIORITY
122 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
123 #undef TARGET_SCHED_ISSUE_RATE
124 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
125 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
126 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
127 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
128 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
129 #undef TARGET_SCHED_REORDER2
130 #define TARGET_SCHED_REORDER2 s390_sched_reorder2
132 #undef TARGET_RTX_COSTS
133 #define TARGET_RTX_COSTS s390_rtx_costs
134 #undef TARGET_ADDRESS_COST
135 #define TARGET_ADDRESS_COST s390_address_cost
137 #undef TARGET_MACHINE_DEPENDENT_REORG
138 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
140 #undef TARGET_VALID_POINTER_MODE
141 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
143 struct gcc_target targetm = TARGET_INITIALIZER;
145 extern int reload_completed;
147 /* The alias set for prologue/epilogue register save/restore. */
148 static int s390_sr_alias_set = 0;
150 /* Save information from a "cmpxx" operation until the branch or scc is
152 rtx s390_compare_op0, s390_compare_op1;
154 /* Structure used to hold the components of a S/390 memory
155 address. A legitimate address on S/390 is of the general
157 base + index + displacement
158 where any of the components is optional.
160 base and index are registers of the class ADDR_REGS,
161 displacement is an unsigned 12-bit immediate constant. */
171 /* Which cpu are we tuning for. */
172 enum processor_type s390_tune;
173 enum processor_flags s390_tune_flags;
174 /* Which instruction set architecture to use. */
175 enum processor_type s390_arch;
176 enum processor_flags s390_arch_flags;
178 /* Strings to hold which cpu and instruction set architecture to use. */
179 const char *s390_tune_string; /* for -mtune=<xxx> */
180 const char *s390_arch_string; /* for -march=<xxx> */
182 /* Define the structure for the machine field in struct function. */
184 struct machine_function GTY(())
186 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
189 /* Set if return address needs to be saved because the current
190 function uses __builtin_return_addr (0). */
191 bool save_return_addr_p;
193 /* Number of first and last gpr to be saved, restored. */
195 int first_restore_gpr;
198 /* Size of stack frame. */
199 HOST_WIDE_INT frame_size;
201 /* Some local-dynamic TLS symbol name. */
202 const char *some_ld_name;
205 static int s390_match_ccmode_set (rtx, enum machine_mode);
206 static int s390_branch_condition_mask (rtx);
207 static const char *s390_branch_condition_mnemonic (rtx, int);
208 static int check_mode (rtx, enum machine_mode *);
209 static int general_s_operand (rtx, enum machine_mode, int);
210 static int s390_short_displacement (rtx);
211 static int s390_decompose_address (rtx, struct s390_address *);
212 static rtx get_thread_pointer (void);
213 static rtx legitimize_tls_address (rtx, rtx);
214 static void print_shift_count_operand (FILE *, rtx);
215 static const char *get_some_local_dynamic_name (void);
216 static int get_some_local_dynamic_name_1 (rtx *, void *);
217 static int reg_used_in_mem_p (int, rtx);
218 static int addr_generation_dependency_p (rtx, rtx);
219 static int s390_split_branches (rtx, bool *);
220 static void find_constant_pool_ref (rtx, rtx *);
221 static void replace_constant_pool_ref (rtx *, rtx, rtx);
222 static rtx find_ltrel_base (rtx);
223 static void replace_ltrel_base (rtx *, rtx);
224 static void s390_optimize_prolog (bool, bool);
225 static int find_unused_clobbered_reg (void);
226 static void s390_frame_info (void);
227 static rtx save_fpr (rtx, int, int);
228 static rtx restore_fpr (rtx, int, int);
229 static rtx save_gprs (rtx, int, int, int);
230 static rtx restore_gprs (rtx, int, int, int);
231 static int s390_function_arg_size (enum machine_mode, tree);
232 static bool s390_function_arg_float (enum machine_mode, tree);
233 static struct machine_function * s390_init_machine_status (void);
235 /* Check whether integer displacement is in range. */
236 #define DISP_IN_RANGE(d) \
237 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
238 : ((d) >= 0 && (d) <= 4095))
240 /* Return true if SET either doesn't set the CC register, or else
241 the source and destination have matching CC modes and that
242 CC mode is at least as constrained as REQ_MODE. */
245 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
247 enum machine_mode set_mode;
249 if (GET_CODE (set) != SET)
252 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
255 set_mode = GET_MODE (SET_DEST (set));
268 if (req_mode != set_mode)
273 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
274 && req_mode != CCSRmode && req_mode != CCURmode)
280 if (req_mode != CCAmode)
288 return (GET_MODE (SET_SRC (set)) == set_mode);
291 /* Return true if every SET in INSN that sets the CC register
292 has source and destination with matching CC modes and that
293 CC mode is at least as constrained as REQ_MODE.
294 If REQ_MODE is VOIDmode, always return false. */
297 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
301 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
302 if (req_mode == VOIDmode)
305 if (GET_CODE (PATTERN (insn)) == SET)
306 return s390_match_ccmode_set (PATTERN (insn), req_mode);
308 if (GET_CODE (PATTERN (insn)) == PARALLEL)
309 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
311 rtx set = XVECEXP (PATTERN (insn), 0, i);
312 if (GET_CODE (set) == SET)
313 if (!s390_match_ccmode_set (set, req_mode))
320 /* If a test-under-mask instruction can be used to implement
321 (compare (and ... OP1) OP2), return the CC mode required
322 to do that. Otherwise, return VOIDmode.
323 MIXED is true if the instruction can distinguish between
324 CC1 and CC2 for mixed selected bits (TMxx), it is false
325 if the instruction cannot (TM). */
328 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
332 /* ??? Fixme: should work on CONST_DOUBLE as well. */
333 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
336 /* Selected bits all zero: CC0. */
337 if (INTVAL (op2) == 0)
340 /* Selected bits all one: CC3. */
341 if (INTVAL (op2) == INTVAL (op1))
344 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
347 bit1 = exact_log2 (INTVAL (op2));
348 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
349 if (bit0 != -1 && bit1 != -1)
350 return bit0 > bit1 ? CCT1mode : CCT2mode;
356 /* Given a comparison code OP (EQ, NE, etc.) and the operands
357 OP0 and OP1 of a COMPARE, return the mode to be used for the
361 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
367 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
368 && CONST_OK_FOR_LETTER_P (INTVAL (XEXP (op0, 1)), 'K'))
370 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
371 || GET_CODE (op1) == NEG)
372 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
375 if (GET_CODE (op0) == AND)
377 /* Check whether we can potentially do it via TM. */
378 enum machine_mode ccmode;
379 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
380 if (ccmode != VOIDmode)
382 /* Relax CCTmode to CCZmode to allow fall-back to AND
383 if that turns out to be beneficial. */
384 return ccmode == CCTmode ? CCZmode : ccmode;
388 if (register_operand (op0, HImode)
389 && GET_CODE (op1) == CONST_INT
390 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
392 if (register_operand (op0, QImode)
393 && GET_CODE (op1) == CONST_INT
394 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
403 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
404 && CONST_OK_FOR_LETTER_P (INTVAL (XEXP (op0, 1)), 'K'))
406 if (INTVAL (XEXP((op0), 1)) < 0)
419 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
420 && GET_CODE (op1) != CONST_INT)
426 if (GET_CODE (op0) == PLUS
427 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
430 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
431 && GET_CODE (op1) != CONST_INT)
437 if (GET_CODE (op0) == MINUS
438 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
441 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
442 && GET_CODE (op1) != CONST_INT)
451 /* Return nonzero if OP is a valid comparison operator
452 for an ALC condition in mode MODE. */
455 s390_alc_comparison (rtx op, enum machine_mode mode)
457 if (mode != VOIDmode && mode != GET_MODE (op))
460 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
463 if (GET_CODE (XEXP (op, 0)) != REG
464 || REGNO (XEXP (op, 0)) != CC_REGNUM
465 || XEXP (op, 1) != const0_rtx)
468 switch (GET_MODE (XEXP (op, 0)))
471 return GET_CODE (op) == LTU;
474 return GET_CODE (op) == LEU;
477 return GET_CODE (op) == GTU;
480 return GET_CODE (op) == LTU;
483 return GET_CODE (op) == UNGT;
486 return GET_CODE (op) == UNLT;
493 /* Return nonzero if OP is a valid comparison operator
494 for an SLB condition in mode MODE. */
497 s390_slb_comparison (rtx op, enum machine_mode mode)
499 if (mode != VOIDmode && mode != GET_MODE (op))
502 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
505 if (GET_CODE (XEXP (op, 0)) != REG
506 || REGNO (XEXP (op, 0)) != CC_REGNUM
507 || XEXP (op, 1) != const0_rtx)
510 switch (GET_MODE (XEXP (op, 0)))
513 return GET_CODE (op) == GEU;
516 return GET_CODE (op) == GTU;
519 return GET_CODE (op) == LEU;
522 return GET_CODE (op) == GEU;
525 return GET_CODE (op) == LE;
528 return GET_CODE (op) == GE;
535 /* Return branch condition mask to implement a branch
536 specified by CODE. */
539 s390_branch_condition_mask (rtx code)
541 const int CC0 = 1 << 3;
542 const int CC1 = 1 << 2;
543 const int CC2 = 1 << 1;
544 const int CC3 = 1 << 0;
546 if (GET_CODE (XEXP (code, 0)) != REG
547 || REGNO (XEXP (code, 0)) != CC_REGNUM
548 || XEXP (code, 1) != const0_rtx)
551 switch (GET_MODE (XEXP (code, 0)))
554 switch (GET_CODE (code))
557 case NE: return CC1 | CC2 | CC3;
564 switch (GET_CODE (code))
567 case NE: return CC0 | CC2 | CC3;
574 switch (GET_CODE (code))
577 case NE: return CC0 | CC1 | CC3;
584 switch (GET_CODE (code))
587 case NE: return CC0 | CC1 | CC2;
594 switch (GET_CODE (code))
596 case EQ: return CC0 | CC2;
597 case NE: return CC1 | CC3;
604 switch (GET_CODE (code))
606 case LTU: return CC2 | CC3; /* carry */
607 case GEU: return CC0 | CC1; /* no carry */
614 switch (GET_CODE (code))
616 case GTU: return CC0 | CC1; /* borrow */
617 case LEU: return CC2 | CC3; /* no borrow */
624 switch (GET_CODE (code))
627 case NE: return CC1 | CC2 | CC3;
628 case LTU: return CC1;
629 case GTU: return CC2;
630 case LEU: return CC0 | CC1;
631 case GEU: return CC0 | CC2;
638 switch (GET_CODE (code))
641 case NE: return CC2 | CC1 | CC3;
642 case LTU: return CC2;
643 case GTU: return CC1;
644 case LEU: return CC0 | CC2;
645 case GEU: return CC0 | CC1;
652 switch (GET_CODE (code))
655 case NE: return CC1 | CC2 | CC3;
656 case LT: return CC1 | CC3;
658 case LE: return CC0 | CC1 | CC3;
659 case GE: return CC0 | CC2;
666 switch (GET_CODE (code))
669 case NE: return CC1 | CC2 | CC3;
671 case GT: return CC2 | CC3;
672 case LE: return CC0 | CC1;
673 case GE: return CC0 | CC2 | CC3;
680 switch (GET_CODE (code))
683 case NE: return CC1 | CC2 | CC3;
686 case LE: return CC0 | CC1;
687 case GE: return CC0 | CC2;
688 case UNORDERED: return CC3;
689 case ORDERED: return CC0 | CC1 | CC2;
690 case UNEQ: return CC0 | CC3;
691 case UNLT: return CC1 | CC3;
692 case UNGT: return CC2 | CC3;
693 case UNLE: return CC0 | CC1 | CC3;
694 case UNGE: return CC0 | CC2 | CC3;
695 case LTGT: return CC1 | CC2;
702 switch (GET_CODE (code))
705 case NE: return CC2 | CC1 | CC3;
708 case LE: return CC0 | CC2;
709 case GE: return CC0 | CC1;
710 case UNORDERED: return CC3;
711 case ORDERED: return CC0 | CC2 | CC1;
712 case UNEQ: return CC0 | CC3;
713 case UNLT: return CC2 | CC3;
714 case UNGT: return CC1 | CC3;
715 case UNLE: return CC0 | CC2 | CC3;
716 case UNGE: return CC0 | CC1 | CC3;
717 case LTGT: return CC2 | CC1;
728 /* If INV is false, return assembler mnemonic string to implement
729 a branch specified by CODE. If INV is true, return mnemonic
730 for the corresponding inverted branch. */
733 s390_branch_condition_mnemonic (rtx code, int inv)
735 static const char *const mnemonic[16] =
737 NULL, "o", "h", "nle",
738 "l", "nhe", "lh", "ne",
739 "e", "nlh", "he", "nl",
740 "le", "nh", "no", NULL
743 int mask = s390_branch_condition_mask (code);
748 if (mask < 1 || mask > 14)
751 return mnemonic[mask];
754 /* If OP is an integer constant of mode MODE with exactly one
755 HImode subpart unequal to DEF, return the number of that
756 subpart. As a special case, all HImode subparts of OP are
757 equal to DEF, return zero. Otherwise, return -1. */
760 s390_single_hi (rtx op, enum machine_mode mode, int def)
762 if (GET_CODE (op) == CONST_INT)
764 unsigned HOST_WIDE_INT value = 0;
765 int n_parts = GET_MODE_SIZE (mode) / 2;
768 for (i = 0; i < n_parts; i++)
771 value = (unsigned HOST_WIDE_INT) INTVAL (op);
775 if ((value & 0xffff) != (unsigned)(def & 0xffff))
784 return part == -1 ? 0 : (n_parts - 1 - part);
787 else if (GET_CODE (op) == CONST_DOUBLE
788 && GET_MODE (op) == VOIDmode)
790 unsigned HOST_WIDE_INT value = 0;
791 int n_parts = GET_MODE_SIZE (mode) / 2;
794 for (i = 0; i < n_parts; i++)
797 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
798 else if (i == HOST_BITS_PER_WIDE_INT / 16)
799 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op);
803 if ((value & 0xffff) != (unsigned)(def & 0xffff))
812 return part == -1 ? 0 : (n_parts - 1 - part);
818 /* Extract the HImode part number PART from integer
819 constant OP of mode MODE. */
822 s390_extract_hi (rtx op, enum machine_mode mode, int part)
824 int n_parts = GET_MODE_SIZE (mode) / 2;
825 if (part < 0 || part >= n_parts)
828 part = n_parts - 1 - part;
830 if (GET_CODE (op) == CONST_INT)
832 unsigned HOST_WIDE_INT value = (unsigned HOST_WIDE_INT) INTVAL (op);
833 return ((value >> (16 * part)) & 0xffff);
835 else if (GET_CODE (op) == CONST_DOUBLE
836 && GET_MODE (op) == VOIDmode)
838 unsigned HOST_WIDE_INT value;
839 if (part < HOST_BITS_PER_WIDE_INT / 16)
840 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
842 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op),
843 part -= HOST_BITS_PER_WIDE_INT / 16;
845 return ((value >> (16 * part)) & 0xffff);
851 /* If OP is an integer constant of mode MODE with exactly one
852 QImode subpart unequal to DEF, return the number of that
853 subpart. As a special case, all QImode subparts of OP are
854 equal to DEF, return zero. Otherwise, return -1. */
857 s390_single_qi (rtx op, enum machine_mode mode, int def)
859 if (GET_CODE (op) == CONST_INT)
861 unsigned HOST_WIDE_INT value = 0;
862 int n_parts = GET_MODE_SIZE (mode);
865 for (i = 0; i < n_parts; i++)
868 value = (unsigned HOST_WIDE_INT) INTVAL (op);
872 if ((value & 0xff) != (unsigned)(def & 0xff))
881 return part == -1 ? 0 : (n_parts - 1 - part);
884 else if (GET_CODE (op) == CONST_DOUBLE
885 && GET_MODE (op) == VOIDmode)
887 unsigned HOST_WIDE_INT value = 0;
888 int n_parts = GET_MODE_SIZE (mode);
891 for (i = 0; i < n_parts; i++)
894 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
895 else if (i == HOST_BITS_PER_WIDE_INT / 8)
896 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op);
900 if ((value & 0xff) != (unsigned)(def & 0xff))
909 return part == -1 ? 0 : (n_parts - 1 - part);
915 /* Extract the QImode part number PART from integer
916 constant OP of mode MODE. */
919 s390_extract_qi (rtx op, enum machine_mode mode, int part)
921 int n_parts = GET_MODE_SIZE (mode);
922 if (part < 0 || part >= n_parts)
925 part = n_parts - 1 - part;
927 if (GET_CODE (op) == CONST_INT)
929 unsigned HOST_WIDE_INT value = (unsigned HOST_WIDE_INT) INTVAL (op);
930 return ((value >> (8 * part)) & 0xff);
932 else if (GET_CODE (op) == CONST_DOUBLE
933 && GET_MODE (op) == VOIDmode)
935 unsigned HOST_WIDE_INT value;
936 if (part < HOST_BITS_PER_WIDE_INT / 8)
937 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
939 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op),
940 part -= HOST_BITS_PER_WIDE_INT / 8;
942 return ((value >> (8 * part)) & 0xff);
948 /* Check whether we can (and want to) split a double-word
949 move in mode MODE from SRC to DST into two single-word
950 moves, moving the subword FIRST_SUBWORD first. */
953 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
955 /* Floating point registers cannot be split. */
956 if (FP_REG_P (src) || FP_REG_P (dst))
959 /* We don't need to split if operands are directly accessible. */
960 if (s_operand (src, mode) || s_operand (dst, mode))
963 /* Non-offsettable memory references cannot be split. */
964 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
965 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
968 /* Moving the first subword must not clobber a register
969 needed to move the second subword. */
970 if (register_operand (dst, mode))
972 rtx subreg = operand_subword (dst, first_subword, 0, mode);
973 if (reg_overlap_mentioned_p (subreg, src))
981 /* Change optimizations to be performed, depending on the
984 LEVEL is the optimization level specified; 2 if `-O2' is
985 specified, 1 if `-O' is specified, and 0 if neither is specified.
987 SIZE is nonzero if `-Os' is specified and zero otherwise. */
990 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
992 /* ??? There are apparently still problems with -fcaller-saves. */
993 flag_caller_saves = 0;
995 /* By default, always emit DWARF-2 unwind info. This allows debugging
996 without maintaining a stack frame back-chain. */
997 flag_asynchronous_unwind_tables = 1;
1001 override_options (void)
1006 const char *const name; /* processor name or nickname. */
1007 const enum processor_type processor;
1008 const enum processor_flags flags;
1010 const processor_alias_table[] =
1012 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
1013 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
1014 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
1015 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
1016 | PF_LONG_DISPLACEMENT},
1019 int const pta_size = ARRAY_SIZE (processor_alias_table);
1021 /* Acquire a unique set number for our register saves and restores. */
1022 s390_sr_alias_set = new_alias_set ();
1024 /* Set up function hooks. */
1025 init_machine_status = s390_init_machine_status;
1027 /* Architecture mode defaults according to ABI. */
1028 if (!(target_flags_explicit & MASK_ZARCH))
1031 target_flags |= MASK_ZARCH;
1033 target_flags &= ~MASK_ZARCH;
1036 /* Determine processor architectural level. */
1037 if (!s390_arch_string)
1038 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
1040 for (i = 0; i < pta_size; i++)
1041 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
1043 s390_arch = processor_alias_table[i].processor;
1044 s390_arch_flags = processor_alias_table[i].flags;
1048 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1050 /* Determine processor to tune for. */
1051 if (!s390_tune_string)
1053 s390_tune = s390_arch;
1054 s390_tune_flags = s390_arch_flags;
1055 s390_tune_string = s390_arch_string;
1059 for (i = 0; i < pta_size; i++)
1060 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1062 s390_tune = processor_alias_table[i].processor;
1063 s390_tune_flags = processor_alias_table[i].flags;
1067 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1070 /* Sanity checks. */
1071 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1072 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1073 if (TARGET_64BIT && !TARGET_ZARCH)
1074 error ("64-bit ABI not supported in ESA/390 mode.");
1077 /* Map for smallest class containing reg regno. */
1079 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1080 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1081 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1082 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1083 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1084 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1085 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1086 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1087 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1088 ADDR_REGS, NO_REGS, ADDR_REGS
1091 /* Return attribute type of insn. */
1093 static enum attr_type
1094 s390_safe_attr_type (rtx insn)
1096 if (recog_memoized (insn) >= 0)
1097 return get_attr_type (insn);
1102 /* Return true if OP a (const_int 0) operand.
1103 OP is the current operation.
1104 MODE is the current operation mode. */
1107 const0_operand (register rtx op, enum machine_mode mode)
1109 return op == CONST0_RTX (mode);
1112 /* Return true if OP is constant.
1113 OP is the current operation.
1114 MODE is the current operation mode. */
1117 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1119 return CONSTANT_P (op);
1122 /* Return true if the mode of operand OP matches MODE.
1123 If MODE is set to VOIDmode, set it to the mode of OP. */
1126 check_mode (register rtx op, enum machine_mode *mode)
1128 if (*mode == VOIDmode)
1129 *mode = GET_MODE (op);
1132 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1138 /* Return true if OP a valid operand for the LARL instruction.
1139 OP is the current operation.
1140 MODE is the current operation mode. */
1143 larl_operand (register rtx op, enum machine_mode mode)
1145 if (! check_mode (op, &mode))
1148 /* Allow labels and local symbols. */
1149 if (GET_CODE (op) == LABEL_REF)
1151 if (GET_CODE (op) == SYMBOL_REF)
1152 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1153 && SYMBOL_REF_TLS_MODEL (op) == 0
1154 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1156 /* Everything else must have a CONST, so strip it. */
1157 if (GET_CODE (op) != CONST)
1161 /* Allow adding *even* in-range constants. */
1162 if (GET_CODE (op) == PLUS)
1164 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1165 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1167 #if HOST_BITS_PER_WIDE_INT > 32
1168 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1169 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1175 /* Labels and local symbols allowed here as well. */
1176 if (GET_CODE (op) == LABEL_REF)
1178 if (GET_CODE (op) == SYMBOL_REF)
1179 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1180 && SYMBOL_REF_TLS_MODEL (op) == 0
1181 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1183 /* Now we must have a @GOTENT offset or @PLT stub
1184 or an @INDNTPOFF TLS offset. */
1185 if (GET_CODE (op) == UNSPEC
1186 && XINT (op, 1) == UNSPEC_GOTENT)
1188 if (GET_CODE (op) == UNSPEC
1189 && XINT (op, 1) == UNSPEC_PLT)
1191 if (GET_CODE (op) == UNSPEC
1192 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1198 /* Helper routine to implement s_operand and s_imm_operand.
1199 OP is the current operation.
1200 MODE is the current operation mode.
1201 ALLOW_IMMEDIATE specifies whether immediate operands should
1202 be accepted or not. */
1205 general_s_operand (register rtx op, enum machine_mode mode,
1206 int allow_immediate)
1208 struct s390_address addr;
1210 /* Call general_operand first, so that we don't have to
1211 check for many special cases. */
1212 if (!general_operand (op, mode))
1215 /* Just like memory_operand, allow (subreg (mem ...))
1217 if (reload_completed
1218 && GET_CODE (op) == SUBREG
1219 && GET_CODE (SUBREG_REG (op)) == MEM)
1220 op = SUBREG_REG (op);
1222 switch (GET_CODE (op))
1224 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1225 is true and we are still before reload. */
1228 if (!allow_immediate || reload_completed)
1232 /* Memory operands are OK unless they already use an
1235 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1237 if (!s390_decompose_address (XEXP (op, 0), &addr))
1241 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1242 is true. This prevents compares between two literal pool
1243 entries from being accepted. */
1244 if (!allow_immediate
1245 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1256 /* Return true if OP is a valid S-type operand.
1257 OP is the current operation.
1258 MODE is the current operation mode. */
1261 s_operand (register rtx op, enum machine_mode mode)
1263 return general_s_operand (op, mode, 0);
1266 /* Return true if OP is a valid S-type operand or an immediate
1267 operand that can be addressed as S-type operand by forcing
1268 it into the literal pool.
1269 OP is the current operation.
1270 MODE is the current operation mode. */
1273 s_imm_operand (register rtx op, enum machine_mode mode)
1275 return general_s_operand (op, mode, 1);
1278 /* Return true if OP a valid shift count operand.
1279 OP is the current operation.
1280 MODE is the current operation mode. */
1283 shift_count_operand (rtx op, enum machine_mode mode)
1285 HOST_WIDE_INT offset = 0;
1287 if (! check_mode (op, &mode))
1290 /* We can have an integer constant, an address register,
1291 or a sum of the two. Note that reload already checks
1292 that any register present is an address register, so
1293 we just check for any register here. */
1294 if (GET_CODE (op) == CONST_INT)
1296 offset = INTVAL (op);
1299 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1301 offset = INTVAL (XEXP (op, 1));
1304 while (op && GET_CODE (op) == SUBREG)
1305 op = SUBREG_REG (op);
1306 if (op && GET_CODE (op) != REG)
1309 /* Unfortunately we have to reject constants that are invalid
1310 for an address, or else reload will get confused. */
1311 if (!DISP_IN_RANGE (offset))
1317 /* Return true if DISP is a valid short displacement. */
1320 s390_short_displacement (rtx disp)
1322 /* No displacement is OK. */
1326 /* Integer displacement in range. */
1327 if (GET_CODE (disp) == CONST_INT)
1328 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1330 /* GOT offset is not OK, the GOT can be large. */
1331 if (GET_CODE (disp) == CONST
1332 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1333 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1336 /* All other symbolic constants are literal pool references,
1337 which are OK as the literal pool must be small. */
1338 if (GET_CODE (disp) == CONST)
1344 /* Return true if OP is a valid operand for a C constraint. */
1347 s390_extra_constraint (rtx op, int c)
1349 struct s390_address addr;
1354 if (GET_CODE (op) != MEM)
1356 if (!s390_decompose_address (XEXP (op, 0), &addr))
1361 if (TARGET_LONG_DISPLACEMENT)
1363 if (!s390_short_displacement (addr.disp))
1369 if (GET_CODE (op) != MEM)
1372 if (TARGET_LONG_DISPLACEMENT)
1374 if (!s390_decompose_address (XEXP (op, 0), &addr))
1376 if (!s390_short_displacement (addr.disp))
1382 if (!TARGET_LONG_DISPLACEMENT)
1384 if (GET_CODE (op) != MEM)
1386 if (!s390_decompose_address (XEXP (op, 0), &addr))
1390 if (s390_short_displacement (addr.disp))
1395 if (!TARGET_LONG_DISPLACEMENT)
1397 if (GET_CODE (op) != MEM)
1399 /* Any invalid address here will be fixed up by reload,
1400 so accept it for the most generic constraint. */
1401 if (s390_decompose_address (XEXP (op, 0), &addr)
1402 && s390_short_displacement (addr.disp))
1407 if (TARGET_LONG_DISPLACEMENT)
1409 if (!s390_decompose_address (op, &addr))
1411 if (!s390_short_displacement (addr.disp))
1417 if (!TARGET_LONG_DISPLACEMENT)
1419 /* Any invalid address here will be fixed up by reload,
1420 so accept it for the most generic constraint. */
1421 if (s390_decompose_address (op, &addr)
1422 && s390_short_displacement (addr.disp))
1427 return shift_count_operand (op, VOIDmode);
1436 /* Compute a (partial) cost for rtx X. Return true if the complete
1437 cost has been computed, and false if subexpressions should be
1438 scanned. In either case, *TOTAL contains the cost result. */
1441 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1446 if (GET_CODE (XEXP (x, 0)) == MINUS
1447 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1454 /* Force_const_mem does not work out of reload, because the
1455 saveable_obstack is set to reload_obstack, which does not
1456 live long enough. Because of this we cannot use force_const_mem
1457 in addsi3. This leads to problems with gen_add2_insn with a
1458 constant greater than a short. Because of that we give an
1459 addition of greater constants a cost of 3 (reload1.c 10096). */
1460 /* ??? saveable_obstack no longer exists. */
1461 if (outer_code == PLUS
1462 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1463 *total = COSTS_N_INSNS (3);
1484 *total = COSTS_N_INSNS (1);
1488 if (GET_MODE (XEXP (x, 0)) == DImode)
1489 *total = COSTS_N_INSNS (40);
1491 *total = COSTS_N_INSNS (7);
1498 *total = COSTS_N_INSNS (33);
1506 /* Return the cost of an address rtx ADDR. */
1509 s390_address_cost (rtx addr)
1511 struct s390_address ad;
1512 if (!s390_decompose_address (addr, &ad))
1515 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1518 /* Return true if OP is a valid operand for the BRAS instruction.
1519 OP is the current operation.
1520 MODE is the current operation mode. */
1523 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1525 register enum rtx_code code = GET_CODE (op);
1527 /* Allow SYMBOL_REFs. */
1528 if (code == SYMBOL_REF)
1531 /* Allow @PLT stubs. */
1533 && GET_CODE (XEXP (op, 0)) == UNSPEC
1534 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1539 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1540 otherwise return 0. */
1543 tls_symbolic_operand (register rtx op)
1545 if (GET_CODE (op) != SYMBOL_REF)
1547 return SYMBOL_REF_TLS_MODEL (op);
1550 /* Return true if OP is a load multiple operation. It is known to be a
1551 PARALLEL and the first section will be tested.
1552 OP is the current operation.
1553 MODE is the current operation mode. */
1556 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1558 enum machine_mode elt_mode;
1559 int count = XVECLEN (op, 0);
1560 unsigned int dest_regno;
1565 /* Perform a quick check so we don't blow up below. */
1567 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1568 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1569 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1572 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1573 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1574 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1576 /* Check, is base, or base + displacement. */
1578 if (GET_CODE (src_addr) == REG)
1580 else if (GET_CODE (src_addr) == PLUS
1581 && GET_CODE (XEXP (src_addr, 0)) == REG
1582 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1584 off = INTVAL (XEXP (src_addr, 1));
1585 src_addr = XEXP (src_addr, 0);
1590 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1593 for (i = 1; i < count; i++)
1595 rtx elt = XVECEXP (op, 0, i);
1597 if (GET_CODE (elt) != SET
1598 || GET_CODE (SET_DEST (elt)) != REG
1599 || GET_MODE (SET_DEST (elt)) != elt_mode
1600 || REGNO (SET_DEST (elt)) != dest_regno + i
1601 || GET_CODE (SET_SRC (elt)) != MEM
1602 || GET_MODE (SET_SRC (elt)) != elt_mode
1603 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1604 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1605 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1606 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1607 != off + i * GET_MODE_SIZE (elt_mode))
1614 /* Return true if OP is a store multiple operation. It is known to be a
1615 PARALLEL and the first section will be tested.
1616 OP is the current operation.
1617 MODE is the current operation mode. */
1620 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1622 enum machine_mode elt_mode;
1623 int count = XVECLEN (op, 0);
1624 unsigned int src_regno;
1628 /* Perform a quick check so we don't blow up below. */
1630 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1631 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1632 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1635 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1636 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1637 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1639 /* Check, is base, or base + displacement. */
1641 if (GET_CODE (dest_addr) == REG)
1643 else if (GET_CODE (dest_addr) == PLUS
1644 && GET_CODE (XEXP (dest_addr, 0)) == REG
1645 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1647 off = INTVAL (XEXP (dest_addr, 1));
1648 dest_addr = XEXP (dest_addr, 0);
1653 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1656 for (i = 1; i < count; i++)
1658 rtx elt = XVECEXP (op, 0, i);
1660 if (GET_CODE (elt) != SET
1661 || GET_CODE (SET_SRC (elt)) != REG
1662 || GET_MODE (SET_SRC (elt)) != elt_mode
1663 || REGNO (SET_SRC (elt)) != src_regno + i
1664 || GET_CODE (SET_DEST (elt)) != MEM
1665 || GET_MODE (SET_DEST (elt)) != elt_mode
1666 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1667 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1668 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1669 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1670 != off + i * GET_MODE_SIZE (elt_mode))
1677 /* Return true if OP contains a symbol reference */
1680 symbolic_reference_mentioned_p (rtx op)
1682 register const char *fmt;
1685 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1688 fmt = GET_RTX_FORMAT (GET_CODE (op));
1689 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1695 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1696 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1700 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1707 /* Return true if OP contains a reference to a thread-local symbol. */
1710 tls_symbolic_reference_mentioned_p (rtx op)
1712 register const char *fmt;
1715 if (GET_CODE (op) == SYMBOL_REF)
1716 return tls_symbolic_operand (op);
1718 fmt = GET_RTX_FORMAT (GET_CODE (op));
1719 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1725 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1726 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1730 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1738 /* Return true if OP is a legitimate general operand when
1739 generating PIC code. It is given that flag_pic is on
1740 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1743 legitimate_pic_operand_p (register rtx op)
1745 /* Accept all non-symbolic constants. */
1746 if (!SYMBOLIC_CONST (op))
1749 /* Reject everything else; must be handled
1750 via emit_symbolic_move. */
1754 /* Returns true if the constant value OP is a legitimate general operand.
1755 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1758 legitimate_constant_p (register rtx op)
1760 /* Accept all non-symbolic constants. */
1761 if (!SYMBOLIC_CONST (op))
1764 /* Accept immediate LARL operands. */
1765 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1768 /* Thread-local symbols are never legal constants. This is
1769 so that emit_call knows that computing such addresses
1770 might require a function call. */
1771 if (TLS_SYMBOLIC_CONST (op))
1774 /* In the PIC case, symbolic constants must *not* be
1775 forced into the literal pool. We accept them here,
1776 so that they will be handled by emit_symbolic_move. */
1780 /* All remaining non-PIC symbolic constants are
1781 forced into the literal pool. */
1785 /* Determine if it's legal to put X into the constant pool. This
1786 is not possible if X contains the address of a symbol that is
1787 not constant (TLS) or not known at final link time (PIC). */
1790 s390_cannot_force_const_mem (rtx x)
1792 switch (GET_CODE (x))
1796 /* Accept all non-symbolic constants. */
1800 /* Labels are OK iff we are non-PIC. */
1801 return flag_pic != 0;
1804 /* 'Naked' TLS symbol references are never OK,
1805 non-TLS symbols are OK iff we are non-PIC. */
1806 if (tls_symbolic_operand (x))
1809 return flag_pic != 0;
1812 return s390_cannot_force_const_mem (XEXP (x, 0));
1815 return s390_cannot_force_const_mem (XEXP (x, 0))
1816 || s390_cannot_force_const_mem (XEXP (x, 1));
1819 switch (XINT (x, 1))
1821 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1822 case UNSPEC_LTREL_OFFSET:
1830 case UNSPEC_GOTNTPOFF:
1831 case UNSPEC_INDNTPOFF:
1844 /* Returns true if the constant value OP is a legitimate general
1845 operand during and after reload. The difference to
1846 legitimate_constant_p is that this function will not accept
1847 a constant that would need to be forced to the literal pool
1848 before it can be used as operand. */
1851 legitimate_reload_constant_p (register rtx op)
1853 /* Accept la(y) operands. */
1854 if (GET_CODE (op) == CONST_INT
1855 && DISP_IN_RANGE (INTVAL (op)))
1858 /* Accept l(g)hi operands. */
1859 if (GET_CODE (op) == CONST_INT
1860 && CONST_OK_FOR_LETTER_P (INTVAL (op), 'K'))
1863 /* Accept lliXX operands. */
1865 && s390_single_hi (op, DImode, 0) >= 0)
1868 /* Accept larl operands. */
1869 if (TARGET_CPU_ZARCH
1870 && larl_operand (op, VOIDmode))
1873 /* Everything else cannot be handled without reload. */
1877 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1878 return the class of reg to actually use. */
1881 s390_preferred_reload_class (rtx op, enum reg_class class)
1883 /* This can happen if a floating point constant is being
1884 reloaded into an integer register. Leave well alone. */
1885 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1886 && class != FP_REGS)
1889 switch (GET_CODE (op))
1891 /* Constants we cannot reload must be forced into the
1896 if (legitimate_reload_constant_p (op))
1901 /* If a symbolic constant or a PLUS is reloaded,
1902 it is most likely being used as an address, so
1903 prefer ADDR_REGS. If 'class' is not a superset
1904 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1909 if (reg_class_subset_p (ADDR_REGS, class))
1921 /* Return the register class of a scratch register needed to
1922 load IN into a register of class CLASS in MODE.
1924 We need a temporary when loading a PLUS expression which
1925 is not a legitimate operand of the LOAD ADDRESS instruction. */
1928 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1929 enum machine_mode mode, rtx in)
1931 if (s390_plus_operand (in, mode))
1937 /* Return the register class of a scratch register needed to
1938 store a register of class CLASS in MODE into OUT:
1940 We need a temporary when storing a double-word to a
1941 non-offsettable memory address. */
1944 s390_secondary_output_reload_class (enum reg_class class,
1945 enum machine_mode mode, rtx out)
1947 if ((TARGET_64BIT ? mode == TImode
1948 : (mode == DImode || mode == DFmode))
1949 && reg_classes_intersect_p (GENERAL_REGS, class)
1950 && GET_CODE (out) == MEM
1951 && !offsettable_memref_p (out)
1952 && !s_operand (out, VOIDmode))
1958 /* Return true if OP is a PLUS that is not a legitimate
1959 operand for the LA instruction.
1960 OP is the current operation.
1961 MODE is the current operation mode. */
1964 s390_plus_operand (register rtx op, enum machine_mode mode)
1966 if (!check_mode (op, &mode) || mode != Pmode)
1969 if (GET_CODE (op) != PLUS)
1972 if (legitimate_la_operand_p (op))
1978 /* Generate code to load SRC, which is PLUS that is not a
1979 legitimate operand for the LA instruction, into TARGET.
1980 SCRATCH may be used as scratch register. */
1983 s390_expand_plus_operand (register rtx target, register rtx src,
1984 register rtx scratch)
1987 struct s390_address ad;
1989 /* src must be a PLUS; get its two operands. */
1990 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1993 /* Check if any of the two operands is already scheduled
1994 for replacement by reload. This can happen e.g. when
1995 float registers occur in an address. */
1996 sum1 = find_replacement (&XEXP (src, 0));
1997 sum2 = find_replacement (&XEXP (src, 1));
1998 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2000 /* If the address is already strictly valid, there's nothing to do. */
2001 if (!s390_decompose_address (src, &ad)
2002 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2003 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
2005 /* Otherwise, one of the operands cannot be an address register;
2006 we reload its value into the scratch register. */
2007 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2009 emit_move_insn (scratch, sum1);
2012 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2014 emit_move_insn (scratch, sum2);
2018 /* According to the way these invalid addresses are generated
2019 in reload.c, it should never happen (at least on s390) that
2020 *neither* of the PLUS components, after find_replacements
2021 was applied, is an address register. */
2022 if (sum1 == scratch && sum2 == scratch)
2028 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2031 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2032 is only ever performed on addresses, so we can mark the
2033 sum as legitimate for LA in any case. */
2034 s390_load_address (target, src);
2038 /* Decompose a RTL expression ADDR for a memory address into
2039 its components, returned in OUT.
2041 Returns 0 if ADDR is not a valid memory address, nonzero
2042 otherwise. If OUT is NULL, don't return the components,
2043 but check for validity only.
2045 Note: Only addresses in canonical form are recognized.
2046 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2047 canonical form so that they will be recognized. */
2050 s390_decompose_address (register rtx addr, struct s390_address *out)
2052 rtx base = NULL_RTX;
2053 rtx indx = NULL_RTX;
2054 rtx disp = NULL_RTX;
2055 int pointer = FALSE;
2056 int base_ptr = FALSE;
2057 int indx_ptr = FALSE;
2059 /* Decompose address into base + index + displacement. */
2061 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2064 else if (GET_CODE (addr) == PLUS)
2066 rtx op0 = XEXP (addr, 0);
2067 rtx op1 = XEXP (addr, 1);
2068 enum rtx_code code0 = GET_CODE (op0);
2069 enum rtx_code code1 = GET_CODE (op1);
2071 if (code0 == REG || code0 == UNSPEC)
2073 if (code1 == REG || code1 == UNSPEC)
2075 indx = op0; /* index + base */
2081 base = op0; /* base + displacement */
2086 else if (code0 == PLUS)
2088 indx = XEXP (op0, 0); /* index + base + disp */
2089 base = XEXP (op0, 1);
2100 disp = addr; /* displacement */
2103 /* Validate base register. */
2106 if (GET_CODE (base) == UNSPEC)
2108 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2110 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2113 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2116 if (REGNO (base) == BASE_REGISTER
2117 || REGNO (base) == STACK_POINTER_REGNUM
2118 || REGNO (base) == FRAME_POINTER_REGNUM
2119 || ((reload_completed || reload_in_progress)
2120 && frame_pointer_needed
2121 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2122 || REGNO (base) == ARG_POINTER_REGNUM
2123 || (REGNO (base) >= FIRST_VIRTUAL_REGISTER
2124 && REGNO (base) <= LAST_VIRTUAL_REGISTER)
2126 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2127 pointer = base_ptr = TRUE;
2130 /* Validate index register. */
2133 if (GET_CODE (indx) == UNSPEC)
2135 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2137 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2140 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2143 if (REGNO (indx) == BASE_REGISTER
2144 || REGNO (indx) == STACK_POINTER_REGNUM
2145 || REGNO (indx) == FRAME_POINTER_REGNUM
2146 || ((reload_completed || reload_in_progress)
2147 && frame_pointer_needed
2148 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2149 || REGNO (indx) == ARG_POINTER_REGNUM
2150 || (REGNO (indx) >= FIRST_VIRTUAL_REGISTER
2151 && REGNO (indx) <= LAST_VIRTUAL_REGISTER)
2153 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2154 pointer = indx_ptr = TRUE;
2157 /* Prefer to use pointer as base, not index. */
2158 if (base && indx && !base_ptr
2159 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2166 /* Validate displacement. */
2169 /* Allow integer constant in range. */
2170 if (GET_CODE (disp) == CONST_INT)
2172 /* If the argument pointer is involved, the displacement will change
2173 later anyway as the argument pointer gets eliminated. This could
2174 make a valid displacement invalid, but it is more likely to make
2175 an invalid displacement valid, because we sometimes access the
2176 register save area via negative offsets to the arg pointer.
2177 Thus we don't check the displacement for validity here. If after
2178 elimination the displacement turns out to be invalid after all,
2179 this is fixed up by reload in any case. */
2180 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2182 if (!DISP_IN_RANGE (INTVAL (disp)))
2187 /* In the small-PIC case, the linker converts @GOT
2188 and @GOTNTPOFF offsets to possible displacements. */
2189 else if (GET_CODE (disp) == CONST
2190 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2191 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2192 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2200 /* Accept chunkfied literal pool symbol references. */
2201 else if (GET_CODE (disp) == CONST
2202 && GET_CODE (XEXP (disp, 0)) == MINUS
2203 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2204 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2209 /* Likewise if a constant offset is present. */
2210 else if (GET_CODE (disp) == CONST
2211 && GET_CODE (XEXP (disp, 0)) == PLUS
2212 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2213 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2214 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2215 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2220 /* We can convert literal pool addresses to
2221 displacements by basing them off the base register. */
2224 /* In some cases, we can accept an additional
2225 small constant offset. Split these off here. */
2227 unsigned int offset = 0;
2229 if (GET_CODE (disp) == CONST
2230 && GET_CODE (XEXP (disp, 0)) == PLUS
2231 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2233 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2234 disp = XEXP (XEXP (disp, 0), 0);
2237 /* Now we must have a literal pool address. */
2238 if (GET_CODE (disp) != SYMBOL_REF
2239 || !CONSTANT_POOL_ADDRESS_P (disp))
2242 /* If we have an offset, make sure it does not
2243 exceed the size of the constant pool entry. */
2244 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2247 /* Either base or index must be free to
2248 hold the base register. */
2252 /* Convert the address. */
2254 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2256 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2258 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2259 UNSPEC_LTREL_OFFSET);
2260 disp = gen_rtx_CONST (Pmode, disp);
2263 disp = plus_constant (disp, offset);
2277 out->pointer = pointer;
2283 /* Return nonzero if ADDR is a valid memory address.
2284 STRICT specifies whether strict register checking applies. */
2287 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2288 register rtx addr, int strict)
2290 struct s390_address ad;
2291 if (!s390_decompose_address (addr, &ad))
2296 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2298 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2303 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2305 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2312 /* Return 1 if OP is a valid operand for the LA instruction.
2313 In 31-bit, we need to prove that the result is used as an
2314 address, as LA performs only a 31-bit addition. */
2317 legitimate_la_operand_p (register rtx op)
2319 struct s390_address addr;
2320 if (!s390_decompose_address (op, &addr))
2323 if (TARGET_64BIT || addr.pointer)
2329 /* Return 1 if OP is a valid operand for the LA instruction,
2330 and we prefer to use LA over addition to compute it. */
2333 preferred_la_operand_p (register rtx op)
2335 struct s390_address addr;
2336 if (!s390_decompose_address (op, &addr))
2339 if (!TARGET_64BIT && !addr.pointer)
2345 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2346 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2352 /* Emit a forced load-address operation to load SRC into DST.
2353 This will use the LOAD ADDRESS instruction even in situations
2354 where legitimate_la_operand_p (SRC) returns false. */
2357 s390_load_address (rtx dst, rtx src)
2360 emit_move_insn (dst, src);
2362 emit_insn (gen_force_la_31 (dst, src));
2365 /* Return a legitimate reference for ORIG (an address) using the
2366 register REG. If REG is 0, a new pseudo is generated.
2368 There are two types of references that must be handled:
2370 1. Global data references must load the address from the GOT, via
2371 the PIC reg. An insn is emitted to do this load, and the reg is
2374 2. Static data references, constant pool addresses, and code labels
2375 compute the address as an offset from the GOT, whose base is in
2376 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2377 differentiate them from global data objects. The returned
2378 address is the PIC reg + an unspec constant.
2380 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2381 reg also appears in the address. */
2384 legitimize_pic_address (rtx orig, rtx reg)
2390 if (GET_CODE (addr) == LABEL_REF
2391 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2393 /* This is a local symbol. */
2394 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2396 /* Access local symbols PC-relative via LARL.
2397 This is the same as in the non-PIC case, so it is
2398 handled automatically ... */
2402 /* Access local symbols relative to the GOT. */
2404 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2406 if (reload_in_progress || reload_completed)
2407 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2409 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2410 addr = gen_rtx_CONST (Pmode, addr);
2411 addr = force_const_mem (Pmode, addr);
2412 emit_move_insn (temp, addr);
2414 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2417 emit_move_insn (reg, new);
2422 else if (GET_CODE (addr) == SYMBOL_REF)
2425 reg = gen_reg_rtx (Pmode);
2429 /* Assume GOT offset < 4k. This is handled the same way
2430 in both 31- and 64-bit code (@GOT). */
2432 if (reload_in_progress || reload_completed)
2433 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2435 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2436 new = gen_rtx_CONST (Pmode, new);
2437 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2438 new = gen_rtx_MEM (Pmode, new);
2439 RTX_UNCHANGING_P (new) = 1;
2440 emit_move_insn (reg, new);
2443 else if (TARGET_CPU_ZARCH)
2445 /* If the GOT offset might be >= 4k, we determine the position
2446 of the GOT entry via a PC-relative LARL (@GOTENT). */
2448 rtx temp = gen_reg_rtx (Pmode);
2450 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2451 new = gen_rtx_CONST (Pmode, new);
2452 emit_move_insn (temp, new);
2454 new = gen_rtx_MEM (Pmode, temp);
2455 RTX_UNCHANGING_P (new) = 1;
2456 emit_move_insn (reg, new);
2461 /* If the GOT offset might be >= 4k, we have to load it
2462 from the literal pool (@GOT). */
2464 rtx temp = gen_reg_rtx (Pmode);
2466 if (reload_in_progress || reload_completed)
2467 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2469 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2470 addr = gen_rtx_CONST (Pmode, addr);
2471 addr = force_const_mem (Pmode, addr);
2472 emit_move_insn (temp, addr);
2474 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2475 new = gen_rtx_MEM (Pmode, new);
2476 RTX_UNCHANGING_P (new) = 1;
2477 emit_move_insn (reg, new);
2483 if (GET_CODE (addr) == CONST)
2485 addr = XEXP (addr, 0);
2486 if (GET_CODE (addr) == UNSPEC)
2488 if (XVECLEN (addr, 0) != 1)
2490 switch (XINT (addr, 1))
2492 /* If someone moved a GOT-relative UNSPEC
2493 out of the literal pool, force them back in. */
2496 new = force_const_mem (Pmode, orig);
2499 /* @GOT is OK as is if small. */
2502 new = force_const_mem (Pmode, orig);
2505 /* @GOTENT is OK as is. */
2509 /* @PLT is OK as is on 64-bit, must be converted to
2510 GOT-relative @PLTOFF on 31-bit. */
2512 if (!TARGET_CPU_ZARCH)
2514 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2516 if (reload_in_progress || reload_completed)
2517 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2519 addr = XVECEXP (addr, 0, 0);
2520 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2522 addr = gen_rtx_CONST (Pmode, addr);
2523 addr = force_const_mem (Pmode, addr);
2524 emit_move_insn (temp, addr);
2526 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2529 emit_move_insn (reg, new);
2535 /* Everything else cannot happen. */
2540 else if (GET_CODE (addr) != PLUS)
2543 if (GET_CODE (addr) == PLUS)
2545 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2546 /* Check first to see if this is a constant offset
2547 from a local symbol reference. */
2548 if ((GET_CODE (op0) == LABEL_REF
2549 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2550 && GET_CODE (op1) == CONST_INT)
2552 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2554 if (INTVAL (op1) & 1)
2556 /* LARL can't handle odd offsets, so emit a
2557 pair of LARL and LA. */
2558 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2560 if (!DISP_IN_RANGE (INTVAL (op1)))
2562 int even = INTVAL (op1) - 1;
2563 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2564 op0 = gen_rtx_CONST (Pmode, op0);
2568 emit_move_insn (temp, op0);
2569 new = gen_rtx_PLUS (Pmode, temp, op1);
2573 emit_move_insn (reg, new);
2579 /* If the offset is even, we can just use LARL.
2580 This will happen automatically. */
2585 /* Access local symbols relative to the GOT. */
2587 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2589 if (reload_in_progress || reload_completed)
2590 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2592 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2594 addr = gen_rtx_PLUS (Pmode, addr, op1);
2595 addr = gen_rtx_CONST (Pmode, addr);
2596 addr = force_const_mem (Pmode, addr);
2597 emit_move_insn (temp, addr);
2599 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2602 emit_move_insn (reg, new);
2608 /* Now, check whether it is a GOT relative symbol plus offset
2609 that was pulled out of the literal pool. Force it back in. */
2611 else if (GET_CODE (op0) == UNSPEC
2612 && GET_CODE (op1) == CONST_INT)
2614 if (XVECLEN (op0, 0) != 1)
2616 if (XINT (op0, 1) != UNSPEC_GOTOFF)
2619 new = force_const_mem (Pmode, orig);
2622 /* Otherwise, compute the sum. */
2625 base = legitimize_pic_address (XEXP (addr, 0), reg);
2626 new = legitimize_pic_address (XEXP (addr, 1),
2627 base == reg ? NULL_RTX : reg);
2628 if (GET_CODE (new) == CONST_INT)
2629 new = plus_constant (base, INTVAL (new));
2632 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2634 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2635 new = XEXP (new, 1);
2637 new = gen_rtx_PLUS (Pmode, base, new);
2640 if (GET_CODE (new) == CONST)
2641 new = XEXP (new, 0);
2642 new = force_operand (new, 0);
2649 /* Load the thread pointer into a register. */
2652 get_thread_pointer (void)
2656 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2657 tp = force_reg (Pmode, tp);
2658 mark_reg_pointer (tp, BITS_PER_WORD);
2663 /* Construct the SYMBOL_REF for the tls_get_offset function. */
2665 static GTY(()) rtx s390_tls_symbol;
2667 s390_tls_get_offset (void)
2669 if (!s390_tls_symbol)
2670 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2672 return s390_tls_symbol;
2675 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2676 this (thread-local) address. REG may be used as temporary. */
2679 legitimize_tls_address (rtx addr, rtx reg)
2681 rtx new, tls_call, temp, base, r2, insn;
2683 if (GET_CODE (addr) == SYMBOL_REF)
2684 switch (tls_symbolic_operand (addr))
2686 case TLS_MODEL_GLOBAL_DYNAMIC:
2688 r2 = gen_rtx_REG (Pmode, 2);
2689 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2690 new = gen_rtx_CONST (Pmode, tls_call);
2691 new = force_const_mem (Pmode, new);
2692 emit_move_insn (r2, new);
2693 emit_call_insn (gen_call_value_tls (r2, tls_call));
2694 insn = get_insns ();
2697 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2698 temp = gen_reg_rtx (Pmode);
2699 emit_libcall_block (insn, temp, r2, new);
2701 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2704 s390_load_address (reg, new);
2709 case TLS_MODEL_LOCAL_DYNAMIC:
2711 r2 = gen_rtx_REG (Pmode, 2);
2712 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2713 new = gen_rtx_CONST (Pmode, tls_call);
2714 new = force_const_mem (Pmode, new);
2715 emit_move_insn (r2, new);
2716 emit_call_insn (gen_call_value_tls (r2, tls_call));
2717 insn = get_insns ();
2720 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2721 temp = gen_reg_rtx (Pmode);
2722 emit_libcall_block (insn, temp, r2, new);
2724 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2725 base = gen_reg_rtx (Pmode);
2726 s390_load_address (base, new);
2728 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2729 new = gen_rtx_CONST (Pmode, new);
2730 new = force_const_mem (Pmode, new);
2731 temp = gen_reg_rtx (Pmode);
2732 emit_move_insn (temp, new);
2734 new = gen_rtx_PLUS (Pmode, base, temp);
2737 s390_load_address (reg, new);
2742 case TLS_MODEL_INITIAL_EXEC:
2745 /* Assume GOT offset < 4k. This is handled the same way
2746 in both 31- and 64-bit code. */
2748 if (reload_in_progress || reload_completed)
2749 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2751 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2752 new = gen_rtx_CONST (Pmode, new);
2753 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2754 new = gen_rtx_MEM (Pmode, new);
2755 RTX_UNCHANGING_P (new) = 1;
2756 temp = gen_reg_rtx (Pmode);
2757 emit_move_insn (temp, new);
2759 else if (TARGET_CPU_ZARCH)
2761 /* If the GOT offset might be >= 4k, we determine the position
2762 of the GOT entry via a PC-relative LARL. */
2764 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2765 new = gen_rtx_CONST (Pmode, new);
2766 temp = gen_reg_rtx (Pmode);
2767 emit_move_insn (temp, new);
2769 new = gen_rtx_MEM (Pmode, temp);
2770 RTX_UNCHANGING_P (new) = 1;
2771 temp = gen_reg_rtx (Pmode);
2772 emit_move_insn (temp, new);
2776 /* If the GOT offset might be >= 4k, we have to load it
2777 from the literal pool. */
2779 if (reload_in_progress || reload_completed)
2780 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2782 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2783 new = gen_rtx_CONST (Pmode, new);
2784 new = force_const_mem (Pmode, new);
2785 temp = gen_reg_rtx (Pmode);
2786 emit_move_insn (temp, new);
2788 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2789 new = gen_rtx_MEM (Pmode, new);
2790 RTX_UNCHANGING_P (new) = 1;
2792 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2793 temp = gen_reg_rtx (Pmode);
2794 emit_insn (gen_rtx_SET (Pmode, temp, new));
2798 /* In position-dependent code, load the absolute address of
2799 the GOT entry from the literal pool. */
2801 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2802 new = gen_rtx_CONST (Pmode, new);
2803 new = force_const_mem (Pmode, new);
2804 temp = gen_reg_rtx (Pmode);
2805 emit_move_insn (temp, new);
2808 new = gen_rtx_MEM (Pmode, new);
2809 RTX_UNCHANGING_P (new) = 1;
2811 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2812 temp = gen_reg_rtx (Pmode);
2813 emit_insn (gen_rtx_SET (Pmode, temp, new));
2816 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2819 s390_load_address (reg, new);
2824 case TLS_MODEL_LOCAL_EXEC:
2825 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2826 new = gen_rtx_CONST (Pmode, new);
2827 new = force_const_mem (Pmode, new);
2828 temp = gen_reg_rtx (Pmode);
2829 emit_move_insn (temp, new);
2831 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2834 s390_load_address (reg, new);
2843 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2845 switch (XINT (XEXP (addr, 0), 1))
2847 case UNSPEC_INDNTPOFF:
2848 if (TARGET_CPU_ZARCH)
2860 abort (); /* for now ... */
2865 /* Emit insns to move operands[1] into operands[0]. */
2868 emit_symbolic_move (rtx *operands)
2870 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2872 if (GET_CODE (operands[0]) == MEM)
2873 operands[1] = force_reg (Pmode, operands[1]);
2874 else if (TLS_SYMBOLIC_CONST (operands[1]))
2875 operands[1] = legitimize_tls_address (operands[1], temp);
2877 operands[1] = legitimize_pic_address (operands[1], temp);
2880 /* Try machine-dependent ways of modifying an illegitimate address X
2881 to be legitimate. If we find one, return the new, valid address.
2883 OLDX is the address as it was before break_out_memory_refs was called.
2884 In some cases it is useful to look at this to decide what needs to be done.
2886 MODE is the mode of the operand pointed to by X.
2888 When -fpic is used, special handling is needed for symbolic references.
2889 See comments by legitimize_pic_address for details. */
2892 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2893 enum machine_mode mode ATTRIBUTE_UNUSED)
2895 rtx constant_term = const0_rtx;
2897 if (TLS_SYMBOLIC_CONST (x))
2899 x = legitimize_tls_address (x, 0);
2901 if (legitimate_address_p (mode, x, FALSE))
2906 if (SYMBOLIC_CONST (x)
2907 || (GET_CODE (x) == PLUS
2908 && (SYMBOLIC_CONST (XEXP (x, 0))
2909 || SYMBOLIC_CONST (XEXP (x, 1)))))
2910 x = legitimize_pic_address (x, 0);
2912 if (legitimate_address_p (mode, x, FALSE))
2916 x = eliminate_constant_term (x, &constant_term);
2918 /* Optimize loading of large displacements by splitting them
2919 into the multiple of 4K and the rest; this allows the
2920 former to be CSE'd if possible.
2922 Don't do this if the displacement is added to a register
2923 pointing into the stack frame, as the offsets will
2924 change later anyway. */
2926 if (GET_CODE (constant_term) == CONST_INT
2927 && !TARGET_LONG_DISPLACEMENT
2928 && !DISP_IN_RANGE (INTVAL (constant_term))
2929 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2931 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2932 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2934 rtx temp = gen_reg_rtx (Pmode);
2935 rtx val = force_operand (GEN_INT (upper), temp);
2937 emit_move_insn (temp, val);
2939 x = gen_rtx_PLUS (Pmode, x, temp);
2940 constant_term = GEN_INT (lower);
2943 if (GET_CODE (x) == PLUS)
2945 if (GET_CODE (XEXP (x, 0)) == REG)
2947 register rtx temp = gen_reg_rtx (Pmode);
2948 register rtx val = force_operand (XEXP (x, 1), temp);
2950 emit_move_insn (temp, val);
2952 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2955 else if (GET_CODE (XEXP (x, 1)) == REG)
2957 register rtx temp = gen_reg_rtx (Pmode);
2958 register rtx val = force_operand (XEXP (x, 0), temp);
2960 emit_move_insn (temp, val);
2962 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2966 if (constant_term != const0_rtx)
2967 x = gen_rtx_PLUS (Pmode, x, constant_term);
2972 /* Emit code to move LEN bytes from DST to SRC. */
2975 s390_expand_movstr (rtx dst, rtx src, rtx len)
2977 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2979 if (INTVAL (len) > 0)
2980 emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2983 else if (TARGET_MVCLE)
2985 emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
2990 rtx dst_addr, src_addr, count, blocks, temp;
2991 rtx end_label = gen_label_rtx ();
2992 enum machine_mode mode;
2995 mode = GET_MODE (len);
2996 if (mode == VOIDmode)
2999 type = lang_hooks.types.type_for_mode (mode, 1);
3003 dst_addr = gen_reg_rtx (Pmode);
3004 src_addr = gen_reg_rtx (Pmode);
3005 count = gen_reg_rtx (mode);
3006 blocks = gen_reg_rtx (mode);
3008 convert_move (count, len, 1);
3009 emit_cmp_and_jump_insns (count, const0_rtx,
3010 EQ, NULL_RTX, mode, 1, end_label);
3012 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3013 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3014 dst = change_address (dst, VOIDmode, dst_addr);
3015 src = change_address (src, VOIDmode, src_addr);
3017 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3019 emit_move_insn (count, temp);
3021 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3023 emit_move_insn (blocks, temp);
3025 expand_start_loop (1);
3026 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3027 make_tree (type, blocks),
3028 make_tree (type, const0_rtx)));
3030 emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
3031 s390_load_address (dst_addr,
3032 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3033 s390_load_address (src_addr,
3034 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3036 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3038 emit_move_insn (blocks, temp);
3042 emit_insn (gen_movstr_short (dst, src,
3043 convert_to_mode (Pmode, count, 1)));
3044 emit_label (end_label);
3048 /* Emit code to clear LEN bytes at DST. */
3051 s390_expand_clrstr (rtx dst, rtx len)
3053 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3055 if (INTVAL (len) > 0)
3056 emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
3059 else if (TARGET_MVCLE)
3061 emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
3066 rtx dst_addr, src_addr, count, blocks, temp;
3067 rtx end_label = gen_label_rtx ();
3068 enum machine_mode mode;
3071 mode = GET_MODE (len);
3072 if (mode == VOIDmode)
3075 type = lang_hooks.types.type_for_mode (mode, 1);
3079 dst_addr = gen_reg_rtx (Pmode);
3080 src_addr = gen_reg_rtx (Pmode);
3081 count = gen_reg_rtx (mode);
3082 blocks = gen_reg_rtx (mode);
3084 convert_move (count, len, 1);
3085 emit_cmp_and_jump_insns (count, const0_rtx,
3086 EQ, NULL_RTX, mode, 1, end_label);
3088 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3089 dst = change_address (dst, VOIDmode, dst_addr);
3091 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3093 emit_move_insn (count, temp);
3095 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3097 emit_move_insn (blocks, temp);
3099 expand_start_loop (1);
3100 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3101 make_tree (type, blocks),
3102 make_tree (type, const0_rtx)));
3104 emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
3105 s390_load_address (dst_addr,
3106 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3108 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3110 emit_move_insn (blocks, temp);
3114 emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
3115 emit_label (end_label);
3119 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3120 and return the result in TARGET. */
3123 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3125 rtx (*gen_result) (rtx) =
3126 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3128 op0 = protect_from_queue (op0, 0);
3129 op1 = protect_from_queue (op1, 0);
3130 len = protect_from_queue (len, 0);
3132 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3134 if (INTVAL (len) > 0)
3136 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3137 emit_insn (gen_result (target));
3140 emit_move_insn (target, const0_rtx);
3143 else /* if (TARGET_MVCLE) */
3145 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3146 emit_insn (gen_result (target));
3150 /* Deactivate for now as profile code cannot cope with
3151 CC being live across basic block boundaries. */
3154 rtx addr0, addr1, count, blocks, temp;
3155 rtx end_label = gen_label_rtx ();
3156 enum machine_mode mode;
3159 mode = GET_MODE (len);
3160 if (mode == VOIDmode)
3163 type = lang_hooks.types.type_for_mode (mode, 1);
3167 addr0 = gen_reg_rtx (Pmode);
3168 addr1 = gen_reg_rtx (Pmode);
3169 count = gen_reg_rtx (mode);
3170 blocks = gen_reg_rtx (mode);
3172 convert_move (count, len, 1);
3173 emit_cmp_and_jump_insns (count, const0_rtx,
3174 EQ, NULL_RTX, mode, 1, end_label);
3176 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3177 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3178 op0 = change_address (op0, VOIDmode, addr0);
3179 op1 = change_address (op1, VOIDmode, addr1);
3181 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3183 emit_move_insn (count, temp);
3185 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3187 emit_move_insn (blocks, temp);
3189 expand_start_loop (1);
3190 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3191 make_tree (type, blocks),
3192 make_tree (type, const0_rtx)));
3194 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3195 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3196 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3197 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3198 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3199 emit_jump_insn (temp);
3201 s390_load_address (addr0,
3202 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3203 s390_load_address (addr1,
3204 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3206 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3208 emit_move_insn (blocks, temp);
3212 emit_insn (gen_cmpmem_short (op0, op1,
3213 convert_to_mode (Pmode, count, 1)));
3214 emit_label (end_label);
3216 emit_insn (gen_result (target));
3221 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3222 We need to emit DTP-relative relocations. */
3225 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3230 fputs ("\t.long\t", file);
3233 fputs ("\t.quad\t", file);
3238 output_addr_const (file, x);
3239 fputs ("@DTPOFF", file);
3242 /* In the name of slightly smaller debug output, and to cater to
3243 general assembler losage, recognize various UNSPEC sequences
3244 and turn them back into a direct symbol reference. */
3247 s390_delegitimize_address (rtx orig_x)
3251 if (GET_CODE (x) != MEM)
3255 if (GET_CODE (x) == PLUS
3256 && GET_CODE (XEXP (x, 1)) == CONST
3257 && GET_CODE (XEXP (x, 0)) == REG
3258 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3260 y = XEXP (XEXP (x, 1), 0);
3261 if (GET_CODE (y) == UNSPEC
3262 && XINT (y, 1) == UNSPEC_GOT)
3263 return XVECEXP (y, 0, 0);
3267 if (GET_CODE (x) == CONST)
3270 if (GET_CODE (y) == UNSPEC
3271 && XINT (y, 1) == UNSPEC_GOTENT)
3272 return XVECEXP (y, 0, 0);
3279 /* Output shift count operand OP to stdio stream FILE. */
3282 print_shift_count_operand (FILE *file, rtx op)
3284 HOST_WIDE_INT offset = 0;
3286 /* We can have an integer constant, an address register,
3287 or a sum of the two. */
3288 if (GET_CODE (op) == CONST_INT)
3290 offset = INTVAL (op);
3293 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3295 offset = INTVAL (XEXP (op, 1));
3298 while (op && GET_CODE (op) == SUBREG)
3299 op = SUBREG_REG (op);
3302 if (op && (GET_CODE (op) != REG
3303 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3304 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3307 /* Shift counts are truncated to the low six bits anyway. */
3308 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3310 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3313 /* Locate some local-dynamic symbol still in use by this function
3314 so that we can print its name in local-dynamic base patterns. */
3317 get_some_local_dynamic_name (void)
3321 if (cfun->machine->some_ld_name)
3322 return cfun->machine->some_ld_name;
3324 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3326 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3327 return cfun->machine->some_ld_name;
3333 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3337 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3339 x = get_pool_constant (x);
3340 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3343 if (GET_CODE (x) == SYMBOL_REF
3344 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3346 cfun->machine->some_ld_name = XSTR (x, 0);
3353 /* Output symbolic constant X in assembler syntax to
3354 stdio stream FILE. */
3357 s390_output_symbolic_const (FILE *file, rtx x)
3359 switch (GET_CODE (x))
3364 s390_output_symbolic_const (file, XEXP (x, 0));
3368 s390_output_symbolic_const (file, XEXP (x, 0));
3369 fprintf (file, "+");
3370 s390_output_symbolic_const (file, XEXP (x, 1));
3374 s390_output_symbolic_const (file, XEXP (x, 0));
3375 fprintf (file, "-");
3376 s390_output_symbolic_const (file, XEXP (x, 1));
3383 output_addr_const (file, x);
3387 if (XVECLEN (x, 0) != 1)
3388 output_operand_lossage ("invalid UNSPEC as operand (1)");
3389 switch (XINT (x, 1))
3392 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3393 fprintf (file, "@GOTENT");
3396 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3397 fprintf (file, "@GOT");
3400 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3401 fprintf (file, "@GOTOFF");
3404 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3405 fprintf (file, "@PLT");
3408 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3409 fprintf (file, "@PLTOFF");
3412 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3413 fprintf (file, "@TLSGD");
3416 assemble_name (file, get_some_local_dynamic_name ());
3417 fprintf (file, "@TLSLDM");
3420 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3421 fprintf (file, "@DTPOFF");
3424 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3425 fprintf (file, "@NTPOFF");
3427 case UNSPEC_GOTNTPOFF:
3428 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3429 fprintf (file, "@GOTNTPOFF");
3431 case UNSPEC_INDNTPOFF:
3432 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3433 fprintf (file, "@INDNTPOFF");
3436 output_operand_lossage ("invalid UNSPEC as operand (2)");
3442 fatal_insn ("UNKNOWN in s390_output_symbolic_const !?", x);
3447 /* Output address operand ADDR in assembler syntax to
3448 stdio stream FILE. */
3451 print_operand_address (FILE *file, rtx addr)
3453 struct s390_address ad;
3455 if (!s390_decompose_address (addr, &ad)
3456 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3457 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3458 output_operand_lossage ("Cannot decompose address.");
3461 s390_output_symbolic_const (file, ad.disp);
3463 fprintf (file, "0");
3465 if (ad.base && ad.indx)
3466 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3467 reg_names[REGNO (ad.base)]);
3469 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3472 /* Output operand X in assembler syntax to stdio stream FILE.
3473 CODE specified the format flag. The following format flags
3476 'C': print opcode suffix for branch condition.
3477 'D': print opcode suffix for inverse branch condition.
3478 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3479 'O': print only the displacement of a memory reference.
3480 'R': print only the base register of a memory reference.
3481 'N': print the second word of a DImode operand.
3482 'M': print the second word of a TImode operand.
3483 'Y': print shift count operand.
3485 'b': print integer X as if it's an unsigned byte.
3486 'x': print integer X as if it's an unsigned word.
3487 'h': print integer X as if it's a signed word. */
3490 print_operand (FILE *file, rtx x, int code)
3495 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3499 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3503 if (GET_CODE (x) == SYMBOL_REF)
3505 fprintf (file, "%s", ":tls_load:");
3506 output_addr_const (file, x);
3508 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3510 fprintf (file, "%s", ":tls_gdcall:");
3511 output_addr_const (file, XVECEXP (x, 0, 0));
3513 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3515 fprintf (file, "%s", ":tls_ldcall:");
3516 assemble_name (file, get_some_local_dynamic_name ());
3524 struct s390_address ad;
3526 if (GET_CODE (x) != MEM
3527 || !s390_decompose_address (XEXP (x, 0), &ad)
3528 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3533 s390_output_symbolic_const (file, ad.disp);
3535 fprintf (file, "0");
3541 struct s390_address ad;
3543 if (GET_CODE (x) != MEM
3544 || !s390_decompose_address (XEXP (x, 0), &ad)
3545 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3550 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3552 fprintf (file, "0");
3557 if (GET_CODE (x) == REG)
3558 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3559 else if (GET_CODE (x) == MEM)
3560 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3566 if (GET_CODE (x) == REG)
3567 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3568 else if (GET_CODE (x) == MEM)
3569 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3575 print_shift_count_operand (file, x);
3579 switch (GET_CODE (x))
3582 fprintf (file, "%s", reg_names[REGNO (x)]);
3586 output_address (XEXP (x, 0));
3593 s390_output_symbolic_const (file, x);
3598 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3599 else if (code == 'x')
3600 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3601 else if (code == 'h')
3602 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3604 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3608 if (GET_MODE (x) != VOIDmode)
3611 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3612 else if (code == 'x')
3613 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3614 else if (code == 'h')
3615 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3621 fatal_insn ("UNKNOWN in print_operand !?", x);
3626 /* Target hook for assembling integer objects. We need to define it
3627 here to work a round a bug in some versions of GAS, which couldn't
3628 handle values smaller than INT_MIN when printed in decimal. */
3631 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3633 if (size == 8 && aligned_p
3634 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3636 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3640 return default_assemble_integer (x, size, aligned_p);
3643 /* Returns true if register REGNO is used for forming
3644 a memory address in expression X. */
3647 reg_used_in_mem_p (int regno, rtx x)
3649 enum rtx_code code = GET_CODE (x);
3655 if (refers_to_regno_p (regno, regno+1,
3659 else if (code == SET
3660 && GET_CODE (SET_DEST (x)) == PC)
3662 if (refers_to_regno_p (regno, regno+1,
3667 fmt = GET_RTX_FORMAT (code);
3668 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3671 && reg_used_in_mem_p (regno, XEXP (x, i)))
3674 else if (fmt[i] == 'E')
3675 for (j = 0; j < XVECLEN (x, i); j++)
3676 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3682 /* Returns true if expression DEP_RTX sets an address register
3683 used by instruction INSN to address memory. */
3686 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3690 if (GET_CODE (dep_rtx) == INSN)
3691 dep_rtx = PATTERN (dep_rtx);
3693 if (GET_CODE (dep_rtx) == SET)
3695 target = SET_DEST (dep_rtx);
3696 if (GET_CODE (target) == STRICT_LOW_PART)
3697 target = XEXP (target, 0);
3698 while (GET_CODE (target) == SUBREG)
3699 target = SUBREG_REG (target);
3701 if (GET_CODE (target) == REG)
3703 int regno = REGNO (target);
3705 if (s390_safe_attr_type (insn) == TYPE_LA)
3707 pat = PATTERN (insn);
3708 if (GET_CODE (pat) == PARALLEL)
3710 if (XVECLEN (pat, 0) != 2)
3712 pat = XVECEXP (pat, 0, 0);
3714 if (GET_CODE (pat) == SET)
3715 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3719 else if (get_attr_atype (insn) == ATYPE_AGEN)
3720 return reg_used_in_mem_p (regno, PATTERN (insn));
3726 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3729 s390_agen_dep_p (rtx dep_insn, rtx insn)
3731 rtx dep_rtx = PATTERN (dep_insn);
3734 if (GET_CODE (dep_rtx) == SET
3735 && addr_generation_dependency_p (dep_rtx, insn))
3737 else if (GET_CODE (dep_rtx) == PARALLEL)
3739 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3741 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3748 /* Return the modified cost of the dependency of instruction INSN
3749 on instruction DEP_INSN through the link LINK. COST is the
3750 default cost of that dependency.
3752 Data dependencies are all handled without delay. However, if a
3753 register is modified and subsequently used as base or index
3754 register of a memory reference, at least 4 cycles need to pass
3755 between setting and using the register to avoid pipeline stalls.
3756 An exception is the LA instruction. An address generated by LA can
3757 be used by introducing only a one cycle stall on the pipeline. */
3760 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3765 /* If the dependence is an anti-dependence, there is no cost. For an
3766 output dependence, there is sometimes a cost, but it doesn't seem
3767 worth handling those few cases. */
3769 if (REG_NOTE_KIND (link) != 0)
3772 /* If we can't recognize the insns, we can't really do anything. */
3773 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3776 /* DFA based scheduling checks address dependency in md file. */
3777 if (s390_use_dfa_pipeline_interface ())
3779 /* Operand forward in case of lr, load and la. */
3780 if (s390_tune == PROCESSOR_2084_Z990
3782 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3783 || s390_safe_attr_type (dep_insn) == TYPE_LR
3784 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3789 dep_rtx = PATTERN (dep_insn);
3791 if (GET_CODE (dep_rtx) == SET
3792 && addr_generation_dependency_p (dep_rtx, insn))
3793 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3794 else if (GET_CODE (dep_rtx) == PARALLEL)
3796 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3798 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3799 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3805 /* A C statement (sans semicolon) to update the integer scheduling priority
3806 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3807 reduce the priority to execute INSN later. Do not define this macro if
3808 you do not need to adjust the scheduling priorities of insns.
3810 A STD instruction should be scheduled earlier,
3811 in order to use the bypass. */
3814 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3816 if (! INSN_P (insn))
3819 if (s390_tune != PROCESSOR_2084_Z990)
3822 switch (s390_safe_attr_type (insn))
3826 priority = priority << 3;
3829 priority = priority << 1;
3837 /* The number of instructions that can be issued per cycle. */
3840 s390_issue_rate (void)
3842 if (s390_tune == PROCESSOR_2084_Z990)
3847 /* If the following function returns TRUE, we will use the the DFA
3851 s390_use_dfa_pipeline_interface (void)
3853 if (s390_tune == PROCESSOR_2064_Z900
3854 || s390_tune == PROCESSOR_2084_Z990)
3861 s390_first_cycle_multipass_dfa_lookahead (void)
3863 return s390_use_dfa_pipeline_interface () ? 4 : 0;
3866 /* Called after issuing each insn.
3867 Triggers default sort algorithm to better slot instructions. */
3870 s390_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
3871 int sched_verbose ATTRIBUTE_UNUSED,
3872 rtx *ready ATTRIBUTE_UNUSED,
3873 int *pn_ready ATTRIBUTE_UNUSED,
3874 int clock_var ATTRIBUTE_UNUSED)
3876 return s390_issue_rate();
3880 /* Split all branches that exceed the maximum distance.
3881 Returns true if this created a new literal pool entry.
3883 Code generated by this routine is allowed to use
3884 TEMP_REG as temporary scratch register. If this is
3885 done, TEMP_USED is set to true. */
3888 s390_split_branches (rtx temp_reg, bool *temp_used)
3890 int new_literal = 0;
3891 rtx insn, pat, tmp, target;
3894 /* We need correct insn addresses. */
3896 shorten_branches (get_insns ());
3898 /* Find all branches that exceed 64KB, and split them. */
3900 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3902 if (GET_CODE (insn) != JUMP_INSN)
3905 pat = PATTERN (insn);
3906 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
3907 pat = XVECEXP (pat, 0, 0);
3908 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
3911 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
3913 label = &SET_SRC (pat);
3915 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
3917 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
3918 label = &XEXP (SET_SRC (pat), 1);
3919 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
3920 label = &XEXP (SET_SRC (pat), 2);
3927 if (get_attr_length (insn) <= (TARGET_CPU_ZARCH ? 6 : 4))
3932 if (TARGET_CPU_ZARCH)
3934 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, *label), insn);
3935 INSN_ADDRESSES_NEW (tmp, -1);
3942 tmp = force_const_mem (Pmode, *label);
3943 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
3944 INSN_ADDRESSES_NEW (tmp, -1);
3951 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
3952 UNSPEC_LTREL_OFFSET);
3953 target = gen_rtx_CONST (Pmode, target);
3954 target = force_const_mem (Pmode, target);
3955 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
3956 INSN_ADDRESSES_NEW (tmp, -1);
3958 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
3960 target = gen_rtx_PLUS (Pmode, temp_reg, target);
3963 if (!validate_change (insn, label, target, 0))
3971 /* Find a literal pool symbol referenced in RTX X, and store
3972 it at REF. Will abort if X contains references to more than
3973 one such pool symbol; multiple references to the same symbol
3974 are allowed, however.
3976 The rtx pointed to by REF must be initialized to NULL_RTX
3977 by the caller before calling this routine. */
3980 find_constant_pool_ref (rtx x, rtx *ref)
3985 /* Ignore LTREL_BASE references. */
3986 if (GET_CODE (x) == UNSPEC
3987 && XINT (x, 1) == UNSPEC_LTREL_BASE)
3989 /* Likewise POOL_ENTRY insns. */
3990 if (GET_CODE (x) == UNSPEC_VOLATILE
3991 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
3994 if (GET_CODE (x) == SYMBOL_REF
3995 && CONSTANT_POOL_ADDRESS_P (x))
3997 if (*ref == NULL_RTX)
4003 fmt = GET_RTX_FORMAT (GET_CODE (x));
4004 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4008 find_constant_pool_ref (XEXP (x, i), ref);
4010 else if (fmt[i] == 'E')
4012 for (j = 0; j < XVECLEN (x, i); j++)
4013 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4018 /* Replace every reference to the literal pool symbol REF
4019 in X by the address ADDR. Fix up MEMs as required. */
4022 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
4030 /* Literal pool references can only occur inside a MEM ... */
4031 if (GET_CODE (*x) == MEM)
4033 rtx memref = XEXP (*x, 0);
4037 *x = replace_equiv_address (*x, addr);
4041 if (GET_CODE (memref) == CONST
4042 && GET_CODE (XEXP (memref, 0)) == PLUS
4043 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4044 && XEXP (XEXP (memref, 0), 0) == ref)
4046 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4047 *x = replace_equiv_address (*x, plus_constant (addr, off));
4052 /* ... or a load-address type pattern. */
4053 if (GET_CODE (*x) == SET)
4055 rtx addrref = SET_SRC (*x);
4059 SET_SRC (*x) = addr;
4063 if (GET_CODE (addrref) == CONST
4064 && GET_CODE (XEXP (addrref, 0)) == PLUS
4065 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4066 && XEXP (XEXP (addrref, 0), 0) == ref)
4068 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4069 SET_SRC (*x) = plus_constant (addr, off);
4074 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4075 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4079 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4081 else if (fmt[i] == 'E')
4083 for (j = 0; j < XVECLEN (*x, i); j++)
4084 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4089 /* Check whether X contains an UNSPEC_LTREL_BASE.
4090 Return its constant pool symbol if found, NULL_RTX otherwise. */
4093 find_ltrel_base (rtx x)
4098 if (GET_CODE (x) == UNSPEC
4099 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4100 return XVECEXP (x, 0, 0);
4102 fmt = GET_RTX_FORMAT (GET_CODE (x));
4103 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4107 rtx fnd = find_ltrel_base (XEXP (x, i));
4111 else if (fmt[i] == 'E')
4113 for (j = 0; j < XVECLEN (x, i); j++)
4115 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4125 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4128 replace_ltrel_base (rtx *x, rtx base)
4133 if (GET_CODE (*x) == UNSPEC
4134 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4140 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4141 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4145 replace_ltrel_base (&XEXP (*x, i), base);
4147 else if (fmt[i] == 'E')
4149 for (j = 0; j < XVECLEN (*x, i); j++)
4150 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4156 /* We keep a list of constants which we have to add to internal
4157 constant tables in the middle of large functions. */
4159 #define NR_C_MODES 7
4160 enum machine_mode constant_modes[NR_C_MODES] =
4171 struct constant *next;
4176 struct constant_pool
4178 struct constant_pool *next;
4183 struct constant *constants[NR_C_MODES];
4188 static struct constant_pool * s390_mainpool_start (void);
4189 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4190 static void s390_mainpool_cancel (struct constant_pool *);
4192 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4193 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4194 static void s390_chunkify_cancel (struct constant_pool *);
4196 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4197 static void s390_end_pool (struct constant_pool *, rtx);
4198 static void s390_add_pool_insn (struct constant_pool *, rtx);
4199 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4200 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4201 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4202 static rtx s390_dump_pool (struct constant_pool *, bool);
4203 static struct constant_pool *s390_alloc_pool (void);
4204 static void s390_free_pool (struct constant_pool *);
4206 /* Create new constant pool covering instructions starting at INSN
4207 and chain it to the end of POOL_LIST. */
4209 static struct constant_pool *
4210 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4212 struct constant_pool *pool, **prev;
4214 pool = s390_alloc_pool ();
4215 pool->first_insn = insn;
4217 for (prev = pool_list; *prev; prev = &(*prev)->next)
4224 /* End range of instructions covered by POOL at INSN and emit
4225 placeholder insn representing the pool. */
4228 s390_end_pool (struct constant_pool *pool, rtx insn)
4230 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4233 insn = get_last_insn ();
4235 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4236 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4239 /* Add INSN to the list of insns covered by POOL. */
4242 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4244 bitmap_set_bit (pool->insns, INSN_UID (insn));
4247 /* Return pool out of POOL_LIST that covers INSN. */
4249 static struct constant_pool *
4250 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4252 struct constant_pool *pool;
4254 for (pool = pool_list; pool; pool = pool->next)
4255 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4261 /* Add constant VAL of mode MODE to the constant pool POOL. */
4264 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4269 for (i = 0; i < NR_C_MODES; i++)
4270 if (constant_modes[i] == mode)
4272 if (i == NR_C_MODES)
4275 for (c = pool->constants[i]; c != NULL; c = c->next)
4276 if (rtx_equal_p (val, c->value))
4281 c = (struct constant *) xmalloc (sizeof *c);
4283 c->label = gen_label_rtx ();
4284 c->next = pool->constants[i];
4285 pool->constants[i] = c;
4286 pool->size += GET_MODE_SIZE (mode);
4290 /* Find constant VAL of mode MODE in the constant pool POOL.
4291 Return an RTX describing the distance from the start of
4292 the pool to the location of the new constant. */
4295 s390_find_constant (struct constant_pool *pool, rtx val,
4296 enum machine_mode mode)
4302 for (i = 0; i < NR_C_MODES; i++)
4303 if (constant_modes[i] == mode)
4305 if (i == NR_C_MODES)
4308 for (c = pool->constants[i]; c != NULL; c = c->next)
4309 if (rtx_equal_p (val, c->value))
4315 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4316 gen_rtx_LABEL_REF (Pmode, pool->label));
4317 offset = gen_rtx_CONST (Pmode, offset);
4321 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4322 do not emit the pool base label. */
4325 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4331 /* Pool start insn switches to proper section
4332 and guarantees necessary alignment. */
4333 if (TARGET_CPU_ZARCH)
4334 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4336 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4337 INSN_ADDRESSES_NEW (insn, -1);
4341 insn = emit_label_after (pool->label, insn);
4342 INSN_ADDRESSES_NEW (insn, -1);
4345 /* Dump constants in descending alignment requirement order,
4346 ensuring proper alignment for every constant. */
4347 for (i = 0; i < NR_C_MODES; i++)
4348 for (c = pool->constants[i]; c; c = c->next)
4350 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4351 rtx value = c->value;
4352 if (GET_CODE (value) == CONST
4353 && GET_CODE (XEXP (value, 0)) == UNSPEC
4354 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4355 && XVECLEN (XEXP (value, 0), 0) == 1)
4357 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4358 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4359 value = gen_rtx_CONST (VOIDmode, value);
4362 insn = emit_label_after (c->label, insn);
4363 INSN_ADDRESSES_NEW (insn, -1);
4365 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4366 gen_rtvec (1, value),
4367 UNSPECV_POOL_ENTRY);
4368 insn = emit_insn_after (value, insn);
4369 INSN_ADDRESSES_NEW (insn, -1);
4372 /* Pool end insn switches back to previous section
4373 and guarantees necessary alignment. */
4374 if (TARGET_CPU_ZARCH)
4375 insn = emit_insn_after (gen_pool_end_64 (), insn);
4377 insn = emit_insn_after (gen_pool_end_31 (), insn);
4378 INSN_ADDRESSES_NEW (insn, -1);
4380 insn = emit_barrier_after (insn);
4381 INSN_ADDRESSES_NEW (insn, -1);
4383 /* Remove placeholder insn. */
4384 remove_insn (pool->pool_insn);
4389 /* Allocate new constant_pool structure. */
4391 static struct constant_pool *
4392 s390_alloc_pool (void)
4394 struct constant_pool *pool;
4397 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4399 for (i = 0; i < NR_C_MODES; i++)
4400 pool->constants[i] = NULL;
4402 pool->label = gen_label_rtx ();
4403 pool->first_insn = NULL_RTX;
4404 pool->pool_insn = NULL_RTX;
4405 pool->insns = BITMAP_XMALLOC ();
4411 /* Free all memory used by POOL. */
4414 s390_free_pool (struct constant_pool *pool)
4418 for (i = 0; i < NR_C_MODES; i++)
4420 struct constant *c = pool->constants[i];
4423 struct constant *next = c->next;
4429 BITMAP_XFREE (pool->insns);
4434 /* Collect main literal pool. Return NULL on overflow. */
4436 static struct constant_pool *
4437 s390_mainpool_start (void)
4439 struct constant_pool *pool;
4442 pool = s390_alloc_pool ();
4444 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4446 if (GET_CODE (insn) == INSN
4447 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4448 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4450 if (pool->pool_insn)
4452 pool->pool_insn = insn;
4455 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4457 rtx pool_ref = NULL_RTX;
4458 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4461 rtx constant = get_pool_constant (pool_ref);
4462 enum machine_mode mode = get_pool_mode (pool_ref);
4463 s390_add_constant (pool, constant, mode);
4468 if (!pool->pool_insn)
4471 if (pool->size >= 4096)
4473 s390_free_pool (pool);
4480 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4481 Modify the current function to output the pool constants as well as
4482 the pool register setup instruction. BASE_REG is the register to
4483 be used as pool base register. */
4486 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4490 /* If the pool is empty, we're done. */
4491 if (pool->size == 0)
4493 remove_insn (pool->pool_insn);
4494 s390_free_pool (pool);
4498 /* We need correct insn addresses. */
4499 shorten_branches (get_insns ());
4501 /* On zSeries, we use a LARL to load the pool register. The pool is
4502 located in the .rodata section, so we emit it after the function. */
4503 if (TARGET_CPU_ZARCH)
4505 insn = gen_main_base_64 (base_reg, pool->label);
4506 insn = emit_insn_after (insn, pool->pool_insn);
4507 INSN_ADDRESSES_NEW (insn, -1);
4508 remove_insn (pool->pool_insn);
4510 insn = get_last_insn ();
4511 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4512 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4514 s390_dump_pool (pool, 0);
4517 /* On S/390, if the total size of the function's code plus literal pool
4518 does not exceed 4096 bytes, we use BASR to set up a function base
4519 pointer, and emit the literal pool at the end of the function. */
4520 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4521 + pool->size + 8 /* alignment slop */ < 4096)
4523 insn = gen_main_base_31_small (base_reg, pool->label);
4524 insn = emit_insn_after (insn, pool->pool_insn);
4525 INSN_ADDRESSES_NEW (insn, -1);
4526 remove_insn (pool->pool_insn);
4528 insn = emit_label_after (pool->label, insn);
4529 INSN_ADDRESSES_NEW (insn, -1);
4531 insn = get_last_insn ();
4532 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4533 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4535 s390_dump_pool (pool, 1);
4538 /* Otherwise, we emit an inline literal pool and use BASR to branch
4539 over it, setting up the pool register at the same time. */
4542 rtx pool_end = gen_label_rtx ();
4544 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4545 insn = emit_insn_after (insn, pool->pool_insn);
4546 INSN_ADDRESSES_NEW (insn, -1);
4547 remove_insn (pool->pool_insn);
4549 insn = emit_label_after (pool->label, insn);
4550 INSN_ADDRESSES_NEW (insn, -1);
4552 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4553 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4555 insn = emit_label_after (pool_end, pool->pool_insn);
4556 INSN_ADDRESSES_NEW (insn, -1);
4558 s390_dump_pool (pool, 1);
4562 /* Replace all literal pool references. */
4564 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4567 replace_ltrel_base (&PATTERN (insn), base_reg);
4569 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4571 rtx addr, pool_ref = NULL_RTX;
4572 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4575 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4576 get_pool_mode (pool_ref));
4577 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4578 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4579 INSN_CODE (insn) = -1;
4585 /* Free the pool. */
4586 s390_free_pool (pool);
4589 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4590 We have decided we cannot use this pool, so revert all changes
4591 to the current function that were done by s390_mainpool_start. */
4593 s390_mainpool_cancel (struct constant_pool *pool)
4595 /* We didn't actually change the instruction stream, so simply
4596 free the pool memory. */
4597 s390_free_pool (pool);
4601 /* Chunkify the literal pool. BASE_REG is to be used as pool
4604 #define S390_POOL_CHUNK_MIN 0xc00
4605 #define S390_POOL_CHUNK_MAX 0xe00
4607 static struct constant_pool *
4608 s390_chunkify_start (rtx base_reg)
4610 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4613 rtx pending_ltrel = NULL_RTX;
4616 rtx (*gen_reload_base) (rtx, rtx) =
4617 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4620 /* We need correct insn addresses. */
4622 shorten_branches (get_insns ());
4624 /* Scan all insns and move literals to pool chunks. */
4626 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4628 /* Check for pending LTREL_BASE. */
4631 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4634 if (ltrel_base == pending_ltrel)
4635 pending_ltrel = NULL_RTX;
4641 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4643 rtx pool_ref = NULL_RTX;
4644 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4647 rtx constant = get_pool_constant (pool_ref);
4648 enum machine_mode mode = get_pool_mode (pool_ref);
4651 curr_pool = s390_start_pool (&pool_list, insn);
4653 s390_add_constant (curr_pool, constant, mode);
4654 s390_add_pool_insn (curr_pool, insn);
4656 /* Don't split the pool chunk between a LTREL_OFFSET load
4657 and the corresponding LTREL_BASE. */
4658 if (GET_CODE (constant) == CONST
4659 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4660 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4664 pending_ltrel = pool_ref;
4669 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4672 s390_add_pool_insn (curr_pool, insn);
4673 /* An LTREL_BASE must follow within the same basic block. */
4679 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4680 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4683 if (TARGET_CPU_ZARCH)
4685 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4688 s390_end_pool (curr_pool, NULL_RTX);
4693 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4694 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4697 /* We will later have to insert base register reload insns.
4698 Those will have an effect on code size, which we need to
4699 consider here. This calculation makes rather pessimistic
4700 worst-case assumptions. */
4701 if (GET_CODE (insn) == CODE_LABEL)
4704 if (chunk_size < S390_POOL_CHUNK_MIN
4705 && curr_pool->size < S390_POOL_CHUNK_MIN)
4708 /* Pool chunks can only be inserted after BARRIERs ... */
4709 if (GET_CODE (insn) == BARRIER)
4711 s390_end_pool (curr_pool, insn);
4716 /* ... so if we don't find one in time, create one. */
4717 else if ((chunk_size > S390_POOL_CHUNK_MAX
4718 || curr_pool->size > S390_POOL_CHUNK_MAX))
4720 rtx label, jump, barrier;
4722 /* We can insert the barrier only after a 'real' insn. */
4723 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4725 if (get_attr_length (insn) == 0)
4728 /* Don't separate LTREL_BASE from the corresponding
4729 LTREL_OFFSET load. */
4733 label = gen_label_rtx ();
4734 jump = emit_jump_insn_after (gen_jump (label), insn);
4735 barrier = emit_barrier_after (jump);
4736 insn = emit_label_after (label, barrier);
4737 JUMP_LABEL (jump) = label;
4738 LABEL_NUSES (label) = 1;
4740 INSN_ADDRESSES_NEW (jump, -1);
4741 INSN_ADDRESSES_NEW (barrier, -1);
4742 INSN_ADDRESSES_NEW (insn, -1);
4744 s390_end_pool (curr_pool, barrier);
4752 s390_end_pool (curr_pool, NULL_RTX);
4757 /* Find all labels that are branched into
4758 from an insn belonging to a different chunk. */
4760 far_labels = BITMAP_XMALLOC ();
4762 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4764 /* Labels marked with LABEL_PRESERVE_P can be target
4765 of non-local jumps, so we have to mark them.
4766 The same holds for named labels.
4768 Don't do that, however, if it is the label before
4771 if (GET_CODE (insn) == CODE_LABEL
4772 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4774 rtx vec_insn = next_real_insn (insn);
4775 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4776 PATTERN (vec_insn) : NULL_RTX;
4778 || !(GET_CODE (vec_pat) == ADDR_VEC
4779 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4780 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4783 /* If we have a direct jump (conditional or unconditional)
4784 or a casesi jump, check all potential targets. */
4785 else if (GET_CODE (insn) == JUMP_INSN)
4787 rtx pat = PATTERN (insn);
4788 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4789 pat = XVECEXP (pat, 0, 0);
4791 if (GET_CODE (pat) == SET)
4793 rtx label = JUMP_LABEL (insn);
4796 if (s390_find_pool (pool_list, label)
4797 != s390_find_pool (pool_list, insn))
4798 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4801 else if (GET_CODE (pat) == PARALLEL
4802 && XVECLEN (pat, 0) == 2
4803 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4804 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4805 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4807 /* Find the jump table used by this casesi jump. */
4808 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4809 rtx vec_insn = next_real_insn (vec_label);
4810 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4811 PATTERN (vec_insn) : NULL_RTX;
4813 && (GET_CODE (vec_pat) == ADDR_VEC
4814 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4816 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4818 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4820 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4822 if (s390_find_pool (pool_list, label)
4823 != s390_find_pool (pool_list, insn))
4824 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4831 /* Insert base register reload insns before every pool. */
4833 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4835 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4836 rtx insn = curr_pool->first_insn;
4837 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4840 /* Insert base register reload insns at every far label. */
4842 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4843 if (GET_CODE (insn) == CODE_LABEL
4844 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4846 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4849 rtx new_insn = gen_reload_base (base_reg, pool->label);
4850 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4855 BITMAP_XFREE (far_labels);
4858 /* Recompute insn addresses. */
4860 init_insn_lengths ();
4861 shorten_branches (get_insns ());
4866 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4867 After we have decided to use this list, finish implementing
4868 all changes to the current function as required. BASE_REG is
4869 to be used as pool base register. */
4872 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
4874 struct constant_pool *curr_pool = NULL;
4878 /* Replace all literal pool references. */
4880 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4883 replace_ltrel_base (&PATTERN (insn), base_reg);
4885 curr_pool = s390_find_pool (pool_list, insn);
4889 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4891 rtx addr, pool_ref = NULL_RTX;
4892 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4895 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
4896 get_pool_mode (pool_ref));
4897 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4898 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4899 INSN_CODE (insn) = -1;
4904 /* Dump out all literal pools. */
4906 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4907 s390_dump_pool (curr_pool, 0);
4909 /* Free pool list. */
4913 struct constant_pool *next = pool_list->next;
4914 s390_free_pool (pool_list);
4919 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4920 We have decided we cannot use this list, so revert all changes
4921 to the current function that were done by s390_chunkify_start. */
4924 s390_chunkify_cancel (struct constant_pool *pool_list)
4926 struct constant_pool *curr_pool = NULL;
4929 /* Remove all pool placeholder insns. */
4931 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4933 /* Did we insert an extra barrier? Remove it. */
4934 rtx barrier = PREV_INSN (curr_pool->pool_insn);
4935 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
4936 rtx label = NEXT_INSN (curr_pool->pool_insn);
4938 if (jump && GET_CODE (jump) == JUMP_INSN
4939 && barrier && GET_CODE (barrier) == BARRIER
4940 && label && GET_CODE (label) == CODE_LABEL
4941 && GET_CODE (PATTERN (jump)) == SET
4942 && SET_DEST (PATTERN (jump)) == pc_rtx
4943 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
4944 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
4947 remove_insn (barrier);
4948 remove_insn (label);
4951 remove_insn (curr_pool->pool_insn);
4954 /* Remove all base register reload insns. */
4956 for (insn = get_insns (); insn; )
4958 rtx next_insn = NEXT_INSN (insn);
4960 if (GET_CODE (insn) == INSN
4961 && GET_CODE (PATTERN (insn)) == SET
4962 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
4963 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
4969 /* Free pool list. */
4973 struct constant_pool *next = pool_list->next;
4974 s390_free_pool (pool_list);
4980 /* Output to FILE the constant pool entry EXP in mode MODE
4981 with alignment ALIGN. */
4984 s390_output_pool_entry (FILE *file, rtx exp, enum machine_mode mode,
4989 switch (GET_MODE_CLASS (mode))
4992 if (GET_CODE (exp) != CONST_DOUBLE)
4995 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
4996 assemble_real (r, mode, align);
5000 if (GET_CODE (exp) == CONST
5001 || GET_CODE (exp) == SYMBOL_REF
5002 || GET_CODE (exp) == LABEL_REF)
5004 fputs (integer_asm_op (GET_MODE_SIZE (mode), TRUE), file);
5005 s390_output_symbolic_const (file, exp);
5010 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5020 /* Rework the prolog/epilog to avoid saving/restoring
5021 registers unnecessarily. BASE_USED specifies whether
5022 the literal pool base register needs to be saved,
5023 TEMP_USED specifies whether the return register needs
5027 s390_optimize_prolog (bool base_used, bool temp_used)
5029 int save_first, save_last, restore_first, restore_last;
5031 rtx insn, new_insn, next_insn;
5033 /* Recompute regs_ever_live data for special registers. */
5034 regs_ever_live[BASE_REGISTER] = base_used;
5035 regs_ever_live[RETURN_REGNUM] = temp_used;
5036 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5038 /* In non-leaf functions, the prolog/epilog code relies
5039 on RETURN_REGNUM being saved in any case. We also need
5040 to save the return register if __builtin_return_address (0)
5041 was used in the current function. */
5042 if (!current_function_is_leaf
5043 || cfun->machine->save_return_addr_p)
5044 regs_ever_live[RETURN_REGNUM] = 1;
5047 /* Find first and last gpr to be saved. */
5049 for (i = 6; i < 16; i++)
5050 if (regs_ever_live[i])
5052 || i == STACK_POINTER_REGNUM
5053 || i == RETURN_REGNUM
5054 || i == BASE_REGISTER
5055 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5058 for (j = 15; j > i; j--)
5059 if (regs_ever_live[j])
5061 || j == STACK_POINTER_REGNUM
5062 || j == RETURN_REGNUM
5063 || j == BASE_REGISTER
5064 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5069 /* Nothing to save/restore. */
5070 save_first = restore_first = -1;
5071 save_last = restore_last = -1;
5075 /* Save/restore from i to j. */
5076 save_first = restore_first = i;
5077 save_last = restore_last = j;
5080 /* Varargs functions need to save gprs 2 to 6. */
5081 if (current_function_stdarg)
5089 /* If all special registers are in fact used, there's nothing we
5090 can do, so no point in walking the insn list. */
5091 if (i <= BASE_REGISTER && j >= BASE_REGISTER
5092 && i <= RETURN_REGNUM && j >= RETURN_REGNUM)
5096 /* Search for prolog/epilog insns and replace them. */
5098 for (insn = get_insns (); insn; insn = next_insn)
5100 int first, last, off;
5101 rtx set, base, offset;
5103 next_insn = NEXT_INSN (insn);
5105 if (GET_CODE (insn) != INSN)
5107 if (GET_CODE (PATTERN (insn)) != PARALLEL)
5110 if (store_multiple_operation (PATTERN (insn), VOIDmode))
5112 set = XVECEXP (PATTERN (insn), 0, 0);
5113 first = REGNO (SET_SRC (set));
5114 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5115 offset = const0_rtx;
5116 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5117 off = INTVAL (offset) - first * UNITS_PER_WORD;
5119 if (GET_CODE (base) != REG || off < 0)
5121 if (first > BASE_REGISTER && first > RETURN_REGNUM)
5123 if (last < BASE_REGISTER && last < RETURN_REGNUM)
5126 if (save_first != -1)
5128 new_insn = save_gprs (base, off, save_first, save_last);
5129 new_insn = emit_insn_before (new_insn, insn);
5130 INSN_ADDRESSES_NEW (new_insn, -1);
5136 if (load_multiple_operation (PATTERN (insn), VOIDmode))
5138 set = XVECEXP (PATTERN (insn), 0, 0);
5139 first = REGNO (SET_DEST (set));
5140 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5141 offset = const0_rtx;
5142 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5143 off = INTVAL (offset) - first * UNITS_PER_WORD;
5145 if (GET_CODE (base) != REG || off < 0)
5147 if (first > BASE_REGISTER && first > RETURN_REGNUM)
5149 if (last < BASE_REGISTER && last < RETURN_REGNUM)
5152 if (restore_first != -1)
5154 new_insn = restore_gprs (base, off, restore_first, restore_last);
5155 new_insn = emit_insn_before (new_insn, insn);
5156 INSN_ADDRESSES_NEW (new_insn, -1);
5164 /* Perform machine-dependent processing. */
5169 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5170 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5171 bool temp_used = false;
5172 bool base_used = false;
5173 bool pool_overflow = false;
5175 /* Make sure all splits have been performed; splits after
5176 machine_dependent_reorg might confuse insn length counts. */
5177 split_all_insns_noflow ();
5180 /* In small leaf functions, try to use an unused call-clobbered
5181 register as base register to avoid save/restore overhead. */
5182 if (current_function_is_leaf && !regs_ever_live[5])
5183 base_reg = gen_rtx_REG (Pmode, 5);
5186 /* Install the main literal pool and the associated base
5187 register load insns.
5189 In addition, there are two problematic situations we need
5192 - the literal pool might be > 4096 bytes in size, so that
5193 some of its elements cannot be directly accessed
5195 - a branch target might be > 64K away from the branch, so that
5196 it is not possible to use a PC-relative instruction.
5198 To fix those, we split the single literal pool into multiple
5199 pool chunks, reloading the pool base register at various
5200 points throughout the function to ensure it always points to
5201 the pool chunk the following code expects, and / or replace
5202 PC-relative branches by absolute branches.
5204 However, the two problems are interdependent: splitting the
5205 literal pool can move a branch further away from its target,
5206 causing the 64K limit to overflow, and on the other hand,
5207 replacing a PC-relative branch by an absolute branch means
5208 we need to put the branch target address into the literal
5209 pool, possibly causing it to overflow.
5211 So, we loop trying to fix up both problems until we manage
5212 to satisfy both conditions at the same time. Note that the
5213 loop is guaranteed to terminate as every pass of the loop
5214 strictly decreases the total number of PC-relative branches
5215 in the function. (This is not completely true as there
5216 might be branch-over-pool insns introduced by chunkify_start.
5217 Those never need to be split however.) */
5221 struct constant_pool *pool = NULL;
5223 /* Collect the literal pool. */
5226 pool = s390_mainpool_start ();
5228 pool_overflow = true;
5231 /* If literal pool overflowed, start to chunkify it. */
5233 pool = s390_chunkify_start (base_reg);
5235 /* Split out-of-range branches. If this has created new
5236 literal pool entries, cancel current chunk list and
5238 if (s390_split_branches (temp_reg, &temp_used))
5241 s390_chunkify_cancel (pool);
5243 s390_mainpool_cancel (pool);
5248 /* If we made it up to here, both conditions are satisfied.
5249 Finish up literal pool related changes. */
5250 if ((pool_overflow || pool->size > 0)
5251 && REGNO (base_reg) == BASE_REGISTER)
5255 s390_chunkify_finish (pool, base_reg);
5257 s390_mainpool_finish (pool, base_reg);
5262 s390_optimize_prolog (base_used, temp_used);
5266 /* Return an RTL expression representing the value of the return address
5267 for the frame COUNT steps up from the current frame. FRAME is the
5268 frame pointer of that frame. */
5271 s390_return_addr_rtx (int count, rtx frame)
5275 /* For the current frame, we need to make sure the initial
5276 value of RETURN_REGNUM is actually saved. */
5279 cfun->machine->save_return_addr_p = true;
5281 /* To retrieve the return address we read the stack slot where the
5282 corresponding RETURN_REGNUM value was saved. */
5284 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5285 addr = memory_address (Pmode, addr);
5286 return gen_rtx_MEM (Pmode, addr);
5289 /* Find first call clobbered register unsused in a function.
5290 This could be used as base register in a leaf function
5291 or for holding the return address before epilogue. */
5294 find_unused_clobbered_reg (void)
5297 for (i = 0; i < 6; i++)
5298 if (!regs_ever_live[i])
5303 /* Fill FRAME with info about frame of current function. */
5306 s390_frame_info (void)
5308 char gprs_ever_live[16];
5310 HOST_WIDE_INT fsize = get_frame_size ();
5312 if (fsize > 0x7fff0000)
5313 fatal_error ("Total size of local variables exceeds architecture limit.");
5315 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5316 cfun->machine->save_fprs_p = 0;
5318 for (i = 24; i < 32; i++)
5319 if (regs_ever_live[i] && !global_regs[i])
5321 cfun->machine->save_fprs_p = 1;
5325 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5327 /* Does function need to setup frame and save area. */
5329 if (! current_function_is_leaf
5330 || cfun->machine->frame_size > 0
5331 || current_function_calls_alloca
5332 || current_function_stdarg)
5333 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5335 /* Find first and last gpr to be saved. Note that at this point,
5336 we assume the return register and the base register always
5337 need to be saved. This is done because the usage of these
5338 register might change even after the prolog was emitted.
5339 If it turns out later that we really don't need them, the
5340 prolog/epilog code is modified again. */
5342 for (i = 0; i < 16; i++)
5343 gprs_ever_live[i] = regs_ever_live[i] && !global_regs[i];
5346 gprs_ever_live[PIC_OFFSET_TABLE_REGNUM] =
5347 regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
5348 gprs_ever_live[BASE_REGISTER] = 1;
5349 gprs_ever_live[RETURN_REGNUM] = 1;
5350 gprs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5352 for (i = 6; i < 16; i++)
5353 if (gprs_ever_live[i])
5356 for (j = 15; j > i; j--)
5357 if (gprs_ever_live[j])
5361 /* Save / Restore from gpr i to j. */
5362 cfun->machine->first_save_gpr = i;
5363 cfun->machine->first_restore_gpr = i;
5364 cfun->machine->last_save_gpr = j;
5366 /* Varargs functions need to save gprs 2 to 6. */
5367 if (current_function_stdarg)
5368 cfun->machine->first_save_gpr = 2;
5371 /* Return offset between argument pointer and frame pointer
5372 initially after prologue. */
5375 s390_arg_frame_offset (void)
5377 HOST_WIDE_INT fsize = get_frame_size ();
5380 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5383 for (i = 24; i < 32; i++)
5384 if (regs_ever_live[i] && !global_regs[i])
5390 fsize = fsize + save_fprs_p * 64;
5392 /* Does function need to setup frame and save area. */
5394 if (! current_function_is_leaf
5396 || current_function_calls_alloca
5397 || current_function_stdarg)
5398 fsize += STARTING_FRAME_OFFSET;
5399 return fsize + STACK_POINTER_OFFSET;
5402 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5403 to register BASE. Return generated insn. */
5406 save_fpr (rtx base, int offset, int regnum)
5409 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5410 set_mem_alias_set (addr, s390_sr_alias_set);
5412 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5415 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5416 to register BASE. Return generated insn. */
5419 restore_fpr (rtx base, int offset, int regnum)
5422 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5423 set_mem_alias_set (addr, s390_sr_alias_set);
5425 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5428 /* Generate insn to save registers FIRST to LAST into
5429 the register save area located at offset OFFSET
5430 relative to register BASE. */
5433 save_gprs (rtx base, int offset, int first, int last)
5435 rtx addr, insn, note;
5438 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5439 addr = gen_rtx_MEM (Pmode, addr);
5440 set_mem_alias_set (addr, s390_sr_alias_set);
5442 /* Special-case single register. */
5446 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5448 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5450 RTX_FRAME_RELATED_P (insn) = 1;
5455 insn = gen_store_multiple (addr,
5456 gen_rtx_REG (Pmode, first),
5457 GEN_INT (last - first + 1));
5460 /* We need to set the FRAME_RELATED flag on all SETs
5461 inside the store-multiple pattern.
5463 However, we must not emit DWARF records for registers 2..5
5464 if they are stored for use by variable arguments ...
5466 ??? Unfortunately, it is not enough to simply not the the
5467 FRAME_RELATED flags for those SETs, because the first SET
5468 of the PARALLEL is always treated as if it had the flag
5469 set, even if it does not. Therefore we emit a new pattern
5470 without those registers as REG_FRAME_RELATED_EXPR note. */
5474 rtx pat = PATTERN (insn);
5476 for (i = 0; i < XVECLEN (pat, 0); i++)
5477 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5478 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5480 RTX_FRAME_RELATED_P (insn) = 1;
5484 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5485 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5486 gen_rtx_REG (Pmode, 6),
5487 GEN_INT (last - 6 + 1));
5488 note = PATTERN (note);
5491 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5492 note, REG_NOTES (insn));
5494 for (i = 0; i < XVECLEN (note, 0); i++)
5495 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5496 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5498 RTX_FRAME_RELATED_P (insn) = 1;
5504 /* Generate insn to restore registers FIRST to LAST from
5505 the register save area located at offset OFFSET
5506 relative to register BASE. */
5509 restore_gprs (rtx base, int offset, int first, int last)
5513 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5514 addr = gen_rtx_MEM (Pmode, addr);
5515 set_mem_alias_set (addr, s390_sr_alias_set);
5517 /* Special-case single register. */
5521 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5523 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5528 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5530 GEN_INT (last - first + 1));
5534 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5535 annotate generated insns with REG_MAYBE_DEAD notes. */
5537 static GTY(()) rtx got_symbol;
5539 s390_load_got (int maybe_dead)
5543 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5544 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5547 if (TARGET_CPU_ZARCH)
5549 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5551 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5558 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5559 UNSPEC_LTREL_OFFSET);
5560 offset = gen_rtx_CONST (Pmode, offset);
5561 offset = force_const_mem (Pmode, offset);
5563 insn = emit_move_insn (pic_offset_table_rtx, offset);
5565 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5568 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5570 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5572 insn = emit_move_insn (pic_offset_table_rtx, offset);
5574 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5579 /* Expand the prologue into a bunch of separate insns. */
5582 s390_emit_prologue (void)
5588 /* Compute frame_info. */
5592 /* Choose best register to use for temp use within prologue.
5593 See below for why TPF must use the register 1. */
5595 if (!current_function_is_leaf
5597 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5599 temp_reg = gen_rtx_REG (Pmode, 1);
5601 /* Save call saved gprs. */
5603 insn = save_gprs (stack_pointer_rtx, 0,
5604 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5607 /* Dummy insn to mark literal pool slot. */
5609 emit_insn (gen_main_pool ());
5611 /* Save fprs for variable args. */
5613 if (current_function_stdarg)
5614 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5615 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5617 /* Save fprs 4 and 6 if used (31 bit ABI). */
5620 for (i = 18; i < 20; i++)
5621 if (regs_ever_live[i] && !global_regs[i])
5623 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5624 RTX_FRAME_RELATED_P (insn) = 1;
5627 /* Decrement stack pointer. */
5629 if (cfun->machine->frame_size > 0)
5631 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5633 /* Save incoming stack pointer into temp reg. */
5635 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5637 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5640 /* Subtract frame size from stack pointer. */
5642 if (DISP_IN_RANGE (INTVAL (frame_off)))
5644 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5645 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5647 insn = emit_insn (insn);
5651 if (!CONST_OK_FOR_LETTER_P (INTVAL (frame_off), 'K'))
5652 frame_off = force_const_mem (Pmode, frame_off);
5654 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5657 RTX_FRAME_RELATED_P (insn) = 1;
5659 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5660 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5661 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5662 GEN_INT (-cfun->machine->frame_size))),
5665 /* Set backchain. */
5667 if (TARGET_BACKCHAIN)
5669 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5670 set_mem_alias_set (addr, s390_sr_alias_set);
5671 insn = emit_insn (gen_move_insn (addr, temp_reg));
5674 /* If we support asynchronous exceptions (e.g. for Java),
5675 we need to make sure the backchain pointer is set up
5676 before any possibly trapping memory access. */
5678 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5680 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5681 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5685 /* Save fprs 8 - 15 (64 bit ABI). */
5687 if (cfun->machine->save_fprs_p)
5689 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5691 for (i = 24; i < 32; i++)
5692 if (regs_ever_live[i] && !global_regs[i])
5694 rtx addr = plus_constant (stack_pointer_rtx,
5695 cfun->machine->frame_size - 64 + (i-24)*8);
5697 insn = save_fpr (temp_reg, (i-24)*8, i);
5698 RTX_FRAME_RELATED_P (insn) = 1;
5700 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5701 gen_rtx_SET (VOIDmode,
5702 gen_rtx_MEM (DFmode, addr),
5703 gen_rtx_REG (DFmode, i)),
5708 /* Set frame pointer, if needed. */
5710 if (frame_pointer_needed)
5712 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5713 RTX_FRAME_RELATED_P (insn) = 1;
5716 /* Set up got pointer, if needed. */
5718 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5719 s390_load_got(true);
5723 /* Generate a BAS instruction to serve as a function
5724 entry intercept to facilitate the use of tracing
5725 algorithms located at the branch target.
5727 This must use register 1. */
5732 addr = GEN_INT (0xfe0);
5733 unkn = CONST0_RTX (SImode);
5734 link = gen_rtx_REG (Pmode, 1);
5736 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5738 /* Emit a blockage here so that all code
5739 lies between the profiling mechanisms. */
5740 emit_insn (gen_blockage ());
5744 /* Expand the epilogue into a bunch of separate insns. */
5747 s390_emit_epilogue (void)
5749 rtx frame_pointer, return_reg;
5750 int area_bottom, area_top, offset = 0;
5757 /* Generate a BAS instruction to serve as a function
5758 entry intercept to facilitate the use of tracing
5759 algorithms located at the branch target.
5761 This must use register 1. */
5767 addr = GEN_INT (0xfe6);
5768 unkn = CONST0_RTX (SImode);
5769 link = gen_rtx_REG (Pmode, 1);
5771 /* Emit a blockage here so that all code
5772 lies between the profiling mechanisms. */
5773 emit_insn (gen_blockage ());
5775 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5778 /* Check whether to use frame or stack pointer for restore. */
5780 frame_pointer = frame_pointer_needed ?
5781 hard_frame_pointer_rtx : stack_pointer_rtx;
5783 /* Compute which parts of the save area we need to access. */
5785 if (cfun->machine->first_restore_gpr != -1)
5787 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5788 area_top = (cfun->machine->last_save_gpr + 1) * UNITS_PER_WORD;
5792 area_bottom = INT_MAX;
5798 if (cfun->machine->save_fprs_p)
5800 if (area_bottom > -64)
5808 for (i = 18; i < 20; i++)
5809 if (regs_ever_live[i] && !global_regs[i])
5811 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5812 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5813 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5814 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5818 /* Check whether we can access the register save area.
5819 If not, increment the frame pointer as required. */
5821 if (area_top <= area_bottom)
5823 /* Nothing to restore. */
5825 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5826 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5828 /* Area is in range. */
5829 offset = cfun->machine->frame_size;
5833 rtx insn, frame_off;
5835 offset = area_bottom < 0 ? -area_bottom : 0;
5836 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5838 if (DISP_IN_RANGE (INTVAL (frame_off)))
5840 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5841 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5842 insn = emit_insn (insn);
5846 if (!CONST_OK_FOR_LETTER_P (INTVAL (frame_off), 'K'))
5847 frame_off = force_const_mem (Pmode, frame_off);
5849 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5853 /* Restore call saved fprs. */
5857 if (cfun->machine->save_fprs_p)
5858 for (i = 24; i < 32; i++)
5859 if (regs_ever_live[i] && !global_regs[i])
5860 restore_fpr (frame_pointer,
5861 offset - 64 + (i-24) * 8, i);
5865 for (i = 18; i < 20; i++)
5866 if (regs_ever_live[i] && !global_regs[i])
5867 restore_fpr (frame_pointer,
5868 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5871 /* Return register. */
5873 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5875 /* Restore call saved gprs. */
5877 if (cfun->machine->first_restore_gpr != -1)
5882 /* Check for global register and save them
5883 to stack location from where they get restored. */
5885 for (i = cfun->machine->first_restore_gpr;
5886 i <= cfun->machine->last_save_gpr;
5889 /* These registers are special and need to be
5890 restored in any case. */
5891 if (i == STACK_POINTER_REGNUM
5892 || i == RETURN_REGNUM
5893 || i == BASE_REGISTER
5894 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5899 addr = plus_constant (frame_pointer,
5900 offset + i * UNITS_PER_WORD);
5901 addr = gen_rtx_MEM (Pmode, addr);
5902 set_mem_alias_set (addr, s390_sr_alias_set);
5903 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
5907 /* Fetch return address from stack before load multiple,
5908 this will do good for scheduling. */
5910 if (!current_function_is_leaf)
5912 int return_regnum = find_unused_clobbered_reg();
5915 return_reg = gen_rtx_REG (Pmode, return_regnum);
5917 addr = plus_constant (frame_pointer,
5918 offset + RETURN_REGNUM * UNITS_PER_WORD);
5919 addr = gen_rtx_MEM (Pmode, addr);
5920 set_mem_alias_set (addr, s390_sr_alias_set);
5921 emit_move_insn (return_reg, addr);
5924 /* ??? As references to the base register are not made
5925 explicit in insn RTX code, we have to add a barrier here
5926 to prevent incorrect scheduling. */
5928 emit_insn (gen_blockage());
5930 insn = restore_gprs (frame_pointer, offset,
5931 cfun->machine->first_restore_gpr,
5932 cfun->machine->last_save_gpr);
5936 /* Return to caller. */
5938 p = rtvec_alloc (2);
5940 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
5941 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
5942 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
5946 /* Return the size in bytes of a function argument of
5947 type TYPE and/or mode MODE. At least one of TYPE or
5948 MODE must be specified. */
5951 s390_function_arg_size (enum machine_mode mode, tree type)
5954 return int_size_in_bytes (type);
5956 /* No type info available for some library calls ... */
5957 if (mode != BLKmode)
5958 return GET_MODE_SIZE (mode);
5960 /* If we have neither type nor mode, abort */
5964 /* Return true if a function argument of type TYPE and mode MODE
5965 is to be passed in a floating-point register, if available. */
5968 s390_function_arg_float (enum machine_mode mode, tree type)
5970 /* Soft-float changes the ABI: no floating-point registers are used. */
5971 if (TARGET_SOFT_FLOAT)
5974 /* No type info available for some library calls ... */
5976 return mode == SFmode || mode == DFmode;
5978 /* The ABI says that record types with a single member are treated
5979 just like that member would be. */
5980 while (TREE_CODE (type) == RECORD_TYPE)
5982 tree field, single = NULL_TREE;
5984 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
5986 if (TREE_CODE (field) != FIELD_DECL)
5989 if (single == NULL_TREE)
5990 single = TREE_TYPE (field);
5995 if (single == NULL_TREE)
6001 return TREE_CODE (type) == REAL_TYPE;
6004 /* Return 1 if a function argument of type TYPE and mode MODE
6005 is to be passed by reference. The ABI specifies that only
6006 structures of size 1, 2, 4, or 8 bytes are passed by value,
6007 all other structures (and complex numbers) are passed by
6011 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
6013 int size = s390_function_arg_size (mode, type);
6017 if (AGGREGATE_TYPE_P (type) &&
6018 size != 1 && size != 2 && size != 4 && size != 8
6019 && !s390_function_arg_float (mode, type))
6022 if (TREE_CODE (type) == COMPLEX_TYPE)
6029 /* Update the data in CUM to advance over an argument of mode MODE and
6030 data type TYPE. (TYPE is null for libcalls where that information
6031 may not be available.). The boolean NAMED specifies whether the
6032 argument is a named argument (as opposed to an unnamed argument
6033 matching an ellipsis). */
6036 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6037 tree type, int named ATTRIBUTE_UNUSED)
6039 if (s390_function_arg_pass_by_reference (mode, type))
6043 else if (s390_function_arg_float (mode, type))
6049 int size = s390_function_arg_size (mode, type);
6050 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6054 /* Define where to put the arguments to a function.
6055 Value is zero to push the argument on the stack,
6056 or a hard register in which to store the argument.
6058 MODE is the argument's machine mode.
6059 TYPE is the data type of the argument (as a tree).
6060 This is null for libcalls where that information may
6062 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6063 the preceding args and about the function being called.
6064 NAMED is nonzero if this argument is a named parameter
6065 (otherwise it is an extra parameter matching an ellipsis).
6067 On S/390, we use general purpose registers 2 through 6 to
6068 pass integer, pointer, and certain structure arguments, and
6069 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6070 to pass floating point arguments. All remaining arguments
6071 are pushed to the stack. */
6074 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6075 int named ATTRIBUTE_UNUSED)
6077 if (s390_function_arg_pass_by_reference (mode, type))
6080 if (s390_function_arg_float (mode, type))
6082 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6085 return gen_rtx (REG, mode, cum->fprs + 16);
6089 int size = s390_function_arg_size (mode, type);
6090 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6092 if (cum->gprs + n_gprs > 5)
6095 return gen_rtx (REG, mode, cum->gprs + 2);
6100 /* Create and return the va_list datatype.
6102 On S/390, va_list is an array type equivalent to
6104 typedef struct __va_list_tag
6108 void *__overflow_arg_area;
6109 void *__reg_save_area;
6113 where __gpr and __fpr hold the number of general purpose
6114 or floating point arguments used up to now, respectively,
6115 __overflow_arg_area points to the stack location of the
6116 next argument passed on the stack, and __reg_save_area
6117 always points to the start of the register area in the
6118 call frame of the current function. The function prologue
6119 saves all registers used for argument passing into this
6120 area if the function uses variable arguments. */
6123 s390_build_va_list (void)
6125 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6127 record = lang_hooks.types.make_type (RECORD_TYPE);
6130 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6132 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6133 long_integer_type_node);
6134 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6135 long_integer_type_node);
6136 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6138 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6141 DECL_FIELD_CONTEXT (f_gpr) = record;
6142 DECL_FIELD_CONTEXT (f_fpr) = record;
6143 DECL_FIELD_CONTEXT (f_ovf) = record;
6144 DECL_FIELD_CONTEXT (f_sav) = record;
6146 TREE_CHAIN (record) = type_decl;
6147 TYPE_NAME (record) = type_decl;
6148 TYPE_FIELDS (record) = f_gpr;
6149 TREE_CHAIN (f_gpr) = f_fpr;
6150 TREE_CHAIN (f_fpr) = f_ovf;
6151 TREE_CHAIN (f_ovf) = f_sav;
6153 layout_type (record);
6155 /* The correct type is an array type of one element. */
6156 return build_array_type (record, build_index_type (size_zero_node));
6159 /* Implement va_start by filling the va_list structure VALIST.
6160 STDARG_P is always true, and ignored.
6161 NEXTARG points to the first anonymous stack argument.
6163 The following global variables are used to initialize
6164 the va_list structure:
6166 current_function_args_info:
6167 holds number of gprs and fprs used for named arguments.
6168 current_function_arg_offset_rtx:
6169 holds the offset of the first anonymous stack argument
6170 (relative to the virtual arg pointer). */
6173 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6175 HOST_WIDE_INT n_gpr, n_fpr;
6177 tree f_gpr, f_fpr, f_ovf, f_sav;
6178 tree gpr, fpr, ovf, sav, t;
6180 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6181 f_fpr = TREE_CHAIN (f_gpr);
6182 f_ovf = TREE_CHAIN (f_fpr);
6183 f_sav = TREE_CHAIN (f_ovf);
6185 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6186 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6187 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6188 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6189 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6191 /* Count number of gp and fp argument registers used. */
6193 n_gpr = current_function_args_info.gprs;
6194 n_fpr = current_function_args_info.fprs;
6196 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6197 TREE_SIDE_EFFECTS (t) = 1;
6198 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6200 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6201 TREE_SIDE_EFFECTS (t) = 1;
6202 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6204 /* Find the overflow area. */
6205 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6207 off = INTVAL (current_function_arg_offset_rtx);
6208 off = off < 0 ? 0 : off;
6209 if (TARGET_DEBUG_ARG)
6210 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6211 (int)n_gpr, (int)n_fpr, off);
6213 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6215 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6216 TREE_SIDE_EFFECTS (t) = 1;
6217 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6219 /* Find the register save area. */
6220 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6221 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6222 build_int_2 (-STACK_POINTER_OFFSET, -1));
6223 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6224 TREE_SIDE_EFFECTS (t) = 1;
6225 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6228 /* Implement va_arg by updating the va_list structure
6229 VALIST as required to retrieve an argument of type
6230 TYPE, and returning that argument.
6232 Generates code equivalent to:
6234 if (integral value) {
6235 if (size <= 4 && args.gpr < 5 ||
6236 size > 4 && args.gpr < 4 )
6237 ret = args.reg_save_area[args.gpr+8]
6239 ret = *args.overflow_arg_area++;
6240 } else if (float value) {
6242 ret = args.reg_save_area[args.fpr+64]
6244 ret = *args.overflow_arg_area++;
6245 } else if (aggregate value) {
6247 ret = *args.reg_save_area[args.gpr]
6249 ret = **args.overflow_arg_area++;
6253 s390_va_arg (tree valist, tree type)
6255 tree f_gpr, f_fpr, f_ovf, f_sav;
6256 tree gpr, fpr, ovf, sav, reg, t, u;
6257 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6258 rtx lab_false, lab_over, addr_rtx, r;
6260 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6261 f_fpr = TREE_CHAIN (f_gpr);
6262 f_ovf = TREE_CHAIN (f_fpr);
6263 f_sav = TREE_CHAIN (f_ovf);
6265 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6266 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6267 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6268 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6269 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6271 size = int_size_in_bytes (type);
6273 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6275 if (TARGET_DEBUG_ARG)
6277 fprintf (stderr, "va_arg: aggregate type");
6281 /* Aggregates are passed by reference. */
6285 sav_ofs = 2 * UNITS_PER_WORD;
6286 sav_scale = UNITS_PER_WORD;
6287 size = UNITS_PER_WORD;
6290 else if (s390_function_arg_float (TYPE_MODE (type), type))
6292 if (TARGET_DEBUG_ARG)
6294 fprintf (stderr, "va_arg: float type");
6298 /* FP args go in FP registers, if present. */
6302 sav_ofs = 16 * UNITS_PER_WORD;
6304 /* TARGET_64BIT has up to 4 parameter in fprs */
6305 max_reg = TARGET_64BIT ? 3 : 1;
6309 if (TARGET_DEBUG_ARG)
6311 fprintf (stderr, "va_arg: other type");
6315 /* Otherwise into GP registers. */
6318 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6319 sav_ofs = 2 * UNITS_PER_WORD;
6321 if (size < UNITS_PER_WORD)
6322 sav_ofs += UNITS_PER_WORD - size;
6324 sav_scale = UNITS_PER_WORD;
6331 /* Pull the value out of the saved registers ... */
6333 lab_false = gen_label_rtx ();
6334 lab_over = gen_label_rtx ();
6335 addr_rtx = gen_reg_rtx (Pmode);
6337 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL),
6339 GT, const1_rtx, Pmode, 0, lab_false);
6342 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6346 u = build (MULT_EXPR, long_integer_type_node,
6347 reg, build_int_2 (sav_scale, 0));
6348 TREE_SIDE_EFFECTS (u) = 1;
6350 t = build (PLUS_EXPR, ptr_type_node, t, u);
6351 TREE_SIDE_EFFECTS (t) = 1;
6353 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6355 emit_move_insn (addr_rtx, r);
6358 emit_jump_insn (gen_jump (lab_over));
6360 emit_label (lab_false);
6362 /* ... Otherwise out of the overflow area. */
6364 t = save_expr (ovf);
6367 /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */
6368 if (size < UNITS_PER_WORD)
6370 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0));
6371 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6372 TREE_SIDE_EFFECTS (t) = 1;
6373 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6375 t = save_expr (ovf);
6378 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6380 emit_move_insn (addr_rtx, r);
6382 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6383 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6384 TREE_SIDE_EFFECTS (t) = 1;
6385 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6387 emit_label (lab_over);
6389 /* If less than max_regs a registers are retrieved out
6390 of register save area, increment. */
6392 u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6393 build_int_2 (n_reg, 0));
6394 TREE_SIDE_EFFECTS (u) = 1;
6395 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
6399 r = gen_rtx_MEM (Pmode, addr_rtx);
6400 set_mem_alias_set (r, get_varargs_alias_set ());
6401 emit_move_insn (addr_rtx, r);
6413 S390_BUILTIN_THREAD_POINTER,
6414 S390_BUILTIN_SET_THREAD_POINTER,
6419 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6424 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6430 s390_init_builtins (void)
6434 ftype = build_function_type (ptr_type_node, void_list_node);
6435 builtin_function ("__builtin_thread_pointer", ftype,
6436 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6439 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6440 builtin_function ("__builtin_set_thread_pointer", ftype,
6441 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6445 /* Expand an expression EXP that calls a built-in function,
6446 with result going to TARGET if that's convenient
6447 (and in mode MODE if that's convenient).
6448 SUBTARGET may be used as the target for computing one of EXP's operands.
6449 IGNORE is nonzero if the value is to be ignored. */
6452 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6453 enum machine_mode mode ATTRIBUTE_UNUSED,
6454 int ignore ATTRIBUTE_UNUSED)
6458 unsigned int const *code_for_builtin =
6459 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6461 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6462 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6463 tree arglist = TREE_OPERAND (exp, 1);
6464 enum insn_code icode;
6465 rtx op[MAX_ARGS], pat;
6469 if (fcode >= S390_BUILTIN_max)
6470 internal_error ("bad builtin fcode");
6471 icode = code_for_builtin[fcode];
6473 internal_error ("bad builtin fcode");
6475 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6477 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6479 arglist = TREE_CHAIN (arglist), arity++)
6481 const struct insn_operand_data *insn_op;
6483 tree arg = TREE_VALUE (arglist);
6484 if (arg == error_mark_node)
6486 if (arity > MAX_ARGS)
6489 insn_op = &insn_data[icode].operand[arity + nonvoid];
6491 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6493 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6494 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6499 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6501 || GET_MODE (target) != tmode
6502 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6503 target = gen_reg_rtx (tmode);
6509 pat = GEN_FCN (icode) (target);
6513 pat = GEN_FCN (icode) (target, op[0]);
6515 pat = GEN_FCN (icode) (op[0]);
6518 pat = GEN_FCN (icode) (target, op[0], op[1]);
6534 /* Output assembly code for the trampoline template to
6537 On S/390, we use gpr 1 internally in the trampoline code;
6538 gpr 0 is used to hold the static chain. */
6541 s390_trampoline_template (FILE *file)
6545 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6546 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6547 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6548 fprintf (file, "br\t%s\n", reg_names[1]);
6549 fprintf (file, "0:\t.quad\t0\n");
6550 fprintf (file, ".quad\t0\n");
6554 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6555 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6556 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6557 fprintf (file, "br\t%s\n", reg_names[1]);
6558 fprintf (file, ".long\t0\n");
6559 fprintf (file, ".long\t0\n");
6563 /* Emit RTL insns to initialize the variable parts of a trampoline.
6564 FNADDR is an RTX for the address of the function's pure code.
6565 CXT is an RTX for the static chain value for the function. */
6568 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6570 emit_move_insn (gen_rtx
6572 memory_address (Pmode,
6573 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6574 emit_move_insn (gen_rtx
6576 memory_address (Pmode,
6577 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6580 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6581 LOW and HIGH, independent of the host word size. */
6584 s390_gen_rtx_const_DI (int high, int low)
6586 #if HOST_BITS_PER_WIDE_INT >= 64
6588 val = (HOST_WIDE_INT)high;
6590 val |= (HOST_WIDE_INT)low;
6592 return GEN_INT (val);
6594 #if HOST_BITS_PER_WIDE_INT >= 32
6595 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6602 /* Output assembler code to FILE to increment profiler label # LABELNO
6603 for profiling a function entry. */
6606 s390_function_profiler (FILE *file, int labelno)
6611 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6613 fprintf (file, "# function profiler \n");
6615 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6616 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6617 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6619 op[2] = gen_rtx_REG (Pmode, 1);
6620 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6621 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6623 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6626 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6627 op[4] = gen_rtx_CONST (Pmode, op[4]);
6632 output_asm_insn ("stg\t%0,%1", op);
6633 output_asm_insn ("larl\t%2,%3", op);
6634 output_asm_insn ("brasl\t%0,%4", op);
6635 output_asm_insn ("lg\t%0,%1", op);
6639 op[6] = gen_label_rtx ();
6641 output_asm_insn ("st\t%0,%1", op);
6642 output_asm_insn ("bras\t%2,%l6", op);
6643 output_asm_insn (".long\t%4", op);
6644 output_asm_insn (".long\t%3", op);
6645 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6646 output_asm_insn ("l\t%0,0(%2)", op);
6647 output_asm_insn ("l\t%2,4(%2)", op);
6648 output_asm_insn ("basr\t%0,%0", op);
6649 output_asm_insn ("l\t%0,%1", op);
6653 op[5] = gen_label_rtx ();
6654 op[6] = gen_label_rtx ();
6656 output_asm_insn ("st\t%0,%1", op);
6657 output_asm_insn ("bras\t%2,%l6", op);
6658 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6659 output_asm_insn (".long\t%4-%l5", op);
6660 output_asm_insn (".long\t%3-%l5", op);
6661 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6662 output_asm_insn ("lr\t%0,%2", op);
6663 output_asm_insn ("a\t%0,0(%2)", op);
6664 output_asm_insn ("a\t%2,4(%2)", op);
6665 output_asm_insn ("basr\t%0,%0", op);
6666 output_asm_insn ("l\t%0,%1", op);
6670 /* Select section for constant in constant pool. In 32-bit mode,
6671 constants go in the function section; in 64-bit mode in .rodata. */
6674 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6675 rtx x ATTRIBUTE_UNUSED,
6676 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6678 if (TARGET_CPU_ZARCH)
6679 readonly_data_section ();
6681 function_section (current_function_decl);
6684 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6685 into its SYMBOL_REF_FLAGS. */
6688 s390_encode_section_info (tree decl, rtx rtl, int first)
6690 default_encode_section_info (decl, rtl, first);
6692 /* If a variable has a forced alignment to < 2 bytes, mark it with
6693 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6694 if (TREE_CODE (decl) == VAR_DECL
6695 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6696 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6699 /* Output thunk to FILE that implements a C++ virtual function call (with
6700 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6701 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6702 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6703 relative to the resulting this pointer. */
6706 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6707 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6713 /* Operand 0 is the target function. */
6714 op[0] = XEXP (DECL_RTL (function), 0);
6715 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6718 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6719 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6720 op[0] = gen_rtx_CONST (Pmode, op[0]);
6723 /* Operand 1 is the 'this' pointer. */
6724 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6725 op[1] = gen_rtx_REG (Pmode, 3);
6727 op[1] = gen_rtx_REG (Pmode, 2);
6729 /* Operand 2 is the delta. */
6730 op[2] = GEN_INT (delta);
6732 /* Operand 3 is the vcall_offset. */
6733 op[3] = GEN_INT (vcall_offset);
6735 /* Operand 4 is the temporary register. */
6736 op[4] = gen_rtx_REG (Pmode, 1);
6738 /* Operands 5 to 8 can be used as labels. */
6744 /* Operand 9 can be used for temporary register. */
6747 /* Generate code. */
6750 /* Setup literal pool pointer if required. */
6751 if ((!DISP_IN_RANGE (delta)
6752 && !CONST_OK_FOR_LETTER_P (delta, 'K'))
6753 || (!DISP_IN_RANGE (vcall_offset)
6754 && !CONST_OK_FOR_LETTER_P (vcall_offset, 'K')))
6756 op[5] = gen_label_rtx ();
6757 output_asm_insn ("larl\t%4,%5", op);
6760 /* Add DELTA to this pointer. */
6763 if (CONST_OK_FOR_LETTER_P (delta, 'J'))
6764 output_asm_insn ("la\t%1,%2(%1)", op);
6765 else if (DISP_IN_RANGE (delta))
6766 output_asm_insn ("lay\t%1,%2(%1)", op);
6767 else if (CONST_OK_FOR_LETTER_P (delta, 'K'))
6768 output_asm_insn ("aghi\t%1,%2", op);
6771 op[6] = gen_label_rtx ();
6772 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
6776 /* Perform vcall adjustment. */
6779 if (DISP_IN_RANGE (vcall_offset))
6781 output_asm_insn ("lg\t%4,0(%1)", op);
6782 output_asm_insn ("ag\t%1,%3(%4)", op);
6784 else if (CONST_OK_FOR_LETTER_P (vcall_offset, 'K'))
6786 output_asm_insn ("lghi\t%4,%3", op);
6787 output_asm_insn ("ag\t%4,0(%1)", op);
6788 output_asm_insn ("ag\t%1,0(%4)", op);
6792 op[7] = gen_label_rtx ();
6793 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
6794 output_asm_insn ("ag\t%4,0(%1)", op);
6795 output_asm_insn ("ag\t%1,0(%4)", op);
6799 /* Jump to target. */
6800 output_asm_insn ("jg\t%0", op);
6802 /* Output literal pool if required. */
6805 output_asm_insn (".align\t4", op);
6806 targetm.asm_out.internal_label (file, "L",
6807 CODE_LABEL_NUMBER (op[5]));
6811 targetm.asm_out.internal_label (file, "L",
6812 CODE_LABEL_NUMBER (op[6]));
6813 output_asm_insn (".long\t%2", op);
6817 targetm.asm_out.internal_label (file, "L",
6818 CODE_LABEL_NUMBER (op[7]));
6819 output_asm_insn (".long\t%3", op);
6824 /* Setup base pointer if required. */
6826 || (!DISP_IN_RANGE (delta)
6827 && !CONST_OK_FOR_LETTER_P (delta, 'K'))
6828 || (!DISP_IN_RANGE (delta)
6829 && !CONST_OK_FOR_LETTER_P (vcall_offset, 'K')))
6831 op[5] = gen_label_rtx ();
6832 output_asm_insn ("basr\t%4,0", op);
6833 targetm.asm_out.internal_label (file, "L",
6834 CODE_LABEL_NUMBER (op[5]));
6837 /* Add DELTA to this pointer. */
6840 if (CONST_OK_FOR_LETTER_P (delta, 'J'))
6841 output_asm_insn ("la\t%1,%2(%1)", op);
6842 else if (DISP_IN_RANGE (delta))
6843 output_asm_insn ("lay\t%1,%2(%1)", op);
6844 else if (CONST_OK_FOR_LETTER_P (delta, 'K'))
6845 output_asm_insn ("ahi\t%1,%2", op);
6848 op[6] = gen_label_rtx ();
6849 output_asm_insn ("a\t%1,%6-%5(%4)", op);
6853 /* Perform vcall adjustment. */
6856 if (CONST_OK_FOR_LETTER_P (vcall_offset, 'J'))
6858 output_asm_insn ("lg\t%4,0(%1)", op);
6859 output_asm_insn ("a\t%1,%3(%4)", op);
6861 else if (DISP_IN_RANGE (vcall_offset))
6863 output_asm_insn ("lg\t%4,0(%1)", op);
6864 output_asm_insn ("ay\t%1,%3(%4)", op);
6866 else if (CONST_OK_FOR_LETTER_P (vcall_offset, 'K'))
6868 output_asm_insn ("lhi\t%4,%3", op);
6869 output_asm_insn ("a\t%4,0(%1)", op);
6870 output_asm_insn ("a\t%1,0(%4)", op);
6874 op[7] = gen_label_rtx ();
6875 output_asm_insn ("l\t%4,%7-%5(%4)", op);
6876 output_asm_insn ("a\t%4,0(%1)", op);
6877 output_asm_insn ("a\t%1,0(%4)", op);
6880 /* We had to clobber the base pointer register.
6881 Re-setup the base pointer (with a different base). */
6882 op[5] = gen_label_rtx ();
6883 output_asm_insn ("basr\t%4,0", op);
6884 targetm.asm_out.internal_label (file, "L",
6885 CODE_LABEL_NUMBER (op[5]));
6888 /* Jump to target. */
6889 op[8] = gen_label_rtx ();
6892 output_asm_insn ("l\t%4,%8-%5(%4)", op);
6894 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6895 /* We cannot call through .plt, since .plt requires %r12 loaded. */
6896 else if (flag_pic == 1)
6898 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6899 output_asm_insn ("l\t%4,%0(%4)", op);
6901 else if (flag_pic == 2)
6903 op[9] = gen_rtx_REG (Pmode, 0);
6904 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
6905 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6906 output_asm_insn ("ar\t%4,%9", op);
6907 output_asm_insn ("l\t%4,0(%4)", op);
6910 output_asm_insn ("br\t%4", op);
6912 /* Output literal pool. */
6913 output_asm_insn (".align\t4", op);
6915 if (nonlocal && flag_pic == 2)
6916 output_asm_insn (".long\t%0", op);
6919 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
6920 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
6923 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
6925 output_asm_insn (".long\t%0", op);
6927 output_asm_insn (".long\t%0-%5", op);
6931 targetm.asm_out.internal_label (file, "L",
6932 CODE_LABEL_NUMBER (op[6]));
6933 output_asm_insn (".long\t%2", op);
6937 targetm.asm_out.internal_label (file, "L",
6938 CODE_LABEL_NUMBER (op[7]));
6939 output_asm_insn (".long\t%3", op);
6945 s390_valid_pointer_mode (enum machine_mode mode)
6947 return (mode == SImode || (TARGET_64BIT && mode == DImode));
6950 /* How to allocate a 'struct machine_function'. */
6952 static struct machine_function *
6953 s390_init_machine_status (void)
6955 return ggc_alloc_cleared (sizeof (struct machine_function));
6958 #include "gt-s390.h"