1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
54 /* Machine-specific symbol_ref flags. */
55 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
58 static bool s390_assemble_integer (rtx, unsigned int, int);
59 static void s390_select_rtx_section (enum machine_mode, rtx,
60 unsigned HOST_WIDE_INT);
61 static void s390_encode_section_info (tree, rtx, int);
62 static bool s390_cannot_force_const_mem (rtx);
63 static rtx s390_delegitimize_address (rtx);
64 static bool s390_return_in_memory (tree, tree);
65 static void s390_init_builtins (void);
66 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
67 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
69 static enum attr_type s390_safe_attr_type (rtx);
71 static int s390_adjust_cost (rtx, rtx, rtx, int);
72 static int s390_adjust_priority (rtx, int);
73 static int s390_issue_rate (void);
74 static int s390_use_dfa_pipeline_interface (void);
75 static int s390_first_cycle_multipass_dfa_lookahead (void);
76 static bool s390_rtx_costs (rtx, int, int, int *);
77 static int s390_address_cost (rtx);
78 static void s390_reorg (void);
79 static bool s390_valid_pointer_mode (enum machine_mode);
80 static tree s390_build_builtin_va_list (void);
81 static bool s390_function_ok_for_sibcall (tree, tree);
82 static bool s390_call_saved_register_used (tree);
84 #undef TARGET_ASM_ALIGNED_HI_OP
85 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
86 #undef TARGET_ASM_ALIGNED_DI_OP
87 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
88 #undef TARGET_ASM_INTEGER
89 #define TARGET_ASM_INTEGER s390_assemble_integer
91 #undef TARGET_ASM_OPEN_PAREN
92 #define TARGET_ASM_OPEN_PAREN ""
94 #undef TARGET_ASM_CLOSE_PAREN
95 #define TARGET_ASM_CLOSE_PAREN ""
97 #undef TARGET_ASM_SELECT_RTX_SECTION
98 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
100 #undef TARGET_ENCODE_SECTION_INFO
101 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
104 #undef TARGET_HAVE_TLS
105 #define TARGET_HAVE_TLS true
107 #undef TARGET_CANNOT_FORCE_CONST_MEM
108 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
110 #undef TARGET_DELEGITIMIZE_ADDRESS
111 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
113 #undef TARGET_RETURN_IN_MEMORY
114 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
116 #undef TARGET_INIT_BUILTINS
117 #define TARGET_INIT_BUILTINS s390_init_builtins
118 #undef TARGET_EXPAND_BUILTIN
119 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
121 #undef TARGET_ASM_OUTPUT_MI_THUNK
122 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
123 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
124 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
126 #undef TARGET_SCHED_ADJUST_COST
127 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
128 #undef TARGET_SCHED_ADJUST_PRIORITY
129 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
130 #undef TARGET_SCHED_ISSUE_RATE
131 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
132 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
133 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
134 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
135 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
137 #undef TARGET_RTX_COSTS
138 #define TARGET_RTX_COSTS s390_rtx_costs
139 #undef TARGET_ADDRESS_COST
140 #define TARGET_ADDRESS_COST s390_address_cost
142 #undef TARGET_MACHINE_DEPENDENT_REORG
143 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
145 #undef TARGET_VALID_POINTER_MODE
146 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
148 #undef TARGET_BUILD_BUILTIN_VA_LIST
149 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
151 #undef TARGET_PROMOTE_FUNCTION_ARGS
152 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
153 #undef TARGET_PROMOTE_FUNCTION_RETURN
154 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
156 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
157 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
159 struct gcc_target targetm = TARGET_INITIALIZER;
161 extern int reload_completed;
163 /* The alias set for prologue/epilogue register save/restore. */
164 static int s390_sr_alias_set = 0;
166 /* Save information from a "cmpxx" operation until the branch or scc is
168 rtx s390_compare_op0, s390_compare_op1;
170 /* Structure used to hold the components of a S/390 memory
171 address. A legitimate address on S/390 is of the general
173 base + index + displacement
174 where any of the components is optional.
176 base and index are registers of the class ADDR_REGS,
177 displacement is an unsigned 12-bit immediate constant. */
187 /* Which cpu are we tuning for. */
188 enum processor_type s390_tune;
189 enum processor_flags s390_tune_flags;
190 /* Which instruction set architecture to use. */
191 enum processor_type s390_arch;
192 enum processor_flags s390_arch_flags;
194 /* Strings to hold which cpu and instruction set architecture to use. */
195 const char *s390_tune_string; /* for -mtune=<xxx> */
196 const char *s390_arch_string; /* for -march=<xxx> */
198 /* Define the structure for the machine field in struct function. */
200 struct machine_function GTY(())
202 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
205 /* Set if return address needs to be saved. */
206 bool save_return_addr_p;
208 /* Number of first and last gpr to be saved, restored. */
210 int first_restore_gpr;
213 /* Size of stack frame. */
214 HOST_WIDE_INT frame_size;
216 /* Some local-dynamic TLS symbol name. */
217 const char *some_ld_name;
220 static int s390_match_ccmode_set (rtx, enum machine_mode);
221 static int s390_branch_condition_mask (rtx);
222 static const char *s390_branch_condition_mnemonic (rtx, int);
223 static int check_mode (rtx, enum machine_mode *);
224 static int general_s_operand (rtx, enum machine_mode, int);
225 static int s390_short_displacement (rtx);
226 static int s390_decompose_address (rtx, struct s390_address *);
227 static rtx get_thread_pointer (void);
228 static rtx legitimize_tls_address (rtx, rtx);
229 static void print_shift_count_operand (FILE *, rtx);
230 static const char *get_some_local_dynamic_name (void);
231 static int get_some_local_dynamic_name_1 (rtx *, void *);
232 static int reg_used_in_mem_p (int, rtx);
233 static int addr_generation_dependency_p (rtx, rtx);
234 static int s390_split_branches (void);
235 static void find_constant_pool_ref (rtx, rtx *);
236 static void replace_constant_pool_ref (rtx *, rtx, rtx);
237 static rtx find_ltrel_base (rtx);
238 static void replace_ltrel_base (rtx *, rtx);
239 static void s390_optimize_prolog (bool);
240 static int find_unused_clobbered_reg (void);
241 static void s390_frame_info (void);
242 static rtx save_fpr (rtx, int, int);
243 static rtx restore_fpr (rtx, int, int);
244 static rtx save_gprs (rtx, int, int, int);
245 static rtx restore_gprs (rtx, int, int, int);
246 static int s390_function_arg_size (enum machine_mode, tree);
247 static bool s390_function_arg_float (enum machine_mode, tree);
248 static struct machine_function * s390_init_machine_status (void);
250 /* Check whether integer displacement is in range. */
251 #define DISP_IN_RANGE(d) \
252 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
253 : ((d) >= 0 && (d) <= 4095))
255 /* Return true if SET either doesn't set the CC register, or else
256 the source and destination have matching CC modes and that
257 CC mode is at least as constrained as REQ_MODE. */
260 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
262 enum machine_mode set_mode;
264 if (GET_CODE (set) != SET)
267 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
270 set_mode = GET_MODE (SET_DEST (set));
283 if (req_mode != set_mode)
288 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
289 && req_mode != CCSRmode && req_mode != CCURmode)
295 if (req_mode != CCAmode)
303 return (GET_MODE (SET_SRC (set)) == set_mode);
306 /* Return true if every SET in INSN that sets the CC register
307 has source and destination with matching CC modes and that
308 CC mode is at least as constrained as REQ_MODE.
309 If REQ_MODE is VOIDmode, always return false. */
312 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
316 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
317 if (req_mode == VOIDmode)
320 if (GET_CODE (PATTERN (insn)) == SET)
321 return s390_match_ccmode_set (PATTERN (insn), req_mode);
323 if (GET_CODE (PATTERN (insn)) == PARALLEL)
324 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
326 rtx set = XVECEXP (PATTERN (insn), 0, i);
327 if (GET_CODE (set) == SET)
328 if (!s390_match_ccmode_set (set, req_mode))
335 /* If a test-under-mask instruction can be used to implement
336 (compare (and ... OP1) OP2), return the CC mode required
337 to do that. Otherwise, return VOIDmode.
338 MIXED is true if the instruction can distinguish between
339 CC1 and CC2 for mixed selected bits (TMxx), it is false
340 if the instruction cannot (TM). */
343 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
347 /* ??? Fixme: should work on CONST_DOUBLE as well. */
348 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
351 /* Selected bits all zero: CC0. */
352 if (INTVAL (op2) == 0)
355 /* Selected bits all one: CC3. */
356 if (INTVAL (op2) == INTVAL (op1))
359 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
362 bit1 = exact_log2 (INTVAL (op2));
363 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
364 if (bit0 != -1 && bit1 != -1)
365 return bit0 > bit1 ? CCT1mode : CCT2mode;
371 /* Given a comparison code OP (EQ, NE, etc.) and the operands
372 OP0 and OP1 of a COMPARE, return the mode to be used for the
376 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
382 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
383 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
385 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
386 || GET_CODE (op1) == NEG)
387 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
390 if (GET_CODE (op0) == AND)
392 /* Check whether we can potentially do it via TM. */
393 enum machine_mode ccmode;
394 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
395 if (ccmode != VOIDmode)
397 /* Relax CCTmode to CCZmode to allow fall-back to AND
398 if that turns out to be beneficial. */
399 return ccmode == CCTmode ? CCZmode : ccmode;
403 if (register_operand (op0, HImode)
404 && GET_CODE (op1) == CONST_INT
405 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
407 if (register_operand (op0, QImode)
408 && GET_CODE (op1) == CONST_INT
409 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
418 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
419 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
421 if (INTVAL (XEXP((op0), 1)) < 0)
434 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
435 && GET_CODE (op1) != CONST_INT)
441 if (GET_CODE (op0) == PLUS
442 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
445 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
446 && GET_CODE (op1) != CONST_INT)
452 if (GET_CODE (op0) == MINUS
453 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
456 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
457 && GET_CODE (op1) != CONST_INT)
466 /* Return nonzero if OP is a valid comparison operator
467 for an ALC condition in mode MODE. */
470 s390_alc_comparison (rtx op, enum machine_mode mode)
472 if (mode != VOIDmode && mode != GET_MODE (op))
475 if (!COMPARISON_P (op))
478 if (GET_CODE (XEXP (op, 0)) != REG
479 || REGNO (XEXP (op, 0)) != CC_REGNUM
480 || XEXP (op, 1) != const0_rtx)
483 switch (GET_MODE (XEXP (op, 0)))
486 return GET_CODE (op) == LTU;
489 return GET_CODE (op) == LEU;
492 return GET_CODE (op) == GTU;
495 return GET_CODE (op) == LTU;
498 return GET_CODE (op) == UNGT;
501 return GET_CODE (op) == UNLT;
508 /* Return nonzero if OP is a valid comparison operator
509 for an SLB condition in mode MODE. */
512 s390_slb_comparison (rtx op, enum machine_mode mode)
514 if (mode != VOIDmode && mode != GET_MODE (op))
517 if (!COMPARISON_P (op))
520 if (GET_CODE (XEXP (op, 0)) != REG
521 || REGNO (XEXP (op, 0)) != CC_REGNUM
522 || XEXP (op, 1) != const0_rtx)
525 switch (GET_MODE (XEXP (op, 0)))
528 return GET_CODE (op) == GEU;
531 return GET_CODE (op) == GTU;
534 return GET_CODE (op) == LEU;
537 return GET_CODE (op) == GEU;
540 return GET_CODE (op) == LE;
543 return GET_CODE (op) == GE;
550 /* Return branch condition mask to implement a branch
551 specified by CODE. */
554 s390_branch_condition_mask (rtx code)
556 const int CC0 = 1 << 3;
557 const int CC1 = 1 << 2;
558 const int CC2 = 1 << 1;
559 const int CC3 = 1 << 0;
561 if (GET_CODE (XEXP (code, 0)) != REG
562 || REGNO (XEXP (code, 0)) != CC_REGNUM
563 || XEXP (code, 1) != const0_rtx)
566 switch (GET_MODE (XEXP (code, 0)))
569 switch (GET_CODE (code))
572 case NE: return CC1 | CC2 | CC3;
579 switch (GET_CODE (code))
582 case NE: return CC0 | CC2 | CC3;
589 switch (GET_CODE (code))
592 case NE: return CC0 | CC1 | CC3;
599 switch (GET_CODE (code))
602 case NE: return CC0 | CC1 | CC2;
609 switch (GET_CODE (code))
611 case EQ: return CC0 | CC2;
612 case NE: return CC1 | CC3;
619 switch (GET_CODE (code))
621 case LTU: return CC2 | CC3; /* carry */
622 case GEU: return CC0 | CC1; /* no carry */
629 switch (GET_CODE (code))
631 case GTU: return CC0 | CC1; /* borrow */
632 case LEU: return CC2 | CC3; /* no borrow */
639 switch (GET_CODE (code))
642 case NE: return CC1 | CC2 | CC3;
643 case LTU: return CC1;
644 case GTU: return CC2;
645 case LEU: return CC0 | CC1;
646 case GEU: return CC0 | CC2;
653 switch (GET_CODE (code))
656 case NE: return CC2 | CC1 | CC3;
657 case LTU: return CC2;
658 case GTU: return CC1;
659 case LEU: return CC0 | CC2;
660 case GEU: return CC0 | CC1;
667 switch (GET_CODE (code))
670 case NE: return CC1 | CC2 | CC3;
671 case LT: return CC1 | CC3;
673 case LE: return CC0 | CC1 | CC3;
674 case GE: return CC0 | CC2;
681 switch (GET_CODE (code))
684 case NE: return CC1 | CC2 | CC3;
686 case GT: return CC2 | CC3;
687 case LE: return CC0 | CC1;
688 case GE: return CC0 | CC2 | CC3;
695 switch (GET_CODE (code))
698 case NE: return CC1 | CC2 | CC3;
701 case LE: return CC0 | CC1;
702 case GE: return CC0 | CC2;
703 case UNORDERED: return CC3;
704 case ORDERED: return CC0 | CC1 | CC2;
705 case UNEQ: return CC0 | CC3;
706 case UNLT: return CC1 | CC3;
707 case UNGT: return CC2 | CC3;
708 case UNLE: return CC0 | CC1 | CC3;
709 case UNGE: return CC0 | CC2 | CC3;
710 case LTGT: return CC1 | CC2;
717 switch (GET_CODE (code))
720 case NE: return CC2 | CC1 | CC3;
723 case LE: return CC0 | CC2;
724 case GE: return CC0 | CC1;
725 case UNORDERED: return CC3;
726 case ORDERED: return CC0 | CC2 | CC1;
727 case UNEQ: return CC0 | CC3;
728 case UNLT: return CC2 | CC3;
729 case UNGT: return CC1 | CC3;
730 case UNLE: return CC0 | CC2 | CC3;
731 case UNGE: return CC0 | CC1 | CC3;
732 case LTGT: return CC2 | CC1;
743 /* If INV is false, return assembler mnemonic string to implement
744 a branch specified by CODE. If INV is true, return mnemonic
745 for the corresponding inverted branch. */
748 s390_branch_condition_mnemonic (rtx code, int inv)
750 static const char *const mnemonic[16] =
752 NULL, "o", "h", "nle",
753 "l", "nhe", "lh", "ne",
754 "e", "nlh", "he", "nl",
755 "le", "nh", "no", NULL
758 int mask = s390_branch_condition_mask (code);
763 if (mask < 1 || mask > 14)
766 return mnemonic[mask];
769 /* Return the part of op which has a value different from def.
770 The size of the part is determined by mode.
771 Use this function only if you already know that op really
772 contains such a part. */
774 unsigned HOST_WIDE_INT
775 s390_extract_part (rtx op, enum machine_mode mode, int def)
777 unsigned HOST_WIDE_INT value = 0;
778 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
779 int part_bits = GET_MODE_BITSIZE (mode);
780 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
783 for (i = 0; i < max_parts; i++)
786 value = (unsigned HOST_WIDE_INT) INTVAL (op);
790 if ((value & part_mask) != (def & part_mask))
791 return value & part_mask;
797 /* If OP is an integer constant of mode MODE with exactly one
798 part of mode PART_MODE unequal to DEF, return the number of that
799 part. Otherwise, return -1. */
802 s390_single_part (rtx op,
803 enum machine_mode mode,
804 enum machine_mode part_mode,
807 unsigned HOST_WIDE_INT value = 0;
808 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
809 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
812 if (GET_CODE (op) != CONST_INT)
815 for (i = 0; i < n_parts; i++)
818 value = (unsigned HOST_WIDE_INT) INTVAL (op);
820 value >>= GET_MODE_BITSIZE (part_mode);
822 if ((value & part_mask) != (def & part_mask))
830 return part == -1 ? -1 : n_parts - 1 - part;
833 /* Check whether we can (and want to) split a double-word
834 move in mode MODE from SRC to DST into two single-word
835 moves, moving the subword FIRST_SUBWORD first. */
838 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
840 /* Floating point registers cannot be split. */
841 if (FP_REG_P (src) || FP_REG_P (dst))
844 /* We don't need to split if operands are directly accessible. */
845 if (s_operand (src, mode) || s_operand (dst, mode))
848 /* Non-offsettable memory references cannot be split. */
849 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
850 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
853 /* Moving the first subword must not clobber a register
854 needed to move the second subword. */
855 if (register_operand (dst, mode))
857 rtx subreg = operand_subword (dst, first_subword, 0, mode);
858 if (reg_overlap_mentioned_p (subreg, src))
866 /* Change optimizations to be performed, depending on the
869 LEVEL is the optimization level specified; 2 if `-O2' is
870 specified, 1 if `-O' is specified, and 0 if neither is specified.
872 SIZE is nonzero if `-Os' is specified and zero otherwise. */
875 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
877 /* ??? There are apparently still problems with -fcaller-saves. */
878 flag_caller_saves = 0;
880 /* By default, always emit DWARF-2 unwind info. This allows debugging
881 without maintaining a stack frame back-chain. */
882 flag_asynchronous_unwind_tables = 1;
886 override_options (void)
891 const char *const name; /* processor name or nickname. */
892 const enum processor_type processor;
893 const enum processor_flags flags;
895 const processor_alias_table[] =
897 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
898 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
899 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
900 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
901 | PF_LONG_DISPLACEMENT},
904 int const pta_size = ARRAY_SIZE (processor_alias_table);
906 /* Acquire a unique set number for our register saves and restores. */
907 s390_sr_alias_set = new_alias_set ();
909 /* Set up function hooks. */
910 init_machine_status = s390_init_machine_status;
912 /* Architecture mode defaults according to ABI. */
913 if (!(target_flags_explicit & MASK_ZARCH))
916 target_flags |= MASK_ZARCH;
918 target_flags &= ~MASK_ZARCH;
921 /* Determine processor architectural level. */
922 if (!s390_arch_string)
923 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
925 for (i = 0; i < pta_size; i++)
926 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
928 s390_arch = processor_alias_table[i].processor;
929 s390_arch_flags = processor_alias_table[i].flags;
933 error ("Unknown cpu used in -march=%s.", s390_arch_string);
935 /* Determine processor to tune for. */
936 if (!s390_tune_string)
938 s390_tune = s390_arch;
939 s390_tune_flags = s390_arch_flags;
940 s390_tune_string = s390_arch_string;
944 for (i = 0; i < pta_size; i++)
945 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
947 s390_tune = processor_alias_table[i].processor;
948 s390_tune_flags = processor_alias_table[i].flags;
952 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
956 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
957 error ("z/Architecture mode not supported on %s.", s390_arch_string);
958 if (TARGET_64BIT && !TARGET_ZARCH)
959 error ("64-bit ABI not supported in ESA/390 mode.");
962 /* Map for smallest class containing reg regno. */
964 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
965 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
966 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
967 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
968 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
969 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
970 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
971 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
972 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
973 ADDR_REGS, NO_REGS, ADDR_REGS
976 /* Return attribute type of insn. */
978 static enum attr_type
979 s390_safe_attr_type (rtx insn)
981 if (recog_memoized (insn) >= 0)
982 return get_attr_type (insn);
987 /* Return true if OP a (const_int 0) operand.
988 OP is the current operation.
989 MODE is the current operation mode. */
992 const0_operand (register rtx op, enum machine_mode mode)
994 return op == CONST0_RTX (mode);
997 /* Return true if OP is constant.
998 OP is the current operation.
999 MODE is the current operation mode. */
1002 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1004 return CONSTANT_P (op);
1007 /* Return true if the mode of operand OP matches MODE.
1008 If MODE is set to VOIDmode, set it to the mode of OP. */
1011 check_mode (register rtx op, enum machine_mode *mode)
1013 if (*mode == VOIDmode)
1014 *mode = GET_MODE (op);
1017 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1023 /* Return true if OP a valid operand for the LARL instruction.
1024 OP is the current operation.
1025 MODE is the current operation mode. */
1028 larl_operand (register rtx op, enum machine_mode mode)
1030 if (! check_mode (op, &mode))
1033 /* Allow labels and local symbols. */
1034 if (GET_CODE (op) == LABEL_REF)
1036 if (GET_CODE (op) == SYMBOL_REF)
1037 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1038 && SYMBOL_REF_TLS_MODEL (op) == 0
1039 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1041 /* Everything else must have a CONST, so strip it. */
1042 if (GET_CODE (op) != CONST)
1046 /* Allow adding *even* in-range constants. */
1047 if (GET_CODE (op) == PLUS)
1049 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1050 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1052 #if HOST_BITS_PER_WIDE_INT > 32
1053 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1054 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1060 /* Labels and local symbols allowed here as well. */
1061 if (GET_CODE (op) == LABEL_REF)
1063 if (GET_CODE (op) == SYMBOL_REF)
1064 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1065 && SYMBOL_REF_TLS_MODEL (op) == 0
1066 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1068 /* Now we must have a @GOTENT offset or @PLT stub
1069 or an @INDNTPOFF TLS offset. */
1070 if (GET_CODE (op) == UNSPEC
1071 && XINT (op, 1) == UNSPEC_GOTENT)
1073 if (GET_CODE (op) == UNSPEC
1074 && XINT (op, 1) == UNSPEC_PLT)
1076 if (GET_CODE (op) == UNSPEC
1077 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1083 /* Helper routine to implement s_operand and s_imm_operand.
1084 OP is the current operation.
1085 MODE is the current operation mode.
1086 ALLOW_IMMEDIATE specifies whether immediate operands should
1087 be accepted or not. */
1090 general_s_operand (register rtx op, enum machine_mode mode,
1091 int allow_immediate)
1093 struct s390_address addr;
1095 /* Call general_operand first, so that we don't have to
1096 check for many special cases. */
1097 if (!general_operand (op, mode))
1100 /* Just like memory_operand, allow (subreg (mem ...))
1102 if (reload_completed
1103 && GET_CODE (op) == SUBREG
1104 && GET_CODE (SUBREG_REG (op)) == MEM)
1105 op = SUBREG_REG (op);
1107 switch (GET_CODE (op))
1109 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1110 is true and we are still before reload. */
1113 if (!allow_immediate || reload_completed)
1117 /* Memory operands are OK unless they already use an
1120 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1122 if (!s390_decompose_address (XEXP (op, 0), &addr))
1126 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1127 is true. This prevents compares between two literal pool
1128 entries from being accepted. */
1129 if (!allow_immediate
1130 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1141 /* Return true if OP is a valid S-type operand.
1142 OP is the current operation.
1143 MODE is the current operation mode. */
1146 s_operand (register rtx op, enum machine_mode mode)
1148 return general_s_operand (op, mode, 0);
1151 /* Return true if OP is a valid S-type operand or an immediate
1152 operand that can be addressed as S-type operand by forcing
1153 it into the literal pool.
1154 OP is the current operation.
1155 MODE is the current operation mode. */
1158 s_imm_operand (register rtx op, enum machine_mode mode)
1160 return general_s_operand (op, mode, 1);
1163 /* Return true if OP a valid shift count operand.
1164 OP is the current operation.
1165 MODE is the current operation mode. */
1168 shift_count_operand (rtx op, enum machine_mode mode)
1170 HOST_WIDE_INT offset = 0;
1172 if (! check_mode (op, &mode))
1175 /* We can have an integer constant, an address register,
1176 or a sum of the two. Note that reload already checks
1177 that any register present is an address register, so
1178 we just check for any register here. */
1179 if (GET_CODE (op) == CONST_INT)
1181 offset = INTVAL (op);
1184 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1186 offset = INTVAL (XEXP (op, 1));
1189 while (op && GET_CODE (op) == SUBREG)
1190 op = SUBREG_REG (op);
1191 if (op && GET_CODE (op) != REG)
1194 /* Unfortunately we have to reject constants that are invalid
1195 for an address, or else reload will get confused. */
1196 if (!DISP_IN_RANGE (offset))
1202 /* Return true if DISP is a valid short displacement. */
1205 s390_short_displacement (rtx disp)
1207 /* No displacement is OK. */
1211 /* Integer displacement in range. */
1212 if (GET_CODE (disp) == CONST_INT)
1213 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1215 /* GOT offset is not OK, the GOT can be large. */
1216 if (GET_CODE (disp) == CONST
1217 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1218 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1221 /* All other symbolic constants are literal pool references,
1222 which are OK as the literal pool must be small. */
1223 if (GET_CODE (disp) == CONST)
1229 /* Return true if OP is a valid operand for a C constraint. */
1232 s390_extra_constraint_str (rtx op, int c, const char * str)
1234 struct s390_address addr;
1242 if (GET_CODE (op) != MEM)
1244 if (!s390_decompose_address (XEXP (op, 0), &addr))
1249 if (TARGET_LONG_DISPLACEMENT)
1251 if (!s390_short_displacement (addr.disp))
1257 if (GET_CODE (op) != MEM)
1260 if (TARGET_LONG_DISPLACEMENT)
1262 if (!s390_decompose_address (XEXP (op, 0), &addr))
1264 if (!s390_short_displacement (addr.disp))
1270 if (!TARGET_LONG_DISPLACEMENT)
1272 if (GET_CODE (op) != MEM)
1274 if (!s390_decompose_address (XEXP (op, 0), &addr))
1278 if (s390_short_displacement (addr.disp))
1283 if (!TARGET_LONG_DISPLACEMENT)
1285 if (GET_CODE (op) != MEM)
1287 /* Any invalid address here will be fixed up by reload,
1288 so accept it for the most generic constraint. */
1289 if (s390_decompose_address (XEXP (op, 0), &addr)
1290 && s390_short_displacement (addr.disp))
1295 if (TARGET_LONG_DISPLACEMENT)
1297 if (!s390_decompose_address (op, &addr))
1299 if (!s390_short_displacement (addr.disp))
1305 if (!TARGET_LONG_DISPLACEMENT)
1307 /* Any invalid address here will be fixed up by reload,
1308 so accept it for the most generic constraint. */
1309 if (s390_decompose_address (op, &addr)
1310 && s390_short_displacement (addr.disp))
1315 return shift_count_operand (op, VOIDmode);
1324 /* Return true if VALUE matches the constraint STR. */
1327 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1331 enum machine_mode mode, part_mode;
1341 return (unsigned int)value < 256;
1344 return (unsigned int)value < 4096;
1347 return value >= -32768 && value < 32768;
1350 return (TARGET_LONG_DISPLACEMENT ?
1351 (value >= -524288 && value <= 524287)
1352 : (value >= 0 && value <= 4095));
1354 return value == 2147483647;
1357 part = str[1] - '0';
1361 case 'H': part_mode = HImode; break;
1362 case 'Q': part_mode = QImode; break;
1368 case 'H': mode = HImode; break;
1369 case 'S': mode = SImode; break;
1370 case 'D': mode = DImode; break;
1376 case '0': def = 0; break;
1377 case 'F': def = -1; break;
1381 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1384 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1396 /* Compute a (partial) cost for rtx X. Return true if the complete
1397 cost has been computed, and false if subexpressions should be
1398 scanned. In either case, *TOTAL contains the cost result. */
1401 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1406 if (GET_CODE (XEXP (x, 0)) == MINUS
1407 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1414 /* Force_const_mem does not work out of reload, because the
1415 saveable_obstack is set to reload_obstack, which does not
1416 live long enough. Because of this we cannot use force_const_mem
1417 in addsi3. This leads to problems with gen_add2_insn with a
1418 constant greater than a short. Because of that we give an
1419 addition of greater constants a cost of 3 (reload1.c 10096). */
1420 /* ??? saveable_obstack no longer exists. */
1421 if (outer_code == PLUS
1422 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1423 *total = COSTS_N_INSNS (3);
1444 *total = COSTS_N_INSNS (1);
1448 if (GET_MODE (XEXP (x, 0)) == DImode)
1449 *total = COSTS_N_INSNS (40);
1451 *total = COSTS_N_INSNS (7);
1458 *total = COSTS_N_INSNS (33);
1466 /* Return the cost of an address rtx ADDR. */
1469 s390_address_cost (rtx addr)
1471 struct s390_address ad;
1472 if (!s390_decompose_address (addr, &ad))
1475 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1478 /* Return true if OP is a valid operand for the BRAS instruction.
1479 OP is the current operation.
1480 MODE is the current operation mode. */
1483 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1485 register enum rtx_code code = GET_CODE (op);
1487 /* Allow SYMBOL_REFs. */
1488 if (code == SYMBOL_REF)
1491 /* Allow @PLT stubs. */
1493 && GET_CODE (XEXP (op, 0)) == UNSPEC
1494 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1499 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1500 otherwise return 0. */
1503 tls_symbolic_operand (register rtx op)
1505 if (GET_CODE (op) != SYMBOL_REF)
1507 return SYMBOL_REF_TLS_MODEL (op);
1510 /* Return true if OP is a load multiple operation. It is known to be a
1511 PARALLEL and the first section will be tested.
1512 OP is the current operation.
1513 MODE is the current operation mode. */
1516 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1518 enum machine_mode elt_mode;
1519 int count = XVECLEN (op, 0);
1520 unsigned int dest_regno;
1525 /* Perform a quick check so we don't blow up below. */
1527 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1528 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1529 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1532 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1533 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1534 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1536 /* Check, is base, or base + displacement. */
1538 if (GET_CODE (src_addr) == REG)
1540 else if (GET_CODE (src_addr) == PLUS
1541 && GET_CODE (XEXP (src_addr, 0)) == REG
1542 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1544 off = INTVAL (XEXP (src_addr, 1));
1545 src_addr = XEXP (src_addr, 0);
1550 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1553 for (i = 1; i < count; i++)
1555 rtx elt = XVECEXP (op, 0, i);
1557 if (GET_CODE (elt) != SET
1558 || GET_CODE (SET_DEST (elt)) != REG
1559 || GET_MODE (SET_DEST (elt)) != elt_mode
1560 || REGNO (SET_DEST (elt)) != dest_regno + i
1561 || GET_CODE (SET_SRC (elt)) != MEM
1562 || GET_MODE (SET_SRC (elt)) != elt_mode
1563 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1564 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1565 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1566 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1567 != off + i * GET_MODE_SIZE (elt_mode))
1574 /* Return true if OP is a store multiple operation. It is known to be a
1575 PARALLEL and the first section will be tested.
1576 OP is the current operation.
1577 MODE is the current operation mode. */
1580 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1582 enum machine_mode elt_mode;
1583 int count = XVECLEN (op, 0);
1584 unsigned int src_regno;
1588 /* Perform a quick check so we don't blow up below. */
1590 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1591 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1592 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1595 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1596 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1597 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1599 /* Check, is base, or base + displacement. */
1601 if (GET_CODE (dest_addr) == REG)
1603 else if (GET_CODE (dest_addr) == PLUS
1604 && GET_CODE (XEXP (dest_addr, 0)) == REG
1605 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1607 off = INTVAL (XEXP (dest_addr, 1));
1608 dest_addr = XEXP (dest_addr, 0);
1613 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1616 for (i = 1; i < count; i++)
1618 rtx elt = XVECEXP (op, 0, i);
1620 if (GET_CODE (elt) != SET
1621 || GET_CODE (SET_SRC (elt)) != REG
1622 || GET_MODE (SET_SRC (elt)) != elt_mode
1623 || REGNO (SET_SRC (elt)) != src_regno + i
1624 || GET_CODE (SET_DEST (elt)) != MEM
1625 || GET_MODE (SET_DEST (elt)) != elt_mode
1626 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1627 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1628 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1629 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1630 != off + i * GET_MODE_SIZE (elt_mode))
1637 /* Return true if OP contains a symbol reference */
1640 symbolic_reference_mentioned_p (rtx op)
1642 register const char *fmt;
1645 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1648 fmt = GET_RTX_FORMAT (GET_CODE (op));
1649 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1655 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1656 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1660 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1667 /* Return true if OP contains a reference to a thread-local symbol. */
1670 tls_symbolic_reference_mentioned_p (rtx op)
1672 register const char *fmt;
1675 if (GET_CODE (op) == SYMBOL_REF)
1676 return tls_symbolic_operand (op);
1678 fmt = GET_RTX_FORMAT (GET_CODE (op));
1679 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1685 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1686 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1690 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1698 /* Return true if OP is a legitimate general operand when
1699 generating PIC code. It is given that flag_pic is on
1700 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1703 legitimate_pic_operand_p (register rtx op)
1705 /* Accept all non-symbolic constants. */
1706 if (!SYMBOLIC_CONST (op))
1709 /* Reject everything else; must be handled
1710 via emit_symbolic_move. */
1714 /* Returns true if the constant value OP is a legitimate general operand.
1715 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1718 legitimate_constant_p (register rtx op)
1720 /* Accept all non-symbolic constants. */
1721 if (!SYMBOLIC_CONST (op))
1724 /* Accept immediate LARL operands. */
1725 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1728 /* Thread-local symbols are never legal constants. This is
1729 so that emit_call knows that computing such addresses
1730 might require a function call. */
1731 if (TLS_SYMBOLIC_CONST (op))
1734 /* In the PIC case, symbolic constants must *not* be
1735 forced into the literal pool. We accept them here,
1736 so that they will be handled by emit_symbolic_move. */
1740 /* All remaining non-PIC symbolic constants are
1741 forced into the literal pool. */
1745 /* Determine if it's legal to put X into the constant pool. This
1746 is not possible if X contains the address of a symbol that is
1747 not constant (TLS) or not known at final link time (PIC). */
1750 s390_cannot_force_const_mem (rtx x)
1752 switch (GET_CODE (x))
1756 /* Accept all non-symbolic constants. */
1760 /* Labels are OK iff we are non-PIC. */
1761 return flag_pic != 0;
1764 /* 'Naked' TLS symbol references are never OK,
1765 non-TLS symbols are OK iff we are non-PIC. */
1766 if (tls_symbolic_operand (x))
1769 return flag_pic != 0;
1772 return s390_cannot_force_const_mem (XEXP (x, 0));
1775 return s390_cannot_force_const_mem (XEXP (x, 0))
1776 || s390_cannot_force_const_mem (XEXP (x, 1));
1779 switch (XINT (x, 1))
1781 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1782 case UNSPEC_LTREL_OFFSET:
1790 case UNSPEC_GOTNTPOFF:
1791 case UNSPEC_INDNTPOFF:
1804 /* Returns true if the constant value OP is a legitimate general
1805 operand during and after reload. The difference to
1806 legitimate_constant_p is that this function will not accept
1807 a constant that would need to be forced to the literal pool
1808 before it can be used as operand. */
1811 legitimate_reload_constant_p (register rtx op)
1813 /* Accept la(y) operands. */
1814 if (GET_CODE (op) == CONST_INT
1815 && DISP_IN_RANGE (INTVAL (op)))
1818 /* Accept l(g)hi operands. */
1819 if (GET_CODE (op) == CONST_INT
1820 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1823 /* Accept lliXX operands. */
1825 && s390_single_part (op, DImode, HImode, 0) >= 0)
1828 /* Accept larl operands. */
1829 if (TARGET_CPU_ZARCH
1830 && larl_operand (op, VOIDmode))
1833 /* Everything else cannot be handled without reload. */
1837 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1838 return the class of reg to actually use. */
1841 s390_preferred_reload_class (rtx op, enum reg_class class)
1843 /* This can happen if a floating point constant is being
1844 reloaded into an integer register. Leave well alone. */
1845 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1846 && class != FP_REGS)
1849 switch (GET_CODE (op))
1851 /* Constants we cannot reload must be forced into the
1856 if (legitimate_reload_constant_p (op))
1861 /* If a symbolic constant or a PLUS is reloaded,
1862 it is most likely being used as an address, so
1863 prefer ADDR_REGS. If 'class' is not a superset
1864 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1869 if (reg_class_subset_p (ADDR_REGS, class))
1881 /* Return the register class of a scratch register needed to
1882 load IN into a register of class CLASS in MODE.
1884 We need a temporary when loading a PLUS expression which
1885 is not a legitimate operand of the LOAD ADDRESS instruction. */
1888 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1889 enum machine_mode mode, rtx in)
1891 if (s390_plus_operand (in, mode))
1897 /* Return the register class of a scratch register needed to
1898 store a register of class CLASS in MODE into OUT:
1900 We need a temporary when storing a double-word to a
1901 non-offsettable memory address. */
1904 s390_secondary_output_reload_class (enum reg_class class,
1905 enum machine_mode mode, rtx out)
1907 if ((TARGET_64BIT ? mode == TImode
1908 : (mode == DImode || mode == DFmode))
1909 && reg_classes_intersect_p (GENERAL_REGS, class)
1910 && GET_CODE (out) == MEM
1911 && !offsettable_memref_p (out)
1912 && !s_operand (out, VOIDmode))
1918 /* Return true if OP is a PLUS that is not a legitimate
1919 operand for the LA instruction.
1920 OP is the current operation.
1921 MODE is the current operation mode. */
1924 s390_plus_operand (register rtx op, enum machine_mode mode)
1926 if (!check_mode (op, &mode) || mode != Pmode)
1929 if (GET_CODE (op) != PLUS)
1932 if (legitimate_la_operand_p (op))
1938 /* Generate code to load SRC, which is PLUS that is not a
1939 legitimate operand for the LA instruction, into TARGET.
1940 SCRATCH may be used as scratch register. */
1943 s390_expand_plus_operand (register rtx target, register rtx src,
1944 register rtx scratch)
1947 struct s390_address ad;
1949 /* src must be a PLUS; get its two operands. */
1950 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1953 /* Check if any of the two operands is already scheduled
1954 for replacement by reload. This can happen e.g. when
1955 float registers occur in an address. */
1956 sum1 = find_replacement (&XEXP (src, 0));
1957 sum2 = find_replacement (&XEXP (src, 1));
1958 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1960 /* If the address is already strictly valid, there's nothing to do. */
1961 if (!s390_decompose_address (src, &ad)
1962 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
1963 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
1965 /* Otherwise, one of the operands cannot be an address register;
1966 we reload its value into the scratch register. */
1967 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
1969 emit_move_insn (scratch, sum1);
1972 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
1974 emit_move_insn (scratch, sum2);
1978 /* According to the way these invalid addresses are generated
1979 in reload.c, it should never happen (at least on s390) that
1980 *neither* of the PLUS components, after find_replacements
1981 was applied, is an address register. */
1982 if (sum1 == scratch && sum2 == scratch)
1988 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1991 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
1992 is only ever performed on addresses, so we can mark the
1993 sum as legitimate for LA in any case. */
1994 s390_load_address (target, src);
1998 /* Decompose a RTL expression ADDR for a memory address into
1999 its components, returned in OUT.
2001 Returns 0 if ADDR is not a valid memory address, nonzero
2002 otherwise. If OUT is NULL, don't return the components,
2003 but check for validity only.
2005 Note: Only addresses in canonical form are recognized.
2006 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2007 canonical form so that they will be recognized. */
2010 s390_decompose_address (register rtx addr, struct s390_address *out)
2012 rtx base = NULL_RTX;
2013 rtx indx = NULL_RTX;
2014 rtx disp = NULL_RTX;
2015 int pointer = FALSE;
2016 int base_ptr = FALSE;
2017 int indx_ptr = FALSE;
2019 /* Decompose address into base + index + displacement. */
2021 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2024 else if (GET_CODE (addr) == PLUS)
2026 rtx op0 = XEXP (addr, 0);
2027 rtx op1 = XEXP (addr, 1);
2028 enum rtx_code code0 = GET_CODE (op0);
2029 enum rtx_code code1 = GET_CODE (op1);
2031 if (code0 == REG || code0 == UNSPEC)
2033 if (code1 == REG || code1 == UNSPEC)
2035 indx = op0; /* index + base */
2041 base = op0; /* base + displacement */
2046 else if (code0 == PLUS)
2048 indx = XEXP (op0, 0); /* index + base + disp */
2049 base = XEXP (op0, 1);
2060 disp = addr; /* displacement */
2063 /* Validate base register. */
2066 if (GET_CODE (base) == UNSPEC)
2068 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2070 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2073 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2076 if (REGNO (base) == BASE_REGISTER
2077 || REGNO (base) == STACK_POINTER_REGNUM
2078 || REGNO (base) == FRAME_POINTER_REGNUM
2079 || ((reload_completed || reload_in_progress)
2080 && frame_pointer_needed
2081 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2082 || REGNO (base) == ARG_POINTER_REGNUM
2084 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2085 pointer = base_ptr = TRUE;
2088 /* Validate index register. */
2091 if (GET_CODE (indx) == UNSPEC)
2093 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2095 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2098 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2101 if (REGNO (indx) == BASE_REGISTER
2102 || REGNO (indx) == STACK_POINTER_REGNUM
2103 || REGNO (indx) == FRAME_POINTER_REGNUM
2104 || ((reload_completed || reload_in_progress)
2105 && frame_pointer_needed
2106 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2107 || REGNO (indx) == ARG_POINTER_REGNUM
2109 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2110 pointer = indx_ptr = TRUE;
2113 /* Prefer to use pointer as base, not index. */
2114 if (base && indx && !base_ptr
2115 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2122 /* Validate displacement. */
2125 /* Allow integer constant in range. */
2126 if (GET_CODE (disp) == CONST_INT)
2128 /* If the argument pointer is involved, the displacement will change
2129 later anyway as the argument pointer gets eliminated. This could
2130 make a valid displacement invalid, but it is more likely to make
2131 an invalid displacement valid, because we sometimes access the
2132 register save area via negative offsets to the arg pointer.
2133 Thus we don't check the displacement for validity here. If after
2134 elimination the displacement turns out to be invalid after all,
2135 this is fixed up by reload in any case. */
2136 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2138 if (!DISP_IN_RANGE (INTVAL (disp)))
2143 /* In the small-PIC case, the linker converts @GOT
2144 and @GOTNTPOFF offsets to possible displacements. */
2145 else if (GET_CODE (disp) == CONST
2146 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2147 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2148 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2156 /* Accept chunkfied literal pool symbol references. */
2157 else if (GET_CODE (disp) == CONST
2158 && GET_CODE (XEXP (disp, 0)) == MINUS
2159 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2160 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2165 /* Likewise if a constant offset is present. */
2166 else if (GET_CODE (disp) == CONST
2167 && GET_CODE (XEXP (disp, 0)) == PLUS
2168 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2169 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2170 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2171 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2176 /* We can convert literal pool addresses to
2177 displacements by basing them off the base register. */
2180 /* In some cases, we can accept an additional
2181 small constant offset. Split these off here. */
2183 unsigned int offset = 0;
2185 if (GET_CODE (disp) == CONST
2186 && GET_CODE (XEXP (disp, 0)) == PLUS
2187 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2189 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2190 disp = XEXP (XEXP (disp, 0), 0);
2193 /* Now we must have a literal pool address. */
2194 if (GET_CODE (disp) != SYMBOL_REF
2195 || !CONSTANT_POOL_ADDRESS_P (disp))
2198 /* If we have an offset, make sure it does not
2199 exceed the size of the constant pool entry. */
2200 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2203 /* Either base or index must be free to
2204 hold the base register. */
2208 /* Convert the address. */
2210 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2212 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2214 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2215 UNSPEC_LTREL_OFFSET);
2216 disp = gen_rtx_CONST (Pmode, disp);
2219 disp = plus_constant (disp, offset);
2233 out->pointer = pointer;
2239 /* Return nonzero if ADDR is a valid memory address.
2240 STRICT specifies whether strict register checking applies. */
2243 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2244 register rtx addr, int strict)
2246 struct s390_address ad;
2247 if (!s390_decompose_address (addr, &ad))
2252 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2254 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2259 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2261 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2268 /* Return 1 if OP is a valid operand for the LA instruction.
2269 In 31-bit, we need to prove that the result is used as an
2270 address, as LA performs only a 31-bit addition. */
2273 legitimate_la_operand_p (register rtx op)
2275 struct s390_address addr;
2276 if (!s390_decompose_address (op, &addr))
2279 if (TARGET_64BIT || addr.pointer)
2285 /* Return 1 if OP is a valid operand for the LA instruction,
2286 and we prefer to use LA over addition to compute it. */
2289 preferred_la_operand_p (register rtx op)
2291 struct s390_address addr;
2292 if (!s390_decompose_address (op, &addr))
2295 if (!TARGET_64BIT && !addr.pointer)
2301 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2302 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2308 /* Emit a forced load-address operation to load SRC into DST.
2309 This will use the LOAD ADDRESS instruction even in situations
2310 where legitimate_la_operand_p (SRC) returns false. */
2313 s390_load_address (rtx dst, rtx src)
2316 emit_move_insn (dst, src);
2318 emit_insn (gen_force_la_31 (dst, src));
2321 /* Return a legitimate reference for ORIG (an address) using the
2322 register REG. If REG is 0, a new pseudo is generated.
2324 There are two types of references that must be handled:
2326 1. Global data references must load the address from the GOT, via
2327 the PIC reg. An insn is emitted to do this load, and the reg is
2330 2. Static data references, constant pool addresses, and code labels
2331 compute the address as an offset from the GOT, whose base is in
2332 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2333 differentiate them from global data objects. The returned
2334 address is the PIC reg + an unspec constant.
2336 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2337 reg also appears in the address. */
2340 legitimize_pic_address (rtx orig, rtx reg)
2346 if (GET_CODE (addr) == LABEL_REF
2347 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2349 /* This is a local symbol. */
2350 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2352 /* Access local symbols PC-relative via LARL.
2353 This is the same as in the non-PIC case, so it is
2354 handled automatically ... */
2358 /* Access local symbols relative to the GOT. */
2360 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2362 if (reload_in_progress || reload_completed)
2363 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2365 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2366 addr = gen_rtx_CONST (Pmode, addr);
2367 addr = force_const_mem (Pmode, addr);
2368 emit_move_insn (temp, addr);
2370 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2373 emit_move_insn (reg, new);
2378 else if (GET_CODE (addr) == SYMBOL_REF)
2381 reg = gen_reg_rtx (Pmode);
2385 /* Assume GOT offset < 4k. This is handled the same way
2386 in both 31- and 64-bit code (@GOT). */
2388 if (reload_in_progress || reload_completed)
2389 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2391 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2392 new = gen_rtx_CONST (Pmode, new);
2393 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2394 new = gen_rtx_MEM (Pmode, new);
2395 RTX_UNCHANGING_P (new) = 1;
2396 emit_move_insn (reg, new);
2399 else if (TARGET_CPU_ZARCH)
2401 /* If the GOT offset might be >= 4k, we determine the position
2402 of the GOT entry via a PC-relative LARL (@GOTENT). */
2404 rtx temp = gen_reg_rtx (Pmode);
2406 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2407 new = gen_rtx_CONST (Pmode, new);
2408 emit_move_insn (temp, new);
2410 new = gen_rtx_MEM (Pmode, temp);
2411 RTX_UNCHANGING_P (new) = 1;
2412 emit_move_insn (reg, new);
2417 /* If the GOT offset might be >= 4k, we have to load it
2418 from the literal pool (@GOT). */
2420 rtx temp = gen_reg_rtx (Pmode);
2422 if (reload_in_progress || reload_completed)
2423 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2425 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2426 addr = gen_rtx_CONST (Pmode, addr);
2427 addr = force_const_mem (Pmode, addr);
2428 emit_move_insn (temp, addr);
2430 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2431 new = gen_rtx_MEM (Pmode, new);
2432 RTX_UNCHANGING_P (new) = 1;
2433 emit_move_insn (reg, new);
2439 if (GET_CODE (addr) == CONST)
2441 addr = XEXP (addr, 0);
2442 if (GET_CODE (addr) == UNSPEC)
2444 if (XVECLEN (addr, 0) != 1)
2446 switch (XINT (addr, 1))
2448 /* If someone moved a GOT-relative UNSPEC
2449 out of the literal pool, force them back in. */
2452 new = force_const_mem (Pmode, orig);
2455 /* @GOT is OK as is if small. */
2458 new = force_const_mem (Pmode, orig);
2461 /* @GOTENT is OK as is. */
2465 /* @PLT is OK as is on 64-bit, must be converted to
2466 GOT-relative @PLTOFF on 31-bit. */
2468 if (!TARGET_CPU_ZARCH)
2470 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2472 if (reload_in_progress || reload_completed)
2473 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2475 addr = XVECEXP (addr, 0, 0);
2476 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2478 addr = gen_rtx_CONST (Pmode, addr);
2479 addr = force_const_mem (Pmode, addr);
2480 emit_move_insn (temp, addr);
2482 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2485 emit_move_insn (reg, new);
2491 /* Everything else cannot happen. */
2496 else if (GET_CODE (addr) != PLUS)
2499 if (GET_CODE (addr) == PLUS)
2501 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2502 /* Check first to see if this is a constant offset
2503 from a local symbol reference. */
2504 if ((GET_CODE (op0) == LABEL_REF
2505 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2506 && GET_CODE (op1) == CONST_INT)
2508 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2510 if (INTVAL (op1) & 1)
2512 /* LARL can't handle odd offsets, so emit a
2513 pair of LARL and LA. */
2514 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2516 if (!DISP_IN_RANGE (INTVAL (op1)))
2518 int even = INTVAL (op1) - 1;
2519 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2520 op0 = gen_rtx_CONST (Pmode, op0);
2524 emit_move_insn (temp, op0);
2525 new = gen_rtx_PLUS (Pmode, temp, op1);
2529 emit_move_insn (reg, new);
2535 /* If the offset is even, we can just use LARL.
2536 This will happen automatically. */
2541 /* Access local symbols relative to the GOT. */
2543 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2545 if (reload_in_progress || reload_completed)
2546 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2548 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2550 addr = gen_rtx_PLUS (Pmode, addr, op1);
2551 addr = gen_rtx_CONST (Pmode, addr);
2552 addr = force_const_mem (Pmode, addr);
2553 emit_move_insn (temp, addr);
2555 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2558 emit_move_insn (reg, new);
2564 /* Now, check whether it is a GOT relative symbol plus offset
2565 that was pulled out of the literal pool. Force it back in. */
2567 else if (GET_CODE (op0) == UNSPEC
2568 && GET_CODE (op1) == CONST_INT
2569 && XINT (op0, 1) == UNSPEC_GOTOFF)
2571 if (XVECLEN (op0, 0) != 1)
2574 new = force_const_mem (Pmode, orig);
2577 /* Otherwise, compute the sum. */
2580 base = legitimize_pic_address (XEXP (addr, 0), reg);
2581 new = legitimize_pic_address (XEXP (addr, 1),
2582 base == reg ? NULL_RTX : reg);
2583 if (GET_CODE (new) == CONST_INT)
2584 new = plus_constant (base, INTVAL (new));
2587 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2589 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2590 new = XEXP (new, 1);
2592 new = gen_rtx_PLUS (Pmode, base, new);
2595 if (GET_CODE (new) == CONST)
2596 new = XEXP (new, 0);
2597 new = force_operand (new, 0);
2604 /* Load the thread pointer into a register. */
2607 get_thread_pointer (void)
2611 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2612 tp = force_reg (Pmode, tp);
2613 mark_reg_pointer (tp, BITS_PER_WORD);
2618 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
2619 in s390_tls_symbol which always refers to __tls_get_offset.
2620 The returned offset is written to RESULT_REG and an USE rtx is
2621 generated for TLS_CALL. */
2623 static GTY(()) rtx s390_tls_symbol;
2626 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
2633 if (!s390_tls_symbol)
2634 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2636 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
2637 gen_rtx_REG (Pmode, RETURN_REGNUM));
2639 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
2640 CONST_OR_PURE_CALL_P (insn) = 1;
2643 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2644 this (thread-local) address. REG may be used as temporary. */
2647 legitimize_tls_address (rtx addr, rtx reg)
2649 rtx new, tls_call, temp, base, r2, insn;
2651 if (GET_CODE (addr) == SYMBOL_REF)
2652 switch (tls_symbolic_operand (addr))
2654 case TLS_MODEL_GLOBAL_DYNAMIC:
2656 r2 = gen_rtx_REG (Pmode, 2);
2657 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2658 new = gen_rtx_CONST (Pmode, tls_call);
2659 new = force_const_mem (Pmode, new);
2660 emit_move_insn (r2, new);
2661 s390_emit_tls_call_insn (r2, tls_call);
2662 insn = get_insns ();
2665 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2666 temp = gen_reg_rtx (Pmode);
2667 emit_libcall_block (insn, temp, r2, new);
2669 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2672 s390_load_address (reg, new);
2677 case TLS_MODEL_LOCAL_DYNAMIC:
2679 r2 = gen_rtx_REG (Pmode, 2);
2680 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2681 new = gen_rtx_CONST (Pmode, tls_call);
2682 new = force_const_mem (Pmode, new);
2683 emit_move_insn (r2, new);
2684 s390_emit_tls_call_insn (r2, tls_call);
2685 insn = get_insns ();
2688 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2689 temp = gen_reg_rtx (Pmode);
2690 emit_libcall_block (insn, temp, r2, new);
2692 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2693 base = gen_reg_rtx (Pmode);
2694 s390_load_address (base, new);
2696 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2697 new = gen_rtx_CONST (Pmode, new);
2698 new = force_const_mem (Pmode, new);
2699 temp = gen_reg_rtx (Pmode);
2700 emit_move_insn (temp, new);
2702 new = gen_rtx_PLUS (Pmode, base, temp);
2705 s390_load_address (reg, new);
2710 case TLS_MODEL_INITIAL_EXEC:
2713 /* Assume GOT offset < 4k. This is handled the same way
2714 in both 31- and 64-bit code. */
2716 if (reload_in_progress || reload_completed)
2717 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2719 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2720 new = gen_rtx_CONST (Pmode, new);
2721 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2722 new = gen_rtx_MEM (Pmode, new);
2723 RTX_UNCHANGING_P (new) = 1;
2724 temp = gen_reg_rtx (Pmode);
2725 emit_move_insn (temp, new);
2727 else if (TARGET_CPU_ZARCH)
2729 /* If the GOT offset might be >= 4k, we determine the position
2730 of the GOT entry via a PC-relative LARL. */
2732 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2733 new = gen_rtx_CONST (Pmode, new);
2734 temp = gen_reg_rtx (Pmode);
2735 emit_move_insn (temp, new);
2737 new = gen_rtx_MEM (Pmode, temp);
2738 RTX_UNCHANGING_P (new) = 1;
2739 temp = gen_reg_rtx (Pmode);
2740 emit_move_insn (temp, new);
2744 /* If the GOT offset might be >= 4k, we have to load it
2745 from the literal pool. */
2747 if (reload_in_progress || reload_completed)
2748 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2750 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2751 new = gen_rtx_CONST (Pmode, new);
2752 new = force_const_mem (Pmode, new);
2753 temp = gen_reg_rtx (Pmode);
2754 emit_move_insn (temp, new);
2756 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2757 new = gen_rtx_MEM (Pmode, new);
2758 RTX_UNCHANGING_P (new) = 1;
2760 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2761 temp = gen_reg_rtx (Pmode);
2762 emit_insn (gen_rtx_SET (Pmode, temp, new));
2766 /* In position-dependent code, load the absolute address of
2767 the GOT entry from the literal pool. */
2769 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2770 new = gen_rtx_CONST (Pmode, new);
2771 new = force_const_mem (Pmode, new);
2772 temp = gen_reg_rtx (Pmode);
2773 emit_move_insn (temp, new);
2776 new = gen_rtx_MEM (Pmode, new);
2777 RTX_UNCHANGING_P (new) = 1;
2779 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2780 temp = gen_reg_rtx (Pmode);
2781 emit_insn (gen_rtx_SET (Pmode, temp, new));
2784 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2787 s390_load_address (reg, new);
2792 case TLS_MODEL_LOCAL_EXEC:
2793 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2794 new = gen_rtx_CONST (Pmode, new);
2795 new = force_const_mem (Pmode, new);
2796 temp = gen_reg_rtx (Pmode);
2797 emit_move_insn (temp, new);
2799 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2802 s390_load_address (reg, new);
2811 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2813 switch (XINT (XEXP (addr, 0), 1))
2815 case UNSPEC_INDNTPOFF:
2816 if (TARGET_CPU_ZARCH)
2828 abort (); /* for now ... */
2833 /* Emit insns to move operands[1] into operands[0]. */
2836 emit_symbolic_move (rtx *operands)
2838 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2840 if (GET_CODE (operands[0]) == MEM)
2841 operands[1] = force_reg (Pmode, operands[1]);
2842 else if (TLS_SYMBOLIC_CONST (operands[1]))
2843 operands[1] = legitimize_tls_address (operands[1], temp);
2845 operands[1] = legitimize_pic_address (operands[1], temp);
2848 /* Try machine-dependent ways of modifying an illegitimate address X
2849 to be legitimate. If we find one, return the new, valid address.
2851 OLDX is the address as it was before break_out_memory_refs was called.
2852 In some cases it is useful to look at this to decide what needs to be done.
2854 MODE is the mode of the operand pointed to by X.
2856 When -fpic is used, special handling is needed for symbolic references.
2857 See comments by legitimize_pic_address for details. */
2860 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2861 enum machine_mode mode ATTRIBUTE_UNUSED)
2863 rtx constant_term = const0_rtx;
2865 if (TLS_SYMBOLIC_CONST (x))
2867 x = legitimize_tls_address (x, 0);
2869 if (legitimate_address_p (mode, x, FALSE))
2874 if (SYMBOLIC_CONST (x)
2875 || (GET_CODE (x) == PLUS
2876 && (SYMBOLIC_CONST (XEXP (x, 0))
2877 || SYMBOLIC_CONST (XEXP (x, 1)))))
2878 x = legitimize_pic_address (x, 0);
2880 if (legitimate_address_p (mode, x, FALSE))
2884 x = eliminate_constant_term (x, &constant_term);
2886 /* Optimize loading of large displacements by splitting them
2887 into the multiple of 4K and the rest; this allows the
2888 former to be CSE'd if possible.
2890 Don't do this if the displacement is added to a register
2891 pointing into the stack frame, as the offsets will
2892 change later anyway. */
2894 if (GET_CODE (constant_term) == CONST_INT
2895 && !TARGET_LONG_DISPLACEMENT
2896 && !DISP_IN_RANGE (INTVAL (constant_term))
2897 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2899 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2900 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2902 rtx temp = gen_reg_rtx (Pmode);
2903 rtx val = force_operand (GEN_INT (upper), temp);
2905 emit_move_insn (temp, val);
2907 x = gen_rtx_PLUS (Pmode, x, temp);
2908 constant_term = GEN_INT (lower);
2911 if (GET_CODE (x) == PLUS)
2913 if (GET_CODE (XEXP (x, 0)) == REG)
2915 register rtx temp = gen_reg_rtx (Pmode);
2916 register rtx val = force_operand (XEXP (x, 1), temp);
2918 emit_move_insn (temp, val);
2920 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2923 else if (GET_CODE (XEXP (x, 1)) == REG)
2925 register rtx temp = gen_reg_rtx (Pmode);
2926 register rtx val = force_operand (XEXP (x, 0), temp);
2928 emit_move_insn (temp, val);
2930 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2934 if (constant_term != const0_rtx)
2935 x = gen_rtx_PLUS (Pmode, x, constant_term);
2940 /* Emit code to move LEN bytes from DST to SRC. */
2943 s390_expand_movstr (rtx dst, rtx src, rtx len)
2945 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2947 if (INTVAL (len) > 0)
2948 emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2951 else if (TARGET_MVCLE)
2953 emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
2958 rtx dst_addr, src_addr, count, blocks, temp;
2959 rtx loop_start_label = gen_label_rtx ();
2960 rtx loop_end_label = gen_label_rtx ();
2961 rtx end_label = gen_label_rtx ();
2962 enum machine_mode mode;
2964 mode = GET_MODE (len);
2965 if (mode == VOIDmode)
2968 dst_addr = gen_reg_rtx (Pmode);
2969 src_addr = gen_reg_rtx (Pmode);
2970 count = gen_reg_rtx (mode);
2971 blocks = gen_reg_rtx (mode);
2973 convert_move (count, len, 1);
2974 emit_cmp_and_jump_insns (count, const0_rtx,
2975 EQ, NULL_RTX, mode, 1, end_label);
2977 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
2978 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
2979 dst = change_address (dst, VOIDmode, dst_addr);
2980 src = change_address (src, VOIDmode, src_addr);
2982 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
2984 emit_move_insn (count, temp);
2986 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
2988 emit_move_insn (blocks, temp);
2990 emit_cmp_and_jump_insns (blocks, const0_rtx,
2991 EQ, NULL_RTX, mode, 1, loop_end_label);
2993 emit_label (loop_start_label);
2995 emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
2996 s390_load_address (dst_addr,
2997 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
2998 s390_load_address (src_addr,
2999 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3001 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3003 emit_move_insn (blocks, temp);
3005 emit_cmp_and_jump_insns (blocks, const0_rtx,
3006 EQ, NULL_RTX, mode, 1, loop_end_label);
3008 emit_jump (loop_start_label);
3009 emit_label (loop_end_label);
3011 emit_insn (gen_movstr_short (dst, src,
3012 convert_to_mode (Pmode, count, 1)));
3013 emit_label (end_label);
3017 /* Emit code to clear LEN bytes at DST. */
3020 s390_expand_clrstr (rtx dst, rtx len)
3022 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3024 if (INTVAL (len) > 0)
3025 emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
3028 else if (TARGET_MVCLE)
3030 emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
3035 rtx dst_addr, src_addr, count, blocks, temp;
3036 rtx loop_start_label = gen_label_rtx ();
3037 rtx loop_end_label = gen_label_rtx ();
3038 rtx end_label = gen_label_rtx ();
3039 enum machine_mode mode;
3041 mode = GET_MODE (len);
3042 if (mode == VOIDmode)
3045 dst_addr = gen_reg_rtx (Pmode);
3046 src_addr = gen_reg_rtx (Pmode);
3047 count = gen_reg_rtx (mode);
3048 blocks = gen_reg_rtx (mode);
3050 convert_move (count, len, 1);
3051 emit_cmp_and_jump_insns (count, const0_rtx,
3052 EQ, NULL_RTX, mode, 1, end_label);
3054 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3055 dst = change_address (dst, VOIDmode, dst_addr);
3057 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3059 emit_move_insn (count, temp);
3061 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3063 emit_move_insn (blocks, temp);
3065 emit_cmp_and_jump_insns (blocks, const0_rtx,
3066 EQ, NULL_RTX, mode, 1, loop_end_label);
3068 emit_label (loop_start_label);
3070 emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
3071 s390_load_address (dst_addr,
3072 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3074 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3076 emit_move_insn (blocks, temp);
3078 emit_cmp_and_jump_insns (blocks, const0_rtx,
3079 EQ, NULL_RTX, mode, 1, loop_end_label);
3081 emit_jump (loop_start_label);
3082 emit_label (loop_end_label);
3084 emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
3085 emit_label (end_label);
3089 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3090 and return the result in TARGET. */
3093 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3095 rtx (*gen_result) (rtx) =
3096 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3098 op0 = protect_from_queue (op0, 0);
3099 op1 = protect_from_queue (op1, 0);
3100 len = protect_from_queue (len, 0);
3102 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3104 if (INTVAL (len) > 0)
3106 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3107 emit_insn (gen_result (target));
3110 emit_move_insn (target, const0_rtx);
3113 else /* if (TARGET_MVCLE) */
3115 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3116 emit_insn (gen_result (target));
3120 /* Deactivate for now as profile code cannot cope with
3121 CC being live across basic block boundaries. */
3124 rtx addr0, addr1, count, blocks, temp;
3125 rtx loop_start_label = gen_label_rtx ();
3126 rtx loop_end_label = gen_label_rtx ();
3127 rtx end_label = gen_label_rtx ();
3128 enum machine_mode mode;
3130 mode = GET_MODE (len);
3131 if (mode == VOIDmode)
3134 addr0 = gen_reg_rtx (Pmode);
3135 addr1 = gen_reg_rtx (Pmode);
3136 count = gen_reg_rtx (mode);
3137 blocks = gen_reg_rtx (mode);
3139 convert_move (count, len, 1);
3140 emit_cmp_and_jump_insns (count, const0_rtx,
3141 EQ, NULL_RTX, mode, 1, end_label);
3143 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3144 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3145 op0 = change_address (op0, VOIDmode, addr0);
3146 op1 = change_address (op1, VOIDmode, addr1);
3148 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3150 emit_move_insn (count, temp);
3152 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3154 emit_move_insn (blocks, temp);
3156 emit_cmp_and_jump_insns (blocks, const0_rtx,
3157 EQ, NULL_RTX, mode, 1, loop_end_label);
3159 emit_label (loop_start_label);
3161 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3162 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3163 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3164 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3165 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3166 emit_jump_insn (temp);
3168 s390_load_address (addr0,
3169 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3170 s390_load_address (addr1,
3171 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3173 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3175 emit_move_insn (blocks, temp);
3177 emit_cmp_and_jump_insns (blocks, const0_rtx,
3178 EQ, NULL_RTX, mode, 1, loop_end_label);
3180 emit_jump (loop_start_label);
3181 emit_label (loop_end_label);
3183 emit_insn (gen_cmpmem_short (op0, op1,
3184 convert_to_mode (Pmode, count, 1)));
3185 emit_label (end_label);
3187 emit_insn (gen_result (target));
3192 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3193 We need to emit DTP-relative relocations. */
3196 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3201 fputs ("\t.long\t", file);
3204 fputs ("\t.quad\t", file);
3209 output_addr_const (file, x);
3210 fputs ("@DTPOFF", file);
3213 /* In the name of slightly smaller debug output, and to cater to
3214 general assembler losage, recognize various UNSPEC sequences
3215 and turn them back into a direct symbol reference. */
3218 s390_delegitimize_address (rtx orig_x)
3222 if (GET_CODE (x) != MEM)
3226 if (GET_CODE (x) == PLUS
3227 && GET_CODE (XEXP (x, 1)) == CONST
3228 && GET_CODE (XEXP (x, 0)) == REG
3229 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3231 y = XEXP (XEXP (x, 1), 0);
3232 if (GET_CODE (y) == UNSPEC
3233 && XINT (y, 1) == UNSPEC_GOT)
3234 return XVECEXP (y, 0, 0);
3238 if (GET_CODE (x) == CONST)
3241 if (GET_CODE (y) == UNSPEC
3242 && XINT (y, 1) == UNSPEC_GOTENT)
3243 return XVECEXP (y, 0, 0);
3250 /* Output shift count operand OP to stdio stream FILE. */
3253 print_shift_count_operand (FILE *file, rtx op)
3255 HOST_WIDE_INT offset = 0;
3257 /* We can have an integer constant, an address register,
3258 or a sum of the two. */
3259 if (GET_CODE (op) == CONST_INT)
3261 offset = INTVAL (op);
3264 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3266 offset = INTVAL (XEXP (op, 1));
3269 while (op && GET_CODE (op) == SUBREG)
3270 op = SUBREG_REG (op);
3273 if (op && (GET_CODE (op) != REG
3274 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3275 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3278 /* Shift counts are truncated to the low six bits anyway. */
3279 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3281 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3284 /* Locate some local-dynamic symbol still in use by this function
3285 so that we can print its name in local-dynamic base patterns. */
3288 get_some_local_dynamic_name (void)
3292 if (cfun->machine->some_ld_name)
3293 return cfun->machine->some_ld_name;
3295 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3297 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3298 return cfun->machine->some_ld_name;
3304 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3308 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3310 x = get_pool_constant (x);
3311 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3314 if (GET_CODE (x) == SYMBOL_REF
3315 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3317 cfun->machine->some_ld_name = XSTR (x, 0);
3324 /* Output machine-dependent UNSPECs occurring in address constant X
3325 in assembler syntax to stdio stream FILE. Returns true if the
3326 constant X could be recognized, false otherwise. */
3329 s390_output_addr_const_extra (FILE *file, rtx x)
3331 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
3332 switch (XINT (x, 1))
3335 output_addr_const (file, XVECEXP (x, 0, 0));
3336 fprintf (file, "@GOTENT");
3339 output_addr_const (file, XVECEXP (x, 0, 0));
3340 fprintf (file, "@GOT");
3343 output_addr_const (file, XVECEXP (x, 0, 0));
3344 fprintf (file, "@GOTOFF");
3347 output_addr_const (file, XVECEXP (x, 0, 0));
3348 fprintf (file, "@PLT");
3351 output_addr_const (file, XVECEXP (x, 0, 0));
3352 fprintf (file, "@PLTOFF");
3355 output_addr_const (file, XVECEXP (x, 0, 0));
3356 fprintf (file, "@TLSGD");
3359 assemble_name (file, get_some_local_dynamic_name ());
3360 fprintf (file, "@TLSLDM");
3363 output_addr_const (file, XVECEXP (x, 0, 0));
3364 fprintf (file, "@DTPOFF");
3367 output_addr_const (file, XVECEXP (x, 0, 0));
3368 fprintf (file, "@NTPOFF");
3370 case UNSPEC_GOTNTPOFF:
3371 output_addr_const (file, XVECEXP (x, 0, 0));
3372 fprintf (file, "@GOTNTPOFF");
3374 case UNSPEC_INDNTPOFF:
3375 output_addr_const (file, XVECEXP (x, 0, 0));
3376 fprintf (file, "@INDNTPOFF");
3383 /* Output address operand ADDR in assembler syntax to
3384 stdio stream FILE. */
3387 print_operand_address (FILE *file, rtx addr)
3389 struct s390_address ad;
3391 if (!s390_decompose_address (addr, &ad)
3392 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3393 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3394 output_operand_lossage ("Cannot decompose address.");
3397 output_addr_const (file, ad.disp);
3399 fprintf (file, "0");
3401 if (ad.base && ad.indx)
3402 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3403 reg_names[REGNO (ad.base)]);
3405 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3408 /* Output operand X in assembler syntax to stdio stream FILE.
3409 CODE specified the format flag. The following format flags
3412 'C': print opcode suffix for branch condition.
3413 'D': print opcode suffix for inverse branch condition.
3414 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3415 'O': print only the displacement of a memory reference.
3416 'R': print only the base register of a memory reference.
3417 'N': print the second word of a DImode operand.
3418 'M': print the second word of a TImode operand.
3419 'Y': print shift count operand.
3421 'b': print integer X as if it's an unsigned byte.
3422 'x': print integer X as if it's an unsigned word.
3423 'h': print integer X as if it's a signed word.
3424 'i': print the first nonzero HImode part of X.
3425 'j': print the first HImode part unequal to 0xffff of X. */
3428 print_operand (FILE *file, rtx x, int code)
3433 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3437 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3441 if (GET_CODE (x) == SYMBOL_REF)
3443 fprintf (file, "%s", ":tls_load:");
3444 output_addr_const (file, x);
3446 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3448 fprintf (file, "%s", ":tls_gdcall:");
3449 output_addr_const (file, XVECEXP (x, 0, 0));
3451 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3453 fprintf (file, "%s", ":tls_ldcall:");
3454 assemble_name (file, get_some_local_dynamic_name ());
3462 struct s390_address ad;
3464 if (GET_CODE (x) != MEM
3465 || !s390_decompose_address (XEXP (x, 0), &ad)
3466 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3471 output_addr_const (file, ad.disp);
3473 fprintf (file, "0");
3479 struct s390_address ad;
3481 if (GET_CODE (x) != MEM
3482 || !s390_decompose_address (XEXP (x, 0), &ad)
3483 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3488 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3490 fprintf (file, "0");
3495 if (GET_CODE (x) == REG)
3496 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3497 else if (GET_CODE (x) == MEM)
3498 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3504 if (GET_CODE (x) == REG)
3505 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3506 else if (GET_CODE (x) == MEM)
3507 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3513 print_shift_count_operand (file, x);
3517 switch (GET_CODE (x))
3520 fprintf (file, "%s", reg_names[REGNO (x)]);
3524 output_address (XEXP (x, 0));
3531 output_addr_const (file, x);
3536 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3537 else if (code == 'x')
3538 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3539 else if (code == 'h')
3540 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3541 else if (code == 'i')
3542 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3543 s390_extract_part (x, HImode, 0));
3544 else if (code == 'j')
3545 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3546 s390_extract_part (x, HImode, -1));
3548 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3552 if (GET_MODE (x) != VOIDmode)
3555 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3556 else if (code == 'x')
3557 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3558 else if (code == 'h')
3559 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3565 fatal_insn ("UNKNOWN in print_operand !?", x);
3570 /* Target hook for assembling integer objects. We need to define it
3571 here to work a round a bug in some versions of GAS, which couldn't
3572 handle values smaller than INT_MIN when printed in decimal. */
3575 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3577 if (size == 8 && aligned_p
3578 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3580 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3584 return default_assemble_integer (x, size, aligned_p);
3587 /* Returns true if register REGNO is used for forming
3588 a memory address in expression X. */
3591 reg_used_in_mem_p (int regno, rtx x)
3593 enum rtx_code code = GET_CODE (x);
3599 if (refers_to_regno_p (regno, regno+1,
3603 else if (code == SET
3604 && GET_CODE (SET_DEST (x)) == PC)
3606 if (refers_to_regno_p (regno, regno+1,
3611 fmt = GET_RTX_FORMAT (code);
3612 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3615 && reg_used_in_mem_p (regno, XEXP (x, i)))
3618 else if (fmt[i] == 'E')
3619 for (j = 0; j < XVECLEN (x, i); j++)
3620 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3626 /* Returns true if expression DEP_RTX sets an address register
3627 used by instruction INSN to address memory. */
3630 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3634 if (GET_CODE (dep_rtx) == INSN)
3635 dep_rtx = PATTERN (dep_rtx);
3637 if (GET_CODE (dep_rtx) == SET)
3639 target = SET_DEST (dep_rtx);
3640 if (GET_CODE (target) == STRICT_LOW_PART)
3641 target = XEXP (target, 0);
3642 while (GET_CODE (target) == SUBREG)
3643 target = SUBREG_REG (target);
3645 if (GET_CODE (target) == REG)
3647 int regno = REGNO (target);
3649 if (s390_safe_attr_type (insn) == TYPE_LA)
3651 pat = PATTERN (insn);
3652 if (GET_CODE (pat) == PARALLEL)
3654 if (XVECLEN (pat, 0) != 2)
3656 pat = XVECEXP (pat, 0, 0);
3658 if (GET_CODE (pat) == SET)
3659 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3663 else if (get_attr_atype (insn) == ATYPE_AGEN)
3664 return reg_used_in_mem_p (regno, PATTERN (insn));
3670 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3673 s390_agen_dep_p (rtx dep_insn, rtx insn)
3675 rtx dep_rtx = PATTERN (dep_insn);
3678 if (GET_CODE (dep_rtx) == SET
3679 && addr_generation_dependency_p (dep_rtx, insn))
3681 else if (GET_CODE (dep_rtx) == PARALLEL)
3683 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3685 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3692 /* Return the modified cost of the dependency of instruction INSN
3693 on instruction DEP_INSN through the link LINK. COST is the
3694 default cost of that dependency.
3696 Data dependencies are all handled without delay. However, if a
3697 register is modified and subsequently used as base or index
3698 register of a memory reference, at least 4 cycles need to pass
3699 between setting and using the register to avoid pipeline stalls.
3700 An exception is the LA instruction. An address generated by LA can
3701 be used by introducing only a one cycle stall on the pipeline. */
3704 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3709 /* If the dependence is an anti-dependence, there is no cost. For an
3710 output dependence, there is sometimes a cost, but it doesn't seem
3711 worth handling those few cases. */
3713 if (REG_NOTE_KIND (link) != 0)
3716 /* If we can't recognize the insns, we can't really do anything. */
3717 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3720 /* DFA based scheduling checks address dependency in md file. */
3721 if (s390_use_dfa_pipeline_interface ())
3723 /* Operand forward in case of lr, load and la. */
3724 if (s390_tune == PROCESSOR_2084_Z990
3726 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3727 || s390_safe_attr_type (dep_insn) == TYPE_LR
3728 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3733 dep_rtx = PATTERN (dep_insn);
3735 if (GET_CODE (dep_rtx) == SET
3736 && addr_generation_dependency_p (dep_rtx, insn))
3737 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3738 else if (GET_CODE (dep_rtx) == PARALLEL)
3740 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3742 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3743 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3749 /* A C statement (sans semicolon) to update the integer scheduling priority
3750 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3751 reduce the priority to execute INSN later. Do not define this macro if
3752 you do not need to adjust the scheduling priorities of insns.
3754 A STD instruction should be scheduled earlier,
3755 in order to use the bypass. */
3758 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3760 if (! INSN_P (insn))
3763 if (s390_tune != PROCESSOR_2084_Z990)
3766 switch (s390_safe_attr_type (insn))
3770 priority = priority << 3;
3773 priority = priority << 1;
3781 /* The number of instructions that can be issued per cycle. */
3784 s390_issue_rate (void)
3786 if (s390_tune == PROCESSOR_2084_Z990)
3791 /* If the following function returns TRUE, we will use the the DFA
3795 s390_use_dfa_pipeline_interface (void)
3797 if (s390_tune == PROCESSOR_2064_Z900
3798 || s390_tune == PROCESSOR_2084_Z990)
3805 s390_first_cycle_multipass_dfa_lookahead (void)
3807 return s390_use_dfa_pipeline_interface () ? 4 : 0;
3811 /* Split all branches that exceed the maximum distance.
3812 Returns true if this created a new literal pool entry. */
3815 s390_split_branches (void)
3817 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
3818 int new_literal = 0;
3819 rtx insn, pat, tmp, target;
3822 /* We need correct insn addresses. */
3824 shorten_branches (get_insns ());
3826 /* Find all branches that exceed 64KB, and split them. */
3828 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3830 if (GET_CODE (insn) != JUMP_INSN)
3833 pat = PATTERN (insn);
3834 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
3835 pat = XVECEXP (pat, 0, 0);
3836 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
3839 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
3841 label = &SET_SRC (pat);
3843 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
3845 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
3846 label = &XEXP (SET_SRC (pat), 1);
3847 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
3848 label = &XEXP (SET_SRC (pat), 2);
3855 if (get_attr_length (insn) <= 4)
3858 /* We are going to use the return register as scratch register,
3859 make sure it will be saved/restored by the prologue/epilogue. */
3860 cfun->machine->save_return_addr_p = 1;
3865 tmp = force_const_mem (Pmode, *label);
3866 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
3867 INSN_ADDRESSES_NEW (tmp, -1);
3874 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
3875 UNSPEC_LTREL_OFFSET);
3876 target = gen_rtx_CONST (Pmode, target);
3877 target = force_const_mem (Pmode, target);
3878 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
3879 INSN_ADDRESSES_NEW (tmp, -1);
3881 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
3883 target = gen_rtx_PLUS (Pmode, temp_reg, target);
3886 if (!validate_change (insn, label, target, 0))
3894 /* Find a literal pool symbol referenced in RTX X, and store
3895 it at REF. Will abort if X contains references to more than
3896 one such pool symbol; multiple references to the same symbol
3897 are allowed, however.
3899 The rtx pointed to by REF must be initialized to NULL_RTX
3900 by the caller before calling this routine. */
3903 find_constant_pool_ref (rtx x, rtx *ref)
3908 /* Ignore LTREL_BASE references. */
3909 if (GET_CODE (x) == UNSPEC
3910 && XINT (x, 1) == UNSPEC_LTREL_BASE)
3912 /* Likewise POOL_ENTRY insns. */
3913 if (GET_CODE (x) == UNSPEC_VOLATILE
3914 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
3917 if (GET_CODE (x) == SYMBOL_REF
3918 && CONSTANT_POOL_ADDRESS_P (x))
3920 if (*ref == NULL_RTX)
3926 fmt = GET_RTX_FORMAT (GET_CODE (x));
3927 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
3931 find_constant_pool_ref (XEXP (x, i), ref);
3933 else if (fmt[i] == 'E')
3935 for (j = 0; j < XVECLEN (x, i); j++)
3936 find_constant_pool_ref (XVECEXP (x, i, j), ref);
3941 /* Replace every reference to the literal pool symbol REF
3942 in X by the address ADDR. Fix up MEMs as required. */
3945 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
3953 /* Literal pool references can only occur inside a MEM ... */
3954 if (GET_CODE (*x) == MEM)
3956 rtx memref = XEXP (*x, 0);
3960 *x = replace_equiv_address (*x, addr);
3964 if (GET_CODE (memref) == CONST
3965 && GET_CODE (XEXP (memref, 0)) == PLUS
3966 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
3967 && XEXP (XEXP (memref, 0), 0) == ref)
3969 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
3970 *x = replace_equiv_address (*x, plus_constant (addr, off));
3975 /* ... or a load-address type pattern. */
3976 if (GET_CODE (*x) == SET)
3978 rtx addrref = SET_SRC (*x);
3982 SET_SRC (*x) = addr;
3986 if (GET_CODE (addrref) == CONST
3987 && GET_CODE (XEXP (addrref, 0)) == PLUS
3988 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
3989 && XEXP (XEXP (addrref, 0), 0) == ref)
3991 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
3992 SET_SRC (*x) = plus_constant (addr, off);
3997 fmt = GET_RTX_FORMAT (GET_CODE (*x));
3998 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4002 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4004 else if (fmt[i] == 'E')
4006 for (j = 0; j < XVECLEN (*x, i); j++)
4007 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4012 /* Check whether X contains an UNSPEC_LTREL_BASE.
4013 Return its constant pool symbol if found, NULL_RTX otherwise. */
4016 find_ltrel_base (rtx x)
4021 if (GET_CODE (x) == UNSPEC
4022 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4023 return XVECEXP (x, 0, 0);
4025 fmt = GET_RTX_FORMAT (GET_CODE (x));
4026 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4030 rtx fnd = find_ltrel_base (XEXP (x, i));
4034 else if (fmt[i] == 'E')
4036 for (j = 0; j < XVECLEN (x, i); j++)
4038 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4048 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4051 replace_ltrel_base (rtx *x, rtx base)
4056 if (GET_CODE (*x) == UNSPEC
4057 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4063 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4064 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4068 replace_ltrel_base (&XEXP (*x, i), base);
4070 else if (fmt[i] == 'E')
4072 for (j = 0; j < XVECLEN (*x, i); j++)
4073 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4079 /* We keep a list of constants which we have to add to internal
4080 constant tables in the middle of large functions. */
4082 #define NR_C_MODES 7
4083 enum machine_mode constant_modes[NR_C_MODES] =
4094 struct constant *next;
4099 struct constant_pool
4101 struct constant_pool *next;
4106 struct constant *constants[NR_C_MODES];
4111 static struct constant_pool * s390_mainpool_start (void);
4112 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4113 static void s390_mainpool_cancel (struct constant_pool *);
4115 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4116 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4117 static void s390_chunkify_cancel (struct constant_pool *);
4119 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4120 static void s390_end_pool (struct constant_pool *, rtx);
4121 static void s390_add_pool_insn (struct constant_pool *, rtx);
4122 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4123 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4124 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4125 static rtx s390_dump_pool (struct constant_pool *, bool);
4126 static struct constant_pool *s390_alloc_pool (void);
4127 static void s390_free_pool (struct constant_pool *);
4129 /* Create new constant pool covering instructions starting at INSN
4130 and chain it to the end of POOL_LIST. */
4132 static struct constant_pool *
4133 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4135 struct constant_pool *pool, **prev;
4137 pool = s390_alloc_pool ();
4138 pool->first_insn = insn;
4140 for (prev = pool_list; *prev; prev = &(*prev)->next)
4147 /* End range of instructions covered by POOL at INSN and emit
4148 placeholder insn representing the pool. */
4151 s390_end_pool (struct constant_pool *pool, rtx insn)
4153 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4156 insn = get_last_insn ();
4158 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4159 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4162 /* Add INSN to the list of insns covered by POOL. */
4165 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4167 bitmap_set_bit (pool->insns, INSN_UID (insn));
4170 /* Return pool out of POOL_LIST that covers INSN. */
4172 static struct constant_pool *
4173 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4175 struct constant_pool *pool;
4177 for (pool = pool_list; pool; pool = pool->next)
4178 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4184 /* Add constant VAL of mode MODE to the constant pool POOL. */
4187 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4192 for (i = 0; i < NR_C_MODES; i++)
4193 if (constant_modes[i] == mode)
4195 if (i == NR_C_MODES)
4198 for (c = pool->constants[i]; c != NULL; c = c->next)
4199 if (rtx_equal_p (val, c->value))
4204 c = (struct constant *) xmalloc (sizeof *c);
4206 c->label = gen_label_rtx ();
4207 c->next = pool->constants[i];
4208 pool->constants[i] = c;
4209 pool->size += GET_MODE_SIZE (mode);
4213 /* Find constant VAL of mode MODE in the constant pool POOL.
4214 Return an RTX describing the distance from the start of
4215 the pool to the location of the new constant. */
4218 s390_find_constant (struct constant_pool *pool, rtx val,
4219 enum machine_mode mode)
4225 for (i = 0; i < NR_C_MODES; i++)
4226 if (constant_modes[i] == mode)
4228 if (i == NR_C_MODES)
4231 for (c = pool->constants[i]; c != NULL; c = c->next)
4232 if (rtx_equal_p (val, c->value))
4238 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4239 gen_rtx_LABEL_REF (Pmode, pool->label));
4240 offset = gen_rtx_CONST (Pmode, offset);
4244 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4245 do not emit the pool base label. */
4248 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4254 /* Pool start insn switches to proper section
4255 and guarantees necessary alignment. */
4256 if (TARGET_CPU_ZARCH)
4257 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4259 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4260 INSN_ADDRESSES_NEW (insn, -1);
4264 insn = emit_label_after (pool->label, insn);
4265 INSN_ADDRESSES_NEW (insn, -1);
4268 /* Dump constants in descending alignment requirement order,
4269 ensuring proper alignment for every constant. */
4270 for (i = 0; i < NR_C_MODES; i++)
4271 for (c = pool->constants[i]; c; c = c->next)
4273 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4274 rtx value = c->value;
4275 if (GET_CODE (value) == CONST
4276 && GET_CODE (XEXP (value, 0)) == UNSPEC
4277 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4278 && XVECLEN (XEXP (value, 0), 0) == 1)
4280 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4281 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4282 value = gen_rtx_CONST (VOIDmode, value);
4285 insn = emit_label_after (c->label, insn);
4286 INSN_ADDRESSES_NEW (insn, -1);
4288 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4289 gen_rtvec (1, value),
4290 UNSPECV_POOL_ENTRY);
4291 insn = emit_insn_after (value, insn);
4292 INSN_ADDRESSES_NEW (insn, -1);
4295 /* Pool end insn switches back to previous section
4296 and guarantees necessary alignment. */
4297 if (TARGET_CPU_ZARCH)
4298 insn = emit_insn_after (gen_pool_end_64 (), insn);
4300 insn = emit_insn_after (gen_pool_end_31 (), insn);
4301 INSN_ADDRESSES_NEW (insn, -1);
4303 insn = emit_barrier_after (insn);
4304 INSN_ADDRESSES_NEW (insn, -1);
4306 /* Remove placeholder insn. */
4307 remove_insn (pool->pool_insn);
4312 /* Allocate new constant_pool structure. */
4314 static struct constant_pool *
4315 s390_alloc_pool (void)
4317 struct constant_pool *pool;
4320 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4322 for (i = 0; i < NR_C_MODES; i++)
4323 pool->constants[i] = NULL;
4325 pool->label = gen_label_rtx ();
4326 pool->first_insn = NULL_RTX;
4327 pool->pool_insn = NULL_RTX;
4328 pool->insns = BITMAP_XMALLOC ();
4334 /* Free all memory used by POOL. */
4337 s390_free_pool (struct constant_pool *pool)
4341 for (i = 0; i < NR_C_MODES; i++)
4343 struct constant *c = pool->constants[i];
4346 struct constant *next = c->next;
4352 BITMAP_XFREE (pool->insns);
4357 /* Collect main literal pool. Return NULL on overflow. */
4359 static struct constant_pool *
4360 s390_mainpool_start (void)
4362 struct constant_pool *pool;
4365 pool = s390_alloc_pool ();
4367 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4369 if (GET_CODE (insn) == INSN
4370 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4371 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4373 if (pool->pool_insn)
4375 pool->pool_insn = insn;
4378 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4380 rtx pool_ref = NULL_RTX;
4381 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4384 rtx constant = get_pool_constant (pool_ref);
4385 enum machine_mode mode = get_pool_mode (pool_ref);
4386 s390_add_constant (pool, constant, mode);
4391 if (!pool->pool_insn)
4394 if (pool->size >= 4096)
4396 /* We're going to chunkify the pool, so remove the main
4397 pool placeholder insn. */
4398 remove_insn (pool->pool_insn);
4400 s390_free_pool (pool);
4407 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4408 Modify the current function to output the pool constants as well as
4409 the pool register setup instruction. BASE_REG is the register to
4410 be used as pool base register. */
4413 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4417 /* If the pool is empty, we're done. */
4418 if (pool->size == 0)
4420 remove_insn (pool->pool_insn);
4421 s390_free_pool (pool);
4425 /* We need correct insn addresses. */
4426 shorten_branches (get_insns ());
4428 /* On zSeries, we use a LARL to load the pool register. The pool is
4429 located in the .rodata section, so we emit it after the function. */
4430 if (TARGET_CPU_ZARCH)
4432 insn = gen_main_base_64 (base_reg, pool->label);
4433 insn = emit_insn_after (insn, pool->pool_insn);
4434 INSN_ADDRESSES_NEW (insn, -1);
4435 remove_insn (pool->pool_insn);
4437 insn = get_last_insn ();
4438 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4439 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4441 s390_dump_pool (pool, 0);
4444 /* On S/390, if the total size of the function's code plus literal pool
4445 does not exceed 4096 bytes, we use BASR to set up a function base
4446 pointer, and emit the literal pool at the end of the function. */
4447 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4448 + pool->size + 8 /* alignment slop */ < 4096)
4450 insn = gen_main_base_31_small (base_reg, pool->label);
4451 insn = emit_insn_after (insn, pool->pool_insn);
4452 INSN_ADDRESSES_NEW (insn, -1);
4453 remove_insn (pool->pool_insn);
4455 insn = emit_label_after (pool->label, insn);
4456 INSN_ADDRESSES_NEW (insn, -1);
4458 insn = get_last_insn ();
4459 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4460 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4462 s390_dump_pool (pool, 1);
4465 /* Otherwise, we emit an inline literal pool and use BASR to branch
4466 over it, setting up the pool register at the same time. */
4469 rtx pool_end = gen_label_rtx ();
4471 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4472 insn = emit_insn_after (insn, pool->pool_insn);
4473 INSN_ADDRESSES_NEW (insn, -1);
4474 remove_insn (pool->pool_insn);
4476 insn = emit_label_after (pool->label, insn);
4477 INSN_ADDRESSES_NEW (insn, -1);
4479 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4480 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4482 insn = emit_label_after (pool_end, pool->pool_insn);
4483 INSN_ADDRESSES_NEW (insn, -1);
4485 s390_dump_pool (pool, 1);
4489 /* Replace all literal pool references. */
4491 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4494 replace_ltrel_base (&PATTERN (insn), base_reg);
4496 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4498 rtx addr, pool_ref = NULL_RTX;
4499 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4502 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4503 get_pool_mode (pool_ref));
4504 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4505 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4506 INSN_CODE (insn) = -1;
4512 /* Free the pool. */
4513 s390_free_pool (pool);
4516 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4517 We have decided we cannot use this pool, so revert all changes
4518 to the current function that were done by s390_mainpool_start. */
4520 s390_mainpool_cancel (struct constant_pool *pool)
4522 /* We didn't actually change the instruction stream, so simply
4523 free the pool memory. */
4524 s390_free_pool (pool);
4528 /* Chunkify the literal pool. BASE_REG is to be used as pool
4531 #define S390_POOL_CHUNK_MIN 0xc00
4532 #define S390_POOL_CHUNK_MAX 0xe00
4534 static struct constant_pool *
4535 s390_chunkify_start (rtx base_reg)
4537 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4540 rtx pending_ltrel = NULL_RTX;
4543 rtx (*gen_reload_base) (rtx, rtx) =
4544 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4547 /* We need correct insn addresses. */
4549 shorten_branches (get_insns ());
4551 /* Scan all insns and move literals to pool chunks. */
4553 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4555 /* Check for pending LTREL_BASE. */
4558 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4561 if (ltrel_base == pending_ltrel)
4562 pending_ltrel = NULL_RTX;
4568 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4570 rtx pool_ref = NULL_RTX;
4571 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4574 rtx constant = get_pool_constant (pool_ref);
4575 enum machine_mode mode = get_pool_mode (pool_ref);
4578 curr_pool = s390_start_pool (&pool_list, insn);
4580 s390_add_constant (curr_pool, constant, mode);
4581 s390_add_pool_insn (curr_pool, insn);
4583 /* Don't split the pool chunk between a LTREL_OFFSET load
4584 and the corresponding LTREL_BASE. */
4585 if (GET_CODE (constant) == CONST
4586 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4587 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4591 pending_ltrel = pool_ref;
4596 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4599 s390_add_pool_insn (curr_pool, insn);
4600 /* An LTREL_BASE must follow within the same basic block. */
4606 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4607 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4610 if (TARGET_CPU_ZARCH)
4612 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4615 s390_end_pool (curr_pool, NULL_RTX);
4620 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4621 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4624 /* We will later have to insert base register reload insns.
4625 Those will have an effect on code size, which we need to
4626 consider here. This calculation makes rather pessimistic
4627 worst-case assumptions. */
4628 if (GET_CODE (insn) == CODE_LABEL)
4631 if (chunk_size < S390_POOL_CHUNK_MIN
4632 && curr_pool->size < S390_POOL_CHUNK_MIN)
4635 /* Pool chunks can only be inserted after BARRIERs ... */
4636 if (GET_CODE (insn) == BARRIER)
4638 s390_end_pool (curr_pool, insn);
4643 /* ... so if we don't find one in time, create one. */
4644 else if ((chunk_size > S390_POOL_CHUNK_MAX
4645 || curr_pool->size > S390_POOL_CHUNK_MAX))
4647 rtx label, jump, barrier;
4649 /* We can insert the barrier only after a 'real' insn. */
4650 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4652 if (get_attr_length (insn) == 0)
4655 /* Don't separate LTREL_BASE from the corresponding
4656 LTREL_OFFSET load. */
4660 label = gen_label_rtx ();
4661 jump = emit_jump_insn_after (gen_jump (label), insn);
4662 barrier = emit_barrier_after (jump);
4663 insn = emit_label_after (label, barrier);
4664 JUMP_LABEL (jump) = label;
4665 LABEL_NUSES (label) = 1;
4667 INSN_ADDRESSES_NEW (jump, -1);
4668 INSN_ADDRESSES_NEW (barrier, -1);
4669 INSN_ADDRESSES_NEW (insn, -1);
4671 s390_end_pool (curr_pool, barrier);
4679 s390_end_pool (curr_pool, NULL_RTX);
4684 /* Find all labels that are branched into
4685 from an insn belonging to a different chunk. */
4687 far_labels = BITMAP_XMALLOC ();
4689 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4691 /* Labels marked with LABEL_PRESERVE_P can be target
4692 of non-local jumps, so we have to mark them.
4693 The same holds for named labels.
4695 Don't do that, however, if it is the label before
4698 if (GET_CODE (insn) == CODE_LABEL
4699 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4701 rtx vec_insn = next_real_insn (insn);
4702 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4703 PATTERN (vec_insn) : NULL_RTX;
4705 || !(GET_CODE (vec_pat) == ADDR_VEC
4706 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4707 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4710 /* If we have a direct jump (conditional or unconditional)
4711 or a casesi jump, check all potential targets. */
4712 else if (GET_CODE (insn) == JUMP_INSN)
4714 rtx pat = PATTERN (insn);
4715 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4716 pat = XVECEXP (pat, 0, 0);
4718 if (GET_CODE (pat) == SET)
4720 rtx label = JUMP_LABEL (insn);
4723 if (s390_find_pool (pool_list, label)
4724 != s390_find_pool (pool_list, insn))
4725 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4728 else if (GET_CODE (pat) == PARALLEL
4729 && XVECLEN (pat, 0) == 2
4730 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4731 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4732 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4734 /* Find the jump table used by this casesi jump. */
4735 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4736 rtx vec_insn = next_real_insn (vec_label);
4737 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4738 PATTERN (vec_insn) : NULL_RTX;
4740 && (GET_CODE (vec_pat) == ADDR_VEC
4741 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4743 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4745 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4747 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4749 if (s390_find_pool (pool_list, label)
4750 != s390_find_pool (pool_list, insn))
4751 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4758 /* Insert base register reload insns before every pool. */
4760 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4762 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4763 rtx insn = curr_pool->first_insn;
4764 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4767 /* Insert base register reload insns at every far label. */
4769 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4770 if (GET_CODE (insn) == CODE_LABEL
4771 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4773 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4776 rtx new_insn = gen_reload_base (base_reg, pool->label);
4777 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4782 BITMAP_XFREE (far_labels);
4785 /* Recompute insn addresses. */
4787 init_insn_lengths ();
4788 shorten_branches (get_insns ());
4793 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4794 After we have decided to use this list, finish implementing
4795 all changes to the current function as required. BASE_REG is
4796 to be used as pool base register. */
4799 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
4801 struct constant_pool *curr_pool = NULL;
4805 /* Replace all literal pool references. */
4807 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4810 replace_ltrel_base (&PATTERN (insn), base_reg);
4812 curr_pool = s390_find_pool (pool_list, insn);
4816 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4818 rtx addr, pool_ref = NULL_RTX;
4819 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4822 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
4823 get_pool_mode (pool_ref));
4824 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4825 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4826 INSN_CODE (insn) = -1;
4831 /* Dump out all literal pools. */
4833 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4834 s390_dump_pool (curr_pool, 0);
4836 /* Free pool list. */
4840 struct constant_pool *next = pool_list->next;
4841 s390_free_pool (pool_list);
4846 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4847 We have decided we cannot use this list, so revert all changes
4848 to the current function that were done by s390_chunkify_start. */
4851 s390_chunkify_cancel (struct constant_pool *pool_list)
4853 struct constant_pool *curr_pool = NULL;
4856 /* Remove all pool placeholder insns. */
4858 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4860 /* Did we insert an extra barrier? Remove it. */
4861 rtx barrier = PREV_INSN (curr_pool->pool_insn);
4862 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
4863 rtx label = NEXT_INSN (curr_pool->pool_insn);
4865 if (jump && GET_CODE (jump) == JUMP_INSN
4866 && barrier && GET_CODE (barrier) == BARRIER
4867 && label && GET_CODE (label) == CODE_LABEL
4868 && GET_CODE (PATTERN (jump)) == SET
4869 && SET_DEST (PATTERN (jump)) == pc_rtx
4870 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
4871 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
4874 remove_insn (barrier);
4875 remove_insn (label);
4878 remove_insn (curr_pool->pool_insn);
4881 /* Remove all base register reload insns. */
4883 for (insn = get_insns (); insn; )
4885 rtx next_insn = NEXT_INSN (insn);
4887 if (GET_CODE (insn) == INSN
4888 && GET_CODE (PATTERN (insn)) == SET
4889 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
4890 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
4896 /* Free pool list. */
4900 struct constant_pool *next = pool_list->next;
4901 s390_free_pool (pool_list);
4907 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
4910 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
4914 switch (GET_MODE_CLASS (mode))
4917 if (GET_CODE (exp) != CONST_DOUBLE)
4920 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
4921 assemble_real (r, mode, align);
4925 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
4934 /* Rework the prolog/epilog to avoid saving/restoring
4935 registers unnecessarily. BASE_USED specifies whether
4936 the literal pool base register needs to be saved. */
4939 s390_optimize_prolog (bool base_used)
4941 int save_first, save_last, restore_first, restore_last;
4943 rtx insn, new_insn, next_insn;
4945 /* Recompute regs_ever_live data for special registers. */
4946 regs_ever_live[BASE_REGISTER] = base_used;
4947 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
4948 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
4951 /* Find first and last gpr to be saved. */
4953 for (i = 6; i < 16; i++)
4954 if (regs_ever_live[i])
4956 || i == STACK_POINTER_REGNUM
4957 || i == RETURN_REGNUM
4958 || i == BASE_REGISTER
4959 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
4962 for (j = 15; j > i; j--)
4963 if (regs_ever_live[j])
4965 || j == STACK_POINTER_REGNUM
4966 || j == RETURN_REGNUM
4967 || j == BASE_REGISTER
4968 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
4973 /* Nothing to save/restore. */
4974 save_first = restore_first = -1;
4975 save_last = restore_last = -1;
4979 /* Save/restore from i to j. */
4980 save_first = restore_first = i;
4981 save_last = restore_last = j;
4984 /* Varargs functions need to save gprs 2 to 6. */
4985 if (current_function_stdarg)
4993 /* If all special registers are in fact used, there's nothing we
4994 can do, so no point in walking the insn list. */
4995 if (i <= BASE_REGISTER && j >= BASE_REGISTER
4996 && (TARGET_CPU_ZARCH || (i <= RETURN_REGNUM && j >= RETURN_REGNUM)))
5000 /* Search for prolog/epilog insns and replace them. */
5002 for (insn = get_insns (); insn; insn = next_insn)
5004 int first, last, off;
5005 rtx set, base, offset;
5007 next_insn = NEXT_INSN (insn);
5009 if (GET_CODE (insn) != INSN)
5012 if (GET_CODE (PATTERN (insn)) == PARALLEL
5013 && store_multiple_operation (PATTERN (insn), VOIDmode))
5015 set = XVECEXP (PATTERN (insn), 0, 0);
5016 first = REGNO (SET_SRC (set));
5017 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5018 offset = const0_rtx;
5019 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5020 off = INTVAL (offset) - first * UNITS_PER_WORD;
5022 if (GET_CODE (base) != REG || off < 0)
5024 if (first > BASE_REGISTER || last < BASE_REGISTER)
5027 if (save_first != -1)
5029 new_insn = save_gprs (base, off, save_first, save_last);
5030 new_insn = emit_insn_before (new_insn, insn);
5031 INSN_ADDRESSES_NEW (new_insn, -1);
5038 if (GET_CODE (PATTERN (insn)) == SET
5039 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5040 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGISTER
5041 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5043 set = PATTERN (insn);
5044 offset = const0_rtx;
5045 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5046 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5048 if (GET_CODE (base) != REG || off < 0)
5051 if (save_first != -1)
5053 new_insn = save_gprs (base, off, save_first, save_last);
5054 new_insn = emit_insn_before (new_insn, insn);
5055 INSN_ADDRESSES_NEW (new_insn, -1);
5062 if (GET_CODE (PATTERN (insn)) == PARALLEL
5063 && load_multiple_operation (PATTERN (insn), VOIDmode))
5065 set = XVECEXP (PATTERN (insn), 0, 0);
5066 first = REGNO (SET_DEST (set));
5067 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5068 offset = const0_rtx;
5069 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5070 off = INTVAL (offset) - first * UNITS_PER_WORD;
5072 if (GET_CODE (base) != REG || off < 0)
5074 if (first > BASE_REGISTER || last < BASE_REGISTER)
5077 if (restore_first != -1)
5079 new_insn = restore_gprs (base, off, restore_first, restore_last);
5080 new_insn = emit_insn_before (new_insn, insn);
5081 INSN_ADDRESSES_NEW (new_insn, -1);
5088 if (GET_CODE (PATTERN (insn)) == SET
5089 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5090 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGISTER
5091 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5093 set = PATTERN (insn);
5094 offset = const0_rtx;
5095 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5096 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5098 if (GET_CODE (base) != REG || off < 0)
5101 if (restore_first != -1)
5103 new_insn = restore_gprs (base, off, restore_first, restore_last);
5104 new_insn = emit_insn_before (new_insn, insn);
5105 INSN_ADDRESSES_NEW (new_insn, -1);
5114 /* Perform machine-dependent processing. */
5119 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5120 bool base_used = false;
5121 bool pool_overflow = false;
5123 /* Make sure all splits have been performed; splits after
5124 machine_dependent_reorg might confuse insn length counts. */
5125 split_all_insns_noflow ();
5128 /* In small leaf functions, try to use an unused call-clobbered
5129 register as base register to avoid save/restore overhead. */
5130 if (current_function_is_leaf && !regs_ever_live[5])
5131 base_reg = gen_rtx_REG (Pmode, 5);
5134 /* Install the main literal pool and the associated base
5135 register load insns.
5137 In addition, there are two problematic situations we need
5140 - the literal pool might be > 4096 bytes in size, so that
5141 some of its elements cannot be directly accessed
5143 - a branch target might be > 64K away from the branch, so that
5144 it is not possible to use a PC-relative instruction.
5146 To fix those, we split the single literal pool into multiple
5147 pool chunks, reloading the pool base register at various
5148 points throughout the function to ensure it always points to
5149 the pool chunk the following code expects, and / or replace
5150 PC-relative branches by absolute branches.
5152 However, the two problems are interdependent: splitting the
5153 literal pool can move a branch further away from its target,
5154 causing the 64K limit to overflow, and on the other hand,
5155 replacing a PC-relative branch by an absolute branch means
5156 we need to put the branch target address into the literal
5157 pool, possibly causing it to overflow.
5159 So, we loop trying to fix up both problems until we manage
5160 to satisfy both conditions at the same time. Note that the
5161 loop is guaranteed to terminate as every pass of the loop
5162 strictly decreases the total number of PC-relative branches
5163 in the function. (This is not completely true as there
5164 might be branch-over-pool insns introduced by chunkify_start.
5165 Those never need to be split however.) */
5169 struct constant_pool *pool = NULL;
5171 /* Collect the literal pool. */
5174 pool = s390_mainpool_start ();
5176 pool_overflow = true;
5179 /* If literal pool overflowed, start to chunkify it. */
5181 pool = s390_chunkify_start (base_reg);
5183 /* Split out-of-range branches. If this has created new
5184 literal pool entries, cancel current chunk list and
5185 recompute it. zSeries machines have large branch
5186 instructions, so we never need to split a branch. */
5187 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5190 s390_chunkify_cancel (pool);
5192 s390_mainpool_cancel (pool);
5197 /* If we made it up to here, both conditions are satisfied.
5198 Finish up literal pool related changes. */
5199 if ((pool_overflow || pool->size > 0)
5200 && REGNO (base_reg) == BASE_REGISTER)
5204 s390_chunkify_finish (pool, base_reg);
5206 s390_mainpool_finish (pool, base_reg);
5211 s390_optimize_prolog (base_used);
5215 /* Return an RTL expression representing the value of the return address
5216 for the frame COUNT steps up from the current frame. FRAME is the
5217 frame pointer of that frame. */
5220 s390_return_addr_rtx (int count, rtx frame)
5224 /* Without backchain, we fail for all but the current frame. */
5226 if (!TARGET_BACKCHAIN && count > 0)
5229 /* For the current frame, we need to make sure the initial
5230 value of RETURN_REGNUM is actually saved. */
5233 cfun->machine->save_return_addr_p = true;
5235 /* To retrieve the return address we read the stack slot where the
5236 corresponding RETURN_REGNUM value was saved. */
5238 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5239 addr = memory_address (Pmode, addr);
5240 return gen_rtx_MEM (Pmode, addr);
5243 /* Find first call clobbered register unused in a function.
5244 This could be used as base register in a leaf function
5245 or for holding the return address before epilogue. */
5248 find_unused_clobbered_reg (void)
5251 for (i = 0; i < 6; i++)
5252 if (!regs_ever_live[i])
5257 /* Fill FRAME with info about frame of current function. */
5260 s390_frame_info (void)
5263 HOST_WIDE_INT fsize = get_frame_size ();
5265 if (!TARGET_64BIT && fsize > 0x7fff0000)
5266 fatal_error ("Total size of local variables exceeds architecture limit.");
5268 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5269 cfun->machine->save_fprs_p = 0;
5271 for (i = 24; i < 32; i++)
5272 if (regs_ever_live[i] && !global_regs[i])
5274 cfun->machine->save_fprs_p = 1;
5278 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5280 /* Does function need to setup frame and save area. */
5282 if (! current_function_is_leaf
5283 || cfun->machine->frame_size > 0
5284 || current_function_calls_alloca
5285 || current_function_stdarg)
5286 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5288 /* If we use the return register, we'll need to make sure
5289 it is going to be saved/restored. */
5291 if (!current_function_is_leaf
5292 || regs_ever_live[RETURN_REGNUM])
5293 cfun->machine->save_return_addr_p = 1;
5295 /* Find first and last gpr to be saved. Note that at this point,
5296 we assume the base register and -on S/390- the return register
5297 always need to be saved. This is done because the usage of these
5298 register might change even after the prolog was emitted.
5299 If it turns out later that we really don't need them, the
5300 prolog/epilog code is modified again. */
5302 regs_ever_live[BASE_REGISTER] = 1;
5303 if (!TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p)
5304 regs_ever_live[RETURN_REGNUM] = 1;
5305 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5307 for (i = 6; i < 16; i++)
5308 if (regs_ever_live[i])
5310 || i == STACK_POINTER_REGNUM
5311 || i == RETURN_REGNUM
5312 || i == BASE_REGISTER
5313 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5316 for (j = 15; j > i; j--)
5317 if (regs_ever_live[j])
5319 || j == STACK_POINTER_REGNUM
5320 || j == RETURN_REGNUM
5321 || j == BASE_REGISTER
5322 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5325 /* Save / Restore from gpr i to j. */
5326 cfun->machine->first_save_gpr = i;
5327 cfun->machine->first_restore_gpr = i;
5328 cfun->machine->last_save_gpr = j;
5330 /* Varargs functions need to save gprs 2 to 6. */
5331 if (current_function_stdarg)
5332 cfun->machine->first_save_gpr = 2;
5335 /* Return offset between argument pointer and frame pointer
5336 initially after prologue. */
5339 s390_arg_frame_offset (void)
5341 HOST_WIDE_INT fsize = get_frame_size ();
5344 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5347 for (i = 24; i < 32; i++)
5348 if (regs_ever_live[i] && !global_regs[i])
5354 fsize = fsize + save_fprs_p * 64;
5356 /* Does function need to setup frame and save area. */
5358 if (! current_function_is_leaf
5360 || current_function_calls_alloca
5361 || current_function_stdarg)
5362 fsize += STARTING_FRAME_OFFSET;
5363 return fsize + STACK_POINTER_OFFSET;
5366 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5367 to register BASE. Return generated insn. */
5370 save_fpr (rtx base, int offset, int regnum)
5373 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5374 set_mem_alias_set (addr, s390_sr_alias_set);
5376 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5379 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5380 to register BASE. Return generated insn. */
5383 restore_fpr (rtx base, int offset, int regnum)
5386 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5387 set_mem_alias_set (addr, s390_sr_alias_set);
5389 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5392 /* Generate insn to save registers FIRST to LAST into
5393 the register save area located at offset OFFSET
5394 relative to register BASE. */
5397 save_gprs (rtx base, int offset, int first, int last)
5399 rtx addr, insn, note;
5402 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5403 addr = gen_rtx_MEM (Pmode, addr);
5404 set_mem_alias_set (addr, s390_sr_alias_set);
5406 /* Special-case single register. */
5410 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5412 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5414 RTX_FRAME_RELATED_P (insn) = 1;
5419 insn = gen_store_multiple (addr,
5420 gen_rtx_REG (Pmode, first),
5421 GEN_INT (last - first + 1));
5424 /* We need to set the FRAME_RELATED flag on all SETs
5425 inside the store-multiple pattern.
5427 However, we must not emit DWARF records for registers 2..5
5428 if they are stored for use by variable arguments ...
5430 ??? Unfortunately, it is not enough to simply not the the
5431 FRAME_RELATED flags for those SETs, because the first SET
5432 of the PARALLEL is always treated as if it had the flag
5433 set, even if it does not. Therefore we emit a new pattern
5434 without those registers as REG_FRAME_RELATED_EXPR note. */
5438 rtx pat = PATTERN (insn);
5440 for (i = 0; i < XVECLEN (pat, 0); i++)
5441 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5442 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5444 RTX_FRAME_RELATED_P (insn) = 1;
5448 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5449 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5450 gen_rtx_REG (Pmode, 6),
5451 GEN_INT (last - 6 + 1));
5452 note = PATTERN (note);
5455 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5456 note, REG_NOTES (insn));
5458 for (i = 0; i < XVECLEN (note, 0); i++)
5459 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5460 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5462 RTX_FRAME_RELATED_P (insn) = 1;
5468 /* Generate insn to restore registers FIRST to LAST from
5469 the register save area located at offset OFFSET
5470 relative to register BASE. */
5473 restore_gprs (rtx base, int offset, int first, int last)
5477 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5478 addr = gen_rtx_MEM (Pmode, addr);
5479 set_mem_alias_set (addr, s390_sr_alias_set);
5481 /* Special-case single register. */
5485 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5487 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5492 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5494 GEN_INT (last - first + 1));
5498 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5499 annotate generated insns with REG_MAYBE_DEAD notes. */
5501 static GTY(()) rtx got_symbol;
5503 s390_load_got (int maybe_dead)
5507 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5508 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5511 if (TARGET_CPU_ZARCH)
5513 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5515 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5522 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5523 UNSPEC_LTREL_OFFSET);
5524 offset = gen_rtx_CONST (Pmode, offset);
5525 offset = force_const_mem (Pmode, offset);
5527 insn = emit_move_insn (pic_offset_table_rtx, offset);
5529 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5532 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5534 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5536 insn = emit_move_insn (pic_offset_table_rtx, offset);
5538 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5543 /* Expand the prologue into a bunch of separate insns. */
5546 s390_emit_prologue (void)
5552 /* Compute frame_info. */
5556 /* Choose best register to use for temp use within prologue.
5557 See below for why TPF must use the register 1. */
5559 if (!current_function_is_leaf
5561 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5563 temp_reg = gen_rtx_REG (Pmode, 1);
5565 /* Save call saved gprs. */
5567 insn = save_gprs (stack_pointer_rtx, 0,
5568 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5571 /* Dummy insn to mark literal pool slot. */
5573 emit_insn (gen_main_pool ());
5575 /* Save fprs for variable args. */
5577 if (current_function_stdarg)
5578 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5579 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5581 /* Save fprs 4 and 6 if used (31 bit ABI). */
5584 for (i = 18; i < 20; i++)
5585 if (regs_ever_live[i] && !global_regs[i])
5587 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5588 RTX_FRAME_RELATED_P (insn) = 1;
5591 /* Decrement stack pointer. */
5593 if (cfun->machine->frame_size > 0)
5595 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5597 /* Save incoming stack pointer into temp reg. */
5599 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5601 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5604 /* Subtract frame size from stack pointer. */
5606 if (DISP_IN_RANGE (INTVAL (frame_off)))
5608 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5609 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5611 insn = emit_insn (insn);
5615 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5616 frame_off = force_const_mem (Pmode, frame_off);
5618 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5621 RTX_FRAME_RELATED_P (insn) = 1;
5623 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5624 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5625 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5626 GEN_INT (-cfun->machine->frame_size))),
5629 /* Set backchain. */
5631 if (TARGET_BACKCHAIN)
5633 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5634 set_mem_alias_set (addr, s390_sr_alias_set);
5635 insn = emit_insn (gen_move_insn (addr, temp_reg));
5638 /* If we support asynchronous exceptions (e.g. for Java),
5639 we need to make sure the backchain pointer is set up
5640 before any possibly trapping memory access. */
5642 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5644 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5645 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5649 /* Save fprs 8 - 15 (64 bit ABI). */
5651 if (cfun->machine->save_fprs_p)
5653 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5655 for (i = 24; i < 32; i++)
5656 if (regs_ever_live[i] && !global_regs[i])
5658 rtx addr = plus_constant (stack_pointer_rtx,
5659 cfun->machine->frame_size - 64 + (i-24)*8);
5661 insn = save_fpr (temp_reg, (i-24)*8, i);
5662 RTX_FRAME_RELATED_P (insn) = 1;
5664 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5665 gen_rtx_SET (VOIDmode,
5666 gen_rtx_MEM (DFmode, addr),
5667 gen_rtx_REG (DFmode, i)),
5672 /* Set frame pointer, if needed. */
5674 if (frame_pointer_needed)
5676 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5677 RTX_FRAME_RELATED_P (insn) = 1;
5680 /* Set up got pointer, if needed. */
5682 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5683 s390_load_got(true);
5687 /* Generate a BAS instruction to serve as a function
5688 entry intercept to facilitate the use of tracing
5689 algorithms located at the branch target. */
5690 emit_insn (gen_prologue_tpf ());
5692 /* Emit a blockage here so that all code
5693 lies between the profiling mechanisms. */
5694 emit_insn (gen_blockage ());
5698 /* Expand the epilogue into a bunch of separate insns. */
5701 s390_emit_epilogue (bool sibcall)
5703 rtx frame_pointer, return_reg;
5704 int area_bottom, area_top, offset = 0;
5711 /* Generate a BAS instruction to serve as a function
5712 entry intercept to facilitate the use of tracing
5713 algorithms located at the branch target. */
5715 /* Emit a blockage here so that all code
5716 lies between the profiling mechanisms. */
5717 emit_insn (gen_blockage ());
5719 emit_insn (gen_epilogue_tpf ());
5722 /* Check whether to use frame or stack pointer for restore. */
5724 frame_pointer = frame_pointer_needed ?
5725 hard_frame_pointer_rtx : stack_pointer_rtx;
5727 /* Compute which parts of the save area we need to access. */
5729 if (cfun->machine->first_restore_gpr != -1)
5731 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5732 area_top = (cfun->machine->last_save_gpr + 1) * UNITS_PER_WORD;
5736 area_bottom = INT_MAX;
5742 if (cfun->machine->save_fprs_p)
5744 if (area_bottom > -64)
5752 for (i = 18; i < 20; i++)
5753 if (regs_ever_live[i] && !global_regs[i])
5755 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5756 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5757 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5758 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5762 /* Check whether we can access the register save area.
5763 If not, increment the frame pointer as required. */
5765 if (area_top <= area_bottom)
5767 /* Nothing to restore. */
5769 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5770 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5772 /* Area is in range. */
5773 offset = cfun->machine->frame_size;
5777 rtx insn, frame_off;
5779 offset = area_bottom < 0 ? -area_bottom : 0;
5780 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5782 if (DISP_IN_RANGE (INTVAL (frame_off)))
5784 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5785 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5786 insn = emit_insn (insn);
5790 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5791 frame_off = force_const_mem (Pmode, frame_off);
5793 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5797 /* Restore call saved fprs. */
5801 if (cfun->machine->save_fprs_p)
5802 for (i = 24; i < 32; i++)
5803 if (regs_ever_live[i] && !global_regs[i])
5804 restore_fpr (frame_pointer,
5805 offset - 64 + (i-24) * 8, i);
5809 for (i = 18; i < 20; i++)
5810 if (regs_ever_live[i] && !global_regs[i])
5811 restore_fpr (frame_pointer,
5812 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5815 /* Return register. */
5817 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5819 /* Restore call saved gprs. */
5821 if (cfun->machine->first_restore_gpr != -1)
5826 /* Check for global register and save them
5827 to stack location from where they get restored. */
5829 for (i = cfun->machine->first_restore_gpr;
5830 i <= cfun->machine->last_save_gpr;
5833 /* These registers are special and need to be
5834 restored in any case. */
5835 if (i == STACK_POINTER_REGNUM
5836 || i == RETURN_REGNUM
5837 || i == BASE_REGISTER
5838 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5843 addr = plus_constant (frame_pointer,
5844 offset + i * UNITS_PER_WORD);
5845 addr = gen_rtx_MEM (Pmode, addr);
5846 set_mem_alias_set (addr, s390_sr_alias_set);
5847 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
5853 /* Fetch return address from stack before load multiple,
5854 this will do good for scheduling. */
5856 if (cfun->machine->save_return_addr_p
5857 || (cfun->machine->first_restore_gpr < BASE_REGISTER
5858 && cfun->machine->last_save_gpr > RETURN_REGNUM))
5860 int return_regnum = find_unused_clobbered_reg();
5863 return_reg = gen_rtx_REG (Pmode, return_regnum);
5865 addr = plus_constant (frame_pointer,
5866 offset + RETURN_REGNUM * UNITS_PER_WORD);
5867 addr = gen_rtx_MEM (Pmode, addr);
5868 set_mem_alias_set (addr, s390_sr_alias_set);
5869 emit_move_insn (return_reg, addr);
5873 /* ??? As references to the base register are not made
5874 explicit in insn RTX code, we have to add a barrier here
5875 to prevent incorrect scheduling. */
5877 emit_insn (gen_blockage());
5879 insn = restore_gprs (frame_pointer, offset,
5880 cfun->machine->first_restore_gpr,
5881 cfun->machine->last_save_gpr);
5888 /* Return to caller. */
5890 p = rtvec_alloc (2);
5892 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
5893 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
5894 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
5899 /* Return the size in bytes of a function argument of
5900 type TYPE and/or mode MODE. At least one of TYPE or
5901 MODE must be specified. */
5904 s390_function_arg_size (enum machine_mode mode, tree type)
5907 return int_size_in_bytes (type);
5909 /* No type info available for some library calls ... */
5910 if (mode != BLKmode)
5911 return GET_MODE_SIZE (mode);
5913 /* If we have neither type nor mode, abort */
5917 /* Return true if a function argument of type TYPE and mode MODE
5918 is to be passed in a floating-point register, if available. */
5921 s390_function_arg_float (enum machine_mode mode, tree type)
5923 int size = s390_function_arg_size (mode, type);
5927 /* Soft-float changes the ABI: no floating-point registers are used. */
5928 if (TARGET_SOFT_FLOAT)
5931 /* No type info available for some library calls ... */
5933 return mode == SFmode || mode == DFmode;
5935 /* The ABI says that record types with a single member are treated
5936 just like that member would be. */
5937 while (TREE_CODE (type) == RECORD_TYPE)
5939 tree field, single = NULL_TREE;
5941 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
5943 if (TREE_CODE (field) != FIELD_DECL)
5946 if (single == NULL_TREE)
5947 single = TREE_TYPE (field);
5952 if (single == NULL_TREE)
5958 return TREE_CODE (type) == REAL_TYPE;
5961 /* Return true if a function argument of type TYPE and mode MODE
5962 is to be passed in an integer register, or a pair of integer
5963 registers, if available. */
5966 s390_function_arg_integer (enum machine_mode mode, tree type)
5968 int size = s390_function_arg_size (mode, type);
5972 /* No type info available for some library calls ... */
5974 return GET_MODE_CLASS (mode) == MODE_INT
5975 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
5977 /* We accept small integral (and similar) types. */
5978 if (INTEGRAL_TYPE_P (type)
5979 || POINTER_TYPE_P (type)
5980 || TREE_CODE (type) == OFFSET_TYPE
5981 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
5984 /* We also accept structs of size 1, 2, 4, 8 that are not
5985 passed in floating-point registers. */
5986 if (AGGREGATE_TYPE_P (type)
5987 && exact_log2 (size) >= 0
5988 && !s390_function_arg_float (mode, type))
5994 /* Return 1 if a function argument of type TYPE and mode MODE
5995 is to be passed by reference. The ABI specifies that only
5996 structures of size 1, 2, 4, or 8 bytes are passed by value,
5997 all other structures (and complex numbers) are passed by
6001 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
6003 int size = s390_function_arg_size (mode, type);
6009 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6012 if (TREE_CODE (type) == COMPLEX_TYPE
6013 || TREE_CODE (type) == VECTOR_TYPE)
6020 /* Update the data in CUM to advance over an argument of mode MODE and
6021 data type TYPE. (TYPE is null for libcalls where that information
6022 may not be available.). The boolean NAMED specifies whether the
6023 argument is a named argument (as opposed to an unnamed argument
6024 matching an ellipsis). */
6027 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6028 tree type, int named ATTRIBUTE_UNUSED)
6030 if (s390_function_arg_pass_by_reference (mode, type))
6034 else if (s390_function_arg_float (mode, type))
6038 else if (s390_function_arg_integer (mode, type))
6040 int size = s390_function_arg_size (mode, type);
6041 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6047 /* Define where to put the arguments to a function.
6048 Value is zero to push the argument on the stack,
6049 or a hard register in which to store the argument.
6051 MODE is the argument's machine mode.
6052 TYPE is the data type of the argument (as a tree).
6053 This is null for libcalls where that information may
6055 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6056 the preceding args and about the function being called.
6057 NAMED is nonzero if this argument is a named parameter
6058 (otherwise it is an extra parameter matching an ellipsis).
6060 On S/390, we use general purpose registers 2 through 6 to
6061 pass integer, pointer, and certain structure arguments, and
6062 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6063 to pass floating point arguments. All remaining arguments
6064 are pushed to the stack. */
6067 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6068 int named ATTRIBUTE_UNUSED)
6070 if (s390_function_arg_pass_by_reference (mode, type))
6073 if (s390_function_arg_float (mode, type))
6075 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6078 return gen_rtx_REG (mode, cum->fprs + 16);
6080 else if (s390_function_arg_integer (mode, type))
6082 int size = s390_function_arg_size (mode, type);
6083 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6085 if (cum->gprs + n_gprs > 5)
6088 return gen_rtx_REG (mode, cum->gprs + 2);
6091 /* After the real arguments, expand_call calls us once again
6092 with a void_type_node type. Whatever we return here is
6093 passed as operand 2 to the call expanders.
6095 We don't need this feature ... */
6096 else if (type == void_type_node)
6102 /* Return true if return values of type TYPE should be returned
6103 in a memory buffer whose address is passed by the caller as
6104 hidden first argument. */
6107 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6109 /* We accept small integral (and similar) types. */
6110 if (INTEGRAL_TYPE_P (type)
6111 || POINTER_TYPE_P (type)
6112 || TREE_CODE (type) == OFFSET_TYPE
6113 || TREE_CODE (type) == REAL_TYPE)
6114 return int_size_in_bytes (type) > 8;
6116 /* Aggregates and similar constructs are always returned
6118 if (AGGREGATE_TYPE_P (type)
6119 || TREE_CODE (type) == COMPLEX_TYPE
6120 || TREE_CODE (type) == VECTOR_TYPE)
6123 /* ??? We get called on all sorts of random stuff from
6124 aggregate_value_p. We can't abort, but it's not clear
6125 what's safe to return. Pretend it's a struct I guess. */
6129 /* Define where to return a (scalar) value of type TYPE.
6130 If TYPE is null, define where to return a (scalar)
6131 value of mode MODE from a libcall. */
6134 s390_function_value (tree type, enum machine_mode mode)
6138 int unsignedp = TYPE_UNSIGNED (type);
6139 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6142 if (GET_MODE_CLASS (mode) != MODE_INT
6143 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6145 if (GET_MODE_SIZE (mode) > 8)
6148 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6149 return gen_rtx_REG (mode, 16);
6151 return gen_rtx_REG (mode, 2);
6155 /* Create and return the va_list datatype.
6157 On S/390, va_list is an array type equivalent to
6159 typedef struct __va_list_tag
6163 void *__overflow_arg_area;
6164 void *__reg_save_area;
6167 where __gpr and __fpr hold the number of general purpose
6168 or floating point arguments used up to now, respectively,
6169 __overflow_arg_area points to the stack location of the
6170 next argument passed on the stack, and __reg_save_area
6171 always points to the start of the register area in the
6172 call frame of the current function. The function prologue
6173 saves all registers used for argument passing into this
6174 area if the function uses variable arguments. */
6177 s390_build_builtin_va_list (void)
6179 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6181 record = lang_hooks.types.make_type (RECORD_TYPE);
6184 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6186 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6187 long_integer_type_node);
6188 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6189 long_integer_type_node);
6190 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6192 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6195 DECL_FIELD_CONTEXT (f_gpr) = record;
6196 DECL_FIELD_CONTEXT (f_fpr) = record;
6197 DECL_FIELD_CONTEXT (f_ovf) = record;
6198 DECL_FIELD_CONTEXT (f_sav) = record;
6200 TREE_CHAIN (record) = type_decl;
6201 TYPE_NAME (record) = type_decl;
6202 TYPE_FIELDS (record) = f_gpr;
6203 TREE_CHAIN (f_gpr) = f_fpr;
6204 TREE_CHAIN (f_fpr) = f_ovf;
6205 TREE_CHAIN (f_ovf) = f_sav;
6207 layout_type (record);
6209 /* The correct type is an array type of one element. */
6210 return build_array_type (record, build_index_type (size_zero_node));
6213 /* Implement va_start by filling the va_list structure VALIST.
6214 STDARG_P is always true, and ignored.
6215 NEXTARG points to the first anonymous stack argument.
6217 The following global variables are used to initialize
6218 the va_list structure:
6220 current_function_args_info:
6221 holds number of gprs and fprs used for named arguments.
6222 current_function_arg_offset_rtx:
6223 holds the offset of the first anonymous stack argument
6224 (relative to the virtual arg pointer). */
6227 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6229 HOST_WIDE_INT n_gpr, n_fpr;
6231 tree f_gpr, f_fpr, f_ovf, f_sav;
6232 tree gpr, fpr, ovf, sav, t;
6234 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6235 f_fpr = TREE_CHAIN (f_gpr);
6236 f_ovf = TREE_CHAIN (f_fpr);
6237 f_sav = TREE_CHAIN (f_ovf);
6239 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6240 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6241 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6242 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6243 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6245 /* Count number of gp and fp argument registers used. */
6247 n_gpr = current_function_args_info.gprs;
6248 n_fpr = current_function_args_info.fprs;
6250 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6251 TREE_SIDE_EFFECTS (t) = 1;
6252 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6254 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6255 TREE_SIDE_EFFECTS (t) = 1;
6256 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6258 /* Find the overflow area. */
6259 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6261 off = INTVAL (current_function_arg_offset_rtx);
6262 off = off < 0 ? 0 : off;
6263 if (TARGET_DEBUG_ARG)
6264 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6265 (int)n_gpr, (int)n_fpr, off);
6267 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6269 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6270 TREE_SIDE_EFFECTS (t) = 1;
6271 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6273 /* Find the register save area. */
6274 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6275 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6276 build_int_2 (-STACK_POINTER_OFFSET, -1));
6277 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6278 TREE_SIDE_EFFECTS (t) = 1;
6279 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6282 /* Implement va_arg by updating the va_list structure
6283 VALIST as required to retrieve an argument of type
6284 TYPE, and returning that argument.
6286 Generates code equivalent to:
6288 if (integral value) {
6289 if (size <= 4 && args.gpr < 5 ||
6290 size > 4 && args.gpr < 4 )
6291 ret = args.reg_save_area[args.gpr+8]
6293 ret = *args.overflow_arg_area++;
6294 } else if (float value) {
6296 ret = args.reg_save_area[args.fpr+64]
6298 ret = *args.overflow_arg_area++;
6299 } else if (aggregate value) {
6301 ret = *args.reg_save_area[args.gpr]
6303 ret = **args.overflow_arg_area++;
6307 s390_va_arg (tree valist, tree type)
6309 tree f_gpr, f_fpr, f_ovf, f_sav;
6310 tree gpr, fpr, ovf, sav, reg, t, u;
6311 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6312 rtx lab_false, lab_over, addr_rtx, r;
6314 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6315 f_fpr = TREE_CHAIN (f_gpr);
6316 f_ovf = TREE_CHAIN (f_fpr);
6317 f_sav = TREE_CHAIN (f_ovf);
6319 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6320 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6321 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6322 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6323 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6325 size = int_size_in_bytes (type);
6327 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6329 if (TARGET_DEBUG_ARG)
6331 fprintf (stderr, "va_arg: aggregate type");
6335 /* Aggregates are passed by reference. */
6339 sav_ofs = 2 * UNITS_PER_WORD;
6340 sav_scale = UNITS_PER_WORD;
6341 size = UNITS_PER_WORD;
6344 else if (s390_function_arg_float (TYPE_MODE (type), type))
6346 if (TARGET_DEBUG_ARG)
6348 fprintf (stderr, "va_arg: float type");
6352 /* FP args go in FP registers, if present. */
6356 sav_ofs = 16 * UNITS_PER_WORD;
6358 /* TARGET_64BIT has up to 4 parameter in fprs */
6359 max_reg = TARGET_64BIT ? 3 : 1;
6363 if (TARGET_DEBUG_ARG)
6365 fprintf (stderr, "va_arg: other type");
6369 /* Otherwise into GP registers. */
6372 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6373 sav_ofs = 2 * UNITS_PER_WORD;
6375 if (size < UNITS_PER_WORD)
6376 sav_ofs += UNITS_PER_WORD - size;
6378 sav_scale = UNITS_PER_WORD;
6385 /* Pull the value out of the saved registers ... */
6387 lab_false = gen_label_rtx ();
6388 lab_over = gen_label_rtx ();
6389 addr_rtx = gen_reg_rtx (Pmode);
6391 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL),
6393 GT, const1_rtx, Pmode, 0, lab_false);
6396 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6400 u = build (MULT_EXPR, long_integer_type_node,
6401 reg, build_int_2 (sav_scale, 0));
6402 TREE_SIDE_EFFECTS (u) = 1;
6404 t = build (PLUS_EXPR, ptr_type_node, t, u);
6405 TREE_SIDE_EFFECTS (t) = 1;
6407 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6409 emit_move_insn (addr_rtx, r);
6412 emit_jump_insn (gen_jump (lab_over));
6414 emit_label (lab_false);
6416 /* ... Otherwise out of the overflow area. */
6418 t = save_expr (ovf);
6421 /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */
6422 if (size < UNITS_PER_WORD)
6424 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0));
6425 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6426 TREE_SIDE_EFFECTS (t) = 1;
6427 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6429 t = save_expr (ovf);
6432 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6434 emit_move_insn (addr_rtx, r);
6436 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6437 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6438 TREE_SIDE_EFFECTS (t) = 1;
6439 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6441 emit_label (lab_over);
6443 /* If less than max_regs a registers are retrieved out
6444 of register save area, increment. */
6446 u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6447 build_int_2 (n_reg, 0));
6448 TREE_SIDE_EFFECTS (u) = 1;
6449 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
6453 r = gen_rtx_MEM (Pmode, addr_rtx);
6454 set_mem_alias_set (r, get_varargs_alias_set ());
6455 emit_move_insn (addr_rtx, r);
6467 S390_BUILTIN_THREAD_POINTER,
6468 S390_BUILTIN_SET_THREAD_POINTER,
6473 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6478 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6484 s390_init_builtins (void)
6488 ftype = build_function_type (ptr_type_node, void_list_node);
6489 builtin_function ("__builtin_thread_pointer", ftype,
6490 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6493 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6494 builtin_function ("__builtin_set_thread_pointer", ftype,
6495 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6499 /* Expand an expression EXP that calls a built-in function,
6500 with result going to TARGET if that's convenient
6501 (and in mode MODE if that's convenient).
6502 SUBTARGET may be used as the target for computing one of EXP's operands.
6503 IGNORE is nonzero if the value is to be ignored. */
6506 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6507 enum machine_mode mode ATTRIBUTE_UNUSED,
6508 int ignore ATTRIBUTE_UNUSED)
6512 unsigned int const *code_for_builtin =
6513 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6515 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6516 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6517 tree arglist = TREE_OPERAND (exp, 1);
6518 enum insn_code icode;
6519 rtx op[MAX_ARGS], pat;
6523 if (fcode >= S390_BUILTIN_max)
6524 internal_error ("bad builtin fcode");
6525 icode = code_for_builtin[fcode];
6527 internal_error ("bad builtin fcode");
6529 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6531 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6533 arglist = TREE_CHAIN (arglist), arity++)
6535 const struct insn_operand_data *insn_op;
6537 tree arg = TREE_VALUE (arglist);
6538 if (arg == error_mark_node)
6540 if (arity > MAX_ARGS)
6543 insn_op = &insn_data[icode].operand[arity + nonvoid];
6545 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6547 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6548 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6553 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6555 || GET_MODE (target) != tmode
6556 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6557 target = gen_reg_rtx (tmode);
6563 pat = GEN_FCN (icode) (target);
6567 pat = GEN_FCN (icode) (target, op[0]);
6569 pat = GEN_FCN (icode) (op[0]);
6572 pat = GEN_FCN (icode) (target, op[0], op[1]);
6588 /* Output assembly code for the trampoline template to
6591 On S/390, we use gpr 1 internally in the trampoline code;
6592 gpr 0 is used to hold the static chain. */
6595 s390_trampoline_template (FILE *file)
6599 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6600 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6601 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6602 fprintf (file, "br\t%s\n", reg_names[1]);
6603 fprintf (file, "0:\t.quad\t0\n");
6604 fprintf (file, ".quad\t0\n");
6608 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6609 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6610 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6611 fprintf (file, "br\t%s\n", reg_names[1]);
6612 fprintf (file, ".long\t0\n");
6613 fprintf (file, ".long\t0\n");
6617 /* Emit RTL insns to initialize the variable parts of a trampoline.
6618 FNADDR is an RTX for the address of the function's pure code.
6619 CXT is an RTX for the static chain value for the function. */
6622 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6624 emit_move_insn (gen_rtx_MEM (Pmode,
6625 memory_address (Pmode,
6626 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6627 emit_move_insn (gen_rtx_MEM (Pmode,
6628 memory_address (Pmode,
6629 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6632 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6633 LOW and HIGH, independent of the host word size. */
6636 s390_gen_rtx_const_DI (int high, int low)
6638 #if HOST_BITS_PER_WIDE_INT >= 64
6640 val = (HOST_WIDE_INT)high;
6642 val |= (HOST_WIDE_INT)low;
6644 return GEN_INT (val);
6646 #if HOST_BITS_PER_WIDE_INT >= 32
6647 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6654 /* Output assembler code to FILE to increment profiler label # LABELNO
6655 for profiling a function entry. */
6658 s390_function_profiler (FILE *file, int labelno)
6663 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6665 fprintf (file, "# function profiler \n");
6667 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6668 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6669 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6671 op[2] = gen_rtx_REG (Pmode, 1);
6672 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6673 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6675 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6678 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6679 op[4] = gen_rtx_CONST (Pmode, op[4]);
6684 output_asm_insn ("stg\t%0,%1", op);
6685 output_asm_insn ("larl\t%2,%3", op);
6686 output_asm_insn ("brasl\t%0,%4", op);
6687 output_asm_insn ("lg\t%0,%1", op);
6691 op[6] = gen_label_rtx ();
6693 output_asm_insn ("st\t%0,%1", op);
6694 output_asm_insn ("bras\t%2,%l6", op);
6695 output_asm_insn (".long\t%4", op);
6696 output_asm_insn (".long\t%3", op);
6697 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6698 output_asm_insn ("l\t%0,0(%2)", op);
6699 output_asm_insn ("l\t%2,4(%2)", op);
6700 output_asm_insn ("basr\t%0,%0", op);
6701 output_asm_insn ("l\t%0,%1", op);
6705 op[5] = gen_label_rtx ();
6706 op[6] = gen_label_rtx ();
6708 output_asm_insn ("st\t%0,%1", op);
6709 output_asm_insn ("bras\t%2,%l6", op);
6710 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6711 output_asm_insn (".long\t%4-%l5", op);
6712 output_asm_insn (".long\t%3-%l5", op);
6713 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6714 output_asm_insn ("lr\t%0,%2", op);
6715 output_asm_insn ("a\t%0,0(%2)", op);
6716 output_asm_insn ("a\t%2,4(%2)", op);
6717 output_asm_insn ("basr\t%0,%0", op);
6718 output_asm_insn ("l\t%0,%1", op);
6722 /* Select section for constant in constant pool. In 32-bit mode,
6723 constants go in the function section; in 64-bit mode in .rodata. */
6726 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6727 rtx x ATTRIBUTE_UNUSED,
6728 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6730 if (TARGET_CPU_ZARCH)
6731 readonly_data_section ();
6733 function_section (current_function_decl);
6736 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6737 into its SYMBOL_REF_FLAGS. */
6740 s390_encode_section_info (tree decl, rtx rtl, int first)
6742 default_encode_section_info (decl, rtl, first);
6744 /* If a variable has a forced alignment to < 2 bytes, mark it with
6745 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6746 if (TREE_CODE (decl) == VAR_DECL
6747 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6748 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6751 /* Output thunk to FILE that implements a C++ virtual function call (with
6752 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6753 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6754 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6755 relative to the resulting this pointer. */
6758 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6759 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6765 /* Operand 0 is the target function. */
6766 op[0] = XEXP (DECL_RTL (function), 0);
6767 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6770 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6771 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6772 op[0] = gen_rtx_CONST (Pmode, op[0]);
6775 /* Operand 1 is the 'this' pointer. */
6776 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6777 op[1] = gen_rtx_REG (Pmode, 3);
6779 op[1] = gen_rtx_REG (Pmode, 2);
6781 /* Operand 2 is the delta. */
6782 op[2] = GEN_INT (delta);
6784 /* Operand 3 is the vcall_offset. */
6785 op[3] = GEN_INT (vcall_offset);
6787 /* Operand 4 is the temporary register. */
6788 op[4] = gen_rtx_REG (Pmode, 1);
6790 /* Operands 5 to 8 can be used as labels. */
6796 /* Operand 9 can be used for temporary register. */
6799 /* Generate code. */
6802 /* Setup literal pool pointer if required. */
6803 if ((!DISP_IN_RANGE (delta)
6804 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6805 || (!DISP_IN_RANGE (vcall_offset)
6806 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6808 op[5] = gen_label_rtx ();
6809 output_asm_insn ("larl\t%4,%5", op);
6812 /* Add DELTA to this pointer. */
6815 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6816 output_asm_insn ("la\t%1,%2(%1)", op);
6817 else if (DISP_IN_RANGE (delta))
6818 output_asm_insn ("lay\t%1,%2(%1)", op);
6819 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6820 output_asm_insn ("aghi\t%1,%2", op);
6823 op[6] = gen_label_rtx ();
6824 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
6828 /* Perform vcall adjustment. */
6831 if (DISP_IN_RANGE (vcall_offset))
6833 output_asm_insn ("lg\t%4,0(%1)", op);
6834 output_asm_insn ("ag\t%1,%3(%4)", op);
6836 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6838 output_asm_insn ("lghi\t%4,%3", op);
6839 output_asm_insn ("ag\t%4,0(%1)", op);
6840 output_asm_insn ("ag\t%1,0(%4)", op);
6844 op[7] = gen_label_rtx ();
6845 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
6846 output_asm_insn ("ag\t%4,0(%1)", op);
6847 output_asm_insn ("ag\t%1,0(%4)", op);
6851 /* Jump to target. */
6852 output_asm_insn ("jg\t%0", op);
6854 /* Output literal pool if required. */
6857 output_asm_insn (".align\t4", op);
6858 targetm.asm_out.internal_label (file, "L",
6859 CODE_LABEL_NUMBER (op[5]));
6863 targetm.asm_out.internal_label (file, "L",
6864 CODE_LABEL_NUMBER (op[6]));
6865 output_asm_insn (".long\t%2", op);
6869 targetm.asm_out.internal_label (file, "L",
6870 CODE_LABEL_NUMBER (op[7]));
6871 output_asm_insn (".long\t%3", op);
6876 /* Setup base pointer if required. */
6878 || (!DISP_IN_RANGE (delta)
6879 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6880 || (!DISP_IN_RANGE (delta)
6881 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6883 op[5] = gen_label_rtx ();
6884 output_asm_insn ("basr\t%4,0", op);
6885 targetm.asm_out.internal_label (file, "L",
6886 CODE_LABEL_NUMBER (op[5]));
6889 /* Add DELTA to this pointer. */
6892 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6893 output_asm_insn ("la\t%1,%2(%1)", op);
6894 else if (DISP_IN_RANGE (delta))
6895 output_asm_insn ("lay\t%1,%2(%1)", op);
6896 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6897 output_asm_insn ("ahi\t%1,%2", op);
6900 op[6] = gen_label_rtx ();
6901 output_asm_insn ("a\t%1,%6-%5(%4)", op);
6905 /* Perform vcall adjustment. */
6908 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
6910 output_asm_insn ("lg\t%4,0(%1)", op);
6911 output_asm_insn ("a\t%1,%3(%4)", op);
6913 else if (DISP_IN_RANGE (vcall_offset))
6915 output_asm_insn ("lg\t%4,0(%1)", op);
6916 output_asm_insn ("ay\t%1,%3(%4)", op);
6918 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6920 output_asm_insn ("lhi\t%4,%3", op);
6921 output_asm_insn ("a\t%4,0(%1)", op);
6922 output_asm_insn ("a\t%1,0(%4)", op);
6926 op[7] = gen_label_rtx ();
6927 output_asm_insn ("l\t%4,%7-%5(%4)", op);
6928 output_asm_insn ("a\t%4,0(%1)", op);
6929 output_asm_insn ("a\t%1,0(%4)", op);
6932 /* We had to clobber the base pointer register.
6933 Re-setup the base pointer (with a different base). */
6934 op[5] = gen_label_rtx ();
6935 output_asm_insn ("basr\t%4,0", op);
6936 targetm.asm_out.internal_label (file, "L",
6937 CODE_LABEL_NUMBER (op[5]));
6940 /* Jump to target. */
6941 op[8] = gen_label_rtx ();
6944 output_asm_insn ("l\t%4,%8-%5(%4)", op);
6946 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6947 /* We cannot call through .plt, since .plt requires %r12 loaded. */
6948 else if (flag_pic == 1)
6950 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6951 output_asm_insn ("l\t%4,%0(%4)", op);
6953 else if (flag_pic == 2)
6955 op[9] = gen_rtx_REG (Pmode, 0);
6956 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
6957 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6958 output_asm_insn ("ar\t%4,%9", op);
6959 output_asm_insn ("l\t%4,0(%4)", op);
6962 output_asm_insn ("br\t%4", op);
6964 /* Output literal pool. */
6965 output_asm_insn (".align\t4", op);
6967 if (nonlocal && flag_pic == 2)
6968 output_asm_insn (".long\t%0", op);
6971 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
6972 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
6975 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
6977 output_asm_insn (".long\t%0", op);
6979 output_asm_insn (".long\t%0-%5", op);
6983 targetm.asm_out.internal_label (file, "L",
6984 CODE_LABEL_NUMBER (op[6]));
6985 output_asm_insn (".long\t%2", op);
6989 targetm.asm_out.internal_label (file, "L",
6990 CODE_LABEL_NUMBER (op[7]));
6991 output_asm_insn (".long\t%3", op);
6997 s390_valid_pointer_mode (enum machine_mode mode)
6999 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7002 /* How to allocate a 'struct machine_function'. */
7004 static struct machine_function *
7005 s390_init_machine_status (void)
7007 return ggc_alloc_cleared (sizeof (struct machine_function));
7010 /* Checks whether the given ARGUMENT_LIST would use a caller
7011 saved register. This is used to decide whether sibling call
7012 optimization could be performed on the respective function
7016 s390_call_saved_register_used (tree argument_list)
7018 CUMULATIVE_ARGS cum;
7020 enum machine_mode mode;
7025 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
7027 while (argument_list)
7029 parameter = TREE_VALUE (argument_list);
7030 argument_list = TREE_CHAIN (argument_list);
7035 /* For an undeclared variable passed as parameter we will get
7036 an ERROR_MARK node here. */
7037 if (TREE_CODE (parameter) == ERROR_MARK)
7040 if (! (type = TREE_TYPE (parameter)))
7043 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
7046 if (s390_function_arg_pass_by_reference (mode, type))
7049 type = build_pointer_type (type);
7052 parm_rtx = s390_function_arg (&cum, mode, type, 0);
7054 s390_function_arg_advance (&cum, mode, type, 0);
7056 if (parm_rtx && REG_P (parm_rtx))
7059 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
7061 if (! call_used_regs[reg + REGNO (parm_rtx)])
7068 /* Return true if the given call expression can be
7069 turned into a sibling call.
7070 DECL holds the declaration of the function to be called whereas
7071 EXP is the call expression itself. */
7074 s390_function_ok_for_sibcall (tree decl, tree exp)
7076 /* The TPF epilogue uses register 1. */
7080 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
7081 which would have to be restored before the sibcall. */
7082 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
7085 /* Register 6 on s390 is available as an argument register but unfortunately
7086 "caller saved". This makes functions needing this register for arguments
7087 not suitable for sibcalls. */
7088 if (TREE_OPERAND (exp, 1)
7089 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
7095 /* This function is used by the call expanders of the machine description.
7096 It emits the call insn itself together with the necessary operations
7097 to adjust the target address and returns the emitted insn.
7098 ADDR_LOCATION is the target address rtx
7099 TLS_CALL the location of the thread-local symbol
7100 RESULT_REG the register where the result of the call should be stored
7101 RETADDR_REG the register where the return address should be stored
7102 If this parameter is NULL_RTX the call is considered
7103 to be a sibling call. */
7106 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
7109 bool plt_call = false;
7115 /* Direct function calls need special treatment. */
7116 if (GET_CODE (addr_location) == SYMBOL_REF)
7118 /* When calling a global routine in PIC mode, we must
7119 replace the symbol itself with the PLT stub. */
7120 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
7122 addr_location = gen_rtx_UNSPEC (Pmode,
7123 gen_rtvec (1, addr_location),
7125 addr_location = gen_rtx_CONST (Pmode, addr_location);
7129 /* Unless we can use the bras(l) insn, force the
7130 routine address into a register. */
7131 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
7134 addr_location = legitimize_pic_address (addr_location, 0);
7136 addr_location = force_reg (Pmode, addr_location);
7140 /* If it is already an indirect call or the code above moved the
7141 SYMBOL_REF to somewhere else make sure the address can be found in
7143 if (retaddr_reg == NULL_RTX
7144 && GET_CODE (addr_location) != SYMBOL_REF
7147 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
7148 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
7151 addr_location = gen_rtx_MEM (QImode, addr_location);
7152 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
7154 if (result_reg != NULL_RTX)
7155 call = gen_rtx_SET (VOIDmode, result_reg, call);
7157 if (retaddr_reg != NULL_RTX)
7159 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
7161 if (tls_call != NULL_RTX)
7162 vec = gen_rtvec (3, call, clobber,
7163 gen_rtx_USE (VOIDmode, tls_call));
7165 vec = gen_rtvec (2, call, clobber);
7167 call = gen_rtx_PARALLEL (VOIDmode, vec);
7170 insn = emit_call_insn (call);
7172 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
7173 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
7175 /* s390_function_ok_for_sibcall should
7176 have denied sibcalls in this case. */
7177 if (retaddr_reg == NULL_RTX)
7180 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
7185 /* Implement CONDITIONAL_REGISTER_USAGE. */
7188 s390_conditional_register_usage (void)
7194 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7195 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7197 if (TARGET_CPU_ZARCH)
7199 fixed_regs[RETURN_REGNUM] = 0;
7200 call_used_regs[RETURN_REGNUM] = 0;
7204 for (i = 24; i < 32; i++)
7205 call_used_regs[i] = call_really_used_regs[i] = 0;
7209 for (i = 18; i < 20; i++)
7210 call_used_regs[i] = call_really_used_regs[i] = 0;
7215 #include "gt-s390.h"