1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
53 #include "tree-gimple.h"
55 /* Machine-specific symbol_ref flags. */
56 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
59 static bool s390_assemble_integer (rtx, unsigned int, int);
60 static void s390_select_rtx_section (enum machine_mode, rtx,
61 unsigned HOST_WIDE_INT);
62 static void s390_encode_section_info (tree, rtx, int);
63 static bool s390_cannot_force_const_mem (rtx);
64 static rtx s390_delegitimize_address (rtx);
65 static bool s390_return_in_memory (tree, tree);
66 static void s390_init_builtins (void);
67 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
68 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
70 static enum attr_type s390_safe_attr_type (rtx);
72 static int s390_adjust_cost (rtx, rtx, rtx, int);
73 static int s390_adjust_priority (rtx, int);
74 static int s390_issue_rate (void);
75 static int s390_use_dfa_pipeline_interface (void);
76 static int s390_first_cycle_multipass_dfa_lookahead (void);
77 static bool s390_rtx_costs (rtx, int, int, int *);
78 static int s390_address_cost (rtx);
79 static void s390_reorg (void);
80 static bool s390_valid_pointer_mode (enum machine_mode);
81 static tree s390_build_builtin_va_list (void);
82 static tree s390_gimplify_va_arg (tree, tree, tree *, tree *);
83 static bool s390_function_ok_for_sibcall (tree, tree);
84 static bool s390_call_saved_register_used (tree);
86 #undef TARGET_ASM_ALIGNED_HI_OP
87 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
88 #undef TARGET_ASM_ALIGNED_DI_OP
89 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
90 #undef TARGET_ASM_INTEGER
91 #define TARGET_ASM_INTEGER s390_assemble_integer
93 #undef TARGET_ASM_OPEN_PAREN
94 #define TARGET_ASM_OPEN_PAREN ""
96 #undef TARGET_ASM_CLOSE_PAREN
97 #define TARGET_ASM_CLOSE_PAREN ""
99 #undef TARGET_ASM_SELECT_RTX_SECTION
100 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
102 #undef TARGET_ENCODE_SECTION_INFO
103 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
106 #undef TARGET_HAVE_TLS
107 #define TARGET_HAVE_TLS true
109 #undef TARGET_CANNOT_FORCE_CONST_MEM
110 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
112 #undef TARGET_DELEGITIMIZE_ADDRESS
113 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
115 #undef TARGET_RETURN_IN_MEMORY
116 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
118 #undef TARGET_INIT_BUILTINS
119 #define TARGET_INIT_BUILTINS s390_init_builtins
120 #undef TARGET_EXPAND_BUILTIN
121 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
123 #undef TARGET_ASM_OUTPUT_MI_THUNK
124 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
125 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
126 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
128 #undef TARGET_SCHED_ADJUST_COST
129 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
130 #undef TARGET_SCHED_ADJUST_PRIORITY
131 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
132 #undef TARGET_SCHED_ISSUE_RATE
133 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
134 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
135 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
136 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
137 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
139 #undef TARGET_RTX_COSTS
140 #define TARGET_RTX_COSTS s390_rtx_costs
141 #undef TARGET_ADDRESS_COST
142 #define TARGET_ADDRESS_COST s390_address_cost
144 #undef TARGET_MACHINE_DEPENDENT_REORG
145 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
147 #undef TARGET_VALID_POINTER_MODE
148 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
150 #undef TARGET_BUILD_BUILTIN_VA_LIST
151 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
152 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
153 #define TARGET_GIMPLIFY_VA_ARG_EXPR s390_gimplify_va_arg
155 #undef TARGET_PROMOTE_FUNCTION_ARGS
156 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
157 #undef TARGET_PROMOTE_FUNCTION_RETURN
158 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
160 #undef TARGET_FUNCTION_OK_FOR_SIBCALL
161 #define TARGET_FUNCTION_OK_FOR_SIBCALL s390_function_ok_for_sibcall
163 struct gcc_target targetm = TARGET_INITIALIZER;
165 extern int reload_completed;
167 /* The alias set for prologue/epilogue register save/restore. */
168 static int s390_sr_alias_set = 0;
170 /* Save information from a "cmpxx" operation until the branch or scc is
172 rtx s390_compare_op0, s390_compare_op1;
174 /* Structure used to hold the components of a S/390 memory
175 address. A legitimate address on S/390 is of the general
177 base + index + displacement
178 where any of the components is optional.
180 base and index are registers of the class ADDR_REGS,
181 displacement is an unsigned 12-bit immediate constant. */
191 /* Which cpu are we tuning for. */
192 enum processor_type s390_tune;
193 enum processor_flags s390_tune_flags;
194 /* Which instruction set architecture to use. */
195 enum processor_type s390_arch;
196 enum processor_flags s390_arch_flags;
198 /* Strings to hold which cpu and instruction set architecture to use. */
199 const char *s390_tune_string; /* for -mtune=<xxx> */
200 const char *s390_arch_string; /* for -march=<xxx> */
202 /* Define the structure for the machine field in struct function. */
204 struct machine_function GTY(())
206 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
209 /* Set if return address needs to be saved. */
210 bool save_return_addr_p;
212 /* Number of first and last gpr to be saved, restored. */
214 int first_restore_gpr;
216 int last_restore_gpr;
218 /* Size of stack frame. */
219 HOST_WIDE_INT frame_size;
221 /* Some local-dynamic TLS symbol name. */
222 const char *some_ld_name;
225 static int s390_match_ccmode_set (rtx, enum machine_mode);
226 static int s390_branch_condition_mask (rtx);
227 static const char *s390_branch_condition_mnemonic (rtx, int);
228 static int check_mode (rtx, enum machine_mode *);
229 static int general_s_operand (rtx, enum machine_mode, int);
230 static int s390_short_displacement (rtx);
231 static int s390_decompose_address (rtx, struct s390_address *);
232 static rtx get_thread_pointer (void);
233 static rtx legitimize_tls_address (rtx, rtx);
234 static void print_shift_count_operand (FILE *, rtx);
235 static const char *get_some_local_dynamic_name (void);
236 static int get_some_local_dynamic_name_1 (rtx *, void *);
237 static int reg_used_in_mem_p (int, rtx);
238 static int addr_generation_dependency_p (rtx, rtx);
239 static int s390_split_branches (void);
240 static void find_constant_pool_ref (rtx, rtx *);
241 static void replace_constant_pool_ref (rtx *, rtx, rtx);
242 static rtx find_ltrel_base (rtx);
243 static void replace_ltrel_base (rtx *, rtx);
244 static void s390_optimize_prolog (bool);
245 static int find_unused_clobbered_reg (void);
246 static void s390_frame_info (int, int);
247 static rtx save_fpr (rtx, int, int);
248 static rtx restore_fpr (rtx, int, int);
249 static rtx save_gprs (rtx, int, int, int);
250 static rtx restore_gprs (rtx, int, int, int);
251 static int s390_function_arg_size (enum machine_mode, tree);
252 static bool s390_function_arg_float (enum machine_mode, tree);
253 static struct machine_function * s390_init_machine_status (void);
255 /* Check whether integer displacement is in range. */
256 #define DISP_IN_RANGE(d) \
257 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
258 : ((d) >= 0 && (d) <= 4095))
260 /* Return true if SET either doesn't set the CC register, or else
261 the source and destination have matching CC modes and that
262 CC mode is at least as constrained as REQ_MODE. */
265 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
267 enum machine_mode set_mode;
269 if (GET_CODE (set) != SET)
272 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
275 set_mode = GET_MODE (SET_DEST (set));
289 if (req_mode != set_mode)
294 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
295 && req_mode != CCSRmode && req_mode != CCURmode)
301 if (req_mode != CCAmode)
309 return (GET_MODE (SET_SRC (set)) == set_mode);
312 /* Return true if every SET in INSN that sets the CC register
313 has source and destination with matching CC modes and that
314 CC mode is at least as constrained as REQ_MODE.
315 If REQ_MODE is VOIDmode, always return false. */
318 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
322 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
323 if (req_mode == VOIDmode)
326 if (GET_CODE (PATTERN (insn)) == SET)
327 return s390_match_ccmode_set (PATTERN (insn), req_mode);
329 if (GET_CODE (PATTERN (insn)) == PARALLEL)
330 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
332 rtx set = XVECEXP (PATTERN (insn), 0, i);
333 if (GET_CODE (set) == SET)
334 if (!s390_match_ccmode_set (set, req_mode))
341 /* If a test-under-mask instruction can be used to implement
342 (compare (and ... OP1) OP2), return the CC mode required
343 to do that. Otherwise, return VOIDmode.
344 MIXED is true if the instruction can distinguish between
345 CC1 and CC2 for mixed selected bits (TMxx), it is false
346 if the instruction cannot (TM). */
349 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
353 /* ??? Fixme: should work on CONST_DOUBLE as well. */
354 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
357 /* Selected bits all zero: CC0. */
358 if (INTVAL (op2) == 0)
361 /* Selected bits all one: CC3. */
362 if (INTVAL (op2) == INTVAL (op1))
365 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
368 bit1 = exact_log2 (INTVAL (op2));
369 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
370 if (bit0 != -1 && bit1 != -1)
371 return bit0 > bit1 ? CCT1mode : CCT2mode;
377 /* Given a comparison code OP (EQ, NE, etc.) and the operands
378 OP0 and OP1 of a COMPARE, return the mode to be used for the
382 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
388 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
389 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
391 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
392 || GET_CODE (op1) == NEG)
393 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
396 if (GET_CODE (op0) == AND)
398 /* Check whether we can potentially do it via TM. */
399 enum machine_mode ccmode;
400 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
401 if (ccmode != VOIDmode)
403 /* Relax CCTmode to CCZmode to allow fall-back to AND
404 if that turns out to be beneficial. */
405 return ccmode == CCTmode ? CCZmode : ccmode;
409 if (register_operand (op0, HImode)
410 && GET_CODE (op1) == CONST_INT
411 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
413 if (register_operand (op0, QImode)
414 && GET_CODE (op1) == CONST_INT
415 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
424 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
425 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
427 if (INTVAL (XEXP((op0), 1)) < 0)
440 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
441 && GET_CODE (op1) != CONST_INT)
447 if (GET_CODE (op0) == PLUS
448 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
451 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
452 && GET_CODE (op1) != CONST_INT)
458 if (GET_CODE (op0) == MINUS
459 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
462 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
463 && GET_CODE (op1) != CONST_INT)
472 /* Return nonzero if OP is a valid comparison operator
473 for an ALC condition in mode MODE. */
476 s390_alc_comparison (rtx op, enum machine_mode mode)
478 if (mode != VOIDmode && mode != GET_MODE (op))
481 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
484 if (!COMPARISON_P (op))
487 if (GET_CODE (XEXP (op, 0)) != REG
488 || REGNO (XEXP (op, 0)) != CC_REGNUM
489 || XEXP (op, 1) != const0_rtx)
492 switch (GET_MODE (XEXP (op, 0)))
495 return GET_CODE (op) == LTU;
498 return GET_CODE (op) == LEU;
501 return GET_CODE (op) == GEU;
504 return GET_CODE (op) == GTU;
507 return GET_CODE (op) == LTU;
510 return GET_CODE (op) == UNGT;
513 return GET_CODE (op) == UNLT;
520 /* Return nonzero if OP is a valid comparison operator
521 for an SLB condition in mode MODE. */
524 s390_slb_comparison (rtx op, enum machine_mode mode)
526 if (mode != VOIDmode && mode != GET_MODE (op))
529 while (GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND)
532 if (!COMPARISON_P (op))
535 if (GET_CODE (XEXP (op, 0)) != REG
536 || REGNO (XEXP (op, 0)) != CC_REGNUM
537 || XEXP (op, 1) != const0_rtx)
540 switch (GET_MODE (XEXP (op, 0)))
543 return GET_CODE (op) == GEU;
546 return GET_CODE (op) == GTU;
549 return GET_CODE (op) == LTU;
552 return GET_CODE (op) == LEU;
555 return GET_CODE (op) == GEU;
558 return GET_CODE (op) == LE;
561 return GET_CODE (op) == GE;
568 /* Return branch condition mask to implement a branch
569 specified by CODE. */
572 s390_branch_condition_mask (rtx code)
574 const int CC0 = 1 << 3;
575 const int CC1 = 1 << 2;
576 const int CC2 = 1 << 1;
577 const int CC3 = 1 << 0;
579 if (GET_CODE (XEXP (code, 0)) != REG
580 || REGNO (XEXP (code, 0)) != CC_REGNUM
581 || XEXP (code, 1) != const0_rtx)
584 switch (GET_MODE (XEXP (code, 0)))
587 switch (GET_CODE (code))
590 case NE: return CC1 | CC2 | CC3;
597 switch (GET_CODE (code))
600 case NE: return CC0 | CC2 | CC3;
607 switch (GET_CODE (code))
610 case NE: return CC0 | CC1 | CC3;
617 switch (GET_CODE (code))
620 case NE: return CC0 | CC1 | CC2;
627 switch (GET_CODE (code))
629 case EQ: return CC0 | CC2;
630 case NE: return CC1 | CC3;
637 switch (GET_CODE (code))
639 case LTU: return CC2 | CC3; /* carry */
640 case GEU: return CC0 | CC1; /* no carry */
647 switch (GET_CODE (code))
649 case GTU: return CC0 | CC1; /* borrow */
650 case LEU: return CC2 | CC3; /* no borrow */
657 switch (GET_CODE (code))
659 case EQ: return CC0 | CC2;
660 case NE: return CC1 | CC3;
661 case LTU: return CC1;
662 case GTU: return CC3;
663 case LEU: return CC1 | CC2;
664 case GEU: return CC2 | CC3;
670 switch (GET_CODE (code))
673 case NE: return CC1 | CC2 | CC3;
674 case LTU: return CC1;
675 case GTU: return CC2;
676 case LEU: return CC0 | CC1;
677 case GEU: return CC0 | CC2;
684 switch (GET_CODE (code))
687 case NE: return CC2 | CC1 | CC3;
688 case LTU: return CC2;
689 case GTU: return CC1;
690 case LEU: return CC0 | CC2;
691 case GEU: return CC0 | CC1;
698 switch (GET_CODE (code))
701 case NE: return CC1 | CC2 | CC3;
702 case LT: return CC1 | CC3;
704 case LE: return CC0 | CC1 | CC3;
705 case GE: return CC0 | CC2;
712 switch (GET_CODE (code))
715 case NE: return CC1 | CC2 | CC3;
717 case GT: return CC2 | CC3;
718 case LE: return CC0 | CC1;
719 case GE: return CC0 | CC2 | CC3;
726 switch (GET_CODE (code))
729 case NE: return CC1 | CC2 | CC3;
732 case LE: return CC0 | CC1;
733 case GE: return CC0 | CC2;
734 case UNORDERED: return CC3;
735 case ORDERED: return CC0 | CC1 | CC2;
736 case UNEQ: return CC0 | CC3;
737 case UNLT: return CC1 | CC3;
738 case UNGT: return CC2 | CC3;
739 case UNLE: return CC0 | CC1 | CC3;
740 case UNGE: return CC0 | CC2 | CC3;
741 case LTGT: return CC1 | CC2;
748 switch (GET_CODE (code))
751 case NE: return CC2 | CC1 | CC3;
754 case LE: return CC0 | CC2;
755 case GE: return CC0 | CC1;
756 case UNORDERED: return CC3;
757 case ORDERED: return CC0 | CC2 | CC1;
758 case UNEQ: return CC0 | CC3;
759 case UNLT: return CC2 | CC3;
760 case UNGT: return CC1 | CC3;
761 case UNLE: return CC0 | CC2 | CC3;
762 case UNGE: return CC0 | CC1 | CC3;
763 case LTGT: return CC2 | CC1;
774 /* If INV is false, return assembler mnemonic string to implement
775 a branch specified by CODE. If INV is true, return mnemonic
776 for the corresponding inverted branch. */
779 s390_branch_condition_mnemonic (rtx code, int inv)
781 static const char *const mnemonic[16] =
783 NULL, "o", "h", "nle",
784 "l", "nhe", "lh", "ne",
785 "e", "nlh", "he", "nl",
786 "le", "nh", "no", NULL
789 int mask = s390_branch_condition_mask (code);
794 if (mask < 1 || mask > 14)
797 return mnemonic[mask];
800 /* Return the part of op which has a value different from def.
801 The size of the part is determined by mode.
802 Use this function only if you already know that op really
803 contains such a part. */
805 unsigned HOST_WIDE_INT
806 s390_extract_part (rtx op, enum machine_mode mode, int def)
808 unsigned HOST_WIDE_INT value = 0;
809 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
810 int part_bits = GET_MODE_BITSIZE (mode);
811 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
814 for (i = 0; i < max_parts; i++)
817 value = (unsigned HOST_WIDE_INT) INTVAL (op);
821 if ((value & part_mask) != (def & part_mask))
822 return value & part_mask;
828 /* If OP is an integer constant of mode MODE with exactly one
829 part of mode PART_MODE unequal to DEF, return the number of that
830 part. Otherwise, return -1. */
833 s390_single_part (rtx op,
834 enum machine_mode mode,
835 enum machine_mode part_mode,
838 unsigned HOST_WIDE_INT value = 0;
839 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
840 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
843 if (GET_CODE (op) != CONST_INT)
846 for (i = 0; i < n_parts; i++)
849 value = (unsigned HOST_WIDE_INT) INTVAL (op);
851 value >>= GET_MODE_BITSIZE (part_mode);
853 if ((value & part_mask) != (def & part_mask))
861 return part == -1 ? -1 : n_parts - 1 - part;
864 /* Check whether we can (and want to) split a double-word
865 move in mode MODE from SRC to DST into two single-word
866 moves, moving the subword FIRST_SUBWORD first. */
869 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
871 /* Floating point registers cannot be split. */
872 if (FP_REG_P (src) || FP_REG_P (dst))
875 /* We don't need to split if operands are directly accessible. */
876 if (s_operand (src, mode) || s_operand (dst, mode))
879 /* Non-offsettable memory references cannot be split. */
880 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
881 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
884 /* Moving the first subword must not clobber a register
885 needed to move the second subword. */
886 if (register_operand (dst, mode))
888 rtx subreg = operand_subword (dst, first_subword, 0, mode);
889 if (reg_overlap_mentioned_p (subreg, src))
897 /* Change optimizations to be performed, depending on the
900 LEVEL is the optimization level specified; 2 if `-O2' is
901 specified, 1 if `-O' is specified, and 0 if neither is specified.
903 SIZE is nonzero if `-Os' is specified and zero otherwise. */
906 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
908 /* ??? There are apparently still problems with -fcaller-saves. */
909 flag_caller_saves = 0;
911 /* By default, always emit DWARF-2 unwind info. This allows debugging
912 without maintaining a stack frame back-chain. */
913 flag_asynchronous_unwind_tables = 1;
917 override_options (void)
922 const char *const name; /* processor name or nickname. */
923 const enum processor_type processor;
924 const enum processor_flags flags;
926 const processor_alias_table[] =
928 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
929 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
930 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
931 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
932 | PF_LONG_DISPLACEMENT},
935 int const pta_size = ARRAY_SIZE (processor_alias_table);
937 /* Acquire a unique set number for our register saves and restores. */
938 s390_sr_alias_set = new_alias_set ();
940 /* Set up function hooks. */
941 init_machine_status = s390_init_machine_status;
943 /* Architecture mode defaults according to ABI. */
944 if (!(target_flags_explicit & MASK_ZARCH))
947 target_flags |= MASK_ZARCH;
949 target_flags &= ~MASK_ZARCH;
952 /* Determine processor architectural level. */
953 if (!s390_arch_string)
954 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
956 for (i = 0; i < pta_size; i++)
957 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
959 s390_arch = processor_alias_table[i].processor;
960 s390_arch_flags = processor_alias_table[i].flags;
964 error ("Unknown cpu used in -march=%s.", s390_arch_string);
966 /* Determine processor to tune for. */
967 if (!s390_tune_string)
969 s390_tune = s390_arch;
970 s390_tune_flags = s390_arch_flags;
971 s390_tune_string = s390_arch_string;
975 for (i = 0; i < pta_size; i++)
976 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
978 s390_tune = processor_alias_table[i].processor;
979 s390_tune_flags = processor_alias_table[i].flags;
983 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
987 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
988 error ("z/Architecture mode not supported on %s.", s390_arch_string);
989 if (TARGET_64BIT && !TARGET_ZARCH)
990 error ("64-bit ABI not supported in ESA/390 mode.");
993 /* Map for smallest class containing reg regno. */
995 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
996 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
997 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
998 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
999 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1000 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1001 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1002 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1003 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1004 ADDR_REGS, NO_REGS, ADDR_REGS
1007 /* Return attribute type of insn. */
1009 static enum attr_type
1010 s390_safe_attr_type (rtx insn)
1012 if (recog_memoized (insn) >= 0)
1013 return get_attr_type (insn);
1018 /* Return true if OP a (const_int 0) operand.
1019 OP is the current operation.
1020 MODE is the current operation mode. */
1023 const0_operand (register rtx op, enum machine_mode mode)
1025 return op == CONST0_RTX (mode);
1028 /* Return true if OP is constant.
1029 OP is the current operation.
1030 MODE is the current operation mode. */
1033 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1035 return CONSTANT_P (op);
1038 /* Return true if the mode of operand OP matches MODE.
1039 If MODE is set to VOIDmode, set it to the mode of OP. */
1042 check_mode (register rtx op, enum machine_mode *mode)
1044 if (*mode == VOIDmode)
1045 *mode = GET_MODE (op);
1048 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1054 /* Return true if OP a valid operand for the LARL instruction.
1055 OP is the current operation.
1056 MODE is the current operation mode. */
1059 larl_operand (register rtx op, enum machine_mode mode)
1061 if (! check_mode (op, &mode))
1064 /* Allow labels and local symbols. */
1065 if (GET_CODE (op) == LABEL_REF)
1067 if (GET_CODE (op) == SYMBOL_REF)
1068 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1069 && SYMBOL_REF_TLS_MODEL (op) == 0
1070 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1072 /* Everything else must have a CONST, so strip it. */
1073 if (GET_CODE (op) != CONST)
1077 /* Allow adding *even* in-range constants. */
1078 if (GET_CODE (op) == PLUS)
1080 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1081 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1083 #if HOST_BITS_PER_WIDE_INT > 32
1084 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1085 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1091 /* Labels and local symbols allowed here as well. */
1092 if (GET_CODE (op) == LABEL_REF)
1094 if (GET_CODE (op) == SYMBOL_REF)
1095 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1096 && SYMBOL_REF_TLS_MODEL (op) == 0
1097 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1099 /* Now we must have a @GOTENT offset or @PLT stub
1100 or an @INDNTPOFF TLS offset. */
1101 if (GET_CODE (op) == UNSPEC
1102 && XINT (op, 1) == UNSPEC_GOTENT)
1104 if (GET_CODE (op) == UNSPEC
1105 && XINT (op, 1) == UNSPEC_PLT)
1107 if (GET_CODE (op) == UNSPEC
1108 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1114 /* Helper routine to implement s_operand and s_imm_operand.
1115 OP is the current operation.
1116 MODE is the current operation mode.
1117 ALLOW_IMMEDIATE specifies whether immediate operands should
1118 be accepted or not. */
1121 general_s_operand (register rtx op, enum machine_mode mode,
1122 int allow_immediate)
1124 struct s390_address addr;
1126 /* Call general_operand first, so that we don't have to
1127 check for many special cases. */
1128 if (!general_operand (op, mode))
1131 /* Just like memory_operand, allow (subreg (mem ...))
1133 if (reload_completed
1134 && GET_CODE (op) == SUBREG
1135 && GET_CODE (SUBREG_REG (op)) == MEM)
1136 op = SUBREG_REG (op);
1138 switch (GET_CODE (op))
1140 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1141 is true and we are still before reload. */
1144 if (!allow_immediate || reload_completed)
1148 /* Memory operands are OK unless they already use an
1151 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1153 if (!s390_decompose_address (XEXP (op, 0), &addr))
1157 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1158 is true. This prevents compares between two literal pool
1159 entries from being accepted. */
1160 if (!allow_immediate
1161 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1172 /* Return true if OP is a valid S-type operand.
1173 OP is the current operation.
1174 MODE is the current operation mode. */
1177 s_operand (register rtx op, enum machine_mode mode)
1179 return general_s_operand (op, mode, 0);
1182 /* Return true if OP is a valid S-type operand or an immediate
1183 operand that can be addressed as S-type operand by forcing
1184 it into the literal pool.
1185 OP is the current operation.
1186 MODE is the current operation mode. */
1189 s_imm_operand (register rtx op, enum machine_mode mode)
1191 return general_s_operand (op, mode, 1);
1194 /* Return true if OP a valid shift count operand.
1195 OP is the current operation.
1196 MODE is the current operation mode. */
1199 shift_count_operand (rtx op, enum machine_mode mode)
1201 HOST_WIDE_INT offset = 0;
1203 if (! check_mode (op, &mode))
1206 /* We can have an integer constant, an address register,
1207 or a sum of the two. Note that reload already checks
1208 that any register present is an address register, so
1209 we just check for any register here. */
1210 if (GET_CODE (op) == CONST_INT)
1212 offset = INTVAL (op);
1215 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1217 offset = INTVAL (XEXP (op, 1));
1220 while (op && GET_CODE (op) == SUBREG)
1221 op = SUBREG_REG (op);
1222 if (op && GET_CODE (op) != REG)
1225 /* Unfortunately we have to reject constants that are invalid
1226 for an address, or else reload will get confused. */
1227 if (!DISP_IN_RANGE (offset))
1233 /* Return true if DISP is a valid short displacement. */
1236 s390_short_displacement (rtx disp)
1238 /* No displacement is OK. */
1242 /* Integer displacement in range. */
1243 if (GET_CODE (disp) == CONST_INT)
1244 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1246 /* GOT offset is not OK, the GOT can be large. */
1247 if (GET_CODE (disp) == CONST
1248 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1249 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1252 /* All other symbolic constants are literal pool references,
1253 which are OK as the literal pool must be small. */
1254 if (GET_CODE (disp) == CONST)
1260 /* Return true if OP is a valid operand for a C constraint. */
1263 s390_extra_constraint_str (rtx op, int c, const char * str)
1265 struct s390_address addr;
1273 if (GET_CODE (op) != MEM)
1275 if (!s390_decompose_address (XEXP (op, 0), &addr))
1280 if (TARGET_LONG_DISPLACEMENT)
1282 if (!s390_short_displacement (addr.disp))
1288 if (GET_CODE (op) != MEM)
1291 if (TARGET_LONG_DISPLACEMENT)
1293 if (!s390_decompose_address (XEXP (op, 0), &addr))
1295 if (!s390_short_displacement (addr.disp))
1301 if (!TARGET_LONG_DISPLACEMENT)
1303 if (GET_CODE (op) != MEM)
1305 if (!s390_decompose_address (XEXP (op, 0), &addr))
1309 if (s390_short_displacement (addr.disp))
1314 if (!TARGET_LONG_DISPLACEMENT)
1316 if (GET_CODE (op) != MEM)
1318 /* Any invalid address here will be fixed up by reload,
1319 so accept it for the most generic constraint. */
1320 if (s390_decompose_address (XEXP (op, 0), &addr)
1321 && s390_short_displacement (addr.disp))
1326 if (TARGET_LONG_DISPLACEMENT)
1328 if (!s390_decompose_address (op, &addr))
1330 if (!s390_short_displacement (addr.disp))
1336 if (!TARGET_LONG_DISPLACEMENT)
1338 /* Any invalid address here will be fixed up by reload,
1339 so accept it for the most generic constraint. */
1340 if (s390_decompose_address (op, &addr)
1341 && s390_short_displacement (addr.disp))
1346 return shift_count_operand (op, VOIDmode);
1355 /* Return true if VALUE matches the constraint STR. */
1358 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1362 enum machine_mode mode, part_mode;
1372 return (unsigned int)value < 256;
1375 return (unsigned int)value < 4096;
1378 return value >= -32768 && value < 32768;
1381 return (TARGET_LONG_DISPLACEMENT ?
1382 (value >= -524288 && value <= 524287)
1383 : (value >= 0 && value <= 4095));
1385 return value == 2147483647;
1388 part = str[1] - '0';
1392 case 'H': part_mode = HImode; break;
1393 case 'Q': part_mode = QImode; break;
1399 case 'H': mode = HImode; break;
1400 case 'S': mode = SImode; break;
1401 case 'D': mode = DImode; break;
1407 case '0': def = 0; break;
1408 case 'F': def = -1; break;
1412 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1415 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1427 /* Compute a (partial) cost for rtx X. Return true if the complete
1428 cost has been computed, and false if subexpressions should be
1429 scanned. In either case, *TOTAL contains the cost result. */
1432 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1437 if (GET_CODE (XEXP (x, 0)) == MINUS
1438 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1445 /* Force_const_mem does not work out of reload, because the
1446 saveable_obstack is set to reload_obstack, which does not
1447 live long enough. Because of this we cannot use force_const_mem
1448 in addsi3. This leads to problems with gen_add2_insn with a
1449 constant greater than a short. Because of that we give an
1450 addition of greater constants a cost of 3 (reload1.c 10096). */
1451 /* ??? saveable_obstack no longer exists. */
1452 if (outer_code == PLUS
1453 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1454 *total = COSTS_N_INSNS (3);
1475 *total = COSTS_N_INSNS (1);
1479 if (GET_MODE (XEXP (x, 0)) == DImode)
1480 *total = COSTS_N_INSNS (40);
1482 *total = COSTS_N_INSNS (7);
1489 *total = COSTS_N_INSNS (33);
1497 /* Return the cost of an address rtx ADDR. */
1500 s390_address_cost (rtx addr)
1502 struct s390_address ad;
1503 if (!s390_decompose_address (addr, &ad))
1506 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1509 /* Return true if OP is a valid operand for the BRAS instruction.
1510 OP is the current operation.
1511 MODE is the current operation mode. */
1514 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1516 register enum rtx_code code = GET_CODE (op);
1518 /* Allow SYMBOL_REFs. */
1519 if (code == SYMBOL_REF)
1522 /* Allow @PLT stubs. */
1524 && GET_CODE (XEXP (op, 0)) == UNSPEC
1525 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1530 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1531 otherwise return 0. */
1534 tls_symbolic_operand (register rtx op)
1536 if (GET_CODE (op) != SYMBOL_REF)
1538 return SYMBOL_REF_TLS_MODEL (op);
1541 /* Return true if OP is a load multiple operation. It is known to be a
1542 PARALLEL and the first section will be tested.
1543 OP is the current operation.
1544 MODE is the current operation mode. */
1547 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1549 enum machine_mode elt_mode;
1550 int count = XVECLEN (op, 0);
1551 unsigned int dest_regno;
1556 /* Perform a quick check so we don't blow up below. */
1558 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1559 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1560 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1563 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1564 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1565 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1567 /* Check, is base, or base + displacement. */
1569 if (GET_CODE (src_addr) == REG)
1571 else if (GET_CODE (src_addr) == PLUS
1572 && GET_CODE (XEXP (src_addr, 0)) == REG
1573 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1575 off = INTVAL (XEXP (src_addr, 1));
1576 src_addr = XEXP (src_addr, 0);
1581 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1584 for (i = 1; i < count; i++)
1586 rtx elt = XVECEXP (op, 0, i);
1588 if (GET_CODE (elt) != SET
1589 || GET_CODE (SET_DEST (elt)) != REG
1590 || GET_MODE (SET_DEST (elt)) != elt_mode
1591 || REGNO (SET_DEST (elt)) != dest_regno + i
1592 || GET_CODE (SET_SRC (elt)) != MEM
1593 || GET_MODE (SET_SRC (elt)) != elt_mode
1594 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1595 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1596 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1597 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1598 != off + i * GET_MODE_SIZE (elt_mode))
1605 /* Return true if OP is a store multiple operation. It is known to be a
1606 PARALLEL and the first section will be tested.
1607 OP is the current operation.
1608 MODE is the current operation mode. */
1611 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1613 enum machine_mode elt_mode;
1614 int count = XVECLEN (op, 0);
1615 unsigned int src_regno;
1619 /* Perform a quick check so we don't blow up below. */
1621 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1622 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1623 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1626 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1627 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1628 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1630 /* Check, is base, or base + displacement. */
1632 if (GET_CODE (dest_addr) == REG)
1634 else if (GET_CODE (dest_addr) == PLUS
1635 && GET_CODE (XEXP (dest_addr, 0)) == REG
1636 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1638 off = INTVAL (XEXP (dest_addr, 1));
1639 dest_addr = XEXP (dest_addr, 0);
1644 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1647 for (i = 1; i < count; i++)
1649 rtx elt = XVECEXP (op, 0, i);
1651 if (GET_CODE (elt) != SET
1652 || GET_CODE (SET_SRC (elt)) != REG
1653 || GET_MODE (SET_SRC (elt)) != elt_mode
1654 || REGNO (SET_SRC (elt)) != src_regno + i
1655 || GET_CODE (SET_DEST (elt)) != MEM
1656 || GET_MODE (SET_DEST (elt)) != elt_mode
1657 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1658 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1659 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1660 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1661 != off + i * GET_MODE_SIZE (elt_mode))
1668 /* Return true if OP contains a symbol reference */
1671 symbolic_reference_mentioned_p (rtx op)
1673 register const char *fmt;
1676 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1679 fmt = GET_RTX_FORMAT (GET_CODE (op));
1680 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1686 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1687 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1691 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1698 /* Return true if OP contains a reference to a thread-local symbol. */
1701 tls_symbolic_reference_mentioned_p (rtx op)
1703 register const char *fmt;
1706 if (GET_CODE (op) == SYMBOL_REF)
1707 return tls_symbolic_operand (op);
1709 fmt = GET_RTX_FORMAT (GET_CODE (op));
1710 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1716 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1717 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1721 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1729 /* Return true if OP is a legitimate general operand when
1730 generating PIC code. It is given that flag_pic is on
1731 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1734 legitimate_pic_operand_p (register rtx op)
1736 /* Accept all non-symbolic constants. */
1737 if (!SYMBOLIC_CONST (op))
1740 /* Reject everything else; must be handled
1741 via emit_symbolic_move. */
1745 /* Returns true if the constant value OP is a legitimate general operand.
1746 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1749 legitimate_constant_p (register rtx op)
1751 /* Accept all non-symbolic constants. */
1752 if (!SYMBOLIC_CONST (op))
1755 /* Accept immediate LARL operands. */
1756 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1759 /* Thread-local symbols are never legal constants. This is
1760 so that emit_call knows that computing such addresses
1761 might require a function call. */
1762 if (TLS_SYMBOLIC_CONST (op))
1765 /* In the PIC case, symbolic constants must *not* be
1766 forced into the literal pool. We accept them here,
1767 so that they will be handled by emit_symbolic_move. */
1771 /* All remaining non-PIC symbolic constants are
1772 forced into the literal pool. */
1776 /* Determine if it's legal to put X into the constant pool. This
1777 is not possible if X contains the address of a symbol that is
1778 not constant (TLS) or not known at final link time (PIC). */
1781 s390_cannot_force_const_mem (rtx x)
1783 switch (GET_CODE (x))
1787 /* Accept all non-symbolic constants. */
1791 /* Labels are OK iff we are non-PIC. */
1792 return flag_pic != 0;
1795 /* 'Naked' TLS symbol references are never OK,
1796 non-TLS symbols are OK iff we are non-PIC. */
1797 if (tls_symbolic_operand (x))
1800 return flag_pic != 0;
1803 return s390_cannot_force_const_mem (XEXP (x, 0));
1806 return s390_cannot_force_const_mem (XEXP (x, 0))
1807 || s390_cannot_force_const_mem (XEXP (x, 1));
1810 switch (XINT (x, 1))
1812 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1813 case UNSPEC_LTREL_OFFSET:
1821 case UNSPEC_GOTNTPOFF:
1822 case UNSPEC_INDNTPOFF:
1835 /* Returns true if the constant value OP is a legitimate general
1836 operand during and after reload. The difference to
1837 legitimate_constant_p is that this function will not accept
1838 a constant that would need to be forced to the literal pool
1839 before it can be used as operand. */
1842 legitimate_reload_constant_p (register rtx op)
1844 /* Accept la(y) operands. */
1845 if (GET_CODE (op) == CONST_INT
1846 && DISP_IN_RANGE (INTVAL (op)))
1849 /* Accept l(g)hi operands. */
1850 if (GET_CODE (op) == CONST_INT
1851 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1854 /* Accept lliXX operands. */
1856 && s390_single_part (op, DImode, HImode, 0) >= 0)
1859 /* Accept larl operands. */
1860 if (TARGET_CPU_ZARCH
1861 && larl_operand (op, VOIDmode))
1864 /* Everything else cannot be handled without reload. */
1868 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1869 return the class of reg to actually use. */
1872 s390_preferred_reload_class (rtx op, enum reg_class class)
1874 /* This can happen if a floating point constant is being
1875 reloaded into an integer register. Leave well alone. */
1876 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1877 && class != FP_REGS)
1880 switch (GET_CODE (op))
1882 /* Constants we cannot reload must be forced into the
1887 if (legitimate_reload_constant_p (op))
1892 /* If a symbolic constant or a PLUS is reloaded,
1893 it is most likely being used as an address, so
1894 prefer ADDR_REGS. If 'class' is not a superset
1895 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1900 if (reg_class_subset_p (ADDR_REGS, class))
1912 /* Return the register class of a scratch register needed to
1913 load IN into a register of class CLASS in MODE.
1915 We need a temporary when loading a PLUS expression which
1916 is not a legitimate operand of the LOAD ADDRESS instruction. */
1919 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1920 enum machine_mode mode, rtx in)
1922 if (s390_plus_operand (in, mode))
1928 /* Return the register class of a scratch register needed to
1929 store a register of class CLASS in MODE into OUT:
1931 We need a temporary when storing a double-word to a
1932 non-offsettable memory address. */
1935 s390_secondary_output_reload_class (enum reg_class class,
1936 enum machine_mode mode, rtx out)
1938 if ((TARGET_64BIT ? mode == TImode
1939 : (mode == DImode || mode == DFmode))
1940 && reg_classes_intersect_p (GENERAL_REGS, class)
1941 && GET_CODE (out) == MEM
1942 && !offsettable_memref_p (out)
1943 && !s_operand (out, VOIDmode))
1949 /* Return true if OP is a PLUS that is not a legitimate
1950 operand for the LA instruction.
1951 OP is the current operation.
1952 MODE is the current operation mode. */
1955 s390_plus_operand (register rtx op, enum machine_mode mode)
1957 if (!check_mode (op, &mode) || mode != Pmode)
1960 if (GET_CODE (op) != PLUS)
1963 if (legitimate_la_operand_p (op))
1969 /* Generate code to load SRC, which is PLUS that is not a
1970 legitimate operand for the LA instruction, into TARGET.
1971 SCRATCH may be used as scratch register. */
1974 s390_expand_plus_operand (register rtx target, register rtx src,
1975 register rtx scratch)
1978 struct s390_address ad;
1980 /* src must be a PLUS; get its two operands. */
1981 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1984 /* Check if any of the two operands is already scheduled
1985 for replacement by reload. This can happen e.g. when
1986 float registers occur in an address. */
1987 sum1 = find_replacement (&XEXP (src, 0));
1988 sum2 = find_replacement (&XEXP (src, 1));
1989 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1991 /* If the address is already strictly valid, there's nothing to do. */
1992 if (!s390_decompose_address (src, &ad)
1993 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
1994 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
1996 /* Otherwise, one of the operands cannot be an address register;
1997 we reload its value into the scratch register. */
1998 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
2000 emit_move_insn (scratch, sum1);
2003 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
2005 emit_move_insn (scratch, sum2);
2009 /* According to the way these invalid addresses are generated
2010 in reload.c, it should never happen (at least on s390) that
2011 *neither* of the PLUS components, after find_replacements
2012 was applied, is an address register. */
2013 if (sum1 == scratch && sum2 == scratch)
2019 src = gen_rtx_PLUS (Pmode, sum1, sum2);
2022 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
2023 is only ever performed on addresses, so we can mark the
2024 sum as legitimate for LA in any case. */
2025 s390_load_address (target, src);
2029 /* Decompose a RTL expression ADDR for a memory address into
2030 its components, returned in OUT.
2032 Returns 0 if ADDR is not a valid memory address, nonzero
2033 otherwise. If OUT is NULL, don't return the components,
2034 but check for validity only.
2036 Note: Only addresses in canonical form are recognized.
2037 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2038 canonical form so that they will be recognized. */
2041 s390_decompose_address (register rtx addr, struct s390_address *out)
2043 rtx base = NULL_RTX;
2044 rtx indx = NULL_RTX;
2045 rtx disp = NULL_RTX;
2046 int pointer = FALSE;
2047 int base_ptr = FALSE;
2048 int indx_ptr = FALSE;
2050 /* Decompose address into base + index + displacement. */
2052 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2055 else if (GET_CODE (addr) == PLUS)
2057 rtx op0 = XEXP (addr, 0);
2058 rtx op1 = XEXP (addr, 1);
2059 enum rtx_code code0 = GET_CODE (op0);
2060 enum rtx_code code1 = GET_CODE (op1);
2062 if (code0 == REG || code0 == UNSPEC)
2064 if (code1 == REG || code1 == UNSPEC)
2066 indx = op0; /* index + base */
2072 base = op0; /* base + displacement */
2077 else if (code0 == PLUS)
2079 indx = XEXP (op0, 0); /* index + base + disp */
2080 base = XEXP (op0, 1);
2091 disp = addr; /* displacement */
2094 /* Validate base register. */
2097 if (GET_CODE (base) == UNSPEC)
2099 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2101 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2104 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2107 if (REGNO (base) == BASE_REGISTER
2108 || REGNO (base) == STACK_POINTER_REGNUM
2109 || REGNO (base) == FRAME_POINTER_REGNUM
2110 || ((reload_completed || reload_in_progress)
2111 && frame_pointer_needed
2112 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2113 || REGNO (base) == ARG_POINTER_REGNUM
2115 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2116 pointer = base_ptr = TRUE;
2119 /* Validate index register. */
2122 if (GET_CODE (indx) == UNSPEC)
2124 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2126 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2129 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2132 if (REGNO (indx) == BASE_REGISTER
2133 || REGNO (indx) == STACK_POINTER_REGNUM
2134 || REGNO (indx) == FRAME_POINTER_REGNUM
2135 || ((reload_completed || reload_in_progress)
2136 && frame_pointer_needed
2137 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2138 || REGNO (indx) == ARG_POINTER_REGNUM
2140 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2141 pointer = indx_ptr = TRUE;
2144 /* Prefer to use pointer as base, not index. */
2145 if (base && indx && !base_ptr
2146 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2153 /* Validate displacement. */
2156 /* Allow integer constant in range. */
2157 if (GET_CODE (disp) == CONST_INT)
2159 /* If the argument pointer is involved, the displacement will change
2160 later anyway as the argument pointer gets eliminated. This could
2161 make a valid displacement invalid, but it is more likely to make
2162 an invalid displacement valid, because we sometimes access the
2163 register save area via negative offsets to the arg pointer.
2164 Thus we don't check the displacement for validity here. If after
2165 elimination the displacement turns out to be invalid after all,
2166 this is fixed up by reload in any case. */
2167 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2169 if (!DISP_IN_RANGE (INTVAL (disp)))
2174 /* In the small-PIC case, the linker converts @GOT
2175 and @GOTNTPOFF offsets to possible displacements. */
2176 else if (GET_CODE (disp) == CONST
2177 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2178 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2179 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2187 /* Accept chunkfied literal pool symbol references. */
2188 else if (GET_CODE (disp) == CONST
2189 && GET_CODE (XEXP (disp, 0)) == MINUS
2190 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2191 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2196 /* Likewise if a constant offset is present. */
2197 else if (GET_CODE (disp) == CONST
2198 && GET_CODE (XEXP (disp, 0)) == PLUS
2199 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2200 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2201 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2202 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2207 /* We can convert literal pool addresses to
2208 displacements by basing them off the base register. */
2211 /* In some cases, we can accept an additional
2212 small constant offset. Split these off here. */
2214 unsigned int offset = 0;
2216 if (GET_CODE (disp) == CONST
2217 && GET_CODE (XEXP (disp, 0)) == PLUS
2218 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2220 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2221 disp = XEXP (XEXP (disp, 0), 0);
2224 /* Now we must have a literal pool address. */
2225 if (GET_CODE (disp) != SYMBOL_REF
2226 || !CONSTANT_POOL_ADDRESS_P (disp))
2229 /* If we have an offset, make sure it does not
2230 exceed the size of the constant pool entry. */
2231 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2234 /* Either base or index must be free to
2235 hold the base register. */
2239 /* Convert the address. */
2241 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2243 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2245 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2246 UNSPEC_LTREL_OFFSET);
2247 disp = gen_rtx_CONST (Pmode, disp);
2250 disp = plus_constant (disp, offset);
2264 out->pointer = pointer;
2270 /* Return nonzero if ADDR is a valid memory address.
2271 STRICT specifies whether strict register checking applies. */
2274 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2275 register rtx addr, int strict)
2277 struct s390_address ad;
2278 if (!s390_decompose_address (addr, &ad))
2283 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2285 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2290 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2292 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2299 /* Return 1 if OP is a valid operand for the LA instruction.
2300 In 31-bit, we need to prove that the result is used as an
2301 address, as LA performs only a 31-bit addition. */
2304 legitimate_la_operand_p (register rtx op)
2306 struct s390_address addr;
2307 if (!s390_decompose_address (op, &addr))
2310 if (TARGET_64BIT || addr.pointer)
2316 /* Return 1 if OP is a valid operand for the LA instruction,
2317 and we prefer to use LA over addition to compute it. */
2320 preferred_la_operand_p (register rtx op)
2322 struct s390_address addr;
2323 if (!s390_decompose_address (op, &addr))
2326 if (!TARGET_64BIT && !addr.pointer)
2332 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2333 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2339 /* Emit a forced load-address operation to load SRC into DST.
2340 This will use the LOAD ADDRESS instruction even in situations
2341 where legitimate_la_operand_p (SRC) returns false. */
2344 s390_load_address (rtx dst, rtx src)
2347 emit_move_insn (dst, src);
2349 emit_insn (gen_force_la_31 (dst, src));
2352 /* Return a legitimate reference for ORIG (an address) using the
2353 register REG. If REG is 0, a new pseudo is generated.
2355 There are two types of references that must be handled:
2357 1. Global data references must load the address from the GOT, via
2358 the PIC reg. An insn is emitted to do this load, and the reg is
2361 2. Static data references, constant pool addresses, and code labels
2362 compute the address as an offset from the GOT, whose base is in
2363 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2364 differentiate them from global data objects. The returned
2365 address is the PIC reg + an unspec constant.
2367 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2368 reg also appears in the address. */
2371 legitimize_pic_address (rtx orig, rtx reg)
2377 if (GET_CODE (addr) == LABEL_REF
2378 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2380 /* This is a local symbol. */
2381 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2383 /* Access local symbols PC-relative via LARL.
2384 This is the same as in the non-PIC case, so it is
2385 handled automatically ... */
2389 /* Access local symbols relative to the GOT. */
2391 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2393 if (reload_in_progress || reload_completed)
2394 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2396 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2397 addr = gen_rtx_CONST (Pmode, addr);
2398 addr = force_const_mem (Pmode, addr);
2399 emit_move_insn (temp, addr);
2401 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2404 emit_move_insn (reg, new);
2409 else if (GET_CODE (addr) == SYMBOL_REF)
2412 reg = gen_reg_rtx (Pmode);
2416 /* Assume GOT offset < 4k. This is handled the same way
2417 in both 31- and 64-bit code (@GOT). */
2419 if (reload_in_progress || reload_completed)
2420 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2422 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2423 new = gen_rtx_CONST (Pmode, new);
2424 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2425 new = gen_rtx_MEM (Pmode, new);
2426 RTX_UNCHANGING_P (new) = 1;
2427 emit_move_insn (reg, new);
2430 else if (TARGET_CPU_ZARCH)
2432 /* If the GOT offset might be >= 4k, we determine the position
2433 of the GOT entry via a PC-relative LARL (@GOTENT). */
2435 rtx temp = gen_reg_rtx (Pmode);
2437 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2438 new = gen_rtx_CONST (Pmode, new);
2439 emit_move_insn (temp, new);
2441 new = gen_rtx_MEM (Pmode, temp);
2442 RTX_UNCHANGING_P (new) = 1;
2443 emit_move_insn (reg, new);
2448 /* If the GOT offset might be >= 4k, we have to load it
2449 from the literal pool (@GOT). */
2451 rtx temp = gen_reg_rtx (Pmode);
2453 if (reload_in_progress || reload_completed)
2454 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2456 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2457 addr = gen_rtx_CONST (Pmode, addr);
2458 addr = force_const_mem (Pmode, addr);
2459 emit_move_insn (temp, addr);
2461 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2462 new = gen_rtx_MEM (Pmode, new);
2463 RTX_UNCHANGING_P (new) = 1;
2464 emit_move_insn (reg, new);
2470 if (GET_CODE (addr) == CONST)
2472 addr = XEXP (addr, 0);
2473 if (GET_CODE (addr) == UNSPEC)
2475 if (XVECLEN (addr, 0) != 1)
2477 switch (XINT (addr, 1))
2479 /* If someone moved a GOT-relative UNSPEC
2480 out of the literal pool, force them back in. */
2483 new = force_const_mem (Pmode, orig);
2486 /* @GOT is OK as is if small. */
2489 new = force_const_mem (Pmode, orig);
2492 /* @GOTENT is OK as is. */
2496 /* @PLT is OK as is on 64-bit, must be converted to
2497 GOT-relative @PLTOFF on 31-bit. */
2499 if (!TARGET_CPU_ZARCH)
2501 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2503 if (reload_in_progress || reload_completed)
2504 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2506 addr = XVECEXP (addr, 0, 0);
2507 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2509 addr = gen_rtx_CONST (Pmode, addr);
2510 addr = force_const_mem (Pmode, addr);
2511 emit_move_insn (temp, addr);
2513 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2516 emit_move_insn (reg, new);
2522 /* Everything else cannot happen. */
2527 else if (GET_CODE (addr) != PLUS)
2530 if (GET_CODE (addr) == PLUS)
2532 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2533 /* Check first to see if this is a constant offset
2534 from a local symbol reference. */
2535 if ((GET_CODE (op0) == LABEL_REF
2536 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2537 && GET_CODE (op1) == CONST_INT)
2539 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2541 if (INTVAL (op1) & 1)
2543 /* LARL can't handle odd offsets, so emit a
2544 pair of LARL and LA. */
2545 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2547 if (!DISP_IN_RANGE (INTVAL (op1)))
2549 int even = INTVAL (op1) - 1;
2550 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2551 op0 = gen_rtx_CONST (Pmode, op0);
2555 emit_move_insn (temp, op0);
2556 new = gen_rtx_PLUS (Pmode, temp, op1);
2560 emit_move_insn (reg, new);
2566 /* If the offset is even, we can just use LARL.
2567 This will happen automatically. */
2572 /* Access local symbols relative to the GOT. */
2574 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2576 if (reload_in_progress || reload_completed)
2577 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2579 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2581 addr = gen_rtx_PLUS (Pmode, addr, op1);
2582 addr = gen_rtx_CONST (Pmode, addr);
2583 addr = force_const_mem (Pmode, addr);
2584 emit_move_insn (temp, addr);
2586 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2589 emit_move_insn (reg, new);
2595 /* Now, check whether it is a GOT relative symbol plus offset
2596 that was pulled out of the literal pool. Force it back in. */
2598 else if (GET_CODE (op0) == UNSPEC
2599 && GET_CODE (op1) == CONST_INT
2600 && XINT (op0, 1) == UNSPEC_GOTOFF)
2602 if (XVECLEN (op0, 0) != 1)
2605 new = force_const_mem (Pmode, orig);
2608 /* Otherwise, compute the sum. */
2611 base = legitimize_pic_address (XEXP (addr, 0), reg);
2612 new = legitimize_pic_address (XEXP (addr, 1),
2613 base == reg ? NULL_RTX : reg);
2614 if (GET_CODE (new) == CONST_INT)
2615 new = plus_constant (base, INTVAL (new));
2618 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2620 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2621 new = XEXP (new, 1);
2623 new = gen_rtx_PLUS (Pmode, base, new);
2626 if (GET_CODE (new) == CONST)
2627 new = XEXP (new, 0);
2628 new = force_operand (new, 0);
2635 /* Load the thread pointer into a register. */
2638 get_thread_pointer (void)
2642 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2643 tp = force_reg (Pmode, tp);
2644 mark_reg_pointer (tp, BITS_PER_WORD);
2649 /* Emit a tls call insn. The call target is the SYMBOL_REF stored
2650 in s390_tls_symbol which always refers to __tls_get_offset.
2651 The returned offset is written to RESULT_REG and an USE rtx is
2652 generated for TLS_CALL. */
2654 static GTY(()) rtx s390_tls_symbol;
2657 s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
2664 if (!s390_tls_symbol)
2665 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2667 insn = s390_emit_call (s390_tls_symbol, tls_call, result_reg,
2668 gen_rtx_REG (Pmode, RETURN_REGNUM));
2670 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), result_reg);
2671 CONST_OR_PURE_CALL_P (insn) = 1;
2674 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2675 this (thread-local) address. REG may be used as temporary. */
2678 legitimize_tls_address (rtx addr, rtx reg)
2680 rtx new, tls_call, temp, base, r2, insn;
2682 if (GET_CODE (addr) == SYMBOL_REF)
2683 switch (tls_symbolic_operand (addr))
2685 case TLS_MODEL_GLOBAL_DYNAMIC:
2687 r2 = gen_rtx_REG (Pmode, 2);
2688 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2689 new = gen_rtx_CONST (Pmode, tls_call);
2690 new = force_const_mem (Pmode, new);
2691 emit_move_insn (r2, new);
2692 s390_emit_tls_call_insn (r2, tls_call);
2693 insn = get_insns ();
2696 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2697 temp = gen_reg_rtx (Pmode);
2698 emit_libcall_block (insn, temp, r2, new);
2700 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2703 s390_load_address (reg, new);
2708 case TLS_MODEL_LOCAL_DYNAMIC:
2710 r2 = gen_rtx_REG (Pmode, 2);
2711 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2712 new = gen_rtx_CONST (Pmode, tls_call);
2713 new = force_const_mem (Pmode, new);
2714 emit_move_insn (r2, new);
2715 s390_emit_tls_call_insn (r2, tls_call);
2716 insn = get_insns ();
2719 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2720 temp = gen_reg_rtx (Pmode);
2721 emit_libcall_block (insn, temp, r2, new);
2723 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2724 base = gen_reg_rtx (Pmode);
2725 s390_load_address (base, new);
2727 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2728 new = gen_rtx_CONST (Pmode, new);
2729 new = force_const_mem (Pmode, new);
2730 temp = gen_reg_rtx (Pmode);
2731 emit_move_insn (temp, new);
2733 new = gen_rtx_PLUS (Pmode, base, temp);
2736 s390_load_address (reg, new);
2741 case TLS_MODEL_INITIAL_EXEC:
2744 /* Assume GOT offset < 4k. This is handled the same way
2745 in both 31- and 64-bit code. */
2747 if (reload_in_progress || reload_completed)
2748 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2750 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2751 new = gen_rtx_CONST (Pmode, new);
2752 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2753 new = gen_rtx_MEM (Pmode, new);
2754 RTX_UNCHANGING_P (new) = 1;
2755 temp = gen_reg_rtx (Pmode);
2756 emit_move_insn (temp, new);
2758 else if (TARGET_CPU_ZARCH)
2760 /* If the GOT offset might be >= 4k, we determine the position
2761 of the GOT entry via a PC-relative LARL. */
2763 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2764 new = gen_rtx_CONST (Pmode, new);
2765 temp = gen_reg_rtx (Pmode);
2766 emit_move_insn (temp, new);
2768 new = gen_rtx_MEM (Pmode, temp);
2769 RTX_UNCHANGING_P (new) = 1;
2770 temp = gen_reg_rtx (Pmode);
2771 emit_move_insn (temp, new);
2775 /* If the GOT offset might be >= 4k, we have to load it
2776 from the literal pool. */
2778 if (reload_in_progress || reload_completed)
2779 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2781 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2782 new = gen_rtx_CONST (Pmode, new);
2783 new = force_const_mem (Pmode, new);
2784 temp = gen_reg_rtx (Pmode);
2785 emit_move_insn (temp, new);
2787 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2788 new = gen_rtx_MEM (Pmode, new);
2789 RTX_UNCHANGING_P (new) = 1;
2791 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2792 temp = gen_reg_rtx (Pmode);
2793 emit_insn (gen_rtx_SET (Pmode, temp, new));
2797 /* In position-dependent code, load the absolute address of
2798 the GOT entry from the literal pool. */
2800 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2801 new = gen_rtx_CONST (Pmode, new);
2802 new = force_const_mem (Pmode, new);
2803 temp = gen_reg_rtx (Pmode);
2804 emit_move_insn (temp, new);
2807 new = gen_rtx_MEM (Pmode, new);
2808 RTX_UNCHANGING_P (new) = 1;
2810 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2811 temp = gen_reg_rtx (Pmode);
2812 emit_insn (gen_rtx_SET (Pmode, temp, new));
2815 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2818 s390_load_address (reg, new);
2823 case TLS_MODEL_LOCAL_EXEC:
2824 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2825 new = gen_rtx_CONST (Pmode, new);
2826 new = force_const_mem (Pmode, new);
2827 temp = gen_reg_rtx (Pmode);
2828 emit_move_insn (temp, new);
2830 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2833 s390_load_address (reg, new);
2842 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2844 switch (XINT (XEXP (addr, 0), 1))
2846 case UNSPEC_INDNTPOFF:
2847 if (TARGET_CPU_ZARCH)
2859 abort (); /* for now ... */
2864 /* Emit insns to move operands[1] into operands[0]. */
2867 emit_symbolic_move (rtx *operands)
2869 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2871 if (GET_CODE (operands[0]) == MEM)
2872 operands[1] = force_reg (Pmode, operands[1]);
2873 else if (TLS_SYMBOLIC_CONST (operands[1]))
2874 operands[1] = legitimize_tls_address (operands[1], temp);
2876 operands[1] = legitimize_pic_address (operands[1], temp);
2879 /* Try machine-dependent ways of modifying an illegitimate address X
2880 to be legitimate. If we find one, return the new, valid address.
2882 OLDX is the address as it was before break_out_memory_refs was called.
2883 In some cases it is useful to look at this to decide what needs to be done.
2885 MODE is the mode of the operand pointed to by X.
2887 When -fpic is used, special handling is needed for symbolic references.
2888 See comments by legitimize_pic_address for details. */
2891 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2892 enum machine_mode mode ATTRIBUTE_UNUSED)
2894 rtx constant_term = const0_rtx;
2896 if (TLS_SYMBOLIC_CONST (x))
2898 x = legitimize_tls_address (x, 0);
2900 if (legitimate_address_p (mode, x, FALSE))
2905 if (SYMBOLIC_CONST (x)
2906 || (GET_CODE (x) == PLUS
2907 && (SYMBOLIC_CONST (XEXP (x, 0))
2908 || SYMBOLIC_CONST (XEXP (x, 1)))))
2909 x = legitimize_pic_address (x, 0);
2911 if (legitimate_address_p (mode, x, FALSE))
2915 x = eliminate_constant_term (x, &constant_term);
2917 /* Optimize loading of large displacements by splitting them
2918 into the multiple of 4K and the rest; this allows the
2919 former to be CSE'd if possible.
2921 Don't do this if the displacement is added to a register
2922 pointing into the stack frame, as the offsets will
2923 change later anyway. */
2925 if (GET_CODE (constant_term) == CONST_INT
2926 && !TARGET_LONG_DISPLACEMENT
2927 && !DISP_IN_RANGE (INTVAL (constant_term))
2928 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2930 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2931 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2933 rtx temp = gen_reg_rtx (Pmode);
2934 rtx val = force_operand (GEN_INT (upper), temp);
2936 emit_move_insn (temp, val);
2938 x = gen_rtx_PLUS (Pmode, x, temp);
2939 constant_term = GEN_INT (lower);
2942 if (GET_CODE (x) == PLUS)
2944 if (GET_CODE (XEXP (x, 0)) == REG)
2946 register rtx temp = gen_reg_rtx (Pmode);
2947 register rtx val = force_operand (XEXP (x, 1), temp);
2949 emit_move_insn (temp, val);
2951 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2954 else if (GET_CODE (XEXP (x, 1)) == REG)
2956 register rtx temp = gen_reg_rtx (Pmode);
2957 register rtx val = force_operand (XEXP (x, 0), temp);
2959 emit_move_insn (temp, val);
2961 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2965 if (constant_term != const0_rtx)
2966 x = gen_rtx_PLUS (Pmode, x, constant_term);
2971 /* Emit code to move LEN bytes from DST to SRC. */
2974 s390_expand_movstr (rtx dst, rtx src, rtx len)
2976 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2978 if (INTVAL (len) > 0)
2979 emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2982 else if (TARGET_MVCLE)
2984 emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
2989 rtx dst_addr, src_addr, count, blocks, temp;
2990 rtx loop_start_label = gen_label_rtx ();
2991 rtx loop_end_label = gen_label_rtx ();
2992 rtx end_label = gen_label_rtx ();
2993 enum machine_mode mode;
2995 mode = GET_MODE (len);
2996 if (mode == VOIDmode)
2999 dst_addr = gen_reg_rtx (Pmode);
3000 src_addr = gen_reg_rtx (Pmode);
3001 count = gen_reg_rtx (mode);
3002 blocks = gen_reg_rtx (mode);
3004 convert_move (count, len, 1);
3005 emit_cmp_and_jump_insns (count, const0_rtx,
3006 EQ, NULL_RTX, mode, 1, end_label);
3008 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3009 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
3010 dst = change_address (dst, VOIDmode, dst_addr);
3011 src = change_address (src, VOIDmode, src_addr);
3013 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3015 emit_move_insn (count, temp);
3017 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3019 emit_move_insn (blocks, temp);
3021 emit_cmp_and_jump_insns (blocks, const0_rtx,
3022 EQ, NULL_RTX, mode, 1, loop_end_label);
3024 emit_label (loop_start_label);
3026 emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
3027 s390_load_address (dst_addr,
3028 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3029 s390_load_address (src_addr,
3030 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3032 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3034 emit_move_insn (blocks, temp);
3036 emit_cmp_and_jump_insns (blocks, const0_rtx,
3037 EQ, NULL_RTX, mode, 1, loop_end_label);
3039 emit_jump (loop_start_label);
3040 emit_label (loop_end_label);
3042 emit_insn (gen_movstr_short (dst, src,
3043 convert_to_mode (Pmode, count, 1)));
3044 emit_label (end_label);
3048 /* Emit code to clear LEN bytes at DST. */
3051 s390_expand_clrstr (rtx dst, rtx len)
3053 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3055 if (INTVAL (len) > 0)
3056 emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
3059 else if (TARGET_MVCLE)
3061 emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
3066 rtx dst_addr, src_addr, count, blocks, temp;
3067 rtx loop_start_label = gen_label_rtx ();
3068 rtx loop_end_label = gen_label_rtx ();
3069 rtx end_label = gen_label_rtx ();
3070 enum machine_mode mode;
3072 mode = GET_MODE (len);
3073 if (mode == VOIDmode)
3076 dst_addr = gen_reg_rtx (Pmode);
3077 src_addr = gen_reg_rtx (Pmode);
3078 count = gen_reg_rtx (mode);
3079 blocks = gen_reg_rtx (mode);
3081 convert_move (count, len, 1);
3082 emit_cmp_and_jump_insns (count, const0_rtx,
3083 EQ, NULL_RTX, mode, 1, end_label);
3085 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3086 dst = change_address (dst, VOIDmode, dst_addr);
3088 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3090 emit_move_insn (count, temp);
3092 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3094 emit_move_insn (blocks, temp);
3096 emit_cmp_and_jump_insns (blocks, const0_rtx,
3097 EQ, NULL_RTX, mode, 1, loop_end_label);
3099 emit_label (loop_start_label);
3101 emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
3102 s390_load_address (dst_addr,
3103 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3105 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3107 emit_move_insn (blocks, temp);
3109 emit_cmp_and_jump_insns (blocks, const0_rtx,
3110 EQ, NULL_RTX, mode, 1, loop_end_label);
3112 emit_jump (loop_start_label);
3113 emit_label (loop_end_label);
3115 emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
3116 emit_label (end_label);
3120 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3121 and return the result in TARGET. */
3124 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3126 rtx (*gen_result) (rtx) =
3127 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3129 op0 = protect_from_queue (op0, 0);
3130 op1 = protect_from_queue (op1, 0);
3131 len = protect_from_queue (len, 0);
3133 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3135 if (INTVAL (len) > 0)
3137 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3138 emit_insn (gen_result (target));
3141 emit_move_insn (target, const0_rtx);
3144 else /* if (TARGET_MVCLE) */
3146 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3147 emit_insn (gen_result (target));
3151 /* Deactivate for now as profile code cannot cope with
3152 CC being live across basic block boundaries. */
3155 rtx addr0, addr1, count, blocks, temp;
3156 rtx loop_start_label = gen_label_rtx ();
3157 rtx loop_end_label = gen_label_rtx ();
3158 rtx end_label = gen_label_rtx ();
3159 enum machine_mode mode;
3161 mode = GET_MODE (len);
3162 if (mode == VOIDmode)
3165 addr0 = gen_reg_rtx (Pmode);
3166 addr1 = gen_reg_rtx (Pmode);
3167 count = gen_reg_rtx (mode);
3168 blocks = gen_reg_rtx (mode);
3170 convert_move (count, len, 1);
3171 emit_cmp_and_jump_insns (count, const0_rtx,
3172 EQ, NULL_RTX, mode, 1, end_label);
3174 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3175 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3176 op0 = change_address (op0, VOIDmode, addr0);
3177 op1 = change_address (op1, VOIDmode, addr1);
3179 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3181 emit_move_insn (count, temp);
3183 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3185 emit_move_insn (blocks, temp);
3187 emit_cmp_and_jump_insns (blocks, const0_rtx,
3188 EQ, NULL_RTX, mode, 1, loop_end_label);
3190 emit_label (loop_start_label);
3192 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3193 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3194 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3195 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3196 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3197 emit_jump_insn (temp);
3199 s390_load_address (addr0,
3200 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3201 s390_load_address (addr1,
3202 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3204 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3206 emit_move_insn (blocks, temp);
3208 emit_cmp_and_jump_insns (blocks, const0_rtx,
3209 EQ, NULL_RTX, mode, 1, loop_end_label);
3211 emit_jump (loop_start_label);
3212 emit_label (loop_end_label);
3214 emit_insn (gen_cmpmem_short (op0, op1,
3215 convert_to_mode (Pmode, count, 1)));
3216 emit_label (end_label);
3218 emit_insn (gen_result (target));
3224 /* Expand conditional increment or decrement using alc/slb instructions.
3225 Should generate code setting DST to either SRC or SRC + INCREMENT,
3226 depending on the result of the comparison CMP_OP0 CMP_CODE CMP_OP1.
3227 Returns true if successful, false otherwise. */
3230 s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1,
3231 rtx dst, rtx src, rtx increment)
3233 enum machine_mode cmp_mode;
3234 enum machine_mode cc_mode;
3239 if ((GET_MODE (cmp_op0) == SImode || GET_MODE (cmp_op0) == VOIDmode)
3240 && (GET_MODE (cmp_op1) == SImode || GET_MODE (cmp_op1) == VOIDmode))
3242 else if ((GET_MODE (cmp_op0) == DImode || GET_MODE (cmp_op0) == VOIDmode)
3243 && (GET_MODE (cmp_op1) == DImode || GET_MODE (cmp_op1) == VOIDmode))
3248 /* Try ADD LOGICAL WITH CARRY. */
3249 if (increment == const1_rtx)
3251 /* Determine CC mode to use. */
3252 if (cmp_code == EQ || cmp_code == NE)
3254 if (cmp_op1 != const0_rtx)
3256 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3257 NULL_RTX, 0, OPTAB_WIDEN);
3258 cmp_op1 = const0_rtx;
3261 cmp_code = cmp_code == EQ ? LEU : GTU;
3264 if (cmp_code == LTU || cmp_code == LEU)
3269 cmp_code = swap_condition (cmp_code);
3286 /* Emit comparison instruction pattern. */
3287 if (!register_operand (cmp_op0, cmp_mode))
3288 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3290 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3291 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3292 /* We use insn_invalid_p here to add clobbers if required. */
3293 if (insn_invalid_p (emit_insn (insn)))
3296 /* Emit ALC instruction pattern. */
3297 op_res = gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3298 gen_rtx_REG (cc_mode, CC_REGNUM),
3301 if (src != const0_rtx)
3303 if (!register_operand (src, GET_MODE (dst)))
3304 src = force_reg (GET_MODE (dst), src);
3306 src = gen_rtx_PLUS (GET_MODE (dst), src, const0_rtx);
3307 op_res = gen_rtx_PLUS (GET_MODE (dst), src, op_res);
3310 p = rtvec_alloc (2);
3312 gen_rtx_SET (VOIDmode, dst, op_res);
3314 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3315 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3320 /* Try SUBTRACT LOGICAL WITH BORROW. */
3321 if (increment == constm1_rtx)
3323 /* Determine CC mode to use. */
3324 if (cmp_code == EQ || cmp_code == NE)
3326 if (cmp_op1 != const0_rtx)
3328 cmp_op0 = expand_simple_binop (cmp_mode, XOR, cmp_op0, cmp_op1,
3329 NULL_RTX, 0, OPTAB_WIDEN);
3330 cmp_op1 = const0_rtx;
3333 cmp_code = cmp_code == EQ ? LEU : GTU;
3336 if (cmp_code == GTU || cmp_code == GEU)
3341 cmp_code = swap_condition (cmp_code);
3358 /* Emit comparison instruction pattern. */
3359 if (!register_operand (cmp_op0, cmp_mode))
3360 cmp_op0 = force_reg (cmp_mode, cmp_op0);
3362 insn = gen_rtx_SET (VOIDmode, gen_rtx_REG (cc_mode, CC_REGNUM),
3363 gen_rtx_COMPARE (cc_mode, cmp_op0, cmp_op1));
3364 /* We use insn_invalid_p here to add clobbers if required. */
3365 if (insn_invalid_p (emit_insn (insn)))
3368 /* Emit SLB instruction pattern. */
3369 if (!register_operand (src, GET_MODE (dst)))
3370 src = force_reg (GET_MODE (dst), src);
3372 op_res = gen_rtx_MINUS (GET_MODE (dst),
3373 gen_rtx_MINUS (GET_MODE (dst), src, const0_rtx),
3374 gen_rtx_fmt_ee (cmp_code, GET_MODE (dst),
3375 gen_rtx_REG (cc_mode, CC_REGNUM),
3377 p = rtvec_alloc (2);
3379 gen_rtx_SET (VOIDmode, dst, op_res);
3381 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, CC_REGNUM));
3382 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
3391 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3392 We need to emit DTP-relative relocations. */
3395 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3400 fputs ("\t.long\t", file);
3403 fputs ("\t.quad\t", file);
3408 output_addr_const (file, x);
3409 fputs ("@DTPOFF", file);
3412 /* In the name of slightly smaller debug output, and to cater to
3413 general assembler losage, recognize various UNSPEC sequences
3414 and turn them back into a direct symbol reference. */
3417 s390_delegitimize_address (rtx orig_x)
3421 if (GET_CODE (x) != MEM)
3425 if (GET_CODE (x) == PLUS
3426 && GET_CODE (XEXP (x, 1)) == CONST
3427 && GET_CODE (XEXP (x, 0)) == REG
3428 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3430 y = XEXP (XEXP (x, 1), 0);
3431 if (GET_CODE (y) == UNSPEC
3432 && XINT (y, 1) == UNSPEC_GOT)
3433 return XVECEXP (y, 0, 0);
3437 if (GET_CODE (x) == CONST)
3440 if (GET_CODE (y) == UNSPEC
3441 && XINT (y, 1) == UNSPEC_GOTENT)
3442 return XVECEXP (y, 0, 0);
3449 /* Output shift count operand OP to stdio stream FILE. */
3452 print_shift_count_operand (FILE *file, rtx op)
3454 HOST_WIDE_INT offset = 0;
3456 /* We can have an integer constant, an address register,
3457 or a sum of the two. */
3458 if (GET_CODE (op) == CONST_INT)
3460 offset = INTVAL (op);
3463 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3465 offset = INTVAL (XEXP (op, 1));
3468 while (op && GET_CODE (op) == SUBREG)
3469 op = SUBREG_REG (op);
3472 if (op && (GET_CODE (op) != REG
3473 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3474 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3477 /* Shift counts are truncated to the low six bits anyway. */
3478 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3480 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3483 /* Locate some local-dynamic symbol still in use by this function
3484 so that we can print its name in local-dynamic base patterns. */
3487 get_some_local_dynamic_name (void)
3491 if (cfun->machine->some_ld_name)
3492 return cfun->machine->some_ld_name;
3494 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3496 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3497 return cfun->machine->some_ld_name;
3503 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3507 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3509 x = get_pool_constant (x);
3510 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3513 if (GET_CODE (x) == SYMBOL_REF
3514 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3516 cfun->machine->some_ld_name = XSTR (x, 0);
3523 /* Output machine-dependent UNSPECs occurring in address constant X
3524 in assembler syntax to stdio stream FILE. Returns true if the
3525 constant X could be recognized, false otherwise. */
3528 s390_output_addr_const_extra (FILE *file, rtx x)
3530 if (GET_CODE (x) == UNSPEC && XVECLEN (x, 0) == 1)
3531 switch (XINT (x, 1))
3534 output_addr_const (file, XVECEXP (x, 0, 0));
3535 fprintf (file, "@GOTENT");
3538 output_addr_const (file, XVECEXP (x, 0, 0));
3539 fprintf (file, "@GOT");
3542 output_addr_const (file, XVECEXP (x, 0, 0));
3543 fprintf (file, "@GOTOFF");
3546 output_addr_const (file, XVECEXP (x, 0, 0));
3547 fprintf (file, "@PLT");
3550 output_addr_const (file, XVECEXP (x, 0, 0));
3551 fprintf (file, "@PLTOFF");
3554 output_addr_const (file, XVECEXP (x, 0, 0));
3555 fprintf (file, "@TLSGD");
3558 assemble_name (file, get_some_local_dynamic_name ());
3559 fprintf (file, "@TLSLDM");
3562 output_addr_const (file, XVECEXP (x, 0, 0));
3563 fprintf (file, "@DTPOFF");
3566 output_addr_const (file, XVECEXP (x, 0, 0));
3567 fprintf (file, "@NTPOFF");
3569 case UNSPEC_GOTNTPOFF:
3570 output_addr_const (file, XVECEXP (x, 0, 0));
3571 fprintf (file, "@GOTNTPOFF");
3573 case UNSPEC_INDNTPOFF:
3574 output_addr_const (file, XVECEXP (x, 0, 0));
3575 fprintf (file, "@INDNTPOFF");
3582 /* Output address operand ADDR in assembler syntax to
3583 stdio stream FILE. */
3586 print_operand_address (FILE *file, rtx addr)
3588 struct s390_address ad;
3590 if (!s390_decompose_address (addr, &ad)
3591 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3592 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3593 output_operand_lossage ("Cannot decompose address.");
3596 output_addr_const (file, ad.disp);
3598 fprintf (file, "0");
3600 if (ad.base && ad.indx)
3601 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3602 reg_names[REGNO (ad.base)]);
3604 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3607 /* Output operand X in assembler syntax to stdio stream FILE.
3608 CODE specified the format flag. The following format flags
3611 'C': print opcode suffix for branch condition.
3612 'D': print opcode suffix for inverse branch condition.
3613 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3614 'O': print only the displacement of a memory reference.
3615 'R': print only the base register of a memory reference.
3616 'N': print the second word of a DImode operand.
3617 'M': print the second word of a TImode operand.
3618 'Y': print shift count operand.
3620 'b': print integer X as if it's an unsigned byte.
3621 'x': print integer X as if it's an unsigned word.
3622 'h': print integer X as if it's a signed word.
3623 'i': print the first nonzero HImode part of X.
3624 'j': print the first HImode part unequal to 0xffff of X. */
3627 print_operand (FILE *file, rtx x, int code)
3632 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3636 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3640 if (GET_CODE (x) == SYMBOL_REF)
3642 fprintf (file, "%s", ":tls_load:");
3643 output_addr_const (file, x);
3645 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3647 fprintf (file, "%s", ":tls_gdcall:");
3648 output_addr_const (file, XVECEXP (x, 0, 0));
3650 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3652 fprintf (file, "%s", ":tls_ldcall:");
3653 assemble_name (file, get_some_local_dynamic_name ());
3661 struct s390_address ad;
3663 if (GET_CODE (x) != MEM
3664 || !s390_decompose_address (XEXP (x, 0), &ad)
3665 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3670 output_addr_const (file, ad.disp);
3672 fprintf (file, "0");
3678 struct s390_address ad;
3680 if (GET_CODE (x) != MEM
3681 || !s390_decompose_address (XEXP (x, 0), &ad)
3682 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3687 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3689 fprintf (file, "0");
3694 if (GET_CODE (x) == REG)
3695 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3696 else if (GET_CODE (x) == MEM)
3697 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3703 if (GET_CODE (x) == REG)
3704 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3705 else if (GET_CODE (x) == MEM)
3706 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3712 print_shift_count_operand (file, x);
3716 switch (GET_CODE (x))
3719 fprintf (file, "%s", reg_names[REGNO (x)]);
3723 output_address (XEXP (x, 0));
3730 output_addr_const (file, x);
3735 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3736 else if (code == 'x')
3737 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3738 else if (code == 'h')
3739 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3740 else if (code == 'i')
3741 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3742 s390_extract_part (x, HImode, 0));
3743 else if (code == 'j')
3744 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3745 s390_extract_part (x, HImode, -1));
3747 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3751 if (GET_MODE (x) != VOIDmode)
3754 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3755 else if (code == 'x')
3756 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3757 else if (code == 'h')
3758 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3764 fatal_insn ("UNKNOWN in print_operand !?", x);
3769 /* Target hook for assembling integer objects. We need to define it
3770 here to work a round a bug in some versions of GAS, which couldn't
3771 handle values smaller than INT_MIN when printed in decimal. */
3774 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3776 if (size == 8 && aligned_p
3777 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3779 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3783 return default_assemble_integer (x, size, aligned_p);
3786 /* Returns true if register REGNO is used for forming
3787 a memory address in expression X. */
3790 reg_used_in_mem_p (int regno, rtx x)
3792 enum rtx_code code = GET_CODE (x);
3798 if (refers_to_regno_p (regno, regno+1,
3802 else if (code == SET
3803 && GET_CODE (SET_DEST (x)) == PC)
3805 if (refers_to_regno_p (regno, regno+1,
3810 fmt = GET_RTX_FORMAT (code);
3811 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3814 && reg_used_in_mem_p (regno, XEXP (x, i)))
3817 else if (fmt[i] == 'E')
3818 for (j = 0; j < XVECLEN (x, i); j++)
3819 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3825 /* Returns true if expression DEP_RTX sets an address register
3826 used by instruction INSN to address memory. */
3829 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3833 if (GET_CODE (dep_rtx) == INSN)
3834 dep_rtx = PATTERN (dep_rtx);
3836 if (GET_CODE (dep_rtx) == SET)
3838 target = SET_DEST (dep_rtx);
3839 if (GET_CODE (target) == STRICT_LOW_PART)
3840 target = XEXP (target, 0);
3841 while (GET_CODE (target) == SUBREG)
3842 target = SUBREG_REG (target);
3844 if (GET_CODE (target) == REG)
3846 int regno = REGNO (target);
3848 if (s390_safe_attr_type (insn) == TYPE_LA)
3850 pat = PATTERN (insn);
3851 if (GET_CODE (pat) == PARALLEL)
3853 if (XVECLEN (pat, 0) != 2)
3855 pat = XVECEXP (pat, 0, 0);
3857 if (GET_CODE (pat) == SET)
3858 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3862 else if (get_attr_atype (insn) == ATYPE_AGEN)
3863 return reg_used_in_mem_p (regno, PATTERN (insn));
3869 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3872 s390_agen_dep_p (rtx dep_insn, rtx insn)
3874 rtx dep_rtx = PATTERN (dep_insn);
3877 if (GET_CODE (dep_rtx) == SET
3878 && addr_generation_dependency_p (dep_rtx, insn))
3880 else if (GET_CODE (dep_rtx) == PARALLEL)
3882 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3884 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3891 /* Return the modified cost of the dependency of instruction INSN
3892 on instruction DEP_INSN through the link LINK. COST is the
3893 default cost of that dependency.
3895 Data dependencies are all handled without delay. However, if a
3896 register is modified and subsequently used as base or index
3897 register of a memory reference, at least 4 cycles need to pass
3898 between setting and using the register to avoid pipeline stalls.
3899 An exception is the LA instruction. An address generated by LA can
3900 be used by introducing only a one cycle stall on the pipeline. */
3903 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3908 /* If the dependence is an anti-dependence, there is no cost. For an
3909 output dependence, there is sometimes a cost, but it doesn't seem
3910 worth handling those few cases. */
3912 if (REG_NOTE_KIND (link) != 0)
3915 /* If we can't recognize the insns, we can't really do anything. */
3916 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3919 /* DFA based scheduling checks address dependency in md file. */
3920 if (s390_use_dfa_pipeline_interface ())
3922 /* Operand forward in case of lr, load and la. */
3923 if (s390_tune == PROCESSOR_2084_Z990
3925 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3926 || s390_safe_attr_type (dep_insn) == TYPE_LR
3927 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3932 dep_rtx = PATTERN (dep_insn);
3934 if (GET_CODE (dep_rtx) == SET
3935 && addr_generation_dependency_p (dep_rtx, insn))
3936 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3937 else if (GET_CODE (dep_rtx) == PARALLEL)
3939 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3941 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3942 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3948 /* A C statement (sans semicolon) to update the integer scheduling priority
3949 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3950 reduce the priority to execute INSN later. Do not define this macro if
3951 you do not need to adjust the scheduling priorities of insns.
3953 A STD instruction should be scheduled earlier,
3954 in order to use the bypass. */
3957 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3959 if (! INSN_P (insn))
3962 if (s390_tune != PROCESSOR_2084_Z990)
3965 switch (s390_safe_attr_type (insn))
3969 priority = priority << 3;
3972 priority = priority << 1;
3980 /* The number of instructions that can be issued per cycle. */
3983 s390_issue_rate (void)
3985 if (s390_tune == PROCESSOR_2084_Z990)
3990 /* If the following function returns TRUE, we will use the the DFA
3994 s390_use_dfa_pipeline_interface (void)
3996 if (s390_tune == PROCESSOR_2064_Z900
3997 || s390_tune == PROCESSOR_2084_Z990)
4004 s390_first_cycle_multipass_dfa_lookahead (void)
4006 return s390_use_dfa_pipeline_interface () ? 4 : 0;
4010 /* Split all branches that exceed the maximum distance.
4011 Returns true if this created a new literal pool entry. */
4014 s390_split_branches (void)
4016 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
4017 int new_literal = 0;
4018 rtx insn, pat, tmp, target;
4021 /* We need correct insn addresses. */
4023 shorten_branches (get_insns ());
4025 /* Find all branches that exceed 64KB, and split them. */
4027 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4029 if (GET_CODE (insn) != JUMP_INSN)
4032 pat = PATTERN (insn);
4033 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4034 pat = XVECEXP (pat, 0, 0);
4035 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
4038 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
4040 label = &SET_SRC (pat);
4042 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
4044 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
4045 label = &XEXP (SET_SRC (pat), 1);
4046 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
4047 label = &XEXP (SET_SRC (pat), 2);
4054 if (get_attr_length (insn) <= 4)
4057 /* We are going to use the return register as scratch register,
4058 make sure it will be saved/restored by the prologue/epilogue. */
4059 cfun->machine->save_return_addr_p = 1;
4064 tmp = force_const_mem (Pmode, *label);
4065 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
4066 INSN_ADDRESSES_NEW (tmp, -1);
4073 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
4074 UNSPEC_LTREL_OFFSET);
4075 target = gen_rtx_CONST (Pmode, target);
4076 target = force_const_mem (Pmode, target);
4077 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
4078 INSN_ADDRESSES_NEW (tmp, -1);
4080 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
4082 target = gen_rtx_PLUS (Pmode, temp_reg, target);
4085 if (!validate_change (insn, label, target, 0))
4093 /* Find a literal pool symbol referenced in RTX X, and store
4094 it at REF. Will abort if X contains references to more than
4095 one such pool symbol; multiple references to the same symbol
4096 are allowed, however.
4098 The rtx pointed to by REF must be initialized to NULL_RTX
4099 by the caller before calling this routine. */
4102 find_constant_pool_ref (rtx x, rtx *ref)
4107 /* Ignore LTREL_BASE references. */
4108 if (GET_CODE (x) == UNSPEC
4109 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4111 /* Likewise POOL_ENTRY insns. */
4112 if (GET_CODE (x) == UNSPEC_VOLATILE
4113 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
4116 if (GET_CODE (x) == SYMBOL_REF
4117 && CONSTANT_POOL_ADDRESS_P (x))
4119 if (*ref == NULL_RTX)
4125 fmt = GET_RTX_FORMAT (GET_CODE (x));
4126 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4130 find_constant_pool_ref (XEXP (x, i), ref);
4132 else if (fmt[i] == 'E')
4134 for (j = 0; j < XVECLEN (x, i); j++)
4135 find_constant_pool_ref (XVECEXP (x, i, j), ref);
4140 /* Replace every reference to the literal pool symbol REF
4141 in X by the address ADDR. Fix up MEMs as required. */
4144 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
4152 /* Literal pool references can only occur inside a MEM ... */
4153 if (GET_CODE (*x) == MEM)
4155 rtx memref = XEXP (*x, 0);
4159 *x = replace_equiv_address (*x, addr);
4163 if (GET_CODE (memref) == CONST
4164 && GET_CODE (XEXP (memref, 0)) == PLUS
4165 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4166 && XEXP (XEXP (memref, 0), 0) == ref)
4168 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4169 *x = replace_equiv_address (*x, plus_constant (addr, off));
4174 /* ... or a load-address type pattern. */
4175 if (GET_CODE (*x) == SET)
4177 rtx addrref = SET_SRC (*x);
4181 SET_SRC (*x) = addr;
4185 if (GET_CODE (addrref) == CONST
4186 && GET_CODE (XEXP (addrref, 0)) == PLUS
4187 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4188 && XEXP (XEXP (addrref, 0), 0) == ref)
4190 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4191 SET_SRC (*x) = plus_constant (addr, off);
4196 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4197 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4201 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4203 else if (fmt[i] == 'E')
4205 for (j = 0; j < XVECLEN (*x, i); j++)
4206 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4211 /* Check whether X contains an UNSPEC_LTREL_BASE.
4212 Return its constant pool symbol if found, NULL_RTX otherwise. */
4215 find_ltrel_base (rtx x)
4220 if (GET_CODE (x) == UNSPEC
4221 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4222 return XVECEXP (x, 0, 0);
4224 fmt = GET_RTX_FORMAT (GET_CODE (x));
4225 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4229 rtx fnd = find_ltrel_base (XEXP (x, i));
4233 else if (fmt[i] == 'E')
4235 for (j = 0; j < XVECLEN (x, i); j++)
4237 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4247 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4250 replace_ltrel_base (rtx *x, rtx base)
4255 if (GET_CODE (*x) == UNSPEC
4256 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4262 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4263 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4267 replace_ltrel_base (&XEXP (*x, i), base);
4269 else if (fmt[i] == 'E')
4271 for (j = 0; j < XVECLEN (*x, i); j++)
4272 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4278 /* We keep a list of constants which we have to add to internal
4279 constant tables in the middle of large functions. */
4281 #define NR_C_MODES 7
4282 enum machine_mode constant_modes[NR_C_MODES] =
4293 struct constant *next;
4298 struct constant_pool
4300 struct constant_pool *next;
4305 struct constant *constants[NR_C_MODES];
4310 static struct constant_pool * s390_mainpool_start (void);
4311 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4312 static void s390_mainpool_cancel (struct constant_pool *);
4314 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4315 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4316 static void s390_chunkify_cancel (struct constant_pool *);
4318 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4319 static void s390_end_pool (struct constant_pool *, rtx);
4320 static void s390_add_pool_insn (struct constant_pool *, rtx);
4321 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4322 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4323 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4324 static rtx s390_dump_pool (struct constant_pool *, bool);
4325 static struct constant_pool *s390_alloc_pool (void);
4326 static void s390_free_pool (struct constant_pool *);
4328 /* Create new constant pool covering instructions starting at INSN
4329 and chain it to the end of POOL_LIST. */
4331 static struct constant_pool *
4332 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4334 struct constant_pool *pool, **prev;
4336 pool = s390_alloc_pool ();
4337 pool->first_insn = insn;
4339 for (prev = pool_list; *prev; prev = &(*prev)->next)
4346 /* End range of instructions covered by POOL at INSN and emit
4347 placeholder insn representing the pool. */
4350 s390_end_pool (struct constant_pool *pool, rtx insn)
4352 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4355 insn = get_last_insn ();
4357 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4358 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4361 /* Add INSN to the list of insns covered by POOL. */
4364 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4366 bitmap_set_bit (pool->insns, INSN_UID (insn));
4369 /* Return pool out of POOL_LIST that covers INSN. */
4371 static struct constant_pool *
4372 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4374 struct constant_pool *pool;
4376 for (pool = pool_list; pool; pool = pool->next)
4377 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4383 /* Add constant VAL of mode MODE to the constant pool POOL. */
4386 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4391 for (i = 0; i < NR_C_MODES; i++)
4392 if (constant_modes[i] == mode)
4394 if (i == NR_C_MODES)
4397 for (c = pool->constants[i]; c != NULL; c = c->next)
4398 if (rtx_equal_p (val, c->value))
4403 c = (struct constant *) xmalloc (sizeof *c);
4405 c->label = gen_label_rtx ();
4406 c->next = pool->constants[i];
4407 pool->constants[i] = c;
4408 pool->size += GET_MODE_SIZE (mode);
4412 /* Find constant VAL of mode MODE in the constant pool POOL.
4413 Return an RTX describing the distance from the start of
4414 the pool to the location of the new constant. */
4417 s390_find_constant (struct constant_pool *pool, rtx val,
4418 enum machine_mode mode)
4424 for (i = 0; i < NR_C_MODES; i++)
4425 if (constant_modes[i] == mode)
4427 if (i == NR_C_MODES)
4430 for (c = pool->constants[i]; c != NULL; c = c->next)
4431 if (rtx_equal_p (val, c->value))
4437 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4438 gen_rtx_LABEL_REF (Pmode, pool->label));
4439 offset = gen_rtx_CONST (Pmode, offset);
4443 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4444 do not emit the pool base label. */
4447 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4453 /* Pool start insn switches to proper section
4454 and guarantees necessary alignment. */
4455 if (TARGET_CPU_ZARCH)
4456 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4458 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4459 INSN_ADDRESSES_NEW (insn, -1);
4463 insn = emit_label_after (pool->label, insn);
4464 INSN_ADDRESSES_NEW (insn, -1);
4467 /* Dump constants in descending alignment requirement order,
4468 ensuring proper alignment for every constant. */
4469 for (i = 0; i < NR_C_MODES; i++)
4470 for (c = pool->constants[i]; c; c = c->next)
4472 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4473 rtx value = c->value;
4474 if (GET_CODE (value) == CONST
4475 && GET_CODE (XEXP (value, 0)) == UNSPEC
4476 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4477 && XVECLEN (XEXP (value, 0), 0) == 1)
4479 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4480 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4481 value = gen_rtx_CONST (VOIDmode, value);
4484 insn = emit_label_after (c->label, insn);
4485 INSN_ADDRESSES_NEW (insn, -1);
4487 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4488 gen_rtvec (1, value),
4489 UNSPECV_POOL_ENTRY);
4490 insn = emit_insn_after (value, insn);
4491 INSN_ADDRESSES_NEW (insn, -1);
4494 /* Pool end insn switches back to previous section
4495 and guarantees necessary alignment. */
4496 if (TARGET_CPU_ZARCH)
4497 insn = emit_insn_after (gen_pool_end_64 (), insn);
4499 insn = emit_insn_after (gen_pool_end_31 (), insn);
4500 INSN_ADDRESSES_NEW (insn, -1);
4502 insn = emit_barrier_after (insn);
4503 INSN_ADDRESSES_NEW (insn, -1);
4505 /* Remove placeholder insn. */
4506 remove_insn (pool->pool_insn);
4511 /* Allocate new constant_pool structure. */
4513 static struct constant_pool *
4514 s390_alloc_pool (void)
4516 struct constant_pool *pool;
4519 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4521 for (i = 0; i < NR_C_MODES; i++)
4522 pool->constants[i] = NULL;
4524 pool->label = gen_label_rtx ();
4525 pool->first_insn = NULL_RTX;
4526 pool->pool_insn = NULL_RTX;
4527 pool->insns = BITMAP_XMALLOC ();
4533 /* Free all memory used by POOL. */
4536 s390_free_pool (struct constant_pool *pool)
4540 for (i = 0; i < NR_C_MODES; i++)
4542 struct constant *c = pool->constants[i];
4545 struct constant *next = c->next;
4551 BITMAP_XFREE (pool->insns);
4556 /* Collect main literal pool. Return NULL on overflow. */
4558 static struct constant_pool *
4559 s390_mainpool_start (void)
4561 struct constant_pool *pool;
4564 pool = s390_alloc_pool ();
4566 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4568 if (GET_CODE (insn) == INSN
4569 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4570 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4572 if (pool->pool_insn)
4574 pool->pool_insn = insn;
4577 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4579 rtx pool_ref = NULL_RTX;
4580 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4583 rtx constant = get_pool_constant (pool_ref);
4584 enum machine_mode mode = get_pool_mode (pool_ref);
4585 s390_add_constant (pool, constant, mode);
4590 if (!pool->pool_insn)
4593 if (pool->size >= 4096)
4595 /* We're going to chunkify the pool, so remove the main
4596 pool placeholder insn. */
4597 remove_insn (pool->pool_insn);
4599 s390_free_pool (pool);
4606 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4607 Modify the current function to output the pool constants as well as
4608 the pool register setup instruction. BASE_REG is the register to
4609 be used as pool base register. */
4612 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4616 /* If the pool is empty, we're done. */
4617 if (pool->size == 0)
4619 remove_insn (pool->pool_insn);
4620 s390_free_pool (pool);
4624 /* We need correct insn addresses. */
4625 shorten_branches (get_insns ());
4627 /* On zSeries, we use a LARL to load the pool register. The pool is
4628 located in the .rodata section, so we emit it after the function. */
4629 if (TARGET_CPU_ZARCH)
4631 insn = gen_main_base_64 (base_reg, pool->label);
4632 insn = emit_insn_after (insn, pool->pool_insn);
4633 INSN_ADDRESSES_NEW (insn, -1);
4634 remove_insn (pool->pool_insn);
4636 insn = get_last_insn ();
4637 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4638 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4640 s390_dump_pool (pool, 0);
4643 /* On S/390, if the total size of the function's code plus literal pool
4644 does not exceed 4096 bytes, we use BASR to set up a function base
4645 pointer, and emit the literal pool at the end of the function. */
4646 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4647 + pool->size + 8 /* alignment slop */ < 4096)
4649 insn = gen_main_base_31_small (base_reg, pool->label);
4650 insn = emit_insn_after (insn, pool->pool_insn);
4651 INSN_ADDRESSES_NEW (insn, -1);
4652 remove_insn (pool->pool_insn);
4654 insn = emit_label_after (pool->label, insn);
4655 INSN_ADDRESSES_NEW (insn, -1);
4657 insn = get_last_insn ();
4658 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4659 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4661 s390_dump_pool (pool, 1);
4664 /* Otherwise, we emit an inline literal pool and use BASR to branch
4665 over it, setting up the pool register at the same time. */
4668 rtx pool_end = gen_label_rtx ();
4670 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4671 insn = emit_insn_after (insn, pool->pool_insn);
4672 INSN_ADDRESSES_NEW (insn, -1);
4673 remove_insn (pool->pool_insn);
4675 insn = emit_label_after (pool->label, insn);
4676 INSN_ADDRESSES_NEW (insn, -1);
4678 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4679 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4681 insn = emit_label_after (pool_end, pool->pool_insn);
4682 INSN_ADDRESSES_NEW (insn, -1);
4684 s390_dump_pool (pool, 1);
4688 /* Replace all literal pool references. */
4690 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4693 replace_ltrel_base (&PATTERN (insn), base_reg);
4695 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4697 rtx addr, pool_ref = NULL_RTX;
4698 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4701 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4702 get_pool_mode (pool_ref));
4703 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4704 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4705 INSN_CODE (insn) = -1;
4711 /* Free the pool. */
4712 s390_free_pool (pool);
4715 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4716 We have decided we cannot use this pool, so revert all changes
4717 to the current function that were done by s390_mainpool_start. */
4719 s390_mainpool_cancel (struct constant_pool *pool)
4721 /* We didn't actually change the instruction stream, so simply
4722 free the pool memory. */
4723 s390_free_pool (pool);
4727 /* Chunkify the literal pool. BASE_REG is to be used as pool
4730 #define S390_POOL_CHUNK_MIN 0xc00
4731 #define S390_POOL_CHUNK_MAX 0xe00
4733 static struct constant_pool *
4734 s390_chunkify_start (rtx base_reg)
4736 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4739 rtx pending_ltrel = NULL_RTX;
4742 rtx (*gen_reload_base) (rtx, rtx) =
4743 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4746 /* We need correct insn addresses. */
4748 shorten_branches (get_insns ());
4750 /* Scan all insns and move literals to pool chunks. */
4752 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4754 /* Check for pending LTREL_BASE. */
4757 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4760 if (ltrel_base == pending_ltrel)
4761 pending_ltrel = NULL_RTX;
4767 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4769 rtx pool_ref = NULL_RTX;
4770 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4773 rtx constant = get_pool_constant (pool_ref);
4774 enum machine_mode mode = get_pool_mode (pool_ref);
4777 curr_pool = s390_start_pool (&pool_list, insn);
4779 s390_add_constant (curr_pool, constant, mode);
4780 s390_add_pool_insn (curr_pool, insn);
4782 /* Don't split the pool chunk between a LTREL_OFFSET load
4783 and the corresponding LTREL_BASE. */
4784 if (GET_CODE (constant) == CONST
4785 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4786 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4790 pending_ltrel = pool_ref;
4795 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4798 s390_add_pool_insn (curr_pool, insn);
4799 /* An LTREL_BASE must follow within the same basic block. */
4805 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4806 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4809 if (TARGET_CPU_ZARCH)
4811 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4814 s390_end_pool (curr_pool, NULL_RTX);
4819 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4820 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4823 /* We will later have to insert base register reload insns.
4824 Those will have an effect on code size, which we need to
4825 consider here. This calculation makes rather pessimistic
4826 worst-case assumptions. */
4827 if (GET_CODE (insn) == CODE_LABEL)
4830 if (chunk_size < S390_POOL_CHUNK_MIN
4831 && curr_pool->size < S390_POOL_CHUNK_MIN)
4834 /* Pool chunks can only be inserted after BARRIERs ... */
4835 if (GET_CODE (insn) == BARRIER)
4837 s390_end_pool (curr_pool, insn);
4842 /* ... so if we don't find one in time, create one. */
4843 else if ((chunk_size > S390_POOL_CHUNK_MAX
4844 || curr_pool->size > S390_POOL_CHUNK_MAX))
4846 rtx label, jump, barrier;
4848 /* We can insert the barrier only after a 'real' insn. */
4849 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4851 if (get_attr_length (insn) == 0)
4854 /* Don't separate LTREL_BASE from the corresponding
4855 LTREL_OFFSET load. */
4859 label = gen_label_rtx ();
4860 jump = emit_jump_insn_after (gen_jump (label), insn);
4861 barrier = emit_barrier_after (jump);
4862 insn = emit_label_after (label, barrier);
4863 JUMP_LABEL (jump) = label;
4864 LABEL_NUSES (label) = 1;
4866 INSN_ADDRESSES_NEW (jump, -1);
4867 INSN_ADDRESSES_NEW (barrier, -1);
4868 INSN_ADDRESSES_NEW (insn, -1);
4870 s390_end_pool (curr_pool, barrier);
4878 s390_end_pool (curr_pool, NULL_RTX);
4883 /* Find all labels that are branched into
4884 from an insn belonging to a different chunk. */
4886 far_labels = BITMAP_XMALLOC ();
4888 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4890 /* Labels marked with LABEL_PRESERVE_P can be target
4891 of non-local jumps, so we have to mark them.
4892 The same holds for named labels.
4894 Don't do that, however, if it is the label before
4897 if (GET_CODE (insn) == CODE_LABEL
4898 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4900 rtx vec_insn = next_real_insn (insn);
4901 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4902 PATTERN (vec_insn) : NULL_RTX;
4904 || !(GET_CODE (vec_pat) == ADDR_VEC
4905 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4906 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4909 /* If we have a direct jump (conditional or unconditional)
4910 or a casesi jump, check all potential targets. */
4911 else if (GET_CODE (insn) == JUMP_INSN)
4913 rtx pat = PATTERN (insn);
4914 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4915 pat = XVECEXP (pat, 0, 0);
4917 if (GET_CODE (pat) == SET)
4919 rtx label = JUMP_LABEL (insn);
4922 if (s390_find_pool (pool_list, label)
4923 != s390_find_pool (pool_list, insn))
4924 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4927 else if (GET_CODE (pat) == PARALLEL
4928 && XVECLEN (pat, 0) == 2
4929 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4930 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4931 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4933 /* Find the jump table used by this casesi jump. */
4934 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4935 rtx vec_insn = next_real_insn (vec_label);
4936 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4937 PATTERN (vec_insn) : NULL_RTX;
4939 && (GET_CODE (vec_pat) == ADDR_VEC
4940 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4942 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4944 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4946 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4948 if (s390_find_pool (pool_list, label)
4949 != s390_find_pool (pool_list, insn))
4950 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4957 /* Insert base register reload insns before every pool. */
4959 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4961 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4962 rtx insn = curr_pool->first_insn;
4963 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4966 /* Insert base register reload insns at every far label. */
4968 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4969 if (GET_CODE (insn) == CODE_LABEL
4970 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4972 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4975 rtx new_insn = gen_reload_base (base_reg, pool->label);
4976 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4981 BITMAP_XFREE (far_labels);
4984 /* Recompute insn addresses. */
4986 init_insn_lengths ();
4987 shorten_branches (get_insns ());
4992 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4993 After we have decided to use this list, finish implementing
4994 all changes to the current function as required. BASE_REG is
4995 to be used as pool base register. */
4998 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
5000 struct constant_pool *curr_pool = NULL;
5004 /* Replace all literal pool references. */
5006 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5009 replace_ltrel_base (&PATTERN (insn), base_reg);
5011 curr_pool = s390_find_pool (pool_list, insn);
5015 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
5017 rtx addr, pool_ref = NULL_RTX;
5018 find_constant_pool_ref (PATTERN (insn), &pool_ref);
5021 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
5022 get_pool_mode (pool_ref));
5023 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
5024 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
5025 INSN_CODE (insn) = -1;
5030 /* Dump out all literal pools. */
5032 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5033 s390_dump_pool (curr_pool, 0);
5035 /* Free pool list. */
5039 struct constant_pool *next = pool_list->next;
5040 s390_free_pool (pool_list);
5045 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
5046 We have decided we cannot use this list, so revert all changes
5047 to the current function that were done by s390_chunkify_start. */
5050 s390_chunkify_cancel (struct constant_pool *pool_list)
5052 struct constant_pool *curr_pool = NULL;
5055 /* Remove all pool placeholder insns. */
5057 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
5059 /* Did we insert an extra barrier? Remove it. */
5060 rtx barrier = PREV_INSN (curr_pool->pool_insn);
5061 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
5062 rtx label = NEXT_INSN (curr_pool->pool_insn);
5064 if (jump && GET_CODE (jump) == JUMP_INSN
5065 && barrier && GET_CODE (barrier) == BARRIER
5066 && label && GET_CODE (label) == CODE_LABEL
5067 && GET_CODE (PATTERN (jump)) == SET
5068 && SET_DEST (PATTERN (jump)) == pc_rtx
5069 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
5070 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
5073 remove_insn (barrier);
5074 remove_insn (label);
5077 remove_insn (curr_pool->pool_insn);
5080 /* Remove all base register reload insns. */
5082 for (insn = get_insns (); insn; )
5084 rtx next_insn = NEXT_INSN (insn);
5086 if (GET_CODE (insn) == INSN
5087 && GET_CODE (PATTERN (insn)) == SET
5088 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
5089 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
5095 /* Free pool list. */
5099 struct constant_pool *next = pool_list->next;
5100 s390_free_pool (pool_list);
5106 /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */
5109 s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align)
5113 switch (GET_MODE_CLASS (mode))
5116 if (GET_CODE (exp) != CONST_DOUBLE)
5119 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
5120 assemble_real (r, mode, align);
5124 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
5133 /* Rework the prolog/epilog to avoid saving/restoring
5134 registers unnecessarily. BASE_USED specifies whether
5135 the literal pool base register needs to be saved. */
5138 s390_optimize_prolog (bool base_used)
5140 rtx insn, new_insn, next_insn;
5142 /* Do a final recompute of the frame-related data. */
5144 s390_frame_info (base_used, cfun->machine->save_return_addr_p);
5145 regs_ever_live[BASE_REGISTER] = base_used;
5146 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
5147 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5149 /* If all special registers are in fact used, there's nothing we
5150 can do, so no point in walking the insn list. */
5152 if (cfun->machine->first_save_gpr <= BASE_REGISTER
5153 && cfun->machine->last_save_gpr >= BASE_REGISTER
5154 && (TARGET_CPU_ZARCH
5155 || (cfun->machine->first_save_gpr <= RETURN_REGNUM
5156 && cfun->machine->last_save_gpr >= RETURN_REGNUM)))
5159 /* Search for prolog/epilog insns and replace them. */
5161 for (insn = get_insns (); insn; insn = next_insn)
5163 int first, last, off;
5164 rtx set, base, offset;
5166 next_insn = NEXT_INSN (insn);
5168 if (GET_CODE (insn) != INSN)
5171 if (GET_CODE (PATTERN (insn)) == PARALLEL
5172 && store_multiple_operation (PATTERN (insn), VOIDmode))
5174 set = XVECEXP (PATTERN (insn), 0, 0);
5175 first = REGNO (SET_SRC (set));
5176 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5177 offset = const0_rtx;
5178 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5179 off = INTVAL (offset) - first * UNITS_PER_WORD;
5181 if (GET_CODE (base) != REG || off < 0)
5183 if (first > BASE_REGISTER || last < BASE_REGISTER)
5186 if (cfun->machine->first_save_gpr != -1)
5188 new_insn = save_gprs (base, off, cfun->machine->first_save_gpr,
5189 cfun->machine->last_save_gpr);
5190 new_insn = emit_insn_before (new_insn, insn);
5191 INSN_ADDRESSES_NEW (new_insn, -1);
5198 if (GET_CODE (PATTERN (insn)) == SET
5199 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5200 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGISTER
5201 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5203 set = PATTERN (insn);
5204 offset = const0_rtx;
5205 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5206 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5208 if (GET_CODE (base) != REG || off < 0)
5211 if (cfun->machine->first_save_gpr != -1)
5213 new_insn = save_gprs (base, off, cfun->machine->first_save_gpr,
5214 cfun->machine->last_save_gpr);
5215 new_insn = emit_insn_before (new_insn, insn);
5216 INSN_ADDRESSES_NEW (new_insn, -1);
5223 if (GET_CODE (PATTERN (insn)) == PARALLEL
5224 && load_multiple_operation (PATTERN (insn), VOIDmode))
5226 set = XVECEXP (PATTERN (insn), 0, 0);
5227 first = REGNO (SET_DEST (set));
5228 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5229 offset = const0_rtx;
5230 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5231 off = INTVAL (offset) - first * UNITS_PER_WORD;
5233 if (GET_CODE (base) != REG || off < 0)
5235 if (first > BASE_REGISTER || last < BASE_REGISTER)
5238 if (cfun->machine->first_restore_gpr != -1)
5240 new_insn = restore_gprs (base, off, cfun->machine->first_restore_gpr,
5241 cfun->machine->last_restore_gpr);
5242 new_insn = emit_insn_before (new_insn, insn);
5243 INSN_ADDRESSES_NEW (new_insn, -1);
5250 if (GET_CODE (PATTERN (insn)) == SET
5251 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5252 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGISTER
5253 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5255 set = PATTERN (insn);
5256 offset = const0_rtx;
5257 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5258 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5260 if (GET_CODE (base) != REG || off < 0)
5263 if (cfun->machine->first_restore_gpr != -1)
5265 new_insn = restore_gprs (base, off, cfun->machine->first_restore_gpr,
5266 cfun->machine->last_restore_gpr);
5267 new_insn = emit_insn_before (new_insn, insn);
5268 INSN_ADDRESSES_NEW (new_insn, -1);
5277 /* Perform machine-dependent processing. */
5282 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5283 bool base_used = false;
5284 bool pool_overflow = false;
5286 /* Make sure all splits have been performed; splits after
5287 machine_dependent_reorg might confuse insn length counts. */
5288 split_all_insns_noflow ();
5291 /* In small leaf functions, try to use an unused call-clobbered
5292 register as base register to avoid save/restore overhead. */
5293 if (current_function_is_leaf && !regs_ever_live[5])
5294 base_reg = gen_rtx_REG (Pmode, 5);
5297 /* Install the main literal pool and the associated base
5298 register load insns.
5300 In addition, there are two problematic situations we need
5303 - the literal pool might be > 4096 bytes in size, so that
5304 some of its elements cannot be directly accessed
5306 - a branch target might be > 64K away from the branch, so that
5307 it is not possible to use a PC-relative instruction.
5309 To fix those, we split the single literal pool into multiple
5310 pool chunks, reloading the pool base register at various
5311 points throughout the function to ensure it always points to
5312 the pool chunk the following code expects, and / or replace
5313 PC-relative branches by absolute branches.
5315 However, the two problems are interdependent: splitting the
5316 literal pool can move a branch further away from its target,
5317 causing the 64K limit to overflow, and on the other hand,
5318 replacing a PC-relative branch by an absolute branch means
5319 we need to put the branch target address into the literal
5320 pool, possibly causing it to overflow.
5322 So, we loop trying to fix up both problems until we manage
5323 to satisfy both conditions at the same time. Note that the
5324 loop is guaranteed to terminate as every pass of the loop
5325 strictly decreases the total number of PC-relative branches
5326 in the function. (This is not completely true as there
5327 might be branch-over-pool insns introduced by chunkify_start.
5328 Those never need to be split however.) */
5332 struct constant_pool *pool = NULL;
5334 /* Collect the literal pool. */
5337 pool = s390_mainpool_start ();
5339 pool_overflow = true;
5342 /* If literal pool overflowed, start to chunkify it. */
5344 pool = s390_chunkify_start (base_reg);
5346 /* Split out-of-range branches. If this has created new
5347 literal pool entries, cancel current chunk list and
5348 recompute it. zSeries machines have large branch
5349 instructions, so we never need to split a branch. */
5350 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5353 s390_chunkify_cancel (pool);
5355 s390_mainpool_cancel (pool);
5360 /* If we made it up to here, both conditions are satisfied.
5361 Finish up literal pool related changes. */
5362 if ((pool_overflow || pool->size > 0)
5363 && REGNO (base_reg) == BASE_REGISTER)
5367 s390_chunkify_finish (pool, base_reg);
5369 s390_mainpool_finish (pool, base_reg);
5374 s390_optimize_prolog (base_used);
5378 /* Return an RTL expression representing the value of the return address
5379 for the frame COUNT steps up from the current frame. FRAME is the
5380 frame pointer of that frame. */
5383 s390_return_addr_rtx (int count, rtx frame)
5387 /* Without backchain, we fail for all but the current frame. */
5389 if (!TARGET_BACKCHAIN && count > 0)
5392 /* For the current frame, we need to make sure the initial
5393 value of RETURN_REGNUM is actually saved. */
5396 cfun->machine->save_return_addr_p = true;
5398 /* To retrieve the return address we read the stack slot where the
5399 corresponding RETURN_REGNUM value was saved. */
5401 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5402 addr = memory_address (Pmode, addr);
5403 return gen_rtx_MEM (Pmode, addr);
5406 /* Find first call clobbered register unused in a function.
5407 This could be used as base register in a leaf function
5408 or for holding the return address before epilogue. */
5411 find_unused_clobbered_reg (void)
5414 for (i = 0; i < 6; i++)
5415 if (!regs_ever_live[i])
5420 /* Fill cfun->machine with info about frame of current function.
5421 BASE_USED and RETURN_ADDR_USED specify whether we assume the
5422 base and return address register will need to be saved. */
5425 s390_frame_info (int base_used, int return_addr_used)
5429 HOST_WIDE_INT fsize = get_frame_size ();
5431 if (!TARGET_64BIT && fsize > 0x7fff0000)
5432 fatal_error ("Total size of local variables exceeds architecture limit.");
5434 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5435 cfun->machine->save_fprs_p = 0;
5437 for (i = 24; i < 32; i++)
5438 if (regs_ever_live[i] && !global_regs[i])
5440 cfun->machine->save_fprs_p = 1;
5444 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5446 /* Does function need to setup frame and save area. */
5448 if (!current_function_is_leaf
5449 || TARGET_TPF_PROFILING
5450 || cfun->machine->frame_size > 0
5451 || current_function_calls_alloca
5452 || current_function_stdarg)
5453 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5455 /* Find first and last gpr to be saved. We trust regs_ever_live
5456 data, except that we don't save and restore global registers.
5458 Also, all registers with special meaning to the compiler need
5459 to be handled extra. */
5461 for (i = 0; i < 16; i++)
5462 live_regs[i] = regs_ever_live[i] && !global_regs[i];
5465 live_regs[PIC_OFFSET_TABLE_REGNUM] =
5466 regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
5468 live_regs[BASE_REGISTER] = base_used;
5469 live_regs[RETURN_REGNUM] = return_addr_used;
5470 live_regs[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5472 for (i = 6; i < 16; i++)
5475 for (j = 15; j > i; j--)
5481 /* Nothing to save/restore. */
5482 cfun->machine->first_save_gpr = -1;
5483 cfun->machine->first_restore_gpr = -1;
5484 cfun->machine->last_save_gpr = -1;
5485 cfun->machine->last_restore_gpr = -1;
5489 /* Save / Restore from gpr i to j. */
5490 cfun->machine->first_save_gpr = i;
5491 cfun->machine->first_restore_gpr = i;
5492 cfun->machine->last_save_gpr = j;
5493 cfun->machine->last_restore_gpr = j;
5496 /* Varargs functions need to save gprs 2 to 6. */
5497 if (current_function_stdarg)
5499 if (cfun->machine->first_save_gpr == -1
5500 || cfun->machine->first_save_gpr > 2)
5501 cfun->machine->first_save_gpr = 2;
5503 if (cfun->machine->last_save_gpr == -1
5504 || cfun->machine->last_save_gpr < 6)
5505 cfun->machine->last_save_gpr = 6;
5509 /* Return offset between argument pointer and frame pointer
5510 initially after prologue. */
5513 s390_arg_frame_offset (void)
5515 /* See the comment in s390_emit_prologue about the assumptions we make
5516 whether or not the base and return address register need to be saved. */
5517 int return_addr_used = !current_function_is_leaf
5518 || TARGET_TPF_PROFILING
5519 || regs_ever_live[RETURN_REGNUM]
5520 || cfun->machine->save_return_addr_p;
5522 s390_frame_info (1, !TARGET_CPU_ZARCH || return_addr_used);
5523 return cfun->machine->frame_size + STACK_POINTER_OFFSET;
5526 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5527 to register BASE. Return generated insn. */
5530 save_fpr (rtx base, int offset, int regnum)
5533 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5534 set_mem_alias_set (addr, s390_sr_alias_set);
5536 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5539 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5540 to register BASE. Return generated insn. */
5543 restore_fpr (rtx base, int offset, int regnum)
5546 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5547 set_mem_alias_set (addr, s390_sr_alias_set);
5549 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5552 /* Generate insn to save registers FIRST to LAST into
5553 the register save area located at offset OFFSET
5554 relative to register BASE. */
5557 save_gprs (rtx base, int offset, int first, int last)
5559 rtx addr, insn, note;
5562 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5563 addr = gen_rtx_MEM (Pmode, addr);
5564 set_mem_alias_set (addr, s390_sr_alias_set);
5566 /* Special-case single register. */
5570 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5572 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5574 RTX_FRAME_RELATED_P (insn) = 1;
5579 insn = gen_store_multiple (addr,
5580 gen_rtx_REG (Pmode, first),
5581 GEN_INT (last - first + 1));
5584 /* We need to set the FRAME_RELATED flag on all SETs
5585 inside the store-multiple pattern.
5587 However, we must not emit DWARF records for registers 2..5
5588 if they are stored for use by variable arguments ...
5590 ??? Unfortunately, it is not enough to simply not the the
5591 FRAME_RELATED flags for those SETs, because the first SET
5592 of the PARALLEL is always treated as if it had the flag
5593 set, even if it does not. Therefore we emit a new pattern
5594 without those registers as REG_FRAME_RELATED_EXPR note. */
5598 rtx pat = PATTERN (insn);
5600 for (i = 0; i < XVECLEN (pat, 0); i++)
5601 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5602 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5604 RTX_FRAME_RELATED_P (insn) = 1;
5608 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5609 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5610 gen_rtx_REG (Pmode, 6),
5611 GEN_INT (last - 6 + 1));
5612 note = PATTERN (note);
5615 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5616 note, REG_NOTES (insn));
5618 for (i = 0; i < XVECLEN (note, 0); i++)
5619 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5620 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5622 RTX_FRAME_RELATED_P (insn) = 1;
5628 /* Generate insn to restore registers FIRST to LAST from
5629 the register save area located at offset OFFSET
5630 relative to register BASE. */
5633 restore_gprs (rtx base, int offset, int first, int last)
5637 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5638 addr = gen_rtx_MEM (Pmode, addr);
5639 set_mem_alias_set (addr, s390_sr_alias_set);
5641 /* Special-case single register. */
5645 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5647 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5652 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5654 GEN_INT (last - first + 1));
5658 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5659 annotate generated insns with REG_MAYBE_DEAD notes. */
5661 static GTY(()) rtx got_symbol;
5663 s390_load_got (int maybe_dead)
5667 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5668 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5671 if (TARGET_CPU_ZARCH)
5673 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5675 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5682 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5683 UNSPEC_LTREL_OFFSET);
5684 offset = gen_rtx_CONST (Pmode, offset);
5685 offset = force_const_mem (Pmode, offset);
5687 insn = emit_move_insn (pic_offset_table_rtx, offset);
5689 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5692 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5694 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5696 insn = emit_move_insn (pic_offset_table_rtx, offset);
5698 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5703 /* Expand the prologue into a bunch of separate insns. */
5706 s390_emit_prologue (void)
5712 /* At this point, we decide whether we'll need to save/restore the
5713 return address register. This decision is final on zSeries machines;
5714 on S/390 it can still be overridden in s390_split_branches. */
5716 if (!current_function_is_leaf
5717 || TARGET_TPF_PROFILING
5718 || regs_ever_live[RETURN_REGNUM])
5719 cfun->machine->save_return_addr_p = 1;
5721 /* Compute frame info. Note that at this point, we assume the base
5722 register and -on S/390- the return register always need to be saved.
5723 This is done because the usage of these registers might change even
5724 after the prolog was emitted. If it turns out later that we really
5725 don't need them, the prolog/epilog code is modified again. */
5727 s390_frame_info (1, !TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p);
5729 /* We need to update regs_ever_live to avoid data-flow problems. */
5731 regs_ever_live[BASE_REGISTER] = 1;
5732 regs_ever_live[RETURN_REGNUM] = !TARGET_CPU_ZARCH
5733 || cfun->machine->save_return_addr_p;
5734 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5736 /* Choose best register to use for temp use within prologue.
5737 See below for why TPF must use the register 1. */
5739 if (!current_function_is_leaf
5740 && !TARGET_TPF_PROFILING)
5741 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5743 temp_reg = gen_rtx_REG (Pmode, 1);
5745 /* Save call saved gprs. */
5747 insn = save_gprs (stack_pointer_rtx, 0,
5748 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5751 /* Dummy insn to mark literal pool slot. */
5753 emit_insn (gen_main_pool ());
5755 /* Save fprs for variable args. */
5757 if (current_function_stdarg)
5758 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5759 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5761 /* Save fprs 4 and 6 if used (31 bit ABI). */
5764 for (i = 18; i < 20; i++)
5765 if (regs_ever_live[i] && !global_regs[i])
5767 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5768 RTX_FRAME_RELATED_P (insn) = 1;
5771 /* Decrement stack pointer. */
5773 if (cfun->machine->frame_size > 0)
5775 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5777 /* Save incoming stack pointer into temp reg. */
5779 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5781 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5784 /* Subtract frame size from stack pointer. */
5786 if (DISP_IN_RANGE (INTVAL (frame_off)))
5788 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5789 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5791 insn = emit_insn (insn);
5795 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5796 frame_off = force_const_mem (Pmode, frame_off);
5798 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5801 RTX_FRAME_RELATED_P (insn) = 1;
5803 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5804 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5805 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5806 GEN_INT (-cfun->machine->frame_size))),
5809 /* Set backchain. */
5811 if (TARGET_BACKCHAIN)
5813 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5814 set_mem_alias_set (addr, s390_sr_alias_set);
5815 insn = emit_insn (gen_move_insn (addr, temp_reg));
5818 /* If we support asynchronous exceptions (e.g. for Java),
5819 we need to make sure the backchain pointer is set up
5820 before any possibly trapping memory access. */
5822 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5824 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5825 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5829 /* Save fprs 8 - 15 (64 bit ABI). */
5831 if (cfun->machine->save_fprs_p)
5833 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5835 for (i = 24; i < 32; i++)
5836 if (regs_ever_live[i] && !global_regs[i])
5838 rtx addr = plus_constant (stack_pointer_rtx,
5839 cfun->machine->frame_size - 64 + (i-24)*8);
5841 insn = save_fpr (temp_reg, (i-24)*8, i);
5842 RTX_FRAME_RELATED_P (insn) = 1;
5844 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5845 gen_rtx_SET (VOIDmode,
5846 gen_rtx_MEM (DFmode, addr),
5847 gen_rtx_REG (DFmode, i)),
5852 /* Set frame pointer, if needed. */
5854 if (frame_pointer_needed)
5856 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5857 RTX_FRAME_RELATED_P (insn) = 1;
5860 /* Set up got pointer, if needed. */
5862 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5863 s390_load_got(true);
5865 if (TARGET_TPF_PROFILING)
5867 /* Generate a BAS instruction to serve as a function
5868 entry intercept to facilitate the use of tracing
5869 algorithms located at the branch target. */
5870 emit_insn (gen_prologue_tpf ());
5872 /* Emit a blockage here so that all code
5873 lies between the profiling mechanisms. */
5874 emit_insn (gen_blockage ());
5878 /* Expand the epilogue into a bunch of separate insns. */
5881 s390_emit_epilogue (bool sibcall)
5883 rtx frame_pointer, return_reg;
5884 int area_bottom, area_top, offset = 0;
5888 if (TARGET_TPF_PROFILING)
5891 /* Generate a BAS instruction to serve as a function
5892 entry intercept to facilitate the use of tracing
5893 algorithms located at the branch target. */
5895 /* Emit a blockage here so that all code
5896 lies between the profiling mechanisms. */
5897 emit_insn (gen_blockage ());
5899 emit_insn (gen_epilogue_tpf ());
5902 /* Check whether to use frame or stack pointer for restore. */
5904 frame_pointer = frame_pointer_needed ?
5905 hard_frame_pointer_rtx : stack_pointer_rtx;
5907 /* Compute which parts of the save area we need to access. */
5909 if (cfun->machine->first_restore_gpr != -1)
5911 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5912 area_top = (cfun->machine->last_restore_gpr + 1) * UNITS_PER_WORD;
5916 area_bottom = INT_MAX;
5922 if (cfun->machine->save_fprs_p)
5924 if (area_bottom > -64)
5932 for (i = 18; i < 20; i++)
5933 if (regs_ever_live[i] && !global_regs[i])
5935 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5936 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5937 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5938 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5942 /* Check whether we can access the register save area.
5943 If not, increment the frame pointer as required. */
5945 if (area_top <= area_bottom)
5947 /* Nothing to restore. */
5949 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5950 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5952 /* Area is in range. */
5953 offset = cfun->machine->frame_size;
5957 rtx insn, frame_off;
5959 offset = area_bottom < 0 ? -area_bottom : 0;
5960 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5962 if (DISP_IN_RANGE (INTVAL (frame_off)))
5964 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5965 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5966 insn = emit_insn (insn);
5970 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5971 frame_off = force_const_mem (Pmode, frame_off);
5973 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5977 /* Restore call saved fprs. */
5981 if (cfun->machine->save_fprs_p)
5982 for (i = 24; i < 32; i++)
5983 if (regs_ever_live[i] && !global_regs[i])
5984 restore_fpr (frame_pointer,
5985 offset - 64 + (i-24) * 8, i);
5989 for (i = 18; i < 20; i++)
5990 if (regs_ever_live[i] && !global_regs[i])
5991 restore_fpr (frame_pointer,
5992 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5995 /* Return register. */
5997 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5999 /* Restore call saved gprs. */
6001 if (cfun->machine->first_restore_gpr != -1)
6006 /* Check for global register and save them
6007 to stack location from where they get restored. */
6009 for (i = cfun->machine->first_restore_gpr;
6010 i <= cfun->machine->last_restore_gpr;
6013 /* These registers are special and need to be
6014 restored in any case. */
6015 if (i == STACK_POINTER_REGNUM
6016 || i == RETURN_REGNUM
6017 || i == BASE_REGISTER
6018 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
6023 addr = plus_constant (frame_pointer,
6024 offset + i * UNITS_PER_WORD);
6025 addr = gen_rtx_MEM (Pmode, addr);
6026 set_mem_alias_set (addr, s390_sr_alias_set);
6027 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
6033 /* Fetch return address from stack before load multiple,
6034 this will do good for scheduling. */
6036 if (cfun->machine->save_return_addr_p
6037 || (cfun->machine->first_restore_gpr < BASE_REGISTER
6038 && cfun->machine->last_restore_gpr > RETURN_REGNUM))
6040 int return_regnum = find_unused_clobbered_reg();
6043 return_reg = gen_rtx_REG (Pmode, return_regnum);
6045 addr = plus_constant (frame_pointer,
6046 offset + RETURN_REGNUM * UNITS_PER_WORD);
6047 addr = gen_rtx_MEM (Pmode, addr);
6048 set_mem_alias_set (addr, s390_sr_alias_set);
6049 emit_move_insn (return_reg, addr);
6053 /* ??? As references to the base register are not made
6054 explicit in insn RTX code, we have to add a barrier here
6055 to prevent incorrect scheduling. */
6057 emit_insn (gen_blockage());
6059 insn = restore_gprs (frame_pointer, offset,
6060 cfun->machine->first_restore_gpr,
6061 cfun->machine->last_restore_gpr);
6068 /* Return to caller. */
6070 p = rtvec_alloc (2);
6072 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
6073 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
6074 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
6079 /* Return the size in bytes of a function argument of
6080 type TYPE and/or mode MODE. At least one of TYPE or
6081 MODE must be specified. */
6084 s390_function_arg_size (enum machine_mode mode, tree type)
6087 return int_size_in_bytes (type);
6089 /* No type info available for some library calls ... */
6090 if (mode != BLKmode)
6091 return GET_MODE_SIZE (mode);
6093 /* If we have neither type nor mode, abort */
6097 /* Return true if a function argument of type TYPE and mode MODE
6098 is to be passed in a floating-point register, if available. */
6101 s390_function_arg_float (enum machine_mode mode, tree type)
6103 int size = s390_function_arg_size (mode, type);
6107 /* Soft-float changes the ABI: no floating-point registers are used. */
6108 if (TARGET_SOFT_FLOAT)
6111 /* No type info available for some library calls ... */
6113 return mode == SFmode || mode == DFmode;
6115 /* The ABI says that record types with a single member are treated
6116 just like that member would be. */
6117 while (TREE_CODE (type) == RECORD_TYPE)
6119 tree field, single = NULL_TREE;
6121 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
6123 if (TREE_CODE (field) != FIELD_DECL)
6126 if (single == NULL_TREE)
6127 single = TREE_TYPE (field);
6132 if (single == NULL_TREE)
6138 return TREE_CODE (type) == REAL_TYPE;
6141 /* Return true if a function argument of type TYPE and mode MODE
6142 is to be passed in an integer register, or a pair of integer
6143 registers, if available. */
6146 s390_function_arg_integer (enum machine_mode mode, tree type)
6148 int size = s390_function_arg_size (mode, type);
6152 /* No type info available for some library calls ... */
6154 return GET_MODE_CLASS (mode) == MODE_INT
6155 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6157 /* We accept small integral (and similar) types. */
6158 if (INTEGRAL_TYPE_P (type)
6159 || POINTER_TYPE_P (type)
6160 || TREE_CODE (type) == OFFSET_TYPE
6161 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6164 /* We also accept structs of size 1, 2, 4, 8 that are not
6165 passed in floating-point registers. */
6166 if (AGGREGATE_TYPE_P (type)
6167 && exact_log2 (size) >= 0
6168 && !s390_function_arg_float (mode, type))
6174 /* Return 1 if a function argument of type TYPE and mode MODE
6175 is to be passed by reference. The ABI specifies that only
6176 structures of size 1, 2, 4, or 8 bytes are passed by value,
6177 all other structures (and complex numbers) are passed by
6181 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
6183 int size = s390_function_arg_size (mode, type);
6189 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6192 if (TREE_CODE (type) == COMPLEX_TYPE
6193 || TREE_CODE (type) == VECTOR_TYPE)
6200 /* Update the data in CUM to advance over an argument of mode MODE and
6201 data type TYPE. (TYPE is null for libcalls where that information
6202 may not be available.). The boolean NAMED specifies whether the
6203 argument is a named argument (as opposed to an unnamed argument
6204 matching an ellipsis). */
6207 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6208 tree type, int named ATTRIBUTE_UNUSED)
6210 if (s390_function_arg_pass_by_reference (mode, type))
6214 else if (s390_function_arg_float (mode, type))
6218 else if (s390_function_arg_integer (mode, type))
6220 int size = s390_function_arg_size (mode, type);
6221 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6227 /* Define where to put the arguments to a function.
6228 Value is zero to push the argument on the stack,
6229 or a hard register in which to store the argument.
6231 MODE is the argument's machine mode.
6232 TYPE is the data type of the argument (as a tree).
6233 This is null for libcalls where that information may
6235 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6236 the preceding args and about the function being called.
6237 NAMED is nonzero if this argument is a named parameter
6238 (otherwise it is an extra parameter matching an ellipsis).
6240 On S/390, we use general purpose registers 2 through 6 to
6241 pass integer, pointer, and certain structure arguments, and
6242 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6243 to pass floating point arguments. All remaining arguments
6244 are pushed to the stack. */
6247 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6248 int named ATTRIBUTE_UNUSED)
6250 if (s390_function_arg_pass_by_reference (mode, type))
6253 if (s390_function_arg_float (mode, type))
6255 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6258 return gen_rtx_REG (mode, cum->fprs + 16);
6260 else if (s390_function_arg_integer (mode, type))
6262 int size = s390_function_arg_size (mode, type);
6263 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6265 if (cum->gprs + n_gprs > 5)
6268 return gen_rtx_REG (mode, cum->gprs + 2);
6271 /* After the real arguments, expand_call calls us once again
6272 with a void_type_node type. Whatever we return here is
6273 passed as operand 2 to the call expanders.
6275 We don't need this feature ... */
6276 else if (type == void_type_node)
6282 /* Return true if return values of type TYPE should be returned
6283 in a memory buffer whose address is passed by the caller as
6284 hidden first argument. */
6287 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6289 /* We accept small integral (and similar) types. */
6290 if (INTEGRAL_TYPE_P (type)
6291 || POINTER_TYPE_P (type)
6292 || TREE_CODE (type) == OFFSET_TYPE
6293 || TREE_CODE (type) == REAL_TYPE)
6294 return int_size_in_bytes (type) > 8;
6296 /* Aggregates and similar constructs are always returned
6298 if (AGGREGATE_TYPE_P (type)
6299 || TREE_CODE (type) == COMPLEX_TYPE
6300 || TREE_CODE (type) == VECTOR_TYPE)
6303 /* ??? We get called on all sorts of random stuff from
6304 aggregate_value_p. We can't abort, but it's not clear
6305 what's safe to return. Pretend it's a struct I guess. */
6309 /* Define where to return a (scalar) value of type TYPE.
6310 If TYPE is null, define where to return a (scalar)
6311 value of mode MODE from a libcall. */
6314 s390_function_value (tree type, enum machine_mode mode)
6318 int unsignedp = TYPE_UNSIGNED (type);
6319 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6322 if (GET_MODE_CLASS (mode) != MODE_INT
6323 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6325 if (GET_MODE_SIZE (mode) > 8)
6328 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6329 return gen_rtx_REG (mode, 16);
6331 return gen_rtx_REG (mode, 2);
6335 /* Create and return the va_list datatype.
6337 On S/390, va_list is an array type equivalent to
6339 typedef struct __va_list_tag
6343 void *__overflow_arg_area;
6344 void *__reg_save_area;
6347 where __gpr and __fpr hold the number of general purpose
6348 or floating point arguments used up to now, respectively,
6349 __overflow_arg_area points to the stack location of the
6350 next argument passed on the stack, and __reg_save_area
6351 always points to the start of the register area in the
6352 call frame of the current function. The function prologue
6353 saves all registers used for argument passing into this
6354 area if the function uses variable arguments. */
6357 s390_build_builtin_va_list (void)
6359 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6361 record = lang_hooks.types.make_type (RECORD_TYPE);
6364 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6366 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6367 long_integer_type_node);
6368 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6369 long_integer_type_node);
6370 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6372 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6375 DECL_FIELD_CONTEXT (f_gpr) = record;
6376 DECL_FIELD_CONTEXT (f_fpr) = record;
6377 DECL_FIELD_CONTEXT (f_ovf) = record;
6378 DECL_FIELD_CONTEXT (f_sav) = record;
6380 TREE_CHAIN (record) = type_decl;
6381 TYPE_NAME (record) = type_decl;
6382 TYPE_FIELDS (record) = f_gpr;
6383 TREE_CHAIN (f_gpr) = f_fpr;
6384 TREE_CHAIN (f_fpr) = f_ovf;
6385 TREE_CHAIN (f_ovf) = f_sav;
6387 layout_type (record);
6389 /* The correct type is an array type of one element. */
6390 return build_array_type (record, build_index_type (size_zero_node));
6393 /* Implement va_start by filling the va_list structure VALIST.
6394 STDARG_P is always true, and ignored.
6395 NEXTARG points to the first anonymous stack argument.
6397 The following global variables are used to initialize
6398 the va_list structure:
6400 current_function_args_info:
6401 holds number of gprs and fprs used for named arguments.
6402 current_function_arg_offset_rtx:
6403 holds the offset of the first anonymous stack argument
6404 (relative to the virtual arg pointer). */
6407 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6409 HOST_WIDE_INT n_gpr, n_fpr;
6411 tree f_gpr, f_fpr, f_ovf, f_sav;
6412 tree gpr, fpr, ovf, sav, t;
6414 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6415 f_fpr = TREE_CHAIN (f_gpr);
6416 f_ovf = TREE_CHAIN (f_fpr);
6417 f_sav = TREE_CHAIN (f_ovf);
6419 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6420 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6421 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6422 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6423 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6425 /* Count number of gp and fp argument registers used. */
6427 n_gpr = current_function_args_info.gprs;
6428 n_fpr = current_function_args_info.fprs;
6430 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6431 TREE_SIDE_EFFECTS (t) = 1;
6432 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6434 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6435 TREE_SIDE_EFFECTS (t) = 1;
6436 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6438 /* Find the overflow area. */
6439 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6441 off = INTVAL (current_function_arg_offset_rtx);
6442 off = off < 0 ? 0 : off;
6443 if (TARGET_DEBUG_ARG)
6444 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6445 (int)n_gpr, (int)n_fpr, off);
6447 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6449 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6450 TREE_SIDE_EFFECTS (t) = 1;
6451 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6453 /* Find the register save area. */
6454 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6455 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6456 build_int_2 (-STACK_POINTER_OFFSET, -1));
6457 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6458 TREE_SIDE_EFFECTS (t) = 1;
6459 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6462 /* Implement va_arg by updating the va_list structure
6463 VALIST as required to retrieve an argument of type
6464 TYPE, and returning that argument.
6466 Generates code equivalent to:
6468 if (integral value) {
6469 if (size <= 4 && args.gpr < 5 ||
6470 size > 4 && args.gpr < 4 )
6471 ret = args.reg_save_area[args.gpr+8]
6473 ret = *args.overflow_arg_area++;
6474 } else if (float value) {
6476 ret = args.reg_save_area[args.fpr+64]
6478 ret = *args.overflow_arg_area++;
6479 } else if (aggregate value) {
6481 ret = *args.reg_save_area[args.gpr]
6483 ret = **args.overflow_arg_area++;
6487 s390_gimplify_va_arg (tree valist, tree type, tree *pre_p,
6488 tree *post_p ATTRIBUTE_UNUSED)
6490 tree f_gpr, f_fpr, f_ovf, f_sav;
6491 tree gpr, fpr, ovf, sav, reg, t, u;
6492 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6493 tree lab_false, lab_over, addr;
6495 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6496 f_fpr = TREE_CHAIN (f_gpr);
6497 f_ovf = TREE_CHAIN (f_fpr);
6498 f_sav = TREE_CHAIN (f_ovf);
6500 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6501 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6502 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6503 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6504 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6506 size = int_size_in_bytes (type);
6508 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6510 if (TARGET_DEBUG_ARG)
6512 fprintf (stderr, "va_arg: aggregate type");
6516 /* Aggregates are passed by reference. */
6520 sav_ofs = 2 * UNITS_PER_WORD;
6521 sav_scale = UNITS_PER_WORD;
6522 size = UNITS_PER_WORD;
6525 else if (s390_function_arg_float (TYPE_MODE (type), type))
6527 if (TARGET_DEBUG_ARG)
6529 fprintf (stderr, "va_arg: float type");
6533 /* FP args go in FP registers, if present. */
6537 sav_ofs = 16 * UNITS_PER_WORD;
6539 /* TARGET_64BIT has up to 4 parameter in fprs */
6540 max_reg = TARGET_64BIT ? 3 : 1;
6544 if (TARGET_DEBUG_ARG)
6546 fprintf (stderr, "va_arg: other type");
6550 /* Otherwise into GP registers. */
6553 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6554 sav_ofs = 2 * UNITS_PER_WORD;
6556 if (size < UNITS_PER_WORD)
6557 sav_ofs += UNITS_PER_WORD - size;
6559 sav_scale = UNITS_PER_WORD;
6566 /* Pull the value out of the saved registers ... */
6568 lab_false = create_artificial_label ();
6569 lab_over = create_artificial_label ();
6570 addr = create_tmp_var (ptr_type_node, "addr");
6572 t = build_int_2 (max_reg, 0);
6573 TREE_TYPE (t) = TREE_TYPE (reg);
6574 t = build2 (GT_EXPR, boolean_type_node, reg, t);
6575 u = build1 (GOTO_EXPR, void_type_node, lab_false);
6576 t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE);
6577 gimplify_and_add (t, pre_p);
6580 t = build2 (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6584 u = build2 (MULT_EXPR, long_integer_type_node,
6585 reg, build_int_2 (sav_scale, 0));
6586 t = build2 (PLUS_EXPR, ptr_type_node, t, u);
6588 t = build2 (MODIFY_EXPR, void_type_node, addr, t);
6589 gimplify_and_add (t, pre_p);
6591 t = build1 (GOTO_EXPR, void_type_node, lab_over);
6592 gimplify_and_add (t, pre_p);
6594 t = build1 (LABEL_EXPR, void_type_node, lab_false);
6595 append_to_statement_list (t, pre_p);
6598 /* ... Otherwise out of the overflow area. */
6601 if (size < UNITS_PER_WORD)
6602 t = build2 (PLUS_EXPR, TREE_TYPE (t), t,
6603 build_int_2 (UNITS_PER_WORD - size, 0));
6605 gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue);
6607 u = build2 (MODIFY_EXPR, void_type_node, addr, t);
6608 gimplify_and_add (u, pre_p);
6610 t = build2 (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6611 t = build2 (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6612 gimplify_and_add (t, pre_p);
6614 t = build1 (LABEL_EXPR, void_type_node, lab_over);
6615 append_to_statement_list (t, pre_p);
6618 /* Increment register save count. */
6620 u = build2 (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6621 build_int_2 (n_reg, 0));
6622 gimplify_and_add (u, pre_p);
6626 t = build_pointer_type (build_pointer_type (type));
6627 addr = fold_convert (t, addr);
6628 addr = build_fold_indirect_ref (addr);
6632 t = build_pointer_type (type);
6633 addr = fold_convert (t, addr);
6636 return build_fold_indirect_ref (addr);
6644 S390_BUILTIN_THREAD_POINTER,
6645 S390_BUILTIN_SET_THREAD_POINTER,
6650 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6655 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6661 s390_init_builtins (void)
6665 ftype = build_function_type (ptr_type_node, void_list_node);
6666 builtin_function ("__builtin_thread_pointer", ftype,
6667 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6670 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6671 builtin_function ("__builtin_set_thread_pointer", ftype,
6672 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6676 /* Expand an expression EXP that calls a built-in function,
6677 with result going to TARGET if that's convenient
6678 (and in mode MODE if that's convenient).
6679 SUBTARGET may be used as the target for computing one of EXP's operands.
6680 IGNORE is nonzero if the value is to be ignored. */
6683 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6684 enum machine_mode mode ATTRIBUTE_UNUSED,
6685 int ignore ATTRIBUTE_UNUSED)
6689 unsigned int const *code_for_builtin =
6690 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6692 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6693 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6694 tree arglist = TREE_OPERAND (exp, 1);
6695 enum insn_code icode;
6696 rtx op[MAX_ARGS], pat;
6700 if (fcode >= S390_BUILTIN_max)
6701 internal_error ("bad builtin fcode");
6702 icode = code_for_builtin[fcode];
6704 internal_error ("bad builtin fcode");
6706 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6708 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6710 arglist = TREE_CHAIN (arglist), arity++)
6712 const struct insn_operand_data *insn_op;
6714 tree arg = TREE_VALUE (arglist);
6715 if (arg == error_mark_node)
6717 if (arity > MAX_ARGS)
6720 insn_op = &insn_data[icode].operand[arity + nonvoid];
6722 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6724 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6725 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6730 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6732 || GET_MODE (target) != tmode
6733 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6734 target = gen_reg_rtx (tmode);
6740 pat = GEN_FCN (icode) (target);
6744 pat = GEN_FCN (icode) (target, op[0]);
6746 pat = GEN_FCN (icode) (op[0]);
6749 pat = GEN_FCN (icode) (target, op[0], op[1]);
6765 /* Output assembly code for the trampoline template to
6768 On S/390, we use gpr 1 internally in the trampoline code;
6769 gpr 0 is used to hold the static chain. */
6772 s390_trampoline_template (FILE *file)
6776 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6777 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6778 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6779 fprintf (file, "br\t%s\n", reg_names[1]);
6780 fprintf (file, "0:\t.quad\t0\n");
6781 fprintf (file, ".quad\t0\n");
6785 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6786 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6787 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6788 fprintf (file, "br\t%s\n", reg_names[1]);
6789 fprintf (file, ".long\t0\n");
6790 fprintf (file, ".long\t0\n");
6794 /* Emit RTL insns to initialize the variable parts of a trampoline.
6795 FNADDR is an RTX for the address of the function's pure code.
6796 CXT is an RTX for the static chain value for the function. */
6799 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6801 emit_move_insn (gen_rtx_MEM (Pmode,
6802 memory_address (Pmode,
6803 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6804 emit_move_insn (gen_rtx_MEM (Pmode,
6805 memory_address (Pmode,
6806 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6809 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6810 LOW and HIGH, independent of the host word size. */
6813 s390_gen_rtx_const_DI (int high, int low)
6815 #if HOST_BITS_PER_WIDE_INT >= 64
6817 val = (HOST_WIDE_INT)high;
6819 val |= (HOST_WIDE_INT)low;
6821 return GEN_INT (val);
6823 #if HOST_BITS_PER_WIDE_INT >= 32
6824 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6831 /* Output assembler code to FILE to increment profiler label # LABELNO
6832 for profiling a function entry. */
6835 s390_function_profiler (FILE *file, int labelno)
6840 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6842 fprintf (file, "# function profiler \n");
6844 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6845 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6846 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6848 op[2] = gen_rtx_REG (Pmode, 1);
6849 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6850 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6852 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6855 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6856 op[4] = gen_rtx_CONST (Pmode, op[4]);
6861 output_asm_insn ("stg\t%0,%1", op);
6862 output_asm_insn ("larl\t%2,%3", op);
6863 output_asm_insn ("brasl\t%0,%4", op);
6864 output_asm_insn ("lg\t%0,%1", op);
6868 op[6] = gen_label_rtx ();
6870 output_asm_insn ("st\t%0,%1", op);
6871 output_asm_insn ("bras\t%2,%l6", op);
6872 output_asm_insn (".long\t%4", op);
6873 output_asm_insn (".long\t%3", op);
6874 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6875 output_asm_insn ("l\t%0,0(%2)", op);
6876 output_asm_insn ("l\t%2,4(%2)", op);
6877 output_asm_insn ("basr\t%0,%0", op);
6878 output_asm_insn ("l\t%0,%1", op);
6882 op[5] = gen_label_rtx ();
6883 op[6] = gen_label_rtx ();
6885 output_asm_insn ("st\t%0,%1", op);
6886 output_asm_insn ("bras\t%2,%l6", op);
6887 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6888 output_asm_insn (".long\t%4-%l5", op);
6889 output_asm_insn (".long\t%3-%l5", op);
6890 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6891 output_asm_insn ("lr\t%0,%2", op);
6892 output_asm_insn ("a\t%0,0(%2)", op);
6893 output_asm_insn ("a\t%2,4(%2)", op);
6894 output_asm_insn ("basr\t%0,%0", op);
6895 output_asm_insn ("l\t%0,%1", op);
6899 /* Select section for constant in constant pool. In 32-bit mode,
6900 constants go in the function section; in 64-bit mode in .rodata. */
6903 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6904 rtx x ATTRIBUTE_UNUSED,
6905 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6907 if (TARGET_CPU_ZARCH)
6908 readonly_data_section ();
6910 function_section (current_function_decl);
6913 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6914 into its SYMBOL_REF_FLAGS. */
6917 s390_encode_section_info (tree decl, rtx rtl, int first)
6919 default_encode_section_info (decl, rtl, first);
6921 /* If a variable has a forced alignment to < 2 bytes, mark it with
6922 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6923 if (TREE_CODE (decl) == VAR_DECL
6924 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6925 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6928 /* Output thunk to FILE that implements a C++ virtual function call (with
6929 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6930 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6931 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6932 relative to the resulting this pointer. */
6935 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6936 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6942 /* Operand 0 is the target function. */
6943 op[0] = XEXP (DECL_RTL (function), 0);
6944 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6947 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6948 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6949 op[0] = gen_rtx_CONST (Pmode, op[0]);
6952 /* Operand 1 is the 'this' pointer. */
6953 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6954 op[1] = gen_rtx_REG (Pmode, 3);
6956 op[1] = gen_rtx_REG (Pmode, 2);
6958 /* Operand 2 is the delta. */
6959 op[2] = GEN_INT (delta);
6961 /* Operand 3 is the vcall_offset. */
6962 op[3] = GEN_INT (vcall_offset);
6964 /* Operand 4 is the temporary register. */
6965 op[4] = gen_rtx_REG (Pmode, 1);
6967 /* Operands 5 to 8 can be used as labels. */
6973 /* Operand 9 can be used for temporary register. */
6976 /* Generate code. */
6979 /* Setup literal pool pointer if required. */
6980 if ((!DISP_IN_RANGE (delta)
6981 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6982 || (!DISP_IN_RANGE (vcall_offset)
6983 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6985 op[5] = gen_label_rtx ();
6986 output_asm_insn ("larl\t%4,%5", op);
6989 /* Add DELTA to this pointer. */
6992 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6993 output_asm_insn ("la\t%1,%2(%1)", op);
6994 else if (DISP_IN_RANGE (delta))
6995 output_asm_insn ("lay\t%1,%2(%1)", op);
6996 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6997 output_asm_insn ("aghi\t%1,%2", op);
7000 op[6] = gen_label_rtx ();
7001 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
7005 /* Perform vcall adjustment. */
7008 if (DISP_IN_RANGE (vcall_offset))
7010 output_asm_insn ("lg\t%4,0(%1)", op);
7011 output_asm_insn ("ag\t%1,%3(%4)", op);
7013 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7015 output_asm_insn ("lghi\t%4,%3", op);
7016 output_asm_insn ("ag\t%4,0(%1)", op);
7017 output_asm_insn ("ag\t%1,0(%4)", op);
7021 op[7] = gen_label_rtx ();
7022 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
7023 output_asm_insn ("ag\t%4,0(%1)", op);
7024 output_asm_insn ("ag\t%1,0(%4)", op);
7028 /* Jump to target. */
7029 output_asm_insn ("jg\t%0", op);
7031 /* Output literal pool if required. */
7034 output_asm_insn (".align\t4", op);
7035 targetm.asm_out.internal_label (file, "L",
7036 CODE_LABEL_NUMBER (op[5]));
7040 targetm.asm_out.internal_label (file, "L",
7041 CODE_LABEL_NUMBER (op[6]));
7042 output_asm_insn (".long\t%2", op);
7046 targetm.asm_out.internal_label (file, "L",
7047 CODE_LABEL_NUMBER (op[7]));
7048 output_asm_insn (".long\t%3", op);
7053 /* Setup base pointer if required. */
7055 || (!DISP_IN_RANGE (delta)
7056 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7057 || (!DISP_IN_RANGE (delta)
7058 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
7060 op[5] = gen_label_rtx ();
7061 output_asm_insn ("basr\t%4,0", op);
7062 targetm.asm_out.internal_label (file, "L",
7063 CODE_LABEL_NUMBER (op[5]));
7066 /* Add DELTA to this pointer. */
7069 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
7070 output_asm_insn ("la\t%1,%2(%1)", op);
7071 else if (DISP_IN_RANGE (delta))
7072 output_asm_insn ("lay\t%1,%2(%1)", op);
7073 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
7074 output_asm_insn ("ahi\t%1,%2", op);
7077 op[6] = gen_label_rtx ();
7078 output_asm_insn ("a\t%1,%6-%5(%4)", op);
7082 /* Perform vcall adjustment. */
7085 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
7087 output_asm_insn ("lg\t%4,0(%1)", op);
7088 output_asm_insn ("a\t%1,%3(%4)", op);
7090 else if (DISP_IN_RANGE (vcall_offset))
7092 output_asm_insn ("lg\t%4,0(%1)", op);
7093 output_asm_insn ("ay\t%1,%3(%4)", op);
7095 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
7097 output_asm_insn ("lhi\t%4,%3", op);
7098 output_asm_insn ("a\t%4,0(%1)", op);
7099 output_asm_insn ("a\t%1,0(%4)", op);
7103 op[7] = gen_label_rtx ();
7104 output_asm_insn ("l\t%4,%7-%5(%4)", op);
7105 output_asm_insn ("a\t%4,0(%1)", op);
7106 output_asm_insn ("a\t%1,0(%4)", op);
7109 /* We had to clobber the base pointer register.
7110 Re-setup the base pointer (with a different base). */
7111 op[5] = gen_label_rtx ();
7112 output_asm_insn ("basr\t%4,0", op);
7113 targetm.asm_out.internal_label (file, "L",
7114 CODE_LABEL_NUMBER (op[5]));
7117 /* Jump to target. */
7118 op[8] = gen_label_rtx ();
7121 output_asm_insn ("l\t%4,%8-%5(%4)", op);
7123 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7124 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7125 else if (flag_pic == 1)
7127 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7128 output_asm_insn ("l\t%4,%0(%4)", op);
7130 else if (flag_pic == 2)
7132 op[9] = gen_rtx_REG (Pmode, 0);
7133 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7134 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7135 output_asm_insn ("ar\t%4,%9", op);
7136 output_asm_insn ("l\t%4,0(%4)", op);
7139 output_asm_insn ("br\t%4", op);
7141 /* Output literal pool. */
7142 output_asm_insn (".align\t4", op);
7144 if (nonlocal && flag_pic == 2)
7145 output_asm_insn (".long\t%0", op);
7148 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7149 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7152 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7154 output_asm_insn (".long\t%0", op);
7156 output_asm_insn (".long\t%0-%5", op);
7160 targetm.asm_out.internal_label (file, "L",
7161 CODE_LABEL_NUMBER (op[6]));
7162 output_asm_insn (".long\t%2", op);
7166 targetm.asm_out.internal_label (file, "L",
7167 CODE_LABEL_NUMBER (op[7]));
7168 output_asm_insn (".long\t%3", op);
7174 s390_valid_pointer_mode (enum machine_mode mode)
7176 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7179 /* How to allocate a 'struct machine_function'. */
7181 static struct machine_function *
7182 s390_init_machine_status (void)
7184 return ggc_alloc_cleared (sizeof (struct machine_function));
7187 /* Checks whether the given ARGUMENT_LIST would use a caller
7188 saved register. This is used to decide whether sibling call
7189 optimization could be performed on the respective function
7193 s390_call_saved_register_used (tree argument_list)
7195 CUMULATIVE_ARGS cum;
7197 enum machine_mode mode;
7202 INIT_CUMULATIVE_ARGS (cum, NULL, NULL, 0, 0);
7204 while (argument_list)
7206 parameter = TREE_VALUE (argument_list);
7207 argument_list = TREE_CHAIN (argument_list);
7212 /* For an undeclared variable passed as parameter we will get
7213 an ERROR_MARK node here. */
7214 if (TREE_CODE (parameter) == ERROR_MARK)
7217 if (! (type = TREE_TYPE (parameter)))
7220 if (! (mode = TYPE_MODE (TREE_TYPE (parameter))))
7223 if (s390_function_arg_pass_by_reference (mode, type))
7226 type = build_pointer_type (type);
7229 parm_rtx = s390_function_arg (&cum, mode, type, 0);
7231 s390_function_arg_advance (&cum, mode, type, 0);
7233 if (parm_rtx && REG_P (parm_rtx))
7236 reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
7238 if (! call_used_regs[reg + REGNO (parm_rtx)])
7245 /* Return true if the given call expression can be
7246 turned into a sibling call.
7247 DECL holds the declaration of the function to be called whereas
7248 EXP is the call expression itself. */
7251 s390_function_ok_for_sibcall (tree decl, tree exp)
7253 /* The TPF epilogue uses register 1. */
7254 if (TARGET_TPF_PROFILING)
7257 /* The 31 bit PLT code uses register 12 (GOT pointer - caller saved)
7258 which would have to be restored before the sibcall. */
7259 if (!TARGET_64BIT && flag_pic && decl && TREE_PUBLIC (decl))
7262 /* Register 6 on s390 is available as an argument register but unfortunately
7263 "caller saved". This makes functions needing this register for arguments
7264 not suitable for sibcalls. */
7265 if (TREE_OPERAND (exp, 1)
7266 && s390_call_saved_register_used (TREE_OPERAND (exp, 1)))
7272 /* This function is used by the call expanders of the machine description.
7273 It emits the call insn itself together with the necessary operations
7274 to adjust the target address and returns the emitted insn.
7275 ADDR_LOCATION is the target address rtx
7276 TLS_CALL the location of the thread-local symbol
7277 RESULT_REG the register where the result of the call should be stored
7278 RETADDR_REG the register where the return address should be stored
7279 If this parameter is NULL_RTX the call is considered
7280 to be a sibling call. */
7283 s390_emit_call (rtx addr_location, rtx tls_call, rtx result_reg,
7286 bool plt_call = false;
7292 /* Direct function calls need special treatment. */
7293 if (GET_CODE (addr_location) == SYMBOL_REF)
7295 /* When calling a global routine in PIC mode, we must
7296 replace the symbol itself with the PLT stub. */
7297 if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
7299 addr_location = gen_rtx_UNSPEC (Pmode,
7300 gen_rtvec (1, addr_location),
7302 addr_location = gen_rtx_CONST (Pmode, addr_location);
7306 /* Unless we can use the bras(l) insn, force the
7307 routine address into a register. */
7308 if (!TARGET_SMALL_EXEC && !TARGET_CPU_ZARCH)
7311 addr_location = legitimize_pic_address (addr_location, 0);
7313 addr_location = force_reg (Pmode, addr_location);
7317 /* If it is already an indirect call or the code above moved the
7318 SYMBOL_REF to somewhere else make sure the address can be found in
7320 if (retaddr_reg == NULL_RTX
7321 && GET_CODE (addr_location) != SYMBOL_REF
7324 emit_move_insn (gen_rtx_REG (Pmode, SIBCALL_REGNUM), addr_location);
7325 addr_location = gen_rtx_REG (Pmode, SIBCALL_REGNUM);
7328 addr_location = gen_rtx_MEM (QImode, addr_location);
7329 call = gen_rtx_CALL (VOIDmode, addr_location, const0_rtx);
7331 if (result_reg != NULL_RTX)
7332 call = gen_rtx_SET (VOIDmode, result_reg, call);
7334 if (retaddr_reg != NULL_RTX)
7336 clobber = gen_rtx_CLOBBER (VOIDmode, retaddr_reg);
7338 if (tls_call != NULL_RTX)
7339 vec = gen_rtvec (3, call, clobber,
7340 gen_rtx_USE (VOIDmode, tls_call));
7342 vec = gen_rtvec (2, call, clobber);
7344 call = gen_rtx_PARALLEL (VOIDmode, vec);
7347 insn = emit_call_insn (call);
7349 /* 31-bit PLT stubs and tls calls use the GOT register implicitly. */
7350 if ((!TARGET_64BIT && plt_call) || tls_call != NULL_RTX)
7352 /* s390_function_ok_for_sibcall should
7353 have denied sibcalls in this case. */
7354 if (retaddr_reg == NULL_RTX)
7357 use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
7362 /* Implement CONDITIONAL_REGISTER_USAGE. */
7365 s390_conditional_register_usage (void)
7371 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7372 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
7374 if (TARGET_CPU_ZARCH)
7376 fixed_regs[RETURN_REGNUM] = 0;
7377 call_used_regs[RETURN_REGNUM] = 0;
7381 for (i = 24; i < 32; i++)
7382 call_used_regs[i] = call_really_used_regs[i] = 0;
7386 for (i = 18; i < 20; i++)
7387 call_used_regs[i] = call_really_used_regs[i] = 0;
7392 #include "gt-s390.h"