1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 #include "coretypes.h"
32 #include "hard-reg-set.h"
34 #include "insn-config.h"
35 #include "conditions.h"
37 #include "insn-attr.h"
45 #include "basic-block.h"
46 #include "integrate.h"
49 #include "target-def.h"
51 #include "langhooks.h"
54 /* Machine-specific symbol_ref flags. */
55 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
58 static bool s390_assemble_integer (rtx, unsigned int, int);
59 static void s390_select_rtx_section (enum machine_mode, rtx,
60 unsigned HOST_WIDE_INT);
61 static void s390_encode_section_info (tree, rtx, int);
62 static bool s390_cannot_force_const_mem (rtx);
63 static rtx s390_delegitimize_address (rtx);
64 static bool s390_return_in_memory (tree, tree);
65 static void s390_init_builtins (void);
66 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
67 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
69 static enum attr_type s390_safe_attr_type (rtx);
71 static int s390_adjust_cost (rtx, rtx, rtx, int);
72 static int s390_adjust_priority (rtx, int);
73 static int s390_issue_rate (void);
74 static int s390_use_dfa_pipeline_interface (void);
75 static int s390_first_cycle_multipass_dfa_lookahead (void);
76 static int s390_sched_reorder2 (FILE *, int, rtx *, int *, int);
77 static bool s390_rtx_costs (rtx, int, int, int *);
78 static int s390_address_cost (rtx);
79 static void s390_reorg (void);
80 static bool s390_valid_pointer_mode (enum machine_mode);
81 static tree s390_build_builtin_va_list (void);
83 #undef TARGET_ASM_ALIGNED_HI_OP
84 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
85 #undef TARGET_ASM_ALIGNED_DI_OP
86 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
87 #undef TARGET_ASM_INTEGER
88 #define TARGET_ASM_INTEGER s390_assemble_integer
90 #undef TARGET_ASM_OPEN_PAREN
91 #define TARGET_ASM_OPEN_PAREN ""
93 #undef TARGET_ASM_CLOSE_PAREN
94 #define TARGET_ASM_CLOSE_PAREN ""
96 #undef TARGET_ASM_SELECT_RTX_SECTION
97 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
99 #undef TARGET_ENCODE_SECTION_INFO
100 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
103 #undef TARGET_HAVE_TLS
104 #define TARGET_HAVE_TLS true
106 #undef TARGET_CANNOT_FORCE_CONST_MEM
107 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
109 #undef TARGET_DELEGITIMIZE_ADDRESS
110 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
112 #undef TARGET_RETURN_IN_MEMORY
113 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
115 #undef TARGET_INIT_BUILTINS
116 #define TARGET_INIT_BUILTINS s390_init_builtins
117 #undef TARGET_EXPAND_BUILTIN
118 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
120 #undef TARGET_ASM_OUTPUT_MI_THUNK
121 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
122 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
123 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
125 #undef TARGET_SCHED_ADJUST_COST
126 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
127 #undef TARGET_SCHED_ADJUST_PRIORITY
128 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
129 #undef TARGET_SCHED_ISSUE_RATE
130 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
131 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
132 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
133 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
134 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
135 #undef TARGET_SCHED_REORDER2
136 #define TARGET_SCHED_REORDER2 s390_sched_reorder2
138 #undef TARGET_RTX_COSTS
139 #define TARGET_RTX_COSTS s390_rtx_costs
140 #undef TARGET_ADDRESS_COST
141 #define TARGET_ADDRESS_COST s390_address_cost
143 #undef TARGET_MACHINE_DEPENDENT_REORG
144 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
146 #undef TARGET_VALID_POINTER_MODE
147 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
149 #undef TARGET_BUILD_BUILTIN_VA_LIST
150 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
152 #undef TARGET_PROMOTE_FUNCTION_ARGS
153 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
154 #undef TARGET_PROMOTE_FUNCTION_RETURN
155 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
157 struct gcc_target targetm = TARGET_INITIALIZER;
159 extern int reload_completed;
161 /* The alias set for prologue/epilogue register save/restore. */
162 static int s390_sr_alias_set = 0;
164 /* Save information from a "cmpxx" operation until the branch or scc is
166 rtx s390_compare_op0, s390_compare_op1;
168 /* Structure used to hold the components of a S/390 memory
169 address. A legitimate address on S/390 is of the general
171 base + index + displacement
172 where any of the components is optional.
174 base and index are registers of the class ADDR_REGS,
175 displacement is an unsigned 12-bit immediate constant. */
185 /* Which cpu are we tuning for. */
186 enum processor_type s390_tune;
187 enum processor_flags s390_tune_flags;
188 /* Which instruction set architecture to use. */
189 enum processor_type s390_arch;
190 enum processor_flags s390_arch_flags;
192 /* Strings to hold which cpu and instruction set architecture to use. */
193 const char *s390_tune_string; /* for -mtune=<xxx> */
194 const char *s390_arch_string; /* for -march=<xxx> */
196 /* Define the structure for the machine field in struct function. */
198 struct machine_function GTY(())
200 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
203 /* Set if return address needs to be saved. */
204 bool save_return_addr_p;
206 /* Number of first and last gpr to be saved, restored. */
208 int first_restore_gpr;
211 /* Size of stack frame. */
212 HOST_WIDE_INT frame_size;
214 /* Some local-dynamic TLS symbol name. */
215 const char *some_ld_name;
218 static int s390_match_ccmode_set (rtx, enum machine_mode);
219 static int s390_branch_condition_mask (rtx);
220 static const char *s390_branch_condition_mnemonic (rtx, int);
221 static int check_mode (rtx, enum machine_mode *);
222 static int general_s_operand (rtx, enum machine_mode, int);
223 static int s390_short_displacement (rtx);
224 static int s390_decompose_address (rtx, struct s390_address *);
225 static rtx get_thread_pointer (void);
226 static rtx legitimize_tls_address (rtx, rtx);
227 static void print_shift_count_operand (FILE *, rtx);
228 static const char *get_some_local_dynamic_name (void);
229 static int get_some_local_dynamic_name_1 (rtx *, void *);
230 static int reg_used_in_mem_p (int, rtx);
231 static int addr_generation_dependency_p (rtx, rtx);
232 static int s390_split_branches (void);
233 static void find_constant_pool_ref (rtx, rtx *);
234 static void replace_constant_pool_ref (rtx *, rtx, rtx);
235 static rtx find_ltrel_base (rtx);
236 static void replace_ltrel_base (rtx *, rtx);
237 static void s390_optimize_prolog (bool);
238 static int find_unused_clobbered_reg (void);
239 static void s390_frame_info (void);
240 static rtx save_fpr (rtx, int, int);
241 static rtx restore_fpr (rtx, int, int);
242 static rtx save_gprs (rtx, int, int, int);
243 static rtx restore_gprs (rtx, int, int, int);
244 static int s390_function_arg_size (enum machine_mode, tree);
245 static bool s390_function_arg_float (enum machine_mode, tree);
246 static struct machine_function * s390_init_machine_status (void);
248 /* Check whether integer displacement is in range. */
249 #define DISP_IN_RANGE(d) \
250 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
251 : ((d) >= 0 && (d) <= 4095))
253 /* Return true if SET either doesn't set the CC register, or else
254 the source and destination have matching CC modes and that
255 CC mode is at least as constrained as REQ_MODE. */
258 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
260 enum machine_mode set_mode;
262 if (GET_CODE (set) != SET)
265 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
268 set_mode = GET_MODE (SET_DEST (set));
281 if (req_mode != set_mode)
286 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
287 && req_mode != CCSRmode && req_mode != CCURmode)
293 if (req_mode != CCAmode)
301 return (GET_MODE (SET_SRC (set)) == set_mode);
304 /* Return true if every SET in INSN that sets the CC register
305 has source and destination with matching CC modes and that
306 CC mode is at least as constrained as REQ_MODE.
307 If REQ_MODE is VOIDmode, always return false. */
310 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
314 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
315 if (req_mode == VOIDmode)
318 if (GET_CODE (PATTERN (insn)) == SET)
319 return s390_match_ccmode_set (PATTERN (insn), req_mode);
321 if (GET_CODE (PATTERN (insn)) == PARALLEL)
322 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
324 rtx set = XVECEXP (PATTERN (insn), 0, i);
325 if (GET_CODE (set) == SET)
326 if (!s390_match_ccmode_set (set, req_mode))
333 /* If a test-under-mask instruction can be used to implement
334 (compare (and ... OP1) OP2), return the CC mode required
335 to do that. Otherwise, return VOIDmode.
336 MIXED is true if the instruction can distinguish between
337 CC1 and CC2 for mixed selected bits (TMxx), it is false
338 if the instruction cannot (TM). */
341 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
345 /* ??? Fixme: should work on CONST_DOUBLE as well. */
346 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
349 /* Selected bits all zero: CC0. */
350 if (INTVAL (op2) == 0)
353 /* Selected bits all one: CC3. */
354 if (INTVAL (op2) == INTVAL (op1))
357 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
360 bit1 = exact_log2 (INTVAL (op2));
361 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
362 if (bit0 != -1 && bit1 != -1)
363 return bit0 > bit1 ? CCT1mode : CCT2mode;
369 /* Given a comparison code OP (EQ, NE, etc.) and the operands
370 OP0 and OP1 of a COMPARE, return the mode to be used for the
374 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
380 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
381 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
383 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
384 || GET_CODE (op1) == NEG)
385 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
388 if (GET_CODE (op0) == AND)
390 /* Check whether we can potentially do it via TM. */
391 enum machine_mode ccmode;
392 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
393 if (ccmode != VOIDmode)
395 /* Relax CCTmode to CCZmode to allow fall-back to AND
396 if that turns out to be beneficial. */
397 return ccmode == CCTmode ? CCZmode : ccmode;
401 if (register_operand (op0, HImode)
402 && GET_CODE (op1) == CONST_INT
403 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
405 if (register_operand (op0, QImode)
406 && GET_CODE (op1) == CONST_INT
407 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
416 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
417 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
419 if (INTVAL (XEXP((op0), 1)) < 0)
432 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
433 && GET_CODE (op1) != CONST_INT)
439 if (GET_CODE (op0) == PLUS
440 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
443 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
444 && GET_CODE (op1) != CONST_INT)
450 if (GET_CODE (op0) == MINUS
451 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
454 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
455 && GET_CODE (op1) != CONST_INT)
464 /* Return nonzero if OP is a valid comparison operator
465 for an ALC condition in mode MODE. */
468 s390_alc_comparison (rtx op, enum machine_mode mode)
470 if (mode != VOIDmode && mode != GET_MODE (op))
473 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
476 if (GET_CODE (XEXP (op, 0)) != REG
477 || REGNO (XEXP (op, 0)) != CC_REGNUM
478 || XEXP (op, 1) != const0_rtx)
481 switch (GET_MODE (XEXP (op, 0)))
484 return GET_CODE (op) == LTU;
487 return GET_CODE (op) == LEU;
490 return GET_CODE (op) == GTU;
493 return GET_CODE (op) == LTU;
496 return GET_CODE (op) == UNGT;
499 return GET_CODE (op) == UNLT;
506 /* Return nonzero if OP is a valid comparison operator
507 for an SLB condition in mode MODE. */
510 s390_slb_comparison (rtx op, enum machine_mode mode)
512 if (mode != VOIDmode && mode != GET_MODE (op))
515 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
518 if (GET_CODE (XEXP (op, 0)) != REG
519 || REGNO (XEXP (op, 0)) != CC_REGNUM
520 || XEXP (op, 1) != const0_rtx)
523 switch (GET_MODE (XEXP (op, 0)))
526 return GET_CODE (op) == GEU;
529 return GET_CODE (op) == GTU;
532 return GET_CODE (op) == LEU;
535 return GET_CODE (op) == GEU;
538 return GET_CODE (op) == LE;
541 return GET_CODE (op) == GE;
548 /* Return branch condition mask to implement a branch
549 specified by CODE. */
552 s390_branch_condition_mask (rtx code)
554 const int CC0 = 1 << 3;
555 const int CC1 = 1 << 2;
556 const int CC2 = 1 << 1;
557 const int CC3 = 1 << 0;
559 if (GET_CODE (XEXP (code, 0)) != REG
560 || REGNO (XEXP (code, 0)) != CC_REGNUM
561 || XEXP (code, 1) != const0_rtx)
564 switch (GET_MODE (XEXP (code, 0)))
567 switch (GET_CODE (code))
570 case NE: return CC1 | CC2 | CC3;
577 switch (GET_CODE (code))
580 case NE: return CC0 | CC2 | CC3;
587 switch (GET_CODE (code))
590 case NE: return CC0 | CC1 | CC3;
597 switch (GET_CODE (code))
600 case NE: return CC0 | CC1 | CC2;
607 switch (GET_CODE (code))
609 case EQ: return CC0 | CC2;
610 case NE: return CC1 | CC3;
617 switch (GET_CODE (code))
619 case LTU: return CC2 | CC3; /* carry */
620 case GEU: return CC0 | CC1; /* no carry */
627 switch (GET_CODE (code))
629 case GTU: return CC0 | CC1; /* borrow */
630 case LEU: return CC2 | CC3; /* no borrow */
637 switch (GET_CODE (code))
640 case NE: return CC1 | CC2 | CC3;
641 case LTU: return CC1;
642 case GTU: return CC2;
643 case LEU: return CC0 | CC1;
644 case GEU: return CC0 | CC2;
651 switch (GET_CODE (code))
654 case NE: return CC2 | CC1 | CC3;
655 case LTU: return CC2;
656 case GTU: return CC1;
657 case LEU: return CC0 | CC2;
658 case GEU: return CC0 | CC1;
665 switch (GET_CODE (code))
668 case NE: return CC1 | CC2 | CC3;
669 case LT: return CC1 | CC3;
671 case LE: return CC0 | CC1 | CC3;
672 case GE: return CC0 | CC2;
679 switch (GET_CODE (code))
682 case NE: return CC1 | CC2 | CC3;
684 case GT: return CC2 | CC3;
685 case LE: return CC0 | CC1;
686 case GE: return CC0 | CC2 | CC3;
693 switch (GET_CODE (code))
696 case NE: return CC1 | CC2 | CC3;
699 case LE: return CC0 | CC1;
700 case GE: return CC0 | CC2;
701 case UNORDERED: return CC3;
702 case ORDERED: return CC0 | CC1 | CC2;
703 case UNEQ: return CC0 | CC3;
704 case UNLT: return CC1 | CC3;
705 case UNGT: return CC2 | CC3;
706 case UNLE: return CC0 | CC1 | CC3;
707 case UNGE: return CC0 | CC2 | CC3;
708 case LTGT: return CC1 | CC2;
715 switch (GET_CODE (code))
718 case NE: return CC2 | CC1 | CC3;
721 case LE: return CC0 | CC2;
722 case GE: return CC0 | CC1;
723 case UNORDERED: return CC3;
724 case ORDERED: return CC0 | CC2 | CC1;
725 case UNEQ: return CC0 | CC3;
726 case UNLT: return CC2 | CC3;
727 case UNGT: return CC1 | CC3;
728 case UNLE: return CC0 | CC2 | CC3;
729 case UNGE: return CC0 | CC1 | CC3;
730 case LTGT: return CC2 | CC1;
741 /* If INV is false, return assembler mnemonic string to implement
742 a branch specified by CODE. If INV is true, return mnemonic
743 for the corresponding inverted branch. */
746 s390_branch_condition_mnemonic (rtx code, int inv)
748 static const char *const mnemonic[16] =
750 NULL, "o", "h", "nle",
751 "l", "nhe", "lh", "ne",
752 "e", "nlh", "he", "nl",
753 "le", "nh", "no", NULL
756 int mask = s390_branch_condition_mask (code);
761 if (mask < 1 || mask > 14)
764 return mnemonic[mask];
767 /* Return the part of op which has a value different from def.
768 The size of the part is determined by mode.
769 Use this function only if you already know that op really
770 contains such a part. */
772 unsigned HOST_WIDE_INT
773 s390_extract_part (rtx op, enum machine_mode mode, int def)
775 unsigned HOST_WIDE_INT value = 0;
776 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
777 int part_bits = GET_MODE_BITSIZE (mode);
778 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
781 for (i = 0; i < max_parts; i++)
784 value = (unsigned HOST_WIDE_INT) INTVAL (op);
788 if ((value & part_mask) != (def & part_mask))
789 return value & part_mask;
795 /* If OP is an integer constant of mode MODE with exactly one
796 part of mode PART_MODE unequal to DEF, return the number of that
797 part. Otherwise, return -1. */
800 s390_single_part (rtx op,
801 enum machine_mode mode,
802 enum machine_mode part_mode,
805 unsigned HOST_WIDE_INT value = 0;
806 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
807 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
810 if (GET_CODE (op) != CONST_INT)
813 for (i = 0; i < n_parts; i++)
816 value = (unsigned HOST_WIDE_INT) INTVAL (op);
818 value >>= GET_MODE_BITSIZE (part_mode);
820 if ((value & part_mask) != (def & part_mask))
828 return part == -1 ? -1 : n_parts - 1 - part;
831 /* Check whether we can (and want to) split a double-word
832 move in mode MODE from SRC to DST into two single-word
833 moves, moving the subword FIRST_SUBWORD first. */
836 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
838 /* Floating point registers cannot be split. */
839 if (FP_REG_P (src) || FP_REG_P (dst))
842 /* We don't need to split if operands are directly accessible. */
843 if (s_operand (src, mode) || s_operand (dst, mode))
846 /* Non-offsettable memory references cannot be split. */
847 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
848 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
851 /* Moving the first subword must not clobber a register
852 needed to move the second subword. */
853 if (register_operand (dst, mode))
855 rtx subreg = operand_subword (dst, first_subword, 0, mode);
856 if (reg_overlap_mentioned_p (subreg, src))
864 /* Change optimizations to be performed, depending on the
867 LEVEL is the optimization level specified; 2 if `-O2' is
868 specified, 1 if `-O' is specified, and 0 if neither is specified.
870 SIZE is nonzero if `-Os' is specified and zero otherwise. */
873 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
875 /* ??? There are apparently still problems with -fcaller-saves. */
876 flag_caller_saves = 0;
878 /* By default, always emit DWARF-2 unwind info. This allows debugging
879 without maintaining a stack frame back-chain. */
880 flag_asynchronous_unwind_tables = 1;
884 override_options (void)
889 const char *const name; /* processor name or nickname. */
890 const enum processor_type processor;
891 const enum processor_flags flags;
893 const processor_alias_table[] =
895 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
896 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
897 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
898 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
899 | PF_LONG_DISPLACEMENT},
902 int const pta_size = ARRAY_SIZE (processor_alias_table);
904 /* Acquire a unique set number for our register saves and restores. */
905 s390_sr_alias_set = new_alias_set ();
907 /* Set up function hooks. */
908 init_machine_status = s390_init_machine_status;
910 /* Architecture mode defaults according to ABI. */
911 if (!(target_flags_explicit & MASK_ZARCH))
914 target_flags |= MASK_ZARCH;
916 target_flags &= ~MASK_ZARCH;
919 /* Determine processor architectural level. */
920 if (!s390_arch_string)
921 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
923 for (i = 0; i < pta_size; i++)
924 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
926 s390_arch = processor_alias_table[i].processor;
927 s390_arch_flags = processor_alias_table[i].flags;
931 error ("Unknown cpu used in -march=%s.", s390_arch_string);
933 /* Determine processor to tune for. */
934 if (!s390_tune_string)
936 s390_tune = s390_arch;
937 s390_tune_flags = s390_arch_flags;
938 s390_tune_string = s390_arch_string;
942 for (i = 0; i < pta_size; i++)
943 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
945 s390_tune = processor_alias_table[i].processor;
946 s390_tune_flags = processor_alias_table[i].flags;
950 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
954 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
955 error ("z/Architecture mode not supported on %s.", s390_arch_string);
956 if (TARGET_64BIT && !TARGET_ZARCH)
957 error ("64-bit ABI not supported in ESA/390 mode.");
960 /* Map for smallest class containing reg regno. */
962 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
963 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
964 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
965 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
966 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
967 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
968 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
969 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
970 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
971 ADDR_REGS, NO_REGS, ADDR_REGS
974 /* Return attribute type of insn. */
976 static enum attr_type
977 s390_safe_attr_type (rtx insn)
979 if (recog_memoized (insn) >= 0)
980 return get_attr_type (insn);
985 /* Return true if OP a (const_int 0) operand.
986 OP is the current operation.
987 MODE is the current operation mode. */
990 const0_operand (register rtx op, enum machine_mode mode)
992 return op == CONST0_RTX (mode);
995 /* Return true if OP is constant.
996 OP is the current operation.
997 MODE is the current operation mode. */
1000 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1002 return CONSTANT_P (op);
1005 /* Return true if the mode of operand OP matches MODE.
1006 If MODE is set to VOIDmode, set it to the mode of OP. */
1009 check_mode (register rtx op, enum machine_mode *mode)
1011 if (*mode == VOIDmode)
1012 *mode = GET_MODE (op);
1015 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1021 /* Return true if OP a valid operand for the LARL instruction.
1022 OP is the current operation.
1023 MODE is the current operation mode. */
1026 larl_operand (register rtx op, enum machine_mode mode)
1028 if (! check_mode (op, &mode))
1031 /* Allow labels and local symbols. */
1032 if (GET_CODE (op) == LABEL_REF)
1034 if (GET_CODE (op) == SYMBOL_REF)
1035 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1036 && SYMBOL_REF_TLS_MODEL (op) == 0
1037 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1039 /* Everything else must have a CONST, so strip it. */
1040 if (GET_CODE (op) != CONST)
1044 /* Allow adding *even* in-range constants. */
1045 if (GET_CODE (op) == PLUS)
1047 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1048 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1050 #if HOST_BITS_PER_WIDE_INT > 32
1051 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1052 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1058 /* Labels and local symbols allowed here as well. */
1059 if (GET_CODE (op) == LABEL_REF)
1061 if (GET_CODE (op) == SYMBOL_REF)
1062 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1063 && SYMBOL_REF_TLS_MODEL (op) == 0
1064 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1066 /* Now we must have a @GOTENT offset or @PLT stub
1067 or an @INDNTPOFF TLS offset. */
1068 if (GET_CODE (op) == UNSPEC
1069 && XINT (op, 1) == UNSPEC_GOTENT)
1071 if (GET_CODE (op) == UNSPEC
1072 && XINT (op, 1) == UNSPEC_PLT)
1074 if (GET_CODE (op) == UNSPEC
1075 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1081 /* Helper routine to implement s_operand and s_imm_operand.
1082 OP is the current operation.
1083 MODE is the current operation mode.
1084 ALLOW_IMMEDIATE specifies whether immediate operands should
1085 be accepted or not. */
1088 general_s_operand (register rtx op, enum machine_mode mode,
1089 int allow_immediate)
1091 struct s390_address addr;
1093 /* Call general_operand first, so that we don't have to
1094 check for many special cases. */
1095 if (!general_operand (op, mode))
1098 /* Just like memory_operand, allow (subreg (mem ...))
1100 if (reload_completed
1101 && GET_CODE (op) == SUBREG
1102 && GET_CODE (SUBREG_REG (op)) == MEM)
1103 op = SUBREG_REG (op);
1105 switch (GET_CODE (op))
1107 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1108 is true and we are still before reload. */
1111 if (!allow_immediate || reload_completed)
1115 /* Memory operands are OK unless they already use an
1118 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1120 if (!s390_decompose_address (XEXP (op, 0), &addr))
1124 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1125 is true. This prevents compares between two literal pool
1126 entries from being accepted. */
1127 if (!allow_immediate
1128 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1139 /* Return true if OP is a valid S-type operand.
1140 OP is the current operation.
1141 MODE is the current operation mode. */
1144 s_operand (register rtx op, enum machine_mode mode)
1146 return general_s_operand (op, mode, 0);
1149 /* Return true if OP is a valid S-type operand or an immediate
1150 operand that can be addressed as S-type operand by forcing
1151 it into the literal pool.
1152 OP is the current operation.
1153 MODE is the current operation mode. */
1156 s_imm_operand (register rtx op, enum machine_mode mode)
1158 return general_s_operand (op, mode, 1);
1161 /* Return true if OP a valid shift count operand.
1162 OP is the current operation.
1163 MODE is the current operation mode. */
1166 shift_count_operand (rtx op, enum machine_mode mode)
1168 HOST_WIDE_INT offset = 0;
1170 if (! check_mode (op, &mode))
1173 /* We can have an integer constant, an address register,
1174 or a sum of the two. Note that reload already checks
1175 that any register present is an address register, so
1176 we just check for any register here. */
1177 if (GET_CODE (op) == CONST_INT)
1179 offset = INTVAL (op);
1182 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1184 offset = INTVAL (XEXP (op, 1));
1187 while (op && GET_CODE (op) == SUBREG)
1188 op = SUBREG_REG (op);
1189 if (op && GET_CODE (op) != REG)
1192 /* Unfortunately we have to reject constants that are invalid
1193 for an address, or else reload will get confused. */
1194 if (!DISP_IN_RANGE (offset))
1200 /* Return true if DISP is a valid short displacement. */
1203 s390_short_displacement (rtx disp)
1205 /* No displacement is OK. */
1209 /* Integer displacement in range. */
1210 if (GET_CODE (disp) == CONST_INT)
1211 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1213 /* GOT offset is not OK, the GOT can be large. */
1214 if (GET_CODE (disp) == CONST
1215 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1216 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1219 /* All other symbolic constants are literal pool references,
1220 which are OK as the literal pool must be small. */
1221 if (GET_CODE (disp) == CONST)
1227 /* Return true if OP is a valid operand for a C constraint. */
1230 s390_extra_constraint_str (rtx op, int c, const char * str)
1232 struct s390_address addr;
1240 if (GET_CODE (op) != MEM)
1242 if (!s390_decompose_address (XEXP (op, 0), &addr))
1247 if (TARGET_LONG_DISPLACEMENT)
1249 if (!s390_short_displacement (addr.disp))
1255 if (GET_CODE (op) != MEM)
1258 if (TARGET_LONG_DISPLACEMENT)
1260 if (!s390_decompose_address (XEXP (op, 0), &addr))
1262 if (!s390_short_displacement (addr.disp))
1268 if (!TARGET_LONG_DISPLACEMENT)
1270 if (GET_CODE (op) != MEM)
1272 if (!s390_decompose_address (XEXP (op, 0), &addr))
1276 if (s390_short_displacement (addr.disp))
1281 if (!TARGET_LONG_DISPLACEMENT)
1283 if (GET_CODE (op) != MEM)
1285 /* Any invalid address here will be fixed up by reload,
1286 so accept it for the most generic constraint. */
1287 if (s390_decompose_address (XEXP (op, 0), &addr)
1288 && s390_short_displacement (addr.disp))
1293 if (TARGET_LONG_DISPLACEMENT)
1295 if (!s390_decompose_address (op, &addr))
1297 if (!s390_short_displacement (addr.disp))
1303 if (!TARGET_LONG_DISPLACEMENT)
1305 /* Any invalid address here will be fixed up by reload,
1306 so accept it for the most generic constraint. */
1307 if (s390_decompose_address (op, &addr)
1308 && s390_short_displacement (addr.disp))
1313 return shift_count_operand (op, VOIDmode);
1322 /* Return true if VALUE matches the constraint STR. */
1325 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1329 enum machine_mode mode, part_mode;
1339 return (unsigned int)value < 256;
1342 return (unsigned int)value < 4096;
1345 return value >= -32768 && value < 32768;
1348 return (TARGET_LONG_DISPLACEMENT ?
1349 (value >= -524288 && value <= 524287)
1350 : (value >= 0 && value <= 4095));
1352 return value == 2147483647;
1355 part = str[1] - '0';
1359 case 'H': part_mode = HImode; break;
1360 case 'Q': part_mode = QImode; break;
1366 case 'H': mode = HImode; break;
1367 case 'S': mode = SImode; break;
1368 case 'D': mode = DImode; break;
1374 case '0': def = 0; break;
1375 case 'F': def = -1; break;
1379 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1382 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1394 /* Compute a (partial) cost for rtx X. Return true if the complete
1395 cost has been computed, and false if subexpressions should be
1396 scanned. In either case, *TOTAL contains the cost result. */
1399 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1404 if (GET_CODE (XEXP (x, 0)) == MINUS
1405 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1412 /* Force_const_mem does not work out of reload, because the
1413 saveable_obstack is set to reload_obstack, which does not
1414 live long enough. Because of this we cannot use force_const_mem
1415 in addsi3. This leads to problems with gen_add2_insn with a
1416 constant greater than a short. Because of that we give an
1417 addition of greater constants a cost of 3 (reload1.c 10096). */
1418 /* ??? saveable_obstack no longer exists. */
1419 if (outer_code == PLUS
1420 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1421 *total = COSTS_N_INSNS (3);
1442 *total = COSTS_N_INSNS (1);
1446 if (GET_MODE (XEXP (x, 0)) == DImode)
1447 *total = COSTS_N_INSNS (40);
1449 *total = COSTS_N_INSNS (7);
1456 *total = COSTS_N_INSNS (33);
1464 /* Return the cost of an address rtx ADDR. */
1467 s390_address_cost (rtx addr)
1469 struct s390_address ad;
1470 if (!s390_decompose_address (addr, &ad))
1473 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1476 /* Return true if OP is a valid operand for the BRAS instruction.
1477 OP is the current operation.
1478 MODE is the current operation mode. */
1481 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1483 register enum rtx_code code = GET_CODE (op);
1485 /* Allow SYMBOL_REFs. */
1486 if (code == SYMBOL_REF)
1489 /* Allow @PLT stubs. */
1491 && GET_CODE (XEXP (op, 0)) == UNSPEC
1492 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1497 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1498 otherwise return 0. */
1501 tls_symbolic_operand (register rtx op)
1503 if (GET_CODE (op) != SYMBOL_REF)
1505 return SYMBOL_REF_TLS_MODEL (op);
1508 /* Return true if OP is a load multiple operation. It is known to be a
1509 PARALLEL and the first section will be tested.
1510 OP is the current operation.
1511 MODE is the current operation mode. */
1514 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1516 enum machine_mode elt_mode;
1517 int count = XVECLEN (op, 0);
1518 unsigned int dest_regno;
1523 /* Perform a quick check so we don't blow up below. */
1525 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1526 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1527 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1530 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1531 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1532 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1534 /* Check, is base, or base + displacement. */
1536 if (GET_CODE (src_addr) == REG)
1538 else if (GET_CODE (src_addr) == PLUS
1539 && GET_CODE (XEXP (src_addr, 0)) == REG
1540 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1542 off = INTVAL (XEXP (src_addr, 1));
1543 src_addr = XEXP (src_addr, 0);
1548 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1551 for (i = 1; i < count; i++)
1553 rtx elt = XVECEXP (op, 0, i);
1555 if (GET_CODE (elt) != SET
1556 || GET_CODE (SET_DEST (elt)) != REG
1557 || GET_MODE (SET_DEST (elt)) != elt_mode
1558 || REGNO (SET_DEST (elt)) != dest_regno + i
1559 || GET_CODE (SET_SRC (elt)) != MEM
1560 || GET_MODE (SET_SRC (elt)) != elt_mode
1561 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1562 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1563 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1564 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1565 != off + i * GET_MODE_SIZE (elt_mode))
1572 /* Return true if OP is a store multiple operation. It is known to be a
1573 PARALLEL and the first section will be tested.
1574 OP is the current operation.
1575 MODE is the current operation mode. */
1578 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1580 enum machine_mode elt_mode;
1581 int count = XVECLEN (op, 0);
1582 unsigned int src_regno;
1586 /* Perform a quick check so we don't blow up below. */
1588 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1589 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1590 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1593 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1594 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1595 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1597 /* Check, is base, or base + displacement. */
1599 if (GET_CODE (dest_addr) == REG)
1601 else if (GET_CODE (dest_addr) == PLUS
1602 && GET_CODE (XEXP (dest_addr, 0)) == REG
1603 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1605 off = INTVAL (XEXP (dest_addr, 1));
1606 dest_addr = XEXP (dest_addr, 0);
1611 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1614 for (i = 1; i < count; i++)
1616 rtx elt = XVECEXP (op, 0, i);
1618 if (GET_CODE (elt) != SET
1619 || GET_CODE (SET_SRC (elt)) != REG
1620 || GET_MODE (SET_SRC (elt)) != elt_mode
1621 || REGNO (SET_SRC (elt)) != src_regno + i
1622 || GET_CODE (SET_DEST (elt)) != MEM
1623 || GET_MODE (SET_DEST (elt)) != elt_mode
1624 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1625 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1626 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1627 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1628 != off + i * GET_MODE_SIZE (elt_mode))
1635 /* Return true if OP contains a symbol reference */
1638 symbolic_reference_mentioned_p (rtx op)
1640 register const char *fmt;
1643 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1646 fmt = GET_RTX_FORMAT (GET_CODE (op));
1647 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1653 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1654 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1658 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1665 /* Return true if OP contains a reference to a thread-local symbol. */
1668 tls_symbolic_reference_mentioned_p (rtx op)
1670 register const char *fmt;
1673 if (GET_CODE (op) == SYMBOL_REF)
1674 return tls_symbolic_operand (op);
1676 fmt = GET_RTX_FORMAT (GET_CODE (op));
1677 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1683 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1684 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1688 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1696 /* Return true if OP is a legitimate general operand when
1697 generating PIC code. It is given that flag_pic is on
1698 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1701 legitimate_pic_operand_p (register rtx op)
1703 /* Accept all non-symbolic constants. */
1704 if (!SYMBOLIC_CONST (op))
1707 /* Reject everything else; must be handled
1708 via emit_symbolic_move. */
1712 /* Returns true if the constant value OP is a legitimate general operand.
1713 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1716 legitimate_constant_p (register rtx op)
1718 /* Accept all non-symbolic constants. */
1719 if (!SYMBOLIC_CONST (op))
1722 /* Accept immediate LARL operands. */
1723 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1726 /* Thread-local symbols are never legal constants. This is
1727 so that emit_call knows that computing such addresses
1728 might require a function call. */
1729 if (TLS_SYMBOLIC_CONST (op))
1732 /* In the PIC case, symbolic constants must *not* be
1733 forced into the literal pool. We accept them here,
1734 so that they will be handled by emit_symbolic_move. */
1738 /* All remaining non-PIC symbolic constants are
1739 forced into the literal pool. */
1743 /* Determine if it's legal to put X into the constant pool. This
1744 is not possible if X contains the address of a symbol that is
1745 not constant (TLS) or not known at final link time (PIC). */
1748 s390_cannot_force_const_mem (rtx x)
1750 switch (GET_CODE (x))
1754 /* Accept all non-symbolic constants. */
1758 /* Labels are OK iff we are non-PIC. */
1759 return flag_pic != 0;
1762 /* 'Naked' TLS symbol references are never OK,
1763 non-TLS symbols are OK iff we are non-PIC. */
1764 if (tls_symbolic_operand (x))
1767 return flag_pic != 0;
1770 return s390_cannot_force_const_mem (XEXP (x, 0));
1773 return s390_cannot_force_const_mem (XEXP (x, 0))
1774 || s390_cannot_force_const_mem (XEXP (x, 1));
1777 switch (XINT (x, 1))
1779 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1780 case UNSPEC_LTREL_OFFSET:
1788 case UNSPEC_GOTNTPOFF:
1789 case UNSPEC_INDNTPOFF:
1802 /* Returns true if the constant value OP is a legitimate general
1803 operand during and after reload. The difference to
1804 legitimate_constant_p is that this function will not accept
1805 a constant that would need to be forced to the literal pool
1806 before it can be used as operand. */
1809 legitimate_reload_constant_p (register rtx op)
1811 /* Accept la(y) operands. */
1812 if (GET_CODE (op) == CONST_INT
1813 && DISP_IN_RANGE (INTVAL (op)))
1816 /* Accept l(g)hi operands. */
1817 if (GET_CODE (op) == CONST_INT
1818 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1821 /* Accept lliXX operands. */
1823 && s390_single_part (op, DImode, HImode, 0) >= 0)
1826 /* Accept larl operands. */
1827 if (TARGET_CPU_ZARCH
1828 && larl_operand (op, VOIDmode))
1831 /* Everything else cannot be handled without reload. */
1835 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1836 return the class of reg to actually use. */
1839 s390_preferred_reload_class (rtx op, enum reg_class class)
1841 /* This can happen if a floating point constant is being
1842 reloaded into an integer register. Leave well alone. */
1843 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1844 && class != FP_REGS)
1847 switch (GET_CODE (op))
1849 /* Constants we cannot reload must be forced into the
1854 if (legitimate_reload_constant_p (op))
1859 /* If a symbolic constant or a PLUS is reloaded,
1860 it is most likely being used as an address, so
1861 prefer ADDR_REGS. If 'class' is not a superset
1862 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1867 if (reg_class_subset_p (ADDR_REGS, class))
1879 /* Return the register class of a scratch register needed to
1880 load IN into a register of class CLASS in MODE.
1882 We need a temporary when loading a PLUS expression which
1883 is not a legitimate operand of the LOAD ADDRESS instruction. */
1886 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1887 enum machine_mode mode, rtx in)
1889 if (s390_plus_operand (in, mode))
1895 /* Return the register class of a scratch register needed to
1896 store a register of class CLASS in MODE into OUT:
1898 We need a temporary when storing a double-word to a
1899 non-offsettable memory address. */
1902 s390_secondary_output_reload_class (enum reg_class class,
1903 enum machine_mode mode, rtx out)
1905 if ((TARGET_64BIT ? mode == TImode
1906 : (mode == DImode || mode == DFmode))
1907 && reg_classes_intersect_p (GENERAL_REGS, class)
1908 && GET_CODE (out) == MEM
1909 && !offsettable_memref_p (out)
1910 && !s_operand (out, VOIDmode))
1916 /* Return true if OP is a PLUS that is not a legitimate
1917 operand for the LA instruction.
1918 OP is the current operation.
1919 MODE is the current operation mode. */
1922 s390_plus_operand (register rtx op, enum machine_mode mode)
1924 if (!check_mode (op, &mode) || mode != Pmode)
1927 if (GET_CODE (op) != PLUS)
1930 if (legitimate_la_operand_p (op))
1936 /* Generate code to load SRC, which is PLUS that is not a
1937 legitimate operand for the LA instruction, into TARGET.
1938 SCRATCH may be used as scratch register. */
1941 s390_expand_plus_operand (register rtx target, register rtx src,
1942 register rtx scratch)
1945 struct s390_address ad;
1947 /* src must be a PLUS; get its two operands. */
1948 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1951 /* Check if any of the two operands is already scheduled
1952 for replacement by reload. This can happen e.g. when
1953 float registers occur in an address. */
1954 sum1 = find_replacement (&XEXP (src, 0));
1955 sum2 = find_replacement (&XEXP (src, 1));
1956 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1958 /* If the address is already strictly valid, there's nothing to do. */
1959 if (!s390_decompose_address (src, &ad)
1960 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
1961 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
1963 /* Otherwise, one of the operands cannot be an address register;
1964 we reload its value into the scratch register. */
1965 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
1967 emit_move_insn (scratch, sum1);
1970 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
1972 emit_move_insn (scratch, sum2);
1976 /* According to the way these invalid addresses are generated
1977 in reload.c, it should never happen (at least on s390) that
1978 *neither* of the PLUS components, after find_replacements
1979 was applied, is an address register. */
1980 if (sum1 == scratch && sum2 == scratch)
1986 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1989 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
1990 is only ever performed on addresses, so we can mark the
1991 sum as legitimate for LA in any case. */
1992 s390_load_address (target, src);
1996 /* Decompose a RTL expression ADDR for a memory address into
1997 its components, returned in OUT.
1999 Returns 0 if ADDR is not a valid memory address, nonzero
2000 otherwise. If OUT is NULL, don't return the components,
2001 but check for validity only.
2003 Note: Only addresses in canonical form are recognized.
2004 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2005 canonical form so that they will be recognized. */
2008 s390_decompose_address (register rtx addr, struct s390_address *out)
2010 rtx base = NULL_RTX;
2011 rtx indx = NULL_RTX;
2012 rtx disp = NULL_RTX;
2013 int pointer = FALSE;
2014 int base_ptr = FALSE;
2015 int indx_ptr = FALSE;
2017 /* Decompose address into base + index + displacement. */
2019 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2022 else if (GET_CODE (addr) == PLUS)
2024 rtx op0 = XEXP (addr, 0);
2025 rtx op1 = XEXP (addr, 1);
2026 enum rtx_code code0 = GET_CODE (op0);
2027 enum rtx_code code1 = GET_CODE (op1);
2029 if (code0 == REG || code0 == UNSPEC)
2031 if (code1 == REG || code1 == UNSPEC)
2033 indx = op0; /* index + base */
2039 base = op0; /* base + displacement */
2044 else if (code0 == PLUS)
2046 indx = XEXP (op0, 0); /* index + base + disp */
2047 base = XEXP (op0, 1);
2058 disp = addr; /* displacement */
2061 /* Validate base register. */
2064 if (GET_CODE (base) == UNSPEC)
2066 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2068 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2071 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2074 if (REGNO (base) == BASE_REGISTER
2075 || REGNO (base) == STACK_POINTER_REGNUM
2076 || REGNO (base) == FRAME_POINTER_REGNUM
2077 || ((reload_completed || reload_in_progress)
2078 && frame_pointer_needed
2079 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2080 || REGNO (base) == ARG_POINTER_REGNUM
2082 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2083 pointer = base_ptr = TRUE;
2086 /* Validate index register. */
2089 if (GET_CODE (indx) == UNSPEC)
2091 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2093 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2096 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2099 if (REGNO (indx) == BASE_REGISTER
2100 || REGNO (indx) == STACK_POINTER_REGNUM
2101 || REGNO (indx) == FRAME_POINTER_REGNUM
2102 || ((reload_completed || reload_in_progress)
2103 && frame_pointer_needed
2104 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2105 || REGNO (indx) == ARG_POINTER_REGNUM
2107 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2108 pointer = indx_ptr = TRUE;
2111 /* Prefer to use pointer as base, not index. */
2112 if (base && indx && !base_ptr
2113 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2120 /* Validate displacement. */
2123 /* Allow integer constant in range. */
2124 if (GET_CODE (disp) == CONST_INT)
2126 /* If the argument pointer is involved, the displacement will change
2127 later anyway as the argument pointer gets eliminated. This could
2128 make a valid displacement invalid, but it is more likely to make
2129 an invalid displacement valid, because we sometimes access the
2130 register save area via negative offsets to the arg pointer.
2131 Thus we don't check the displacement for validity here. If after
2132 elimination the displacement turns out to be invalid after all,
2133 this is fixed up by reload in any case. */
2134 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2136 if (!DISP_IN_RANGE (INTVAL (disp)))
2141 /* In the small-PIC case, the linker converts @GOT
2142 and @GOTNTPOFF offsets to possible displacements. */
2143 else if (GET_CODE (disp) == CONST
2144 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2145 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2146 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2154 /* Accept chunkfied literal pool symbol references. */
2155 else if (GET_CODE (disp) == CONST
2156 && GET_CODE (XEXP (disp, 0)) == MINUS
2157 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2158 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2163 /* Likewise if a constant offset is present. */
2164 else if (GET_CODE (disp) == CONST
2165 && GET_CODE (XEXP (disp, 0)) == PLUS
2166 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2167 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2168 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2169 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2174 /* We can convert literal pool addresses to
2175 displacements by basing them off the base register. */
2178 /* In some cases, we can accept an additional
2179 small constant offset. Split these off here. */
2181 unsigned int offset = 0;
2183 if (GET_CODE (disp) == CONST
2184 && GET_CODE (XEXP (disp, 0)) == PLUS
2185 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2187 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2188 disp = XEXP (XEXP (disp, 0), 0);
2191 /* Now we must have a literal pool address. */
2192 if (GET_CODE (disp) != SYMBOL_REF
2193 || !CONSTANT_POOL_ADDRESS_P (disp))
2196 /* If we have an offset, make sure it does not
2197 exceed the size of the constant pool entry. */
2198 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2201 /* Either base or index must be free to
2202 hold the base register. */
2206 /* Convert the address. */
2208 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2210 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2212 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2213 UNSPEC_LTREL_OFFSET);
2214 disp = gen_rtx_CONST (Pmode, disp);
2217 disp = plus_constant (disp, offset);
2231 out->pointer = pointer;
2237 /* Return nonzero if ADDR is a valid memory address.
2238 STRICT specifies whether strict register checking applies. */
2241 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2242 register rtx addr, int strict)
2244 struct s390_address ad;
2245 if (!s390_decompose_address (addr, &ad))
2250 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2252 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2257 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2259 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2266 /* Return 1 if OP is a valid operand for the LA instruction.
2267 In 31-bit, we need to prove that the result is used as an
2268 address, as LA performs only a 31-bit addition. */
2271 legitimate_la_operand_p (register rtx op)
2273 struct s390_address addr;
2274 if (!s390_decompose_address (op, &addr))
2277 if (TARGET_64BIT || addr.pointer)
2283 /* Return 1 if OP is a valid operand for the LA instruction,
2284 and we prefer to use LA over addition to compute it. */
2287 preferred_la_operand_p (register rtx op)
2289 struct s390_address addr;
2290 if (!s390_decompose_address (op, &addr))
2293 if (!TARGET_64BIT && !addr.pointer)
2299 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2300 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2306 /* Emit a forced load-address operation to load SRC into DST.
2307 This will use the LOAD ADDRESS instruction even in situations
2308 where legitimate_la_operand_p (SRC) returns false. */
2311 s390_load_address (rtx dst, rtx src)
2314 emit_move_insn (dst, src);
2316 emit_insn (gen_force_la_31 (dst, src));
2319 /* Return a legitimate reference for ORIG (an address) using the
2320 register REG. If REG is 0, a new pseudo is generated.
2322 There are two types of references that must be handled:
2324 1. Global data references must load the address from the GOT, via
2325 the PIC reg. An insn is emitted to do this load, and the reg is
2328 2. Static data references, constant pool addresses, and code labels
2329 compute the address as an offset from the GOT, whose base is in
2330 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2331 differentiate them from global data objects. The returned
2332 address is the PIC reg + an unspec constant.
2334 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2335 reg also appears in the address. */
2338 legitimize_pic_address (rtx orig, rtx reg)
2344 if (GET_CODE (addr) == LABEL_REF
2345 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2347 /* This is a local symbol. */
2348 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2350 /* Access local symbols PC-relative via LARL.
2351 This is the same as in the non-PIC case, so it is
2352 handled automatically ... */
2356 /* Access local symbols relative to the GOT. */
2358 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2360 if (reload_in_progress || reload_completed)
2361 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2363 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2364 addr = gen_rtx_CONST (Pmode, addr);
2365 addr = force_const_mem (Pmode, addr);
2366 emit_move_insn (temp, addr);
2368 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2371 emit_move_insn (reg, new);
2376 else if (GET_CODE (addr) == SYMBOL_REF)
2379 reg = gen_reg_rtx (Pmode);
2383 /* Assume GOT offset < 4k. This is handled the same way
2384 in both 31- and 64-bit code (@GOT). */
2386 if (reload_in_progress || reload_completed)
2387 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2389 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2390 new = gen_rtx_CONST (Pmode, new);
2391 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2392 new = gen_rtx_MEM (Pmode, new);
2393 RTX_UNCHANGING_P (new) = 1;
2394 emit_move_insn (reg, new);
2397 else if (TARGET_CPU_ZARCH)
2399 /* If the GOT offset might be >= 4k, we determine the position
2400 of the GOT entry via a PC-relative LARL (@GOTENT). */
2402 rtx temp = gen_reg_rtx (Pmode);
2404 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2405 new = gen_rtx_CONST (Pmode, new);
2406 emit_move_insn (temp, new);
2408 new = gen_rtx_MEM (Pmode, temp);
2409 RTX_UNCHANGING_P (new) = 1;
2410 emit_move_insn (reg, new);
2415 /* If the GOT offset might be >= 4k, we have to load it
2416 from the literal pool (@GOT). */
2418 rtx temp = gen_reg_rtx (Pmode);
2420 if (reload_in_progress || reload_completed)
2421 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2423 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2424 addr = gen_rtx_CONST (Pmode, addr);
2425 addr = force_const_mem (Pmode, addr);
2426 emit_move_insn (temp, addr);
2428 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2429 new = gen_rtx_MEM (Pmode, new);
2430 RTX_UNCHANGING_P (new) = 1;
2431 emit_move_insn (reg, new);
2437 if (GET_CODE (addr) == CONST)
2439 addr = XEXP (addr, 0);
2440 if (GET_CODE (addr) == UNSPEC)
2442 if (XVECLEN (addr, 0) != 1)
2444 switch (XINT (addr, 1))
2446 /* If someone moved a GOT-relative UNSPEC
2447 out of the literal pool, force them back in. */
2450 new = force_const_mem (Pmode, orig);
2453 /* @GOT is OK as is if small. */
2456 new = force_const_mem (Pmode, orig);
2459 /* @GOTENT is OK as is. */
2463 /* @PLT is OK as is on 64-bit, must be converted to
2464 GOT-relative @PLTOFF on 31-bit. */
2466 if (!TARGET_CPU_ZARCH)
2468 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2470 if (reload_in_progress || reload_completed)
2471 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2473 addr = XVECEXP (addr, 0, 0);
2474 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2476 addr = gen_rtx_CONST (Pmode, addr);
2477 addr = force_const_mem (Pmode, addr);
2478 emit_move_insn (temp, addr);
2480 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2483 emit_move_insn (reg, new);
2489 /* Everything else cannot happen. */
2494 else if (GET_CODE (addr) != PLUS)
2497 if (GET_CODE (addr) == PLUS)
2499 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2500 /* Check first to see if this is a constant offset
2501 from a local symbol reference. */
2502 if ((GET_CODE (op0) == LABEL_REF
2503 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2504 && GET_CODE (op1) == CONST_INT)
2506 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2508 if (INTVAL (op1) & 1)
2510 /* LARL can't handle odd offsets, so emit a
2511 pair of LARL and LA. */
2512 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2514 if (!DISP_IN_RANGE (INTVAL (op1)))
2516 int even = INTVAL (op1) - 1;
2517 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2518 op0 = gen_rtx_CONST (Pmode, op0);
2522 emit_move_insn (temp, op0);
2523 new = gen_rtx_PLUS (Pmode, temp, op1);
2527 emit_move_insn (reg, new);
2533 /* If the offset is even, we can just use LARL.
2534 This will happen automatically. */
2539 /* Access local symbols relative to the GOT. */
2541 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2543 if (reload_in_progress || reload_completed)
2544 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2546 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2548 addr = gen_rtx_PLUS (Pmode, addr, op1);
2549 addr = gen_rtx_CONST (Pmode, addr);
2550 addr = force_const_mem (Pmode, addr);
2551 emit_move_insn (temp, addr);
2553 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2556 emit_move_insn (reg, new);
2562 /* Now, check whether it is a GOT relative symbol plus offset
2563 that was pulled out of the literal pool. Force it back in. */
2565 else if (GET_CODE (op0) == UNSPEC
2566 && GET_CODE (op1) == CONST_INT)
2568 if (XVECLEN (op0, 0) != 1)
2570 if (XINT (op0, 1) != UNSPEC_GOTOFF)
2573 new = force_const_mem (Pmode, orig);
2576 /* Otherwise, compute the sum. */
2579 base = legitimize_pic_address (XEXP (addr, 0), reg);
2580 new = legitimize_pic_address (XEXP (addr, 1),
2581 base == reg ? NULL_RTX : reg);
2582 if (GET_CODE (new) == CONST_INT)
2583 new = plus_constant (base, INTVAL (new));
2586 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2588 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2589 new = XEXP (new, 1);
2591 new = gen_rtx_PLUS (Pmode, base, new);
2594 if (GET_CODE (new) == CONST)
2595 new = XEXP (new, 0);
2596 new = force_operand (new, 0);
2603 /* Load the thread pointer into a register. */
2606 get_thread_pointer (void)
2610 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2611 tp = force_reg (Pmode, tp);
2612 mark_reg_pointer (tp, BITS_PER_WORD);
2617 /* Construct the SYMBOL_REF for the tls_get_offset function. */
2619 static GTY(()) rtx s390_tls_symbol;
2621 s390_tls_get_offset (void)
2623 if (!s390_tls_symbol)
2624 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2626 return s390_tls_symbol;
2629 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2630 this (thread-local) address. REG may be used as temporary. */
2633 legitimize_tls_address (rtx addr, rtx reg)
2635 rtx new, tls_call, temp, base, r2, insn;
2637 if (GET_CODE (addr) == SYMBOL_REF)
2638 switch (tls_symbolic_operand (addr))
2640 case TLS_MODEL_GLOBAL_DYNAMIC:
2642 r2 = gen_rtx_REG (Pmode, 2);
2643 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2644 new = gen_rtx_CONST (Pmode, tls_call);
2645 new = force_const_mem (Pmode, new);
2646 emit_move_insn (r2, new);
2647 emit_call_insn (gen_call_value_tls (r2, tls_call));
2648 insn = get_insns ();
2651 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2652 temp = gen_reg_rtx (Pmode);
2653 emit_libcall_block (insn, temp, r2, new);
2655 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2658 s390_load_address (reg, new);
2663 case TLS_MODEL_LOCAL_DYNAMIC:
2665 r2 = gen_rtx_REG (Pmode, 2);
2666 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2667 new = gen_rtx_CONST (Pmode, tls_call);
2668 new = force_const_mem (Pmode, new);
2669 emit_move_insn (r2, new);
2670 emit_call_insn (gen_call_value_tls (r2, tls_call));
2671 insn = get_insns ();
2674 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2675 temp = gen_reg_rtx (Pmode);
2676 emit_libcall_block (insn, temp, r2, new);
2678 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2679 base = gen_reg_rtx (Pmode);
2680 s390_load_address (base, new);
2682 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2683 new = gen_rtx_CONST (Pmode, new);
2684 new = force_const_mem (Pmode, new);
2685 temp = gen_reg_rtx (Pmode);
2686 emit_move_insn (temp, new);
2688 new = gen_rtx_PLUS (Pmode, base, temp);
2691 s390_load_address (reg, new);
2696 case TLS_MODEL_INITIAL_EXEC:
2699 /* Assume GOT offset < 4k. This is handled the same way
2700 in both 31- and 64-bit code. */
2702 if (reload_in_progress || reload_completed)
2703 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2705 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2706 new = gen_rtx_CONST (Pmode, new);
2707 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2708 new = gen_rtx_MEM (Pmode, new);
2709 RTX_UNCHANGING_P (new) = 1;
2710 temp = gen_reg_rtx (Pmode);
2711 emit_move_insn (temp, new);
2713 else if (TARGET_CPU_ZARCH)
2715 /* If the GOT offset might be >= 4k, we determine the position
2716 of the GOT entry via a PC-relative LARL. */
2718 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2719 new = gen_rtx_CONST (Pmode, new);
2720 temp = gen_reg_rtx (Pmode);
2721 emit_move_insn (temp, new);
2723 new = gen_rtx_MEM (Pmode, temp);
2724 RTX_UNCHANGING_P (new) = 1;
2725 temp = gen_reg_rtx (Pmode);
2726 emit_move_insn (temp, new);
2730 /* If the GOT offset might be >= 4k, we have to load it
2731 from the literal pool. */
2733 if (reload_in_progress || reload_completed)
2734 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2736 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2737 new = gen_rtx_CONST (Pmode, new);
2738 new = force_const_mem (Pmode, new);
2739 temp = gen_reg_rtx (Pmode);
2740 emit_move_insn (temp, new);
2742 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2743 new = gen_rtx_MEM (Pmode, new);
2744 RTX_UNCHANGING_P (new) = 1;
2746 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2747 temp = gen_reg_rtx (Pmode);
2748 emit_insn (gen_rtx_SET (Pmode, temp, new));
2752 /* In position-dependent code, load the absolute address of
2753 the GOT entry from the literal pool. */
2755 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2756 new = gen_rtx_CONST (Pmode, new);
2757 new = force_const_mem (Pmode, new);
2758 temp = gen_reg_rtx (Pmode);
2759 emit_move_insn (temp, new);
2762 new = gen_rtx_MEM (Pmode, new);
2763 RTX_UNCHANGING_P (new) = 1;
2765 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2766 temp = gen_reg_rtx (Pmode);
2767 emit_insn (gen_rtx_SET (Pmode, temp, new));
2770 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2773 s390_load_address (reg, new);
2778 case TLS_MODEL_LOCAL_EXEC:
2779 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2780 new = gen_rtx_CONST (Pmode, new);
2781 new = force_const_mem (Pmode, new);
2782 temp = gen_reg_rtx (Pmode);
2783 emit_move_insn (temp, new);
2785 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2788 s390_load_address (reg, new);
2797 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2799 switch (XINT (XEXP (addr, 0), 1))
2801 case UNSPEC_INDNTPOFF:
2802 if (TARGET_CPU_ZARCH)
2814 abort (); /* for now ... */
2819 /* Emit insns to move operands[1] into operands[0]. */
2822 emit_symbolic_move (rtx *operands)
2824 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2826 if (GET_CODE (operands[0]) == MEM)
2827 operands[1] = force_reg (Pmode, operands[1]);
2828 else if (TLS_SYMBOLIC_CONST (operands[1]))
2829 operands[1] = legitimize_tls_address (operands[1], temp);
2831 operands[1] = legitimize_pic_address (operands[1], temp);
2834 /* Try machine-dependent ways of modifying an illegitimate address X
2835 to be legitimate. If we find one, return the new, valid address.
2837 OLDX is the address as it was before break_out_memory_refs was called.
2838 In some cases it is useful to look at this to decide what needs to be done.
2840 MODE is the mode of the operand pointed to by X.
2842 When -fpic is used, special handling is needed for symbolic references.
2843 See comments by legitimize_pic_address for details. */
2846 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2847 enum machine_mode mode ATTRIBUTE_UNUSED)
2849 rtx constant_term = const0_rtx;
2851 if (TLS_SYMBOLIC_CONST (x))
2853 x = legitimize_tls_address (x, 0);
2855 if (legitimate_address_p (mode, x, FALSE))
2860 if (SYMBOLIC_CONST (x)
2861 || (GET_CODE (x) == PLUS
2862 && (SYMBOLIC_CONST (XEXP (x, 0))
2863 || SYMBOLIC_CONST (XEXP (x, 1)))))
2864 x = legitimize_pic_address (x, 0);
2866 if (legitimate_address_p (mode, x, FALSE))
2870 x = eliminate_constant_term (x, &constant_term);
2872 /* Optimize loading of large displacements by splitting them
2873 into the multiple of 4K and the rest; this allows the
2874 former to be CSE'd if possible.
2876 Don't do this if the displacement is added to a register
2877 pointing into the stack frame, as the offsets will
2878 change later anyway. */
2880 if (GET_CODE (constant_term) == CONST_INT
2881 && !TARGET_LONG_DISPLACEMENT
2882 && !DISP_IN_RANGE (INTVAL (constant_term))
2883 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2885 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2886 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2888 rtx temp = gen_reg_rtx (Pmode);
2889 rtx val = force_operand (GEN_INT (upper), temp);
2891 emit_move_insn (temp, val);
2893 x = gen_rtx_PLUS (Pmode, x, temp);
2894 constant_term = GEN_INT (lower);
2897 if (GET_CODE (x) == PLUS)
2899 if (GET_CODE (XEXP (x, 0)) == REG)
2901 register rtx temp = gen_reg_rtx (Pmode);
2902 register rtx val = force_operand (XEXP (x, 1), temp);
2904 emit_move_insn (temp, val);
2906 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2909 else if (GET_CODE (XEXP (x, 1)) == REG)
2911 register rtx temp = gen_reg_rtx (Pmode);
2912 register rtx val = force_operand (XEXP (x, 0), temp);
2914 emit_move_insn (temp, val);
2916 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2920 if (constant_term != const0_rtx)
2921 x = gen_rtx_PLUS (Pmode, x, constant_term);
2926 /* Emit code to move LEN bytes from DST to SRC. */
2929 s390_expand_movstr (rtx dst, rtx src, rtx len)
2931 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2933 if (INTVAL (len) > 0)
2934 emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2937 else if (TARGET_MVCLE)
2939 emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
2944 rtx dst_addr, src_addr, count, blocks, temp;
2945 rtx end_label = gen_label_rtx ();
2946 enum machine_mode mode;
2949 mode = GET_MODE (len);
2950 if (mode == VOIDmode)
2953 type = lang_hooks.types.type_for_mode (mode, 1);
2957 dst_addr = gen_reg_rtx (Pmode);
2958 src_addr = gen_reg_rtx (Pmode);
2959 count = gen_reg_rtx (mode);
2960 blocks = gen_reg_rtx (mode);
2962 convert_move (count, len, 1);
2963 emit_cmp_and_jump_insns (count, const0_rtx,
2964 EQ, NULL_RTX, mode, 1, end_label);
2966 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
2967 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
2968 dst = change_address (dst, VOIDmode, dst_addr);
2969 src = change_address (src, VOIDmode, src_addr);
2971 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
2973 emit_move_insn (count, temp);
2975 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
2977 emit_move_insn (blocks, temp);
2979 expand_start_loop (1);
2980 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
2981 make_tree (type, blocks),
2982 make_tree (type, const0_rtx)));
2984 emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
2985 s390_load_address (dst_addr,
2986 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
2987 s390_load_address (src_addr,
2988 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
2990 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
2992 emit_move_insn (blocks, temp);
2996 emit_insn (gen_movstr_short (dst, src,
2997 convert_to_mode (Pmode, count, 1)));
2998 emit_label (end_label);
3002 /* Emit code to clear LEN bytes at DST. */
3005 s390_expand_clrstr (rtx dst, rtx len)
3007 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3009 if (INTVAL (len) > 0)
3010 emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
3013 else if (TARGET_MVCLE)
3015 emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
3020 rtx dst_addr, src_addr, count, blocks, temp;
3021 rtx end_label = gen_label_rtx ();
3022 enum machine_mode mode;
3025 mode = GET_MODE (len);
3026 if (mode == VOIDmode)
3029 type = lang_hooks.types.type_for_mode (mode, 1);
3033 dst_addr = gen_reg_rtx (Pmode);
3034 src_addr = gen_reg_rtx (Pmode);
3035 count = gen_reg_rtx (mode);
3036 blocks = gen_reg_rtx (mode);
3038 convert_move (count, len, 1);
3039 emit_cmp_and_jump_insns (count, const0_rtx,
3040 EQ, NULL_RTX, mode, 1, end_label);
3042 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3043 dst = change_address (dst, VOIDmode, dst_addr);
3045 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3047 emit_move_insn (count, temp);
3049 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3051 emit_move_insn (blocks, temp);
3053 expand_start_loop (1);
3054 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3055 make_tree (type, blocks),
3056 make_tree (type, const0_rtx)));
3058 emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
3059 s390_load_address (dst_addr,
3060 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3062 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3064 emit_move_insn (blocks, temp);
3068 emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
3069 emit_label (end_label);
3073 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3074 and return the result in TARGET. */
3077 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3079 rtx (*gen_result) (rtx) =
3080 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3082 op0 = protect_from_queue (op0, 0);
3083 op1 = protect_from_queue (op1, 0);
3084 len = protect_from_queue (len, 0);
3086 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3088 if (INTVAL (len) > 0)
3090 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3091 emit_insn (gen_result (target));
3094 emit_move_insn (target, const0_rtx);
3097 else /* if (TARGET_MVCLE) */
3099 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3100 emit_insn (gen_result (target));
3104 /* Deactivate for now as profile code cannot cope with
3105 CC being live across basic block boundaries. */
3108 rtx addr0, addr1, count, blocks, temp;
3109 rtx end_label = gen_label_rtx ();
3110 enum machine_mode mode;
3113 mode = GET_MODE (len);
3114 if (mode == VOIDmode)
3117 type = lang_hooks.types.type_for_mode (mode, 1);
3121 addr0 = gen_reg_rtx (Pmode);
3122 addr1 = gen_reg_rtx (Pmode);
3123 count = gen_reg_rtx (mode);
3124 blocks = gen_reg_rtx (mode);
3126 convert_move (count, len, 1);
3127 emit_cmp_and_jump_insns (count, const0_rtx,
3128 EQ, NULL_RTX, mode, 1, end_label);
3130 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3131 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3132 op0 = change_address (op0, VOIDmode, addr0);
3133 op1 = change_address (op1, VOIDmode, addr1);
3135 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3137 emit_move_insn (count, temp);
3139 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3141 emit_move_insn (blocks, temp);
3143 expand_start_loop (1);
3144 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3145 make_tree (type, blocks),
3146 make_tree (type, const0_rtx)));
3148 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3149 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3150 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3151 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3152 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3153 emit_jump_insn (temp);
3155 s390_load_address (addr0,
3156 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3157 s390_load_address (addr1,
3158 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3160 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3162 emit_move_insn (blocks, temp);
3166 emit_insn (gen_cmpmem_short (op0, op1,
3167 convert_to_mode (Pmode, count, 1)));
3168 emit_label (end_label);
3170 emit_insn (gen_result (target));
3175 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3176 We need to emit DTP-relative relocations. */
3179 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3184 fputs ("\t.long\t", file);
3187 fputs ("\t.quad\t", file);
3192 output_addr_const (file, x);
3193 fputs ("@DTPOFF", file);
3196 /* In the name of slightly smaller debug output, and to cater to
3197 general assembler losage, recognize various UNSPEC sequences
3198 and turn them back into a direct symbol reference. */
3201 s390_delegitimize_address (rtx orig_x)
3205 if (GET_CODE (x) != MEM)
3209 if (GET_CODE (x) == PLUS
3210 && GET_CODE (XEXP (x, 1)) == CONST
3211 && GET_CODE (XEXP (x, 0)) == REG
3212 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3214 y = XEXP (XEXP (x, 1), 0);
3215 if (GET_CODE (y) == UNSPEC
3216 && XINT (y, 1) == UNSPEC_GOT)
3217 return XVECEXP (y, 0, 0);
3221 if (GET_CODE (x) == CONST)
3224 if (GET_CODE (y) == UNSPEC
3225 && XINT (y, 1) == UNSPEC_GOTENT)
3226 return XVECEXP (y, 0, 0);
3233 /* Output shift count operand OP to stdio stream FILE. */
3236 print_shift_count_operand (FILE *file, rtx op)
3238 HOST_WIDE_INT offset = 0;
3240 /* We can have an integer constant, an address register,
3241 or a sum of the two. */
3242 if (GET_CODE (op) == CONST_INT)
3244 offset = INTVAL (op);
3247 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3249 offset = INTVAL (XEXP (op, 1));
3252 while (op && GET_CODE (op) == SUBREG)
3253 op = SUBREG_REG (op);
3256 if (op && (GET_CODE (op) != REG
3257 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3258 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3261 /* Shift counts are truncated to the low six bits anyway. */
3262 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3264 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3267 /* Locate some local-dynamic symbol still in use by this function
3268 so that we can print its name in local-dynamic base patterns. */
3271 get_some_local_dynamic_name (void)
3275 if (cfun->machine->some_ld_name)
3276 return cfun->machine->some_ld_name;
3278 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3280 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3281 return cfun->machine->some_ld_name;
3287 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3291 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3293 x = get_pool_constant (x);
3294 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3297 if (GET_CODE (x) == SYMBOL_REF
3298 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3300 cfun->machine->some_ld_name = XSTR (x, 0);
3307 /* Output symbolic constant X in assembler syntax to
3308 stdio stream FILE. */
3311 s390_output_symbolic_const (FILE *file, rtx x)
3313 switch (GET_CODE (x))
3318 s390_output_symbolic_const (file, XEXP (x, 0));
3322 s390_output_symbolic_const (file, XEXP (x, 0));
3323 fprintf (file, "+");
3324 s390_output_symbolic_const (file, XEXP (x, 1));
3328 s390_output_symbolic_const (file, XEXP (x, 0));
3329 fprintf (file, "-");
3330 s390_output_symbolic_const (file, XEXP (x, 1));
3337 output_addr_const (file, x);
3341 if (XVECLEN (x, 0) != 1)
3342 output_operand_lossage ("invalid UNSPEC as operand (1)");
3343 switch (XINT (x, 1))
3346 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3347 fprintf (file, "@GOTENT");
3350 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3351 fprintf (file, "@GOT");
3354 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3355 fprintf (file, "@GOTOFF");
3358 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3359 fprintf (file, "@PLT");
3362 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3363 fprintf (file, "@PLTOFF");
3366 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3367 fprintf (file, "@TLSGD");
3370 assemble_name (file, get_some_local_dynamic_name ());
3371 fprintf (file, "@TLSLDM");
3374 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3375 fprintf (file, "@DTPOFF");
3378 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3379 fprintf (file, "@NTPOFF");
3381 case UNSPEC_GOTNTPOFF:
3382 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3383 fprintf (file, "@GOTNTPOFF");
3385 case UNSPEC_INDNTPOFF:
3386 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3387 fprintf (file, "@INDNTPOFF");
3390 output_operand_lossage ("invalid UNSPEC as operand (2)");
3396 fatal_insn ("UNKNOWN in s390_output_symbolic_const !?", x);
3401 /* Output address operand ADDR in assembler syntax to
3402 stdio stream FILE. */
3405 print_operand_address (FILE *file, rtx addr)
3407 struct s390_address ad;
3409 if (!s390_decompose_address (addr, &ad)
3410 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3411 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3412 output_operand_lossage ("Cannot decompose address.");
3415 s390_output_symbolic_const (file, ad.disp);
3417 fprintf (file, "0");
3419 if (ad.base && ad.indx)
3420 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3421 reg_names[REGNO (ad.base)]);
3423 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3426 /* Output operand X in assembler syntax to stdio stream FILE.
3427 CODE specified the format flag. The following format flags
3430 'C': print opcode suffix for branch condition.
3431 'D': print opcode suffix for inverse branch condition.
3432 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3433 'O': print only the displacement of a memory reference.
3434 'R': print only the base register of a memory reference.
3435 'N': print the second word of a DImode operand.
3436 'M': print the second word of a TImode operand.
3437 'Y': print shift count operand.
3439 'b': print integer X as if it's an unsigned byte.
3440 'x': print integer X as if it's an unsigned word.
3441 'h': print integer X as if it's a signed word.
3442 'i': print the first nonzero HImode part of X.
3443 'j': print the first HImode part unequal to 0xffff of X. */
3446 print_operand (FILE *file, rtx x, int code)
3451 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3455 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3459 if (GET_CODE (x) == SYMBOL_REF)
3461 fprintf (file, "%s", ":tls_load:");
3462 output_addr_const (file, x);
3464 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3466 fprintf (file, "%s", ":tls_gdcall:");
3467 output_addr_const (file, XVECEXP (x, 0, 0));
3469 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3471 fprintf (file, "%s", ":tls_ldcall:");
3472 assemble_name (file, get_some_local_dynamic_name ());
3480 struct s390_address ad;
3482 if (GET_CODE (x) != MEM
3483 || !s390_decompose_address (XEXP (x, 0), &ad)
3484 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3489 s390_output_symbolic_const (file, ad.disp);
3491 fprintf (file, "0");
3497 struct s390_address ad;
3499 if (GET_CODE (x) != MEM
3500 || !s390_decompose_address (XEXP (x, 0), &ad)
3501 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3506 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3508 fprintf (file, "0");
3513 if (GET_CODE (x) == REG)
3514 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3515 else if (GET_CODE (x) == MEM)
3516 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3522 if (GET_CODE (x) == REG)
3523 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3524 else if (GET_CODE (x) == MEM)
3525 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3531 print_shift_count_operand (file, x);
3535 switch (GET_CODE (x))
3538 fprintf (file, "%s", reg_names[REGNO (x)]);
3542 output_address (XEXP (x, 0));
3549 s390_output_symbolic_const (file, x);
3554 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3555 else if (code == 'x')
3556 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3557 else if (code == 'h')
3558 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3559 else if (code == 'i')
3560 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3561 s390_extract_part (x, HImode, 0));
3562 else if (code == 'j')
3563 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3564 s390_extract_part (x, HImode, -1));
3566 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3570 if (GET_MODE (x) != VOIDmode)
3573 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3574 else if (code == 'x')
3575 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3576 else if (code == 'h')
3577 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3583 fatal_insn ("UNKNOWN in print_operand !?", x);
3588 /* Target hook for assembling integer objects. We need to define it
3589 here to work a round a bug in some versions of GAS, which couldn't
3590 handle values smaller than INT_MIN when printed in decimal. */
3593 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3595 if (size == 8 && aligned_p
3596 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3598 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3602 return default_assemble_integer (x, size, aligned_p);
3605 /* Returns true if register REGNO is used for forming
3606 a memory address in expression X. */
3609 reg_used_in_mem_p (int regno, rtx x)
3611 enum rtx_code code = GET_CODE (x);
3617 if (refers_to_regno_p (regno, regno+1,
3621 else if (code == SET
3622 && GET_CODE (SET_DEST (x)) == PC)
3624 if (refers_to_regno_p (regno, regno+1,
3629 fmt = GET_RTX_FORMAT (code);
3630 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3633 && reg_used_in_mem_p (regno, XEXP (x, i)))
3636 else if (fmt[i] == 'E')
3637 for (j = 0; j < XVECLEN (x, i); j++)
3638 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3644 /* Returns true if expression DEP_RTX sets an address register
3645 used by instruction INSN to address memory. */
3648 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3652 if (GET_CODE (dep_rtx) == INSN)
3653 dep_rtx = PATTERN (dep_rtx);
3655 if (GET_CODE (dep_rtx) == SET)
3657 target = SET_DEST (dep_rtx);
3658 if (GET_CODE (target) == STRICT_LOW_PART)
3659 target = XEXP (target, 0);
3660 while (GET_CODE (target) == SUBREG)
3661 target = SUBREG_REG (target);
3663 if (GET_CODE (target) == REG)
3665 int regno = REGNO (target);
3667 if (s390_safe_attr_type (insn) == TYPE_LA)
3669 pat = PATTERN (insn);
3670 if (GET_CODE (pat) == PARALLEL)
3672 if (XVECLEN (pat, 0) != 2)
3674 pat = XVECEXP (pat, 0, 0);
3676 if (GET_CODE (pat) == SET)
3677 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3681 else if (get_attr_atype (insn) == ATYPE_AGEN)
3682 return reg_used_in_mem_p (regno, PATTERN (insn));
3688 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3691 s390_agen_dep_p (rtx dep_insn, rtx insn)
3693 rtx dep_rtx = PATTERN (dep_insn);
3696 if (GET_CODE (dep_rtx) == SET
3697 && addr_generation_dependency_p (dep_rtx, insn))
3699 else if (GET_CODE (dep_rtx) == PARALLEL)
3701 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3703 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3710 /* Return the modified cost of the dependency of instruction INSN
3711 on instruction DEP_INSN through the link LINK. COST is the
3712 default cost of that dependency.
3714 Data dependencies are all handled without delay. However, if a
3715 register is modified and subsequently used as base or index
3716 register of a memory reference, at least 4 cycles need to pass
3717 between setting and using the register to avoid pipeline stalls.
3718 An exception is the LA instruction. An address generated by LA can
3719 be used by introducing only a one cycle stall on the pipeline. */
3722 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3727 /* If the dependence is an anti-dependence, there is no cost. For an
3728 output dependence, there is sometimes a cost, but it doesn't seem
3729 worth handling those few cases. */
3731 if (REG_NOTE_KIND (link) != 0)
3734 /* If we can't recognize the insns, we can't really do anything. */
3735 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3738 /* DFA based scheduling checks address dependency in md file. */
3739 if (s390_use_dfa_pipeline_interface ())
3741 /* Operand forward in case of lr, load and la. */
3742 if (s390_tune == PROCESSOR_2084_Z990
3744 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3745 || s390_safe_attr_type (dep_insn) == TYPE_LR
3746 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3751 dep_rtx = PATTERN (dep_insn);
3753 if (GET_CODE (dep_rtx) == SET
3754 && addr_generation_dependency_p (dep_rtx, insn))
3755 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3756 else if (GET_CODE (dep_rtx) == PARALLEL)
3758 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3760 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3761 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3767 /* A C statement (sans semicolon) to update the integer scheduling priority
3768 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3769 reduce the priority to execute INSN later. Do not define this macro if
3770 you do not need to adjust the scheduling priorities of insns.
3772 A STD instruction should be scheduled earlier,
3773 in order to use the bypass. */
3776 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3778 if (! INSN_P (insn))
3781 if (s390_tune != PROCESSOR_2084_Z990)
3784 switch (s390_safe_attr_type (insn))
3788 priority = priority << 3;
3791 priority = priority << 1;
3799 /* The number of instructions that can be issued per cycle. */
3802 s390_issue_rate (void)
3804 if (s390_tune == PROCESSOR_2084_Z990)
3809 /* If the following function returns TRUE, we will use the the DFA
3813 s390_use_dfa_pipeline_interface (void)
3815 if (s390_tune == PROCESSOR_2064_Z900
3816 || s390_tune == PROCESSOR_2084_Z990)
3823 s390_first_cycle_multipass_dfa_lookahead (void)
3825 return s390_use_dfa_pipeline_interface () ? 4 : 0;
3828 /* Called after issuing each insn.
3829 Triggers default sort algorithm to better slot instructions. */
3832 s390_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
3833 int sched_verbose ATTRIBUTE_UNUSED,
3834 rtx *ready ATTRIBUTE_UNUSED,
3835 int *pn_ready ATTRIBUTE_UNUSED,
3836 int clock_var ATTRIBUTE_UNUSED)
3838 return s390_issue_rate();
3842 /* Split all branches that exceed the maximum distance.
3843 Returns true if this created a new literal pool entry. */
3846 s390_split_branches (void)
3848 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
3849 int new_literal = 0;
3850 rtx insn, pat, tmp, target;
3853 /* We need correct insn addresses. */
3855 shorten_branches (get_insns ());
3857 /* Find all branches that exceed 64KB, and split them. */
3859 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3861 if (GET_CODE (insn) != JUMP_INSN)
3864 pat = PATTERN (insn);
3865 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
3866 pat = XVECEXP (pat, 0, 0);
3867 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
3870 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
3872 label = &SET_SRC (pat);
3874 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
3876 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
3877 label = &XEXP (SET_SRC (pat), 1);
3878 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
3879 label = &XEXP (SET_SRC (pat), 2);
3886 if (get_attr_length (insn) <= 4)
3889 /* We are going to use the return register as scratch register,
3890 make sure it will be saved/restored by the prologue/epilogue. */
3891 cfun->machine->save_return_addr_p = 1;
3896 tmp = force_const_mem (Pmode, *label);
3897 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
3898 INSN_ADDRESSES_NEW (tmp, -1);
3905 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
3906 UNSPEC_LTREL_OFFSET);
3907 target = gen_rtx_CONST (Pmode, target);
3908 target = force_const_mem (Pmode, target);
3909 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
3910 INSN_ADDRESSES_NEW (tmp, -1);
3912 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
3914 target = gen_rtx_PLUS (Pmode, temp_reg, target);
3917 if (!validate_change (insn, label, target, 0))
3925 /* Find a literal pool symbol referenced in RTX X, and store
3926 it at REF. Will abort if X contains references to more than
3927 one such pool symbol; multiple references to the same symbol
3928 are allowed, however.
3930 The rtx pointed to by REF must be initialized to NULL_RTX
3931 by the caller before calling this routine. */
3934 find_constant_pool_ref (rtx x, rtx *ref)
3939 /* Ignore LTREL_BASE references. */
3940 if (GET_CODE (x) == UNSPEC
3941 && XINT (x, 1) == UNSPEC_LTREL_BASE)
3943 /* Likewise POOL_ENTRY insns. */
3944 if (GET_CODE (x) == UNSPEC_VOLATILE
3945 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
3948 if (GET_CODE (x) == SYMBOL_REF
3949 && CONSTANT_POOL_ADDRESS_P (x))
3951 if (*ref == NULL_RTX)
3957 fmt = GET_RTX_FORMAT (GET_CODE (x));
3958 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
3962 find_constant_pool_ref (XEXP (x, i), ref);
3964 else if (fmt[i] == 'E')
3966 for (j = 0; j < XVECLEN (x, i); j++)
3967 find_constant_pool_ref (XVECEXP (x, i, j), ref);
3972 /* Replace every reference to the literal pool symbol REF
3973 in X by the address ADDR. Fix up MEMs as required. */
3976 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
3984 /* Literal pool references can only occur inside a MEM ... */
3985 if (GET_CODE (*x) == MEM)
3987 rtx memref = XEXP (*x, 0);
3991 *x = replace_equiv_address (*x, addr);
3995 if (GET_CODE (memref) == CONST
3996 && GET_CODE (XEXP (memref, 0)) == PLUS
3997 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
3998 && XEXP (XEXP (memref, 0), 0) == ref)
4000 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4001 *x = replace_equiv_address (*x, plus_constant (addr, off));
4006 /* ... or a load-address type pattern. */
4007 if (GET_CODE (*x) == SET)
4009 rtx addrref = SET_SRC (*x);
4013 SET_SRC (*x) = addr;
4017 if (GET_CODE (addrref) == CONST
4018 && GET_CODE (XEXP (addrref, 0)) == PLUS
4019 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4020 && XEXP (XEXP (addrref, 0), 0) == ref)
4022 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4023 SET_SRC (*x) = plus_constant (addr, off);
4028 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4029 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4033 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4035 else if (fmt[i] == 'E')
4037 for (j = 0; j < XVECLEN (*x, i); j++)
4038 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4043 /* Check whether X contains an UNSPEC_LTREL_BASE.
4044 Return its constant pool symbol if found, NULL_RTX otherwise. */
4047 find_ltrel_base (rtx x)
4052 if (GET_CODE (x) == UNSPEC
4053 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4054 return XVECEXP (x, 0, 0);
4056 fmt = GET_RTX_FORMAT (GET_CODE (x));
4057 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4061 rtx fnd = find_ltrel_base (XEXP (x, i));
4065 else if (fmt[i] == 'E')
4067 for (j = 0; j < XVECLEN (x, i); j++)
4069 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4079 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4082 replace_ltrel_base (rtx *x, rtx base)
4087 if (GET_CODE (*x) == UNSPEC
4088 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4094 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4095 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4099 replace_ltrel_base (&XEXP (*x, i), base);
4101 else if (fmt[i] == 'E')
4103 for (j = 0; j < XVECLEN (*x, i); j++)
4104 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4110 /* We keep a list of constants which we have to add to internal
4111 constant tables in the middle of large functions. */
4113 #define NR_C_MODES 7
4114 enum machine_mode constant_modes[NR_C_MODES] =
4125 struct constant *next;
4130 struct constant_pool
4132 struct constant_pool *next;
4137 struct constant *constants[NR_C_MODES];
4142 static struct constant_pool * s390_mainpool_start (void);
4143 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4144 static void s390_mainpool_cancel (struct constant_pool *);
4146 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4147 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4148 static void s390_chunkify_cancel (struct constant_pool *);
4150 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4151 static void s390_end_pool (struct constant_pool *, rtx);
4152 static void s390_add_pool_insn (struct constant_pool *, rtx);
4153 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4154 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4155 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4156 static rtx s390_dump_pool (struct constant_pool *, bool);
4157 static struct constant_pool *s390_alloc_pool (void);
4158 static void s390_free_pool (struct constant_pool *);
4160 /* Create new constant pool covering instructions starting at INSN
4161 and chain it to the end of POOL_LIST. */
4163 static struct constant_pool *
4164 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4166 struct constant_pool *pool, **prev;
4168 pool = s390_alloc_pool ();
4169 pool->first_insn = insn;
4171 for (prev = pool_list; *prev; prev = &(*prev)->next)
4178 /* End range of instructions covered by POOL at INSN and emit
4179 placeholder insn representing the pool. */
4182 s390_end_pool (struct constant_pool *pool, rtx insn)
4184 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4187 insn = get_last_insn ();
4189 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4190 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4193 /* Add INSN to the list of insns covered by POOL. */
4196 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4198 bitmap_set_bit (pool->insns, INSN_UID (insn));
4201 /* Return pool out of POOL_LIST that covers INSN. */
4203 static struct constant_pool *
4204 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4206 struct constant_pool *pool;
4208 for (pool = pool_list; pool; pool = pool->next)
4209 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4215 /* Add constant VAL of mode MODE to the constant pool POOL. */
4218 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4223 for (i = 0; i < NR_C_MODES; i++)
4224 if (constant_modes[i] == mode)
4226 if (i == NR_C_MODES)
4229 for (c = pool->constants[i]; c != NULL; c = c->next)
4230 if (rtx_equal_p (val, c->value))
4235 c = (struct constant *) xmalloc (sizeof *c);
4237 c->label = gen_label_rtx ();
4238 c->next = pool->constants[i];
4239 pool->constants[i] = c;
4240 pool->size += GET_MODE_SIZE (mode);
4244 /* Find constant VAL of mode MODE in the constant pool POOL.
4245 Return an RTX describing the distance from the start of
4246 the pool to the location of the new constant. */
4249 s390_find_constant (struct constant_pool *pool, rtx val,
4250 enum machine_mode mode)
4256 for (i = 0; i < NR_C_MODES; i++)
4257 if (constant_modes[i] == mode)
4259 if (i == NR_C_MODES)
4262 for (c = pool->constants[i]; c != NULL; c = c->next)
4263 if (rtx_equal_p (val, c->value))
4269 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4270 gen_rtx_LABEL_REF (Pmode, pool->label));
4271 offset = gen_rtx_CONST (Pmode, offset);
4275 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4276 do not emit the pool base label. */
4279 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4285 /* Pool start insn switches to proper section
4286 and guarantees necessary alignment. */
4287 if (TARGET_CPU_ZARCH)
4288 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4290 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4291 INSN_ADDRESSES_NEW (insn, -1);
4295 insn = emit_label_after (pool->label, insn);
4296 INSN_ADDRESSES_NEW (insn, -1);
4299 /* Dump constants in descending alignment requirement order,
4300 ensuring proper alignment for every constant. */
4301 for (i = 0; i < NR_C_MODES; i++)
4302 for (c = pool->constants[i]; c; c = c->next)
4304 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4305 rtx value = c->value;
4306 if (GET_CODE (value) == CONST
4307 && GET_CODE (XEXP (value, 0)) == UNSPEC
4308 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4309 && XVECLEN (XEXP (value, 0), 0) == 1)
4311 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4312 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4313 value = gen_rtx_CONST (VOIDmode, value);
4316 insn = emit_label_after (c->label, insn);
4317 INSN_ADDRESSES_NEW (insn, -1);
4319 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4320 gen_rtvec (1, value),
4321 UNSPECV_POOL_ENTRY);
4322 insn = emit_insn_after (value, insn);
4323 INSN_ADDRESSES_NEW (insn, -1);
4326 /* Pool end insn switches back to previous section
4327 and guarantees necessary alignment. */
4328 if (TARGET_CPU_ZARCH)
4329 insn = emit_insn_after (gen_pool_end_64 (), insn);
4331 insn = emit_insn_after (gen_pool_end_31 (), insn);
4332 INSN_ADDRESSES_NEW (insn, -1);
4334 insn = emit_barrier_after (insn);
4335 INSN_ADDRESSES_NEW (insn, -1);
4337 /* Remove placeholder insn. */
4338 remove_insn (pool->pool_insn);
4343 /* Allocate new constant_pool structure. */
4345 static struct constant_pool *
4346 s390_alloc_pool (void)
4348 struct constant_pool *pool;
4351 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4353 for (i = 0; i < NR_C_MODES; i++)
4354 pool->constants[i] = NULL;
4356 pool->label = gen_label_rtx ();
4357 pool->first_insn = NULL_RTX;
4358 pool->pool_insn = NULL_RTX;
4359 pool->insns = BITMAP_XMALLOC ();
4365 /* Free all memory used by POOL. */
4368 s390_free_pool (struct constant_pool *pool)
4372 for (i = 0; i < NR_C_MODES; i++)
4374 struct constant *c = pool->constants[i];
4377 struct constant *next = c->next;
4383 BITMAP_XFREE (pool->insns);
4388 /* Collect main literal pool. Return NULL on overflow. */
4390 static struct constant_pool *
4391 s390_mainpool_start (void)
4393 struct constant_pool *pool;
4396 pool = s390_alloc_pool ();
4398 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4400 if (GET_CODE (insn) == INSN
4401 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4402 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4404 if (pool->pool_insn)
4406 pool->pool_insn = insn;
4409 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4411 rtx pool_ref = NULL_RTX;
4412 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4415 rtx constant = get_pool_constant (pool_ref);
4416 enum machine_mode mode = get_pool_mode (pool_ref);
4417 s390_add_constant (pool, constant, mode);
4422 if (!pool->pool_insn)
4425 if (pool->size >= 4096)
4427 s390_free_pool (pool);
4434 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4435 Modify the current function to output the pool constants as well as
4436 the pool register setup instruction. BASE_REG is the register to
4437 be used as pool base register. */
4440 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4444 /* If the pool is empty, we're done. */
4445 if (pool->size == 0)
4447 remove_insn (pool->pool_insn);
4448 s390_free_pool (pool);
4452 /* We need correct insn addresses. */
4453 shorten_branches (get_insns ());
4455 /* On zSeries, we use a LARL to load the pool register. The pool is
4456 located in the .rodata section, so we emit it after the function. */
4457 if (TARGET_CPU_ZARCH)
4459 insn = gen_main_base_64 (base_reg, pool->label);
4460 insn = emit_insn_after (insn, pool->pool_insn);
4461 INSN_ADDRESSES_NEW (insn, -1);
4462 remove_insn (pool->pool_insn);
4464 insn = get_last_insn ();
4465 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4466 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4468 s390_dump_pool (pool, 0);
4471 /* On S/390, if the total size of the function's code plus literal pool
4472 does not exceed 4096 bytes, we use BASR to set up a function base
4473 pointer, and emit the literal pool at the end of the function. */
4474 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4475 + pool->size + 8 /* alignment slop */ < 4096)
4477 insn = gen_main_base_31_small (base_reg, pool->label);
4478 insn = emit_insn_after (insn, pool->pool_insn);
4479 INSN_ADDRESSES_NEW (insn, -1);
4480 remove_insn (pool->pool_insn);
4482 insn = emit_label_after (pool->label, insn);
4483 INSN_ADDRESSES_NEW (insn, -1);
4485 insn = get_last_insn ();
4486 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4487 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4489 s390_dump_pool (pool, 1);
4492 /* Otherwise, we emit an inline literal pool and use BASR to branch
4493 over it, setting up the pool register at the same time. */
4496 rtx pool_end = gen_label_rtx ();
4498 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4499 insn = emit_insn_after (insn, pool->pool_insn);
4500 INSN_ADDRESSES_NEW (insn, -1);
4501 remove_insn (pool->pool_insn);
4503 insn = emit_label_after (pool->label, insn);
4504 INSN_ADDRESSES_NEW (insn, -1);
4506 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4507 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4509 insn = emit_label_after (pool_end, pool->pool_insn);
4510 INSN_ADDRESSES_NEW (insn, -1);
4512 s390_dump_pool (pool, 1);
4516 /* Replace all literal pool references. */
4518 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4521 replace_ltrel_base (&PATTERN (insn), base_reg);
4523 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4525 rtx addr, pool_ref = NULL_RTX;
4526 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4529 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4530 get_pool_mode (pool_ref));
4531 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4532 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4533 INSN_CODE (insn) = -1;
4539 /* Free the pool. */
4540 s390_free_pool (pool);
4543 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4544 We have decided we cannot use this pool, so revert all changes
4545 to the current function that were done by s390_mainpool_start. */
4547 s390_mainpool_cancel (struct constant_pool *pool)
4549 /* We didn't actually change the instruction stream, so simply
4550 free the pool memory. */
4551 s390_free_pool (pool);
4555 /* Chunkify the literal pool. BASE_REG is to be used as pool
4558 #define S390_POOL_CHUNK_MIN 0xc00
4559 #define S390_POOL_CHUNK_MAX 0xe00
4561 static struct constant_pool *
4562 s390_chunkify_start (rtx base_reg)
4564 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4567 rtx pending_ltrel = NULL_RTX;
4570 rtx (*gen_reload_base) (rtx, rtx) =
4571 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4574 /* We need correct insn addresses. */
4576 shorten_branches (get_insns ());
4578 /* Scan all insns and move literals to pool chunks. */
4580 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4582 /* Check for pending LTREL_BASE. */
4585 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4588 if (ltrel_base == pending_ltrel)
4589 pending_ltrel = NULL_RTX;
4595 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4597 rtx pool_ref = NULL_RTX;
4598 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4601 rtx constant = get_pool_constant (pool_ref);
4602 enum machine_mode mode = get_pool_mode (pool_ref);
4605 curr_pool = s390_start_pool (&pool_list, insn);
4607 s390_add_constant (curr_pool, constant, mode);
4608 s390_add_pool_insn (curr_pool, insn);
4610 /* Don't split the pool chunk between a LTREL_OFFSET load
4611 and the corresponding LTREL_BASE. */
4612 if (GET_CODE (constant) == CONST
4613 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4614 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4618 pending_ltrel = pool_ref;
4623 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4626 s390_add_pool_insn (curr_pool, insn);
4627 /* An LTREL_BASE must follow within the same basic block. */
4633 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4634 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4637 if (TARGET_CPU_ZARCH)
4639 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4642 s390_end_pool (curr_pool, NULL_RTX);
4647 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4648 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4651 /* We will later have to insert base register reload insns.
4652 Those will have an effect on code size, which we need to
4653 consider here. This calculation makes rather pessimistic
4654 worst-case assumptions. */
4655 if (GET_CODE (insn) == CODE_LABEL)
4658 if (chunk_size < S390_POOL_CHUNK_MIN
4659 && curr_pool->size < S390_POOL_CHUNK_MIN)
4662 /* Pool chunks can only be inserted after BARRIERs ... */
4663 if (GET_CODE (insn) == BARRIER)
4665 s390_end_pool (curr_pool, insn);
4670 /* ... so if we don't find one in time, create one. */
4671 else if ((chunk_size > S390_POOL_CHUNK_MAX
4672 || curr_pool->size > S390_POOL_CHUNK_MAX))
4674 rtx label, jump, barrier;
4676 /* We can insert the barrier only after a 'real' insn. */
4677 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4679 if (get_attr_length (insn) == 0)
4682 /* Don't separate LTREL_BASE from the corresponding
4683 LTREL_OFFSET load. */
4687 label = gen_label_rtx ();
4688 jump = emit_jump_insn_after (gen_jump (label), insn);
4689 barrier = emit_barrier_after (jump);
4690 insn = emit_label_after (label, barrier);
4691 JUMP_LABEL (jump) = label;
4692 LABEL_NUSES (label) = 1;
4694 INSN_ADDRESSES_NEW (jump, -1);
4695 INSN_ADDRESSES_NEW (barrier, -1);
4696 INSN_ADDRESSES_NEW (insn, -1);
4698 s390_end_pool (curr_pool, barrier);
4706 s390_end_pool (curr_pool, NULL_RTX);
4711 /* Find all labels that are branched into
4712 from an insn belonging to a different chunk. */
4714 far_labels = BITMAP_XMALLOC ();
4716 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4718 /* Labels marked with LABEL_PRESERVE_P can be target
4719 of non-local jumps, so we have to mark them.
4720 The same holds for named labels.
4722 Don't do that, however, if it is the label before
4725 if (GET_CODE (insn) == CODE_LABEL
4726 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4728 rtx vec_insn = next_real_insn (insn);
4729 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4730 PATTERN (vec_insn) : NULL_RTX;
4732 || !(GET_CODE (vec_pat) == ADDR_VEC
4733 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4734 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4737 /* If we have a direct jump (conditional or unconditional)
4738 or a casesi jump, check all potential targets. */
4739 else if (GET_CODE (insn) == JUMP_INSN)
4741 rtx pat = PATTERN (insn);
4742 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4743 pat = XVECEXP (pat, 0, 0);
4745 if (GET_CODE (pat) == SET)
4747 rtx label = JUMP_LABEL (insn);
4750 if (s390_find_pool (pool_list, label)
4751 != s390_find_pool (pool_list, insn))
4752 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4755 else if (GET_CODE (pat) == PARALLEL
4756 && XVECLEN (pat, 0) == 2
4757 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4758 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4759 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4761 /* Find the jump table used by this casesi jump. */
4762 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4763 rtx vec_insn = next_real_insn (vec_label);
4764 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4765 PATTERN (vec_insn) : NULL_RTX;
4767 && (GET_CODE (vec_pat) == ADDR_VEC
4768 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4770 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4772 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4774 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4776 if (s390_find_pool (pool_list, label)
4777 != s390_find_pool (pool_list, insn))
4778 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4785 /* Insert base register reload insns before every pool. */
4787 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4789 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4790 rtx insn = curr_pool->first_insn;
4791 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4794 /* Insert base register reload insns at every far label. */
4796 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4797 if (GET_CODE (insn) == CODE_LABEL
4798 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4800 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4803 rtx new_insn = gen_reload_base (base_reg, pool->label);
4804 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4809 BITMAP_XFREE (far_labels);
4812 /* Recompute insn addresses. */
4814 init_insn_lengths ();
4815 shorten_branches (get_insns ());
4820 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4821 After we have decided to use this list, finish implementing
4822 all changes to the current function as required. BASE_REG is
4823 to be used as pool base register. */
4826 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
4828 struct constant_pool *curr_pool = NULL;
4832 /* Replace all literal pool references. */
4834 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4837 replace_ltrel_base (&PATTERN (insn), base_reg);
4839 curr_pool = s390_find_pool (pool_list, insn);
4843 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4845 rtx addr, pool_ref = NULL_RTX;
4846 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4849 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
4850 get_pool_mode (pool_ref));
4851 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4852 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4853 INSN_CODE (insn) = -1;
4858 /* Dump out all literal pools. */
4860 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4861 s390_dump_pool (curr_pool, 0);
4863 /* Free pool list. */
4867 struct constant_pool *next = pool_list->next;
4868 s390_free_pool (pool_list);
4873 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4874 We have decided we cannot use this list, so revert all changes
4875 to the current function that were done by s390_chunkify_start. */
4878 s390_chunkify_cancel (struct constant_pool *pool_list)
4880 struct constant_pool *curr_pool = NULL;
4883 /* Remove all pool placeholder insns. */
4885 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4887 /* Did we insert an extra barrier? Remove it. */
4888 rtx barrier = PREV_INSN (curr_pool->pool_insn);
4889 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
4890 rtx label = NEXT_INSN (curr_pool->pool_insn);
4892 if (jump && GET_CODE (jump) == JUMP_INSN
4893 && barrier && GET_CODE (barrier) == BARRIER
4894 && label && GET_CODE (label) == CODE_LABEL
4895 && GET_CODE (PATTERN (jump)) == SET
4896 && SET_DEST (PATTERN (jump)) == pc_rtx
4897 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
4898 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
4901 remove_insn (barrier);
4902 remove_insn (label);
4905 remove_insn (curr_pool->pool_insn);
4908 /* Remove all base register reload insns. */
4910 for (insn = get_insns (); insn; )
4912 rtx next_insn = NEXT_INSN (insn);
4914 if (GET_CODE (insn) == INSN
4915 && GET_CODE (PATTERN (insn)) == SET
4916 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
4917 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
4923 /* Free pool list. */
4927 struct constant_pool *next = pool_list->next;
4928 s390_free_pool (pool_list);
4934 /* Output to FILE the constant pool entry EXP in mode MODE
4935 with alignment ALIGN. */
4938 s390_output_pool_entry (FILE *file, rtx exp, enum machine_mode mode,
4943 switch (GET_MODE_CLASS (mode))
4946 if (GET_CODE (exp) != CONST_DOUBLE)
4949 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
4950 assemble_real (r, mode, align);
4954 if (GET_CODE (exp) == CONST
4955 || GET_CODE (exp) == SYMBOL_REF
4956 || GET_CODE (exp) == LABEL_REF)
4958 fputs (integer_asm_op (GET_MODE_SIZE (mode), TRUE), file);
4959 s390_output_symbolic_const (file, exp);
4964 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
4974 /* Rework the prolog/epilog to avoid saving/restoring
4975 registers unnecessarily. BASE_USED specifies whether
4976 the literal pool base register needs to be saved. */
4979 s390_optimize_prolog (bool base_used)
4981 int save_first, save_last, restore_first, restore_last;
4983 rtx insn, new_insn, next_insn;
4985 /* Recompute regs_ever_live data for special registers. */
4986 regs_ever_live[BASE_REGISTER] = base_used;
4987 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
4988 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
4991 /* Find first and last gpr to be saved. */
4993 for (i = 6; i < 16; i++)
4994 if (regs_ever_live[i])
4996 || i == STACK_POINTER_REGNUM
4997 || i == RETURN_REGNUM
4998 || i == BASE_REGISTER
4999 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5002 for (j = 15; j > i; j--)
5003 if (regs_ever_live[j])
5005 || j == STACK_POINTER_REGNUM
5006 || j == RETURN_REGNUM
5007 || j == BASE_REGISTER
5008 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5013 /* Nothing to save/restore. */
5014 save_first = restore_first = -1;
5015 save_last = restore_last = -1;
5019 /* Save/restore from i to j. */
5020 save_first = restore_first = i;
5021 save_last = restore_last = j;
5024 /* Varargs functions need to save gprs 2 to 6. */
5025 if (current_function_stdarg)
5033 /* If all special registers are in fact used, there's nothing we
5034 can do, so no point in walking the insn list. */
5035 if (i <= BASE_REGISTER && j >= BASE_REGISTER
5036 && (TARGET_CPU_ZARCH || (i <= RETURN_REGNUM && j >= RETURN_REGNUM)))
5040 /* Search for prolog/epilog insns and replace them. */
5042 for (insn = get_insns (); insn; insn = next_insn)
5044 int first, last, off;
5045 rtx set, base, offset;
5047 next_insn = NEXT_INSN (insn);
5049 if (GET_CODE (insn) != INSN)
5052 if (GET_CODE (PATTERN (insn)) == PARALLEL
5053 && store_multiple_operation (PATTERN (insn), VOIDmode))
5055 set = XVECEXP (PATTERN (insn), 0, 0);
5056 first = REGNO (SET_SRC (set));
5057 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5058 offset = const0_rtx;
5059 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5060 off = INTVAL (offset) - first * UNITS_PER_WORD;
5062 if (GET_CODE (base) != REG || off < 0)
5064 if (first > BASE_REGISTER || last < BASE_REGISTER)
5067 if (save_first != -1)
5069 new_insn = save_gprs (base, off, save_first, save_last);
5070 new_insn = emit_insn_before (new_insn, insn);
5071 INSN_ADDRESSES_NEW (new_insn, -1);
5078 if (GET_CODE (PATTERN (insn)) == SET
5079 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5080 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGISTER
5081 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5083 set = PATTERN (insn);
5084 offset = const0_rtx;
5085 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5086 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5088 if (GET_CODE (base) != REG || off < 0)
5091 if (save_first != -1)
5093 new_insn = save_gprs (base, off, save_first, save_last);
5094 new_insn = emit_insn_before (new_insn, insn);
5095 INSN_ADDRESSES_NEW (new_insn, -1);
5102 if (GET_CODE (PATTERN (insn)) == PARALLEL
5103 && load_multiple_operation (PATTERN (insn), VOIDmode))
5105 set = XVECEXP (PATTERN (insn), 0, 0);
5106 first = REGNO (SET_DEST (set));
5107 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5108 offset = const0_rtx;
5109 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5110 off = INTVAL (offset) - first * UNITS_PER_WORD;
5112 if (GET_CODE (base) != REG || off < 0)
5114 if (first > BASE_REGISTER || last < BASE_REGISTER)
5117 if (restore_first != -1)
5119 new_insn = restore_gprs (base, off, restore_first, restore_last);
5120 new_insn = emit_insn_before (new_insn, insn);
5121 INSN_ADDRESSES_NEW (new_insn, -1);
5128 if (GET_CODE (PATTERN (insn)) == SET
5129 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5130 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGISTER
5131 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5133 set = PATTERN (insn);
5134 offset = const0_rtx;
5135 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5136 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5138 if (GET_CODE (base) != REG || off < 0)
5141 if (restore_first != -1)
5143 new_insn = restore_gprs (base, off, restore_first, restore_last);
5144 new_insn = emit_insn_before (new_insn, insn);
5145 INSN_ADDRESSES_NEW (new_insn, -1);
5154 /* Perform machine-dependent processing. */
5159 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5160 bool base_used = false;
5161 bool pool_overflow = false;
5163 /* Make sure all splits have been performed; splits after
5164 machine_dependent_reorg might confuse insn length counts. */
5165 split_all_insns_noflow ();
5168 /* In small leaf functions, try to use an unused call-clobbered
5169 register as base register to avoid save/restore overhead. */
5170 if (current_function_is_leaf && !regs_ever_live[5])
5171 base_reg = gen_rtx_REG (Pmode, 5);
5174 /* Install the main literal pool and the associated base
5175 register load insns.
5177 In addition, there are two problematic situations we need
5180 - the literal pool might be > 4096 bytes in size, so that
5181 some of its elements cannot be directly accessed
5183 - a branch target might be > 64K away from the branch, so that
5184 it is not possible to use a PC-relative instruction.
5186 To fix those, we split the single literal pool into multiple
5187 pool chunks, reloading the pool base register at various
5188 points throughout the function to ensure it always points to
5189 the pool chunk the following code expects, and / or replace
5190 PC-relative branches by absolute branches.
5192 However, the two problems are interdependent: splitting the
5193 literal pool can move a branch further away from its target,
5194 causing the 64K limit to overflow, and on the other hand,
5195 replacing a PC-relative branch by an absolute branch means
5196 we need to put the branch target address into the literal
5197 pool, possibly causing it to overflow.
5199 So, we loop trying to fix up both problems until we manage
5200 to satisfy both conditions at the same time. Note that the
5201 loop is guaranteed to terminate as every pass of the loop
5202 strictly decreases the total number of PC-relative branches
5203 in the function. (This is not completely true as there
5204 might be branch-over-pool insns introduced by chunkify_start.
5205 Those never need to be split however.) */
5209 struct constant_pool *pool = NULL;
5211 /* Collect the literal pool. */
5214 pool = s390_mainpool_start ();
5216 pool_overflow = true;
5219 /* If literal pool overflowed, start to chunkify it. */
5221 pool = s390_chunkify_start (base_reg);
5223 /* Split out-of-range branches. If this has created new
5224 literal pool entries, cancel current chunk list and
5225 recompute it. zSeries machines have large branch
5226 instructions, so we never need to split a branch. */
5227 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5230 s390_chunkify_cancel (pool);
5232 s390_mainpool_cancel (pool);
5237 /* If we made it up to here, both conditions are satisfied.
5238 Finish up literal pool related changes. */
5239 if ((pool_overflow || pool->size > 0)
5240 && REGNO (base_reg) == BASE_REGISTER)
5244 s390_chunkify_finish (pool, base_reg);
5246 s390_mainpool_finish (pool, base_reg);
5251 s390_optimize_prolog (base_used);
5255 /* Return an RTL expression representing the value of the return address
5256 for the frame COUNT steps up from the current frame. FRAME is the
5257 frame pointer of that frame. */
5260 s390_return_addr_rtx (int count, rtx frame)
5264 /* Without backchain, we fail for all but the current frame. */
5266 if (!TARGET_BACKCHAIN && count > 0)
5269 /* For the current frame, we need to make sure the initial
5270 value of RETURN_REGNUM is actually saved. */
5273 cfun->machine->save_return_addr_p = true;
5275 /* To retrieve the return address we read the stack slot where the
5276 corresponding RETURN_REGNUM value was saved. */
5278 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5279 addr = memory_address (Pmode, addr);
5280 return gen_rtx_MEM (Pmode, addr);
5283 /* Find first call clobbered register unsused in a function.
5284 This could be used as base register in a leaf function
5285 or for holding the return address before epilogue. */
5288 find_unused_clobbered_reg (void)
5291 for (i = 0; i < 6; i++)
5292 if (!regs_ever_live[i])
5297 /* Fill FRAME with info about frame of current function. */
5300 s390_frame_info (void)
5303 HOST_WIDE_INT fsize = get_frame_size ();
5305 if (!TARGET_64BIT && fsize > 0x7fff0000)
5306 fatal_error ("Total size of local variables exceeds architecture limit.");
5308 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5309 cfun->machine->save_fprs_p = 0;
5311 for (i = 24; i < 32; i++)
5312 if (regs_ever_live[i] && !global_regs[i])
5314 cfun->machine->save_fprs_p = 1;
5318 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5320 /* Does function need to setup frame and save area. */
5322 if (! current_function_is_leaf
5323 || cfun->machine->frame_size > 0
5324 || current_function_calls_alloca
5325 || current_function_stdarg)
5326 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5328 /* If we use the return register, we'll need to make sure
5329 it is going to be saved/restored. */
5331 if (!current_function_is_leaf
5332 || regs_ever_live[RETURN_REGNUM])
5333 cfun->machine->save_return_addr_p = 1;
5335 /* Find first and last gpr to be saved. Note that at this point,
5336 we assume the base register and -on S/390- the return register
5337 always need to be saved. This is done because the usage of these
5338 register might change even after the prolog was emitted.
5339 If it turns out later that we really don't need them, the
5340 prolog/epilog code is modified again. */
5342 regs_ever_live[BASE_REGISTER] = 1;
5343 if (!TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p)
5344 regs_ever_live[RETURN_REGNUM] = 1;
5345 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5347 for (i = 6; i < 16; i++)
5348 if (regs_ever_live[i])
5350 || i == STACK_POINTER_REGNUM
5351 || i == RETURN_REGNUM
5352 || i == BASE_REGISTER
5353 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5356 for (j = 15; j > i; j--)
5357 if (regs_ever_live[j])
5359 || j == STACK_POINTER_REGNUM
5360 || j == RETURN_REGNUM
5361 || j == BASE_REGISTER
5362 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5365 /* Save / Restore from gpr i to j. */
5366 cfun->machine->first_save_gpr = i;
5367 cfun->machine->first_restore_gpr = i;
5368 cfun->machine->last_save_gpr = j;
5370 /* Varargs functions need to save gprs 2 to 6. */
5371 if (current_function_stdarg)
5372 cfun->machine->first_save_gpr = 2;
5375 /* Return offset between argument pointer and frame pointer
5376 initially after prologue. */
5379 s390_arg_frame_offset (void)
5381 HOST_WIDE_INT fsize = get_frame_size ();
5384 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5387 for (i = 24; i < 32; i++)
5388 if (regs_ever_live[i] && !global_regs[i])
5394 fsize = fsize + save_fprs_p * 64;
5396 /* Does function need to setup frame and save area. */
5398 if (! current_function_is_leaf
5400 || current_function_calls_alloca
5401 || current_function_stdarg)
5402 fsize += STARTING_FRAME_OFFSET;
5403 return fsize + STACK_POINTER_OFFSET;
5406 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5407 to register BASE. Return generated insn. */
5410 save_fpr (rtx base, int offset, int regnum)
5413 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5414 set_mem_alias_set (addr, s390_sr_alias_set);
5416 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5419 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5420 to register BASE. Return generated insn. */
5423 restore_fpr (rtx base, int offset, int regnum)
5426 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5427 set_mem_alias_set (addr, s390_sr_alias_set);
5429 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5432 /* Generate insn to save registers FIRST to LAST into
5433 the register save area located at offset OFFSET
5434 relative to register BASE. */
5437 save_gprs (rtx base, int offset, int first, int last)
5439 rtx addr, insn, note;
5442 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5443 addr = gen_rtx_MEM (Pmode, addr);
5444 set_mem_alias_set (addr, s390_sr_alias_set);
5446 /* Special-case single register. */
5450 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5452 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5454 RTX_FRAME_RELATED_P (insn) = 1;
5459 insn = gen_store_multiple (addr,
5460 gen_rtx_REG (Pmode, first),
5461 GEN_INT (last - first + 1));
5464 /* We need to set the FRAME_RELATED flag on all SETs
5465 inside the store-multiple pattern.
5467 However, we must not emit DWARF records for registers 2..5
5468 if they are stored for use by variable arguments ...
5470 ??? Unfortunately, it is not enough to simply not the the
5471 FRAME_RELATED flags for those SETs, because the first SET
5472 of the PARALLEL is always treated as if it had the flag
5473 set, even if it does not. Therefore we emit a new pattern
5474 without those registers as REG_FRAME_RELATED_EXPR note. */
5478 rtx pat = PATTERN (insn);
5480 for (i = 0; i < XVECLEN (pat, 0); i++)
5481 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5482 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5484 RTX_FRAME_RELATED_P (insn) = 1;
5488 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5489 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5490 gen_rtx_REG (Pmode, 6),
5491 GEN_INT (last - 6 + 1));
5492 note = PATTERN (note);
5495 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5496 note, REG_NOTES (insn));
5498 for (i = 0; i < XVECLEN (note, 0); i++)
5499 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5500 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5502 RTX_FRAME_RELATED_P (insn) = 1;
5508 /* Generate insn to restore registers FIRST to LAST from
5509 the register save area located at offset OFFSET
5510 relative to register BASE. */
5513 restore_gprs (rtx base, int offset, int first, int last)
5517 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5518 addr = gen_rtx_MEM (Pmode, addr);
5519 set_mem_alias_set (addr, s390_sr_alias_set);
5521 /* Special-case single register. */
5525 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5527 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5532 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5534 GEN_INT (last - first + 1));
5538 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5539 annotate generated insns with REG_MAYBE_DEAD notes. */
5541 static GTY(()) rtx got_symbol;
5543 s390_load_got (int maybe_dead)
5547 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5548 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5551 if (TARGET_CPU_ZARCH)
5553 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5555 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5562 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5563 UNSPEC_LTREL_OFFSET);
5564 offset = gen_rtx_CONST (Pmode, offset);
5565 offset = force_const_mem (Pmode, offset);
5567 insn = emit_move_insn (pic_offset_table_rtx, offset);
5569 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5572 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5574 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5576 insn = emit_move_insn (pic_offset_table_rtx, offset);
5578 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5583 /* Expand the prologue into a bunch of separate insns. */
5586 s390_emit_prologue (void)
5592 /* Compute frame_info. */
5596 /* Choose best register to use for temp use within prologue.
5597 See below for why TPF must use the register 1. */
5599 if (!current_function_is_leaf
5601 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5603 temp_reg = gen_rtx_REG (Pmode, 1);
5605 /* Save call saved gprs. */
5607 insn = save_gprs (stack_pointer_rtx, 0,
5608 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5611 /* Dummy insn to mark literal pool slot. */
5613 emit_insn (gen_main_pool ());
5615 /* Save fprs for variable args. */
5617 if (current_function_stdarg)
5618 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5619 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5621 /* Save fprs 4 and 6 if used (31 bit ABI). */
5624 for (i = 18; i < 20; i++)
5625 if (regs_ever_live[i] && !global_regs[i])
5627 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5628 RTX_FRAME_RELATED_P (insn) = 1;
5631 /* Decrement stack pointer. */
5633 if (cfun->machine->frame_size > 0)
5635 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5637 /* Save incoming stack pointer into temp reg. */
5639 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5641 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5644 /* Subtract frame size from stack pointer. */
5646 if (DISP_IN_RANGE (INTVAL (frame_off)))
5648 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5649 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5651 insn = emit_insn (insn);
5655 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5656 frame_off = force_const_mem (Pmode, frame_off);
5658 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5661 RTX_FRAME_RELATED_P (insn) = 1;
5663 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5664 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5665 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5666 GEN_INT (-cfun->machine->frame_size))),
5669 /* Set backchain. */
5671 if (TARGET_BACKCHAIN)
5673 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5674 set_mem_alias_set (addr, s390_sr_alias_set);
5675 insn = emit_insn (gen_move_insn (addr, temp_reg));
5678 /* If we support asynchronous exceptions (e.g. for Java),
5679 we need to make sure the backchain pointer is set up
5680 before any possibly trapping memory access. */
5682 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5684 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5685 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5689 /* Save fprs 8 - 15 (64 bit ABI). */
5691 if (cfun->machine->save_fprs_p)
5693 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5695 for (i = 24; i < 32; i++)
5696 if (regs_ever_live[i] && !global_regs[i])
5698 rtx addr = plus_constant (stack_pointer_rtx,
5699 cfun->machine->frame_size - 64 + (i-24)*8);
5701 insn = save_fpr (temp_reg, (i-24)*8, i);
5702 RTX_FRAME_RELATED_P (insn) = 1;
5704 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5705 gen_rtx_SET (VOIDmode,
5706 gen_rtx_MEM (DFmode, addr),
5707 gen_rtx_REG (DFmode, i)),
5712 /* Set frame pointer, if needed. */
5714 if (frame_pointer_needed)
5716 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5717 RTX_FRAME_RELATED_P (insn) = 1;
5720 /* Set up got pointer, if needed. */
5722 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5723 s390_load_got(true);
5727 /* Generate a BAS instruction to serve as a function
5728 entry intercept to facilitate the use of tracing
5729 algorithms located at the branch target.
5731 This must use register 1. */
5736 addr = GEN_INT (0xfe0);
5737 unkn = CONST0_RTX (SImode);
5738 link = gen_rtx_REG (Pmode, 1);
5740 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5742 /* Emit a blockage here so that all code
5743 lies between the profiling mechanisms. */
5744 emit_insn (gen_blockage ());
5748 /* Expand the epilogue into a bunch of separate insns. */
5751 s390_emit_epilogue (void)
5753 rtx frame_pointer, return_reg;
5754 int area_bottom, area_top, offset = 0;
5761 /* Generate a BAS instruction to serve as a function
5762 entry intercept to facilitate the use of tracing
5763 algorithms located at the branch target.
5765 This must use register 1. */
5771 addr = GEN_INT (0xfe6);
5772 unkn = CONST0_RTX (SImode);
5773 link = gen_rtx_REG (Pmode, 1);
5775 /* Emit a blockage here so that all code
5776 lies between the profiling mechanisms. */
5777 emit_insn (gen_blockage ());
5779 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5782 /* Check whether to use frame or stack pointer for restore. */
5784 frame_pointer = frame_pointer_needed ?
5785 hard_frame_pointer_rtx : stack_pointer_rtx;
5787 /* Compute which parts of the save area we need to access. */
5789 if (cfun->machine->first_restore_gpr != -1)
5791 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5792 area_top = (cfun->machine->last_save_gpr + 1) * UNITS_PER_WORD;
5796 area_bottom = INT_MAX;
5802 if (cfun->machine->save_fprs_p)
5804 if (area_bottom > -64)
5812 for (i = 18; i < 20; i++)
5813 if (regs_ever_live[i] && !global_regs[i])
5815 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5816 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5817 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5818 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5822 /* Check whether we can access the register save area.
5823 If not, increment the frame pointer as required. */
5825 if (area_top <= area_bottom)
5827 /* Nothing to restore. */
5829 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5830 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5832 /* Area is in range. */
5833 offset = cfun->machine->frame_size;
5837 rtx insn, frame_off;
5839 offset = area_bottom < 0 ? -area_bottom : 0;
5840 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5842 if (DISP_IN_RANGE (INTVAL (frame_off)))
5844 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5845 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5846 insn = emit_insn (insn);
5850 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5851 frame_off = force_const_mem (Pmode, frame_off);
5853 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5857 /* Restore call saved fprs. */
5861 if (cfun->machine->save_fprs_p)
5862 for (i = 24; i < 32; i++)
5863 if (regs_ever_live[i] && !global_regs[i])
5864 restore_fpr (frame_pointer,
5865 offset - 64 + (i-24) * 8, i);
5869 for (i = 18; i < 20; i++)
5870 if (regs_ever_live[i] && !global_regs[i])
5871 restore_fpr (frame_pointer,
5872 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5875 /* Return register. */
5877 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5879 /* Restore call saved gprs. */
5881 if (cfun->machine->first_restore_gpr != -1)
5886 /* Check for global register and save them
5887 to stack location from where they get restored. */
5889 for (i = cfun->machine->first_restore_gpr;
5890 i <= cfun->machine->last_save_gpr;
5893 /* These registers are special and need to be
5894 restored in any case. */
5895 if (i == STACK_POINTER_REGNUM
5896 || i == RETURN_REGNUM
5897 || i == BASE_REGISTER
5898 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5903 addr = plus_constant (frame_pointer,
5904 offset + i * UNITS_PER_WORD);
5905 addr = gen_rtx_MEM (Pmode, addr);
5906 set_mem_alias_set (addr, s390_sr_alias_set);
5907 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
5911 /* Fetch return address from stack before load multiple,
5912 this will do good for scheduling. */
5914 if (cfun->machine->save_return_addr_p
5915 || (cfun->machine->first_restore_gpr < BASE_REGISTER
5916 && cfun->machine->last_save_gpr > RETURN_REGNUM))
5918 int return_regnum = find_unused_clobbered_reg();
5921 return_reg = gen_rtx_REG (Pmode, return_regnum);
5923 addr = plus_constant (frame_pointer,
5924 offset + RETURN_REGNUM * UNITS_PER_WORD);
5925 addr = gen_rtx_MEM (Pmode, addr);
5926 set_mem_alias_set (addr, s390_sr_alias_set);
5927 emit_move_insn (return_reg, addr);
5930 /* ??? As references to the base register are not made
5931 explicit in insn RTX code, we have to add a barrier here
5932 to prevent incorrect scheduling. */
5934 emit_insn (gen_blockage());
5936 insn = restore_gprs (frame_pointer, offset,
5937 cfun->machine->first_restore_gpr,
5938 cfun->machine->last_save_gpr);
5942 /* Return to caller. */
5944 p = rtvec_alloc (2);
5946 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
5947 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
5948 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
5952 /* Return the size in bytes of a function argument of
5953 type TYPE and/or mode MODE. At least one of TYPE or
5954 MODE must be specified. */
5957 s390_function_arg_size (enum machine_mode mode, tree type)
5960 return int_size_in_bytes (type);
5962 /* No type info available for some library calls ... */
5963 if (mode != BLKmode)
5964 return GET_MODE_SIZE (mode);
5966 /* If we have neither type nor mode, abort */
5970 /* Return true if a function argument of type TYPE and mode MODE
5971 is to be passed in a floating-point register, if available. */
5974 s390_function_arg_float (enum machine_mode mode, tree type)
5976 int size = s390_function_arg_size (mode, type);
5980 /* Soft-float changes the ABI: no floating-point registers are used. */
5981 if (TARGET_SOFT_FLOAT)
5984 /* No type info available for some library calls ... */
5986 return mode == SFmode || mode == DFmode;
5988 /* The ABI says that record types with a single member are treated
5989 just like that member would be. */
5990 while (TREE_CODE (type) == RECORD_TYPE)
5992 tree field, single = NULL_TREE;
5994 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
5996 if (TREE_CODE (field) != FIELD_DECL)
5999 if (single == NULL_TREE)
6000 single = TREE_TYPE (field);
6005 if (single == NULL_TREE)
6011 return TREE_CODE (type) == REAL_TYPE;
6014 /* Return true if a function argument of type TYPE and mode MODE
6015 is to be passed in an integer register, or a pair of integer
6016 registers, if available. */
6019 s390_function_arg_integer (enum machine_mode mode, tree type)
6021 int size = s390_function_arg_size (mode, type);
6025 /* No type info available for some library calls ... */
6027 return GET_MODE_CLASS (mode) == MODE_INT
6028 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6030 /* We accept small integral (and similar) types. */
6031 if (INTEGRAL_TYPE_P (type)
6032 || POINTER_TYPE_P (type)
6033 || TREE_CODE (type) == OFFSET_TYPE
6034 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6037 /* We also accept structs of size 1, 2, 4, 8 that are not
6038 passed in floating-point registers. */
6039 if (AGGREGATE_TYPE_P (type)
6040 && exact_log2 (size) >= 0
6041 && !s390_function_arg_float (mode, type))
6047 /* Return 1 if a function argument of type TYPE and mode MODE
6048 is to be passed by reference. The ABI specifies that only
6049 structures of size 1, 2, 4, or 8 bytes are passed by value,
6050 all other structures (and complex numbers) are passed by
6054 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
6056 int size = s390_function_arg_size (mode, type);
6062 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6065 if (TREE_CODE (type) == COMPLEX_TYPE
6066 || TREE_CODE (type) == VECTOR_TYPE)
6073 /* Update the data in CUM to advance over an argument of mode MODE and
6074 data type TYPE. (TYPE is null for libcalls where that information
6075 may not be available.). The boolean NAMED specifies whether the
6076 argument is a named argument (as opposed to an unnamed argument
6077 matching an ellipsis). */
6080 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6081 tree type, int named ATTRIBUTE_UNUSED)
6083 if (s390_function_arg_pass_by_reference (mode, type))
6087 else if (s390_function_arg_float (mode, type))
6091 else if (s390_function_arg_integer (mode, type))
6093 int size = s390_function_arg_size (mode, type);
6094 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6100 /* Define where to put the arguments to a function.
6101 Value is zero to push the argument on the stack,
6102 or a hard register in which to store the argument.
6104 MODE is the argument's machine mode.
6105 TYPE is the data type of the argument (as a tree).
6106 This is null for libcalls where that information may
6108 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6109 the preceding args and about the function being called.
6110 NAMED is nonzero if this argument is a named parameter
6111 (otherwise it is an extra parameter matching an ellipsis).
6113 On S/390, we use general purpose registers 2 through 6 to
6114 pass integer, pointer, and certain structure arguments, and
6115 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6116 to pass floating point arguments. All remaining arguments
6117 are pushed to the stack. */
6120 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6121 int named ATTRIBUTE_UNUSED)
6123 if (s390_function_arg_pass_by_reference (mode, type))
6126 if (s390_function_arg_float (mode, type))
6128 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6131 return gen_rtx_REG (mode, cum->fprs + 16);
6133 else if (s390_function_arg_integer (mode, type))
6135 int size = s390_function_arg_size (mode, type);
6136 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6138 if (cum->gprs + n_gprs > 5)
6141 return gen_rtx_REG (mode, cum->gprs + 2);
6144 /* After the real arguments, expand_call calls us once again
6145 with a void_type_node type. Whatever we return here is
6146 passed as operand 2 to the call expanders.
6148 We don't need this feature ... */
6149 else if (type == void_type_node)
6155 /* Return true if return values of type TYPE should be returned
6156 in a memory buffer whose address is passed by the caller as
6157 hidden first argument. */
6160 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6162 /* We accept small integral (and similar) types. */
6163 if (INTEGRAL_TYPE_P (type)
6164 || POINTER_TYPE_P (type)
6165 || TREE_CODE (type) == OFFSET_TYPE
6166 || TREE_CODE (type) == REAL_TYPE)
6167 return int_size_in_bytes (type) > 8;
6169 /* Aggregates and similar constructs are always returned
6171 if (AGGREGATE_TYPE_P (type)
6172 || TREE_CODE (type) == COMPLEX_TYPE
6173 || TREE_CODE (type) == VECTOR_TYPE)
6176 /* ??? We get called on all sorts of random stuff from
6177 aggregate_value_p. We can't abort, but it's not clear
6178 what's safe to return. Pretend it's a struct I guess. */
6182 /* Define where to return a (scalar) value of type TYPE.
6183 If TYPE is null, define where to return a (scalar)
6184 value of mode MODE from a libcall. */
6187 s390_function_value (tree type, enum machine_mode mode)
6191 int unsignedp = TREE_UNSIGNED (type);
6192 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6195 if (GET_MODE_CLASS (mode) != MODE_INT
6196 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6198 if (GET_MODE_SIZE (mode) > 8)
6201 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6202 return gen_rtx_REG (mode, 16);
6204 return gen_rtx_REG (mode, 2);
6208 /* Create and return the va_list datatype.
6210 On S/390, va_list is an array type equivalent to
6212 typedef struct __va_list_tag
6216 void *__overflow_arg_area;
6217 void *__reg_save_area;
6220 where __gpr and __fpr hold the number of general purpose
6221 or floating point arguments used up to now, respectively,
6222 __overflow_arg_area points to the stack location of the
6223 next argument passed on the stack, and __reg_save_area
6224 always points to the start of the register area in the
6225 call frame of the current function. The function prologue
6226 saves all registers used for argument passing into this
6227 area if the function uses variable arguments. */
6230 s390_build_builtin_va_list (void)
6232 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6234 record = lang_hooks.types.make_type (RECORD_TYPE);
6237 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6239 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6240 long_integer_type_node);
6241 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6242 long_integer_type_node);
6243 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6245 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6248 DECL_FIELD_CONTEXT (f_gpr) = record;
6249 DECL_FIELD_CONTEXT (f_fpr) = record;
6250 DECL_FIELD_CONTEXT (f_ovf) = record;
6251 DECL_FIELD_CONTEXT (f_sav) = record;
6253 TREE_CHAIN (record) = type_decl;
6254 TYPE_NAME (record) = type_decl;
6255 TYPE_FIELDS (record) = f_gpr;
6256 TREE_CHAIN (f_gpr) = f_fpr;
6257 TREE_CHAIN (f_fpr) = f_ovf;
6258 TREE_CHAIN (f_ovf) = f_sav;
6260 layout_type (record);
6262 /* The correct type is an array type of one element. */
6263 return build_array_type (record, build_index_type (size_zero_node));
6266 /* Implement va_start by filling the va_list structure VALIST.
6267 STDARG_P is always true, and ignored.
6268 NEXTARG points to the first anonymous stack argument.
6270 The following global variables are used to initialize
6271 the va_list structure:
6273 current_function_args_info:
6274 holds number of gprs and fprs used for named arguments.
6275 current_function_arg_offset_rtx:
6276 holds the offset of the first anonymous stack argument
6277 (relative to the virtual arg pointer). */
6280 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6282 HOST_WIDE_INT n_gpr, n_fpr;
6284 tree f_gpr, f_fpr, f_ovf, f_sav;
6285 tree gpr, fpr, ovf, sav, t;
6287 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6288 f_fpr = TREE_CHAIN (f_gpr);
6289 f_ovf = TREE_CHAIN (f_fpr);
6290 f_sav = TREE_CHAIN (f_ovf);
6292 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6293 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6294 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6295 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6296 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6298 /* Count number of gp and fp argument registers used. */
6300 n_gpr = current_function_args_info.gprs;
6301 n_fpr = current_function_args_info.fprs;
6303 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6304 TREE_SIDE_EFFECTS (t) = 1;
6305 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6307 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6308 TREE_SIDE_EFFECTS (t) = 1;
6309 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6311 /* Find the overflow area. */
6312 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6314 off = INTVAL (current_function_arg_offset_rtx);
6315 off = off < 0 ? 0 : off;
6316 if (TARGET_DEBUG_ARG)
6317 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6318 (int)n_gpr, (int)n_fpr, off);
6320 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6322 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6323 TREE_SIDE_EFFECTS (t) = 1;
6324 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6326 /* Find the register save area. */
6327 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6328 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6329 build_int_2 (-STACK_POINTER_OFFSET, -1));
6330 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6331 TREE_SIDE_EFFECTS (t) = 1;
6332 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6335 /* Implement va_arg by updating the va_list structure
6336 VALIST as required to retrieve an argument of type
6337 TYPE, and returning that argument.
6339 Generates code equivalent to:
6341 if (integral value) {
6342 if (size <= 4 && args.gpr < 5 ||
6343 size > 4 && args.gpr < 4 )
6344 ret = args.reg_save_area[args.gpr+8]
6346 ret = *args.overflow_arg_area++;
6347 } else if (float value) {
6349 ret = args.reg_save_area[args.fpr+64]
6351 ret = *args.overflow_arg_area++;
6352 } else if (aggregate value) {
6354 ret = *args.reg_save_area[args.gpr]
6356 ret = **args.overflow_arg_area++;
6360 s390_va_arg (tree valist, tree type)
6362 tree f_gpr, f_fpr, f_ovf, f_sav;
6363 tree gpr, fpr, ovf, sav, reg, t, u;
6364 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6365 rtx lab_false, lab_over, addr_rtx, r;
6367 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6368 f_fpr = TREE_CHAIN (f_gpr);
6369 f_ovf = TREE_CHAIN (f_fpr);
6370 f_sav = TREE_CHAIN (f_ovf);
6372 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6373 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6374 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6375 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6376 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6378 size = int_size_in_bytes (type);
6380 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6382 if (TARGET_DEBUG_ARG)
6384 fprintf (stderr, "va_arg: aggregate type");
6388 /* Aggregates are passed by reference. */
6392 sav_ofs = 2 * UNITS_PER_WORD;
6393 sav_scale = UNITS_PER_WORD;
6394 size = UNITS_PER_WORD;
6397 else if (s390_function_arg_float (TYPE_MODE (type), type))
6399 if (TARGET_DEBUG_ARG)
6401 fprintf (stderr, "va_arg: float type");
6405 /* FP args go in FP registers, if present. */
6409 sav_ofs = 16 * UNITS_PER_WORD;
6411 /* TARGET_64BIT has up to 4 parameter in fprs */
6412 max_reg = TARGET_64BIT ? 3 : 1;
6416 if (TARGET_DEBUG_ARG)
6418 fprintf (stderr, "va_arg: other type");
6422 /* Otherwise into GP registers. */
6425 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6426 sav_ofs = 2 * UNITS_PER_WORD;
6428 if (size < UNITS_PER_WORD)
6429 sav_ofs += UNITS_PER_WORD - size;
6431 sav_scale = UNITS_PER_WORD;
6438 /* Pull the value out of the saved registers ... */
6440 lab_false = gen_label_rtx ();
6441 lab_over = gen_label_rtx ();
6442 addr_rtx = gen_reg_rtx (Pmode);
6444 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL),
6446 GT, const1_rtx, Pmode, 0, lab_false);
6449 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6453 u = build (MULT_EXPR, long_integer_type_node,
6454 reg, build_int_2 (sav_scale, 0));
6455 TREE_SIDE_EFFECTS (u) = 1;
6457 t = build (PLUS_EXPR, ptr_type_node, t, u);
6458 TREE_SIDE_EFFECTS (t) = 1;
6460 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6462 emit_move_insn (addr_rtx, r);
6465 emit_jump_insn (gen_jump (lab_over));
6467 emit_label (lab_false);
6469 /* ... Otherwise out of the overflow area. */
6471 t = save_expr (ovf);
6474 /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */
6475 if (size < UNITS_PER_WORD)
6477 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0));
6478 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6479 TREE_SIDE_EFFECTS (t) = 1;
6480 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6482 t = save_expr (ovf);
6485 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6487 emit_move_insn (addr_rtx, r);
6489 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6490 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6491 TREE_SIDE_EFFECTS (t) = 1;
6492 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6494 emit_label (lab_over);
6496 /* If less than max_regs a registers are retrieved out
6497 of register save area, increment. */
6499 u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6500 build_int_2 (n_reg, 0));
6501 TREE_SIDE_EFFECTS (u) = 1;
6502 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
6506 r = gen_rtx_MEM (Pmode, addr_rtx);
6507 set_mem_alias_set (r, get_varargs_alias_set ());
6508 emit_move_insn (addr_rtx, r);
6520 S390_BUILTIN_THREAD_POINTER,
6521 S390_BUILTIN_SET_THREAD_POINTER,
6526 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6531 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6537 s390_init_builtins (void)
6541 ftype = build_function_type (ptr_type_node, void_list_node);
6542 builtin_function ("__builtin_thread_pointer", ftype,
6543 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6546 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6547 builtin_function ("__builtin_set_thread_pointer", ftype,
6548 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6552 /* Expand an expression EXP that calls a built-in function,
6553 with result going to TARGET if that's convenient
6554 (and in mode MODE if that's convenient).
6555 SUBTARGET may be used as the target for computing one of EXP's operands.
6556 IGNORE is nonzero if the value is to be ignored. */
6559 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6560 enum machine_mode mode ATTRIBUTE_UNUSED,
6561 int ignore ATTRIBUTE_UNUSED)
6565 unsigned int const *code_for_builtin =
6566 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6568 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6569 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6570 tree arglist = TREE_OPERAND (exp, 1);
6571 enum insn_code icode;
6572 rtx op[MAX_ARGS], pat;
6576 if (fcode >= S390_BUILTIN_max)
6577 internal_error ("bad builtin fcode");
6578 icode = code_for_builtin[fcode];
6580 internal_error ("bad builtin fcode");
6582 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6584 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6586 arglist = TREE_CHAIN (arglist), arity++)
6588 const struct insn_operand_data *insn_op;
6590 tree arg = TREE_VALUE (arglist);
6591 if (arg == error_mark_node)
6593 if (arity > MAX_ARGS)
6596 insn_op = &insn_data[icode].operand[arity + nonvoid];
6598 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6600 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6601 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6606 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6608 || GET_MODE (target) != tmode
6609 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6610 target = gen_reg_rtx (tmode);
6616 pat = GEN_FCN (icode) (target);
6620 pat = GEN_FCN (icode) (target, op[0]);
6622 pat = GEN_FCN (icode) (op[0]);
6625 pat = GEN_FCN (icode) (target, op[0], op[1]);
6641 /* Output assembly code for the trampoline template to
6644 On S/390, we use gpr 1 internally in the trampoline code;
6645 gpr 0 is used to hold the static chain. */
6648 s390_trampoline_template (FILE *file)
6652 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6653 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6654 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6655 fprintf (file, "br\t%s\n", reg_names[1]);
6656 fprintf (file, "0:\t.quad\t0\n");
6657 fprintf (file, ".quad\t0\n");
6661 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6662 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6663 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6664 fprintf (file, "br\t%s\n", reg_names[1]);
6665 fprintf (file, ".long\t0\n");
6666 fprintf (file, ".long\t0\n");
6670 /* Emit RTL insns to initialize the variable parts of a trampoline.
6671 FNADDR is an RTX for the address of the function's pure code.
6672 CXT is an RTX for the static chain value for the function. */
6675 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6677 emit_move_insn (gen_rtx_MEM (Pmode,
6678 memory_address (Pmode,
6679 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6680 emit_move_insn (gen_rtx_MEM (Pmode,
6681 memory_address (Pmode,
6682 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6685 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6686 LOW and HIGH, independent of the host word size. */
6689 s390_gen_rtx_const_DI (int high, int low)
6691 #if HOST_BITS_PER_WIDE_INT >= 64
6693 val = (HOST_WIDE_INT)high;
6695 val |= (HOST_WIDE_INT)low;
6697 return GEN_INT (val);
6699 #if HOST_BITS_PER_WIDE_INT >= 32
6700 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6707 /* Output assembler code to FILE to increment profiler label # LABELNO
6708 for profiling a function entry. */
6711 s390_function_profiler (FILE *file, int labelno)
6716 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6718 fprintf (file, "# function profiler \n");
6720 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6721 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6722 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6724 op[2] = gen_rtx_REG (Pmode, 1);
6725 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6726 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6728 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6731 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6732 op[4] = gen_rtx_CONST (Pmode, op[4]);
6737 output_asm_insn ("stg\t%0,%1", op);
6738 output_asm_insn ("larl\t%2,%3", op);
6739 output_asm_insn ("brasl\t%0,%4", op);
6740 output_asm_insn ("lg\t%0,%1", op);
6744 op[6] = gen_label_rtx ();
6746 output_asm_insn ("st\t%0,%1", op);
6747 output_asm_insn ("bras\t%2,%l6", op);
6748 output_asm_insn (".long\t%4", op);
6749 output_asm_insn (".long\t%3", op);
6750 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6751 output_asm_insn ("l\t%0,0(%2)", op);
6752 output_asm_insn ("l\t%2,4(%2)", op);
6753 output_asm_insn ("basr\t%0,%0", op);
6754 output_asm_insn ("l\t%0,%1", op);
6758 op[5] = gen_label_rtx ();
6759 op[6] = gen_label_rtx ();
6761 output_asm_insn ("st\t%0,%1", op);
6762 output_asm_insn ("bras\t%2,%l6", op);
6763 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6764 output_asm_insn (".long\t%4-%l5", op);
6765 output_asm_insn (".long\t%3-%l5", op);
6766 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6767 output_asm_insn ("lr\t%0,%2", op);
6768 output_asm_insn ("a\t%0,0(%2)", op);
6769 output_asm_insn ("a\t%2,4(%2)", op);
6770 output_asm_insn ("basr\t%0,%0", op);
6771 output_asm_insn ("l\t%0,%1", op);
6775 /* Select section for constant in constant pool. In 32-bit mode,
6776 constants go in the function section; in 64-bit mode in .rodata. */
6779 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6780 rtx x ATTRIBUTE_UNUSED,
6781 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6783 if (TARGET_CPU_ZARCH)
6784 readonly_data_section ();
6786 function_section (current_function_decl);
6789 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6790 into its SYMBOL_REF_FLAGS. */
6793 s390_encode_section_info (tree decl, rtx rtl, int first)
6795 default_encode_section_info (decl, rtl, first);
6797 /* If a variable has a forced alignment to < 2 bytes, mark it with
6798 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6799 if (TREE_CODE (decl) == VAR_DECL
6800 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6801 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6804 /* Output thunk to FILE that implements a C++ virtual function call (with
6805 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6806 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6807 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6808 relative to the resulting this pointer. */
6811 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6812 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6818 /* Operand 0 is the target function. */
6819 op[0] = XEXP (DECL_RTL (function), 0);
6820 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6823 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6824 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6825 op[0] = gen_rtx_CONST (Pmode, op[0]);
6828 /* Operand 1 is the 'this' pointer. */
6829 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6830 op[1] = gen_rtx_REG (Pmode, 3);
6832 op[1] = gen_rtx_REG (Pmode, 2);
6834 /* Operand 2 is the delta. */
6835 op[2] = GEN_INT (delta);
6837 /* Operand 3 is the vcall_offset. */
6838 op[3] = GEN_INT (vcall_offset);
6840 /* Operand 4 is the temporary register. */
6841 op[4] = gen_rtx_REG (Pmode, 1);
6843 /* Operands 5 to 8 can be used as labels. */
6849 /* Operand 9 can be used for temporary register. */
6852 /* Generate code. */
6855 /* Setup literal pool pointer if required. */
6856 if ((!DISP_IN_RANGE (delta)
6857 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6858 || (!DISP_IN_RANGE (vcall_offset)
6859 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6861 op[5] = gen_label_rtx ();
6862 output_asm_insn ("larl\t%4,%5", op);
6865 /* Add DELTA to this pointer. */
6868 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6869 output_asm_insn ("la\t%1,%2(%1)", op);
6870 else if (DISP_IN_RANGE (delta))
6871 output_asm_insn ("lay\t%1,%2(%1)", op);
6872 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6873 output_asm_insn ("aghi\t%1,%2", op);
6876 op[6] = gen_label_rtx ();
6877 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
6881 /* Perform vcall adjustment. */
6884 if (DISP_IN_RANGE (vcall_offset))
6886 output_asm_insn ("lg\t%4,0(%1)", op);
6887 output_asm_insn ("ag\t%1,%3(%4)", op);
6889 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6891 output_asm_insn ("lghi\t%4,%3", op);
6892 output_asm_insn ("ag\t%4,0(%1)", op);
6893 output_asm_insn ("ag\t%1,0(%4)", op);
6897 op[7] = gen_label_rtx ();
6898 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
6899 output_asm_insn ("ag\t%4,0(%1)", op);
6900 output_asm_insn ("ag\t%1,0(%4)", op);
6904 /* Jump to target. */
6905 output_asm_insn ("jg\t%0", op);
6907 /* Output literal pool if required. */
6910 output_asm_insn (".align\t4", op);
6911 targetm.asm_out.internal_label (file, "L",
6912 CODE_LABEL_NUMBER (op[5]));
6916 targetm.asm_out.internal_label (file, "L",
6917 CODE_LABEL_NUMBER (op[6]));
6918 output_asm_insn (".long\t%2", op);
6922 targetm.asm_out.internal_label (file, "L",
6923 CODE_LABEL_NUMBER (op[7]));
6924 output_asm_insn (".long\t%3", op);
6929 /* Setup base pointer if required. */
6931 || (!DISP_IN_RANGE (delta)
6932 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6933 || (!DISP_IN_RANGE (delta)
6934 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6936 op[5] = gen_label_rtx ();
6937 output_asm_insn ("basr\t%4,0", op);
6938 targetm.asm_out.internal_label (file, "L",
6939 CODE_LABEL_NUMBER (op[5]));
6942 /* Add DELTA to this pointer. */
6945 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6946 output_asm_insn ("la\t%1,%2(%1)", op);
6947 else if (DISP_IN_RANGE (delta))
6948 output_asm_insn ("lay\t%1,%2(%1)", op);
6949 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6950 output_asm_insn ("ahi\t%1,%2", op);
6953 op[6] = gen_label_rtx ();
6954 output_asm_insn ("a\t%1,%6-%5(%4)", op);
6958 /* Perform vcall adjustment. */
6961 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
6963 output_asm_insn ("lg\t%4,0(%1)", op);
6964 output_asm_insn ("a\t%1,%3(%4)", op);
6966 else if (DISP_IN_RANGE (vcall_offset))
6968 output_asm_insn ("lg\t%4,0(%1)", op);
6969 output_asm_insn ("ay\t%1,%3(%4)", op);
6971 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6973 output_asm_insn ("lhi\t%4,%3", op);
6974 output_asm_insn ("a\t%4,0(%1)", op);
6975 output_asm_insn ("a\t%1,0(%4)", op);
6979 op[7] = gen_label_rtx ();
6980 output_asm_insn ("l\t%4,%7-%5(%4)", op);
6981 output_asm_insn ("a\t%4,0(%1)", op);
6982 output_asm_insn ("a\t%1,0(%4)", op);
6985 /* We had to clobber the base pointer register.
6986 Re-setup the base pointer (with a different base). */
6987 op[5] = gen_label_rtx ();
6988 output_asm_insn ("basr\t%4,0", op);
6989 targetm.asm_out.internal_label (file, "L",
6990 CODE_LABEL_NUMBER (op[5]));
6993 /* Jump to target. */
6994 op[8] = gen_label_rtx ();
6997 output_asm_insn ("l\t%4,%8-%5(%4)", op);
6999 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7000 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7001 else if (flag_pic == 1)
7003 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7004 output_asm_insn ("l\t%4,%0(%4)", op);
7006 else if (flag_pic == 2)
7008 op[9] = gen_rtx_REG (Pmode, 0);
7009 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7010 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7011 output_asm_insn ("ar\t%4,%9", op);
7012 output_asm_insn ("l\t%4,0(%4)", op);
7015 output_asm_insn ("br\t%4", op);
7017 /* Output literal pool. */
7018 output_asm_insn (".align\t4", op);
7020 if (nonlocal && flag_pic == 2)
7021 output_asm_insn (".long\t%0", op);
7024 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7025 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7028 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7030 output_asm_insn (".long\t%0", op);
7032 output_asm_insn (".long\t%0-%5", op);
7036 targetm.asm_out.internal_label (file, "L",
7037 CODE_LABEL_NUMBER (op[6]));
7038 output_asm_insn (".long\t%2", op);
7042 targetm.asm_out.internal_label (file, "L",
7043 CODE_LABEL_NUMBER (op[7]));
7044 output_asm_insn (".long\t%3", op);
7050 s390_valid_pointer_mode (enum machine_mode mode)
7052 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7055 /* How to allocate a 'struct machine_function'. */
7057 static struct machine_function *
7058 s390_init_machine_status (void)
7060 return ggc_alloc_cleared (sizeof (struct machine_function));
7063 #include "gt-s390.h"