1 ;; e500 SPE description
2 ;; Copyright (C) 2002, 2003 Free Software Foundation, Inc.
3 ;; Contributed by Aldy Hernandez (aldy@quesejoda.com)
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 2, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING. If not, write to the
19 ;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
20 ;; MA 02111-1307, USA.
26 (define_insn "*negsf2_gpr"
27 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
28 (neg:SF (match_operand:SF 1 "gpc_reg_operand" "r")))]
29 "TARGET_HARD_FLOAT && !TARGET_FPRS"
31 [(set_attr "type" "fpsimple")])
33 (define_insn "*abssf2_gpr"
34 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
35 (abs:SF (match_operand:SF 1 "gpc_reg_operand" "r")))]
36 "TARGET_HARD_FLOAT && !TARGET_FPRS"
38 [(set_attr "type" "fpsimple")])
40 (define_insn "*nabssf2_gpr"
41 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
42 (neg:SF (abs:SF (match_operand:SF 1 "gpc_reg_operand" "r"))))]
43 "TARGET_HARD_FLOAT && !TARGET_FPRS"
45 [(set_attr "type" "fpsimple")])
47 (define_insn "*addsf3_gpr"
48 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
49 (plus:SF (match_operand:SF 1 "gpc_reg_operand" "%r")
50 (match_operand:SF 2 "gpc_reg_operand" "r")))]
51 "TARGET_HARD_FLOAT && !TARGET_FPRS"
53 [(set_attr "type" "fp")])
55 (define_insn "*subsf3_gpr"
56 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
57 (minus:SF (match_operand:SF 1 "gpc_reg_operand" "r")
58 (match_operand:SF 2 "gpc_reg_operand" "r")))]
59 "TARGET_HARD_FLOAT && !TARGET_FPRS"
61 [(set_attr "type" "fp")])
63 (define_insn "*mulsf3_gpr"
64 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
65 (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%r")
66 (match_operand:SF 2 "gpc_reg_operand" "r")))]
67 "TARGET_HARD_FLOAT && !TARGET_FPRS"
69 [(set_attr "type" "fp")])
71 (define_insn "*divsf3_gpr"
72 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
73 (div:SF (match_operand:SF 1 "gpc_reg_operand" "r")
74 (match_operand:SF 2 "gpc_reg_operand" "r")))]
75 "TARGET_HARD_FLOAT && !TARGET_FPRS"
77 [(set_attr "type" "vecfdiv")])
79 (define_insn "spe_efsctuiz"
80 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
81 (unspec:SI [(match_operand:SF 1 "gpc_reg_operand" "r")] 700))]
82 "TARGET_HARD_FLOAT && !TARGET_FPRS"
84 [(set_attr "type" "fp")])
86 (define_insn "spe_fixunssfsi2"
87 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
88 (unsigned_fix:SI (fix:SF (match_operand:SF 1 "gpc_reg_operand" "r"))))]
89 "TARGET_HARD_FLOAT && !TARGET_FPRS"
91 [(set_attr "type" "fp")])
93 (define_insn "spe_fix_truncsfsi2"
94 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
95 (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
96 "TARGET_HARD_FLOAT && !TARGET_FPRS"
98 [(set_attr "type" "fp")])
100 (define_insn "spe_floatunssisf2"
101 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
102 (unsigned_float:SF (match_operand:SI 1 "gpc_reg_operand" "r")))]
103 "TARGET_HARD_FLOAT && !TARGET_FPRS"
105 [(set_attr "type" "fp")])
107 (define_insn "spe_floatsisf2"
108 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
109 (float:SF (match_operand:SI 1 "gpc_reg_operand" "r")))]
110 "TARGET_HARD_FLOAT && !TARGET_FPRS"
112 [(set_attr "type" "fp")])
115 ;; SPE SIMD instructions
117 (define_insn "spe_evabs"
118 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
119 (abs:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
122 [(set_attr "type" "vecsimple")
123 (set_attr "length" "4")])
125 (define_insn "spe_evandc"
126 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
127 (and:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
128 (not:V2SI (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
131 [(set_attr "type" "vecsimple")
132 (set_attr "length" "4")])
134 (define_insn "spe_evand"
135 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
136 (and:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
137 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
140 [(set_attr "type" "vecsimple")
141 (set_attr "length" "4")])
143 ;; Vector compare instructions
145 (define_insn "spe_evcmpeq"
146 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
147 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
148 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 500))]
151 [(set_attr "type" "veccmp")
152 (set_attr "length" "4")])
154 (define_insn "spe_evcmpgts"
155 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
156 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
157 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 501))]
160 [(set_attr "type" "veccmp")
161 (set_attr "length" "4")])
163 (define_insn "spe_evcmpgtu"
164 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
165 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
166 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 502))]
169 [(set_attr "type" "veccmp")
170 (set_attr "length" "4")])
172 (define_insn "spe_evcmplts"
173 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
174 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
175 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 503))]
178 [(set_attr "type" "veccmp")
179 (set_attr "length" "4")])
181 (define_insn "spe_evcmpltu"
182 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
183 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
184 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 504))]
187 [(set_attr "type" "veccmp")
188 (set_attr "length" "4")])
190 ;; Floating point vector compare instructions
192 (define_insn "spe_evfscmpeq"
193 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
194 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
195 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 538))
196 (clobber (reg:SI SPEFSCR_REGNO))]
199 [(set_attr "type" "veccmp")
200 (set_attr "length" "4")])
202 (define_insn "spe_evfscmpgt"
203 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
204 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
205 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 539))
206 (clobber (reg:SI SPEFSCR_REGNO))]
209 [(set_attr "type" "veccmp")
210 (set_attr "length" "4")])
212 (define_insn "spe_evfscmplt"
213 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
214 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
215 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 540))
216 (clobber (reg:SI SPEFSCR_REGNO))]
219 [(set_attr "type" "veccmp")
220 (set_attr "length" "4")])
222 (define_insn "spe_evfststeq"
223 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
224 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
225 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 541))]
228 [(set_attr "type" "veccmp")
229 (set_attr "length" "4")])
231 (define_insn "spe_evfststgt"
232 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
233 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
234 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 542))]
237 [(set_attr "type" "veccmp")
238 (set_attr "length" "4")])
240 (define_insn "spe_evfststlt"
241 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
242 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
243 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 543))]
246 [(set_attr "type" "veccmp")
247 (set_attr "length" "4")])
249 ;; End of vector compare instructions
251 (define_insn "spe_evcntlsw"
252 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
253 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 505))]
256 [(set_attr "type" "vecsimple")
257 (set_attr "length" "4")])
259 (define_insn "spe_evcntlzw"
260 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
261 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 506))]
264 [(set_attr "type" "vecsimple")
265 (set_attr "length" "4")])
267 (define_insn "spe_eveqv"
268 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
269 (not:V2SI (xor:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
270 (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
273 [(set_attr "type" "vecsimple")
274 (set_attr "length" "4")])
276 (define_insn "spe_evextsb"
277 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
278 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 507))]
281 [(set_attr "type" "vecsimple")
282 (set_attr "length" "4")])
284 (define_insn "spe_evextsh"
285 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
286 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 508))]
289 [(set_attr "type" "vecsimple")
290 (set_attr "length" "4")])
292 (define_insn "spe_evlhhesplat"
293 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
294 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
295 (match_operand:QI 2 "immediate_operand" "i"))))
296 (unspec [(const_int 0)] 509)]
297 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
298 "evlhhesplat %0,%2*2(%1)"
299 [(set_attr "type" "vecload")
300 (set_attr "length" "4")])
302 (define_insn "spe_evlhhesplatx"
303 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
304 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
305 (match_operand:SI 2 "gpc_reg_operand" "r"))))
306 (unspec [(const_int 0)] 510)]
308 "evlhhesplatx %0,%1,%2"
309 [(set_attr "type" "vecload")
310 (set_attr "length" "4")])
312 (define_insn "spe_evlhhossplat"
313 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
314 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
315 (match_operand:QI 2 "immediate_operand" "i"))))
316 (unspec [(const_int 0)] 511)]
317 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
318 "evlhhossplat %0,%2*2(%1)"
319 [(set_attr "type" "vecload")
320 (set_attr "length" "4")])
322 (define_insn "spe_evlhhossplatx"
323 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
324 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
325 (match_operand:SI 2 "gpc_reg_operand" "r"))))
326 (unspec [(const_int 0)] 512)]
328 "evlhhossplatx %0,%1,%2"
329 [(set_attr "type" "vecload")
330 (set_attr "length" "4")])
332 (define_insn "spe_evlhhousplat"
333 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
334 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
335 (match_operand:QI 2 "immediate_operand" "i"))))
336 (unspec [(const_int 0)] 513)]
337 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
338 "evlhhousplat %0,%2*2(%1)"
339 [(set_attr "type" "vecload")
340 (set_attr "length" "4")])
342 (define_insn "spe_evlhhousplatx"
343 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
344 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
345 (match_operand:SI 2 "gpc_reg_operand" "r"))))
346 (unspec [(const_int 0)] 514)]
348 "evlhhousplatx %0,%1,%2"
349 [(set_attr "type" "vecload")
350 (set_attr "length" "4")])
352 (define_insn "spe_evlwhsplat"
353 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
354 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
355 (match_operand:QI 2 "immediate_operand" "i"))))
356 (unspec [(const_int 0)] 515)]
357 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
358 "evlwhsplat %0,%2*4(%1)"
359 [(set_attr "type" "vecload")
360 (set_attr "length" "4")])
362 (define_insn "spe_evlwhsplatx"
363 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
364 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
365 (match_operand:SI 2 "gpc_reg_operand" "r"))))
366 (unspec [(const_int 0)] 516)]
368 "evlwhsplatx %0,%1,%2"
369 [(set_attr "type" "vecload")
370 (set_attr "length" "4")])
372 (define_insn "spe_evlwwsplat"
373 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
374 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
375 (match_operand:QI 2 "immediate_operand" "i"))))
376 (unspec [(const_int 0)] 517)]
377 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
378 "evlwwsplat %0,%2*4(%1)"
379 [(set_attr "type" "vecload")
380 (set_attr "length" "4")])
382 (define_insn "spe_evlwwsplatx"
383 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
384 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
385 (match_operand:SI 2 "gpc_reg_operand" "r"))))
386 (unspec [(const_int 0)] 518)]
388 "evlwwsplatx %0,%1,%2"
389 [(set_attr "type" "vecload")
390 (set_attr "length" "4")])
392 (define_insn "spe_evmergehi"
393 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
394 (vec_merge:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
396 (match_operand:V2SI 2 "gpc_reg_operand" "r")
397 (parallel [(const_int 1)
402 [(set_attr "type" "vecsimple")
403 (set_attr "length" "4")])
405 (define_insn "spe_evmergehilo"
406 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
407 (vec_merge:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
408 (match_operand:V2SI 2 "gpc_reg_operand" "r")
411 "evmergehilo %0,%1,%2"
412 [(set_attr "type" "vecsimple")
413 (set_attr "length" "4")])
415 (define_insn "spe_evmergelo"
416 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
417 (vec_merge:V2SI (vec_select:V2SI
418 (match_operand:V2SI 1 "gpc_reg_operand" "r")
419 (parallel [(const_int 1)
421 (match_operand:V2SI 2 "gpc_reg_operand" "r")
425 [(set_attr "type" "vecsimple")
426 (set_attr "length" "4")])
428 (define_insn "spe_evmergelohi"
429 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
430 (vec_merge:V2SI (vec_select:V2SI
431 (match_operand:V2SI 1 "gpc_reg_operand" "r")
432 (parallel [(const_int 1)
435 (match_operand:V2SI 2 "gpc_reg_operand" "r")
436 (parallel [(const_int 1)
440 "evmergelohi %0,%1,%2"
441 [(set_attr "type" "vecsimple")
442 (set_attr "length" "4")])
444 (define_insn "spe_evnand"
445 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
446 (not:V2SI (and:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
447 (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
450 [(set_attr "type" "vecsimple")
451 (set_attr "length" "4")])
453 (define_insn "spe_evneg"
454 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
455 (neg:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
458 [(set_attr "type" "vecsimple")
459 (set_attr "length" "4")])
461 (define_insn "spe_evnor"
462 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
463 (not:V2SI (ior:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
464 (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
467 [(set_attr "type" "vecsimple")
468 (set_attr "length" "4")])
470 (define_insn "spe_evorc"
471 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
472 (ior:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
473 (not:V2SI (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
476 [(set_attr "type" "vecsimple")
477 (set_attr "length" "4")])
479 (define_insn "spe_evor"
480 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
481 (ior:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
482 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
485 [(set_attr "type" "vecsimple")
486 (set_attr "length" "4")])
488 (define_insn "spe_evrlwi"
489 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
490 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
491 (match_operand:QI 2 "immediate_operand" "i")] 519))]
494 [(set_attr "type" "vecsimple")
495 (set_attr "length" "4")])
497 (define_insn "spe_evrlw"
498 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
499 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
500 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 520))]
503 [(set_attr "type" "veccomplex")
504 (set_attr "length" "4")])
506 (define_insn "spe_evrndw"
507 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
508 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 521))]
511 [(set_attr "type" "vecsimple")
512 (set_attr "length" "4")])
514 (define_insn "spe_evsel"
515 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
516 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
517 (match_operand:V2SI 2 "gpc_reg_operand" "r")
518 (match_operand:CC 3 "cc_reg_operand" "y")] 522))]
521 [(set_attr "type" "veccmp")
522 (set_attr "length" "4")])
524 (define_insn "spe_evsel_fs"
525 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
526 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")
527 (match_operand:V2SF 2 "gpc_reg_operand" "r")
528 (match_operand:CC 3 "cc_reg_operand" "y")] 725))]
531 [(set_attr "type" "veccmp")
532 (set_attr "length" "4")])
534 (define_insn "spe_evslwi"
535 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
536 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
537 (match_operand:QI 2 "immediate_operand" "i")]
541 [(set_attr "type" "vecsimple")
542 (set_attr "length" "4")])
544 (define_insn "spe_evslw"
545 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
546 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
547 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 524))]
550 [(set_attr "type" "vecsimple")
551 (set_attr "length" "4")])
553 (define_insn "spe_evsrwis"
554 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
555 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
556 (match_operand:QI 2 "immediate_operand" "i")]
560 [(set_attr "type" "vecsimple")
561 (set_attr "length" "4")])
563 (define_insn "spe_evsrwiu"
564 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
565 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
566 (match_operand:QI 2 "immediate_operand" "i")]
570 [(set_attr "type" "vecsimple")
571 (set_attr "length" "4")])
573 (define_insn "spe_evsrws"
574 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
575 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
576 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 527))]
579 [(set_attr "type" "vecsimple")
580 (set_attr "length" "4")])
582 (define_insn "spe_evsrwu"
583 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
584 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
585 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 528))]
588 [(set_attr "type" "vecsimple")
589 (set_attr "length" "4")])
593 (define_insn "xorv2si3"
594 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
595 (xor:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
596 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
599 [(set_attr "type" "vecsimple")
600 (set_attr "length" "4")])
602 (define_insn "xorv4hi3"
603 [(set (match_operand:V4HI 0 "gpc_reg_operand" "=r")
604 (xor:V4HI (match_operand:V4HI 1 "gpc_reg_operand" "r")
605 (match_operand:V4HI 2 "gpc_reg_operand" "r")))]
608 [(set_attr "type" "vecsimple")
609 (set_attr "length" "4")])
611 (define_insn "xorv1di3"
612 [(set (match_operand:V1DI 0 "gpc_reg_operand" "=r")
613 (xor:V1DI (match_operand:V1DI 1 "gpc_reg_operand" "r")
614 (match_operand:V1DI 2 "gpc_reg_operand" "r")))]
617 [(set_attr "type" "vecsimple")
618 (set_attr "length" "4")])
620 ;; end of vector xors
622 (define_insn "spe_evfsabs"
623 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
624 (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")))]
627 [(set_attr "type" "vecsimple")
628 (set_attr "length" "4")])
630 (define_insn "spe_evfsadd"
631 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
632 (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
633 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
634 (clobber (reg:SI SPEFSCR_REGNO))]
637 [(set_attr "type" "vecfloat")
638 (set_attr "length" "4")])
640 (define_insn "spe_evfscfsf"
641 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
642 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 529))]
645 [(set_attr "type" "vecfloat")
646 (set_attr "length" "4")])
648 (define_insn "spe_evfscfsi"
649 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
650 (float:V2SF (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
653 [(set_attr "type" "vecfloat")
654 (set_attr "length" "4")])
656 (define_insn "spe_evfscfuf"
657 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
658 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 530))]
661 [(set_attr "type" "vecfloat")
662 (set_attr "length" "4")])
664 (define_insn "spe_evfscfui"
665 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
666 (unspec:V2SF [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 701))]
669 [(set_attr "type" "vecfloat")
670 (set_attr "length" "4")])
672 (define_insn "spe_evfsctsf"
673 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
674 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 531))]
677 [(set_attr "type" "vecfloat")
678 (set_attr "length" "4")])
680 (define_insn "spe_evfsctsi"
681 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
682 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 532))]
685 [(set_attr "type" "vecfloat")
686 (set_attr "length" "4")])
688 (define_insn "spe_evfsctsiz"
689 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
690 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 533))]
693 [(set_attr "type" "vecfloat")
694 (set_attr "length" "4")])
696 (define_insn "spe_evfsctuf"
697 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
698 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 534))]
701 [(set_attr "type" "vecfloat")
702 (set_attr "length" "4")])
704 (define_insn "spe_evfsctui"
705 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
706 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 535))]
709 [(set_attr "type" "vecfloat")
710 (set_attr "length" "4")])
712 (define_insn "spe_evfsctuiz"
713 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
714 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 536))]
717 [(set_attr "type" "vecfloat")
718 (set_attr "length" "4")])
720 (define_insn "spe_evfsdiv"
721 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
722 (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
723 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
724 (clobber (reg:SI SPEFSCR_REGNO))]
727 [(set_attr "type" "vecfdiv")
728 (set_attr "length" "4")])
730 (define_insn "spe_evfsmul"
731 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
732 (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
733 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
734 (clobber (reg:SI SPEFSCR_REGNO))]
737 [(set_attr "type" "vecfloat")
738 (set_attr "length" "4")])
740 (define_insn "spe_evfsnabs"
741 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
742 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 537))]
745 [(set_attr "type" "vecsimple")
746 (set_attr "length" "4")])
748 (define_insn "spe_evfsneg"
749 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
750 (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")))]
753 [(set_attr "type" "vecsimple")
754 (set_attr "length" "4")])
756 (define_insn "spe_evfssub"
757 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
758 (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
759 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
760 (clobber (reg:SI SPEFSCR_REGNO))]
763 [(set_attr "type" "vecfloat")
764 (set_attr "length" "4")])
766 ;; SPE SIMD load instructions.
768 ;; Only the hardware engineer who designed the SPE understands the
769 ;; plethora of load and store instructions ;-). We have no way of
770 ;; differentiating between them with RTL so use an unspec of const_int 0
771 ;; to avoid identical RTL.
773 (define_insn "spe_evldd"
774 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
775 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
776 (match_operand:QI 2 "immediate_operand" "i"))))
777 (unspec [(const_int 0)] 544)]
778 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
780 [(set_attr "type" "vecload")
781 (set_attr "length" "4")])
783 (define_insn "spe_evlddx"
784 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
785 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
786 (match_operand:SI 2 "gpc_reg_operand" "r"))))
787 (unspec [(const_int 0)] 545)]
790 [(set_attr "type" "vecload")
791 (set_attr "length" "4")])
793 (define_insn "spe_evldh"
794 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
795 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
796 (match_operand:QI 2 "immediate_operand" "i"))))
797 (unspec [(const_int 0)] 546)]
798 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
800 [(set_attr "type" "vecload")
801 (set_attr "length" "4")])
803 (define_insn "spe_evldhx"
804 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
805 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
806 (match_operand:SI 2 "gpc_reg_operand" "r"))))
807 (unspec [(const_int 0)] 547)]
810 [(set_attr "type" "vecload")
811 (set_attr "length" "4")])
813 (define_insn "spe_evldw"
814 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
815 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
816 (match_operand:QI 2 "immediate_operand" "i"))))
817 (unspec [(const_int 0)] 548)]
818 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
820 [(set_attr "type" "vecload")
821 (set_attr "length" "4")])
823 (define_insn "spe_evldwx"
824 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
825 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
826 (match_operand:SI 2 "gpc_reg_operand" "r"))))
827 (unspec [(const_int 0)] 549)]
830 [(set_attr "type" "vecload")
831 (set_attr "length" "4")])
833 (define_insn "spe_evlwhe"
834 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
835 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
836 (match_operand:QI 2 "immediate_operand" "i"))))
837 (unspec [(const_int 0)] 550)]
838 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
840 [(set_attr "type" "vecload")
841 (set_attr "length" "4")])
843 (define_insn "spe_evlwhex"
844 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
845 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
846 (match_operand:SI 2 "gpc_reg_operand" "r"))))
847 (unspec [(const_int 0)] 551)]
850 [(set_attr "type" "vecload")
851 (set_attr "length" "4")])
853 (define_insn "spe_evlwhos"
854 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
855 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
856 (match_operand:QI 2 "immediate_operand" "i"))))
857 (unspec [(const_int 0)] 552)]
858 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
859 "evlwhos %0,%2*4(%1)"
860 [(set_attr "type" "vecload")
861 (set_attr "length" "4")])
863 (define_insn "spe_evlwhosx"
864 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
865 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
866 (match_operand:SI 2 "gpc_reg_operand" "r"))))
867 (unspec [(const_int 0)] 553)]
870 [(set_attr "type" "vecload")
871 (set_attr "length" "4")])
873 (define_insn "spe_evlwhou"
874 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
875 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
876 (match_operand:QI 2 "immediate_operand" "i"))))
877 (unspec [(const_int 0)] 554)]
878 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
879 "evlwhou %0,%2*4(%1)"
880 [(set_attr "type" "vecload")
881 (set_attr "length" "4")])
883 (define_insn "spe_evlwhoux"
884 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
885 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
886 (match_operand:SI 2 "gpc_reg_operand" "r"))))
887 (unspec [(const_int 0)] 555)]
890 [(set_attr "type" "vecload")
891 (set_attr "length" "4")])
893 (define_insn "spe_brinc"
894 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
895 (unspec:SI [(match_operand:SI 1 "gpc_reg_operand" "r")
896 (match_operand:SI 2 "gpc_reg_operand" "r")] 556))]
899 [(set_attr "type" "brinc")
900 (set_attr "length" "4")])
902 (define_insn "spe_evmhegsmfaa"
903 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
904 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
905 (match_operand:V2SI 2 "gpc_reg_operand" "r")
906 (reg:V2SI SPE_ACC_REGNO)] 557))
907 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
909 "evmhegsmfaa %0,%1,%2"
910 [(set_attr "type" "veccomplex")
911 (set_attr "length" "4")])
913 (define_insn "spe_evmhegsmfan"
914 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
915 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
916 (match_operand:V2SI 2 "gpc_reg_operand" "r")
917 (reg:V2SI SPE_ACC_REGNO)] 558))
918 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
920 "evmhegsmfan %0,%1,%2"
921 [(set_attr "type" "veccomplex")
922 (set_attr "length" "4")])
924 (define_insn "spe_evmhegsmiaa"
925 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
926 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
927 (match_operand:V2SI 2 "gpc_reg_operand" "r")
928 (reg:V2SI SPE_ACC_REGNO)] 559))
929 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
931 "evmhegsmiaa %0,%1,%2"
932 [(set_attr "type" "veccomplex")
933 (set_attr "length" "4")])
935 (define_insn "spe_evmhegsmian"
936 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
937 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
938 (match_operand:V2SI 2 "gpc_reg_operand" "r")
939 (reg:V2SI SPE_ACC_REGNO)] 560))
940 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
942 "evmhegsmian %0,%1,%2"
943 [(set_attr "type" "veccomplex")
944 (set_attr "length" "4")])
946 (define_insn "spe_evmhegumiaa"
947 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
948 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
949 (match_operand:V2SI 2 "gpc_reg_operand" "r")
950 (reg:V2SI SPE_ACC_REGNO)] 561))
951 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
953 "evmhegumiaa %0,%1,%2"
954 [(set_attr "type" "veccomplex")
955 (set_attr "length" "4")])
957 (define_insn "spe_evmhegumian"
958 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
959 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
960 (match_operand:V2SI 2 "gpc_reg_operand" "r")
961 (reg:V2SI SPE_ACC_REGNO)] 562))
962 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
964 "evmhegumian %0,%1,%2"
965 [(set_attr "type" "veccomplex")
966 (set_attr "length" "4")])
968 (define_insn "spe_evmhesmfaaw"
969 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
970 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
971 (match_operand:V2SI 2 "gpc_reg_operand" "r")
972 (reg:V2SI SPE_ACC_REGNO)] 563))
973 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
975 "evmhesmfaaw %0,%1,%2"
976 [(set_attr "type" "veccomplex")
977 (set_attr "length" "4")])
979 (define_insn "spe_evmhesmfanw"
980 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
981 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
982 (match_operand:V2SI 2 "gpc_reg_operand" "r")
983 (reg:V2SI SPE_ACC_REGNO)] 564))
984 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
986 "evmhesmfanw %0,%1,%2"
987 [(set_attr "type" "veccomplex")
988 (set_attr "length" "4")])
990 (define_insn "spe_evmhesmfa"
991 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
992 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
993 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 565))
994 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
997 [(set_attr "type" "veccomplex")
998 (set_attr "length" "4")])
1000 (define_insn "spe_evmhesmf"
1001 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1002 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1003 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 566))]
1006 [(set_attr "type" "veccomplex")
1007 (set_attr "length" "4")])
1009 (define_insn "spe_evmhesmiaaw"
1010 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1011 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1012 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1013 (reg:V2SI SPE_ACC_REGNO)] 567))
1014 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1016 "evmhesmiaaw %0,%1,%2"
1017 [(set_attr "type" "veccomplex")
1018 (set_attr "length" "4")])
1020 (define_insn "spe_evmhesmianw"
1021 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1022 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1023 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1024 (reg:V2SI SPE_ACC_REGNO)] 568))
1025 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1027 "evmhesmianw %0,%1,%2"
1028 [(set_attr "type" "veccomplex")
1029 (set_attr "length" "4")])
1031 (define_insn "spe_evmhesmia"
1032 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1033 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1034 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 569))
1035 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1037 "evmhesmia %0,%1,%2"
1038 [(set_attr "type" "veccomplex")
1039 (set_attr "length" "4")])
1041 (define_insn "spe_evmhesmi"
1042 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1043 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1044 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 570))]
1047 [(set_attr "type" "veccomplex")
1048 (set_attr "length" "4")])
1050 (define_insn "spe_evmhessfaaw"
1051 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1052 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1053 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1054 (reg:V2SI SPE_ACC_REGNO)] 571))
1055 (clobber (reg:SI SPEFSCR_REGNO))
1056 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1058 "evmhessfaaw %0,%1,%2"
1059 [(set_attr "type" "veccomplex")
1060 (set_attr "length" "4")])
1062 (define_insn "spe_evmhessfanw"
1063 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1064 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1065 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1066 (reg:V2SI SPE_ACC_REGNO)] 572))
1067 (clobber (reg:SI SPEFSCR_REGNO))
1068 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1070 "evmhessfanw %0,%1,%2"
1071 [(set_attr "type" "veccomplex")
1072 (set_attr "length" "4")])
1074 (define_insn "spe_evmhessfa"
1075 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1076 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1077 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 573))
1078 (clobber (reg:SI SPEFSCR_REGNO))
1079 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1081 "evmhessfa %0,%1,%2"
1082 [(set_attr "type" "veccomplex")
1083 (set_attr "length" "4")])
1085 (define_insn "spe_evmhessf"
1086 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1087 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1088 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 574))
1089 (clobber (reg:SI SPEFSCR_REGNO))]
1092 [(set_attr "type" "veccomplex")
1093 (set_attr "length" "4")])
1095 (define_insn "spe_evmhessiaaw"
1096 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1097 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1098 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1099 (reg:V2SI SPE_ACC_REGNO)] 575))
1100 (clobber (reg:SI SPEFSCR_REGNO))
1101 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1103 "evmhessiaaw %0,%1,%2"
1104 [(set_attr "type" "veccomplex")
1105 (set_attr "length" "4")])
1107 (define_insn "spe_evmhessianw"
1108 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1109 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1110 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1111 (reg:V2SI SPE_ACC_REGNO)] 576))
1112 (clobber (reg:SI SPEFSCR_REGNO))
1113 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1115 "evmhessianw %0,%1,%2"
1116 [(set_attr "type" "veccomplex")
1117 (set_attr "length" "4")])
1119 (define_insn "spe_evmheumiaaw"
1120 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1121 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1122 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1123 (reg:V2SI SPE_ACC_REGNO)] 577))
1124 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1126 "evmheumiaaw %0,%1,%2"
1127 [(set_attr "type" "veccomplex")
1128 (set_attr "length" "4")])
1130 (define_insn "spe_evmheumianw"
1131 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1132 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1133 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1134 (reg:V2SI SPE_ACC_REGNO)] 578))
1135 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1137 "evmheumianw %0,%1,%2"
1138 [(set_attr "type" "veccomplex")
1139 (set_attr "length" "4")])
1141 (define_insn "spe_evmheumia"
1142 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1143 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1144 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 579))
1145 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1147 "evmheumia %0,%1,%2"
1148 [(set_attr "type" "veccomplex")
1149 (set_attr "length" "4")])
1151 (define_insn "spe_evmheumi"
1152 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1153 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1154 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 580))]
1157 [(set_attr "type" "veccomplex")
1158 (set_attr "length" "4")])
1160 (define_insn "spe_evmheusiaaw"
1161 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1162 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1163 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1164 (reg:V2SI SPE_ACC_REGNO)] 581))
1165 (clobber (reg:SI SPEFSCR_REGNO))
1166 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1168 "evmheusiaaw %0,%1,%2"
1169 [(set_attr "type" "veccomplex")
1170 (set_attr "length" "4")])
1172 (define_insn "spe_evmheusianw"
1173 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1174 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1175 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1176 (reg:V2SI SPE_ACC_REGNO)] 582))
1177 (clobber (reg:SI SPEFSCR_REGNO))
1178 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1180 "evmheusianw %0,%1,%2"
1181 [(set_attr "type" "veccomplex")
1182 (set_attr "length" "4")])
1184 (define_insn "spe_evmhogsmfaa"
1185 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1186 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1187 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1188 (reg:V2SI SPE_ACC_REGNO)] 583))
1189 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1191 "evmhogsmfaa %0,%1,%2"
1192 [(set_attr "type" "veccomplex")
1193 (set_attr "length" "4")])
1195 (define_insn "spe_evmhogsmfan"
1196 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1197 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1198 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1199 (reg:V2SI SPE_ACC_REGNO)] 584))
1200 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1202 "evmhogsmfan %0,%1,%2"
1203 [(set_attr "type" "veccomplex")
1204 (set_attr "length" "4")])
1206 (define_insn "spe_evmhogsmiaa"
1207 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1208 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1209 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1210 (reg:V2SI SPE_ACC_REGNO)] 585))
1211 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1213 "evmhogsmiaa %0,%1,%2"
1214 [(set_attr "type" "veccomplex")
1215 (set_attr "length" "4")])
1217 (define_insn "spe_evmhogsmian"
1218 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1219 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1220 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1221 (reg:V2SI SPE_ACC_REGNO)] 586))
1222 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1224 "evmhogsmian %0,%1,%2"
1225 [(set_attr "type" "veccomplex")
1226 (set_attr "length" "4")])
1228 (define_insn "spe_evmhogumiaa"
1229 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1230 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1231 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1232 (reg:V2SI SPE_ACC_REGNO)] 587))
1233 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1235 "evmhogumiaa %0,%1,%2"
1236 [(set_attr "type" "veccomplex")
1237 (set_attr "length" "4")])
1239 (define_insn "spe_evmhogumian"
1240 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1241 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1242 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1243 (reg:V2SI SPE_ACC_REGNO)] 588))
1244 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1246 "evmhogumian %0,%1,%2"
1247 [(set_attr "type" "veccomplex")
1248 (set_attr "length" "4")])
1250 (define_insn "spe_evmhosmfaaw"
1251 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1252 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1253 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1254 (reg:V2SI SPE_ACC_REGNO)] 589))
1255 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1257 "evmhosmfaaw %0,%1,%2"
1258 [(set_attr "type" "veccomplex")
1259 (set_attr "length" "4")])
1261 (define_insn "spe_evmhosmfanw"
1262 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1263 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1264 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1265 (reg:V2SI SPE_ACC_REGNO)] 590))
1266 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1268 "evmhosmfanw %0,%1,%2"
1269 [(set_attr "type" "veccomplex")
1270 (set_attr "length" "4")])
1272 (define_insn "spe_evmhosmfa"
1273 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1274 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1275 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 591))]
1277 "evmhosmfa %0,%1,%2"
1278 [(set_attr "type" "veccomplex")
1279 (set_attr "length" "4")])
1281 (define_insn "spe_evmhosmf"
1282 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1283 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1284 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 592))
1285 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1288 [(set_attr "type" "veccomplex")
1289 (set_attr "length" "4")])
1291 (define_insn "spe_evmhosmiaaw"
1292 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1293 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1294 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1295 (reg:V2SI SPE_ACC_REGNO)] 593))
1296 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1298 "evmhosmiaaw %0,%1,%2"
1299 [(set_attr "type" "veccomplex")
1300 (set_attr "length" "4")])
1302 (define_insn "spe_evmhosmianw"
1303 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1304 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1305 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1306 (reg:V2SI SPE_ACC_REGNO)] 594))
1307 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1309 "evmhosmianw %0,%1,%2"
1310 [(set_attr "type" "veccomplex")
1311 (set_attr "length" "4")])
1313 (define_insn "spe_evmhosmia"
1314 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1315 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1316 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 595))
1317 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1319 "evmhosmia %0,%1,%2"
1320 [(set_attr "type" "veccomplex")
1321 (set_attr "length" "4")])
1323 (define_insn "spe_evmhosmi"
1324 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1325 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1326 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 596))]
1329 [(set_attr "type" "veccomplex")
1330 (set_attr "length" "4")])
1332 (define_insn "spe_evmhossfaaw"
1333 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1334 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1335 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1336 (reg:V2SI SPE_ACC_REGNO)] 597))
1337 (clobber (reg:SI SPEFSCR_REGNO))
1338 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1340 "evmhossfaaw %0,%1,%2"
1341 [(set_attr "type" "veccomplex")
1342 (set_attr "length" "4")])
1344 (define_insn "spe_evmhossfanw"
1345 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1346 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1347 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1348 (reg:V2SI SPE_ACC_REGNO)] 598))
1349 (clobber (reg:SI SPEFSCR_REGNO))
1350 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1352 "evmhossfanw %0,%1,%2"
1353 [(set_attr "type" "veccomplex")
1354 (set_attr "length" "4")])
1356 (define_insn "spe_evmhossfa"
1357 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1358 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1359 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1360 (reg:V2SI SPE_ACC_REGNO)] 599))
1361 (clobber (reg:SI SPEFSCR_REGNO))
1362 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1364 "evmhossfa %0,%1,%2"
1365 [(set_attr "type" "veccomplex")
1366 (set_attr "length" "4")])
1368 (define_insn "spe_evmhossf"
1369 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1370 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1371 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 600))
1372 (clobber (reg:SI SPEFSCR_REGNO))]
1375 [(set_attr "type" "veccomplex")
1376 (set_attr "length" "4")])
1378 (define_insn "spe_evmhossiaaw"
1379 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1380 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1381 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1382 (reg:V2SI SPE_ACC_REGNO)] 601))
1383 (clobber (reg:SI SPEFSCR_REGNO))
1384 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1386 "evmhossiaaw %0,%1,%2"
1387 [(set_attr "type" "veccomplex")
1388 (set_attr "length" "4")])
1390 (define_insn "spe_evmhossianw"
1391 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1392 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1393 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1394 (reg:V2SI SPE_ACC_REGNO)] 602))
1395 (clobber (reg:SI SPEFSCR_REGNO))
1396 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1398 "evmhossianw %0,%1,%2"
1399 [(set_attr "type" "veccomplex")
1400 (set_attr "length" "4")])
1402 (define_insn "spe_evmhoumiaaw"
1403 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1404 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1405 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1406 (reg:V2SI SPE_ACC_REGNO)] 603))
1407 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1409 "evmhoumiaaw %0,%1,%2"
1410 [(set_attr "type" "veccomplex")
1411 (set_attr "length" "4")])
1413 (define_insn "spe_evmhoumianw"
1414 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1415 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1416 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1417 (reg:V2SI SPE_ACC_REGNO)] 604))
1418 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1420 "evmhoumianw %0,%1,%2"
1421 [(set_attr "type" "veccomplex")
1422 (set_attr "length" "4")])
1424 (define_insn "spe_evmhoumia"
1425 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1426 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1427 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 605))
1428 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1430 "evmhoumia %0,%1,%2"
1431 [(set_attr "type" "veccomplex")
1432 (set_attr "length" "4")])
1434 (define_insn "spe_evmhoumi"
1435 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1436 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1437 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 606))]
1440 [(set_attr "type" "veccomplex")
1441 (set_attr "length" "4")])
1443 (define_insn "spe_evmhousiaaw"
1444 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1445 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1446 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1447 (reg:V2SI SPE_ACC_REGNO)] 607))
1448 (clobber (reg:SI SPEFSCR_REGNO))
1449 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1451 "evmhousiaaw %0,%1,%2"
1452 [(set_attr "type" "veccomplex")
1453 (set_attr "length" "4")])
1455 (define_insn "spe_evmhousianw"
1456 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1457 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1458 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1459 (reg:V2SI SPE_ACC_REGNO)] 608))
1460 (clobber (reg:SI SPEFSCR_REGNO))
1461 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1463 "evmhousianw %0,%1,%2"
1464 [(set_attr "type" "veccomplex")
1465 (set_attr "length" "4")])
1467 (define_insn "spe_evmmlssfa"
1468 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1469 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1470 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 609))]
1472 "evmmlssfa %0,%1,%2"
1473 [(set_attr "type" "veccomplex")
1474 (set_attr "length" "4")])
1476 (define_insn "spe_evmmlssf"
1477 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1478 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1479 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 610))]
1482 [(set_attr "type" "veccomplex")
1483 (set_attr "length" "4")])
1485 (define_insn "spe_evmwhsmfa"
1486 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1487 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1488 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 611))
1489 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1491 "evmwhsmfa %0,%1,%2"
1492 [(set_attr "type" "veccomplex")
1493 (set_attr "length" "4")])
1495 (define_insn "spe_evmwhsmf"
1496 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1497 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1498 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 612))]
1501 [(set_attr "type" "veccomplex")
1502 (set_attr "length" "4")])
1504 (define_insn "spe_evmwhsmia"
1505 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1506 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1507 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 613))
1508 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1510 "evmwhsmia %0,%1,%2"
1511 [(set_attr "type" "veccomplex")
1512 (set_attr "length" "4")])
1514 (define_insn "spe_evmwhsmi"
1515 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1516 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1517 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 614))]
1520 [(set_attr "type" "veccomplex")
1521 (set_attr "length" "4")])
1523 (define_insn "spe_evmwhssfa"
1524 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1525 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1526 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 615))
1527 (clobber (reg:SI SPEFSCR_REGNO))
1528 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1530 "evmwhssfa %0,%1,%2"
1531 [(set_attr "type" "veccomplex")
1532 (set_attr "length" "4")])
1534 (define_insn "spe_evmwhusian"
1535 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1536 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1537 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 626))]
1539 "evmwhusian %0,%1,%2"
1540 [(set_attr "type" "veccomplex")
1541 (set_attr "length" "4")])
1543 (define_insn "spe_evmwhssf"
1544 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1545 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1546 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 628))
1547 (clobber (reg:SI SPEFSCR_REGNO))]
1550 [(set_attr "type" "veccomplex")
1551 (set_attr "length" "4")])
1553 (define_insn "spe_evmwhumia"
1554 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1555 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1556 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 629))
1557 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1559 "evmwhumia %0,%1,%2"
1560 [(set_attr "type" "veccomplex")
1561 (set_attr "length" "4")])
1563 (define_insn "spe_evmwhumi"
1564 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1565 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1566 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 630))]
1569 [(set_attr "type" "veccomplex")
1570 (set_attr "length" "4")])
1572 (define_insn "spe_evmwlsmiaaw"
1573 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1574 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1575 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1576 (reg:V2SI SPE_ACC_REGNO)] 635))
1577 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1579 "evmwlsmiaaw %0,%1,%2"
1580 [(set_attr "type" "veccomplex")
1581 (set_attr "length" "4")])
1583 (define_insn "spe_evmwlsmianw"
1584 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1585 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1586 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1587 (reg:V2SI SPE_ACC_REGNO)] 636))
1588 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1590 "evmwlsmianw %0,%1,%2"
1591 [(set_attr "type" "veccomplex")
1592 (set_attr "length" "4")])
1594 (define_insn "spe_evmwlssiaaw"
1595 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1596 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1597 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1598 (reg:V2SI SPE_ACC_REGNO)] 641))
1599 (clobber (reg:SI SPEFSCR_REGNO))
1600 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1602 "evmwlssiaaw %0,%1,%2"
1603 [(set_attr "type" "veccomplex")
1604 (set_attr "length" "4")])
1606 (define_insn "spe_evmwlssianw"
1607 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1608 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1609 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1610 (reg:V2SI SPE_ACC_REGNO)] 642))
1611 (clobber (reg:SI SPEFSCR_REGNO))
1612 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1614 "evmwlssianw %0,%1,%2"
1615 [(set_attr "type" "veccomplex")
1616 (set_attr "length" "4")])
1618 (define_insn "spe_evmwlumiaaw"
1619 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1620 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1621 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1622 (reg:V2SI SPE_ACC_REGNO)] 643))
1623 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1625 "evmwlumiaaw %0,%1,%2"
1626 [(set_attr "type" "veccomplex")
1627 (set_attr "length" "4")])
1629 (define_insn "spe_evmwlumianw"
1630 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1631 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1632 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1633 (reg:V2SI SPE_ACC_REGNO)] 644))
1634 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1636 "evmwlumianw %0,%1,%2"
1637 [(set_attr "type" "veccomplex")
1638 (set_attr "length" "4")])
1640 (define_insn "spe_evmwlumia"
1641 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1642 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1643 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 645))
1644 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1646 "evmwlumia %0,%1,%2"
1647 [(set_attr "type" "veccomplex")
1648 (set_attr "length" "4")])
1650 (define_insn "spe_evmwlumi"
1651 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1652 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1653 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 646))]
1656 [(set_attr "type" "veccomplex")
1657 (set_attr "length" "4")])
1659 (define_insn "spe_evmwlusiaaw"
1660 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1661 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1662 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1663 (reg:V2SI SPE_ACC_REGNO)] 647))
1664 (clobber (reg:SI SPEFSCR_REGNO))
1665 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1667 "evmwlusiaaw %0,%1,%2"
1668 [(set_attr "type" "veccomplex")
1669 (set_attr "length" "4")])
1671 (define_insn "spe_evmwlusianw"
1672 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1673 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1674 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1675 (reg:V2SI SPE_ACC_REGNO)] 648))
1676 (clobber (reg:SI SPEFSCR_REGNO))
1677 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1679 "evmwlusianw %0,%1,%2"
1680 [(set_attr "type" "veccomplex")
1681 (set_attr "length" "4")])
1683 (define_insn "spe_evmwsmfaa"
1684 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1685 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1686 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1687 (reg:V2SI SPE_ACC_REGNO)] 649))
1688 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1690 "evmwsmfaa %0,%1,%2"
1691 [(set_attr "type" "veccomplex")
1692 (set_attr "length" "4")])
1694 (define_insn "spe_evmwsmfan"
1695 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1696 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1697 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1698 (reg:V2SI SPE_ACC_REGNO)] 650))
1699 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1701 "evmwsmfan %0,%1,%2"
1702 [(set_attr "type" "veccomplex")
1703 (set_attr "length" "4")])
1705 (define_insn "spe_evmwsmfa"
1706 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1707 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1708 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 651))
1709 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1712 [(set_attr "type" "veccomplex")
1713 (set_attr "length" "4")])
1715 (define_insn "spe_evmwsmf"
1716 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1717 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1718 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 652))]
1721 [(set_attr "type" "veccomplex")
1722 (set_attr "length" "4")])
1724 (define_insn "spe_evmwsmiaa"
1725 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1726 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1727 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1728 (reg:V2SI SPE_ACC_REGNO)] 653))
1729 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1731 "evmwsmiaa %0,%1,%2"
1732 [(set_attr "type" "veccomplex")
1733 (set_attr "length" "4")])
1735 (define_insn "spe_evmwsmian"
1736 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1737 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1738 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1739 (reg:V2SI SPE_ACC_REGNO)] 654))
1740 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1742 "evmwsmian %0,%1,%2"
1743 [(set_attr "type" "veccomplex")
1744 (set_attr "length" "4")])
1746 (define_insn "spe_evmwsmia"
1747 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1748 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1749 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 655))
1750 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1753 [(set_attr "type" "veccomplex")
1754 (set_attr "length" "4")])
1756 (define_insn "spe_evmwsmi"
1757 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1758 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1759 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 656))]
1762 [(set_attr "type" "veccomplex")
1763 (set_attr "length" "4")])
1765 (define_insn "spe_evmwssfaa"
1766 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1767 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1768 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1769 (reg:V2SI SPE_ACC_REGNO)] 657))
1770 (clobber (reg:SI SPEFSCR_REGNO))
1771 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1773 "evmwssfaa %0,%1,%2"
1774 [(set_attr "type" "veccomplex")
1775 (set_attr "length" "4")])
1777 (define_insn "spe_evmwssfan"
1778 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1779 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1780 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1781 (reg:V2SI SPE_ACC_REGNO)] 658))
1782 (clobber (reg:SI SPEFSCR_REGNO))
1783 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1785 "evmwssfan %0,%1,%2"
1786 [(set_attr "type" "veccomplex")
1787 (set_attr "length" "4")])
1789 (define_insn "spe_evmwssfa"
1790 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1791 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1792 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 659))
1793 (clobber (reg:SI SPEFSCR_REGNO))
1794 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1797 [(set_attr "type" "veccomplex")
1798 (set_attr "length" "4")])
1800 (define_insn "spe_evmwssf"
1801 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1802 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1803 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 660))
1804 (clobber (reg:SI SPEFSCR_REGNO))]
1807 [(set_attr "type" "veccomplex")
1808 (set_attr "length" "4")])
1810 (define_insn "spe_evmwumiaa"
1811 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1812 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1813 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1814 (reg:V2SI SPE_ACC_REGNO)] 661))
1815 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1817 "evmwumiaa %0,%1,%2"
1818 [(set_attr "type" "veccomplex")
1819 (set_attr "length" "4")])
1821 (define_insn "spe_evmwumian"
1822 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1823 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1824 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1825 (reg:V2SI SPE_ACC_REGNO)] 662))
1826 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1828 "evmwumian %0,%1,%2"
1829 [(set_attr "type" "veccomplex")
1830 (set_attr "length" "4")])
1832 (define_insn "spe_evmwumia"
1833 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1834 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1835 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 663))
1836 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1839 [(set_attr "type" "veccomplex")
1840 (set_attr "length" "4")])
1842 (define_insn "spe_evmwumi"
1843 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1844 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1845 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 664))]
1848 [(set_attr "type" "veccomplex")
1849 (set_attr "length" "4")])
1851 (define_insn "spe_evaddw"
1852 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1853 (plus:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
1854 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
1857 [(set_attr "type" "vecsimple")
1858 (set_attr "length" "4")])
1860 (define_insn "spe_evaddusiaaw"
1861 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1862 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1863 (reg:V2SI SPE_ACC_REGNO)] 673))
1864 (clobber (reg:SI SPEFSCR_REGNO))
1865 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1868 [(set_attr "type" "veccomplex")
1869 (set_attr "length" "4")])
1871 (define_insn "spe_evaddumiaaw"
1872 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1873 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1874 (reg:V2SI SPE_ACC_REGNO)] 674))
1875 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1878 [(set_attr "type" "veccomplex")
1879 (set_attr "length" "4")])
1881 (define_insn "spe_evaddssiaaw"
1882 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1883 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1884 (reg:V2SI SPE_ACC_REGNO)] 675))
1885 (clobber (reg:SI SPEFSCR_REGNO))
1886 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1889 [(set_attr "type" "veccomplex")
1890 (set_attr "length" "4")])
1892 (define_insn "spe_evaddsmiaaw"
1893 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1894 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1895 (reg:V2SI SPE_ACC_REGNO)] 676))
1896 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1899 [(set_attr "type" "veccomplex")
1900 (set_attr "length" "4")])
1902 (define_insn "spe_evaddiw"
1903 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1904 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1905 (match_operand:QI 2 "immediate_operand" "i")] 677))]
1908 [(set_attr "type" "vecsimple")
1909 (set_attr "length" "4")])
1911 (define_insn "spe_evsubifw"
1912 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1913 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1914 (match_operand:QI 2 "immediate_operand" "i")] 678))]
1917 [(set_attr "type" "veccomplex")
1918 (set_attr "length" "4")])
1920 (define_insn "spe_evsubfw"
1921 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1922 (minus:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
1923 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
1926 [(set_attr "type" "veccomplex")
1927 (set_attr "length" "4")])
1929 (define_insn "spe_evsubfusiaaw"
1930 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1931 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1932 (reg:V2SI SPE_ACC_REGNO)] 679))
1933 (clobber (reg:SI SPEFSCR_REGNO))
1934 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1936 "evsubfusiaaw %0,%1"
1937 [(set_attr "type" "veccomplex")
1938 (set_attr "length" "4")])
1940 (define_insn "spe_evsubfumiaaw"
1941 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1942 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1943 (reg:V2SI SPE_ACC_REGNO)] 680))
1944 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1946 "evsubfumiaaw %0,%1"
1947 [(set_attr "type" "veccomplex")
1948 (set_attr "length" "4")])
1950 (define_insn "spe_evsubfssiaaw"
1951 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1952 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1953 (reg:V2SI SPE_ACC_REGNO)] 681))
1954 (clobber (reg:SI SPEFSCR_REGNO))
1955 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1957 "evsubfssiaaw %0,%1"
1958 [(set_attr "type" "veccomplex")
1959 (set_attr "length" "4")])
1961 (define_insn "spe_evsubfsmiaaw"
1962 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1963 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1964 (reg:V2SI SPE_ACC_REGNO)] 682))
1965 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1967 "evsubfsmiaaw %0,%1"
1968 [(set_attr "type" "veccomplex")
1969 (set_attr "length" "4")])
1971 (define_insn "spe_evmra"
1972 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1973 (match_operand:V2SI 1 "gpc_reg_operand" "r"))
1974 (set (reg:V2SI SPE_ACC_REGNO)
1975 (unspec:V2SI [(match_dup 1)] 726))]
1978 [(set_attr "type" "veccomplex")
1979 (set_attr "length" "4")])
1981 (define_insn "spe_evdivws"
1982 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1983 (div:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
1984 (match_operand:V2SI 2 "gpc_reg_operand" "r")))
1985 (clobber (reg:SI SPEFSCR_REGNO))]
1988 [(set_attr "type" "vecdiv")
1989 (set_attr "length" "4")])
1991 (define_insn "spe_evdivwu"
1992 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1993 (udiv:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
1994 (match_operand:V2SI 2 "gpc_reg_operand" "r")))
1995 (clobber (reg:SI SPEFSCR_REGNO))]
1998 [(set_attr "type" "vecdiv")
1999 (set_attr "length" "4")])
2001 (define_insn "spe_evsplatfi"
2002 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2003 (unspec:V2SI [(match_operand:QI 1 "immediate_operand" "i")] 684))]
2006 [(set_attr "type" "vecperm")
2007 (set_attr "length" "4")])
2009 (define_insn "spe_evsplati"
2010 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2011 (unspec:V2SI [(match_operand:QI 1 "immediate_operand" "i")] 685))]
2014 [(set_attr "type" "vecperm")
2015 (set_attr "length" "4")])
2017 (define_insn "spe_evstdd"
2018 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2019 (match_operand:QI 1 "immediate_operand" "i")))
2020 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2021 (unspec [(const_int 0)] 686)]
2022 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2023 "evstdd %2,%1*8(%0)"
2024 [(set_attr "type" "vecstore")
2025 (set_attr "length" "4")])
2027 (define_insn "spe_evstddx"
2028 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2029 (match_operand:SI 1 "gpc_reg_operand" "r")))
2030 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2031 (unspec [(const_int 0)] 687)]
2034 [(set_attr "type" "vecstore")
2035 (set_attr "length" "4")])
2037 (define_insn "spe_evstdh"
2038 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2039 (match_operand:QI 1 "immediate_operand" "i")))
2040 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2041 (unspec [(const_int 0)] 688)]
2042 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2043 "evstdh %2,%1*8(%0)"
2044 [(set_attr "type" "vecstore")
2045 (set_attr "length" "4")])
2047 (define_insn "spe_evstdhx"
2048 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2049 (match_operand:SI 1 "gpc_reg_operand" "r")))
2050 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2051 (unspec [(const_int 0)] 689)]
2054 [(set_attr "type" "vecstore")
2055 (set_attr "length" "4")])
2057 (define_insn "spe_evstdw"
2058 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2059 (match_operand:QI 1 "immediate_operand" "i")))
2060 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2061 (unspec [(const_int 0)] 690)]
2062 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2063 "evstdw %2,%1*8(%0)"
2064 [(set_attr "type" "vecstore")
2065 (set_attr "length" "4")])
2067 (define_insn "spe_evstdwx"
2068 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2069 (match_operand:SI 1 "gpc_reg_operand" "r")))
2070 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2071 (unspec [(const_int 0)] 691)]
2074 [(set_attr "type" "vecstore")
2075 (set_attr "length" "4")])
2077 (define_insn "spe_evstwhe"
2078 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2079 (match_operand:QI 1 "immediate_operand" "i")))
2080 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2081 (unspec [(const_int 0)] 692)]
2082 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2083 "evstwhe %2,%1*4(%0)"
2084 [(set_attr "type" "vecstore")
2085 (set_attr "length" "4")])
2087 (define_insn "spe_evstwhex"
2088 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2089 (match_operand:SI 1 "gpc_reg_operand" "r")))
2090 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2091 (unspec [(const_int 0)] 693)]
2094 [(set_attr "type" "vecstore")
2095 (set_attr "length" "4")])
2097 (define_insn "spe_evstwho"
2098 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2099 (match_operand:QI 1 "immediate_operand" "i")))
2100 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2101 (unspec [(const_int 0)] 694)]
2102 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2103 "evstwho %2,%1*4(%0)"
2104 [(set_attr "type" "vecstore")
2105 (set_attr "length" "4")])
2107 (define_insn "spe_evstwhox"
2108 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2109 (match_operand:SI 1 "gpc_reg_operand" "r")))
2110 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2111 (unspec [(const_int 0)] 695)]
2114 [(set_attr "type" "vecstore")
2115 (set_attr "length" "4")])
2117 (define_insn "spe_evstwwe"
2118 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2119 (match_operand:QI 1 "immediate_operand" "i")))
2120 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2121 (unspec [(const_int 0)] 696)]
2122 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2123 "evstwwe %2,%1*4(%0)"
2124 [(set_attr "type" "vecstore")
2125 (set_attr "length" "4")])
2127 (define_insn "spe_evstwwex"
2128 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2129 (match_operand:SI 1 "gpc_reg_operand" "r")))
2130 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2131 (unspec [(const_int 0)] 697)]
2134 [(set_attr "type" "vecstore")
2135 (set_attr "length" "4")])
2137 (define_insn "spe_evstwwo"
2138 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2139 (match_operand:QI 1 "immediate_operand" "i")))
2140 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2141 (unspec [(const_int 0)] 698)]
2142 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2143 "evstwwo %2,%1*4(%0)"
2144 [(set_attr "type" "vecstore")
2145 (set_attr "length" "4")])
2147 (define_insn "spe_evstwwox"
2148 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2149 (match_operand:SI 1 "gpc_reg_operand" "r")))
2150 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2151 (unspec [(const_int 0)] 699)]
2154 [(set_attr "type" "vecstore")
2155 (set_attr "length" "4")])
2157 ;; Vector move instructions.
2159 (define_expand "movv2si"
2160 [(set (match_operand:V2SI 0 "nonimmediate_operand" "")
2161 (match_operand:V2SI 1 "any_operand" ""))]
2163 "{ rs6000_emit_move (operands[0], operands[1], V2SImode); DONE; }")
2165 (define_insn "*movv2si_internal"
2166 [(set (match_operand:V2SI 0 "nonimmediate_operand" "=m,r,r,r")
2167 (match_operand:V2SI 1 "input_operand" "r,m,r,W"))]
2171 switch (which_alternative)
2173 case 0: return \"evstdd%X0 %1,%y0\";
2174 case 1: return \"evldd%X1 %0,%y1\";
2175 case 2: return \"evor %0,%1,%1\";
2176 case 3: return output_vec_const_move (operands);
2180 [(set_attr "type" "vecload,vecstore,*,*")
2181 (set_attr "length" "*,*,*,12")])
2184 [(set (match_operand:V2SI 0 "register_operand" "")
2185 (match_operand:V2SI 1 "zero_constant" ""))]
2186 "TARGET_SPE && reload_completed"
2188 (xor:V2SI (match_dup 0) (match_dup 0)))]
2191 (define_expand "movv1di"
2192 [(set (match_operand:V1DI 0 "nonimmediate_operand" "")
2193 (match_operand:V1DI 1 "any_operand" ""))]
2195 "{ rs6000_emit_move (operands[0], operands[1], V1DImode); DONE; }")
2197 (define_insn "*movv1di_internal"
2198 [(set (match_operand:V1DI 0 "nonimmediate_operand" "=m,r,r,r")
2199 (match_operand:V1DI 1 "input_operand" "r,m,r,W"))]
2206 [(set_attr "type" "vecload,vecstore,*,*")
2207 (set_attr "length" "*,*,*,*")])
2209 (define_expand "movv4hi"
2210 [(set (match_operand:V4HI 0 "nonimmediate_operand" "")
2211 (match_operand:V4HI 1 "any_operand" ""))]
2213 "{ rs6000_emit_move (operands[0], operands[1], V4HImode); DONE; }")
2215 (define_insn "*movv4hi_internal"
2216 [(set (match_operand:V4HI 0 "nonimmediate_operand" "=m,r,r")
2217 (match_operand:V4HI 1 "input_operand" "r,m,r"))]
2223 [(set_attr "type" "vecload")])
2225 (define_expand "movv2sf"
2226 [(set (match_operand:V2SF 0 "nonimmediate_operand" "")
2227 (match_operand:V2SF 1 "any_operand" ""))]
2229 "{ rs6000_emit_move (operands[0], operands[1], V2SFmode); DONE; }")
2231 (define_insn "*movv2sf_internal"
2232 [(set (match_operand:V2SF 0 "nonimmediate_operand" "=m,r,r,r")
2233 (match_operand:V2SF 1 "input_operand" "r,m,r,W"))]
2240 [(set_attr "type" "vecload,vecstore,*,*")
2241 (set_attr "length" "*,*,*,*")])
2243 (define_insn "spe_evmwhssfaa"
2244 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2245 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2246 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 702))
2247 (clobber (reg:SI SPEFSCR_REGNO))
2248 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2250 "evmwhssfaa %0,%1,%2"
2251 [(set_attr "type" "veccomplex")
2252 (set_attr "length" "4")])
2254 (define_insn "spe_evmwhssmaa"
2255 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2256 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2257 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 703))
2258 (clobber (reg:SI SPEFSCR_REGNO))
2259 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2261 "evmwhssmaa %0,%1,%2"
2262 [(set_attr "type" "veccomplex")
2263 (set_attr "length" "4")])
2265 (define_insn "spe_evmwhsmfaa"
2266 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2267 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2268 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 704))
2269 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2271 "evmwhsmfaa %0,%1,%2"
2272 [(set_attr "type" "veccomplex")
2273 (set_attr "length" "4")])
2275 (define_insn "spe_evmwhsmiaa"
2276 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2277 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2278 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 705))
2279 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2281 "evmwhsmiaa %0,%1,%2"
2282 [(set_attr "type" "veccomplex")
2283 (set_attr "length" "4")])
2285 (define_insn "spe_evmwhusiaa"
2286 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2287 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2288 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 706))
2289 (clobber (reg:SI SPEFSCR_REGNO))
2290 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2292 "evmwhusiaa %0,%1,%2"
2293 [(set_attr "type" "veccomplex")
2294 (set_attr "length" "4")])
2296 (define_insn "spe_evmwhumiaa"
2297 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2298 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2299 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 707))
2300 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2302 "evmwhumiaa %0,%1,%2"
2303 [(set_attr "type" "veccomplex")
2304 (set_attr "length" "4")])
2306 (define_insn "spe_evmwhssfan"
2307 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2308 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2309 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 708))
2310 (clobber (reg:SI SPEFSCR_REGNO))
2311 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2313 "evmwhssfan %0,%1,%2"
2314 [(set_attr "type" "veccomplex")
2315 (set_attr "length" "4")])
2317 (define_insn "spe_evmwhssian"
2318 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2319 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2320 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 709))
2321 (clobber (reg:SI SPEFSCR_REGNO))
2322 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2324 "evmwhssian %0,%1,%2"
2325 [(set_attr "type" "veccomplex")
2326 (set_attr "length" "4")])
2328 (define_insn "spe_evmwhsmfan"
2329 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2330 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2331 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 710))
2332 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2334 "evmwhsmfan %0,%1,%2"
2335 [(set_attr "type" "veccomplex")
2336 (set_attr "length" "4")])
2338 (define_insn "spe_evmwhsmian"
2339 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2340 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2341 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 711))
2342 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2344 "evmwhsmian %0,%1,%2"
2345 [(set_attr "type" "veccomplex")
2346 (set_attr "length" "4")])
2348 (define_insn "spe_evmwhumian"
2349 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2350 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2351 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 713))
2352 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2354 "evmwhumian %0,%1,%2"
2355 [(set_attr "type" "veccomplex")
2356 (set_attr "length" "4")])
2358 (define_insn "spe_evmwhgssfaa"
2359 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2360 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2361 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 714))
2362 (clobber (reg:SI SPEFSCR_REGNO))
2363 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2365 "evmwhgssfaa %0,%1,%2"
2366 [(set_attr "type" "veccomplex")
2367 (set_attr "length" "4")])
2369 (define_insn "spe_evmwhgsmfaa"
2370 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2371 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2372 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 715))
2373 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2375 "evmwhgsmfaa %0,%1,%2"
2376 [(set_attr "type" "veccomplex")
2377 (set_attr "length" "4")])
2379 (define_insn "spe_evmwhgsmiaa"
2380 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2381 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2382 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 716))
2383 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2385 "evmwhgsmiaa %0,%1,%2"
2386 [(set_attr "type" "veccomplex")
2387 (set_attr "length" "4")])
2389 (define_insn "spe_evmwhgumiaa"
2390 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2391 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2392 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 717))
2393 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2395 "evmwhgumiaa %0,%1,%2"
2396 [(set_attr "type" "veccomplex")
2397 (set_attr "length" "4")])
2399 (define_insn "spe_evmwhgssfan"
2400 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2401 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2402 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 718))
2403 (clobber (reg:SI SPEFSCR_REGNO))
2404 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2406 "evmwhgssfan %0,%1,%2"
2407 [(set_attr "type" "veccomplex")
2408 (set_attr "length" "4")])
2410 (define_insn "spe_evmwhgsmfan"
2411 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2412 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2413 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 719))
2414 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2416 "evmwhgsmfan %0,%1,%2"
2417 [(set_attr "type" "veccomplex")
2418 (set_attr "length" "4")])
2420 (define_insn "spe_evmwhgsmian"
2421 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2422 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2423 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 720))
2424 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2426 "evmwhgsmian %0,%1,%2"
2427 [(set_attr "type" "veccomplex")
2428 (set_attr "length" "4")])
2430 (define_insn "spe_evmwhgumian"
2431 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2432 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2433 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 721))
2434 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2436 "evmwhgumian %0,%1,%2"
2437 [(set_attr "type" "veccomplex")
2438 (set_attr "length" "4")])
2440 (define_insn "spe_mtspefscr"
2441 [(set (reg:SI SPEFSCR_REGNO)
2442 (unspec_volatile:SI [(match_operand:SI 0 "register_operand" "r")]
2446 [(set_attr "type" "vecsimple")])
2448 (define_insn "spe_mfspefscr"
2449 [(set (match_operand:SI 0 "register_operand" "=r")
2450 (unspec_volatile:SI [(reg:SI SPEFSCR_REGNO)] 723))]
2453 [(set_attr "type" "vecsimple")])
2455 ;; MPC8540 single-precision FP instructions on GPRs.
2456 ;; We have 2 variants for each. One for IEEE compliant math and one
2457 ;; for non IEEE compliant math.
2459 (define_insn "cmpsfeq_gpr"
2460 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2461 (eq:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2462 (match_operand:SF 2 "gpc_reg_operand" "r")))]
2463 "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations"
2465 [(set_attr "type" "veccmp")])
2467 (define_insn "tstsfeq_gpr"
2468 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2469 (eq:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2470 (match_operand:SF 2 "gpc_reg_operand" "r")))]
2471 "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations"
2473 [(set_attr "type" "veccmpsimple")])
2475 (define_insn "cmpsfgt_gpr"
2476 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2477 (gt:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2478 (match_operand:SF 2 "gpc_reg_operand" "r")))]
2479 "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations"
2481 [(set_attr "type" "veccmp")])
2483 (define_insn "tstsfgt_gpr"
2484 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2485 (gt:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2486 (match_operand:SF 2 "gpc_reg_operand" "r")))]
2487 "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations"
2489 [(set_attr "type" "veccmpsimple")])
2491 (define_insn "cmpsflt_gpr"
2492 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2493 (lt:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2494 (match_operand:SF 2 "gpc_reg_operand" "r")))]
2495 "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations"
2497 [(set_attr "type" "veccmp")])
2499 (define_insn "tstsflt_gpr"
2500 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2501 (lt:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2502 (match_operand:SF 2 "gpc_reg_operand" "r")))]
2503 "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations"
2505 [(set_attr "type" "veccmpsimple")])