1 ; Options for the rs6000 port of the compiler
3 ; Copyright (C) 2005 Free Software Foundation, Inc.
4 ; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
6 ; This file is part of GCC.
8 ; GCC is free software; you can redistribute it and/or modify it under
9 ; the terms of the GNU General Public License as published by the Free
10 ; Software Foundation; either version 2, or (at your option) any later
13 ; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ; License for more details.
18 ; You should have received a copy of the GNU General Public License
19 ; along with GCC; see the file COPYING. If not, write to the Free
20 ; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
24 Target Report RejectNegative Mask(POWER)
25 Use POWER instruction set
28 Target Report RejectNegative
29 Do not use POWER instruction set
32 Target Report Mask(POWER2)
33 Use POWER2 instruction set
36 Target Report RejectNegative Mask(POWERPC)
37 Use PowerPC instruction set
40 Target Report RejectNegative
41 Do not use PowerPC instruction set
44 Target Report Mask(POWERPC64)
45 Use PowerPC-64 instruction set
48 Target Report Mask(PPC_GPOPT)
49 Use PowerPC General Purpose group optional instructions
52 Target Report Mask(PPC_GFXOPT)
53 Use PowerPC Graphics group optional instructions
56 Target Report Mask(MFCRF)
57 Generate single field mfcr instruction
60 Target Report Mask(POPCNTB)
61 Use PowerPC/AS popcntb instruction
64 Target Report Mask(ALTIVEC)
65 Use AltiVec instructions
68 Target Report Mask(MULTIPLE)
69 Generate load/store multiple instructions
72 Target Report Mask(STRING)
73 Generate string instructions for block moves
76 Target Report RejectNegative Mask(NEW_MNEMONICS)
77 Use new mnemonics for PowerPC architecture
80 Target Report RejectNegative InverseMask(NEW_MNEMONICS)
81 Use old mnemonics for PowerPC architecture
84 Target Report RejectNegative Mask(SOFT_FLOAT)
85 Do not use hardware floating point
88 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
89 Use hardware floating point
92 Target Report RejectNegative Mask(NO_UPDATE)
93 Do not generate load/store with update instructions
96 Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
97 Generate load/store with update instructions
100 Target Report RejectNegative Mask(NO_FUSED_MADD)
101 Do not generate fused multiply/add instructions
104 Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD)
105 Generate fused multiply/add instructions
108 Target Report Mask(SCHED_PROLOG)
109 Schedule the start and end of the procedure
112 Target Undocumented Mask(SCHED_PROLOG) MaskExists
115 Target Report RejectNegative Var(aix_struct_return)
116 Return all structures in memory (AIX default)
119 Target Report RejectNegative Var(aix_struct_return,0) VarExists
120 Return small structures in registers (SVR4 default)
123 Target Report Var(TARGET_XL_COMPAT)
124 Conform more closely to IBM XLC semantics
127 Target Report Var(swdiv)
128 Generate software floating point divide for better throughput
131 Target Report RejectNegative Mask(NO_FP_IN_TOC)
132 Do not place floating point constants in TOC
135 Target Report RejectNegative InverseMask(NO_FP_IN_TOC)
136 Place floating point constants in TOC
139 Target RejectNegative Mask(NO_SUM_IN_TOC)
140 Do not place symbol+offset constants in TOC
143 Target RejectNegative InverseMask(NO_SUM_IN_TOC)
144 Place symbol+offset constants in TOC
146 ; Output only one TOC entry per module. Normally linking fails if
147 ; there are more than 16K unique variables/constants in an executable. With
148 ; this option, linking fails only if there are more than 16K modules, or
149 ; if there are more than 16K unique variables/constant in a single module.
151 ; This is at the cost of having 2 extra loads and one extra store per
152 ; function, and one less allocable register.
154 Target Report Mask(MINIMAL_TOC)
155 Use only one TOC entry per procedure
159 Put everything in the regular TOC
162 Target Report Var(TARGET_ALTIVEC_VRSAVE)
163 Generate VRSAVE instructions when generating AltiVec code
166 Target RejectNegative Joined
167 -mvrsave=yes/no Deprecated option. Use -mvrsave/-mno-vrsave instead.
170 Target Var(rs6000_isel)
171 Generate isel instructions
174 Target RejectNegative Joined
175 -misel=yes/no Deprecated option. Use -misel/-mno-isel instead
178 Target Var(rs6000_spe)
179 Generate SPE SIMD instructions on E500
182 Target RejectNegative Joined
183 -mspe=yes/no Deprecated option. Use -mspe/-mno-spe instead
186 Target RejectNegative Joined
187 -mdebug= Enable debug output
190 Target RejectNegative Joined
191 -mabi= Specify ABI to use
194 Target RejectNegative Joined
195 -mcpu= Use features of and schedule code for given CPU
198 Target RejectNegative Joined
199 -mtune= Schedule code for given CPU
202 Target RejectNegative Joined
203 -mtraceback= Select full, part, or no traceback table
206 Target Report Var(rs6000_default_long_calls)
207 Avoid all range limits on call instructions
210 Target Var(rs6000_warn_altivec_long) Init(1)
211 Warn about deprecated 'vector long ...' AltiVec type usage
214 Target RejectNegative Joined
215 -mfloat-gprs= Select GPR floating point method.
218 Target RejectNegative Joined UInteger
219 -mlong-double-<n> Specify size of long double (64 or 128 bits)
222 Target RejectNegative Joined
223 Determine which dependences between insns are considered costly
226 Target RejectNegative Joined
227 Specify which post scheduling nop insertion scheme to apply
230 Target RejectNegative Joined
231 Specify alignment of structure fields default/natural
233 mprioritize-restricted-insns=
234 Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
235 Specify scheduling priority for dispatch slot restricted insns