1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
42 #ifndef TARGET_NO_PROTOTYPE
43 #define TARGET_NO_PROTOTYPE 0
46 extern char *language_string;
47 extern int profile_block_flag;
49 #define min(A,B) ((A) < (B) ? (A) : (B))
50 #define max(A,B) ((A) > (B) ? (A) : (B))
54 enum processor_type rs6000_cpu;
55 struct rs6000_cpu_select rs6000_select[3] =
57 /* switch name, tune arch */
58 { (char *)0, "--with-cpu=", 1, 1 },
59 { (char *)0, "-mcpu=", 1, 1 },
60 { (char *)0, "-mtune=", 1, 0 },
63 /* Set to non-zero by "fix" operation to indicate that itrunc and
64 uitrunc must be defined. */
66 int rs6000_trunc_used;
68 /* Set to non-zero once they have been defined. */
70 static int trunc_defined;
72 /* Set to non-zero once AIX common-mode calls have been defined. */
73 static int common_mode_defined;
75 /* Save information from a "cmpxx" operation until the branch or scc is
77 rtx rs6000_compare_op0, rs6000_compare_op1;
78 int rs6000_compare_fp_p;
81 /* Label number of label created for -mrelocatable, to call to so we can
82 get the address of the GOT section */
83 int rs6000_pic_labelno;
84 int rs6000_pic_func_labelno;
86 /* Which abi to adhere to */
87 char *rs6000_abi_name = RS6000_ABI_NAME;
89 /* Semantics of the small data area */
90 enum rs6000_sdata_type rs6000_sdata = SDATA_DATA;
92 /* Which small data model to use */
93 char *rs6000_sdata_name = (char *)0;
96 /* Whether a System V.4 varargs area was created. */
97 int rs6000_sysv_varargs_p;
99 /* ABI enumeration available for subtarget to use. */
100 enum rs6000_abi rs6000_current_abi;
102 /* Offset & size for fpmem stack locations used for converting between
103 float and integral types. */
104 int rs6000_fpmem_offset;
105 int rs6000_fpmem_size;
108 char *rs6000_debug_name;
109 int rs6000_debug_stack; /* debug stack applications */
110 int rs6000_debug_arg; /* debug argument handling */
112 /* Flag to say the TOC is initialized */
116 /* Default register names. */
117 char rs6000_reg_names[][8] =
119 "0", "1", "2", "3", "4", "5", "6", "7",
120 "8", "9", "10", "11", "12", "13", "14", "15",
121 "16", "17", "18", "19", "20", "21", "22", "23",
122 "24", "25", "26", "27", "28", "29", "30", "31",
123 "0", "1", "2", "3", "4", "5", "6", "7",
124 "8", "9", "10", "11", "12", "13", "14", "15",
125 "16", "17", "18", "19", "20", "21", "22", "23",
126 "24", "25", "26", "27", "28", "29", "30", "31",
127 "mq", "lr", "ctr","ap",
128 "0", "1", "2", "3", "4", "5", "6", "7",
132 #ifdef TARGET_REGNAMES
133 static char alt_reg_names[][8] =
135 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
136 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
137 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
138 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
139 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
140 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
141 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
142 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
143 "mq", "lr", "ctr", "ap",
144 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
149 #ifndef MASK_STRICT_ALIGN
150 #define MASK_STRICT_ALIGN 0
153 /* Override command line options. Mostly we process the processor
154 type and sometimes adjust other TARGET_ options. */
157 rs6000_override_options (default_cpu)
161 struct rs6000_cpu_select *ptr;
163 /* Simplify the entries below by making a mask for any POWER
164 variant and any PowerPC variant. */
166 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
167 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
168 | MASK_PPC_GFXOPT | MASK_POWERPC64)
169 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
173 char *name; /* Canonical processor name. */
174 enum processor_type processor; /* Processor type enum value. */
175 int target_enable; /* Target flags to enable. */
176 int target_disable; /* Target flags to disable. */
177 } processor_target_table[]
178 = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS,
179 POWER_MASKS | POWERPC_MASKS},
180 {"power", PROCESSOR_POWER,
181 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
182 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
183 {"power2", PROCESSOR_POWER,
184 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
185 POWERPC_MASKS | MASK_NEW_MNEMONICS},
186 {"powerpc", PROCESSOR_POWERPC,
187 MASK_POWERPC | MASK_NEW_MNEMONICS,
188 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
189 {"rios", PROCESSOR_RIOS1,
190 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
191 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
192 {"rios1", PROCESSOR_RIOS1,
193 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
194 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
195 {"rsc", PROCESSOR_PPC601,
196 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
197 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
198 {"rsc1", PROCESSOR_PPC601,
199 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
200 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
201 {"rios2", PROCESSOR_RIOS2,
202 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
203 POWERPC_MASKS | MASK_NEW_MNEMONICS},
204 {"403", PROCESSOR_PPC403,
205 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN,
206 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
207 {"505", PROCESSOR_MPCCORE,
208 MASK_POWERPC | MASK_NEW_MNEMONICS,
209 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
210 {"601", PROCESSOR_PPC601,
211 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
212 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
213 {"602", PROCESSOR_PPC603,
214 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
215 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
216 {"603", PROCESSOR_PPC603,
217 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
218 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
219 {"603e", PROCESSOR_PPC603,
220 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
221 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
222 {"604", PROCESSOR_PPC604,
223 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
224 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
225 {"604e", PROCESSOR_PPC604,
226 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
227 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
228 {"620", PROCESSOR_PPC620,
229 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
230 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
231 {"801", PROCESSOR_MPCCORE,
232 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
233 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
234 {"821", PROCESSOR_MPCCORE,
235 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
236 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
237 {"823", PROCESSOR_MPCCORE,
238 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
239 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
240 {"860", PROCESSOR_MPCCORE,
241 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
242 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
244 int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
246 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
247 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
249 profile_block_flag = 0;
251 /* Identify the processor type */
252 rs6000_select[0].string = default_cpu;
253 rs6000_cpu = PROCESSOR_DEFAULT;
255 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
257 ptr = &rs6000_select[i];
258 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
260 for (j = 0; j < ptt_size; j++)
261 if (! strcmp (ptr->string, processor_target_table[j].name))
264 rs6000_cpu = processor_target_table[j].processor;
268 target_flags |= processor_target_table[j].target_enable;
269 target_flags &= ~processor_target_table[j].target_disable;
275 error ("bad value (%s) for %s switch", ptr->string, ptr->name);
279 /* If -mmultiple or -mno-multiple was explicitly used, don't
280 override with the processor default */
281 if (TARGET_MULTIPLE_SET)
282 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
284 /* If -mstring or -mno-string was explicitly used, don't
285 override with the processor default */
286 if (TARGET_STRING_SET)
287 target_flags = (target_flags & ~MASK_STRING) | string;
289 /* Don't allow -mmultiple or -mstring on little endian systems, because the
290 hardware doesn't support the instructions used in little endian mode */
291 if (!BYTES_BIG_ENDIAN)
295 target_flags &= ~MASK_MULTIPLE;
296 if (TARGET_MULTIPLE_SET)
297 warning ("-mmultiple is not supported on little endian systems");
302 target_flags &= ~MASK_STRING;
303 if (TARGET_STRING_SET)
304 warning ("-mstring is not supported on little endian systems");
308 /* Set debug flags */
309 if (rs6000_debug_name)
311 if (!strcmp (rs6000_debug_name, "all"))
312 rs6000_debug_stack = rs6000_debug_arg = 1;
313 else if (!strcmp (rs6000_debug_name, "stack"))
314 rs6000_debug_stack = 1;
315 else if (!strcmp (rs6000_debug_name, "arg"))
316 rs6000_debug_arg = 1;
318 error ("Unknown -mdebug-%s switch", rs6000_debug_name);
321 #ifdef TARGET_REGNAMES
322 /* If the user desires alternate register names, copy in the alternate names
325 bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names));
328 #ifdef SUBTARGET_OVERRIDE_OPTIONS
329 SUBTARGET_OVERRIDE_OPTIONS;
333 /* Do anything needed at the start of the asm file. */
336 rs6000_file_start (file, default_cpu)
342 char *start = buffer;
343 struct rs6000_cpu_select *ptr;
345 if (flag_verbose_asm)
347 sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START);
348 rs6000_select[0].string = default_cpu;
350 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
352 ptr = &rs6000_select[i];
353 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
355 fprintf (file, "%s %s%s", start, ptr->name, ptr->string);
361 switch (rs6000_sdata)
363 case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break;
364 case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break;
365 case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break;
366 case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break;
369 if (rs6000_sdata && g_switch_value)
371 fprintf (file, "%s -G %d", start, g_switch_value);
382 /* Create a CONST_DOUBLE from a string. */
385 rs6000_float_const (string, mode)
387 enum machine_mode mode;
389 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
390 return immed_real_const_1 (value, mode);
394 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
395 two parts of the constant if the target is little endian. */
398 rs6000_immed_double_const (i0, i1, mode)
399 HOST_WIDE_INT i0, i1;
400 enum machine_mode mode;
402 if (! WORDS_BIG_ENDIAN)
403 return immed_double_const (i1, i0, mode);
405 return immed_double_const (i0, i1, mode);
409 /* Return non-zero if this function is known to have a null epilogue. */
414 if (reload_completed)
416 rs6000_stack_t *info = rs6000_stack_info ();
418 if (info->first_gp_reg_save == 32
419 && info->first_fp_reg_save == 64
429 /* Returns 1 always. */
432 any_operand (op, mode)
434 enum machine_mode mode;
439 /* Returns 1 if op is the count register */
441 count_register_operand(op, mode)
443 enum machine_mode mode;
445 if (GET_CODE (op) != REG)
448 if (REGNO (op) == COUNT_REGISTER_REGNUM)
451 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
457 /* Returns 1 if op is memory location for float/int conversions that masquerades
460 fpmem_operand(op, mode)
462 enum machine_mode mode;
464 if (GET_CODE (op) != REG)
467 if (FPMEM_REGNO_P (REGNO (op)))
471 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
478 /* Return 1 if OP is a constant that can fit in a D field. */
481 short_cint_operand (op, mode)
483 enum machine_mode mode;
485 return (GET_CODE (op) == CONST_INT
486 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000);
489 /* Similar for a unsigned D field. */
492 u_short_cint_operand (op, mode)
494 enum machine_mode mode;
496 return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
499 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
502 non_short_cint_operand (op, mode)
504 enum machine_mode mode;
506 return (GET_CODE (op) == CONST_INT
507 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000);
510 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
514 gpc_reg_operand (op, mode)
516 enum machine_mode mode;
518 return (register_operand (op, mode)
519 && (GET_CODE (op) != REG
520 || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op)))
521 || REGNO (op) < 64));
524 /* Returns 1 if OP is either a pseudo-register or a register denoting a
528 cc_reg_operand (op, mode)
530 enum machine_mode mode;
532 return (register_operand (op, mode)
533 && (GET_CODE (op) != REG
534 || REGNO (op) >= FIRST_PSEUDO_REGISTER
535 || CR_REGNO_P (REGNO (op))));
538 /* Returns 1 if OP is either a constant integer valid for a D-field or a
539 non-special register. If a register, it must be in the proper mode unless
543 reg_or_short_operand (op, mode)
545 enum machine_mode mode;
547 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
550 /* Similar, except check if the negation of the constant would be valid for
554 reg_or_neg_short_operand (op, mode)
556 enum machine_mode mode;
558 if (GET_CODE (op) == CONST_INT)
559 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
561 return gpc_reg_operand (op, mode);
564 /* Return 1 if the operand is either a register or an integer whose high-order
568 reg_or_u_short_operand (op, mode)
570 enum machine_mode mode;
572 if (GET_CODE (op) == CONST_INT
573 && (INTVAL (op) & 0xffff0000) == 0)
576 return gpc_reg_operand (op, mode);
579 /* Return 1 is the operand is either a non-special register or ANY
583 reg_or_cint_operand (op, mode)
585 enum machine_mode mode;
587 return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
590 /* Return 1 if the operand is an operand that can be loaded via the GOT */
593 got_operand (op, mode)
595 enum machine_mode mode;
597 return (GET_CODE (op) == SYMBOL_REF
598 || GET_CODE (op) == CONST
599 || GET_CODE (op) == LABEL_REF);
602 /* Return 1 if the operand is a simple references that can be loaded via
603 the GOT (labels involving addition aren't allowed). */
606 got_no_const_operand (op, mode)
608 enum machine_mode mode;
610 return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF);
613 /* Return the number of instructions it takes to form a constant in an
617 num_insns_constant_wide (value)
620 /* signed constant loadable with {cal|addi} */
621 if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000)
624 #if HOST_BITS_PER_WIDE_INT == 32
625 /* constant loadable with {cau|addis} */
626 else if ((value & 0xffff) == 0)
630 /* constant loadable with {cau|addis} */
631 else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0)
634 else if (TARGET_64BIT)
636 HOST_WIDE_INT low = value & 0xffffffff;
637 HOST_WIDE_INT high = value >> 32;
639 if (high == 0 && (low & 0x80000000) == 0)
642 else if (high == 0xffffffff && (low & 0x80000000) != 0)
646 return num_insns_constant_wide (high) + 1;
649 return (num_insns_constant_wide (high)
650 + num_insns_constant_wide (low) + 1);
659 num_insns_constant (op, mode)
661 enum machine_mode mode;
663 if (GET_CODE (op) == CONST_INT)
664 return num_insns_constant_wide (INTVAL (op));
666 else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode)
671 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
672 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
673 return num_insns_constant_wide ((HOST_WIDE_INT)l);
676 else if (GET_CODE (op) == CONST_DOUBLE)
682 int endian = (WORDS_BIG_ENDIAN == 0);
684 if (mode == VOIDmode || mode == DImode)
686 high = CONST_DOUBLE_HIGH (op);
687 low = CONST_DOUBLE_LOW (op);
691 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
692 REAL_VALUE_TO_TARGET_DOUBLE (rv, l);
698 return (num_insns_constant_wide (low)
699 + num_insns_constant_wide (high));
703 if (high == 0 && (low & 0x80000000) == 0)
704 return num_insns_constant_wide (low);
706 else if (((high & 0xffffffff) == 0xffffffff)
707 && ((low & 0x80000000) != 0))
708 return num_insns_constant_wide (low);
711 return num_insns_constant_wide (high) + 1;
714 return (num_insns_constant_wide (high)
715 + num_insns_constant_wide (low) + 1);
723 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
724 with one instruction per word. We only do this if we can safely read
725 CONST_DOUBLE_{LOW,HIGH}. */
728 easy_fp_constant (op, mode)
730 register enum machine_mode mode;
732 if (GET_CODE (op) != CONST_DOUBLE
733 || GET_MODE (op) != mode
734 || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode))
737 /* Consider all constants with -msoft-float to be easy */
738 if (TARGET_SOFT_FLOAT && mode != DImode)
741 /* If we are using V.4 style PIC, consider all constants to be hard */
742 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
745 #ifdef TARGET_RELOCATABLE
746 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
747 if (TARGET_RELOCATABLE)
756 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
757 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
759 return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1
760 && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1);
763 else if (mode == SFmode)
768 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
769 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
771 return num_insns_constant_wide (l) == 1;
774 else if (mode == DImode && TARGET_32BIT)
775 return num_insns_constant (op, DImode) == 2;
781 /* Return 1 if the operand is in volatile memory. Note that during the
782 RTL generation phase, memory_operand does not return TRUE for
783 volatile memory references. So this function allows us to
784 recognize volatile references where its safe. */
787 volatile_mem_operand (op, mode)
789 enum machine_mode mode;
791 if (GET_CODE (op) != MEM)
794 if (!MEM_VOLATILE_P (op))
797 if (mode != GET_MODE (op))
800 if (reload_completed)
801 return memory_operand (op, mode);
803 if (reload_in_progress)
804 return strict_memory_address_p (mode, XEXP (op, 0));
806 return memory_address_p (mode, XEXP (op, 0));
809 /* Return 1 if the operand is an offsettable memory address. */
812 offsettable_addr_operand (op, mode)
814 enum machine_mode mode;
816 return offsettable_address_p (reload_completed | reload_in_progress,
820 /* Return 1 if the operand is either an easy FP constant (see above) or
824 mem_or_easy_const_operand (op, mode)
826 enum machine_mode mode;
828 return memory_operand (op, mode) || easy_fp_constant (op, mode);
831 /* Return 1 if the operand is either a non-special register or an item
832 that can be used as the operand of an SI add insn. */
835 add_operand (op, mode)
837 enum machine_mode mode;
839 return (reg_or_short_operand (op, mode)
840 || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
843 /* Return 1 if OP is a constant but not a valid add_operand. */
846 non_add_cint_operand (op, mode)
848 enum machine_mode mode;
850 return (GET_CODE (op) == CONST_INT
851 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000
852 && (INTVAL (op) & 0xffff) != 0);
855 /* Return 1 if the operand is a non-special register or a constant that
856 can be used as the operand of an OR or XOR insn on the RS/6000. */
859 logical_operand (op, mode)
861 enum machine_mode mode;
863 return (gpc_reg_operand (op, mode)
864 || (GET_CODE (op) == CONST_INT
865 && ((INTVAL (op) & 0xffff0000) == 0
866 || (INTVAL (op) & 0xffff) == 0)));
869 /* Return 1 if C is a constant that is not a logical operand (as
873 non_logical_cint_operand (op, mode)
875 enum machine_mode mode;
877 return (GET_CODE (op) == CONST_INT
878 && (INTVAL (op) & 0xffff0000) != 0
879 && (INTVAL (op) & 0xffff) != 0);
882 /* Return 1 if C is a constant that can be encoded in a mask on the
883 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
884 Reject all ones and all zeros, since these should have been optimized
885 away and confuse the making of MB and ME. */
895 if (c == 0 || c == ~0)
898 last_bit_value = c & 1;
900 for (i = 1; i < 32; i++)
901 if (((c >>= 1) & 1) != last_bit_value)
902 last_bit_value ^= 1, transitions++;
904 return transitions <= 2;
907 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
910 mask_operand (op, mode)
912 enum machine_mode mode;
914 return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
917 /* Return 1 if the operand is either a non-special register or a
918 constant that can be used as the operand of an RS/6000 logical AND insn. */
921 and_operand (op, mode)
923 enum machine_mode mode;
925 return (logical_operand (op, mode)
926 || mask_operand (op, mode));
929 /* Return 1 if the operand is a constant but not a valid operand for an AND
933 non_and_cint_operand (op, mode)
935 enum machine_mode mode;
937 return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
940 /* Return 1 if the operand is a general register or memory operand. */
943 reg_or_mem_operand (op, mode)
945 register enum machine_mode mode;
947 return (gpc_reg_operand (op, mode)
948 || memory_operand (op, mode)
949 || volatile_mem_operand (op, mode));
952 /* Return 1 if the operand is a general register or memory operand without
953 pre-inc or pre_dec which produces invalid form of PowerPC lwa
957 lwa_operand (op, mode)
959 register enum machine_mode mode;
963 if (reload_completed && GET_CODE (inner) == SUBREG)
964 inner = SUBREG_REG (inner);
966 return gpc_reg_operand (inner, mode)
967 || (memory_operand (inner, mode)
968 && GET_CODE (XEXP (inner, 0)) != PRE_INC
969 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
972 /* Return 1 if the operand, used inside a MEM, is a valid first argument
973 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
977 call_operand (op, mode)
979 enum machine_mode mode;
981 if (mode != VOIDmode && GET_MODE (op) != mode)
984 return (GET_CODE (op) == SYMBOL_REF
985 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
989 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
993 current_file_function_operand (op, mode)
995 enum machine_mode mode;
997 return (GET_CODE (op) == SYMBOL_REF
998 && (SYMBOL_REF_FLAG (op)
999 || op == XEXP (DECL_RTL (current_function_decl), 0)));
1003 /* Return 1 if this operand is a valid input for a move insn. */
1006 input_operand (op, mode)
1008 enum machine_mode mode;
1010 /* Memory is always valid. */
1011 if (memory_operand (op, mode))
1014 /* For floating-point, easy constants are valid. */
1015 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1017 && easy_fp_constant (op, mode))
1020 /* Allow any integer constant. */
1021 if (GET_MODE_CLASS (mode) == MODE_INT
1022 && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE))
1025 /* For floating-point or multi-word mode, the only remaining valid type
1027 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1028 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
1029 return register_operand (op, mode);
1031 /* The only cases left are integral modes one word or smaller (we
1032 do not get called for MODE_CC values). These can be in any
1034 if (register_operand (op, mode))
1037 /* A SYMBOL_REF referring to the TOC is valid. */
1038 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
1041 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
1042 directly in the instruction stream */
1043 if (DEFAULT_ABI == ABI_NT
1044 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF))
1047 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1049 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1050 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST)
1051 && small_data_operand (op, Pmode))
1057 /* Return 1 for an operand in small memory on V.4/eabi */
1060 small_data_operand (op, mode)
1062 enum machine_mode mode;
1065 rtx sym_ref, const_part;
1067 if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA)
1070 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
1073 if (GET_CODE (op) == SYMBOL_REF)
1076 else if (GET_CODE (op) != CONST
1077 || GET_CODE (XEXP (op, 0)) != PLUS
1078 || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF
1079 || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT)
1083 sym_ref = XEXP (XEXP (op, 0), 0);
1085 if (*XSTR (sym_ref, 0) != '@')
1096 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1097 for a call to a function whose data type is FNTYPE.
1098 For a library call, FNTYPE is 0.
1100 For incoming args we set the number of arguments in the prototype large
1101 so we never return a PARALLEL. */
1104 init_cumulative_args (cum, fntype, libname, incoming)
1105 CUMULATIVE_ARGS *cum;
1110 static CUMULATIVE_ARGS zero_cumulative;
1111 enum rs6000_abi abi = DEFAULT_ABI;
1113 *cum = zero_cumulative;
1115 cum->fregno = FP_ARG_MIN_REG;
1116 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
1117 cum->call_cookie = CALL_NORMAL;
1121 cum->nargs_prototype = 1000; /* don't return a PARALLEL */
1122 if (abi == ABI_V4 || abi == ABI_SOLARIS)
1123 cum->varargs_offset = RS6000_VARARGS_OFFSET;
1126 else if (cum->prototype)
1127 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
1128 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
1129 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
1132 cum->nargs_prototype = 0;
1134 cum->orig_nargs = cum->nargs_prototype;
1136 /* Check for DLL import functions */
1139 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype)))
1140 cum->call_cookie = CALL_NT_DLLIMPORT;
1142 /* Also check for longcall's */
1143 else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype)))
1144 cum->call_cookie = CALL_LONG;
1146 if (TARGET_DEBUG_ARG)
1148 fprintf (stderr, "\ninit_cumulative_args:");
1151 tree ret_type = TREE_TYPE (fntype);
1152 fprintf (stderr, " ret code = %s,",
1153 tree_code_name[ (int)TREE_CODE (ret_type) ]);
1156 if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming)
1157 fprintf (stderr, " varargs = %d, ", cum->varargs_offset);
1159 if (cum->call_cookie & CALL_NT_DLLIMPORT)
1160 fprintf (stderr, " dllimport,");
1162 if (cum->call_cookie & CALL_LONG)
1163 fprintf (stderr, " longcall,");
1165 fprintf (stderr, " proto = %d, nargs = %d\n",
1166 cum->prototype, cum->nargs_prototype);
1170 /* If defined, a C expression that gives the alignment boundary, in bits,
1171 of an argument with the specified mode and type. If it is not defined,
1172 PARM_BOUNDARY is used for all arguments.
1174 Windows NT wants anything >= 8 bytes to be double word aligned.
1176 V.4 wants long longs to be double word aligned. */
1179 function_arg_boundary (mode, type)
1180 enum machine_mode mode;
1183 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode)
1186 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
1187 return PARM_BOUNDARY;
1189 if (mode != BLKmode)
1190 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32;
1192 return (int_size_in_bytes (type) >= 8) ? 64 : 32;
1195 /* Update the data in CUM to advance over an argument
1196 of mode MODE and data type TYPE.
1197 (TYPE is null for libcalls where that information may not be available.) */
1200 function_arg_advance (cum, mode, type, named)
1201 CUMULATIVE_ARGS *cum;
1202 enum machine_mode mode;
1206 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1207 cum->words += align;
1208 cum->nargs_prototype--;
1210 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1212 /* Long longs must not be split between registers and stack */
1213 if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT)
1214 && type && !AGGREGATE_TYPE_P (type)
1215 && cum->words < GP_ARG_NUM_REG
1216 && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1218 cum->words = GP_ARG_NUM_REG;
1221 /* Aggregates get passed as pointers */
1222 if (type && AGGREGATE_TYPE_P (type))
1225 /* Floats go in registers, & don't occupy space in the GP registers
1226 like they do for AIX unless software floating point. */
1227 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1228 && TARGET_HARD_FLOAT
1229 && cum->fregno <= FP_ARG_V4_MAX_REG)
1233 cum->words += RS6000_ARG_SIZE (mode, type, 1);
1238 cum->words += RS6000_ARG_SIZE (mode, type, named);
1239 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
1243 if (TARGET_DEBUG_ARG)
1245 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1246 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1249 /* Determine where to put an argument to a function.
1250 Value is zero to push the argument on the stack,
1251 or a hard register in which to store the argument.
1253 MODE is the argument's machine mode.
1254 TYPE is the data type of the argument (as a tree).
1255 This is null for libcalls where that information may
1257 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1258 the preceding args and about the function being called.
1259 NAMED is nonzero if this argument is a named parameter
1260 (otherwise it is an extra parameter matching an ellipsis).
1262 On RS/6000 the first eight words of non-FP are normally in registers
1263 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1264 Under V.4, the first 8 FP args are in registers.
1266 If this is floating-point and no prototype is specified, we use
1267 both an FP and integer register (or possibly FP reg and stack). Library
1268 functions (when TYPE is zero) always have the proper types for args,
1269 so we can pass the FP value just in one register. emit_library_function
1270 doesn't support PARALLEL anyway. */
1273 function_arg (cum, mode, type, named)
1274 CUMULATIVE_ARGS *cum;
1275 enum machine_mode mode;
1279 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1280 int align_words = cum->words + align;
1282 if (TARGET_DEBUG_ARG)
1284 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1285 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1287 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1288 uses to say fp args were passed in registers. Assume that we don't need the
1289 marker for software floating point, or compiler generated library calls. */
1290 if (mode == VOIDmode)
1292 enum rs6000_abi abi = DEFAULT_ABI;
1294 if ((abi == ABI_V4 || abi == ABI_SOLARIS)
1295 && TARGET_HARD_FLOAT
1296 && cum->nargs_prototype < 0
1297 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
1299 return GEN_INT (cum->call_cookie
1300 | ((cum->fregno == FP_ARG_MIN_REG)
1301 ? CALL_V4_SET_FP_ARGS
1302 : CALL_V4_CLEAR_FP_ARGS));
1305 return GEN_INT (cum->call_cookie);
1310 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
1314 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1317 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1319 if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */
1320 || DEFAULT_ABI == ABI_SOLARIS
1322 || ((cum->nargs_prototype > 0)
1323 /* IBM AIX extended its linkage convention definition always to
1324 require FP args after register save area hole on the stack. */
1325 && (DEFAULT_ABI != ABI_AIX
1327 || (align_words < GP_ARG_NUM_REG))))
1328 return gen_rtx (REG, mode, cum->fregno);
1330 return gen_rtx (PARALLEL, mode,
1333 gen_rtx (EXPR_LIST, VOIDmode,
1334 ((align_words >= GP_ARG_NUM_REG)
1337 + RS6000_ARG_SIZE (mode, type, named)
1339 /* If this is partially on the stack, then
1340 we only include the portion actually
1341 in registers here. */
1342 ? gen_rtx (REG, SImode,
1343 GP_ARG_MIN_REG + align_words)
1344 : gen_rtx (REG, mode,
1345 GP_ARG_MIN_REG + align_words))),
1347 gen_rtx (EXPR_LIST, VOIDmode,
1348 gen_rtx (REG, mode, cum->fregno),
1352 /* Long longs won't be split between register and stack;
1353 FP arguments get passed on the stack if they didn't get a register. */
1354 else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) &&
1355 (align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG
1356 || (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)))
1361 else if (align_words < GP_ARG_NUM_REG)
1362 return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words);
1367 /* For an arg passed partly in registers and partly in memory,
1368 this is the number of registers used.
1369 For args passed entirely in registers or entirely in memory, zero. */
1372 function_arg_partial_nregs (cum, mode, type, named)
1373 CUMULATIVE_ARGS *cum;
1374 enum machine_mode mode;
1381 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1384 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1386 if (cum->nargs_prototype >= 0)
1390 if (cum->words < GP_ARG_NUM_REG
1391 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
1393 int ret = GP_ARG_NUM_REG - cum->words;
1394 if (ret && TARGET_DEBUG_ARG)
1395 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
1403 /* A C expression that indicates when an argument must be passed by
1404 reference. If nonzero for an argument, a copy of that argument is
1405 made in memory and a pointer to the argument is passed instead of
1406 the argument itself. The pointer is passed in whatever way is
1407 appropriate for passing a pointer to that type.
1409 Under V.4, structures and unions are passed by reference. */
1412 function_arg_pass_by_reference (cum, mode, type, named)
1413 CUMULATIVE_ARGS *cum;
1414 enum machine_mode mode;
1418 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1419 && type && AGGREGATE_TYPE_P (type))
1421 if (TARGET_DEBUG_ARG)
1422 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
1431 /* Perform any needed actions needed for a function that is receiving a
1432 variable number of arguments.
1436 MODE and TYPE are the mode and type of the current parameter.
1438 PRETEND_SIZE is a variable that should be set to the amount of stack
1439 that must be pushed by the prolog to pretend that our caller pushed
1442 Normally, this macro will push all remaining incoming registers on the
1443 stack and set PRETEND_SIZE to the length of the registers pushed. */
1446 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1447 CUMULATIVE_ARGS *cum;
1448 enum machine_mode mode;
1454 rtx save_area = virtual_incoming_args_rtx;
1455 int reg_size = (TARGET_64BIT) ? 8 : 4;
1457 if (TARGET_DEBUG_ARG)
1459 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1460 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl);
1462 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && !no_rtl)
1464 rs6000_sysv_varargs_p = 1;
1465 save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET);
1470 int first_reg_offset = cum->words;
1472 if (MUST_PASS_IN_STACK (mode, type))
1473 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
1475 if (first_reg_offset > GP_ARG_NUM_REG)
1476 first_reg_offset = GP_ARG_NUM_REG;
1478 if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
1480 (GP_ARG_MIN_REG + first_reg_offset,
1481 gen_rtx (MEM, BLKmode,
1482 plus_constant (save_area, first_reg_offset * reg_size)),
1483 GP_ARG_NUM_REG - first_reg_offset,
1484 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
1486 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
1489 /* Save FP registers if needed. */
1490 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl)
1492 int fregno = cum->fregno;
1493 int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno;
1495 if (num_fp_reg >= 0)
1497 rtx cr1 = gen_rtx (REG, CCmode, 69);
1498 rtx lab = gen_label_rtx ();
1499 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
1501 emit_jump_insn (gen_rtx (SET, VOIDmode,
1503 gen_rtx (IF_THEN_ELSE, VOIDmode,
1504 gen_rtx (NE, VOIDmode, cr1, const0_rtx),
1505 gen_rtx (LABEL_REF, VOIDmode, lab),
1508 while ( num_fp_reg-- >= 0)
1510 emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)),
1511 gen_rtx (REG, DFmode, fregno++));
1520 /* If defined, is a C expression that produces the machine-specific
1521 code for a call to `__builtin_saveregs'. This code will be moved
1522 to the very beginning of the function, before any parameter access
1523 are made. The return value of this function should be an RTX that
1524 contains the value to use as the return of `__builtin_saveregs'.
1526 The argument ARGS is a `tree_list' containing the arguments that
1527 were passed to `__builtin_saveregs'.
1529 If this macro is not defined, the compiler will output an ordinary
1530 call to the library function `__builtin_saveregs'.
1532 On the Power/PowerPC return the address of the area on the stack
1533 used to hold arguments. Under AIX, this includes the 8 word register
1534 save area. Under V.4 this does not. */
1537 expand_builtin_saveregs (args)
1540 return virtual_incoming_args_rtx;
1544 /* Generate a memory reference for expand_block_move, copying volatile,
1545 and other bits from an original memory reference. */
1548 expand_block_move_mem (mode, addr, orig_mem)
1549 enum machine_mode mode;
1553 rtx mem = gen_rtx (MEM, mode, addr);
1555 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
1556 MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
1557 MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem);
1558 #ifdef MEM_UNALIGNED_P
1559 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
1564 /* Expand a block move operation, and return 1 if successful. Return 0
1565 if we should let the compiler generate normal code.
1567 operands[0] is the destination
1568 operands[1] is the source
1569 operands[2] is the length
1570 operands[3] is the alignment */
1572 #define MAX_MOVE_REG 4
1575 expand_block_move (operands)
1578 rtx orig_dest = operands[0];
1579 rtx orig_src = operands[1];
1580 rtx bytes_rtx = operands[2];
1581 rtx align_rtx = operands[3];
1582 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
1583 int align = XINT (align_rtx, 0);
1593 rtx stores[MAX_MOVE_REG];
1596 /* If this is not a fixed size move, just call memcpy */
1600 /* Anything to move? */
1601 bytes = INTVAL (bytes_rtx);
1605 /* Don't support real large moves. If string instructions are not used,
1606 then don't generate more than 8 loads. */
1612 else if (!STRICT_ALIGNMENT)
1617 else if (bytes > 8*align)
1620 /* Move the address into scratch registers. */
1621 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
1622 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
1624 if (TARGET_STRING) /* string instructions are available */
1626 for ( ; bytes > 0; bytes -= move_bytes)
1628 if (bytes > 24 /* move up to 32 bytes at a time */
1638 move_bytes = (bytes > 32) ? 32 : bytes;
1639 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1640 expand_block_move_mem (BLKmode, src_reg, orig_src),
1641 GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
1644 else if (bytes > 16 /* move up to 24 bytes at a time */
1652 move_bytes = (bytes > 24) ? 24 : bytes;
1653 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1654 expand_block_move_mem (BLKmode, src_reg, orig_src),
1655 GEN_INT (move_bytes),
1658 else if (bytes > 8 /* move up to 16 bytes at a time */
1664 move_bytes = (bytes > 16) ? 16 : bytes;
1665 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1666 expand_block_move_mem (BLKmode, src_reg, orig_src),
1667 GEN_INT (move_bytes),
1670 else if (bytes > 4 && !TARGET_64BIT)
1671 { /* move up to 8 bytes at a time */
1672 move_bytes = (bytes > 8) ? 8 : bytes;
1673 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1674 expand_block_move_mem (BLKmode, src_reg, orig_src),
1675 GEN_INT (move_bytes),
1678 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1679 { /* move 4 bytes */
1681 tmp_reg = gen_reg_rtx (SImode);
1682 emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
1683 emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
1685 else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
1686 { /* move 2 bytes */
1688 tmp_reg = gen_reg_rtx (HImode);
1689 emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
1690 emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
1692 else if (bytes == 1) /* move 1 byte */
1695 tmp_reg = gen_reg_rtx (QImode);
1696 emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
1697 emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
1700 { /* move up to 4 bytes at a time */
1701 move_bytes = (bytes > 4) ? 4 : bytes;
1702 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1703 expand_block_move_mem (BLKmode, src_reg, orig_src),
1704 GEN_INT (move_bytes),
1708 if (bytes > move_bytes)
1710 emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
1711 emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
1716 else /* string instructions not available */
1718 num_reg = offset = 0;
1719 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
1721 /* Calculate the correct offset for src/dest */
1725 dest_addr = dest_reg;
1729 src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset));
1730 dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset));
1733 /* Generate the appropriate load and store, saving the stores for later */
1734 if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
1737 tmp_reg = gen_reg_rtx (DImode);
1738 emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
1739 stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
1741 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1744 tmp_reg = gen_reg_rtx (SImode);
1745 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
1746 stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
1748 else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
1751 tmp_reg = gen_reg_rtx (HImode);
1752 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
1753 stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
1758 tmp_reg = gen_reg_rtx (QImode);
1759 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
1760 stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
1763 if (num_reg >= MAX_MOVE_REG)
1765 for (i = 0; i < num_reg; i++)
1766 emit_insn (stores[i]);
1771 for (i = 0; i < num_reg; i++)
1772 emit_insn (stores[i]);
1779 /* Return 1 if OP is a load multiple operation. It is known to be a
1780 PARALLEL and the first section will be tested. */
1783 load_multiple_operation (op, mode)
1785 enum machine_mode mode;
1787 int count = XVECLEN (op, 0);
1792 /* Perform a quick check so we don't blow up below. */
1794 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1795 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1796 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1799 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1800 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1802 for (i = 1; i < count; i++)
1804 rtx elt = XVECEXP (op, 0, i);
1806 if (GET_CODE (elt) != SET
1807 || GET_CODE (SET_DEST (elt)) != REG
1808 || GET_MODE (SET_DEST (elt)) != SImode
1809 || REGNO (SET_DEST (elt)) != dest_regno + i
1810 || GET_CODE (SET_SRC (elt)) != MEM
1811 || GET_MODE (SET_SRC (elt)) != SImode
1812 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1813 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1814 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1815 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
1822 /* Similar, but tests for store multiple. Here, the second vector element
1823 is a CLOBBER. It will be tested later. */
1826 store_multiple_operation (op, mode)
1828 enum machine_mode mode;
1830 int count = XVECLEN (op, 0) - 1;
1835 /* Perform a quick check so we don't blow up below. */
1837 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1838 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1839 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1842 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1843 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1845 for (i = 1; i < count; i++)
1847 rtx elt = XVECEXP (op, 0, i + 1);
1849 if (GET_CODE (elt) != SET
1850 || GET_CODE (SET_SRC (elt)) != REG
1851 || GET_MODE (SET_SRC (elt)) != SImode
1852 || REGNO (SET_SRC (elt)) != src_regno + i
1853 || GET_CODE (SET_DEST (elt)) != MEM
1854 || GET_MODE (SET_DEST (elt)) != SImode
1855 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1856 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1857 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1858 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
1865 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1866 We only check the opcode against the mode of the CC value here. */
1869 branch_comparison_operator (op, mode)
1871 enum machine_mode mode;
1873 enum rtx_code code = GET_CODE (op);
1874 enum machine_mode cc_mode;
1876 if (GET_RTX_CLASS (code) != '<')
1879 cc_mode = GET_MODE (XEXP (op, 0));
1880 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1883 if ((code == GT || code == LT || code == GE || code == LE)
1884 && cc_mode == CCUNSmode)
1887 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1888 && (cc_mode != CCUNSmode))
1894 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1895 We check the opcode against the mode of the CC value and disallow EQ or
1896 NE comparisons for integers. */
1899 scc_comparison_operator (op, mode)
1901 enum machine_mode mode;
1903 enum rtx_code code = GET_CODE (op);
1904 enum machine_mode cc_mode;
1906 if (GET_MODE (op) != mode && mode != VOIDmode)
1909 if (GET_RTX_CLASS (code) != '<')
1912 cc_mode = GET_MODE (XEXP (op, 0));
1913 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1916 if (code == NE && cc_mode != CCFPmode)
1919 if ((code == GT || code == LT || code == GE || code == LE)
1920 && cc_mode == CCUNSmode)
1923 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1924 && (cc_mode != CCUNSmode))
1927 if (cc_mode == CCEQmode && code != EQ && code != NE)
1933 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1934 mask required to convert the result of a rotate insn into a shift
1935 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1938 includes_lshift_p (shiftop, andop)
1939 register rtx shiftop;
1942 int shift_mask = (~0 << INTVAL (shiftop));
1944 return (INTVAL (andop) & ~shift_mask) == 0;
1947 /* Similar, but for right shift. */
1950 includes_rshift_p (shiftop, andop)
1951 register rtx shiftop;
1954 unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0;
1956 shift_mask >>= INTVAL (shiftop);
1958 return (INTVAL (andop) & ~ shift_mask) == 0;
1961 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1962 for lfq and stfq insns.
1964 Note reg1 and reg2 *must* be hard registers. To be sure we will
1965 abort if we are passed pseudo registers. */
1968 registers_ok_for_quad_peep (reg1, reg2)
1971 /* We might have been passed a SUBREG. */
1972 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
1975 return (REGNO (reg1) == REGNO (reg2) - 1);
1978 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1979 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1982 addrs_ok_for_quad_peep (addr1, addr2)
1989 /* Extract an offset (if used) from the first addr. */
1990 if (GET_CODE (addr1) == PLUS)
1992 /* If not a REG, return zero. */
1993 if (GET_CODE (XEXP (addr1, 0)) != REG)
1997 reg1 = REGNO (XEXP (addr1, 0));
1998 /* The offset must be constant! */
1999 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
2001 offset1 = INTVAL (XEXP (addr1, 1));
2004 else if (GET_CODE (addr1) != REG)
2008 reg1 = REGNO (addr1);
2009 /* This was a simple (mem (reg)) expression. Offset is 0. */
2013 /* Make sure the second address is a (mem (plus (reg) (const_int). */
2014 if (GET_CODE (addr2) != PLUS)
2017 if (GET_CODE (XEXP (addr2, 0)) != REG
2018 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
2021 if (reg1 != REGNO (XEXP (addr2, 0)))
2024 /* The offset for the second addr must be 8 more than the first addr. */
2025 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
2028 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
2033 /* Return the register class of a scratch register needed to copy IN into
2034 or out of a register in CLASS in MODE. If it can be done directly,
2035 NO_REGS is returned. */
2038 secondary_reload_class (class, mode, in)
2039 enum reg_class class;
2040 enum machine_mode mode;
2043 int regno = true_regnum (in);
2045 if (regno >= FIRST_PSEUDO_REGISTER)
2048 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
2050 if (class == GENERAL_REGS || class == BASE_REGS
2051 || (regno >= 0 && INT_REGNO_P (regno)))
2054 /* Constants, memory, and FP registers can go into FP registers. */
2055 if ((regno == -1 || FP_REGNO_P (regno))
2056 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
2059 /* We can copy among the CR registers. */
2060 if ((class == CR_REGS || class == CR0_REGS)
2061 && regno >= 0 && CR_REGNO_P (regno))
2064 /* Otherwise, we need GENERAL_REGS. */
2065 return GENERAL_REGS;
2068 /* Given a comparison operation, return the bit number in CCR to test. We
2069 know this is a valid comparison.
2071 SCC_P is 1 if this is for an scc. That means that %D will have been
2072 used instead of %C, so the bits will be in different places.
2074 Return -1 if OP isn't a valid comparison for some reason. */
2081 enum rtx_code code = GET_CODE (op);
2082 enum machine_mode cc_mode;
2086 if (GET_RTX_CLASS (code) != '<')
2089 cc_mode = GET_MODE (XEXP (op, 0));
2090 cc_regnum = REGNO (XEXP (op, 0));
2091 base_bit = 4 * (cc_regnum - 68);
2093 /* In CCEQmode cases we have made sure that the result is always in the
2094 third bit of the CR field. */
2096 if (cc_mode == CCEQmode)
2097 return base_bit + 3;
2102 return scc_p ? base_bit + 3 : base_bit + 2;
2104 return base_bit + 2;
2106 return base_bit + 1;
2111 /* If floating-point, we will have done a cror to put the bit in the
2112 unordered position. So test that bit. For integer, this is ! LT
2113 unless this is an scc insn. */
2114 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
2117 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
2124 /* Return the GOT register, creating it if needed. */
2127 rs6000_got_register (value)
2130 if (!current_function_uses_pic_offset_table || !pic_offset_table_rtx)
2132 if (reload_in_progress || reload_completed)
2133 fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value);
2135 current_function_uses_pic_offset_table = 1;
2136 pic_offset_table_rtx = gen_rtx (REG, Pmode, GOT_TOC_REGNUM);
2139 return pic_offset_table_rtx;
2143 /* Replace all occurrences of register FROM with an new pseudo register in an insn X.
2144 Store the pseudo register used in REG.
2145 This is only safe during FINALIZE_PIC, since the registers haven't been setup
2149 rs6000_replace_regno (x, from, reg)
2157 /* Allow this function to make replacements in EXPR_LISTs. */
2161 switch (GET_CODE (x))
2174 if (REGNO (x) == from)
2177 *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode);
2185 fmt = GET_RTX_FORMAT (GET_CODE (x));
2186 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2189 XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg);
2190 else if (fmt[i] == 'E')
2191 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2192 XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg);
2199 /* By generating position-independent code, when two different
2200 programs (A and B) share a common library (libC.a), the text of
2201 the library can be shared whether or not the library is linked at
2202 the same address for both programs. In some of these
2203 environments, position-independent code requires not only the use
2204 of different addressing modes, but also special code to enable the
2205 use of these addressing modes.
2207 The `FINALIZE_PIC' macro serves as a hook to emit these special
2208 codes once the function is being compiled into assembly code, but
2209 not before. (It is not done before, because in the case of
2210 compiling an inline function, it would lead to multiple PIC
2211 prologues being included in functions which used inline functions
2212 and were compiled to assembly language.) */
2215 rs6000_finalize_pic ()
2217 /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM
2218 with an appropriate pseudo register. If we find we need GOT/TOC,
2219 add the appropriate init code. */
2220 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
2222 rtx insn = get_insns ();
2225 rtx last_insn = NULL_RTX;
2227 if (GET_CODE (insn) == NOTE)
2228 insn = next_nonnote_insn (insn);
2231 for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn))
2233 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2235 PATTERN (insn) = rs6000_replace_regno (PATTERN (insn),
2239 if (REG_NOTES (insn))
2240 REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn),
2245 if (GET_CODE (insn) != NOTE)
2251 rtx init = gen_init_v4_pic (reg);
2252 emit_insn_before (init, first_insn);
2253 if (!optimize && last_insn)
2254 emit_insn_after (gen_rtx (USE, VOIDmode, reg), last_insn);
2260 /* Search for any occurrence of the GOT_TOC register marker that should
2261 have been eliminated, but may have crept back in. */
2267 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
2269 rtx got_reg = gen_rtx (REG, Pmode, GOT_TOC_REGNUM);
2270 for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn))
2271 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2272 && reg_mentioned_p (got_reg, PATTERN (insn)))
2273 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn));
2278 /* Define the structure for the machine field in struct function. */
2279 struct machine_function
2285 rtx pic_offset_table_rtx;
2288 /* Functions to save and restore rs6000_fpmem_size.
2289 These will be called, via pointer variables,
2290 from push_function_context and pop_function_context. */
2293 rs6000_save_machine_status (p)
2296 struct machine_function *machine =
2297 (struct machine_function *) xmalloc (sizeof (struct machine_function));
2299 p->machine = machine;
2300 machine->sysv_varargs_p = rs6000_sysv_varargs_p;
2301 machine->fpmem_size = rs6000_fpmem_size;
2302 machine->fpmem_offset = rs6000_fpmem_offset;
2303 machine->pic_offset_table_rtx = pic_offset_table_rtx;
2307 rs6000_restore_machine_status (p)
2310 struct machine_function *machine = p->machine;
2312 rs6000_sysv_varargs_p = machine->sysv_varargs_p;
2313 rs6000_fpmem_size = machine->fpmem_size;
2314 rs6000_fpmem_offset = machine->fpmem_offset;
2315 pic_offset_table_rtx = machine->pic_offset_table_rtx;
2318 p->machine = (struct machine_function *)0;
2321 /* Do anything needed before RTL is emitted for each function. */
2324 rs6000_init_expanders ()
2326 /* Reset varargs and save TOC indicator */
2327 rs6000_sysv_varargs_p = 0;
2328 rs6000_fpmem_size = 0;
2329 rs6000_fpmem_offset = 0;
2330 pic_offset_table_rtx = (rtx)0;
2332 /* Arrange to save and restore machine status around nested functions. */
2333 save_machine_status = rs6000_save_machine_status;
2334 restore_machine_status = rs6000_restore_machine_status;
2338 /* Print an operand. Recognize special options, documented below. */
2341 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2342 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
2344 #define SMALL_DATA_RELOC "sda21"
2345 #define SMALL_DATA_REG 0
2349 print_operand (file, x, code)
2357 /* These macros test for integers and extract the low-order bits. */
2359 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2360 && GET_MODE (X) == VOIDmode)
2362 #define INT_LOWPART(X) \
2363 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2368 /* Write out an instruction after the call which may be replaced
2369 with glue code by the loader. This depends on the AIX version. */
2370 asm_fprintf (file, RS6000_CALL_GLUE);
2374 /* Write the register number of the TOC register. */
2375 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file);
2379 /* Write out either a '.' or '$' for the current location, depending
2380 on whether this is Solaris or not. */
2381 putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file);
2385 /* If X is a constant integer whose low-order 5 bits are zero,
2386 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2387 in the AIX assembler where "sri" with a zero shift count
2388 write a trash instruction. */
2389 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
2396 /* Low-order 16 bits of constant, unsigned. */
2398 output_operand_lossage ("invalid %%b value");
2400 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2404 /* This is an optional cror needed for LE or GE floating-point
2405 comparisons. Otherwise write nothing. */
2406 if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
2407 && GET_MODE (XEXP (x, 0)) == CCFPmode)
2409 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2411 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2412 base_bit + 2, base_bit + (GET_CODE (x) == GE));
2417 /* Similar, except that this is for an scc, so we must be able to
2418 encode the test in a single bit that is one. We do the above
2419 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2420 if (GET_CODE (x) == LE || GET_CODE (x) == GE
2421 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
2423 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2425 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2427 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
2430 else if (GET_CODE (x) == NE)
2432 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2434 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
2435 base_bit + 2, base_bit + 2);
2440 /* X is a CR register. Print the number of the third bit of the CR */
2441 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2442 output_operand_lossage ("invalid %%E value");
2444 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
2448 /* X is a CR register. Print the shift count needed to move it
2449 to the high-order four bits. */
2450 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2451 output_operand_lossage ("invalid %%f value");
2453 fprintf (file, "%d", 4 * (REGNO (x) - 68));
2457 /* Similar, but print the count for the rotate in the opposite
2459 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2460 output_operand_lossage ("invalid %%F value");
2462 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
2466 /* X is a constant integer. If it is negative, print "m",
2467 otherwise print "z". This is to make a aze or ame insn. */
2468 if (GET_CODE (x) != CONST_INT)
2469 output_operand_lossage ("invalid %%G value");
2470 else if (INTVAL (x) >= 0)
2477 /* If constant, output low-order five bits. Otherwise,
2480 fprintf (file, "%d", INT_LOWPART (x) & 31);
2482 print_operand (file, x, 0);
2486 /* If constant, output low-order six bits. Otherwise,
2489 fprintf (file, "%d", INT_LOWPART (x) & 63);
2491 print_operand (file, x, 0);
2495 /* Print `i' if this is a constant, else nothing. */
2501 /* Write the bit number in CCR for jump. */
2504 output_operand_lossage ("invalid %%j code");
2506 fprintf (file, "%d", i);
2510 /* Similar, but add one for shift count in rlinm for scc and pass
2511 scc flag to `ccr_bit'. */
2514 output_operand_lossage ("invalid %%J code");
2516 /* If we want bit 31, write a shift count of zero, not 32. */
2517 fprintf (file, "%d", i == 31 ? 0 : i + 1);
2521 /* X must be a constant. Write the 1's complement of the
2524 output_operand_lossage ("invalid %%k value");
2526 fprintf (file, "%d", ~ INT_LOWPART (x));
2530 /* Write second word of DImode or DFmode reference. Works on register
2531 or non-indexed memory only. */
2532 if (GET_CODE (x) == REG)
2533 fprintf (file, "%s", reg_names[REGNO (x) + 1]);
2534 else if (GET_CODE (x) == MEM)
2536 /* Handle possible auto-increment. Since it is pre-increment and
2537 we have already done it, we can just use an offset of four. */
2538 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2539 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2540 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
2542 output_address (plus_constant (XEXP (x, 0), 4));
2543 if (small_data_operand (x, GET_MODE (x)))
2544 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
2545 reg_names[SMALL_DATA_REG]);
2550 /* MB value for a mask operand. */
2551 if (! mask_operand (x, VOIDmode))
2552 output_operand_lossage ("invalid %%m value");
2554 val = INT_LOWPART (x);
2556 /* If the high bit is set and the low bit is not, the value is zero.
2557 If the high bit is zero, the value is the first 1 bit we find from
2559 if (val < 0 && (val & 1) == 0)
2566 for (i = 1; i < 32; i++)
2567 if ((val <<= 1) < 0)
2569 fprintf (file, "%d", i);
2573 /* Otherwise, look for the first 0 bit from the right. The result is its
2574 number plus 1. We know the low-order bit is one. */
2575 for (i = 0; i < 32; i++)
2576 if (((val >>= 1) & 1) == 0)
2579 /* If we ended in ...01, I would be 0. The correct value is 31, so
2581 fprintf (file, "%d", 31 - i);
2585 /* ME value for a mask operand. */
2586 if (! mask_operand (x, VOIDmode))
2587 output_operand_lossage ("invalid %%m value");
2589 val = INT_LOWPART (x);
2591 /* If the low bit is set and the high bit is not, the value is 31.
2592 If the low bit is zero, the value is the first 1 bit we find from
2594 if ((val & 1) && val >= 0)
2599 else if ((val & 1) == 0)
2601 for (i = 0; i < 32; i++)
2602 if ((val >>= 1) & 1)
2605 /* If we had ....10, I would be 0. The result should be
2606 30, so we need 30 - i. */
2607 fprintf (file, "%d", 30 - i);
2611 /* Otherwise, look for the first 0 bit from the left. The result is its
2612 number minus 1. We know the high-order bit is one. */
2613 for (i = 0; i < 32; i++)
2614 if ((val <<= 1) >= 0)
2617 fprintf (file, "%d", i);
2621 /* Write the number of elements in the vector times 4. */
2622 if (GET_CODE (x) != PARALLEL)
2623 output_operand_lossage ("invalid %%N value");
2625 fprintf (file, "%d", XVECLEN (x, 0) * 4);
2629 /* Similar, but subtract 1 first. */
2630 if (GET_CODE (x) != PARALLEL)
2631 output_operand_lossage ("invalid %%N value");
2633 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
2637 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2639 || (i = exact_log2 (INT_LOWPART (x))) < 0)
2640 output_operand_lossage ("invalid %%p value");
2642 fprintf (file, "%d", i);
2646 /* The operand must be an indirect memory reference. The result
2647 is the register number. */
2648 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
2649 || REGNO (XEXP (x, 0)) >= 32)
2650 output_operand_lossage ("invalid %%P value");
2652 fprintf (file, "%d", REGNO (XEXP (x, 0)));
2656 /* X is a CR register. Print the mask for `mtcrf'. */
2657 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2658 output_operand_lossage ("invalid %%R value");
2660 fprintf (file, "%d", 128 >> (REGNO (x) - 68));
2664 /* Low 5 bits of 32 - value */
2666 output_operand_lossage ("invalid %%s value");
2668 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
2672 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2673 All floating-point operations except NE branch true and integer
2674 EQ, LT, GT, LTU and GTU also branch true. */
2675 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2676 output_operand_lossage ("invalid %%t value");
2678 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2679 && GET_CODE (x) != NE)
2680 || GET_CODE (x) == EQ
2681 || GET_CODE (x) == LT || GET_CODE (x) == GT
2682 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2689 /* Opposite of 't': write 4 if this jump operation will branch if true,
2691 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2692 output_operand_lossage ("invalid %%t value");
2694 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2695 && GET_CODE (x) != NE)
2696 || GET_CODE (x) == EQ
2697 || GET_CODE (x) == LT || GET_CODE (x) == GT
2698 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2705 /* High-order 16 bits of constant for use in unsigned operand. */
2707 output_operand_lossage ("invalid %%u value");
2709 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
2713 /* High-order 16 bits of constant for use in signed operand. */
2715 output_operand_lossage ("invalid %%v value");
2718 int value = (INT_LOWPART (x) >> 16) & 0xffff;
2720 /* Solaris assembler doesn't like lis 0,0x80000 */
2721 if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0)
2722 fprintf (file, "%d", value | (~0 << 16));
2724 fprintf (file, "0x%x", value);
2729 /* Print `u' if this has an auto-increment or auto-decrement. */
2730 if (GET_CODE (x) == MEM
2731 && (GET_CODE (XEXP (x, 0)) == PRE_INC
2732 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
2737 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2740 fprintf (file, "%d",
2741 (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
2743 print_operand (file, x, 0);
2747 /* If constant, low-order 16 bits of constant, unsigned.
2748 Otherwise, write normally. */
2750 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2752 print_operand (file, x, 0);
2756 if (GET_CODE (x) == MEM
2757 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
2762 /* Like 'L', for third word of TImode */
2763 if (GET_CODE (x) == REG)
2764 fprintf (file, "%s", reg_names[REGNO (x) + 2]);
2765 else if (GET_CODE (x) == MEM)
2767 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2768 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2769 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
2771 output_address (plus_constant (XEXP (x, 0), 8));
2772 if (small_data_operand (x, GET_MODE (x)))
2773 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
2774 reg_names[SMALL_DATA_REG]);
2779 /* X is a SYMBOL_REF. Write out the name preceded by a
2780 period and without any trailing data in brackets. Used for function
2781 names. If we are configured for System V (or the embedded ABI) on
2782 the PowerPC, do not emit the period, since those systems do not use
2783 TOCs and the like. */
2784 if (GET_CODE (x) != SYMBOL_REF)
2787 if (XSTR (x, 0)[0] != '.')
2789 switch (DEFAULT_ABI)
2799 case ABI_AIX_NODESC:
2808 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
2812 /* Like 'L', for last word of TImode. */
2813 if (GET_CODE (x) == REG)
2814 fprintf (file, "%s", reg_names[REGNO (x) + 3]);
2815 else if (GET_CODE (x) == MEM)
2817 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2818 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2819 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
2821 output_address (plus_constant (XEXP (x, 0), 12));
2822 if (small_data_operand (x, GET_MODE (x)))
2823 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
2824 reg_names[SMALL_DATA_REG]);
2829 if (GET_CODE (x) == REG)
2830 fprintf (file, "%s", reg_names[REGNO (x)]);
2831 else if (GET_CODE (x) == MEM)
2833 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2834 know the width from the mode. */
2835 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
2836 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
2837 REGNO (XEXP (XEXP (x, 0), 0)));
2838 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
2839 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
2840 REGNO (XEXP (XEXP (x, 0), 0)));
2842 output_address (XEXP (x, 0));
2845 output_addr_const (file, x);
2849 output_operand_lossage ("invalid %%xn code");
2853 /* Print the address of an operand. */
2856 print_operand_address (file, x)
2860 if (GET_CODE (x) == REG)
2861 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
2862 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF)
2864 output_addr_const (file, x);
2865 if (small_data_operand (x, GET_MODE (x)))
2866 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
2867 reg_names[SMALL_DATA_REG]);
2869 #ifdef TARGET_NO_TOC
2870 else if (TARGET_NO_TOC)
2874 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]);
2876 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
2878 if (REGNO (XEXP (x, 0)) == 0)
2879 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
2880 reg_names[ REGNO (XEXP (x, 0)) ]);
2882 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
2883 reg_names[ REGNO (XEXP (x, 1)) ]);
2885 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
2886 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
2887 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM
2888 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1)))
2890 output_addr_const (file, XEXP (x, 1));
2891 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
2897 /* This page contains routines that are used to determine what the function
2898 prologue and epilogue code will do and write them out. */
2900 /* Return the first fixed-point register that is required to be saved. 32 if
2904 first_reg_to_save ()
2908 /* Find lowest numbered live register. */
2909 for (first_reg = 13; first_reg <= 31; first_reg++)
2910 if (regs_ever_live[first_reg])
2913 /* If profiling, then we must save/restore every register that contains
2914 a parameter before/after the .__mcount call. Use registers from 30 down
2915 to 23 to do this. Don't use the frame pointer in reg 31.
2917 For now, save enough room for all of the parameter registers. */
2918 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2925 /* Similar, for FP regs. */
2928 first_fp_reg_to_save ()
2932 /* Find lowest numbered live register. */
2933 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
2934 if (regs_ever_live[first_reg])
2940 /* Return non-zero if this function makes calls. */
2943 rs6000_makes_calls ()
2947 /* If we are profiling, we will be making a call to __mcount.
2948 Under the System V ABI's, we store the LR directly, so
2949 we don't need to do it here. */
2950 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2953 for (insn = get_insns (); insn; insn = next_insn (insn))
2954 if (GET_CODE (insn) == CALL_INSN)
2961 /* Calculate the stack information for the current function. This is
2962 complicated by having two separate calling sequences, the AIX calling
2963 sequence and the V.4 calling sequence.
2965 AIX stack frames look like:
2967 SP----> +---------------------------------------+
2968 | back chain to caller | 0
2969 +---------------------------------------+
2971 +---------------------------------------+
2973 +---------------------------------------+
2974 | reserved for compilers | 12
2975 +---------------------------------------+
2976 | reserved for binders | 16
2977 +---------------------------------------+
2978 | saved TOC pointer | 20
2979 +---------------------------------------+
2980 | Parameter save area (P) | 24
2981 +---------------------------------------+
2982 | Alloca space (A) | 24+P
2983 +---------------------------------------+
2984 | Local variable space (L) | 24+P+A
2985 +---------------------------------------+
2986 | Float/int conversion temporary (X) | 24+P+A+L
2987 +---------------------------------------+
2988 | Save area for GP registers (G) | 24+P+A+X+L
2989 +---------------------------------------+
2990 | Save area for FP registers (F) | 24+P+A+X+L+G
2991 +---------------------------------------+
2992 old SP->| back chain to caller's caller |
2993 +---------------------------------------+
2995 V.4 stack frames look like:
2997 SP----> +---------------------------------------+
2998 | back chain to caller | 0
2999 +---------------------------------------+
3000 | caller's saved LR | 4
3001 +---------------------------------------+
3002 | Parameter save area (P) | 8
3003 +---------------------------------------+
3004 | Alloca space (A) | 8+P
3005 +---------------------------------------+
3006 | Varargs save area (V) | 8+P+A
3007 +---------------------------------------+
3008 | Local variable space (L) | 8+P+A+V
3009 +---------------------------------------+
3010 | Float/int conversion temporary (X) | 8+P+A+V+L
3011 +---------------------------------------+
3012 | saved CR (C) | 8+P+A+V+L+X
3013 +---------------------------------------+
3014 | Save area for GP registers (G) | 8+P+A+V+L+X+C
3015 +---------------------------------------+
3016 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
3017 +---------------------------------------+
3018 old SP->| back chain to caller's caller |
3019 +---------------------------------------+
3022 A PowerPC Windows/NT frame looks like:
3024 SP----> +---------------------------------------+
3025 | back chain to caller | 0
3026 +---------------------------------------+
3028 +---------------------------------------+
3030 +---------------------------------------+
3032 +---------------------------------------+
3034 +---------------------------------------+
3036 +---------------------------------------+
3037 | Parameter save area (P) | 24
3038 +---------------------------------------+
3039 | Alloca space (A) | 24+P
3040 +---------------------------------------+
3041 | Local variable space (L) | 24+P+A
3042 +---------------------------------------+
3043 | Float/int conversion temporary (X) | 24+P+A+L
3044 +---------------------------------------+
3045 | Save area for FP registers (F) | 24+P+A+L+X
3046 +---------------------------------------+
3047 | Possible alignment area (Y) | 24+P+A+L+X+F
3048 +---------------------------------------+
3049 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
3050 +---------------------------------------+
3051 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
3052 +---------------------------------------+
3053 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
3054 +---------------------------------------+
3055 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
3056 +---------------------------------------+
3057 old SP->| back chain to caller's caller |
3058 +---------------------------------------+
3060 For NT, there is no specific order to save the registers, but in
3061 order to support __builtin_return_address, the save area for the
3062 link register needs to be in a known place, so we use -4 off of the
3063 old SP. To support calls through pointers, we also allocate a
3064 fixed slot to store the TOC, -8 off the old SP. */
3066 #ifndef ABI_STACK_BOUNDARY
3067 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
3071 rs6000_stack_info ()
3073 static rs6000_stack_t info, zero_info;
3074 rs6000_stack_t *info_ptr = &info;
3075 int reg_size = TARGET_64BIT ? 8 : 4;
3076 enum rs6000_abi abi;
3079 /* Zero all fields portably */
3082 /* Select which calling sequence */
3083 info_ptr->abi = abi = DEFAULT_ABI;
3085 /* Calculate which registers need to be saved & save area size */
3086 info_ptr->first_gp_reg_save = first_reg_to_save ();
3087 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
3089 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
3090 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
3092 /* Does this function call anything? */
3093 info_ptr->calls_p = rs6000_makes_calls ();
3095 /* Allocate space to save the toc. */
3096 if (abi == ABI_NT && info_ptr->calls_p)
3098 info_ptr->toc_save_p = 1;
3099 info_ptr->toc_size = reg_size;
3102 /* Does this machine need the float/int conversion area? */
3103 info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM];
3105 /* If this is main and we need to call a function to set things up,
3106 save main's arguments around the call. */
3111 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0
3112 && DECL_CONTEXT (current_function_decl) == NULL_TREE)
3114 info_ptr->main_p = 1;
3117 info_ptr->calls_p = 1;
3119 if (DECL_ARGUMENTS (current_function_decl))
3124 info_ptr->main_save_p = 1;
3125 info_ptr->main_size = 0;
3127 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
3128 arg != NULL_TREE && i < 8;
3129 (arg = TREE_CHAIN (arg)), i++)
3131 info_ptr->main_size += reg_size;
3139 /* Determine if we need to save the link register */
3140 if (regs_ever_live[65]
3141 || (DEFAULT_ABI == ABI_AIX && profile_flag)
3142 #ifdef TARGET_RELOCATABLE
3143 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
3145 || (info_ptr->first_fp_reg_save != 64
3146 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
3147 || (abi == ABI_V4 && current_function_calls_alloca)
3148 || (abi == ABI_SOLARIS && current_function_calls_alloca)
3149 || info_ptr->calls_p)
3151 info_ptr->lr_save_p = 1;
3152 regs_ever_live[65] = 1;
3154 info_ptr->lr_size = reg_size;
3157 /* Determine if we need to save the condition code registers */
3158 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72])
3160 info_ptr->cr_save_p = 1;
3161 if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS)
3162 info_ptr->cr_size = reg_size;
3165 /* Determine various sizes */
3166 info_ptr->reg_size = reg_size;
3167 info_ptr->fixed_size = RS6000_SAVE_AREA;
3168 info_ptr->varargs_size = RS6000_VARARGS_AREA;
3169 info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8);
3170 info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8);
3171 info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0;
3172 info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size
3176 + info_ptr->toc_size
3177 + info_ptr->main_size, 8);
3179 total_raw_size = (info_ptr->vars_size
3180 + info_ptr->parm_size
3181 + info_ptr->fpmem_size
3182 + info_ptr->save_size
3183 + info_ptr->varargs_size
3184 + info_ptr->fixed_size);
3186 info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT);
3188 /* Determine if we need to allocate any stack frame.
3189 For AIX We need to push the stack if a frame pointer is needed (because
3190 the stack might be dynamically adjusted), if we are debugging, if the
3191 total stack size is more than 220 bytes, or if we make calls.
3193 For V.4 we don't have the stack cushion that AIX uses, but assume that
3194 the debugger can handle stackless frames. */
3196 if (info_ptr->calls_p)
3197 info_ptr->push_p = 1;
3199 else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS)
3200 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
3201 || (abi == ABI_NT ? info_ptr->lr_save_p
3202 : info_ptr->calls_p));
3205 info_ptr->push_p = (frame_pointer_needed
3206 || write_symbols != NO_DEBUG
3207 || info_ptr->total_size > 220);
3209 /* Calculate the offsets */
3217 case ABI_AIX_NODESC:
3218 info_ptr->fp_save_offset = - info_ptr->fp_size;
3219 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
3220 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size;
3221 info_ptr->cr_save_offset = 4;
3222 info_ptr->lr_save_offset = 8;
3227 info_ptr->fp_save_offset = - info_ptr->fp_size;
3228 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
3229 info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size;
3230 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size;
3231 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size;
3232 info_ptr->lr_save_offset = reg_size;
3236 info_ptr->lr_save_offset = -4;
3237 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size;
3238 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
3239 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size;
3240 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size;
3241 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0)
3242 info_ptr->fp_save_offset -= 4;
3244 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size;
3248 if (info_ptr->fpmem_p)
3249 info_ptr->fpmem_offset = STARTING_FRAME_OFFSET - info_ptr->total_size + info_ptr->vars_size;
3251 /* Zero offsets if we're not saving those registers */
3252 if (!info_ptr->fp_size)
3253 info_ptr->fp_save_offset = 0;
3255 if (!info_ptr->gp_size)
3256 info_ptr->gp_save_offset = 0;
3258 if (!info_ptr->lr_save_p)
3259 info_ptr->lr_save_offset = 0;
3261 if (!info_ptr->cr_save_p)
3262 info_ptr->cr_save_offset = 0;
3264 if (!info_ptr->toc_save_p)
3265 info_ptr->toc_save_offset = 0;
3267 if (!info_ptr->main_save_p)
3268 info_ptr->main_save_offset = 0;
3270 if (!info_ptr->fpmem_p)
3271 info_ptr->fpmem_offset = 0;
3274 rs6000_fpmem_size = info_ptr->fpmem_size;
3275 rs6000_fpmem_offset = info_ptr->total_size + info_ptr->fpmem_offset;
3282 debug_stack_info (info)
3283 rs6000_stack_t *info;
3288 info = rs6000_stack_info ();
3290 fprintf (stderr, "\nStack information for function %s:\n",
3291 ((current_function_decl && DECL_NAME (current_function_decl))
3292 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
3297 default: abi_string = "Unknown"; break;
3298 case ABI_NONE: abi_string = "NONE"; break;
3299 case ABI_AIX: abi_string = "AIX"; break;
3300 case ABI_AIX_NODESC: abi_string = "AIX"; break;
3301 case ABI_V4: abi_string = "V.4"; break;
3302 case ABI_SOLARIS: abi_string = "Solaris"; break;
3303 case ABI_NT: abi_string = "NT"; break;
3306 fprintf (stderr, "\tABI = %5s\n", abi_string);
3308 if (info->first_gp_reg_save != 32)
3309 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
3311 if (info->first_fp_reg_save != 64)
3312 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
3314 if (info->lr_save_p)
3315 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
3317 if (info->cr_save_p)
3318 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
3320 if (info->toc_save_p)
3321 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
3324 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
3327 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
3330 fprintf (stderr, "\tmain_p = %5d\n", info->main_p);
3332 if (info->main_save_p)
3333 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p);
3336 fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p);
3338 if (info->gp_save_offset)
3339 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
3341 if (info->fp_save_offset)
3342 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
3344 if (info->lr_save_offset)
3345 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
3347 if (info->cr_save_offset)
3348 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
3350 if (info->toc_save_offset)
3351 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
3353 if (info->varargs_save_offset)
3354 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
3356 if (info->main_save_offset)
3357 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset);
3359 if (info->fpmem_offset)
3360 fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset);
3362 if (info->total_size)
3363 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
3365 if (info->varargs_size)
3366 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
3368 if (info->vars_size)
3369 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
3371 if (info->parm_size)
3372 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
3374 if (info->fpmem_size)
3375 fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size);
3377 if (info->fixed_size)
3378 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
3381 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
3384 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
3387 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
3390 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
3393 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
3395 if (info->main_size)
3396 fprintf (stderr, "\tmain_size = %5d\n", info->main_size);
3398 if (info->save_size)
3399 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
3401 if (info->reg_size != 4)
3402 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
3404 fprintf (stderr, "\n");
3407 /* Write out an instruction to load the TOC_TABLE address into register 30.
3408 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
3412 rs6000_output_load_toc_table (file, reg)
3419 if (TARGET_RELOCATABLE)
3421 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3422 fprintf (file, "\tbl ");
3423 assemble_name (file, buf);
3424 fprintf (file, "\n");
3426 /* possibly create the toc section */
3427 if (!toc_initialized)
3430 function_section (current_function_decl);
3433 /* If not first call in this function, we need to put the
3434 different between .LCTOC1 and the address we get to right
3435 after the bl. It will mess up disassembling the instructions
3436 but that can't be helped. We will later need to bias the
3437 address before loading. */
3438 if (rs6000_pic_func_labelno != rs6000_pic_labelno)
3440 char *init_ptr = (TARGET_64BIT) ? ".quad" : ".long";
3443 ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno);
3445 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3446 STRIP_NAME_ENCODING (buf_ptr, buf);
3447 fprintf (file, "\t%s %s-", init_ptr, buf_ptr);
3449 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3450 fprintf (file, "%s\n", buf_ptr);
3453 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno);
3454 fprintf (file, "\tmflr %s\n", reg_names[reg]);
3456 if (rs6000_pic_func_labelno != rs6000_pic_labelno)
3458 if (TARGET_POWERPC64)
3459 fprintf (file, "\taddi %s,%s,8\n", reg_names[reg], reg_names[reg]);
3460 else if (TARGET_NEW_MNEMONICS)
3461 fprintf (file, "\taddi %s,%s,4\n", reg_names[reg], reg_names[reg]);
3463 fprintf (file, "\tcal %s,4(%s)\n", reg_names[reg], reg_names[reg]);
3466 if (TARGET_POWERPC64)
3467 fprintf (file, "\tld");
3468 else if (TARGET_NEW_MNEMONICS)
3469 fprintf (file, "\tlwz");
3471 fprintf (file, "\tl");
3473 fprintf (file, " %s,(", reg_names[0]);
3474 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
3475 assemble_name (file, buf);
3476 fprintf (file, "-");
3477 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3478 assemble_name (file, buf);
3479 fprintf (file, ")(%s)\n", reg_names[reg]);
3480 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
3481 reg_names[reg], reg_names[0], reg_names[reg]);
3482 rs6000_pic_labelno++;
3484 else if (!TARGET_64BIT)
3486 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3487 asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[reg], reg_names[0]);
3488 assemble_name (file, buf);
3489 asm_fprintf (file, "@ha\n");
3490 if (TARGET_NEW_MNEMONICS)
3492 asm_fprintf (file, "\taddi %s,%s,", reg_names[reg], reg_names[reg]);
3493 assemble_name (file, buf);
3494 asm_fprintf (file, "@l\n");
3498 asm_fprintf (file, "\tcal %s,", reg_names[reg]);
3499 assemble_name (file, buf);
3500 asm_fprintf (file, "@l(%s)\n", reg_names[reg]);
3506 #else /* !USING_SVR4_H */
3507 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0);
3508 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[reg]);
3509 assemble_name (file, buf);
3510 asm_fprintf (file, "(%s)\n", reg_names[2]);
3511 #endif /* USING_SVR4_H */
3515 /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy
3516 of the old frame is left in r12. */
3519 rs6000_allocate_stack_space (file, size, copy_r12)
3524 int neg_size = -size;
3529 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3530 reg_names[1], neg_size, reg_names[1]);
3534 fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3536 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3537 reg_names[0], (neg_size >> 16) & 0xffff,
3538 reg_names[0], reg_names[0], neg_size & 0xffff);
3540 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3541 reg_names[1], reg_names[1], reg_names[0]);
3546 fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3549 if (TARGET_NEW_MNEMONICS)
3550 fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], neg_size);
3552 fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], neg_size, reg_names[1]);
3556 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3557 reg_names[0], (neg_size >> 16) & 0xffff,
3558 reg_names[0], reg_names[0], neg_size & 0xffff);
3559 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1],
3560 reg_names[0], reg_names[1]);
3564 (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n",
3565 reg_names[12], reg_names[1]);
3570 /* Write function prologue. */
3572 output_prolog (file, size)
3576 rs6000_stack_t *info = rs6000_stack_info ();
3577 int reg_size = info->reg_size;
3585 store_reg = "\t{st|stw} %s,%d(%s)\n";
3586 load_reg = "\t{l|lwz} %s,%d(%s)\n";
3590 store_reg = "\tstd %s,%d(%s)\n";
3591 load_reg = "\tlld %s,%d(%s)\n";
3594 if (TARGET_DEBUG_STACK)
3595 debug_stack_info (info);
3597 /* Write .extern for any function we will call to save and restore fp
3599 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3600 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3601 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
3602 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3604 /* Write .extern for truncation routines, if needed. */
3605 if (rs6000_trunc_used && ! trunc_defined)
3607 fprintf (file, "\t.extern .%s\n\t.extern .%s\n",
3608 RS6000_ITRUNC, RS6000_UITRUNC);
3612 /* Write .extern for AIX common mode routines, if needed. */
3613 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
3615 fputs ("\t.extern __mulh\n", file);
3616 fputs ("\t.extern __mull\n", file);
3617 fputs ("\t.extern __divss\n", file);
3618 fputs ("\t.extern __divus\n", file);
3619 fputs ("\t.extern __quoss\n", file);
3620 fputs ("\t.extern __quous\n", file);
3621 common_mode_defined = 1;
3624 /* For V.4, update stack before we do any saving and set back pointer. */
3625 if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
3627 if (info->total_size < 32767)
3628 sp_offset = info->total_size;
3631 rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12);
3634 /* If we use the link register, get it into r0. */
3635 if (info->lr_save_p)
3636 asm_fprintf (file, "\tmflr %s\n", reg_names[0]);
3638 /* If we need to save CR, put it into r12. */
3639 if (info->cr_save_p && sp_reg != 12)
3640 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]);
3642 /* Do any required saving of fpr's. If only one or two to save, do it
3643 ourself. Otherwise, call function. Note that since they are statically
3644 linked, we do not need a nop following them. */
3645 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3647 int regno = info->first_fp_reg_save;
3648 int loc = info->fp_save_offset + sp_offset;
3650 for ( ; regno < 64; regno++, loc += 8)
3651 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3653 else if (info->first_fp_reg_save != 64)
3654 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX,
3655 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
3657 /* Now save gpr's. */
3658 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3660 int regno = info->first_gp_reg_save;
3661 int loc = info->gp_save_offset + sp_offset;
3663 for ( ; regno < 32; regno++, loc += reg_size)
3664 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3667 else if (info->first_gp_reg_save != 32)
3668 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n",
3669 reg_names[info->first_gp_reg_save],
3670 info->gp_save_offset + sp_offset,
3673 /* Save main's arguments if we need to call a function */
3675 if (info->main_save_p)
3678 int loc = info->main_save_offset + sp_offset;
3679 int size = info->main_size;
3681 for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size)
3682 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3686 /* Save lr if we used it. */
3687 if (info->lr_save_p)
3688 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset,
3691 /* Save CR if we use any that must be preserved. */
3692 if (info->cr_save_p)
3694 if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */
3696 asm_fprintf (file, "\tmfcr %s\n", reg_names[0]);
3697 asm_fprintf (file, store_reg, reg_names[0],
3698 info->cr_save_offset + sp_offset,
3702 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset,
3706 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3708 if (DEFAULT_ABI == ABI_NT && info->total_size > 4096)
3710 if (info->total_size < 32768)
3712 int probe_offset = 4096;
3713 while (probe_offset < info->total_size)
3715 asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]);
3716 probe_offset += 4096;
3721 int probe_iterations = info->total_size / 4096;
3722 static int probe_labelno = 0;
3725 if (probe_iterations < 32768)
3726 asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations);
3729 asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16);
3730 if (probe_iterations & 0xffff)
3731 asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12],
3732 probe_iterations & 0xffff);
3734 asm_fprintf (file, "\tmtctr %s\n", reg_names[12]);
3735 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3736 ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno);
3737 asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]);
3738 ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++);
3739 fputs ("\tbdnz ", file);
3740 assemble_name (file, buf);
3745 /* Update stack and set back pointer unless this is V.4, which was done previously */
3746 if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
3747 rs6000_allocate_stack_space (file, info->total_size, FALSE);
3749 /* Set frame pointer, if needed. */
3750 if (frame_pointer_needed)
3751 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]);
3754 /* If we need to call a function to set things up for main, do so now
3755 before dealing with the TOC. */
3760 switch (DEFAULT_ABI)
3762 case ABI_AIX: prefix = "."; break;
3763 case ABI_NT: prefix = ".."; break;
3766 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN);
3767 #ifdef RS6000_CALL_GLUE2
3768 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN);
3770 #ifdef RS6000_CALL_GLUE
3771 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
3772 fprintf (file, "\t%s\n", RS6000_CALL_GLUE);
3776 if (info->main_save_p)
3780 int size = info->main_size;
3782 if (info->total_size < 32767)
3784 loc = info->total_size + info->main_save_offset;
3785 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3786 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3790 int neg_size = info->main_save_offset - info->total_size;
3792 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3793 reg_names[0], (neg_size >> 16) & 0xffff,
3794 reg_names[0], reg_names[0], neg_size & 0xffff);
3796 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0],
3799 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3800 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]);
3807 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3808 TOC_TABLE address into register 30. */
3809 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
3813 rs6000_pic_func_labelno = rs6000_pic_labelno;
3815 rs6000_output_load_toc_table (file, 30);
3818 if (DEFAULT_ABI == ABI_NT)
3820 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3821 fputs (".b:\n", file);
3825 /* Write function epilogue. */
3828 output_epilog (file, size)
3832 rs6000_stack_t *info = rs6000_stack_info ();
3833 char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3834 rtx insn = get_last_insn ();
3839 /* If the last insn was a BARRIER, we don't have to write anything except
3841 if (GET_CODE (insn) == NOTE)
3842 insn = prev_nonnote_insn (insn);
3843 if (insn == 0 || GET_CODE (insn) != BARRIER)
3845 /* If we have a frame pointer, a call to alloca, or a large stack
3846 frame, restore the old stack pointer using the backchain. Otherwise,
3847 we know what size to update it with. */
3848 if (frame_pointer_needed || current_function_calls_alloca
3849 || info->total_size > 32767)
3851 /* Under V.4, don't reset the stack pointer until after we're done
3852 loading the saved registers. */
3853 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
3856 asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]);
3858 else if (info->push_p)
3860 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
3861 sp_offset = info->total_size;
3862 else if (TARGET_NEW_MNEMONICS)
3863 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size);
3865 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]);
3868 /* Get the old lr if we saved it. */
3869 if (info->lr_save_p)
3870 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]);
3872 /* Get the old cr if we saved it. */
3873 if (info->cr_save_p)
3874 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]);
3876 /* Set LR here to try to overlap restores below. */
3877 if (info->lr_save_p)
3878 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]);
3880 /* Restore gpr's. */
3881 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3883 int regno = info->first_gp_reg_save;
3884 int loc = info->gp_save_offset + sp_offset;
3885 int reg_size = (TARGET_32BIT) ? 4 : 8;
3887 for ( ; regno < 32; regno++, loc += reg_size)
3888 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]);
3891 else if (info->first_gp_reg_save != 32)
3892 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n",
3893 reg_names[info->first_gp_reg_save],
3894 info->gp_save_offset + sp_offset,
3897 /* Restore fpr's if we can do it without calling a function. */
3898 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3900 int regno = info->first_fp_reg_save;
3901 int loc = info->fp_save_offset + sp_offset;
3903 for ( ; regno < 64; regno++, loc += 8)
3904 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3907 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3909 if (info->cr_save_p)
3910 asm_fprintf (file, "\tmtcrf %d,%s\n",
3911 (regs_ever_live[70] != 0) * 0x20
3912 + (regs_ever_live[71] != 0) * 0x10
3913 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
3915 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3918 if (TARGET_NEW_MNEMONICS)
3919 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset);
3921 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]);
3923 else if (sp_reg != 1)
3924 asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]);
3926 /* If we have to restore more than two FP registers, branch to the
3927 restore function. It will return to our caller. */
3928 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3929 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX,
3930 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3932 asm_fprintf (file, "\t{br|blr}\n");
3935 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3938 We don't output a traceback table if -finhibit-size-directive was
3939 used. The documentation for -finhibit-size-directive reads
3940 ``don't output a @code{.size} assembler directive, or anything
3941 else that would cause trouble if the function is split in the
3942 middle, and the two halves are placed at locations far apart in
3943 memory.'' The traceback table has this property, since it
3944 includes the offset from the start of the function to the
3945 traceback table itself.
3947 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3948 different traceback table. */
3949 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
3951 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
3952 int fixed_parms, float_parms, parm_info;
3955 while (*fname == '.') /* V.4 encodes . in the name */
3958 /* Need label immediately before tbtab, so we can compute its offset
3959 from the function start. */
3962 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3963 ASM_OUTPUT_LABEL (file, fname);
3965 /* The .tbtab pseudo-op can only be used for the first eight
3966 expressions, since it can't handle the possibly variable
3967 length fields that follow. However, if you omit the optional
3968 fields, the assembler outputs zeros for all optional fields
3969 anyways, giving each variable length field is minimum length
3970 (as defined in sys/debug.h). Thus we can not use the .tbtab
3971 pseudo-op at all. */
3973 /* An all-zero word flags the start of the tbtab, for debuggers
3974 that have to find it by searching forward from the entry
3975 point or from the current pc. */
3976 fputs ("\t.long 0\n", file);
3978 /* Tbtab format type. Use format type 0. */
3979 fputs ("\t.byte 0,", file);
3981 /* Language type. Unfortunately, there doesn't seem to be any
3982 official way to get this info, so we use language_string. C
3983 is 0. C++ is 9. No number defined for Obj-C, so use the
3984 value for C for now. */
3985 if (! strcmp (language_string, "GNU C")
3986 || ! strcmp (language_string, "GNU Obj-C"))
3988 else if (! strcmp (language_string, "GNU F77"))
3990 else if (! strcmp (language_string, "GNU Ada"))
3992 else if (! strcmp (language_string, "GNU Pascal"))
3994 else if (! strcmp (language_string, "GNU C++"))
3998 fprintf (file, "%d,", i);
4000 /* 8 single bit fields: global linkage (not set for C extern linkage,
4001 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
4002 from start of procedure stored in tbtab, internal function, function
4003 has controlled storage, function has no toc, function uses fp,
4004 function logs/aborts fp operations. */
4005 /* Assume that fp operations are used if any fp reg must be saved. */
4006 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
4008 /* 6 bitfields: function is interrupt handler, name present in
4009 proc table, function calls alloca, on condition directives
4010 (controls stack walks, 3 bits), saves condition reg, saves
4012 /* The `function calls alloca' bit seems to be set whenever reg 31 is
4013 set up as a frame pointer, even when there is no alloca call. */
4014 fprintf (file, "%d,",
4015 ((1 << 6) | (frame_pointer_needed << 5)
4016 | (info->cr_save_p << 1) | (info->lr_save_p)));
4018 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
4020 fprintf (file, "%d,",
4021 (info->push_p << 7) | (64 - info->first_fp_reg_save));
4023 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
4024 fprintf (file, "%d,", (32 - first_reg_to_save ()));
4027 /* Compute the parameter info from the function decl argument
4030 int next_parm_info_bit;
4032 next_parm_info_bit = 31;
4037 for (decl = DECL_ARGUMENTS (current_function_decl);
4038 decl; decl = TREE_CHAIN (decl))
4040 rtx parameter = DECL_INCOMING_RTL (decl);
4041 enum machine_mode mode = GET_MODE (parameter);
4043 if (GET_CODE (parameter) == REG)
4045 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4053 else if (mode == DFmode)
4058 /* If only one bit will fit, don't or in this entry. */
4059 if (next_parm_info_bit > 0)
4060 parm_info |= (bits << (next_parm_info_bit - 1));
4061 next_parm_info_bit -= 2;
4065 fixed_parms += ((GET_MODE_SIZE (mode)
4066 + (UNITS_PER_WORD - 1))
4068 next_parm_info_bit -= 1;
4074 /* Number of fixed point parameters. */
4075 /* This is actually the number of words of fixed point parameters; thus
4076 an 8 byte struct counts as 2; and thus the maximum value is 8. */
4077 fprintf (file, "%d,", fixed_parms);
4079 /* 2 bitfields: number of floating point parameters (7 bits), parameters
4081 /* This is actually the number of fp registers that hold parameters;
4082 and thus the maximum value is 13. */
4083 /* Set parameters on stack bit if parameters are not in their original
4084 registers, regardless of whether they are on the stack? Xlc
4085 seems to set the bit when not optimizing. */
4086 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
4088 /* Optional fields follow. Some are variable length. */
4090 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
4092 /* There is an entry for each parameter in a register, in the order that
4093 they occur in the parameter list. Any intervening arguments on the
4094 stack are ignored. If the list overflows a long (max possible length
4095 34 bits) then completely leave off all elements that don't fit. */
4096 /* Only emit this long if there was at least one parameter. */
4097 if (fixed_parms || float_parms)
4098 fprintf (file, "\t.long %d\n", parm_info);
4100 /* Offset from start of code to tb table. */
4101 fputs ("\t.long ", file);
4102 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
4103 RS6000_OUTPUT_BASENAME (file, fname);
4105 RS6000_OUTPUT_BASENAME (file, fname);
4108 /* Interrupt handler mask. */
4109 /* Omit this long, since we never set the interrupt handler bit
4112 /* Number of CTL (controlled storage) anchors. */
4113 /* Omit this long, since the has_ctl bit is never set above. */
4115 /* Displacement into stack of each CTL anchor. */
4116 /* Omit this list of longs, because there are no CTL anchors. */
4118 /* Length of function name. */
4119 fprintf (file, "\t.short %d\n", strlen (fname));
4121 /* Function name. */
4122 assemble_string (fname, strlen (fname));
4124 /* Register for alloca automatic storage; this is always reg 31.
4125 Only emit this if the alloca bit was set above. */
4126 if (frame_pointer_needed)
4127 fputs ("\t.byte 31\n", file);
4130 if (DEFAULT_ABI == ABI_NT)
4132 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
4133 fputs (".e:\nFE_MOT_RESVD..", file);
4134 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
4135 fputs (":\n", file);
4139 /* Output a TOC entry. We derive the entry name from what is
4143 output_toc (file, x, labelno)
4157 /* if we're going to put a double constant in the TOC, make sure it's
4158 aligned properly when strict alignment is on. */
4159 if (GET_CODE (x) == CONST_DOUBLE
4161 && GET_MODE (x) == DFmode
4162 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
4163 ASM_OUTPUT_ALIGN (file, 3);
4167 if (TARGET_ELF && TARGET_MINIMAL_TOC)
4169 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
4170 fprintf (file, "%d = .-", labelno);
4171 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC");
4172 fputs ("1\n", file);
4175 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
4177 /* Handle FP constants specially. Note that if we have a minimal
4178 TOC, things we put here aren't actually in the TOC, so we can allow
4180 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode
4181 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
4186 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
4187 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
4188 if (TARGET_MINIMAL_TOC)
4189 fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]);
4191 fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
4192 k[0], k[1], k[0], k[1]);
4195 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
4196 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
4201 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
4202 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
4204 if (TARGET_MINIMAL_TOC)
4205 fprintf (file, "\t.long %ld\n", l);
4207 fprintf (file, "\t.tc FS_%lx[TC],%ld\n", l, l);
4210 else if (GET_MODE (x) == DImode
4211 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
4212 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
4217 if (GET_CODE (x) == CONST_DOUBLE)
4219 low = CONST_DOUBLE_LOW (x);
4220 high = CONST_DOUBLE_HIGH (x);
4223 #if HOST_BITS_PER_WIDE_INT == 32
4226 high = (low < 0) ? ~0 : 0;
4230 low = INTVAL (x) & 0xffffffff;
4231 high = (HOST_WIDE_INT) INTVAL (x) >> 32;
4235 if (TARGET_MINIMAL_TOC)
4236 fprintf (file, "\t.long %ld\n\t.long %ld\n", (long)high, (long)low);
4238 fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
4239 (long)high, (long)low, (long)high, (long)low);
4243 if (GET_CODE (x) == CONST)
4245 base = XEXP (XEXP (x, 0), 0);
4246 offset = INTVAL (XEXP (XEXP (x, 0), 1));
4249 if (GET_CODE (base) == SYMBOL_REF)
4250 name = XSTR (base, 0);
4251 else if (GET_CODE (base) == LABEL_REF)
4252 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
4253 else if (GET_CODE (base) == CODE_LABEL)
4254 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
4258 STRIP_NAME_ENCODING (real_name, name);
4259 if (TARGET_MINIMAL_TOC)
4260 fputs ("\t.long ", file);
4263 fprintf (file, "\t.tc %s", real_name);
4266 fprintf (file, ".N%d", - offset);
4268 fprintf (file, ".P%d", offset);
4270 fputs ("[TC],", file);
4273 /* Currently C++ toc references to vtables can be emitted before it
4274 is decided whether the vtable is public or private. If this is
4275 the case, then the linker will eventually complain that there is
4276 a TOC reference to an unknown section. Thus, for vtables only,
4277 we emit the TOC reference to reference the symbol and not the
4279 if (!strncmp ("_vt.", name, 4))
4281 RS6000_OUTPUT_BASENAME (file, name);
4283 fprintf (file, "%d", offset);
4284 else if (offset > 0)
4285 fprintf (file, "+%d", offset);
4288 output_addr_const (file, x);
4292 /* Output an assembler pseudo-op to write an ASCII string of N characters
4293 starting at P to FILE.
4295 On the RS/6000, we have to do this using the .byte operation and
4296 write out special characters outside the quoted string.
4297 Also, the assembler is broken; very long strings are truncated,
4298 so we must artificially break them up early. */
4301 output_ascii (file, p, n)
4307 int i, count_string;
4308 char *for_string = "\t.byte \"";
4309 char *for_decimal = "\t.byte ";
4310 char *to_close = NULL;
4313 for (i = 0; i < n; i++)
4316 if (c >= ' ' && c < 0177)
4319 fputs (for_string, file);
4322 /* Write two quotes to get one. */
4330 for_decimal = "\"\n\t.byte ";
4334 if (count_string >= 512)
4336 fputs (to_close, file);
4338 for_string = "\t.byte \"";
4339 for_decimal = "\t.byte ";
4347 fputs (for_decimal, file);
4348 fprintf (file, "%d", c);
4350 for_string = "\n\t.byte \"";
4357 /* Now close the string if we have written one. Then end the line. */
4359 fprintf (file, to_close);
4362 /* Generate a unique section name for FILENAME for a section type
4363 represented by SECTION_DESC. Output goes into BUF.
4365 SECTION_DESC can be any string, as long as it is different for each
4366 possible section type.
4368 We name the section in the same manner as xlc. The name begins with an
4369 underscore followed by the filename (after stripping any leading directory
4370 names) with the last period replaced by the string SECTION_DESC. If
4371 FILENAME does not contain a period, SECTION_DESC is appended to the end of
4375 rs6000_gen_section_name (buf, filename, section_desc)
4380 char *q, *after_last_slash, *last_period;
4384 after_last_slash = filename;
4385 for (q = filename; *q; q++)
4388 after_last_slash = q + 1;
4393 len = strlen (after_last_slash) + strlen (section_desc) + 2;
4394 *buf = (char *) permalloc (len);
4399 for (q = after_last_slash; *q; q++)
4401 if (q == last_period)
4403 strcpy (p, section_desc);
4404 p += strlen (section_desc);
4407 else if (isalnum (*q))
4411 if (last_period == 0)
4412 strcpy (p, section_desc);
4417 /* Write function profiler code. */
4420 output_function_profiler (file, labelno)
4424 /* The last used parameter register. */
4429 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
4430 switch (DEFAULT_ABI)
4437 case ABI_AIX_NODESC:
4438 fprintf (file, "\tmflr %s\n", reg_names[0]);
4441 fprintf (file, "\tbl _GLOBAL_OFFSET_TABLE_@local-4\n");
4442 fprintf (file, "\t%s %s,4(%s)\n",
4443 (TARGET_NEW_MNEMONICS) ? "stw" : "st",
4444 reg_names[0], reg_names[1]);
4445 fprintf (file, "\tmflr %s\n", reg_names[11]);
4446 fprintf (file, "\t%s %s,", (TARGET_NEW_MNEMONICS) ? "lwz" : "l",
4448 assemble_name (file, buf);
4449 fprintf (file, "@got(%s)\n", reg_names[11]);
4452 else if (flag_pic > 1 || TARGET_RELOCATABLE)
4454 fprintf (file, "\t%s %s,4(%s)\n",
4455 (TARGET_NEW_MNEMONICS) ? "stw" : "st",
4456 reg_names[0], reg_names[1]);
4457 rs6000_pic_func_labelno = rs6000_pic_labelno;
4458 rs6000_output_load_toc_table (file, 11);
4459 fprintf (file, "\t%s %s,", (TARGET_NEW_MNEMONICS) ? "lwz" : "l",
4461 assemble_name (file, buf);
4462 fprintf (file, "X(%s)\n", reg_names[11]);
4463 fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP);
4464 assemble_name (file, buf);
4465 fprintf (file, "X = .-.LCTOC1\n");
4466 fprintf (file, "\t.long ");
4467 assemble_name (file, buf);
4468 fputs ("\n\t.previous\n", file);
4471 else if (TARGET_NEW_MNEMONICS)
4473 fprintf (file, "\taddis %s,%s,", reg_names[11], reg_names[11]);
4474 assemble_name (file, buf);
4475 fprintf (file, "@ha\n");
4476 fprintf (file, "\tstw %s,4(%s)\n", reg_names[0], reg_names[1]);
4477 fprintf (file, "\taddi %s,%s,", reg_names[0], reg_names[11]);
4478 assemble_name (file, buf);
4479 fputs ("@l\n", file);
4483 fprintf (file, "\tcau %s,%s,", reg_names[11], reg_names[11]);
4484 assemble_name (file, buf);
4485 fprintf (file, "@ha\n");
4486 fprintf (file, "\tst %s,4(%s)\n", reg_names[0], reg_names[1]);
4487 fprintf (file, "\tcal %s,", reg_names[11]);
4488 assemble_name (file, buf);
4489 fprintf (file, "@l(%s)\n", reg_names[11]);
4492 fprintf (file, "\tbl %s\n", RS6000_MCOUNT);
4496 /* Set up a TOC entry for the profiler label. */
4498 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno);
4499 if (TARGET_MINIMAL_TOC)
4501 fputs ("\t.long ", file);
4502 assemble_name (file, buf);
4507 fputs ("\t.tc\t", file);
4508 assemble_name (file, buf);
4509 fputs ("[TC],", file);
4510 assemble_name (file, buf);
4515 /* Figure out last used parameter register. The proper thing to do is
4516 to walk incoming args of the function. A function might have live
4517 parameter registers even if it has no incoming args. */
4519 for (last_parm_reg = 10;
4520 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
4524 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
4525 it might be set up as the frame pointer. */
4527 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
4528 asm_fprintf (file, "\tmr %d,%d\n", j, i);
4530 /* Load location address into r3, and call mcount. */
4532 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno);
4533 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]);
4534 assemble_name (file, buf);
4535 asm_fprintf (file, "(%s)\n\tbl %s\n", reg_names[2], RS6000_MCOUNT);
4537 /* Restore parameter registers. */
4539 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
4540 asm_fprintf (file, "\tmr %d,%d\n", i, j);
4545 /* Adjust the cost of a scheduling dependency. Return the new cost of
4546 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4549 rs6000_adjust_cost (insn, link, dep_insn, cost)
4555 if (! recog_memoized (insn))
4558 if (REG_NOTE_KIND (link) != 0)
4561 if (REG_NOTE_KIND (link) == 0)
4563 /* Data dependency; DEP_INSN writes a register that INSN reads some
4566 /* Tell the first scheduling pass about the latency between a mtctr
4567 and bctr (and mtlr and br/blr). The first scheduling pass will not
4568 know about this latency since the mtctr instruction, which has the
4569 latency associated to it, will be generated by reload. */
4570 if (get_attr_type (insn) == TYPE_JMPREG)
4571 return TARGET_POWER ? 5 : 4;
4573 /* Fall out to return default cost. */
4579 /* Return how many instructions the machine can issue per cycle */
4580 int get_issue_rate()
4582 switch (rs6000_cpu_attr) {
4602 /* Output assembler code for a block containing the constant parts
4603 of a trampoline, leaving space for the variable parts.
4605 The trampoline should set the static chain pointer to value placed
4606 into the trampoline and should branch to the specified routine. */
4609 rs6000_trampoline_template (file)
4612 char *sc = reg_names[STATIC_CHAIN_REGNUM];
4613 char *r0 = reg_names[0];
4614 char *r2 = reg_names[2];
4616 switch (DEFAULT_ABI)
4621 /* Under AIX, this is not code at all, but merely a data area,
4622 since that is the way all functions are called. The first word is
4623 the address of the function, the second word is the TOC pointer (r2),
4624 and the third word is the static chain value. */
4629 /* V.4/eabi function pointers are just a single pointer, so we need to
4630 do the full gory code to load up the static chain. */
4633 case ABI_AIX_NODESC:
4636 /* NT function pointers point to a two word area (real address, TOC)
4637 which unfortunately does not include a static chain field. So we
4638 use the function field to point to ..LTRAMP1 and the toc field
4639 to point to the whole table. */
4641 if (STATIC_CHAIN_REGNUM == 0
4642 || STATIC_CHAIN_REGNUM == 2
4644 || !TARGET_NEW_MNEMONICS)
4647 fprintf (file, "\t.ualong 0\n"); /* offset 0 */
4648 fprintf (file, "\t.ualong 0\n"); /* offset 4 */
4649 fprintf (file, "\t.ualong 0\n"); /* offset 8 */
4650 fprintf (file, "\t.ualong 0\n"); /* offset 12 */
4651 fprintf (file, "\t.ualong 0\n"); /* offset 16 */
4652 fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */
4653 fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */
4654 fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */
4655 fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */
4656 fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */
4657 fprintf (file, "\tbctr\n"); /* offset 40 */
4664 /* Length in units of the trampoline for entering a nested function. */
4667 rs6000_trampoline_size ()
4671 switch (DEFAULT_ABI)
4677 ret = (TARGET_32BIT) ? 12 : 24;
4682 case ABI_AIX_NODESC:
4683 ret = (TARGET_32BIT) ? 40 : 48;
4694 /* Emit RTL insns to initialize the variable parts of a trampoline.
4695 FNADDR is an RTX for the address of the function's pure code.
4696 CXT is an RTX for the static chain value for the function. */
4699 rs6000_initialize_trampoline (addr, fnaddr, cxt)
4704 enum machine_mode pmode = Pmode;
4705 int regsize = (TARGET_32BIT) ? 4 : 8;
4706 rtx ctx_reg = force_reg (pmode, cxt);
4708 switch (DEFAULT_ABI)
4713 /* Macros to shorten the code expansions below. */
4714 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4715 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4717 /* Under AIX, just build the 3 word function descriptor */
4720 rtx fn_reg = gen_reg_rtx (pmode);
4721 rtx toc_reg = gen_reg_rtx (pmode);
4722 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4723 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4));
4724 emit_move_insn (MEM_DEREF (addr), fn_reg);
4725 emit_move_insn (MEM_PLUS (addr, regsize), toc_reg);
4726 emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg);
4730 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
4733 case ABI_AIX_NODESC:
4734 emit_library_call (gen_rtx (SYMBOL_REF, SImode, "__trampoline_setup"),
4737 GEN_INT (rs6000_trampoline_size ()), SImode,
4742 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4743 the second word will point to the whole trampoline, third-fifth words
4744 will then have the real address, static chain, and toc value. */
4747 rtx tramp_reg = gen_reg_rtx (pmode);
4748 rtx fn_reg = gen_reg_rtx (pmode);
4749 rtx toc_reg = gen_reg_rtx (pmode);
4751 emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0"));
4752 addr = force_reg (pmode, addr);
4753 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4754 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize));
4755 emit_move_insn (MEM_DEREF (addr), tramp_reg);
4756 emit_move_insn (MEM_PLUS (addr, regsize), addr);
4757 emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg);
4758 emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg);
4759 emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2));
4768 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4769 with arguments ARGS is a valid machine specific attribute for DECL.
4770 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4773 rs6000_valid_decl_attribute_p (decl, attributes, identifier, args)
4782 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4783 with arguments ARGS is a valid machine specific attribute for TYPE.
4784 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4787 rs6000_valid_type_attribute_p (type, attributes, identifier, args)
4793 if (TREE_CODE (type) != FUNCTION_TYPE
4794 && TREE_CODE (type) != FIELD_DECL
4795 && TREE_CODE (type) != TYPE_DECL)
4798 /* Longcall attribute says that the function is not within 2**26 bytes
4799 of the current function, and to do an indirect call. */
4800 if (is_attribute_p ("longcall", identifier))
4801 return (args == NULL_TREE);
4803 if (DEFAULT_ABI == ABI_NT)
4805 /* Stdcall attribute says callee is responsible for popping arguments
4806 if they are not variable. */
4807 if (is_attribute_p ("stdcall", identifier))
4808 return (args == NULL_TREE);
4810 /* Cdecl attribute says the callee is a normal C declaration */
4811 if (is_attribute_p ("cdecl", identifier))
4812 return (args == NULL_TREE);
4814 /* Dllimport attribute says says the caller is to call the function
4815 indirectly through a __imp_<name> pointer. */
4816 if (is_attribute_p ("dllimport", identifier))
4817 return (args == NULL_TREE);
4819 /* Dllexport attribute says says the callee is to create a __imp_<name>
4821 if (is_attribute_p ("dllexport", identifier))
4822 return (args == NULL_TREE);
4824 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4825 that will fill in the 3rd and 4th fields of the structured exception
4827 if (is_attribute_p ("exception", identifier))
4831 if (args == NULL_TREE)
4834 for (i = 0; i < 2 && args != NULL_TREE; i++)
4836 tree this_arg = TREE_VALUE (args);
4837 args = TREE_PURPOSE (args);
4839 if (TREE_CODE (this_arg) != STRING_CST
4840 && TREE_CODE (this_arg) != IDENTIFIER_NODE)
4844 return (args == NULL_TREE);
4851 /* If defined, a C expression whose value is zero if the attributes on
4852 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4853 two if they are nearly compatible (which causes a warning to be
4857 rs6000_comp_type_attributes (type1, type2)
4864 /* If defined, a C statement that assigns default attributes to newly
4868 rs6000_set_default_type_attributes (type)
4873 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4875 rs6000_dll_import_ref (call_ref)
4884 if (GET_CODE (call_ref) != SYMBOL_REF)
4887 call_name = XSTR (call_ref, 0);
4888 len = sizeof ("__imp_") + strlen (call_name);
4890 reg2 = gen_reg_rtx (Pmode);
4892 strcpy (p, "__imp_");
4893 strcat (p, call_name);
4894 node = get_identifier (p);
4896 reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)));
4897 emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1));
4902 /* Return a reference suitable for calling a function with the longcall attribute. */
4904 rs6000_longcall_ref (call_ref)
4913 if (GET_CODE (call_ref) != SYMBOL_REF)
4916 /* System V adds '.' to the internal name, so skip them. */
4917 call_name = XSTR (call_ref, 0);
4918 if (*call_name == '.')
4920 while (*call_name == '.')
4923 node = get_identifier (call_name);
4924 call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node));
4927 return force_reg (Pmode, call_ref);
4931 /* A C statement or statements to switch to the appropriate section
4932 for output of RTX in mode MODE. You can assume that RTX is some
4933 kind of constant in RTL. The argument MODE is redundant except in
4934 the case of a `const_int' rtx. Select the section by calling
4935 `text_section' or one of the alternatives for other sections.
4937 Do not define this macro if you put all constants in the read-only
4943 rs6000_select_rtx_section (mode, x)
4944 enum machine_mode mode;
4947 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x))
4953 /* A C statement or statements to switch to the appropriate
4954 section for output of DECL. DECL is either a `VAR_DECL' node
4955 or a constant of some sort. RELOC indicates whether forming
4956 the initial value of DECL requires link-time relocations. */
4959 rs6000_select_section (decl, reloc)
4963 int size = int_size_in_bytes (TREE_TYPE (decl));
4965 if (TREE_CODE (decl) == STRING_CST)
4967 if (! flag_writable_strings)
4972 else if (TREE_CODE (decl) == VAR_DECL)
4974 if ((flag_pic && reloc)
4975 || !TREE_READONLY (decl)
4976 || TREE_SIDE_EFFECTS (decl)
4977 || !DECL_INITIAL (decl)
4978 || (DECL_INITIAL (decl) != error_mark_node
4979 && !TREE_CONSTANT (DECL_INITIAL (decl))))
4981 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value))
4988 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value))
4990 if (rs6000_sdata == SDATA_EABI)
4993 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
5005 /* If we are referencing a function that is static or is known to be
5006 in this file, make the SYMBOL_REF special. We can use this to indicate
5007 that we can branch to this function without emitting a no-op after the
5008 call. For real AIX and NT calling sequences, we also replace the
5009 function name with the real name (1 or 2 leading .'s), rather than
5010 the function descriptor name. This saves a lot of overriding code
5011 to readd the prefixes. */
5014 rs6000_encode_section_info (decl)
5017 if (TREE_CODE (decl) == FUNCTION_DECL)
5019 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
5020 if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl))
5021 SYMBOL_REF_FLAG (sym_ref) = 1;
5023 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
5025 char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : "..";
5026 char *str = permalloc (strlen (prefix) + 1
5027 + strlen (XSTR (sym_ref, 0)));
5028 strcpy (str, prefix);
5029 strcat (str, XSTR (sym_ref, 0));
5030 XSTR (sym_ref, 0) = str;
5033 else if (rs6000_sdata != SDATA_NONE
5034 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
5035 && TREE_CODE (decl) == VAR_DECL)
5037 int size = int_size_in_bytes (TREE_TYPE (decl));
5038 tree section_name = DECL_SECTION_NAME (decl);
5039 char *name = (char *)0;
5044 if (TREE_CODE (section_name) == STRING_CST)
5046 name = TREE_STRING_POINTER (section_name);
5047 len = TREE_STRING_LENGTH (section_name);
5053 if ((size > 0 && size <= g_switch_value)
5055 && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0)
5056 || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0)
5057 || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0)
5058 || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0)
5059 || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0)
5060 || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0))))
5062 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
5063 char *str = permalloc (2 + strlen (XSTR (sym_ref, 0)));
5065 strcat (str, XSTR (sym_ref, 0));
5066 XSTR (sym_ref, 0) = str;
5071 #endif /* USING_SVR4_H */