1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
32 #include "insn-attr.h"
46 #ifndef TARGET_NO_PROTOTYPE
47 #define TARGET_NO_PROTOTYPE 0
50 extern int profile_block_flag;
52 #define min(A,B) ((A) < (B) ? (A) : (B))
53 #define max(A,B) ((A) > (B) ? (A) : (B))
57 enum processor_type rs6000_cpu;
58 struct rs6000_cpu_select rs6000_select[3] =
60 /* switch name, tune arch */
61 { (const char *)0, "--with-cpu=", 1, 1 },
62 { (const char *)0, "-mcpu=", 1, 1 },
63 { (const char *)0, "-mtune=", 1, 0 },
66 /* Set to non-zero once AIX common-mode calls have been defined. */
67 static int common_mode_defined;
69 /* Save information from a "cmpxx" operation until the branch or scc is
71 rtx rs6000_compare_op0, rs6000_compare_op1;
72 int rs6000_compare_fp_p;
74 /* Label number of label created for -mrelocatable, to call to so we can
75 get the address of the GOT section */
76 int rs6000_pic_labelno;
79 /* Which abi to adhere to */
80 const char *rs6000_abi_name = RS6000_ABI_NAME;
82 /* Semantics of the small data area */
83 enum rs6000_sdata_type rs6000_sdata = SDATA_DATA;
85 /* Which small data model to use */
86 const char *rs6000_sdata_name = (char *)0;
88 /* Counter for labels which are to be placed in .fixup. */
92 /* ABI enumeration available for subtarget to use. */
93 enum rs6000_abi rs6000_current_abi;
96 const char *rs6000_debug_name;
97 int rs6000_debug_stack; /* debug stack applications */
98 int rs6000_debug_arg; /* debug argument handling */
100 /* Flag to say the TOC is initialized */
102 char toc_label_name[10];
104 /* Alias set for saves and restores from the rs6000 stack. */
105 static int rs6000_sr_alias_set;
107 static void rs6000_add_gc_roots PARAMS ((void));
108 static int num_insns_constant_wide PARAMS ((HOST_WIDE_INT));
109 static rtx expand_block_move_mem PARAMS ((enum machine_mode, rtx, rtx));
110 static void validate_condition_mode
111 PARAMS ((enum rtx_code, enum machine_mode));
112 static rtx rs6000_generate_compare PARAMS ((enum rtx_code));
113 static void rs6000_maybe_dead PARAMS ((rtx));
114 static void rs6000_emit_stack_tie PARAMS ((void));
115 static void rs6000_frame_related PARAMS ((rtx, rtx, HOST_WIDE_INT, rtx, rtx));
116 static void rs6000_emit_allocate_stack PARAMS ((HOST_WIDE_INT, int));
117 static unsigned rs6000_hash_constant PARAMS ((rtx));
118 static unsigned toc_hash_function PARAMS ((const void *));
119 static int toc_hash_eq PARAMS ((const void *, const void *));
120 static int toc_hash_mark_entry PARAMS ((void **, void *));
121 static void toc_hash_mark_table PARAMS ((void *));
122 static int constant_pool_expr_1 PARAMS ((rtx, int *, int *));
123 static void rs6000_free_machine_status PARAMS ((struct function *));
124 static void rs6000_init_machine_status PARAMS ((struct function *));
125 static void rs6000_mark_machine_status PARAMS ((struct function *));
126 static int rs6000_ra_ever_killed PARAMS ((void));
128 /* Default register names. */
129 char rs6000_reg_names[][8] =
131 "0", "1", "2", "3", "4", "5", "6", "7",
132 "8", "9", "10", "11", "12", "13", "14", "15",
133 "16", "17", "18", "19", "20", "21", "22", "23",
134 "24", "25", "26", "27", "28", "29", "30", "31",
135 "0", "1", "2", "3", "4", "5", "6", "7",
136 "8", "9", "10", "11", "12", "13", "14", "15",
137 "16", "17", "18", "19", "20", "21", "22", "23",
138 "24", "25", "26", "27", "28", "29", "30", "31",
139 "mq", "lr", "ctr","ap",
140 "0", "1", "2", "3", "4", "5", "6", "7",
144 #ifdef TARGET_REGNAMES
145 static char alt_reg_names[][8] =
147 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
148 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
149 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
150 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
151 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
152 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
153 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
154 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
155 "mq", "lr", "ctr", "ap",
156 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
161 #ifndef MASK_STRICT_ALIGN
162 #define MASK_STRICT_ALIGN 0
165 /* Override command line options. Mostly we process the processor
166 type and sometimes adjust other TARGET_ options. */
169 rs6000_override_options (default_cpu)
170 const char *default_cpu;
173 struct rs6000_cpu_select *ptr;
175 /* Simplify the entries below by making a mask for any POWER
176 variant and any PowerPC variant. */
178 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
179 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
180 | MASK_PPC_GFXOPT | MASK_POWERPC64)
181 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
185 const char *name; /* Canonical processor name. */
186 enum processor_type processor; /* Processor type enum value. */
187 int target_enable; /* Target flags to enable. */
188 int target_disable; /* Target flags to disable. */
189 } processor_target_table[]
190 = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS,
191 POWER_MASKS | POWERPC_MASKS},
192 {"power", PROCESSOR_POWER,
193 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
194 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
195 {"power2", PROCESSOR_POWER,
196 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
197 POWERPC_MASKS | MASK_NEW_MNEMONICS},
198 {"power3", PROCESSOR_PPC630,
199 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
200 POWER_MASKS | MASK_PPC_GPOPT},
201 {"powerpc", PROCESSOR_POWERPC,
202 MASK_POWERPC | MASK_NEW_MNEMONICS,
203 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
204 {"powerpc64", PROCESSOR_POWERPC64,
205 MASK_POWERPC | MASK_POWERPC64 | MASK_NEW_MNEMONICS,
206 POWER_MASKS | POWERPC_OPT_MASKS},
207 {"rios", PROCESSOR_RIOS1,
208 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
209 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
210 {"rios1", PROCESSOR_RIOS1,
211 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
212 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
213 {"rsc", PROCESSOR_PPC601,
214 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
215 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
216 {"rsc1", PROCESSOR_PPC601,
217 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
218 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
219 {"rios2", PROCESSOR_RIOS2,
220 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
221 POWERPC_MASKS | MASK_NEW_MNEMONICS},
222 {"rs64a", PROCESSOR_RS64A,
223 MASK_POWERPC | MASK_NEW_MNEMONICS,
224 POWER_MASKS | POWERPC_OPT_MASKS},
225 {"401", PROCESSOR_PPC403,
226 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
227 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
228 {"403", PROCESSOR_PPC403,
229 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN,
230 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
231 {"505", PROCESSOR_MPCCORE,
232 MASK_POWERPC | MASK_NEW_MNEMONICS,
233 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
234 {"601", PROCESSOR_PPC601,
235 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
236 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
237 {"602", PROCESSOR_PPC603,
238 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
239 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
240 {"603", PROCESSOR_PPC603,
241 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
242 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
243 {"603e", PROCESSOR_PPC603,
244 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
245 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
246 {"ec603e", PROCESSOR_PPC603,
247 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
248 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
249 {"604", PROCESSOR_PPC604,
250 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
251 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
252 {"604e", PROCESSOR_PPC604e,
253 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
254 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
255 {"620", PROCESSOR_PPC620,
256 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
257 POWER_MASKS | MASK_PPC_GPOPT},
258 {"630", PROCESSOR_PPC630,
259 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
260 POWER_MASKS | MASK_PPC_GPOPT},
261 {"740", PROCESSOR_PPC750,
262 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
263 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
264 {"750", PROCESSOR_PPC750,
265 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
266 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
267 {"801", PROCESSOR_MPCCORE,
268 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
269 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
270 {"821", PROCESSOR_MPCCORE,
271 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
272 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
273 {"823", PROCESSOR_MPCCORE,
274 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
275 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
276 {"860", PROCESSOR_MPCCORE,
277 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
278 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
280 size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
282 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
283 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
285 profile_block_flag = 0;
287 /* Identify the processor type */
288 rs6000_select[0].string = default_cpu;
289 rs6000_cpu = TARGET_POWERPC64 ? PROCESSOR_DEFAULT64 : PROCESSOR_DEFAULT;
291 for (i = 0; i < ARRAY_SIZE (rs6000_select); i++)
293 ptr = &rs6000_select[i];
294 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
296 for (j = 0; j < ptt_size; j++)
297 if (! strcmp (ptr->string, processor_target_table[j].name))
300 rs6000_cpu = processor_target_table[j].processor;
304 target_flags |= processor_target_table[j].target_enable;
305 target_flags &= ~processor_target_table[j].target_disable;
311 error ("bad value (%s) for %s switch", ptr->string, ptr->name);
315 /* If we are optimizing big endian systems for space, use the
316 store multiple instructions. */
317 if (BYTES_BIG_ENDIAN && optimize_size)
318 target_flags |= MASK_MULTIPLE;
320 /* If -mmultiple or -mno-multiple was explicitly used, don't
321 override with the processor default */
322 if (TARGET_MULTIPLE_SET)
323 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
325 /* If -mstring or -mno-string was explicitly used, don't
326 override with the processor default */
327 if (TARGET_STRING_SET)
328 target_flags = (target_flags & ~MASK_STRING) | string;
330 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu
331 is a 750, because the hardware doesn't support the instructions used in
332 little endian mode, and causes an alignment trap. The 750 does not cause
333 an alignment trap (except when the target is unaligned). */
335 if (! BYTES_BIG_ENDIAN && rs6000_cpu != PROCESSOR_PPC750)
339 target_flags &= ~MASK_MULTIPLE;
340 if (TARGET_MULTIPLE_SET)
341 warning ("-mmultiple is not supported on little endian systems");
346 target_flags &= ~MASK_STRING;
347 if (TARGET_STRING_SET)
348 warning ("-mstring is not supported on little endian systems");
352 if (flag_pic && (DEFAULT_ABI == ABI_AIX))
354 warning ("-f%s ignored for AIX (all code is position independent)",
355 (flag_pic > 1) ? "PIC" : "pic");
359 if (flag_function_sections && (write_symbols != NO_DEBUG)
360 && (DEFAULT_ABI == ABI_AIX))
362 warning ("-ffunction-sections disabled on AIX when debugging");
363 flag_function_sections = 0;
366 if (flag_data_sections && (DEFAULT_ABI == ABI_AIX))
368 warning ("-fdata-sections not supported on AIX");
369 flag_data_sections = 0;
372 /* Set debug flags */
373 if (rs6000_debug_name)
375 if (! strcmp (rs6000_debug_name, "all"))
376 rs6000_debug_stack = rs6000_debug_arg = 1;
377 else if (! strcmp (rs6000_debug_name, "stack"))
378 rs6000_debug_stack = 1;
379 else if (! strcmp (rs6000_debug_name, "arg"))
380 rs6000_debug_arg = 1;
382 error ("Unknown -mdebug-%s switch", rs6000_debug_name);
385 #ifdef TARGET_REGNAMES
386 /* If the user desires alternate register names, copy in the alternate names
389 memcpy (rs6000_reg_names, alt_reg_names, sizeof (rs6000_reg_names));
392 #ifdef SUBTARGET_OVERRIDE_OPTIONS
393 SUBTARGET_OVERRIDE_OPTIONS;
396 /* Register global variables with the garbage collector. */
397 rs6000_add_gc_roots ();
399 /* Allocate an alias set for register saves & restores from stack. */
400 rs6000_sr_alias_set = new_alias_set ();
403 ASM_GENERATE_INTERNAL_LABEL (toc_label_name, "LCTOC", 1);
405 /* Arrange to save and restore machine status around nested functions. */
406 init_machine_status = rs6000_init_machine_status;
407 mark_machine_status = rs6000_mark_machine_status;
408 free_machine_status = rs6000_free_machine_status;
412 optimization_options (level, size)
413 int level ATTRIBUTE_UNUSED;
414 int size ATTRIBUTE_UNUSED;
418 /* Do anything needed at the start of the asm file. */
421 rs6000_file_start (file, default_cpu)
423 const char *default_cpu;
427 const char *start = buffer;
428 struct rs6000_cpu_select *ptr;
430 if (flag_verbose_asm)
432 sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START);
433 rs6000_select[0].string = default_cpu;
435 for (i = 0; i < ARRAY_SIZE (rs6000_select); i++)
437 ptr = &rs6000_select[i];
438 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
440 fprintf (file, "%s %s%s", start, ptr->name, ptr->string);
446 switch (rs6000_sdata)
448 case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break;
449 case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break;
450 case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break;
451 case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break;
454 if (rs6000_sdata && g_switch_value)
456 fprintf (file, "%s -G %d", start, g_switch_value);
467 /* Create a CONST_DOUBLE from a string. */
470 rs6000_float_const (string, mode)
472 enum machine_mode mode;
474 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
475 return immed_real_const_1 (value, mode);
478 /* Return non-zero if this function is known to have a null epilogue. */
483 if (reload_completed)
485 rs6000_stack_t *info = rs6000_stack_info ();
487 if (info->first_gp_reg_save == 32
488 && info->first_fp_reg_save == 64
498 /* Returns 1 always. */
501 any_operand (op, mode)
502 register rtx op ATTRIBUTE_UNUSED;
503 enum machine_mode mode ATTRIBUTE_UNUSED;
508 /* Returns 1 if op is the count register */
510 count_register_operand(op, mode)
512 enum machine_mode mode ATTRIBUTE_UNUSED;
514 if (GET_CODE (op) != REG)
517 if (REGNO (op) == COUNT_REGISTER_REGNUM)
520 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
527 xer_operand(op, mode)
529 enum machine_mode mode ATTRIBUTE_UNUSED;
531 if (GET_CODE (op) != REG)
534 if (XER_REGNO_P (REGNO (op)))
540 /* Return 1 if OP is a constant that can fit in a D field. */
543 short_cint_operand (op, mode)
545 enum machine_mode mode ATTRIBUTE_UNUSED;
547 return (GET_CODE (op) == CONST_INT
548 && CONST_OK_FOR_LETTER_P (INTVAL (op), 'I'));
551 /* Similar for a unsigned D field. */
554 u_short_cint_operand (op, mode)
556 enum machine_mode mode ATTRIBUTE_UNUSED;
558 return (GET_CODE (op) == CONST_INT
559 && CONST_OK_FOR_LETTER_P (INTVAL (op), 'K'));
562 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
565 non_short_cint_operand (op, mode)
567 enum machine_mode mode ATTRIBUTE_UNUSED;
569 return (GET_CODE (op) == CONST_INT
570 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000);
573 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
577 gpc_reg_operand (op, mode)
579 enum machine_mode mode;
581 return (register_operand (op, mode)
582 && (GET_CODE (op) != REG
583 || (REGNO (op) >= ARG_POINTER_REGNUM
584 && !XER_REGNO_P (REGNO (op)))
585 || REGNO (op) < MQ_REGNO));
588 /* Returns 1 if OP is either a pseudo-register or a register denoting a
592 cc_reg_operand (op, mode)
594 enum machine_mode mode;
596 return (register_operand (op, mode)
597 && (GET_CODE (op) != REG
598 || REGNO (op) >= FIRST_PSEUDO_REGISTER
599 || CR_REGNO_P (REGNO (op))));
602 /* Returns 1 if OP is either a pseudo-register or a register denoting a
603 CR field that isn't CR0. */
606 cc_reg_not_cr0_operand (op, mode)
608 enum machine_mode mode;
610 return (register_operand (op, mode)
611 && (GET_CODE (op) != REG
612 || REGNO (op) >= FIRST_PSEUDO_REGISTER
613 || CR_REGNO_NOT_CR0_P (REGNO (op))));
616 /* Returns 1 if OP is either a constant integer valid for a D-field or a
617 non-special register. If a register, it must be in the proper mode unless
621 reg_or_short_operand (op, mode)
623 enum machine_mode mode;
625 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
628 /* Similar, except check if the negation of the constant would be valid for
632 reg_or_neg_short_operand (op, mode)
634 enum machine_mode mode;
636 if (GET_CODE (op) == CONST_INT)
637 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
639 return gpc_reg_operand (op, mode);
642 /* Return 1 if the operand is either a register or an integer whose high-order
646 reg_or_u_short_operand (op, mode)
648 enum machine_mode mode;
650 return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
653 /* Return 1 is the operand is either a non-special register or ANY
657 reg_or_cint_operand (op, mode)
659 enum machine_mode mode;
661 return (GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode));
664 /* Return 1 is the operand is either a non-special register or ANY
665 32-bit signed constant integer. */
668 reg_or_arith_cint_operand (op, mode)
670 enum machine_mode mode;
672 return (gpc_reg_operand (op, mode)
673 || (GET_CODE (op) == CONST_INT
674 #if HOST_BITS_PER_WIDE_INT != 32
675 && ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80000000)
681 /* Return 1 is the operand is either a non-special register or ANY
682 32-bit unsigned constant integer. */
685 reg_or_logical_cint_operand (op, mode)
687 enum machine_mode mode;
689 if (GET_CODE (op) == CONST_INT)
691 if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
693 if (GET_MODE_BITSIZE (mode) <= 32)
700 return ((INTVAL (op) & GET_MODE_MASK (mode)
701 & (~ (unsigned HOST_WIDE_INT) 0xffffffff)) == 0);
703 else if (GET_CODE (op) == CONST_DOUBLE)
705 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
709 return CONST_DOUBLE_HIGH (op) == 0;
712 return gpc_reg_operand (op, mode);
715 /* Return 1 if the operand is an operand that can be loaded via the GOT */
718 got_operand (op, mode)
720 enum machine_mode mode ATTRIBUTE_UNUSED;
722 return (GET_CODE (op) == SYMBOL_REF
723 || GET_CODE (op) == CONST
724 || GET_CODE (op) == LABEL_REF);
727 /* Return 1 if the operand is a simple references that can be loaded via
728 the GOT (labels involving addition aren't allowed). */
731 got_no_const_operand (op, mode)
733 enum machine_mode mode ATTRIBUTE_UNUSED;
735 return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF);
738 /* Return the number of instructions it takes to form a constant in an
742 num_insns_constant_wide (value)
745 /* signed constant loadable with {cal|addi} */
746 if (CONST_OK_FOR_LETTER_P (value, 'I'))
749 /* constant loadable with {cau|addis} */
750 else if (CONST_OK_FOR_LETTER_P (value, 'L'))
753 #if HOST_BITS_PER_WIDE_INT == 64
754 else if (TARGET_POWERPC64)
756 unsigned HOST_WIDE_INT low = value & 0xffffffff;
757 HOST_WIDE_INT high = value >> 32;
759 if (high == 0 && (low & 0x80000000) == 0)
762 else if (high == -1 && (low & 0x80000000) != 0)
766 return num_insns_constant_wide (high) + 1;
769 return (num_insns_constant_wide (high)
770 + num_insns_constant_wide (low) + 1);
779 num_insns_constant (op, mode)
781 enum machine_mode mode;
783 if (GET_CODE (op) == CONST_INT)
784 return num_insns_constant_wide (INTVAL (op));
786 else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode)
791 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
792 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
793 return num_insns_constant_wide ((HOST_WIDE_INT)l);
796 else if (GET_CODE (op) == CONST_DOUBLE)
802 int endian = (WORDS_BIG_ENDIAN == 0);
804 if (mode == VOIDmode || mode == DImode)
806 high = CONST_DOUBLE_HIGH (op);
807 low = CONST_DOUBLE_LOW (op);
811 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
812 REAL_VALUE_TO_TARGET_DOUBLE (rv, l);
818 return (num_insns_constant_wide (low)
819 + num_insns_constant_wide (high));
823 if (high == 0 && (low & 0x80000000) == 0)
824 return num_insns_constant_wide (low);
826 else if (high == -1 && (low & 0x80000000) != 0)
827 return num_insns_constant_wide (low);
829 else if (mask64_operand (op, mode))
833 return num_insns_constant_wide (high) + 1;
836 return (num_insns_constant_wide (high)
837 + num_insns_constant_wide (low) + 1);
845 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
846 with one instruction per word. We only do this if we can safely read
847 CONST_DOUBLE_{LOW,HIGH}. */
850 easy_fp_constant (op, mode)
852 register enum machine_mode mode;
854 if (GET_CODE (op) != CONST_DOUBLE
855 || GET_MODE (op) != mode
856 || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode))
859 /* Consider all constants with -msoft-float to be easy */
860 if (TARGET_SOFT_FLOAT && mode != DImode)
863 /* If we are using V.4 style PIC, consider all constants to be hard */
864 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
867 #ifdef TARGET_RELOCATABLE
868 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
869 if (TARGET_RELOCATABLE)
878 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
879 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
881 return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1
882 && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1);
885 else if (mode == SFmode)
890 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
891 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
893 return num_insns_constant_wide (l) == 1;
896 else if (mode == DImode)
897 return ((TARGET_POWERPC64
898 && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0)
899 || (num_insns_constant (op, DImode) <= 2));
901 else if (mode == SImode)
907 /* Return 1 if the operand is in volatile memory. Note that during the
908 RTL generation phase, memory_operand does not return TRUE for
909 volatile memory references. So this function allows us to
910 recognize volatile references where its safe. */
913 volatile_mem_operand (op, mode)
915 enum machine_mode mode;
917 if (GET_CODE (op) != MEM)
920 if (!MEM_VOLATILE_P (op))
923 if (mode != GET_MODE (op))
926 if (reload_completed)
927 return memory_operand (op, mode);
929 if (reload_in_progress)
930 return strict_memory_address_p (mode, XEXP (op, 0));
932 return memory_address_p (mode, XEXP (op, 0));
935 /* Return 1 if the operand is an offsettable memory operand. */
938 offsettable_mem_operand (op, mode)
940 enum machine_mode mode;
942 return ((GET_CODE (op) == MEM)
943 && offsettable_address_p (reload_completed || reload_in_progress,
944 mode, XEXP (op, 0)));
947 /* Return 1 if the operand is either an easy FP constant (see above) or
951 mem_or_easy_const_operand (op, mode)
953 enum machine_mode mode;
955 return memory_operand (op, mode) || easy_fp_constant (op, mode);
958 /* Return 1 if the operand is either a non-special register or an item
959 that can be used as the operand of a `mode' add insn. */
962 add_operand (op, mode)
964 enum machine_mode mode;
966 return (reg_or_short_operand (op, mode)
967 || (GET_CODE (op) == CONST_INT
968 && CONST_OK_FOR_LETTER_P (INTVAL(op), 'L')));
971 /* Return 1 if OP is a constant but not a valid add_operand. */
974 non_add_cint_operand (op, mode)
976 enum machine_mode mode ATTRIBUTE_UNUSED;
978 return (GET_CODE (op) == CONST_INT
979 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000
980 && ! CONST_OK_FOR_LETTER_P (INTVAL(op), 'L'));
983 /* Return 1 if the operand is a non-special register or a constant that
984 can be used as the operand of an OR or XOR insn on the RS/6000. */
987 logical_operand (op, mode)
989 enum machine_mode mode;
991 /* an unsigned representation of 'op'. */
992 unsigned HOST_WIDE_INT opl, oph;
994 if (gpc_reg_operand (op, mode))
997 if (GET_CODE (op) == CONST_INT)
999 opl = INTVAL (op) & GET_MODE_MASK (mode);
1000 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
1003 oph = INTVAL (op) >> (HOST_BITS_PER_WIDE_INT - 1);
1005 else if (GET_CODE (op) == CONST_DOUBLE)
1007 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
1010 opl = CONST_DOUBLE_LOW (op);
1011 oph = CONST_DOUBLE_HIGH (op);
1017 && ((opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0
1018 || (opl & ~ (unsigned HOST_WIDE_INT) 0xffff0000) == 0));
1021 /* Return 1 if C is a constant that is not a logical operand (as
1022 above), but could be split into one. */
1025 non_logical_cint_operand (op, mode)
1027 enum machine_mode mode;
1029 return ((GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE)
1030 && ! logical_operand (op, mode)
1031 && reg_or_logical_cint_operand (op, mode));
1034 /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
1035 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
1036 Reject all ones and all zeros, since these should have been optimized
1037 away and confuse the making of MB and ME. */
1040 mask_operand (op, mode)
1042 enum machine_mode mode ATTRIBUTE_UNUSED;
1047 int transitions = 0;
1049 if (GET_CODE (op) != CONST_INT)
1054 if (c == 0 || c == ~0)
1057 last_bit_value = c & 1;
1059 for (i = 1; i < 32; i++)
1060 if (((c >>= 1) & 1) != last_bit_value)
1061 last_bit_value ^= 1, transitions++;
1063 return transitions <= 2;
1066 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1067 It is if there are no more than one 1->0 or 0->1 transitions.
1068 Reject all ones and all zeros, since these should have been optimized
1069 away and confuse the making of MB and ME. */
1072 mask64_operand (op, mode)
1074 enum machine_mode mode;
1076 if (GET_CODE (op) == CONST_INT)
1078 HOST_WIDE_INT c = INTVAL (op);
1081 int transitions = 0;
1083 if (c == 0 || c == ~0)
1086 last_bit_value = c & 1;
1088 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
1089 if (((c >>= 1) & 1) != last_bit_value)
1090 last_bit_value ^= 1, transitions++;
1092 return transitions <= 1;
1094 else if (GET_CODE (op) == CONST_DOUBLE
1095 && (mode == VOIDmode || mode == DImode))
1097 HOST_WIDE_INT low = CONST_DOUBLE_LOW (op);
1098 #if HOST_BITS_PER_WIDE_INT == 32
1099 HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op);
1103 int transitions = 0;
1106 #if HOST_BITS_PER_WIDE_INT == 32
1111 #if HOST_BITS_PER_WIDE_INT == 32
1117 last_bit_value = low & 1;
1119 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
1120 if (((low >>= 1) & 1) != last_bit_value)
1121 last_bit_value ^= 1, transitions++;
1123 #if HOST_BITS_PER_WIDE_INT == 32
1124 if ((high & 1) != last_bit_value)
1125 last_bit_value ^= 1, transitions++;
1127 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
1128 if (((high >>= 1) & 1) != last_bit_value)
1129 last_bit_value ^= 1, transitions++;
1132 return transitions <= 1;
1138 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1139 It is if there are no more than two 1->0 or 0->1 transitions.
1140 Reject all ones and all zeros, since these should have been optimized
1141 away and confuse the making of MB and ME. */
1144 rldic_operand (op, mode)
1146 enum machine_mode mode;
1148 if (GET_CODE (op) == CONST_INT)
1150 HOST_WIDE_INT c = INTVAL (op);
1153 int transitions = 0;
1155 if (c == 0 || c == ~0)
1158 last_bit_value = c & 1;
1160 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
1161 if (((c >>= 1) & 1) != last_bit_value)
1162 last_bit_value ^= 1, transitions++;
1164 return transitions <= 2;
1166 else if (GET_CODE (op) == CONST_DOUBLE
1167 && (mode == VOIDmode || mode == DImode))
1169 HOST_WIDE_INT low = CONST_DOUBLE_LOW (op);
1170 #if HOST_BITS_PER_WIDE_INT == 32
1171 HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op);
1175 int transitions = 0;
1178 #if HOST_BITS_PER_WIDE_INT == 32
1183 #if HOST_BITS_PER_WIDE_INT == 32
1189 last_bit_value = low & 1;
1191 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
1192 if (((low >>= 1) & 1) != last_bit_value)
1193 last_bit_value ^= 1, transitions++;
1195 #if HOST_BITS_PER_WIDE_INT == 32
1196 if ((high & 1) != last_bit_value)
1197 last_bit_value ^= 1, transitions++;
1199 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
1200 if (((high >>= 1) & 1) != last_bit_value)
1201 last_bit_value ^= 1, transitions++;
1204 return transitions <= 2;
1210 /* Return 1 if the operand is either a non-special register or a constant
1211 that can be used as the operand of a PowerPC64 logical AND insn. */
1214 and64_operand (op, mode)
1216 enum machine_mode mode;
1218 if (fixed_regs[CR0_REGNO]) /* CR0 not available, don't do andi./andis. */
1219 return (gpc_reg_operand (op, mode) || mask64_operand (op, mode));
1221 return (logical_operand (op, mode) || mask64_operand (op, mode));
1224 /* Return 1 if the operand is either a non-special register or a
1225 constant that can be used as the operand of an RS/6000 logical AND insn. */
1228 and_operand (op, mode)
1230 enum machine_mode mode;
1232 if (fixed_regs[CR0_REGNO]) /* CR0 not available, don't do andi./andis. */
1233 return (gpc_reg_operand (op, mode) || mask_operand (op, mode));
1235 return (logical_operand (op, mode) || mask_operand (op, mode));
1238 /* Return 1 if the operand is a general register or memory operand. */
1241 reg_or_mem_operand (op, mode)
1243 register enum machine_mode mode;
1245 return (gpc_reg_operand (op, mode)
1246 || memory_operand (op, mode)
1247 || volatile_mem_operand (op, mode));
1250 /* Return 1 if the operand is a general register or memory operand without
1251 pre_inc or pre_dec which produces invalid form of PowerPC lwa
1255 lwa_operand (op, mode)
1257 register enum machine_mode mode;
1261 if (reload_completed && GET_CODE (inner) == SUBREG)
1262 inner = SUBREG_REG (inner);
1264 return gpc_reg_operand (inner, mode)
1265 || (memory_operand (inner, mode)
1266 && GET_CODE (XEXP (inner, 0)) != PRE_INC
1267 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
1270 /* Return 1 if the operand, used inside a MEM, is a valid first argument
1271 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
1275 call_operand (op, mode)
1277 enum machine_mode mode;
1279 if (mode != VOIDmode && GET_MODE (op) != mode)
1282 return (GET_CODE (op) == SYMBOL_REF
1283 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
1287 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
1288 this file and the function is not weakly defined. */
1291 current_file_function_operand (op, mode)
1293 enum machine_mode mode ATTRIBUTE_UNUSED;
1295 return (GET_CODE (op) == SYMBOL_REF
1296 && (SYMBOL_REF_FLAG (op)
1297 || (op == XEXP (DECL_RTL (current_function_decl), 0)
1298 && ! DECL_WEAK (current_function_decl))));
1302 /* Return 1 if this operand is a valid input for a move insn. */
1305 input_operand (op, mode)
1307 enum machine_mode mode;
1309 /* Memory is always valid. */
1310 if (memory_operand (op, mode))
1313 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
1314 if (GET_CODE (op) == CONSTANT_P_RTX)
1317 /* For floating-point, easy constants are valid. */
1318 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1320 && easy_fp_constant (op, mode))
1323 /* Allow any integer constant. */
1324 if (GET_MODE_CLASS (mode) == MODE_INT
1325 && (GET_CODE (op) == CONST_INT
1326 || GET_CODE (op) == CONST_DOUBLE))
1329 /* For floating-point or multi-word mode, the only remaining valid type
1331 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1332 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
1333 return register_operand (op, mode);
1335 /* The only cases left are integral modes one word or smaller (we
1336 do not get called for MODE_CC values). These can be in any
1338 if (register_operand (op, mode))
1341 /* A SYMBOL_REF referring to the TOC is valid. */
1342 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
1345 /* A constant pool expression (relative to the TOC) is valid */
1346 if (TOC_RELATIVE_EXPR_P (op))
1349 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1351 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1352 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST)
1353 && small_data_operand (op, Pmode))
1359 /* Return 1 for an operand in small memory on V.4/eabi */
1362 small_data_operand (op, mode)
1363 rtx op ATTRIBUTE_UNUSED;
1364 enum machine_mode mode ATTRIBUTE_UNUSED;
1369 if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA)
1372 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
1375 if (GET_CODE (op) == SYMBOL_REF)
1378 else if (GET_CODE (op) != CONST
1379 || GET_CODE (XEXP (op, 0)) != PLUS
1380 || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF
1381 || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT)
1386 rtx sum = XEXP (op, 0);
1387 HOST_WIDE_INT summand;
1389 /* We have to be careful here, because it is the referenced address
1390 that must be 32k from _SDA_BASE_, not just the symbol. */
1391 summand = INTVAL (XEXP (sum, 1));
1392 if (summand < 0 || summand > g_switch_value)
1395 sym_ref = XEXP (sum, 0);
1398 if (*XSTR (sym_ref, 0) != '@')
1409 constant_pool_expr_1 (op, have_sym, have_toc)
1414 switch (GET_CODE(op))
1417 if (CONSTANT_POOL_ADDRESS_P (op))
1419 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (op), Pmode))
1427 else if (! strcmp (XSTR (op, 0), toc_label_name))
1436 return constant_pool_expr_1 (XEXP (op, 0), have_sym, have_toc) &&
1437 constant_pool_expr_1 (XEXP (op, 1), have_sym, have_toc);
1439 return constant_pool_expr_1 (XEXP (op, 0), have_sym, have_toc);
1448 constant_pool_expr_p (op)
1453 return constant_pool_expr_1 (op, &have_sym, &have_toc) && have_sym;
1457 toc_relative_expr_p (op)
1462 return constant_pool_expr_1 (op, &have_sym, &have_toc) && have_toc;
1465 /* Try machine-dependent ways of modifying an illegitimate address
1466 to be legitimate. If we find one, return the new, valid address.
1467 This is used from only one place: `memory_address' in explow.c.
1469 OLDX is the address as it was before break_out_memory_refs was called.
1470 In some cases it is useful to look at this to decide what needs to be done.
1472 MODE is passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS.
1474 It is always safe for this macro to do nothing. It exists to recognize
1475 opportunities to optimize the output.
1477 On RS/6000, first check for the sum of a register with a constant
1478 integer that is out of range. If so, generate code to add the
1479 constant with the low-order 16 bits masked to the register and force
1480 this result into another register (this can be done with `cau').
1481 Then generate an address of REG+(CONST&0xffff), allowing for the
1482 possibility of bit 16 being a one.
1484 Then check for the sum of a register and something not constant, try to
1485 load the other things into a register and return the sum. */
1487 rs6000_legitimize_address (x, oldx, mode)
1489 rtx oldx ATTRIBUTE_UNUSED;
1490 enum machine_mode mode;
1492 if (GET_CODE (x) == PLUS
1493 && GET_CODE (XEXP (x, 0)) == REG
1494 && GET_CODE (XEXP (x, 1)) == CONST_INT
1495 && (unsigned HOST_WIDE_INT) (INTVAL (XEXP (x, 1)) + 0x8000) >= 0x10000)
1497 HOST_WIDE_INT high_int, low_int;
1499 high_int = INTVAL (XEXP (x, 1)) & (~ (HOST_WIDE_INT) 0xffff);
1500 low_int = INTVAL (XEXP (x, 1)) & 0xffff;
1501 if (low_int & 0x8000)
1502 high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16;
1503 sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (x, 0),
1504 GEN_INT (high_int)), 0);
1505 return gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int));
1507 else if (GET_CODE (x) == PLUS
1508 && GET_CODE (XEXP (x, 0)) == REG
1509 && GET_CODE (XEXP (x, 1)) != CONST_INT
1510 && (TARGET_HARD_FLOAT || TARGET_POWERPC64 || mode != DFmode)
1511 && (TARGET_POWERPC64 || mode != DImode)
1514 return gen_rtx_PLUS (Pmode, XEXP (x, 0),
1515 force_reg (Pmode, force_operand (XEXP (x, 1), 0)));
1517 else if (TARGET_ELF && TARGET_32BIT && TARGET_NO_TOC && ! flag_pic
1518 && GET_CODE (x) != CONST_INT
1519 && GET_CODE (x) != CONST_DOUBLE
1521 && (TARGET_HARD_FLOAT || mode != DFmode)
1525 rtx reg = gen_reg_rtx (Pmode);
1526 emit_insn (gen_elf_high (reg, (x)));
1527 return gen_rtx_LO_SUM (Pmode, reg, (x));
1530 && CONSTANT_POOL_EXPR_P (x)
1531 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (x), Pmode))
1533 return create_TOC_reference (x);
1539 /* Emit a move from SOURCE to DEST in mode MODE. */
1541 rs6000_emit_move (dest, source, mode)
1544 enum machine_mode mode;
1548 operands[1] = source;
1550 /* Sanity checks. Check that we get CONST_DOUBLE only when we should. */
1551 if (GET_CODE (operands[1]) == CONST_DOUBLE
1552 && ! FLOAT_MODE_P (mode)
1553 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
1555 /* FIXME. This should never happen. */
1556 /* Since it seems that it does, do the safe thing and convert
1559 GEN_INT (trunc_int_for_mode (CONST_DOUBLE_LOW (operands[1]), mode));
1561 if (GET_CODE (operands[1]) == CONST_DOUBLE
1562 && ! FLOAT_MODE_P (mode)
1563 && ((CONST_DOUBLE_HIGH (operands[1]) == 0
1564 && CONST_DOUBLE_LOW (operands[1]) >= 0)
1565 || (CONST_DOUBLE_HIGH (operands[1]) == -1
1566 && CONST_DOUBLE_LOW (operands[1]) < 0)))
1569 if (! no_new_pseudos && GET_CODE (operands[0]) != REG)
1570 operands[1] = force_reg (mode, operands[1]);
1572 if (mode == SFmode && ! TARGET_POWERPC && TARGET_HARD_FLOAT
1573 && GET_CODE (operands[0]) == MEM)
1577 if (reload_in_progress || reload_completed)
1578 regnum = true_regnum (operands[1]);
1579 else if (GET_CODE (operands[1]) == REG)
1580 regnum = REGNO (operands[1]);
1584 /* If operands[1] is a register, on POWER it may have
1585 double-precision data in it, so truncate it to single
1587 if (FP_REGNO_P (regnum) || regnum >= FIRST_PSEUDO_REGISTER)
1590 newreg = (no_new_pseudos ? operands[1] : gen_reg_rtx (mode));
1591 emit_insn (gen_aux_truncdfsf2 (newreg, operands[1]));
1592 operands[1] = newreg;
1596 /* Handle the case where reload calls us with an invalid address;
1597 and the case of CONSTANT_P_RTX. */
1598 if (! general_operand (operands[1], mode)
1599 || ! nonimmediate_operand (operands[0], mode)
1600 || GET_CODE (operands[1]) == CONSTANT_P_RTX)
1602 emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
1606 /* FIXME: In the long term, this switch statement should go away
1607 and be replaced by a sequence of tests based on things like
1613 if (CONSTANT_P (operands[1])
1614 && GET_CODE (operands[1]) != CONST_INT)
1615 operands[1] = force_const_mem (mode, operands[1]);
1620 if (CONSTANT_P (operands[1])
1621 && ! easy_fp_constant (operands[1], mode))
1622 operands[1] = force_const_mem (mode, operands[1]);
1627 /* Use default pattern for address of ELF small data */
1630 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1631 && (GET_CODE (operands[1]) == SYMBOL_REF
1632 || GET_CODE (operands[1]) == CONST)
1633 && small_data_operand (operands[1], mode))
1635 emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
1639 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1640 && mode == Pmode && mode == SImode
1641 && flag_pic == 1 && got_operand (operands[1], mode))
1643 emit_insn (gen_movsi_got (operands[0], operands[1]));
1647 if (TARGET_ELF && TARGET_NO_TOC && ! flag_pic
1649 && CONSTANT_P (operands[1])
1650 && GET_CODE (operands[1]) != HIGH
1651 && GET_CODE (operands[1]) != CONST_INT)
1653 rtx target = (no_new_pseudos ? operands[0] : gen_reg_rtx (mode));
1655 /* If this is a function address on -mcall-aixdesc,
1656 convert it to the address of the descriptor. */
1657 if (DEFAULT_ABI == ABI_AIX
1658 && GET_CODE (operands[1]) == SYMBOL_REF
1659 && XSTR (operands[1], 0)[0] == '.')
1661 const char *name = XSTR (operands[1], 0);
1663 while (*name == '.')
1665 new_ref = gen_rtx_SYMBOL_REF (Pmode, name);
1666 CONSTANT_POOL_ADDRESS_P (new_ref)
1667 = CONSTANT_POOL_ADDRESS_P (operands[1]);
1668 SYMBOL_REF_FLAG (new_ref) = SYMBOL_REF_FLAG (operands[1]);
1669 SYMBOL_REF_USED (new_ref) = SYMBOL_REF_USED (operands[1]);
1670 operands[1] = new_ref;
1673 emit_insn (gen_elf_high (target, operands[1]));
1674 emit_insn (gen_elf_low (operands[0], target, operands[1]));
1678 /* If this is a SYMBOL_REF that refers to a constant pool entry,
1679 and we have put it in the TOC, we just need to make a TOC-relative
1682 && GET_CODE (operands[1]) == SYMBOL_REF
1683 && CONSTANT_POOL_EXPR_P (operands[1])
1684 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands[1]),
1685 get_pool_mode (operands[1])))
1687 operands[1] = create_TOC_reference (operands[1]);
1689 else if (mode == Pmode
1690 && CONSTANT_P (operands[1])
1691 && (((HOST_BITS_PER_WIDE_INT != 32
1692 || GET_CODE (operands[1]) != CONST_INT)
1693 && ! easy_fp_constant (operands[1], mode))
1694 || (GET_CODE (operands[0]) == REG
1695 && FP_REGNO_P (REGNO (operands[0]))))
1696 && GET_CODE (operands[1]) != HIGH
1697 && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands[1])
1698 && ! TOC_RELATIVE_EXPR_P (operands[1]))
1700 int special_constant_p = 0;
1702 /* Emit a USE operation so that the constant isn't deleted if
1703 expensive optimizations are turned on because nobody
1704 references it. This should only be done for operands that
1705 contain SYMBOL_REFs with CONSTANT_POOL_ADDRESS_P set.
1706 This should not be done for operands that contain LABEL_REFs.
1707 For now, we just handle the obvious case. */
1708 if (GET_CODE (operands[1]) != LABEL_REF)
1709 emit_insn (gen_rtx_USE (VOIDmode, operands[1]));
1711 /* If we are to limit the number of things we put in the TOC and
1712 this is a symbol plus a constant we can add in one insn,
1713 just put the symbol in the TOC and add the constant. Don't do
1714 this if reload is in progress. */
1715 if (GET_CODE (operands[1]) == CONST
1716 && TARGET_NO_SUM_IN_TOC && ! reload_in_progress
1717 && GET_CODE (XEXP (operands[1], 0)) == PLUS
1718 && add_operand (XEXP (XEXP (operands[1], 0), 1), mode)
1719 && (GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == LABEL_REF
1720 || GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == SYMBOL_REF)
1721 && ! side_effects_p (operands[0]))
1723 rtx sym = force_const_mem (mode, XEXP (XEXP (operands[1], 0), 0));
1724 rtx other = XEXP (XEXP (operands[1], 0), 1);
1726 sym = force_reg (mode, sym);
1728 emit_insn (gen_addsi3 (operands[0], sym, other));
1730 emit_insn (gen_adddi3 (operands[0], sym, other));
1734 operands[1] = force_const_mem (mode, operands[1]);
1737 && CONSTANT_POOL_EXPR_P (XEXP (operands[1], 0)))
1740 enum machine_mode cmode;
1742 constant = get_pool_constant (XEXP (operands[1], 0));
1743 cmode = get_pool_mode (XEXP (operands[1], 0));
1744 special_constant_p =
1745 ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (constant, cmode);
1748 if (special_constant_p)
1750 operands[1] = gen_rtx_MEM (mode,
1751 create_TOC_reference (XEXP (operands[1], 0)));
1752 MEM_ALIAS_SET (operands[1]) = get_TOC_alias_set ();
1753 RTX_UNCHANGING_P (operands[1]) = 1;
1759 if (GET_CODE (operands[0]) == MEM
1760 && GET_CODE (XEXP (operands[0], 0)) != REG
1761 && ! reload_in_progress)
1762 operands[0] = change_address (operands[0], TImode,
1763 copy_addr_to_reg (XEXP (operands[0], 0)));
1765 if (GET_CODE (operands[1]) == MEM
1766 && GET_CODE (XEXP (operands[1], 0)) != REG
1767 && ! reload_in_progress)
1768 operands[1] = change_address (operands[1], TImode,
1769 copy_addr_to_reg (XEXP (operands[1], 0)));
1776 /* Above, we may have called force_const_mem which may have returned
1777 an invalid address. If we can, fix this up; otherwise, reload will
1778 have to deal with it. */
1779 if (GET_CODE (operands[1]) == MEM
1780 && ! memory_address_p (mode, XEXP (operands[1], 0))
1781 && ! reload_in_progress)
1782 operands[1] = change_address (operands[1], mode,
1783 XEXP (operands[1], 0));
1785 emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
1789 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1790 for a call to a function whose data type is FNTYPE.
1791 For a library call, FNTYPE is 0.
1793 For incoming args we set the number of arguments in the prototype large
1794 so we never return a PARALLEL. */
1797 init_cumulative_args (cum, fntype, libname, incoming)
1798 CUMULATIVE_ARGS *cum;
1800 rtx libname ATTRIBUTE_UNUSED;
1803 static CUMULATIVE_ARGS zero_cumulative;
1805 *cum = zero_cumulative;
1807 cum->fregno = FP_ARG_MIN_REG;
1808 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
1809 cum->call_cookie = CALL_NORMAL;
1810 cum->sysv_gregno = GP_ARG_MIN_REG;
1813 cum->nargs_prototype = 1000; /* don't return a PARALLEL */
1815 else if (cum->prototype)
1816 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
1817 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
1818 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
1821 cum->nargs_prototype = 0;
1823 cum->orig_nargs = cum->nargs_prototype;
1825 /* Check for longcall's */
1826 if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype)))
1827 cum->call_cookie = CALL_LONG;
1829 if (TARGET_DEBUG_ARG)
1831 fprintf (stderr, "\ninit_cumulative_args:");
1834 tree ret_type = TREE_TYPE (fntype);
1835 fprintf (stderr, " ret code = %s,",
1836 tree_code_name[ (int)TREE_CODE (ret_type) ]);
1839 if (cum->call_cookie & CALL_LONG)
1840 fprintf (stderr, " longcall,");
1842 fprintf (stderr, " proto = %d, nargs = %d\n",
1843 cum->prototype, cum->nargs_prototype);
1847 /* If defined, a C expression which determines whether, and in which
1848 direction, to pad out an argument with extra space. The value
1849 should be of type `enum direction': either `upward' to pad above
1850 the argument, `downward' to pad below, or `none' to inhibit
1853 For the AIX ABI structs are always stored left shifted in their
1857 function_arg_padding (mode, type)
1858 enum machine_mode mode;
1861 if (type != 0 && AGGREGATE_TYPE_P (type))
1864 /* This is the default definition. */
1865 return (! BYTES_BIG_ENDIAN
1868 ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
1869 && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT))
1870 : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY)
1871 ? downward : upward));
1874 /* If defined, a C expression that gives the alignment boundary, in bits,
1875 of an argument with the specified mode and type. If it is not defined,
1876 PARM_BOUNDARY is used for all arguments.
1878 V.4 wants long longs to be double word aligned. */
1881 function_arg_boundary (mode, type)
1882 enum machine_mode mode;
1883 tree type ATTRIBUTE_UNUSED;
1885 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1886 && (mode == DImode || mode == DFmode))
1889 return PARM_BOUNDARY;
1892 /* Update the data in CUM to advance over an argument
1893 of mode MODE and data type TYPE.
1894 (TYPE is null for libcalls where that information may not be available.) */
1897 function_arg_advance (cum, mode, type, named)
1898 CUMULATIVE_ARGS *cum;
1899 enum machine_mode mode;
1903 cum->nargs_prototype--;
1905 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1907 if (TARGET_HARD_FLOAT
1908 && (mode == SFmode || mode == DFmode))
1910 if (cum->fregno <= FP_ARG_V4_MAX_REG)
1915 cum->words += cum->words & 1;
1916 cum->words += RS6000_ARG_SIZE (mode, type, 1);
1922 int gregno = cum->sysv_gregno;
1924 /* Aggregates and IEEE quad get passed by reference. */
1925 if ((type && AGGREGATE_TYPE_P (type))
1929 n_words = RS6000_ARG_SIZE (mode, type, 1);
1931 /* Long long is put in odd registers. */
1932 if (n_words == 2 && (gregno & 1) == 0)
1935 /* Long long is not split between registers and stack. */
1936 if (gregno + n_words - 1 > GP_ARG_MAX_REG)
1938 /* Long long is aligned on the stack. */
1940 cum->words += cum->words & 1;
1941 cum->words += n_words;
1944 /* Note: continuing to accumulate gregno past when we've started
1945 spilling to the stack indicates the fact that we've started
1946 spilling to the stack to expand_builtin_saveregs. */
1947 cum->sysv_gregno = gregno + n_words;
1950 if (TARGET_DEBUG_ARG)
1952 fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ",
1953 cum->words, cum->fregno);
1954 fprintf (stderr, "gregno = %2d, nargs = %4d, proto = %d, ",
1955 cum->sysv_gregno, cum->nargs_prototype, cum->prototype);
1956 fprintf (stderr, "mode = %4s, named = %d\n",
1957 GET_MODE_NAME (mode), named);
1962 int align = (TARGET_32BIT && (cum->words & 1) != 0
1963 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1964 cum->words += align;
1968 cum->words += RS6000_ARG_SIZE (mode, type, named);
1969 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
1973 if (TARGET_DEBUG_ARG)
1975 fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ",
1976 cum->words, cum->fregno);
1977 fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s, ",
1978 cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode));
1979 fprintf (stderr, "named = %d, align = %d\n", named, align);
1984 /* Determine where to put an argument to a function.
1985 Value is zero to push the argument on the stack,
1986 or a hard register in which to store the argument.
1988 MODE is the argument's machine mode.
1989 TYPE is the data type of the argument (as a tree).
1990 This is null for libcalls where that information may
1992 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1993 the preceding args and about the function being called.
1994 NAMED is nonzero if this argument is a named parameter
1995 (otherwise it is an extra parameter matching an ellipsis).
1997 On RS/6000 the first eight words of non-FP are normally in registers
1998 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1999 Under V.4, the first 8 FP args are in registers.
2001 If this is floating-point and no prototype is specified, we use
2002 both an FP and integer register (or possibly FP reg and stack). Library
2003 functions (when TYPE is zero) always have the proper types for args,
2004 so we can pass the FP value just in one register. emit_library_function
2005 doesn't support PARALLEL anyway. */
2008 function_arg (cum, mode, type, named)
2009 CUMULATIVE_ARGS *cum;
2010 enum machine_mode mode;
2014 enum rs6000_abi abi = DEFAULT_ABI;
2016 /* Return a marker to indicate whether CR1 needs to set or clear the bit
2017 that V.4 uses to say fp args were passed in registers. Assume that we
2018 don't need the marker for software floating point, or compiler generated
2020 if (mode == VOIDmode)
2022 if ((abi == ABI_V4 || abi == ABI_SOLARIS)
2023 && TARGET_HARD_FLOAT
2024 && cum->nargs_prototype < 0
2025 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
2027 return GEN_INT (cum->call_cookie
2028 | ((cum->fregno == FP_ARG_MIN_REG)
2029 ? CALL_V4_SET_FP_ARGS
2030 : CALL_V4_CLEAR_FP_ARGS));
2033 return GEN_INT (cum->call_cookie);
2036 if (abi == ABI_V4 || abi == ABI_SOLARIS)
2038 if (TARGET_HARD_FLOAT
2039 && (mode == SFmode || mode == DFmode))
2041 if (cum->fregno <= FP_ARG_V4_MAX_REG)
2042 return gen_rtx_REG (mode, cum->fregno);
2049 int gregno = cum->sysv_gregno;
2051 /* Aggregates and IEEE quad get passed by reference. */
2052 if ((type && AGGREGATE_TYPE_P (type))
2056 n_words = RS6000_ARG_SIZE (mode, type, 1);
2058 /* Long long is put in odd registers. */
2059 if (n_words == 2 && (gregno & 1) == 0)
2062 /* Long long is not split between registers and stack. */
2063 if (gregno + n_words - 1 <= GP_ARG_MAX_REG)
2064 return gen_rtx_REG (mode, gregno);
2071 int align = (TARGET_32BIT && (cum->words & 1) != 0
2072 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
2073 int align_words = cum->words + align;
2078 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
2081 if (USE_FP_FOR_ARG_P (*cum, mode, type))
2084 || ((cum->nargs_prototype > 0)
2085 /* IBM AIX extended its linkage convention definition always
2086 to require FP args after register save area hole on the
2088 && (DEFAULT_ABI != ABI_AIX
2090 || (align_words < GP_ARG_NUM_REG))))
2091 return gen_rtx_REG (mode, cum->fregno);
2093 return gen_rtx_PARALLEL (mode,
2095 gen_rtx_EXPR_LIST (VOIDmode,
2096 ((align_words >= GP_ARG_NUM_REG)
2099 + RS6000_ARG_SIZE (mode, type, named)
2101 /* If this is partially on the stack, then
2102 we only include the portion actually
2103 in registers here. */
2104 ? gen_rtx_REG (SImode,
2105 GP_ARG_MIN_REG + align_words)
2106 : gen_rtx_REG (mode,
2107 GP_ARG_MIN_REG + align_words))),
2109 gen_rtx_EXPR_LIST (VOIDmode,
2110 gen_rtx_REG (mode, cum->fregno),
2113 else if (align_words < GP_ARG_NUM_REG)
2114 return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);
2120 /* For an arg passed partly in registers and partly in memory,
2121 this is the number of registers used.
2122 For args passed entirely in registers or entirely in memory, zero. */
2125 function_arg_partial_nregs (cum, mode, type, named)
2126 CUMULATIVE_ARGS *cum;
2127 enum machine_mode mode;
2134 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
2137 if (USE_FP_FOR_ARG_P (*cum, mode, type))
2139 if (cum->nargs_prototype >= 0)
2143 if (cum->words < GP_ARG_NUM_REG
2144 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
2146 int ret = GP_ARG_NUM_REG - cum->words;
2147 if (ret && TARGET_DEBUG_ARG)
2148 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
2156 /* A C expression that indicates when an argument must be passed by
2157 reference. If nonzero for an argument, a copy of that argument is
2158 made in memory and a pointer to the argument is passed instead of
2159 the argument itself. The pointer is passed in whatever way is
2160 appropriate for passing a pointer to that type.
2162 Under V.4, structures and unions are passed by reference. */
2165 function_arg_pass_by_reference (cum, mode, type, named)
2166 CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED;
2167 enum machine_mode mode ATTRIBUTE_UNUSED;
2169 int named ATTRIBUTE_UNUSED;
2171 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
2172 && ((type && AGGREGATE_TYPE_P (type))
2175 if (TARGET_DEBUG_ARG)
2176 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
2184 /* Perform any needed actions needed for a function that is receiving a
2185 variable number of arguments.
2189 MODE and TYPE are the mode and type of the current parameter.
2191 PRETEND_SIZE is a variable that should be set to the amount of stack
2192 that must be pushed by the prolog to pretend that our caller pushed
2195 Normally, this macro will push all remaining incoming registers on the
2196 stack and set PRETEND_SIZE to the length of the registers pushed. */
2199 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
2200 CUMULATIVE_ARGS *cum;
2201 enum machine_mode mode;
2207 CUMULATIVE_ARGS next_cum;
2208 int reg_size = TARGET_32BIT ? 4 : 8;
2210 int first_reg_offset, set;
2212 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
2217 fntype = TREE_TYPE (current_function_decl);
2218 stdarg_p = (TYPE_ARG_TYPES (fntype) != 0
2219 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
2220 != void_type_node));
2222 /* For varargs, we do not want to skip the dummy va_dcl argument.
2223 For stdargs, we do want to skip the last named argument. */
2226 function_arg_advance (&next_cum, mode, type, 1);
2228 /* Indicate to allocate space on the stack for varargs save area. */
2229 /* ??? Does this really have to be located at a magic spot on the
2230 stack, or can we allocate this with assign_stack_local instead. */
2231 cfun->machine->sysv_varargs_p = 1;
2233 save_area = plus_constant (virtual_stack_vars_rtx,
2234 - RS6000_VARARGS_SIZE);
2236 first_reg_offset = next_cum.sysv_gregno - GP_ARG_MIN_REG;
2240 save_area = virtual_incoming_args_rtx;
2241 cfun->machine->sysv_varargs_p = 0;
2243 first_reg_offset = cum->words;
2244 if (MUST_PASS_IN_STACK (mode, type))
2245 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
2248 set = get_varargs_alias_set ();
2249 if (! no_rtl && first_reg_offset < GP_ARG_NUM_REG)
2251 mem = gen_rtx_MEM (BLKmode,
2252 plus_constant (save_area,
2253 first_reg_offset * reg_size)),
2254 MEM_ALIAS_SET (mem) = set;
2257 (GP_ARG_MIN_REG + first_reg_offset, mem,
2258 GP_ARG_NUM_REG - first_reg_offset,
2259 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
2261 /* ??? Does ABI_V4 need this at all? */
2262 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
2265 /* Save FP registers if needed. */
2266 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
2267 && TARGET_HARD_FLOAT && ! no_rtl
2268 && next_cum.fregno <= FP_ARG_V4_MAX_REG)
2270 int fregno = next_cum.fregno;
2271 rtx cr1 = gen_rtx_REG (CCmode, CR1_REGNO);
2272 rtx lab = gen_label_rtx ();
2273 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
2275 emit_jump_insn (gen_rtx_SET (VOIDmode,
2277 gen_rtx_IF_THEN_ELSE (VOIDmode,
2278 gen_rtx_NE (VOIDmode, cr1,
2280 gen_rtx_LABEL_REF (VOIDmode, lab),
2283 while (fregno <= FP_ARG_V4_MAX_REG)
2285 mem = gen_rtx_MEM (DFmode, plus_constant (save_area, off));
2286 MEM_ALIAS_SET (mem) = set;
2287 emit_move_insn (mem, gen_rtx_REG (DFmode, fregno));
2296 /* Create the va_list data type. */
2299 rs6000_build_va_list ()
2301 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
2303 /* For AIX, prefer 'char *' because that's what the system
2304 header files like. */
2305 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
2306 return build_pointer_type (char_type_node);
2308 record = make_lang_type (RECORD_TYPE);
2309 type_decl = build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
2311 f_gpr = build_decl (FIELD_DECL, get_identifier ("gpr"),
2312 unsigned_char_type_node);
2313 f_fpr = build_decl (FIELD_DECL, get_identifier ("fpr"),
2314 unsigned_char_type_node);
2315 f_ovf = build_decl (FIELD_DECL, get_identifier ("overflow_arg_area"),
2317 f_sav = build_decl (FIELD_DECL, get_identifier ("reg_save_area"),
2320 DECL_FIELD_CONTEXT (f_gpr) = record;
2321 DECL_FIELD_CONTEXT (f_fpr) = record;
2322 DECL_FIELD_CONTEXT (f_ovf) = record;
2323 DECL_FIELD_CONTEXT (f_sav) = record;
2325 TREE_CHAIN (record) = type_decl;
2326 TYPE_NAME (record) = type_decl;
2327 TYPE_FIELDS (record) = f_gpr;
2328 TREE_CHAIN (f_gpr) = f_fpr;
2329 TREE_CHAIN (f_fpr) = f_ovf;
2330 TREE_CHAIN (f_ovf) = f_sav;
2332 layout_type (record);
2334 /* The correct type is an array type of one element. */
2335 return build_array_type (record, build_index_type (size_zero_node));
2338 /* Implement va_start. */
2341 rs6000_va_start (stdarg_p, valist, nextarg)
2346 HOST_WIDE_INT words, n_gpr, n_fpr;
2347 tree f_gpr, f_fpr, f_ovf, f_sav;
2348 tree gpr, fpr, ovf, sav, t;
2350 /* Only SVR4 needs something special. */
2351 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
2353 std_expand_builtin_va_start (stdarg_p, valist, nextarg);
2357 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
2358 f_fpr = TREE_CHAIN (f_gpr);
2359 f_ovf = TREE_CHAIN (f_fpr);
2360 f_sav = TREE_CHAIN (f_ovf);
2362 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
2363 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
2364 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
2365 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
2366 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
2368 /* Count number of gp and fp argument registers used. */
2369 words = current_function_args_info.words;
2370 n_gpr = current_function_args_info.sysv_gregno - GP_ARG_MIN_REG;
2371 n_fpr = current_function_args_info.fregno - FP_ARG_MIN_REG;
2373 if (TARGET_DEBUG_ARG)
2374 fprintf (stderr, "va_start: words = %d, n_gpr = %d, n_fpr = %d\n",
2375 words, n_gpr, n_fpr);
2377 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
2378 TREE_SIDE_EFFECTS (t) = 1;
2379 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2381 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
2382 TREE_SIDE_EFFECTS (t) = 1;
2383 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2385 /* Find the overflow area. */
2386 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
2388 t = build (PLUS_EXPR, TREE_TYPE (ovf), t,
2389 build_int_2 (words * UNITS_PER_WORD, 0));
2390 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
2391 TREE_SIDE_EFFECTS (t) = 1;
2392 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2394 /* Find the register save area. */
2395 t = make_tree (TREE_TYPE (sav), virtual_stack_vars_rtx);
2396 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
2397 build_int_2 (-RS6000_VARARGS_SIZE, -1));
2398 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
2399 TREE_SIDE_EFFECTS (t) = 1;
2400 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2403 /* Implement va_arg. */
2406 rs6000_va_arg (valist, type)
2409 tree f_gpr, f_fpr, f_ovf, f_sav;
2410 tree gpr, fpr, ovf, sav, reg, t, u;
2411 int indirect_p, size, rsize, n_reg, sav_ofs, sav_scale;
2412 rtx lab_false, lab_over, addr_rtx, r;
2414 /* For AIX, the rule is that structures are passed left-aligned in
2415 their stack slot. However, GCC does not presently do this:
2416 structures which are the same size as integer types are passed
2417 right-aligned, as if they were in fact integers. This only
2418 matters for structures of size 1 or 2, or 4 when TARGET_64BIT. */
2419 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
2421 HOST_WIDE_INT align, rounded_size;
2422 enum machine_mode mode;
2425 /* Compute the rounded size of the type. */
2426 align = PARM_BOUNDARY / BITS_PER_UNIT;
2427 rounded_size = (((int_size_in_bytes (type) + align - 1) / align)
2432 mode = TYPE_MODE (type);
2433 if (mode != BLKmode)
2436 adj = TREE_INT_CST_LOW (TYPE_SIZE (type)) / BITS_PER_UNIT;
2437 if (rounded_size > align)
2440 addr_tree = build (PLUS_EXPR, TREE_TYPE (addr_tree), addr_tree,
2441 build_int_2 (rounded_size - adj, 0));
2444 addr_rtx = expand_expr (addr_tree, NULL_RTX, Pmode, EXPAND_NORMAL);
2445 addr_rtx = copy_to_reg (addr_rtx);
2447 /* Compute new value for AP. */
2448 t = build (MODIFY_EXPR, TREE_TYPE (valist), valist,
2449 build (PLUS_EXPR, TREE_TYPE (valist), valist,
2450 build_int_2 (rounded_size, 0)));
2451 TREE_SIDE_EFFECTS (t) = 1;
2452 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2457 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
2458 f_fpr = TREE_CHAIN (f_gpr);
2459 f_ovf = TREE_CHAIN (f_fpr);
2460 f_sav = TREE_CHAIN (f_ovf);
2462 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
2463 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
2464 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
2465 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
2466 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
2468 size = int_size_in_bytes (type);
2469 rsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2471 if (AGGREGATE_TYPE_P (type) || TYPE_MODE (type) == TFmode)
2473 /* Aggregates and long doubles are passed by reference. */
2479 size = rsize = UNITS_PER_WORD;
2481 else if (FLOAT_TYPE_P (type) && ! TARGET_SOFT_FLOAT)
2483 /* FP args go in FP registers, if present. */
2492 /* Otherwise into GP registers. */
2501 * Pull the value out of the saved registers ...
2504 lab_false = gen_label_rtx ();
2505 lab_over = gen_label_rtx ();
2506 addr_rtx = gen_reg_rtx (Pmode);
2508 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, QImode, EXPAND_NORMAL),
2509 GEN_INT (8 - n_reg + 1),
2510 GE, const1_rtx, QImode, 1, 1, lab_false);
2512 /* Long long is aligned in the registers. */
2515 u = build (BIT_AND_EXPR, TREE_TYPE (reg), reg,
2516 build_int_2 (n_reg - 1, 0));
2517 u = build (PLUS_EXPR, TREE_TYPE (reg), reg, u);
2518 u = build (MODIFY_EXPR, TREE_TYPE (reg), reg, u);
2519 TREE_SIDE_EFFECTS (u) = 1;
2520 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
2524 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
2528 u = build (POSTINCREMENT_EXPR, TREE_TYPE (reg), reg, build_int_2 (n_reg, 0));
2529 TREE_SIDE_EFFECTS (u) = 1;
2531 u = build1 (CONVERT_EXPR, integer_type_node, u);
2532 TREE_SIDE_EFFECTS (u) = 1;
2534 u = build (MULT_EXPR, integer_type_node, u, build_int_2 (sav_scale, 0));
2535 TREE_SIDE_EFFECTS (u) = 1;
2537 t = build (PLUS_EXPR, ptr_type_node, t, u);
2538 TREE_SIDE_EFFECTS (t) = 1;
2540 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
2542 emit_move_insn (addr_rtx, r);
2544 emit_jump_insn (gen_jump (lab_over));
2546 emit_label (lab_false);
2549 * ... otherwise out of the overflow area.
2552 /* Make sure we don't find reg 7 for the next int arg. */
2555 t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, build_int_2 (8, 0));
2556 TREE_SIDE_EFFECTS (t) = 1;
2557 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2560 /* Care for on-stack alignment if needed. */
2565 t = build (PLUS_EXPR, TREE_TYPE (ovf), ovf, build_int_2 (7, 0));
2566 t = build (BIT_AND_EXPR, TREE_TYPE (t), t, build_int_2 (-8, -1));
2570 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
2572 emit_move_insn (addr_rtx, r);
2574 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
2575 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
2576 TREE_SIDE_EFFECTS (t) = 1;
2577 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
2579 emit_label (lab_over);
2583 r = gen_rtx_MEM (Pmode, addr_rtx);
2584 MEM_ALIAS_SET (r) = get_varargs_alias_set ();
2585 emit_move_insn (addr_rtx, r);
2591 /* Generate a memory reference for expand_block_move, copying volatile,
2592 and other bits from an original memory reference. */
2595 expand_block_move_mem (mode, addr, orig_mem)
2596 enum machine_mode mode;
2600 rtx mem = gen_rtx_MEM (mode, addr);
2602 MEM_COPY_ATTRIBUTES (mem, orig_mem);
2603 #ifdef MEM_UNALIGNED_P
2604 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
2609 /* Expand a block move operation, and return 1 if successful. Return 0
2610 if we should let the compiler generate normal code.
2612 operands[0] is the destination
2613 operands[1] is the source
2614 operands[2] is the length
2615 operands[3] is the alignment */
2617 #define MAX_MOVE_REG 4
2620 expand_block_move (operands)
2623 rtx orig_dest = operands[0];
2624 rtx orig_src = operands[1];
2625 rtx bytes_rtx = operands[2];
2626 rtx align_rtx = operands[3];
2627 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
2638 rtx stores[MAX_MOVE_REG];
2641 /* If this is not a fixed size move, just call memcpy */
2645 /* If this is not a fixed size alignment, abort */
2646 if (GET_CODE (align_rtx) != CONST_INT)
2648 align = INTVAL (align_rtx);
2650 /* Anything to move? */
2651 bytes = INTVAL (bytes_rtx);
2655 /* Don't support real large moves. If string instructions are not used,
2656 then don't generate more than 8 loads. */
2662 else if (! STRICT_ALIGNMENT)
2664 if (TARGET_POWERPC64 && align >= 4)
2673 else if (bytes > 8*align)
2676 /* Move the address into scratch registers. */
2677 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
2678 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
2680 if (TARGET_STRING) /* string instructions are available */
2682 for ( ; bytes > 0; bytes -= move_bytes)
2684 if (bytes > 24 /* move up to 32 bytes at a time */
2692 && ! fixed_regs[12])
2694 move_bytes = (bytes > 32) ? 32 : bytes;
2695 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode,
2698 expand_block_move_mem (BLKmode,
2701 GEN_INT ((move_bytes == 32)
2705 else if (bytes > 16 /* move up to 24 bytes at a time */
2711 && ! fixed_regs[10])
2713 move_bytes = (bytes > 24) ? 24 : bytes;
2714 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode,
2717 expand_block_move_mem (BLKmode,
2720 GEN_INT (move_bytes),
2723 else if (bytes > 8 /* move up to 16 bytes at a time */
2729 move_bytes = (bytes > 16) ? 16 : bytes;
2730 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode,
2733 expand_block_move_mem (BLKmode,
2736 GEN_INT (move_bytes),
2739 else if (bytes >= 8 && TARGET_POWERPC64
2740 /* 64-bit loads and stores require word-aligned displacements. */
2741 && (align >= 8 || (! STRICT_ALIGNMENT && align >= 4)))
2744 tmp_reg = gen_reg_rtx (DImode);
2745 emit_move_insn (tmp_reg,
2746 expand_block_move_mem (DImode,
2747 src_reg, orig_src));
2748 emit_move_insn (expand_block_move_mem (DImode,
2749 dest_reg, orig_dest),
2753 { /* move up to 8 bytes at a time */
2754 move_bytes = (bytes > 8) ? 8 : bytes;
2755 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode,
2758 expand_block_move_mem (BLKmode,
2761 GEN_INT (move_bytes),
2764 else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
2765 { /* move 4 bytes */
2767 tmp_reg = gen_reg_rtx (SImode);
2768 emit_move_insn (tmp_reg,
2769 expand_block_move_mem (SImode,
2770 src_reg, orig_src));
2771 emit_move_insn (expand_block_move_mem (SImode,
2772 dest_reg, orig_dest),
2775 else if (bytes == 2 && (align >= 2 || ! STRICT_ALIGNMENT))
2776 { /* move 2 bytes */
2778 tmp_reg = gen_reg_rtx (HImode);
2779 emit_move_insn (tmp_reg,
2780 expand_block_move_mem (HImode,
2781 src_reg, orig_src));
2782 emit_move_insn (expand_block_move_mem (HImode,
2783 dest_reg, orig_dest),
2786 else if (bytes == 1) /* move 1 byte */
2789 tmp_reg = gen_reg_rtx (QImode);
2790 emit_move_insn (tmp_reg,
2791 expand_block_move_mem (QImode,
2792 src_reg, orig_src));
2793 emit_move_insn (expand_block_move_mem (QImode,
2794 dest_reg, orig_dest),
2798 { /* move up to 4 bytes at a time */
2799 move_bytes = (bytes > 4) ? 4 : bytes;
2800 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode,
2803 expand_block_move_mem (BLKmode,
2806 GEN_INT (move_bytes),
2810 if (bytes > move_bytes)
2812 if (! TARGET_POWERPC64)
2814 emit_insn (gen_addsi3 (src_reg, src_reg,
2815 GEN_INT (move_bytes)));
2816 emit_insn (gen_addsi3 (dest_reg, dest_reg,
2817 GEN_INT (move_bytes)));
2821 emit_insn (gen_adddi3 (src_reg, src_reg,
2822 GEN_INT (move_bytes)));
2823 emit_insn (gen_adddi3 (dest_reg, dest_reg,
2824 GEN_INT (move_bytes)));
2830 else /* string instructions not available */
2832 num_reg = offset = 0;
2833 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
2835 /* Calculate the correct offset for src/dest */
2839 dest_addr = dest_reg;
2843 src_addr = plus_constant (src_reg, offset);
2844 dest_addr = plus_constant (dest_reg, offset);
2847 /* Generate the appropriate load and store, saving the stores
2849 if (bytes >= 8 && TARGET_POWERPC64
2850 /* 64-bit loads and stores require word-aligned displacements. */
2851 && (align >= 8 || (! STRICT_ALIGNMENT && align >= 4)))
2854 tmp_reg = gen_reg_rtx (DImode);
2855 emit_insn (gen_movdi (tmp_reg,
2856 expand_block_move_mem (DImode,
2859 stores[num_reg++] = gen_movdi (expand_block_move_mem (DImode,
2864 else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
2867 tmp_reg = gen_reg_rtx (SImode);
2868 emit_insn (gen_movsi (tmp_reg,
2869 expand_block_move_mem (SImode,
2872 stores[num_reg++] = gen_movsi (expand_block_move_mem (SImode,
2877 else if (bytes >= 2 && (align >= 2 || ! STRICT_ALIGNMENT))
2880 tmp_reg = gen_reg_rtx (HImode);
2881 emit_insn (gen_movhi (tmp_reg,
2882 expand_block_move_mem (HImode,
2885 stores[num_reg++] = gen_movhi (expand_block_move_mem (HImode,
2893 tmp_reg = gen_reg_rtx (QImode);
2894 emit_insn (gen_movqi (tmp_reg,
2895 expand_block_move_mem (QImode,
2898 stores[num_reg++] = gen_movqi (expand_block_move_mem (QImode,
2904 if (num_reg >= MAX_MOVE_REG)
2906 for (i = 0; i < num_reg; i++)
2907 emit_insn (stores[i]);
2912 for (i = 0; i < num_reg; i++)
2913 emit_insn (stores[i]);
2920 /* Return 1 if OP is a load multiple operation. It is known to be a
2921 PARALLEL and the first section will be tested. */
2924 load_multiple_operation (op, mode)
2926 enum machine_mode mode ATTRIBUTE_UNUSED;
2928 int count = XVECLEN (op, 0);
2929 unsigned int dest_regno;
2933 /* Perform a quick check so we don't blow up below. */
2935 || GET_CODE (XVECEXP (op, 0, 0)) != SET
2936 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
2937 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
2940 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
2941 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
2943 for (i = 1; i < count; i++)
2945 rtx elt = XVECEXP (op, 0, i);
2947 if (GET_CODE (elt) != SET
2948 || GET_CODE (SET_DEST (elt)) != REG
2949 || GET_MODE (SET_DEST (elt)) != SImode
2950 || REGNO (SET_DEST (elt)) != dest_regno + i
2951 || GET_CODE (SET_SRC (elt)) != MEM
2952 || GET_MODE (SET_SRC (elt)) != SImode
2953 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
2954 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
2955 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
2956 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
2963 /* Similar, but tests for store multiple. Here, the second vector element
2964 is a CLOBBER. It will be tested later. */
2967 store_multiple_operation (op, mode)
2969 enum machine_mode mode ATTRIBUTE_UNUSED;
2971 int count = XVECLEN (op, 0) - 1;
2972 unsigned int src_regno;
2976 /* Perform a quick check so we don't blow up below. */
2978 || GET_CODE (XVECEXP (op, 0, 0)) != SET
2979 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
2980 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
2983 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
2984 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
2986 for (i = 1; i < count; i++)
2988 rtx elt = XVECEXP (op, 0, i + 1);
2990 if (GET_CODE (elt) != SET
2991 || GET_CODE (SET_SRC (elt)) != REG
2992 || GET_MODE (SET_SRC (elt)) != SImode
2993 || REGNO (SET_SRC (elt)) != src_regno + i
2994 || GET_CODE (SET_DEST (elt)) != MEM
2995 || GET_MODE (SET_DEST (elt)) != SImode
2996 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
2997 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
2998 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
2999 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
3006 /* Return 1 for an PARALLEL suitable for mtcrf. */
3009 mtcrf_operation (op, mode)
3011 enum machine_mode mode ATTRIBUTE_UNUSED;
3013 int count = XVECLEN (op, 0);
3017 /* Perform a quick check so we don't blow up below. */
3019 || GET_CODE (XVECEXP (op, 0, 0)) != SET
3020 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != UNSPEC
3021 || XVECLEN (SET_SRC (XVECEXP (op, 0, 0)), 0) != 2)
3023 src_reg = XVECEXP (SET_SRC (XVECEXP (op, 0, 0)), 0, 0);
3025 if (GET_CODE (src_reg) != REG
3026 || GET_MODE (src_reg) != SImode
3027 || ! INT_REGNO_P (REGNO (src_reg)))
3030 for (i = 0; i < count; i++)
3032 rtx exp = XVECEXP (op, 0, i);
3036 if (GET_CODE (exp) != SET
3037 || GET_CODE (SET_DEST (exp)) != REG
3038 || GET_MODE (SET_DEST (exp)) != CCmode
3039 || ! CR_REGNO_P (REGNO (SET_DEST (exp))))
3041 unspec = SET_SRC (exp);
3042 maskval = 1 << (MAX_CR_REGNO - REGNO (SET_DEST (exp)));
3044 if (GET_CODE (unspec) != UNSPEC
3045 || XINT (unspec, 1) != 20
3046 || XVECLEN (unspec, 0) != 2
3047 || XVECEXP (unspec, 0, 0) != src_reg
3048 || GET_CODE (XVECEXP (unspec, 0, 1)) != CONST_INT
3049 || INTVAL (XVECEXP (unspec, 0, 1)) != maskval)
3055 /* Return 1 for an PARALLEL suitable for lmw. */
3058 lmw_operation (op, mode)
3060 enum machine_mode mode ATTRIBUTE_UNUSED;
3062 int count = XVECLEN (op, 0);
3063 unsigned int dest_regno;
3065 unsigned int base_regno;
3066 HOST_WIDE_INT offset;
3069 /* Perform a quick check so we don't blow up below. */
3071 || GET_CODE (XVECEXP (op, 0, 0)) != SET
3072 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
3073 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
3076 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
3077 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
3080 || count != 32 - (int) dest_regno)
3083 if (LEGITIMATE_INDIRECT_ADDRESS_P (src_addr))
3086 base_regno = REGNO (src_addr);
3087 if (base_regno == 0)
3090 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode, src_addr))
3092 offset = INTVAL (XEXP (src_addr, 1));
3093 base_regno = REGNO (XEXP (src_addr, 0));
3098 for (i = 0; i < count; i++)
3100 rtx elt = XVECEXP (op, 0, i);
3103 HOST_WIDE_INT newoffset;
3105 if (GET_CODE (elt) != SET
3106 || GET_CODE (SET_DEST (elt)) != REG
3107 || GET_MODE (SET_DEST (elt)) != SImode
3108 || REGNO (SET_DEST (elt)) != dest_regno + i
3109 || GET_CODE (SET_SRC (elt)) != MEM
3110 || GET_MODE (SET_SRC (elt)) != SImode)
3112 newaddr = XEXP (SET_SRC (elt), 0);
3113 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr))
3118 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode, newaddr))
3120 addr_reg = XEXP (newaddr, 0);
3121 newoffset = INTVAL (XEXP (newaddr, 1));
3125 if (REGNO (addr_reg) != base_regno
3126 || newoffset != offset + 4 * i)
3133 /* Return 1 for an PARALLEL suitable for stmw. */
3136 stmw_operation (op, mode)
3138 enum machine_mode mode ATTRIBUTE_UNUSED;
3140 int count = XVECLEN (op, 0);
3141 unsigned int src_regno;
3143 unsigned int base_regno;
3144 HOST_WIDE_INT offset;
3147 /* Perform a quick check so we don't blow up below. */
3149 || GET_CODE (XVECEXP (op, 0, 0)) != SET
3150 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
3151 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
3154 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
3155 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
3158 || count != 32 - (int) src_regno)
3161 if (LEGITIMATE_INDIRECT_ADDRESS_P (dest_addr))
3164 base_regno = REGNO (dest_addr);
3165 if (base_regno == 0)
3168 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode, dest_addr))
3170 offset = INTVAL (XEXP (dest_addr, 1));
3171 base_regno = REGNO (XEXP (dest_addr, 0));
3176 for (i = 0; i < count; i++)
3178 rtx elt = XVECEXP (op, 0, i);
3181 HOST_WIDE_INT newoffset;
3183 if (GET_CODE (elt) != SET
3184 || GET_CODE (SET_SRC (elt)) != REG
3185 || GET_MODE (SET_SRC (elt)) != SImode
3186 || REGNO (SET_SRC (elt)) != src_regno + i
3187 || GET_CODE (SET_DEST (elt)) != MEM
3188 || GET_MODE (SET_DEST (elt)) != SImode)
3190 newaddr = XEXP (SET_DEST (elt), 0);
3191 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr))
3196 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode, newaddr))
3198 addr_reg = XEXP (newaddr, 0);
3199 newoffset = INTVAL (XEXP (newaddr, 1));
3203 if (REGNO (addr_reg) != base_regno
3204 || newoffset != offset + 4 * i)
3212 /* A validation routine: say whether CODE, a condition code,
3213 and MODE match. The other alternatives either don't make
3214 sense or should never be generated. */
3216 validate_condition_mode (code, mode)
3218 enum machine_mode mode;
3220 if (GET_RTX_CLASS (code) != '<'
3221 || GET_MODE_CLASS (mode) != MODE_CC)
3224 /* These don't make sense. */
3225 if ((code == GT || code == LT || code == GE || code == LE)
3226 && mode == CCUNSmode)
3229 if ((code == GTU || code == LTU || code == GEU || code == LEU)
3230 && mode != CCUNSmode)
3233 if (mode != CCFPmode
3234 && (code == ORDERED || code == UNORDERED
3235 || code == UNEQ || code == LTGT
3236 || code == UNGT || code == UNLT
3237 || code == UNGE || code == UNLE))
3240 /* These should never be generated. */
3241 if (mode == CCFPmode
3242 && (code == LE || code == GE
3243 || code == UNEQ || code == LTGT
3244 || code == UNGT || code == UNLT))
3247 /* These are invalid; the information is not there. */
3248 if (mode == CCEQmode
3249 && code != EQ && code != NE)
3253 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
3254 We only check the opcode against the mode of the CC value here. */
3257 branch_comparison_operator (op, mode)
3259 enum machine_mode mode ATTRIBUTE_UNUSED;
3261 enum rtx_code code = GET_CODE (op);
3262 enum machine_mode cc_mode;
3264 if (GET_RTX_CLASS (code) != '<')
3267 cc_mode = GET_MODE (XEXP (op, 0));
3268 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
3271 validate_condition_mode (code, cc_mode);
3276 /* Return 1 if OP is a comparison operation that is valid for a branch
3277 insn and which is true if the corresponding bit in the CC register
3281 branch_positive_comparison_operator (op, mode)
3283 enum machine_mode mode;
3287 if (! branch_comparison_operator (op, mode))
3290 code = GET_CODE (op);
3291 return (code == EQ || code == LT || code == GT
3292 || code == LTU || code == GTU
3293 || code == UNORDERED);
3297 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
3298 We check the opcode against the mode of the CC value and disallow EQ or
3299 NE comparisons for integers. */
3302 scc_comparison_operator (op, mode)
3304 enum machine_mode mode;
3306 enum rtx_code code = GET_CODE (op);
3307 enum machine_mode cc_mode;
3309 if (GET_MODE (op) != mode && mode != VOIDmode)
3312 if (GET_RTX_CLASS (code) != '<')
3315 cc_mode = GET_MODE (XEXP (op, 0));
3316 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
3319 validate_condition_mode (code, cc_mode);
3321 if (code == NE && cc_mode != CCFPmode)
3328 trap_comparison_operator (op, mode)
3330 enum machine_mode mode;
3332 if (mode != VOIDmode && mode != GET_MODE (op))
3334 return GET_RTX_CLASS (GET_CODE (op)) == '<';
3338 boolean_operator (op, mode)
3340 enum machine_mode mode ATTRIBUTE_UNUSED;
3342 enum rtx_code code = GET_CODE (op);
3343 return (code == AND || code == IOR || code == XOR);
3347 boolean_or_operator (op, mode)
3349 enum machine_mode mode ATTRIBUTE_UNUSED;
3351 enum rtx_code code = GET_CODE (op);
3352 return (code == IOR || code == XOR);
3355 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3356 mask required to convert the result of a rotate insn into a shift
3357 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
3360 includes_lshift_p (shiftop, andop)
3361 register rtx shiftop;
3364 unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0;
3366 shift_mask <<= INTVAL (shiftop);
3368 return (INTVAL (andop) & ~shift_mask) == 0;
3371 /* Similar, but for right shift. */
3374 includes_rshift_p (shiftop, andop)
3375 register rtx shiftop;
3378 unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0;
3380 shift_mask >>= INTVAL (shiftop);
3382 return (INTVAL (andop) & ~shift_mask) == 0;
3385 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3386 mask required to convert the result of a rotate insn into a shift
3387 left insn of SHIFTOP bits. */
3390 includes_lshift64_p (shiftop, andop)
3391 register rtx shiftop;
3394 #if HOST_BITS_PER_WIDE_INT == 64
3395 unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0;
3397 shift_mask <<= INTVAL (shiftop);
3399 return (INTVAL (andop) & ~shift_mask) == 0;
3401 unsigned HOST_WIDE_INT shift_mask_low = ~(unsigned HOST_WIDE_INT) 0;
3402 unsigned HOST_WIDE_INT shift_mask_high = ~(unsigned HOST_WIDE_INT) 0;
3404 shift_mask_low <<= INTVAL (shiftop);
3406 if (INTVAL (shiftop) > 32)
3407 shift_mask_high <<= (INTVAL (shiftop) - 32);
3409 if (GET_CODE (andop) == CONST_INT)
3410 return (INTVAL (andop) & ~shift_mask_low) == 0;
3412 return ((CONST_DOUBLE_HIGH (andop) & ~shift_mask_high) == 0
3413 && (CONST_DOUBLE_LOW (andop) & ~shift_mask_low) == 0);
3417 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
3418 for lfq and stfq insns.
3420 Note reg1 and reg2 *must* be hard registers. To be sure we will
3421 abort if we are passed pseudo registers. */
3424 registers_ok_for_quad_peep (reg1, reg2)
3427 /* We might have been passed a SUBREG. */
3428 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
3431 return (REGNO (reg1) == REGNO (reg2) - 1);
3434 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
3435 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
3438 addrs_ok_for_quad_peep (addr1, addr2)
3445 /* Extract an offset (if used) from the first addr. */
3446 if (GET_CODE (addr1) == PLUS)
3448 /* If not a REG, return zero. */
3449 if (GET_CODE (XEXP (addr1, 0)) != REG)
3453 reg1 = REGNO (XEXP (addr1, 0));
3454 /* The offset must be constant! */
3455 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
3457 offset1 = INTVAL (XEXP (addr1, 1));
3460 else if (GET_CODE (addr1) != REG)
3464 reg1 = REGNO (addr1);
3465 /* This was a simple (mem (reg)) expression. Offset is 0. */
3469 /* Make sure the second address is a (mem (plus (reg) (const_int))). */
3470 if (GET_CODE (addr2) != PLUS)
3473 if (GET_CODE (XEXP (addr2, 0)) != REG
3474 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
3477 if (reg1 != REGNO (XEXP (addr2, 0)))
3480 /* The offset for the second addr must be 8 more than the first addr. */
3481 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
3484 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
3489 /* Return the register class of a scratch register needed to copy IN into
3490 or out of a register in CLASS in MODE. If it can be done directly,
3491 NO_REGS is returned. */
3494 secondary_reload_class (class, mode, in)
3495 enum reg_class class;
3496 enum machine_mode mode ATTRIBUTE_UNUSED;
3502 /* We can not copy a symbolic operand directly into anything other than
3503 BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS
3504 is needed as an intermediate register. */
3505 if (class != BASE_REGS
3506 && (GET_CODE (in) == SYMBOL_REF
3507 || GET_CODE (in) == HIGH
3508 || GET_CODE (in) == LABEL_REF
3509 || GET_CODE (in) == CONST))
3513 if (GET_CODE (in) == REG)
3516 if (regno >= FIRST_PSEUDO_REGISTER)
3518 regno = true_regnum (in);
3519 if (regno >= FIRST_PSEUDO_REGISTER)
3523 else if (GET_CODE (in) == SUBREG)
3525 regno = true_regnum (in);
3526 if (regno >= FIRST_PSEUDO_REGISTER)
3532 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
3534 if (class == GENERAL_REGS || class == BASE_REGS
3535 || (regno >= 0 && INT_REGNO_P (regno)))
3538 /* Constants, memory, and FP registers can go into FP registers. */
3539 if ((regno == -1 || FP_REGNO_P (regno))
3540 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
3543 /* We can copy among the CR registers. */
3544 if ((class == CR_REGS || class == CR0_REGS)
3545 && regno >= 0 && CR_REGNO_P (regno))
3548 /* Otherwise, we need GENERAL_REGS. */
3549 return GENERAL_REGS;
3552 /* Given a comparison operation, return the bit number in CCR to test. We
3553 know this is a valid comparison.
3555 SCC_P is 1 if this is for an scc. That means that %D will have been
3556 used instead of %C, so the bits will be in different places.
3558 Return -1 if OP isn't a valid comparison for some reason. */
3565 enum rtx_code code = GET_CODE (op);
3566 enum machine_mode cc_mode;
3571 if (GET_RTX_CLASS (code) != '<')
3576 if (GET_CODE (reg) != REG
3577 || ! CR_REGNO_P (REGNO (reg)))
3580 cc_mode = GET_MODE (reg);
3581 cc_regnum = REGNO (reg);
3582 base_bit = 4 * (cc_regnum - CR0_REGNO);
3584 validate_condition_mode (code, cc_mode);
3589 return scc_p ? base_bit + 3 : base_bit + 2;
3591 return base_bit + 2;
3592 case GT: case GTU: case UNLE:
3593 return base_bit + 1;
3594 case LT: case LTU: case UNGE:
3596 case ORDERED: case UNORDERED:
3597 return base_bit + 3;
3600 /* If scc, we will have done a cror to put the bit in the
3601 unordered position. So test that bit. For integer, this is ! LT
3602 unless this is an scc insn. */
3603 return scc_p ? base_bit + 3 : base_bit;
3606 return scc_p ? base_bit + 3 : base_bit + 1;
3613 /* Return the GOT register. */
3616 rs6000_got_register (value)
3617 rtx value ATTRIBUTE_UNUSED;
3619 /* The second flow pass currently (June 1999) can't update regs_ever_live
3620 without disturbing other parts of the compiler, so update it here to
3621 make the prolog/epilogue code happy. */
3622 if (no_new_pseudos && ! regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
3623 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
3625 current_function_uses_pic_offset_table = 1;
3627 return pic_offset_table_rtx;
3630 /* Functions to init, mark and free struct machine_function.
3631 These will be called, via pointer variables,
3632 from push_function_context and pop_function_context. */
3635 rs6000_init_machine_status (p)
3638 p->machine = (machine_function *) xcalloc (1, sizeof (machine_function));
3642 rs6000_mark_machine_status (p)
3646 ggc_mark_rtx (p->machine->ra_rtx);
3650 rs6000_free_machine_status (p)
3653 if (p->machine == NULL)
3661 /* Print an operand. Recognize special options, documented below. */
3664 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
3665 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
3667 #define SMALL_DATA_RELOC "sda21"
3668 #define SMALL_DATA_REG 0
3672 print_operand (file, x, code)
3680 /* These macros test for integers and extract the low-order bits. */
3682 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
3683 && GET_MODE (X) == VOIDmode)
3685 #define INT_LOWPART(X) \
3686 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
3691 /* Write out an instruction after the call which may be replaced
3692 with glue code by the loader. This depends on the AIX version. */
3693 asm_fprintf (file, RS6000_CALL_GLUE);
3697 /* Write out either a '.' or '$' for the current location, depending
3698 on whether this is Solaris or not. */
3699 putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file);
3702 /* %a is output_address. */
3705 /* If X is a constant integer whose low-order 5 bits are zero,
3706 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
3707 in the AIX assembler where "sri" with a zero shift count
3708 write a trash instruction. */
3709 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
3716 /* If constant, low-order 16 bits of constant, unsigned.
3717 Otherwise, write normally. */
3719 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 0xffff);
3721 print_operand (file, x, 0);
3725 /* If the low-order bit is zero, write 'r'; otherwise, write 'l'
3726 for 64-bit mask direction. */
3727 putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file);
3730 /* %c is output_addr_const if a CONSTANT_ADDRESS_P, otherwise
3734 /* There used to be a comment for 'C' reading "This is an
3735 optional cror needed for certain floating-point
3736 comparisons. Otherwise write nothing." */
3738 /* Similar, except that this is for an scc, so we must be able to
3739 encode the test in a single bit that is one. We do the above
3740 for any LE, GE, GEU, or LEU and invert the bit for NE. */
3741 if (GET_CODE (x) == LE || GET_CODE (x) == GE
3742 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
3744 int base_bit = 4 * (REGNO (XEXP (x, 0)) - CR0_REGNO);
3746 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
3748 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
3751 else if (GET_CODE (x) == NE)
3753 int base_bit = 4 * (REGNO (XEXP (x, 0)) - CR0_REGNO);
3755 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
3756 base_bit + 2, base_bit + 2);
3761 /* X is a CR register. Print the number of the EQ bit of the CR */
3762 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
3763 output_operand_lossage ("invalid %%E value");
3765 fprintf (file, "%d", 4 * (REGNO (x) - CR0_REGNO) + 2);
3769 /* X is a CR register. Print the shift count needed to move it
3770 to the high-order four bits. */
3771 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
3772 output_operand_lossage ("invalid %%f value");
3774 fprintf (file, "%d", 4 * (REGNO (x) - CR0_REGNO));
3778 /* Similar, but print the count for the rotate in the opposite
3780 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
3781 output_operand_lossage ("invalid %%F value");
3783 fprintf (file, "%d", 32 - 4 * (REGNO (x) - CR0_REGNO));
3787 /* X is a constant integer. If it is negative, print "m",
3788 otherwise print "z". This is to make a aze or ame insn. */
3789 if (GET_CODE (x) != CONST_INT)
3790 output_operand_lossage ("invalid %%G value");
3791 else if (INTVAL (x) >= 0)
3798 /* If constant, output low-order five bits. Otherwise,
3801 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 31);
3803 print_operand (file, x, 0);
3807 /* If constant, output low-order six bits. Otherwise,
3810 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 63);
3812 print_operand (file, x, 0);
3816 /* Print `i' if this is a constant, else nothing. */
3822 /* Write the bit number in CCR for jump. */
3825 output_operand_lossage ("invalid %%j code");
3827 fprintf (file, "%d", i);
3831 /* Similar, but add one for shift count in rlinm for scc and pass
3832 scc flag to `ccr_bit'. */
3835 output_operand_lossage ("invalid %%J code");
3837 /* If we want bit 31, write a shift count of zero, not 32. */
3838 fprintf (file, "%d", i == 31 ? 0 : i + 1);
3842 /* X must be a constant. Write the 1's complement of the
3845 output_operand_lossage ("invalid %%k value");
3847 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INT_LOWPART (x));
3851 /* X must be a symbolic constant on ELF. Write an
3852 expression suitable for an 'addi' that adds in the low 16
3854 if (GET_CODE (x) != CONST)
3856 print_operand_address (file, x);
3861 if (GET_CODE (XEXP (x, 0)) != PLUS
3862 || (GET_CODE (XEXP (XEXP (x, 0), 0)) != SYMBOL_REF
3863 && GET_CODE (XEXP (XEXP (x, 0), 0)) != LABEL_REF)
3864 || GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
3865 output_operand_lossage ("invalid %%K value");
3866 print_operand_address (file, XEXP (XEXP (x, 0), 0));
3868 print_operand (file, XEXP (XEXP (x, 0), 1), 0);
3872 /* %l is output_asm_label. */
3875 /* Write second word of DImode or DFmode reference. Works on register
3876 or non-indexed memory only. */
3877 if (GET_CODE (x) == REG)
3878 fprintf (file, "%s", reg_names[REGNO (x) + 1]);
3879 else if (GET_CODE (x) == MEM)
3881 /* Handle possible auto-increment. Since it is pre-increment and
3882 we have already done it, we can just use an offset of word. */
3883 if (GET_CODE (XEXP (x, 0)) == PRE_INC
3884 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
3885 output_address (plus_constant_for_output (XEXP (XEXP (x, 0), 0),
3888 output_address (plus_constant_for_output (XEXP (x, 0),
3890 if (small_data_operand (x, GET_MODE (x)))
3891 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
3892 reg_names[SMALL_DATA_REG]);
3897 /* MB value for a mask operand. */
3898 if (! mask_operand (x, VOIDmode))
3899 output_operand_lossage ("invalid %%m value");
3901 val = INT_LOWPART (x);
3903 /* If the high bit is set and the low bit is not, the value is zero.
3904 If the high bit is zero, the value is the first 1 bit we find from
3906 if ((val & 0x80000000) && ((val & 1) == 0))
3911 else if ((val & 0x80000000) == 0)
3913 for (i = 1; i < 32; i++)
3914 if ((val <<= 1) & 0x80000000)
3916 fprintf (file, "%d", i);
3920 /* Otherwise, look for the first 0 bit from the right. The result is its
3921 number plus 1. We know the low-order bit is one. */
3922 for (i = 0; i < 32; i++)
3923 if (((val >>= 1) & 1) == 0)
3926 /* If we ended in ...01, i would be 0. The correct value is 31, so
3928 fprintf (file, "%d", 31 - i);
3932 /* ME value for a mask operand. */
3933 if (! mask_operand (x, VOIDmode))
3934 output_operand_lossage ("invalid %%M value");
3936 val = INT_LOWPART (x);
3938 /* If the low bit is set and the high bit is not, the value is 31.
3939 If the low bit is zero, the value is the first 1 bit we find from
3941 if ((val & 1) && ((val & 0x80000000) == 0))
3946 else if ((val & 1) == 0)
3948 for (i = 0; i < 32; i++)
3949 if ((val >>= 1) & 1)
3952 /* If we had ....10, i would be 0. The result should be
3953 30, so we need 30 - i. */
3954 fprintf (file, "%d", 30 - i);
3958 /* Otherwise, look for the first 0 bit from the left. The result is its
3959 number minus 1. We know the high-order bit is one. */
3960 for (i = 0; i < 32; i++)
3961 if (((val <<= 1) & 0x80000000) == 0)
3964 fprintf (file, "%d", i);
3967 /* %n outputs the negative of its operand. */
3970 /* Write the number of elements in the vector times 4. */
3971 if (GET_CODE (x) != PARALLEL)
3972 output_operand_lossage ("invalid %%N value");
3974 fprintf (file, "%d", XVECLEN (x, 0) * 4);
3978 /* Similar, but subtract 1 first. */
3979 if (GET_CODE (x) != PARALLEL)
3980 output_operand_lossage ("invalid %%O value");
3982 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
3986 /* X is a CONST_INT that is a power of two. Output the logarithm. */
3988 || (i = exact_log2 (INT_LOWPART (x))) < 0)
3989 output_operand_lossage ("invalid %%p value");
3991 fprintf (file, "%d", i);
3995 /* The operand must be an indirect memory reference. The result
3996 is the register number. */
3997 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
3998 || REGNO (XEXP (x, 0)) >= 32)
3999 output_operand_lossage ("invalid %%P value");
4001 fprintf (file, "%d", REGNO (XEXP (x, 0)));
4005 /* This outputs the logical code corresponding to a boolean
4006 expression. The expression may have one or both operands
4007 negated (if one, only the first one). For condition register
4008 logical operations, it will also treat the negated
4009 CR codes as NOTs, but not handle NOTs of them. */
4011 const char *const *t = 0;
4013 enum rtx_code code = GET_CODE (x);
4014 static const char * const tbl[3][3] = {
4015 { "and", "andc", "nor" },
4016 { "or", "orc", "nand" },
4017 { "xor", "eqv", "xor" } };
4021 else if (code == IOR)
4023 else if (code == XOR)
4026 output_operand_lossage ("invalid %%q value");
4028 if (GET_CODE (XEXP (x, 0)) != NOT)
4032 if (GET_CODE (XEXP (x, 1)) == NOT)
4043 /* X is a CR register. Print the mask for `mtcrf'. */
4044 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
4045 output_operand_lossage ("invalid %%R value");
4047 fprintf (file, "%d", 128 >> (REGNO (x) - CR0_REGNO));
4051 /* Low 5 bits of 32 - value */
4053 output_operand_lossage ("invalid %%s value");
4055 fprintf (file, HOST_WIDE_INT_PRINT_DEC, (32 - INT_LOWPART (x)) & 31);
4059 /* PowerPC64 mask position. All 0's and all 1's are excluded.
4060 CONST_INT 32-bit mask is considered sign-extended so any
4061 transition must occur within the CONST_INT, not on the boundary. */
4062 if (! mask64_operand (x, VOIDmode))
4063 output_operand_lossage ("invalid %%S value");
4065 val = INT_LOWPART (x);
4067 if (val & 1) /* Clear Left */
4069 for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)
4070 if (!((val >>= 1) & 1))
4073 #if HOST_BITS_PER_WIDE_INT == 32
4074 if (GET_CODE (x) == CONST_DOUBLE && i == 32)
4076 val = CONST_DOUBLE_HIGH (x);
4081 for (i = 32; i < 64; i++)
4082 if (!((val >>= 1) & 1))
4086 /* i = index of last set bit from right
4087 mask begins at 63 - i from left */
4089 output_operand_lossage ("%%S computed all 1's mask");
4091 fprintf (file, "%d", 63 - i);
4094 else /* Clear Right */
4096 for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)
4097 if ((val >>= 1) & 1)
4100 #if HOST_BITS_PER_WIDE_INT == 32
4101 if (GET_CODE (x) == CONST_DOUBLE && i == 32)
4103 val = CONST_DOUBLE_HIGH (x);
4105 if (val == (HOST_WIDE_INT) -1)
4108 for (i = 32; i < 64; i++)
4109 if ((val >>= 1) & 1)
4113 /* i = index of last clear bit from right
4114 mask ends at 62 - i from left */
4116 output_operand_lossage ("%%S computed all 0's mask");
4118 fprintf (file, "%d", 62 - i);
4123 /* Print the symbolic name of a branch target register. */
4124 if (GET_CODE (x) != REG || (REGNO (x) != LINK_REGISTER_REGNUM
4125 && REGNO (x) != COUNT_REGISTER_REGNUM))
4126 output_operand_lossage ("invalid %%T value");
4127 else if (REGNO (x) == LINK_REGISTER_REGNUM)
4128 fputs (TARGET_NEW_MNEMONICS ? "lr" : "r", file);
4130 fputs ("ctr", file);
4134 /* High-order 16 bits of constant for use in unsigned operand. */
4136 output_operand_lossage ("invalid %%u value");
4138 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
4139 (INT_LOWPART (x) >> 16) & 0xffff);
4143 /* High-order 16 bits of constant for use in signed operand. */
4145 output_operand_lossage ("invalid %%v value");
4148 int value = (INT_LOWPART (x) >> 16) & 0xffff;
4150 /* Solaris assembler doesn't like lis 0,0x8000 */
4151 if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0)
4152 fprintf (file, "%d", value | (~0 << 16));
4154 fprintf (file, "0x%x", value);
4159 /* Print `u' if this has an auto-increment or auto-decrement. */
4160 if (GET_CODE (x) == MEM
4161 && (GET_CODE (XEXP (x, 0)) == PRE_INC
4162 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
4167 /* Print the trap code for this operand. */
4168 switch (GET_CODE (x))
4171 fputs ("eq", file); /* 4 */
4174 fputs ("ne", file); /* 24 */
4177 fputs ("lt", file); /* 16 */
4180 fputs ("le", file); /* 20 */
4183 fputs ("gt", file); /* 8 */
4186 fputs ("ge", file); /* 12 */
4189 fputs ("llt", file); /* 2 */
4192 fputs ("lle", file); /* 6 */
4195 fputs ("lgt", file); /* 1 */
4198 fputs ("lge", file); /* 5 */
4206 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
4209 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
4210 ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000);
4212 print_operand (file, x, 0);
4216 /* MB value for a PowerPC64 rldic operand. */
4217 if (! rldic_operand (x, VOIDmode))
4218 output_operand_lossage ("invalid %%W value");
4220 val = (GET_CODE (x) == CONST_INT
4221 ? INTVAL (x) : CONST_DOUBLE_HIGH (x));
4226 for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)
4227 if ((val <<= 1) < 0)
4230 #if HOST_BITS_PER_WIDE_INT == 32
4231 if (GET_CODE (x) == CONST_INT && i >= 0)
4232 i += 32; /* zero-extend high-part was all 0's */
4233 else if (GET_CODE (x) == CONST_DOUBLE && i == 32)
4235 val = CONST_DOUBLE_LOW (x);
4242 for ( ; i < 64; i++)
4243 if ((val <<= 1) < 0)
4248 fprintf (file, "%d", i + 1);
4252 if (GET_CODE (x) == MEM
4253 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
4258 /* Like 'L', for third word of TImode */
4259 if (GET_CODE (x) == REG)
4260 fprintf (file, "%s", reg_names[REGNO (x) + 2]);
4261 else if (GET_CODE (x) == MEM)
4263 if (GET_CODE (XEXP (x, 0)) == PRE_INC
4264 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
4265 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
4267 output_address (plus_constant (XEXP (x, 0), 8));
4268 if (small_data_operand (x, GET_MODE (x)))
4269 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
4270 reg_names[SMALL_DATA_REG]);
4275 /* X is a SYMBOL_REF. Write out the name preceded by a
4276 period and without any trailing data in brackets. Used for function
4277 names. If we are configured for System V (or the embedded ABI) on
4278 the PowerPC, do not emit the period, since those systems do not use
4279 TOCs and the like. */
4280 if (GET_CODE (x) != SYMBOL_REF)
4283 if (XSTR (x, 0)[0] != '.')
4285 switch (DEFAULT_ABI)
4295 case ABI_AIX_NODESC:
4301 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
4303 assemble_name (file, XSTR (x, 0));
4308 /* Like 'L', for last word of TImode. */
4309 if (GET_CODE (x) == REG)
4310 fprintf (file, "%s", reg_names[REGNO (x) + 3]);
4311 else if (GET_CODE (x) == MEM)
4313 if (GET_CODE (XEXP (x, 0)) == PRE_INC
4314 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
4315 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
4317 output_address (plus_constant (XEXP (x, 0), 12));
4318 if (small_data_operand (x, GET_MODE (x)))
4319 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
4320 reg_names[SMALL_DATA_REG]);
4325 if (GET_CODE (x) == REG)
4326 fprintf (file, "%s", reg_names[REGNO (x)]);
4327 else if (GET_CODE (x) == MEM)
4329 /* We need to handle PRE_INC and PRE_DEC here, since we need to
4330 know the width from the mode. */
4331 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
4332 fprintf (file, "%d(%s)", GET_MODE_SIZE (GET_MODE (x)),
4333 reg_names[REGNO (XEXP (XEXP (x, 0), 0))]);
4334 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
4335 fprintf (file, "%d(%s)", - GET_MODE_SIZE (GET_MODE (x)),
4336 reg_names[REGNO (XEXP (XEXP (x, 0), 0))]);
4338 output_address (XEXP (x, 0));
4341 output_addr_const (file, x);
4345 output_operand_lossage ("invalid %%xn code");
4349 /* Print the address of an operand. */
4352 print_operand_address (file, x)
4356 if (GET_CODE (x) == REG)
4357 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
4358 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST
4359 || GET_CODE (x) == LABEL_REF)
4361 output_addr_const (file, x);
4362 if (small_data_operand (x, GET_MODE (x)))
4363 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC,
4364 reg_names[SMALL_DATA_REG]);
4365 else if (TARGET_TOC)
4368 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
4370 if (REGNO (XEXP (x, 0)) == 0)
4371 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
4372 reg_names[ REGNO (XEXP (x, 0)) ]);
4374 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
4375 reg_names[ REGNO (XEXP (x, 1)) ]);
4377 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
4379 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (x, 1)));
4380 fprintf (file, "(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
4383 else if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 0)) == REG
4384 && CONSTANT_P (XEXP (x, 1)))
4386 output_addr_const (file, XEXP (x, 1));
4387 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
4390 else if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x))
4394 rtx contains_minus = XEXP (x, 1);
4397 /* Find the (minus (sym) (toc)) buried in X, and temporarily
4398 turn it into (sym) for output_addr_const. */
4399 while (GET_CODE (XEXP (contains_minus, 0)) != MINUS)
4400 contains_minus = XEXP (contains_minus, 0);
4402 minus = XEXP (contains_minus, 0);
4403 XEXP (contains_minus, 0) = XEXP (minus, 0);
4404 output_addr_const (file, XEXP (x, 1));
4405 XEXP (contains_minus, 0) = minus;
4408 output_addr_const (file, XEXP (x, 1));
4410 fprintf (file, "(%s)", reg_names[REGNO (XEXP (x, 0))]);
4417 rs6000_reverse_condition (mode, code)
4418 enum machine_mode mode;
4421 /* Reversal of FP compares takes care -- an ordered compare
4422 becomes an unordered compare and vice versa. */
4423 if (mode == CCFPmode)
4424 return reverse_condition_maybe_unordered (code);
4426 return reverse_condition (code);
4430 /* Generate a compare for CODE. Return a brand-new rtx that
4431 represents the result of the compare. */
4433 rs6000_generate_compare (code)
4436 enum machine_mode comp_mode;
4439 if (rs6000_compare_fp_p)
4440 comp_mode = CCFPmode;
4441 else if (code == GTU || code == LTU
4442 || code == GEU || code == LEU)
4443 comp_mode = CCUNSmode;
4447 /* First, the compare. */
4448 compare_result = gen_reg_rtx (comp_mode);
4449 emit_insn (gen_rtx_SET (VOIDmode, compare_result,
4450 gen_rtx_COMPARE (comp_mode,
4452 rs6000_compare_op1)));
4454 /* Some kinds of FP comparisons need an OR operation. */
4455 if (rs6000_compare_fp_p
4456 && (code == LE || code == GE
4457 || code == UNEQ || code == LTGT
4458 || code == UNGT || code == UNLT))
4460 enum rtx_code or1, or2;
4461 rtx or1_rtx, or2_rtx, compare2_rtx;
4462 rtx or_result = gen_reg_rtx (CCEQmode);
4466 case LE: or1 = LT; or2 = EQ; break;
4467 case GE: or1 = GT; or2 = EQ; break;
4468 case UNEQ: or1 = UNORDERED; or2 = EQ; break;
4469 case LTGT: or1 = LT; or2 = GT; break;
4470 case UNGT: or1 = UNORDERED; or2 = GT; break;
4471 case UNLT: or1 = UNORDERED; or2 = LT; break;
4474 validate_condition_mode (or1, comp_mode);
4475 validate_condition_mode (or2, comp_mode);
4476 or1_rtx = gen_rtx (or1, SImode, compare_result, const0_rtx);
4477 or2_rtx = gen_rtx (or2, SImode, compare_result, const0_rtx);
4478 compare2_rtx = gen_rtx_COMPARE (CCEQmode,
4479 gen_rtx_IOR (SImode, or1_rtx, or2_rtx),
4481 emit_insn (gen_rtx_SET (VOIDmode, or_result, compare2_rtx));
4483 compare_result = or_result;
4487 validate_condition_mode (code, GET_MODE (compare_result));
4489 return gen_rtx (code, VOIDmode, compare_result, const0_rtx);
4493 /* Emit the RTL for an sCOND pattern. */
4496 rs6000_emit_sCOND (code, result)
4501 enum machine_mode op_mode;
4503 condition_rtx = rs6000_generate_compare (code);
4505 op_mode = GET_MODE (rs6000_compare_op0);
4506 if (op_mode == VOIDmode)
4507 op_mode = GET_MODE (rs6000_compare_op1);
4509 if (TARGET_POWERPC64 && (op_mode == DImode || rs6000_compare_fp_p))
4511 PUT_MODE (condition_rtx, DImode);
4512 convert_move (result, condition_rtx, 0);
4516 PUT_MODE (condition_rtx, SImode);
4517 emit_insn (gen_rtx_SET (VOIDmode, result, condition_rtx));
4522 /* Emit a branch of kind CODE to location LOC. */
4525 rs6000_emit_cbranch (code, loc)
4529 rtx condition_rtx, loc_ref;
4531 condition_rtx = rs6000_generate_compare (code);
4532 loc_ref = gen_rtx_LABEL_REF (VOIDmode, loc);
4533 emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
4534 gen_rtx_IF_THEN_ELSE (VOIDmode, condition_rtx,
4539 /* Return the string to output a conditional branch to LABEL, which is
4540 the operand number of the label, or -1 if the branch is really a
4543 OP is the conditional expression. XEXP (OP, 0) is assumed to be a
4544 condition code register and its mode specifies what kind of
4547 REVERSED is non-zero if we should reverse the sense of the comparison.
4549 INSN is the insn. */
4552 output_cbranch (op, label, reversed, insn)
4558 static char string[64];
4559 enum rtx_code code = GET_CODE (op);
4560 rtx cc_reg = XEXP (op, 0);
4561 enum machine_mode mode = GET_MODE (cc_reg);
4562 int cc_regno = REGNO (cc_reg) - CR0_REGNO;
4563 int need_longbranch = label != NULL && get_attr_length (insn) == 8;
4564 int really_reversed = reversed ^ need_longbranch;
4570 validate_condition_mode (code, mode);
4572 /* Work out which way this really branches. We could use
4573 reverse_condition_maybe_unordered here always but this
4574 makes the resulting assembler clearer. */
4575 if (really_reversed)
4576 code = rs6000_reverse_condition (mode, code);
4580 /* Not all of these are actually distinct opcodes, but
4581 we distinguish them for clarity of the resulting assembler. */
4582 case NE: ccode = "ne"; break;
4583 case EQ: ccode = "eq"; break;
4584 case GE: case GEU: ccode = "ge"; break;
4585 case GT: case GTU: ccode = "gt"; break;
4586 case LE: case LEU: ccode = "le"; break;
4587 case LT: case LTU: ccode = "lt"; break;
4588 case UNORDERED: ccode = "un"; break;
4589 case ORDERED: ccode = "nu"; break;
4590 case UNGE: ccode = "nl"; break;
4591 case UNLE: ccode = "ng"; break;
4596 /* Maybe we have a guess as to how likely the branch is.
4597 The old mnemonics don't have a way to specify this information. */
4598 note = find_reg_note (insn, REG_BR_PROB, NULL_RTX);
4599 if (note != NULL_RTX)
4601 /* PROB is the difference from 50%. */
4602 int prob = INTVAL (XEXP (note, 0)) - REG_BR_PROB_BASE / 2;
4604 /* For branches that are very close to 50%, assume not-taken. */
4605 if (abs (prob) > REG_BR_PROB_BASE / 20
4606 && ((prob > 0) ^ need_longbranch))
4615 s += sprintf (s, "{b%sr|b%slr%s} ", ccode, ccode, pred);
4617 s += sprintf (s, "{b%s|b%s%s} ", ccode, ccode, pred);
4619 /* We need to escape any '%' characters in the reg_names string.
4620 Assume they'd only be the first character... */
4621 if (reg_names[cc_regno + CR0_REGNO][0] == '%')
4623 s += sprintf (s, "%s", reg_names[cc_regno + CR0_REGNO]);
4627 /* If the branch distance was too far, we may have to use an
4628 unconditional branch to go the distance. */
4629 if (need_longbranch)
4630 s += sprintf (s, ",%c$+8 ; b %s", '%', label);
4632 s += sprintf (s, ",%s", label);
4638 /* This page contains routines that are used to determine what the function
4639 prologue and epilogue code will do and write them out. */
4641 /* Return the first fixed-point register that is required to be saved. 32 if
4645 first_reg_to_save ()
4649 /* Find lowest numbered live register. */
4650 for (first_reg = 13; first_reg <= 31; first_reg++)
4651 if (regs_ever_live[first_reg]
4652 && (! call_used_regs[first_reg]
4653 || (first_reg == PIC_OFFSET_TABLE_REGNUM
4654 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
4660 /* AIX must save/restore every register that contains a parameter
4661 before/after the .__mcount call plus an additional register
4662 for the static chain, if needed; use registers from 30 down to 22
4664 if (DEFAULT_ABI == ABI_AIX)
4666 int last_parm_reg, profile_first_reg;
4668 /* Figure out last used parameter register. The proper thing
4669 to do is to walk incoming args of the function. A function
4670 might have live parameter registers even if it has no
4672 for (last_parm_reg = 10;
4673 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
4677 /* Calculate first reg for saving parameter registers
4679 Skip reg 31 which may contain the frame pointer. */
4680 profile_first_reg = (33 - last_parm_reg
4681 - (current_function_needs_context ? 1 : 0));
4682 /* Do not save frame pointer if no parameters needs to be saved. */
4683 if (profile_first_reg == 31)
4684 profile_first_reg = 32;
4686 if (first_reg > profile_first_reg)
4687 first_reg = profile_first_reg;
4690 /* SVR4 may need one register to preserve the static chain. */
4691 else if (current_function_needs_context)
4693 /* Skip reg 31 which may contain the frame pointer. */
4702 /* Similar, for FP regs. */
4705 first_fp_reg_to_save ()
4709 /* Find lowest numbered live register. */
4710 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
4711 if (regs_ever_live[first_reg])
4717 /* Calculate the stack information for the current function. This is
4718 complicated by having two separate calling sequences, the AIX calling
4719 sequence and the V.4 calling sequence.
4721 AIX stack frames look like:
4723 SP----> +---------------------------------------+
4724 | back chain to caller | 0 0
4725 +---------------------------------------+
4726 | saved CR | 4 8 (8-11)
4727 +---------------------------------------+
4729 +---------------------------------------+
4730 | reserved for compilers | 12 24
4731 +---------------------------------------+
4732 | reserved for binders | 16 32
4733 +---------------------------------------+
4734 | saved TOC pointer | 20 40
4735 +---------------------------------------+
4736 | Parameter save area (P) | 24 48
4737 +---------------------------------------+
4738 | Alloca space (A) | 24+P etc.
4739 +---------------------------------------+
4740 | Local variable space (L) | 24+P+A
4741 +---------------------------------------+
4742 | Float/int conversion temporary (X) | 24+P+A+L
4743 +---------------------------------------+
4744 | Save area for GP registers (G) | 24+P+A+X+L
4745 +---------------------------------------+
4746 | Save area for FP registers (F) | 24+P+A+X+L+G
4747 +---------------------------------------+
4748 old SP->| back chain to caller's caller |
4749 +---------------------------------------+
4751 The required alignment for AIX configurations is two words (i.e., 8
4755 V.4 stack frames look like:
4757 SP----> +---------------------------------------+
4758 | back chain to caller | 0
4759 +---------------------------------------+
4760 | caller's saved LR | 4
4761 +---------------------------------------+
4762 | Parameter save area (P) | 8
4763 +---------------------------------------+
4764 | Alloca space (A) | 8+P
4765 +---------------------------------------+
4766 | Varargs save area (V) | 8+P+A
4767 +---------------------------------------+
4768 | Local variable space (L) | 8+P+A+V
4769 +---------------------------------------+
4770 | Float/int conversion temporary (X) | 8+P+A+V+L
4771 +---------------------------------------+
4772 | saved CR (C) | 8+P+A+V+L+X
4773 +---------------------------------------+
4774 | Save area for GP registers (G) | 8+P+A+V+L+X+C
4775 +---------------------------------------+
4776 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
4777 +---------------------------------------+
4778 old SP->| back chain to caller's caller |
4779 +---------------------------------------+
4781 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is
4782 given. (But note below and in sysv4.h that we require only 8 and
4783 may round up the size of our stack frame anyways. The historical
4784 reason is early versions of powerpc-linux which didn't properly
4785 align the stack at program startup. A happy side-effect is that
4786 -mno-eabi libraries can be used with -meabi programs.)
4789 The EABI configuration defaults to the V.4 layout, unless
4790 -mcall-aix is used, in which case the AIX layout is used. However,
4791 the stack alignment requirements may differ. If -mno-eabi is not
4792 given, the required stack alignment is 8 bytes; if -mno-eabi is
4793 given, the required alignment is 16 bytes. (But see V.4 comment
4796 #ifndef ABI_STACK_BOUNDARY
4797 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
4801 rs6000_stack_info ()
4803 static rs6000_stack_t info, zero_info;
4804 rs6000_stack_t *info_ptr = &info;
4805 int reg_size = TARGET_POWERPC64 ? 8 : 4;
4806 enum rs6000_abi abi;
4809 /* Zero all fields portably */
4812 /* Select which calling sequence */
4813 info_ptr->abi = abi = DEFAULT_ABI;
4815 /* Calculate which registers need to be saved & save area size */
4816 info_ptr->first_gp_reg_save = first_reg_to_save ();
4817 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM,
4818 even if it currently looks like we won't. */
4820 && (abi == ABI_V4 || abi == ABI_SOLARIS)
4821 && info_ptr->first_gp_reg_save > PIC_OFFSET_TABLE_REGNUM)
4822 info_ptr->gp_size = reg_size * (32 - PIC_OFFSET_TABLE_REGNUM);
4824 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
4826 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
4827 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
4829 /* Does this function call anything? */
4830 info_ptr->calls_p = (! current_function_is_leaf
4831 || cfun->machine->ra_needs_full_frame);
4833 /* Determine if we need to save the link register */
4834 if (rs6000_ra_ever_killed ()
4835 || (DEFAULT_ABI == ABI_AIX && profile_flag)
4836 #ifdef TARGET_RELOCATABLE
4837 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
4839 || (info_ptr->first_fp_reg_save != 64
4840 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
4841 || (abi == ABI_V4 && current_function_calls_alloca)
4842 || (abi == ABI_SOLARIS && current_function_calls_alloca)
4843 || info_ptr->calls_p)
4845 info_ptr->lr_save_p = 1;
4846 regs_ever_live[LINK_REGISTER_REGNUM] = 1;
4849 /* Determine if we need to save the condition code registers. */
4850 if (regs_ever_live[CR2_REGNO]
4851 || regs_ever_live[CR3_REGNO]
4852 || regs_ever_live[CR4_REGNO])
4854 info_ptr->cr_save_p = 1;
4855 if (abi == ABI_V4 || abi == ABI_SOLARIS)
4856 info_ptr->cr_size = reg_size;
4859 /* Determine various sizes */
4860 info_ptr->reg_size = reg_size;
4861 info_ptr->fixed_size = RS6000_SAVE_AREA;
4862 info_ptr->varargs_size = RS6000_VARARGS_AREA;
4863 info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8);
4864 info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8);
4865 info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size
4869 + info_ptr->toc_size, 8);
4871 /* Calculate the offsets */
4879 case ABI_AIX_NODESC:
4880 info_ptr->fp_save_offset = - info_ptr->fp_size;
4881 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
4882 info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */
4883 info_ptr->lr_save_offset = 2*reg_size;
4888 info_ptr->fp_save_offset = - info_ptr->fp_size;
4889 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
4890 info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size;
4891 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size;
4892 info_ptr->lr_save_offset = reg_size;
4896 total_raw_size = (info_ptr->vars_size
4897 + info_ptr->parm_size
4898 + info_ptr->save_size
4899 + info_ptr->varargs_size
4900 + info_ptr->fixed_size);
4902 info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT);
4904 /* Determine if we need to allocate any stack frame:
4906 For AIX we need to push the stack if a frame pointer is needed (because
4907 the stack might be dynamically adjusted), if we are debugging, if we
4908 make calls, or if the sum of fp_save, gp_save, and local variables
4909 are more than the space needed to save all non-volatile registers:
4910 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved).
4912 For V.4 we don't have the stack cushion that AIX uses, but assume that
4913 the debugger can handle stackless frames. */
4915 if (info_ptr->calls_p)
4916 info_ptr->push_p = 1;
4918 else if (abi == ABI_V4 || abi == ABI_SOLARIS)
4919 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
4920 || info_ptr->calls_p);
4923 info_ptr->push_p = (frame_pointer_needed
4924 || write_symbols != NO_DEBUG
4925 || ((total_raw_size - info_ptr->fixed_size)
4926 > (TARGET_32BIT ? 220 : 288)));
4928 /* Zero offsets if we're not saving those registers */
4929 if (info_ptr->fp_size == 0)
4930 info_ptr->fp_save_offset = 0;
4932 if (info_ptr->gp_size == 0)
4933 info_ptr->gp_save_offset = 0;
4935 if (! info_ptr->lr_save_p)
4936 info_ptr->lr_save_offset = 0;
4938 if (! info_ptr->cr_save_p)
4939 info_ptr->cr_save_offset = 0;
4941 if (! info_ptr->toc_save_p)
4942 info_ptr->toc_save_offset = 0;
4948 debug_stack_info (info)
4949 rs6000_stack_t *info;
4951 const char *abi_string;
4954 info = rs6000_stack_info ();
4956 fprintf (stderr, "\nStack information for function %s:\n",
4957 ((current_function_decl && DECL_NAME (current_function_decl))
4958 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
4963 default: abi_string = "Unknown"; break;
4964 case ABI_NONE: abi_string = "NONE"; break;
4965 case ABI_AIX: abi_string = "AIX"; break;
4966 case ABI_AIX_NODESC: abi_string = "AIX"; break;
4967 case ABI_V4: abi_string = "V.4"; break;
4968 case ABI_SOLARIS: abi_string = "Solaris"; break;
4971 fprintf (stderr, "\tABI = %5s\n", abi_string);
4973 if (info->first_gp_reg_save != 32)
4974 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
4976 if (info->first_fp_reg_save != 64)
4977 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
4979 if (info->lr_save_p)
4980 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
4982 if (info->cr_save_p)
4983 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
4985 if (info->toc_save_p)
4986 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
4989 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
4992 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
4994 if (info->gp_save_offset)
4995 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
4997 if (info->fp_save_offset)
4998 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
5000 if (info->lr_save_offset)
5001 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
5003 if (info->cr_save_offset)
5004 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
5006 if (info->toc_save_offset)
5007 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
5009 if (info->varargs_save_offset)
5010 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
5012 if (info->total_size)
5013 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
5015 if (info->varargs_size)
5016 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
5018 if (info->vars_size)
5019 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
5021 if (info->parm_size)
5022 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
5024 if (info->fixed_size)
5025 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
5028 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
5031 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
5034 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
5037 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
5040 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
5042 if (info->save_size)
5043 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
5045 if (info->reg_size != 4)
5046 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
5048 fprintf (stderr, "\n");
5052 rs6000_return_addr (count, frame)
5058 /* Currently we don't optimize very well between prolog and body code and
5059 for PIC code the code can be actually quite bad, so don't try to be
5063 || DEFAULT_ABI == ABI_AIX
5064 || DEFAULT_ABI == ABI_AIX_NODESC)
5066 cfun->machine->ra_needs_full_frame = 1;
5069 memory_address (Pmode,
5070 plus_constant (copy_to_reg (gen_rtx_MEM (Pmode,
5071 memory_address (Pmode, frame))),
5072 RETURN_ADDRESS_OFFSET)));
5075 reg = cfun->machine->ra_rtx;
5078 /* No rtx yet. Invent one, and initialize it from LR in
5080 reg = gen_reg_rtx (Pmode);
5081 cfun->machine->ra_rtx = reg;
5082 init = gen_rtx_SET (VOIDmode, reg,
5083 gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
5085 /* Emit the insn to the prologue with the other argument copies. */
5086 push_topmost_sequence ();
5087 emit_insn_after (init, get_insns ());
5088 pop_topmost_sequence ();
5095 rs6000_ra_ever_killed ()
5099 #ifdef ASM_OUTPUT_MI_THUNK
5100 if (current_function_is_thunk)
5103 if (!cfun->machine->ra_rtx || cfun->machine->ra_needs_full_frame)
5104 return regs_ever_live[LINK_REGISTER_REGNUM];
5106 push_topmost_sequence ();
5108 pop_topmost_sequence ();
5110 return reg_set_between_p (gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM),
5114 /* Add a REG_MAYBE_DEAD note to the insn. */
5116 rs6000_maybe_dead (insn)
5119 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD,
5124 /* Emit instructions needed to load the TOC register.
5125 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
5126 a constant pool; or for SVR4 -fpic. */
5129 rs6000_emit_load_toc_table (fromprolog)
5133 dest = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5137 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
5140 rtx temp = (fromprolog
5141 ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
5142 : gen_reg_rtx (Pmode));
5144 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_si (temp)));
5146 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_di (temp)));
5147 rs6000_maybe_dead (emit_move_insn (dest, temp));
5149 else if (flag_pic == 2)
5152 rtx tempLR = (fromprolog
5153 ? gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)
5154 : gen_reg_rtx (Pmode));
5155 rtx temp0 = (fromprolog
5156 ? gen_rtx_REG (Pmode, 0)
5157 : gen_reg_rtx (Pmode));
5160 /* possibly create the toc section */
5161 if (! toc_initialized)
5164 function_section (current_function_decl);
5171 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
5172 symF = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
5174 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
5175 symL = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
5177 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (tempLR,
5179 rs6000_maybe_dead (emit_move_insn (dest, tempLR));
5180 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0, dest,
5187 static int reload_toc_labelno = 0;
5189 tocsym = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (toc_label_name));
5191 ASM_GENERATE_INTERNAL_LABEL (buf, "LCG", reload_toc_labelno++);
5192 symF = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
5194 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1b (tempLR,
5197 rs6000_maybe_dead (emit_move_insn (dest, tempLR));
5198 rs6000_maybe_dead (emit_move_insn (temp0,
5199 gen_rtx_MEM (Pmode, dest)));
5201 rs6000_maybe_dead (emit_insn (gen_addsi3 (dest, temp0, dest)));
5203 else if (flag_pic == 0 && TARGET_MINIMAL_TOC)
5205 /* This is for AIX code running in non-PIC ELF. */
5208 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
5209 realsym = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf));
5211 rs6000_maybe_dead (emit_insn (gen_elf_high (dest, realsym)));
5212 rs6000_maybe_dead (emit_insn (gen_elf_low (dest, dest, realsym)));
5220 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_si (dest)));
5222 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_di (dest)));
5227 get_TOC_alias_set ()
5229 static int set = -1;
5231 set = new_alias_set ();
5235 /* This retuns nonzero if the current function uses the TOC. This is
5236 determined by the presence of (unspec ... 7), which is generated by
5237 the various load_toc_* patterns. */
5243 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
5246 rtx pat = PATTERN (insn);
5249 if (GET_CODE (pat) == PARALLEL)
5250 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
5251 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == UNSPEC
5252 && XINT (XVECEXP (PATTERN (insn), 0, i), 1) == 7)
5259 create_TOC_reference(symbol)
5262 return gen_rtx_PLUS (Pmode,
5263 gen_rtx_REG (Pmode, TOC_REGISTER),
5264 gen_rtx_CONST (Pmode,
5265 gen_rtx_MINUS (Pmode, symbol,
5266 gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (toc_label_name)))));
5270 /* __throw will restore its own return address to be the same as the
5271 return address of the function that the throw is being made to.
5272 This is unfortunate, because we want to check the original
5273 return address to see if we need to restore the TOC.
5274 So we have to squirrel it away here.
5275 This is used only in compiling __throw and __rethrow.
5277 Most of this code should be removed by CSE. */
5278 static rtx insn_after_throw;
5280 /* This does the saving... */
5282 rs6000_aix_emit_builtin_unwind_init ()
5285 rtx stack_top = gen_reg_rtx (Pmode);
5286 rtx opcode_addr = gen_reg_rtx (Pmode);
5288 insn_after_throw = gen_reg_rtx (SImode);
5290 mem = gen_rtx_MEM (Pmode, hard_frame_pointer_rtx);
5291 emit_move_insn (stack_top, mem);
5293 mem = gen_rtx_MEM (Pmode,
5294 gen_rtx_PLUS (Pmode, stack_top,
5295 GEN_INT (2 * GET_MODE_SIZE (Pmode))));
5296 emit_move_insn (opcode_addr, mem);
5297 emit_move_insn (insn_after_throw, gen_rtx_MEM (SImode, opcode_addr));
5300 /* Emit insns to _restore_ the TOC register, at runtime (specifically in _eh.o).
5303 The idea is that on AIX, function calls look like this:
5304 bl somefunction-trampoline
5308 somefunction-trampoline:
5310 ... load function address in the count register ...
5312 or like this, if the linker determines that this is not a cross-module call
5313 and so the TOC need not be restored:
5316 or like this, if the compiler could determine that this is not a
5319 now, the tricky bit here is that register 2 is saved and restored
5320 by the _linker_, so we can't readily generate debugging information
5321 for it. So we need to go back up the call chain looking at the
5322 insns at return addresses to see which calls saved the TOC register
5323 and so see where it gets restored from.
5325 Oh, and all this gets done in RTL inside the eh_epilogue pattern,
5326 just before the actual epilogue.
5328 On the bright side, this incurs no space or time overhead unless an
5329 exception is thrown, except for the extra code in libgcc.a.
5331 The parameter STACKSIZE is a register containing (at runtime)
5332 the amount to be popped off the stack in addition to the stack frame
5333 of this routine (which will be __throw or __rethrow, and so is
5334 guaranteed to have a stack frame). */
5336 rs6000_emit_eh_toc_restore (stacksize)
5340 rtx bottom_of_stack = gen_reg_rtx (Pmode);
5341 rtx tocompare = gen_reg_rtx (SImode);
5342 rtx opcode = gen_reg_rtx (SImode);
5343 rtx opcode_addr = gen_reg_rtx (Pmode);
5345 rtx loop_start = gen_label_rtx ();
5346 rtx no_toc_restore_needed = gen_label_rtx ();
5347 rtx loop_exit = gen_label_rtx ();
5349 mem = gen_rtx_MEM (Pmode, hard_frame_pointer_rtx);
5350 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5351 emit_move_insn (bottom_of_stack, mem);
5353 top_of_stack = expand_binop (Pmode, add_optab,
5354 bottom_of_stack, stacksize,
5355 NULL_RTX, 1, OPTAB_WIDEN);
5357 emit_move_insn (tocompare,
5358 GEN_INT (trunc_int_for_mode (TARGET_32BIT
5360 : 0xE8410028, SImode)));
5362 if (insn_after_throw == NULL_RTX)
5364 emit_move_insn (opcode, insn_after_throw);
5366 emit_note (NULL_PTR, NOTE_INSN_LOOP_BEG);
5367 emit_label (loop_start);
5369 do_compare_rtx_and_jump (opcode, tocompare, NE, 1,
5370 SImode, NULL_RTX, 0, NULL_RTX,
5371 no_toc_restore_needed);
5373 mem = gen_rtx_MEM (Pmode,
5374 gen_rtx_PLUS (Pmode, bottom_of_stack,
5375 GEN_INT (5 * GET_MODE_SIZE (Pmode))));
5376 emit_move_insn (gen_rtx_REG (Pmode, 2), mem);
5378 emit_label (no_toc_restore_needed);
5379 do_compare_rtx_and_jump (top_of_stack, bottom_of_stack, EQ, 1,
5380 Pmode, NULL_RTX, 0, NULL_RTX,
5383 mem = gen_rtx_MEM (Pmode, bottom_of_stack);
5384 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5385 emit_move_insn (bottom_of_stack, mem);
5387 mem = gen_rtx_MEM (Pmode,
5388 gen_rtx_PLUS (Pmode, bottom_of_stack,
5389 GEN_INT (2 * GET_MODE_SIZE (Pmode))));
5390 emit_move_insn (opcode_addr, mem);
5391 emit_move_insn (opcode, gen_rtx_MEM (SImode, opcode_addr));
5393 emit_note (NULL_PTR, NOTE_INSN_LOOP_CONT);
5394 emit_jump (loop_start);
5395 emit_note (NULL_PTR, NOTE_INSN_LOOP_END);
5396 emit_label (loop_exit);
5398 #endif /* TARGET_AIX */
5400 /* This ties together stack memory
5401 (MEM with an alias set of rs6000_sr_alias_set)
5402 and the change to the stack pointer. */
5404 rs6000_emit_stack_tie ()
5407 mem = gen_rtx_MEM (BLKmode, gen_rtx_REG (Pmode, STACK_POINTER_REGNUM));
5408 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5409 emit_insn (gen_stack_tie (mem));
5412 /* Emit the correct code for allocating stack space, as insns.
5413 If COPY_R12, make sure a copy of the old frame is left in r12.
5414 The generated code may use hard register 0 as a temporary. */
5417 rs6000_emit_allocate_stack (size, copy_r12)
5422 rtx stack_reg = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
5423 rtx tmp_reg = gen_rtx_REG (Pmode, 0);
5424 rtx todec = GEN_INT (-size);
5426 if (current_function_limit_stack)
5428 if (REG_P (stack_limit_rtx)
5429 && REGNO (stack_limit_rtx) > 1
5430 && REGNO (stack_limit_rtx) <= 31)
5432 emit_insn (Pmode == SImode
5433 ? gen_addsi3 (tmp_reg,
5436 : gen_adddi3 (tmp_reg,
5440 emit_insn (gen_cond_trap (LTU, stack_reg, tmp_reg,
5443 else if (GET_CODE (stack_limit_rtx) == SYMBOL_REF
5445 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
5447 rtx toload = gen_rtx_CONST (VOIDmode,
5448 gen_rtx_PLUS (Pmode,
5452 emit_insn (gen_elf_high (tmp_reg, toload));
5453 emit_insn (gen_elf_low (tmp_reg, tmp_reg, toload));
5454 emit_insn (gen_cond_trap (LTU, stack_reg, tmp_reg,
5458 warning ("stack limit expression is not supported");
5461 if (copy_r12 || ! TARGET_UPDATE)
5462 emit_move_insn (gen_rtx_REG (Pmode, 12), stack_reg);
5468 /* Need a note here so that try_split doesn't get confused. */
5469 if (get_last_insn() == NULL_RTX)
5470 emit_note (0, NOTE_INSN_DELETED);
5471 insn = emit_move_insn (tmp_reg, todec);
5472 try_split (PATTERN (insn), insn, 0);
5476 if (Pmode == SImode)
5477 insn = emit_insn (gen_movsi_update (stack_reg, stack_reg,
5480 insn = emit_insn (gen_movdi_update (stack_reg, stack_reg,
5485 if (Pmode == SImode)
5486 insn = emit_insn (gen_addsi3 (stack_reg, stack_reg, todec));
5488 insn = emit_insn (gen_adddi3 (stack_reg, stack_reg, todec));
5489 emit_move_insn (gen_rtx_MEM (Pmode, stack_reg),
5490 gen_rtx_REG (Pmode, 12));
5493 RTX_FRAME_RELATED_P (insn) = 1;
5495 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5496 gen_rtx_SET (VOIDmode, stack_reg,
5497 gen_rtx_PLUS (Pmode, stack_reg,
5502 /* Add to 'insn' a note which is PATTERN (INSN) but with REG replaced with
5503 (plus:P (reg 1) VAL), and with REG2 replaced with RREG if REG2 is not
5505 It would be nice if dwarf2out_frame_debug_expr could deduce these
5506 equivalences by itself so it wasn't necessary to hold its hand so much. */
5509 rs6000_frame_related (insn, reg, val, reg2, rreg)
5518 real = copy_rtx (PATTERN (insn));
5520 real = replace_rtx (real, reg,
5521 gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode,
5522 STACK_POINTER_REGNUM),
5525 /* We expect that 'real' is either a SET or a PARALLEL containing
5526 SETs (and possibly other stuff). In a PARALLEL, all the SETs
5527 are important so they all have to be marked RTX_FRAME_RELATED_P. */
5529 if (GET_CODE (real) == SET)
5533 temp = simplify_rtx (SET_SRC (set));
5535 SET_SRC (set) = temp;
5536 temp = simplify_rtx (SET_DEST (set));
5538 SET_DEST (set) = temp;
5539 if (GET_CODE (SET_DEST (set)) == MEM)
5541 temp = simplify_rtx (XEXP (SET_DEST (set), 0));
5543 XEXP (SET_DEST (set), 0) = temp;
5546 else if (GET_CODE (real) == PARALLEL)
5549 for (i = 0; i < XVECLEN (real, 0); i++)
5550 if (GET_CODE (XVECEXP (real, 0, i)) == SET)
5552 rtx set = XVECEXP (real, 0, i);
5554 temp = simplify_rtx (SET_SRC (set));
5556 SET_SRC (set) = temp;
5557 temp = simplify_rtx (SET_DEST (set));
5559 SET_DEST (set) = temp;
5560 if (GET_CODE (SET_DEST (set)) == MEM)
5562 temp = simplify_rtx (XEXP (SET_DEST (set), 0));
5564 XEXP (SET_DEST (set), 0) = temp;
5566 RTX_FRAME_RELATED_P (set) = 1;
5572 if (reg2 != NULL_RTX)
5573 real = replace_rtx (real, reg2, rreg);
5575 RTX_FRAME_RELATED_P (insn) = 1;
5576 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5581 /* Emit function prologue as insns. */
5584 rs6000_emit_prologue()
5586 rs6000_stack_t *info = rs6000_stack_info ();
5587 enum machine_mode reg_mode = TARGET_POWERPC64 ? DImode : SImode;
5588 int reg_size = TARGET_POWERPC64 ? 8 : 4;
5589 rtx sp_reg_rtx = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
5590 rtx frame_ptr_rtx = gen_rtx_REG (Pmode, 12);
5591 rtx frame_reg_rtx = sp_reg_rtx;
5592 rtx cr_save_rtx = NULL;
5594 int saving_FPRs_inline;
5595 int using_store_multiple;
5596 HOST_WIDE_INT sp_offset = 0;
5598 using_store_multiple = (TARGET_MULTIPLE && ! TARGET_POWERPC64
5599 && info->first_gp_reg_save < 31);
5600 saving_FPRs_inline = (info->first_fp_reg_save == 64
5601 || FP_SAVE_INLINE (info->first_fp_reg_save));
5603 /* For V.4, update stack before we do any saving and set back pointer. */
5604 if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
5606 if (info->total_size < 32767)
5607 sp_offset = info->total_size;
5609 frame_reg_rtx = frame_ptr_rtx;
5610 rs6000_emit_allocate_stack (info->total_size,
5611 (frame_reg_rtx != sp_reg_rtx
5614 || info->first_fp_reg_save < 64
5615 || info->first_gp_reg_save < 32
5617 if (frame_reg_rtx != sp_reg_rtx)
5618 rs6000_emit_stack_tie ();
5621 /* If we use the link register, get it into r0. */
5622 if (info->lr_save_p)
5623 emit_move_insn (gen_rtx_REG (Pmode, 0),
5624 gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
5626 /* If we need to save CR, put it into r12. */
5627 if (info->cr_save_p && frame_reg_rtx != frame_ptr_rtx)
5629 cr_save_rtx = gen_rtx_REG (SImode, 12);
5630 emit_insn (gen_movesi_from_cr (cr_save_rtx));
5633 /* Do any required saving of fpr's. If only one or two to save, do it
5634 ourself. Otherwise, call function. */
5635 if (saving_FPRs_inline)
5638 for (i = 0; i < 64 - info->first_fp_reg_save; i++)
5639 if ((regs_ever_live[info->first_fp_reg_save+i]
5640 && ! call_used_regs[info->first_fp_reg_save+i]))
5643 reg = gen_rtx_REG (DFmode, info->first_fp_reg_save + i);
5644 addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5645 GEN_INT (info->fp_save_offset
5648 mem = gen_rtx_MEM (DFmode, addr);
5649 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5651 insn = emit_move_insn (mem, reg);
5652 rs6000_frame_related (insn, frame_ptr_rtx, info->total_size,
5653 NULL_RTX, NULL_RTX);
5656 else if (info->first_fp_reg_save != 64)
5660 const char *alloc_rname;
5662 p = rtvec_alloc (2 + 64 - info->first_fp_reg_save);
5664 RTVEC_ELT (p, 0) = gen_rtx_CLOBBER (VOIDmode,
5666 LINK_REGISTER_REGNUM));
5667 sprintf (rname, "%s%d%s", SAVE_FP_PREFIX,
5668 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
5669 alloc_rname = ggc_strdup (rname);
5670 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode,
5671 gen_rtx_SYMBOL_REF (Pmode,
5673 for (i = 0; i < 64 - info->first_fp_reg_save; i++)
5676 reg = gen_rtx_REG (DFmode, info->first_fp_reg_save + i);
5677 addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5678 GEN_INT (info->fp_save_offset
5679 + sp_offset + 8*i));
5680 mem = gen_rtx_MEM (DFmode, addr);
5681 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5683 RTVEC_ELT (p, i + 2) = gen_rtx_SET (VOIDmode, mem, reg);
5685 insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
5686 rs6000_frame_related (insn, frame_ptr_rtx, info->total_size,
5687 NULL_RTX, NULL_RTX);
5690 /* Save GPRs. This is done as a PARALLEL if we are using
5691 the store-multiple instructions. */
5692 if (using_store_multiple)
5696 p = rtvec_alloc (32 - info->first_gp_reg_save);
5697 dwarfp = rtvec_alloc (32 - info->first_gp_reg_save);
5698 for (i = 0; i < 32 - info->first_gp_reg_save; i++)
5701 reg = gen_rtx_REG (reg_mode, info->first_gp_reg_save + i);
5702 addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5703 GEN_INT (info->gp_save_offset
5706 mem = gen_rtx_MEM (reg_mode, addr);
5707 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5709 RTVEC_ELT (p, i) = gen_rtx_SET (VOIDmode, mem, reg);
5711 insn = emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
5712 rs6000_frame_related (insn, frame_ptr_rtx, info->total_size,
5713 NULL_RTX, NULL_RTX);
5718 for (i = 0; i < 32 - info->first_gp_reg_save; i++)
5719 if ((regs_ever_live[info->first_gp_reg_save+i]
5720 && ! call_used_regs[info->first_gp_reg_save+i])
5721 || (i+info->first_gp_reg_save == PIC_OFFSET_TABLE_REGNUM
5722 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
5726 reg = gen_rtx_REG (reg_mode, info->first_gp_reg_save + i);
5727 addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5728 GEN_INT (info->gp_save_offset
5731 mem = gen_rtx_MEM (reg_mode, addr);
5732 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5734 insn = emit_move_insn (mem, reg);
5735 rs6000_frame_related (insn, frame_ptr_rtx, info->total_size,
5736 NULL_RTX, NULL_RTX);
5740 /* Save lr if we used it. */
5741 if (info->lr_save_p)
5743 rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5744 GEN_INT (info->lr_save_offset + sp_offset));
5745 rtx reg = gen_rtx_REG (Pmode, 0);
5746 rtx mem = gen_rtx_MEM (Pmode, addr);
5747 /* This should not be of rs6000_sr_alias_set, because of
5748 __builtin_return_address. */
5750 insn = emit_move_insn (mem, reg);
5751 rs6000_frame_related (insn, frame_ptr_rtx, info->total_size,
5752 reg, gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
5755 /* Save CR if we use any that must be preserved. */
5756 if (info->cr_save_p)
5758 rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5759 GEN_INT (info->cr_save_offset + sp_offset));
5760 rtx mem = gen_rtx_MEM (SImode, addr);
5761 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5763 /* If r12 was used to hold the original sp, copy cr into r0 now
5765 if (REGNO (frame_reg_rtx) == 12)
5767 cr_save_rtx = gen_rtx_REG (SImode, 0);
5768 emit_insn (gen_movesi_from_cr (cr_save_rtx));
5770 insn = emit_move_insn (mem, cr_save_rtx);
5772 /* Now, there's no way that dwarf2out_frame_debug_expr is going
5773 to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's
5774 OK. All we have to do is specify that _one_ condition code
5775 register is saved in this stack slot. The thrower's epilogue
5776 will then restore all the call-saved registers. */
5777 rs6000_frame_related (insn, frame_ptr_rtx, info->total_size,
5778 cr_save_rtx, gen_rtx_REG (SImode, CR0_REGNO));
5781 /* Update stack and set back pointer unless this is V.4,
5782 for which it was done previously. */
5783 if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
5784 rs6000_emit_allocate_stack (info->total_size, FALSE);
5786 /* Set frame pointer, if needed. */
5787 if (frame_pointer_needed)
5789 insn = emit_move_insn (gen_rtx_REG (reg_mode, FRAME_POINTER_REGNUM),
5791 RTX_FRAME_RELATED_P (insn) = 1;
5794 /* If we are using PIC_OFFSET_TABLE_REGNUM, we need to set it up. */
5795 if ((TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
5796 || ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
5797 && flag_pic == 1 && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]))
5799 /* If emit_load_toc_table will use the link register, we need to save
5800 it. We use R11 for this purpose because emit_load_toc_table
5801 can use register 0. This allows us to use a plain 'blr' to return
5802 from the procedure more often. */
5803 int save_LR_around_toc_setup = (TARGET_ELF && flag_pic != 0 &&
5805 if (save_LR_around_toc_setup)
5806 emit_move_insn (gen_rtx_REG (Pmode, 11),
5807 gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM));
5809 rs6000_emit_load_toc_table (TRUE);
5811 if (save_LR_around_toc_setup)
5812 emit_move_insn (gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM),
5813 gen_rtx_REG (Pmode, 11));
5818 /* Write function prologue. */
5820 output_prolog (file, size)
5822 int size ATTRIBUTE_UNUSED;
5824 rs6000_stack_t *info = rs6000_stack_info ();
5826 if (TARGET_DEBUG_STACK)
5827 debug_stack_info (info);
5829 /* Write .extern for any function we will call to save and restore fp
5831 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
5832 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
5833 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
5834 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
5836 /* Write .extern for AIX common mode routines, if needed. */
5837 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
5839 fputs ("\t.extern __mulh\n", file);
5840 fputs ("\t.extern __mull\n", file);
5841 fputs ("\t.extern __divss\n", file);
5842 fputs ("\t.extern __divus\n", file);
5843 fputs ("\t.extern __quoss\n", file);
5844 fputs ("\t.extern __quous\n", file);
5845 common_mode_defined = 1;
5848 if (! HAVE_prologue)
5852 /* A NOTE_INSN_DELETED is supposed to be at the start
5853 and end of the "toplevel" insn chain. */
5854 emit_note (0, NOTE_INSN_DELETED);
5855 rs6000_emit_prologue ();
5856 emit_note (0, NOTE_INSN_DELETED);
5858 if (TARGET_DEBUG_STACK)
5859 debug_rtx_list (get_insns(), 100);
5860 final (get_insns(), file, FALSE, FALSE);
5864 rs6000_pic_labelno++;
5867 /* Emit function epilogue as insns.
5869 At present, dwarf2out_frame_debug_expr doesn't understand
5870 register restores, so we don't bother setting RTX_FRAME_RELATED_P
5871 anywhere in the epilogue. Most of the insns below would in any case
5872 need special notes to explain where r11 is in relation to the stack. */
5875 rs6000_emit_epilogue(sibcall)
5878 rs6000_stack_t *info;
5879 int restoring_FPRs_inline;
5880 int using_load_multiple;
5881 int using_mfcr_multiple;
5882 int use_backchain_to_restore_sp;
5884 rtx sp_reg_rtx = gen_rtx_REG (Pmode, 1);
5885 rtx frame_reg_rtx = sp_reg_rtx;
5886 enum machine_mode reg_mode = TARGET_POWERPC64 ? DImode : SImode;
5887 int reg_size = TARGET_POWERPC64 ? 8 : 4;
5890 info = rs6000_stack_info ();
5891 using_load_multiple = (TARGET_MULTIPLE && ! TARGET_POWERPC64
5892 && info->first_gp_reg_save < 31);
5893 restoring_FPRs_inline = (sibcall
5894 || info->first_fp_reg_save == 64
5895 || FP_SAVE_INLINE (info->first_fp_reg_save));
5896 use_backchain_to_restore_sp = (frame_pointer_needed
5897 || current_function_calls_alloca
5898 || info->total_size > 32767);
5899 using_mfcr_multiple = (rs6000_cpu == PROCESSOR_PPC601
5900 || rs6000_cpu == PROCESSOR_PPC603
5901 || rs6000_cpu == PROCESSOR_PPC750
5904 /* If we have a frame pointer, a call to alloca, or a large stack
5905 frame, restore the old stack pointer using the backchain. Otherwise,
5906 we know what size to update it with. */
5907 if (use_backchain_to_restore_sp)
5909 /* Under V.4, don't reset the stack pointer until after we're done
5910 loading the saved registers. */
5911 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
5912 frame_reg_rtx = gen_rtx_REG (Pmode, 11);
5914 emit_move_insn (frame_reg_rtx,
5915 gen_rtx_MEM (Pmode, sp_reg_rtx));
5918 else if (info->push_p)
5920 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
5921 sp_offset = info->total_size;
5924 emit_insn (TARGET_32BIT
5925 ? gen_addsi3 (sp_reg_rtx, sp_reg_rtx,
5926 GEN_INT (info->total_size))
5927 : gen_adddi3 (sp_reg_rtx, sp_reg_rtx,
5928 GEN_INT (info->total_size)));
5932 /* Get the old lr if we saved it. */
5933 if (info->lr_save_p)
5935 rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5936 GEN_INT (info->lr_save_offset + sp_offset));
5937 rtx mem = gen_rtx_MEM (Pmode, addr);
5938 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5940 emit_move_insn (gen_rtx_REG (Pmode, 0), mem);
5943 /* Get the old cr if we saved it. */
5944 if (info->cr_save_p)
5946 rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5947 GEN_INT (info->cr_save_offset + sp_offset));
5948 rtx mem = gen_rtx_MEM (SImode, addr);
5949 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5951 emit_move_insn (gen_rtx_REG (SImode, 12), mem);
5954 /* Set LR here to try to overlap restores below. */
5955 if (info->lr_save_p)
5956 emit_move_insn (gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM),
5957 gen_rtx_REG (Pmode, 0));
5960 /* Restore GPRs. This is done as a PARALLEL if we are using
5961 the load-multiple instructions. */
5962 if (using_load_multiple)
5965 p = rtvec_alloc (32 - info->first_gp_reg_save);
5966 for (i = 0; i < 32 - info->first_gp_reg_save; i++)
5968 rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5969 GEN_INT (info->gp_save_offset
5972 rtx mem = gen_rtx_MEM (reg_mode, addr);
5973 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5976 gen_rtx_SET (VOIDmode,
5977 gen_rtx_REG (reg_mode, info->first_gp_reg_save + i),
5980 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
5983 for (i = 0; i < 32 - info->first_gp_reg_save; i++)
5984 if ((regs_ever_live[info->first_gp_reg_save+i]
5985 && ! call_used_regs[info->first_gp_reg_save+i])
5986 || (i+info->first_gp_reg_save == PIC_OFFSET_TABLE_REGNUM
5987 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
5990 rtx addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
5991 GEN_INT (info->gp_save_offset
5994 rtx mem = gen_rtx_MEM (reg_mode, addr);
5995 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
5997 emit_move_insn (gen_rtx_REG (reg_mode,
5998 info->first_gp_reg_save + i),
6002 /* Restore fpr's if we need to do it without calling a function. */
6003 if (restoring_FPRs_inline)
6004 for (i = 0; i < 64 - info->first_fp_reg_save; i++)
6005 if ((regs_ever_live[info->first_fp_reg_save+i]
6006 && ! call_used_regs[info->first_fp_reg_save+i]))
6009 addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
6010 GEN_INT (info->fp_save_offset
6013 mem = gen_rtx_MEM (DFmode, addr);
6014 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
6016 emit_move_insn (gen_rtx_REG (DFmode,
6017 info->first_fp_reg_save + i),
6021 /* If we saved cr, restore it here. Just those that were used. */
6022 if (info->cr_save_p)
6024 rtx r12_rtx = gen_rtx_REG (SImode, 12);
6027 if (using_mfcr_multiple)
6029 for (i = 0; i < 8; i++)
6030 if (regs_ever_live[CR0_REGNO+i] && ! call_used_regs[CR0_REGNO+i])
6036 if (using_mfcr_multiple && count > 1)
6041 p = rtvec_alloc (count);
6044 for (i = 0; i < 8; i++)
6045 if (regs_ever_live[CR0_REGNO+i] && ! call_used_regs[CR0_REGNO+i])
6047 rtvec r = rtvec_alloc (2);
6048 RTVEC_ELT (r, 0) = r12_rtx;
6049 RTVEC_ELT (r, 1) = GEN_INT (1 << (7-i));
6050 RTVEC_ELT (p, ndx) =
6051 gen_rtx_SET (VOIDmode, gen_rtx_REG (CCmode, CR0_REGNO+i),
6052 gen_rtx_UNSPEC (CCmode, r, 20));
6055 emit_insn (gen_rtx_PARALLEL (VOIDmode, p));
6060 for (i = 0; i < 8; i++)
6061 if (regs_ever_live[CR0_REGNO+i] && ! call_used_regs[CR0_REGNO+i])
6063 emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode,
6069 /* If this is V.4, unwind the stack pointer after all of the loads
6070 have been done. We need to emit a block here so that sched
6071 doesn't decide to move the sp change before the register restores
6072 (which may not have any obvious dependency on the stack). This
6073 doesn't hurt performance, because there is no scheduling that can
6074 be done after this point. */
6075 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
6077 if (frame_reg_rtx != sp_reg_rtx)
6078 rs6000_emit_stack_tie ();
6080 if (use_backchain_to_restore_sp)
6082 emit_move_insn (sp_reg_rtx, frame_reg_rtx);
6084 else if (sp_offset != 0)
6086 emit_insn (Pmode == SImode
6087 ? gen_addsi3 (sp_reg_rtx, sp_reg_rtx,
6088 GEN_INT (sp_offset))
6089 : gen_adddi3 (sp_reg_rtx, sp_reg_rtx,
6090 GEN_INT (sp_offset)));
6097 if (! restoring_FPRs_inline)
6098 p = rtvec_alloc (3 + 64 - info->first_fp_reg_save);
6100 p = rtvec_alloc (2);
6102 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
6103 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode,
6105 LINK_REGISTER_REGNUM));
6107 /* If we have to restore more than two FP registers, branch to the
6108 restore function. It will return to our caller. */
6109 if (! restoring_FPRs_inline)
6113 const char *alloc_rname;
6115 sprintf (rname, "%s%d%s", RESTORE_FP_PREFIX,
6116 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
6117 alloc_rname = ggc_strdup (rname);
6118 RTVEC_ELT (p, 2) = gen_rtx_USE (VOIDmode,
6119 gen_rtx_SYMBOL_REF (Pmode,
6122 for (i = 0; i < 64 - info->first_fp_reg_save; i++)
6125 addr = gen_rtx_PLUS (Pmode, sp_reg_rtx,
6126 GEN_INT (info->fp_save_offset + 8*i));
6127 mem = gen_rtx_MEM (DFmode, addr);
6128 MEM_ALIAS_SET (mem) = rs6000_sr_alias_set;
6130 RTVEC_ELT (p, i+3) =
6131 gen_rtx_SET (VOIDmode,
6132 gen_rtx_REG (DFmode, info->first_fp_reg_save + i),
6137 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
6141 /* Write function epilogue. */
6144 output_epilog (file, size)
6146 int size ATTRIBUTE_UNUSED;
6148 rs6000_stack_t *info = rs6000_stack_info ();
6150 if (! HAVE_epilogue)
6152 rtx insn = get_last_insn ();
6153 /* If the last insn was a BARRIER, we don't have to write anything except
6155 if (GET_CODE (insn) == NOTE)
6156 insn = prev_nonnote_insn (insn);
6157 if (insn == 0 || GET_CODE (insn) != BARRIER)
6159 /* This is slightly ugly, but at least we don't have two
6160 copies of the epilogue-emitting code. */
6163 /* A NOTE_INSN_DELETED is supposed to be at the start
6164 and end of the "toplevel" insn chain. */
6165 emit_note (0, NOTE_INSN_DELETED);
6166 rs6000_emit_epilogue (FALSE);
6167 emit_note (0, NOTE_INSN_DELETED);
6169 if (TARGET_DEBUG_STACK)
6170 debug_rtx_list (get_insns(), 100);
6171 final (get_insns(), file, FALSE, FALSE);
6176 /* Output a traceback table here. See /usr/include/sys/debug.h for info
6179 We don't output a traceback table if -finhibit-size-directive was
6180 used. The documentation for -finhibit-size-directive reads
6181 ``don't output a @code{.size} assembler directive, or anything
6182 else that would cause trouble if the function is split in the
6183 middle, and the two halves are placed at locations far apart in
6184 memory.'' The traceback table has this property, since it
6185 includes the offset from the start of the function to the
6186 traceback table itself.
6188 System V.4 Powerpc's (and the embedded ABI derived from it) use a
6189 different traceback table. */
6190 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
6192 const char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
6193 int fixed_parms, float_parms, parm_info;
6196 while (*fname == '.') /* V.4 encodes . in the name */
6199 /* Need label immediately before tbtab, so we can compute its offset
6200 from the function start. */
6203 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
6204 ASM_OUTPUT_LABEL (file, fname);
6206 /* The .tbtab pseudo-op can only be used for the first eight
6207 expressions, since it can't handle the possibly variable
6208 length fields that follow. However, if you omit the optional
6209 fields, the assembler outputs zeros for all optional fields
6210 anyways, giving each variable length field is minimum length
6211 (as defined in sys/debug.h). Thus we can not use the .tbtab
6212 pseudo-op at all. */
6214 /* An all-zero word flags the start of the tbtab, for debuggers
6215 that have to find it by searching forward from the entry
6216 point or from the current pc. */
6217 fputs ("\t.long 0\n", file);
6219 /* Tbtab format type. Use format type 0. */
6220 fputs ("\t.byte 0,", file);
6222 /* Language type. Unfortunately, there doesn't seem to be any
6223 official way to get this info, so we use language_string. C
6224 is 0. C++ is 9. No number defined for Obj-C, so use the
6225 value for C for now. There is no official value for Java,
6226 although IBM appears to be using 13. There is no official value
6227 for Chill, so we've choosen 44 pseudo-randomly. */
6228 if (! strcmp (language_string, "GNU C")
6229 || ! strcmp (language_string, "GNU Objective-C"))
6231 else if (! strcmp (language_string, "GNU F77"))
6233 else if (! strcmp (language_string, "GNU Ada"))
6235 else if (! strcmp (language_string, "GNU Pascal"))
6237 else if (! strcmp (language_string, "GNU C++"))
6239 else if (! strcmp (language_string, "GNU Java"))
6241 else if (! strcmp (language_string, "GNU CHILL"))
6245 fprintf (file, "%d,", i);
6247 /* 8 single bit fields: global linkage (not set for C extern linkage,
6248 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
6249 from start of procedure stored in tbtab, internal function, function
6250 has controlled storage, function has no toc, function uses fp,
6251 function logs/aborts fp operations. */
6252 /* Assume that fp operations are used if any fp reg must be saved. */
6253 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
6255 /* 6 bitfields: function is interrupt handler, name present in
6256 proc table, function calls alloca, on condition directives
6257 (controls stack walks, 3 bits), saves condition reg, saves
6259 /* The `function calls alloca' bit seems to be set whenever reg 31 is
6260 set up as a frame pointer, even when there is no alloca call. */
6261 fprintf (file, "%d,",
6262 ((1 << 6) | (frame_pointer_needed << 5)
6263 | (info->cr_save_p << 1) | (info->lr_save_p)));
6265 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
6267 fprintf (file, "%d,",
6268 (info->push_p << 7) | (64 - info->first_fp_reg_save));
6270 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
6271 fprintf (file, "%d,", (32 - first_reg_to_save ()));
6274 /* Compute the parameter info from the function decl argument
6277 int next_parm_info_bit;
6279 next_parm_info_bit = 31;
6284 for (decl = DECL_ARGUMENTS (current_function_decl);
6285 decl; decl = TREE_CHAIN (decl))
6287 rtx parameter = DECL_INCOMING_RTL (decl);
6288 enum machine_mode mode = GET_MODE (parameter);
6290 if (GET_CODE (parameter) == REG)
6292 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
6300 else if (mode == DFmode)
6305 /* If only one bit will fit, don't or in this entry. */
6306 if (next_parm_info_bit > 0)
6307 parm_info |= (bits << (next_parm_info_bit - 1));
6308 next_parm_info_bit -= 2;
6312 fixed_parms += ((GET_MODE_SIZE (mode)
6313 + (UNITS_PER_WORD - 1))
6315 next_parm_info_bit -= 1;
6321 /* Number of fixed point parameters. */
6322 /* This is actually the number of words of fixed point parameters; thus
6323 an 8 byte struct counts as 2; and thus the maximum value is 8. */
6324 fprintf (file, "%d,", fixed_parms);
6326 /* 2 bitfields: number of floating point parameters (7 bits), parameters
6328 /* This is actually the number of fp registers that hold parameters;
6329 and thus the maximum value is 13. */
6330 /* Set parameters on stack bit if parameters are not in their original
6331 registers, regardless of whether they are on the stack? Xlc
6332 seems to set the bit when not optimizing. */
6333 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
6335 /* Optional fields follow. Some are variable length. */
6337 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
6339 /* There is an entry for each parameter in a register, in the order that
6340 they occur in the parameter list. Any intervening arguments on the
6341 stack are ignored. If the list overflows a long (max possible length
6342 34 bits) then completely leave off all elements that don't fit. */
6343 /* Only emit this long if there was at least one parameter. */
6344 if (fixed_parms || float_parms)
6345 fprintf (file, "\t.long %d\n", parm_info);
6347 /* Offset from start of code to tb table. */
6348 fputs ("\t.long ", file);
6349 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
6351 RS6000_OUTPUT_BASENAME (file, fname);
6353 assemble_name (file, fname);
6357 RS6000_OUTPUT_BASENAME (file, fname);
6359 assemble_name (file, fname);
6363 /* Interrupt handler mask. */
6364 /* Omit this long, since we never set the interrupt handler bit
6367 /* Number of CTL (controlled storage) anchors. */
6368 /* Omit this long, since the has_ctl bit is never set above. */
6370 /* Displacement into stack of each CTL anchor. */
6371 /* Omit this list of longs, because there are no CTL anchors. */
6373 /* Length of function name. */
6374 fprintf (file, "\t.short %d\n", (int) strlen (fname));
6376 /* Function name. */
6377 assemble_string (fname, strlen (fname));
6379 /* Register for alloca automatic storage; this is always reg 31.
6380 Only emit this if the alloca bit was set above. */
6381 if (frame_pointer_needed)
6382 fputs ("\t.byte 31\n", file);
6386 /* A C compound statement that outputs the assembler code for a thunk function,
6387 used to implement C++ virtual function calls with multiple inheritance. The
6388 thunk acts as a wrapper around a virtual function, adjusting the implicit
6389 object parameter before handing control off to the real function.
6391 First, emit code to add the integer DELTA to the location that contains the
6392 incoming first argument. Assume that this argument contains a pointer, and
6393 is the one used to pass the `this' pointer in C++. This is the incoming
6394 argument *before* the function prologue, e.g. `%o0' on a sparc. The
6395 addition must preserve the values of all other incoming arguments.
6397 After the addition, emit code to jump to FUNCTION, which is a
6398 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
6399 the return address. Hence returning from FUNCTION will return to whoever
6400 called the current `thunk'.
6402 The effect must be as if FUNCTION had been called directly with the adjusted
6403 first argument. This macro is responsible for emitting all of the code for
6404 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not
6407 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
6408 extracted from it.) It might possibly be useful on some targets, but
6411 If you do not define this macro, the target-independent code in the C++
6412 frontend will generate a less efficient heavyweight thunk that calls
6413 FUNCTION instead of jumping to it. The generic approach does not support
6417 output_mi_thunk (file, thunk_fndecl, delta, function)
6419 tree thunk_fndecl ATTRIBUTE_UNUSED;
6423 const char *this_reg = reg_names[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) ? 4 : 3 ];
6426 const char *r0 = reg_names[0];
6427 const char *toc = reg_names[2];
6428 const char *schain = reg_names[11];
6429 const char *r12 = reg_names[12];
6431 static int labelno = 0;
6433 /* Small constants that can be done by one add instruction */
6434 if (delta >= -32768 && delta <= 32767)
6436 if (! TARGET_NEW_MNEMONICS)
6437 fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta, this_reg);
6439 fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta);
6442 /* Large constants that can be done by one addis instruction */
6443 else if ((delta & 0xffff) == 0 && num_insns_constant_wide (delta) == 1)
6444 asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg,
6447 /* 32-bit constants that can be done by an add and addis instruction. */
6448 else if (TARGET_32BIT || num_insns_constant_wide (delta) == 1)
6450 /* Break into two pieces, propagating the sign bit from the low word to
6452 int delta_high = delta >> 16;
6453 int delta_low = delta & 0xffff;
6454 if ((delta_low & 0x8000) != 0)
6457 delta_low = (delta_low ^ 0x8000) - 0x8000; /* sign extend */
6460 asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg,
6463 if (! TARGET_NEW_MNEMONICS)
6464 fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta_low, this_reg);
6466 fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta_low);
6469 /* 64-bit constants, fixme */
6473 /* Get the prefix in front of the names. */
6474 switch (DEFAULT_ABI)
6484 case ABI_AIX_NODESC:
6490 /* If the function is compiled in this module, jump to it directly.
6491 Otherwise, load up its address and jump to it. */
6493 fname = XSTR (XEXP (DECL_RTL (function), 0), 0);
6495 if (current_file_function_operand (XEXP (DECL_RTL (function), 0), VOIDmode)
6496 && ! lookup_attribute ("longcall",
6497 TYPE_ATTRIBUTES (TREE_TYPE (function))))
6499 fprintf (file, "\tb %s", prefix);
6500 assemble_name (file, fname);
6501 if (DEFAULT_ABI == ABI_V4 && flag_pic) fputs ("@local", file);
6507 switch (DEFAULT_ABI)
6513 /* Set up a TOC entry for the function. */
6514 ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno);
6516 ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno);
6519 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since
6520 there will be only one TOC entry for this function. */
6521 fputs ("\t.tc\t", file);
6522 assemble_name (file, buf);
6523 fputs ("[TC],", file);
6524 assemble_name (file, buf);
6527 asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s," : "\tld %s", r12);
6528 assemble_name (file, buf);
6529 asm_fprintf (file, "(%s)\n", reg_names[2]);
6531 (TARGET_32BIT) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n",
6535 (TARGET_32BIT) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n",
6538 asm_fprintf (file, "\tmtctr %s\n", r0);
6540 (TARGET_32BIT) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n",
6543 asm_fprintf (file, "\tbctr\n");
6546 case ABI_AIX_NODESC:
6549 fprintf (file, "\tb %s", prefix);
6550 assemble_name (file, fname);
6551 if (flag_pic) fputs ("@plt", file);
6559 /* A quick summary of the various types of 'constant-pool tables'
6562 Target Flags Name One table per
6563 AIX (none) AIX TOC object file
6564 AIX -mfull-toc AIX TOC object file
6565 AIX -mminimal-toc AIX minimal TOC translation unit
6566 SVR4/EABI (none) SVR4 SDATA object file
6567 SVR4/EABI -fpic SVR4 pic object file
6568 SVR4/EABI -fPIC SVR4 PIC translation unit
6569 SVR4/EABI -mrelocatable EABI TOC function
6570 SVR4/EABI -maix AIX TOC object file
6571 SVR4/EABI -maix -mminimal-toc
6572 AIX minimal TOC translation unit
6574 Name Reg. Set by entries contains:
6575 made by addrs? fp? sum?
6577 AIX TOC 2 crt0 as Y option option
6578 AIX minimal TOC 30 prolog gcc Y Y option
6579 SVR4 SDATA 13 crt0 gcc N Y N
6580 SVR4 pic 30 prolog ld Y not yet N
6581 SVR4 PIC 30 prolog gcc Y option option
6582 EABI TOC 30 prolog gcc Y option option
6586 /* Hash table stuff for keeping track of TOC entries. */
6588 struct toc_hash_struct
6590 /* `key' will satisfy CONSTANT_P; in fact, it will satisfy
6591 ASM_OUTPUT_SPECIAL_POOL_ENTRY_P. */
6593 enum machine_mode key_mode;
6597 static htab_t toc_hash_table;
6599 /* Hash functions for the hash table. */
6602 rs6000_hash_constant (k)
6605 unsigned result = (GET_CODE (k) << 3) ^ GET_MODE (k);
6606 const char *format = GET_RTX_FORMAT (GET_CODE (k));
6607 int flen = strlen (format);
6610 if (GET_CODE (k) == LABEL_REF)
6611 return result * 1231 + X0INT (XEXP (k, 0), 3);
6613 if (GET_CODE (k) == CONST_DOUBLE)
6615 else if (GET_CODE (k) == CODE_LABEL)
6620 for (; fidx < flen; fidx++)
6621 switch (format[fidx])
6626 const char *str = XSTR (k, fidx);
6628 result = result * 613 + len;
6629 for (i = 0; i < len; i++)
6630 result = result * 613 + (unsigned) str[i];
6635 result = result * 1231 + rs6000_hash_constant (XEXP (k, fidx));
6639 result = result * 613 + (unsigned) XINT (k, fidx);
6642 if (sizeof (unsigned) >= sizeof (HOST_WIDE_INT))
6643 result = result * 613 + (unsigned) XWINT (k, fidx);
6647 for (i = 0; i < sizeof(HOST_WIDE_INT)/sizeof(unsigned); i++)
6648 result = result * 613 + (unsigned) (XWINT (k, fidx)
6659 toc_hash_function (hash_entry)
6660 const void * hash_entry;
6662 const struct toc_hash_struct *thc =
6663 (const struct toc_hash_struct *) hash_entry;
6664 return rs6000_hash_constant (thc->key) ^ thc->key_mode;
6667 /* Compare H1 and H2 for equivalence. */
6670 toc_hash_eq (h1, h2)
6674 rtx r1 = ((const struct toc_hash_struct *) h1)->key;
6675 rtx r2 = ((const struct toc_hash_struct *) h2)->key;
6677 if (((const struct toc_hash_struct *) h1)->key_mode
6678 != ((const struct toc_hash_struct *) h2)->key_mode)
6681 /* Gotcha: One of these const_doubles will be in memory.
6682 The other may be on the constant-pool chain.
6683 So rtx_equal_p will think they are different... */
6686 if (GET_CODE (r1) != GET_CODE (r2)
6687 || GET_MODE (r1) != GET_MODE (r2))
6689 if (GET_CODE (r1) == CONST_DOUBLE)
6691 int format_len = strlen (GET_RTX_FORMAT (CONST_DOUBLE));
6693 for (i = 2; i < format_len; i++)
6694 if (XWINT (r1, i) != XWINT (r2, i))
6699 else if (GET_CODE (r1) == LABEL_REF)
6700 return (CODE_LABEL_NUMBER (XEXP (r1, 0))
6701 == CODE_LABEL_NUMBER (XEXP (r2, 0)));
6703 return rtx_equal_p (r1, r2);
6706 /* Mark the hash table-entry HASH_ENTRY. */
6709 toc_hash_mark_entry (hash_slot, unused)
6711 void * unused ATTRIBUTE_UNUSED;
6713 const struct toc_hash_struct * hash_entry =
6714 *(const struct toc_hash_struct **) hash_slot;
6715 rtx r = hash_entry->key;
6716 ggc_set_mark (hash_entry);
6717 /* For CODE_LABELS, we don't want to drag in the whole insn chain... */
6718 if (GET_CODE (r) == LABEL_REF)
6721 ggc_set_mark (XEXP (r, 0));
6728 /* Mark all the elements of the TOC hash-table *HT. */
6731 toc_hash_mark_table (vht)
6736 htab_traverse (*ht, toc_hash_mark_entry, (void *)0);
6739 /* These are the names given by the C++ front-end to vtables, and
6740 vtable-like objects. Ideally, this logic should not be here;
6741 instead, there should be some programmatic way of inquiring as
6742 to whether or not an object is a vtable. */
6744 #define VTABLE_NAME_P(NAME) \
6745 (strncmp ("_vt.", name, strlen("_vt.")) == 0 \
6746 || strncmp ("_ZTV", name, strlen ("_ZTV")) == 0 \
6747 || strncmp ("_ZTT", name, strlen ("_ZTT")) == 0 \
6748 || strncmp ("_ZTC", name, strlen ("_ZTC")) == 0)
6751 rs6000_output_symbol_ref (file, x)
6755 /* Currently C++ toc references to vtables can be emitted before it
6756 is decided whether the vtable is public or private. If this is
6757 the case, then the linker will eventually complain that there is
6758 a reference to an unknown section. Thus, for vtables only,
6759 we emit the TOC reference to reference the symbol and not the
6761 const char *name = XSTR (x, 0);
6763 if (VTABLE_NAME_P (name))
6765 RS6000_OUTPUT_BASENAME (file, name);
6768 assemble_name (file, name);
6771 /* Output a TOC entry. We derive the entry name from what is
6775 output_toc (file, x, labelno, mode)
6779 enum machine_mode mode;
6782 const char *name = buf;
6783 const char *real_name;
6790 /* When the linker won't eliminate them, don't output duplicate
6791 TOC entries (this happens on AIX if there is any kind of TOC,
6792 and on SVR4 under -fPIC or -mrelocatable). */
6795 struct toc_hash_struct *h;
6798 h = ggc_alloc (sizeof (*h));
6801 h->labelno = labelno;
6803 found = htab_find_slot (toc_hash_table, h, 1);
6806 else /* This is indeed a duplicate.
6807 Set this label equal to that label. */
6809 fputs ("\t.set ", file);
6810 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
6811 fprintf (file, "%d,", labelno);
6812 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
6813 fprintf (file, "%d\n", ((*(const struct toc_hash_struct **)
6819 /* If we're going to put a double constant in the TOC, make sure it's
6820 aligned properly when strict alignment is on. */
6821 if (GET_CODE (x) == CONST_DOUBLE
6823 && GET_MODE_BITSIZE (mode) >= 64
6824 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
6825 ASM_OUTPUT_ALIGN (file, 3);
6828 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
6830 /* Handle FP constants specially. Note that if we have a minimal
6831 TOC, things we put here aren't actually in the TOC, so we can allow
6833 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode)
6838 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
6839 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
6843 if (TARGET_MINIMAL_TOC)
6844 fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]);
6846 fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n",
6847 k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff);
6852 if (TARGET_MINIMAL_TOC)
6853 fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", k[0], k[1]);
6855 fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
6856 k[0], k[1], k[0], k[1]);
6860 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode)
6865 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
6866 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
6870 if (TARGET_MINIMAL_TOC)
6871 fprintf (file, "\t.llong 0x%lx00000000\n", l);
6873 fprintf (file, "\t.tc FS_%lx[TC],0x%lx00000000\n", l, l);
6878 if (TARGET_MINIMAL_TOC)
6879 fprintf (file, "\t.long 0x%lx\n", l);
6881 fprintf (file, "\t.tc FS_%lx[TC],0x%lx\n", l, l);
6885 else if (GET_MODE (x) == VOIDmode
6886 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
6888 unsigned HOST_WIDE_INT low;
6891 if (GET_CODE (x) == CONST_DOUBLE)
6893 low = CONST_DOUBLE_LOW (x);
6894 high = CONST_DOUBLE_HIGH (x);
6897 #if HOST_BITS_PER_WIDE_INT == 32
6900 high = (low & 0x80000000) ? ~0 : 0;
6904 low = INTVAL (x) & 0xffffffff;
6905 high = (HOST_WIDE_INT) INTVAL (x) >> 32;
6909 /* TOC entries are always Pmode-sized, but since this
6910 is a bigendian machine then if we're putting smaller
6911 integer constants in the TOC we have to pad them.
6912 (This is still a win over putting the constants in
6913 a separate constant pool, because then we'd have
6914 to have both a TOC entry _and_ the actual constant.)
6916 For a 32-bit target, CONST_INT values are loaded and shifted
6917 entirely within `low' and can be stored in one TOC entry. */
6919 if (TARGET_64BIT && POINTER_SIZE < GET_MODE_BITSIZE (mode))
6920 abort ();/* It would be easy to make this work, but it doesn't now. */
6922 if (POINTER_SIZE > GET_MODE_BITSIZE (mode))
6923 lshift_double (low, high, POINTER_SIZE - GET_MODE_BITSIZE (mode),
6924 POINTER_SIZE, &low, &high, 0);
6928 if (TARGET_MINIMAL_TOC)
6929 fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low);
6931 fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n",
6932 (long)high, (long)low, (long)high, (long)low);
6937 if (POINTER_SIZE < GET_MODE_BITSIZE (mode))
6939 if (TARGET_MINIMAL_TOC)
6940 fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n",
6941 (long)high, (long)low);
6943 fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n",
6944 (long)high, (long)low, (long)high, (long)low);
6948 if (TARGET_MINIMAL_TOC)
6949 fprintf (file, "\t.long 0x%lx\n",
6952 fprintf (file, "\t.tc IS_%lx[TC],0x%lx\n",
6953 (long)low, (long)low);
6959 if (GET_CODE (x) == CONST)
6961 base = XEXP (XEXP (x, 0), 0);
6962 offset = INTVAL (XEXP (XEXP (x, 0), 1));
6965 if (GET_CODE (base) == SYMBOL_REF)
6966 name = XSTR (base, 0);
6967 else if (GET_CODE (base) == LABEL_REF)
6968 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
6969 else if (GET_CODE (base) == CODE_LABEL)
6970 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
6974 STRIP_NAME_ENCODING (real_name, name);
6975 if (TARGET_MINIMAL_TOC)
6976 fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file);
6979 fprintf (file, "\t.tc %s", real_name);
6982 fprintf (file, ".N%d", - offset);
6984 fprintf (file, ".P%d", offset);
6986 fputs ("[TC],", file);
6989 /* Currently C++ toc references to vtables can be emitted before it
6990 is decided whether the vtable is public or private. If this is
6991 the case, then the linker will eventually complain that there is
6992 a TOC reference to an unknown section. Thus, for vtables only,
6993 we emit the TOC reference to reference the symbol and not the
6995 if (VTABLE_NAME_P (name))
6997 RS6000_OUTPUT_BASENAME (file, name);
6999 fprintf (file, "%d", offset);
7000 else if (offset > 0)
7001 fprintf (file, "+%d", offset);
7004 output_addr_const (file, x);
7008 /* Output an assembler pseudo-op to write an ASCII string of N characters
7009 starting at P to FILE.
7011 On the RS/6000, we have to do this using the .byte operation and
7012 write out special characters outside the quoted string.
7013 Also, the assembler is broken; very long strings are truncated,
7014 so we must artificially break them up early. */
7017 output_ascii (file, p, n)
7023 int i, count_string;
7024 const char *for_string = "\t.byte \"";
7025 const char *for_decimal = "\t.byte ";
7026 const char *to_close = NULL;
7029 for (i = 0; i < n; i++)
7032 if (c >= ' ' && c < 0177)
7035 fputs (for_string, file);
7038 /* Write two quotes to get one. */
7046 for_decimal = "\"\n\t.byte ";
7050 if (count_string >= 512)
7052 fputs (to_close, file);
7054 for_string = "\t.byte \"";
7055 for_decimal = "\t.byte ";
7063 fputs (for_decimal, file);
7064 fprintf (file, "%d", c);
7066 for_string = "\n\t.byte \"";
7073 /* Now close the string if we have written one. Then end the line. */
7075 fputs (to_close, file);
7078 /* Generate a unique section name for FILENAME for a section type
7079 represented by SECTION_DESC. Output goes into BUF.
7081 SECTION_DESC can be any string, as long as it is different for each
7082 possible section type.
7084 We name the section in the same manner as xlc. The name begins with an
7085 underscore followed by the filename (after stripping any leading directory
7086 names) with the last period replaced by the string SECTION_DESC. If
7087 FILENAME does not contain a period, SECTION_DESC is appended to the end of
7091 rs6000_gen_section_name (buf, filename, section_desc)
7093 const char *filename;
7094 const char *section_desc;
7096 const char *q, *after_last_slash, *last_period = 0;
7100 after_last_slash = filename;
7101 for (q = filename; *q; q++)
7104 after_last_slash = q + 1;
7109 len = strlen (after_last_slash) + strlen (section_desc) + 2;
7110 *buf = (char *) permalloc (len);
7115 for (q = after_last_slash; *q; q++)
7117 if (q == last_period)
7119 strcpy (p, section_desc);
7120 p += strlen (section_desc);
7123 else if (ISALNUM (*q))
7127 if (last_period == 0)
7128 strcpy (p, section_desc);
7134 /* Emit profile function. */
7136 output_profile_hook (labelno)
7139 if (DEFAULT_ABI == ABI_AIX)
7147 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
7148 STRIP_NAME_ENCODING (label_name, ggc_strdup (buf));
7149 fun = gen_rtx_SYMBOL_REF (Pmode, label_name);
7151 emit_library_call (init_one_libfunc (RS6000_MCOUNT), 0, VOIDmode, 1,
7156 /* Write function profiler code. */
7159 output_function_profiler (file, labelno)
7163 /* The last used parameter register. */
7168 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
7169 switch (DEFAULT_ABI)
7176 case ABI_AIX_NODESC:
7177 fprintf (file, "\tmflr %s\n", reg_names[0]);
7180 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file);
7181 asm_fprintf (file, "\t{st|stw} %s,4(%s)\n",
7182 reg_names[0], reg_names[1]);
7183 asm_fprintf (file, "\tmflr %s\n", reg_names[12]);
7184 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]);
7185 assemble_name (file, buf);
7186 asm_fprintf (file, "@got(%s)\n", reg_names[12]);
7188 else if (flag_pic > 1)
7190 asm_fprintf (file, "\t{st|stw} %s,4(%s)\n",
7191 reg_names[0], reg_names[1]);
7192 /* Now, we need to get the address of the label. */
7193 fputs ("\tbl 1f\n\t.long ", file);
7194 assemble_name (file, buf);
7195 fputs ("-.\n1:", file);
7196 asm_fprintf (file, "\tmflr %s\n", reg_names[11]);
7197 asm_fprintf (file, "\t{l|lwz} %s,0(%s)\n",
7198 reg_names[0], reg_names[11]);
7199 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
7200 reg_names[0], reg_names[0], reg_names[11]);
7204 asm_fprintf (file, "\t{liu|lis} %s,", reg_names[12]);
7205 assemble_name (file, buf);
7206 fputs ("@ha\n", file);
7207 asm_fprintf (file, "\t{st|stw} %s,4(%s)\n",
7208 reg_names[0], reg_names[1]);
7209 asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]);
7210 assemble_name (file, buf);
7211 asm_fprintf (file, "@l(%s)\n", reg_names[12]);
7214 if (current_function_needs_context)
7215 asm_fprintf (file, "\tmr %s,%s\n",
7216 reg_names[30], reg_names[STATIC_CHAIN_REGNUM]);
7217 fprintf (file, "\tbl %s\n", RS6000_MCOUNT);
7218 if (current_function_needs_context)
7219 asm_fprintf (file, "\tmr %s,%s\n",
7220 reg_names[STATIC_CHAIN_REGNUM], reg_names[30]);
7224 /* Don't do anything, done in output_profile_hook (). */
7230 /* Adjust the cost of a scheduling dependency. Return the new cost of
7231 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
7234 rs6000_adjust_cost (insn, link, dep_insn, cost)
7237 rtx dep_insn ATTRIBUTE_UNUSED;
7240 if (! recog_memoized (insn))
7243 if (REG_NOTE_KIND (link) != 0)
7246 if (REG_NOTE_KIND (link) == 0)
7248 /* Data dependency; DEP_INSN writes a register that INSN reads some
7251 /* Tell the first scheduling pass about the latency between a mtctr
7252 and bctr (and mtlr and br/blr). The first scheduling pass will not
7253 know about this latency since the mtctr instruction, which has the
7254 latency associated to it, will be generated by reload. */
7255 if (get_attr_type (insn) == TYPE_JMPREG)
7256 return TARGET_POWER ? 5 : 4;
7258 /* Fall out to return default cost. */
7264 /* A C statement (sans semicolon) to update the integer scheduling priority
7265 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
7266 increase the priority to execute INSN later. Do not define this macro if
7267 you do not need to adjust the scheduling priorities of insns. */
7270 rs6000_adjust_priority (insn, priority)
7271 rtx insn ATTRIBUTE_UNUSED;
7274 /* On machines (like the 750) which have asymetric integer units, where one
7275 integer unit can do multiply and divides and the other can't, reduce the
7276 priority of multiply/divide so it is scheduled before other integer
7280 if (! INSN_P (insn))
7283 if (GET_CODE (PATTERN (insn)) == USE)
7286 switch (rs6000_cpu_attr) {
7288 switch (get_attr_type (insn))
7295 fprintf (stderr, "priority was %#x (%d) before adjustment\n",
7296 priority, priority);
7297 if (priority >= 0 && priority < 0x01000000)
7307 /* Return how many instructions the machine can issue per cycle */
7308 int get_issue_rate()
7310 switch (rs6000_cpu_attr) {
7311 case CPU_RIOS1: /* ? */
7313 case CPU_PPC601: /* ? */
7330 /* Length in units of the trampoline for entering a nested function. */
7333 rs6000_trampoline_size ()
7337 switch (DEFAULT_ABI)
7343 ret = (TARGET_32BIT) ? 12 : 24;
7348 case ABI_AIX_NODESC:
7349 ret = (TARGET_32BIT) ? 40 : 48;
7356 /* Emit RTL insns to initialize the variable parts of a trampoline.
7357 FNADDR is an RTX for the address of the function's pure code.
7358 CXT is an RTX for the static chain value for the function. */
7361 rs6000_initialize_trampoline (addr, fnaddr, cxt)
7366 enum machine_mode pmode = Pmode;
7367 int regsize = (TARGET_32BIT) ? 4 : 8;
7368 rtx ctx_reg = force_reg (pmode, cxt);
7370 switch (DEFAULT_ABI)
7375 /* Macros to shorten the code expansions below. */
7376 #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
7377 #define MEM_PLUS(addr,offset) \
7378 gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
7380 /* Under AIX, just build the 3 word function descriptor */
7383 rtx fn_reg = gen_reg_rtx (pmode);
7384 rtx toc_reg = gen_reg_rtx (pmode);
7385 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
7386 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4));
7387 emit_move_insn (MEM_DEREF (addr), fn_reg);
7388 emit_move_insn (MEM_PLUS (addr, regsize), toc_reg);
7389 emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg);
7393 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
7396 case ABI_AIX_NODESC:
7397 emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"),
7400 GEN_INT (rs6000_trampoline_size ()), SImode,
7410 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7411 with arguments ARGS is a valid machine specific attribute for DECL.
7412 The attributes in ATTRIBUTES have previously been assigned to DECL. */
7415 rs6000_valid_decl_attribute_p (decl, attributes, identifier, args)
7416 tree decl ATTRIBUTE_UNUSED;
7417 tree attributes ATTRIBUTE_UNUSED;
7418 tree identifier ATTRIBUTE_UNUSED;
7419 tree args ATTRIBUTE_UNUSED;
7424 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7425 with arguments ARGS is a valid machine specific attribute for TYPE.
7426 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
7429 rs6000_valid_type_attribute_p (type, attributes, identifier, args)
7431 tree attributes ATTRIBUTE_UNUSED;
7435 if (TREE_CODE (type) != FUNCTION_TYPE
7436 && TREE_CODE (type) != FIELD_DECL
7437 && TREE_CODE (type) != TYPE_DECL)
7440 /* Longcall attribute says that the function is not within 2**26 bytes
7441 of the current function, and to do an indirect call. */
7442 if (is_attribute_p ("longcall", identifier))
7443 return (args == NULL_TREE);
7448 /* If defined, a C expression whose value is zero if the attributes on
7449 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
7450 two if they are nearly compatible (which causes a warning to be
7454 rs6000_comp_type_attributes (type1, type2)
7455 tree type1 ATTRIBUTE_UNUSED;
7456 tree type2 ATTRIBUTE_UNUSED;
7461 /* If defined, a C statement that assigns default attributes to newly
7465 rs6000_set_default_type_attributes (type)
7466 tree type ATTRIBUTE_UNUSED;
7471 /* Return a reference suitable for calling a function with the
7472 longcall attribute. */
7474 rs6000_longcall_ref (call_ref)
7477 const char *call_name;
7480 if (GET_CODE (call_ref) != SYMBOL_REF)
7483 /* System V adds '.' to the internal name, so skip them. */
7484 call_name = XSTR (call_ref, 0);
7485 if (*call_name == '.')
7487 while (*call_name == '.')
7490 node = get_identifier (call_name);
7491 call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node));
7494 return force_reg (Pmode, call_ref);
7498 /* A C statement or statements to switch to the appropriate section
7499 for output of RTX in mode MODE. You can assume that RTX is some
7500 kind of constant in RTL. The argument MODE is redundant except in
7501 the case of a `const_int' rtx. Select the section by calling
7502 `text_section' or one of the alternatives for other sections.
7504 Do not define this macro if you put all constants in the read-only
7510 rs6000_select_rtx_section (mode, x)
7511 enum machine_mode mode;
7514 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x, mode))
7520 /* A C statement or statements to switch to the appropriate
7521 section for output of DECL. DECL is either a `VAR_DECL' node
7522 or a constant of some sort. RELOC indicates whether forming
7523 the initial value of DECL requires link-time relocations. */
7526 rs6000_select_section (decl, reloc)
7530 int size = int_size_in_bytes (TREE_TYPE (decl));
7533 static void (* const sec_funcs[4]) PARAMS ((void)) = {
7540 needs_sdata = (size > 0
7541 && size <= g_switch_value
7542 && rs6000_sdata != SDATA_NONE
7543 && (rs6000_sdata != SDATA_DATA || TREE_PUBLIC (decl)));
7545 if (TREE_CODE (decl) == STRING_CST)
7546 readonly = ! flag_writable_strings;
7547 else if (TREE_CODE (decl) == VAR_DECL)
7548 readonly = (! (flag_pic && reloc)
7549 && TREE_READONLY (decl)
7550 && ! TREE_SIDE_EFFECTS (decl)
7551 && DECL_INITIAL (decl)
7552 && DECL_INITIAL (decl) != error_mark_node
7553 && TREE_CONSTANT (DECL_INITIAL (decl)));
7556 if (needs_sdata && rs6000_sdata != SDATA_EABI)
7559 (*sec_funcs[(readonly ? 0 : 2) + (needs_sdata ? 1 : 0)])();
7562 /* A C statement to build up a unique section name, expressed as a
7563 STRING_CST node, and assign it to DECL_SECTION_NAME (decl).
7564 RELOC indicates whether the initial value of EXP requires
7565 link-time relocations. If you do not define this macro, GCC will use
7566 the symbol name prefixed by `.' as the section name. Note - this
7567 macro can now be called for unitialised data items as well as
7568 initialised data and functions. */
7571 rs6000_unique_section (decl, reloc)
7575 int size = int_size_in_bytes (TREE_TYPE (decl));
7584 static const char *const prefixes[7][2] =
7586 { ".text.", ".gnu.linkonce.t." },
7587 { ".rodata.", ".gnu.linkonce.r." },
7588 { ".sdata2.", ".gnu.linkonce.s2." },
7589 { ".data.", ".gnu.linkonce.d." },
7590 { ".sdata.", ".gnu.linkonce.s." },
7591 { ".bss.", ".gnu.linkonce.b." },
7592 { ".sbss.", ".gnu.linkonce.sb." }
7595 needs_sdata = (TREE_CODE (decl) != FUNCTION_DECL
7597 && size <= g_switch_value
7598 && rs6000_sdata != SDATA_NONE
7599 && (rs6000_sdata != SDATA_DATA || TREE_PUBLIC (decl)));
7601 if (TREE_CODE (decl) == STRING_CST)
7602 readonly = ! flag_writable_strings;
7603 else if (TREE_CODE (decl) == VAR_DECL)
7604 readonly = (! (flag_pic && reloc)
7605 && TREE_READONLY (decl)
7606 && ! TREE_SIDE_EFFECTS (decl)
7607 && DECL_INITIAL (decl)
7608 && DECL_INITIAL (decl) != error_mark_node
7609 && TREE_CONSTANT (DECL_INITIAL (decl)));
7612 if (needs_sdata && rs6000_sdata != SDATA_EABI)
7615 sec = ((TREE_CODE (decl) == FUNCTION_DECL ? 0 : 1)
7616 + (readonly ? 0 : 2)
7617 + (needs_sdata ? 1 : 0)
7618 + (DECL_INITIAL (decl) == 0
7619 || DECL_INITIAL (decl) == error_mark_node) ? 4 : 0);
7621 STRIP_NAME_ENCODING (name, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)));
7622 prefix = prefixes[sec][DECL_ONE_ONLY (decl)];
7623 len = strlen (name) + strlen (prefix);
7624 string = alloca (len + 1);
7626 sprintf (string, "%s%s", prefix, name);
7628 DECL_SECTION_NAME (decl) = build_string (len, string);
7632 /* If we are referencing a function that is static or is known to be
7633 in this file, make the SYMBOL_REF special. We can use this to indicate
7634 that we can branch to this function without emitting a no-op after the
7635 call. For real AIX calling sequences, we also replace the
7636 function name with the real name (1 or 2 leading .'s), rather than
7637 the function descriptor name. This saves a lot of overriding code
7638 to read the prefixes. */
7641 rs6000_encode_section_info (decl)
7644 if (TREE_CODE (decl) == FUNCTION_DECL)
7646 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
7647 if ((TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl))
7648 && ! DECL_WEAK (decl))
7649 SYMBOL_REF_FLAG (sym_ref) = 1;
7651 if (DEFAULT_ABI == ABI_AIX)
7653 size_t len1 = (DEFAULT_ABI == ABI_AIX) ? 1 : 2;
7654 size_t len2 = strlen (XSTR (sym_ref, 0));
7655 char *str = alloca (len1 + len2 + 1);
7658 memcpy (str + len1, XSTR (sym_ref, 0), len2 + 1);
7660 XSTR (sym_ref, 0) = ggc_alloc_string (str, len1 + len2);
7663 else if (rs6000_sdata != SDATA_NONE
7664 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
7665 && TREE_CODE (decl) == VAR_DECL)
7667 int size = int_size_in_bytes (TREE_TYPE (decl));
7668 tree section_name = DECL_SECTION_NAME (decl);
7669 const char *name = (char *)0;
7674 if (TREE_CODE (section_name) == STRING_CST)
7676 name = TREE_STRING_POINTER (section_name);
7677 len = TREE_STRING_LENGTH (section_name);
7683 if ((size > 0 && size <= g_switch_value)
7685 && ((len == sizeof (".sdata") - 1
7686 && strcmp (name, ".sdata") == 0)
7687 || (len == sizeof (".sdata2") - 1
7688 && strcmp (name, ".sdata2") == 0)
7689 || (len == sizeof (".sbss") - 1
7690 && strcmp (name, ".sbss") == 0)
7691 || (len == sizeof (".sbss2") - 1
7692 && strcmp (name, ".sbss2") == 0)
7693 || (len == sizeof (".PPC.EMB.sdata0") - 1
7694 && strcmp (name, ".PPC.EMB.sdata0") == 0)
7695 || (len == sizeof (".PPC.EMB.sbss0") - 1
7696 && strcmp (name, ".PPC.EMB.sbss0") == 0))))
7698 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
7699 size_t len = strlen (XSTR (sym_ref, 0));
7700 char *str = alloca (len + 2);
7703 memcpy (str + 1, XSTR (sym_ref, 0), len + 1);
7704 XSTR (sym_ref, 0) = ggc_alloc_string (str, len + 1);
7709 #endif /* USING_SVR4_H */
7712 /* Return a REG that occurs in ADDR with coefficient 1.
7713 ADDR can be effectively incremented by incrementing REG.
7715 r0 is special and we must not select it as an address
7716 register by this routine since our caller will try to
7717 increment the returned register via an "la" instruction. */
7720 find_addr_reg (addr)
7723 while (GET_CODE (addr) == PLUS)
7725 if (GET_CODE (XEXP (addr, 0)) == REG
7726 && REGNO (XEXP (addr, 0)) != 0)
7727 addr = XEXP (addr, 0);
7728 else if (GET_CODE (XEXP (addr, 1)) == REG
7729 && REGNO (XEXP (addr, 1)) != 0)
7730 addr = XEXP (addr, 1);
7731 else if (CONSTANT_P (XEXP (addr, 0)))
7732 addr = XEXP (addr, 1);
7733 else if (CONSTANT_P (XEXP (addr, 1)))
7734 addr = XEXP (addr, 0);
7738 if (GET_CODE (addr) == REG && REGNO (addr) != 0)
7744 rs6000_fatal_bad_address (op)
7747 fatal_insn ("bad address", op);
7750 /* Called to register all of our global variables with the garbage
7754 rs6000_add_gc_roots ()
7756 ggc_add_rtx_root (&rs6000_compare_op0, 1);
7757 ggc_add_rtx_root (&rs6000_compare_op1, 1);
7759 toc_hash_table = htab_create (1021, toc_hash_function, toc_hash_eq, NULL);
7760 ggc_add_root (&toc_hash_table, 1, sizeof (toc_hash_table),
7761 toc_hash_mark_table);