1 /* Definitions of target machine for GNU compiler, for the pdp-11
2 Copyright (C) 1994, 95, 96, 98, 99, 2000 Free Software Foundation, Inc.
3 Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* check whether load_fpu_reg or not */
24 #define LOAD_FPU_REG_P(x) ((x)>=8 && (x)<=11)
25 #define NO_LOAD_FPU_REG_P(x) ((x)==12 || (x)==13)
26 #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
27 #define CPU_REG_P(x) ((x)<8)
29 /* Names to predefine in the preprocessor for this target machine. */
31 #define CPP_PREDEFINES "-Dpdp11"
33 /* Print subsidiary information on the compiler version in use. */
34 #define TARGET_VERSION fprintf (stderr, " (pdp11)");
37 /* Generate DBX debugging information. */
39 /* #define DBX_DEBUGGING_INFO */
41 /* Run-time compilation parameters selecting different hardware subsets.
44 extern int target_flags;
46 /* Macro to define tables used to set the flags.
47 This is a list in braces of triplets in braces,
48 each triplet being { "NAME", VALUE, DOC }
49 where VALUE is the bits to set or minus the bits to clear and DOC
50 is the documentation for --help (NULL if intentionally undocumented).
51 An empty string NAME is used to identify the default VALUE. */
53 #define TARGET_SWITCHES \
54 { { "fpu", 1, N_("Use hardware floating point") }, \
55 { "soft-float", -1, N_("Do not use hardware floating point") }, \
56 /* return float result in ac0 */ \
57 { "ac0", 2, N_("Return floating point results in ac0") }, \
58 { "no-ac0", -2, N_("Return floating point results in memory") }, \
60 { "40", 4, N_("Generate code for an 11/40") }, \
61 { "no-40", -4, "" }, \
63 { "45", 8, N_("Generate code for an 11/45") }, \
64 { "no-45", -8, "" }, \
66 { "10", -12, N_("Generate code for an 11/10") }, \
67 /* use movstrhi for bcopy */ \
68 { "bcopy", 16, NULL }, \
69 { "bcopy-builtin", -16, NULL }, \
70 /* use 32 bit for int */ \
71 { "int32", 32, N_("Use 32 bit int") }, \
72 { "no-int16", 32, N_("Use 32 bit int") }, \
73 { "int16", -32, N_("Use 16 bit int") }, \
74 { "no-int32", -32, N_("Use 16 bit int") }, \
75 /* use 32 bit for float */ \
76 { "float32", 64, N_("Use 32 bit float") }, \
77 { "no-float64", 64, N_("Use 32 bit float") }, \
78 { "float64", -64, N_("Use 64 bit float") }, \
79 { "no-float32", -64, N_("Use 64 bit float") }, \
80 /* allow abshi pattern? - can trigger "optimizations" which make code SLOW! */\
81 { "abshi", 128, NULL }, \
82 { "no-abshi", -128, NULL }, \
83 /* is branching expensive - on a PDP, it's actually really cheap */ \
84 /* this is just to play around and check what code gcc generates */ \
85 { "branch-expensive", 256, NULL }, \
86 { "branch-cheap", -256, NULL }, \
87 /* split instruction and data memory? */ \
88 { "split", 1024, N_("Target has split I&D") }, \
89 { "no-split", -1024, N_("Target does not have split I&D") }, \
90 /* UNIX assembler syntax? */ \
91 { "unix-asm", 2048, N_("Use UNIX assembler syntax") }, \
92 { "dec-asm", -2048, N_("Use DEC assembler syntax") }, \
94 { "", TARGET_DEFAULT, NULL} \
97 #define TARGET_DEFAULT (1 | 8 | 128 | TARGET_UNIX_ASM_DEFAULT)
99 #define TARGET_FPU (target_flags & 1)
100 #define TARGET_SOFT_FLOAT (!TARGET_FPU)
102 #define TARGET_AC0 ((target_flags & 2) && TARGET_FPU)
103 #define TARGET_NO_AC0 (! TARGET_AC0)
105 #define TARGET_45 (target_flags & 8)
106 #define TARGET_40_PLUS ((target_flags & 4) || (target_flags & 8))
107 #define TARGET_10 (! TARGET_40_PLUS)
109 #define TARGET_BCOPY_BUILTIN (! (target_flags & 16))
111 #define TARGET_INT16 (! TARGET_INT32)
112 #define TARGET_INT32 (target_flags & 32)
114 #define TARGET_FLOAT32 (target_flags & 64)
115 #define TARGET_FLOAT64 (! TARGET_FLOAT32)
117 #define TARGET_ABSHI_BUILTIN (target_flags & 128)
119 #define TARGET_BRANCH_EXPENSIVE (target_flags & 256)
120 #define TARGET_BRANCH_CHEAP (!TARGET_BRANCH_EXPENSIVE)
122 #define TARGET_SPLIT (target_flags & 1024)
123 #define TARGET_NOSPLIT (! TARGET_SPLIT)
125 #define TARGET_UNIX_ASM (target_flags & 2048)
126 #define TARGET_UNIX_ASM_DEFAULT 0
128 #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
133 #define CHAR_TYPE_SIZE 8
134 #define SHORT_TYPE_SIZE 16
135 #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
136 #define LONG_TYPE_SIZE 32
137 #define LONG_LONG_TYPE_SIZE 64
139 /* if we set FLOAT_TYPE_SIZE to 32, we could have the benefit
140 of saving core for huge arrays - the definitions are
141 already in md - but floats can never reside in
142 an FPU register - we keep the FPU in double float mode
144 #define FLOAT_TYPE_SIZE (TARGET_FLOAT32 ? 32 : 64)
145 #define DOUBLE_TYPE_SIZE 64
146 #define LONG_DOUBLE_TYPE_SIZE 64
148 /* machine types from ansi */
149 #define SIZE_TYPE "unsigned int" /* definition of size_t */
150 #define WCHAR_TYPE "int" /* or long int???? */
151 #define WCHAR_TYPE_SIZE 16
153 #define PTRDIFF_TYPE "int"
155 /* target machine storage layout */
157 /* Define this if most significant bit is lowest numbered
158 in instructions that operate on numbered bit-fields. */
159 #define BITS_BIG_ENDIAN 0
161 /* Define this if most significant byte of a word is the lowest numbered. */
162 #define BYTES_BIG_ENDIAN 0
164 /* Define this if most significant word of a multiword number is numbered. */
165 #define WORDS_BIG_ENDIAN 1
167 /* number of bits in an addressable storage unit */
168 #define BITS_PER_UNIT 8
170 /* Width in bits of a "word", which is the contents of a machine register.
171 Note that this is not necessarily the width of data type `int';
172 if using 16-bit ints on a 68000, this would still be 32.
173 But on a machine with 16-bit registers, this would be 16. */
174 /* This is a machine with 16-bit registers */
175 #define BITS_PER_WORD 16
177 /* Width of a word, in units (bytes).
179 UNITS OR BYTES - seems like units */
180 #define UNITS_PER_WORD 2
182 /* Maximum sized of reasonable data type
183 DImode or Dfmode ...*/
184 #define MAX_FIXED_MODE_SIZE 64
186 /* Width in bits of a pointer.
187 See also the macro `Pmode' defined below. */
188 #define POINTER_SIZE 16
190 /* Allocation boundary (in *bits*) for storing pointers in memory. */
191 #define POINTER_BOUNDARY 16
193 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
194 #define PARM_BOUNDARY 16
196 /* Boundary (in *bits*) on which stack pointer should be aligned. */
197 #define STACK_BOUNDARY 16
199 /* Allocation boundary (in *bits*) for the code of a function. */
200 #define FUNCTION_BOUNDARY 16
202 /* Alignment of field after `int : 0' in a structure. */
203 #define EMPTY_FIELD_BOUNDARY 16
205 /* No data type wants to be aligned rounder than this. */
206 #define BIGGEST_ALIGNMENT 16
208 /* Define this if move instructions will actually fail to work
209 when given unaligned data. */
210 #define STRICT_ALIGNMENT 1
212 /* Standard register usage. */
214 /* Number of actual hardware registers.
215 The hardware registers are assigned numbers for the compiler
216 from 0 to just below FIRST_PSEUDO_REGISTER.
217 All registers that the compiler knows about must be given numbers,
218 even those that are not normally considered general registers.
220 we have 8 integer registers, plus 6 float
221 (don't use scratch float !) */
223 #define FIRST_PSEUDO_REGISTER 14
225 /* 1 for registers that have pervasive standard uses
226 and are not available for the register allocator.
228 On the pdp, these are:
231 reg 5 = fp; not necessarily!
234 /* don't let them touch fp regs for the time being !*/
236 #define FIXED_REGISTERS \
237 {0, 0, 0, 0, 0, 0, 1, 1, \
242 /* 1 for registers not available across function calls.
243 These must include the FIXED_REGISTERS and also any
244 registers that can be used without being saved.
245 The latter must include the registers where values are returned
246 and the register where structure-value addresses are passed.
247 Aside from that, you can include as many other registers as you like. */
249 /* don't know about fp */
250 #define CALL_USED_REGISTERS \
251 {1, 1, 0, 0, 0, 0, 1, 1, \
255 /* Make sure everything's fine if we *don't* have an FPU.
256 This assumes that putting a register in fixed_regs will keep the
257 compiler's mitts completely off it. We don't bother to zero it out
258 of register classes. Also fix incompatible register naming with
261 #define CONDITIONAL_REGISTER_USAGE \
267 COPY_HARD_REG_SET (x, reg_class_contents[(int)FPU_REGS]); \
268 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
269 if (TEST_HARD_REG_BIT (x, i)) \
270 fixed_regs[i] = call_used_regs[i] = 1; \
274 call_used_regs[8] = 1; \
275 if (TARGET_UNIX_ASM) \
277 /* Change names of FPU registers for the UNIX assembler. */ \
278 reg_names[8] = "fr0"; \
279 reg_names[9] = "fr1"; \
280 reg_names[10] = "fr2"; \
281 reg_names[11] = "fr3"; \
282 reg_names[12] = "fr4"; \
283 reg_names[13] = "fr5"; \
287 /* Return number of consecutive hard regs needed starting at reg REGNO
288 to hold something of mode MODE.
289 This is ordinarily the length in words of a value of mode MODE
290 but can be less for certain modes in special long registers.
293 #define HARD_REGNO_NREGS(REGNO, MODE) \
295 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) \
299 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
300 On the pdp, the cpu registers can hold any mode - check alignment
302 FPU can only hold DF - simplifies life!
304 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
306 ((GET_MODE_BITSIZE(MODE) <= 16) \
307 || (GET_MODE_BITSIZE(MODE) == 32 && !((REGNO) & 1))) \
311 /* Value is 1 if it is a good idea to tie two pseudo registers
312 when one has mode MODE1 and one has mode MODE2.
313 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
314 for any hard reg, then this must be 0 for correct output. */
315 #define MODES_TIEABLE_P(MODE1, MODE2) 0
317 /* Specify the registers used for certain standard purposes.
318 The values of these macros are register numbers. */
320 /* the pdp11 pc overloaded on a register that the compiler knows about. */
323 /* Register to use for pushing function arguments. */
324 #define STACK_POINTER_REGNUM 6
326 /* Base register for access to local variables of the function. */
327 #define FRAME_POINTER_REGNUM 5
329 /* Value should be nonzero if functions must have frame pointers.
330 Zero means the frame pointer need not be set up (and parms
331 may be accessed via the stack pointer) in functions that seem suitable.
332 This is computed in `reload', in reload1.c.
335 #define FRAME_POINTER_REQUIRED 0
337 /* Base register for access to arguments of the function. */
338 #define ARG_POINTER_REGNUM 5
340 /* Register in which static-chain is passed to a function. */
341 /* ??? - i don't want to give up a reg for this! */
342 #define STATIC_CHAIN_REGNUM 4
344 /* Register in which address to store a structure value
345 is passed to a function.
346 let's make it an invisible first argument!!! */
348 #define STRUCT_VALUE 0
351 /* Define the classes of registers for register constraints in the
352 machine description. Also define ranges of constants.
354 One of the classes must always be named ALL_REGS and include all hard regs.
355 If there is more than one class, another class must be named NO_REGS
356 and contain no registers.
358 The name GENERAL_REGS must be the name of a class (or an alias for
359 another name such as ALL_REGS). This is the class of registers
360 that is allowed by "g" or "r" in a register constraint.
361 Also, registers outside this class are allocated only when
362 instructions express preferences for them.
364 The classes must be numbered in nondecreasing order; that is,
365 a larger-numbered class must never be contained completely
366 in a smaller-numbered class.
368 For any two classes, it is very desirable that there be another
369 class that represents their union. */
371 /* The pdp has a couple of classes:
373 MUL_REGS are used for odd numbered regs, to use in 16 bit multiplication
374 (even numbered do 32 bit multiply)
375 LMUL_REGS long multiply registers (even numbered regs )
376 (don't need them, all 32 bit regs are even numbered!)
377 GENERAL_REGS is all cpu
378 LOAD_FPU_REGS is the first four cpu regs, they are easier to load
379 NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
380 FPU_REGS is all fpu regs
383 enum reg_class { NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES };
385 #define N_REG_CLASSES (int) LIM_REG_CLASSES
387 /* have to allow this till cmpsi/tstsi are fixed in a better way !! */
388 #define SMALL_REGISTER_CLASSES 1
390 /* Since GENERAL_REGS is the same class as ALL_REGS,
391 don't give it a different class number; just make it an alias. */
393 /* #define GENERAL_REGS ALL_REGS */
395 /* Give names of register classes as strings for dump file. */
397 #define REG_CLASS_NAMES {"NO_REGS", "MUL_REGS", "GENERAL_REGS", "LOAD_FPU_REGS", "NO_LOAD_FPU_REGS", "FPU_REGS", "ALL_REGS" }
399 /* Define which registers fit in which classes.
400 This is an initializer for a vector of HARD_REG_SET
401 of length N_REG_CLASSES. */
403 #define REG_CLASS_CONTENTS {{0}, {0x00aa}, {0x00ff}, {0x0f00}, {0x3000}, {0x3f00}, {0x3fff}}
405 /* The same information, inverted:
406 Return the class number of the smallest class containing
407 reg number REGNO. This could be a conditional expression
408 or could index an array. */
410 #define REGNO_REG_CLASS(REGNO) \
411 ((REGNO)>=8?((REGNO)<=11?LOAD_FPU_REGS:NO_LOAD_FPU_REGS):(((REGNO)&1)?MUL_REGS:GENERAL_REGS))
414 /* The class value for index registers, and the one for base regs. */
415 #define INDEX_REG_CLASS GENERAL_REGS
416 #define BASE_REG_CLASS GENERAL_REGS
418 /* Get reg_class from a letter such as appears in the machine description. */
420 #define REG_CLASS_FROM_LETTER(C) \
421 ((C) == 'f' ? FPU_REGS : \
422 ((C) == 'd' ? MUL_REGS : \
423 ((C) == 'a' ? LOAD_FPU_REGS : NO_REGS)))
426 /* The letters I, J, K, L and M in a register constraint string
427 can be used to stand for particular ranges of immediate operands.
428 This macro defines what the ranges are.
429 C is the letter, and VALUE is a constant value.
430 Return 1 if VALUE is in the range specified by C.
434 K completely random 32 bit
435 L,M,N -1,1,0 respectively
436 O where doing shifts in sequence is faster than
440 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
441 ((C) == 'I' ? ((VALUE) & 0xffff0000) == 0 \
442 : (C) == 'J' ? ((VALUE) & 0x0000ffff) == 0 \
443 : (C) == 'K' ? (((VALUE) & 0xffff0000) != 0 \
444 && ((VALUE) & 0x0000ffff) != 0) \
445 : (C) == 'L' ? ((VALUE) == 1) \
446 : (C) == 'M' ? ((VALUE) == -1) \
447 : (C) == 'N' ? ((VALUE) == 0) \
448 : (C) == 'O' ? (abs(VALUE) >1 && abs(VALUE) <= 4) \
451 /* Similar, but for floating constants, and defining letters G and H.
452 Here VALUE is the CONST_DOUBLE rtx itself. */
454 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
455 ((C) == 'G' && XINT (VALUE, 0) == 0 && XINT (VALUE, 1) == 0)
458 /* Letters in the range `Q' through `U' may be defined in a
459 machine-dependent fashion to stand for arbitrary operand types.
460 The machine description macro `EXTRA_CONSTRAINT' is passed the
461 operand as its first argument and the constraint letter as its
464 `Q' is for memory references using take more than 1 instruction.
465 `R' is for memory references which take 1 word for the instruction. */
467 #define EXTRA_CONSTRAINT(OP,CODE) \
468 ((GET_CODE (OP) != MEM) ? 0 \
469 : !legitimate_address_p (GET_MODE (OP), XEXP (OP, 0)) ? 0 \
470 : ((CODE) == 'Q') ? !simple_memory_operand (OP, GET_MODE (OP)) \
471 : ((CODE) == 'R') ? simple_memory_operand (OP, GET_MODE (OP)) \
474 /* Given an rtx X being reloaded into a reg required to be
475 in class CLASS, return the class of reg to actually use.
476 In general this is just CLASS; but on some machines
477 in some cases it is preferable to use a more restrictive class.
479 loading is easier into LOAD_FPU_REGS than FPU_REGS! */
481 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
482 (((CLASS) != FPU_REGS)?(CLASS):LOAD_FPU_REGS)
484 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,x) \
485 (((CLASS) == NO_LOAD_FPU_REGS && !(REG_P(x) && LOAD_FPU_REG_P(REGNO(x))))?LOAD_FPU_REGS:NO_REGS)
487 /* Return the maximum number of consecutive registers
488 needed to represent mode MODE in a register of class CLASS. */
489 #define CLASS_MAX_NREGS(CLASS, MODE) \
490 ((CLASS == GENERAL_REGS || CLASS == MUL_REGS)? \
491 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
496 /* Stack layout; function entry, exit and calling. */
498 /* Define this if pushing a word on the stack
499 makes the stack pointer a smaller address. */
500 #define STACK_GROWS_DOWNWARD
502 /* Define this if the nominal address of the stack frame
503 is at the high-address end of the local variables;
504 that is, each additional local variable allocated
505 goes at a more negative offset in the frame.
507 #define FRAME_GROWS_DOWNWARD
509 /* Offset within stack frame to start allocating local variables at.
510 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
511 first local allocated. Otherwise, it is the offset to the BEGINNING
512 of the first local allocated. */
513 #define STARTING_FRAME_OFFSET 0
515 /* If we generate an insn to push BYTES bytes,
516 this says how many the stack pointer really advances by.
517 On the pdp11, the stack is on an even boundary */
518 #define PUSH_ROUNDING(BYTES) ((BYTES + 1) & ~1)
520 /* current_first_parm_offset stores the # of registers pushed on the
522 extern int current_first_parm_offset;
524 /* Offset of first parameter from the argument pointer register value.
525 For the pdp11, this is non-zero to account for the return address.
527 2 - frame pointer (always saved, even when not used!!!!)
528 -- chnage some day !!!:q!
531 #define FIRST_PARM_OFFSET(FNDECL) 4
533 /* Value is 1 if returning from a function call automatically
534 pops the arguments described by the number-of-args field in the call.
535 FUNDECL is the declaration node of the function (as a tree),
536 FUNTYPE is the data type of the function (as a tree),
537 or for a library call it is an identifier node for the subroutine name. */
539 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
541 /* Define how to find the value returned by a function.
542 VALTYPE is the data type of the value (as a tree).
543 If the precise function being called is known, FUNC is its FUNCTION_DECL;
544 otherwise, FUNC is 0. */
545 #define BASE_RETURN_VALUE_REG(MODE) \
546 ((MODE) == DFmode ? 8 : 0)
548 /* On the pdp11 the value is found in R0 (or ac0???
549 not without FPU!!!! ) */
551 #define FUNCTION_VALUE(VALTYPE, FUNC) \
552 gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
554 /* and the called function leaves it in the first register.
555 Difference only on machines with register windows. */
557 #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
558 gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE)))
560 /* Define how to find the value returned by a library function
561 assuming the value has mode MODE. */
563 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG(MODE))
565 /* 1 if N is a possible register number for a function value
566 as seen by the caller.
567 On the pdp, the first "output" reg is the only register thus used.
569 maybe ac0 ? - as option someday! */
571 #define FUNCTION_VALUE_REGNO_P(N) (((N) == 0) || (TARGET_AC0 && (N) == 8))
573 /* should probably return DImode and DFmode in memory,lest
576 have to, else we crash - exception: maybe return result in
577 ac0 if DFmode and FPU present - compatibility problem with
578 libraries for non-floating point ...
581 #define RETURN_IN_MEMORY(TYPE) \
582 (TYPE_MODE(TYPE) == DImode || (TYPE_MODE(TYPE) == DFmode && ! TARGET_AC0))
585 /* 1 if N is a possible register number for function argument passing.
588 #define FUNCTION_ARG_REGNO_P(N) 0
590 /* Define a data type for recording info about an argument list
591 during the scan of that argument list. This data type should
592 hold all necessary information about the function itself
593 and about the args processed so far, enough to enable macros
594 such as FUNCTION_ARG to determine where the next arg should go.
598 #define CUMULATIVE_ARGS int
600 /* Initialize a variable CUM of type CUMULATIVE_ARGS
601 for a call to a function whose data type is FNTYPE.
602 For a library call, FNTYPE is 0.
604 ...., the offset normally starts at 0, but starts at 1 word
605 when the function gets a structure-value-address as an
606 invisible first argument. */
608 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
611 /* Update the data in CUM to advance over an argument
612 of mode MODE and data type TYPE.
613 (TYPE is null for libcalls where that information may not be available.)
618 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
619 ((CUM) += ((MODE) != BLKmode \
620 ? (GET_MODE_SIZE (MODE)) \
621 : (int_size_in_bytes (TYPE))))
623 /* Determine where to put an argument to a function.
624 Value is zero to push the argument on the stack,
625 or a hard register in which to store the argument.
627 MODE is the argument's machine mode.
628 TYPE is the data type of the argument (as a tree).
629 This is null for libcalls where that information may
631 CUM is a variable of type CUMULATIVE_ARGS which gives info about
632 the preceding args and about the function being called.
633 NAMED is nonzero if this argument is a named parameter
634 (otherwise it is an extra parameter matching an ellipsis). */
636 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
638 /* Define where a function finds its arguments.
639 This would be different from FUNCTION_ARG if we had register windows. */
641 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
642 FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
645 /* For an arg passed partly in registers and partly in memory,
646 this is the number of registers used.
647 For args passed entirely in registers or entirely in memory, zero. */
649 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
651 /* This macro generates the assembly code for function entry. */
652 #define FUNCTION_PROLOGUE(FILE, SIZE) \
653 output_function_prologue(FILE, SIZE);
655 /* Output assembler code to FILE to increment profiler label # LABELNO
656 for profiling a function entry. */
658 #define FUNCTION_PROFILER(FILE, LABELNO) \
661 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
662 the stack pointer does not matter. The value is tested only in
663 functions that have frame pointers.
664 No definition is equivalent to always zero. */
666 extern int may_call_alloca;
668 #define EXIT_IGNORE_STACK 1
670 /* This macro generates the assembly code for function exit,
671 on machines that need it. If FUNCTION_EPILOGUE is not defined
672 then individual return instructions are generated for each
673 return statement. Args are same as for FUNCTION_PROLOGUE.
676 #define FUNCTION_EPILOGUE(FILE, SIZE) \
677 output_function_epilogue(FILE, SIZE);
679 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH_VAR) \
682 offset = get_frame_size(); \
683 for (regno = 0; regno < 8; regno++) \
684 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
686 for (regno = 8; regno < 14; regno++) \
687 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
689 /* offset -= 2; no fp on stack frame */ \
690 (DEPTH_VAR) = offset; \
694 /* Addressing modes, and classification of registers for them. */
696 #define HAVE_POST_INCREMENT 1
697 /* #define HAVE_POST_DECREMENT 0 */
699 #define HAVE_PRE_DECREMENT 1
700 /* #define HAVE_PRE_INCREMENT 0 */
702 /* Macros to check register numbers against specific register classes. */
704 /* These assume that REGNO is a hard or pseudo reg number.
705 They give nonzero only if REGNO is a hard reg of the suitable class
706 or a pseudo reg currently allocated to a suitable hard reg.
707 Since they use reg_renumber, they are safe only once reg_renumber
708 has been allocated, which happens in local-alloc.c. */
710 #define REGNO_OK_FOR_INDEX_P(REGNO) \
711 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
712 #define REGNO_OK_FOR_BASE_P(REGNO) \
713 ((REGNO) < 8 || (unsigned) reg_renumber[REGNO] < 8)
715 /* Now macros that check whether X is a register and also,
716 strictly, whether it is in a specified class.
721 /* Maximum number of registers that can appear in a valid memory address. */
723 #define MAX_REGS_PER_ADDRESS 2
725 /* Recognize any constant value that is a valid address. */
727 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
729 /* Nonzero if the constant value X is a legitimate general operand.
730 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
732 #define LEGITIMATE_CONSTANT_P(X) (1)
734 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
735 and check its validity for a certain class.
736 We have two alternate definitions for each of them.
737 The usual definition accepts all pseudo regs; the other rejects
738 them unless they have been allocated suitable hard regs.
739 The symbol REG_OK_STRICT causes the latter definition to be used.
741 Most source files want to accept pseudo regs in the hope that
742 they will get allocated to the class that the insn wants them to be in.
743 Source files for reload pass need to be strict.
744 After reload, it makes no difference, since pseudo regs have
745 been eliminated by then. */
747 #ifndef REG_OK_STRICT
749 /* Nonzero if X is a hard reg that can be used as an index
750 or if it is a pseudo reg. */
751 #define REG_OK_FOR_INDEX_P(X) (1)
752 /* Nonzero if X is a hard reg that can be used as a base reg
753 or if it is a pseudo reg. */
754 #define REG_OK_FOR_BASE_P(X) (1)
758 /* Nonzero if X is a hard reg that can be used as an index. */
759 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
760 /* Nonzero if X is a hard reg that can be used as a base reg. */
761 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
765 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
766 that is a valid memory address for an instruction.
767 The MODE argument is the machine mode for the MEM expression
768 that wants to use this address.
772 #define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
777 if (GET_CODE (operand) == REG \
778 && REG_OK_FOR_BASE_P(operand)) \
781 /* accept @#address */ \
782 if (CONSTANT_ADDRESS_P (operand)) \
786 if (GET_CODE (operand) == PLUS \
787 && GET_CODE (XEXP (operand, 0)) == REG \
788 && REG_OK_FOR_BASE_P (XEXP (operand, 0)) \
789 && CONSTANT_ADDRESS_P (XEXP (operand, 1))) \
793 if (GET_CODE (operand) == PRE_DEC \
794 && GET_CODE (XEXP (operand, 0)) == REG \
795 && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
799 if (GET_CODE (operand) == POST_INC \
800 && GET_CODE (XEXP (operand, 0)) == REG \
801 && REG_OK_FOR_BASE_P (XEXP (operand, 0))) \
804 /* handle another level of indirection ! */ \
805 if (GET_CODE(operand) != MEM) \
808 xfoob = XEXP (operand, 0); \
810 /* (MEM:xx (MEM:xx ())) is not valid for SI, DI and currently */ \
811 /* also forbidden for float, because we have to handle this */ \
812 /* in output_move_double and/or output_move_quad() - we could */ \
813 /* do it, but currently it's not worth it!!! */ \
814 /* now that DFmode cannot go into CPU register file, */ \
815 /* maybe I should allow float ... */ \
816 /* but then I have to handle memory-to-memory moves in movdf ?? */ \
818 if (GET_MODE_BITSIZE(mode) > 16) \
821 /* accept @(R0) - which is @0(R0) */ \
822 if (GET_CODE (xfoob) == REG \
823 && REG_OK_FOR_BASE_P(xfoob)) \
826 /* accept @address */ \
827 if (CONSTANT_ADDRESS_P (xfoob)) \
830 /* accept @X(R0) */ \
831 if (GET_CODE (xfoob) == PLUS \
832 && GET_CODE (XEXP (xfoob, 0)) == REG \
833 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0)) \
834 && CONSTANT_ADDRESS_P (XEXP (xfoob, 1))) \
837 /* accept @-(R0) */ \
838 if (GET_CODE (xfoob) == PRE_DEC \
839 && GET_CODE (XEXP (xfoob, 0)) == REG \
840 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
843 /* accept @(R0)+ */ \
844 if (GET_CODE (xfoob) == POST_INC \
845 && GET_CODE (XEXP (xfoob, 0)) == REG \
846 && REG_OK_FOR_BASE_P (XEXP (xfoob, 0))) \
849 /* anything else is invalid */ \
854 /* Try machine-dependent ways of modifying an illegitimate address
855 to be legitimate. If we find one, return the new, valid address.
856 This macro is used in only one place: `memory_address' in explow.c.
858 OLDX is the address as it was before break_out_memory_refs was called.
859 In some cases it is useful to look at this to decide what needs to be done.
861 MODE and WIN are passed so that this macro can use
862 GO_IF_LEGITIMATE_ADDRESS.
864 It is always safe for this macro to do nothing. It exists to recognize
865 opportunities to optimize the output. */
867 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
870 /* Go to LABEL if ADDR (a legitimate address expression)
871 has an effect that depends on the machine mode it is used for.
872 On the pdp this is for predec/postinc */
874 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
875 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
880 /* Specify the machine mode that this machine uses
881 for the index in the tablejump instruction. */
882 #define CASE_VECTOR_MODE HImode
884 /* Define this if a raw index is all that is needed for a
886 #define CASE_TAKES_INDEX_RAW
888 /* Define as C expression which evaluates to nonzero if the tablejump
889 instruction expects the table to contain offsets from the address of the
891 Do not define this if the table should contain absolute addresses. */
892 /* #define CASE_VECTOR_PC_RELATIVE 1 */
894 /* Specify the tree operation to be used to convert reals to integers. */
895 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
897 /* This is the kind of divide that is easiest to do in the general case. */
898 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
900 /* Define this as 1 if `char' should by default be signed; else as 0. */
901 #define DEFAULT_SIGNED_CHAR 1
903 /* Max number of bytes we can move from memory to memory
904 in one reasonably fast instruction.
909 /* Zero extension is faster if the target is known to be zero */
910 /* #define SLOW_ZERO_EXTEND */
912 /* Nonzero if access to memory by byte is slow and undesirable. -
914 #define SLOW_BYTE_ACCESS 0
916 /* Do not break .stabs pseudos into continuations. */
917 #define DBX_CONTIN_LENGTH 0
919 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
920 is done just by pretending it is already truncated. */
921 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
924 /* Add any extra modes needed to represent the condition code.
926 CCFPmode is used for FPU, but should we use a separate reg? */
927 #define EXTRA_CC_MODES CC(CCFPmode, "CCFP")
929 /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
930 return the mode to be used for the comparison. For floating-point, CCFPmode
933 #define SELECT_CC_MODE(OP,X,Y) \
934 (GET_MODE_CLASS(GET_MODE(X)) == MODE_FLOAT? CCFPmode : CCmode)
936 /* We assume that the store-condition-codes instructions store 0 for false
937 and some other value for true. This is the value stored for true. */
939 /* #define STORE_FLAG_VALUE 1 */
941 /* Specify the machine mode that pointers have.
942 After generation of rtl, the compiler makes no further distinction
943 between pointers and any other objects of this machine mode. */
946 /* A function address in a call instruction
947 is a word address (for indexing purposes)
948 so give the MEM rtx a word's mode. */
949 #define FUNCTION_MODE HImode
951 /* Define this if addresses of constant functions
952 shouldn't be put through pseudo regs where they can be cse'd.
953 Desirable on machines where ordinary constants are expensive
954 but a CALL with constant address is cheap. */
955 /* #define NO_FUNCTION_CSE */
957 /* Compute the cost of computing a constant rtl expression RTX
958 whose rtx-code is CODE. The body of this macro is a portion
959 of a switch statement. If the code is computed here,
960 return it with a return statement. Otherwise, break from the switch.
962 -1, 0, 1 are cheaper for add, sub ...
965 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
967 if (INTVAL(RTX) == 0 \
968 || INTVAL(RTX) == -1 \
969 || INTVAL(RTX) == 1) \
974 /* twice as expensive as REG */ \
977 /* twice (or 4 times) as expensive as 16 bit */ \
980 /* cost of moving one register class to another */
981 #define REGISTER_MOVE_COST(CLASS1, CLASS2) register_move_cost(CLASS1, CLASS2)
983 /* Tell emit-rtl.c how to initialize special values on a per-function base. */
985 extern struct rtx_def *cc0_reg_rtx;
987 #define CC_STATUS_MDEP rtx
989 #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0)
991 /* Tell final.c how to eliminate redundant test instructions. */
993 /* Here we define machine-dependent flags and fields in cc_status
994 (see `conditions.h'). */
996 #define CC_IN_FPU 04000
998 /* Do UPDATE_CC if EXP is a set, used in
1001 floats only do compare correctly, else nullify ...
1003 get cc0 out soon ...
1006 /* Store in cc_status the expressions
1007 that the condition codes will describe
1008 after execution of an instruction whose pattern is EXP.
1009 Do not alter them if the instruction would not alter the cc's. */
1011 #define NOTICE_UPDATE_CC(EXP, INSN) \
1012 { if (GET_CODE (EXP) == SET) \
1014 notice_update_cc_on_set(EXP, INSN); \
1016 else if (GET_CODE (EXP) == PARALLEL \
1017 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1019 notice_update_cc_on_set(XVECEXP (EXP, 0, 0), INSN); \
1021 else if (GET_CODE (EXP) == CALL) \
1022 { /* all bets are off */ CC_STATUS_INIT; } \
1023 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1024 && cc_status.value2 \
1025 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1027 printf ("here!\n"); \
1028 cc_status.value2 = 0; \
1032 /* Control the assembler format that we output. */
1034 /* Output at beginning of assembler file. */
1037 #define ASM_FILE_START(FILE) \
1039 fprintf (FILE, "\t.data\n"), \
1040 fprintf (FILE, "$help$: . = .+8 ; space for tmp moves!\n") \
1041 /* do we need reg def's R0 = %0 etc ??? */ \
1044 #define ASM_FILE_START(FILE)
1048 /* Output to assembler file text saying following lines
1049 may contain character constants, extra white space, comments, etc. */
1051 #define ASM_APP_ON ""
1053 /* Output to assembler file text saying following lines
1054 no longer contain unusual constructs. */
1056 #define ASM_APP_OFF ""
1058 /* Output before read-only data. */
1060 #define TEXT_SECTION_ASM_OP "\t.text\n"
1062 /* Output before writable data. */
1064 #define DATA_SECTION_ASM_OP "\t.data\n"
1066 /* How to refer to registers in assembler output.
1067 This sequence is indexed by compiler's hard-register-number (see above). */
1069 #define REGISTER_NAMES \
1070 {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
1071 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5" }
1073 /* How to renumber registers for dbx and gdb. */
1075 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1077 /* This is how to output the definition of a user-level label named NAME,
1078 such as the label on a static function or variable NAME. */
1080 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1081 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1083 /* This is how to output a command to make the user-level label named NAME
1084 defined for reference from other files. */
1086 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1087 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs("\n", FILE); } while (0)
1089 /* The prefix to add to user-visible assembler symbols. */
1091 #define USER_LABEL_PREFIX "_"
1093 /* This is how to output an internal numbered label where
1094 PREFIX is the class of label and NUM is the number within the class. */
1096 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1097 fprintf (FILE, "%s_%d:\n", PREFIX, NUM)
1099 /* This is how to store into the string LABEL
1100 the symbol_ref name of an internal numbered label where
1101 PREFIX is the class of label and NUM is the number within the class.
1102 This is suitable for output with `assemble_name'. */
1104 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1105 sprintf (LABEL, "*%s_%d", PREFIX, NUM)
1107 /* This is how to output an assembler line defining a `double' constant. */
1109 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1110 fprintf (FILE, "\tdouble %.20e\n", (VALUE))
1112 /* This is how to output an assembler line defining a `float' constant. */
1114 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1115 fprintf (FILE, "\tfloat %.12e\n", (VALUE))
1117 /* Likewise for `short' and `char' constants. */
1119 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1120 ( fprintf (FILE, TARGET_UNIX_ASM ? "\t" : "\t.word "), \
1121 output_addr_const_pdp11 (FILE, (VALUE)), \
1122 fprintf (FILE, " /*short*/\n"))
1124 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1125 ( fprintf (FILE, "\t.byte "), \
1126 output_addr_const_pdp11 (FILE, (VALUE)), \
1127 fprintf (FILE, " /* char */\n"))
1129 /* This is how to output an assembler line for a numeric constant byte.
1130 This won't actually be used since we define ASM_OUTPUT_CHAR.
1133 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1134 fprintf (FILE, "\t.byte %o\n", (VALUE))
1136 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1137 output_ascii (FILE, P, SIZE)
1139 /* This is how to output an element of a case-vector that is absolute. */
1141 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1142 fprintf (FILE, "\t%sL_%d\n", TARGET_UNIX_ASM ? "" : ".word ", VALUE)
1144 /* This is how to output an element of a case-vector that is relative.
1145 Don't define this if it is not supported. */
1147 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
1149 /* This is how to output an assembler line
1150 that says to advance the location counter
1151 to a multiple of 2**LOG bytes.
1156 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1162 fprintf (FILE, "\t.even\n"); \
1168 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1169 fprintf (FILE, "\t.=.+ %o\n", (SIZE))
1171 /* This says how to output an assembler line
1172 to define a global common symbol. */
1174 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1175 ( fprintf ((FILE), ".globl "), \
1176 assemble_name ((FILE), (NAME)), \
1177 fprintf ((FILE), "\n"), \
1178 assemble_name ((FILE), (NAME)), \
1179 fprintf ((FILE), ": .=.+ %o\n", (ROUNDED)) \
1182 /* This says how to output an assembler line
1183 to define a local common symbol. */
1185 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1186 ( assemble_name ((FILE), (NAME)), \
1187 fprintf ((FILE), ":\t.=.+ %o\n", (ROUNDED)))
1189 /* Store in OUTPUT a string (made with alloca) containing
1190 an assembler-name for a local static variable named NAME.
1191 LABELNO is an integer which is different for each call. */
1193 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1194 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1195 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1197 /* Define the parentheses used to group arithmetic operations
1198 in assembler code. */
1200 #define ASM_OPEN_PAREN "["
1201 #define ASM_CLOSE_PAREN "]"
1203 /* Define results of standard character escape sequences. */
1204 #define TARGET_BELL 007
1205 #define TARGET_BS 010
1206 #define TARGET_TAB 011
1207 #define TARGET_NEWLINE 012
1208 #define TARGET_VT 013
1209 #define TARGET_FF 014
1210 #define TARGET_CR 015
1212 /* Print operand X (an rtx) in assembler syntax to file FILE.
1213 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1214 For `%' followed by punctuation, CODE is the punctuation and X is null.
1219 #define PRINT_OPERAND(FILE, X, CODE) \
1220 { if (CODE == '#') fprintf (FILE, "#"); \
1221 else if (GET_CODE (X) == REG) \
1222 fprintf (FILE, "%s", reg_names[REGNO (X)]); \
1223 else if (GET_CODE (X) == MEM) \
1224 output_address (XEXP (X, 0)); \
1225 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != SImode) \
1226 { union { double d; int i[2]; } u; \
1227 u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
1228 fprintf (FILE, "#%.20e", u.d); } \
1229 else { putc ('$', FILE); output_addr_const_pdp11 (FILE, X); }}
1231 /* Print a memory address as an operand to reference that memory location. */
1233 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1234 print_operand_address (FILE, ADDR)
1236 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1238 fprintf (FILE, "\tmov %s, -(sp)\n", reg_names[REGNO]) \
1241 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1243 fprintf (FILE, "\tmov (sp)+, %s\n", reg_names[REGNO]) \
1247 #define ASM_IDENTIFY_GCC(FILE) \
1248 fprintf(FILE, "gcc_compiled:\n")
1250 /* trampoline - how should i do it in separate i+d ?
1251 have some allocate_trampoline magic???
1253 the following should work for shared I/D: */
1255 /* lets see whether this works as trampoline:
1256 MV #STATIC, $4 0x940Y 0x0000 <- STATIC; Y = STATIC_CHAIN_REGNUM
1257 JMP FUNCTION 0x0058 0x0000 <- FUNCTION
1260 #define TRAMPOLINE_TEMPLATE(FILE) \
1265 ASM_OUTPUT_SHORT (FILE, GEN_INT (0x9400+STATIC_CHAIN_REGNUM)); \
1266 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1267 ASM_OUTPUT_SHORT (FILE, GEN_INT(0x0058)); \
1268 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1271 #define TRAMPOLINE_SIZE 8
1272 #define TRAMPOLINE_ALIGN 16
1274 /* Emit RTL insns to initialize the variable parts of a trampoline.
1275 FNADDR is an RTX for the address of the function's pure code.
1276 CXT is an RTX for the static chain value for the function. */
1278 #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \
1283 emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 2)), CXT); \
1284 emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), FNADDR); \
1288 /* Some machines may desire to change what optimizations are
1289 performed for various optimization levels. This macro, if
1290 defined, is executed once just after the optimization level is
1291 determined and before the remainder of the command options have
1292 been parsed. Values set in this macro are used as the default
1293 values for the other command line options.
1295 LEVEL is the optimization level specified; 2 if -O2 is
1296 specified, 1 if -O is specified, and 0 if neither is specified. */
1298 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
1303 flag_inline_functions = 1; \
1304 flag_omit_frame_pointer = 1; \
1305 /* flag_unroll_loops = 1; */ \
1310 /* Provide the costs of a rtl expression. This is in the body of a
1313 we don't say how expensive SImode is - pretty expensive!!!
1315 there is something wrong in MULT because MULT is not
1316 as cheap as total = 2 even if we can shift!
1318 if optimizing for size make mult etc cheap, but not 1, so when
1319 in doubt the faster insn is chosen.
1322 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1324 if (optimize_size) \
1325 total = COSTS_N_INSNS(2); \
1327 total = COSTS_N_INSNS (11); \
1330 if (optimize_size) \
1331 total = COSTS_N_INSNS(2); \
1333 total = COSTS_N_INSNS (25); \
1336 if (optimize_size) \
1337 total = COSTS_N_INSNS(2); \
1339 total = COSTS_N_INSNS (26); \
1342 /* equivalent to length, so same for optimize_size */ \
1343 total = COSTS_N_INSNS (3); \
1346 /* only used for: qi->hi */ \
1347 total = COSTS_N_INSNS(1); \
1350 if (GET_MODE(X) == HImode) \
1351 total = COSTS_N_INSNS(1); \
1352 else if (GET_MODE(X) == SImode) \
1353 total = COSTS_N_INSNS(6); \
1355 total = COSTS_N_INSNS(2); \
1357 /* case LSHIFT: */ \
1361 if (optimize_size) \
1362 total = COSTS_N_INSNS(1); \
1363 else if (GET_MODE(X) == QImode) \
1365 if (GET_CODE(XEXP (X,1)) != CONST_INT) \
1366 total = COSTS_N_INSNS(8); /* worst case */ \
1368 total = COSTS_N_INSNS(INTVAL(XEXP (X,1))); \
1370 else if (GET_MODE(X) == HImode) \
1372 if (GET_CODE(XEXP (X,1)) == CONST_INT) \
1374 if (abs (INTVAL (XEXP (X, 1))) == 1) \
1375 total = COSTS_N_INSNS(1); \
1377 total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \
1379 else /* worst case */ \
1380 total = COSTS_N_INSNS (10); \
1382 else if (GET_MODE(X) == SImode) \
1384 if (GET_CODE(XEXP (X,1)) == CONST_INT) \
1385 total = COSTS_N_INSNS(2.5 + 0.5 *INTVAL(XEXP(X,1))); \
1386 else /* worst case */ \
1387 total = COSTS_N_INSNS(18); \
1392 /* there is no point in avoiding branches on a pdp,
1393 since branches are really cheap - I just want to find out
1394 how much difference the BRANCH_COST macro makes in code */
1395 #define BRANCH_COST (TARGET_BRANCH_CHEAP ? 0 : 1)
1398 #define COMPARE_FLAG_MODE HImode