1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6 Software Science at the University of Utah.
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 enum cmp_type /* comparison type */
27 CMP_SI, /* compare integers */
28 CMP_SF, /* compare single precision floats */
29 CMP_DF, /* compare double precision floats */
30 CMP_MAX /* max comparison type */
33 /* For long call handling. */
34 extern unsigned int total_code_bytes;
36 /* Which processor to schedule for. */
48 /* For -mschedule= option. */
49 extern const char *pa_cpu_string;
50 extern enum processor_type pa_cpu;
52 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
54 /* Which architecture to generate code for. */
56 enum architecture_type
65 /* For -march= option. */
66 extern const char *pa_arch_string;
67 extern enum architecture_type pa_arch;
69 /* Print subsidiary information on the compiler version in use. */
71 #define TARGET_VERSION fputs (" (hppa)", stderr);
73 /* Run-time compilation parameters selecting different hardware subsets. */
75 extern int target_flags;
77 /* compile code for HP-PA 1.1 ("Snake"). */
81 /* Disable all FP registers (they all become fixed). This may be necessary
82 for compiling kernels which perform lazy context switching of FP regs.
83 Note if you use this option and try to perform floating point operations
84 the compiler will abort! */
86 #define MASK_DISABLE_FPREGS 2
87 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
89 /* Generate code which assumes that all space register are equivalent.
90 Triggers aggressive unscaled index addressing and faster
91 builtin_return_address. */
92 #define MASK_NO_SPACE_REGS 4
93 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
95 /* Allow unconditional jumps in the delay slots of call instructions. */
96 #define MASK_JUMP_IN_DELAY 8
97 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
99 /* Disable indexed addressing modes. */
100 #define MASK_DISABLE_INDEXING 32
101 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
103 /* Emit code which follows the new portable runtime calling conventions
104 HP wants everyone to use for ELF objects. If at all possible you want
105 to avoid this since it's a performance loss for non-prototyped code.
107 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
108 long-call stubs which is quite expensive. */
109 #define MASK_PORTABLE_RUNTIME 64
110 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
112 /* Emit directives only understood by GAS. This allows parameter
113 relocations to work for static functions. There is no way
114 to make them work the HP assembler at this time. */
116 #define TARGET_GAS (target_flags & MASK_GAS)
118 /* Emit code for processors which do not have an FPU. */
119 #define MASK_SOFT_FLOAT 256
120 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
122 /* Use 3-insn load/store sequences for access to large data segments
123 in shared libraries on hpux10. */
124 #define MASK_LONG_LOAD_STORE 512
125 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
127 /* Use a faster sequence for indirect calls. This assumes that calls
128 through function pointers will never cross a space boundary, and
129 that the executable is not dynamically linked. Such assumptions
130 are generally safe for building kernels and statically linked
131 executables. Code compiled with this option will fail miserably if
132 the executable is dynamically linked or uses nested functions! */
133 #define MASK_FAST_INDIRECT_CALLS 1024
134 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
136 /* Generate code with big switch statements to avoid out of range branches
137 occurring within the switch table. */
138 #define MASK_BIG_SWITCH 2048
139 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
141 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be
142 true when this is true. */
143 #define MASK_PA_20 4096
145 /* Generate cpp defines for server I/O. */
146 #define MASK_SIO 8192
147 #define TARGET_SIO (target_flags & MASK_SIO)
149 /* Assume GNU linker by default. */
150 #define MASK_GNU_LD 16384
151 #ifndef TARGET_GNU_LD
152 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
156 #define TARGET_PA_10 (target_flags & (MASK_PA_11 | MASK_PA_20) == 0)
160 #define TARGET_PA_11 (target_flags & MASK_PA_11)
164 #define TARGET_PA_20 (target_flags & MASK_PA_20)
167 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
169 #define TARGET_64BIT 0
172 /* Generate code for ELF32 ABI. */
174 #define TARGET_ELF32 0
177 /* Generate code for SOM 32bit ABI. */
182 /* Macro to define tables used to set the flags. This is a
183 list in braces of target switches with each switch being
184 { "NAME", VALUE, "HELP_STRING" }. VALUE is the bits to set,
185 or minus the bits to clear. An empty string NAME is used to
186 identify the default VALUE. Do not mark empty strings for
189 #define TARGET_SWITCHES \
190 {{ "snake", MASK_PA_11, \
191 N_("Generate PA1.1 code") }, \
192 { "nosnake", -(MASK_PA_11 | MASK_PA_20), \
193 N_("Generate PA1.0 code") }, \
194 { "pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), \
195 N_("Generate PA1.0 code") }, \
196 { "pa-risc-1-1", MASK_PA_11, \
197 N_("Generate PA1.1 code") }, \
198 { "pa-risc-2-0", MASK_PA_20, \
199 N_("Generate PA2.0 code (requires binutils 2.10 or later)") }, \
200 { "disable-fpregs", MASK_DISABLE_FPREGS, \
201 N_("Disable FP regs") }, \
202 { "no-disable-fpregs", -MASK_DISABLE_FPREGS, \
203 N_("Do not disable FP regs") }, \
204 { "no-space-regs", MASK_NO_SPACE_REGS, \
205 N_("Disable space regs") }, \
206 { "space-regs", -MASK_NO_SPACE_REGS, \
207 N_("Do not disable space regs") }, \
208 { "jump-in-delay", MASK_JUMP_IN_DELAY, \
209 N_("Put jumps in call delay slots") }, \
210 { "no-jump-in-delay", -MASK_JUMP_IN_DELAY, \
211 N_("Do not put jumps in call delay slots") }, \
212 { "disable-indexing", MASK_DISABLE_INDEXING, \
213 N_("Disable indexed addressing") }, \
214 { "no-disable-indexing", -MASK_DISABLE_INDEXING, \
215 N_("Do not disable indexed addressing") }, \
216 { "portable-runtime", MASK_PORTABLE_RUNTIME, \
217 N_("Use portable calling conventions") }, \
218 { "no-portable-runtime", -MASK_PORTABLE_RUNTIME, \
219 N_("Do not use portable calling conventions") }, \
221 N_("Assume code will be assembled by GAS") }, \
222 { "no-gas", -MASK_GAS, \
223 N_("Do not assume code will be assembled by GAS") }, \
224 { "soft-float", MASK_SOFT_FLOAT, \
225 N_("Use software floating point") }, \
226 { "no-soft-float", -MASK_SOFT_FLOAT, \
227 N_("Do not use software floating point") }, \
228 { "long-load-store", MASK_LONG_LOAD_STORE, \
229 N_("Emit long load/store sequences") }, \
230 { "no-long-load-store", -MASK_LONG_LOAD_STORE, \
231 N_("Do not emit long load/store sequences") }, \
232 { "fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, \
233 N_("Generate fast indirect calls") }, \
234 { "no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, \
235 N_("Do not generate fast indirect calls") }, \
236 { "big-switch", MASK_BIG_SWITCH, \
237 N_("Generate code for huge switch statements") }, \
238 { "no-big-switch", -MASK_BIG_SWITCH, \
239 N_("Do not generate code for huge switch statements") }, \
241 N_("Enable linker optimizations") }, \
243 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \
246 #ifndef TARGET_DEFAULT
247 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
250 #ifndef TARGET_CPU_DEFAULT
251 #define TARGET_CPU_DEFAULT 0
254 #ifndef SUBTARGET_SWITCHES
255 #define SUBTARGET_SWITCHES
258 #ifndef TARGET_SCHED_DEFAULT
259 #define TARGET_SCHED_DEFAULT "8000"
262 #define TARGET_OPTIONS \
264 { "schedule=", &pa_cpu_string, \
265 N_("Specify CPU for scheduling purposes") }, \
266 { "arch=", &pa_arch_string, \
267 N_("Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later.") }\
270 /* Specify the dialect of assembler to use. New mnemonics is dialect one
271 and the old mnemonics are dialect zero. */
272 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
274 #define OVERRIDE_OPTIONS override_options ()
276 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless
277 code duplication we simply include this file and override as needed. */
280 /* We do not have to be compatible with dbx, so we enable gdb extensions
282 #define DEFAULT_GDB_EXTENSIONS 1
284 /* This used to be zero (no max length), but big enums and such can
285 cause huge strings which killed gas.
287 We also have to avoid lossage in dbxout.c -- it does not compute the
288 string size accurately, so we are real conservative here. */
289 #undef DBX_CONTIN_LENGTH
290 #define DBX_CONTIN_LENGTH 3000
292 /* Only labels should ever begin in column zero. */
293 #define ASM_STABS_OP "\t.stabs\t"
294 #define ASM_STABN_OP "\t.stabn\t"
296 /* GDB always assumes the current function's frame begins at the value
297 of the stack pointer upon entry to the current function. Accessing
298 local variables and parameters passed on the stack is done using the
299 base of the frame + an offset provided by GCC.
301 For functions which have frame pointers this method works fine;
302 the (frame pointer) == (stack pointer at function entry) and GCC provides
303 an offset relative to the frame pointer.
305 This loses for functions without a frame pointer; GCC provides an offset
306 which is relative to the stack pointer after adjusting for the function's
307 frame size. GDB would prefer the offset to be relative to the value of
308 the stack pointer at the function's entry. Yuk! */
309 #define DEBUGGER_AUTO_OFFSET(X) \
310 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
311 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
313 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
314 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
315 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
317 #define TARGET_CPU_CPP_BUILTINS() \
319 builtin_assert("cpu=hppa"); \
320 builtin_assert("machine=hppa"); \
321 builtin_define("__hppa"); \
322 builtin_define("__hppa__"); \
325 builtin_define("_LP64"); \
326 builtin_define("__LP64__"); \
329 builtin_define("_PA_RISC2_0"); \
330 else if (TARGET_PA_11) \
331 builtin_define("_PA_RISC1_1"); \
333 builtin_define("_PA_RISC1_0"); \
336 /* An old set of OS defines for various BSD-like systems. */
337 #define TARGET_OS_CPP_BUILTINS() \
340 builtin_define_std ("REVARGV"); \
341 builtin_define_std ("hp800"); \
342 builtin_define_std ("hp9000"); \
343 builtin_define_std ("hp9k8"); \
344 if (c_language != clk_cplusplus \
346 builtin_define ("hppa"); \
347 builtin_define_std ("spectrum"); \
348 builtin_define_std ("unix"); \
349 builtin_assert ("system=bsd"); \
350 builtin_assert ("system=unix"); \
354 #define CC1_SPEC "%{pg:} %{p:}"
356 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
358 /* We don't want -lg. */
360 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
363 /* This macro defines command-line switches that modify the default
366 The definition is be an initializer for an array of structures. Each
367 array element has have three elements: the switch name, one of the
368 enumeration codes ADD or DELETE to indicate whether the string should be
369 inserted or deleted, and the string to be inserted or deleted. */
370 #define MODIFY_TARGET_NAME {{"-32", DELETE, "64"}, {"-64", ADD, "64"}}
372 /* Make gcc agree with <machine/ansi.h> */
374 #define SIZE_TYPE "unsigned int"
375 #define PTRDIFF_TYPE "int"
376 #define WCHAR_TYPE "unsigned int"
377 #define WCHAR_TYPE_SIZE 32
379 /* Show we can debug even without a frame pointer. */
380 #define CAN_DEBUG_WITHOUT_FP
382 /* Machine dependent reorg pass. */
383 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
386 /* target machine storage layout */
388 /* Define this macro if it is advisable to hold scalars in registers
389 in a wider mode than that declared by the program. In such cases,
390 the value is constrained to be within the bounds of the declared
391 type, but kept valid in the wider mode. The signedness of the
392 extension may differ from that of the type. */
394 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
395 if (GET_MODE_CLASS (MODE) == MODE_INT \
396 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
399 /* Define this if most significant bit is lowest numbered
400 in instructions that operate on numbered bit-fields. */
401 #define BITS_BIG_ENDIAN 1
403 /* Define this if most significant byte of a word is the lowest numbered. */
404 /* That is true on the HP-PA. */
405 #define BYTES_BIG_ENDIAN 1
407 /* Define this if most significant word of a multiword number is lowest
409 #define WORDS_BIG_ENDIAN 1
411 #define MAX_BITS_PER_WORD 64
412 #define MAX_LONG_TYPE_SIZE 32
414 /* Width of a word, in units (bytes). */
415 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
416 #define MIN_UNITS_PER_WORD 4
418 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
419 #define PARM_BOUNDARY BITS_PER_WORD
421 /* Largest alignment required for any stack parameter, in bits.
422 Don't define this if it is equal to PARM_BOUNDARY */
423 #define MAX_PARM_BOUNDARY (2 * PARM_BOUNDARY)
425 /* Boundary (in *bits*) on which stack pointer is always aligned;
426 certain optimizations in combine depend on this.
428 GCC for the PA always rounds its stacks to a 512bit boundary,
429 but that happens late in the compilation process. */
430 #define STACK_BOUNDARY (TARGET_64BIT ? 128 : 64)
432 #define PREFERRED_STACK_BOUNDARY 512
434 /* Allocation boundary (in *bits*) for the code of a function. */
435 #define FUNCTION_BOUNDARY (TARGET_64BIT ? 64 : 32)
437 /* Alignment of field after `int : 0' in a structure. */
438 #define EMPTY_FIELD_BOUNDARY 32
440 /* Every structure's size must be a multiple of this. */
441 #define STRUCTURE_SIZE_BOUNDARY 8
443 /* A bit-field declared as `int' forces `int' alignment for the struct. */
444 #define PCC_BITFIELD_TYPE_MATTERS 1
446 /* No data type wants to be aligned rounder than this. This is set
447 to 128 bits to allow for lock semaphores in the stack frame.*/
448 #define BIGGEST_ALIGNMENT 128
450 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
451 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
452 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
454 /* Make arrays of chars word-aligned for the same reasons. */
455 #define DATA_ALIGNMENT(TYPE, ALIGN) \
456 (TREE_CODE (TYPE) == ARRAY_TYPE \
457 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
458 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
461 /* Set this nonzero if move instructions will actually fail to work
462 when given unaligned data. */
463 #define STRICT_ALIGNMENT 1
465 /* Generate calls to memcpy, memcmp and memset. */
466 #define TARGET_MEM_FUNCTIONS
468 /* Value is 1 if it is a good idea to tie two pseudo registers
469 when one has mode MODE1 and one has mode MODE2.
470 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
471 for any hard reg, then this must be 0 for correct output. */
472 #define MODES_TIEABLE_P(MODE1, MODE2) \
473 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
475 /* Specify the registers used for certain standard purposes.
476 The values of these macros are register numbers. */
478 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
479 /* #define PC_REGNUM */
481 /* Register to use for pushing function arguments. */
482 #define STACK_POINTER_REGNUM 30
484 /* Base register for access to local variables of the function. */
485 #define FRAME_POINTER_REGNUM 3
487 /* Value should be nonzero if functions must have frame pointers. */
488 #define FRAME_POINTER_REQUIRED \
489 (current_function_calls_alloca)
491 /* C statement to store the difference between the frame pointer
492 and the stack pointer values immediately after the function prologue.
494 Note, we always pretend that this is a leaf function because if
495 it's not, there's no point in trying to eliminate the
496 frame pointer. If it is a leaf function, we guessed right! */
497 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
498 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
500 /* Base register for access to arguments of the function. */
501 #define ARG_POINTER_REGNUM 3
503 /* Register in which static-chain is passed to a function. */
504 #define STATIC_CHAIN_REGNUM 29
506 /* Register which holds offset table for position-independent
509 #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19)
510 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
512 /* Function to return the rtx used to save the pic offset table register
513 across function calls. */
514 extern struct rtx_def *hppa_pic_save_rtx PARAMS ((void));
516 #define DEFAULT_PCC_STRUCT_RETURN 0
518 /* SOM ABI says that objects larger than 64 bits are returned in memory.
519 PA64 ABI says that objects larger than 128 bits are returned in memory.
520 Note, int_size_in_bytes can return -1 if the size of the object is
521 variable or larger than the maximum value that can be expressed as
522 a HOST_WIDE_INT. It can also return zero for an empty type. The
523 simplest way to handle variable and empty types is to pass them in
524 memory. This avoids problems in defining the boundaries of argument
525 slots, allocating registers, etc. */
526 #define RETURN_IN_MEMORY(TYPE) \
527 (int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8) \
528 || int_size_in_bytes (TYPE) <= 0)
530 /* Register in which address to store a structure value
531 is passed to a function. */
532 #define STRUCT_VALUE_REGNUM 28
534 /* Describe how we implement __builtin_eh_return. */
535 #define EH_RETURN_DATA_REGNO(N) \
536 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
537 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
538 #define EH_RETURN_HANDLER_RTX \
539 gen_rtx_MEM (word_mode, \
540 gen_rtx_PLUS (word_mode, frame_pointer_rtx, \
541 TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
544 /* Offset from the argument pointer register value to the top of
545 stack. This is different from FIRST_PARM_OFFSET because of the
547 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
549 /* The letters I, J, K, L and M in a register constraint string
550 can be used to stand for particular ranges of immediate operands.
551 This macro defines what the ranges are.
552 C is the letter, and VALUE is a constant value.
553 Return 1 if VALUE is in the range specified by C.
555 `I' is used for the 11 bit constants.
556 `J' is used for the 14 bit constants.
557 `K' is used for values that can be moved with a zdepi insn.
558 `L' is used for the 5 bit constants.
560 `N' is used for values with the least significant 11 bits equal to zero
561 and when sign extended from 32 to 64 bits the
562 value does not change.
563 `O' is used for numbers n such that n+1 is a power of 2.
566 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
567 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
568 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
569 : (C) == 'K' ? zdepi_cint_p (VALUE) \
570 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
571 : (C) == 'M' ? (VALUE) == 0 \
572 : (C) == 'N' ? (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) == 0 \
573 || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
574 == (HOST_WIDE_INT) -1 << 31)) \
575 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
576 : (C) == 'P' ? and_mask_p (VALUE) \
579 /* Similar, but for floating or large integer constants, and defining letters
580 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
582 For PA, `G' is the floating-point constant zero. `H' is undefined. */
584 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
585 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
586 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
589 /* The class value for index registers, and the one for base regs. */
590 #define INDEX_REG_CLASS GENERAL_REGS
591 #define BASE_REG_CLASS GENERAL_REGS
593 #define FP_REG_CLASS_P(CLASS) \
594 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
596 /* True if register is floating-point. */
597 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
599 /* Given an rtx X being reloaded into a reg required to be
600 in class CLASS, return the class of reg to actually use.
601 In general this is just CLASS; but on some machines
602 in some cases it is preferable to use a more restrictive class. */
603 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
605 /* Return the register class of a scratch register needed to copy IN into
606 or out of a register in CLASS in MODE. If it can be done directly
609 Avoid doing any work for the common case calls. */
611 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
612 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
613 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
614 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
616 /* On the PA it is not possible to directly move data between
617 GENERAL_REGS and FP_REGS. */
618 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
619 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
621 /* Return the stack location to use for secondary memory needed reloads. */
622 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
623 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
626 /* Stack layout; function entry, exit and calling. */
628 /* Define this if pushing a word on the stack
629 makes the stack pointer a smaller address. */
630 /* #define STACK_GROWS_DOWNWARD */
632 /* Believe it or not. */
633 #define ARGS_GROW_DOWNWARD
635 /* Define this if the nominal address of the stack frame
636 is at the high-address end of the local variables;
637 that is, each additional local variable allocated
638 goes at a more negative offset in the frame. */
639 /* #define FRAME_GROWS_DOWNWARD */
641 /* Offset within stack frame to start allocating local variables at.
642 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
643 first local allocated. Otherwise, it is the offset to the BEGINNING
644 of the first local allocated. */
645 #define STARTING_FRAME_OFFSET 8
647 /* If we generate an insn to push BYTES bytes,
648 this says how many the stack pointer really advances by.
649 On the HP-PA, don't define this because there are no push insns. */
650 /* #define PUSH_ROUNDING(BYTES) */
652 /* Offset of first parameter from the argument pointer register value.
653 This value will be negated because the arguments grow down.
654 Also note that on STACK_GROWS_UPWARD machines (such as this one)
655 this is the distance from the frame pointer to the end of the first
656 argument, not it's beginning. To get the real offset of the first
657 argument, the size of the argument must be added. */
659 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
661 /* When a parameter is passed in a register, stack space is still
663 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
665 /* Define this if the above stack space is to be considered part of the
666 space allocated by the caller. */
667 #define OUTGOING_REG_PARM_STACK_SPACE
669 /* Keep the stack pointer constant throughout the function.
670 This is both an optimization and a necessity: longjmp
671 doesn't behave itself when the stack pointer moves within
673 #define ACCUMULATE_OUTGOING_ARGS 1
675 /* The weird HPPA calling conventions require a minimum of 48 bytes on
676 the stack: 16 bytes for register saves, and 32 bytes for magic.
677 This is the difference between the logical top of stack and the
679 #define STACK_POINTER_OFFSET \
680 (TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32)
682 #define STACK_DYNAMIC_OFFSET(FNDECL) \
684 ? (STACK_POINTER_OFFSET) \
685 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
687 /* Value is 1 if returning from a function call automatically
688 pops the arguments described by the number-of-args field in the call.
689 FUNDECL is the declaration node of the function (as a tree),
690 FUNTYPE is the data type of the function (as a tree),
691 or for a library call it is an identifier node for the subroutine name. */
693 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
695 /* Define how to find the value returned by a function.
696 VALTYPE is the data type of the value (as a tree).
697 If the precise function being called is known, FUNC is its FUNCTION_DECL;
698 otherwise, FUNC is 0. */
700 /* On the HP-PA the value is found in register(s) 28(-29), unless
701 the mode is SF or DF. Then the value is returned in fr4 (32). */
703 /* This must perform the same promotions as PROMOTE_MODE, else
704 PROMOTE_FUNCTION_RETURN will not work correctly. */
705 #define FUNCTION_VALUE(VALTYPE, FUNC) \
706 gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
707 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
708 || POINTER_TYPE_P (VALTYPE)) \
709 ? word_mode : TYPE_MODE (VALTYPE), \
710 (TREE_CODE (VALTYPE) == REAL_TYPE \
711 && TYPE_MODE (VALTYPE) != TFmode \
712 && !TARGET_SOFT_FLOAT) ? 32 : 28)
714 /* Define how to find the value returned by a library function
715 assuming the value has mode MODE. */
717 #define LIBCALL_VALUE(MODE) \
719 (! TARGET_SOFT_FLOAT \
720 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
722 /* 1 if N is a possible register number for a function value
723 as seen by the caller. */
725 #define FUNCTION_VALUE_REGNO_P(N) \
726 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
729 /* Define a data type for recording info about an argument list
730 during the scan of that argument list. This data type should
731 hold all necessary information about the function itself
732 and about the args processed so far, enough to enable macros
733 such as FUNCTION_ARG to determine where the next arg should go.
735 On the HP-PA, this is a single integer, which is a number of words
736 of arguments scanned so far (including the invisible argument,
737 if any, which holds the structure-value-address).
738 Thus 4 or more means all following args should go on the stack. */
740 struct hppa_args {int words, nargs_prototype, indirect; };
742 #define CUMULATIVE_ARGS struct hppa_args
744 /* Initialize a variable CUM of type CUMULATIVE_ARGS
745 for a call to a function whose data type is FNTYPE.
746 For a library call, FNTYPE is 0. */
748 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
750 (CUM).indirect = INDIRECT, \
751 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
752 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
753 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
754 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
759 /* Similar, but when scanning the definition of a procedure. We always
760 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
762 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
764 (CUM).indirect = 0, \
765 (CUM).nargs_prototype = 1000
767 /* Figure out the size in words of the function argument. The size
768 returned by this macro should always be greater than zero because
769 we pass variable and zero sized objects by reference. */
771 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
772 ((((MODE) != BLKmode \
773 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
774 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
776 /* Update the data in CUM to advance over an argument
777 of mode MODE and data type TYPE.
778 (TYPE is null for libcalls where that information may not be available.) */
780 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
781 { (CUM).nargs_prototype--; \
782 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
783 + (((CUM).words & 01) && (TYPE) != 0 \
784 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
787 /* Determine where to put an argument to a function.
788 Value is zero to push the argument on the stack,
789 or a hard register in which to store the argument.
791 MODE is the argument's machine mode.
792 TYPE is the data type of the argument (as a tree).
793 This is null for libcalls where that information may
795 CUM is a variable of type CUMULATIVE_ARGS which gives info about
796 the preceding args and about the function being called.
797 NAMED is nonzero if this argument is a named parameter
798 (otherwise it is an extra parameter matching an ellipsis).
800 On the HP-PA the first four words of args are normally in registers
801 and the rest are pushed. But any arg that won't entirely fit in regs
804 Arguments passed in registers are either 1 or 2 words long.
806 The caller must make a distinction between calls to explicitly named
807 functions and calls through pointers to functions -- the conventions
808 are different! Calls through pointers to functions only use general
809 registers for the first four argument words.
811 Of course all this is different for the portable runtime model
812 HP wants everyone to use for ELF. Ugh. Here's a quick description
813 of how it's supposed to work.
815 1) callee side remains unchanged. It expects integer args to be
816 in the integer registers, float args in the float registers and
817 unnamed args in integer registers.
819 2) caller side now depends on if the function being called has
820 a prototype in scope (rather than if it's being called indirectly).
822 2a) If there is a prototype in scope, then arguments are passed
823 according to their type (ints in integer registers, floats in float
824 registers, unnamed args in integer registers.
826 2b) If there is no prototype in scope, then floating point arguments
827 are passed in both integer and float registers. egad.
829 FYI: The portable parameter passing conventions are almost exactly like
830 the standard parameter passing conventions on the RS6000. That's why
831 you'll see lots of similar code in rs6000.h. */
833 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
835 /* Do not expect to understand this without reading it several times. I'm
836 tempted to try and simply it, but I worry about breaking something. */
838 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
839 function_arg (&CUM, MODE, TYPE, NAMED, 0)
841 /* Nonzero if we do not know how to pass TYPE solely in registers. */
842 #define MUST_PASS_IN_STACK(MODE,TYPE) \
844 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
845 || TREE_ADDRESSABLE (TYPE)))
847 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
848 function_arg (&CUM, MODE, TYPE, NAMED, 1)
850 /* For an arg passed partly in registers and partly in memory,
851 this is the number of registers used.
852 For args passed entirely in registers or entirely in memory, zero. */
854 /* For PA32 there are never split arguments. PA64, on the other hand, can
855 pass arguments partially in registers and partially in memory. */
856 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
857 (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0)
859 /* If defined, a C expression that gives the alignment boundary, in
860 bits, of an argument with the specified mode and type. If it is
861 not defined, `PARM_BOUNDARY' is used for all arguments. */
863 /* Arguments larger than one word are double word aligned. */
865 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
867 ? (integer_zerop (TYPE_SIZE (TYPE)) \
868 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
869 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
870 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
871 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
873 /* In the 32-bit runtime, arguments larger than eight bytes are passed
874 by invisible reference. As a GCC extension, we also pass anything
875 with a zero or variable size by reference.
877 The 64-bit runtime does not describe passing any types by invisible
878 reference. The internals of GCC can't currently handle passing
879 empty structures, and zero or variable length arrays when they are
880 not passed entirely on the stack or by reference. Thus, as a GCC
881 extension, we pass these types by reference. The HP compiler doesn't
882 support these types, so hopefully there shouldn't be any compatibility
883 issues. This may have to be revisited when HP releases a C99 compiler
884 or updates the ABI. */
885 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
887 ? ((TYPE) && int_size_in_bytes (TYPE) <= 0) \
888 : (((TYPE) && (int_size_in_bytes (TYPE) > 8 \
889 || int_size_in_bytes (TYPE) <= 0)) \
890 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
892 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
893 FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED)
896 extern GTY(()) rtx hppa_compare_op0;
897 extern GTY(()) rtx hppa_compare_op1;
898 extern enum cmp_type hppa_branch_type;
900 #define TARGET_ASM_OUTPUT_MI_THUNK pa_asm_output_mi_thunk
902 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
903 as assembly via FUNCTION_PROFILER. Just output a local label.
904 We can't use the function label because the GAS SOM target can't
905 handle the difference of a global symbol and a local symbol. */
907 #ifndef FUNC_BEGIN_PROLOG_LABEL
908 #define FUNC_BEGIN_PROLOG_LABEL "LFBP"
911 #define FUNCTION_PROFILER(FILE, LABEL) \
912 ASM_OUTPUT_INTERNAL_LABEL (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
914 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
915 void hppa_profile_hook PARAMS ((int label_no));
917 /* The profile counter if emitted must come before the prologue. */
918 #define PROFILE_BEFORE_PROLOGUE 1
920 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
921 the stack pointer does not matter. The value is tested only in
922 functions that have frame pointers.
923 No definition is equivalent to always zero. */
925 extern int may_call_alloca;
927 #define EXIT_IGNORE_STACK \
928 (get_frame_size () != 0 \
929 || current_function_calls_alloca || current_function_outgoing_args_size)
931 /* Output assembler code for a block containing the constant parts
932 of a trampoline, leaving space for the variable parts.\
934 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
935 and then branches to the specified routine.
937 This code template is copied from text segment to stack location
938 and then patched with INITIALIZE_TRAMPOLINE to contain
939 valid values, and then entered as a subroutine.
941 It is best to keep this as small as possible to avoid having to
942 flush multiple lines in the cache. */
944 #define TRAMPOLINE_TEMPLATE(FILE) \
946 if (! TARGET_64BIT) \
948 fputs ("\tldw 36(%r22),%r21\n", FILE); \
949 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
950 if (ASSEMBLER_DIALECT == 0) \
951 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
953 fputs ("\tdepwi 0,31,2,%r21\n", FILE); \
954 fputs ("\tldw 4(%r21),%r19\n", FILE); \
955 fputs ("\tldw 0(%r21),%r21\n", FILE); \
956 fputs ("\tldsid (%r21),%r1\n", FILE); \
957 fputs ("\tmtsp %r1,%sr0\n", FILE); \
958 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
959 fputs ("\tldw 40(%r22),%r29\n", FILE); \
960 fputs ("\t.word 0\n", FILE); \
961 fputs ("\t.word 0\n", FILE); \
962 fputs ("\t.word 0\n", FILE); \
963 fputs ("\t.word 0\n", FILE); \
967 fputs ("\t.dword 0\n", FILE); \
968 fputs ("\t.dword 0\n", FILE); \
969 fputs ("\t.dword 0\n", FILE); \
970 fputs ("\t.dword 0\n", FILE); \
971 fputs ("\tmfia %r31\n", FILE); \
972 fputs ("\tldd 24(%r31),%r1\n", FILE); \
973 fputs ("\tldd 24(%r1),%r27\n", FILE); \
974 fputs ("\tldd 16(%r1),%r1\n", FILE); \
975 fputs ("\tbve (%r1)\n", FILE); \
976 fputs ("\tldd 32(%r31),%r31\n", FILE); \
977 fputs ("\t.dword 0 ; fptr\n", FILE); \
978 fputs ("\t.dword 0 ; static link\n", FILE); \
982 /* Length in units of the trampoline for entering a nested function.
984 Flush the cache entries corresponding to the first and last addresses
985 of the trampoline. This is necessary as the trampoline may cross two
988 If the code part of the trampoline ever grows to > 32 bytes, then it
989 will become necessary to hack on the cacheflush pattern in pa.md. */
991 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
993 /* Emit RTL insns to initialize the variable parts of a trampoline.
994 FNADDR is an RTX for the address of the function's pure code.
995 CXT is an RTX for the static chain value for the function.
997 Move the function address to the trampoline template at offset 36.
998 Move the static chain value to trampoline template at offset 40.
999 Move the trampoline address to trampoline template at offset 44.
1000 Move r19 to trampoline template at offset 48. The latter two
1001 words create a plabel for the indirect call to the trampoline. */
1003 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1005 if (! TARGET_64BIT) \
1007 rtx start_addr, end_addr; \
1009 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1010 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1011 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1012 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1013 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
1014 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \
1015 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
1016 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \
1017 gen_rtx_REG (Pmode, 19)); \
1018 /* fdc and fic only use registers for the address to flush, \
1019 they do not accept integer displacements. */ \
1020 start_addr = force_reg (Pmode, (TRAMP)); \
1021 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1022 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1023 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1024 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1025 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1029 rtx start_addr, end_addr; \
1031 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
1032 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1033 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
1034 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1035 /* Create a fat pointer for the trampoline. */ \
1036 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1037 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1038 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1039 end_addr = gen_rtx_REG (Pmode, 27); \
1040 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1041 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1042 /* fdc and fic only use registers for the address to flush, \
1043 they do not accept integer displacements. */ \
1044 start_addr = force_reg (Pmode, (TRAMP)); \
1045 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1046 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1047 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1048 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1049 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1053 /* Perform any machine-specific adjustment in the address of the trampoline.
1054 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
1055 Adjust the trampoline address to point to the plabel at offset 44. */
1057 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
1058 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
1060 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1061 reference the 4 integer arg registers and 4 fp arg registers.
1062 Ordinarily they are not call used registers, but they are for
1063 _builtin_saveregs, so we must make this explicit. */
1065 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
1067 /* Implement `va_start' for varargs and stdarg. */
1069 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1070 hppa_va_start (valist, nextarg)
1072 /* Implement `va_arg'. */
1074 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1075 hppa_va_arg (valist, type)
1077 /* Addressing modes, and classification of registers for them.
1079 Using autoincrement addressing modes on PA8000 class machines is
1082 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1083 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1085 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1086 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1088 /* Macros to check register numbers against specific register classes. */
1090 /* These assume that REGNO is a hard or pseudo reg number.
1091 They give nonzero only if REGNO is a hard reg of the suitable class
1092 or a pseudo reg currently allocated to a suitable hard reg.
1093 Since they use reg_renumber, they are safe only once reg_renumber
1094 has been allocated, which happens in local-alloc.c. */
1096 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1097 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1098 #define REGNO_OK_FOR_BASE_P(REGNO) \
1099 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1100 #define REGNO_OK_FOR_FP_P(REGNO) \
1101 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1103 /* Now macros that check whether X is a register and also,
1104 strictly, whether it is in a specified class.
1106 These macros are specific to the HP-PA, and may be used only
1107 in code for printing assembler insns and in conditions for
1108 define_optimization. */
1110 /* 1 if X is an fp register. */
1112 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1114 /* Maximum number of registers that can appear in a valid memory address. */
1116 #define MAX_REGS_PER_ADDRESS 2
1118 /* Recognize any constant value that is a valid address except
1119 for symbolic addresses. We get better CSE by rejecting them
1120 here and allowing hppa_legitimize_address to break them up. We
1121 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1123 #define CONSTANT_ADDRESS_P(X) \
1124 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1125 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1126 || GET_CODE (X) == HIGH) \
1127 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1129 /* Include all constant integers and constant doubles, but not
1130 floating-point, except for floating-point zero.
1132 Reject LABEL_REFs if we're not using gas or the new HP assembler.
1134 ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need
1136 #ifndef NEW_HP_ASSEMBLER
1137 #define NEW_HP_ASSEMBLER 0
1139 #define LEGITIMATE_CONSTANT_P(X) \
1140 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1141 || (X) == CONST0_RTX (GET_MODE (X))) \
1142 && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
1143 && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
1144 && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
1145 && !(HOST_BITS_PER_WIDE_INT <= 32 \
1146 || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \
1147 && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \
1148 || cint_ok_for_move (INTVAL (X)))) \
1149 && !function_label_operand (X, VOIDmode))
1151 /* Subroutine for EXTRA_CONSTRAINT.
1153 Return 1 iff OP is a pseudo which did not get a hard register and
1154 we are running the reload pass. */
1156 #define IS_RELOADING_PSEUDO_P(OP) \
1157 ((reload_in_progress \
1158 && GET_CODE (OP) == REG \
1159 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1160 && reg_renumber [REGNO (OP)] < 0))
1162 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1164 For the HPPA, `Q' means that this is a memory operand but not a
1165 symbolic memory operand. Note that an unassigned pseudo register
1166 is such a memory operand. Needed because reload will generate
1167 these things in insns and then not re-recognize the insns, causing
1168 constrain_operands to fail.
1170 `R' is used for scaled indexed addresses.
1172 `S' is the constant 31.
1174 `T' is for fp loads and stores. */
1175 #define EXTRA_CONSTRAINT(OP, C) \
1177 (IS_RELOADING_PSEUDO_P (OP) \
1178 || (GET_CODE (OP) == MEM \
1179 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1180 || reload_in_progress) \
1181 && ! symbolic_memory_operand (OP, VOIDmode) \
1182 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1183 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1184 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1186 (GET_CODE (OP) == MEM \
1187 && GET_CODE (XEXP (OP, 0)) == PLUS \
1188 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1189 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1190 && (move_operand (OP, GET_MODE (OP)) \
1191 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1192 || reload_in_progress)) \
1194 (GET_CODE (OP) == MEM \
1195 /* Using DFmode forces only short displacements \
1196 to be recognized as valid in reg+d addresses. \
1197 However, this is not necessary for PA2.0 since\
1198 it has long FP loads/stores. */ \
1199 && memory_address_p ((TARGET_PA_20 \
1203 && !(GET_CODE (XEXP (OP, 0)) == LO_SUM \
1204 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1205 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0))\
1206 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC\
1207 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1208 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1209 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1210 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
1212 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
1214 (GET_CODE (OP) == MEM \
1215 && GET_CODE (XEXP (OP, 0)) == LO_SUM \
1216 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1217 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
1218 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
1219 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1221 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
1224 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1225 and check its validity for a certain class.
1226 We have two alternate definitions for each of them.
1227 The usual definition accepts all pseudo regs; the other rejects
1228 them unless they have been allocated suitable hard regs.
1229 The symbol REG_OK_STRICT causes the latter definition to be used.
1231 Most source files want to accept pseudo regs in the hope that
1232 they will get allocated to the class that the insn wants them to be in.
1233 Source files for reload pass need to be strict.
1234 After reload, it makes no difference, since pseudo regs have
1235 been eliminated by then. */
1237 #ifndef REG_OK_STRICT
1239 /* Nonzero if X is a hard reg that can be used as an index
1240 or if it is a pseudo reg. */
1241 #define REG_OK_FOR_INDEX_P(X) \
1242 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1243 /* Nonzero if X is a hard reg that can be used as a base reg
1244 or if it is a pseudo reg. */
1245 #define REG_OK_FOR_BASE_P(X) \
1246 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1250 /* Nonzero if X is a hard reg that can be used as an index. */
1251 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1252 /* Nonzero if X is a hard reg that can be used as a base reg. */
1253 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1257 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1258 that is a valid memory address for an instruction.
1259 The MODE argument is the machine mode for the MEM expression
1260 that wants to use this address.
1262 On the HP-PA, the actual legitimate addresses must be
1263 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1264 But we can treat a SYMBOL_REF as legitimate if it is part of this
1265 function's constant-pool, because such addresses can actually
1266 be output as REG+SMALLINT.
1268 Note we only allow 5 bit immediates for access to a constant address;
1269 doing so avoids losing for loading/storing a FP register at an address
1270 which will not fit in 5 bits. */
1272 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1273 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1275 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1276 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1278 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1279 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1281 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1282 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1284 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1286 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1287 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1288 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1289 && REG_P (XEXP (X, 0)) \
1290 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1292 else if (GET_CODE (X) == PLUS) \
1294 rtx base = 0, index = 0; \
1295 if (REG_P (XEXP (X, 0)) \
1296 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1297 base = XEXP (X, 0), index = XEXP (X, 1); \
1298 else if (REG_P (XEXP (X, 1)) \
1299 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1300 base = XEXP (X, 1), index = XEXP (X, 0); \
1302 if (GET_CODE (index) == CONST_INT \
1303 && ((INT_14_BITS (index) \
1304 && (TARGET_SOFT_FLOAT \
1306 && ((MODE == SFmode \
1307 && (INTVAL (index) % 4) == 0)\
1308 || (MODE == DFmode \
1309 && (INTVAL (index) % 8) == 0)))\
1310 || ((MODE) != SFmode && (MODE) != DFmode))) \
1311 || INT_5_BITS (index))) \
1313 if (! TARGET_SOFT_FLOAT \
1314 && ! TARGET_DISABLE_INDEXING \
1316 && ((MODE) == SFmode || (MODE) == DFmode) \
1317 && GET_CODE (index) == MULT \
1318 && GET_CODE (XEXP (index, 0)) == REG \
1319 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1320 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1321 && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\
1324 else if (GET_CODE (X) == LO_SUM \
1325 && GET_CODE (XEXP (X, 0)) == REG \
1326 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1327 && CONSTANT_P (XEXP (X, 1)) \
1328 && (TARGET_SOFT_FLOAT \
1329 /* We can allow symbolic LO_SUM addresses\
1332 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1333 || ((MODE) != SFmode \
1334 && (MODE) != DFmode))) \
1336 else if (GET_CODE (X) == LO_SUM \
1337 && GET_CODE (XEXP (X, 0)) == SUBREG \
1338 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1339 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1340 && CONSTANT_P (XEXP (X, 1)) \
1341 && (TARGET_SOFT_FLOAT \
1342 /* We can allow symbolic LO_SUM addresses\
1345 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1346 || ((MODE) != SFmode \
1347 && (MODE) != DFmode))) \
1349 else if (GET_CODE (X) == LABEL_REF \
1350 || (GET_CODE (X) == CONST_INT \
1351 && INT_5_BITS (X))) \
1353 /* Needed for -fPIC */ \
1354 else if (GET_CODE (X) == LO_SUM \
1355 && GET_CODE (XEXP (X, 0)) == REG \
1356 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1357 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1358 && (TARGET_SOFT_FLOAT \
1360 || ((MODE) != SFmode \
1361 && (MODE) != DFmode))) \
1365 /* Look for machine dependent ways to make the invalid address AD a
1368 For the PA, transform:
1370 memory(X + <large int>)
1374 if (<large int> & mask) >= 16
1375 Y = (<large int> & ~mask) + mask + 1 Round up.
1377 Y = (<large int> & ~mask) Round down.
1379 memory (Z + (<large int> - Y));
1381 This makes reload inheritance and reload_cse work better since Z
1384 There may be more opportunities to improve code with this hook. */
1385 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1387 int offset, newoffset, mask; \
1388 rtx new, temp = NULL_RTX; \
1390 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1391 ? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); \
1394 && GET_CODE (AD) == PLUS) \
1395 temp = simplify_binary_operation (PLUS, Pmode, \
1396 XEXP (AD, 0), XEXP (AD, 1)); \
1398 new = temp ? temp : AD; \
1401 && GET_CODE (new) == PLUS \
1402 && GET_CODE (XEXP (new, 0)) == REG \
1403 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1405 offset = INTVAL (XEXP ((new), 1)); \
1407 /* Choose rounding direction. Round up if we are >= halfway. */ \
1408 if ((offset & mask) >= ((mask + 1) / 2)) \
1409 newoffset = (offset & ~mask) + mask + 1; \
1411 newoffset = offset & ~mask; \
1413 if (newoffset != 0 \
1414 && VAL_14_BITS_P (newoffset)) \
1417 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1418 GEN_INT (newoffset)); \
1419 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1420 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1421 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1431 /* Try machine-dependent ways of modifying an illegitimate address
1432 to be legitimate. If we find one, return the new, valid address.
1433 This macro is used in only one place: `memory_address' in explow.c.
1435 OLDX is the address as it was before break_out_memory_refs was called.
1436 In some cases it is useful to look at this to decide what needs to be done.
1438 MODE and WIN are passed so that this macro can use
1439 GO_IF_LEGITIMATE_ADDRESS.
1441 It is always safe for this macro to do nothing. It exists to recognize
1442 opportunities to optimize the output. */
1444 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1445 { rtx orig_x = (X); \
1446 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1447 if ((X) != orig_x && memory_address_p (MODE, X)) \
1450 /* Go to LABEL if ADDR (a legitimate address expression)
1451 has an effect that depends on the machine mode it is used for. */
1453 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1454 if (GET_CODE (ADDR) == PRE_DEC \
1455 || GET_CODE (ADDR) == POST_DEC \
1456 || GET_CODE (ADDR) == PRE_INC \
1457 || GET_CODE (ADDR) == POST_INC) \
1460 #define TARGET_ASM_SELECT_SECTION pa_select_section
1462 /* Define this macro if references to a symbol must be treated
1463 differently depending on something about the variable or
1464 function named by the symbol (such as what section it is in).
1466 The macro definition, if any, is executed immediately after the
1467 rtl for DECL or other node is created.
1468 The value of the rtl will be a `mem' whose address is a
1471 The usual thing for this macro to do is to a flag in the
1472 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1473 name string in the `symbol_ref' (if one bit is not enough
1476 On the HP-PA we use this to indicate if a symbol is in text or
1477 data space. Also, function labels need special treatment. */
1479 #define TEXT_SPACE_P(DECL)\
1480 (TREE_CODE (DECL) == FUNCTION_DECL \
1481 || (TREE_CODE (DECL) == VAR_DECL \
1482 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1483 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1485 || (TREE_CODE_CLASS (TREE_CODE (DECL)) == 'c' \
1486 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1488 #define FUNCTION_NAME_P(NAME) (*(NAME) == '@')
1490 /* Specify the machine mode that this machine uses
1491 for the index in the tablejump instruction. */
1492 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
1494 /* Jump tables must be 32 bit aligned, no matter the size of the element. */
1495 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1497 /* Define this as 1 if `char' should by default be signed; else as 0. */
1498 #define DEFAULT_SIGNED_CHAR 1
1500 /* Max number of bytes we can move from memory to memory
1501 in one reasonably fast instruction. */
1504 /* Higher than the default as we prefer to use simple move insns
1505 (better scheduling and delay slot filling) and because our
1506 built-in block move is really a 2X unrolled loop.
1508 Believe it or not, this has to be big enough to allow for copying all
1509 arguments passed in registers to avoid infinite recursion during argument
1510 setup for a function call. Why? Consider how we copy the stack slots
1511 reserved for parameters when they may be trashed by a call. */
1512 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1514 /* Define if operations between registers always perform the operation
1515 on the full register even if a narrower mode is specified. */
1516 #define WORD_REGISTER_OPERATIONS
1518 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1519 will either zero-extend or sign-extend. The value of this macro should
1520 be the code that says which one of the two operations is implicitly
1521 done, NIL if none. */
1522 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1524 /* Nonzero if access to memory by bytes is slow and undesirable. */
1525 #define SLOW_BYTE_ACCESS 1
1527 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1528 is done just by pretending it is already truncated. */
1529 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1531 /* We assume that the store-condition-codes instructions store 0 for false
1532 and some other value for true. This is the value stored for true. */
1534 #define STORE_FLAG_VALUE 1
1536 /* When a prototype says `char' or `short', really pass an `int'. */
1537 #define PROMOTE_PROTOTYPES 1
1538 #define PROMOTE_FUNCTION_RETURN 1
1540 /* Specify the machine mode that pointers have.
1541 After generation of rtl, the compiler makes no further distinction
1542 between pointers and any other objects of this machine mode. */
1543 #define Pmode word_mode
1545 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1546 return the mode to be used for the comparison. For floating-point, CCFPmode
1547 should be used. CC_NOOVmode should be used when the first operand is a
1548 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1550 #define SELECT_CC_MODE(OP,X,Y) \
1551 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1553 /* A function address in a call instruction
1554 is a byte address (for indexing purposes)
1555 so give the MEM rtx a byte's mode. */
1556 #define FUNCTION_MODE SImode
1558 /* Define this if addresses of constant functions
1559 shouldn't be put through pseudo regs where they can be cse'd.
1560 Desirable on machines where ordinary constants are expensive
1561 but a CALL with constant address is cheap. */
1562 #define NO_FUNCTION_CSE
1564 /* Define this to be nonzero if shift instructions ignore all but the low-order
1566 #define SHIFT_COUNT_TRUNCATED 1
1568 /* Compute the cost of computing a constant rtl expression RTX
1569 whose rtx-code is CODE. The body of this macro is a portion
1570 of a switch statement. If the code is computed here,
1571 return it with a return statement. Otherwise, break from the switch. */
1573 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1575 if (INTVAL (RTX) == 0) return 0; \
1576 if (INT_14_BITS (RTX)) return 1; \
1583 case CONST_DOUBLE: \
1584 if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \
1585 && OUTER_CODE != SET) \
1590 #define ADDRESS_COST(RTX) \
1591 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1593 /* Compute extra cost of moving data between one register class
1596 Make moves from SAR so expensive they should never happen. We used to
1597 have 0xffff here, but that generates overflow in rare cases.
1599 Copies involving a FP register and a non-FP register are relatively
1600 expensive because they must go through memory.
1602 Other copies are reasonably cheap. */
1603 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1604 (CLASS1 == SHIFT_REGS ? 0x100 \
1605 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1606 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1610 /* Provide the costs of a rtl expression. This is in the body of a
1611 switch on CODE. The purpose for the cost of MULT is to encourage
1612 `synth_mult' to find a synthetic multiply when reasonable. */
1614 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1616 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1617 return COSTS_N_INSNS (3); \
1618 return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1619 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1621 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1622 return COSTS_N_INSNS (14); \
1626 return COSTS_N_INSNS (60); \
1627 case PLUS: /* this includes shNadd insns */ \
1629 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1630 return COSTS_N_INSNS (3); \
1631 return COSTS_N_INSNS (1); \
1635 return COSTS_N_INSNS (1);
1637 /* Adjust the cost of branches. */
1638 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1640 /* Handling the special cases is going to get too complicated for a macro,
1641 just call `pa_adjust_insn_length' to do the real work. */
1642 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1643 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1645 /* Millicode insns are actually function calls with some special
1646 constraints on arguments and register usage.
1648 Millicode calls always expect their arguments in the integer argument
1649 registers, and always return their result in %r29 (ret1). They
1650 are expected to clobber their arguments, %r1, %r29, and the return
1651 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1653 This macro tells reorg that the references to arguments and
1654 millicode calls do not appear to happen until after the millicode call.
1655 This allows reorg to put insns which set the argument registers into the
1656 delay slot of the millicode call -- thus they act more like traditional
1659 Note we can not consider side effects of the insn to be delayed because
1660 the branch and link insn will clobber the return pointer. If we happened
1661 to use the return pointer in the delay slot of the call, then we lose.
1663 get_attr_type will try to recognize the given insn, so make sure to
1664 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1666 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1669 /* Control the assembler format that we output. */
1671 /* Output to assembler file text saying following lines
1672 may contain character constants, extra white space, comments, etc. */
1674 #define ASM_APP_ON ""
1676 /* Output to assembler file text saying following lines
1677 no longer contain unusual constructs. */
1679 #define ASM_APP_OFF ""
1681 /* Output deferred plabels at the end of the file. */
1683 #define ASM_FILE_END(FILE) output_deferred_plabels (FILE)
1685 /* This is how to output the definition of a user-level label named NAME,
1686 such as the label on a static function or variable NAME. */
1688 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1689 do { assemble_name (FILE, NAME); \
1690 fputc ('\n', FILE); } while (0)
1692 /* This is how to output a reference to a user-level label named NAME.
1693 `assemble_name' uses this. */
1695 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1697 const char *xname = (NAME); \
1698 if (FUNCTION_NAME_P (NAME)) \
1700 if (xname[0] == '*') \
1703 fputs (user_label_prefix, FILE); \
1704 fputs (xname, FILE); \
1707 /* This is how to output an internal numbered label where
1708 PREFIX is the class of label and NUM is the number within the class. */
1710 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1711 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1713 /* This is how to store into the string LABEL
1714 the symbol_ref name of an internal numbered label where
1715 PREFIX is the class of label and NUM is the number within the class.
1716 This is suitable for output with `assemble_name'. */
1718 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1719 sprintf (LABEL, "*%c$%s%04ld", (PREFIX)[0], (PREFIX) + 1, (long)(NUM))
1721 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1723 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1724 output_ascii ((FILE), (P), (SIZE))
1726 /* This is how to output an element of a case-vector that is absolute.
1727 Note that this method makes filling these branch delay slots
1730 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1731 if (TARGET_BIG_SWITCH) \
1732 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
1734 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1736 /* Jump tables are executable code and live in the TEXT section on the PA. */
1737 #define JUMP_TABLES_IN_TEXT_SECTION 1
1739 /* This is how to output an element of a case-vector that is relative.
1740 This must be defined correctly as it is used when generating PIC code.
1742 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1743 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1744 rather than a table of absolute addresses. */
1746 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1747 if (TARGET_BIG_SWITCH) \
1748 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
1750 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1752 /* This is how to output an assembler line
1753 that says to advance the location counter
1754 to a multiple of 2**LOG bytes. */
1756 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1757 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1759 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1760 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1762 /* This says how to output an assembler line to define a global common symbol
1763 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1765 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1767 assemble_name ((FILE), (NAME)); \
1768 fputs ("\t.comm ", (FILE)); \
1769 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1771 /* This says how to output an assembler line to define a local common symbol
1772 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1774 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1776 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1777 assemble_name ((FILE), (NAME)); \
1778 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1780 /* Store in OUTPUT a string (made with alloca) containing
1781 an assembler-name for a local static variable named NAME.
1782 LABELNO is an integer which is different for each call. */
1784 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1785 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1786 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1788 /* All HP assemblers use "!" to separate logical lines. */
1789 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1791 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1792 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1794 /* Print operand X (an rtx) in assembler syntax to file FILE.
1795 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1796 For `%' followed by punctuation, CODE is the punctuation and X is null.
1798 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1799 and an immediate zero should be represented as `r0'.
1801 Several % codes are defined:
1803 C compare conditions
1804 N extract conditions
1805 M modifier to handle preincrement addressing for memory refs.
1806 F modifier to handle preincrement addressing for fp memory refs */
1808 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1811 /* Print a memory address as an operand to reference that memory location. */
1813 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1814 { register rtx addr = ADDR; \
1815 register rtx base; \
1817 switch (GET_CODE (addr)) \
1820 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
1823 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1824 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1825 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1826 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1829 fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \
1832 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1833 fputs ("R'", FILE); \
1834 else if (flag_pic == 0) \
1835 fputs ("RR'", FILE); \
1837 fputs ("RT'", FILE); \
1838 output_global_address (FILE, XEXP (addr, 1), 0); \
1839 fputs ("(", FILE); \
1840 output_operand (XEXP (addr, 0), 0); \
1841 fputs (")", FILE); \
1844 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \
1845 fprintf (FILE, "(%%r0)"); \
1848 output_addr_const (FILE, addr); \
1852 /* Find the return address associated with the frame given by
1854 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1855 (return_addr_rtx (COUNT, FRAMEADDR))
1857 /* Used to mask out junk bits from the return address, such as
1858 processor state, interrupt status, condition codes and the like. */
1859 #define MASK_RETURN_ADDR \
1860 /* The privilege level is in the two low order bits, mask em out \
1861 of the return address. */ \
1864 /* The number of Pmode words for the setjmp buffer. */
1865 #define JMP_BUF_SIZE 50
1867 /* Only direct calls to static functions are allowed to be sibling (tail)
1870 This restriction is necessary because some linker generated stubs will
1871 store return pointers into rp' in some cases which might clobber a
1872 live value already in rp'.
1874 In a sibcall the current function and the target function share stack
1875 space. Thus if the path to the current function and the path to the
1876 target function save a value in rp', they save the value into the
1877 same stack slot, which has undesirable consequences.
1879 Because of the deferred binding nature of shared libraries any function
1880 with external scope could be in a different load module and thus require
1881 rp' to be saved when calling that function. So sibcall optimizations
1882 can only be safe for static function.
1884 Note that GCC never needs return value relocations, so we don't have to
1885 worry about static calls with return value relocations (which require
1888 It is safe to perform a sibcall optimization when the target function
1889 will never return. */
1890 #define FUNCTION_OK_FOR_SIBCALL(DECL) \
1892 && ! TARGET_PORTABLE_RUNTIME \
1894 && ! TREE_PUBLIC (DECL))
1896 #define PREDICATE_CODES \
1897 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1898 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
1899 CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \
1900 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1901 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1902 {"reg_before_reload_operand", {REG, MEM}}, \
1903 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1904 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, MEM, CONST_INT, \
1906 {"move_operand", {SUBREG, REG, CONSTANT_P_RTX, CONST_INT, MEM}}, \
1907 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
1908 {"pic_label_operand", {LABEL_REF, CONST}}, \
1909 {"fp_reg_operand", {REG}}, \
1910 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1911 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
1912 {"pre_cint_operand", {CONST_INT}}, \
1913 {"post_cint_operand", {CONST_INT}}, \
1914 {"arith_double_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1915 {"ireg_or_int5_operand", {CONST_INT, REG}}, \
1916 {"int5_operand", {CONST_INT}}, \
1917 {"uint5_operand", {CONST_INT}}, \
1918 {"int11_operand", {CONST_INT}}, \
1919 {"uint32_operand", {CONST_INT, \
1920 HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \
1921 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1922 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1923 {"ior_operand", {CONST_INT}}, \
1924 {"lhs_lshift_cint_operand", {CONST_INT}}, \
1925 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
1926 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1927 {"pc_or_label_operand", {PC, LABEL_REF}}, \
1928 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
1929 {"shadd_operand", {CONST_INT}}, \
1930 {"basereg_operand", {REG}}, \
1931 {"div_operand", {REG, CONST_INT}}, \
1932 {"ireg_operand", {REG}}, \
1933 {"cmpib_comparison_operator", {EQ, NE, LT, LE, LEU, \
1935 {"movb_comparison_operator", {EQ, NE, LT, GE}},
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